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1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Compile 80387 insns for floating point (not library calls). */
66 #define TARGET_80387 (target_flags & 1)
67 /* Compile code for an i486. */
68 #define TARGET_486 (target_flags & 2)
69 /* Compile using ret insn that pops args.
70 This will not work unless you use prototypes at least
71 for all functions that can take varying numbers of args. */
72 #define TARGET_RTD (target_flags & 8)
73 /* Compile passing first two args in regs 0 and 1.
74 This exists only to test compiler features that will
75 be needed for RISC chips. It is not usable
76 and is not intended to be usable on this cpu. */
77 #define TARGET_REGPARM (target_flags & 020)
79 /* Put uninitialized locals into bss, not data.
80 Meaningful only on svr3. */
81 #define TARGET_SVR3_SHLIB (target_flags & 040)
83 /* Use IEEE floating point comparisons. These handle correctly the cases
84 where the result of a comparison is unordered. Normally SIGFPE is
85 generated in such cases, in which case this isn't needed. */
86 #define TARGET_IEEE_FP (target_flags & 0100)
88 /* Functions that return a floating point value may return that value
89 in the 387 FPU or in 386 integer registers. If set, this flag causes
90 the 387 to be used, which is compatible with most calling conventions. */
91 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
93 /* Disable generation of FP sin, cos and sqrt operations for 387.
94 This is because FreeBSD lacks these in the math-emulator-code */
95 #define TARGET_NO_FANCY_MATH_387 (target_flags & 0400)
97 /* Macro to define tables used to set the flags.
98 This is a list in braces of pairs in braces,
99 each pair being { "NAME", VALUE }
100 where VALUE is the bits to set or minus the bits to clear.
101 An empty string NAME is used to identify the default VALUE. */
103 #define TARGET_SWITCHES \
106 { "soft-float", -1}, \
107 { "no-soft-float", 1}, \
114 { "no-regparm", -020}, \
115 { "svr3-shlib", 040}, \
116 { "no-svr3-shlib", -040}, \
117 { "ieee-fp", 0100}, \
118 { "no-ieee-fp", -0100}, \
119 { "fp-ret-in-387", 0200}, \
120 { "no-fp-ret-in-387", -0200}, \
121 { "no-fancy-math-387", 0400}, \
122 { "fancy-math-387", -0400}, \
124 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
126 /* This is meant to be redefined in the host dependent files */
127 #define SUBTARGET_SWITCHES
129 #define OVERRIDE_OPTIONS \
131 SUBTARGET_OVERRIDE_OPTIONS \
134 /* This is meant to be redefined in the host dependent files */
135 #define SUBTARGET_OVERRIDE_OPTIONS
137 /* target machine storage layout */
139 /* Define for XFmode extended real floating point support.
140 This will automatically cause REAL_ARITHMETIC to be defined. */
141 #define LONG_DOUBLE_TYPE_SIZE 96
143 /* Define if you don't want extended real, but do want to use the
144 software floating point emulator for REAL_ARITHMETIC and
145 decimal <-> binary conversion. */
146 /* #define REAL_ARITHMETIC */
148 /* Define this if most significant byte of a word is the lowest numbered. */
149 /* That is true on the 80386. */
151 #define BITS_BIG_ENDIAN 0
153 /* Define this if most significant byte of a word is the lowest numbered. */
154 /* That is not true on the 80386. */
155 #define BYTES_BIG_ENDIAN 0
157 /* Define this if most significant word of a multiword number is the lowest
159 /* Not true for 80386 */
160 #define WORDS_BIG_ENDIAN 0
162 /* number of bits in an addressable storage unit */
163 #define BITS_PER_UNIT 8
165 /* Width in bits of a "word", which is the contents of a machine register.
166 Note that this is not necessarily the width of data type `int';
167 if using 16-bit ints on a 80386, this would still be 32.
168 But on a machine with 16-bit registers, this would be 16. */
169 #define BITS_PER_WORD 32
171 /* Width of a word, in units (bytes). */
172 #define UNITS_PER_WORD 4
174 /* Width in bits of a pointer.
175 See also the macro `Pmode' defined below. */
176 #define POINTER_SIZE 32
178 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
179 #define PARM_BOUNDARY 32
181 /* Boundary (in *bits*) on which stack pointer should be aligned. */
182 #define STACK_BOUNDARY 32
184 /* Allocation boundary (in *bits*) for the code of a function.
185 For i486, we get better performance by aligning to a cache
186 line (i.e. 16 byte) boundary. */
187 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
189 /* Alignment of field after `int : 0' in a structure. */
191 #define EMPTY_FIELD_BOUNDARY 32
193 /* Minimum size in bits of the largest boundary to which any
194 and all fundamental data types supported by the hardware
195 might need to be aligned. No data type wants to be aligned
196 rounder than this. The i386 supports 64-bit floating point
197 quantities, but these can be aligned on any 32-bit boundary. */
198 #define BIGGEST_ALIGNMENT 32
200 /* Set this non-zero if move instructions will actually fail to work
201 when given unaligned data. */
202 #define STRICT_ALIGNMENT 0
204 /* If bit field type is int, don't let it cross an int,
205 and give entire struct the alignment of an int. */
206 /* Required on the 386 since it doesn't have bitfield insns. */
207 #define PCC_BITFIELD_TYPE_MATTERS 1
209 /* Align loop starts for optimal branching. */
210 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
211 ASM_OUTPUT_ALIGN (FILE, 2)
213 /* This is how to align an instruction for optimal branching.
214 On i486 we'll get better performance by aligning on a
215 cache line (i.e. 16 byte) boundary. */
216 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
217 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
219 /* Standard register usage. */
221 /* This processor has special stack-like registers. See reg-stack.c
226 /* Number of actual hardware registers.
227 The hardware registers are assigned numbers for the compiler
228 from 0 to just below FIRST_PSEUDO_REGISTER.
229 All registers that the compiler knows about must be given numbers,
230 even those that are not normally considered general registers.
232 In the 80386 we give the 8 general purpose registers the numbers 0-7.
233 We number the floating point registers 8-15.
234 Note that registers 0-7 can be accessed as a short or int,
235 while only 0-3 may be used with byte `mov' instructions.
237 Reg 16 does not correspond to any hardware register, but instead
238 appears in the RTL as an argument pointer prior to reload, and is
239 eliminated during reloading in favor of either the stack or frame
242 #define FIRST_PSEUDO_REGISTER 17
244 /* 1 for registers that have pervasive standard uses
245 and are not available for the register allocator.
246 On the 80386, the stack pointer is such, as is the arg pointer. */
247 #define FIXED_REGISTERS \
248 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
249 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
251 /* 1 for registers not available across function calls.
252 These must include the FIXED_REGISTERS and also any
253 registers that can be used without being saved.
254 The latter must include the registers where values are returned
255 and the register where structure-value addresses are passed.
256 Aside from that, you can include as many other registers as you like. */
258 #define CALL_USED_REGISTERS \
259 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
260 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
262 /* Order in which to allocate registers. First allocate registers
263 for which no insn operand demands that register, next those that are
264 demanded by the least number of insns. List frame pointer late and fixed
265 egisters last. Note that, in general, we want to put nonsaved registers
266 late, but we put bx relatively early since it is not demanded by
268 #define REG_ALLOC_ORDER \
269 /*si,di,bx,cx,dx,ax,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
270 { 4, 5, 3, 2, 1, 0, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}
272 /* Macro to conditionally modify fixed_regs/call_used_regs. */
273 #define CONDITIONAL_REGISTER_USAGE \
277 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
278 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
280 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
284 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
285 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
286 if (TEST_HARD_REG_BIT (x, i)) \
287 fixed_regs[i] = call_used_regs[i] = 1; \
291 /* Return number of consecutive hard regs needed starting at reg REGNO
292 to hold something of mode MODE.
293 This is ordinarily the length in words of a value of mode MODE
294 but can be less for certain modes in special long registers.
296 Actually there are no two word move instructions for consecutive
297 registers. And only registers 0-3 may have mov byte instructions
301 #define HARD_REGNO_NREGS(REGNO, MODE) \
302 (FP_REGNO_P (REGNO) ? 1 \
303 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
305 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
306 On the 80386, the first 4 cpu registers can hold any mode
307 while the floating point registers may hold only floating point.
308 Make it clear that the fp regs could not hold a 16-byte float. */
310 /* The casts to int placate a compiler on a microvax,
311 for cross-compiler testing. */
313 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
316 : FP_REGNO_P (REGNO) \
317 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
318 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
319 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
320 : (int) (MODE) != (int) QImode)
322 /* Value is 1 if it is a good idea to tie two pseudo registers
323 when one has mode MODE1 and one has mode MODE2.
324 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
325 for any hard reg, then this must be 0 for correct output. */
327 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
329 /* A C expression returning the cost of moving data from a register of class
330 CLASS1 to one of CLASS2.
332 On the i386, copying between floating-point and fixed-point
333 registers is expensive. */
335 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
336 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
337 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
340 /* Specify the registers used for certain standard purposes.
341 The values of these macros are register numbers. */
343 /* on the 386 the pc register is %eip, and is not usable as a general
344 register. The ordinary mov instructions won't work */
345 /* #define PC_REGNUM */
347 /* Register to use for pushing function arguments. */
348 #define STACK_POINTER_REGNUM 7
350 /* Base register for access to local variables of the function. */
351 #define FRAME_POINTER_REGNUM 6
353 /* First floating point reg */
354 #define FIRST_FLOAT_REG 8
356 /* First & last stack-like regs */
357 #define FIRST_STACK_REG FIRST_FLOAT_REG
358 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
360 /* Value should be nonzero if functions must have frame pointers.
361 Zero means the frame pointer need not be set up (and parms
362 may be accessed via the stack pointer) in functions that seem suitable.
363 This is computed in `reload', in reload1.c. */
364 #define FRAME_POINTER_REQUIRED 0
366 /* Base register for access to arguments of the function. */
367 #define ARG_POINTER_REGNUM 16
369 /* Register in which static-chain is passed to a function. */
370 #define STATIC_CHAIN_REGNUM 2
372 /* Register to hold the addressing base for position independent
373 code access to data items. */
374 #define PIC_OFFSET_TABLE_REGNUM 3
376 /* Register in which address to store a structure value
377 arrives in the function. On the 386, the prologue
378 copies this from the stack to register %eax. */
379 #define STRUCT_VALUE_INCOMING 0
381 /* Place in which caller passes the structure value address.
382 0 means push the value on the stack like an argument. */
383 #define STRUCT_VALUE 0
385 /* Define the classes of registers for register constraints in the
386 machine description. Also define ranges of constants.
388 One of the classes must always be named ALL_REGS and include all hard regs.
389 If there is more than one class, another class must be named NO_REGS
390 and contain no registers.
392 The name GENERAL_REGS must be the name of a class (or an alias for
393 another name such as ALL_REGS). This is the class of registers
394 that is allowed by "g" or "r" in a register constraint.
395 Also, registers outside this class are allocated only when
396 instructions express preferences for them.
398 The classes must be numbered in nondecreasing order; that is,
399 a larger-numbered class must never be contained completely
400 in a smaller-numbered class.
402 For any two classes, it is very desirable that there be another
403 class that represents their union.
405 It might seem that class BREG is unnecessary, since no useful 386
406 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
407 and the "b" register constraint is useful in asms for syscalls. */
412 AREG
, DREG
, CREG
, BREG
,
413 AD_REGS
, /* %eax/%edx for DImode */
414 Q_REGS
, /* %eax %ebx %ecx %edx */
416 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
417 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
418 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
420 ALL_REGS
, LIM_REG_CLASSES
423 #define N_REG_CLASSES (int) LIM_REG_CLASSES
425 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
427 /* Give names of register classes as strings for dump file. */
429 #define REG_CLASS_NAMES \
431 "AREG", "DREG", "CREG", "BREG", \
437 "FP_TOP_REG", "FP_SECOND_REG", \
441 /* Define which registers fit in which classes.
442 This is an initializer for a vector of HARD_REG_SET
443 of length N_REG_CLASSES. */
445 #define REG_CLASS_CONTENTS \
447 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
450 0x10, 0x20, /* SIREG, DIREG */ \
451 0x1007f, /* INDEX_REGS */ \
452 0x100ff, /* GENERAL_REGS */ \
453 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
454 0xff00, /* FLOAT_REGS */ \
457 /* The same information, inverted:
458 Return the class number of the smallest class containing
459 reg number REGNO. This could be a conditional expression
460 or could index an array. */
462 extern enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
];
463 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
465 /* When defined, the compiler allows registers explicitly used in the
466 rtl to be used as spill registers but prevents the compiler from
467 extending the lifetime of these registers. */
469 #define SMALL_REGISTER_CLASSES
471 #define QI_REG_P(X) \
472 (REG_P (X) && REGNO (X) < 4)
473 #define NON_QI_REG_P(X) \
474 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
476 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
477 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
479 #define STACK_REG_P(xop) (REG_P (xop) && \
480 REGNO (xop) >= FIRST_STACK_REG && \
481 REGNO (xop) <= LAST_STACK_REG)
483 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
485 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
487 /* Try to maintain the accuracy of the death notes for regs satisfying the
488 following. Important for stack like regs, to know when to pop. */
490 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
492 /* 1 if register REGNO can magically overlap other regs.
493 Note that nonzero values work only in very special circumstances. */
495 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
497 /* The class value for index registers, and the one for base regs. */
499 #define INDEX_REG_CLASS INDEX_REGS
500 #define BASE_REG_CLASS GENERAL_REGS
502 /* Get reg_class from a letter such as appears in the machine description. */
504 #define REG_CLASS_FROM_LETTER(C) \
505 ((C) == 'r' ? GENERAL_REGS : \
506 (C) == 'q' ? Q_REGS : \
507 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
510 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
513 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
516 (C) == 'a' ? AREG : \
517 (C) == 'b' ? BREG : \
518 (C) == 'c' ? CREG : \
519 (C) == 'd' ? DREG : \
520 (C) == 'A' ? AD_REGS : \
521 (C) == 'D' ? DIREG : \
522 (C) == 'S' ? SIREG : NO_REGS)
524 /* The letters I, J, K, L and M in a register constraint string
525 can be used to stand for particular ranges of immediate operands.
526 This macro defines what the ranges are.
527 C is the letter, and VALUE is a constant value.
528 Return 1 if VALUE is in the range specified by C.
530 I is for non-DImode shifts.
531 J is for DImode shifts.
532 K and L are for an `andsi' optimization.
533 M is for shifts that can be executed by the "lea" opcode.
536 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
537 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
538 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
539 (C) == 'K' ? (VALUE) == 0xff : \
540 (C) == 'L' ? (VALUE) == 0xffff : \
541 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
544 /* Similar, but for floating constants, and defining letters G and H.
545 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
546 TARGET_387 isn't set, because the stack register converter may need to
547 load 0.0 into the function value register. */
549 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
550 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
552 /* Place additional restrictions on the register class to use when it
553 is necessary to be able to hold a value of mode MODE in a reload
554 register for which class CLASS would ordinarily be used. */
556 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
557 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
560 /* Given an rtx X being reloaded into a reg required to be
561 in class CLASS, return the class of reg to actually use.
562 In general this is just CLASS; but on some machines
563 in some cases it is preferable to use a more restrictive class.
564 On the 80386 series, we prevent floating constants from being
565 reloaded into floating registers (since no move-insn can do that)
566 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
568 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
569 QImode must go into class Q_REGS.
570 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
571 movdf to do mem-to-mem moves through integer regs. */
573 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
574 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
575 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
576 : ((CLASS) == ALL_REGS \
577 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
580 /* If we are copying between general and FP registers, we need a memory
583 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
584 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
585 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
587 /* Return the maximum number of consecutive registers
588 needed to represent mode MODE in a register of class CLASS. */
589 /* On the 80386, this is the size of MODE in words,
590 except in the FP regs, where a single reg is always enough. */
591 #define CLASS_MAX_NREGS(CLASS, MODE) \
592 (FLOAT_CLASS_P (CLASS) ? 1 : \
593 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
595 /* Stack layout; function entry, exit and calling. */
597 /* Define this if pushing a word on the stack
598 makes the stack pointer a smaller address. */
599 #define STACK_GROWS_DOWNWARD
601 /* Define this if the nominal address of the stack frame
602 is at the high-address end of the local variables;
603 that is, each additional local variable allocated
604 goes at a more negative offset in the frame. */
605 #define FRAME_GROWS_DOWNWARD
607 /* Offset within stack frame to start allocating local variables at.
608 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
609 first local allocated. Otherwise, it is the offset to the BEGINNING
610 of the first local allocated. */
611 #define STARTING_FRAME_OFFSET 0
613 /* If we generate an insn to push BYTES bytes,
614 this says how many the stack pointer really advances by.
615 On 386 pushw decrements by exactly 2 no matter what the position was.
616 On the 386 there is no pushb; we use pushw instead, and this
617 has the effect of rounding up to 2. */
619 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
621 /* Offset of first parameter from the argument pointer register value. */
622 #define FIRST_PARM_OFFSET(FNDECL) 0
624 /* Value is the number of bytes of arguments automatically
625 popped when returning from a subroutine call.
626 FUNTYPE is the data type of the function (as a tree),
627 or for a library call it is an identifier node for the subroutine name.
628 SIZE is the number of bytes of arguments passed on the stack.
630 On the 80386, the RTD insn may be used to pop them if the number
631 of args is fixed, but if the number is variable then the caller
632 must pop them all. RTD can't be used for library calls now
633 because the library is compiled with the Unix compiler.
634 Use of RTD is a selectable option, since it is incompatible with
635 standard Unix calling sequences. If the option is not selected,
636 the caller must always pop the args. */
638 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
639 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
641 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
642 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
643 == void_type_node))) ? (SIZE) \
644 : (aggregate_value_p (TREE_TYPE (FUNTYPE))) ? GET_MODE_SIZE (Pmode) : 0)
646 /* Define how to find the value returned by a function.
647 VALTYPE is the data type of the value (as a tree).
648 If the precise function being called is known, FUNC is its FUNCTION_DECL;
649 otherwise, FUNC is 0. */
650 #define FUNCTION_VALUE(VALTYPE, FUNC) \
651 gen_rtx (REG, TYPE_MODE (VALTYPE), \
652 VALUE_REGNO (TYPE_MODE (VALTYPE)))
654 /* Define how to find the value returned by a library function
655 assuming the value has mode MODE. */
657 #define LIBCALL_VALUE(MODE) \
658 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
660 /* Define the size of the result block used for communication between
661 untyped_call and untyped_return. The block contains a DImode value
662 followed by the block used by fnsave and frstor. */
664 #define APPLY_RESULT_SIZE (8+108)
666 /* 1 if N is a possible register number for function argument passing.
667 On the 80386, no registers are used in this way.
668 *NOTE* -mregparm does not work.
669 It exists only to test register calling conventions. */
671 #define FUNCTION_ARG_REGNO_P(N) 0
673 /* Define a data type for recording info about an argument list
674 during the scan of that argument list. This data type should
675 hold all necessary information about the function itself
676 and about the args processed so far, enough to enable macros
677 such as FUNCTION_ARG to determine where the next arg should go.
679 On the 80386, this is a single integer, which is a number of bytes
680 of arguments scanned so far. */
682 #define CUMULATIVE_ARGS int
684 /* Initialize a variable CUM of type CUMULATIVE_ARGS
685 for a call to a function whose data type is FNTYPE.
686 For a library call, FNTYPE is 0.
688 On the 80386, the offset starts at 0. */
690 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
693 /* Update the data in CUM to advance over an argument
694 of mode MODE and data type TYPE.
695 (TYPE is null for libcalls where that information may not be available.) */
697 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
698 ((CUM) += ((MODE) != BLKmode \
699 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
700 : (int_size_in_bytes (TYPE) + 3) & ~3))
702 /* Define where to put the arguments to a function.
703 Value is zero to push the argument on the stack,
704 or a hard register in which to store the argument.
706 MODE is the argument's machine mode.
707 TYPE is the data type of the argument (as a tree).
708 This is null for libcalls where that information may
710 CUM is a variable of type CUMULATIVE_ARGS which gives info about
711 the preceding args and about the function being called.
712 NAMED is nonzero if this argument is a named parameter
713 (otherwise it is an extra parameter matching an ellipsis). */
716 /* On the 80386 all args are pushed, except if -mregparm is specified
717 then the first two words of arguments are passed in EAX, EDX.
718 *NOTE* -mregparm does not work.
719 It exists only to test register calling conventions. */
721 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
722 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
724 /* For an arg passed partly in registers and partly in memory,
725 this is the number of registers used.
726 For args passed entirely in registers or entirely in memory, zero. */
729 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
730 ((TARGET_REGPARM && (CUM) < 8 \
731 && 8 < ((CUM) + ((MODE) == BLKmode \
732 ? int_size_in_bytes (TYPE) \
733 : GET_MODE_SIZE (MODE)))) \
736 /* This macro generates the assembly code for function entry.
737 FILE is a stdio stream to output the code to.
738 SIZE is an int: how many units of temporary storage to allocate.
739 Refer to the array `regs_ever_live' to determine which registers
740 to save; `regs_ever_live[I]' is nonzero if register number I
741 is ever used in the function. This macro is responsible for
742 knowing which registers should not be saved even if used. */
744 #define FUNCTION_PROLOGUE(FILE, SIZE) \
745 function_prologue (FILE, SIZE)
747 /* Output assembler code to FILE to increment profiler label # LABELNO
748 for profiling a function entry. */
750 #define FUNCTION_PROFILER(FILE, LABELNO) \
754 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
755 LPREFIX, (LABELNO)); \
756 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
760 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
761 fprintf (FILE, "\tcall _mcount\n"); \
765 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
766 the stack pointer does not matter. The value is tested only in
767 functions that have frame pointers.
768 No definition is equivalent to always zero. */
769 /* Note on the 386 it might be more efficient not to define this since
770 we have to restore it ourselves from the frame pointer, in order to
773 #define EXIT_IGNORE_STACK 1
775 /* This macro generates the assembly code for function exit,
776 on machines that need it. If FUNCTION_EPILOGUE is not defined
777 then individual return instructions are generated for each
778 return statement. Args are same as for FUNCTION_PROLOGUE.
780 The function epilogue should not depend on the current stack pointer!
781 It should use the frame pointer only. This is mandatory because
782 of alloca; we also take advantage of it to omit stack adjustments
785 If the last non-note insn in the function is a BARRIER, then there
786 is no need to emit a function prologue, because control does not fall
787 off the end. This happens if the function ends in an "exit" call, or
788 if a `return' insn is emitted directly into the function. */
790 #define FUNCTION_EPILOGUE(FILE, SIZE) \
792 rtx last = get_last_insn (); \
793 if (last && GET_CODE (last) == NOTE) \
794 last = prev_nonnote_insn (last); \
795 if (! last || GET_CODE (last) != BARRIER) \
796 function_epilogue (FILE, SIZE); \
799 /* Output assembler code for a block containing the constant parts
800 of a trampoline, leaving space for the variable parts. */
802 /* On the 386, the trampoline contains three instructions:
806 #define TRAMPOLINE_TEMPLATE(FILE) \
808 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
809 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
810 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
811 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
812 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
813 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
814 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
815 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
818 /* Length in units of the trampoline for entering a nested function. */
820 #define TRAMPOLINE_SIZE 12
822 /* Emit RTL insns to initialize the variable parts of a trampoline.
823 FNADDR is an RTX for the address of the function's pure code.
824 CXT is an RTX for the static chain value for the function. */
826 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
828 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
829 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
832 /* Definitions for register eliminations.
834 This is an array of structures. Each structure initializes one pair
835 of eliminable registers. The "from" register number is given first,
836 followed by "to". Eliminations of the same "from" register are listed
837 in order of preference.
839 We have two registers that can be eliminated on the i386. First, the
840 frame pointer register can often be eliminated in favor of the stack
841 pointer register. Secondly, the argument pointer register can always be
842 eliminated; it is replaced with either the stack or frame pointer. */
844 #define ELIMINABLE_REGS \
845 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
846 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
847 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
849 /* Given FROM and TO register numbers, say whether this elimination is allowed.
850 Frame pointer elimination is automatically handled.
852 For the i386, if frame pointer elimination is being done, we would like to
853 convert ap into sp, not fp.
855 All other eliminations are valid. */
857 #define CAN_ELIMINATE(FROM, TO) \
858 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
859 ? ! frame_pointer_needed \
862 /* Define the offset between two registers, one to be eliminated, and the other
863 its replacement, at the start of a routine. */
865 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
867 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
868 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
874 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
875 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
876 || (current_function_uses_pic_offset_table \
877 && regno == PIC_OFFSET_TABLE_REGNUM)) \
880 (OFFSET) = offset + get_frame_size (); \
882 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
883 (OFFSET) += 4; /* Skip saved PC */ \
887 /* Addressing modes, and classification of registers for them. */
889 /* #define HAVE_POST_INCREMENT */
890 /* #define HAVE_POST_DECREMENT */
892 /* #define HAVE_PRE_DECREMENT */
893 /* #define HAVE_PRE_INCREMENT */
895 /* Macros to check register numbers against specific register classes. */
897 /* These assume that REGNO is a hard or pseudo reg number.
898 They give nonzero only if REGNO is a hard reg of the suitable class
899 or a pseudo reg currently allocated to a suitable hard reg.
900 Since they use reg_renumber, they are safe only once reg_renumber
901 has been allocated, which happens in local-alloc.c. */
903 #define REGNO_OK_FOR_INDEX_P(REGNO) \
904 ((REGNO) < STACK_POINTER_REGNUM \
905 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
907 #define REGNO_OK_FOR_BASE_P(REGNO) \
908 ((REGNO) <= STACK_POINTER_REGNUM \
909 || (REGNO) == ARG_POINTER_REGNUM \
910 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
912 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
913 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
915 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
916 and check its validity for a certain class.
917 We have two alternate definitions for each of them.
918 The usual definition accepts all pseudo regs; the other rejects
919 them unless they have been allocated suitable hard regs.
920 The symbol REG_OK_STRICT causes the latter definition to be used.
922 Most source files want to accept pseudo regs in the hope that
923 they will get allocated to the class that the insn wants them to be in.
924 Source files for reload pass need to be strict.
925 After reload, it makes no difference, since pseudo regs have
926 been eliminated by then. */
928 #ifndef REG_OK_STRICT
930 /* Nonzero if X is a hard reg that can be used as an index or if
931 it is a pseudo reg. */
933 #define REG_OK_FOR_INDEX_P(X) \
934 (REGNO (X) < STACK_POINTER_REGNUM \
935 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
937 /* Nonzero if X is a hard reg that can be used as a base reg
938 of if it is a pseudo reg. */
941 #define REG_OK_FOR_BASE_P(X) \
942 (REGNO (X) <= STACK_POINTER_REGNUM \
943 || REGNO (X) == ARG_POINTER_REGNUM \
944 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
946 #define REG_OK_FOR_STRREG_P(X) \
947 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
951 /* Nonzero if X is a hard reg that can be used as an index. */
952 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
953 /* Nonzero if X is a hard reg that can be used as a base reg. */
954 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
955 #define REG_OK_FOR_STRREG_P(X) \
956 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
960 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
961 that is a valid memory address for an instruction.
962 The MODE argument is the machine mode for the MEM expression
963 that wants to use this address.
965 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
966 except for CONSTANT_ADDRESS_P which is usually machine-independent.
968 See legitimize_pic_address in i386.c for details as to what
969 constitutes a legitimate address when -fpic is used. */
971 #define MAX_REGS_PER_ADDRESS 2
973 #define CONSTANT_ADDRESS_P(X) \
974 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
975 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
976 || GET_CODE (X) == HIGH)
978 /* Nonzero if the constant value X is a legitimate general operand.
979 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
981 #define LEGITIMATE_CONSTANT_P(X) 1
983 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
984 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
986 #define LEGITIMATE_INDEX_REG_P(X) \
987 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
989 /* Return 1 if X is an index or an index times a scale. */
991 #define LEGITIMATE_INDEX_P(X) \
992 (LEGITIMATE_INDEX_REG_P (X) \
993 || (GET_CODE (X) == MULT \
994 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
995 && GET_CODE (XEXP (X, 1)) == CONST_INT \
996 && (INTVAL (XEXP (X, 1)) == 2 \
997 || INTVAL (XEXP (X, 1)) == 4 \
998 || INTVAL (XEXP (X, 1)) == 8)))
1000 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
1002 #define GO_IF_INDEXING(X, ADDR) \
1003 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
1004 GO_IF_INDEXABLE_BASE (X, ADDR); \
1005 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
1006 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
1007 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
1008 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
1010 /* We used to allow this, but it isn't ever used.
1011 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
1012 && REG_P (XEXP (X, 0)) \
1013 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
1016 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1018 if (CONSTANT_ADDRESS_P (X) \
1019 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1021 GO_IF_INDEXING (X, ADDR); \
1022 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1024 rtx x0 = XEXP (X, 0); \
1025 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
1026 { GO_IF_INDEXING (x0, ADDR); } \
1027 else if (x0 == pic_offset_table_rtx) \
1029 else if (GET_CODE (x0) == PLUS) \
1031 if (XEXP (x0, 0) == pic_offset_table_rtx) \
1032 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
1033 if (XEXP (x0, 1) == pic_offset_table_rtx) \
1034 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
1039 /* Try machine-dependent ways of modifying an illegitimate address
1040 to be legitimate. If we find one, return the new, valid address.
1041 This macro is used in only one place: `memory_address' in explow.c.
1043 OLDX is the address as it was before break_out_memory_refs was called.
1044 In some cases it is useful to look at this to decide what needs to be done.
1046 MODE and WIN are passed so that this macro can use
1047 GO_IF_LEGITIMATE_ADDRESS.
1049 It is always safe for this macro to do nothing. It exists to recognize
1050 opportunities to optimize the output.
1052 For the 80386, we handle X+REG by loading X into a register R and
1053 using R+REG. R will go in a general reg and indexing will be used.
1054 However, if REG is a broken-out memory address or multiplication,
1055 nothing needs to be done because REG can certainly go in a general reg.
1057 When -fpic is used, special handling is needed for symbolic references.
1058 See comments by legitimize_pic_address in i386.c for details. */
1060 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1061 { extern rtx legitimize_pic_address (); \
1062 int ch = (X) != (OLDX); \
1063 if (flag_pic && SYMBOLIC_CONST (X)) \
1065 (X) = legitimize_pic_address (X, 0); \
1066 if (memory_address_p (MODE, X)) \
1069 if (GET_CODE (X) == PLUS) \
1070 { if (GET_CODE (XEXP (X, 0)) == MULT) \
1071 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1072 if (GET_CODE (XEXP (X, 1)) == MULT) \
1073 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1074 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1075 && GET_CODE (XEXP (X, 0)) == REG) \
1077 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1078 ch = 1, (X) = legitimize_pic_address (X, 0); \
1079 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1080 if (GET_CODE (XEXP (X, 0)) == REG) \
1081 { register rtx temp = gen_reg_rtx (Pmode); \
1082 register rtx val = force_operand (XEXP (X, 1), temp); \
1083 if (val != temp) emit_move_insn (temp, val); \
1084 XEXP (X, 1) = temp; \
1086 else if (GET_CODE (XEXP (X, 1)) == REG) \
1087 { register rtx temp = gen_reg_rtx (Pmode); \
1088 register rtx val = force_operand (XEXP (X, 0), temp); \
1089 if (val != temp) emit_move_insn (temp, val); \
1090 XEXP (X, 0) = temp; \
1093 /* Nonzero if the constant value X is a legitimate general operand
1094 when generating PIC code. It is given that flag_pic is on and
1095 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1097 #define LEGITIMATE_PIC_OPERAND_P(X) \
1098 (! SYMBOLIC_CONST (X) \
1099 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1101 #define SYMBOLIC_CONST(X) \
1102 (GET_CODE (X) == SYMBOL_REF \
1103 || GET_CODE (X) == LABEL_REF \
1104 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1106 /* Go to LABEL if ADDR (a legitimate address expression)
1107 has an effect that depends on the machine mode it is used for.
1108 On the 80386, only postdecrement and postincrement address depend thus
1109 (the amount of decrement or increment being the length of the operand). */
1110 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1111 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1113 /* Define this macro if references to a symbol must be treated
1114 differently depending on something about the variable or
1115 function named by the symbol (such as what section it is in).
1117 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1118 so that we may access it directly in the GOT. */
1120 #define ENCODE_SECTION_INFO(DECL) \
1125 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1126 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1127 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1128 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1129 || ! TREE_PUBLIC (DECL)); \
1134 /* Initialize data used by insn expanders. This is called from
1135 init_emit, once for each function, before code is generated.
1136 For 386, clear stack slot assignments remembered from previous
1139 #define INIT_EXPANDERS clear_386_stack_locals ()
1141 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1142 codes once the function is being compiled into assembly code, but
1143 not before. (It is not done before, because in the case of
1144 compiling an inline function, it would lead to multiple PIC
1145 prologues being included in functions which used inline functions
1146 and were compiled to assembly language.) */
1148 #define FINALIZE_PIC \
1151 extern int current_function_uses_pic_offset_table; \
1153 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1158 /* Specify the machine mode that this machine uses
1159 for the index in the tablejump instruction. */
1160 #define CASE_VECTOR_MODE Pmode
1162 /* Define this if the tablejump instruction expects the table
1163 to contain offsets from the address of the table.
1164 Do not define this if the table should contain absolute addresses. */
1165 /* #define CASE_VECTOR_PC_RELATIVE */
1167 /* Specify the tree operation to be used to convert reals to integers.
1168 This should be changed to take advantage of fist --wfs ??
1170 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1172 /* This is the kind of divide that is easiest to do in the general case. */
1173 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1175 /* Define this as 1 if `char' should by default be signed; else as 0. */
1176 #define DEFAULT_SIGNED_CHAR 1
1178 /* Max number of bytes we can move from memory to memory
1179 in one reasonably fast instruction. */
1182 /* MOVE_RATIO is the number of move instructions that is better than a
1183 block move. Make this large on i386, since the block move is very
1184 inefficient with small blocks, and the hard register needs of the
1185 block move require much reload work. */
1186 #define MOVE_RATIO 5
1188 /* Define this if zero-extension is slow (more than one real instruction). */
1189 /* #define SLOW_ZERO_EXTEND */
1191 /* Nonzero if access to memory by bytes is slow and undesirable. */
1192 #define SLOW_BYTE_ACCESS 0
1194 /* Define if shifts truncate the shift count
1195 which implies one can omit a sign-extension or zero-extension
1196 of a shift count. */
1197 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1199 /* #define SHIFT_COUNT_TRUNCATED */
1201 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1202 is done just by pretending it is already truncated. */
1203 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1205 /* We assume that the store-condition-codes instructions store 0 for false
1206 and some other value for true. This is the value stored for true. */
1208 #define STORE_FLAG_VALUE 1
1210 /* When a prototype says `char' or `short', really pass an `int'.
1211 (The 386 can't easily push less than an int.) */
1213 #define PROMOTE_PROTOTYPES
1215 /* Specify the machine mode that pointers have.
1216 After generation of rtl, the compiler makes no further distinction
1217 between pointers and any other objects of this machine mode. */
1218 #define Pmode SImode
1220 /* A function address in a call instruction
1221 is a byte address (for indexing purposes)
1222 so give the MEM rtx a byte's mode. */
1223 #define FUNCTION_MODE QImode
1225 /* Define this if addresses of constant functions
1226 shouldn't be put through pseudo regs where they can be cse'd.
1227 Desirable on the 386 because a CALL with a constant address is
1228 not much slower than one with a register address. */
1229 #define NO_FUNCTION_CSE
1231 /* Provide the costs of a rtl expression. This is in the body of a
1234 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1236 return COSTS_N_INSNS (10); \
1241 return COSTS_N_INSNS (40); \
1243 if (GET_CODE (XEXP (X, 0)) == REG \
1244 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1249 /* Compute the cost of computing a constant rtl expression RTX
1250 whose rtx-code is CODE. The body of this macro is a portion
1251 of a switch statement. If the code is computed here,
1252 return it with a return statement. Otherwise, break from the switch. */
1254 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1259 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1260 case CONST_DOUBLE: \
1263 if (GET_MODE (RTX) == VOIDmode) \
1265 code = standard_80387_constant_p (RTX); \
1266 return code == 1 ? 0 : \
1271 /* Compute the cost of an address. This is meant to approximate the size
1272 and/or execution delay of an insn using that address. If the cost is
1273 approximated by the RTL complexity, including CONST_COSTS above, as
1274 is usually the case for CISC machines, this macro should not be defined.
1275 For aggressively RISCy machines, only one insn format is allowed, so
1276 this macro should be a constant. The value of this macro only matters
1277 for valid addresses.
1279 For i386, it is better to use a complex address than let gcc copy
1280 the address into a reg and make a new pseudo. But not if the address
1281 requires to two regs - that would mean more pseudos with longer
1284 #define ADDRESS_COST(RTX) \
1285 ((CONSTANT_P (RTX) \
1286 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1287 && REG_P (XEXP (RTX, 0)))) ? 0 \
1291 /* Add any extra modes needed to represent the condition code.
1293 For the i386, we need separate modes when floating-point equality
1294 comparisons are being done. */
1296 #define EXTRA_CC_MODES CCFPEQmode
1298 /* Define the names for the modes specified above. */
1299 #define EXTRA_CC_NAMES "CCFPEQ"
1301 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1302 return the mode to be used for the comparison.
1304 For floating-point equality comparisons, CCFPEQmode should be used.
1305 VOIDmode should be used in all other cases. */
1307 #define SELECT_CC_MODE(OP,X,Y) \
1308 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1309 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1311 /* Define the information needed to generate branch and scc insns. This is
1312 stored from the compare operation. Note that we can't use "rtx" here
1313 since it hasn't been defined! */
1315 extern struct rtx_def
*i386_compare_op0
, *i386_compare_op1
;
1316 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1318 /* Tell final.c how to eliminate redundant test instructions. */
1320 /* Here we define machine-dependent flags and fields in cc_status
1321 (see `conditions.h'). */
1323 /* Set if the cc value is actually in the 80387, so a floating point
1324 conditional branch must be output. */
1325 #define CC_IN_80387 04000
1327 /* Set if the CC value was stored in a nonstandard way, so that
1328 the state of equality is indicated by zero in the carry bit. */
1329 #define CC_Z_IN_NOT_C 010000
1331 /* Store in cc_status the expressions
1332 that the condition codes will describe
1333 after execution of an instruction whose pattern is EXP.
1334 Do not alter them if the instruction would not alter the cc's. */
1336 #define NOTICE_UPDATE_CC(EXP, INSN) \
1337 notice_update_cc((EXP))
1339 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1340 FLOAT following a floating point comparison.
1341 Use NO_OV following an arithmetic insn that set the cc's
1342 before a test insn that was deleted.
1343 NO_OV may be zero, meaning final should reinsert the test insn
1344 because the jump cannot be handled properly without it. */
1346 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1348 if (cc_prev_status.flags & CC_IN_80387) \
1350 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1355 /* Control the assembler format that we output, to the extent
1356 this does not vary between assemblers. */
1358 /* How to refer to registers in assembler output.
1359 This sequence is indexed by compiler's hard-register-number (see above). */
1361 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1362 For non floating point regs, the following are the HImode names.
1364 For float regs, the stack top is sometimes referred to as "%st(0)"
1365 instead of just "%st". PRINT_REG handles this with the "y" code. */
1367 #define HI_REGISTER_NAMES \
1368 {"ax","dx","cx","bx","si","di","bp","sp", \
1369 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1371 #define REGISTER_NAMES HI_REGISTER_NAMES
1373 /* Table of additional register names to use in user input. */
1375 #define ADDITIONAL_REGISTER_NAMES \
1376 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1377 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1378 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1379 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1381 /* Note we are omitting these since currently I don't know how
1382 to get gcc to use these, since they want the same but different
1383 number as al, and ax.
1386 /* note the last four are not really qi_registers, but
1387 the md will have to never output movb into one of them
1388 only a movw . There is no movb into the last four regs */
1390 #define QI_REGISTER_NAMES \
1391 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1393 /* These parallel the array above, and can be used to access bits 8:15
1394 of regs 0 through 3. */
1396 #define QI_HIGH_REGISTER_NAMES \
1397 {"ah", "dh", "ch", "bh", }
1399 /* How to renumber registers for dbx and gdb. */
1401 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1402 #define DBX_REGISTER_NUMBER(n) \
1413 /* This is how to output the definition of a user-level label named NAME,
1414 such as the label on a static function or variable NAME. */
1416 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1417 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1419 /* This is how to output an assembler line defining a `double' constant. */
1421 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1423 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1424 if (sizeof (int) == sizeof (long)) \
1425 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
1427 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1430 /* This is how to output a `long double' extended real constant. */
1432 #undef ASM_OUTPUT_LONG_DOUBLE
1433 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1435 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1436 if (sizeof (int) == sizeof (long)) \
1437 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
1439 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1442 /* This is how to output an assembler line defining a `float' constant. */
1444 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1446 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1447 if (sizeof (int) == sizeof (long)) \
1448 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
1450 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1453 /* Store in OUTPUT a string (made with alloca) containing
1454 an assembler-name for a local static variable named NAME.
1455 LABELNO is an integer which is different for each call. */
1457 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1458 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1459 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1463 /* This is how to output an assembler line defining an `int' constant. */
1465 #define ASM_OUTPUT_INT(FILE,VALUE) \
1466 ( fprintf (FILE, "%s ", ASM_LONG), \
1467 output_addr_const (FILE,(VALUE)), \
1470 /* Likewise for `char' and `short' constants. */
1471 /* is this supposed to do align too?? */
1473 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1474 ( fprintf (FILE, "%s ", ASM_SHORT), \
1475 output_addr_const (FILE,(VALUE)), \
1479 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1480 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1481 output_addr_const (FILE,(VALUE)), \
1482 fputs (",", FILE), \
1483 output_addr_const (FILE,(VALUE)), \
1484 fputs (" >> 8\n",FILE))
1488 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1489 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1490 output_addr_const (FILE, (VALUE)), \
1493 /* This is how to output an assembler line for a numeric constant byte. */
1495 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1496 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1498 /* This is how to output an insn to push a register on the stack.
1499 It need not be very fast code. */
1501 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1502 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1504 /* This is how to output an insn to pop a register from the stack.
1505 It need not be very fast code. */
1507 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1508 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1510 /* This is how to output an element of a case-vector that is absolute.
1513 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1514 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1516 /* This is how to output an element of a case-vector that is relative.
1517 We don't use these on the 386 yet, because the ATT assembler can't do
1518 forward reference the differences.
1521 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1522 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1524 /* Define the parentheses used to group arithmetic operations
1525 in assembler code. */
1527 #define ASM_OPEN_PAREN ""
1528 #define ASM_CLOSE_PAREN ""
1530 /* Define results of standard character escape sequences. */
1531 #define TARGET_BELL 007
1532 #define TARGET_BS 010
1533 #define TARGET_TAB 011
1534 #define TARGET_NEWLINE 012
1535 #define TARGET_VT 013
1536 #define TARGET_FF 014
1537 #define TARGET_CR 015
1539 /* Print operand X (an rtx) in assembler syntax to file FILE.
1540 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1541 The CODE z takes the size of operand from the following digit, and
1542 outputs b,w,or l respectively.
1544 On the 80386, we use several such letters:
1545 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1546 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1547 R -- print the prefix for register names.
1548 z -- print the opcode suffix for the size of the current operand.
1549 * -- print a star (in certain assembler syntax)
1550 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1551 b -- print the operand as if it's a byte (QImode) even if it isn't.
1552 c -- don't print special prefixes before constant operands. */
1554 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1557 /* Print the name of a register based on its machine mode and number.
1558 If CODE is 'w', pretend the mode is HImode.
1559 If CODE is 'b', pretend the mode is QImode.
1560 If CODE is 'k', pretend the mode is SImode.
1561 If CODE is 'h', pretend the reg is the `high' byte register.
1562 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1564 extern char *hi_reg_name
[];
1565 extern char *qi_reg_name
[];
1566 extern char *qi_high_reg_name
[];
1568 #define PRINT_REG(X, CODE, FILE) \
1569 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1571 fprintf (FILE, "%s", RP); \
1572 switch ((CODE == 'w' ? 2 \
1577 : GET_MODE_SIZE (GET_MODE (X)))) \
1580 if (STACK_TOP_P (X)) \
1582 fputs ("st(0)", FILE); \
1588 if (! FP_REG_P (X)) fputs ("e", FILE); \
1590 fputs (hi_reg_name[REGNO (X)], FILE); \
1593 fputs (qi_reg_name[REGNO (X)], FILE); \
1596 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1601 #define PRINT_OPERAND(FILE, X, CODE) \
1602 print_operand (FILE, X, CODE)
1604 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1605 print_operand_address (FILE, ADDR)
1607 /* Print the name of a register for based on its machine mode and number.
1608 This macro is used to print debugging output.
1609 This macro is different from PRINT_REG in that it may be used in
1610 programs that are not linked with aux-output.o. */
1612 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1613 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1614 static char *qi_name[] = QI_REGISTER_NAMES; \
1615 fprintf (FILE, "%d %s", REGNO (X), RP); \
1616 if (REGNO (X) == ARG_POINTER_REGNUM) \
1617 { fputs ("argp", FILE); break; } \
1618 if (STACK_TOP_P (X)) \
1619 { fputs ("st(0)", FILE); break; } \
1621 { fputs (hi_name[REGNO(X)], FILE); break; } \
1622 switch (GET_MODE_SIZE (GET_MODE (X))) \
1625 fputs ("e", FILE); \
1627 fputs (hi_name[REGNO (X)], FILE); \
1630 fputs (qi_name[REGNO (X)], FILE); \
1635 /* Output the prefix for an immediate operand, or for an offset operand. */
1636 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1637 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1639 /* Routines in libgcc that return floats must return them in an fp reg,
1640 just as other functions do which return such values.
1641 These macros make that happen. */
1643 #define FLOAT_VALUE_TYPE float
1644 #define INTIFY(FLOATVAL) FLOATVAL
1646 /* Nonzero if INSN magically clobbers register REGNO. */
1648 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1649 (FP_REGNO_P (REGNO) \
1650 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1653 /* a letter which is not needed by the normal asm syntax, which
1654 we can use for operand syntax in the extended asm */
1656 #define ASM_OPERAND_LETTER '#'
1658 #define RET return ""
1659 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
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