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gcc.gnu.org Git - gcc.git/blob - gcc/config/i386/i386.h
1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 1992, 1994, 1995, 1996 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs
{
58 int add
; /* cost of an add instruction */
59 int lea
; /* cost of a lea instruction */
60 int shift_var
; /* variable shift costs */
61 int shift_const
; /* constant shift costs */
62 int mult_init
; /* cost of starting a multiply */
63 int mult_bit
; /* cost of multiply per each bit set */
64 int divide
; /* cost of a divide/mod */
67 extern struct processor_costs
*ix86_cost
;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags
;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_486 000000000002 /* 80486 specific */
83 #define MASK_NOTUSED1 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
99 /* Use the floating point instructions */
100 #define TARGET_80387 (target_flags & MASK_80387)
102 /* Compile using ret insn that pops args.
103 This will not work unless you use prototypes at least
104 for all functions that can take varying numbers of args. */
105 #define TARGET_RTD (target_flags & MASK_RTD)
107 /* Align doubles to a two word boundary. This breaks compatibility with
108 the published ABI's for structures containing doubles, but produces
109 faster code on the pentium. */
110 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
112 /* Put uninitialized locals into bss, not data.
113 Meaningful only on svr3. */
114 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
116 /* Use IEEE floating point comparisons. These handle correctly the cases
117 where the result of a comparison is unordered. Normally SIGFPE is
118 generated in such cases, in which case this isn't needed. */
119 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
121 /* Functions that return a floating point value may return that value
122 in the 387 FPU or in 386 integer registers. If set, this flag causes
123 the 387 to be used, which is compatible with most calling conventions. */
124 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
126 /* Disable generation of FP sin, cos and sqrt operations for 387.
127 This is because FreeBSD lacks these in the math-emulator-code */
128 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
130 /* Don't create frame pointers for leaf functions */
131 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
133 /* Temporary switches for tuning code generation */
135 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
136 and division by constants, but sometimes cause reload problems. */
137 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
138 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
140 /* Emit/Don't emit prologue as rtl */
141 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
143 /* Debug GO_IF_LEGITIMATE_ADDRESS */
144 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
146 /* Debug FUNCTION_ARG macros */
147 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
149 /* Hack macros for tuning code generation */
150 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
151 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
153 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
154 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
155 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
156 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
157 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
158 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386)
160 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
161 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
162 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
163 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
164 || ix86_cpu == PROCESSOR_PENTIUMPRO)
165 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
166 #define TARGET_CMOVE (ix86_isa == PROCESSOR_PENTIUMPRO)
167 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
169 #define TARGET_SWITCHES \
170 { { "80387", MASK_80387 }, \
171 { "no-80387", -MASK_80387 }, \
172 { "hard-float", MASK_80387 }, \
173 { "soft-float", -MASK_80387 }, \
174 { "no-soft-float", MASK_80387 }, \
180 { "pentiumpro", 0 }, \
181 { "rtd", MASK_RTD }, \
182 { "no-rtd", -MASK_RTD }, \
183 { "align-double", MASK_ALIGN_DOUBLE }, \
184 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
185 { "svr3-shlib", MASK_SVR3_SHLIB }, \
186 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
187 { "ieee-fp", MASK_IEEE_FP }, \
188 { "no-ieee-fp", -MASK_IEEE_FP }, \
189 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
190 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
191 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
192 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
193 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
194 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
195 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
196 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
197 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
198 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
199 { "debug-addr", MASK_DEBUG_ADDR }, \
200 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
201 { "move", -MASK_NO_MOVE }, \
202 { "no-move", MASK_NO_MOVE }, \
203 { "debug-arg", MASK_DEBUG_ARG }, \
204 { "no-debug-arg", -MASK_DEBUG_ARG }, \
206 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
208 /* Which processor to schedule for. The cpu attribute defines a list that
209 mirrors this list, so changes to i386.md must be made at the same time. */
212 {PROCESSOR_I386
, /* 80386 */
213 PROCESSOR_I486
, /* 80486DX, 80486SX, 80486DX[24] */
215 PROCESSOR_PENTIUMPRO
};
217 #define PROCESSOR_I386_STRING "i386"
218 #define PROCESSOR_I486_STRING "i486"
219 #define PROCESSOR_I586_STRING "i586"
220 #define PROCESSOR_PENTIUM_STRING "pentium"
221 #define PROCESSOR_I686_STRING "i686"
222 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
224 extern enum processor_type ix86_cpu
;
228 /* Define generic processor types based upon current deployment. */
229 #define PROCESSOR_COMMON PROCESSOR_I386
230 #define PROCESSOR_COMMON_STRING PROCESSOR_I386_STRING
232 /* Define the default processor. This is overridden by other tm.h files. */
233 #define PROCESSOR_DEFAULT \
234 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
236 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
237 ? PROCESSOR_PENTIUM \
238 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
239 ? PROCESSOR_PENTIUMPRO \
241 #define PROCESSOR_DEFAULT_STRING \
242 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
243 ? PROCESSOR_I486_STRING \
244 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
245 ? PROCESSOR_PENTIUM_STRING \
246 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
247 ? PROCESSOR_PENTIUMPRO_STRING \
248 : PROCESSOR_I386_STRING
250 /* This macro is similar to `TARGET_SWITCHES' but defines names of
251 command options that have values. Its definition is an
252 initializer with a subgrouping for each command option.
254 Each subgrouping contains a string constant, that defines the
255 fixed part of the option name, and the address of a variable. The
256 variable, type `char *', is set to the variable part of the given
257 option if the fixed part matches. The actual option name is made
258 by appending `-m' to the specified name. */
259 #define TARGET_OPTIONS \
260 { { "cpu=", &ix86_cpu_string}, \
261 { "arch=", &ix86_isa_string}, \
262 { "reg-alloc=", &i386_reg_alloc_order }, \
263 { "regparm=", &i386_regparm_string }, \
264 { "align-loops=", &i386_align_loops_string }, \
265 { "align-jumps=", &i386_align_jumps_string }, \
266 { "align-functions=", &i386_align_funcs_string }, \
267 { "branch-cost=", &i386_branch_cost_string }, \
271 /* Sometimes certain combinations of command options do not make
272 sense on a particular target machine. You can define a macro
273 `OVERRIDE_OPTIONS' to take account of this. This macro, if
274 defined, is executed once just after all the command options have
277 Don't use this macro to turn on various extra optimizations for
278 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
280 #define OVERRIDE_OPTIONS override_options ()
282 /* These are meant to be redefined in the host dependent files */
283 #define SUBTARGET_SWITCHES
284 #define SUBTARGET_OPTIONS
286 /* Define this to change the optimizations performed by default. */
287 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
289 /* Specs for the compiler proper */
294 %{m386:-mcpu=i386 -march=i386} \
295 %{mno-486:-mcpu=i386 -march=i386} \
296 %{m486:-mcpu=i486 -march=i486} \
297 %{mno-386:-mcpu=i486 -march=i486} \
298 %{mno-pentium:-mcpu=i486 -march=i486} \
299 %{mpentium:-mcpu=pentium} \
300 %{mno-pentiumpro:-mcpu=pentium} \
301 %{mpentiumpro:-mcpu=pentiumpro}}"
304 /* target machine storage layout */
306 /* Define for XFmode extended real floating point support.
307 This will automatically cause REAL_ARITHMETIC to be defined. */
308 #define LONG_DOUBLE_TYPE_SIZE 96
310 /* Define if you don't want extended real, but do want to use the
311 software floating point emulator for REAL_ARITHMETIC and
312 decimal <-> binary conversion. */
313 /* #define REAL_ARITHMETIC */
315 /* Define this if most significant byte of a word is the lowest numbered. */
316 /* That is true on the 80386. */
318 #define BITS_BIG_ENDIAN 0
320 /* Define this if most significant byte of a word is the lowest numbered. */
321 /* That is not true on the 80386. */
322 #define BYTES_BIG_ENDIAN 0
324 /* Define this if most significant word of a multiword number is the lowest
326 /* Not true for 80386 */
327 #define WORDS_BIG_ENDIAN 0
329 /* number of bits in an addressable storage unit */
330 #define BITS_PER_UNIT 8
332 /* Width in bits of a "word", which is the contents of a machine register.
333 Note that this is not necessarily the width of data type `int';
334 if using 16-bit ints on a 80386, this would still be 32.
335 But on a machine with 16-bit registers, this would be 16. */
336 #define BITS_PER_WORD 32
338 /* Width of a word, in units (bytes). */
339 #define UNITS_PER_WORD 4
341 /* Width in bits of a pointer.
342 See also the macro `Pmode' defined below. */
343 #define POINTER_SIZE 32
345 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
346 #define PARM_BOUNDARY 32
348 /* Boundary (in *bits*) on which stack pointer should be aligned. */
349 #define STACK_BOUNDARY 32
351 /* Allocation boundary (in *bits*) for the code of a function.
352 For i486, we get better performance by aligning to a cache
353 line (i.e. 16 byte) boundary. */
354 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
356 /* Alignment of field after `int : 0' in a structure. */
358 #define EMPTY_FIELD_BOUNDARY 32
360 /* Minimum size in bits of the largest boundary to which any
361 and all fundamental data types supported by the hardware
362 might need to be aligned. No data type wants to be aligned
363 rounder than this. The i386 supports 64-bit floating point
364 quantities, but these can be aligned on any 32-bit boundary.
365 The published ABIs say that doubles should be aligned on word
366 boundaries, but the Pentium gets better performance with them
367 aligned on 64 bit boundaries. */
368 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
370 /* align DFmode constants and nonaggregates */
371 #define ALIGN_DFmode (!TARGET_386)
373 /* Set this non-zero if move instructions will actually fail to work
374 when given unaligned data. */
375 #define STRICT_ALIGNMENT 0
377 /* If bit field type is int, don't let it cross an int,
378 and give entire struct the alignment of an int. */
379 /* Required on the 386 since it doesn't have bitfield insns. */
380 #define PCC_BITFIELD_TYPE_MATTERS 1
382 /* Maximum power of 2 that code can be aligned to. */
383 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
385 /* Align loop starts for optimal branching. */
386 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
388 /* This is how to align an instruction for optimal branching.
389 On i486 we'll get better performance by aligning on a
390 cache line (i.e. 16 byte) boundary. */
391 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
394 /* Standard register usage. */
396 /* This processor has special stack-like registers. See reg-stack.c
400 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
402 /* Number of actual hardware registers.
403 The hardware registers are assigned numbers for the compiler
404 from 0 to just below FIRST_PSEUDO_REGISTER.
405 All registers that the compiler knows about must be given numbers,
406 even those that are not normally considered general registers.
408 In the 80386 we give the 8 general purpose registers the numbers 0-7.
409 We number the floating point registers 8-15.
410 Note that registers 0-7 can be accessed as a short or int,
411 while only 0-3 may be used with byte `mov' instructions.
413 Reg 16 does not correspond to any hardware register, but instead
414 appears in the RTL as an argument pointer prior to reload, and is
415 eliminated during reloading in favor of either the stack or frame
418 #define FIRST_PSEUDO_REGISTER 17
420 /* 1 for registers that have pervasive standard uses
421 and are not available for the register allocator.
422 On the 80386, the stack pointer is such, as is the arg pointer. */
423 #define FIXED_REGISTERS \
424 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
425 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
427 /* 1 for registers not available across function calls.
428 These must include the FIXED_REGISTERS and also any
429 registers that can be used without being saved.
430 The latter must include the registers where values are returned
431 and the register where structure-value addresses are passed.
432 Aside from that, you can include as many other registers as you like. */
434 #define CALL_USED_REGISTERS \
435 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
436 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
438 /* Order in which to allocate registers. Each register must be
439 listed once, even those in FIXED_REGISTERS. List frame pointer
440 late and fixed registers last. Note that, in general, we prefer
441 registers listed in CALL_USED_REGISTERS, keeping the others
442 available for storage of persistent values.
444 Three different versions of REG_ALLOC_ORDER have been tried:
446 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
447 but slower code on simple functions returning values in eax.
449 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
450 perl 4.036 due to not being able to create a DImode register (to hold a 2
453 If the order is eax, edx, ecx, ... it produces better code for simple
454 functions, and a slightly slower compiler. Users complained about the code
455 generated by allocating edx first, so restore the 'natural' order of things. */
457 #define REG_ALLOC_ORDER \
458 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
459 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
461 /* A C statement (sans semicolon) to choose the order in which to
462 allocate hard registers for pseudo-registers local to a basic
465 Store the desired register order in the array `reg_alloc_order'.
466 Element 0 should be the register to allocate first; element 1, the
467 next register; and so on.
469 The macro body should not assume anything about the contents of
470 `reg_alloc_order' before execution of the macro.
472 On most machines, it is not necessary to define this macro. */
474 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
476 /* Macro to conditionally modify fixed_regs/call_used_regs. */
477 #define CONDITIONAL_REGISTER_USAGE \
481 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
482 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
484 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
488 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
489 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
490 if (TEST_HARD_REG_BIT (x, i)) \
491 fixed_regs[i] = call_used_regs[i] = 1; \
495 /* Return number of consecutive hard regs needed starting at reg REGNO
496 to hold something of mode MODE.
497 This is ordinarily the length in words of a value of mode MODE
498 but can be less for certain modes in special long registers.
500 Actually there are no two word move instructions for consecutive
501 registers. And only registers 0-3 may have mov byte instructions
505 #define HARD_REGNO_NREGS(REGNO, MODE) \
506 (FP_REGNO_P (REGNO) ? 1 \
507 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
509 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
510 On the 80386, the first 4 cpu registers can hold any mode
511 while the floating point registers may hold only floating point.
512 Make it clear that the fp regs could not hold a 16-byte float. */
514 /* The casts to int placate a compiler on a microvax,
515 for cross-compiler testing. */
517 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
520 : FP_REGNO_P (REGNO) \
521 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
522 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
523 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
524 : (int) (MODE) != (int) QImode ? 1 \
525 : (reload_in_progress | reload_completed) == 1)
527 /* Value is 1 if it is a good idea to tie two pseudo registers
528 when one has mode MODE1 and one has mode MODE2.
529 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
530 for any hard reg, then this must be 0 for correct output. */
532 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
534 /* Specify the registers used for certain standard purposes.
535 The values of these macros are register numbers. */
537 /* on the 386 the pc register is %eip, and is not usable as a general
538 register. The ordinary mov instructions won't work */
539 /* #define PC_REGNUM */
541 /* Register to use for pushing function arguments. */
542 #define STACK_POINTER_REGNUM 7
544 /* Base register for access to local variables of the function. */
545 #define FRAME_POINTER_REGNUM 6
547 /* First floating point reg */
548 #define FIRST_FLOAT_REG 8
550 /* First & last stack-like regs */
551 #define FIRST_STACK_REG FIRST_FLOAT_REG
552 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
554 /* Value should be nonzero if functions must have frame pointers.
555 Zero means the frame pointer need not be set up (and parms
556 may be accessed via the stack pointer) in functions that seem suitable.
557 This is computed in `reload', in reload1.c. */
558 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
560 /* Base register for access to arguments of the function. */
561 #define ARG_POINTER_REGNUM 16
563 /* Register in which static-chain is passed to a function. */
564 #define STATIC_CHAIN_REGNUM 2
566 /* Register to hold the addressing base for position independent
567 code access to data items. */
568 #define PIC_OFFSET_TABLE_REGNUM 3
570 /* Register in which address to store a structure value
571 arrives in the function. On the 386, the prologue
572 copies this from the stack to register %eax. */
573 #define STRUCT_VALUE_INCOMING 0
575 /* Place in which caller passes the structure value address.
576 0 means push the value on the stack like an argument. */
577 #define STRUCT_VALUE 0
579 /* A C expression which can inhibit the returning of certain function
580 values in registers, based on the type of value. A nonzero value
581 says to return the function value in memory, just as large
582 structures are always returned. Here TYPE will be a C expression
583 of type `tree', representing the data type of the value.
585 Note that values of mode `BLKmode' must be explicitly handled by
586 this macro. Also, the option `-fpcc-struct-return' takes effect
587 regardless of this macro. On most systems, it is possible to
588 leave the macro undefined; this causes a default definition to be
589 used, whose value is the constant 1 for `BLKmode' values, and 0
592 Do not use this macro to indicate that structures and unions
593 should always be returned in memory. You should instead use
594 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
596 #define RETURN_IN_MEMORY(TYPE) \
597 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
600 /* Define the classes of registers for register constraints in the
601 machine description. Also define ranges of constants.
603 One of the classes must always be named ALL_REGS and include all hard regs.
604 If there is more than one class, another class must be named NO_REGS
605 and contain no registers.
607 The name GENERAL_REGS must be the name of a class (or an alias for
608 another name such as ALL_REGS). This is the class of registers
609 that is allowed by "g" or "r" in a register constraint.
610 Also, registers outside this class are allocated only when
611 instructions express preferences for them.
613 The classes must be numbered in nondecreasing order; that is,
614 a larger-numbered class must never be contained completely
615 in a smaller-numbered class.
617 For any two classes, it is very desirable that there be another
618 class that represents their union.
620 It might seem that class BREG is unnecessary, since no useful 386
621 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
622 and the "b" register constraint is useful in asms for syscalls. */
627 AREG
, DREG
, CREG
, BREG
,
628 AD_REGS
, /* %eax/%edx for DImode */
629 Q_REGS
, /* %eax %ebx %ecx %edx */
631 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
632 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
633 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
635 ALL_REGS
, LIM_REG_CLASSES
638 #define N_REG_CLASSES (int) LIM_REG_CLASSES
640 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
642 /* Give names of register classes as strings for dump file. */
644 #define REG_CLASS_NAMES \
646 "AREG", "DREG", "CREG", "BREG", \
652 "FP_TOP_REG", "FP_SECOND_REG", \
656 /* Define which registers fit in which classes.
657 This is an initializer for a vector of HARD_REG_SET
658 of length N_REG_CLASSES. */
660 #define REG_CLASS_CONTENTS \
662 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
665 0x10, 0x20, /* SIREG, DIREG */ \
666 0x7f, /* INDEX_REGS */ \
667 0x100ff, /* GENERAL_REGS */ \
668 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
669 0xff00, /* FLOAT_REGS */ \
672 /* The same information, inverted:
673 Return the class number of the smallest class containing
674 reg number REGNO. This could be a conditional expression
675 or could index an array. */
677 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
679 /* When defined, the compiler allows registers explicitly used in the
680 rtl to be used as spill registers but prevents the compiler from
681 extending the lifetime of these registers. */
683 #define SMALL_REGISTER_CLASSES
685 #define QI_REG_P(X) \
686 (REG_P (X) && REGNO (X) < 4)
687 #define NON_QI_REG_P(X) \
688 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
690 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
691 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
693 #define STACK_REG_P(xop) (REG_P (xop) && \
694 REGNO (xop) >= FIRST_STACK_REG && \
695 REGNO (xop) <= LAST_STACK_REG)
697 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
699 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
701 /* Try to maintain the accuracy of the death notes for regs satisfying the
702 following. Important for stack like regs, to know when to pop. */
704 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
706 /* 1 if register REGNO can magically overlap other regs.
707 Note that nonzero values work only in very special circumstances. */
709 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
711 /* The class value for index registers, and the one for base regs. */
713 #define INDEX_REG_CLASS INDEX_REGS
714 #define BASE_REG_CLASS GENERAL_REGS
716 /* Get reg_class from a letter such as appears in the machine description. */
718 #define REG_CLASS_FROM_LETTER(C) \
719 ((C) == 'r' ? GENERAL_REGS : \
720 (C) == 'q' ? Q_REGS : \
721 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
724 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
727 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
730 (C) == 'a' ? AREG : \
731 (C) == 'b' ? BREG : \
732 (C) == 'c' ? CREG : \
733 (C) == 'd' ? DREG : \
734 (C) == 'A' ? AD_REGS : \
735 (C) == 'D' ? DIREG : \
736 (C) == 'S' ? SIREG : NO_REGS)
738 /* The letters I, J, K, L and M in a register constraint string
739 can be used to stand for particular ranges of immediate operands.
740 This macro defines what the ranges are.
741 C is the letter, and VALUE is a constant value.
742 Return 1 if VALUE is in the range specified by C.
744 I is for non-DImode shifts.
745 J is for DImode shifts.
746 K and L are for an `andsi' optimization.
747 M is for shifts that can be executed by the "lea" opcode.
750 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
751 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
752 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
753 (C) == 'K' ? (VALUE) == 0xff : \
754 (C) == 'L' ? (VALUE) == 0xffff : \
755 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
756 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
757 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
760 /* Similar, but for floating constants, and defining letters G and H.
761 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
762 TARGET_387 isn't set, because the stack register converter may need to
763 load 0.0 into the function value register. */
765 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
766 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
768 /* Place additional restrictions on the register class to use when it
769 is necessary to be able to hold a value of mode MODE in a reload
770 register for which class CLASS would ordinarily be used. */
772 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
773 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
776 /* Given an rtx X being reloaded into a reg required to be
777 in class CLASS, return the class of reg to actually use.
778 In general this is just CLASS; but on some machines
779 in some cases it is preferable to use a more restrictive class.
780 On the 80386 series, we prevent floating constants from being
781 reloaded into floating registers (since no move-insn can do that)
782 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
784 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
785 QImode must go into class Q_REGS.
786 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
787 movdf to do mem-to-mem moves through integer regs. */
789 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
790 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
791 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
792 : ((CLASS) == ALL_REGS \
793 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
796 /* If we are copying between general and FP registers, we need a memory
799 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
800 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
801 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
803 /* Return the maximum number of consecutive registers
804 needed to represent mode MODE in a register of class CLASS. */
805 /* On the 80386, this is the size of MODE in words,
806 except in the FP regs, where a single reg is always enough. */
807 #define CLASS_MAX_NREGS(CLASS, MODE) \
808 (FLOAT_CLASS_P (CLASS) ? 1 : \
809 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
811 /* A C expression whose value is nonzero if pseudos that have been
812 assigned to registers of class CLASS would likely be spilled
813 because registers of CLASS are needed for spill registers.
815 The default value of this macro returns 1 if CLASS has exactly one
816 register and zero otherwise. On most machines, this default
817 should be used. Only define this macro to some other expression
818 if pseudo allocated by `local-alloc.c' end up in memory because
819 their hard registers were needed for spill registers. If this
820 macro returns nonzero for those classes, those pseudos will only
821 be allocated by `global.c', which knows how to reallocate the
822 pseudo to another register. If there would not be another
823 register available for reallocation, you should not change the
824 definition of this macro since the only effect of such a
825 definition would be to slow down register allocation. */
827 #define CLASS_LIKELY_SPILLED_P(CLASS) \
829 || ((CLASS) == DREG) \
830 || ((CLASS) == CREG) \
831 || ((CLASS) == BREG) \
832 || ((CLASS) == AD_REGS) \
833 || ((CLASS) == SIREG) \
834 || ((CLASS) == DIREG))
837 /* Stack layout; function entry, exit and calling. */
839 /* Define this if pushing a word on the stack
840 makes the stack pointer a smaller address. */
841 #define STACK_GROWS_DOWNWARD
843 /* Define this if the nominal address of the stack frame
844 is at the high-address end of the local variables;
845 that is, each additional local variable allocated
846 goes at a more negative offset in the frame. */
847 #define FRAME_GROWS_DOWNWARD
849 /* Offset within stack frame to start allocating local variables at.
850 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
851 first local allocated. Otherwise, it is the offset to the BEGINNING
852 of the first local allocated. */
853 #define STARTING_FRAME_OFFSET 0
855 /* If we generate an insn to push BYTES bytes,
856 this says how many the stack pointer really advances by.
857 On 386 pushw decrements by exactly 2 no matter what the position was.
858 On the 386 there is no pushb; we use pushw instead, and this
859 has the effect of rounding up to 2. */
861 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
863 /* Offset of first parameter from the argument pointer register value. */
864 #define FIRST_PARM_OFFSET(FNDECL) 0
866 /* Value is the number of bytes of arguments automatically
867 popped when returning from a subroutine call.
868 FUNDECL is the declaration node of the function (as a tree),
869 FUNTYPE is the data type of the function (as a tree),
870 or for a library call it is an identifier node for the subroutine name.
871 SIZE is the number of bytes of arguments passed on the stack.
873 On the 80386, the RTD insn may be used to pop them if the number
874 of args is fixed, but if the number is variable then the caller
875 must pop them all. RTD can't be used for library calls now
876 because the library is compiled with the Unix compiler.
877 Use of RTD is a selectable option, since it is incompatible with
878 standard Unix calling sequences. If the option is not selected,
879 the caller must always pop the args.
881 The attribute stdcall is equivalent to RTD on a per module basis. */
883 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
884 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
886 /* Define how to find the value returned by a function.
887 VALTYPE is the data type of the value (as a tree).
888 If the precise function being called is known, FUNC is its FUNCTION_DECL;
889 otherwise, FUNC is 0. */
890 #define FUNCTION_VALUE(VALTYPE, FUNC) \
891 gen_rtx (REG, TYPE_MODE (VALTYPE), \
892 VALUE_REGNO (TYPE_MODE (VALTYPE)))
894 /* Define how to find the value returned by a library function
895 assuming the value has mode MODE. */
897 #define LIBCALL_VALUE(MODE) \
898 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
900 /* Define the size of the result block used for communication between
901 untyped_call and untyped_return. The block contains a DImode value
902 followed by the block used by fnsave and frstor. */
904 #define APPLY_RESULT_SIZE (8+108)
906 /* 1 if N is a possible register number for function argument passing. */
907 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
909 /* Define a data type for recording info about an argument list
910 during the scan of that argument list. This data type should
911 hold all necessary information about the function itself
912 and about the args processed so far, enough to enable macros
913 such as FUNCTION_ARG to determine where the next arg should go. */
915 typedef struct i386_args
{
916 int words
; /* # words passed so far */
917 int nregs
; /* # registers available for passing */
918 int regno
; /* next available register number */
921 /* Initialize a variable CUM of type CUMULATIVE_ARGS
922 for a call to a function whose data type is FNTYPE.
923 For a library call, FNTYPE is 0. */
925 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
926 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
928 /* Update the data in CUM to advance over an argument
929 of mode MODE and data type TYPE.
930 (TYPE is null for libcalls where that information may not be available.) */
932 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
933 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
935 /* Define where to put the arguments to a function.
936 Value is zero to push the argument on the stack,
937 or a hard register in which to store the argument.
939 MODE is the argument's machine mode.
940 TYPE is the data type of the argument (as a tree).
941 This is null for libcalls where that information may
943 CUM is a variable of type CUMULATIVE_ARGS which gives info about
944 the preceding args and about the function being called.
945 NAMED is nonzero if this argument is a named parameter
946 (otherwise it is an extra parameter matching an ellipsis). */
948 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
949 (function_arg (&CUM, MODE, TYPE, NAMED))
951 /* For an arg passed partly in registers and partly in memory,
952 this is the number of registers used.
953 For args passed entirely in registers or entirely in memory, zero. */
955 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
956 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
958 /* This macro is invoked just before the start of a function.
959 It is used here to output code for -fpic that will load the
960 return address into %ebx. */
962 #undef ASM_OUTPUT_FUNCTION_PREFIX
963 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
964 asm_output_function_prefix (FILE, FNNAME)
966 /* This macro generates the assembly code for function entry.
967 FILE is a stdio stream to output the code to.
968 SIZE is an int: how many units of temporary storage to allocate.
969 Refer to the array `regs_ever_live' to determine which registers
970 to save; `regs_ever_live[I]' is nonzero if register number I
971 is ever used in the function. This macro is responsible for
972 knowing which registers should not be saved even if used. */
974 #define FUNCTION_PROLOGUE(FILE, SIZE) \
975 function_prologue (FILE, SIZE)
977 /* Output assembler code to FILE to increment profiler label # LABELNO
978 for profiling a function entry. */
980 #define FUNCTION_PROFILER(FILE, LABELNO) \
984 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
985 LPREFIX, (LABELNO)); \
986 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
990 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
991 fprintf (FILE, "\tcall _mcount\n"); \
996 /* There are three profiling modes for basic blocks available.
997 The modes are selected at compile time by using the options
998 -a or -ax of the gnu compiler.
999 The variable `profile_block_flag' will be set according to the
1002 profile_block_flag == 0, no option used:
1006 profile_block_flag == 1, -a option used.
1008 Count frequency of execution of every basic block.
1010 profile_block_flag == 2, -ax option used.
1012 Generate code to allow several different profiling modes at run time.
1013 Available modes are:
1014 Produce a trace of all basic blocks.
1015 Count frequency of jump instructions executed.
1016 In every mode it is possible to start profiling upon entering
1017 certain functions and to disable profiling of some other functions.
1019 The result of basic-block profiling will be written to a file `bb.out'.
1020 If the -ax option is used parameters for the profiling will be read
1025 /* The following macro shall output assembler code to FILE
1026 to initialize basic-block profiling.
1028 If profile_block_flag == 2
1030 Output code to call the subroutine `__bb_init_trace_func'
1031 and pass two parameters to it. The first parameter is
1032 the address of a block allocated in the object module.
1033 The second parameter is the number of the first basic block
1036 The name of the block is a local symbol made with this statement:
1038 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1040 Of course, since you are writing the definition of
1041 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1042 can take a short cut in the definition of this macro and use the
1043 name that you know will result.
1045 The number of the first basic block of the function is
1046 passed to the macro in BLOCK_OR_LABEL.
1048 If described in a virtual assembler language the code to be
1052 parameter2 <- BLOCK_OR_LABEL
1053 call __bb_init_trace_func
1055 else if profile_block_flag != 0
1057 Output code to call the subroutine `__bb_init_func'
1058 and pass one single parameter to it, which is the same
1059 as the first parameter to `__bb_init_trace_func'.
1061 The first word of this parameter is a flag which will be nonzero if
1062 the object module has already been initialized. So test this word
1063 first, and do not call `__bb_init_func' if the flag is nonzero.
1064 Note: When profile_block_flag == 2 the test need not be done
1065 but `__bb_init_trace_func' *must* be called.
1067 BLOCK_OR_LABEL may be used to generate a label number as a
1068 branch destination in case `__bb_init_func' will not be called.
1070 If described in a virtual assembler language the code to be
1081 #undef FUNCTION_BLOCK_PROFILER
1082 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1085 static int num_func = 0; \
1087 char block_table[80], false_label[80]; \
1089 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1091 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1092 xops[5] = stack_pointer_rtx; \
1093 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1095 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1097 switch (profile_block_flag) \
1102 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1103 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1104 xops[6] = GEN_INT (8); \
1106 output_asm_insn (AS1(push%L2,%2), xops); \
1108 output_asm_insn (AS1(push%L1,%1), xops); \
1111 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1112 output_asm_insn (AS1 (push%L7,%7), xops); \
1115 output_asm_insn (AS1(call,%P3), xops); \
1116 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1122 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1124 xops[0] = const0_rtx; \
1125 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1126 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1127 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1128 xops[6] = GEN_INT (4); \
1130 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1132 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1133 output_asm_insn (AS1(jne,%2), xops); \
1136 output_asm_insn (AS1(push%L1,%1), xops); \
1139 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1140 output_asm_insn (AS1 (push%L7,%7), xops); \
1143 output_asm_insn (AS1(call,%P3), xops); \
1144 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1145 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1154 /* The following macro shall output assembler code to FILE
1155 to increment a counter associated with basic block number BLOCKNO.
1157 If profile_block_flag == 2
1159 Output code to initialize the global structure `__bb' and
1160 call the function `__bb_trace_func' which will increment the
1163 `__bb' consists of two words. In the first word the number
1164 of the basic block has to be stored. In the second word
1165 the address of a block allocated in the object module
1168 The basic block number is given by BLOCKNO.
1170 The address of the block is given by the label created with
1172 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1174 by FUNCTION_BLOCK_PROFILER.
1176 Of course, since you are writing the definition of
1177 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1178 can take a short cut in the definition of this macro and use the
1179 name that you know will result.
1181 If described in a virtual assembler language the code to be
1184 move BLOCKNO -> (__bb)
1185 move LPBX0 -> (__bb+4)
1186 call __bb_trace_func
1188 Note that function `__bb_trace_func' must not change the
1189 machine state, especially the flag register. To grant
1190 this, you must output code to save and restore registers
1191 either in this macro or in the macros MACHINE_STATE_SAVE
1192 and MACHINE_STATE_RESTORE. The last two macros will be
1193 used in the function `__bb_trace_func', so you must make
1194 sure that the function prologue does not change any
1195 register prior to saving it with MACHINE_STATE_SAVE.
1197 else if profile_block_flag != 0
1199 Output code to increment the counter directly.
1200 Basic blocks are numbered separately from zero within each
1201 compiled object module. The count associated with block number
1202 BLOCKNO is at index BLOCKNO in an array of words; the name of
1203 this array is a local symbol made with this statement:
1205 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1207 Of course, since you are writing the definition of
1208 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1209 can take a short cut in the definition of this macro and use the
1210 name that you know will result.
1212 If described in a virtual assembler language the code to be
1215 inc (LPBX2+4*BLOCKNO)
1219 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1222 rtx xops[8], cnt_rtx; \
1224 char *block_table = counts; \
1226 switch (profile_block_flag) \
1231 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1233 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1234 xops[2] = GEN_INT ((BLOCKNO)); \
1235 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1236 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1237 xops[5] = plus_constant (xops[4], 4); \
1238 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1239 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1241 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1243 fprintf(FILE, "\tpushf\n"); \
1244 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1247 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1248 output_asm_insn (AS1(push%L7,%7), xops); \
1249 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1250 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1251 output_asm_insn (AS1(pop%L7,%7), xops); \
1254 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1255 output_asm_insn (AS1(call,%P3), xops); \
1256 fprintf(FILE, "\tpopf\n"); \
1262 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1263 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1264 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1267 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1270 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1272 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1273 output_asm_insn (AS1(inc%L0,%0), xops); \
1281 /* The following macro shall output assembler code to FILE
1282 to indicate a return from function during basic-block profiling.
1284 If profiling_block_flag == 2:
1286 Output assembler code to call function `__bb_trace_ret'.
1288 Note that function `__bb_trace_ret' must not change the
1289 machine state, especially the flag register. To grant
1290 this, you must output code to save and restore registers
1291 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1292 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1293 used in the function `__bb_trace_ret', so you must make
1294 sure that the function prologue does not change any
1295 register prior to saving it with MACHINE_STATE_SAVE_RET.
1297 else if profiling_block_flag != 0:
1299 The macro will not be used, so it need not distinguish
1303 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1308 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1310 output_asm_insn (AS1(call,%P0), xops); \
1315 /* The function `__bb_trace_func' is called in every basic block
1316 and is not allowed to change the machine state. Saving (restoring)
1317 the state can either be done in the BLOCK_PROFILER macro,
1318 before calling function (rsp. after returning from function)
1319 `__bb_trace_func', or it can be done inside the function by
1320 defining the macros:
1322 MACHINE_STATE_SAVE(ID)
1323 MACHINE_STATE_RESTORE(ID)
1325 In the latter case care must be taken, that the prologue code
1326 of function `__bb_trace_func' does not already change the
1327 state prior to saving it with MACHINE_STATE_SAVE.
1329 The parameter `ID' is a string identifying a unique macro use.
1331 On the i386 the initialization code at the begin of
1332 function `__bb_trace_func' contains a `sub' instruction
1333 therefore we handle save and restore of the flag register
1334 in the BLOCK_PROFILER macro. */
1336 #define MACHINE_STATE_SAVE(ID) \
1337 asm (" pushl %eax"); \
1338 asm (" pushl %ecx"); \
1339 asm (" pushl %edx"); \
1340 asm (" pushl %esi");
1342 #define MACHINE_STATE_RESTORE(ID) \
1343 asm (" popl %esi"); \
1344 asm (" popl %edx"); \
1345 asm (" popl %ecx"); \
1348 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1349 the stack pointer does not matter. The value is tested only in
1350 functions that have frame pointers.
1351 No definition is equivalent to always zero. */
1352 /* Note on the 386 it might be more efficient not to define this since
1353 we have to restore it ourselves from the frame pointer, in order to
1356 #define EXIT_IGNORE_STACK 1
1358 /* This macro generates the assembly code for function exit,
1359 on machines that need it. If FUNCTION_EPILOGUE is not defined
1360 then individual return instructions are generated for each
1361 return statement. Args are same as for FUNCTION_PROLOGUE.
1363 The function epilogue should not depend on the current stack pointer!
1364 It should use the frame pointer only. This is mandatory because
1365 of alloca; we also take advantage of it to omit stack adjustments
1368 If the last non-note insn in the function is a BARRIER, then there
1369 is no need to emit a function prologue, because control does not fall
1370 off the end. This happens if the function ends in an "exit" call, or
1371 if a `return' insn is emitted directly into the function. */
1374 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1376 rtx last = get_last_insn (); \
1377 if (last && GET_CODE (last) == NOTE) \
1378 last = prev_nonnote_insn (last); \
1379 /* if (! last || GET_CODE (last) != BARRIER) \
1380 function_epilogue (FILE, SIZE);*/ \
1384 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1385 function_epilogue (FILE, SIZE)
1387 /* Output assembler code for a block containing the constant parts
1388 of a trampoline, leaving space for the variable parts. */
1390 /* On the 386, the trampoline contains three instructions:
1394 #define TRAMPOLINE_TEMPLATE(FILE) \
1396 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1397 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1398 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1399 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1400 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1401 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1402 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1403 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1406 /* Length in units of the trampoline for entering a nested function. */
1408 #define TRAMPOLINE_SIZE 12
1410 /* Emit RTL insns to initialize the variable parts of a trampoline.
1411 FNADDR is an RTX for the address of the function's pure code.
1412 CXT is an RTX for the static chain value for the function. */
1414 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1416 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1417 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1420 /* Definitions for register eliminations.
1422 This is an array of structures. Each structure initializes one pair
1423 of eliminable registers. The "from" register number is given first,
1424 followed by "to". Eliminations of the same "from" register are listed
1425 in order of preference.
1427 We have two registers that can be eliminated on the i386. First, the
1428 frame pointer register can often be eliminated in favor of the stack
1429 pointer register. Secondly, the argument pointer register can always be
1430 eliminated; it is replaced with either the stack or frame pointer. */
1432 #define ELIMINABLE_REGS \
1433 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1434 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1435 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1437 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1438 Frame pointer elimination is automatically handled.
1440 For the i386, if frame pointer elimination is being done, we would like to
1441 convert ap into sp, not fp.
1443 All other eliminations are valid. */
1445 #define CAN_ELIMINATE(FROM, TO) \
1446 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1447 ? ! frame_pointer_needed \
1450 /* Define the offset between two registers, one to be eliminated, and the other
1451 its replacement, at the start of a routine. */
1453 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1455 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1456 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1462 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1463 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1464 || (current_function_uses_pic_offset_table \
1465 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1468 (OFFSET) = offset + get_frame_size (); \
1470 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1471 (OFFSET) += 4; /* Skip saved PC */ \
1475 /* Addressing modes, and classification of registers for them. */
1477 /* #define HAVE_POST_INCREMENT */
1478 /* #define HAVE_POST_DECREMENT */
1480 /* #define HAVE_PRE_DECREMENT */
1481 /* #define HAVE_PRE_INCREMENT */
1483 /* Macros to check register numbers against specific register classes. */
1485 /* These assume that REGNO is a hard or pseudo reg number.
1486 They give nonzero only if REGNO is a hard reg of the suitable class
1487 or a pseudo reg currently allocated to a suitable hard reg.
1488 Since they use reg_renumber, they are safe only once reg_renumber
1489 has been allocated, which happens in local-alloc.c. */
1491 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1492 ((REGNO) < STACK_POINTER_REGNUM \
1493 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1495 #define REGNO_OK_FOR_BASE_P(REGNO) \
1496 ((REGNO) <= STACK_POINTER_REGNUM \
1497 || (REGNO) == ARG_POINTER_REGNUM \
1498 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1500 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1501 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1503 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1504 and check its validity for a certain class.
1505 We have two alternate definitions for each of them.
1506 The usual definition accepts all pseudo regs; the other rejects
1507 them unless they have been allocated suitable hard regs.
1508 The symbol REG_OK_STRICT causes the latter definition to be used.
1510 Most source files want to accept pseudo regs in the hope that
1511 they will get allocated to the class that the insn wants them to be in.
1512 Source files for reload pass need to be strict.
1513 After reload, it makes no difference, since pseudo regs have
1514 been eliminated by then. */
1517 /* Non strict versions, pseudos are ok */
1518 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1519 (REGNO (X) < STACK_POINTER_REGNUM \
1520 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1522 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1523 (REGNO (X) <= STACK_POINTER_REGNUM \
1524 || REGNO (X) == ARG_POINTER_REGNUM \
1525 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1527 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1528 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1530 /* Strict versions, hard registers only */
1531 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1532 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1533 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1534 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1536 #ifndef REG_OK_STRICT
1537 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1538 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1539 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1542 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1543 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1544 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1547 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1548 that is a valid memory address for an instruction.
1549 The MODE argument is the machine mode for the MEM expression
1550 that wants to use this address.
1552 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1553 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1555 See legitimize_pic_address in i386.c for details as to what
1556 constitutes a legitimate address when -fpic is used. */
1558 #define MAX_REGS_PER_ADDRESS 2
1560 #define CONSTANT_ADDRESS_P(X) \
1561 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1562 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1563 || GET_CODE (X) == HIGH)
1565 /* Nonzero if the constant value X is a legitimate general operand.
1566 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1568 #define LEGITIMATE_CONSTANT_P(X) 1
1570 #ifdef REG_OK_STRICT
1571 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1573 if (legitimate_address_p (MODE, X, 1)) \
1578 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1580 if (legitimate_address_p (MODE, X, 0)) \
1586 /* Try machine-dependent ways of modifying an illegitimate address
1587 to be legitimate. If we find one, return the new, valid address.
1588 This macro is used in only one place: `memory_address' in explow.c.
1590 OLDX is the address as it was before break_out_memory_refs was called.
1591 In some cases it is useful to look at this to decide what needs to be done.
1593 MODE and WIN are passed so that this macro can use
1594 GO_IF_LEGITIMATE_ADDRESS.
1596 It is always safe for this macro to do nothing. It exists to recognize
1597 opportunities to optimize the output.
1599 For the 80386, we handle X+REG by loading X into a register R and
1600 using R+REG. R will go in a general reg and indexing will be used.
1601 However, if REG is a broken-out memory address or multiplication,
1602 nothing needs to be done because REG can certainly go in a general reg.
1604 When -fpic is used, special handling is needed for symbolic references.
1605 See comments by legitimize_pic_address in i386.c for details. */
1607 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1610 (X) = legitimize_address (X, OLDX, MODE); \
1611 if (memory_address_p (MODE, X)) \
1615 #define REWRITE_ADDRESS(x) rewrite_address(x)
1617 /* Nonzero if the constant value X is a legitimate general operand
1618 when generating PIC code. It is given that flag_pic is on and
1619 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1621 #define LEGITIMATE_PIC_OPERAND_P(X) \
1622 (! SYMBOLIC_CONST (X) \
1623 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1625 #define SYMBOLIC_CONST(X) \
1626 (GET_CODE (X) == SYMBOL_REF \
1627 || GET_CODE (X) == LABEL_REF \
1628 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1630 /* Go to LABEL if ADDR (a legitimate address expression)
1631 has an effect that depends on the machine mode it is used for.
1632 On the 80386, only postdecrement and postincrement address depend thus
1633 (the amount of decrement or increment being the length of the operand). */
1634 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1635 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1637 /* Define this macro if references to a symbol must be treated
1638 differently depending on something about the variable or
1639 function named by the symbol (such as what section it is in).
1641 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1642 so that we may access it directly in the GOT. */
1644 #define ENCODE_SECTION_INFO(DECL) \
1649 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1650 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1652 if (TARGET_DEBUG_ADDR \
1653 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1655 fprintf (stderr, "Encode %s, public = %s\n", \
1656 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1657 TREE_PUBLIC (DECL)); \
1660 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1661 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1662 || ! TREE_PUBLIC (DECL)); \
1667 /* Initialize data used by insn expanders. This is called from
1668 init_emit, once for each function, before code is generated.
1669 For 386, clear stack slot assignments remembered from previous
1672 #define INIT_EXPANDERS clear_386_stack_locals ()
1674 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1675 codes once the function is being compiled into assembly code, but
1676 not before. (It is not done before, because in the case of
1677 compiling an inline function, it would lead to multiple PIC
1678 prologues being included in functions which used inline functions
1679 and were compiled to assembly language.) */
1681 #define FINALIZE_PIC \
1684 extern int current_function_uses_pic_offset_table; \
1686 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1691 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1692 with arguments ARGS is a valid machine specific attribute for DECL.
1693 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1695 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1696 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1698 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1699 with arguments ARGS is a valid machine specific attribute for TYPE.
1700 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1702 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1703 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1705 /* If defined, a C expression whose value is zero if the attributes on
1706 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1707 two if they are nearly compatible (which causes a warning to be
1710 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1711 (i386_comp_type_attributes (TYPE1, TYPE2))
1713 /* If defined, a C statement that assigns default attributes to newly
1716 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1718 /* Max number of args passed in registers. If this is more than 3, we will
1719 have problems with ebx (register #4), since it is a caller save register and
1720 is also used as the pic register in ELF. So for now, don't allow more than
1721 3 registers to be passed in registers. */
1723 #define REGPARM_MAX 3
1726 /* Specify the machine mode that this machine uses
1727 for the index in the tablejump instruction. */
1728 #define CASE_VECTOR_MODE Pmode
1730 /* Define this if the tablejump instruction expects the table
1731 to contain offsets from the address of the table.
1732 Do not define this if the table should contain absolute addresses. */
1733 /* #define CASE_VECTOR_PC_RELATIVE */
1735 /* Specify the tree operation to be used to convert reals to integers.
1736 This should be changed to take advantage of fist --wfs ??
1738 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1740 /* This is the kind of divide that is easiest to do in the general case. */
1741 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1743 /* Define this as 1 if `char' should by default be signed; else as 0. */
1744 #define DEFAULT_SIGNED_CHAR 1
1746 /* Max number of bytes we can move from memory to memory
1747 in one reasonably fast instruction. */
1750 /* The number of scalar move insns which should be generated instead
1751 of a string move insn or a library call. Increasing the value
1752 will always make code faster, but eventually incurs high cost in
1753 increased code size.
1755 If you don't define this, a reasonable default is used.
1757 Make this large on i386, since the block move is very inefficient with small
1758 blocks, and the hard register needs of the block move require much reload
1761 #define MOVE_RATIO 5
1763 /* Define if shifts truncate the shift count
1764 which implies one can omit a sign-extension or zero-extension
1765 of a shift count. */
1766 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1768 /* #define SHIFT_COUNT_TRUNCATED */
1770 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1771 is done just by pretending it is already truncated. */
1772 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1774 /* We assume that the store-condition-codes instructions store 0 for false
1775 and some other value for true. This is the value stored for true. */
1777 #define STORE_FLAG_VALUE 1
1779 /* When a prototype says `char' or `short', really pass an `int'.
1780 (The 386 can't easily push less than an int.) */
1782 #define PROMOTE_PROTOTYPES
1784 /* Specify the machine mode that pointers have.
1785 After generation of rtl, the compiler makes no further distinction
1786 between pointers and any other objects of this machine mode. */
1787 #define Pmode SImode
1789 /* A function address in a call instruction
1790 is a byte address (for indexing purposes)
1791 so give the MEM rtx a byte's mode. */
1792 #define FUNCTION_MODE QImode
1794 /* A part of a C `switch' statement that describes the relative costs
1795 of constant RTL expressions. It must contain `case' labels for
1796 expression codes `const_int', `const', `symbol_ref', `label_ref'
1797 and `const_double'. Each case must ultimately reach a `return'
1798 statement to return the relative cost of the use of that kind of
1799 constant value in an expression. The cost may depend on the
1800 precise value of the constant, which is available for examination
1801 in X, and the rtx code of the expression in which it is contained,
1802 found in OUTER_CODE.
1804 CODE is the expression code--redundant, since it can be obtained
1805 with `GET_CODE (X)'. */
1807 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1812 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1814 case CONST_DOUBLE: \
1817 if (GET_MODE (RTX) == VOIDmode) \
1820 code = standard_80387_constant_p (RTX); \
1821 return code == 1 ? 0 : \
1826 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1827 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1829 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1830 This can be used, for example, to indicate how costly a multiply
1831 instruction is. In writing this macro, you can use the construct
1832 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1833 instructions. OUTER_CODE is the code of the expression in which X
1836 This macro is optional; do not define it if the default cost
1837 assumptions are adequate for the target machine. */
1839 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1841 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1842 && GET_MODE (XEXP (X, 0)) == SImode) \
1844 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1847 return COSTS_N_INSNS (ix86_cost->add) \
1848 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1850 if (value == 2 || value == 3) \
1851 return COSTS_N_INSNS (ix86_cost->lea) \
1852 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1854 /* fall through */ \
1860 if (GET_MODE (XEXP (X, 0)) == DImode) \
1862 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1863 if (INTVAL (XEXP (X, 1)) > 32) \
1864 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1866 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1867 return ((GET_CODE (XEXP (X, 1)) == AND \
1868 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1869 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1870 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1872 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1873 ? ix86_cost->shift_const \
1874 : ix86_cost->shift_var) \
1875 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1878 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1880 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1884 return COSTS_N_INSNS (ix86_cost->add) \
1885 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1886 if (value == 4 || value == 8) \
1887 return COSTS_N_INSNS (ix86_cost->lea) \
1888 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1890 while (value != 0) \
1897 return COSTS_N_INSNS (ix86_cost->shift_const) \
1898 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1900 return COSTS_N_INSNS (ix86_cost->mult_init \
1901 + nbits * ix86_cost->mult_bit) \
1902 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1905 else /* This is arbitrary */ \
1906 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1907 + 7 * ix86_cost->mult_bit); \
1913 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1916 if (GET_CODE (XEXP (X, 0)) == REG \
1917 && GET_MODE (XEXP (X, 0)) == SImode \
1918 && GET_CODE (XEXP (X, 1)) == PLUS) \
1919 return COSTS_N_INSNS (ix86_cost->lea); \
1921 /* fall through */ \
1926 if (GET_MODE (X) == DImode) \
1927 return COSTS_N_INSNS (ix86_cost->add) * 2 \
1928 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1929 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1930 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1931 << (GET_MODE (XEXP (X, 1)) != DImode)); \
1934 if (GET_MODE (X) == DImode) \
1935 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
1936 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
1939 /* An expression giving the cost of an addressing mode that contains
1940 ADDRESS. If not defined, the cost is computed from the ADDRESS
1941 expression and the `CONST_COSTS' values.
1943 For most CISC machines, the default cost is a good approximation
1944 of the true cost of the addressing mode. However, on RISC
1945 machines, all instructions normally have the same length and
1946 execution time. Hence all addresses will have equal costs.
1948 In cases where more than one form of an address is known, the form
1949 with the lowest cost will be used. If multiple forms have the
1950 same, lowest, cost, the one that is the most complex will be used.
1952 For example, suppose an address that is equal to the sum of a
1953 register and a constant is used twice in the same basic block.
1954 When this macro is not defined, the address will be computed in a
1955 register and memory references will be indirect through that
1956 register. On machines where the cost of the addressing mode
1957 containing the sum is no higher than that of a simple indirect
1958 reference, this will produce an additional instruction and
1959 possibly require an additional register. Proper specification of
1960 this macro eliminates this overhead for such machines.
1962 Similar use of this macro is made in strength reduction of loops.
1964 ADDRESS need not be valid as an address. In such a case, the cost
1965 is not relevant and can be any value; invalid addresses need not be
1966 assigned a different cost.
1968 On machines where an address involving more than one register is as
1969 cheap as an address computation involving only one register,
1970 defining `ADDRESS_COST' to reflect this can cause two registers to
1971 be live over a region of code where only one would have been if
1972 `ADDRESS_COST' were not defined in that manner. This effect should
1973 be considered in the definition of this macro. Equivalent costs
1974 should probably only be given to addresses with different numbers
1975 of registers on machines with lots of registers.
1977 This macro will normally either not be defined or be defined as a
1980 For i386, it is better to use a complex address than let gcc copy
1981 the address into a reg and make a new pseudo. But not if the address
1982 requires to two regs - that would mean more pseudos with longer
1985 #define ADDRESS_COST(RTX) \
1986 ((CONSTANT_P (RTX) \
1987 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1988 && REG_P (XEXP (RTX, 0)))) ? 0 \
1992 /* A C expression for the cost of moving data of mode M between a
1993 register and memory. A value of 2 is the default; this cost is
1994 relative to those in `REGISTER_MOVE_COST'.
1996 If moving between registers and memory is more expensive than
1997 between two registers, you should define this macro to express the
2000 On the i386, copying between floating-point and fixed-point
2001 registers is expensive. */
2003 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2004 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2005 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2009 /* A C expression for the cost of moving data of mode M between a
2010 register and memory. A value of 2 is the default; this cost is
2011 relative to those in `REGISTER_MOVE_COST'.
2013 If moving between registers and memory is more expensive than
2014 between two registers, you should define this macro to express the
2017 /* #define MEMORY_MOVE_COST(M) 2 */
2019 /* A C expression for the cost of a branch instruction. A value of 1
2020 is the default; other values are interpreted relative to that. */
2022 #define BRANCH_COST i386_branch_cost
2024 /* Define this macro as a C expression which is nonzero if accessing
2025 less than a word of memory (i.e. a `char' or a `short') is no
2026 faster than accessing a word of memory, i.e., if such access
2027 require more than one instruction or if there is no difference in
2028 cost between byte and (aligned) word loads.
2030 When this macro is not defined, the compiler will access a field by
2031 finding the smallest containing object; when it is defined, a
2032 fullword load will be used if alignment permits. Unless bytes
2033 accesses are faster than word accesses, using word accesses is
2034 preferable since it may eliminate subsequent memory access if
2035 subsequent accesses occur to other fields in the same word of the
2036 structure, but to different bytes. */
2038 #define SLOW_BYTE_ACCESS 0
2040 /* Nonzero if access to memory by shorts is slow and undesirable. */
2041 #define SLOW_SHORT_ACCESS 0
2043 /* Define this macro if zero-extension (of a `char' or `short' to an
2044 `int') can be done faster if the destination is a register that is
2047 If you define this macro, you must have instruction patterns that
2048 recognize RTL structures like this:
2050 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2052 and likewise for `HImode'. */
2054 /* #define SLOW_ZERO_EXTEND */
2056 /* Define this macro to be the value 1 if unaligned accesses have a
2057 cost many times greater than aligned accesses, for example if they
2058 are emulated in a trap handler.
2060 When this macro is non-zero, the compiler will act as if
2061 `STRICT_ALIGNMENT' were non-zero when generating code for block
2062 moves. This can cause significantly more instructions to be
2063 produced. Therefore, do not set this macro non-zero if unaligned
2064 accesses only add a cycle or two to the time for a memory access.
2066 If the value of this macro is always zero, it need not be defined. */
2068 /* #define SLOW_UNALIGNED_ACCESS 0 */
2070 /* Define this macro to inhibit strength reduction of memory
2071 addresses. (On some machines, such strength reduction seems to do
2072 harm rather than good.) */
2074 /* #define DONT_REDUCE_ADDR */
2076 /* Define this macro if it is as good or better to call a constant
2077 function address than to call an address kept in a register.
2079 Desirable on the 386 because a CALL with a constant address is
2080 faster than one with a register address. */
2082 #define NO_FUNCTION_CSE
2084 /* Define this macro if it is as good or better for a function to call
2085 itself with an explicit address than to call an address kept in a
2088 #define NO_RECURSIVE_FUNCTION_CSE
2090 /* A C statement (sans semicolon) to update the integer variable COST
2091 based on the relationship between INSN that is dependent on
2092 DEP_INSN through the dependence LINK. The default is to make no
2093 adjustment to COST. This can be used for example to specify to
2094 the scheduler that an output- or anti-dependence does not incur
2095 the same cost as a data-dependence. */
2097 #define ADJUST_COST(insn,link,dep_insn,cost) \
2100 if (GET_CODE (dep_insn) == CALL_INSN) \
2103 else if (GET_CODE (dep_insn) == INSN \
2104 && GET_CODE (PATTERN (dep_insn)) == SET \
2105 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2106 && GET_CODE (insn) == INSN \
2107 && GET_CODE (PATTERN (insn)) == SET \
2108 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2109 SET_SRC (PATTERN (insn)))) \
2114 else if (GET_CODE (insn) == JUMP_INSN) \
2119 if (TARGET_PENTIUM) \
2121 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2122 && !is_fp_dest (dep_insn)) \
2127 if (agi_dependent (insn, dep_insn)) \
2131 else if (GET_CODE (insn) == INSN \
2132 && GET_CODE (PATTERN (insn)) == SET \
2133 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2134 && (next_inst = next_nonnote_insn (insn)) \
2135 && GET_CODE (next_inst) == JUMP_INSN) \
2136 { /* compare probably paired with jump */ \
2141 if (!is_fp_dest (dep_insn)) \
2143 if(!agi_dependent (insn, dep_insn)) \
2145 else if (TARGET_486) \
2149 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2150 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2151 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2152 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2153 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2154 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2155 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2156 == NOTE_INSN_LOOP_END)) \
2163 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2165 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2166 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2167 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2168 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2169 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2170 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2171 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2172 == NOTE_INSN_LOOP_END)) \
2179 /* Add any extra modes needed to represent the condition code.
2181 For the i386, we need separate modes when floating-point equality
2182 comparisons are being done. */
2184 #define EXTRA_CC_MODES CCFPEQmode
2186 /* Define the names for the modes specified above. */
2187 #define EXTRA_CC_NAMES "CCFPEQ"
2189 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2190 return the mode to be used for the comparison.
2192 For floating-point equality comparisons, CCFPEQmode should be used.
2193 VOIDmode should be used in all other cases. */
2195 #define SELECT_CC_MODE(OP,X,Y) \
2196 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2197 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2199 /* Define the information needed to generate branch and scc insns. This is
2200 stored from the compare operation. Note that we can't use "rtx" here
2201 since it hasn't been defined! */
2203 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
2205 /* Tell final.c how to eliminate redundant test instructions. */
2207 /* Here we define machine-dependent flags and fields in cc_status
2208 (see `conditions.h'). */
2210 /* Set if the cc value is was actually from the 80387 and
2211 we are testing eax directly (i.e. no sahf) */
2212 #define CC_TEST_AX 020000
2214 /* Set if the cc value is actually in the 80387, so a floating point
2215 conditional branch must be output. */
2216 #define CC_IN_80387 04000
2218 /* Set if the CC value was stored in a nonstandard way, so that
2219 the state of equality is indicated by zero in the carry bit. */
2220 #define CC_Z_IN_NOT_C 010000
2222 /* Store in cc_status the expressions
2223 that the condition codes will describe
2224 after execution of an instruction whose pattern is EXP.
2225 Do not alter them if the instruction would not alter the cc's. */
2227 #define NOTICE_UPDATE_CC(EXP, INSN) \
2228 notice_update_cc((EXP))
2230 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2231 FLOAT following a floating point comparison.
2232 Use NO_OV following an arithmetic insn that set the cc's
2233 before a test insn that was deleted.
2234 NO_OV may be zero, meaning final should reinsert the test insn
2235 because the jump cannot be handled properly without it. */
2237 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2239 if (cc_prev_status.flags & CC_IN_80387) \
2241 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2246 /* Control the assembler format that we output, to the extent
2247 this does not vary between assemblers. */
2249 /* How to refer to registers in assembler output.
2250 This sequence is indexed by compiler's hard-register-number (see above). */
2252 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2253 For non floating point regs, the following are the HImode names.
2255 For float regs, the stack top is sometimes referred to as "%st(0)"
2256 instead of just "%st". PRINT_REG handles this with the "y" code. */
2258 #define HI_REGISTER_NAMES \
2259 {"ax","dx","cx","bx","si","di","bp","sp", \
2260 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2262 #define REGISTER_NAMES HI_REGISTER_NAMES
2264 /* Table of additional register names to use in user input. */
2266 #define ADDITIONAL_REGISTER_NAMES \
2267 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2268 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2269 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2270 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2272 /* Note we are omitting these since currently I don't know how
2273 to get gcc to use these, since they want the same but different
2274 number as al, and ax.
2277 /* note the last four are not really qi_registers, but
2278 the md will have to never output movb into one of them
2279 only a movw . There is no movb into the last four regs */
2281 #define QI_REGISTER_NAMES \
2282 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2284 /* These parallel the array above, and can be used to access bits 8:15
2285 of regs 0 through 3. */
2287 #define QI_HIGH_REGISTER_NAMES \
2288 {"ah", "dh", "ch", "bh", }
2290 /* How to renumber registers for dbx and gdb. */
2292 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2293 #define DBX_REGISTER_NUMBER(n) \
2304 /* This is how to output the definition of a user-level label named NAME,
2305 such as the label on a static function or variable NAME. */
2307 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2308 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2310 /* This is how to output an assembler line defining a `double' constant. */
2312 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2314 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2315 if (sizeof (int) == sizeof (long)) \
2316 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2318 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2321 /* This is how to output a `long double' extended real constant. */
2323 #undef ASM_OUTPUT_LONG_DOUBLE
2324 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2326 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2327 if (sizeof (int) == sizeof (long)) \
2328 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2330 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2333 /* This is how to output an assembler line defining a `float' constant. */
2335 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2337 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2338 if (sizeof (int) == sizeof (long)) \
2339 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2341 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2344 /* Store in OUTPUT a string (made with alloca) containing
2345 an assembler-name for a local static variable named NAME.
2346 LABELNO is an integer which is different for each call. */
2348 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2349 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2350 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2354 /* This is how to output an assembler line defining an `int' constant. */
2356 #define ASM_OUTPUT_INT(FILE,VALUE) \
2357 ( fprintf (FILE, "%s ", ASM_LONG), \
2358 output_addr_const (FILE,(VALUE)), \
2361 /* Likewise for `char' and `short' constants. */
2362 /* is this supposed to do align too?? */
2364 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2365 ( fprintf (FILE, "%s ", ASM_SHORT), \
2366 output_addr_const (FILE,(VALUE)), \
2370 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2371 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2372 output_addr_const (FILE,(VALUE)), \
2373 fputs (",", FILE), \
2374 output_addr_const (FILE,(VALUE)), \
2375 fputs (" >> 8\n",FILE))
2379 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2380 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2381 output_addr_const (FILE, (VALUE)), \
2384 /* This is how to output an assembler line for a numeric constant byte. */
2386 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2387 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2389 /* This is how to output an insn to push a register on the stack.
2390 It need not be very fast code. */
2392 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2393 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
2395 /* This is how to output an insn to pop a register from the stack.
2396 It need not be very fast code. */
2398 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2399 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
2401 /* This is how to output an element of a case-vector that is absolute.
2404 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2405 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2407 /* This is how to output an element of a case-vector that is relative.
2408 We don't use these on the 386 yet, because the ATT assembler can't do
2409 forward reference the differences.
2412 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2413 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2415 /* Define the parentheses used to group arithmetic operations
2416 in assembler code. */
2418 #define ASM_OPEN_PAREN ""
2419 #define ASM_CLOSE_PAREN ""
2421 /* Define results of standard character escape sequences. */
2422 #define TARGET_BELL 007
2423 #define TARGET_BS 010
2424 #define TARGET_TAB 011
2425 #define TARGET_NEWLINE 012
2426 #define TARGET_VT 013
2427 #define TARGET_FF 014
2428 #define TARGET_CR 015
2430 /* Print operand X (an rtx) in assembler syntax to file FILE.
2431 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2432 The CODE z takes the size of operand from the following digit, and
2433 outputs b,w,or l respectively.
2435 On the 80386, we use several such letters:
2436 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2437 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2438 R -- print the prefix for register names.
2439 z -- print the opcode suffix for the size of the current operand.
2440 * -- print a star (in certain assembler syntax)
2441 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2442 b -- print the operand as if it's a byte (QImode) even if it isn't.
2443 c -- don't print special prefixes before constant operands. */
2445 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2448 /* Print the name of a register based on its machine mode and number.
2449 If CODE is 'w', pretend the mode is HImode.
2450 If CODE is 'b', pretend the mode is QImode.
2451 If CODE is 'k', pretend the mode is SImode.
2452 If CODE is 'h', pretend the reg is the `high' byte register.
2453 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2455 extern char *hi_reg_name
[];
2456 extern char *qi_reg_name
[];
2457 extern char *qi_high_reg_name
[];
2459 #define PRINT_REG(X, CODE, FILE) \
2460 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2462 fprintf (FILE, "%s", RP); \
2463 switch ((CODE == 'w' ? 2 \
2468 : GET_MODE_SIZE (GET_MODE (X)))) \
2471 if (STACK_TOP_P (X)) \
2473 fputs ("st(0)", FILE); \
2479 if (! FP_REG_P (X)) fputs ("e", FILE); \
2481 fputs (hi_reg_name[REGNO (X)], FILE); \
2484 fputs (qi_reg_name[REGNO (X)], FILE); \
2487 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2492 #define PRINT_OPERAND(FILE, X, CODE) \
2493 print_operand (FILE, X, CODE)
2495 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2496 print_operand_address (FILE, ADDR)
2498 /* Print the name of a register for based on its machine mode and number.
2499 This macro is used to print debugging output.
2500 This macro is different from PRINT_REG in that it may be used in
2501 programs that are not linked with aux-output.o. */
2503 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2504 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2505 static char *qi_name[] = QI_REGISTER_NAMES; \
2506 fprintf (FILE, "%d %s", REGNO (X), RP); \
2507 if (REGNO (X) == ARG_POINTER_REGNUM) \
2508 { fputs ("argp", FILE); break; } \
2509 if (STACK_TOP_P (X)) \
2510 { fputs ("st(0)", FILE); break; } \
2512 { fputs (hi_name[REGNO(X)], FILE); break; } \
2513 switch (GET_MODE_SIZE (GET_MODE (X))) \
2516 fputs ("e", FILE); \
2518 fputs (hi_name[REGNO (X)], FILE); \
2521 fputs (qi_name[REGNO (X)], FILE); \
2526 /* Output the prefix for an immediate operand, or for an offset operand. */
2527 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2528 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2530 /* Routines in libgcc that return floats must return them in an fp reg,
2531 just as other functions do which return such values.
2532 These macros make that happen. */
2534 #define FLOAT_VALUE_TYPE float
2535 #define INTIFY(FLOATVAL) FLOATVAL
2537 /* Nonzero if INSN magically clobbers register REGNO. */
2539 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2540 (FP_REGNO_P (REGNO) \
2541 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2544 /* a letter which is not needed by the normal asm syntax, which
2545 we can use for operand syntax in the extended asm */
2547 #define ASM_OPERAND_LETTER '#'
2549 #define RET return ""
2550 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2552 /* Helper macros to expand a binary/unary operator if needed */
2553 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2555 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2559 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2561 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2566 /* Functions in i386.c */
2567 extern void override_options ();
2568 extern void order_regs_for_local_alloc ();
2569 extern char *output_strlen_unroll ();
2570 extern int i386_valid_decl_attribute_p ();
2571 extern int i386_valid_type_attribute_p ();
2572 extern int i386_return_pops_args ();
2573 extern int i386_comp_type_attributes ();
2574 extern void init_cumulative_args ();
2575 extern void function_arg_advance ();
2576 extern struct rtx_def
*function_arg ();
2577 extern int function_arg_partial_nregs ();
2578 extern char *output_strlen_unroll ();
2579 extern void output_op_from_reg ();
2580 extern void output_to_reg ();
2581 extern char *singlemove_string ();
2582 extern char *output_move_double ();
2583 extern char *output_move_memory ();
2584 extern char *output_move_pushmem ();
2585 extern int standard_80387_constant_p ();
2586 extern char *output_move_const_single ();
2587 extern int symbolic_operand ();
2588 extern int call_insn_operand ();
2589 extern int expander_call_insn_operand ();
2590 extern int symbolic_reference_mentioned_p ();
2591 extern int ix86_expand_binary_operator ();
2592 extern int ix86_binary_operator_ok ();
2593 extern int ix86_expand_unary_operator ();
2594 extern int ix86_unary_operator_ok ();
2595 extern void emit_pic_move ();
2596 extern void function_prologue ();
2597 extern int simple_386_epilogue ();
2598 extern void function_epilogue ();
2599 extern int legitimate_address_p ();
2600 extern struct rtx_def
*legitimize_pic_address ();
2601 extern struct rtx_def
*legitimize_address ();
2602 extern void print_operand ();
2603 extern void print_operand_address ();
2604 extern void notice_update_cc ();
2605 extern void split_di ();
2606 extern int binary_387_op ();
2607 extern int shift_op ();
2608 extern int VOIDmode_compare_op ();
2609 extern char *output_387_binary_op ();
2610 extern char *output_fix_trunc ();
2611 extern char *output_float_compare ();
2612 extern char *output_fp_cc0_set ();
2613 extern void save_386_machine_status ();
2614 extern void restore_386_machine_status ();
2615 extern void clear_386_stack_locals ();
2616 extern struct rtx_def
*assign_386_stack_local ();
2617 extern int is_mul ();
2618 extern int is_div ();
2619 extern int last_to_set_cc ();
2620 extern int doesnt_set_condition_code ();
2621 extern int sets_condition_code ();
2622 extern int str_immediate_operand ();
2623 extern int is_fp_insn ();
2624 extern int is_fp_dest ();
2625 extern int is_fp_store ();
2626 extern int agi_dependent ();
2627 extern int reg_mentioned_in_mem ();
2630 extern struct rtx_def
*copy_all_rtx ();
2631 extern void rewrite_address ();
2634 /* Variables in i386.c */
2635 extern char *ix86_cpu_string
; /* for -mcpu=<xxx> */
2636 extern char *ix86_isa_string
; /* for -mcpu=<xxx> */
2637 extern char *i386_reg_alloc_order
; /* register allocation order */
2638 extern char *i386_regparm_string
; /* # registers to use to pass args */
2639 extern char *i386_align_loops_string
; /* power of two alignment for loops */
2640 extern char *i386_align_jumps_string
; /* power of two alignment for non-loop jumps */
2641 extern char *i386_align_funcs_string
; /* power of two alignment for functions */
2642 extern char *i386_branch_cost_string
; /* values 1-5: see jump.c */
2643 extern int i386_regparm
; /* i386_regparm_string as a number */
2644 extern int i386_align_loops
; /* power of two alignment for loops */
2645 extern int i386_align_jumps
; /* power of two alignment for non-loop jumps */
2646 extern int i386_align_funcs
; /* power of two alignment for functions */
2647 extern int i386_branch_cost
; /* values 1-5: see jump.c */
2648 extern char *hi_reg_name
[]; /* names for 16 bit regs */
2649 extern char *qi_reg_name
[]; /* names for 8 bit regs (low) */
2650 extern char *qi_high_reg_name
[]; /* names for 8 bit regs (high) */
2651 extern enum reg_class regclass_map
[]; /* smalled class containing REGNO */
2652 extern struct rtx_def
*i386_compare_op0
; /* operand 0 for comparisons */
2653 extern struct rtx_def
*i386_compare_op1
; /* operand 1 for comparisons */
2655 /* External variables used */
2656 extern int optimize
; /* optimization level */
2657 extern int obey_regdecls
; /* TRUE if stupid register allocation */
2659 /* External functions used */
2660 extern struct rtx_def
*force_operand ();
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