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1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Run-time compilation parameters selecting different hardware subsets. */
42 extern int target_flags
;
44 /* Macros used in the machine description to test the flags. */
46 /* Compile 80387 insns for floating point (not library calls). */
47 #define TARGET_80387 (target_flags & 1)
48 /* Compile code for an i486. */
49 #define TARGET_486 (target_flags & 2)
50 /* Compile using ret insn that pops args.
51 This will not work unless you use prototypes at least
52 for all functions that can take varying numbers of args. */
53 #define TARGET_RTD (target_flags & 8)
54 /* Compile passing first two args in regs 0 and 1.
55 This exists only to test compiler features that will
56 be needed for RISC chips. It is not usable
57 and is not intended to be usable on this cpu. */
58 #define TARGET_REGPARM (target_flags & 020)
60 /* Put uninitialized locals into bss, not data.
61 Meaningful only on svr3. */
62 #define TARGET_SVR3_SHLIB (target_flags & 040)
64 /* Use IEEE floating point comparisons. These handle correctly the cases
65 where the result of a comparison is unordered. Normally SIGFPE is
66 generated in such cases, in which case this isn't needed. */
67 #define TARGET_IEEE_FP (target_flags & 0100)
69 /* Macro to define tables used to set the flags.
70 This is a list in braces of pairs in braces,
71 each pair being { "NAME", VALUE }
72 where VALUE is the bits to set or minus the bits to clear.
73 An empty string NAME is used to identify the default VALUE. */
75 #define TARGET_SWITCHES \
77 { "soft-float", -1}, \
84 { "noregparm", -020}, \
85 { "svr3-shlib", 040}, \
86 { "nosvr3-shlib", -040}, \
88 { "noieee-fp", -0100}, \
89 { "", TARGET_DEFAULT}}
91 /* target machine storage layout */
93 /* Define this if most significant byte of a word is the lowest numbered. */
94 /* That is true on the 80386. */
96 #define BITS_BIG_ENDIAN 0
98 /* Define this if most significant byte of a word is the lowest numbered. */
99 /* That is not true on the 80386. */
100 #define BYTES_BIG_ENDIAN 0
102 /* Define this if most significant word of a multiword number is the lowest
104 /* Not true for 80386 */
105 #define WORDS_BIG_ENDIAN 0
107 /* number of bits in an addressable storage unit */
108 #define BITS_PER_UNIT 8
110 /* Width in bits of a "word", which is the contents of a machine register.
111 Note that this is not necessarily the width of data type `int';
112 if using 16-bit ints on a 80386, this would still be 32.
113 But on a machine with 16-bit registers, this would be 16. */
114 #define BITS_PER_WORD 32
116 /* Width of a word, in units (bytes). */
117 #define UNITS_PER_WORD 4
119 /* Width in bits of a pointer.
120 See also the macro `Pmode' defined below. */
121 #define POINTER_SIZE 32
123 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
124 #define PARM_BOUNDARY 32
126 /* Boundary (in *bits*) on which stack pointer should be aligned. */
127 #define STACK_BOUNDARY 32
129 /* Allocation boundary (in *bits*) for the code of a function.
130 For i486, we get better performance by aligning to a cache
131 line (i.e. 16 byte) boundary. */
132 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
134 /* Alignment of field after `int : 0' in a structure. */
136 #define EMPTY_FIELD_BOUNDARY 32
138 /* Minimum size in bits of the largest boundary to which any
139 and all fundamental data types supported by the hardware
140 might need to be aligned. No data type wants to be aligned
141 rounder than this. The i386 supports 64-bit floating point
142 quantities, but these can be aligned on any 32-bit boundary. */
143 #define BIGGEST_ALIGNMENT 32
145 /* Set this non-zero if move instructions will actually fail to work
146 when given unaligned data. */
147 #define STRICT_ALIGNMENT 0
149 /* If bit field type is int, don't let it cross an int,
150 and give entire struct the alignment of an int. */
151 /* Required on the 386 since it doesn't have bitfield insns. */
152 #define PCC_BITFIELD_TYPE_MATTERS 1
154 /* Align loop starts for optimal branching. */
155 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
156 ASM_OUTPUT_ALIGN (FILE, 2)
158 /* This is how to align an instruction for optimal branching.
159 On i486 we'll get better performance by aligning on a
160 cache line (i.e. 16 byte) boundary. */
161 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
162 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
164 /* Standard register usage. */
166 /* This processor has special stack-like registers. See reg-stack.c
171 /* Number of actual hardware registers.
172 The hardware registers are assigned numbers for the compiler
173 from 0 to just below FIRST_PSEUDO_REGISTER.
174 All registers that the compiler knows about must be given numbers,
175 even those that are not normally considered general registers.
177 In the 80386 we give the 8 general purpose registers the numbers 0-7.
178 We number the floating point registers 8-15.
179 Note that registers 0-7 can be accessed as a short or int,
180 while only 0-3 may be used with byte `mov' instructions.
182 Reg 16 does not correspond to any hardware register, but instead
183 appears in the RTL as an argument pointer prior to reload, and is
184 eliminated during reloading in favor of either the stack or frame
187 #define FIRST_PSEUDO_REGISTER 17
189 /* 1 for registers that have pervasive standard uses
190 and are not available for the register allocator.
191 On the 80386, the stack pointer is such, as is the arg pointer. */
192 #define FIXED_REGISTERS \
193 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
194 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
196 /* 1 for registers not available across function calls.
197 These must include the FIXED_REGISTERS and also any
198 registers that can be used without being saved.
199 The latter must include the registers where values are returned
200 and the register where structure-value addresses are passed.
201 Aside from that, you can include as many other registers as you like. */
203 #define CALL_USED_REGISTERS \
204 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
205 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
207 /* Macro to conditionally modify fixed_regs/call_used_regs. */
208 #define CONDITIONAL_REGISTER_USAGE \
212 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
213 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
217 /* Return number of consecutive hard regs needed starting at reg REGNO
218 to hold something of mode MODE.
219 This is ordinarily the length in words of a value of mode MODE
220 but can be less for certain modes in special long registers.
222 Actually there are no two word move instructions for consecutive
223 registers. And only registers 0-3 may have mov byte instructions
227 #define HARD_REGNO_NREGS(REGNO, MODE) \
228 (FP_REGNO_P (REGNO) ? 1 \
229 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
231 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
232 On the 80386, the first 4 cpu registers can hold any mode
233 while the floating point registers may hold only floating point.
234 Make it clear that the fp regs could not hold a 16-byte float. */
236 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
239 : (REGNO) >= 8 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
240 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
241 && GET_MODE_UNIT_SIZE (MODE) <= 8) \
244 /* Value is 1 if it is a good idea to tie two pseudo registers
245 when one has mode MODE1 and one has mode MODE2.
246 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
247 for any hard reg, then this must be 0 for correct output. */
249 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
251 /* A C expression returning the cost of moving data from a register of class
252 CLASS1 to one of CLASS2.
254 On the i386, copying between floating-point and fixed-point
255 registers is expensive. */
257 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
258 ((((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
259 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)) \
262 /* Specify the registers used for certain standard purposes.
263 The values of these macros are register numbers. */
265 /* on the 386 the pc register is %eip, and is not usable as a general
266 register. The ordinary mov instructions won't work */
267 /* #define PC_REGNUM */
269 /* Register to use for pushing function arguments. */
270 #define STACK_POINTER_REGNUM 7
272 /* Base register for access to local variables of the function. */
273 #define FRAME_POINTER_REGNUM 6
275 /* First floating point reg */
276 #define FIRST_FLOAT_REG 8
278 /* First & last stack-like regs */
279 #define FIRST_STACK_REG FIRST_FLOAT_REG
280 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
282 /* Value should be nonzero if functions must have frame pointers.
283 Zero means the frame pointer need not be set up (and parms
284 may be accessed via the stack pointer) in functions that seem suitable.
285 This is computed in `reload', in reload1.c. */
286 #define FRAME_POINTER_REQUIRED 0
288 /* Base register for access to arguments of the function. */
289 #define ARG_POINTER_REGNUM 16
291 /* Register in which static-chain is passed to a function. */
292 #define STATIC_CHAIN_REGNUM 2
294 /* Register to hold the addressing base for position independent
295 code access to data items. */
296 #define PIC_OFFSET_TABLE_REGNUM 3
298 /* Register in which address to store a structure value
299 arrives in the function. On the 386, the prologue
300 copies this from the stack to register %eax. */
301 #define STRUCT_VALUE_INCOMING 0
303 /* Place in which caller passes the structure value address.
304 0 means push the value on the stack like an argument. */
305 #define STRUCT_VALUE 0
307 /* Define the classes of registers for register constraints in the
308 machine description. Also define ranges of constants.
310 One of the classes must always be named ALL_REGS and include all hard regs.
311 If there is more than one class, another class must be named NO_REGS
312 and contain no registers.
314 The name GENERAL_REGS must be the name of a class (or an alias for
315 another name such as ALL_REGS). This is the class of registers
316 that is allowed by "g" or "r" in a register constraint.
317 Also, registers outside this class are allocated only when
318 instructions express preferences for them.
320 The classes must be numbered in nondecreasing order; that is,
321 a larger-numbered class must never be contained completely
322 in a smaller-numbered class.
324 For any two classes, it is very desirable that there be another
325 class that represents their union.
327 It might seem that class BREG is unnecessary, since no useful 386
328 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
329 and the "b" register constraint is useful in asms for syscalls. */
334 AREG
, DREG
, CREG
, BREG
,
335 Q_REGS
, /* %eax %ebx %ecx %edx */
337 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
338 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
339 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
341 ALL_REGS
, LIM_REG_CLASSES
344 #define N_REG_CLASSES (int) LIM_REG_CLASSES
346 /* Give names of register classes as strings for dump file. */
348 #define REG_CLASS_NAMES \
350 "AREG", "DREG", "CREG", "BREG", \
355 "FP_TOP_REG", "FP_SECOND_REG", \
359 /* Define which registers fit in which classes.
360 This is an initializer for a vector of HARD_REG_SET
361 of length N_REG_CLASSES. */
363 #define REG_CLASS_CONTENTS \
365 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
367 0x10, 0x20, /* SIREG, DIREG */ \
368 0x1007f, /* INDEX_REGS */ \
369 0x100ff, /* GENERAL_REGS */ \
370 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
371 0xff00, /* FLOAT_REGS */ \
374 /* The same information, inverted:
375 Return the class number of the smallest class containing
376 reg number REGNO. This could be a conditional expression
377 or could index an array. */
379 extern enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
];
380 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
382 /* When defined, the compiler allows registers explicitly used in the
383 rtl to be used as spill registers but prevents the compiler from
384 extending the lifetime of these registers. */
386 #define SMALL_REGISTER_CLASSES
388 #define QI_REG_P(X) \
389 (REG_P (X) && REGNO (X) < 4)
390 #define NON_QI_REG_P(X) \
391 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
393 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
394 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
396 #define STACK_REG_P(xop) (REG_P (xop) && \
397 REGNO (xop) >= FIRST_STACK_REG && \
398 REGNO (xop) <= LAST_STACK_REG)
400 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
402 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
404 /* Try to maintain the accuracy of the death notes for regs satisfying the
405 following. Important for stack like regs, to know when to pop. */
407 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
409 /* 1 if register REGNO can magically overlap other regs.
410 Note that nonzero values work only in very special circumstances. */
412 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
414 /* The class value for index registers, and the one for base regs. */
416 #define INDEX_REG_CLASS INDEX_REGS
417 #define BASE_REG_CLASS GENERAL_REGS
419 /* Get reg_class from a letter such as appears in the machine description. */
421 #define REG_CLASS_FROM_LETTER(C) \
422 ((C) == 'r' ? GENERAL_REGS : \
423 (C) == 'q' ? Q_REGS : \
424 (C) == 'f' ? FLOAT_REGS : \
425 (C) == 't' ? FP_TOP_REG : \
426 (C) == 'u' ? FP_SECOND_REG : \
427 (C) == 'a' ? AREG : \
428 (C) == 'b' ? BREG : \
429 (C) == 'c' ? CREG : \
430 (C) == 'd' ? DREG : \
431 (C) == 'D' ? DIREG : \
432 (C) == 'S' ? SIREG : NO_REGS)
434 /* The letters I, J, K, L and M in a register constraint string
435 can be used to stand for particular ranges of immediate operands.
436 This macro defines what the ranges are.
437 C is the letter, and VALUE is a constant value.
438 Return 1 if VALUE is in the range specified by C.
440 I is for non-DImode shifts.
441 J is for DImode shifts.
442 K and L are for an `andsi' optimization.
443 M is for shifts that can be executed by the "lea" opcode.
446 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
447 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
448 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
449 (C) == 'K' ? (VALUE) == 0xff : \
450 (C) == 'L' ? (VALUE) == 0xffff : \
451 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
454 /* Similar, but for floating constants, and defining letters G and H.
455 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
456 TARGET_387 isn't set, because the stack register converter may need to
457 load 0.0 into the function value register. */
459 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
460 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
462 /* Place additional restrictions on the register class to use when it
463 is necessary to be able to hold a value of mode @var{mode} in a reload
464 register for which class @var{class} would ordinarily be used. */
466 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
467 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
470 /* Given an rtx X being reloaded into a reg required to be
471 in class CLASS, return the class of reg to actually use.
472 In general this is just CLASS; but on some machines
473 in some cases it is preferable to use a more restrictive class.
474 On the 80386 series, we prevent floating constants from being
475 reloaded into floating registers (since no move-insn can do that)
476 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
478 /* Don't put CONST_DOUBLE into FLOAT_REGS.
479 QImode must go into class Q_REGS.
480 MODE_INT must not go into FLOAT_REGS. */
482 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
483 (GET_CODE (X) == CONST_DOUBLE \
484 ? (reg_class_subset_p ((CLASS), GENERAL_REGS) || (CLASS) == ALL_REGS \
485 ? (CLASS) : NO_REGS) \
486 : GET_MODE (X) == QImode \
487 ? (! reg_class_subset_p ((CLASS), Q_REGS) ? Q_REGS : (CLASS)) \
488 : (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT && (CLASS) == FLOAT_REGS ? \
489 GENERAL_REGS : (CLASS)))
491 /* Return the maximum number of consecutive registers
492 needed to represent mode MODE in a register of class CLASS. */
493 /* On the 80386, this is the size of MODE in words,
494 except in the FP regs, where a single reg is always enough. */
495 #define CLASS_MAX_NREGS(CLASS, MODE) \
496 ((CLASS) == FLOAT_REGS ? 1 : \
497 (CLASS) == FP_TOP_REG ? 1 : \
498 (CLASS) == FP_SECOND_REG ? 1 : \
499 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
501 /* Stack layout; function entry, exit and calling. */
503 /* Define this if pushing a word on the stack
504 makes the stack pointer a smaller address. */
505 #define STACK_GROWS_DOWNWARD
507 /* Define this if the nominal address of the stack frame
508 is at the high-address end of the local variables;
509 that is, each additional local variable allocated
510 goes at a more negative offset in the frame. */
511 #define FRAME_GROWS_DOWNWARD
513 /* Offset within stack frame to start allocating local variables at.
514 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
515 first local allocated. Otherwise, it is the offset to the BEGINNING
516 of the first local allocated. */
517 #define STARTING_FRAME_OFFSET 0
519 /* If we generate an insn to push BYTES bytes,
520 this says how many the stack pointer really advances by.
521 On 386 pushw decrements by exactly 2 no matter what the position was.
522 On the 386 there is no pushb; we use pushw instead, and this
523 has the effect of rounding up to 2. */
525 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
527 /* Offset of first parameter from the argument pointer register value. */
528 #define FIRST_PARM_OFFSET(FNDECL) 0
530 /* Value is the number of bytes of arguments automatically
531 popped when returning from a subroutine call.
532 FUNTYPE is the data type of the function (as a tree),
533 or for a library call it is an identifier node for the subroutine name.
534 SIZE is the number of bytes of arguments passed on the stack.
536 On the 80386, the RTD insn may be used to pop them if the number
537 of args is fixed, but if the number is variable then the caller
538 must pop them all. RTD can't be used for library calls now
539 because the library is compiled with the Unix compiler.
540 Use of RTD is a selectable option, since it is incompatible with
541 standard Unix calling sequences. If the option is not selected,
542 the caller must always pop the args. */
544 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
545 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
547 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
548 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
549 == void_type_node))) ? (SIZE) \
550 : (aggregate_value_p (FUNTYPE)) ? GET_MODE_SIZE (Pmode) : 0)
552 #define FUNCTION_VALUE(VALTYPE, FUNC) \
553 gen_rtx (REG, TYPE_MODE (VALTYPE), \
554 VALUE_REGNO (TYPE_MODE (VALTYPE)))
556 /* Define how to find the value returned by a library function
557 assuming the value has mode MODE. */
559 #define LIBCALL_VALUE(MODE) \
560 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
562 /* 1 if N is a possible register number for function argument passing.
563 On the 80386, no registers are used in this way.
564 *NOTE* -mregparm does not work.
565 It exists only to test register calling conventions. */
567 #define FUNCTION_ARG_REGNO_P(N) 0
569 /* Define a data type for recording info about an argument list
570 during the scan of that argument list. This data type should
571 hold all necessary information about the function itself
572 and about the args processed so far, enough to enable macros
573 such as FUNCTION_ARG to determine where the next arg should go.
575 On the 80386, this is a single integer, which is a number of bytes
576 of arguments scanned so far. */
578 #define CUMULATIVE_ARGS int
580 /* Initialize a variable CUM of type CUMULATIVE_ARGS
581 for a call to a function whose data type is FNTYPE.
582 For a library call, FNTYPE is 0.
584 On the 80386, the offset starts at 0. */
586 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
589 /* Update the data in CUM to advance over an argument
590 of mode MODE and data type TYPE.
591 (TYPE is null for libcalls where that information may not be available.) */
593 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
594 ((CUM) += ((MODE) != BLKmode \
595 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
596 : (int_size_in_bytes (TYPE) + 3) & ~3))
598 /* Define where to put the arguments to a function.
599 Value is zero to push the argument on the stack,
600 or a hard register in which to store the argument.
602 MODE is the argument's machine mode.
603 TYPE is the data type of the argument (as a tree).
604 This is null for libcalls where that information may
606 CUM is a variable of type CUMULATIVE_ARGS which gives info about
607 the preceding args and about the function being called.
608 NAMED is nonzero if this argument is a named parameter
609 (otherwise it is an extra parameter matching an ellipsis). */
612 /* On the 80386 all args are pushed, except if -mregparm is specified
613 then the first two words of arguments are passed in EAX, EDX.
614 *NOTE* -mregparm does not work.
615 It exists only to test register calling conventions. */
617 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
618 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
620 /* For an arg passed partly in registers and partly in memory,
621 this is the number of registers used.
622 For args passed entirely in registers or entirely in memory, zero. */
625 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
626 ((TARGET_REGPARM && (CUM) < 8 \
627 && 8 < ((CUM) + ((MODE) == BLKmode \
628 ? int_size_in_bytes (TYPE) \
629 : GET_MODE_SIZE (MODE)))) \
632 /* This macro generates the assembly code for function entry.
633 FILE is a stdio stream to output the code to.
634 SIZE is an int: how many units of temporary storage to allocate.
635 Refer to the array `regs_ever_live' to determine which registers
636 to save; `regs_ever_live[I]' is nonzero if register number I
637 is ever used in the function. This macro is responsible for
638 knowing which registers should not be saved even if used. */
640 #define FUNCTION_PROLOGUE(FILE, SIZE) \
641 function_prologue (FILE, SIZE)
643 /* Output assembler code to FILE to increment profiler label # LABELNO
644 for profiling a function entry. */
646 #define FUNCTION_PROFILER(FILE, LABELNO) \
650 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
651 LPREFIX, (LABELNO)); \
652 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
656 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
657 fprintf (FILE, "\tcall _mcount\n"); \
661 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
662 the stack pointer does not matter. The value is tested only in
663 functions that have frame pointers.
664 No definition is equivalent to always zero. */
665 /* Note on the 386 it might be more efficient not to define this since
666 we have to restore it ourselves from the frame pointer, in order to
669 #define EXIT_IGNORE_STACK 1
671 /* This macro generates the assembly code for function exit,
672 on machines that need it. If FUNCTION_EPILOGUE is not defined
673 then individual return instructions are generated for each
674 return statement. Args are same as for FUNCTION_PROLOGUE.
676 The function epilogue should not depend on the current stack pointer!
677 It should use the frame pointer only. This is mandatory because
678 of alloca; we also take advantage of it to omit stack adjustments
681 If the last non-note insn in the function is a BARRIER, then there
682 is no need to emit a function prologue, because control does not fall
683 off the end. This happens if the function ends in an "exit" call, or
684 if a `return' insn is emitted directly into the function. */
686 #define FUNCTION_EPILOGUE(FILE, SIZE) \
688 rtx last = get_last_insn (); \
689 if (last && GET_CODE (last) == NOTE) \
690 last = prev_nonnote_insn (last); \
691 if (! last || GET_CODE (last) != BARRIER) \
692 function_epilogue (FILE, SIZE); \
695 /* Output assembler code for a block containing the constant parts
696 of a trampoline, leaving space for the variable parts. */
698 /* On the 386, the trampoline contains three instructions:
702 #define TRAMPOLINE_TEMPLATE(FILE) \
704 ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb9)); \
705 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
706 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
707 ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xb8)); \
708 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
709 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
710 ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xff)); \
711 ASM_OUTPUT_CHAR (FILE, gen_rtx (CONST_INT, VOIDmode, 0xe0)); \
714 /* Length in units of the trampoline for entering a nested function. */
716 #define TRAMPOLINE_SIZE 12
718 /* Emit RTL insns to initialize the variable parts of a trampoline.
719 FNADDR is an RTX for the address of the function's pure code.
720 CXT is an RTX for the static chain value for the function. */
722 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
724 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
725 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
728 /* Definitions for register eliminations.
730 This is an array of structures. Each structure initializes one pair
731 of eliminable registers. The "from" register number is given first,
732 followed by "to". Eliminations of the same "from" register are listed
733 in order of preference.
735 We have two registers that can be eliminated on the i386. First, the
736 frame pointer register can often be eliminated in favor of the stack
737 pointer register. Secondly, the argument pointer register can always be
738 eliminated; it is replaced with either the stack or frame pointer. */
740 #define ELIMINABLE_REGS \
741 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
742 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
743 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
745 /* Given FROM and TO register numbers, say whether this elimination is allowed.
746 Frame pointer elimination is automatically handled.
748 For the i386, if frame pointer elimination is being done, we would like to
749 convert ap into sp, not fp.
751 All other eliminations are valid. */
753 #define CAN_ELIMINATE(FROM, TO) \
754 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
755 ? ! frame_pointer_needed \
758 /* Define the offset between two registers, one to be eliminated, and the other
759 its replacement, at the start of a routine. */
761 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
763 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
764 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
770 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
771 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
772 || (current_function_uses_pic_offset_table \
773 && regno == PIC_OFFSET_TABLE_REGNUM)) \
776 (OFFSET) = offset + get_frame_size (); \
778 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
779 (OFFSET) += 4; /* Skip saved PC */ \
783 /* Addressing modes, and classification of registers for them. */
785 /* #define HAVE_POST_INCREMENT */
786 /* #define HAVE_POST_DECREMENT */
788 /* #define HAVE_PRE_DECREMENT */
789 /* #define HAVE_PRE_INCREMENT */
791 /* Macros to check register numbers against specific register classes. */
793 /* These assume that REGNO is a hard or pseudo reg number.
794 They give nonzero only if REGNO is a hard reg of the suitable class
795 or a pseudo reg currently allocated to a suitable hard reg.
796 Since they use reg_renumber, they are safe only once reg_renumber
797 has been allocated, which happens in local-alloc.c. */
799 #define REGNO_OK_FOR_INDEX_P(REGNO) \
800 ((REGNO) < STACK_POINTER_REGNUM \
801 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
803 #define REGNO_OK_FOR_BASE_P(REGNO) \
804 ((REGNO) <= STACK_POINTER_REGNUM \
805 || (REGNO) == ARG_POINTER_REGNUM \
806 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
808 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
809 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
811 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
812 and check its validity for a certain class.
813 We have two alternate definitions for each of them.
814 The usual definition accepts all pseudo regs; the other rejects
815 them unless they have been allocated suitable hard regs.
816 The symbol REG_OK_STRICT causes the latter definition to be used.
818 Most source files want to accept pseudo regs in the hope that
819 they will get allocated to the class that the insn wants them to be in.
820 Source files for reload pass need to be strict.
821 After reload, it makes no difference, since pseudo regs have
822 been eliminated by then. */
824 #ifndef REG_OK_STRICT
826 /* Nonzero if X is a hard reg that can be used as an index or if
827 it is a pseudo reg. */
829 #define REG_OK_FOR_INDEX_P(X) \
830 (REGNO (X) < STACK_POINTER_REGNUM \
831 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
833 /* Nonzero if X is a hard reg that can be used as a base reg
834 of if it is a pseudo reg. */
837 #define REG_OK_FOR_BASE_P(X) \
838 (REGNO (X) <= STACK_POINTER_REGNUM \
839 || REGNO (X) == ARG_POINTER_REGNUM \
840 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
842 #define REG_OK_FOR_STRREG_P(X) \
843 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
847 /* Nonzero if X is a hard reg that can be used as an index. */
848 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
849 /* Nonzero if X is a hard reg that can be used as a base reg. */
850 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
851 #define REG_OK_FOR_STRREG_P(X) \
852 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
856 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
857 that is a valid memory address for an instruction.
858 The MODE argument is the machine mode for the MEM expression
859 that wants to use this address.
861 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
862 except for CONSTANT_ADDRESS_P which is usually machine-independent.
864 See legitimize_pic_address in i386.c for details as to what
865 constitutes a legitimate address when -fpic is used. */
867 #define MAX_REGS_PER_ADDRESS 2
869 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
871 /* Nonzero if the constant value X is a legitimate general operand.
872 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
874 #define LEGITIMATE_CONSTANT_P(X) 1
876 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
877 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
879 #define LEGITIMATE_INDEX_REG_P(X) \
880 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
882 /* Return 1 if X is an index or an index times a scale. */
884 #define LEGITIMATE_INDEX_P(X) \
885 (LEGITIMATE_INDEX_REG_P (X) \
886 || (GET_CODE (X) == MULT \
887 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
888 && GET_CODE (XEXP (X, 1)) == CONST_INT \
889 && (INTVAL (XEXP (X, 1)) == 2 \
890 || INTVAL (XEXP (X, 1)) == 4 \
891 || INTVAL (XEXP (X, 1)) == 8)))
893 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
895 #define GO_IF_INDEXING(X, ADDR) \
896 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
897 GO_IF_INDEXABLE_BASE (X, ADDR); \
898 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
899 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
900 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
901 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
903 /* We used to allow this, but it isn't ever used.
904 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
905 && REG_P (XEXP (X, 0)) \
906 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
909 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
911 if (CONSTANT_ADDRESS_P (X) \
912 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
914 GO_IF_INDEXING (X, ADDR); \
915 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
917 rtx x0 = XEXP (X, 0); \
918 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
919 { GO_IF_INDEXING (x0, ADDR); } \
920 else if (x0 == pic_offset_table_rtx) \
922 else if (GET_CODE (x0) == PLUS) \
924 if (XEXP (x0, 0) == pic_offset_table_rtx) \
925 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
926 if (XEXP (x0, 1) == pic_offset_table_rtx) \
927 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
932 /* Try machine-dependent ways of modifying an illegitimate address
933 to be legitimate. If we find one, return the new, valid address.
934 This macro is used in only one place: `memory_address' in explow.c.
936 OLDX is the address as it was before break_out_memory_refs was called.
937 In some cases it is useful to look at this to decide what needs to be done.
939 MODE and WIN are passed so that this macro can use
940 GO_IF_LEGITIMATE_ADDRESS.
942 It is always safe for this macro to do nothing. It exists to recognize
943 opportunities to optimize the output.
945 For the 80386, we handle X+REG by loading X into a register R and
946 using R+REG. R will go in a general reg and indexing will be used.
947 However, if REG is a broken-out memory address or multiplication,
948 nothing needs to be done because REG can certainly go in a general reg.
950 When -fpic is used, special handling is needed for symbolic references.
951 See comments by legitimize_pic_address in i386.c for details. */
953 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
954 { extern rtx legitimize_pic_address (); \
955 int ch = (X) != (OLDX); \
956 if (flag_pic && SYMBOLIC_CONST (X)) \
958 (X) = legitimize_pic_address (X, 0); \
959 if (memory_address_p (MODE, X)) \
962 if (GET_CODE (X) == PLUS) \
963 { if (GET_CODE (XEXP (X, 0)) == MULT) \
964 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
965 if (GET_CODE (XEXP (X, 1)) == MULT) \
966 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
967 if (ch && GET_CODE (XEXP (X, 1)) == REG \
968 && GET_CODE (XEXP (X, 0)) == REG) \
970 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
971 ch = 1, (X) = legitimize_pic_address (X, 0); \
972 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
973 if (GET_CODE (XEXP (X, 0)) == REG) \
974 { register rtx temp = gen_reg_rtx (Pmode); \
975 register rtx val = force_operand (XEXP (X, 1), temp); \
976 if (val != temp) emit_move_insn (temp, val, 0); \
977 XEXP (X, 1) = temp; \
979 else if (GET_CODE (XEXP (X, 1)) == REG) \
980 { register rtx temp = gen_reg_rtx (Pmode); \
981 register rtx val = force_operand (XEXP (X, 0), temp); \
982 if (val != temp) emit_move_insn (temp, val, 0); \
983 XEXP (X, 0) = temp; \
986 /* Nonzero if the constant value X is a legitimate general operand
987 when generating PIC code. It is given that flag_pic is on and
988 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
990 #define LEGITIMATE_PIC_OPERAND_P(X) \
991 (! SYMBOLIC_CONST (X) \
992 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
994 #define SYMBOLIC_CONST(X) \
995 (GET_CODE (X) == SYMBOL_REF \
996 || GET_CODE (X) == LABEL_REF \
997 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
999 /* Go to LABEL if ADDR (a legitimate address expression)
1000 has an effect that depends on the machine mode it is used for.
1001 On the 80386, only postdecrement and postincrement address depend thus
1002 (the amount of decrement or increment being the length of the operand). */
1003 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1004 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1006 /* Define this macro if references to a symbol must be treated
1007 differently depending on something about the variable or
1008 function named by the symbol (such as what section it is in).
1010 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1011 so that we may access it directly in the GOT. */
1013 #define ENCODE_SECTION_INFO(DECL) \
1018 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1019 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1020 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1021 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1022 || ! TREE_PUBLIC (DECL)); \
1027 /* Specify the machine mode that this machine uses
1028 for the index in the tablejump instruction. */
1029 #define CASE_VECTOR_MODE Pmode
1031 /* Define this if the tablejump instruction expects the table
1032 to contain offsets from the address of the table.
1033 Do not define this if the table should contain absolute addresses. */
1034 /* #define CASE_VECTOR_PC_RELATIVE */
1036 /* Specify the tree operation to be used to convert reals to integers.
1037 This should be changed to take advantage of fist --wfs ??
1039 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1041 /* This is the kind of divide that is easiest to do in the general case. */
1042 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1044 /* Define this as 1 if `char' should by default be signed; else as 0. */
1045 #define DEFAULT_SIGNED_CHAR 1
1047 /* Max number of bytes we can move from memory to memory
1048 in one reasonably fast instruction. */
1051 /* MOVE_RATIO is the number of move instructions that is better than a
1052 block move. Make this large on i386, since the block move is very
1053 inefficient with small blocks, and the hard register needs of the
1054 block move require much reload work. */
1055 #define MOVE_RATIO 5
1057 /* Define this if zero-extension is slow (more than one real instruction). */
1058 /* #define SLOW_ZERO_EXTEND */
1060 /* Nonzero if access to memory by bytes is slow and undesirable. */
1061 #define SLOW_BYTE_ACCESS 0
1063 /* Define if shifts truncate the shift count
1064 which implies one can omit a sign-extension or zero-extension
1065 of a shift count. */
1066 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1068 /* #define SHIFT_COUNT_TRUNCATED */
1070 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1071 is done just by pretending it is already truncated. */
1072 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1074 /* We assume that the store-condition-codes instructions store 0 for false
1075 and some other value for true. This is the value stored for true. */
1077 #define STORE_FLAG_VALUE 1
1079 /* When a prototype says `char' or `short', really pass an `int'.
1080 (The 386 can't easily push less than an int.) */
1082 #define PROMOTE_PROTOTYPES
1084 /* Specify the machine mode that pointers have.
1085 After generation of rtl, the compiler makes no further distinction
1086 between pointers and any other objects of this machine mode. */
1087 #define Pmode SImode
1089 /* A function address in a call instruction
1090 is a byte address (for indexing purposes)
1091 so give the MEM rtx a byte's mode. */
1092 #define FUNCTION_MODE QImode
1094 /* Define this if addresses of constant functions
1095 shouldn't be put through pseudo regs where they can be cse'd.
1096 Desirable on the 386 because a CALL with a constant address is
1097 not much slower than one with a register address. */
1098 #define NO_FUNCTION_CSE
1100 /* Provide the costs of a rtl expression. This is in the body of a
1103 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1105 return COSTS_N_INSNS (10); \
1110 return COSTS_N_INSNS (40); \
1112 if (GET_CODE (XEXP (X, 0)) == REG \
1113 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1117 /* Compute the cost of computing a constant rtl expression RTX
1118 whose rtx-code is CODE. The body of this macro is a portion
1119 of a switch statement. If the code is computed here,
1120 return it with a return statement. Otherwise, break from the switch. */
1122 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1127 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1128 case CONST_DOUBLE: \
1130 int code = standard_80387_constant_p (RTX); \
1131 return code == 1 ? 0 : \
1136 /* Compute the cost of an address. This is meant to approximate the size
1137 and/or execution delay of an insn using that address. If the cost is
1138 approximated by the RTL complexity, including CONST_COSTS above, as
1139 is usually the case for CISC machines, this macro should not be defined.
1140 For aggressively RISCy machines, only one insn format is allowed, so
1141 this macro should be a constant. The value of this macro only matters
1142 for valid addresses.
1144 For i386, it is better to use a complex address than let gcc copy
1145 the address into a reg and make a new pseudo. But not if the address
1146 requires to two regs - that would mean more pseudos with longer
1149 #define ADDRESS_COST(RTX) \
1150 ((CONSTANT_P (RTX) \
1151 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1152 && REG_P (XEXP (RTX, 0)))) ? 0 \
1156 /* Add any extra modes needed to represent the condition code.
1158 For the i386, we need separate modes when floating-point equality
1159 comparisons are being done. */
1161 #define EXTRA_CC_MODES CCFPEQmode
1163 /* Define the names for the modes specified above. */
1164 #define EXTRA_CC_NAMES "CCFPEQ"
1166 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1167 return the mode to be used for the comparison.
1169 For floating-point equality comparisons, CCFPEQmode should be used.
1170 VOIDmode should be used in all other cases. */
1172 #define SELECT_CC_MODE(OP,X) \
1173 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1174 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : CCmode)
1176 /* Define the information needed to generate branch and scc insns. This is
1177 stored from the compare operation. Note that we can't use "rtx" here
1178 since it hasn't been defined! */
1180 extern struct rtx_def
*i386_compare_op0
, *i386_compare_op1
;
1181 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1183 /* Tell final.c how to eliminate redundant test instructions. */
1185 /* Here we define machine-dependent flags and fields in cc_status
1186 (see `conditions.h'). */
1188 /* Set if the cc value is actually in the 80387, so a floating point
1189 conditional branch must be output. */
1190 #define CC_IN_80387 04000
1192 /* Set if the CC value was stored in a nonstandard way, so that
1193 the state of equality is indicated by zero in the carry bit. */
1194 #define CC_Z_IN_NOT_C 010000
1196 /* Store in cc_status the expressions
1197 that the condition codes will describe
1198 after execution of an instruction whose pattern is EXP.
1199 Do not alter them if the instruction would not alter the cc's. */
1201 #define NOTICE_UPDATE_CC(EXP, INSN) \
1202 notice_update_cc((EXP))
1204 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1205 FLOAT following a floating point comparison.
1206 Use NO_OV following an arithmetic insn that set the cc's
1207 before a test insn that was deleted.
1208 NO_OV may be zero, meaning final should reinsert the test insn
1209 because the jump cannot be handled properly without it. */
1211 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1213 if (cc_prev_status.flags & CC_IN_80387) \
1215 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1220 /* Control the assembler format that we output, to the extent
1221 this does not vary between assemblers. */
1223 /* How to refer to registers in assembler output.
1224 This sequence is indexed by compiler's hard-register-number (see above). */
1226 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1227 For non floating point regs, the following are the HImode names.
1229 For float regs, the stack top is sometimes referred to as "%st(0)"
1230 instead of just "%st". PRINT_REG in i386.c handles with with the
1233 #define HI_REGISTER_NAMES \
1234 {"ax","dx","cx","bx","si","di","bp","sp", \
1235 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1237 #define REGISTER_NAMES HI_REGISTER_NAMES
1239 /* Table of additional register names to use in user input. */
1241 #define ADDITIONAL_REGISTER_NAMES \
1242 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1243 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1244 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1245 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1247 /* Note we are omitting these since currently I don't know how
1248 to get gcc to use these, since they want the same but different
1249 number as al, and ax.
1252 /* note the last four are not really qi_registers, but
1253 the md will have to never output movb into one of them
1254 only a movw . There is no movb into the last four regs */
1256 #define QI_REGISTER_NAMES \
1257 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1259 /* These parallel the array above, and can be used to access bits 8:15
1260 of regs 0 through 3. */
1262 #define QI_HIGH_REGISTER_NAMES \
1263 {"ah", "dh", "ch", "bh", }
1265 /* How to renumber registers for dbx and gdb. */
1267 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1268 #define DBX_REGISTER_NUMBER(n) \
1279 /* This is how to output the definition of a user-level label named NAME,
1280 such as the label on a static function or variable NAME. */
1282 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1283 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1285 /* This is how to output an assembler line defining a `double' constant. */
1287 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1288 fprintf (FILE, "%s %.22e\n", ASM_DOUBLE, (VALUE))
1291 /* This is how to output an assembler line defining a `float' constant. */
1293 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1294 do { union { float f; long l;} tem; \
1296 fprintf((FILE), "%s 0x%x\n", ASM_LONG, tem.l); \
1300 /* Store in OUTPUT a string (made with alloca) containing
1301 an assembler-name for a local static variable named NAME.
1302 LABELNO is an integer which is different for each call. */
1304 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1305 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1306 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1310 /* This is how to output an assembler line defining an `int' constant. */
1312 #define ASM_OUTPUT_INT(FILE,VALUE) \
1313 ( fprintf (FILE, "%s ", ASM_LONG), \
1314 output_addr_const (FILE,(VALUE)), \
1317 /* Likewise for `char' and `short' constants. */
1318 /* is this supposed to do align too?? */
1320 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1321 ( fprintf (FILE, "%s ", ASM_SHORT), \
1322 output_addr_const (FILE,(VALUE)), \
1326 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1327 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1328 output_addr_const (FILE,(VALUE)), \
1329 fputs (",", FILE), \
1330 output_addr_const (FILE,(VALUE)), \
1331 fputs (" >> 8\n",FILE))
1335 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1336 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1337 output_addr_const (FILE, (VALUE)), \
1340 /* This is how to output an assembler line for a numeric constant byte. */
1342 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1343 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1345 /* This is how to output an insn to push a register on the stack.
1346 It need not be very fast code. */
1348 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1349 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1351 /* This is how to output an insn to pop a register from the stack.
1352 It need not be very fast code. */
1354 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1355 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1357 /* This is how to output an element of a case-vector that is absolute.
1360 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1361 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1363 /* This is how to output an element of a case-vector that is relative.
1364 We don't use these on the 386 yet, because the ATT assembler can't do
1365 forward reference the differences.
1368 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1369 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1371 /* Define the parentheses used to group arithmetic operations
1372 in assembler code. */
1374 #define ASM_OPEN_PAREN ""
1375 #define ASM_CLOSE_PAREN ""
1377 /* Define results of standard character escape sequences. */
1378 #define TARGET_BELL 007
1379 #define TARGET_BS 010
1380 #define TARGET_TAB 011
1381 #define TARGET_NEWLINE 012
1382 #define TARGET_VT 013
1383 #define TARGET_FF 014
1384 #define TARGET_CR 015
1386 /* Print operand X (an rtx) in assembler syntax to file FILE.
1387 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1388 The CODE z takes the size of operand from the following digit, and
1389 outputs b,w,or l respectively.
1391 On the 80386, we use several such letters:
1392 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1393 L,W,B,Q,S -- print the opcode suffix for specified size of operand.
1394 R -- print the prefix for register names.
1395 z -- print the opcode suffix for the size of the current operand.
1396 * -- print a star (in certain assembler syntax)
1397 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1398 b -- print the operand as if it's a byte (QImode) even if it isn't.
1399 c -- don't print special prefixes before constant operands. */
1401 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1404 #define PRINT_OPERAND(FILE, X, CODE) \
1405 print_operand (FILE, X, CODE)
1408 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1409 print_operand_address (FILE, ADDR)
1411 /* Output the prefix for an immediate operand, or for an offset operand. */
1412 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1413 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1415 /* Routines in libgcc that return floats must return them in an fp reg,
1416 just as other functions do which return such values.
1417 These macros make that happen. */
1419 #define FLOAT_VALUE_TYPE float
1420 #define INTIFY(FLOATVAL) FLOATVAL
1422 /* Nonzero if INSN magically clobbers register REGNO. */
1424 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1425 (FP_REGNO_P (REGNO) \
1426 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1429 /* a letter which is not needed by the normal asm syntax, which
1430 we can use for operand syntax in the extended asm */
1432 #define ASM_OPERAND_LETTER '#'
1434 #define RET return ""
1435 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
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