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1 /* Definitions of target machine for GNU compiler for Intel 80386.
2 Copyright (C) 1988, 1992, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags
;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Compile 80387 insns for floating point (not library calls). */
66 #define TARGET_80387 (target_flags & 1)
67 /* Compile code for an i486. */
68 #define TARGET_486 (target_flags & 2)
69 /* Compile using ret insn that pops args.
70 This will not work unless you use prototypes at least
71 for all functions that can take varying numbers of args. */
72 #define TARGET_RTD (target_flags & 8)
73 /* Compile passing first two args in regs 0 and 1.
74 This exists only to test compiler features that will
75 be needed for RISC chips. It is not usable
76 and is not intended to be usable on this cpu. */
77 #define TARGET_REGPARM (target_flags & 020)
79 /* Put uninitialized locals into bss, not data.
80 Meaningful only on svr3. */
81 #define TARGET_SVR3_SHLIB (target_flags & 040)
83 /* Use IEEE floating point comparisons. These handle correctly the cases
84 where the result of a comparison is unordered. Normally SIGFPE is
85 generated in such cases, in which case this isn't needed. */
86 #define TARGET_IEEE_FP (target_flags & 0100)
88 /* Functions that return a floating point value may return that value
89 in the 387 FPU or in 386 integer registers. If set, this flag causes
90 the 387 to be used, which is compatible with most calling conventions. */
91 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & 0200)
93 /* Disable generation of FP sin, cos and sqrt operations for 387.
94 This is because FreeBSD lacks these in the math-emulator-code */
95 #define TARGET_NO_FANCY_MATH_387 (target_flags & 0400)
97 /* Macro to define tables used to set the flags.
98 This is a list in braces of pairs in braces,
99 each pair being { "NAME", VALUE }
100 where VALUE is the bits to set or minus the bits to clear.
101 An empty string NAME is used to identify the default VALUE. */
103 #define TARGET_SWITCHES \
106 { "soft-float", -1}, \
107 { "no-soft-float", 1}, \
114 { "no-regparm", -020}, \
115 { "svr3-shlib", 040}, \
116 { "no-svr3-shlib", -040}, \
117 { "ieee-fp", 0100}, \
118 { "no-ieee-fp", -0100}, \
119 { "fp-ret-in-387", 0200}, \
120 { "no-fp-ret-in-387", -0200}, \
121 { "no-fancy-math-387", 0400}, \
122 { "fancy-math-387", -0400}, \
124 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
126 /* This is meant to be redefined in the host dependent files */
127 #define SUBTARGET_SWITCHES
129 #define OVERRIDE_OPTIONS \
131 SUBTARGET_OVERRIDE_OPTIONS \
134 /* This is meant to be redefined in the host dependent files */
135 #define SUBTARGET_OVERRIDE_OPTIONS
137 /* target machine storage layout */
139 /* Define for XFmode extended real floating point support.
140 This will automatically cause REAL_ARITHMETIC to be defined. */
141 #define LONG_DOUBLE_TYPE_SIZE 96
143 /* Define if you don't want extended real, but do want to use the
144 software floating point emulator for REAL_ARITHMETIC and
145 decimal <-> binary conversion. */
146 /* #define REAL_ARITHMETIC */
148 /* Define this if most significant byte of a word is the lowest numbered. */
149 /* That is true on the 80386. */
151 #define BITS_BIG_ENDIAN 0
153 /* Define this if most significant byte of a word is the lowest numbered. */
154 /* That is not true on the 80386. */
155 #define BYTES_BIG_ENDIAN 0
157 /* Define this if most significant word of a multiword number is the lowest
159 /* Not true for 80386 */
160 #define WORDS_BIG_ENDIAN 0
162 /* number of bits in an addressable storage unit */
163 #define BITS_PER_UNIT 8
165 /* Width in bits of a "word", which is the contents of a machine register.
166 Note that this is not necessarily the width of data type `int';
167 if using 16-bit ints on a 80386, this would still be 32.
168 But on a machine with 16-bit registers, this would be 16. */
169 #define BITS_PER_WORD 32
171 /* Width of a word, in units (bytes). */
172 #define UNITS_PER_WORD 4
174 /* Width in bits of a pointer.
175 See also the macro `Pmode' defined below. */
176 #define POINTER_SIZE 32
178 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
179 #define PARM_BOUNDARY 32
181 /* Boundary (in *bits*) on which stack pointer should be aligned. */
182 #define STACK_BOUNDARY 32
184 /* Allocation boundary (in *bits*) for the code of a function.
185 For i486, we get better performance by aligning to a cache
186 line (i.e. 16 byte) boundary. */
187 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
189 /* Alignment of field after `int : 0' in a structure. */
191 #define EMPTY_FIELD_BOUNDARY 32
193 /* Minimum size in bits of the largest boundary to which any
194 and all fundamental data types supported by the hardware
195 might need to be aligned. No data type wants to be aligned
196 rounder than this. The i386 supports 64-bit floating point
197 quantities, but these can be aligned on any 32-bit boundary. */
198 #define BIGGEST_ALIGNMENT 32
200 /* Set this non-zero if move instructions will actually fail to work
201 when given unaligned data. */
202 #define STRICT_ALIGNMENT 0
204 /* If bit field type is int, don't let it cross an int,
205 and give entire struct the alignment of an int. */
206 /* Required on the 386 since it doesn't have bitfield insns. */
207 #define PCC_BITFIELD_TYPE_MATTERS 1
209 /* Align loop starts for optimal branching. */
210 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
211 ASM_OUTPUT_ALIGN (FILE, 2)
213 /* This is how to align an instruction for optimal branching.
214 On i486 we'll get better performance by aligning on a
215 cache line (i.e. 16 byte) boundary. */
216 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
217 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
219 /* Standard register usage. */
221 /* This processor has special stack-like registers. See reg-stack.c
226 /* Number of actual hardware registers.
227 The hardware registers are assigned numbers for the compiler
228 from 0 to just below FIRST_PSEUDO_REGISTER.
229 All registers that the compiler knows about must be given numbers,
230 even those that are not normally considered general registers.
232 In the 80386 we give the 8 general purpose registers the numbers 0-7.
233 We number the floating point registers 8-15.
234 Note that registers 0-7 can be accessed as a short or int,
235 while only 0-3 may be used with byte `mov' instructions.
237 Reg 16 does not correspond to any hardware register, but instead
238 appears in the RTL as an argument pointer prior to reload, and is
239 eliminated during reloading in favor of either the stack or frame
242 #define FIRST_PSEUDO_REGISTER 17
244 /* 1 for registers that have pervasive standard uses
245 and are not available for the register allocator.
246 On the 80386, the stack pointer is such, as is the arg pointer. */
247 #define FIXED_REGISTERS \
248 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
249 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
251 /* 1 for registers not available across function calls.
252 These must include the FIXED_REGISTERS and also any
253 registers that can be used without being saved.
254 The latter must include the registers where values are returned
255 and the register where structure-value addresses are passed.
256 Aside from that, you can include as many other registers as you like. */
258 #define CALL_USED_REGISTERS \
259 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
260 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
262 /* Macro to conditionally modify fixed_regs/call_used_regs. */
263 #define CONDITIONAL_REGISTER_USAGE \
267 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
268 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
270 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
274 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
275 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
276 if (TEST_HARD_REG_BIT (x, i)) \
277 fixed_regs[i] = call_used_regs[i] = 1; \
281 /* Return number of consecutive hard regs needed starting at reg REGNO
282 to hold something of mode MODE.
283 This is ordinarily the length in words of a value of mode MODE
284 but can be less for certain modes in special long registers.
286 Actually there are no two word move instructions for consecutive
287 registers. And only registers 0-3 may have mov byte instructions
291 #define HARD_REGNO_NREGS(REGNO, MODE) \
292 (FP_REGNO_P (REGNO) ? 1 \
293 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
295 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
296 On the 80386, the first 4 cpu registers can hold any mode
297 while the floating point registers may hold only floating point.
298 Make it clear that the fp regs could not hold a 16-byte float. */
300 /* The casts to int placate a compiler on a microvax,
301 for cross-compiler testing. */
303 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
306 : FP_REGNO_P (REGNO) \
307 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
308 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
309 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
310 : (int) (MODE) != (int) QImode)
312 /* Value is 1 if it is a good idea to tie two pseudo registers
313 when one has mode MODE1 and one has mode MODE2.
314 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
315 for any hard reg, then this must be 0 for correct output. */
317 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
319 /* A C expression returning the cost of moving data from a register of class
320 CLASS1 to one of CLASS2.
322 On the i386, copying between floating-point and fixed-point
323 registers is expensive. */
325 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
326 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
327 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
330 /* Specify the registers used for certain standard purposes.
331 The values of these macros are register numbers. */
333 /* on the 386 the pc register is %eip, and is not usable as a general
334 register. The ordinary mov instructions won't work */
335 /* #define PC_REGNUM */
337 /* Register to use for pushing function arguments. */
338 #define STACK_POINTER_REGNUM 7
340 /* Base register for access to local variables of the function. */
341 #define FRAME_POINTER_REGNUM 6
343 /* First floating point reg */
344 #define FIRST_FLOAT_REG 8
346 /* First & last stack-like regs */
347 #define FIRST_STACK_REG FIRST_FLOAT_REG
348 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
350 /* Value should be nonzero if functions must have frame pointers.
351 Zero means the frame pointer need not be set up (and parms
352 may be accessed via the stack pointer) in functions that seem suitable.
353 This is computed in `reload', in reload1.c. */
354 #define FRAME_POINTER_REQUIRED 0
356 /* Base register for access to arguments of the function. */
357 #define ARG_POINTER_REGNUM 16
359 /* Register in which static-chain is passed to a function. */
360 #define STATIC_CHAIN_REGNUM 2
362 /* Register to hold the addressing base for position independent
363 code access to data items. */
364 #define PIC_OFFSET_TABLE_REGNUM 3
366 /* Register in which address to store a structure value
367 arrives in the function. On the 386, the prologue
368 copies this from the stack to register %eax. */
369 #define STRUCT_VALUE_INCOMING 0
371 /* Place in which caller passes the structure value address.
372 0 means push the value on the stack like an argument. */
373 #define STRUCT_VALUE 0
375 /* Define the classes of registers for register constraints in the
376 machine description. Also define ranges of constants.
378 One of the classes must always be named ALL_REGS and include all hard regs.
379 If there is more than one class, another class must be named NO_REGS
380 and contain no registers.
382 The name GENERAL_REGS must be the name of a class (or an alias for
383 another name such as ALL_REGS). This is the class of registers
384 that is allowed by "g" or "r" in a register constraint.
385 Also, registers outside this class are allocated only when
386 instructions express preferences for them.
388 The classes must be numbered in nondecreasing order; that is,
389 a larger-numbered class must never be contained completely
390 in a smaller-numbered class.
392 For any two classes, it is very desirable that there be another
393 class that represents their union.
395 It might seem that class BREG is unnecessary, since no useful 386
396 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
397 and the "b" register constraint is useful in asms for syscalls. */
402 AREG
, DREG
, CREG
, BREG
,
403 Q_REGS
, /* %eax %ebx %ecx %edx */
405 INDEX_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp */
406 GENERAL_REGS
, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
407 FP_TOP_REG
, FP_SECOND_REG
, /* %st(0) %st(1) */
409 ALL_REGS
, LIM_REG_CLASSES
412 #define N_REG_CLASSES (int) LIM_REG_CLASSES
414 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
416 /* Give names of register classes as strings for dump file. */
418 #define REG_CLASS_NAMES \
420 "AREG", "DREG", "CREG", "BREG", \
425 "FP_TOP_REG", "FP_SECOND_REG", \
429 /* Define which registers fit in which classes.
430 This is an initializer for a vector of HARD_REG_SET
431 of length N_REG_CLASSES. */
433 #define REG_CLASS_CONTENTS \
435 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
437 0x10, 0x20, /* SIREG, DIREG */ \
438 0x1007f, /* INDEX_REGS */ \
439 0x100ff, /* GENERAL_REGS */ \
440 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
441 0xff00, /* FLOAT_REGS */ \
444 /* The same information, inverted:
445 Return the class number of the smallest class containing
446 reg number REGNO. This could be a conditional expression
447 or could index an array. */
449 extern enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
];
450 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
452 /* When defined, the compiler allows registers explicitly used in the
453 rtl to be used as spill registers but prevents the compiler from
454 extending the lifetime of these registers. */
456 #define SMALL_REGISTER_CLASSES
458 #define QI_REG_P(X) \
459 (REG_P (X) && REGNO (X) < 4)
460 #define NON_QI_REG_P(X) \
461 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
463 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
464 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
466 #define STACK_REG_P(xop) (REG_P (xop) && \
467 REGNO (xop) >= FIRST_STACK_REG && \
468 REGNO (xop) <= LAST_STACK_REG)
470 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
472 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
474 /* Try to maintain the accuracy of the death notes for regs satisfying the
475 following. Important for stack like regs, to know when to pop. */
477 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
479 /* 1 if register REGNO can magically overlap other regs.
480 Note that nonzero values work only in very special circumstances. */
482 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
484 /* The class value for index registers, and the one for base regs. */
486 #define INDEX_REG_CLASS INDEX_REGS
487 #define BASE_REG_CLASS GENERAL_REGS
489 /* Get reg_class from a letter such as appears in the machine description. */
491 #define REG_CLASS_FROM_LETTER(C) \
492 ((C) == 'r' ? GENERAL_REGS : \
493 (C) == 'q' ? Q_REGS : \
494 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
497 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
500 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
503 (C) == 'a' ? AREG : \
504 (C) == 'b' ? BREG : \
505 (C) == 'c' ? CREG : \
506 (C) == 'd' ? DREG : \
507 (C) == 'D' ? DIREG : \
508 (C) == 'S' ? SIREG : NO_REGS)
510 /* The letters I, J, K, L and M in a register constraint string
511 can be used to stand for particular ranges of immediate operands.
512 This macro defines what the ranges are.
513 C is the letter, and VALUE is a constant value.
514 Return 1 if VALUE is in the range specified by C.
516 I is for non-DImode shifts.
517 J is for DImode shifts.
518 K and L are for an `andsi' optimization.
519 M is for shifts that can be executed by the "lea" opcode.
522 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
523 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
524 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
525 (C) == 'K' ? (VALUE) == 0xff : \
526 (C) == 'L' ? (VALUE) == 0xffff : \
527 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
530 /* Similar, but for floating constants, and defining letters G and H.
531 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
532 TARGET_387 isn't set, because the stack register converter may need to
533 load 0.0 into the function value register. */
535 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
536 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
538 /* Place additional restrictions on the register class to use when it
539 is necessary to be able to hold a value of mode MODE in a reload
540 register for which class CLASS would ordinarily be used. */
542 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
543 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
546 /* Given an rtx X being reloaded into a reg required to be
547 in class CLASS, return the class of reg to actually use.
548 In general this is just CLASS; but on some machines
549 in some cases it is preferable to use a more restrictive class.
550 On the 80386 series, we prevent floating constants from being
551 reloaded into floating registers (since no move-insn can do that)
552 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
554 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
555 QImode must go into class Q_REGS.
556 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
557 movdf to do mem-to-mem moves through integer regs. */
559 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
560 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
561 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
562 : ((CLASS) == ALL_REGS \
563 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
566 /* If we are copying between general and FP registers, we need a memory
569 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
570 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
571 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
573 /* Return the maximum number of consecutive registers
574 needed to represent mode MODE in a register of class CLASS. */
575 /* On the 80386, this is the size of MODE in words,
576 except in the FP regs, where a single reg is always enough. */
577 #define CLASS_MAX_NREGS(CLASS, MODE) \
578 (FLOAT_CLASS_P (CLASS) ? 1 : \
579 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
581 /* Stack layout; function entry, exit and calling. */
583 /* Define this if pushing a word on the stack
584 makes the stack pointer a smaller address. */
585 #define STACK_GROWS_DOWNWARD
587 /* Define this if the nominal address of the stack frame
588 is at the high-address end of the local variables;
589 that is, each additional local variable allocated
590 goes at a more negative offset in the frame. */
591 #define FRAME_GROWS_DOWNWARD
593 /* Offset within stack frame to start allocating local variables at.
594 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
595 first local allocated. Otherwise, it is the offset to the BEGINNING
596 of the first local allocated. */
597 #define STARTING_FRAME_OFFSET 0
599 /* If we generate an insn to push BYTES bytes,
600 this says how many the stack pointer really advances by.
601 On 386 pushw decrements by exactly 2 no matter what the position was.
602 On the 386 there is no pushb; we use pushw instead, and this
603 has the effect of rounding up to 2. */
605 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
607 /* Offset of first parameter from the argument pointer register value. */
608 #define FIRST_PARM_OFFSET(FNDECL) 0
610 /* Value is the number of bytes of arguments automatically
611 popped when returning from a subroutine call.
612 FUNTYPE is the data type of the function (as a tree),
613 or for a library call it is an identifier node for the subroutine name.
614 SIZE is the number of bytes of arguments passed on the stack.
616 On the 80386, the RTD insn may be used to pop them if the number
617 of args is fixed, but if the number is variable then the caller
618 must pop them all. RTD can't be used for library calls now
619 because the library is compiled with the Unix compiler.
620 Use of RTD is a selectable option, since it is incompatible with
621 standard Unix calling sequences. If the option is not selected,
622 the caller must always pop the args. */
624 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
625 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
627 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
628 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
629 == void_type_node))) ? (SIZE) \
630 : (aggregate_value_p (TREE_TYPE (FUNTYPE))) ? GET_MODE_SIZE (Pmode) : 0)
632 /* Define how to find the value returned by a function.
633 VALTYPE is the data type of the value (as a tree).
634 If the precise function being called is known, FUNC is its FUNCTION_DECL;
635 otherwise, FUNC is 0. */
636 #define FUNCTION_VALUE(VALTYPE, FUNC) \
637 gen_rtx (REG, TYPE_MODE (VALTYPE), \
638 VALUE_REGNO (TYPE_MODE (VALTYPE)))
640 /* Define how to find the value returned by a library function
641 assuming the value has mode MODE. */
643 #define LIBCALL_VALUE(MODE) \
644 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
646 /* Define the size of the result block used for communication between
647 untyped_call and untyped_return. The block contains a DImode value
648 followed by the block used by fnsave and frstor. */
650 #define APPLY_RESULT_SIZE (8+108)
652 /* 1 if N is a possible register number for function argument passing.
653 On the 80386, no registers are used in this way.
654 *NOTE* -mregparm does not work.
655 It exists only to test register calling conventions. */
657 #define FUNCTION_ARG_REGNO_P(N) 0
659 /* Define a data type for recording info about an argument list
660 during the scan of that argument list. This data type should
661 hold all necessary information about the function itself
662 and about the args processed so far, enough to enable macros
663 such as FUNCTION_ARG to determine where the next arg should go.
665 On the 80386, this is a single integer, which is a number of bytes
666 of arguments scanned so far. */
668 #define CUMULATIVE_ARGS int
670 /* Initialize a variable CUM of type CUMULATIVE_ARGS
671 for a call to a function whose data type is FNTYPE.
672 For a library call, FNTYPE is 0.
674 On the 80386, the offset starts at 0. */
676 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
679 /* Update the data in CUM to advance over an argument
680 of mode MODE and data type TYPE.
681 (TYPE is null for libcalls where that information may not be available.) */
683 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
684 ((CUM) += ((MODE) != BLKmode \
685 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
686 : (int_size_in_bytes (TYPE) + 3) & ~3))
688 /* Define where to put the arguments to a function.
689 Value is zero to push the argument on the stack,
690 or a hard register in which to store the argument.
692 MODE is the argument's machine mode.
693 TYPE is the data type of the argument (as a tree).
694 This is null for libcalls where that information may
696 CUM is a variable of type CUMULATIVE_ARGS which gives info about
697 the preceding args and about the function being called.
698 NAMED is nonzero if this argument is a named parameter
699 (otherwise it is an extra parameter matching an ellipsis). */
702 /* On the 80386 all args are pushed, except if -mregparm is specified
703 then the first two words of arguments are passed in EAX, EDX.
704 *NOTE* -mregparm does not work.
705 It exists only to test register calling conventions. */
707 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
708 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
710 /* For an arg passed partly in registers and partly in memory,
711 this is the number of registers used.
712 For args passed entirely in registers or entirely in memory, zero. */
715 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
716 ((TARGET_REGPARM && (CUM) < 8 \
717 && 8 < ((CUM) + ((MODE) == BLKmode \
718 ? int_size_in_bytes (TYPE) \
719 : GET_MODE_SIZE (MODE)))) \
722 /* This macro generates the assembly code for function entry.
723 FILE is a stdio stream to output the code to.
724 SIZE is an int: how many units of temporary storage to allocate.
725 Refer to the array `regs_ever_live' to determine which registers
726 to save; `regs_ever_live[I]' is nonzero if register number I
727 is ever used in the function. This macro is responsible for
728 knowing which registers should not be saved even if used. */
730 #define FUNCTION_PROLOGUE(FILE, SIZE) \
731 function_prologue (FILE, SIZE)
733 /* Output assembler code to FILE to increment profiler label # LABELNO
734 for profiling a function entry. */
736 #define FUNCTION_PROFILER(FILE, LABELNO) \
740 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
741 LPREFIX, (LABELNO)); \
742 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
746 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
747 fprintf (FILE, "\tcall _mcount\n"); \
751 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
752 the stack pointer does not matter. The value is tested only in
753 functions that have frame pointers.
754 No definition is equivalent to always zero. */
755 /* Note on the 386 it might be more efficient not to define this since
756 we have to restore it ourselves from the frame pointer, in order to
759 #define EXIT_IGNORE_STACK 1
761 /* This macro generates the assembly code for function exit,
762 on machines that need it. If FUNCTION_EPILOGUE is not defined
763 then individual return instructions are generated for each
764 return statement. Args are same as for FUNCTION_PROLOGUE.
766 The function epilogue should not depend on the current stack pointer!
767 It should use the frame pointer only. This is mandatory because
768 of alloca; we also take advantage of it to omit stack adjustments
771 If the last non-note insn in the function is a BARRIER, then there
772 is no need to emit a function prologue, because control does not fall
773 off the end. This happens if the function ends in an "exit" call, or
774 if a `return' insn is emitted directly into the function. */
776 #define FUNCTION_EPILOGUE(FILE, SIZE) \
778 rtx last = get_last_insn (); \
779 if (last && GET_CODE (last) == NOTE) \
780 last = prev_nonnote_insn (last); \
781 if (! last || GET_CODE (last) != BARRIER) \
782 function_epilogue (FILE, SIZE); \
785 /* Output assembler code for a block containing the constant parts
786 of a trampoline, leaving space for the variable parts. */
788 /* On the 386, the trampoline contains three instructions:
792 #define TRAMPOLINE_TEMPLATE(FILE) \
794 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
795 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
796 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
797 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
798 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
799 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
800 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
801 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
804 /* Length in units of the trampoline for entering a nested function. */
806 #define TRAMPOLINE_SIZE 12
808 /* Emit RTL insns to initialize the variable parts of a trampoline.
809 FNADDR is an RTX for the address of the function's pure code.
810 CXT is an RTX for the static chain value for the function. */
812 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
814 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
815 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
818 /* Definitions for register eliminations.
820 This is an array of structures. Each structure initializes one pair
821 of eliminable registers. The "from" register number is given first,
822 followed by "to". Eliminations of the same "from" register are listed
823 in order of preference.
825 We have two registers that can be eliminated on the i386. First, the
826 frame pointer register can often be eliminated in favor of the stack
827 pointer register. Secondly, the argument pointer register can always be
828 eliminated; it is replaced with either the stack or frame pointer. */
830 #define ELIMINABLE_REGS \
831 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
832 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
833 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
835 /* Given FROM and TO register numbers, say whether this elimination is allowed.
836 Frame pointer elimination is automatically handled.
838 For the i386, if frame pointer elimination is being done, we would like to
839 convert ap into sp, not fp.
841 All other eliminations are valid. */
843 #define CAN_ELIMINATE(FROM, TO) \
844 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
845 ? ! frame_pointer_needed \
848 /* Define the offset between two registers, one to be eliminated, and the other
849 its replacement, at the start of a routine. */
851 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
853 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
854 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
860 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
861 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
862 || (current_function_uses_pic_offset_table \
863 && regno == PIC_OFFSET_TABLE_REGNUM)) \
866 (OFFSET) = offset + get_frame_size (); \
868 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
869 (OFFSET) += 4; /* Skip saved PC */ \
873 /* Addressing modes, and classification of registers for them. */
875 /* #define HAVE_POST_INCREMENT */
876 /* #define HAVE_POST_DECREMENT */
878 /* #define HAVE_PRE_DECREMENT */
879 /* #define HAVE_PRE_INCREMENT */
881 /* Macros to check register numbers against specific register classes. */
883 /* These assume that REGNO is a hard or pseudo reg number.
884 They give nonzero only if REGNO is a hard reg of the suitable class
885 or a pseudo reg currently allocated to a suitable hard reg.
886 Since they use reg_renumber, they are safe only once reg_renumber
887 has been allocated, which happens in local-alloc.c. */
889 #define REGNO_OK_FOR_INDEX_P(REGNO) \
890 ((REGNO) < STACK_POINTER_REGNUM \
891 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
893 #define REGNO_OK_FOR_BASE_P(REGNO) \
894 ((REGNO) <= STACK_POINTER_REGNUM \
895 || (REGNO) == ARG_POINTER_REGNUM \
896 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
898 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
899 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
901 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
902 and check its validity for a certain class.
903 We have two alternate definitions for each of them.
904 The usual definition accepts all pseudo regs; the other rejects
905 them unless they have been allocated suitable hard regs.
906 The symbol REG_OK_STRICT causes the latter definition to be used.
908 Most source files want to accept pseudo regs in the hope that
909 they will get allocated to the class that the insn wants them to be in.
910 Source files for reload pass need to be strict.
911 After reload, it makes no difference, since pseudo regs have
912 been eliminated by then. */
914 #ifndef REG_OK_STRICT
916 /* Nonzero if X is a hard reg that can be used as an index or if
917 it is a pseudo reg. */
919 #define REG_OK_FOR_INDEX_P(X) \
920 (REGNO (X) < STACK_POINTER_REGNUM \
921 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
923 /* Nonzero if X is a hard reg that can be used as a base reg
924 of if it is a pseudo reg. */
927 #define REG_OK_FOR_BASE_P(X) \
928 (REGNO (X) <= STACK_POINTER_REGNUM \
929 || REGNO (X) == ARG_POINTER_REGNUM \
930 || REGNO(X) >= FIRST_PSEUDO_REGISTER)
932 #define REG_OK_FOR_STRREG_P(X) \
933 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
937 /* Nonzero if X is a hard reg that can be used as an index. */
938 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
939 /* Nonzero if X is a hard reg that can be used as a base reg. */
940 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
941 #define REG_OK_FOR_STRREG_P(X) \
942 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
946 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
947 that is a valid memory address for an instruction.
948 The MODE argument is the machine mode for the MEM expression
949 that wants to use this address.
951 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
952 except for CONSTANT_ADDRESS_P which is usually machine-independent.
954 See legitimize_pic_address in i386.c for details as to what
955 constitutes a legitimate address when -fpic is used. */
957 #define MAX_REGS_PER_ADDRESS 2
959 #define CONSTANT_ADDRESS_P(X) \
960 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
961 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
962 || GET_CODE (X) == HIGH)
964 /* Nonzero if the constant value X is a legitimate general operand.
965 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
967 #define LEGITIMATE_CONSTANT_P(X) 1
969 #define GO_IF_INDEXABLE_BASE(X, ADDR) \
970 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR
972 #define LEGITIMATE_INDEX_REG_P(X) \
973 (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))
975 /* Return 1 if X is an index or an index times a scale. */
977 #define LEGITIMATE_INDEX_P(X) \
978 (LEGITIMATE_INDEX_REG_P (X) \
979 || (GET_CODE (X) == MULT \
980 && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \
981 && GET_CODE (XEXP (X, 1)) == CONST_INT \
982 && (INTVAL (XEXP (X, 1)) == 2 \
983 || INTVAL (XEXP (X, 1)) == 4 \
984 || INTVAL (XEXP (X, 1)) == 8)))
986 /* Go to ADDR if X is an index term, a base reg, or a sum of those. */
988 #define GO_IF_INDEXING(X, ADDR) \
989 { if (LEGITIMATE_INDEX_P (X)) goto ADDR; \
990 GO_IF_INDEXABLE_BASE (X, ADDR); \
991 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \
992 { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \
993 if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \
994 { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }
996 /* We used to allow this, but it isn't ever used.
997 || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \
998 && REG_P (XEXP (X, 0)) \
999 && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \
1002 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1004 if (CONSTANT_ADDRESS_P (X) \
1005 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \
1007 GO_IF_INDEXING (X, ADDR); \
1008 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1010 rtx x0 = XEXP (X, 0); \
1011 if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \
1012 { GO_IF_INDEXING (x0, ADDR); } \
1013 else if (x0 == pic_offset_table_rtx) \
1015 else if (GET_CODE (x0) == PLUS) \
1017 if (XEXP (x0, 0) == pic_offset_table_rtx) \
1018 { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \
1019 if (XEXP (x0, 1) == pic_offset_table_rtx) \
1020 { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \
1025 /* Try machine-dependent ways of modifying an illegitimate address
1026 to be legitimate. If we find one, return the new, valid address.
1027 This macro is used in only one place: `memory_address' in explow.c.
1029 OLDX is the address as it was before break_out_memory_refs was called.
1030 In some cases it is useful to look at this to decide what needs to be done.
1032 MODE and WIN are passed so that this macro can use
1033 GO_IF_LEGITIMATE_ADDRESS.
1035 It is always safe for this macro to do nothing. It exists to recognize
1036 opportunities to optimize the output.
1038 For the 80386, we handle X+REG by loading X into a register R and
1039 using R+REG. R will go in a general reg and indexing will be used.
1040 However, if REG is a broken-out memory address or multiplication,
1041 nothing needs to be done because REG can certainly go in a general reg.
1043 When -fpic is used, special handling is needed for symbolic references.
1044 See comments by legitimize_pic_address in i386.c for details. */
1046 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1047 { extern rtx legitimize_pic_address (); \
1048 int ch = (X) != (OLDX); \
1049 if (flag_pic && SYMBOLIC_CONST (X)) \
1051 (X) = legitimize_pic_address (X, 0); \
1052 if (memory_address_p (MODE, X)) \
1055 if (GET_CODE (X) == PLUS) \
1056 { if (GET_CODE (XEXP (X, 0)) == MULT) \
1057 ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \
1058 if (GET_CODE (XEXP (X, 1)) == MULT) \
1059 ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \
1060 if (ch && GET_CODE (XEXP (X, 1)) == REG \
1061 && GET_CODE (XEXP (X, 0)) == REG) \
1063 if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \
1064 ch = 1, (X) = legitimize_pic_address (X, 0); \
1065 if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \
1066 if (GET_CODE (XEXP (X, 0)) == REG) \
1067 { register rtx temp = gen_reg_rtx (Pmode); \
1068 register rtx val = force_operand (XEXP (X, 1), temp); \
1069 if (val != temp) emit_move_insn (temp, val); \
1070 XEXP (X, 1) = temp; \
1072 else if (GET_CODE (XEXP (X, 1)) == REG) \
1073 { register rtx temp = gen_reg_rtx (Pmode); \
1074 register rtx val = force_operand (XEXP (X, 0), temp); \
1075 if (val != temp) emit_move_insn (temp, val); \
1076 XEXP (X, 0) = temp; \
1079 /* Nonzero if the constant value X is a legitimate general operand
1080 when generating PIC code. It is given that flag_pic is on and
1081 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1083 #define LEGITIMATE_PIC_OPERAND_P(X) \
1084 (! SYMBOLIC_CONST (X) \
1085 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1087 #define SYMBOLIC_CONST(X) \
1088 (GET_CODE (X) == SYMBOL_REF \
1089 || GET_CODE (X) == LABEL_REF \
1090 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1092 /* Go to LABEL if ADDR (a legitimate address expression)
1093 has an effect that depends on the machine mode it is used for.
1094 On the 80386, only postdecrement and postincrement address depend thus
1095 (the amount of decrement or increment being the length of the operand). */
1096 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1097 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1099 /* Define this macro if references to a symbol must be treated
1100 differently depending on something about the variable or
1101 function named by the symbol (such as what section it is in).
1103 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1104 so that we may access it directly in the GOT. */
1106 #define ENCODE_SECTION_INFO(DECL) \
1111 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1112 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1113 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1114 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1115 || ! TREE_PUBLIC (DECL)); \
1120 /* Initialize data used by insn expanders. This is called from
1121 init_emit, once for each function, before code is generated.
1122 For 386, clear stack slot assignments remembered from previous
1125 #define INIT_EXPANDERS clear_386_stack_locals ()
1127 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1128 codes once the function is being compiled into assembly code, but
1129 not before. (It is not done before, because in the case of
1130 compiling an inline function, it would lead to multiple PIC
1131 prologues being included in functions which used inline functions
1132 and were compiled to assembly language.) */
1134 #define FINALIZE_PIC \
1137 extern int current_function_uses_pic_offset_table; \
1139 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1144 /* Specify the machine mode that this machine uses
1145 for the index in the tablejump instruction. */
1146 #define CASE_VECTOR_MODE Pmode
1148 /* Define this if the tablejump instruction expects the table
1149 to contain offsets from the address of the table.
1150 Do not define this if the table should contain absolute addresses. */
1151 /* #define CASE_VECTOR_PC_RELATIVE */
1153 /* Specify the tree operation to be used to convert reals to integers.
1154 This should be changed to take advantage of fist --wfs ??
1156 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1158 /* This is the kind of divide that is easiest to do in the general case. */
1159 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1161 /* Define this as 1 if `char' should by default be signed; else as 0. */
1162 #define DEFAULT_SIGNED_CHAR 1
1164 /* Max number of bytes we can move from memory to memory
1165 in one reasonably fast instruction. */
1168 /* MOVE_RATIO is the number of move instructions that is better than a
1169 block move. Make this large on i386, since the block move is very
1170 inefficient with small blocks, and the hard register needs of the
1171 block move require much reload work. */
1172 #define MOVE_RATIO 5
1174 /* Define this if zero-extension is slow (more than one real instruction). */
1175 /* #define SLOW_ZERO_EXTEND */
1177 /* Nonzero if access to memory by bytes is slow and undesirable. */
1178 #define SLOW_BYTE_ACCESS 0
1180 /* Define if shifts truncate the shift count
1181 which implies one can omit a sign-extension or zero-extension
1182 of a shift count. */
1183 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1185 /* #define SHIFT_COUNT_TRUNCATED */
1187 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1188 is done just by pretending it is already truncated. */
1189 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1191 /* We assume that the store-condition-codes instructions store 0 for false
1192 and some other value for true. This is the value stored for true. */
1194 #define STORE_FLAG_VALUE 1
1196 /* When a prototype says `char' or `short', really pass an `int'.
1197 (The 386 can't easily push less than an int.) */
1199 #define PROMOTE_PROTOTYPES
1201 /* Specify the machine mode that pointers have.
1202 After generation of rtl, the compiler makes no further distinction
1203 between pointers and any other objects of this machine mode. */
1204 #define Pmode SImode
1206 /* A function address in a call instruction
1207 is a byte address (for indexing purposes)
1208 so give the MEM rtx a byte's mode. */
1209 #define FUNCTION_MODE QImode
1211 /* Define this if addresses of constant functions
1212 shouldn't be put through pseudo regs where they can be cse'd.
1213 Desirable on the 386 because a CALL with a constant address is
1214 not much slower than one with a register address. */
1215 #define NO_FUNCTION_CSE
1217 /* Provide the costs of a rtl expression. This is in the body of a
1220 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1222 return COSTS_N_INSNS (10); \
1227 return COSTS_N_INSNS (40); \
1229 if (GET_CODE (XEXP (X, 0)) == REG \
1230 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1235 /* Compute the cost of computing a constant rtl expression RTX
1236 whose rtx-code is CODE. The body of this macro is a portion
1237 of a switch statement. If the code is computed here,
1238 return it with a return statement. Otherwise, break from the switch. */
1240 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1245 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1246 case CONST_DOUBLE: \
1249 if (GET_MODE (RTX) == VOIDmode) \
1251 code = standard_80387_constant_p (RTX); \
1252 return code == 1 ? 0 : \
1257 /* Compute the cost of an address. This is meant to approximate the size
1258 and/or execution delay of an insn using that address. If the cost is
1259 approximated by the RTL complexity, including CONST_COSTS above, as
1260 is usually the case for CISC machines, this macro should not be defined.
1261 For aggressively RISCy machines, only one insn format is allowed, so
1262 this macro should be a constant. The value of this macro only matters
1263 for valid addresses.
1265 For i386, it is better to use a complex address than let gcc copy
1266 the address into a reg and make a new pseudo. But not if the address
1267 requires to two regs - that would mean more pseudos with longer
1270 #define ADDRESS_COST(RTX) \
1271 ((CONSTANT_P (RTX) \
1272 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1273 && REG_P (XEXP (RTX, 0)))) ? 0 \
1277 /* Add any extra modes needed to represent the condition code.
1279 For the i386, we need separate modes when floating-point equality
1280 comparisons are being done. */
1282 #define EXTRA_CC_MODES CCFPEQmode
1284 /* Define the names for the modes specified above. */
1285 #define EXTRA_CC_NAMES "CCFPEQ"
1287 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1288 return the mode to be used for the comparison.
1290 For floating-point equality comparisons, CCFPEQmode should be used.
1291 VOIDmode should be used in all other cases. */
1293 #define SELECT_CC_MODE(OP,X,Y) \
1294 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1295 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1297 /* Define the information needed to generate branch and scc insns. This is
1298 stored from the compare operation. Note that we can't use "rtx" here
1299 since it hasn't been defined! */
1301 extern struct rtx_def
*i386_compare_op0
, *i386_compare_op1
;
1302 extern struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
1304 /* Tell final.c how to eliminate redundant test instructions. */
1306 /* Here we define machine-dependent flags and fields in cc_status
1307 (see `conditions.h'). */
1309 /* Set if the cc value is actually in the 80387, so a floating point
1310 conditional branch must be output. */
1311 #define CC_IN_80387 04000
1313 /* Set if the CC value was stored in a nonstandard way, so that
1314 the state of equality is indicated by zero in the carry bit. */
1315 #define CC_Z_IN_NOT_C 010000
1317 /* Store in cc_status the expressions
1318 that the condition codes will describe
1319 after execution of an instruction whose pattern is EXP.
1320 Do not alter them if the instruction would not alter the cc's. */
1322 #define NOTICE_UPDATE_CC(EXP, INSN) \
1323 notice_update_cc((EXP))
1325 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1326 FLOAT following a floating point comparison.
1327 Use NO_OV following an arithmetic insn that set the cc's
1328 before a test insn that was deleted.
1329 NO_OV may be zero, meaning final should reinsert the test insn
1330 because the jump cannot be handled properly without it. */
1332 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1334 if (cc_prev_status.flags & CC_IN_80387) \
1336 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1341 /* Control the assembler format that we output, to the extent
1342 this does not vary between assemblers. */
1344 /* How to refer to registers in assembler output.
1345 This sequence is indexed by compiler's hard-register-number (see above). */
1347 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1348 For non floating point regs, the following are the HImode names.
1350 For float regs, the stack top is sometimes referred to as "%st(0)"
1351 instead of just "%st". PRINT_REG handles this with the "y" code. */
1353 #define HI_REGISTER_NAMES \
1354 {"ax","dx","cx","bx","si","di","bp","sp", \
1355 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1357 #define REGISTER_NAMES HI_REGISTER_NAMES
1359 /* Table of additional register names to use in user input. */
1361 #define ADDITIONAL_REGISTER_NAMES \
1362 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1363 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1364 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1365 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1367 /* Note we are omitting these since currently I don't know how
1368 to get gcc to use these, since they want the same but different
1369 number as al, and ax.
1372 /* note the last four are not really qi_registers, but
1373 the md will have to never output movb into one of them
1374 only a movw . There is no movb into the last four regs */
1376 #define QI_REGISTER_NAMES \
1377 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1379 /* These parallel the array above, and can be used to access bits 8:15
1380 of regs 0 through 3. */
1382 #define QI_HIGH_REGISTER_NAMES \
1383 {"ah", "dh", "ch", "bh", }
1385 /* How to renumber registers for dbx and gdb. */
1387 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1388 #define DBX_REGISTER_NUMBER(n) \
1399 /* This is how to output the definition of a user-level label named NAME,
1400 such as the label on a static function or variable NAME. */
1402 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1403 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1405 /* This is how to output an assembler line defining a `double' constant. */
1407 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1409 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1410 if (sizeof (int) == sizeof (long)) \
1411 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
1413 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1416 /* This is how to output a `long double' extended real constant. */
1418 #undef ASM_OUTPUT_LONG_DOUBLE
1419 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1421 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1422 if (sizeof (int) == sizeof (long)) \
1423 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
1425 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1428 /* This is how to output an assembler line defining a `float' constant. */
1430 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1432 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1433 if (sizeof (int) == sizeof (long)) \
1434 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
1436 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1439 /* Store in OUTPUT a string (made with alloca) containing
1440 an assembler-name for a local static variable named NAME.
1441 LABELNO is an integer which is different for each call. */
1443 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1444 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1445 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1449 /* This is how to output an assembler line defining an `int' constant. */
1451 #define ASM_OUTPUT_INT(FILE,VALUE) \
1452 ( fprintf (FILE, "%s ", ASM_LONG), \
1453 output_addr_const (FILE,(VALUE)), \
1456 /* Likewise for `char' and `short' constants. */
1457 /* is this supposed to do align too?? */
1459 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1460 ( fprintf (FILE, "%s ", ASM_SHORT), \
1461 output_addr_const (FILE,(VALUE)), \
1465 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1466 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1467 output_addr_const (FILE,(VALUE)), \
1468 fputs (",", FILE), \
1469 output_addr_const (FILE,(VALUE)), \
1470 fputs (" >> 8\n",FILE))
1474 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1475 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1476 output_addr_const (FILE, (VALUE)), \
1479 /* This is how to output an assembler line for a numeric constant byte. */
1481 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1482 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1484 /* This is how to output an insn to push a register on the stack.
1485 It need not be very fast code. */
1487 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1488 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1490 /* This is how to output an insn to pop a register from the stack.
1491 It need not be very fast code. */
1493 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1494 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1496 /* This is how to output an element of a case-vector that is absolute.
1499 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1500 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1502 /* This is how to output an element of a case-vector that is relative.
1503 We don't use these on the 386 yet, because the ATT assembler can't do
1504 forward reference the differences.
1507 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1508 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1510 /* Define the parentheses used to group arithmetic operations
1511 in assembler code. */
1513 #define ASM_OPEN_PAREN ""
1514 #define ASM_CLOSE_PAREN ""
1516 /* Define results of standard character escape sequences. */
1517 #define TARGET_BELL 007
1518 #define TARGET_BS 010
1519 #define TARGET_TAB 011
1520 #define TARGET_NEWLINE 012
1521 #define TARGET_VT 013
1522 #define TARGET_FF 014
1523 #define TARGET_CR 015
1525 /* Print operand X (an rtx) in assembler syntax to file FILE.
1526 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1527 The CODE z takes the size of operand from the following digit, and
1528 outputs b,w,or l respectively.
1530 On the 80386, we use several such letters:
1531 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1532 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1533 R -- print the prefix for register names.
1534 z -- print the opcode suffix for the size of the current operand.
1535 * -- print a star (in certain assembler syntax)
1536 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1537 b -- print the operand as if it's a byte (QImode) even if it isn't.
1538 c -- don't print special prefixes before constant operands. */
1540 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1543 /* Print the name of a register based on its machine mode and number.
1544 If CODE is 'w', pretend the mode is HImode.
1545 If CODE is 'b', pretend the mode is QImode.
1546 If CODE is 'k', pretend the mode is SImode.
1547 If CODE is 'h', pretend the reg is the `high' byte register.
1548 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1550 extern char *hi_reg_name
[];
1551 extern char *qi_reg_name
[];
1552 extern char *qi_high_reg_name
[];
1554 #define PRINT_REG(X, CODE, FILE) \
1555 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1557 fprintf (FILE, "%s", RP); \
1558 switch ((CODE == 'w' ? 2 \
1563 : GET_MODE_SIZE (GET_MODE (X)))) \
1566 if (STACK_TOP_P (X)) \
1568 fputs ("st(0)", FILE); \
1574 if (! FP_REG_P (X)) fputs ("e", FILE); \
1576 fputs (hi_reg_name[REGNO (X)], FILE); \
1579 fputs (qi_reg_name[REGNO (X)], FILE); \
1582 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1587 #define PRINT_OPERAND(FILE, X, CODE) \
1588 print_operand (FILE, X, CODE)
1590 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1591 print_operand_address (FILE, ADDR)
1593 /* Print the name of a register for based on its machine mode and number.
1594 This macro is used to print debugging output.
1595 This macro is different from PRINT_REG in that it may be used in
1596 programs that are not linked with aux-output.o. */
1598 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1599 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1600 static char *qi_name[] = QI_REGISTER_NAMES; \
1601 fprintf (FILE, "%d %s", REGNO (X), RP); \
1602 if (REGNO (X) == ARG_POINTER_REGNUM) \
1603 { fputs ("argp", FILE); break; } \
1604 if (STACK_TOP_P (X)) \
1605 { fputs ("st(0)", FILE); break; } \
1607 { fputs (hi_name[REGNO(X)], FILE); break; } \
1608 switch (GET_MODE_SIZE (GET_MODE (X))) \
1611 fputs ("e", FILE); \
1613 fputs (hi_name[REGNO (X)], FILE); \
1616 fputs (qi_name[REGNO (X)], FILE); \
1621 /* Output the prefix for an immediate operand, or for an offset operand. */
1622 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1623 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1625 /* Routines in libgcc that return floats must return them in an fp reg,
1626 just as other functions do which return such values.
1627 These macros make that happen. */
1629 #define FLOAT_VALUE_TYPE float
1630 #define INTIFY(FLOATVAL) FLOATVAL
1632 /* Nonzero if INSN magically clobbers register REGNO. */
1634 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1635 (FP_REGNO_P (REGNO) \
1636 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1639 /* a letter which is not needed by the normal asm syntax, which
1640 we can use for operand syntax in the extended asm */
1642 #define ASM_OPERAND_LETTER '#'
1644 #define RET return ""
1645 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
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