1 /* Subroutines for insn-output.c for Intel X86.
2 Copyright (C) 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
38 #ifdef EXTRA_CONSTRAINT
39 /* If EXTRA_CONSTRAINT is defined, then the 'S'
40 constraint in REG_CLASS_FROM_LETTER will no longer work, and various
41 asm statements that need 'S' for class SIREG will break. */
42 error EXTRA_CONSTRAINT conflicts with S constraint letter
43 /* The previous line used to be #error, but some compilers barf
44 even if the conditional was untrue. */
47 #define AT_BP(mode) (gen_rtx (MEM, (mode), frame_pointer_rtx))
49 extern FILE *asm_out_file
;
50 extern char *strcat ();
52 char *singlemove_string ();
53 char *output_move_const_single ();
54 char *output_fp_cc0_set ();
56 char *hi_reg_name
[] = HI_REGISTER_NAMES
;
57 char *qi_reg_name
[] = QI_REGISTER_NAMES
;
58 char *qi_high_reg_name
[] = QI_HIGH_REGISTER_NAMES
;
60 /* Array of the smallest class containing reg number REGNO, indexed by
61 REGNO. Used by REGNO_REG_CLASS in i386.h. */
63 enum reg_class regclass_map
[FIRST_PSEUDO_REGISTER
] =
66 AREG
, DREG
, CREG
, BREG
,
68 SIREG
, DIREG
, INDEX_REGS
, GENERAL_REGS
,
70 FP_TOP_REG
, FP_SECOND_REG
, FLOAT_REGS
, FLOAT_REGS
,
71 FLOAT_REGS
, FLOAT_REGS
, FLOAT_REGS
, FLOAT_REGS
,
76 /* Test and compare insns in i386.md store the information needed to
77 generate branch and scc insns here. */
79 struct rtx_def
*i386_compare_op0
= NULL_RTX
;
80 struct rtx_def
*i386_compare_op1
= NULL_RTX
;
81 struct rtx_def
*(*i386_compare_gen
)(), *(*i386_compare_gen_eq
)();
83 /* Register allocation order */
84 char *i386_reg_alloc_order
;
85 static char regs_allocated
[FIRST_PSEUDO_REGISTER
];
87 /* # of registers to use to pass arguments. */
88 char *i386_regparm_string
; /* # registers to use to pass args */
89 int i386_regparm
; /* i386_regparm_string as a number */
91 /* Alignment to use for loops and jumps */
92 char *i386_align_loops_string
; /* power of two alignment for loops */
93 char *i386_align_jumps_string
; /* power of two alignment for non-loop jumps */
94 char *i386_align_funcs_string
; /* power of two alignment for functions */
96 int i386_align_loops
; /* power of two alignment for loops */
97 int i386_align_jumps
; /* power of two alignment for non-loop jumps */
98 int i386_align_funcs
; /* power of two alignment for functions */
101 /* Sometimes certain combinations of command options do not make
102 sense on a particular target machine. You can define a macro
103 `OVERRIDE_OPTIONS' to take account of this. This macro, if
104 defined, is executed once just after all the command options have
107 Don't use this macro to turn on various extra optimizations for
108 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
117 #ifdef SUBTARGET_OVERRIDE_OPTIONS
118 SUBTARGET_OVERRIDE_OPTIONS
;
121 /* Validate registers in register allocation order */
122 if (i386_reg_alloc_order
)
124 for (i
= 0; (ch
= i386_reg_alloc_order
[i
]) != '\0'; i
++)
128 case 'a': regno
= 0; break;
129 case 'd': regno
= 1; break;
130 case 'c': regno
= 2; break;
131 case 'b': regno
= 3; break;
132 case 'S': regno
= 4; break;
133 case 'D': regno
= 5; break;
134 case 'B': regno
= 6; break;
136 default: fatal ("Register '%c' is unknown", ch
);
139 if (regs_allocated
[regno
])
140 fatal ("Register '%c' was already specified in the allocation order", ch
);
142 regs_allocated
[regno
] = 1;
146 /* Validate -mregparm= value */
147 if (i386_regparm_string
)
149 i386_regparm
= atoi (i386_regparm_string
);
150 if (i386_regparm
< 0 || i386_regparm
> REGPARM_MAX
)
151 fatal ("-mregparm=%d is not between 0 and %d", i386_regparm
, REGPARM_MAX
);
154 def_align
= (TARGET_386
) ? 2 : 4;
156 /* Validate -malign-loops= value, or provide default */
157 if (i386_align_loops_string
)
159 i386_align_loops
= atoi (i386_align_loops_string
);
160 if (i386_align_loops
< 0 || i386_align_loops
> MAX_CODE_ALIGN
)
161 fatal ("-malign-loops=%d is not between 0 and %d",
162 i386_align_loops
, MAX_CODE_ALIGN
);
165 i386_align_loops
= 2;
167 /* Validate -malign-jumps= value, or provide default */
168 if (i386_align_jumps_string
)
170 i386_align_jumps
= atoi (i386_align_jumps_string
);
171 if (i386_align_jumps
< 0 || i386_align_jumps
> MAX_CODE_ALIGN
)
172 fatal ("-malign-jumps=%d is not between 0 and %d",
173 i386_align_jumps
, MAX_CODE_ALIGN
);
176 i386_align_jumps
= def_align
;
178 /* Validate -malign-functions= value, or provide default */
179 if (i386_align_funcs_string
)
181 i386_align_funcs
= atoi (i386_align_funcs_string
);
182 if (i386_align_funcs
< 0 || i386_align_funcs
> MAX_CODE_ALIGN
)
183 fatal ("-malign-functions=%d is not between 0 and %d",
184 i386_align_funcs
, MAX_CODE_ALIGN
);
187 i386_align_funcs
= def_align
;
190 /* A C statement (sans semicolon) to choose the order in which to
191 allocate hard registers for pseudo-registers local to a basic
194 Store the desired register order in the array `reg_alloc_order'.
195 Element 0 should be the register to allocate first; element 1, the
196 next register; and so on.
198 The macro body should not assume anything about the contents of
199 `reg_alloc_order' before execution of the macro.
201 On most machines, it is not necessary to define this macro. */
204 order_regs_for_local_alloc ()
206 int i
, ch
, order
, regno
;
208 /* User specified the register allocation order */
209 if (i386_reg_alloc_order
)
211 for (i
= order
= 0; (ch
= i386_reg_alloc_order
[i
]) != '\0'; i
++)
215 case 'a': regno
= 0; break;
216 case 'd': regno
= 1; break;
217 case 'c': regno
= 2; break;
218 case 'b': regno
= 3; break;
219 case 'S': regno
= 4; break;
220 case 'D': regno
= 5; break;
221 case 'B': regno
= 6; break;
224 reg_alloc_order
[order
++] = regno
;
227 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
229 if (!regs_allocated
[i
])
230 reg_alloc_order
[order
++] = i
;
234 /* If users did not specify a register allocation order, favor eax
235 normally except if DImode variables are used, in which case
236 favor edx before eax, which seems to cause less spill register
237 not found messages. */
242 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
243 reg_alloc_order
[i
] = i
;
249 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
251 if (GET_CODE (insn
) == INSN
)
254 rtx pattern
= PATTERN (insn
);
256 if (GET_CODE (pattern
) == SET
)
259 else if ((GET_CODE (pattern
) == PARALLEL
260 || GET_CODE (pattern
) == SEQUENCE
)
261 && GET_CODE (XVECEXP (pattern
, 0, 0)) == SET
)
262 set
= XVECEXP (pattern
, 0, 0);
264 if (set
&& GET_MODE (SET_SRC (set
)) == DImode
)
274 reg_alloc_order
[0] = 1; /* edx */
275 reg_alloc_order
[1] = 2; /* ecx */
276 reg_alloc_order
[2] = 0; /* eax */
283 /* Return nonzero if IDENTIFIER with arguments ARGS is a valid machine specific
284 attribute for DECL. The attributes in ATTRIBUTES have previously been
288 i386_valid_decl_attribute_p (decl
, attributes
, identifier
, args
)
297 /* Return nonzero if IDENTIFIER with arguments ARGS is a valid machine specific
298 attribute for TYPE. The attributes in ATTRIBUTES have previously been
302 i386_valid_type_attribute_p (type
, attributes
, identifier
, args
)
308 if (TREE_CODE (type
) != FUNCTION_TYPE
309 && TREE_CODE (type
) != FIELD_DECL
310 && TREE_CODE (type
) != TYPE_DECL
)
313 /* Stdcall attribute says callee is responsible for popping arguments
314 if they are not variable. */
315 if (is_attribute_p ("stdcall", identifier
))
316 return (args
== NULL_TREE
);
318 /* Cdecl attribute says the callee is a normal C declaration */
319 if (is_attribute_p ("cdecl", identifier
))
320 return (args
== NULL_TREE
);
322 /* Regparm attribute specifies how many integer arguments are to be
323 passed in registers */
324 if (is_attribute_p ("regparm", identifier
))
328 if (!args
|| TREE_CODE (args
) != TREE_LIST
329 || TREE_CHAIN (args
) != NULL_TREE
330 || TREE_VALUE (args
) == NULL_TREE
)
333 cst
= TREE_VALUE (args
);
334 if (TREE_CODE (cst
) != INTEGER_CST
)
337 if (TREE_INT_CST_HIGH (cst
) != 0
338 || TREE_INT_CST_LOW (cst
) < 0
339 || TREE_INT_CST_LOW (cst
) > REGPARM_MAX
)
348 /* Return 0 if the attributes for two types are incompatible, 1 if they
349 are compatible, and 2 if they are nearly compatible (which causes a
350 warning to be generated). */
353 i386_comp_type_attributes (type1
, type2
)
361 /* Value is the number of bytes of arguments automatically
362 popped when returning from a subroutine call.
363 FUNDECL is the declaration node of the function (as a tree),
364 FUNTYPE is the data type of the function (as a tree),
365 or for a library call it is an identifier node for the subroutine name.
366 SIZE is the number of bytes of arguments passed on the stack.
368 On the 80386, the RTD insn may be used to pop them if the number
369 of args is fixed, but if the number is variable then the caller
370 must pop them all. RTD can't be used for library calls now
371 because the library is compiled with the Unix compiler.
372 Use of RTD is a selectable option, since it is incompatible with
373 standard Unix calling sequences. If the option is not selected,
374 the caller must always pop the args.
376 The attribute stdcall is equivalent to RTD on a per module basis. */
379 i386_return_pops_args (fundecl
, funtype
, size
)
384 int rtd
= TARGET_RTD
;
386 if (TREE_CODE (funtype
) == IDENTIFIER_NODE
)
389 /* Cdecl functions override -mrtd, and never pop the stack */
390 if (lookup_attribute ("cdecl", TYPE_ATTRIBUTES (funtype
)))
393 /* Stdcall functions will pop the stack if not variable args */
394 if (lookup_attribute ("stdcall", TYPE_ATTRIBUTES (funtype
)))
399 if (TYPE_ARG_TYPES (funtype
) == NULL_TREE
400 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (funtype
))) == void_type_node
))
403 if (aggregate_value_p (TREE_TYPE (funtype
)))
404 return GET_MODE_SIZE (Pmode
);
411 /* Argument support functions. */
413 /* Initialize a variable CUM of type CUMULATIVE_ARGS
414 for a call to a function whose data type is FNTYPE.
415 For a library call, FNTYPE is 0. */
418 init_cumulative_args (cum
, fntype
, libname
)
419 CUMULATIVE_ARGS
*cum
; /* argument info to initialize */
420 tree fntype
; /* tree ptr for function decl */
421 rtx libname
; /* SYMBOL_REF of library name or 0 */
423 static CUMULATIVE_ARGS zero_cum
;
424 tree param
, next_param
;
426 if (TARGET_DEBUG_ARG
)
428 fprintf (stderr
, "\ninit_cumulative_args (");
431 tree ret_type
= TREE_TYPE (fntype
);
432 fprintf (stderr
, "fntype code = %s, ret code = %s",
433 tree_code_name
[ (int)TREE_CODE (fntype
) ],
434 tree_code_name
[ (int)TREE_CODE (ret_type
) ]);
437 fprintf (stderr
, "no fntype");
440 fprintf (stderr
, ", libname = %s", XSTR (libname
, 0));
445 /* Set up the number of registers to use for passing arguments. */
446 cum
->nregs
= i386_regparm
;
449 tree attr
= lookup_attribute ("regparm", TYPE_ATTRIBUTES (fntype
));
451 cum
->nregs
= TREE_INT_CST_LOW (TREE_VALUE (TREE_VALUE (attr
)));
454 /* Determine if this function has variable arguments. This is
455 indicated by the last argument being 'void_type_mode' if there
456 are no variable arguments. If there are variable arguments, then
457 we won't pass anything in registers */
461 for (param
= (fntype
) ? TYPE_ARG_TYPES (fntype
) : 0;
465 next_param
= TREE_CHAIN (param
);
466 if (next_param
== (tree
)0 && TREE_VALUE (param
) != void_type_node
)
471 if (TARGET_DEBUG_ARG
)
472 fprintf (stderr
, ", nregs=%d )\n", cum
->nregs
);
477 /* Update the data in CUM to advance over an argument
478 of mode MODE and data type TYPE.
479 (TYPE is null for libcalls where that information may not be available.) */
482 function_arg_advance (cum
, mode
, type
, named
)
483 CUMULATIVE_ARGS
*cum
; /* current arg information */
484 enum machine_mode mode
; /* current arg mode */
485 tree type
; /* type of the argument or 0 if lib support */
486 int named
; /* whether or not the argument was named */
488 int bytes
= (mode
== BLKmode
) ? int_size_in_bytes (type
) : GET_MODE_SIZE (mode
);
489 int words
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
491 if (TARGET_DEBUG_ARG
)
493 "function_adv( size=%d, words=%2d, nregs=%d, mode=%4s, named=%d )\n\n",
494 words
, cum
->words
, cum
->nregs
, GET_MODE_NAME (mode
), named
);
509 /* Define where to put the arguments to a function.
510 Value is zero to push the argument on the stack,
511 or a hard register in which to store the argument.
513 MODE is the argument's machine mode.
514 TYPE is the data type of the argument (as a tree).
515 This is null for libcalls where that information may
517 CUM is a variable of type CUMULATIVE_ARGS which gives info about
518 the preceding args and about the function being called.
519 NAMED is nonzero if this argument is a named parameter
520 (otherwise it is an extra parameter matching an ellipsis). */
523 function_arg (cum
, mode
, type
, named
)
524 CUMULATIVE_ARGS
*cum
; /* current arg information */
525 enum machine_mode mode
; /* current arg mode */
526 tree type
; /* type of the argument or 0 if lib support */
527 int named
; /* != 0 for normal args, == 0 for ... args */
530 int bytes
= (mode
== BLKmode
) ? int_size_in_bytes (type
) : GET_MODE_SIZE (mode
);
531 int words
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
535 default: /* for now, pass fp/complex values on the stack */
543 if (words
<= cum
->nregs
)
544 ret
= gen_rtx (REG
, mode
, cum
->regno
);
548 if (TARGET_DEBUG_ARG
)
551 "function_arg( size=%d, words=%2d, nregs=%d, mode=%4s, named=%d",
552 words
, cum
->words
, cum
->nregs
, GET_MODE_NAME (mode
), named
);
555 fprintf (stderr
, ", reg=%%e%s", reg_names
[ REGNO(ret
) ]);
557 fprintf (stderr
, ", stack");
559 fprintf (stderr
, " )\n");
565 /* For an arg passed partly in registers and partly in memory,
566 this is the number of registers used.
567 For args passed entirely in registers or entirely in memory, zero. */
570 function_arg_partial_nregs (cum
, mode
, type
, named
)
571 CUMULATIVE_ARGS
*cum
; /* current arg information */
572 enum machine_mode mode
; /* current arg mode */
573 tree type
; /* type of the argument or 0 if lib support */
574 int named
; /* != 0 for normal args, == 0 for ... args */
580 /* Output an insn whose source is a 386 integer register. SRC is the
581 rtx for the register, and TEMPLATE is the op-code template. SRC may
582 be either SImode or DImode.
584 The template will be output with operands[0] as SRC, and operands[1]
585 as a pointer to the top of the 386 stack. So a call from floatsidf2
586 would look like this:
588 output_op_from_reg (operands[1], AS1 (fild%z0,%1));
590 where %z0 corresponds to the caller's operands[1], and is used to
591 emit the proper size suffix.
593 ??? Extend this to handle HImode - a 387 can load and store HImode
597 output_op_from_reg (src
, template)
602 int size
= GET_MODE_SIZE (GET_MODE (src
));
605 xops
[1] = AT_SP (Pmode
);
606 xops
[2] = GEN_INT (size
);
607 xops
[3] = stack_pointer_rtx
;
609 if (size
> UNITS_PER_WORD
)
612 if (size
> 2 * UNITS_PER_WORD
)
614 high
= gen_rtx (REG
, SImode
, REGNO (src
) + 2);
615 output_asm_insn (AS1 (push
%L0
,%0), &high
);
617 high
= gen_rtx (REG
, SImode
, REGNO (src
) + 1);
618 output_asm_insn (AS1 (push
%L0
,%0), &high
);
620 output_asm_insn (AS1 (push
%L0
,%0), &src
);
622 output_asm_insn (template, xops
);
624 output_asm_insn (AS2 (add
%L3
,%2,%3), xops
);
627 /* Output an insn to pop an value from the 387 top-of-stack to 386
628 register DEST. The 387 register stack is popped if DIES is true. If
629 the mode of DEST is an integer mode, a `fist' integer store is done,
630 otherwise a `fst' float store is done. */
633 output_to_reg (dest
, dies
)
638 int size
= GET_MODE_SIZE (GET_MODE (dest
));
640 xops
[0] = AT_SP (Pmode
);
641 xops
[1] = stack_pointer_rtx
;
642 xops
[2] = GEN_INT (size
);
645 output_asm_insn (AS2 (sub
%L1
,%2,%1), xops
);
647 if (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_INT
)
650 output_asm_insn (AS1 (fistp
%z3
,%y0
), xops
);
652 output_asm_insn (AS1 (fist
%z3
,%y0
), xops
);
654 else if (GET_MODE_CLASS (GET_MODE (dest
)) == MODE_FLOAT
)
657 output_asm_insn (AS1 (fstp
%z3
,%y0
), xops
);
660 if (GET_MODE (dest
) == XFmode
)
662 output_asm_insn (AS1 (fstp
%z3
,%y0
), xops
);
663 output_asm_insn (AS1 (fld
%z3
,%y0
), xops
);
666 output_asm_insn (AS1 (fst
%z3
,%y0
), xops
);
672 output_asm_insn (AS1 (pop
%L0
,%0), &dest
);
674 if (size
> UNITS_PER_WORD
)
676 dest
= gen_rtx (REG
, SImode
, REGNO (dest
) + 1);
677 output_asm_insn (AS1 (pop
%L0
,%0), &dest
);
678 if (size
> 2 * UNITS_PER_WORD
)
680 dest
= gen_rtx (REG
, SImode
, REGNO (dest
) + 1);
681 output_asm_insn (AS1 (pop
%L0
,%0), &dest
);
687 singlemove_string (operands
)
691 if (GET_CODE (operands
[0]) == MEM
692 && GET_CODE (x
= XEXP (operands
[0], 0)) == PRE_DEC
)
694 if (XEXP (x
, 0) != stack_pointer_rtx
)
698 else if (GET_CODE (operands
[1]) == CONST_DOUBLE
)
700 return output_move_const_single (operands
);
702 else if (GET_CODE (operands
[0]) == REG
|| GET_CODE (operands
[1]) == REG
)
703 return AS2 (mov
%L0
,%1,%0);
704 else if (CONSTANT_P (operands
[1]))
705 return AS2 (mov
%L0
,%1,%0);
708 output_asm_insn ("push%L1 %1", operands
);
713 /* Return a REG that occurs in ADDR with coefficient 1.
714 ADDR can be effectively incremented by incrementing REG. */
720 while (GET_CODE (addr
) == PLUS
)
722 if (GET_CODE (XEXP (addr
, 0)) == REG
)
723 addr
= XEXP (addr
, 0);
724 else if (GET_CODE (XEXP (addr
, 1)) == REG
)
725 addr
= XEXP (addr
, 1);
726 else if (CONSTANT_P (XEXP (addr
, 0)))
727 addr
= XEXP (addr
, 1);
728 else if (CONSTANT_P (XEXP (addr
, 1)))
729 addr
= XEXP (addr
, 0);
733 if (GET_CODE (addr
) == REG
)
739 /* Output an insn to add the constant N to the register X. */
750 output_asm_insn (AS1 (dec
%L0
,%0), xops
);
752 output_asm_insn (AS1 (inc
%L0
,%0), xops
);
755 xops
[1] = GEN_INT (-n
);
756 output_asm_insn (AS2 (sub
%L0
,%1,%0), xops
);
760 xops
[1] = GEN_INT (n
);
761 output_asm_insn (AS2 (add
%L0
,%1,%0), xops
);
766 /* Output assembler code to perform a doubleword move insn
767 with operands OPERANDS. */
770 output_move_double (operands
)
773 enum {REGOP
, OFFSOP
, MEMOP
, PUSHOP
, POPOP
, CNSTOP
, RNDOP
} optype0
, optype1
;
777 rtx addreg0
= 0, addreg1
= 0;
778 int dest_overlapped_low
= 0;
779 int size
= GET_MODE_SIZE (GET_MODE (operands
[0]));
784 /* First classify both operands. */
786 if (REG_P (operands
[0]))
788 else if (offsettable_memref_p (operands
[0]))
790 else if (GET_CODE (XEXP (operands
[0], 0)) == POST_INC
)
792 else if (GET_CODE (XEXP (operands
[0], 0)) == PRE_DEC
)
794 else if (GET_CODE (operands
[0]) == MEM
)
799 if (REG_P (operands
[1]))
801 else if (CONSTANT_P (operands
[1]))
803 else if (offsettable_memref_p (operands
[1]))
805 else if (GET_CODE (XEXP (operands
[1], 0)) == POST_INC
)
807 else if (GET_CODE (XEXP (operands
[1], 0)) == PRE_DEC
)
809 else if (GET_CODE (operands
[1]) == MEM
)
814 /* Check for the cases that the operand constraints are not
815 supposed to allow to happen. Abort if we get one,
816 because generating code for these cases is painful. */
818 if (optype0
== RNDOP
|| optype1
== RNDOP
)
821 /* If one operand is decrementing and one is incrementing
822 decrement the former register explicitly
823 and change that operand into ordinary indexing. */
825 if (optype0
== PUSHOP
&& optype1
== POPOP
)
827 /* ??? Can this ever happen on i386? */
828 operands
[0] = XEXP (XEXP (operands
[0], 0), 0);
829 asm_add (-size
, operands
[0]);
830 if (GET_MODE (operands
[1]) == XFmode
)
831 operands
[0] = gen_rtx (MEM
, XFmode
, operands
[0]);
832 else if (GET_MODE (operands
[0]) == DFmode
)
833 operands
[0] = gen_rtx (MEM
, DFmode
, operands
[0]);
835 operands
[0] = gen_rtx (MEM
, DImode
, operands
[0]);
839 if (optype0
== POPOP
&& optype1
== PUSHOP
)
841 /* ??? Can this ever happen on i386? */
842 operands
[1] = XEXP (XEXP (operands
[1], 0), 0);
843 asm_add (-size
, operands
[1]);
844 if (GET_MODE (operands
[1]) == XFmode
)
845 operands
[1] = gen_rtx (MEM
, XFmode
, operands
[1]);
846 else if (GET_MODE (operands
[1]) == DFmode
)
847 operands
[1] = gen_rtx (MEM
, DFmode
, operands
[1]);
849 operands
[1] = gen_rtx (MEM
, DImode
, operands
[1]);
853 /* If an operand is an unoffsettable memory ref, find a register
854 we can increment temporarily to make it refer to the second word. */
856 if (optype0
== MEMOP
)
857 addreg0
= find_addr_reg (XEXP (operands
[0], 0));
859 if (optype1
== MEMOP
)
860 addreg1
= find_addr_reg (XEXP (operands
[1], 0));
862 /* Ok, we can do one word at a time.
863 Normally we do the low-numbered word first,
864 but if either operand is autodecrementing then we
865 do the high-numbered word first.
867 In either case, set up in LATEHALF the operands to use
868 for the high-numbered word and in some cases alter the
869 operands in OPERANDS to be suitable for the low-numbered word. */
873 if (optype0
== REGOP
)
875 middlehalf
[0] = gen_rtx (REG
, SImode
, REGNO (operands
[0]) + 1);
876 latehalf
[0] = gen_rtx (REG
, SImode
, REGNO (operands
[0]) + 2);
878 else if (optype0
== OFFSOP
)
880 middlehalf
[0] = adj_offsettable_operand (operands
[0], 4);
881 latehalf
[0] = adj_offsettable_operand (operands
[0], 8);
885 middlehalf
[0] = operands
[0];
886 latehalf
[0] = operands
[0];
889 if (optype1
== REGOP
)
891 middlehalf
[1] = gen_rtx (REG
, SImode
, REGNO (operands
[1]) + 1);
892 latehalf
[1] = gen_rtx (REG
, SImode
, REGNO (operands
[1]) + 2);
894 else if (optype1
== OFFSOP
)
896 middlehalf
[1] = adj_offsettable_operand (operands
[1], 4);
897 latehalf
[1] = adj_offsettable_operand (operands
[1], 8);
899 else if (optype1
== CNSTOP
)
901 if (GET_CODE (operands
[1]) == CONST_DOUBLE
)
903 REAL_VALUE_TYPE r
; long l
[3];
905 REAL_VALUE_FROM_CONST_DOUBLE (r
, operands
[1]);
906 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, l
);
907 operands
[1] = GEN_INT (l
[0]);
908 middlehalf
[1] = GEN_INT (l
[1]);
909 latehalf
[1] = GEN_INT (l
[2]);
911 else if (CONSTANT_P (operands
[1]))
912 /* No non-CONST_DOUBLE constant should ever appear here. */
917 middlehalf
[1] = operands
[1];
918 latehalf
[1] = operands
[1];
921 else /* size is not 12: */
923 if (optype0
== REGOP
)
924 latehalf
[0] = gen_rtx (REG
, SImode
, REGNO (operands
[0]) + 1);
925 else if (optype0
== OFFSOP
)
926 latehalf
[0] = adj_offsettable_operand (operands
[0], 4);
928 latehalf
[0] = operands
[0];
930 if (optype1
== REGOP
)
931 latehalf
[1] = gen_rtx (REG
, SImode
, REGNO (operands
[1]) + 1);
932 else if (optype1
== OFFSOP
)
933 latehalf
[1] = adj_offsettable_operand (operands
[1], 4);
934 else if (optype1
== CNSTOP
)
935 split_double (operands
[1], &operands
[1], &latehalf
[1]);
937 latehalf
[1] = operands
[1];
940 /* If insn is effectively movd N (sp),-(sp) then we will do the
941 high word first. We should use the adjusted operand 1
942 (which is N+4 (sp) or N+8 (sp))
943 for the low word and middle word as well,
944 to compensate for the first decrement of sp. */
945 if (optype0
== PUSHOP
946 && REGNO (XEXP (XEXP (operands
[0], 0), 0)) == STACK_POINTER_REGNUM
947 && reg_overlap_mentioned_p (stack_pointer_rtx
, operands
[1]))
948 middlehalf
[1] = operands
[1] = latehalf
[1];
950 /* For (set (reg:DI N) (mem:DI ... (reg:SI N) ...)),
951 if the upper part of reg N does not appear in the MEM, arrange to
952 emit the move late-half first. Otherwise, compute the MEM address
953 into the upper part of N and use that as a pointer to the memory
956 && (optype1
== OFFSOP
|| optype1
== MEMOP
))
958 if (reg_mentioned_p (operands
[0], XEXP (operands
[1], 0))
959 && reg_mentioned_p (latehalf
[0], XEXP (operands
[1], 0)))
961 /* If both halves of dest are used in the src memory address,
962 compute the address into latehalf of dest. */
964 xops
[0] = latehalf
[0];
965 xops
[1] = XEXP (operands
[1], 0);
966 output_asm_insn (AS2 (lea
%L0
,%a1
,%0), xops
);
967 if( GET_MODE (operands
[1]) == XFmode
)
970 operands
[1] = gen_rtx (MEM
, XFmode
, latehalf
[0]);
971 middlehalf
[1] = adj_offsettable_operand (operands
[1], size
-8);
972 latehalf
[1] = adj_offsettable_operand (operands
[1], size
-4);
976 operands
[1] = gen_rtx (MEM
, DImode
, latehalf
[0]);
977 latehalf
[1] = adj_offsettable_operand (operands
[1], size
-4);
981 && reg_mentioned_p (middlehalf
[0], XEXP (operands
[1], 0)))
983 /* Check for two regs used by both source and dest. */
984 if (reg_mentioned_p (operands
[0], XEXP (operands
[1], 0))
985 || reg_mentioned_p (latehalf
[0], XEXP (operands
[1], 0)))
988 /* JRV says this can't happen: */
989 if (addreg0
|| addreg1
)
992 /* Only the middle reg conflicts; simply put it last. */
993 output_asm_insn (singlemove_string (operands
), operands
);
994 output_asm_insn (singlemove_string (latehalf
), latehalf
);
995 output_asm_insn (singlemove_string (middlehalf
), middlehalf
);
998 else if (reg_mentioned_p (operands
[0], XEXP (operands
[1], 0)))
999 /* If the low half of dest is mentioned in the source memory
1000 address, the arrange to emit the move late half first. */
1001 dest_overlapped_low
= 1;
1004 /* If one or both operands autodecrementing,
1005 do the two words, high-numbered first. */
1007 /* Likewise, the first move would clobber the source of the second one,
1008 do them in the other order. This happens only for registers;
1009 such overlap can't happen in memory unless the user explicitly
1010 sets it up, and that is an undefined circumstance. */
1013 if (optype0 == PUSHOP || optype1 == PUSHOP
1014 || (optype0 == REGOP && optype1 == REGOP
1015 && REGNO (operands[0]) == REGNO (latehalf[1]))
1016 || dest_overlapped_low)
1018 if (optype0
== PUSHOP
|| optype1
== PUSHOP
1019 || (optype0
== REGOP
&& optype1
== REGOP
1020 && ((middlehalf
[1] && REGNO (operands
[0]) == REGNO (middlehalf
[1]))
1021 || REGNO (operands
[0]) == REGNO (latehalf
[1])))
1022 || dest_overlapped_low
)
1024 /* Make any unoffsettable addresses point at high-numbered word. */
1026 asm_add (size
-4, addreg0
);
1028 asm_add (size
-4, addreg1
);
1031 output_asm_insn (singlemove_string (latehalf
), latehalf
);
1033 /* Undo the adds we just did. */
1035 asm_add (-4, addreg0
);
1037 asm_add (-4, addreg1
);
1041 output_asm_insn (singlemove_string (middlehalf
), middlehalf
);
1043 asm_add (-4, addreg0
);
1045 asm_add (-4, addreg1
);
1048 /* Do low-numbered word. */
1049 return singlemove_string (operands
);
1052 /* Normal case: do the two words, low-numbered first. */
1054 output_asm_insn (singlemove_string (operands
), operands
);
1056 /* Do the middle one of the three words for long double */
1060 asm_add (4, addreg0
);
1062 asm_add (4, addreg1
);
1064 output_asm_insn (singlemove_string (middlehalf
), middlehalf
);
1067 /* Make any unoffsettable addresses point at high-numbered word. */
1069 asm_add (4, addreg0
);
1071 asm_add (4, addreg1
);
1074 output_asm_insn (singlemove_string (latehalf
), latehalf
);
1076 /* Undo the adds we just did. */
1078 asm_add (4-size
, addreg0
);
1080 asm_add (4-size
, addreg1
);
1086 #define MAX_TMPS 2 /* max temporary registers used */
1088 /* Output the appropriate code to move push memory on the stack */
1091 output_move_pushmem (operands
, insn
, length
, tmp_start
, n_operands
)
1103 } tmp_info
[MAX_TMPS
];
1105 rtx src
= operands
[1];
1108 int stack_p
= reg_overlap_mentioned_p (stack_pointer_rtx
, src
);
1109 int stack_offset
= 0;
1113 if (!offsettable_memref_p (src
))
1114 fatal_insn ("Source is not offsettable", insn
);
1116 if ((length
& 3) != 0)
1117 fatal_insn ("Pushing non-word aligned size", insn
);
1119 /* Figure out which temporary registers we have available */
1120 for (i
= tmp_start
; i
< n_operands
; i
++)
1122 if (GET_CODE (operands
[i
]) == REG
)
1124 if (reg_overlap_mentioned_p (operands
[i
], src
))
1127 tmp_info
[ max_tmps
++ ].xops
[1] = operands
[i
];
1128 if (max_tmps
== MAX_TMPS
)
1134 for (offset
= length
- 4; offset
>= 0; offset
-= 4)
1136 xops
[0] = adj_offsettable_operand (src
, offset
+ stack_offset
);
1137 output_asm_insn (AS1(push
%L0
,%0), xops
);
1143 for (offset
= length
- 4; offset
>= 0; )
1145 for (num_tmps
= 0; num_tmps
< max_tmps
&& offset
>= 0; num_tmps
++)
1147 tmp_info
[num_tmps
].load
= AS2(mov
%L0
,%0,%1);
1148 tmp_info
[num_tmps
].push
= AS1(push
%L0
,%1);
1149 tmp_info
[num_tmps
].xops
[0] = adj_offsettable_operand (src
, offset
+ stack_offset
);
1153 for (i
= 0; i
< num_tmps
; i
++)
1154 output_asm_insn (tmp_info
[i
].load
, tmp_info
[i
].xops
);
1156 for (i
= 0; i
< num_tmps
; i
++)
1157 output_asm_insn (tmp_info
[i
].push
, tmp_info
[i
].xops
);
1160 stack_offset
+= 4*num_tmps
;
1168 /* Output the appropriate code to move data between two memory locations */
1171 output_move_memory (operands
, insn
, length
, tmp_start
, n_operands
)
1182 } tmp_info
[MAX_TMPS
];
1184 rtx dest
= operands
[0];
1185 rtx src
= operands
[1];
1186 rtx qi_tmp
= NULL_RTX
;
1192 if (GET_CODE (dest
) == MEM
1193 && GET_CODE (XEXP (dest
, 0)) == PRE_INC
1194 && XEXP (XEXP (dest
, 0), 0) == stack_pointer_rtx
)
1195 return output_move_pushmem (operands
, insn
, length
, tmp_start
, n_operands
);
1197 if (!offsettable_memref_p (src
))
1198 fatal_insn ("Source is not offsettable", insn
);
1200 if (!offsettable_memref_p (dest
))
1201 fatal_insn ("Destination is not offsettable", insn
);
1203 /* Figure out which temporary registers we have available */
1204 for (i
= tmp_start
; i
< n_operands
; i
++)
1206 if (GET_CODE (operands
[i
]) == REG
)
1208 if ((length
& 1) != 0 && !qi_tmp
&& QI_REG_P (operands
[i
]))
1209 qi_tmp
= operands
[i
];
1211 if (reg_overlap_mentioned_p (operands
[i
], dest
))
1212 fatal_insn ("Temporary register overlaps the destination", insn
);
1214 if (reg_overlap_mentioned_p (operands
[i
], src
))
1215 fatal_insn ("Temporary register overlaps the source", insn
);
1217 tmp_info
[ max_tmps
++ ].xops
[2] = operands
[i
];
1218 if (max_tmps
== MAX_TMPS
)
1224 fatal_insn ("No scratch registers were found to do memory->memory moves", insn
);
1226 if ((length
& 1) != 0)
1229 fatal_insn ("No byte register found when moving odd # of bytes.", insn
);
1234 for (num_tmps
= 0; num_tmps
< max_tmps
; num_tmps
++)
1238 tmp_info
[num_tmps
].load
= AS2(mov
%L0
,%1,%2);
1239 tmp_info
[num_tmps
].store
= AS2(mov
%L0
,%2,%0);
1240 tmp_info
[num_tmps
].xops
[0] = adj_offsettable_operand (dest
, offset
);
1241 tmp_info
[num_tmps
].xops
[1] = adj_offsettable_operand (src
, offset
);
1245 else if (length
>= 2)
1247 tmp_info
[num_tmps
].load
= AS2(mov
%W0
,%1,%2);
1248 tmp_info
[num_tmps
].store
= AS2(mov
%W0
,%2,%0);
1249 tmp_info
[num_tmps
].xops
[0] = adj_offsettable_operand (dest
, offset
);
1250 tmp_info
[num_tmps
].xops
[1] = adj_offsettable_operand (src
, offset
);
1258 for (i
= 0; i
< num_tmps
; i
++)
1259 output_asm_insn (tmp_info
[i
].load
, tmp_info
[i
].xops
);
1261 for (i
= 0; i
< num_tmps
; i
++)
1262 output_asm_insn (tmp_info
[i
].store
, tmp_info
[i
].xops
);
1267 xops
[0] = adj_offsettable_operand (dest
, offset
);
1268 xops
[1] = adj_offsettable_operand (src
, offset
);
1270 output_asm_insn (AS2(mov
%B0
,%1,%2), xops
);
1271 output_asm_insn (AS2(mov
%B0
,%2,%0), xops
);
1279 standard_80387_constant_p (x
)
1282 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
1287 if (setjmp (handler
))
1290 set_float_handler (handler
);
1291 REAL_VALUE_FROM_CONST_DOUBLE (d
, x
);
1292 is0
= REAL_VALUES_EQUAL (d
, dconst0
);
1293 is1
= REAL_VALUES_EQUAL (d
, dconst1
);
1294 set_float_handler (NULL_PTR
);
1302 /* Note that on the 80387, other constants, such as pi,
1303 are much slower to load as standard constants
1304 than to load from doubles in memory! */
1311 output_move_const_single (operands
)
1314 if (FP_REG_P (operands
[0]))
1316 int conval
= standard_80387_constant_p (operands
[1]);
1324 if (GET_CODE (operands
[1]) == CONST_DOUBLE
)
1326 REAL_VALUE_TYPE r
; long l
;
1328 if (GET_MODE (operands
[1]) == XFmode
)
1331 REAL_VALUE_FROM_CONST_DOUBLE (r
, operands
[1]);
1332 REAL_VALUE_TO_TARGET_SINGLE (r
, l
);
1333 operands
[1] = GEN_INT (l
);
1335 return singlemove_string (operands
);
1338 /* Returns 1 if OP is either a symbol reference or a sum of a symbol
1339 reference and a constant. */
1342 symbolic_operand (op
, mode
)
1344 enum machine_mode mode
;
1346 switch (GET_CODE (op
))
1353 return ((GET_CODE (XEXP (op
, 0)) == SYMBOL_REF
1354 || GET_CODE (XEXP (op
, 0)) == LABEL_REF
)
1355 && GET_CODE (XEXP (op
, 1)) == CONST_INT
);
1361 /* Test for a valid operand for a call instruction.
1362 Don't allow the arg pointer register or virtual regs
1363 since they may change into reg + const, which the patterns
1364 can't handle yet. */
1367 call_insn_operand (op
, mode
)
1369 enum machine_mode mode
;
1371 if (GET_CODE (op
) == MEM
1372 && ((CONSTANT_ADDRESS_P (XEXP (op
, 0))
1373 /* This makes a difference for PIC. */
1374 && general_operand (XEXP (op
, 0), Pmode
))
1375 || (GET_CODE (XEXP (op
, 0)) == REG
1376 && XEXP (op
, 0) != arg_pointer_rtx
1377 && !(REGNO (XEXP (op
, 0)) >= FIRST_PSEUDO_REGISTER
1378 && REGNO (XEXP (op
, 0)) <= LAST_VIRTUAL_REGISTER
))))
1383 /* Like call_insn_operand but allow (mem (symbol_ref ...))
1387 expander_call_insn_operand (op
, mode
)
1389 enum machine_mode mode
;
1391 if (GET_CODE (op
) == MEM
1392 && (CONSTANT_ADDRESS_P (XEXP (op
, 0))
1393 || (GET_CODE (XEXP (op
, 0)) == REG
1394 && XEXP (op
, 0) != arg_pointer_rtx
1395 && !(REGNO (XEXP (op
, 0)) >= FIRST_PSEUDO_REGISTER
1396 && REGNO (XEXP (op
, 0)) <= LAST_VIRTUAL_REGISTER
))))
1401 /* Return 1 if OP is a comparison operator that can use the condition code
1402 generated by an arithmetic operation. */
1405 arithmetic_comparison_operator (op
, mode
)
1407 enum machine_mode mode
;
1411 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
1413 code
= GET_CODE (op
);
1414 if (GET_RTX_CLASS (code
) != '<')
1417 return (code
!= GT
&& code
!= LE
);
1420 /* Returns 1 if OP contains a symbol reference */
1423 symbolic_reference_mentioned_p (op
)
1429 if (GET_CODE (op
) == SYMBOL_REF
|| GET_CODE (op
) == LABEL_REF
)
1432 fmt
= GET_RTX_FORMAT (GET_CODE (op
));
1433 for (i
= GET_RTX_LENGTH (GET_CODE (op
)) - 1; i
>= 0; i
--)
1439 for (j
= XVECLEN (op
, i
) - 1; j
>= 0; j
--)
1440 if (symbolic_reference_mentioned_p (XVECEXP (op
, i
, j
)))
1443 else if (fmt
[i
] == 'e' && symbolic_reference_mentioned_p (XEXP (op
, i
)))
1450 /* This function generates the assembly code for function entry.
1451 FILE is an stdio stream to output the code to.
1452 SIZE is an int: how many units of temporary storage to allocate. */
1455 function_prologue (file
, size
)
1462 int pic_reg_used
= flag_pic
&& (current_function_uses_pic_offset_table
1463 || current_function_uses_const_pool
);
1465 xops
[0] = stack_pointer_rtx
;
1466 xops
[1] = frame_pointer_rtx
;
1467 xops
[2] = GEN_INT (size
);
1468 if (frame_pointer_needed
)
1470 output_asm_insn ("push%L1 %1", xops
);
1471 output_asm_insn (AS2 (mov
%L0
,%0,%1), xops
);
1475 output_asm_insn (AS2 (sub
%L0
,%2,%0), xops
);
1477 /* Note If use enter it is NOT reversed args.
1478 This one is not reversed from intel!!
1479 I think enter is slower. Also sdb doesn't like it.
1480 But if you want it the code is:
1482 xops[3] = const0_rtx;
1483 output_asm_insn ("enter %2,%3", xops);
1486 limit
= (frame_pointer_needed
? FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
);
1487 for (regno
= limit
- 1; regno
>= 0; regno
--)
1488 if ((regs_ever_live
[regno
] && ! call_used_regs
[regno
])
1489 || (regno
== PIC_OFFSET_TABLE_REGNUM
&& pic_reg_used
))
1491 xops
[0] = gen_rtx (REG
, SImode
, regno
);
1492 output_asm_insn ("push%L0 %0", xops
);
1497 xops
[0] = pic_offset_table_rtx
;
1498 xops
[1] = (rtx
) gen_label_rtx ();
1500 output_asm_insn (AS1 (call
,%P1
), xops
);
1501 ASM_OUTPUT_INTERNAL_LABEL (file
, "L", CODE_LABEL_NUMBER (xops
[1]));
1502 output_asm_insn (AS1 (pop
%L0
,%0), xops
);
1503 output_asm_insn ("addl $_GLOBAL_OFFSET_TABLE_+[.-%P1],%0", xops
);
1507 /* Return 1 if it is appropriate to emit `ret' instructions in the
1508 body of a function. Do this only if the epilogue is simple, needing a
1509 couple of insns. Prior to reloading, we can't tell how many registers
1510 must be saved, so return 0 then.
1512 If NON_SAVING_SETJMP is defined and true, then it is not possible
1513 for the epilogue to be simple, so return 0. This is a special case
1514 since NON_SAVING_SETJMP will not cause regs_ever_live to change until
1515 final, but jump_optimize may need to know sooner if a `return' is OK. */
1518 simple_386_epilogue ()
1522 int reglimit
= (frame_pointer_needed
1523 ? FRAME_POINTER_REGNUM
: STACK_POINTER_REGNUM
);
1524 int pic_reg_used
= flag_pic
&& (current_function_uses_pic_offset_table
1525 || current_function_uses_const_pool
);
1527 #ifdef NON_SAVING_SETJMP
1528 if (NON_SAVING_SETJMP
&& current_function_calls_setjmp
)
1532 if (! reload_completed
)
1535 for (regno
= reglimit
- 1; regno
>= 0; regno
--)
1536 if ((regs_ever_live
[regno
] && ! call_used_regs
[regno
])
1537 || (regno
== PIC_OFFSET_TABLE_REGNUM
&& pic_reg_used
))
1540 return nregs
== 0 || ! frame_pointer_needed
;
1544 /* This function generates the assembly code for function exit.
1545 FILE is an stdio stream to output the code to.
1546 SIZE is an int: how many units of temporary storage to deallocate. */
1549 function_epilogue (file
, size
)
1554 register int nregs
, limit
;
1557 int pic_reg_used
= flag_pic
&& (current_function_uses_pic_offset_table
1558 || current_function_uses_const_pool
);
1560 /* Compute the number of registers to pop */
1562 limit
= (frame_pointer_needed
1563 ? FRAME_POINTER_REGNUM
1564 : STACK_POINTER_REGNUM
);
1568 for (regno
= limit
- 1; regno
>= 0; regno
--)
1569 if ((regs_ever_live
[regno
] && ! call_used_regs
[regno
])
1570 || (regno
== PIC_OFFSET_TABLE_REGNUM
&& pic_reg_used
))
1573 /* sp is often unreliable so we must go off the frame pointer,
1576 /* In reality, we may not care if sp is unreliable, because we can
1577 restore the register relative to the frame pointer. In theory,
1578 since each move is the same speed as a pop, and we don't need the
1579 leal, this is faster. For now restore multiple registers the old
1582 offset
= -size
- (nregs
* UNITS_PER_WORD
);
1584 xops
[2] = stack_pointer_rtx
;
1586 if (nregs
> 1 || ! frame_pointer_needed
)
1588 if (frame_pointer_needed
)
1590 xops
[0] = adj_offsettable_operand (AT_BP (Pmode
), offset
);
1591 output_asm_insn (AS2 (lea
%L2
,%0,%2), xops
);
1594 for (regno
= 0; regno
< limit
; regno
++)
1595 if ((regs_ever_live
[regno
] && ! call_used_regs
[regno
])
1596 || (regno
== PIC_OFFSET_TABLE_REGNUM
&& pic_reg_used
))
1598 xops
[0] = gen_rtx (REG
, SImode
, regno
);
1599 output_asm_insn ("pop%L0 %0", xops
);
1603 for (regno
= 0; regno
< limit
; regno
++)
1604 if ((regs_ever_live
[regno
] && ! call_used_regs
[regno
])
1605 || (regno
== PIC_OFFSET_TABLE_REGNUM
&& pic_reg_used
))
1607 xops
[0] = gen_rtx (REG
, SImode
, regno
);
1608 xops
[1] = adj_offsettable_operand (AT_BP (Pmode
), offset
);
1609 output_asm_insn (AS2 (mov
%L0
,%1,%0), xops
);
1613 if (frame_pointer_needed
)
1615 /* On i486, mov & pop is faster than "leave". */
1619 xops
[0] = frame_pointer_rtx
;
1620 output_asm_insn (AS2 (mov
%L2
,%0,%2), xops
);
1621 output_asm_insn ("pop%L0 %0", xops
);
1624 output_asm_insn ("leave", xops
);
1628 /* If there is no frame pointer, we must still release the frame. */
1630 xops
[0] = GEN_INT (size
);
1631 output_asm_insn (AS2 (add
%L2
,%0,%2), xops
);
1634 if (current_function_pops_args
&& current_function_args_size
)
1636 xops
[1] = GEN_INT (current_function_pops_args
);
1638 /* i386 can only pop 32K bytes (maybe 64K? Is it signed?). If
1639 asked to pop more, pop return address, do explicit add, and jump
1640 indirectly to the caller. */
1642 if (current_function_pops_args
>= 32768)
1644 /* ??? Which register to use here? */
1645 xops
[0] = gen_rtx (REG
, SImode
, 2);
1646 output_asm_insn ("pop%L0 %0", xops
);
1647 output_asm_insn (AS2 (add
%L2
,%1,%2), xops
);
1648 output_asm_insn ("jmp %*%0", xops
);
1651 output_asm_insn ("ret %1", xops
);
1654 output_asm_insn ("ret", xops
);
1658 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1659 that is a valid memory address for an instruction.
1660 The MODE argument is the machine mode for the MEM expression
1661 that wants to use this address.
1663 On x86, legitimate addresses are:
1664 base movl (base),reg
1665 displacement movl disp,reg
1666 base + displacement movl disp(base),reg
1667 index + base movl (base,index),reg
1668 (index + base) + displacement movl disp(base,index),reg
1669 index*scale movl (,index,scale),reg
1670 index*scale + disp movl disp(,index,scale),reg
1671 index*scale + base movl (base,index,scale),reg
1672 (index*scale + base) + disp movl disp(base,index,scale),reg
1674 In each case, scale can be 1, 2, 4, 8. */
1676 /* This is exactly the same as print_operand_addr, except that
1677 it recognizes addresses instead of printing them.
1679 It only recognizes address in canonical form. LEGITIMIZE_ADDRESS should
1680 convert common non-canonical forms to canonical form so that they will
1683 #define ADDR_INVALID(msg,insn) \
1685 if (TARGET_DEBUG_ADDR) \
1687 fprintf (stderr, msg); \
1693 legitimate_address_p (mode
, addr
, strict
)
1694 enum machine_mode mode
;
1698 rtx base
= NULL_RTX
;
1699 rtx indx
= NULL_RTX
;
1700 rtx scale
= NULL_RTX
;
1701 rtx disp
= NULL_RTX
;
1703 if (TARGET_DEBUG_ADDR
)
1706 "\n==========\nGO_IF_LEGITIMATE_ADDRESS, mode = %s, strict = %d\n",
1707 GET_MODE_NAME (mode
), strict
);
1712 if (GET_CODE (addr
) == REG
|| GET_CODE (addr
) == SUBREG
)
1713 base
= addr
; /* base reg */
1715 else if (GET_CODE (addr
) == PLUS
)
1717 rtx op0
= XEXP (addr
, 0);
1718 rtx op1
= XEXP (addr
, 1);
1719 enum rtx_code code0
= GET_CODE (op0
);
1720 enum rtx_code code1
= GET_CODE (op1
);
1722 if (code0
== REG
|| code0
== SUBREG
)
1724 if (code1
== REG
|| code1
== SUBREG
)
1726 indx
= op0
; /* index + base */
1732 base
= op0
; /* base + displacement */
1737 else if (code0
== MULT
)
1739 indx
= XEXP (op0
, 0);
1740 scale
= XEXP (op0
, 1);
1742 if (code1
== REG
|| code1
== SUBREG
)
1743 base
= op1
; /* index*scale + base */
1746 disp
= op1
; /* index*scale + disp */
1749 else if (code0
== PLUS
&& GET_CODE (XEXP (op0
, 0)) == MULT
)
1751 indx
= XEXP (XEXP (op0
, 0), 0); /* index*scale + base + disp */
1752 scale
= XEXP (XEXP (op0
, 0), 1);
1753 base
= XEXP (op0
, 1);
1757 else if (code0
== PLUS
)
1759 indx
= XEXP (op0
, 0); /* index + base + disp */
1760 base
= XEXP (op0
, 1);
1766 ADDR_INVALID ("PLUS subcode is not valid.\n", op0
);
1771 else if (GET_CODE (addr
) == MULT
)
1773 indx
= XEXP (addr
, 0); /* index*scale */
1774 scale
= XEXP (addr
, 1);
1778 disp
= addr
; /* displacement */
1780 /* Allow arg pointer and stack pointer as index if there is not scaling */
1781 if (base
&& indx
&& !scale
1782 && (indx
== arg_pointer_rtx
|| indx
== stack_pointer_rtx
))
1789 /* Validate base register */
1790 /* Don't allow SUBREG's here, it can lead to spill failures when the base
1791 is one word out of a two word structure, which is represented internally
1795 if (GET_CODE (base
) != REG
)
1797 ADDR_INVALID ("Base is not a register.\n", base
);
1801 if ((strict
&& !REG_OK_FOR_BASE_STRICT_P (base
))
1802 || (!strict
&& !REG_OK_FOR_BASE_NONSTRICT_P (base
)))
1804 ADDR_INVALID ("Base is not valid.\n", base
);
1809 /* Validate index register */
1810 /* Don't allow SUBREG's here, it can lead to spill failures when the index
1811 is one word out of a two word structure, which is represented internally
1815 if (GET_CODE (indx
) != REG
)
1817 ADDR_INVALID ("Index is not a register.\n", indx
);
1821 if ((strict
&& !REG_OK_FOR_INDEX_STRICT_P (indx
))
1822 || (!strict
&& !REG_OK_FOR_INDEX_NONSTRICT_P (indx
)))
1824 ADDR_INVALID ("Index is not valid.\n", indx
);
1829 abort (); /* scale w/o index invalid */
1831 /* Validate scale factor */
1834 HOST_WIDE_INT value
;
1836 if (GET_CODE (scale
) != CONST_INT
)
1838 ADDR_INVALID ("Scale is not valid.\n", scale
);
1842 value
= INTVAL (scale
);
1843 if (value
!= 1 && value
!= 2 && value
!= 4 && value
!= 8)
1845 ADDR_INVALID ("Scale is not a good multiplier.\n", scale
);
1850 /* Validate displacement */
1853 if (!CONSTANT_ADDRESS_P (disp
))
1855 ADDR_INVALID ("Displacement is not valid.\n", disp
);
1859 if (GET_CODE (disp
) == CONST_DOUBLE
)
1861 ADDR_INVALID ("Displacement is a const_double.\n", disp
);
1865 if (flag_pic
&& SYMBOLIC_CONST (disp
) && base
!= pic_offset_table_rtx
1866 && (indx
!= pic_offset_table_rtx
|| scale
!= NULL_RTX
))
1868 ADDR_INVALID ("Displacement is an invalid pic reference.\n", disp
);
1872 if (HALF_PIC_P () && HALF_PIC_ADDRESS_P (disp
)
1873 && (base
!= NULL_RTX
|| indx
!= NULL_RTX
))
1875 ADDR_INVALID ("Displacement is an invalid half-pic reference.\n", disp
);
1880 if (TARGET_DEBUG_ADDR
)
1881 fprintf (stderr
, "Address is valid.\n");
1883 /* Everything looks valid, return true */
1888 /* Return a legitimate reference for ORIG (an address) using the
1889 register REG. If REG is 0, a new pseudo is generated.
1891 There are three types of references that must be handled:
1893 1. Global data references must load the address from the GOT, via
1894 the PIC reg. An insn is emitted to do this load, and the reg is
1897 2. Static data references must compute the address as an offset
1898 from the GOT, whose base is in the PIC reg. An insn is emitted to
1899 compute the address into a reg, and the reg is returned. Static
1900 data objects have SYMBOL_REF_FLAG set to differentiate them from
1901 global data objects.
1903 3. Constant pool addresses must be handled special. They are
1904 considered legitimate addresses, but only if not used with regs.
1905 When printed, the output routines know to print the reference with the
1906 PIC reg, even though the PIC reg doesn't appear in the RTL.
1908 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
1909 reg also appears in the address (except for constant pool references,
1912 "switch" statements also require special handling when generating
1913 PIC code. See comments by the `casesi' insn in i386.md for details. */
1916 legitimize_pic_address (orig
, reg
)
1923 if (GET_CODE (addr
) == SYMBOL_REF
|| GET_CODE (addr
) == LABEL_REF
)
1925 if (GET_CODE (addr
) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (addr
))
1930 reg
= gen_reg_rtx (Pmode
);
1932 if ((GET_CODE (addr
) == SYMBOL_REF
&& SYMBOL_REF_FLAG (addr
))
1933 || GET_CODE (addr
) == LABEL_REF
)
1934 new = gen_rtx (PLUS
, Pmode
, pic_offset_table_rtx
, orig
);
1936 new = gen_rtx (MEM
, Pmode
,
1937 gen_rtx (PLUS
, Pmode
,
1938 pic_offset_table_rtx
, orig
));
1940 emit_move_insn (reg
, new);
1942 current_function_uses_pic_offset_table
= 1;
1945 else if (GET_CODE (addr
) == CONST
|| GET_CODE (addr
) == PLUS
)
1949 if (GET_CODE (addr
) == CONST
)
1951 addr
= XEXP (addr
, 0);
1952 if (GET_CODE (addr
) != PLUS
)
1956 if (XEXP (addr
, 0) == pic_offset_table_rtx
)
1960 reg
= gen_reg_rtx (Pmode
);
1962 base
= legitimize_pic_address (XEXP (addr
, 0), reg
);
1963 addr
= legitimize_pic_address (XEXP (addr
, 1),
1964 base
== reg
? NULL_RTX
: reg
);
1966 if (GET_CODE (addr
) == CONST_INT
)
1967 return plus_constant (base
, INTVAL (addr
));
1969 if (GET_CODE (addr
) == PLUS
&& CONSTANT_P (XEXP (addr
, 1)))
1971 base
= gen_rtx (PLUS
, Pmode
, base
, XEXP (addr
, 0));
1972 addr
= XEXP (addr
, 1);
1974 return gen_rtx (PLUS
, Pmode
, base
, addr
);
1980 /* Emit insns to move operands[1] into operands[0]. */
1983 emit_pic_move (operands
, mode
)
1985 enum machine_mode mode
;
1987 rtx temp
= reload_in_progress
? operands
[0] : gen_reg_rtx (Pmode
);
1989 if (GET_CODE (operands
[0]) == MEM
&& SYMBOLIC_CONST (operands
[1]))
1990 operands
[1] = (rtx
) force_reg (SImode
, operands
[1]);
1992 operands
[1] = legitimize_pic_address (operands
[1], temp
);
1996 /* Try machine-dependent ways of modifying an illegitimate address
1997 to be legitimate. If we find one, return the new, valid address.
1998 This macro is used in only one place: `memory_address' in explow.c.
2000 OLDX is the address as it was before break_out_memory_refs was called.
2001 In some cases it is useful to look at this to decide what needs to be done.
2003 MODE and WIN are passed so that this macro can use
2004 GO_IF_LEGITIMATE_ADDRESS.
2006 It is always safe for this macro to do nothing. It exists to recognize
2007 opportunities to optimize the output.
2009 For the 80386, we handle X+REG by loading X into a register R and
2010 using R+REG. R will go in a general reg and indexing will be used.
2011 However, if REG is a broken-out memory address or multiplication,
2012 nothing needs to be done because REG can certainly go in a general reg.
2014 When -fpic is used, special handling is needed for symbolic references.
2015 See comments by legitimize_pic_address in i386.c for details. */
2018 legitimize_address (x
, oldx
, mode
)
2021 enum machine_mode mode
;
2026 if (TARGET_DEBUG_ADDR
)
2028 fprintf (stderr
, "\n==========\nLEGITIMIZE_ADDRESS, mode = %s\n", GET_MODE_NAME (mode
));
2032 if (flag_pic
&& SYMBOLIC_CONST (x
))
2033 return legitimize_pic_address (x
, 0);
2035 /* Canonicalize shifts by 0, 1, 2, 3 into multiply */
2036 if (GET_CODE (x
) == ASHIFT
2037 && GET_CODE (XEXP (x
, 1)) == CONST_INT
2038 && (log
= (unsigned)exact_log2 (INTVAL (XEXP (x
, 1)))) < 4)
2041 x
= gen_rtx (MULT
, Pmode
,
2042 force_reg (Pmode
, XEXP (x
, 0)),
2043 GEN_INT (1 << log
));
2046 if (GET_CODE (x
) == PLUS
)
2048 /* Canonicalize shifts by 0, 1, 2, 3 into multiply */
2049 if (GET_CODE (XEXP (x
, 0)) == ASHIFT
2050 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
2051 && (log
= (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x
, 0), 1)))) < 4)
2054 XEXP (x
, 0) = gen_rtx (MULT
, Pmode
,
2055 force_reg (Pmode
, XEXP (XEXP (x
, 0), 0)),
2056 GEN_INT (1 << log
));
2059 if (GET_CODE (XEXP (x
, 1)) == ASHIFT
2060 && GET_CODE (XEXP (XEXP (x
, 1), 1)) == CONST_INT
2061 && (log
= (unsigned)exact_log2 (INTVAL (XEXP (XEXP (x
, 1), 1)))) < 4)
2064 XEXP (x
, 1) = gen_rtx (MULT
, Pmode
,
2065 force_reg (Pmode
, XEXP (XEXP (x
, 1), 0)),
2066 GEN_INT (1 << log
));
2069 /* Put multiply first if it isn't already */
2070 if (GET_CODE (XEXP (x
, 1)) == MULT
)
2072 rtx tmp
= XEXP (x
, 0);
2073 XEXP (x
, 0) = XEXP (x
, 1);
2078 /* Canonicalize (plus (mult (reg) (const)) (plus (reg) (const)))
2079 into (plus (plus (mult (reg) (const)) (reg)) (const)). This can be
2080 created by virtual register instantiation, register elimination, and
2081 similar optimizations. */
2082 if (GET_CODE (XEXP (x
, 0)) == MULT
&& GET_CODE (XEXP (x
, 1)) == PLUS
)
2085 x
= gen_rtx (PLUS
, Pmode
,
2086 gen_rtx (PLUS
, Pmode
, XEXP (x
, 0), XEXP (XEXP (x
, 1), 0)),
2087 XEXP (XEXP (x
, 1), 1));
2090 /* Canonicalize (plus (plus (mult (reg) (const)) (plus (reg) (const))) const)
2091 into (plus (plus (mult (reg) (const)) (reg)) (const)). */
2092 else if (GET_CODE (x
) == PLUS
&& GET_CODE (XEXP (x
, 0)) == PLUS
2093 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == MULT
2094 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == PLUS
2095 && CONSTANT_P (XEXP (x
, 1)))
2097 rtx constant
, other
;
2099 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2101 constant
= XEXP (x
, 1);
2102 other
= XEXP (XEXP (XEXP (x
, 0), 1), 1);
2104 else if (GET_CODE (XEXP (XEXP (XEXP (x
, 0), 1), 1)) == CONST_INT
)
2106 constant
= XEXP (XEXP (XEXP (x
, 0), 1), 1);
2107 other
= XEXP (x
, 1);
2115 x
= gen_rtx (PLUS
, Pmode
,
2116 gen_rtx (PLUS
, Pmode
, XEXP (XEXP (x
, 0), 0),
2117 XEXP (XEXP (XEXP (x
, 0), 1), 0)),
2118 plus_constant (other
, INTVAL (constant
)));
2122 if (changed
&& legitimate_address_p (mode
, x
, FALSE
))
2125 if (GET_CODE (XEXP (x
, 0)) == MULT
)
2128 XEXP (x
, 0) = force_operand (XEXP (x
, 0), 0);
2131 if (GET_CODE (XEXP (x
, 1)) == MULT
)
2134 XEXP (x
, 1) = force_operand (XEXP (x
, 1), 0);
2138 && GET_CODE (XEXP (x
, 1)) == REG
2139 && GET_CODE (XEXP (x
, 0)) == REG
)
2142 if (flag_pic
&& SYMBOLIC_CONST (XEXP (x
, 1)))
2145 x
= legitimize_pic_address (x
, 0);
2148 if (changed
&& legitimate_address_p (mode
, x
, FALSE
))
2151 if (GET_CODE (XEXP (x
, 0)) == REG
)
2153 register rtx temp
= gen_reg_rtx (Pmode
);
2154 register rtx val
= force_operand (XEXP (x
, 1), temp
);
2156 emit_move_insn (temp
, val
);
2162 else if (GET_CODE (XEXP (x
, 1)) == REG
)
2164 register rtx temp
= gen_reg_rtx (Pmode
);
2165 register rtx val
= force_operand (XEXP (x
, 0), temp
);
2167 emit_move_insn (temp
, val
);
2178 /* Print an integer constant expression in assembler syntax. Addition
2179 and subtraction are the only arithmetic that may appear in these
2180 expressions. FILE is the stdio stream to write to, X is the rtx, and
2181 CODE is the operand print code from the output string. */
2184 output_pic_addr_const (file
, x
, code
)
2191 switch (GET_CODE (x
))
2202 if (GET_CODE (x
) == SYMBOL_REF
)
2203 assemble_name (file
, XSTR (x
, 0));
2206 ASM_GENERATE_INTERNAL_LABEL (buf
, "L",
2207 CODE_LABEL_NUMBER (XEXP (x
, 0)));
2208 assemble_name (asm_out_file
, buf
);
2211 if (GET_CODE (x
) == SYMBOL_REF
&& CONSTANT_POOL_ADDRESS_P (x
))
2212 fprintf (file
, "@GOTOFF(%%ebx)");
2213 else if (code
== 'P')
2214 fprintf (file
, "@PLT");
2215 else if (GET_CODE (x
) == LABEL_REF
)
2216 fprintf (file
, "@GOTOFF");
2217 else if (! SYMBOL_REF_FLAG (x
))
2218 fprintf (file
, "@GOT");
2220 fprintf (file
, "@GOTOFF");
2225 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
2226 assemble_name (asm_out_file
, buf
);
2230 fprintf (file
, "%d", INTVAL (x
));
2234 /* This used to output parentheses around the expression,
2235 but that does not work on the 386 (either ATT or BSD assembler). */
2236 output_pic_addr_const (file
, XEXP (x
, 0), code
);
2240 if (GET_MODE (x
) == VOIDmode
)
2242 /* We can use %d if the number is <32 bits and positive. */
2243 if (CONST_DOUBLE_HIGH (x
) || CONST_DOUBLE_LOW (x
) < 0)
2244 fprintf (file
, "0x%x%08x",
2245 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
2247 fprintf (file
, "%d", CONST_DOUBLE_LOW (x
));
2250 /* We can't handle floating point constants;
2251 PRINT_OPERAND must handle them. */
2252 output_operand_lossage ("floating constant misused");
2256 /* Some assemblers need integer constants to appear last (eg masm). */
2257 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
2259 output_pic_addr_const (file
, XEXP (x
, 1), code
);
2260 if (INTVAL (XEXP (x
, 0)) >= 0)
2261 fprintf (file
, "+");
2262 output_pic_addr_const (file
, XEXP (x
, 0), code
);
2266 output_pic_addr_const (file
, XEXP (x
, 0), code
);
2267 if (INTVAL (XEXP (x
, 1)) >= 0)
2268 fprintf (file
, "+");
2269 output_pic_addr_const (file
, XEXP (x
, 1), code
);
2274 output_pic_addr_const (file
, XEXP (x
, 0), code
);
2275 fprintf (file
, "-");
2276 output_pic_addr_const (file
, XEXP (x
, 1), code
);
2280 output_operand_lossage ("invalid expression as operand");
2285 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2286 D,L,W,B,Q,S -- print the opcode suffix for specified size of operand.
2287 R -- print the prefix for register names.
2288 z -- print the opcode suffix for the size of the current operand.
2289 * -- print a star (in certain assembler syntax)
2290 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2291 c -- don't print special prefixes before constant operands.
2292 J -- print the appropriate jump operand.
2296 print_operand (file
, x
, code
)
2311 PUT_OP_SIZE (code
, 'l', file
);
2315 PUT_OP_SIZE (code
, 'w', file
);
2319 PUT_OP_SIZE (code
, 'b', file
);
2323 PUT_OP_SIZE (code
, 'l', file
);
2327 PUT_OP_SIZE (code
, 's', file
);
2331 PUT_OP_SIZE (code
, 't', file
);
2335 /* 387 opcodes don't get size suffixes if the operands are
2338 if (STACK_REG_P (x
))
2341 /* this is the size of op from size of operand */
2342 switch (GET_MODE_SIZE (GET_MODE (x
)))
2345 PUT_OP_SIZE ('B', 'b', file
);
2349 PUT_OP_SIZE ('W', 'w', file
);
2353 if (GET_MODE (x
) == SFmode
)
2355 PUT_OP_SIZE ('S', 's', file
);
2359 PUT_OP_SIZE ('L', 'l', file
);
2363 PUT_OP_SIZE ('T', 't', file
);
2367 if (GET_MODE_CLASS (GET_MODE (x
)) == MODE_INT
)
2369 #ifdef GAS_MNEMONICS
2370 PUT_OP_SIZE ('Q', 'q', file
);
2373 PUT_OP_SIZE ('Q', 'l', file
); /* Fall through */
2377 PUT_OP_SIZE ('Q', 'l', file
);
2390 switch (GET_CODE (x
))
2392 /* These conditions are appropriate for testing the result
2393 of an arithmetic operation, not for a compare operation.
2394 Cases GE, LT assume CC_NO_OVERFLOW true. All cases assume
2395 CC_Z_IN_NOT_C false and not floating point. */
2396 case NE
: fputs ("jne", file
); return;
2397 case EQ
: fputs ("je", file
); return;
2398 case GE
: fputs ("jns", file
); return;
2399 case LT
: fputs ("js", file
); return;
2400 case GEU
: fputs ("jmp", file
); return;
2401 case GTU
: fputs ("jne", file
); return;
2402 case LEU
: fputs ("je", file
); return;
2403 case LTU
: fputs ("#branch never", file
); return;
2405 /* no matching branches for GT nor LE */
2413 sprintf (str
, "invalid operand code `%c'", code
);
2414 output_operand_lossage (str
);
2418 if (GET_CODE (x
) == REG
)
2420 PRINT_REG (x
, code
, file
);
2422 else if (GET_CODE (x
) == MEM
)
2424 PRINT_PTR (x
, file
);
2425 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
2428 output_pic_addr_const (file
, XEXP (x
, 0), code
);
2430 output_addr_const (file
, XEXP (x
, 0));
2433 output_address (XEXP (x
, 0));
2435 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == SFmode
)
2437 REAL_VALUE_TYPE r
; long l
;
2438 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
2439 REAL_VALUE_TO_TARGET_SINGLE (r
, l
);
2440 PRINT_IMMED_PREFIX (file
);
2441 fprintf (file
, "0x%x", l
);
2443 /* These float cases don't actually occur as immediate operands. */
2444 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == DFmode
)
2446 REAL_VALUE_TYPE r
; char dstr
[30];
2447 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
2448 REAL_VALUE_TO_DECIMAL (r
, "%.22e", dstr
);
2449 fprintf (file
, "%s", dstr
);
2451 else if (GET_CODE (x
) == CONST_DOUBLE
&& GET_MODE (x
) == XFmode
)
2453 REAL_VALUE_TYPE r
; char dstr
[30];
2454 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
2455 REAL_VALUE_TO_DECIMAL (r
, "%.22e", dstr
);
2456 fprintf (file
, "%s", dstr
);
2462 if (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
2463 PRINT_IMMED_PREFIX (file
);
2464 else if (GET_CODE (x
) == CONST
|| GET_CODE (x
) == SYMBOL_REF
2465 || GET_CODE (x
) == LABEL_REF
)
2466 PRINT_OFFSET_PREFIX (file
);
2469 output_pic_addr_const (file
, x
, code
);
2471 output_addr_const (file
, x
);
2475 /* Print a memory operand whose address is ADDR. */
2478 print_operand_address (file
, addr
)
2482 register rtx reg1
, reg2
, breg
, ireg
;
2485 switch (GET_CODE (addr
))
2489 fprintf (file
, "%se", RP
);
2490 fputs (hi_reg_name
[REGNO (addr
)], file
);
2500 if (CONSTANT_ADDRESS_P (XEXP (addr
, 0)))
2502 offset
= XEXP (addr
, 0);
2503 addr
= XEXP (addr
, 1);
2505 else if (CONSTANT_ADDRESS_P (XEXP (addr
, 1)))
2507 offset
= XEXP (addr
, 1);
2508 addr
= XEXP (addr
, 0);
2510 if (GET_CODE (addr
) != PLUS
) ;
2511 else if (GET_CODE (XEXP (addr
, 0)) == MULT
)
2513 reg1
= XEXP (addr
, 0);
2514 addr
= XEXP (addr
, 1);
2516 else if (GET_CODE (XEXP (addr
, 1)) == MULT
)
2518 reg1
= XEXP (addr
, 1);
2519 addr
= XEXP (addr
, 0);
2521 else if (GET_CODE (XEXP (addr
, 0)) == REG
)
2523 reg1
= XEXP (addr
, 0);
2524 addr
= XEXP (addr
, 1);
2526 else if (GET_CODE (XEXP (addr
, 1)) == REG
)
2528 reg1
= XEXP (addr
, 1);
2529 addr
= XEXP (addr
, 0);
2531 if (GET_CODE (addr
) == REG
|| GET_CODE (addr
) == MULT
)
2533 if (reg1
== 0) reg1
= addr
;
2539 if (addr
!= 0) abort ();
2542 if ((reg1
&& GET_CODE (reg1
) == MULT
)
2543 || (reg2
!= 0 && REGNO_OK_FOR_BASE_P (REGNO (reg2
))))
2548 else if (reg1
!= 0 && REGNO_OK_FOR_BASE_P (REGNO (reg1
)))
2554 if (ireg
!= 0 || breg
!= 0)
2561 output_pic_addr_const (file
, addr
, 0);
2563 else if (GET_CODE (addr
) == LABEL_REF
)
2564 output_asm_label (addr
);
2567 output_addr_const (file
, addr
);
2570 if (ireg
!= 0 && GET_CODE (ireg
) == MULT
)
2572 scale
= INTVAL (XEXP (ireg
, 1));
2573 ireg
= XEXP (ireg
, 0);
2576 /* The stack pointer can only appear as a base register,
2577 never an index register, so exchange the regs if it is wrong. */
2579 if (scale
== 1 && ireg
&& REGNO (ireg
) == STACK_POINTER_REGNUM
)
2588 /* output breg+ireg*scale */
2589 PRINT_B_I_S (breg
, ireg
, scale
, file
);
2596 if (GET_CODE (XEXP (addr
, 0)) == CONST_INT
)
2598 scale
= INTVAL (XEXP (addr
, 0));
2599 ireg
= XEXP (addr
, 1);
2603 scale
= INTVAL (XEXP (addr
, 1));
2604 ireg
= XEXP (addr
, 0);
2606 output_addr_const (file
, const0_rtx
);
2607 PRINT_B_I_S ((rtx
) 0, ireg
, scale
, file
);
2612 if (GET_CODE (addr
) == CONST_INT
2613 && INTVAL (addr
) < 0x8000
2614 && INTVAL (addr
) >= -0x8000)
2615 fprintf (file
, "%d", INTVAL (addr
));
2619 output_pic_addr_const (file
, addr
, 0);
2621 output_addr_const (file
, addr
);
2626 /* Set the cc_status for the results of an insn whose pattern is EXP.
2627 On the 80386, we assume that only test and compare insns, as well
2628 as SI, HI, & DI mode ADD, SUB, NEG, AND, IOR, XOR, ASHIFT,
2629 ASHIFTRT, and LSHIFTRT instructions set the condition codes usefully.
2630 Also, we assume that jumps, moves and sCOND don't affect the condition
2631 codes. All else clobbers the condition codes, by assumption.
2633 We assume that ALL integer add, minus, etc. instructions effect the
2634 condition codes. This MUST be consistent with i386.md.
2636 We don't record any float test or compare - the redundant test &
2637 compare check in final.c does not handle stack-like regs correctly. */
2640 notice_update_cc (exp
)
2643 if (GET_CODE (exp
) == SET
)
2645 /* Jumps do not alter the cc's. */
2646 if (SET_DEST (exp
) == pc_rtx
)
2648 /* Moving register or memory into a register:
2649 it doesn't alter the cc's, but it might invalidate
2650 the RTX's which we remember the cc's came from.
2651 (Note that moving a constant 0 or 1 MAY set the cc's). */
2652 if (REG_P (SET_DEST (exp
))
2653 && (REG_P (SET_SRC (exp
)) || GET_CODE (SET_SRC (exp
)) == MEM
2654 || GET_RTX_CLASS (GET_CODE (SET_SRC (exp
))) == '<'))
2656 if (cc_status
.value1
2657 && reg_overlap_mentioned_p (SET_DEST (exp
), cc_status
.value1
))
2658 cc_status
.value1
= 0;
2659 if (cc_status
.value2
2660 && reg_overlap_mentioned_p (SET_DEST (exp
), cc_status
.value2
))
2661 cc_status
.value2
= 0;
2664 /* Moving register into memory doesn't alter the cc's.
2665 It may invalidate the RTX's which we remember the cc's came from. */
2666 if (GET_CODE (SET_DEST (exp
)) == MEM
2667 && (REG_P (SET_SRC (exp
))
2668 || GET_RTX_CLASS (GET_CODE (SET_SRC (exp
))) == '<'))
2670 if (cc_status
.value1
&& GET_CODE (cc_status
.value1
) == MEM
)
2671 cc_status
.value1
= 0;
2672 if (cc_status
.value2
&& GET_CODE (cc_status
.value2
) == MEM
)
2673 cc_status
.value2
= 0;
2676 /* Function calls clobber the cc's. */
2677 else if (GET_CODE (SET_SRC (exp
)) == CALL
)
2682 /* Tests and compares set the cc's in predictable ways. */
2683 else if (SET_DEST (exp
) == cc0_rtx
)
2686 cc_status
.value1
= SET_SRC (exp
);
2689 /* Certain instructions effect the condition codes. */
2690 else if (GET_MODE (SET_SRC (exp
)) == SImode
2691 || GET_MODE (SET_SRC (exp
)) == HImode
2692 || GET_MODE (SET_SRC (exp
)) == QImode
)
2693 switch (GET_CODE (SET_SRC (exp
)))
2695 case ASHIFTRT
: case LSHIFTRT
:
2697 /* Shifts on the 386 don't set the condition codes if the
2698 shift count is zero. */
2699 if (GET_CODE (XEXP (SET_SRC (exp
), 1)) != CONST_INT
)
2704 /* We assume that the CONST_INT is non-zero (this rtx would
2705 have been deleted if it were zero. */
2707 case PLUS
: case MINUS
: case NEG
:
2708 case AND
: case IOR
: case XOR
:
2709 cc_status
.flags
= CC_NO_OVERFLOW
;
2710 cc_status
.value1
= SET_SRC (exp
);
2711 cc_status
.value2
= SET_DEST (exp
);
2722 else if (GET_CODE (exp
) == PARALLEL
2723 && GET_CODE (XVECEXP (exp
, 0, 0)) == SET
)
2725 if (SET_DEST (XVECEXP (exp
, 0, 0)) == pc_rtx
)
2727 if (SET_DEST (XVECEXP (exp
, 0, 0)) == cc0_rtx
)
2730 if (stack_regs_mentioned_p (SET_SRC (XVECEXP (exp
, 0, 0))))
2731 cc_status
.flags
|= CC_IN_80387
;
2733 cc_status
.value1
= SET_SRC (XVECEXP (exp
, 0, 0));
2744 /* Split one or more DImode RTL references into pairs of SImode
2745 references. The RTL can be REG, offsettable MEM, integer constant, or
2746 CONST_DOUBLE. "operands" is a pointer to an array of DImode RTL to
2747 split and "num" is its length. lo_half and hi_half are output arrays
2748 that parallel "operands". */
2751 split_di (operands
, num
, lo_half
, hi_half
)
2754 rtx lo_half
[], hi_half
[];
2758 if (GET_CODE (operands
[num
]) == REG
)
2760 lo_half
[num
] = gen_rtx (REG
, SImode
, REGNO (operands
[num
]));
2761 hi_half
[num
] = gen_rtx (REG
, SImode
, REGNO (operands
[num
]) + 1);
2763 else if (CONSTANT_P (operands
[num
]))
2765 split_double (operands
[num
], &lo_half
[num
], &hi_half
[num
]);
2767 else if (offsettable_memref_p (operands
[num
]))
2769 lo_half
[num
] = operands
[num
];
2770 hi_half
[num
] = adj_offsettable_operand (operands
[num
], 4);
2777 /* Return 1 if this is a valid binary operation on a 387.
2778 OP is the expression matched, and MODE is its mode. */
2781 binary_387_op (op
, mode
)
2783 enum machine_mode mode
;
2785 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
2788 switch (GET_CODE (op
))
2794 return GET_MODE_CLASS (GET_MODE (op
)) == MODE_FLOAT
;
2802 /* Return 1 if this is a valid shift or rotate operation on a 386.
2803 OP is the expression matched, and MODE is its mode. */
2808 enum machine_mode mode
;
2810 rtx operand
= XEXP (op
, 0);
2812 if (mode
!= VOIDmode
&& mode
!= GET_MODE (op
))
2815 if (GET_MODE (operand
) != GET_MODE (op
)
2816 || GET_MODE_CLASS (GET_MODE (op
)) != MODE_INT
)
2819 return (GET_CODE (op
) == ASHIFT
2820 || GET_CODE (op
) == ASHIFTRT
2821 || GET_CODE (op
) == LSHIFTRT
2822 || GET_CODE (op
) == ROTATE
2823 || GET_CODE (op
) == ROTATERT
);
2826 /* Return 1 if OP is COMPARE rtx with mode VOIDmode.
2827 MODE is not used. */
2830 VOIDmode_compare_op (op
, mode
)
2832 enum machine_mode mode
;
2834 return GET_CODE (op
) == COMPARE
&& GET_MODE (op
) == VOIDmode
;
2837 /* Output code to perform a 387 binary operation in INSN, one of PLUS,
2838 MINUS, MULT or DIV. OPERANDS are the insn operands, where operands[3]
2839 is the expression of the binary operation. The output may either be
2840 emitted here, or returned to the caller, like all output_* functions.
2842 There is no guarantee that the operands are the same mode, as they
2843 might be within FLOAT or FLOAT_EXTEND expressions. */
2846 output_387_binary_op (insn
, operands
)
2852 static char buf
[100];
2854 switch (GET_CODE (operands
[3]))
2857 if (GET_MODE_CLASS (GET_MODE (operands
[1])) == MODE_INT
2858 || GET_MODE_CLASS (GET_MODE (operands
[2])) == MODE_INT
)
2865 if (GET_MODE_CLASS (GET_MODE (operands
[1])) == MODE_INT
2866 || GET_MODE_CLASS (GET_MODE (operands
[2])) == MODE_INT
)
2873 if (GET_MODE_CLASS (GET_MODE (operands
[1])) == MODE_INT
2874 || GET_MODE_CLASS (GET_MODE (operands
[2])) == MODE_INT
)
2881 if (GET_MODE_CLASS (GET_MODE (operands
[1])) == MODE_INT
2882 || GET_MODE_CLASS (GET_MODE (operands
[2])) == MODE_INT
)
2892 strcpy (buf
, base_op
);
2894 switch (GET_CODE (operands
[3]))
2898 if (REG_P (operands
[2]) && REGNO (operands
[0]) == REGNO (operands
[2]))
2901 operands
[2] = operands
[1];
2905 if (GET_CODE (operands
[2]) == MEM
)
2906 return strcat (buf
, AS1 (%z2
,%2));
2908 if (NON_STACK_REG_P (operands
[1]))
2910 output_op_from_reg (operands
[1], strcat (buf
, AS1 (%z0
,%1)));
2913 else if (NON_STACK_REG_P (operands
[2]))
2915 output_op_from_reg (operands
[2], strcat (buf
, AS1 (%z0
,%1)));
2919 if (find_regno_note (insn
, REG_DEAD
, REGNO (operands
[2])))
2920 return strcat (buf
, AS2 (p
,%2,%0));
2922 if (STACK_TOP_P (operands
[0]))
2923 return strcat (buf
, AS2C (%y2
,%0));
2925 return strcat (buf
, AS2C (%2,%0));
2929 if (GET_CODE (operands
[1]) == MEM
)
2930 return strcat (buf
, AS1 (r
%z1
,%1));
2932 if (GET_CODE (operands
[2]) == MEM
)
2933 return strcat (buf
, AS1 (%z2
,%2));
2935 if (NON_STACK_REG_P (operands
[1]))
2937 output_op_from_reg (operands
[1], strcat (buf
, AS1 (r
%z0
,%1)));
2940 else if (NON_STACK_REG_P (operands
[2]))
2942 output_op_from_reg (operands
[2], strcat (buf
, AS1 (%z0
,%1)));
2946 if (! STACK_REG_P (operands
[1]) || ! STACK_REG_P (operands
[2]))
2949 if (find_regno_note (insn
, REG_DEAD
, REGNO (operands
[2])))
2950 return strcat (buf
, AS2 (rp
,%2,%0));
2952 if (find_regno_note (insn
, REG_DEAD
, REGNO (operands
[1])))
2953 return strcat (buf
, AS2 (p
,%1,%0));
2955 if (STACK_TOP_P (operands
[0]))
2957 if (STACK_TOP_P (operands
[1]))
2958 return strcat (buf
, AS2C (%y2
,%0));
2960 return strcat (buf
, AS2 (r
,%y1
,%0));
2962 else if (STACK_TOP_P (operands
[1]))
2963 return strcat (buf
, AS2C (%1,%0));
2965 return strcat (buf
, AS2 (r
,%2,%0));
2972 /* Output code for INSN to convert a float to a signed int. OPERANDS
2973 are the insn operands. The output may be SFmode or DFmode and the
2974 input operand may be SImode or DImode. As a special case, make sure
2975 that the 387 stack top dies if the output mode is DImode, because the
2976 hardware requires this. */
2979 output_fix_trunc (insn
, operands
)
2983 int stack_top_dies
= find_regno_note (insn
, REG_DEAD
, FIRST_STACK_REG
) != 0;
2986 if (! STACK_TOP_P (operands
[1]) ||
2987 (GET_MODE (operands
[0]) == DImode
&& ! stack_top_dies
))
2990 xops
[0] = GEN_INT (12);
2991 xops
[1] = operands
[4];
2993 output_asm_insn (AS1 (fnstc
%W2
,%2), operands
);
2994 output_asm_insn (AS2 (mov
%L2
,%2,%4), operands
);
2995 output_asm_insn (AS2 (mov
%B1
,%0,%h1
), xops
);
2996 output_asm_insn (AS2 (mov
%L4
,%4,%3), operands
);
2997 output_asm_insn (AS1 (fldc
%W3
,%3), operands
);
2999 if (NON_STACK_REG_P (operands
[0]))
3000 output_to_reg (operands
[0], stack_top_dies
);
3001 else if (GET_CODE (operands
[0]) == MEM
)
3004 output_asm_insn (AS1 (fistp
%z0
,%0), operands
);
3006 output_asm_insn (AS1 (fist
%z0
,%0), operands
);
3011 return AS1 (fldc
%W2
,%2);
3014 /* Output code for INSN to compare OPERANDS. The two operands might
3015 not have the same mode: one might be within a FLOAT or FLOAT_EXTEND
3016 expression. If the compare is in mode CCFPEQmode, use an opcode that
3017 will not fault if a qNaN is present. */
3020 output_float_compare (insn
, operands
)
3025 rtx body
= XVECEXP (PATTERN (insn
), 0, 0);
3026 int unordered_compare
= GET_MODE (SET_SRC (body
)) == CCFPEQmode
;
3028 if (! STACK_TOP_P (operands
[0]))
3031 stack_top_dies
= find_regno_note (insn
, REG_DEAD
, FIRST_STACK_REG
) != 0;
3033 if (STACK_REG_P (operands
[1])
3035 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[1]))
3036 && REGNO (operands
[1]) != FIRST_STACK_REG
)
3038 /* If both the top of the 387 stack dies, and the other operand
3039 is also a stack register that dies, then this must be a
3040 `fcompp' float compare */
3042 if (unordered_compare
)
3043 output_asm_insn ("fucompp", operands
);
3045 output_asm_insn ("fcompp", operands
);
3049 static char buf
[100];
3051 /* Decide if this is the integer or float compare opcode, or the
3052 unordered float compare. */
3054 if (unordered_compare
)
3055 strcpy (buf
, "fucom");
3056 else if (GET_MODE_CLASS (GET_MODE (operands
[1])) == MODE_FLOAT
)
3057 strcpy (buf
, "fcom");
3059 strcpy (buf
, "ficom");
3061 /* Modify the opcode if the 387 stack is to be popped. */
3066 if (NON_STACK_REG_P (operands
[1]))
3067 output_op_from_reg (operands
[1], strcat (buf
, AS1 (%z0
,%1)));
3069 output_asm_insn (strcat (buf
, AS1 (%z1
,%y1
)), operands
);
3072 /* Now retrieve the condition code. */
3074 return output_fp_cc0_set (insn
);
3077 /* Output opcodes to transfer the results of FP compare or test INSN
3078 from the FPU to the CPU flags. If TARGET_IEEE_FP, ensure that if the
3079 result of the compare or test is unordered, no comparison operator
3080 succeeds except NE. Return an output template, if any. */
3083 output_fp_cc0_set (insn
)
3087 rtx unordered_label
;
3091 xops
[0] = gen_rtx (REG
, HImode
, 0);
3092 output_asm_insn (AS1 (fnsts
%W0
,%0), xops
);
3094 if (! TARGET_IEEE_FP
)
3097 next
= next_cc0_user (insn
);
3098 if (next
== NULL_RTX
)
3101 if (GET_CODE (next
) == JUMP_INSN
3102 && GET_CODE (PATTERN (next
)) == SET
3103 && SET_DEST (PATTERN (next
)) == pc_rtx
3104 && GET_CODE (SET_SRC (PATTERN (next
))) == IF_THEN_ELSE
)
3106 code
= GET_CODE (XEXP (SET_SRC (PATTERN (next
)), 0));
3108 else if (GET_CODE (PATTERN (next
)) == SET
)
3110 code
= GET_CODE (SET_SRC (PATTERN (next
)));
3115 xops
[0] = gen_rtx (REG
, QImode
, 0);
3120 xops
[1] = GEN_INT (0x45);
3121 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3126 xops
[1] = GEN_INT (0x45);
3127 xops
[2] = GEN_INT (0x01);
3128 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3129 output_asm_insn (AS2 (cmp
%B0
,%2,%h0
), xops
);
3134 xops
[1] = GEN_INT (0x05);
3135 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3140 xops
[1] = GEN_INT (0x45);
3141 xops
[2] = GEN_INT (0x40);
3142 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3143 output_asm_insn (AS1 (dec
%B0
,%h0
), xops
);
3144 output_asm_insn (AS2 (cmp
%B0
,%2,%h0
), xops
);
3149 xops
[1] = GEN_INT (0x45);
3150 xops
[2] = GEN_INT (0x40);
3151 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3152 output_asm_insn (AS2 (cmp
%B0
,%2,%h0
), xops
);
3157 xops
[1] = GEN_INT (0x44);
3158 xops
[2] = GEN_INT (0x40);
3159 output_asm_insn (AS2 (and%B0
,%1,%h0
), xops
);
3160 output_asm_insn (AS2 (xor%B0
,%2,%h0
), xops
);
3174 #define MAX_386_STACK_LOCALS 2
3176 static rtx i386_stack_locals
[(int) MAX_MACHINE_MODE
][MAX_386_STACK_LOCALS
];
3178 /* Define the structure for the machine field in struct function. */
3179 struct machine_function
3181 rtx i386_stack_locals
[(int) MAX_MACHINE_MODE
][MAX_386_STACK_LOCALS
];
3184 /* Functions to save and restore i386_stack_locals.
3185 These will be called, via pointer variables,
3186 from push_function_context and pop_function_context. */
3189 save_386_machine_status (p
)
3192 p
->machine
= (struct machine_function
*) xmalloc (sizeof i386_stack_locals
);
3193 bcopy ((char *) i386_stack_locals
, (char *) p
->machine
->i386_stack_locals
,
3194 sizeof i386_stack_locals
);
3198 restore_386_machine_status (p
)
3201 bcopy ((char *) p
->machine
->i386_stack_locals
, (char *) i386_stack_locals
,
3202 sizeof i386_stack_locals
);
3206 /* Clear stack slot assignments remembered from previous functions.
3207 This is called from INIT_EXPANDERS once before RTL is emitted for each
3211 clear_386_stack_locals ()
3213 enum machine_mode mode
;
3216 for (mode
= VOIDmode
; (int) mode
< (int) MAX_MACHINE_MODE
;
3217 mode
= (enum machine_mode
) ((int) mode
+ 1))
3218 for (n
= 0; n
< MAX_386_STACK_LOCALS
; n
++)
3219 i386_stack_locals
[(int) mode
][n
] = NULL_RTX
;
3221 /* Arrange to save and restore i386_stack_locals around nested functions. */
3222 save_machine_status
= save_386_machine_status
;
3223 restore_machine_status
= restore_386_machine_status
;
3226 /* Return a MEM corresponding to a stack slot with mode MODE.
3227 Allocate a new slot if necessary.
3229 The RTL for a function can have several slots available: N is
3230 which slot to use. */
3233 assign_386_stack_local (mode
, n
)
3234 enum machine_mode mode
;
3237 if (n
< 0 || n
>= MAX_386_STACK_LOCALS
)
3240 if (i386_stack_locals
[(int) mode
][n
] == NULL_RTX
)
3241 i386_stack_locals
[(int) mode
][n
]
3242 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
3244 return i386_stack_locals
[(int) mode
][n
];