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1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
36 } \
37 while (0)
38
39 /* Run-time compilation parameters selecting different hardware subsets. */
40
41 extern int target_flags;
42
43 /* The sizes of the code and literals on the current page. */
44
45 extern int mvs_page_code, mvs_page_lit;
46
47 /* The current page number and the base page number for the function. */
48
49 extern int mvs_page_num, function_base_page;
50
51 /* The name of the current function. */
52
53 extern char *mvs_function_name;
54
55 /* The length of the function name malloc'd area. */
56
57 extern size_t mvs_function_name_length;
58
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
62
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
64
65 /* Default target switches */
66
67 #define TARGET_DEFAULT 1
68
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
73
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
78
79 #define OVERRIDE_OPTIONS override_options ()
80
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
84
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
87
88 /* Target machine storage layout */
89
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
92
93 #define BITS_BIG_ENDIAN 1
94
95 /* Define this if most significant byte of a word is the lowest numbered. */
96
97 #define BYTES_BIG_ENDIAN 1
98
99 /* Define this if MS word of a multiword is the lowest numbered. */
100
101 #define WORDS_BIG_ENDIAN 1
102
103 /* Width of a word, in units (bytes). */
104
105 #define UNITS_PER_WORD 4
106
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
108
109 #define POINTER_BOUNDARY 32
110
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
112
113 #define PARM_BOUNDARY 32
114
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
116
117 #define STACK_BOUNDARY 32
118
119 /* Allocation boundary (in *bits*) for the code of a function. */
120
121 #define FUNCTION_BOUNDARY 32
122
123 /* There is no point aligning anything to a rounder boundary than this. */
124
125 #define BIGGEST_ALIGNMENT 64
126
127 /* Alignment of field after `int : 0' in a structure. */
128
129 #define EMPTY_FIELD_BOUNDARY 32
130
131 /* Define this if move instructions will actually fail to work when given
132 unaligned data. */
133
134 #define STRICT_ALIGNMENT 0
135
136 /* Define target floating point format. */
137
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
139
140 /* Define character mapping for cross-compiling. */
141 /* but only define it if really needed, since otherwise it will break builds */
142
143 #ifdef TARGET_EBCDIC
144 #if HOST_CHARSET == HOST_CHARSET_EBCDIC
145 #define MAP_CHARACTER(c) ((char)(c))
146 #else
147 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
148 #endif
149 #endif
150
151 #ifdef TARGET_HLASM
152 /* HLASM requires #pragma map. */
153 #define REGISTER_TARGET_PRAGMAS() c_register_pragma (0, "map", i370_pr_map)
154 #endif /* TARGET_HLASM */
155
156 /* Define maximum length of page minus page escape overhead. */
157
158 #define MAX_MVS_PAGE_LENGTH 4080
159
160 /* Define special register allocation order desired.
161 Don't fiddle with this. I did, and I got all sorts of register
162 spill errors when compiling even relatively simple programs...
163 I have no clue why ...
164 E.g. this one is bad:
165 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
166 */
167
168 #define REG_ALLOC_ORDER \
169 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
170
171 /* Standard register usage. */
172
173 /* Number of actual hardware registers. The hardware registers are
174 assigned numbers for the compiler from 0 to just below
175 FIRST_PSEUDO_REGISTER.
176 All registers that the compiler knows about must be given numbers,
177 even those that are not normally considered general registers.
178 For the 370, we give the data registers numbers 0-15,
179 and the floating point registers numbers 16-19. */
180
181 #define FIRST_PSEUDO_REGISTER 20
182
183 /* Define base and page registers. */
184
185 #define BASE_REGISTER 3
186 #define PAGE_REGISTER 4
187
188 #ifdef TARGET_HLASM
189 /* 1 for registers that have pervasive standard uses and are not available
190 for the register allocator. These are registers that must have fixed,
191 valid values stored in them for the entire length of the subroutine call,
192 and must not in any way be moved around, jiggered with, etc. That is,
193 they must never be clobbered, and, if clobbered, the register allocator
194 will never restore them back.
195
196 We use five registers in this special way:
197 -- R3 which is used as the base register
198 -- R4 the page origin table pointer used to load R3,
199 -- R11 the arg pointer.
200 -- R12 the TCA pointer
201 -- R13 the stack (DSA) pointer
202
203 A fifth register is also exceptional: R14 is used in many branch
204 instructions to hold the target of the branch. Technically, this
205 does not qualify R14 as a register with a long-term meaning; it should
206 be enough, theoretically, to note that these instructions clobber
207 R14, and let the compiler deal with that. In practice, however,
208 the "clobber" directive acts as a barrier to optimization, and the
209 optimizer appears to be unable to perform optimizations around branches.
210 Thus, a much better strategy appears to give R14 a pervasive use;
211 this eliminates it from the register pool witout hurting optimization.
212
213 There are other registers which have special meanings, but its OK
214 for them to get clobbered, since other allocator config below will
215 make sure that they always have the right value. These are for
216 example:
217 -- R1 the returned structure pointer.
218 -- R10 the static chain reg.
219 -- R15 holds the value a subroutine returns.
220
221 Notice that it is *almost* safe to mark R11 as available to the allocator.
222 By marking it as a call_used_register, in most cases, the compiler
223 can handle it being clobbered. However, there are a few rare
224 circumstances where the register allocator will allocate r11 and
225 also try to use it as the arg pointer ... thus it must be marked fixed.
226 I think this is a bug, but I can't track it down...
227 */
228
229 #define FIXED_REGISTERS \
230 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
231 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
232
233 /* 1 for registers not available across function calls. These must include
234 the FIXED_REGISTERS and also any registers that can be used without being
235 saved.
236 The latter must include the registers where values are returned
237 and the register where structure-value addresses are passed.
238 NOTE: all floating registers are undefined across calls.
239 */
240
241 #define CALL_USED_REGISTERS \
242 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
243 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
244
245 /* Return number of consecutive hard regs needed starting at reg REGNO
246 to hold something of mode MODE.
247 This is ordinarily the length in words of a value of mode MODE
248 but can be less for certain modes in special long registers.
249 Note that DCmode (complex double) needs two regs.
250 */
251 #endif /* TARGET_HLASM */
252
253 /* ================= */
254 #ifdef TARGET_ELF_ABI
255 /* The Linux/ELF ABI uses the same register layout as the
256 * the MVS/OE version, with the following exceptions:
257 * -- r12 (rtca) is not used.
258 */
259
260 #define FIXED_REGISTERS \
261 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
262 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
263
264 #define CALL_USED_REGISTERS \
265 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
266 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
267
268 #endif /* TARGET_ELF_ABI */
269 /* ================= */
270
271
272 #define HARD_REGNO_NREGS(REGNO, MODE) \
273 ((REGNO) > 15 ? \
274 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
275 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
276
277 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
278 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
279 even registers can hold DI. The floating point registers can hold
280 either SF, DF, SC or DC. */
281
282 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
283 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
284 (((MODE) != DImode) && ((MODE) != DFmode))) \
285 : ((MODE) == SFmode || (MODE) == DFmode) || \
286 (MODE) == SCmode || (MODE) == DCmode)
287
288 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
289 mode MODE1 and one has mode MODE2.
290 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
291 for any hard reg, then this must be 0 for correct output. */
292
293 #define MODES_TIEABLE_P(MODE1, MODE2) \
294 (((MODE1) == SFmode || (MODE1) == DFmode) \
295 == ((MODE2) == SFmode || (MODE2) == DFmode))
296
297 /* Specify the registers used for certain standard purposes.
298 The values of these macros are register numbers. */
299
300 /* 370 PC isn't overloaded on a register. */
301
302 /* #define PC_REGNUM */
303
304 /* Register to use for pushing function arguments. */
305
306 #define STACK_POINTER_REGNUM 13
307
308 /* Base register for access to local variables of the function. */
309
310 #define FRAME_POINTER_REGNUM 13
311
312 /* Value should be nonzero if functions must have frame pointers.
313 Zero means the frame pointer need not be set up (and parms may be
314 accessed via the stack pointer) in functions that seem suitable.
315 This is computed in `reload', in reload1.c. */
316
317 #define FRAME_POINTER_REQUIRED 1
318
319 /* Base register for access to arguments of the function. */
320
321 #define ARG_POINTER_REGNUM 11
322
323 /* R10 is register in which static-chain is passed to a function.
324 Static-chaining is done when a nested function references as a global
325 a stack variable of its parent: e.g.
326 int parent_func (int arg) {
327 int x; // x is in parents stack
328 void child_func (void) { x++: } // child references x as global var
329 ...
330 }
331 */
332
333 #define STATIC_CHAIN_REGNUM 10
334
335 /* R1 is register in which address to store a structure value is passed to
336 a function. This is used only when returning 64-bit long-long in a 32-bit arch
337 and when calling functions that return structs by value. e.g.
338 typedef struct A_s { int a,b,c; } A_t;
339 A_t fun_returns_value (void) {
340 A_t a; a.a=1; a.b=2 a.c=3;
341 return a;
342 }
343 In the above, the storage for the return value is in the callers stack, and
344 the R1 points at that mem location.
345 */
346
347 #define STRUCT_VALUE_REGNUM 1
348
349 /* Define the classes of registers for register constraints in the
350 machine description. Also define ranges of constants.
351
352 One of the classes must always be named ALL_REGS and include all hard regs.
353 If there is more than one class, another class must be named NO_REGS
354 and contain no registers.
355
356 The name GENERAL_REGS must be the name of a class (or an alias for
357 another name such as ALL_REGS). This is the class of registers
358 that is allowed by "g" or "r" in a register constraint.
359 Also, registers outside this class are allocated only when
360 instructions express preferences for them.
361
362 The classes must be numbered in nondecreasing order; that is,
363 a larger-numbered class must never be contained completely
364 in a smaller-numbered class.
365
366 For any two classes, it is very desirable that there be another
367 class that represents their union. */
368
369 enum reg_class
370 {
371 NO_REGS, ADDR_REGS, DATA_REGS,
372 FP_REGS, ALL_REGS, LIM_REG_CLASSES
373 };
374
375 #define GENERAL_REGS DATA_REGS
376 #define N_REG_CLASSES (int) LIM_REG_CLASSES
377
378 /* Give names of register classes as strings for dump file. */
379
380 #define REG_CLASS_NAMES \
381 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
382
383 /* Define which registers fit in which classes. This is an initializer for
384 a vector of HARD_REG_SET of length N_REG_CLASSES. */
385
386 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
387
388 /* The same information, inverted:
389 Return the class number of the smallest class containing
390 reg number REGNO. This could be a conditional expression
391 or could index an array. */
392
393 #define REGNO_REG_CLASS(REGNO) \
394 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
395
396 /* The class value for index registers, and the one for base regs. */
397
398 #define INDEX_REG_CLASS ADDR_REGS
399 #define BASE_REG_CLASS ADDR_REGS
400
401 /* Get reg_class from a letter such as appears in the machine description. */
402
403 #define REG_CLASS_FROM_LETTER(C) \
404 ((C) == 'a' ? ADDR_REGS : \
405 ((C) == 'd' ? DATA_REGS : \
406 ((C) == 'f' ? FP_REGS : NO_REGS)))
407
408 /* The letters I, J, K, L and M in a register constraint string can be used
409 to stand for particular ranges of immediate operands.
410 This macro defines what the ranges are.
411 C is the letter, and VALUE is a constant value.
412 Return 1 if VALUE is in the range specified by C. */
413
414 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
415 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
416 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
417 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
418
419 /* Similar, but for floating constants, and defining letters G and H.
420 Here VALUE is the CONST_DOUBLE rtx itself. */
421
422 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
423
424 /* see recog.c for details */
425 #define EXTRA_CONSTRAINT(OP,C) \
426 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
427 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
428
429 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
430 return the class of reg to actually use. In general this is just CLASS;
431 but on some machines in some cases it is preferable to use a more
432 restrictive class.
433
434 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
435 rare occasions when lots of egisters are spilled, reload() will try
436 to put a const int into r0 and then use r0 as an index register.
437 */
438
439 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
440 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
441 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
442 GET_CODE(X) == LABEL_REF || \
443 GET_CODE(X) == SYMBOL_REF || \
444 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
445
446 /* Return the maximum number of consecutive registers needed to represent
447 mode MODE in a register of class CLASS.
448 Note that DCmode (complex double) needs two regs.
449 */
450
451 #define CLASS_MAX_NREGS(CLASS, MODE) \
452 ((CLASS) == FP_REGS ? \
453 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
454 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
455
456 /* Stack layout; function entry, exit and calling. */
457
458 /* Define this if pushing a word on the stack makes the stack pointer a
459 smaller address. */
460 /* ------------------------------------------------------------------- */
461
462 /* ================= */
463 #ifdef TARGET_HLASM
464 /* #define STACK_GROWS_DOWNWARD */
465
466 /* Define this if the nominal address of the stack frame is at the
467 high-address end of the local variables; that is, each additional local
468 variable allocated goes at a more negative offset in the frame. */
469
470 /* #define FRAME_GROWS_DOWNWARD */
471
472 /* Offset within stack frame to start allocating local variables at.
473 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
474 first local allocated. Otherwise, it is the offset to the BEGINNING
475 of the first local allocated. */
476
477 #define STARTING_FRAME_OFFSET \
478 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
479
480 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
481
482 /* If we generate an insn to push BYTES bytes, this says how many the stack
483 pointer really advances by. On the 370, we have no push instruction. */
484
485 #endif /* TARGET_HLASM */
486
487 /* ================= */
488 #ifdef TARGET_ELF_ABI
489
490 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
491 But we want the compiler to generate posistive displacements from the
492 stack pointer, and so we make the frame lie above the stack. */
493
494 #define STACK_GROWS_DOWNWARD
495 /* #define FRAME_GROWS_DOWNWARD */
496
497 /* Offset within stack frame to start allocating local variables at.
498 This is the offset to the BEGINNING of the first local allocated. */
499
500 #define STARTING_FRAME_OFFSET \
501 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
502
503 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
504
505 #endif /* TARGET_ELF_ABI */
506 /* ================= */
507
508 /* #define PUSH_ROUNDING(BYTES) */
509
510 /* Accumulate the outgoing argument count so we can request the right
511 DSA size and determine stack offset. */
512
513 #define ACCUMULATE_OUTGOING_ARGS 1
514
515 /* Define offset from stack pointer, to location where a parm can be
516 pushed. */
517
518 #define STACK_POINTER_OFFSET 148
519
520 /* Offset of first parameter from the argument pointer register value. */
521
522 #define FIRST_PARM_OFFSET(FNDECL) 0
523
524 /* 1 if N is a possible register number for function argument passing.
525 On the 370, no registers are used in this way. */
526
527 #define FUNCTION_ARG_REGNO_P(N) 0
528
529 /* Define a data type for recording info about an argument list during
530 the scan of that argument list. This data type should hold all
531 necessary information about the function itself and about the args
532 processed so far, enough to enable macros such as FUNCTION_ARG to
533 determine where the next arg should go. */
534
535 #define CUMULATIVE_ARGS int
536
537 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
538 a function whose data type is FNTYPE.
539 For a library call, FNTYPE is 0. */
540
541 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
542
543 /* Update the data in CUM to advance over an argument of mode MODE and
544 data type TYPE. (TYPE is null for libcalls where that information
545 may not be available.) */
546
547 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
548 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
549 ? 256 \
550 : (MODE) != BLKmode \
551 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
552 : (int_size_in_bytes (TYPE) + 3) / 4))
553
554 /* Define where to put the arguments to a function. Value is zero to push
555 the argument on the stack, or a hard register in which to store the
556 argument. */
557
558 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
559
560 /* For an arg passed partly in registers and partly in memory, this is the
561 number of registers used. For args passed entirely in registers or
562 entirely in memory, zero. */
563
564 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
565
566 /* Define if returning from a function call automatically pops the
567 arguments described by the number-of-args field in the call. */
568
569 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
570
571 /* The FUNCTION_VALUE macro defines how to find the value returned by a
572 function. VALTYPE is the data type of the value (as a tree).
573 If the precise function being called is known, FUNC is its FUNCTION_DECL;
574 otherwise, FUNC is NULL.
575
576 On the 370 the return value is in R15 or R16. However,
577 DImode (64-bit ints) scalars need to get returned on the stack,
578 with r15 pointing to the location. To accomplish this, we define
579 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
580 and the DImode scalars.
581 */
582
583 #define RET_REG(MODE) \
584 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
585
586 #define FUNCTION_VALUE(VALTYPE, FUNC) \
587 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
588
589 #define RETURN_IN_MEMORY(VALTYPE) \
590 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
591
592 /* Define how to find the value returned by a library function assuming
593 the value has mode MODE. */
594
595 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
596
597 /* 1 if N is a possible register number for a function value.
598 On the 370 under C/370, R15 and R16 are thus used. */
599
600 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
601
602 /* This macro definition sets up a default value for `main' to return. */
603
604 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
605
606
607 /* Output assembler code for a block containing the constant parts of a
608 trampoline, leaving space for the variable parts.
609
610 On the 370, the trampoline contains these instructions:
611
612 BALR 14,0
613 USING *,14
614 L STATIC_CHAIN_REGISTER,X
615 L 15,Y
616 BR 15
617 X DS 0F
618 Y DS 0F */
619 /*
620 I am confused as to why this emitting raw binary, instead of instructions ...
621 see for example, rs6000/rs000.c for an example of a different way to
622 do this ... especially since BASR should probably be substituted for BALR.
623 */
624
625 #define TRAMPOLINE_TEMPLATE(FILE) \
626 { \
627 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
628 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
629 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
630 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
631 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
632 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
633 assemble_aligned_integer (2, const0_rtx); \
634 assemble_aligned_integer (2, const0_rtx); \
635 assemble_aligned_integer (2, const0_rtx); \
636 assemble_aligned_integer (2, const0_rtx); \
637 }
638
639 /* Length in units of the trampoline for entering a nested function. */
640
641 #define TRAMPOLINE_SIZE 20
642
643 /* Emit RTL insns to initialize the variable parts of a trampoline. */
644
645 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
646 { \
647 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
648 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
649 }
650
651 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
652 pointer does not matter (provided there is a frame pointer). */
653
654 #define EXIT_IGNORE_STACK 1
655
656 /* Addressing modes, and classification of registers for them. */
657
658 /* These assume that REGNO is a hard or pseudo reg number. They give
659 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
660 reg currently allocated to a suitable hard reg.
661 These definitions are NOT overridden anywhere. */
662
663 #define REGNO_OK_FOR_INDEX_P(REGNO) \
664 (((REGNO) > 0 && (REGNO) < 16) \
665 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
666
667 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
668
669 #define REGNO_OK_FOR_DATA_P(REGNO) \
670 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
671
672 #define REGNO_OK_FOR_FP_P(REGNO) \
673 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
674
675 /* Now macros that check whether X is a register and also,
676 strictly, whether it is in a specified class. */
677
678 /* 1 if X is a data register. */
679
680 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
681
682 /* 1 if X is an fp register. */
683
684 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
685
686 /* 1 if X is an address register. */
687
688 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
689
690 /* Maximum number of registers that can appear in a valid memory address. */
691
692 #define MAX_REGS_PER_ADDRESS 2
693
694 /* Recognize any constant value that is a valid address. */
695
696 #define CONSTANT_ADDRESS_P(X) \
697 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
698 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
699 || (GET_CODE (X) == CONST \
700 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
701 || (GET_CODE (X) == CONST \
702 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
703 && !SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (X, 0), 0))))
704
705 /* Nonzero if the constant value X is a legitimate general operand.
706 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
707
708 #define LEGITIMATE_CONSTANT_P(X) 1
709
710 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
711 its validity for a certain class. We have two alternate definitions
712 for each of them. The usual definition accepts all pseudo regs; the
713 other rejects them all. The symbol REG_OK_STRICT causes the latter
714 definition to be used.
715
716 Most source files want to accept pseudo regs in the hope that they will
717 get allocated to the class that the insn wants them to be in.
718 Some source files that are used after register allocation
719 need to be strict. */
720
721 #ifndef REG_OK_STRICT
722
723 /* Nonzero if X is a hard reg that can be used as an index or if it is
724 a pseudo reg. */
725
726 #define REG_OK_FOR_INDEX_P(X) \
727 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
728
729 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
730 a pseudo reg. */
731
732 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
733
734 #else /* REG_OK_STRICT */
735
736 /* Nonzero if X is a hard reg that can be used as an index. */
737
738 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
739
740 /* Nonzero if X is a hard reg that can be used as a base reg. */
741
742 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
743
744 #endif /* REG_OK_STRICT */
745
746 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
747 valid memory address for an instruction.
748 The MODE argument is the machine mode for the MEM expression
749 that wants to use this address.
750
751 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
752 except for CONSTANT_ADDRESS_P which is actually machine-independent.
753 */
754
755 #define COUNT_REGS(X, REGS, FAIL) \
756 if (REG_P (X)) { \
757 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
758 else goto FAIL; \
759 } \
760 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
761 goto FAIL;
762
763 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
764 { \
765 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
766 goto ADDR; \
767 if (GET_CODE (X) == PLUS) \
768 { \
769 int regs = 0; \
770 rtx x0 = XEXP (X, 0); \
771 rtx x1 = XEXP (X, 1); \
772 if (GET_CODE (x0) == PLUS) \
773 { \
774 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
775 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
776 COUNT_REGS (x1, regs, FAIL); \
777 if (regs == 2) \
778 goto ADDR; \
779 } \
780 else if (GET_CODE (x1) == PLUS) \
781 { \
782 COUNT_REGS (x0, regs, FAIL); \
783 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
784 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
785 if (regs == 2) \
786 goto ADDR; \
787 } \
788 else \
789 { \
790 COUNT_REGS (x0, regs, FAIL); \
791 COUNT_REGS (x1, regs, FAIL); \
792 if (regs != 0) \
793 goto ADDR; \
794 } \
795 } \
796 FAIL: ; \
797 }
798
799 /* The 370 has no mode dependent addresses. */
800
801 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
802
803 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
804 Try machine-dependent ways of modifying an illegitimate address
805 to be legitimate. If we find one, return the new, valid address.
806 This macro is used in only one place: `memory_address' in explow.c.
807
808 Several comments:
809 (1) It's not obvious that this macro results in better code
810 than its omission does. For historical reasons we leave it in.
811
812 (2) This macro may be (???) implicated in the accidental promotion
813 or RS operand to RX operands, which bombs out any RS, SI, SS
814 instruction that was expecting a simple address. Note that
815 this occurs fairly rarely ...
816
817 (3) There is a bug somewhere that causes either r4 to be spilled,
818 or causes r0 to be used as a base register. Changeing the macro
819 below will make the bug move around, but will not make it go away
820 ... Note that this is a rare bug ...
821
822 */
823
824 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
825 { \
826 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
827 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
828 copy_to_mode_reg (SImode, XEXP (X, 1))); \
829 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
830 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
831 copy_to_mode_reg (SImode, XEXP (X, 0))); \
832 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
833 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
834 force_operand (XEXP (X, 0), 0)); \
835 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
836 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
837 force_operand (XEXP (X, 1), 0)); \
838 if (memory_address_p (MODE, X)) \
839 goto WIN; \
840 }
841
842 /* Specify the machine mode that this machine uses for the index in the
843 tablejump instruction. */
844
845 #define CASE_VECTOR_MODE SImode
846
847 /* Define this if the tablejump instruction expects the table to contain
848 offsets from the address of the table.
849 Do not define this if the table should contain absolute addresses. */
850
851 /* #define CASE_VECTOR_PC_RELATIVE */
852
853 /* Define this if fixuns_trunc is the same as fix_trunc. */
854
855 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
856
857 /* We use "unsigned char" as default. */
858
859 #define DEFAULT_SIGNED_CHAR 0
860
861 /* Max number of bytes we can move from memory to memory in one reasonably
862 fast instruction. */
863
864 #define MOVE_MAX 256
865
866 /* Nonzero if access to memory by bytes is slow and undesirable. */
867
868 #define SLOW_BYTE_ACCESS 1
869
870 /* Define if shifts truncate the shift count which implies one can omit
871 a sign-extension or zero-extension of a shift count. */
872
873 /* #define SHIFT_COUNT_TRUNCATED */
874
875 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
876 is done just by pretending it is already truncated. */
877
878 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
879
880 /* ??? Investigate defining STORE_FLAG_VALUE to (-1). */
881
882 /* When a prototype says `char' or `short', really pass an `int'. */
883
884 #define PROMOTE_PROTOTYPES 1
885
886 /* Don't perform CSE on function addresses. */
887
888 #define NO_FUNCTION_CSE
889
890 /* Specify the machine mode that pointers have.
891 After generation of rtl, the compiler makes no further distinction
892 between pointers and any other objects of this machine mode. */
893
894 #define Pmode SImode
895
896 /* A function address in a call instruction is a byte address (for
897 indexing purposes) so give the MEM rtx a byte's mode. */
898
899 #define FUNCTION_MODE QImode
900
901 /* A C statement (sans semicolon) to update the integer variable COST
902 based on the relationship between INSN that is dependent on
903 DEP_INSN through the dependence LINK. The default is to make no
904 adjustment to COST. This can be used for example to specify to
905 the scheduler that an output- or anti-dependence does not incur
906 the same cost as a data-dependence.
907
908 We will want to use this to indicate that there is a cost associated
909 with the loading, followed by use of base registers ...
910 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
911 */
912
913 /* Tell final.c how to eliminate redundant test instructions. */
914
915 /* Here we define machine-dependent flags and fields in cc_status
916 (see `conditions.h'). */
917
918 /* Store in cc_status the expressions that the condition codes will
919 describe after execution of an instruction whose pattern is EXP.
920 Do not alter them if the instruction would not alter the cc's.
921
922 On the 370, load insns do not alter the cc's. However, in some
923 cases these instructions can make it possibly invalid to use the
924 saved cc's. In those cases we clear out some or all of the saved
925 cc's so they won't be used.
926
927 Note that only some arith instructions set the CC. These include
928 add, subtract, complement, various shifts. Note that multiply
929 and divide do *not* set set the CC. Therefore, in the code below,
930 don't set the status for MUL, DIV, etc.
931
932 Note that the bitwise ops set the condition code, but not in a
933 way that we can make use of it. So we treat these as clobbering,
934 rather than setting the CC. These are clobbered in the individual
935 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
936 */
937
938 #define NOTICE_UPDATE_CC(EXP, INSN) \
939 { \
940 rtx exp = (EXP); \
941 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
942 exp = XVECEXP (exp, 0, 0); \
943 if (GET_CODE (exp) != SET) \
944 CC_STATUS_INIT; \
945 else \
946 { \
947 if (XEXP (exp, 0) == cc0_rtx) \
948 { \
949 cc_status.value1 = XEXP (exp, 0); \
950 cc_status.value2 = XEXP (exp, 1); \
951 cc_status.flags = 0; \
952 } \
953 else \
954 { \
955 if (cc_status.value1 \
956 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
957 cc_status.value1 = 0; \
958 if (cc_status.value2 \
959 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
960 cc_status.value2 = 0; \
961 switch (GET_CODE (XEXP (exp, 1))) \
962 { \
963 case PLUS: case MINUS: case NEG: \
964 case NOT: case ABS: \
965 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
966 \
967 /* mult and div don't set any cc codes !! */ \
968 case MULT: /* case UMULT: */ case DIV: case UDIV: \
969 /* and, or and xor set the cc's the wrong way !! */ \
970 case AND: case IOR: case XOR: \
971 /* some shifts set the CC some don't. */ \
972 case ASHIFT: case ASHIFTRT: \
973 do {} while (0); \
974 default: \
975 break; \
976 } \
977 } \
978 } \
979 }
980
981
982 #define CC_STATUS_SET(V1, V2) \
983 { \
984 cc_status.flags = 0; \
985 cc_status.value1 = (V1); \
986 cc_status.value2 = (V2); \
987 if (cc_status.value1 \
988 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
989 cc_status.value2 = 0; \
990 }
991
992 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
993 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
994
995 /* ------------------------------------------ */
996 /* Control the assembler format that we output. */
997
998 /* Define standard character escape sequences for non-ASCII targets
999 only. */
1000
1001 #ifdef TARGET_EBCDIC
1002 #define TARGET_ESC 39
1003 #define TARGET_BELL 47
1004 #define TARGET_BS 22
1005 #define TARGET_TAB 5
1006 #define TARGET_NEWLINE 21
1007 #define TARGET_VT 11
1008 #define TARGET_FF 12
1009 #define TARGET_CR 13
1010 #endif
1011
1012 /* ======================================================== */
1013
1014 #ifdef TARGET_HLASM
1015 #define TEXT_SECTION_ASM_OP "* Program text area"
1016 #define DATA_SECTION_ASM_OP "* Program data area"
1017 #define INIT_SECTION_ASM_OP "* Program initialization area"
1018 #define SHARED_SECTION_ASM_OP "* Program shared data"
1019 #define CTOR_LIST_BEGIN /* NO OP */
1020 #define CTOR_LIST_END /* NO OP */
1021 #define MAX_MVS_LABEL_SIZE 8
1022
1023 /* How to refer to registers in assembler output. This sequence is
1024 indexed by compiler's hard-register-number (see above). */
1025
1026 #define REGISTER_NAMES \
1027 { "0", "1", "2", "3", "4", "5", "6", "7", \
1028 "8", "9", "10", "11", "12", "13", "14", "15", \
1029 "0", "2", "4", "6" \
1030 }
1031
1032 #define ASM_COMMENT_START "*"
1033 #define ASM_APP_OFF ""
1034 #define ASM_APP_ON ""
1035
1036 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1037 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1038
1039 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1040 { \
1041 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1042 if (mvs_check_alias (NAME, temp) == 2) \
1043 { \
1044 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1045 } \
1046 }
1047
1048 /* MVS externals are limited to 8 characters, upper case only.
1049 The '_' is mapped to '@', except for MVS functions, then '#'. */
1050
1051
1052 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1053 { \
1054 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1055 if (!mvs_get_alias (NAME, temp)) \
1056 strcpy (temp, NAME); \
1057 if (!strcmp (temp,"main")) \
1058 strcpy (temp,"gccmain"); \
1059 if (mvs_function_check (temp)) \
1060 ch = '#'; \
1061 else \
1062 ch = '@'; \
1063 for (bp = temp; *bp; bp++) \
1064 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1065 fprintf (FILE, "%s", temp); \
1066 }
1067
1068 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1069 sprintf (LABEL, "*%s%lu", PREFIX, (unsigned long)(NUM))
1070
1071 /* Generate case label. For HLASM we can change to the data CSECT
1072 and put the vectors out of the code body. The assembler just
1073 concatenates CSECTs with the same name. */
1074
1075 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1076 fprintf (FILE, "\tDS\t0F\n"); \
1077 fprintf (FILE,"\tCSECT\n"); \
1078 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1079
1080 /* Put the CSECT back to the code body */
1081
1082 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1083 assemble_name (FILE, mvs_function_name); \
1084 fputs ("\tCSECT\n", FILE);
1085
1086 /* This is how to output an element of a case-vector that is absolute. */
1087
1088 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1089 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1090
1091 /* This is how to output an element of a case-vector that is relative. */
1092
1093 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1094 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1095
1096 /* This is how to output an insn to push a register on the stack.
1097 It need not be very fast code.
1098 Right now, PUSH & POP are used only when profiling is enabled,
1099 and then, only to push the static chain reg and the function struct
1100 value reg, and only if those are used. Since profiling is not
1101 supported anyway, punt on this. */
1102
1103 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1104 mvs_check_page (FILE, 8, 4); \
1105 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1106 reg_names[REGNO], STACK_POINTER_OFFSET)
1107
1108 /* This is how to output an insn to pop a register from the stack.
1109 It need not be very fast code. */
1110
1111 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1112 mvs_check_page (FILE, 8, 0); \
1113 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1114 reg_names[REGNO], STACK_POINTER_OFFSET)
1115
1116 /* This outputs a text string. The string are chopped up to fit into
1117 an 80 byte record. Also, control and special characters, interpreted
1118 by the IBM assembler, are output numerically. */
1119
1120 #define MVS_ASCII_TEXT_LENGTH 48
1121
1122 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1123 { \
1124 size_t i, limit = (LEN); \
1125 int j; \
1126 for (j = 0, i = 0; i < limit; j++, i++) \
1127 { \
1128 int c = (PTR)[i]; \
1129 if (ISCNTRL (c) || c == '&') \
1130 { \
1131 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1132 fprintf (FILE, "'\n"); \
1133 j = -1; \
1134 if (c == '&') c = MAP_CHARACTER (c); \
1135 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1136 } \
1137 else \
1138 { \
1139 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1140 fprintf (FILE, "\tDC\tC'"); \
1141 if ( c == '\'' ) \
1142 fprintf (FILE, "%c%c", c, c); \
1143 else \
1144 fprintf (FILE, "%c", c); \
1145 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1146 fprintf (FILE, "'\n" ); \
1147 } \
1148 } \
1149 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1150 fprintf (FILE, "'\n"); \
1151 }
1152
1153 /* This is how to output an assembler line that says to advance the
1154 location counter to a multiple of 2**LOG bytes. */
1155
1156 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1157 if (LOG) \
1158 { \
1159 if ((LOG) == 1) \
1160 fprintf (FILE, "\tDS\t0H\n" ); \
1161 else \
1162 fprintf (FILE, "\tDS\t0F\n" ); \
1163 } \
1164
1165 /* The maximum length of memory that the IBM assembler will allow in one
1166 DS operation. */
1167
1168 #define MAX_CHUNK 32767
1169
1170 /* A C statement to output to the stdio stream FILE an assembler
1171 instruction to advance the location counter by SIZE bytes. Those
1172 bytes should be zero when loaded. */
1173
1174 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1175 { \
1176 unsigned HOST_WIDE_INT s; \
1177 int k; \
1178 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1179 { \
1180 if (s > MAX_CHUNK) \
1181 k = MAX_CHUNK; \
1182 else \
1183 k = s; \
1184 fprintf (FILE, "\tDS\tXL%d\n", k); \
1185 } \
1186 }
1187
1188 /* A C statement (sans semicolon) to output to the stdio stream
1189 FILE the assembler definition of a common-label named NAME whose
1190 size is SIZE bytes. The variable ROUNDED is the size rounded up
1191 to whatever alignment the caller wants. */
1192
1193 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1194 { \
1195 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1196 if (mvs_check_alias(NAME, temp) == 2) \
1197 { \
1198 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1199 } \
1200 fputs ("\tENTRY\t", FILE); \
1201 assemble_name (FILE, NAME); \
1202 fputs ("\n", FILE); \
1203 fprintf (FILE, "\tDS\t0F\n"); \
1204 ASM_OUTPUT_LABEL (FILE,NAME); \
1205 ASM_OUTPUT_SKIP (FILE,SIZE); \
1206 }
1207
1208 /* A C statement (sans semicolon) to output to the stdio stream
1209 FILE the assembler definition of a local-common-label named NAME
1210 whose size is SIZE bytes. The variable ROUNDED is the size
1211 rounded up to whatever alignment the caller wants. */
1212
1213 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1214 { \
1215 fprintf (FILE, "\tDS\t0F\n"); \
1216 ASM_OUTPUT_LABEL (FILE,NAME); \
1217 ASM_OUTPUT_SKIP (FILE,SIZE); \
1218 }
1219
1220 #define ASM_PN_FORMAT "%s%lu"
1221
1222 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1223 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1224 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1225
1226 #define PRINT_OPERAND(FILE, XV, CODE) \
1227 { \
1228 switch (GET_CODE (XV)) \
1229 { \
1230 static char curreg[4]; \
1231 case REG: \
1232 if (CODE == 'N') \
1233 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1234 else \
1235 strcpy (curreg, reg_names[REGNO (XV)]); \
1236 fprintf (FILE, "%s", curreg); \
1237 break; \
1238 case MEM: \
1239 { \
1240 rtx addr = XEXP (XV, 0); \
1241 if (CODE == 'O') \
1242 { \
1243 if (GET_CODE (addr) == PLUS) \
1244 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1245 else \
1246 fprintf (FILE, "0"); \
1247 } \
1248 else if (CODE == 'R') \
1249 { \
1250 if (GET_CODE (addr) == PLUS) \
1251 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1252 else \
1253 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1254 } \
1255 else \
1256 output_address (XEXP (XV, 0)); \
1257 } \
1258 break; \
1259 case SYMBOL_REF: \
1260 case LABEL_REF: \
1261 mvs_page_lit += 4; \
1262 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1263 else fprintf (FILE, "=A("); \
1264 output_addr_const (FILE, XV); \
1265 fprintf (FILE, ")"); \
1266 break; \
1267 case CONST_INT: \
1268 if (CODE == 'B') \
1269 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1270 else if (CODE == 'X') \
1271 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1272 else if (CODE == 'h') \
1273 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1274 else if (CODE == 'H') \
1275 { \
1276 mvs_page_lit += 2; \
1277 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1278 } \
1279 else if (CODE == 'K') \
1280 { \
1281 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1282 mvs_page_lit += 4; \
1283 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1284 } \
1285 else if (CODE == 'W') \
1286 { \
1287 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1288 mvs_page_lit += 8; \
1289 if (0 <= INTVAL (XV)) { \
1290 fprintf (FILE, "=XL8'00000000"); \
1291 } else { \
1292 fprintf (FILE, "=XL8'FFFFFFFF"); \
1293 } \
1294 fprintf (FILE, "%08X'", INTVAL (XV)); \
1295 } \
1296 else \
1297 { \
1298 mvs_page_lit += 4; \
1299 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1300 } \
1301 break; \
1302 case CONST_DOUBLE: \
1303 if (GET_MODE (XV) == DImode) \
1304 { \
1305 if (CODE == 'M') \
1306 { \
1307 mvs_page_lit += 4; \
1308 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1309 } \
1310 else if (CODE == 'L') \
1311 { \
1312 mvs_page_lit += 4; \
1313 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1314 } \
1315 else \
1316 { \
1317 mvs_page_lit += 8; \
1318 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1319 CONST_DOUBLE_HIGH (XV)); \
1320 } \
1321 } \
1322 else \
1323 { \
1324 char buf[50]; \
1325 if (GET_MODE (XV) == SFmode) \
1326 { \
1327 mvs_page_lit += 4; \
1328 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1329 sizeof (buf), 0, 1); \
1330 fprintf (FILE, "=E'%s'", buf); \
1331 } \
1332 else if (GET_MODE (XV) == DFmode) \
1333 { \
1334 mvs_page_lit += 8; \
1335 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1336 sizeof (buf), 0, 1); \
1337 fprintf (FILE, "=D'%s'", buf); \
1338 } \
1339 else /* VOIDmode */ \
1340 { \
1341 mvs_page_lit += 8; \
1342 fprintf (FILE, "=XL8'%08X%08X'", \
1343 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1344 } \
1345 } \
1346 break; \
1347 case CONST: \
1348 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1349 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1350 { \
1351 mvs_page_lit += 4; \
1352 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1353 { \
1354 fprintf (FILE, "=V("); \
1355 ASM_OUTPUT_LABELREF (FILE, \
1356 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1357 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1358 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1359 } \
1360 else \
1361 { \
1362 fprintf (FILE, "=A("); \
1363 output_addr_const (FILE, XV); \
1364 fprintf (FILE, ")"); \
1365 } \
1366 } \
1367 else \
1368 { \
1369 mvs_page_lit += 4; \
1370 fprintf (FILE, "=F'"); \
1371 output_addr_const (FILE, XV); \
1372 fprintf (FILE, "'"); \
1373 } \
1374 break; \
1375 default: \
1376 abort(); \
1377 } \
1378 }
1379
1380 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1381 { \
1382 rtx breg, xreg, offset, plus; \
1383 \
1384 switch (GET_CODE (ADDR)) \
1385 { \
1386 case REG: \
1387 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1388 break; \
1389 case PLUS: \
1390 breg = 0; \
1391 xreg = 0; \
1392 offset = 0; \
1393 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1394 { \
1395 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1396 breg = XEXP (ADDR, 1); \
1397 else \
1398 offset = XEXP (ADDR, 1); \
1399 plus = XEXP (ADDR, 0); \
1400 } \
1401 else \
1402 { \
1403 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1404 breg = XEXP (ADDR, 0); \
1405 else \
1406 offset = XEXP (ADDR, 0); \
1407 plus = XEXP (ADDR, 1); \
1408 } \
1409 if (GET_CODE (plus) == PLUS) \
1410 { \
1411 if (GET_CODE (XEXP (plus, 0)) == REG) \
1412 { \
1413 if (breg) \
1414 xreg = XEXP (plus, 0); \
1415 else \
1416 breg = XEXP (plus, 0); \
1417 } \
1418 else \
1419 { \
1420 offset = XEXP (plus, 0); \
1421 } \
1422 if (GET_CODE (XEXP (plus, 1)) == REG) \
1423 { \
1424 if (breg) \
1425 xreg = XEXP (plus, 1); \
1426 else \
1427 breg = XEXP (plus, 1); \
1428 } \
1429 else \
1430 { \
1431 offset = XEXP (plus, 1); \
1432 } \
1433 } \
1434 else if (GET_CODE (plus) == REG) \
1435 { \
1436 if (breg) \
1437 xreg = plus; \
1438 else \
1439 breg = plus; \
1440 } \
1441 else \
1442 { \
1443 offset = plus; \
1444 } \
1445 if (offset) \
1446 { \
1447 if (GET_CODE (offset) == LABEL_REF) \
1448 fprintf (FILE, "L%d", \
1449 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1450 else \
1451 output_addr_const (FILE, offset); \
1452 } \
1453 else \
1454 fprintf (FILE, "0"); \
1455 if (xreg) \
1456 fprintf (FILE, "(%s,%s)", \
1457 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1458 else \
1459 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1460 break; \
1461 default: \
1462 mvs_page_lit += 4; \
1463 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1464 else fprintf (FILE, "=A("); \
1465 output_addr_const (FILE, ADDR); \
1466 fprintf (FILE, ")"); \
1467 break; \
1468 } \
1469 }
1470
1471 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1472 { \
1473 if (strlen (NAME) + 1 > mvs_function_name_length) \
1474 { \
1475 if (mvs_function_name) \
1476 free (mvs_function_name); \
1477 mvs_function_name = 0; \
1478 } \
1479 if (!mvs_function_name) \
1480 { \
1481 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1482 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1483 } \
1484 if (!strcmp (NAME, "main")) \
1485 strcpy (mvs_function_name, "gccmain"); \
1486 else \
1487 strcpy (mvs_function_name, NAME); \
1488 fprintf (FILE, "\tDS\t0F\n"); \
1489 assemble_name (FILE, mvs_function_name); \
1490 fputs ("\tRMODE\tANY\n", FILE); \
1491 assemble_name (FILE, mvs_function_name); \
1492 fputs ("\tCSECT\n", FILE); \
1493 }
1494
1495 /* Output assembler code to FILE to increment profiler label # LABELNO
1496 for profiling a function entry. */
1497
1498 #define FUNCTION_PROFILER(FILE, LABELNO) \
1499 fprintf (FILE, "Error: No profiling available.\n")
1500
1501 #endif /* TARGET_HLASM */
1502
1503 /* ======================================================== */
1504
1505 #ifdef TARGET_ELF_ABI
1506
1507 /* How to refer to registers in assembler output. This sequence is
1508 indexed by compiler's hard-register-number (see above). */
1509
1510 #define REGISTER_NAMES \
1511 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1512 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1513 "f0", "f2", "f4", "f6" \
1514 }
1515
1516 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1517 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1518 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1519
1520 #define PRINT_OPERAND(FILE, XV, CODE) \
1521 { \
1522 switch (GET_CODE (XV)) \
1523 { \
1524 static char curreg[4]; \
1525 case REG: \
1526 if (CODE == 'N') \
1527 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1528 else \
1529 strcpy (curreg, reg_names[REGNO (XV)]); \
1530 fprintf (FILE, "%s", curreg); \
1531 break; \
1532 case MEM: \
1533 { \
1534 rtx addr = XEXP (XV, 0); \
1535 if (CODE == 'O') \
1536 { \
1537 if (GET_CODE (addr) == PLUS) \
1538 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1539 else \
1540 fprintf (FILE, "0"); \
1541 } \
1542 else if (CODE == 'R') \
1543 { \
1544 if (GET_CODE (addr) == PLUS) \
1545 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1546 else \
1547 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1548 } \
1549 else \
1550 output_address (XEXP (XV, 0)); \
1551 } \
1552 break; \
1553 case SYMBOL_REF: \
1554 case LABEL_REF: \
1555 mvs_page_lit += 4; \
1556 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1557 else fprintf (FILE, "=A("); \
1558 output_addr_const (FILE, XV); \
1559 fprintf (FILE, ")"); \
1560 break; \
1561 case CONST_INT: \
1562 if (CODE == 'B') \
1563 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1564 else if (CODE == 'X') \
1565 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1566 else if (CODE == 'h') \
1567 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1568 else if (CODE == 'H') \
1569 { \
1570 mvs_page_lit += 2; \
1571 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", \
1572 (INTVAL (XV) << 16) >> 16); \
1573 } \
1574 else if (CODE == 'K') \
1575 { \
1576 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1577 mvs_page_lit += 4; \
1578 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1579 (INTVAL (XV) << 16) >> 16); \
1580 } \
1581 else if (CODE == 'W') \
1582 { \
1583 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1584 mvs_page_lit += 8; \
1585 if (0 <= INTVAL (XV)) { \
1586 fprintf (FILE, "=XL8'00000000"); \
1587 } else { \
1588 fprintf (FILE, "=XL8'FFFFFFFF"); \
1589 } \
1590 fprintf (FILE, "%08X'", INTVAL (XV)); \
1591 } \
1592 else \
1593 { \
1594 mvs_page_lit += 4; \
1595 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1596 } \
1597 break; \
1598 case CONST_DOUBLE: \
1599 if (GET_MODE (XV) == DImode) \
1600 { \
1601 if (CODE == 'M') \
1602 { \
1603 mvs_page_lit += 4; \
1604 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1605 } \
1606 else if (CODE == 'L') \
1607 { \
1608 mvs_page_lit += 4; \
1609 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1610 } \
1611 else \
1612 { \
1613 mvs_page_lit += 8; \
1614 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1615 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1616 } \
1617 } \
1618 else \
1619 { \
1620 char buf[50]; \
1621 if (GET_MODE (XV) == SFmode) \
1622 { \
1623 mvs_page_lit += 4; \
1624 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1625 sizeof (buf), 0, 1); \
1626 fprintf (FILE, "=E'%s'", buf); \
1627 } \
1628 else if (GET_MODE (XV) == DFmode) \
1629 { \
1630 mvs_page_lit += 8; \
1631 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1632 sizeof (buf), 0, 1); \
1633 fprintf (FILE, "=D'%s'", buf); \
1634 } \
1635 else /* VOIDmode */ \
1636 { \
1637 mvs_page_lit += 8; \
1638 fprintf (FILE, "=XL8'%08X%08X'", \
1639 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1640 } \
1641 } \
1642 break; \
1643 case CONST: \
1644 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1645 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1646 { \
1647 mvs_page_lit += 4; \
1648 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1649 { \
1650 fprintf (FILE, "=V("); \
1651 ASM_OUTPUT_LABELREF (FILE, \
1652 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1653 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1654 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1655 } \
1656 else \
1657 { \
1658 fprintf (FILE, "=A("); \
1659 output_addr_const (FILE, XV); \
1660 fprintf (FILE, ")"); \
1661 } \
1662 } \
1663 else \
1664 { \
1665 mvs_page_lit += 4; \
1666 fprintf (FILE, "=bogus_bad_F'"); \
1667 output_addr_const (FILE, XV); \
1668 fprintf (FILE, "'"); \
1669 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1670 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1671 debug_rtx (XV); \
1672 abort(); \
1673 } \
1674 break; \
1675 default: \
1676 abort(); \
1677 } \
1678 }
1679
1680 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1681 { \
1682 rtx breg, xreg, offset, plus; \
1683 \
1684 switch (GET_CODE (ADDR)) \
1685 { \
1686 case REG: \
1687 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1688 break; \
1689 case PLUS: \
1690 breg = 0; \
1691 xreg = 0; \
1692 offset = 0; \
1693 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1694 { \
1695 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1696 breg = XEXP (ADDR, 1); \
1697 else \
1698 offset = XEXP (ADDR, 1); \
1699 plus = XEXP (ADDR, 0); \
1700 } \
1701 else \
1702 { \
1703 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1704 breg = XEXP (ADDR, 0); \
1705 else \
1706 offset = XEXP (ADDR, 0); \
1707 plus = XEXP (ADDR, 1); \
1708 } \
1709 if (GET_CODE (plus) == PLUS) \
1710 { \
1711 if (GET_CODE (XEXP (plus, 0)) == REG) \
1712 { \
1713 if (breg) \
1714 xreg = XEXP (plus, 0); \
1715 else \
1716 breg = XEXP (plus, 0); \
1717 } \
1718 else \
1719 { \
1720 offset = XEXP (plus, 0); \
1721 } \
1722 if (GET_CODE (XEXP (plus, 1)) == REG) \
1723 { \
1724 if (breg) \
1725 xreg = XEXP (plus, 1); \
1726 else \
1727 breg = XEXP (plus, 1); \
1728 } \
1729 else \
1730 { \
1731 offset = XEXP (plus, 1); \
1732 } \
1733 } \
1734 else if (GET_CODE (plus) == REG) \
1735 { \
1736 if (breg) \
1737 xreg = plus; \
1738 else \
1739 breg = plus; \
1740 } \
1741 else \
1742 { \
1743 offset = plus; \
1744 } \
1745 if (offset) \
1746 { \
1747 if (GET_CODE (offset) == LABEL_REF) \
1748 fprintf (FILE, "L%d", \
1749 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1750 else \
1751 output_addr_const (FILE, offset); \
1752 } \
1753 else \
1754 fprintf (FILE, "0"); \
1755 if (xreg) \
1756 fprintf (FILE, "(%s,%s)", \
1757 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1758 else \
1759 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1760 break; \
1761 default: \
1762 mvs_page_lit += 4; \
1763 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1764 else fprintf (FILE, "=A("); \
1765 output_addr_const (FILE, ADDR); \
1766 fprintf (FILE, ")"); \
1767 break; \
1768 } \
1769 }
1770
1771 /* Output assembler code to FILE to increment profiler label # LABELNO
1772 for profiling a function entry. */
1773 /* Make it a no-op for now, so we can at least compile glibc */
1774 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1775 mvs_check_page (FILE, 24, 4); \
1776 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1777 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1778 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1779 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1780 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1781 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1782 }
1783
1784 /* Don't bother to output .extern pseudo-ops. They are not needed by
1785 ELF assemblers. */
1786
1787 #undef ASM_OUTPUT_EXTERNAL
1788
1789 #define ASM_DOUBLE "\t.double"
1790
1791 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1792
1793 /* let config/svr4.h define this ...
1794 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1795 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1796 */
1797
1798 /* This is how to output an element of a case-vector that is absolute. */
1799 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1800 mvs_check_page (FILE, 4, 0); \
1801 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1802
1803 /* This is how to output an element of a case-vector that is relative. */
1804 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1805 mvs_check_page (FILE, 4, 0); \
1806 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1807
1808 /* Right now, PUSH & POP are used only when profiling is enabled,
1809 and then, only to push the static chain reg and the function struct
1810 value reg, and only if those are used by the function being profiled.
1811 We don't need this for profiling, so punt. */
1812 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1813 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1814
1815
1816 /* Indicate that jump tables go in the text section. This is
1817 necessary when compiling PIC code. */
1818 #define JUMP_TABLES_IN_TEXT_SECTION 1
1819
1820 /* Define macro used to output shift-double opcodes when the shift
1821 count is in %cl. Some assemblers require %cl as an argument;
1822 some don't.
1823
1824 GAS requires the %cl argument, so override i386/unix.h. */
1825
1826 #undef SHIFT_DOUBLE_OMITS_COUNT
1827 #define SHIFT_DOUBLE_OMITS_COUNT 0
1828
1829 /* Implicit library calls should use memcpy, not bcopy, etc. */
1830 #define TARGET_MEM_FUNCTIONS
1831
1832 /* Output before read-only data. */
1833 #define TEXT_SECTION_ASM_OP "\t.text"
1834
1835 /* Output before writable (initialized) data. */
1836 #define DATA_SECTION_ASM_OP "\t.data"
1837
1838 /* Output before writable (uninitialized) data. */
1839 #define BSS_SECTION_ASM_OP "\t.bss"
1840
1841 /* In the past there was confusion as to what the argument to .align was
1842 in GAS. For the last several years the rule has been this: for a.out
1843 file formats that argument is LOG, and for all other file formats the
1844 argument is 1<<LOG.
1845
1846 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1847 doubt or guess work, and since this file is used for both a.out and other
1848 file formats, we use one of them. */
1849
1850 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1851 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1852
1853 /* Globalizing directive for a label. */
1854 #define GLOBAL_ASM_OP ".globl "
1855
1856 /* This says how to output an assembler line
1857 to define a global common symbol. */
1858
1859 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1860 ( fputs (".comm ", (FILE)), \
1861 assemble_name ((FILE), (NAME)), \
1862 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1863
1864 /* This says how to output an assembler line
1865 to define a local common symbol. */
1866
1867 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1868 ( fputs (".lcomm ", (FILE)), \
1869 assemble_name ((FILE), (NAME)), \
1870 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1871
1872 #endif /* TARGET_ELF_ABI */
1873 #endif /* ! GCC_I370_H */
GNU Compiler Collection
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