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real.c (real_to_decimal): Accept BUF_SIZE and CROP_TRAILING_ZEROS as arguments.
[gcc.git] / gcc / config / i370 / i370.h
1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
7
8 This file is part of GNU CC.
9
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #ifndef GCC_I370_H
26 #define GCC_I370_H
27
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
30 do \
31 { \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
36 } \
37 while (0)
38
39 /* Run-time compilation parameters selecting different hardware subsets. */
40
41 extern int target_flags;
42
43 /* The sizes of the code and literals on the current page. */
44
45 extern int mvs_page_code, mvs_page_lit;
46
47 /* The current page number and the base page number for the function. */
48
49 extern int mvs_page_num, function_base_page;
50
51 /* The name of the current function. */
52
53 extern char *mvs_function_name;
54
55 /* The length of the function name malloc'd area. */
56
57 extern int mvs_function_name_length;
58
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
62
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
64
65 /* Default target switches */
66
67 #define TARGET_DEFAULT 1
68
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
73
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
78
79 #define OVERRIDE_OPTIONS override_options ()
80
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
84
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
87
88 /* Target machine storage layout */
89
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
92
93 #define BITS_BIG_ENDIAN 1
94
95 /* Define this if most significant byte of a word is the lowest numbered. */
96
97 #define BYTES_BIG_ENDIAN 1
98
99 /* Define this if MS word of a multiword is the lowest numbered. */
100
101 #define WORDS_BIG_ENDIAN 1
102
103 /* Width of a word, in units (bytes). */
104
105 #define UNITS_PER_WORD 4
106
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
108
109 #define POINTER_BOUNDARY 32
110
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
112
113 #define PARM_BOUNDARY 32
114
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
116
117 #define STACK_BOUNDARY 32
118
119 /* Allocation boundary (in *bits*) for the code of a function. */
120
121 #define FUNCTION_BOUNDARY 32
122
123 /* There is no point aligning anything to a rounder boundary than this. */
124
125 #define BIGGEST_ALIGNMENT 64
126
127 /* Alignment of field after `int : 0' in a structure. */
128
129 #define EMPTY_FIELD_BOUNDARY 32
130
131 /* Define this if move instructions will actually fail to work when given
132 unaligned data. */
133
134 #define STRICT_ALIGNMENT 0
135
136 /* Define target floating point format. */
137
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
139
140 /* Define character mapping for cross-compiling. */
141 /* but only define it if really needed, since otherwise it will break builds */
142
143 #ifdef TARGET_EBCDIC
144 #ifdef HOST_EBCDIC
145 #define MAP_CHARACTER(c) ((char)(c))
146 #else
147 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
148 #endif
149 #endif
150
151 #ifdef TARGET_HLASM
152 /* HLASM requires #pragma map. */
153 #define REGISTER_TARGET_PRAGMAS(PFILE) \
154 cpp_register_pragma (PFILE, 0, "map", i370_pr_map)
155 #endif /* TARGET_HLASM */
156
157 /* Define maximum length of page minus page escape overhead. */
158
159 #define MAX_MVS_PAGE_LENGTH 4080
160
161 /* Define special register allocation order desired.
162 Don't fiddle with this. I did, and I got all sorts of register
163 spill errors when compiling even relatively simple programs...
164 I have no clue why ...
165 E.g. this one is bad:
166 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
167 */
168
169 #define REG_ALLOC_ORDER \
170 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
171
172 /* Standard register usage. */
173
174 /* Number of actual hardware registers. The hardware registers are
175 assigned numbers for the compiler from 0 to just below
176 FIRST_PSEUDO_REGISTER.
177 All registers that the compiler knows about must be given numbers,
178 even those that are not normally considered general registers.
179 For the 370, we give the data registers numbers 0-15,
180 and the floating point registers numbers 16-19. */
181
182 #define FIRST_PSEUDO_REGISTER 20
183
184 /* Define base and page registers. */
185
186 #define BASE_REGISTER 3
187 #define PAGE_REGISTER 4
188
189 #ifdef TARGET_HLASM
190 /* 1 for registers that have pervasive standard uses and are not available
191 for the register allocator. These are registers that must have fixed,
192 valid values stored in them for the entire length of the subroutine call,
193 and must not in any way be moved around, jiggered with, etc. That is,
194 they must never be clobbered, and, if clobbered, the register allocator
195 will never restore them back.
196
197 We use five registers in this special way:
198 -- R3 which is used as the base register
199 -- R4 the page origin table pointer used to load R3,
200 -- R11 the arg pointer.
201 -- R12 the TCA pointer
202 -- R13 the stack (DSA) pointer
203
204 A fifth register is also exceptional: R14 is used in many branch
205 instructions to hold the target of the branch. Technically, this
206 does not qualify R14 as a register with a long-term meaning; it should
207 be enough, theoretically, to note that these instructions clobber
208 R14, and let the compiler deal with that. In practice, however,
209 the "clobber" directive acts as a barrier to optimization, and the
210 optimizer appears to be unable to perform optimizations around branches.
211 Thus, a much better strategy appears to give R14 a pervasive use;
212 this eliminates it from the register pool witout hurting optimization.
213
214 There are other registers which have special meanings, but its OK
215 for them to get clobbered, since other allocator config below will
216 make sure that they always have the right value. These are for
217 example:
218 -- R1 the returned structure pointer.
219 -- R10 the static chain reg.
220 -- R15 holds the value a subroutine returns.
221
222 Notice that it is *almost* safe to mark R11 as available to the allocator.
223 By marking it as a call_used_register, in most cases, the compiler
224 can handle it being clobbered. However, there are a few rare
225 circumstances where the register allocator will allocate r11 and
226 also try to use it as the arg pointer ... thus it must be marked fixed.
227 I think this is a bug, but I can't track it down...
228 */
229
230 #define FIXED_REGISTERS \
231 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
232 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
233
234 /* 1 for registers not available across function calls. These must include
235 the FIXED_REGISTERS and also any registers that can be used without being
236 saved.
237 The latter must include the registers where values are returned
238 and the register where structure-value addresses are passed.
239 NOTE: all floating registers are undefined across calls.
240 */
241
242 #define CALL_USED_REGISTERS \
243 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
244 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
245
246 /* Return number of consecutive hard regs needed starting at reg REGNO
247 to hold something of mode MODE.
248 This is ordinarily the length in words of a value of mode MODE
249 but can be less for certain modes in special long registers.
250 Note that DCmode (complex double) needs two regs.
251 */
252 #endif /* TARGET_HLASM */
253
254 /* ================= */
255 #ifdef TARGET_ELF_ABI
256 /* The Linux/ELF ABI uses the same register layout as the
257 * the MVS/OE version, with the following exceptions:
258 * -- r12 (rtca) is not used.
259 */
260
261 #define FIXED_REGISTERS \
262 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
263 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
264
265 #define CALL_USED_REGISTERS \
266 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
267 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
268
269 #endif /* TARGET_ELF_ABI */
270 /* ================= */
271
272
273 #define HARD_REGNO_NREGS(REGNO, MODE) \
274 ((REGNO) > 15 ? \
275 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
276 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
277
278 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
279 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
280 even registers can hold DI. The floating point registers can hold
281 either SF, DF, SC or DC. */
282
283 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
284 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
285 (((MODE) != DImode) && ((MODE) != DFmode))) \
286 : ((MODE) == SFmode || (MODE) == DFmode) || \
287 (MODE) == SCmode || (MODE) == DCmode)
288
289 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
290 mode MODE1 and one has mode MODE2.
291 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
292 for any hard reg, then this must be 0 for correct output. */
293
294 #define MODES_TIEABLE_P(MODE1, MODE2) \
295 (((MODE1) == SFmode || (MODE1) == DFmode) \
296 == ((MODE2) == SFmode || (MODE2) == DFmode))
297
298 /* Specify the registers used for certain standard purposes.
299 The values of these macros are register numbers. */
300
301 /* 370 PC isn't overloaded on a register. */
302
303 /* #define PC_REGNUM */
304
305 /* Register to use for pushing function arguments. */
306
307 #define STACK_POINTER_REGNUM 13
308
309 /* Base register for access to local variables of the function. */
310
311 #define FRAME_POINTER_REGNUM 13
312
313 /* Value should be nonzero if functions must have frame pointers.
314 Zero means the frame pointer need not be set up (and parms may be
315 accessed via the stack pointer) in functions that seem suitable.
316 This is computed in `reload', in reload1.c. */
317
318 #define FRAME_POINTER_REQUIRED 1
319
320 /* Base register for access to arguments of the function. */
321
322 #define ARG_POINTER_REGNUM 11
323
324 /* R10 is register in which static-chain is passed to a function.
325 Static-chaining is done when a nested function references as a global
326 a stack variable of its parent: e.g.
327 int parent_func (int arg) {
328 int x; // x is in parents stack
329 void child_func (void) { x++: } // child references x as global var
330 ...
331 }
332 */
333
334 #define STATIC_CHAIN_REGNUM 10
335
336 /* R1 is register in which address to store a structure value is passed to
337 a function. This is used only when returning 64-bit long-long in a 32-bit arch
338 and when calling functions that return structs by value. e.g.
339 typedef struct A_s { int a,b,c; } A_t;
340 A_t fun_returns_value (void) {
341 A_t a; a.a=1; a.b=2 a.c=3;
342 return a;
343 }
344 In the above, the storage for the return value is in the callers stack, and
345 the R1 points at that mem location.
346 */
347
348 #define STRUCT_VALUE_REGNUM 1
349
350 /* Define the classes of registers for register constraints in the
351 machine description. Also define ranges of constants.
352
353 One of the classes must always be named ALL_REGS and include all hard regs.
354 If there is more than one class, another class must be named NO_REGS
355 and contain no registers.
356
357 The name GENERAL_REGS must be the name of a class (or an alias for
358 another name such as ALL_REGS). This is the class of registers
359 that is allowed by "g" or "r" in a register constraint.
360 Also, registers outside this class are allocated only when
361 instructions express preferences for them.
362
363 The classes must be numbered in nondecreasing order; that is,
364 a larger-numbered class must never be contained completely
365 in a smaller-numbered class.
366
367 For any two classes, it is very desirable that there be another
368 class that represents their union. */
369
370 enum reg_class
371 {
372 NO_REGS, ADDR_REGS, DATA_REGS,
373 FP_REGS, ALL_REGS, LIM_REG_CLASSES
374 };
375
376 #define GENERAL_REGS DATA_REGS
377 #define N_REG_CLASSES (int) LIM_REG_CLASSES
378
379 /* Give names of register classes as strings for dump file. */
380
381 #define REG_CLASS_NAMES \
382 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
383
384 /* Define which registers fit in which classes. This is an initializer for
385 a vector of HARD_REG_SET of length N_REG_CLASSES. */
386
387 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
388
389 /* The same information, inverted:
390 Return the class number of the smallest class containing
391 reg number REGNO. This could be a conditional expression
392 or could index an array. */
393
394 #define REGNO_REG_CLASS(REGNO) \
395 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
396
397 /* The class value for index registers, and the one for base regs. */
398
399 #define INDEX_REG_CLASS ADDR_REGS
400 #define BASE_REG_CLASS ADDR_REGS
401
402 /* Get reg_class from a letter such as appears in the machine description. */
403
404 #define REG_CLASS_FROM_LETTER(C) \
405 ((C) == 'a' ? ADDR_REGS : \
406 ((C) == 'd' ? DATA_REGS : \
407 ((C) == 'f' ? FP_REGS : NO_REGS)))
408
409 /* The letters I, J, K, L and M in a register constraint string can be used
410 to stand for particular ranges of immediate operands.
411 This macro defines what the ranges are.
412 C is the letter, and VALUE is a constant value.
413 Return 1 if VALUE is in the range specified by C. */
414
415 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
416 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
417 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
418 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
419
420 /* Similar, but for floating constants, and defining letters G and H.
421 Here VALUE is the CONST_DOUBLE rtx itself. */
422
423 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
424
425 /* see recog.c for details */
426 #define EXTRA_CONSTRAINT(OP,C) \
427 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
428 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
429
430 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
431 return the class of reg to actually use. In general this is just CLASS;
432 but on some machines in some cases it is preferable to use a more
433 restrictive class.
434
435 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
436 rare occasions when lots of egisters are spilled, reload() will try
437 to put a const int into r0 and then use r0 as an index register.
438 */
439
440 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
441 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
442 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
443 GET_CODE(X) == LABEL_REF || \
444 GET_CODE(X) == SYMBOL_REF || \
445 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
446
447 /* Return the maximum number of consecutive registers needed to represent
448 mode MODE in a register of class CLASS.
449 Note that DCmode (complex double) needs two regs.
450 */
451
452 #define CLASS_MAX_NREGS(CLASS, MODE) \
453 ((CLASS) == FP_REGS ? \
454 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
455 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
456
457 /* Stack layout; function entry, exit and calling. */
458
459 /* Define this if pushing a word on the stack makes the stack pointer a
460 smaller address. */
461 /* ------------------------------------------------------------------- */
462
463 /* ================= */
464 #ifdef TARGET_HLASM
465 /* #define STACK_GROWS_DOWNWARD */
466
467 /* Define this if the nominal address of the stack frame is at the
468 high-address end of the local variables; that is, each additional local
469 variable allocated goes at a more negative offset in the frame. */
470
471 /* #define FRAME_GROWS_DOWNWARD */
472
473 /* Offset within stack frame to start allocating local variables at.
474 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
475 first local allocated. Otherwise, it is the offset to the BEGINNING
476 of the first local allocated. */
477
478 #define STARTING_FRAME_OFFSET \
479 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
480
481 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
482
483 /* If we generate an insn to push BYTES bytes, this says how many the stack
484 pointer really advances by. On the 370, we have no push instruction. */
485
486 #endif /* TARGET_HLASM */
487
488 /* ================= */
489 #ifdef TARGET_ELF_ABI
490
491 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
492 But we want the compiler to generate posistive displacements from the
493 stack pointer, and so we make the frame lie above the stack. */
494
495 #define STACK_GROWS_DOWNWARD
496 /* #define FRAME_GROWS_DOWNWARD */
497
498 /* Offset within stack frame to start allocating local variables at.
499 This is the offset to the BEGINNING of the first local allocated. */
500
501 #define STARTING_FRAME_OFFSET \
502 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
503
504 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
505
506 #endif /* TARGET_ELF_ABI */
507 /* ================= */
508
509 /* #define PUSH_ROUNDING(BYTES) */
510
511 /* Accumulate the outgoing argument count so we can request the right
512 DSA size and determine stack offset. */
513
514 #define ACCUMULATE_OUTGOING_ARGS 1
515
516 /* Define offset from stack pointer, to location where a parm can be
517 pushed. */
518
519 #define STACK_POINTER_OFFSET 148
520
521 /* Offset of first parameter from the argument pointer register value. */
522
523 #define FIRST_PARM_OFFSET(FNDECL) 0
524
525 /* 1 if N is a possible register number for function argument passing.
526 On the 370, no registers are used in this way. */
527
528 #define FUNCTION_ARG_REGNO_P(N) 0
529
530 /* Define a data type for recording info about an argument list during
531 the scan of that argument list. This data type should hold all
532 necessary information about the function itself and about the args
533 processed so far, enough to enable macros such as FUNCTION_ARG to
534 determine where the next arg should go. */
535
536 #define CUMULATIVE_ARGS int
537
538 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
539 a function whose data type is FNTYPE.
540 For a library call, FNTYPE is 0. */
541
542 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
543
544 /* Update the data in CUM to advance over an argument of mode MODE and
545 data type TYPE. (TYPE is null for libcalls where that information
546 may not be available.) */
547
548 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
549 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
550 ? 256 \
551 : (MODE) != BLKmode \
552 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
553 : (int_size_in_bytes (TYPE) + 3) / 4))
554
555 /* Define where to put the arguments to a function. Value is zero to push
556 the argument on the stack, or a hard register in which to store the
557 argument. */
558
559 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
560
561 /* For an arg passed partly in registers and partly in memory, this is the
562 number of registers used. For args passed entirely in registers or
563 entirely in memory, zero. */
564
565 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
566
567 /* Define if returning from a function call automatically pops the
568 arguments described by the number-of-args field in the call. */
569
570 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
571
572 /* The FUNCTION_VALUE macro defines how to find the value returned by a
573 function. VALTYPE is the data type of the value (as a tree).
574 If the precise function being called is known, FUNC is its FUNCTION_DECL;
575 otherwise, FUNC is NULL.
576
577 On the 370 the return value is in R15 or R16. However,
578 DImode (64-bit ints) scalars need to get returned on the stack,
579 with r15 pointing to the location. To accomplish this, we define
580 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
581 and the DImode scalars.
582 */
583
584 #define RET_REG(MODE) \
585 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
586
587 #define FUNCTION_VALUE(VALTYPE, FUNC) \
588 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
589
590 #define RETURN_IN_MEMORY(VALTYPE) \
591 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
592
593 /* Define how to find the value returned by a library function assuming
594 the value has mode MODE. */
595
596 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
597
598 /* 1 if N is a possible register number for a function value.
599 On the 370 under C/370, R15 and R16 are thus used. */
600
601 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
602
603 /* This macro definition sets up a default value for `main' to return. */
604
605 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
606
607
608 /* Output assembler code for a block containing the constant parts of a
609 trampoline, leaving space for the variable parts.
610
611 On the 370, the trampoline contains these instructions:
612
613 BALR 14,0
614 USING *,14
615 L STATIC_CHAIN_REGISTER,X
616 L 15,Y
617 BR 15
618 X DS 0F
619 Y DS 0F */
620 /*
621 I am confused as to why this emitting raw binary, instead of instructions ...
622 see for example, rs6000/rs000.c for an example of a different way to
623 do this ... especially since BASR should probably be substituted for BALR.
624 */
625
626 #define TRAMPOLINE_TEMPLATE(FILE) \
627 { \
628 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
629 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
630 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
631 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
632 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
633 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
634 assemble_aligned_integer (2, const0_rtx); \
635 assemble_aligned_integer (2, const0_rtx); \
636 assemble_aligned_integer (2, const0_rtx); \
637 assemble_aligned_integer (2, const0_rtx); \
638 }
639
640 /* Length in units of the trampoline for entering a nested function. */
641
642 #define TRAMPOLINE_SIZE 20
643
644 /* Emit RTL insns to initialize the variable parts of a trampoline. */
645
646 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
647 { \
648 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
649 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
650 }
651
652 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
653 pointer does not matter (provided there is a frame pointer). */
654
655 #define EXIT_IGNORE_STACK 1
656
657 /* Addressing modes, and classification of registers for them. */
658
659 /* #define HAVE_POST_INCREMENT */
660 /* #define HAVE_POST_DECREMENT */
661
662 /* #define HAVE_PRE_DECREMENT */
663 /* #define HAVE_PRE_INCREMENT */
664
665 /* These assume that REGNO is a hard or pseudo reg number. They give
666 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
667 reg currently allocated to a suitable hard reg.
668 These definitions are NOT overridden anywhere. */
669
670 #define REGNO_OK_FOR_INDEX_P(REGNO) \
671 (((REGNO) > 0 && (REGNO) < 16) \
672 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
673
674 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
675
676 #define REGNO_OK_FOR_DATA_P(REGNO) \
677 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
678
679 #define REGNO_OK_FOR_FP_P(REGNO) \
680 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
681
682 /* Now macros that check whether X is a register and also,
683 strictly, whether it is in a specified class. */
684
685 /* 1 if X is a data register. */
686
687 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
688
689 /* 1 if X is an fp register. */
690
691 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
692
693 /* 1 if X is an address register. */
694
695 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
696
697 /* Maximum number of registers that can appear in a valid memory address. */
698
699 #define MAX_REGS_PER_ADDRESS 2
700
701 /* Recognize any constant value that is a valid address. */
702
703 #define CONSTANT_ADDRESS_P(X) \
704 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
705 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
706 || (GET_CODE (X) == CONST \
707 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
708 || (GET_CODE (X) == CONST \
709 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
710 && !SYMBOL_REF_FLAG (XEXP (XEXP (X, 0), 0))))
711
712 /* Nonzero if the constant value X is a legitimate general operand.
713 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
714
715 #define LEGITIMATE_CONSTANT_P(X) 1
716
717 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
718 its validity for a certain class. We have two alternate definitions
719 for each of them. The usual definition accepts all pseudo regs; the
720 other rejects them all. The symbol REG_OK_STRICT causes the latter
721 definition to be used.
722
723 Most source files want to accept pseudo regs in the hope that they will
724 get allocated to the class that the insn wants them to be in.
725 Some source files that are used after register allocation
726 need to be strict. */
727
728 #ifndef REG_OK_STRICT
729
730 /* Nonzero if X is a hard reg that can be used as an index or if it is
731 a pseudo reg. */
732
733 #define REG_OK_FOR_INDEX_P(X) \
734 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
735
736 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
737 a pseudo reg. */
738
739 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
740
741 #else /* REG_OK_STRICT */
742
743 /* Nonzero if X is a hard reg that can be used as an index. */
744
745 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
746
747 /* Nonzero if X is a hard reg that can be used as a base reg. */
748
749 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
750
751 #endif /* REG_OK_STRICT */
752
753 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
754 valid memory address for an instruction.
755 The MODE argument is the machine mode for the MEM expression
756 that wants to use this address.
757
758 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
759 except for CONSTANT_ADDRESS_P which is actually machine-independent.
760 */
761
762 #define COUNT_REGS(X, REGS, FAIL) \
763 if (REG_P (X)) { \
764 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
765 else goto FAIL; \
766 } \
767 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
768 goto FAIL;
769
770 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
771 { \
772 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
773 goto ADDR; \
774 if (GET_CODE (X) == PLUS) \
775 { \
776 int regs = 0; \
777 rtx x0 = XEXP (X, 0); \
778 rtx x1 = XEXP (X, 1); \
779 if (GET_CODE (x0) == PLUS) \
780 { \
781 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
782 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
783 COUNT_REGS (x1, regs, FAIL); \
784 if (regs == 2) \
785 goto ADDR; \
786 } \
787 else if (GET_CODE (x1) == PLUS) \
788 { \
789 COUNT_REGS (x0, regs, FAIL); \
790 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
791 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
792 if (regs == 2) \
793 goto ADDR; \
794 } \
795 else \
796 { \
797 COUNT_REGS (x0, regs, FAIL); \
798 COUNT_REGS (x1, regs, FAIL); \
799 if (regs != 0) \
800 goto ADDR; \
801 } \
802 } \
803 FAIL: ; \
804 }
805
806 /* The 370 has no mode dependent addresses. */
807
808 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
809
810 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
811 Try machine-dependent ways of modifying an illegitimate address
812 to be legitimate. If we find one, return the new, valid address.
813 This macro is used in only one place: `memory_address' in explow.c.
814
815 Several comments:
816 (1) It's not obvious that this macro results in better code
817 than its omission does. For historical reasons we leave it in.
818
819 (2) This macro may be (???) implicated in the accidental promotion
820 or RS operand to RX operands, which bombs out any RS, SI, SS
821 instruction that was expecting a simple address. Note that
822 this occurs fairly rarely ...
823
824 (3) There is a bug somewhere that causes either r4 to be spilled,
825 or causes r0 to be used as a base register. Changeing the macro
826 below will make the bug move around, but will not make it go away
827 ... Note that this is a rare bug ...
828
829 */
830
831 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
832 { \
833 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
834 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
835 copy_to_mode_reg (SImode, XEXP (X, 1))); \
836 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
837 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
838 copy_to_mode_reg (SImode, XEXP (X, 0))); \
839 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
840 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
841 force_operand (XEXP (X, 0), 0)); \
842 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
843 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
844 force_operand (XEXP (X, 1), 0)); \
845 if (memory_address_p (MODE, X)) \
846 goto WIN; \
847 }
848
849 /* Specify the machine mode that this machine uses for the index in the
850 tablejump instruction. */
851
852 #define CASE_VECTOR_MODE SImode
853
854 /* Define this if the tablejump instruction expects the table to contain
855 offsets from the address of the table.
856 Do not define this if the table should contain absolute addresses. */
857
858 /* #define CASE_VECTOR_PC_RELATIVE */
859
860 /* Define this if fixuns_trunc is the same as fix_trunc. */
861
862 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
863
864 /* We use "unsigned char" as default. */
865
866 #define DEFAULT_SIGNED_CHAR 0
867
868 /* Max number of bytes we can move from memory to memory in one reasonably
869 fast instruction. */
870
871 #define MOVE_MAX 256
872
873 /* Nonzero if access to memory by bytes is slow and undesirable. */
874
875 #define SLOW_BYTE_ACCESS 1
876
877 /* Define if shifts truncate the shift count which implies one can omit
878 a sign-extension or zero-extension of a shift count. */
879
880 /* #define SHIFT_COUNT_TRUNCATED */
881
882 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
883 is done just by pretending it is already truncated. */
884
885 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
886
887 /* We assume that the store-condition-codes instructions store 0 for false
888 and some other value for true. This is the value stored for true. */
889
890 /* #define STORE_FLAG_VALUE (-1) */
891
892 /* When a prototype says `char' or `short', really pass an `int'. */
893
894 #define PROMOTE_PROTOTYPES 1
895
896 /* Don't perform CSE on function addresses. */
897
898 #define NO_FUNCTION_CSE
899
900 /* Specify the machine mode that pointers have.
901 After generation of rtl, the compiler makes no further distinction
902 between pointers and any other objects of this machine mode. */
903
904 #define Pmode SImode
905
906 /* A function address in a call instruction is a byte address (for
907 indexing purposes) so give the MEM rtx a byte's mode. */
908
909 #define FUNCTION_MODE QImode
910
911 /* Compute the cost of computing a constant rtl expression RTX whose
912 rtx-code is CODE. The body of this macro is a portion of a switch
913 statement. If the code is computed here, return it with a return
914 statement. Otherwise, break from the switch. */
915
916 #define CONST_COSTS(RTX, CODE, OUTERCODE) \
917 case CONST_INT: \
918 if ((unsigned) INTVAL (RTX) < 0xfff) return 1; \
919 case CONST: \
920 case LABEL_REF: \
921 case SYMBOL_REF: \
922 return 2; \
923 case CONST_DOUBLE: \
924 return 4;
925
926 /* A C statement (sans semicolon) to update the integer variable COST
927 based on the relationship between INSN that is dependent on
928 DEP_INSN through the dependence LINK. The default is to make no
929 adjustment to COST. This can be used for example to specify to
930 the scheduler that an output- or anti-dependence does not incur
931 the same cost as a data-dependence.
932
933 We will want to use this to indicate that there is a cost associated
934 with the loading, followed by use of base registers ...
935 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
936 */
937
938 /* Tell final.c how to eliminate redundant test instructions. */
939
940 /* Here we define machine-dependent flags and fields in cc_status
941 (see `conditions.h'). */
942
943 /* Store in cc_status the expressions that the condition codes will
944 describe after execution of an instruction whose pattern is EXP.
945 Do not alter them if the instruction would not alter the cc's.
946
947 On the 370, load insns do not alter the cc's. However, in some
948 cases these instructions can make it possibly invalid to use the
949 saved cc's. In those cases we clear out some or all of the saved
950 cc's so they won't be used.
951
952 Note that only some arith instructions set the CC. These include
953 add, subtract, complement, various shifts. Note that multiply
954 and divide do *not* set set the CC. Therefore, in the code below,
955 don't set the status for MUL, DIV, etc.
956
957 Note that the bitwise ops set the condition code, but not in a
958 way that we can make use of it. So we treat these as clobbering,
959 rather than setting the CC. These are clobbered in the individual
960 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
961 */
962
963 #define NOTICE_UPDATE_CC(EXP, INSN) \
964 { \
965 rtx exp = (EXP); \
966 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
967 exp = XVECEXP (exp, 0, 0); \
968 if (GET_CODE (exp) != SET) \
969 CC_STATUS_INIT; \
970 else \
971 { \
972 if (XEXP (exp, 0) == cc0_rtx) \
973 { \
974 cc_status.value1 = XEXP (exp, 0); \
975 cc_status.value2 = XEXP (exp, 1); \
976 cc_status.flags = 0; \
977 } \
978 else \
979 { \
980 if (cc_status.value1 \
981 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
982 cc_status.value1 = 0; \
983 if (cc_status.value2 \
984 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
985 cc_status.value2 = 0; \
986 switch (GET_CODE (XEXP (exp, 1))) \
987 { \
988 case PLUS: case MINUS: case NEG: \
989 case NOT: case ABS: \
990 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
991 \
992 /* mult and div don't set any cc codes !! */ \
993 case MULT: /* case UMULT: */ case DIV: case UDIV: \
994 /* and, or and xor set the cc's the wrong way !! */ \
995 case AND: case IOR: case XOR: \
996 /* some shifts set the CC some don't. */ \
997 case ASHIFT: case ASHIFTRT: \
998 do {} while (0); \
999 default: \
1000 break; \
1001 } \
1002 } \
1003 } \
1004 }
1005
1006
1007 #define CC_STATUS_SET(V1, V2) \
1008 { \
1009 cc_status.flags = 0; \
1010 cc_status.value1 = (V1); \
1011 cc_status.value2 = (V2); \
1012 if (cc_status.value1 \
1013 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
1014 cc_status.value2 = 0; \
1015 }
1016
1017 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1018 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
1019
1020 /* ------------------------------------------ */
1021 /* Control the assembler format that we output. */
1022
1023 /* Define standard character escape sequences for non-ASCII targets
1024 only. */
1025
1026 #ifdef TARGET_EBCDIC
1027 #define TARGET_ESC 39
1028 #define TARGET_BELL 47
1029 #define TARGET_BS 22
1030 #define TARGET_TAB 5
1031 #define TARGET_NEWLINE 21
1032 #define TARGET_VT 11
1033 #define TARGET_FF 12
1034 #define TARGET_CR 13
1035 #endif
1036
1037 /* ======================================================== */
1038
1039 #ifdef TARGET_HLASM
1040 #define TEXT_SECTION_ASM_OP "* Program text area"
1041 #define DATA_SECTION_ASM_OP "* Program data area"
1042 #define INIT_SECTION_ASM_OP "* Program initialization area"
1043 #define SHARED_SECTION_ASM_OP "* Program shared data"
1044 #define CTOR_LIST_BEGIN /* NO OP */
1045 #define CTOR_LIST_END /* NO OP */
1046 #define MAX_MVS_LABEL_SIZE 8
1047
1048 /* How to refer to registers in assembler output. This sequence is
1049 indexed by compiler's hard-register-number (see above). */
1050
1051 #define REGISTER_NAMES \
1052 { "0", "1", "2", "3", "4", "5", "6", "7", \
1053 "8", "9", "10", "11", "12", "13", "14", "15", \
1054 "0", "2", "4", "6" \
1055 }
1056
1057 #define ASM_FILE_START(FILE) \
1058 { fputs ("\tRMODE\tANY\n", FILE); \
1059 fputs ("\tCSECT\n", FILE); }
1060
1061 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1062 #define ASM_COMMENT_START "*"
1063 #define ASM_APP_OFF ""
1064 #define ASM_APP_ON ""
1065
1066 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1067 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1068
1069 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1070 { \
1071 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1072 if (mvs_check_alias (NAME, temp) == 2) \
1073 { \
1074 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1075 } \
1076 }
1077
1078 /* MVS externals are limited to 8 characters, upper case only.
1079 The '_' is mapped to '@', except for MVS functions, then '#'. */
1080
1081
1082 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1083 { \
1084 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1085 if (!mvs_get_alias (NAME, temp)) \
1086 strcpy (temp, NAME); \
1087 if (!strcmp (temp,"main")) \
1088 strcpy (temp,"gccmain"); \
1089 if (mvs_function_check (temp)) \
1090 ch = '#'; \
1091 else \
1092 ch = '@'; \
1093 for (bp = temp; *bp; bp++) \
1094 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1095 fprintf (FILE, "%s", temp); \
1096 }
1097
1098 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1099 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1100
1101 /* Generate internal label. Since we can branch here from off page, we
1102 must reload the base register. */
1103
1104 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1105 { \
1106 if (!strcmp (PREFIX,"L")) \
1107 { \
1108 mvs_add_label(NUM); \
1109 } \
1110 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM); \
1111 }
1112
1113 /* Generate case label. For HLASM we can change to the data CSECT
1114 and put the vectors out of the code body. The assembler just
1115 concatenates CSECTs with the same name. */
1116
1117 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1118 fprintf (FILE, "\tDS\t0F\n"); \
1119 fprintf (FILE,"\tCSECT\n"); \
1120 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1121
1122 /* Put the CSECT back to the code body */
1123
1124 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1125 assemble_name (FILE, mvs_function_name); \
1126 fputs ("\tCSECT\n", FILE);
1127
1128 /* This is how to output an element of a case-vector that is absolute. */
1129
1130 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1131 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1132
1133 /* This is how to output an element of a case-vector that is relative. */
1134
1135 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1136 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1137
1138 /* This is how to output an insn to push a register on the stack.
1139 It need not be very fast code.
1140 Right now, PUSH & POP are used only when profiling is enabled,
1141 and then, only to push the static chain reg and the function struct
1142 value reg, and only if those are used. Since profiling is not
1143 supported anyway, punt on this. */
1144
1145 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1146 mvs_check_page (FILE, 8, 4); \
1147 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1148 reg_names[REGNO], STACK_POINTER_OFFSET)
1149
1150 /* This is how to output an insn to pop a register from the stack.
1151 It need not be very fast code. */
1152
1153 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1154 mvs_check_page (FILE, 8, 0); \
1155 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1156 reg_names[REGNO], STACK_POINTER_OFFSET)
1157
1158 /* This outputs a text string. The string are chopped up to fit into
1159 an 80 byte record. Also, control and special characters, interpreted
1160 by the IBM assembler, are output numerically. */
1161
1162 #define MVS_ASCII_TEXT_LENGTH 48
1163
1164 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1165 { \
1166 size_t i, limit = (LEN); \
1167 int j; \
1168 for (j = 0, i = 0; i < limit; j++, i++) \
1169 { \
1170 int c = (PTR)[i]; \
1171 if (ISCNTRL (c) || c == '&') \
1172 { \
1173 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1174 fprintf (FILE, "'\n"); \
1175 j = -1; \
1176 if (c == '&') c = MAP_CHARACTER (c); \
1177 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1178 } \
1179 else \
1180 { \
1181 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1182 fprintf (FILE, "\tDC\tC'"); \
1183 if ( c == '\'' ) \
1184 fprintf (FILE, "%c%c", c, c); \
1185 else \
1186 fprintf (FILE, "%c", c); \
1187 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1188 fprintf (FILE, "'\n" ); \
1189 } \
1190 } \
1191 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1192 fprintf (FILE, "'\n"); \
1193 }
1194
1195 /* This is how to output an assembler line that says to advance the
1196 location counter to a multiple of 2**LOG bytes. */
1197
1198 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1199 if (LOG) \
1200 { \
1201 if ((LOG) == 1) \
1202 fprintf (FILE, "\tDS\t0H\n" ); \
1203 else \
1204 fprintf (FILE, "\tDS\t0F\n" ); \
1205 } \
1206
1207 /* The maximum length of memory that the IBM assembler will allow in one
1208 DS operation. */
1209
1210 #define MAX_CHUNK 32767
1211
1212 /* A C statement to output to the stdio stream FILE an assembler
1213 instruction to advance the location counter by SIZE bytes. Those
1214 bytes should be zero when loaded. */
1215
1216 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1217 { \
1218 int s, k; \
1219 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1220 { \
1221 if (s > MAX_CHUNK) \
1222 k = MAX_CHUNK; \
1223 else \
1224 k = s; \
1225 fprintf (FILE, "\tDS\tXL%d\n", k); \
1226 } \
1227 }
1228
1229 /* A C statement (sans semicolon) to output to the stdio stream
1230 FILE the assembler definition of a common-label named NAME whose
1231 size is SIZE bytes. The variable ROUNDED is the size rounded up
1232 to whatever alignment the caller wants. */
1233
1234 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1235 { \
1236 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1237 if (mvs_check_alias(NAME, temp) == 2) \
1238 { \
1239 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1240 } \
1241 fputs ("\tENTRY\t", FILE); \
1242 assemble_name (FILE, NAME); \
1243 fputs ("\n", FILE); \
1244 fprintf (FILE, "\tDS\t0F\n"); \
1245 ASM_OUTPUT_LABEL (FILE,NAME); \
1246 ASM_OUTPUT_SKIP (FILE,SIZE); \
1247 }
1248
1249 /* A C statement (sans semicolon) to output to the stdio stream
1250 FILE the assembler definition of a local-common-label named NAME
1251 whose size is SIZE bytes. The variable ROUNDED is the size
1252 rounded up to whatever alignment the caller wants. */
1253
1254 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1255 { \
1256 fprintf (FILE, "\tDS\t0F\n"); \
1257 ASM_OUTPUT_LABEL (FILE,NAME); \
1258 ASM_OUTPUT_SKIP (FILE,SIZE); \
1259 }
1260
1261 /* Store in OUTPUT a string (made with alloca) containing an
1262 assembler-name for a local static variable named NAME.
1263 LABELNO is an integer which is different for each call. */
1264
1265 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1266 { \
1267 (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10); \
1268 sprintf ((OUTPUT), "%s%d", (NAME), (LABELNO)); \
1269 }
1270
1271 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1272 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1273 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1274
1275 #define PRINT_OPERAND(FILE, XV, CODE) \
1276 { \
1277 switch (GET_CODE (XV)) \
1278 { \
1279 static char curreg[4]; \
1280 case REG: \
1281 if (CODE == 'N') \
1282 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1283 else \
1284 strcpy (curreg, reg_names[REGNO (XV)]); \
1285 fprintf (FILE, "%s", curreg); \
1286 break; \
1287 case MEM: \
1288 { \
1289 rtx addr = XEXP (XV, 0); \
1290 if (CODE == 'O') \
1291 { \
1292 if (GET_CODE (addr) == PLUS) \
1293 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1294 else \
1295 fprintf (FILE, "0"); \
1296 } \
1297 else if (CODE == 'R') \
1298 { \
1299 if (GET_CODE (addr) == PLUS) \
1300 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1301 else \
1302 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1303 } \
1304 else \
1305 output_address (XEXP (XV, 0)); \
1306 } \
1307 break; \
1308 case SYMBOL_REF: \
1309 case LABEL_REF: \
1310 mvs_page_lit += 4; \
1311 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1312 else fprintf (FILE, "=A("); \
1313 output_addr_const (FILE, XV); \
1314 fprintf (FILE, ")"); \
1315 break; \
1316 case CONST_INT: \
1317 if (CODE == 'B') \
1318 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1319 else if (CODE == 'X') \
1320 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1321 else if (CODE == 'h') \
1322 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1323 else if (CODE == 'H') \
1324 { \
1325 mvs_page_lit += 2; \
1326 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1327 } \
1328 else if (CODE == 'K') \
1329 { \
1330 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1331 mvs_page_lit += 4; \
1332 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1333 } \
1334 else if (CODE == 'W') \
1335 { \
1336 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1337 mvs_page_lit += 8; \
1338 if (0 <= INTVAL (XV)) { \
1339 fprintf (FILE, "=XL8'00000000"); \
1340 } else { \
1341 fprintf (FILE, "=XL8'FFFFFFFF"); \
1342 } \
1343 fprintf (FILE, "%08X'", INTVAL (XV)); \
1344 } \
1345 else \
1346 { \
1347 mvs_page_lit += 4; \
1348 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1349 } \
1350 break; \
1351 case CONST_DOUBLE: \
1352 if (GET_MODE (XV) == DImode) \
1353 { \
1354 if (CODE == 'M') \
1355 { \
1356 mvs_page_lit += 4; \
1357 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1358 } \
1359 else if (CODE == 'L') \
1360 { \
1361 mvs_page_lit += 4; \
1362 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1363 } \
1364 else \
1365 { \
1366 mvs_page_lit += 8; \
1367 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1368 CONST_DOUBLE_HIGH (XV)); \
1369 } \
1370 } \
1371 else \
1372 { \
1373 char buf[50]; \
1374 if (GET_MODE (XV) == SFmode) \
1375 { \
1376 mvs_page_lit += 4; \
1377 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1378 sizeof (buf), 0, 1); \
1379 fprintf (FILE, "=E'%s'", buf); \
1380 } \
1381 else if (GET_MODE (XV) == DFmode) \
1382 { \
1383 mvs_page_lit += 8; \
1384 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1385 sizeof (buf), 0, 1); \
1386 fprintf (FILE, "=D'%s'", buf); \
1387 } \
1388 else /* VOIDmode */ \
1389 { \
1390 mvs_page_lit += 8; \
1391 fprintf (FILE, "=XL8'%08X%08X'", \
1392 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1393 } \
1394 } \
1395 break; \
1396 case CONST: \
1397 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1398 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1399 { \
1400 mvs_page_lit += 4; \
1401 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1402 { \
1403 fprintf (FILE, "=V("); \
1404 ASM_OUTPUT_LABELREF (FILE, \
1405 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1406 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1407 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1408 } \
1409 else \
1410 { \
1411 fprintf (FILE, "=A("); \
1412 output_addr_const (FILE, XV); \
1413 fprintf (FILE, ")"); \
1414 } \
1415 } \
1416 else \
1417 { \
1418 mvs_page_lit += 4; \
1419 fprintf (FILE, "=F'"); \
1420 output_addr_const (FILE, XV); \
1421 fprintf (FILE, "'"); \
1422 } \
1423 break; \
1424 default: \
1425 abort(); \
1426 } \
1427 }
1428
1429 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1430 { \
1431 rtx breg, xreg, offset, plus; \
1432 \
1433 switch (GET_CODE (ADDR)) \
1434 { \
1435 case REG: \
1436 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1437 break; \
1438 case PLUS: \
1439 breg = 0; \
1440 xreg = 0; \
1441 offset = 0; \
1442 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1443 { \
1444 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1445 breg = XEXP (ADDR, 1); \
1446 else \
1447 offset = XEXP (ADDR, 1); \
1448 plus = XEXP (ADDR, 0); \
1449 } \
1450 else \
1451 { \
1452 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1453 breg = XEXP (ADDR, 0); \
1454 else \
1455 offset = XEXP (ADDR, 0); \
1456 plus = XEXP (ADDR, 1); \
1457 } \
1458 if (GET_CODE (plus) == PLUS) \
1459 { \
1460 if (GET_CODE (XEXP (plus, 0)) == REG) \
1461 { \
1462 if (breg) \
1463 xreg = XEXP (plus, 0); \
1464 else \
1465 breg = XEXP (plus, 0); \
1466 } \
1467 else \
1468 { \
1469 offset = XEXP (plus, 0); \
1470 } \
1471 if (GET_CODE (XEXP (plus, 1)) == REG) \
1472 { \
1473 if (breg) \
1474 xreg = XEXP (plus, 1); \
1475 else \
1476 breg = XEXP (plus, 1); \
1477 } \
1478 else \
1479 { \
1480 offset = XEXP (plus, 1); \
1481 } \
1482 } \
1483 else if (GET_CODE (plus) == REG) \
1484 { \
1485 if (breg) \
1486 xreg = plus; \
1487 else \
1488 breg = plus; \
1489 } \
1490 else \
1491 { \
1492 offset = plus; \
1493 } \
1494 if (offset) \
1495 { \
1496 if (GET_CODE (offset) == LABEL_REF) \
1497 fprintf (FILE, "L%d", \
1498 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1499 else \
1500 output_addr_const (FILE, offset); \
1501 } \
1502 else \
1503 fprintf (FILE, "0"); \
1504 if (xreg) \
1505 fprintf (FILE, "(%s,%s)", \
1506 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1507 else \
1508 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1509 break; \
1510 default: \
1511 mvs_page_lit += 4; \
1512 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1513 else fprintf (FILE, "=A("); \
1514 output_addr_const (FILE, ADDR); \
1515 fprintf (FILE, ")"); \
1516 break; \
1517 } \
1518 }
1519
1520 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1521 { \
1522 if (strlen (NAME) + 1 > mvs_function_name_length) \
1523 { \
1524 if (mvs_function_name) \
1525 free (mvs_function_name); \
1526 mvs_function_name = 0; \
1527 } \
1528 if (!mvs_function_name) \
1529 { \
1530 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1531 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1532 } \
1533 if (!strcmp (NAME, "main")) \
1534 strcpy (mvs_function_name, "gccmain"); \
1535 else \
1536 strcpy (mvs_function_name, NAME); \
1537 fprintf (FILE, "\tDS\t0F\n"); \
1538 assemble_name (FILE, mvs_function_name); \
1539 fputs ("\tRMODE\tANY\n", FILE); \
1540 assemble_name (FILE, mvs_function_name); \
1541 fputs ("\tCSECT\n", FILE); \
1542 }
1543
1544 /* Output assembler code to FILE to increment profiler label # LABELNO
1545 for profiling a function entry. */
1546
1547 #define FUNCTION_PROFILER(FILE, LABELNO) \
1548 fprintf (FILE, "Error: No profiling available.\n")
1549
1550 #endif /* TARGET_HLASM */
1551
1552 /* ======================================================== */
1553
1554 #ifdef TARGET_ELF_ABI
1555
1556 /* How to refer to registers in assembler output. This sequence is
1557 indexed by compiler's hard-register-number (see above). */
1558
1559 #define REGISTER_NAMES \
1560 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1561 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1562 "f0", "f2", "f4", "f6" \
1563 }
1564
1565 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1566 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1567 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1568
1569 #define PRINT_OPERAND(FILE, XV, CODE) \
1570 { \
1571 switch (GET_CODE (XV)) \
1572 { \
1573 static char curreg[4]; \
1574 case REG: \
1575 if (CODE == 'N') \
1576 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1577 else \
1578 strcpy (curreg, reg_names[REGNO (XV)]); \
1579 fprintf (FILE, "%s", curreg); \
1580 break; \
1581 case MEM: \
1582 { \
1583 rtx addr = XEXP (XV, 0); \
1584 if (CODE == 'O') \
1585 { \
1586 if (GET_CODE (addr) == PLUS) \
1587 fprintf (FILE, "%d", INTVAL (XEXP (addr, 1))); \
1588 else \
1589 fprintf (FILE, "0"); \
1590 } \
1591 else if (CODE == 'R') \
1592 { \
1593 if (GET_CODE (addr) == PLUS) \
1594 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1595 else \
1596 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1597 } \
1598 else \
1599 output_address (XEXP (XV, 0)); \
1600 } \
1601 break; \
1602 case SYMBOL_REF: \
1603 case LABEL_REF: \
1604 mvs_page_lit += 4; \
1605 if (SYMBOL_REF_FLAG (XV)) fprintf (FILE, "=V("); \
1606 else fprintf (FILE, "=A("); \
1607 output_addr_const (FILE, XV); \
1608 fprintf (FILE, ")"); \
1609 break; \
1610 case CONST_INT: \
1611 if (CODE == 'B') \
1612 fprintf (FILE, "%d", INTVAL (XV) & 0xff); \
1613 else if (CODE == 'X') \
1614 fprintf (FILE, "%02X", INTVAL (XV) & 0xff); \
1615 else if (CODE == 'h') \
1616 fprintf (FILE, "%d", (INTVAL (XV) << 16) >> 16); \
1617 else if (CODE == 'H') \
1618 { \
1619 mvs_page_lit += 2; \
1620 fprintf (FILE, "=H'%d'", (INTVAL (XV) << 16) >> 16); \
1621 } \
1622 else if (CODE == 'K') \
1623 { \
1624 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1625 mvs_page_lit += 4; \
1626 fprintf (FILE, "=F'%d'", (INTVAL (XV) << 16) >> 16); \
1627 } \
1628 else if (CODE == 'W') \
1629 { \
1630 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1631 mvs_page_lit += 8; \
1632 if (0 <= INTVAL (XV)) { \
1633 fprintf (FILE, "=XL8'00000000"); \
1634 } else { \
1635 fprintf (FILE, "=XL8'FFFFFFFF"); \
1636 } \
1637 fprintf (FILE, "%08X'", INTVAL (XV)); \
1638 } \
1639 else \
1640 { \
1641 mvs_page_lit += 4; \
1642 fprintf (FILE, "=F'%d'", INTVAL (XV)); \
1643 } \
1644 break; \
1645 case CONST_DOUBLE: \
1646 if (GET_MODE (XV) == DImode) \
1647 { \
1648 if (CODE == 'M') \
1649 { \
1650 mvs_page_lit += 4; \
1651 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1652 } \
1653 else if (CODE == 'L') \
1654 { \
1655 mvs_page_lit += 4; \
1656 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1657 } \
1658 else \
1659 { \
1660 mvs_page_lit += 8; \
1661 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1662 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1663 } \
1664 } \
1665 else \
1666 { \
1667 char buf[50]; \
1668 if (GET_MODE (XV) == SFmode) \
1669 { \
1670 mvs_page_lit += 4; \
1671 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1672 sizeof (buf), 0, 1); \
1673 fprintf (FILE, "=E'%s'", buf); \
1674 } \
1675 else if (GET_MODE (XV) == DFmode) \
1676 { \
1677 mvs_page_lit += 8; \
1678 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1679 sizeof (buf), 0, 1); \
1680 fprintf (FILE, "=D'%s'", buf); \
1681 } \
1682 else /* VOIDmode */ \
1683 { \
1684 mvs_page_lit += 8; \
1685 fprintf (FILE, "=XL8'%08X%08X'", \
1686 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1687 } \
1688 } \
1689 break; \
1690 case CONST: \
1691 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1692 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1693 { \
1694 mvs_page_lit += 4; \
1695 if (SYMBOL_REF_FLAG (XEXP (XEXP (XV, 0), 0))) \
1696 { \
1697 fprintf (FILE, "=V("); \
1698 ASM_OUTPUT_LABELREF (FILE, \
1699 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1700 fprintf (FILE, ")\n\tA\t%s,=F'%d'", curreg, \
1701 INTVAL (XEXP (XEXP (XV, 0), 1))); \
1702 } \
1703 else \
1704 { \
1705 fprintf (FILE, "=A("); \
1706 output_addr_const (FILE, XV); \
1707 fprintf (FILE, ")"); \
1708 } \
1709 } \
1710 else \
1711 { \
1712 mvs_page_lit += 4; \
1713 fprintf (FILE, "=bogus_bad_F'"); \
1714 output_addr_const (FILE, XV); \
1715 fprintf (FILE, "'"); \
1716 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1717 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1718 debug_rtx (XV); \
1719 abort(); \
1720 } \
1721 break; \
1722 default: \
1723 abort(); \
1724 } \
1725 }
1726
1727 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1728 { \
1729 rtx breg, xreg, offset, plus; \
1730 \
1731 switch (GET_CODE (ADDR)) \
1732 { \
1733 case REG: \
1734 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1735 break; \
1736 case PLUS: \
1737 breg = 0; \
1738 xreg = 0; \
1739 offset = 0; \
1740 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1741 { \
1742 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1743 breg = XEXP (ADDR, 1); \
1744 else \
1745 offset = XEXP (ADDR, 1); \
1746 plus = XEXP (ADDR, 0); \
1747 } \
1748 else \
1749 { \
1750 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1751 breg = XEXP (ADDR, 0); \
1752 else \
1753 offset = XEXP (ADDR, 0); \
1754 plus = XEXP (ADDR, 1); \
1755 } \
1756 if (GET_CODE (plus) == PLUS) \
1757 { \
1758 if (GET_CODE (XEXP (plus, 0)) == REG) \
1759 { \
1760 if (breg) \
1761 xreg = XEXP (plus, 0); \
1762 else \
1763 breg = XEXP (plus, 0); \
1764 } \
1765 else \
1766 { \
1767 offset = XEXP (plus, 0); \
1768 } \
1769 if (GET_CODE (XEXP (plus, 1)) == REG) \
1770 { \
1771 if (breg) \
1772 xreg = XEXP (plus, 1); \
1773 else \
1774 breg = XEXP (plus, 1); \
1775 } \
1776 else \
1777 { \
1778 offset = XEXP (plus, 1); \
1779 } \
1780 } \
1781 else if (GET_CODE (plus) == REG) \
1782 { \
1783 if (breg) \
1784 xreg = plus; \
1785 else \
1786 breg = plus; \
1787 } \
1788 else \
1789 { \
1790 offset = plus; \
1791 } \
1792 if (offset) \
1793 { \
1794 if (GET_CODE (offset) == LABEL_REF) \
1795 fprintf (FILE, "L%d", \
1796 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1797 else \
1798 output_addr_const (FILE, offset); \
1799 } \
1800 else \
1801 fprintf (FILE, "0"); \
1802 if (xreg) \
1803 fprintf (FILE, "(%s,%s)", \
1804 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1805 else \
1806 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1807 break; \
1808 default: \
1809 mvs_page_lit += 4; \
1810 if (SYMBOL_REF_FLAG (ADDR)) fprintf (FILE, "=V("); \
1811 else fprintf (FILE, "=A("); \
1812 output_addr_const (FILE, ADDR); \
1813 fprintf (FILE, ")"); \
1814 break; \
1815 } \
1816 }
1817
1818 /* Output assembler code to FILE to increment profiler label # LABELNO
1819 for profiling a function entry. */
1820 /* Make it a no-op for now, so we can at least compile glibc */
1821 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1822 mvs_check_page (FILE, 24, 4); \
1823 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1824 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1825 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1826 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1827 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1828 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1829 }
1830
1831 /* Don't bother to output .extern pseudo-ops. They are not needed by
1832 ELF assemblers. */
1833
1834 #undef ASM_OUTPUT_EXTERNAL
1835
1836 #define ASM_DOUBLE "\t.double"
1837
1838 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1839
1840 /* Generate internal label. Since we can branch here from off page, we
1841 must reload the base register. Note that internal labels are generated
1842 for loops, goto's and case labels. */
1843 #undef ASM_OUTPUT_INTERNAL_LABEL
1844 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1845 { \
1846 if (!strcmp (PREFIX,"L")) \
1847 { \
1848 mvs_add_label(NUM); \
1849 } \
1850 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1851 }
1852
1853 /* let config/svr4.h define this ...
1854 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1855 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1856 */
1857
1858 /* This is how to output an element of a case-vector that is absolute. */
1859 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1860 mvs_check_page (FILE, 4, 0); \
1861 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1862
1863 /* This is how to output an element of a case-vector that is relative. */
1864 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1865 mvs_check_page (FILE, 4, 0); \
1866 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1867
1868 /* Right now, PUSH & POP are used only when profiling is enabled,
1869 and then, only to push the static chain reg and the function struct
1870 value reg, and only if those are used by the function being profiled.
1871 We don't need this for profiling, so punt. */
1872 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1873 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1874
1875
1876 /* Indicate that jump tables go in the text section. This is
1877 necessary when compiling PIC code. */
1878 #define JUMP_TABLES_IN_TEXT_SECTION 1
1879
1880 /* Define macro used to output shift-double opcodes when the shift
1881 count is in %cl. Some assemblers require %cl as an argument;
1882 some don't.
1883
1884 GAS requires the %cl argument, so override i386/unix.h. */
1885
1886 #undef SHIFT_DOUBLE_OMITS_COUNT
1887 #define SHIFT_DOUBLE_OMITS_COUNT 0
1888
1889 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1890 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1891 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1892
1893 /* Implicit library calls should use memcpy, not bcopy, etc. */
1894 #define TARGET_MEM_FUNCTIONS
1895
1896 /* Output before read-only data. */
1897 #define TEXT_SECTION_ASM_OP "\t.text"
1898
1899 /* Output before writable (initialized) data. */
1900 #define DATA_SECTION_ASM_OP "\t.data"
1901
1902 /* Output before writable (uninitialized) data. */
1903 #define BSS_SECTION_ASM_OP "\t.bss"
1904
1905 /* In the past there was confusion as to what the argument to .align was
1906 in GAS. For the last several years the rule has been this: for a.out
1907 file formats that argument is LOG, and for all other file formats the
1908 argument is 1<<LOG.
1909
1910 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1911 doubt or guess work, and since this file is used for both a.out and other
1912 file formats, we use one of them. */
1913
1914 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1915 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1916
1917 /* Globalizing directive for a label. */
1918 #define GLOBAL_ASM_OP ".globl "
1919
1920 /* This says how to output an assembler line
1921 to define a global common symbol. */
1922
1923 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1924 ( fputs (".comm ", (FILE)), \
1925 assemble_name ((FILE), (NAME)), \
1926 fprintf ((FILE), ",%u\n", (ROUNDED)))
1927
1928 /* This says how to output an assembler line
1929 to define a local common symbol. */
1930
1931 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1932 ( fputs (".lcomm ", (FILE)), \
1933 assemble_name ((FILE), (NAME)), \
1934 fprintf ((FILE), ",%u\n", (ROUNDED)))
1935
1936 #endif /* TARGET_ELF_ABI */
1937 #endif /* ! GCC_I370_H */
GNU Compiler Collection
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