gcc/config/avr/predicates.md

   1 ;; Predicate definitions for ATMEL AVR micro controllers.
   2 ;; Copyright (C) 2006-2015 Free Software Foundation, Inc.
   3 ;;
   4 ;; This file is part of GCC.
   5 ;;
   6 ;; GCC is free software; you can redistribute it and/or modify
   7 ;; it under the terms of the GNU General Public License as published by
   8 ;; the Free Software Foundation; either version 3, or (at your option)
   9 ;; any later version.
  10 ;;
  11 ;; GCC is distributed in the hope that it will be useful,
  12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ;; GNU General Public License for more details.
  15 ;;
  16 ;; You should have received a copy of the GNU General Public License
  17 ;; along with GCC; see the file COPYING3.  If not see
  18 ;; <http://www.gnu.org/licenses/>.
  19
  20 ;; Registers from r0 to r15.
  21 (define_predicate "l_register_operand"
  22   (and (match_code "reg")
  23        (match_test "REGNO (op) <= 15")))
  24
  25 ;; Registers from r16 to r31.
  26 (define_predicate "d_register_operand"
  27   (and (match_code "reg")
  28        (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
  29
  30 (define_predicate "even_register_operand"
  31   (and (match_code "reg")
  32        (and (match_test "REGNO (op) <= 31")
  33             (match_test "(REGNO (op) & 1) == 0"))))
  34
  35 (define_predicate "odd_register_operand"
  36   (and (match_code "reg")
  37        (and (match_test "REGNO (op) <= 31")
  38             (match_test "(REGNO (op) & 1) != 0"))))
  39
  40 ;; SP register.
  41 (define_predicate "stack_register_operand"
  42   (and (match_code "reg")
  43        (match_test "REGNO (op) == REG_SP")))
  44
  45 ;; Return true if OP is a valid address for lower half of I/O space.
  46 (define_special_predicate "low_io_address_operand"
  47   (ior (and (match_code "const_int")
  48             (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
  49                                    0, 0x20 - GET_MODE_SIZE (mode))"))
  50        (and (match_code "symbol_ref")
  51             (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO_LOW"))))
  52
  53 ;; Return true if OP is a valid address for high half of I/O space.
  54 (define_predicate "high_io_address_operand"
  55   (and (match_code "const_int")
  56        (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
  57                               0x20, 0x3F)")))
  58
  59 ;; Return true if OP is a valid address of I/O space.
  60 (define_special_predicate "io_address_operand"
  61   (ior (and (match_code "const_int")
  62             (match_test "IN_RANGE (INTVAL (op) - avr_current_arch->sfr_offset,
  63                                    0, 0x40 - GET_MODE_SIZE (mode))"))
  64        (and (match_code "symbol_ref")
  65             (match_test "SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_IO"))))
  66
  67 ;; Return 1 if OP is a general operand not in flash memory
  68 (define_predicate "nop_general_operand"
  69   (and (match_operand 0 "general_operand")
  70        (match_test "!avr_mem_flash_p (op)")))
  71
  72 ;; Return 1 if OP is an "ordinary" general operand, i.e. a general
  73 ;; operand whose load is not handled by a libgcc call or ELPM.
  74 (define_predicate "nox_general_operand"
  75   (and (match_operand 0 "general_operand")
  76        (not (match_test "avr_load_libgcc_p (op)"))
  77        (not (match_test "avr_mem_memx_p (op)"))))
  78
  79 ;; Return 1 if OP is a memory operand in one of the __flash* address spaces
  80 (define_predicate "flash_operand"
  81   (and (match_operand 0 "memory_operand")
  82        (match_test "Pmode == mode")
  83        (ior (match_test "!MEM_P (op)")
  84             (match_test "avr_mem_flash_p (op)"))))
  85
  86 ;; Return 1 if OP is the zero constant for MODE.
  87 (define_predicate "const0_operand"
  88   (and (match_code "const_int,const_fixed,const_double")
  89        (match_test "op == CONST0_RTX (mode)")))
  90
  91 ;; Return 1 if OP is the one constant integer for MODE.
  92 (define_predicate "const1_operand"
  93   (and (match_code "const_int")
  94        (match_test "op == CONST1_RTX (mode)")))
  95
  96
  97 ;; Return 1 if OP is constant integer 0..7 for MODE.
  98 (define_predicate "const_0_to_7_operand"
  99   (and (match_code "const_int")
 100        (match_test "IN_RANGE (INTVAL (op), 0, 7)")))
 101
 102 ;; Return 1 if OP is constant integer 2..7 for MODE.
 103 (define_predicate "const_2_to_7_operand"
 104   (and (match_code "const_int")
 105        (match_test "IN_RANGE (INTVAL (op), 2, 7)")))
 106
 107 ;; Return 1 if OP is constant integer 1..6 for MODE.
 108 (define_predicate "const_1_to_6_operand"
 109   (and (match_code "const_int")
 110        (match_test "IN_RANGE (INTVAL (op), 1, 6)")))
 111
 112 ;; Return 1 if OP is constant integer 2..6 for MODE.
 113 (define_predicate "const_2_to_6_operand"
 114   (and (match_code "const_int")
 115        (match_test "IN_RANGE (INTVAL (op), 2, 6)")))
 116
 117 ;; Returns true if OP is either the constant zero or a register.
 118 (define_predicate "reg_or_0_operand"
 119   (ior (match_operand 0 "register_operand")
 120        (match_operand 0 "const0_operand")))
 121
 122 ;; Returns 1 if OP is a SYMBOL_REF.
 123 (define_predicate "symbol_ref_operand"
 124   (match_code "symbol_ref"))
 125
 126 ;; Return true if OP is a text segment reference.
 127 ;; This is needed for program memory address expressions.
 128 (define_predicate "text_segment_operand"
 129   (match_code "code_label,label_ref,symbol_ref,plus,const")
 130 {
 131   switch (GET_CODE (op))
 132     {
 133     case CODE_LABEL:
 134       return true;
 135     case LABEL_REF :
 136       return true;
 137     case SYMBOL_REF :
 138       return SYMBOL_REF_FUNCTION_P (op);
 139     case PLUS :
 140       /* Assume canonical format of symbol + constant.
 141          Fall through.  */
 142     case CONST :
 143       return text_segment_operand (XEXP (op, 0), VOIDmode);
 144     default :
 145       return false;
 146     }
 147 })
 148
 149 ;; Return true if OP is a constant that contains only one 1 in its
 150 ;; binary representation.
 151 (define_predicate "single_one_operand"
 152   (and (match_code "const_int")
 153        (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
 154
 155 ;; Return true if OP is a constant that contains only one 0 in its
 156 ;; binary representation.
 157 (define_predicate "single_zero_operand"
 158   (and (match_code "const_int")
 159        (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
 160
 161 ;;
 162 (define_predicate "avr_sp_immediate_operand"
 163   (and (match_code "const_int")
 164        (match_test "satisfies_constraint_Csp (op)")))
 165
 166 ;; True for EQ & NE
 167 (define_predicate "eqne_operator"
 168   (match_code "eq,ne"))
 169
 170 ;; True for GE & LT
 171 (define_predicate "gelt_operator"
 172   (match_code "ge,lt"))
 173
 174 ;; True for GT, GTU, LE & LEU
 175 (define_predicate "difficult_comparison_operator"
 176   (match_code "gt,gtu,le,leu"))
 177
 178 ;; False for GT, GTU, LE & LEU
 179 (define_predicate "simple_comparison_operator"
 180   (and (match_operand 0 "comparison_operator")
 181        (not (match_code "gt,gtu,le,leu"))))
 182
 183 ;; Return true if OP is a valid call operand.
 184 (define_predicate "call_insn_operand"
 185   (and (match_code "mem")
 186        (ior (match_test "register_operand (XEXP (op, 0), mode)")
 187             (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
 188
 189 ;; For some insns we must ensure that no hard register is inserted
 190 ;; into their operands because the insns are split and the split
 191 ;; involves hard registers.  An example are divmod insn that are
 192 ;; split to insns that represent implicit library calls.
 193
 194 ;; True for register that is pseudo register.
 195 (define_predicate "pseudo_register_operand"
 196   (and (match_operand 0 "register_operand")
 197        (not (and (match_code "reg")
 198                  (match_test "HARD_REGISTER_P (op)")))))
 199
 200 ;; True for operand that is pseudo register or CONST_INT.
 201 (define_predicate "pseudo_register_or_const_int_operand"
 202   (ior (match_operand 0 "const_int_operand")
 203        (match_operand 0 "pseudo_register_operand")))
 204
 205 ;; We keep combiner from inserting hard registers into the input of sign- and
 206 ;; zero-extends.  A hard register in the input operand is not wanted because
 207 ;; 32-bit multiply patterns clobber some hard registers and extends with a
 208 ;; hard register that overlaps these clobbers won't combine to a widening
 209 ;; multiplication.  There is no need for combine to propagate or insert
 210 ;; hard registers, register allocation can do it just as well.
 211
 212 ;; True for operand that is pseudo register at combine time.
 213 (define_predicate "combine_pseudo_register_operand"
 214   (ior (match_operand 0 "pseudo_register_operand")
 215        (and (match_operand 0 "register_operand")
 216             (match_test "reload_completed || reload_in_progress"))))
 217
 218 ;; Return true if OP is a constant integer that is either
 219 ;; 8 or 16 or 24.
 220 (define_predicate "const_8_16_24_operand"
 221   (and (match_code "const_int")
 222        (match_test "8 == INTVAL(op) || 16 == INTVAL(op) || 24 == INTVAL(op)")))
 223
 224 ;; Unsigned CONST_INT that fits in 8 bits, i.e. 0..255.
 225 (define_predicate "u8_operand"
 226   (and (match_code "const_int")
 227        (match_test "IN_RANGE (INTVAL (op), 0, 255)")))
 228
 229 ;; Signed CONST_INT that fits in 8 bits, i.e. -128..127.
 230 (define_predicate "s8_operand"
 231   (and (match_code "const_int")
 232        (match_test "IN_RANGE (INTVAL (op), -128, 127)")))
 233
 234 ;; One-extended CONST_INT that fits in 8 bits, i.e. -256..-1.
 235 (define_predicate "o8_operand"
 236   (and (match_code "const_int")
 237        (match_test "IN_RANGE (INTVAL (op), -256, -1)")))
 238
 239 ;; Signed CONST_INT that fits in 9 bits, i.e. -256..255.
 240 (define_predicate "s9_operand"
 241   (and (match_code "const_int")
 242        (match_test "IN_RANGE (INTVAL (op), -256, 255)")))
 243
 244 (define_predicate "register_or_s9_operand"
 245   (ior (match_operand 0 "register_operand")
 246        (match_operand 0 "s9_operand")))
 247
 248 ;; Unsigned CONST_INT that fits in 16 bits, i.e. 0..65536.
 249 (define_predicate "u16_operand"
 250   (and (match_code "const_int")
 251        (match_test "IN_RANGE (INTVAL (op), 0, (1<<16)-1)")))
 252
 253 ;; Signed CONST_INT that fits in 16 bits, i.e. -32768..32767.
 254 (define_predicate "s16_operand"
 255   (and (match_code "const_int")
 256        (match_test "IN_RANGE (INTVAL (op), -(1<<15), (1<<15)-1)")))
 257
 258 ;; One-extended CONST_INT that fits in 16 bits, i.e. -65536..-1.
 259 (define_predicate "o16_operand"
 260   (and (match_code "const_int")
 261        (match_test "IN_RANGE (INTVAL (op), -(1<<16), -1)")))
 262
 263 ;; Const int, fixed, or double operand
 264 (define_predicate "const_operand"
 265   (ior (match_code "const_fixed")
 266        (match_code "const_double")
 267        (match_operand 0 "const_int_operand")))
 268
 269 ;; Const int, const fixed, or const double operand
 270 (define_predicate "nonmemory_or_const_operand"
 271   (ior (match_code "const_fixed")
 272        (match_code "const_double")
 273        (match_operand 0 "nonmemory_operand")))
 274
 275 ;; Immediate, const fixed, or const double operand
 276 (define_predicate "const_or_immediate_operand"
 277   (ior (match_code "const_fixed")
 278        (match_code "const_double")
 279        (match_operand 0 "immediate_operand")))