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1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov (denisc@overta.ru)
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GCC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24 /* Names to predefine in the preprocessor for this target machine. */
25
26 #define TARGET_CPU_CPP_BUILTINS() \
27 do \
28 { \
29 builtin_define_std ("AVR"); \
30 if (avr_base_arch_macro) \
31 builtin_define (avr_base_arch_macro); \
32 if (avr_extra_arch_macro) \
33 builtin_define (avr_extra_arch_macro); \
34 if (avr_asm_only_p) \
35 builtin_define ("__AVR_ASM_ONLY__"); \
36 if (avr_enhanced_p) \
37 builtin_define ("__AVR_ENHANCED__"); \
38 if (avr_mega_p) \
39 builtin_define ("__AVR_MEGA__"); \
40 if (TARGET_NO_INTERRUPTS) \
41 builtin_define ("__NO_INTERRUPTS__"); \
42 } \
43 while (0)
44
45 /* This declaration should be present. */
46 extern int target_flags;
47
48 #define MASK_ALL_DEBUG 0x00000FE0
49 #define MASK_ORDER_1 0x00001000
50 #define MASK_INSN_SIZE_DUMP 0x00002000
51 #define MASK_ORDER_2 0x00004000
52 #define MASK_NO_TABLEJUMP 0x00008000
53 #define MASK_INT8 0x00010000
54 #define MASK_NO_INTERRUPTS 0x00020000
55 #define MASK_CALL_PROLOGUES 0x00040000
56 #define MASK_TINY_STACK 0x00080000
57 #define MASK_SHORT_CALLS 0x00100000
58
59 #define TARGET_ORDER_1 (target_flags & MASK_ORDER_1)
60 #define TARGET_ORDER_2 (target_flags & MASK_ORDER_2)
61 #define TARGET_INT8 (target_flags & MASK_INT8)
62 #define TARGET_NO_INTERRUPTS (target_flags & MASK_NO_INTERRUPTS)
63 #define TARGET_INSN_SIZE_DUMP (target_flags & MASK_INSN_SIZE_DUMP)
64 #define TARGET_CALL_PROLOGUES (target_flags & MASK_CALL_PROLOGUES)
65 #define TARGET_TINY_STACK (target_flags & MASK_TINY_STACK)
66 #define TARGET_NO_TABLEJUMP (target_flags & MASK_NO_TABLEJUMP)
67 #define TARGET_SHORT_CALLS (target_flags & MASK_SHORT_CALLS)
68 #define TARGET_ALL_DEBUG (target_flags & MASK_ALL_DEBUG)
69
70 #define TARGET_SWITCHES { \
71 { "order1", MASK_ORDER_1, NULL }, \
72 { "order2", MASK_ORDER_2, NULL }, \
73 { "int8", MASK_INT8, N_("Assume int to be 8 bit integer") }, \
74 { "no-interrupts", MASK_NO_INTERRUPTS, \
75 N_("Change the stack pointer without disabling interrupts") }, \
76 { "call-prologues", MASK_CALL_PROLOGUES, \
77 N_("Use subroutines for function prologue/epilogue") }, \
78 { "tiny-stack", MASK_TINY_STACK, \
79 N_("Change only the low 8 bits of the stack pointer") }, \
80 { "no-tablejump", MASK_NO_TABLEJUMP, \
81 N_("Do not generate tablejump insns") }, \
82 { "short-calls", MASK_SHORT_CALLS, \
83 N_("Use rjmp/rcall (limited range) on >8K devices") }, \
84 { "size", MASK_INSN_SIZE_DUMP, \
85 N_("Output instruction sizes to the asm file") }, \
86 { "deb", MASK_ALL_DEBUG, NULL }, \
87 { "", 0, NULL } }
88
89 extern const char *avr_init_stack;
90 extern const char *avr_mcu_name;
91
92 extern const char *avr_base_arch_macro;
93 extern const char *avr_extra_arch_macro;
94 extern int avr_mega_p;
95 extern int avr_enhanced_p;
96 extern int avr_asm_only_p;
97
98 #define AVR_MEGA (avr_mega_p && !TARGET_SHORT_CALLS)
99 #define AVR_ENHANCED (avr_enhanced_p)
100
101 #define TARGET_OPTIONS { \
102 { "init-stack=", &avr_init_stack, N_("Specify the initial stack address"), 0}, \
103 { "mcu=", &avr_mcu_name, N_("Specify the MCU name"), 0} }
104
105 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
106
107 #define OVERRIDE_OPTIONS avr_override_options ()
108
109 #define CAN_DEBUG_WITHOUT_FP
110
111 #define BITS_BIG_ENDIAN 0
112 #define BYTES_BIG_ENDIAN 0
113 #define WORDS_BIG_ENDIAN 0
114
115 #ifdef IN_LIBGCC2
116 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
117 #define UNITS_PER_WORD 4
118 #else
119 /* Width of a word, in units (bytes). */
120 #define UNITS_PER_WORD 1
121 #endif
122
123 #define POINTER_SIZE 16
124
125
126 /* Maximum sized of reasonable data type
127 DImode or Dfmode ... */
128 #define MAX_FIXED_MODE_SIZE 32
129
130 #define PARM_BOUNDARY 8
131
132 #define FUNCTION_BOUNDARY 8
133
134 #define EMPTY_FIELD_BOUNDARY 8
135
136 /* No data type wants to be aligned rounder than this. */
137 #define BIGGEST_ALIGNMENT 8
138
139
140 #define STRICT_ALIGNMENT 0
141
142 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
143 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
144 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
145 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
146 #define FLOAT_TYPE_SIZE 32
147 #define DOUBLE_TYPE_SIZE 32
148 #define LONG_DOUBLE_TYPE_SIZE 32
149
150 #define DEFAULT_SIGNED_CHAR 1
151
152 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
153 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
154
155 #define WCHAR_TYPE_SIZE 16
156
157 #define FIRST_PSEUDO_REGISTER 36
158
159 #define FIXED_REGISTERS {\
160 1,1,/* r0 r1 */\
161 0,0,/* r2 r3 */\
162 0,0,/* r4 r5 */\
163 0,0,/* r6 r7 */\
164 0,0,/* r8 r9 */\
165 0,0,/* r10 r11 */\
166 0,0,/* r12 r13 */\
167 0,0,/* r14 r15 */\
168 0,0,/* r16 r17 */\
169 0,0,/* r18 r19 */\
170 0,0,/* r20 r21 */\
171 0,0,/* r22 r23 */\
172 0,0,/* r24 r25 */\
173 0,0,/* r26 r27 */\
174 0,0,/* r28 r29 */\
175 0,0,/* r30 r31 */\
176 1,1,/* STACK */\
177 1,1 /* arg pointer */ }
178
179 #define CALL_USED_REGISTERS { \
180 1,1,/* r0 r1 */ \
181 0,0,/* r2 r3 */ \
182 0,0,/* r4 r5 */ \
183 0,0,/* r6 r7 */ \
184 0,0,/* r8 r9 */ \
185 0,0,/* r10 r11 */ \
186 0,0,/* r12 r13 */ \
187 0,0,/* r14 r15 */ \
188 0,0,/* r16 r17 */ \
189 1,1,/* r18 r19 */ \
190 1,1,/* r20 r21 */ \
191 1,1,/* r22 r23 */ \
192 1,1,/* r24 r25 */ \
193 1,1,/* r26 r27 */ \
194 0,0,/* r28 r29 */ \
195 1,1,/* r30 r31 */ \
196 1,1,/* STACK */ \
197 1,1 /* arg pointer */ }
198
199 #define NON_SAVING_SETJMP 0
200
201 #define REG_ALLOC_ORDER { \
202 24,25, \
203 18,19, \
204 20,21, \
205 22,23, \
206 30,31, \
207 26,27, \
208 28,29, \
209 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
210 0,1, \
211 32,33,34,35 \
212 }
213
214 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
215
216
217 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
218
219 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
220
221 #define MODES_TIEABLE_P(MODE1, MODE2) 0
222
223 enum reg_class {
224 NO_REGS,
225 R0_REG, /* r0 */
226 POINTER_X_REGS, /* r26 - r27 */
227 POINTER_Y_REGS, /* r28 - r29 */
228 POINTER_Z_REGS, /* r30 - r31 */
229 STACK_REG, /* STACK */
230 BASE_POINTER_REGS, /* r28 - r31 */
231 POINTER_REGS, /* r26 - r31 */
232 ADDW_REGS, /* r24 - r31 */
233 SIMPLE_LD_REGS, /* r16 - r23 */
234 LD_REGS, /* r16 - r31 */
235 NO_LD_REGS, /* r0 - r15 */
236 GENERAL_REGS, /* r0 - r31 */
237 ALL_REGS, LIM_REG_CLASSES
238 };
239
240
241 #define N_REG_CLASSES (int)LIM_REG_CLASSES
242
243 #define REG_CLASS_NAMES { \
244 "NO_REGS", \
245 "R0_REG", /* r0 */ \
246 "POINTER_X_REGS", /* r26 - r27 */ \
247 "POINTER_Y_REGS", /* r28 - r29 */ \
248 "POINTER_Z_REGS", /* r30 - r31 */ \
249 "STACK_REG", /* STACK */ \
250 "BASE_POINTER_REGS", /* r28 - r31 */ \
251 "POINTER_REGS", /* r26 - r31 */ \
252 "ADDW_REGS", /* r24 - r31 */ \
253 "SIMPLE_LD_REGS", /* r16 - r23 */ \
254 "LD_REGS", /* r16 - r31 */ \
255 "NO_LD_REGS", /* r0 - r15 */ \
256 "GENERAL_REGS", /* r0 - r31 */ \
257 "ALL_REGS" }
258
259 #define REG_X 26
260 #define REG_Y 28
261 #define REG_Z 30
262 #define REG_W 24
263
264 #define REG_CLASS_CONTENTS { \
265 {0x00000000,0x00000000}, /* NO_REGS */ \
266 {0x00000001,0x00000000}, /* R0_REG */ \
267 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
268 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
269 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
270 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
271 {(3 << REG_Y) | (3 << REG_Z), \
272 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
273 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
274 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
275 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
276 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
277 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
278 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
279 0x00000000}, /* LD_REGS, r16 - r31 */ \
280 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
281 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
282 {0xffffffff,0x00000003} /* ALL_REGS */ \
283 }
284
285 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
286
287 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
288
289 #define INDEX_REG_CLASS NO_REGS
290
291 #define REG_CLASS_FROM_LETTER(C) avr_reg_class_from_letter(C)
292
293 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER \
294 && ((r) == REG_X \
295 || (r) == REG_Y \
296 || (r) == REG_Z \
297 || (r) == ARG_POINTER_REGNUM)) \
298 || (reg_renumber \
299 && (reg_renumber[r] == REG_X \
300 || reg_renumber[r] == REG_Y \
301 || reg_renumber[r] == REG_Z \
302 || (reg_renumber[r] \
303 == ARG_POINTER_REGNUM))))
304
305 #define REGNO_OK_FOR_INDEX_P(NUM) 0
306
307 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
308
309 #define SMALL_REGISTER_CLASSES 1
310
311 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
312
313 #define CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs (CLASS, MODE)
314
315 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
316 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 63 : \
317 (C) == 'J' ? (VALUE) <= 0 && (VALUE) >= -63: \
318 (C) == 'K' ? (VALUE) == 2 : \
319 (C) == 'L' ? (VALUE) == 0 : \
320 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 0xff : \
321 (C) == 'N' ? (VALUE) == -1: \
322 (C) == 'O' ? (VALUE) == 8 || (VALUE) == 16 || (VALUE) == 24: \
323 (C) == 'P' ? (VALUE) == 1 : \
324 0)
325
326 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
327 ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \
328 : 0)
329
330 #define EXTRA_CONSTRAINT(x, c) extra_constraint(x, c)
331
332 #define STACK_PUSH_CODE POST_DEC
333
334 #define STACK_GROWS_DOWNWARD
335
336 #define STARTING_FRAME_OFFSET 1
337
338 #define STACK_POINTER_OFFSET 1
339
340 #define FIRST_PARM_OFFSET(FUNDECL) 0
341
342 #define STACK_BOUNDARY 8
343
344 #define STACK_POINTER_REGNUM 32
345
346 #define FRAME_POINTER_REGNUM REG_Y
347
348 #define ARG_POINTER_REGNUM 34
349
350 #define STATIC_CHAIN_REGNUM 2
351
352 #define FRAME_POINTER_REQUIRED frame_pointer_required_p()
353
354 #define ELIMINABLE_REGS { \
355 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
356 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
357 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
358
359 #define CAN_ELIMINATE(FROM, TO) (((FROM) == ARG_POINTER_REGNUM \
360 && (TO) == FRAME_POINTER_REGNUM) \
361 || (((FROM) == FRAME_POINTER_REGNUM \
362 || (FROM) == FRAME_POINTER_REGNUM+1) \
363 && ! FRAME_POINTER_REQUIRED \
364 ))
365
366 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
367 OFFSET = initial_elimination_offset (FROM, TO)
368
369 #define RETURN_ADDR_RTX(count, x) \
370 gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
371
372 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
373
374 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
375
376 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
377
378 typedef struct avr_args {
379 int nregs; /* # registers available for passing */
380 int regno; /* next available register number */
381 } CUMULATIVE_ARGS;
382
383 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
384 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
385
386 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
387 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
388
389 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
390
391 extern int avr_reg_order[];
392
393 #define RET_REGISTER avr_ret_register ()
394
395 #define FUNCTION_VALUE(VALTYPE, FUNC) avr_function_value (VALTYPE, FUNC)
396
397 #define LIBCALL_VALUE(MODE) avr_libcall_value (MODE)
398
399 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
400
401 #define DEFAULT_PCC_STRUCT_RETURN 0
402
403 #define EPILOGUE_USES(REGNO) 0
404
405 #define HAVE_POST_INCREMENT 1
406 #define HAVE_PRE_DECREMENT 1
407
408 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
409
410 #define MAX_REGS_PER_ADDRESS 1
411
412 #ifdef REG_OK_STRICT
413 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
414 { \
415 if (legitimate_address_p (mode, operand, 1)) \
416 goto ADDR; \
417 }
418 # else
419 # define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
420 { \
421 if (legitimate_address_p (mode, operand, 0)) \
422 goto ADDR; \
423 }
424 #endif
425
426 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
427 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
428
429 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
430
431 #ifdef REG_OK_STRICT
432 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
433 #else
434 # define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
435 #endif
436
437 #define REG_OK_FOR_INDEX_P(X) 0
438
439 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
440 { \
441 (X) = legitimize_address (X, OLDX, MODE); \
442 if (memory_address_p (MODE, X)) \
443 goto WIN; \
444 }
445
446 #define XEXP_(X,Y) (X)
447 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) \
448 do { \
449 if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC)) \
450 { \
451 push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0), \
452 POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0, \
453 OPNUM, RELOAD_OTHER); \
454 goto WIN; \
455 } \
456 if (GET_CODE (X) == PLUS \
457 && REG_P (XEXP (X, 0)) \
458 && GET_CODE (XEXP (X, 1)) == CONST_INT \
459 && INTVAL (XEXP (X, 1)) >= 1) \
460 { \
461 int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE)); \
462 if (fit) \
463 { \
464 if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0) \
465 { \
466 int regno = REGNO (XEXP (X, 0)); \
467 rtx mem = make_memloc (X, regno); \
468 push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL, \
469 POINTER_REGS, Pmode, VOIDmode, 0, 0, \
470 1, ADDR_TYPE (TYPE)); \
471 push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL, \
472 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
473 OPNUM, TYPE); \
474 goto WIN; \
475 } \
476 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL, \
477 BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
478 OPNUM, TYPE); \
479 goto WIN; \
480 } \
481 else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
482 { \
483 push_reload (X, NULL_RTX, &X, NULL, \
484 POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
485 OPNUM, TYPE); \
486 goto WIN; \
487 } \
488 } \
489 } while(0)
490
491 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
492 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
493 goto LABEL
494
495 #define LEGITIMATE_CONSTANT_P(X) 1
496
497 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
498 : (TO) == STACK_REG ? 12 \
499 : 2)
500
501 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 : \
502 (MODE)==HImode ? 4 : \
503 (MODE)==SImode ? 8 : \
504 (MODE)==SFmode ? 8 : 16)
505
506 #define BRANCH_COST 0
507
508 #define SLOW_BYTE_ACCESS 0
509
510 #define NO_FUNCTION_CSE
511
512 #define TEXT_SECTION_ASM_OP "\t.text"
513
514 #define DATA_SECTION_ASM_OP "\t.data"
515
516 #define BSS_SECTION_ASM_OP "\t.section .bss"
517
518 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
519 There are no shared libraries on this target, and these sections are
520 placed in the read-only program memory, so they are not writable. */
521
522 #undef CTORS_SECTION_ASM_OP
523 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
524
525 #undef DTORS_SECTION_ASM_OP
526 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
527
528 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
529
530 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
531
532 #define EXTRA_SECTIONS in_progmem
533
534 #define EXTRA_SECTION_FUNCTIONS \
535 \
536 void \
537 progmem_section (void) \
538 { \
539 if (in_section != in_progmem) \
540 { \
541 fprintf (asm_out_file, \
542 "\t.section .progmem.gcc_sw_table, \"%s\", @progbits\n", \
543 AVR_MEGA ? "a" : "ax"); \
544 /* Should already be aligned, this is just to be safe if it isn't. */ \
545 fprintf (asm_out_file, "\t.p2align 1\n"); \
546 in_section = in_progmem; \
547 } \
548 }
549
550 #define READONLY_DATA_SECTION data_section
551
552 #define JUMP_TABLES_IN_TEXT_SECTION 0
553
554 #define ASM_COMMENT_START " ; "
555
556 #define ASM_APP_ON "/* #APP */\n"
557
558 #define ASM_APP_OFF "/* #NOAPP */\n"
559
560 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \
561 fprintf (STREAM,"/* line: %d */\n",LINE)
562
563 /* Switch into a generic section. */
564 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
565
566 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) gas_output_ascii (FILE,P,SIZE)
567
568 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '\n' \
569 || ((C) == '$'))
570
571 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \
572 do { \
573 fputs ("\t.comm ", (STREAM)); \
574 assemble_name ((STREAM), (NAME)); \
575 fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE)); \
576 } while (0)
577
578 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \
579 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
580
581 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED) \
582 do { \
583 fputs ("\t.lcomm ", (STREAM)); \
584 assemble_name ((STREAM), (NAME)); \
585 fprintf ((STREAM), ",%d\n", (int)(SIZE)); \
586 } while (0)
587
588 #undef TYPE_ASM_OP
589 #undef SIZE_ASM_OP
590 #undef WEAK_ASM_OP
591 #define TYPE_ASM_OP "\t.type\t"
592 #define SIZE_ASM_OP "\t.size\t"
593 #define WEAK_ASM_OP "\t.weak\t"
594 /* Define the strings used for the special svr4 .type and .size directives.
595 These strings generally do not vary from one system running svr4 to
596 another, but if a given system (e.g. m88k running svr) needs to use
597 different pseudo-op names for these, they may be overridden in the
598 file which includes this one. */
599
600
601 #undef TYPE_OPERAND_FMT
602 #define TYPE_OPERAND_FMT "@%s"
603 /* The following macro defines the format used to output the second
604 operand of the .type assembler directive. Different svr4 assemblers
605 expect various different forms for this operand. The one given here
606 is just a default. You may need to override it in your machine-
607 specific tm.h file (depending upon the particulars of your assembler). */
608
609 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
610 do { \
611 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "function"); \
612 ASM_OUTPUT_LABEL (FILE, NAME); \
613 } while (0)
614
615 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
616 do { \
617 if (!flag_inhibit_size_directive) \
618 ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME); \
619 } while (0)
620
621 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
622 do { \
623 ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \
624 size_directive_output = 0; \
625 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
626 { \
627 size_directive_output = 1; \
628 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, \
629 int_size_in_bytes (TREE_TYPE (DECL))); \
630 } \
631 ASM_OUTPUT_LABEL(FILE, NAME); \
632 } while (0)
633
634 #undef ASM_FINISH_DECLARE_OBJECT
635 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
636 do { \
637 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
638 HOST_WIDE_INT size; \
639 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
640 && ! AT_END && TOP_LEVEL \
641 && DECL_INITIAL (DECL) == error_mark_node \
642 && !size_directive_output) \
643 { \
644 size_directive_output = 1; \
645 size = int_size_in_bytes (TREE_TYPE (DECL)); \
646 ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size); \
647 } \
648 } while (0)
649
650
651 #define ESCAPES \
652 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
653 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
654 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
655 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
656 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
657 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
658 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
659 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
660 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
661 ASM_OUTPUT_LIMITED_STRING macros. Each byte in the table
662 corresponds to a particular byte value [0..255]. For any
663 given byte value, if the value in the corresponding table
664 position is zero, the given character can be output directly.
665 If the table value is 1, the byte must be output as a \ooo
666 octal escape. If the tables value is anything else, then the
667 byte value should be output as a \ followed by the value
668 in the table. Note that we can use standard UN*X escape
669 sequences for many control characters, but we don't use
670 \a to represent BEL because some svr4 assemblers (e.g. on
671 the i386) don't know about that. Also, we don't use \v
672 since some versions of gas, such as 2.2 did not accept it. */
673
674 #define STRING_LIMIT ((unsigned) 64)
675 #define STRING_ASM_OP "\t.string\t"
676 /* Some svr4 assemblers have a limit on the number of characters which
677 can appear in the operand of a .string directive. If your assembler
678 has such a limitation, you should define STRING_LIMIT to reflect that
679 limit. Note that at least some svr4 assemblers have a limit on the
680 actual number of bytes in the double-quoted string, and that they
681 count each character in an escape sequence as one byte. Thus, an
682 escape sequence like \377 would count as four bytes.
683
684 If your target assembler doesn't support the .string directive, you
685 should define this to zero. */
686
687 /* Globalizing directive for a label. */
688 #define GLOBAL_ASM_OP ".global\t"
689
690 #define ASM_WEAKEN_LABEL(FILE, NAME) \
691 do \
692 { \
693 fputs ("\t.weak\t", (FILE)); \
694 assemble_name ((FILE), (NAME)); \
695 fputc ('\n', (FILE)); \
696 } \
697 while (0)
698
699 #define SUPPORTS_WEAK 1
700
701 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
702 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
703
704 #define HAS_INIT_SECTION 1
705
706 #define REGISTER_NAMES { \
707 "r0","r1","r2","r3","r4","r5","r6","r7", \
708 "r8","r9","r10","r11","r12","r13","r14","r15", \
709 "r16","r17","r18","r19","r20","r21","r22","r23", \
710 "r24","r25","r26","r27","r28","r29","r30","r31", \
711 "__SPL__","__SPH__","argL","argH"}
712
713 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
714
715 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
716
717 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~')
718
719 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
720
721 #define USER_LABEL_PREFIX ""
722
723 #define ASSEMBLER_DIALECT AVR_ENHANCED
724
725 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
726 { \
727 if (REGNO > 31) \
728 abort (); \
729 fprintf (STREAM, "\tpush\tr%d", REGNO); \
730 }
731
732 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
733 { \
734 if (REGNO > 31) \
735 abort (); \
736 fprintf (STREAM, "\tpop\tr%d", REGNO); \
737 }
738
739 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
740 avr_output_addr_vec_elt(STREAM, VALUE)
741
742 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
743 progmem_section (), (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM)
744
745 #define ASM_OUTPUT_SKIP(STREAM, N) \
746 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
747
748 #define ASM_OUTPUT_ALIGN(STREAM, POWER)
749
750 #define CASE_VECTOR_MODE HImode
751
752 extern int avr_case_values_threshold;
753
754 #define CASE_VALUES_THRESHOLD avr_case_values_threshold
755
756 #undef WORD_REGISTER_OPERATIONS
757
758 #define MOVE_MAX 4
759
760 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
761
762 #define Pmode HImode
763
764 #define FUNCTION_MODE HImode
765
766 #define DOLLARS_IN_IDENTIFIERS 0
767
768 #define NO_DOLLAR_IN_LABEL 1
769
770 #define TRAMPOLINE_TEMPLATE(FILE) \
771 internal_error ("trampolines not supported")
772
773 #define TRAMPOLINE_SIZE 4
774
775 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
776 { \
777 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT); \
778 emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
779 }
780 /* Store in cc_status the expressions
781 that the condition codes will describe
782 after execution of an instruction whose pattern is EXP.
783 Do not alter them if the instruction would not alter the cc's. */
784
785 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
786
787 /* The add insns don't set overflow in a usable way. */
788 #define CC_OVERFLOW_UNUSABLE 01000
789 /* The mov,and,or,xor insns don't set carry. That's ok though as the
790 Z bit is all we need when doing unsigned comparisons on the result of
791 these insns (since they're always with 0). However, conditions.h has
792 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
793 understandable. */
794 #define CC_NO_CARRY CC_NO_OVERFLOW
795
796
797 /* Output assembler code to FILE to increment profiler label # LABELNO
798 for profiling a function entry. */
799
800 #define FUNCTION_PROFILER(FILE, LABELNO) \
801 fprintf (FILE, "/* profiler %d */", (LABELNO))
802
803 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
804 adjust_insn_length (INSN, LENGTH))
805
806 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
807
808 #define CC1_SPEC "%{profile:-p}"
809
810 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
811 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
812 %{!fexceptions:-fno-exceptions}"
813 /* A C string constant that tells the GCC drvier program options to
814 pass to `cc1plus'. */
815
816 #define ASM_SPEC "%{mmcu=*:-mmcu=%*}"
817
818 #define LINK_SPEC " %{!mmcu*:-m avr2}\
819 %{mmcu=at90s1200|mmcu=attiny1*|mmcu=attiny28:-m avr1} \
820 %{mmcu=attiny22|mmcu=attiny26|mmcu=at90s2*|mmcu=at90s4*|mmcu=at90s8*|mmcu=at90c8*|mmcu=at86rf401:-m avr2}\
821 %{mmcu=atmega103|mmcu=atmega603|mmcu=at43*|mmcu=at76*:-m avr3}\
822 %{mmcu=atmega8*:-m avr4}\
823 %{mmcu=atmega16*|mmcu=atmega32*|mmcu=atmega64|mmcu=atmega128|mmcu=at94k:-m avr5}\
824 %{mmcu=atmega64|mmcu=atmega128|mmcu=atmega162|mmcu=atmega169: -Tdata 0x800100} "
825
826 #define LIB_SPEC \
827 "%{!mmcu=at90s1*:%{!mmcu=attiny1*:%{!mmcu=attiny28: -lc }}}"
828
829 #define LIBSTDCXX "-lgcc"
830 /* No libstdc++ for now. Empty string doesn't work. */
831
832 #define LIBGCC_SPEC \
833 "%{!mmcu=at90s1*:%{!mmcu=attiny1*:%{!mmcu=attiny28: -lgcc }}}"
834
835 #define STARTFILE_SPEC "%(crt_binutils)"
836
837 #define ENDFILE_SPEC ""
838
839 #define CRT_BINUTILS_SPECS "\
840 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
841 %{mmcu=attiny11:crttn11.o%s} \
842 %{mmcu=attiny12:crttn12.o%s} \
843 %{mmcu=attiny15:crttn15.o%s} \
844 %{mmcu=attiny28:crttn28.o%s} \
845 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
846 %{mmcu=at90s2313:crts2313.o%s} \
847 %{mmcu=at90s2323:crts2323.o%s} \
848 %{mmcu=at90s2333:crts2333.o%s} \
849 %{mmcu=at90s2343:crts2343.o%s} \
850 %{mmcu=attiny22:crttn22.o%s} \
851 %{mmcu=attiny26:crttn26.o%s} \
852 %{mmcu=at90s4433:crts4433.o%s} \
853 %{mmcu=at90s4414:crts4414.o%s} \
854 %{mmcu=at90s4434:crts4434.o%s} \
855 %{mmcu=at90c8534:crtc8534.o%s} \
856 %{mmcu=at90s8535:crts8535.o%s} \
857 %{mmcu=at86rf401:crt86401.o%s} \
858 %{mmcu=atmega103|mmcu=avr3:crtm103.o%s} \
859 %{mmcu=atmega603:crtm603.o%s} \
860 %{mmcu=at43usb320:crt43320.o%s} \
861 %{mmcu=at43usb355:crt43355.o%s} \
862 %{mmcu=at76c711:crt76711.o%s} \
863 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
864 %{mmcu=atmega8515:crtm8515.o%s} \
865 %{mmcu=atmega8535:crtm8535.o%s} \
866 %{mmcu=atmega16:crtm16.o%s} \
867 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
868 %{mmcu=atmega162:crtm162.o%s} \
869 %{mmcu=atmega163:crtm163.o%s} \
870 %{mmcu=atmega169:crtm169.o%s} \
871 %{mmcu=atmega32:crtm32.o%s} \
872 %{mmcu=atmega323:crtm323.o%s} \
873 %{mmcu=atmega64:crtm64.o%s} \
874 %{mmcu=atmega128:crtm128.o%s} \
875 %{mmcu=at94k:crtat94k.o%s}"
876
877 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
878
879 /* This is the default without any -mmcu=* option (AT90S*). */
880 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
881
882 /* This is undefined macro for collect2 disabling */
883 #define LINKER_NAME "ld"
884
885 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
886 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
887
888 /* Note that the other files fail to use these
889 in some of the places where they should. */
890
891 #if defined(__STDC__) || defined(ALMOST_STDC)
892 #define AS2(a,b,c) #a " " #b "," #c
893 #define AS2C(b,c) " " #b "," #c
894 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
895 #define AS1(a,b) #a " " #b
896 #else
897 #define AS1(a,b) "a b"
898 #define AS2(a,b,c) "a b,c"
899 #define AS2C(b,c) " b,c"
900 #define AS3(a,b,c,d) "a b,c,d"
901 #endif
902 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
903 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
904 #define CR_TAB "\n\t"
905
906 /* Temporary register r0 */
907 #define TMP_REGNO 0
908
909 /* zero register r1 */
910 #define ZERO_REGNO 1
911
912 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
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