gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998-2015 Free Software Foundation, Inc.
   4    Contributed by Denis Chertykov (chertykov@gmail.com)
   5
   6 This file is part of GCC.
   7
   8 GCC is free software; you can redistribute it and/or modify
   9 it under the terms of the GNU General Public License as published by
  10 the Free Software Foundation; either version 3, or (at your option)
  11 any later version.
  12
  13 GCC is distributed in the hope that it will be useful,
  14 but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 GNU General Public License for more details.
  17
  18 You should have received a copy of the GNU General Public License
  19 along with GCC; see the file COPYING3.  If not see
  20 <http://www.gnu.org/licenses/>.  */
  21
  22 typedef struct
  23 {
  24   /* Id of the address space as used in c_register_addr_space */
  25   unsigned char id;
  26
  27   /* Flavour of memory: 0 = RAM, 1 = Flash */
  28   int memory_class;
  29
  30   /* Width of pointer (in bytes) */
  31   int pointer_size;
  32
  33   /* Name of the address space as visible to the user */
  34   const char *name;
  35
  36   /* Segment (i.e. 64k memory chunk) number.  */
  37   int segment;
  38
  39   /* Section prefix, e.g. ".progmem1.data"  */
  40   const char *section_name;
  41 } avr_addrspace_t;
  42
  43 extern const avr_addrspace_t avr_addrspace[];
  44
  45 /* Known address spaces */
  46
  47 enum
  48   {
  49     ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
  50     ADDR_SPACE_FLASH,
  51     ADDR_SPACE_FLASH1,
  52     ADDR_SPACE_FLASH2,
  53     ADDR_SPACE_FLASH3,
  54     ADDR_SPACE_FLASH4,
  55     ADDR_SPACE_FLASH5,
  56     ADDR_SPACE_MEMX,
  57     /* Sentinel */
  58     ADDR_SPACE_COUNT
  59   };
  60
  61 #define TARGET_CPU_CPP_BUILTINS()       avr_cpu_cpp_builtins (pfile)
  62
  63 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call)
  64 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
  65 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
  66 #define AVR_HAVE_LPM (!AVR_TINY)
  67 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
  68 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
  69 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
  70 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
  71 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
  72 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
  73 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm             \
  74                         || avr_current_arch->have_rampd)
  75 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
  76
  77 /* Handling of 8-bit SP versus 16-bit SP is as follows:
  78
  79 FIXME: DRIVER_SELF_SPECS has changed.
  80    -msp8 is used internally to select the right multilib for targets with
  81    8-bit SP.  -msp8 is set automatically by DRIVER_SELF_SPECS for devices
  82    with 8-bit SP or by multilib generation machinery.  If a frame pointer is
  83    needed and SP is only 8 bits wide, SP is zero-extended to get FP.
  84
  85    TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
  86    This option has no effect on multilib selection.  It serves to save some
  87    bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
  88
  89    These two properties are reflected by built-in macros __AVR_SP8__ resp.
  90    __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__.  During multilib generation
  91    there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__.  */
  92
  93 #define AVR_HAVE_8BIT_SP                                 \
  94   ((avr_current_device->dev_attribute & AVR_SHORT_SP)    \
  95    || TARGET_TINY_STACK || avr_sp8)
  96
  97 #define AVR_HAVE_SPH (!avr_sp8)
  98
  99 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 100 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 101
 102 #define AVR_XMEGA (avr_current_arch->xmega_p)
 103 #define AVR_TINY  (avr_current_arch->tiny_p)
 104
 105 #define BITS_BIG_ENDIAN 0
 106 #define BYTES_BIG_ENDIAN 0
 107 #define WORDS_BIG_ENDIAN 0
 108
 109 #ifdef IN_LIBGCC2
 110 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 111 #define UNITS_PER_WORD 4
 112 #else
 113 /* Width of a word, in units (bytes).  */
 114 #define UNITS_PER_WORD 1
 115 #endif
 116
 117 #define POINTER_SIZE 16
 118
 119
 120 /* Maximum sized of reasonable data type
 121    DImode or Dfmode ...  */
 122 #define MAX_FIXED_MODE_SIZE 32
 123
 124 #define PARM_BOUNDARY 8
 125
 126 #define FUNCTION_BOUNDARY 8
 127
 128 #define EMPTY_FIELD_BOUNDARY 8
 129
 130 /* No data type wants to be aligned rounder than this.  */
 131 #define BIGGEST_ALIGNMENT 8
 132
 133 #define TARGET_VTABLE_ENTRY_ALIGN 8
 134
 135 #define STRICT_ALIGNMENT 0
 136
 137 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 138 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 139 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 140 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 141 #define FLOAT_TYPE_SIZE 32
 142 #define DOUBLE_TYPE_SIZE 32
 143 #define LONG_DOUBLE_TYPE_SIZE 32
 144 #define LONG_LONG_ACCUM_TYPE_SIZE 64
 145
 146 #define DEFAULT_SIGNED_CHAR 1
 147
 148 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 149 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 150
 151 #define WCHAR_TYPE_SIZE 16
 152
 153 #define FIRST_PSEUDO_REGISTER 36
 154
 155 #define FIXED_REGISTERS {\
 156   1,1,/* r0 r1 */\
 157   0,0,/* r2 r3 */\
 158   0,0,/* r4 r5 */\
 159   0,0,/* r6 r7 */\
 160   0,0,/* r8 r9 */\
 161   0,0,/* r10 r11 */\
 162   0,0,/* r12 r13 */\
 163   0,0,/* r14 r15 */\
 164   0,0,/* r16 r17 */\
 165   0,0,/* r18 r19 */\
 166   0,0,/* r20 r21 */\
 167   0,0,/* r22 r23 */\
 168   0,0,/* r24 r25 */\
 169   0,0,/* r26 r27 */\
 170   0,0,/* r28 r29 */\
 171   0,0,/* r30 r31 */\
 172   1,1,/*  STACK */\
 173   1,1 /* arg pointer */  }
 174
 175 #define CALL_USED_REGISTERS {                   \
 176   1,1,/* r0 r1 */                               \
 177     0,0,/* r2 r3 */                             \
 178     0,0,/* r4 r5 */                             \
 179     0,0,/* r6 r7 */                             \
 180     0,0,/* r8 r9 */                             \
 181     0,0,/* r10 r11 */                           \
 182     0,0,/* r12 r13 */                           \
 183     0,0,/* r14 r15 */                           \
 184     0,0,/* r16 r17 */                           \
 185     1,1,/* r18 r19 */                           \
 186     1,1,/* r20 r21 */                           \
 187     1,1,/* r22 r23 */                           \
 188     1,1,/* r24 r25 */                           \
 189     1,1,/* r26 r27 */                           \
 190     0,0,/* r28 r29 */                           \
 191     1,1,/* r30 r31 */                           \
 192     1,1,/*  STACK */                            \
 193     1,1 /* arg pointer */  }
 194
 195 #define REG_ALLOC_ORDER {                       \
 196     24,25,                                      \
 197     18,19,                                      \
 198     20,21,                                      \
 199     22,23,                                      \
 200     30,31,                                      \
 201     26,27,                                      \
 202     28,29,                                      \
 203     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 204     0,1,                                        \
 205     32,33,34,35                                 \
 206     }
 207
 208 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
 209
 210
 211 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 212   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 213
 214 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 215
 216 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 217
 218 enum reg_class {
 219   NO_REGS,
 220   R0_REG,                       /* r0 */
 221   POINTER_X_REGS,               /* r26 - r27 */
 222   POINTER_Y_REGS,               /* r28 - r29 */
 223   POINTER_Z_REGS,               /* r30 - r31 */
 224   STACK_REG,                    /* STACK */
 225   BASE_POINTER_REGS,            /* r28 - r31 */
 226   POINTER_REGS,                 /* r26 - r31 */
 227   ADDW_REGS,                    /* r24 - r31 */
 228   SIMPLE_LD_REGS,               /* r16 - r23 */
 229   LD_REGS,                      /* r16 - r31 */
 230   NO_LD_REGS,                   /* r0 - r15 */
 231   GENERAL_REGS,                 /* r0 - r31 */
 232   ALL_REGS, LIM_REG_CLASSES
 233 };
 234
 235
 236 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 237
 238 #define REG_CLASS_NAMES {                                       \
 239                  "NO_REGS",                                     \
 240                    "R0_REG",    /* r0 */                        \
 241                    "POINTER_X_REGS", /* r26 - r27 */            \
 242                    "POINTER_Y_REGS", /* r28 - r29 */            \
 243                    "POINTER_Z_REGS", /* r30 - r31 */            \
 244                    "STACK_REG", /* STACK */                     \
 245                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 246                    "POINTER_REGS", /* r26 - r31 */              \
 247                    "ADDW_REGS", /* r24 - r31 */                 \
 248                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 249                    "LD_REGS",   /* r16 - r31 */                 \
 250                    "NO_LD_REGS", /* r0 - r15 */                 \
 251                    "GENERAL_REGS", /* r0 - r31 */               \
 252                    "ALL_REGS" }
 253
 254 #define REG_CLASS_CONTENTS {                                            \
 255   {0x00000000,0x00000000},      /* NO_REGS */                           \
 256   {0x00000001,0x00000000},      /* R0_REG */                            \
 257   {3u << REG_X,0x00000000},     /* POINTER_X_REGS, r26 - r27 */         \
 258   {3u << REG_Y,0x00000000},     /* POINTER_Y_REGS, r28 - r29 */         \
 259   {3u << REG_Z,0x00000000},     /* POINTER_Z_REGS, r30 - r31 */         \
 260   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 261   {(3u << REG_Y) | (3u << REG_Z),                                       \
 262      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 263   {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z),                       \
 264      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 265   {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W),       \
 266      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 267   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 268   {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
 269      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 270   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 271   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 272   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 273 }
 274
 275 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 276
 277 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code)   \
 278   avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
 279
 280 #define INDEX_REG_CLASS NO_REGS
 281
 282 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
 283   avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
 284
 285 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 286
 287 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)     \
 288   avr_hard_regno_call_part_clobbered (REGNO, MODE)
 289
 290 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 291
 292 #define STACK_PUSH_CODE POST_DEC
 293
 294 #define STACK_GROWS_DOWNWARD
 295
 296 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
 297
 298 #define STACK_POINTER_OFFSET 1
 299
 300 #define FIRST_PARM_OFFSET(FUNDECL) 0
 301
 302 #define STACK_BOUNDARY 8
 303
 304 #define STACK_POINTER_REGNUM 32
 305
 306 #define FRAME_POINTER_REGNUM REG_Y
 307
 308 #define ARG_POINTER_REGNUM 34
 309
 310 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
 311
 312 #define ELIMINABLE_REGS {                                       \
 313     { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },               \
 314     { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },               \
 315     { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },             \
 316     { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } }
 317
 318 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 319   OFFSET = avr_initial_elimination_offset (FROM, TO)
 320
 321 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
 322
 323 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 324    for POST_DEC targets (PR27386).  */
 325 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 326
 327 typedef struct avr_args
 328 {
 329   /* # Registers available for passing */
 330   int nregs;
 331
 332   /* Next available register number */
 333   int regno;
 334 } CUMULATIVE_ARGS;
 335
 336 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 337   avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 338
 339 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
 340
 341 #define DEFAULT_PCC_STRUCT_RETURN 0
 342
 343 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 344
 345 #define HAVE_POST_INCREMENT 1
 346 #define HAVE_PRE_DECREMENT 1
 347
 348 #define MAX_REGS_PER_ADDRESS 1
 349
 350 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN)          \
 351   do {                                                                  \
 352     rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
 353                                                ADDR_TYPE (TYPE),        \
 354                                                IND_L, make_memloc);     \
 355     if (new_x)                                                          \
 356       {                                                                 \
 357         X = new_x;                                                      \
 358         goto WIN;                                                       \
 359       }                                                                 \
 360   } while (0)
 361
 362 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
 363
 364 #define SLOW_BYTE_ACCESS 0
 365
 366 #define NO_FUNCTION_CSE
 367
 368 #define REGISTER_TARGET_PRAGMAS()                                       \
 369   do {                                                                  \
 370     avr_register_target_pragmas();                                      \
 371   } while (0)
 372
 373 #define TEXT_SECTION_ASM_OP "\t.text"
 374
 375 #define DATA_SECTION_ASM_OP "\t.data"
 376
 377 #define BSS_SECTION_ASM_OP "\t.section .bss"
 378
 379 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 380    There are no shared libraries on this target, and these sections are
 381    placed in the read-only program memory, so they are not writable.  */
 382
 383 #undef CTORS_SECTION_ASM_OP
 384 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 385
 386 #undef DTORS_SECTION_ASM_OP
 387 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 388
 389 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 390
 391 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 392
 393 #define SUPPORTS_INIT_PRIORITY 0
 394
 395 #define JUMP_TABLES_IN_TEXT_SECTION 0
 396
 397 #define ASM_COMMENT_START " ; "
 398
 399 #define ASM_APP_ON "/* #APP */\n"
 400
 401 #define ASM_APP_OFF "/* #NOAPP */\n"
 402
 403 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 404
 405 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
 406   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
 407
 408 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 409   avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \
 410                                   asm_output_aligned_bss)
 411
 412 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN)  \
 413   avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
 414
 415 /* Globalizing directive for a label.  */
 416 #define GLOBAL_ASM_OP ".global\t"
 417
 418 #define SUPPORTS_WEAK 1
 419
 420 #define HAS_INIT_SECTION 1
 421
 422 #define REGISTER_NAMES {                                \
 423   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 424     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 425     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 426     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 427     "__SP_L__","__SP_H__","argL","argH"}
 428
 429 #define FINAL_PRESCAN_INSN(insn, operand, nop)  \
 430   avr_final_prescan_insn (insn, operand,nop)
 431
 432 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 433 {                                               \
 434   gcc_assert (REGNO < 32);                      \
 435   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 436 }
 437
 438 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 439 {                                               \
 440   gcc_assert (REGNO < 32);                      \
 441   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 442 }
 443
 444 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)  \
 445   avr_output_addr_vec_elt (STREAM, VALUE)
 446
 447 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 448   do {                                                  \
 449     if ((POWER) > 0)                                    \
 450       fprintf (STREAM, "\t.p2align\t%d\n", POWER);      \
 451   } while (0)
 452
 453 #define CASE_VECTOR_MODE HImode
 454
 455 #undef WORD_REGISTER_OPERATIONS
 456
 457 #define MOVE_MAX 4
 458
 459 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 460
 461 #define Pmode HImode
 462
 463 #define FUNCTION_MODE HImode
 464
 465 #define DOLLARS_IN_IDENTIFIERS 0
 466
 467 #define TRAMPOLINE_SIZE 4
 468
 469 /* Store in cc_status the expressions
 470    that the condition codes will describe
 471    after execution of an instruction whose pattern is EXP.
 472    Do not alter them if the instruction would not alter the cc's.  */
 473
 474 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN)
 475
 476 /* The add insns don't set overflow in a usable way.  */
 477 #define CC_OVERFLOW_UNUSABLE 01000
 478 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 479    Z bit is all we need when doing unsigned comparisons on the result of
 480    these insns (since they're always with 0).  However, conditions.h has
 481    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 482    understandable.  */
 483 #define CC_NO_CARRY CC_NO_OVERFLOW
 484
 485
 486 /* Output assembler code to FILE to increment profiler label # LABELNO
 487    for profiling a function entry.  */
 488
 489 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 490   fprintf (FILE, "/* profiler %d */", (LABELNO))
 491
 492 #define ADJUST_INSN_LENGTH(INSN, LENGTH)                \
 493     (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
 494
 495 #define DRIVER_SELF_SPECS " %{mmcu=*:-specs=device-specs/specs-%*%s %<mmcu=*} "
 496 #define CPP_SPEC ""
 497
 498 /* We want cc1plus used as a preprocessor to pick up the cpp spec from the
 499    per-device spec files  */
 500 #define CPLUSPLUS_CPP_SPEC "%(cpp)"
 501
 502 #define CC1_SPEC ""
 503
 504 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 505     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 506     %{!fexceptions:-fno-exceptions}"
 507
 508 #define ASM_SPEC "%{march=*:-mmcu=%*}%{mrelax: --mlink-relax}"
 509
 510 #define LINK_SPEC "\
 511 %{mrelax:--relax\
 512          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 513                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 514                              %{mmcu=atmega32*|\
 515                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 516                              %{mmcu=atmega64*|\
 517                                mmcu=at90can64*|\
 518                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 519 %{march=*:-m%*}\
 520 %{shared:%eshared is not supported}"
 521
 522 #define LIB_SPEC \
 523   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 524
 525 #define LIBSTDCXX "gcc"
 526 /* No libstdc++ for now.  Empty string doesn't work.  */
 527
 528 #define LIBGCC_SPEC \
 529   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 530
 531 /* The actual definition will come from the device-specific spec file.  */
 532 #define STARTFILE_SPEC ""
 533
 534 #define ENDFILE_SPEC ""
 535
 536 /* This is the default without any -mmcu=* option (AT90S*).  */
 537 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
 538
 539 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
 540   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
 541
 542 #define CR_TAB "\n\t"
 543
 544 #define DWARF2_ADDR_SIZE 4
 545
 546 #define INCOMING_RETURN_ADDR_RTX   avr_incoming_return_addr_rtx ()
 547 #define INCOMING_FRAME_SP_OFFSET   (AVR_3_BYTE_PC ? 3 : 2)
 548
 549 /* The caller's stack pointer value immediately before the call
 550    is one byte below the first argument.  */
 551 #define ARG_POINTER_CFA_OFFSET(FNDECL)  -1
 552
 553 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
 554   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
 555
 556 /* A C structure for machine-specific, per-function data.
 557    This is added to the cfun structure.  */
 558 struct GTY(()) machine_function
 559 {
 560   /* 'true' - if current function is a naked function.  */
 561   int is_naked;
 562
 563   /* 'true' - if current function is an interrupt function
 564      as specified by the "interrupt" attribute.  */
 565   int is_interrupt;
 566
 567   /* 'true' - if current function is a signal function
 568      as specified by the "signal" attribute.  */
 569   int is_signal;
 570
 571   /* 'true' - if current function is a 'task' function
 572      as specified by the "OS_task" attribute.  */
 573   int is_OS_task;
 574
 575   /* 'true' - if current function is a 'main' function
 576      as specified by the "OS_main" attribute.  */
 577   int is_OS_main;
 578
 579   /* Current function stack size.  */
 580   int stack_usage;
 581
 582   /* 'true' if a callee might be tail called */
 583   int sibcall_fails;
 584
 585   /* 'true' if the above is_foo predicates are sanity-checked to avoid
 586      multiple diagnose for the same function.  */
 587   int attributes_checked_p;
 588 };
 589
 590 /* AVR does not round pushes, but the existence of this macro is
 591    required in order for pushes to be generated.  */
 592 #define PUSH_ROUNDING(X)        (X)
 593
 594 /* Define prototype here to avoid build warning.  Some files using
 595    ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
 596    tm.h but not tm_p.h.  */
 597 extern int avr_accumulate_outgoing_args (void);
 598 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
 599
 600 #define INIT_EXPANDERS avr_init_expanders()
 601
 602 /* Flags used for io and address attributes.  */
 603 #define SYMBOL_FLAG_IO_LOW      (SYMBOL_FLAG_MACH_DEP << 4)
 604 #define SYMBOL_FLAG_IO          (SYMBOL_FLAG_MACH_DEP << 5)
 605 #define SYMBOL_FLAG_ADDRESS     (SYMBOL_FLAG_MACH_DEP << 6)