]>
gcc.gnu.org Git - gcc.git/blob - gcc/config/alpha/alpha.h
1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "\
25 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
26 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
28 /* Write out the correct language type definition for the header files.
29 Unless we have assembler language, write out the symbols for C. */
31 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
34 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
38 /* Set the spec to use for signed char. The default tests the above macro
39 but DEC's compiler can't handle the conditional in a "constant"
42 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
44 /* No point in running CPP on our assembler output. */
45 #define ASM_SPEC "-nocpp"
47 /* Right now Alpha OSF/1 doesn't seem to have debugging libraries. */
49 #define LIB_SPEC "%{p:-lprof1} -lc"
51 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are optimizing,
52 -O1 if we are not. Pass -non_shared or -call_shared as appropriate. */
54 "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} %{!static:-call_shared}"
56 /* Print subsidiary information on the compiler version in use. */
57 #define TARGET_VERSION
59 /* Define the location for the startup file on OSF/1 for Alpha. */
61 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
63 /* Run-time compilation parameters selecting different hardware subsets. */
65 extern int target_flags
;
67 /* This means that floating-point support exists in the target implementation
68 of the Alpha architecture. This is usually the default. */
70 #define TARGET_FP (target_flags & 1)
72 /* This means that floating-point registers are allowed to be used. Note
73 that Alpha implementations without FP operations are required to
74 provide the FP registers. */
76 #define TARGET_FPREGS (target_flags & 2)
78 /* This means that gas is used to process the assembler file. */
81 #define TARGET_GAS (target_flags & MASK_GAS)
83 /* Macro to define tables used to set the flags.
84 This is a list in braces of pairs in braces,
85 each pair being { "NAME", VALUE }
86 where VALUE is the bits to set or minus the bits to clear.
87 An empty string NAME is used to identify the default VALUE. */
89 #define TARGET_SWITCHES \
90 { {"no-soft-float", 1}, \
94 {"alpha-as", -MASK_GAS}, \
96 {"", TARGET_DEFAULT} }
98 #define TARGET_DEFAULT 3
100 /* Define this macro to change register usage conditional on target flags.
102 On the Alpha, we use this to disable the floating-point registers when
105 #define CONDITIONAL_REGISTER_USAGE \
106 if (! TARGET_FPREGS) \
107 for (i = 32; i < 64; i++) \
108 fixed_regs[i] = call_used_regs[i] = 1;
110 /* Show we can debug even without a frame pointer. */
111 #define CAN_DEBUG_WITHOUT_FP
113 /* target machine storage layout */
115 /* Define to enable software floating point emulation. */
116 #define REAL_ARITHMETIC
118 /* Define the size of `int'. The default is the same as the word size. */
119 #define INT_TYPE_SIZE 32
121 /* Define the size of `long long'. The default is the twice the word size. */
122 #define LONG_LONG_TYPE_SIZE 64
124 /* The two floating-point formats we support are S-floating, which is
125 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
126 and `long double' are T. */
128 #define FLOAT_TYPE_SIZE 32
129 #define DOUBLE_TYPE_SIZE 64
130 #define LONG_DOUBLE_TYPE_SIZE 64
132 #define WCHAR_TYPE "short unsigned int"
133 #define WCHAR_TYPE_SIZE 16
135 /* Define this macro if it is advisable to hold scalars in registers
136 in a wider mode than that declared by the program. In such cases,
137 the value is constrained to be within the bounds of the declared
138 type, but kept valid in the wider mode. The signedness of the
139 extension may differ from that of the type.
141 For Alpha, we always store objects in a full register. 32-bit objects
142 are always sign-extended, but smaller objects retain their signedness. */
144 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
145 if (GET_MODE_CLASS (MODE) == MODE_INT \
146 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
148 if ((MODE) == SImode) \
153 /* Define this if function arguments should also be promoted using the above
156 #define PROMOTE_FUNCTION_ARGS
158 /* Likewise, if the function return value is promoted. */
160 #define PROMOTE_FUNCTION_RETURN
162 /* Define this if most significant bit is lowest numbered
163 in instructions that operate on numbered bit-fields.
165 There are no such instructions on the Alpha, but the documentation
167 #define BITS_BIG_ENDIAN 0
169 /* Define this if most significant byte of a word is the lowest numbered.
170 This is false on the Alpha. */
171 #define BYTES_BIG_ENDIAN 0
173 /* Define this if most significant word of a multiword number is lowest
176 For Alpha we can decide arbitrarily since there are no machine instructions
177 for them. Might as well be consistent with bytes. */
178 #define WORDS_BIG_ENDIAN 0
180 /* number of bits in an addressable storage unit */
181 #define BITS_PER_UNIT 8
183 /* Width in bits of a "word", which is the contents of a machine register.
184 Note that this is not necessarily the width of data type `int';
185 if using 16-bit ints on a 68000, this would still be 32.
186 But on a machine with 16-bit registers, this would be 16. */
187 #define BITS_PER_WORD 64
189 /* Width of a word, in units (bytes). */
190 #define UNITS_PER_WORD 8
192 /* Width in bits of a pointer.
193 See also the macro `Pmode' defined below. */
194 #define POINTER_SIZE 64
196 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
197 #define PARM_BOUNDARY 64
199 /* Boundary (in *bits*) on which stack pointer should be aligned. */
200 #define STACK_BOUNDARY 64
202 /* Allocation boundary (in *bits*) for the code of a function. */
203 #define FUNCTION_BOUNDARY 64
205 /* Alignment of field after `int : 0' in a structure. */
206 #define EMPTY_FIELD_BOUNDARY 64
208 /* Every structure's size must be a multiple of this. */
209 #define STRUCTURE_SIZE_BOUNDARY 8
211 /* A bitfield declared as `int' forces `int' alignment for the struct. */
212 #define PCC_BITFIELD_TYPE_MATTERS 1
214 /* Align loop starts for optimal branching.
216 ??? Kludge this and the next macro for the moment by not doing anything if
217 we don't optimize and also if we are writing ECOFF symbols to work around
218 a bug in DEC's assembler. */
220 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
221 if (optimize > 0 && write_symbols != SDB_DEBUG) \
222 ASM_OUTPUT_ALIGN (FILE, 5)
224 /* This is how to align an instruction for optimal branching.
225 On Alpha we'll get better performance by aligning on a quadword
228 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
229 if (optimize > 0 && write_symbols != SDB_DEBUG) \
230 ASM_OUTPUT_ALIGN ((FILE), 4)
232 /* No data type wants to be aligned rounder than this. */
233 #define BIGGEST_ALIGNMENT 64
235 /* Make strings word-aligned so strcpy from constants will be faster. */
236 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
237 (TREE_CODE (EXP) == STRING_CST \
238 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
240 /* Make arrays of chars word-aligned for the same reasons. */
241 #define DATA_ALIGNMENT(TYPE, ALIGN) \
242 (TREE_CODE (TYPE) == ARRAY_TYPE \
243 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
244 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
246 /* Set this non-zero if move instructions will actually fail to work
247 when given unaligned data.
249 Since we get an error message when we do one, call them invalid. */
251 #define STRICT_ALIGNMENT 1
253 /* Set this non-zero if unaligned move instructions are extremely slow.
255 On the Alpha, they trap. */
257 #define SLOW_UNALIGNED_ACCESS 1
259 /* Standard register usage. */
261 /* Number of actual hardware registers.
262 The hardware registers are assigned numbers for the compiler
263 from 0 to just below FIRST_PSEUDO_REGISTER.
264 All registers that the compiler knows about must be given numbers,
265 even those that are not normally considered general registers.
267 We define all 32 integer registers, even though $31 is always zero,
268 and all 32 floating-point registers, even though $f31 is also
269 always zero. We do not bother defining the FP status register and
270 there are no other registers.
272 Since $31 is always zero, we will use register number 31 as the
273 argument pointer. It will never appear in the generated code
274 because we will always be eliminating it in favor of the stack
275 poointer or frame pointer. */
277 #define FIRST_PSEUDO_REGISTER 64
279 /* 1 for registers that have pervasive standard uses
280 and are not available for the register allocator. */
282 #define FIXED_REGISTERS \
283 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
284 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
285 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
286 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
288 /* 1 for registers not available across function calls.
289 These must include the FIXED_REGISTERS and also any
290 registers that can be used without being saved.
291 The latter must include the registers where values are returned
292 and the register where structure-value addresses are passed.
293 Aside from that, you can include as many other registers as you like. */
294 #define CALL_USED_REGISTERS \
295 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
296 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
297 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
298 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
300 /* List the order in which to allocate registers. Each register must be
301 listed once, even those in FIXED_REGISTERS.
303 We allocate in the following order:
304 $f1 (nonsaved floating-point register)
307 $f21-$f16 (likewise, but input args)
308 $f0 (nonsaved, but return value)
309 $f2-$f9 (saved floating-point registers)
310 $1-$8 (nonsaved integer registers)
313 $0 (likewise, but return value)
314 $21-$16 (likewise, but input args)
315 $27 (procedure value)
316 $9-$14 (saved integer registers)
320 $30, $31, $f31 (stack pointer and always zero/ap) */
322 #define REG_ALLOC_ORDER \
324 42, 43, 44, 45, 46, 47, \
325 54, 55, 56, 57, 58, 59, 60, 61, 62, \
326 53, 52, 51, 50, 49, 48, \
328 34, 35, 36, 37, 38, 39, 40, 41, \
329 1, 2, 3, 4, 5, 6, 7, 8, \
333 21, 20, 19, 18, 17, 16, \
335 9, 10, 11, 12, 13, 14, \
341 /* Return number of consecutive hard regs needed starting at reg REGNO
342 to hold something of mode MODE.
343 This is ordinarily the length in words of a value of mode MODE
344 but can be less for certain modes in special long registers. */
346 #define HARD_REGNO_NREGS(REGNO, MODE) \
347 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
349 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
350 On Alpha, the integer registers can hold any mode. The floating-point
351 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
352 or 8-bit values. If we only allowed the larger integers into FP registers,
353 we'd have to say that QImode and SImode aren't tiable, which is a
354 pain. So say all registers can hold everything and see how that works. */
356 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
358 /* Value is 1 if it is a good idea to tie two pseudo registers
359 when one has mode MODE1 and one has mode MODE2.
360 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
361 for any hard reg, then this must be 0 for correct output. */
363 #define MODES_TIEABLE_P(MODE1, MODE2) 1
365 /* Specify the registers used for certain standard purposes.
366 The values of these macros are register numbers. */
368 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
369 /* #define PC_REGNUM */
371 /* Register to use for pushing function arguments. */
372 #define STACK_POINTER_REGNUM 30
374 /* Base register for access to local variables of the function. */
375 #define FRAME_POINTER_REGNUM 15
377 /* Value should be nonzero if functions must have frame pointers.
378 Zero means the frame pointer need not be set up (and parms
379 may be accessed via the stack pointer) in functions that seem suitable.
380 This is computed in `reload', in reload1.c. */
381 #define FRAME_POINTER_REQUIRED 0
383 /* Base register for access to arguments of the function. */
384 #define ARG_POINTER_REGNUM 31
386 /* Register in which static-chain is passed to a function.
388 For the Alpha, this is based on an example; the calling sequence
389 doesn't seem to specify this. */
390 #define STATIC_CHAIN_REGNUM 1
392 /* Register in which address to store a structure value
393 arrives in the function. On the Alpha, the address is passed
394 as a hidden argument. */
395 #define STRUCT_VALUE 0
397 /* Define the classes of registers for register constraints in the
398 machine description. Also define ranges of constants.
400 One of the classes must always be named ALL_REGS and include all hard regs.
401 If there is more than one class, another class must be named NO_REGS
402 and contain no registers.
404 The name GENERAL_REGS must be the name of a class (or an alias for
405 another name such as ALL_REGS). This is the class of registers
406 that is allowed by "g" or "r" in a register constraint.
407 Also, registers outside this class are allocated only when
408 instructions express preferences for them.
410 The classes must be numbered in nondecreasing order; that is,
411 a larger-numbered class must never be contained completely
412 in a smaller-numbered class.
414 For any two classes, it is very desirable that there be another
415 class that represents their union. */
417 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
420 #define N_REG_CLASSES (int) LIM_REG_CLASSES
422 /* Give names of register classes as strings for dump file. */
424 #define REG_CLASS_NAMES \
425 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
427 /* Define which registers fit in which classes.
428 This is an initializer for a vector of HARD_REG_SET
429 of length N_REG_CLASSES. */
431 #define REG_CLASS_CONTENTS \
432 { {0, 0}, {~0, 0}, {0, ~0}, {~0, ~0} }
434 /* The same information, inverted:
435 Return the class number of the smallest class containing
436 reg number REGNO. This could be a conditional expression
437 or could index an array. */
439 #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 32 ? FLOAT_REGS : GENERAL_REGS)
441 /* The class value for index registers, and the one for base regs. */
442 #define INDEX_REG_CLASS NO_REGS
443 #define BASE_REG_CLASS GENERAL_REGS
445 /* Get reg_class from a letter such as appears in the machine description. */
447 #define REG_CLASS_FROM_LETTER(C) \
448 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
450 /* Define this macro to change register usage conditional on target flags. */
451 /* #define CONDITIONAL_REGISTER_USAGE */
453 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
454 can be used to stand for particular ranges of immediate operands.
455 This macro defines what the ranges are.
456 C is the letter, and VALUE is a constant value.
457 Return 1 if VALUE is in the range specified by C.
460 `I' is used for the range of constants most insns can contain.
461 `J' is the constant zero.
462 `K' is used for the constant in an LDA insn.
463 `L' is used for the constant in a LDAH insn.
464 `M' is used for the constants that can be AND'ed with using a ZAP insn.
465 `N' is used for complemented 8-bit constants.
466 `O' is used for negated 8-bit constants.
467 `P' is used for the constants 1, 2 and 3. */
469 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
470 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
471 : (C) == 'J' ? (VALUE) == 0 \
472 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
473 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
474 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \
475 : (C) == 'M' ? zap_mask (VALUE) \
476 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
477 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
478 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
481 /* Similar, but for floating or large integer constants, and defining letters
482 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
484 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
485 that is the operand of a ZAP insn. */
487 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
488 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
489 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
490 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
491 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
492 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
495 /* Optional extra constraints for this machine.
497 For the Alpha, `Q' means that this is a memory operand but not a
498 reference to an unaligned location. */
500 #define EXTRA_CONSTRAINT(OP, C) \
501 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
504 /* Given an rtx X being reloaded into a reg required to be
505 in class CLASS, return the class of reg to actually use.
506 In general this is just CLASS; but on some machines
507 in some cases it is preferable to use a more restrictive class.
509 On the Alpha, all constants except zero go into a floating-point
510 register via memory. */
512 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
513 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
514 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
517 /* Loading and storing HImode or QImode values to and from memory
518 usually requires a scratch register. The exceptions are loading
519 QImode and HImode from an aligned address to a general register.
520 We also cannot load an unaligned address into an FP register. */
522 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
523 (((GET_CODE (IN) == MEM \
524 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
525 || (GET_CODE (IN) == SUBREG \
526 && (GET_CODE (SUBREG_REG (IN)) == MEM \
527 || (GET_CODE (SUBREG_REG (IN)) == REG \
528 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
529 && (((CLASS) == FLOAT_REGS \
530 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
531 || (((MODE) == QImode || (MODE) == HImode) \
532 && unaligned_memory_operand (IN, MODE)))) \
534 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
535 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
538 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
539 (((GET_CODE (OUT) == MEM \
540 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
541 || (GET_CODE (OUT) == SUBREG \
542 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
543 || (GET_CODE (SUBREG_REG (OUT)) == REG \
544 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
545 && (((MODE) == HImode || (MODE) == QImode \
546 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
548 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
549 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
552 /* If we are copying between general and FP registers, we need a memory
555 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
557 /* Specify the mode to be used for memory when a secondary memory
558 location is needed. If MODE is floating-point, use it. Otherwise,
559 widen to a word like the default. This is needed because we always
560 store integers in FP registers in quadword format. This whole
561 area is very tricky! */
562 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
563 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
564 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
566 /* Return the maximum number of consecutive registers
567 needed to represent mode MODE in a register of class CLASS. */
569 #define CLASS_MAX_NREGS(CLASS, MODE) \
570 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
572 /* Define the cost of moving between registers of various classes. Moving
573 between FLOAT_REGS and anything else except float regs is expensive.
574 In fact, we make it quite expensive because we really don't want to
575 do these moves unless it is clearly worth it. Optimizations may
576 reduce the impact of not being able to allocate a pseudo to a
579 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
580 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
582 /* A C expressions returning the cost of moving data of MODE from a register to
585 On the Alpha, bump this up a bit. */
587 #define MEMORY_MOVE_COST(MODE) 6
589 /* Provide the cost of a branch. Exact meaning under development. */
590 #define BRANCH_COST 5
592 /* Adjust the cost of dependencies. */
594 #define ADJUST_COST(INSN,LINK,DEP,COST) \
595 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
597 /* Stack layout; function entry, exit and calling. */
599 /* Define this if pushing a word on the stack
600 makes the stack pointer a smaller address. */
601 #define STACK_GROWS_DOWNWARD
603 /* Define this if the nominal address of the stack frame
604 is at the high-address end of the local variables;
605 that is, each additional local variable allocated
606 goes at a more negative offset in the frame. */
607 /* #define FRAME_GROWS_DOWNWARD */
609 /* Offset within stack frame to start allocating local variables at.
610 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
611 first local allocated. Otherwise, it is the offset to the BEGINNING
612 of the first local allocated. */
614 #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
616 /* If we generate an insn to push BYTES bytes,
617 this says how many the stack pointer really advances by.
618 On Alpha, don't define this because there are no push insns. */
619 /* #define PUSH_ROUNDING(BYTES) */
621 /* Define this if the maximum size of all the outgoing args is to be
622 accumulated and pushed during the prologue. The amount can be
623 found in the variable current_function_outgoing_args_size. */
624 #define ACCUMULATE_OUTGOING_ARGS
626 /* Offset of first parameter from the argument pointer register value. */
628 #define FIRST_PARM_OFFSET(FNDECL) 0
630 /* Definitions for register eliminations.
632 We have two registers that can be eliminated on the Alpha. First, the
633 frame pointer register can often be eliminated in favor of the stack
634 pointer register. Secondly, the argument pointer register can always be
635 eliminated; it is replaced with either the stack or frame pointer. */
637 /* This is an array of structures. Each structure initializes one pair
638 of eliminable registers. The "from" register number is given first,
639 followed by "to". Eliminations of the same "from" register are listed
640 in order of preference. */
642 #define ELIMINABLE_REGS \
643 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
644 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
645 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
647 /* Given FROM and TO register numbers, say whether this elimination is allowed.
648 Frame pointer elimination is automatically handled.
650 All eliminations are valid since the cases where FP can't be
651 eliminated are already handled. */
653 #define CAN_ELIMINATE(FROM, TO) 1
655 /* Define the offset between two registers, one to be eliminated, and the other
656 its replacement, at the start of a routine. */
657 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
658 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
662 (OFFSET) = ((get_frame_size () + current_function_outgoing_args_size \
663 + current_function_pretend_args_size \
664 + alpha_sa_size () + 15) \
666 if ((FROM) == ARG_POINTER_REGNUM) \
667 (OFFSET) -= current_function_pretend_args_size; \
671 /* Define this if stack space is still allocated for a parameter passed
673 /* #define REG_PARM_STACK_SPACE */
675 /* Value is the number of bytes of arguments automatically
676 popped when returning from a subroutine call.
677 FUNTYPE is the data type of the function (as a tree),
678 or for a library call it is an identifier node for the subroutine name.
679 SIZE is the number of bytes of arguments passed on the stack. */
681 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
683 /* Define how to find the value returned by a function.
684 VALTYPE is the data type of the value (as a tree).
685 If the precise function being called is known, FUNC is its FUNCTION_DECL;
686 otherwise, FUNC is 0.
688 On Alpha the value is found in $0 for integer functions and
689 $f0 for floating-point functions. */
691 #define FUNCTION_VALUE(VALTYPE, FUNC) \
693 ((TREE_CODE (VALTYPE) == INTEGER_TYPE \
694 || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \
695 || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \
696 || TREE_CODE (VALTYPE) == CHAR_TYPE \
697 || TREE_CODE (VALTYPE) == POINTER_TYPE \
698 || TREE_CODE (VALTYPE) == OFFSET_TYPE) \
699 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
700 ? word_mode : TYPE_MODE (VALTYPE), \
701 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
703 /* Define how to find the value returned by a library function
704 assuming the value has mode MODE. */
706 #define LIBCALL_VALUE(MODE) \
707 gen_rtx (REG, MODE, \
708 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
710 /* The definition of this macro implies that there are cases where
711 a scalar value cannot be returned in registers.
713 For the Alpha, any structure or union type is returned in memory, as
714 are integers whose size is larger than 64 bits. */
716 #define RETURN_IN_MEMORY(TYPE) \
717 (TYPE_MODE (TYPE) == BLKmode \
718 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
720 /* 1 if N is a possible register number for a function value
721 as seen by the caller. */
723 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
725 /* 1 if N is a possible register number for function argument passing.
726 On Alpha, these are $16-$21 and $f16-$f21. */
728 #define FUNCTION_ARG_REGNO_P(N) \
729 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
731 /* Define a data type for recording info about an argument list
732 during the scan of that argument list. This data type should
733 hold all necessary information about the function itself
734 and about the args processed so far, enough to enable macros
735 such as FUNCTION_ARG to determine where the next arg should go.
737 On Alpha, this is a single integer, which is a number of words
738 of arguments scanned so far.
739 Thus 6 or more means all following args should go on the stack. */
741 #define CUMULATIVE_ARGS int
743 /* Initialize a variable CUM of type CUMULATIVE_ARGS
744 for a call to a function whose data type is FNTYPE.
745 For a library call, FNTYPE is 0. */
747 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
749 /* Define intermediate macro to compute the size (in registers) of an argument
752 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
754 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
755 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
757 /* Update the data in CUM to advance over an argument
758 of mode MODE and data type TYPE.
759 (TYPE is null for libcalls where that information may not be available.) */
761 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
762 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
765 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
767 /* Determine where to put an argument to a function.
768 Value is zero to push the argument on the stack,
769 or a hard register in which to store the argument.
771 MODE is the argument's machine mode.
772 TYPE is the data type of the argument (as a tree).
773 This is null for libcalls where that information may
775 CUM is a variable of type CUMULATIVE_ARGS which gives info about
776 the preceding args and about the function being called.
777 NAMED is nonzero if this argument is a named parameter
778 (otherwise it is an extra parameter matching an ellipsis).
780 On Alpha the first 6 words of args are normally in registers
781 and the rest are pushed. */
783 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
784 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
785 ? gen_rtx(REG, (MODE), \
786 (CUM) + 16 + ((TARGET_FPREGS \
787 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
788 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
792 /* Specify the padding direction of arguments.
794 On the Alpha, we must pad upwards in order to be able to pass args in
797 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
799 /* For an arg passed partly in registers and partly in memory,
800 this is the number of registers used.
801 For args passed entirely in registers or entirely in memory, zero. */
803 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
804 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
807 /* Perform any needed actions needed for a function that is receiving a
808 variable number of arguments.
812 MODE and TYPE are the mode and type of the current parameter.
814 PRETEND_SIZE is a variable that should be set to the amount of stack
815 that must be pushed by the prolog to pretend that our caller pushed
818 Normally, this macro will push all remaining incoming registers on the
819 stack and set PRETEND_SIZE to the length of the registers pushed.
821 On the Alpha, we allocate space for all 12 arg registers, but only
822 push those that are remaining.
824 However, if NO registers need to be saved, don't allocate any space.
825 This is not only because we won't need the space, but because AP includes
826 the current_pretend_args_size and we don't want to mess up any
827 ap-relative addresses already made.
829 If we are not to use the floating-point registers, save the integer
830 registers where we would put the floating-point registers. This is
831 not the most efficient way to implement varargs with just one register
832 class, but it isn't worth doing anything more efficient in this rare
836 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
841 move_block_from_reg \
843 gen_rtx (MEM, BLKmode, \
844 plus_constant (virtual_incoming_args_rtx, \
845 ((CUM) + 6)* UNITS_PER_WORD)), \
846 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
847 move_block_from_reg \
848 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
849 gen_rtx (MEM, BLKmode, \
850 plus_constant (virtual_incoming_args_rtx, \
851 (CUM) * UNITS_PER_WORD)), \
852 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
854 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
858 /* Generate necessary RTL for __builtin_saveregs().
859 ARGLIST is the argument list; see expr.c. */
860 extern struct rtx_def
*alpha_builtin_saveregs ();
861 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
863 /* Define the information needed to generate branch and scc insns. This is
864 stored from the compare operation. Note that we can't use "rtx" here
865 since it hasn't been defined! */
867 extern struct rtx_def
*alpha_compare_op0
, *alpha_compare_op1
;
868 extern int alpha_compare_fp_p
;
870 /* This macro produces the initial definition of a function name. On the
871 Alpha, we need to save the function name for the prologue and epilogue. */
873 extern char *alpha_function_name
;
875 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
877 alpha_function_name = NAME; \
880 /* This macro generates the assembly code for function entry.
881 FILE is a stdio stream to output the code to.
882 SIZE is an int: how many units of temporary storage to allocate.
883 Refer to the array `regs_ever_live' to determine which registers
884 to save; `regs_ever_live[I]' is nonzero if register number I
885 is ever used in the function. This macro is responsible for
886 knowing which registers should not be saved even if used. */
888 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
890 /* Output assembler code to FILE to increment profiler label # LABELNO
891 for profiling a function entry. */
893 #define FUNCTION_PROFILER(FILE, LABELNO)
895 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
896 the stack pointer does not matter. The value is tested only in
897 functions that have frame pointers.
898 No definition is equivalent to always zero. */
900 #define EXIT_IGNORE_STACK 1
902 /* This macro generates the assembly code for function exit,
903 on machines that need it. If FUNCTION_EPILOGUE is not defined
904 then individual return instructions are generated for each
905 return statement. Args are same as for FUNCTION_PROLOGUE.
907 The function epilogue should not depend on the current stack pointer!
908 It should use the frame pointer only. This is mandatory because
909 of alloca; we also take advantage of it to omit stack adjustments
912 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
915 /* Output assembler code for a block containing the constant parts
916 of a trampoline, leaving space for the variable parts.
918 The trampoline should set the static chain pointer to value placed
919 into the trampoline and should branch to the specified routine.
920 Note that $27 has been set to the address of the trampoline, so we can
921 use it for addressability of the two data items. Trampolines are always
922 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
924 #define TRAMPOLINE_TEMPLATE(FILE) \
926 fprintf (FILE, "\tldq $1,24($27)\n"); \
927 fprintf (FILE, "\tldq $27,16($27)\n"); \
928 fprintf (FILE, "\tjmp $31,($27),0\n"); \
929 fprintf (FILE, "\tnop\n"); \
930 fprintf (FILE, "\t.quad 0,0\n"); \
933 /* Section in which to place the trampoline. On Alpha, instructions
934 may only be placed in a text segment. */
936 #define TRAMPOLINE_SECTION text_section
938 /* Length in units of the trampoline for entering a nested function. */
940 #define TRAMPOLINE_SIZE 32
942 /* Emit RTL insns to initialize the variable parts of a trampoline.
943 FNADDR is an RTX for the address of the function's pure code.
944 CXT is an RTX for the static chain value for the function. We assume
945 here that a function will be called many more times than its address
946 is taken (e.g., it might be passed to qsort), so we take the trouble
947 to initialize the "hint" field in the JMP insn. Note that the hint
948 field is PC (new) + 4 * bits 13:0. */
950 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
952 rtx _temp, _temp1, _addr; \
954 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
955 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
956 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
957 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
959 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
960 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
962 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
963 build_int_2 (2, 0), NULL_RTX, 1); \
964 _temp = expand_and (gen_lowpart (SImode, _temp), \
965 GEN_INT (0x3fff), 0); \
967 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
968 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
969 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
970 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
973 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
975 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
976 "__enable_execute_stack"), \
977 0, VOIDmode, 1,_addr, Pmode); \
979 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
980 gen_rtvec (1, const0_rtx), 0)); \
983 /* Attempt to turn on access permissions for the stack. */
985 #define TRANSFER_FROM_TRAMPOLINE \
988 __enable_execute_stack (addr) \
991 long size = getpagesize (); \
992 long mask = ~(size-1); \
993 char *page = (char *) (((long) addr) & mask); \
994 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
996 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
997 if (mprotect (page, end - page, 7) < 0) \
998 perror ("mprotect of trampoline code"); \
1001 /* Addressing modes, and classification of registers for them. */
1003 /* #define HAVE_POST_INCREMENT */
1004 /* #define HAVE_POST_DECREMENT */
1006 /* #define HAVE_PRE_DECREMENT */
1007 /* #define HAVE_PRE_INCREMENT */
1009 /* Macros to check register numbers against specific register classes. */
1011 /* These assume that REGNO is a hard or pseudo reg number.
1012 They give nonzero only if REGNO is a hard reg of the suitable class
1013 or a pseudo reg currently allocated to a suitable hard reg.
1014 Since they use reg_renumber, they are safe only once reg_renumber
1015 has been allocated, which happens in local-alloc.c. */
1017 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1018 #define REGNO_OK_FOR_BASE_P(REGNO) \
1019 (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1021 /* Maximum number of registers that can appear in a valid memory address. */
1022 #define MAX_REGS_PER_ADDRESS 1
1024 /* Recognize any constant value that is a valid address. For the Alpha,
1025 there are only constants none since we want to use LDA to load any
1026 symbolic addresses into registers. */
1028 #define CONSTANT_ADDRESS_P(X) \
1029 (GET_CODE (X) == CONST_INT \
1030 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1032 /* Include all constant integers and constant doubles, but not
1033 floating-point, except for floating-point zero. */
1035 #define LEGITIMATE_CONSTANT_P(X) \
1036 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1037 || (X) == CONST0_RTX (GET_MODE (X)))
1039 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1040 and check its validity for a certain class.
1041 We have two alternate definitions for each of them.
1042 The usual definition accepts all pseudo regs; the other rejects
1043 them unless they have been allocated suitable hard regs.
1044 The symbol REG_OK_STRICT causes the latter definition to be used.
1046 Most source files want to accept pseudo regs in the hope that
1047 they will get allocated to the class that the insn wants them to be in.
1048 Source files for reload pass need to be strict.
1049 After reload, it makes no difference, since pseudo regs have
1050 been eliminated by then. */
1052 #ifndef REG_OK_STRICT
1054 /* Nonzero if X is a hard reg that can be used as an index
1055 or if it is a pseudo reg. */
1056 #define REG_OK_FOR_INDEX_P(X) 0
1057 /* Nonzero if X is a hard reg that can be used as a base reg
1058 or if it is a pseudo reg. */
1059 #define REG_OK_FOR_BASE_P(X) \
1060 (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1064 /* Nonzero if X is a hard reg that can be used as an index. */
1065 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1066 /* Nonzero if X is a hard reg that can be used as a base reg. */
1067 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1071 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1072 that is a valid memory address for an instruction.
1073 The MODE argument is the machine mode for the MEM expression
1074 that wants to use this address.
1076 For Alpha, we have either a constant address or the sum of a register
1077 and a constant address, or just a register. For DImode, any of those
1078 forms can be surrounded with an AND that clear the low-order three bits;
1079 this is an "unaligned" access.
1081 We also allow a SYMBOL_REF that is the name of the current function as
1082 valid address. This is for CALL_INSNs. It cannot be used in any other
1085 First define the basic valid address. */
1087 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1088 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1090 if (CONSTANT_ADDRESS_P (X)) \
1092 if (GET_CODE (X) == PLUS \
1093 && REG_P (XEXP (X, 0)) \
1094 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1095 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1099 /* Now accept the simple address, or, for DImode only, an AND of a simple
1100 address that turns off the low three bits. */
1102 extern char *current_function_name
;
1104 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1105 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1106 if ((MODE) == DImode \
1107 && GET_CODE (X) == AND \
1108 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1109 && INTVAL (XEXP (X, 1)) == -8) \
1110 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1111 if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1112 && ! strcmp (XSTR (X, 0), current_function_name)) \
1116 /* Try machine-dependent ways of modifying an illegitimate address
1117 to be legitimate. If we find one, return the new, valid address.
1118 This macro is used in only one place: `memory_address' in explow.c.
1120 OLDX is the address as it was before break_out_memory_refs was called.
1121 In some cases it is useful to look at this to decide what needs to be done.
1123 MODE and WIN are passed so that this macro can use
1124 GO_IF_LEGITIMATE_ADDRESS.
1126 It is always safe for this macro to do nothing. It exists to recognize
1127 opportunities to optimize the output.
1129 For the Alpha, there are three cases we handle:
1131 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1132 valid offset, compute the high part of the constant and add it to the
1133 register. Then our address is (plus temp low-part-const).
1134 (2) If the address is (const (plus FOO const_int)), find the low-order
1135 part of the CONST_INT. Then load FOO plus any high-order part of the
1136 CONST_INT into a register. Our address is (plus reg low-part-const).
1137 This is done to reduce the number of GOT entries.
1138 (3) If we have a (plus reg const), emit the load as in (2), then add
1139 the two registers, and finally generate (plus reg low-part-const) as
1142 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1143 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1144 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1145 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1147 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1148 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1149 HOST_WIDE_INT highpart = val - lowpart; \
1150 rtx high = GEN_INT (highpart); \
1151 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1152 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1154 (X) = plus_constant (temp, lowpart); \
1157 else if (GET_CODE (X) == CONST \
1158 && GET_CODE (XEXP (X, 0)) == PLUS \
1159 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1161 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1162 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1163 HOST_WIDE_INT highpart = val - lowpart; \
1164 rtx high = XEXP (XEXP (X, 0), 0); \
1167 high = plus_constant (high, highpart); \
1169 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1172 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1173 && GET_CODE (XEXP (X, 1)) == CONST \
1174 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1175 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1177 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1178 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1179 HOST_WIDE_INT highpart = val - lowpart; \
1180 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1183 high = plus_constant (high, highpart); \
1185 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1186 force_reg (Pmode, high), \
1187 high, 1, OPTAB_LIB_WIDEN); \
1188 (X) = plus_constant (high, lowpart); \
1193 /* Go to LABEL if ADDR (a legitimate address expression)
1194 has an effect that depends on the machine mode it is used for.
1195 On the Alpha this is true only for the unaligned modes. We can
1196 simplify this test since we know that the address must be valid. */
1198 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1199 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1201 /* Compute the cost of an address. For the Alpha, all valid addresses are
1204 #define ADDRESS_COST(X) 0
1206 /* Define this if some processing needs to be done immediately before
1207 emitting code for an insn. */
1209 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1211 /* Specify the machine mode that this machine uses
1212 for the index in the tablejump instruction. */
1213 #define CASE_VECTOR_MODE SImode
1215 /* Define this if the tablejump instruction expects the table
1216 to contain offsets from the address of the table.
1217 Do not define this if the table should contain absolute addresses. */
1218 /* #define CASE_VECTOR_PC_RELATIVE */
1220 /* Specify the tree operation to be used to convert reals to integers. */
1221 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1223 /* This is the kind of divide that is easiest to do in the general case. */
1224 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1226 /* Define this as 1 if `char' should by default be signed; else as 0. */
1227 #define DEFAULT_SIGNED_CHAR 1
1229 /* This flag, if defined, says the same insns that convert to a signed fixnum
1230 also convert validly to an unsigned one.
1232 We actually lie a bit here as overflow conditions are different. But
1233 they aren't being checked anyway. */
1235 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1237 /* Max number of bytes we can move to or from memory
1238 in one reasonably fast instruction. */
1242 /* Largest number of bytes of an object that can be placed in a register.
1243 On the Alpha we have plenty of registers, so use TImode. */
1244 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1246 /* Nonzero if access to memory by bytes is no faster than for words.
1247 Also non-zero if doing byte operations (specifically shifts) in registers
1250 On the Alpha, we want to not use the byte operation and instead use
1251 masking operations to access fields; these will save instructions. */
1253 #define SLOW_BYTE_ACCESS 1
1255 /* Define if operations between registers always perform the operation
1256 on the full register even if a narrower mode is specified. */
1257 #define WORD_REGISTER_OPERATIONS
1259 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1260 will either zero-extend or sign-extend. The value of this macro should
1261 be the code that says which one of the two operations is implicitly
1262 done, NIL if none. */
1263 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1265 /* Define if loading short immediate values into registers sign extends. */
1266 #define SHORT_IMMEDIATES_SIGN_EXTEND
1268 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1269 is done just by pretending it is already truncated. */
1270 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1272 /* We assume that the store-condition-codes instructions store 0 for false
1273 and some other value for true. This is the value stored for true. */
1275 #define STORE_FLAG_VALUE 1
1277 /* Define the value returned by a floating-point comparison instruction. */
1279 #define FLOAT_STORE_FLAG_VALUE 0.5
1281 /* Specify the machine mode that pointers have.
1282 After generation of rtl, the compiler makes no further distinction
1283 between pointers and any other objects of this machine mode. */
1284 #define Pmode DImode
1286 /* Mode of a function address in a call instruction (for indexing purposes). */
1288 #define FUNCTION_MODE Pmode
1290 /* Define this if addresses of constant functions
1291 shouldn't be put through pseudo regs where they can be cse'd.
1292 Desirable on machines where ordinary constants are expensive
1293 but a CALL with constant address is cheap.
1295 We define this on the Alpha so that gen_call and gen_call_value
1296 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1297 then copy it into a register, thus actually letting the address be
1300 #define NO_FUNCTION_CSE
1302 /* Define this to be nonzero if shift instructions ignore all but the low-order
1304 #define SHIFT_COUNT_TRUNCATED 1
1306 /* Use atexit for static constructors/destructors, instead of defining
1307 our own exit function. */
1310 /* Compute the cost of computing a constant rtl expression RTX
1311 whose rtx-code is CODE. The body of this macro is a portion
1312 of a switch statement. If the code is computed here,
1313 return it with a return statement. Otherwise, break from the switch.
1315 We only care about the cost if it is valid in an insn, so all constants
1318 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1320 case CONST_DOUBLE: \
1327 /* Provide the costs of a rtl expression. This is in the body of a
1330 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1333 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1334 return COSTS_N_INSNS (6); \
1335 else if (GET_CODE (XEXP (X, 0)) == MULT \
1336 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1337 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1338 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1341 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1342 return COSTS_N_INSNS (6); \
1343 return COSTS_N_INSNS (23); \
1345 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1346 && INTVAL (XEXP (X, 1)) <= 3) \
1348 /* ... fall through ... */ \
1349 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1350 return COSTS_N_INSNS (2); \
1355 if (GET_MODE (X) == SFmode) \
1356 return COSTS_N_INSNS (34); \
1357 else if (GET_MODE (X) == DFmode) \
1358 return COSTS_N_INSNS (63); \
1360 return COSTS_N_INSNS (70); \
1362 return COSTS_N_INSNS (3);
1364 /* Control the assembler format that we output. */
1366 /* Output at beginning of assembler file. */
1368 #define ASM_FILE_START(FILE) \
1370 alpha_write_verstamp (FILE); \
1371 fprintf (FILE, "\t.set noreorder\n"); \
1372 fprintf (FILE, "\t.set noat\n"); \
1373 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1376 /* Output to assembler file text saying following lines
1377 may contain character constants, extra white space, comments, etc. */
1379 #define ASM_APP_ON ""
1381 /* Output to assembler file text saying following lines
1382 no longer contain unusual constructs. */
1384 #define ASM_APP_OFF ""
1386 #define TEXT_SECTION_ASM_OP ".text"
1388 /* Output before read-only data. */
1390 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1392 /* Output before writable data. */
1394 #define DATA_SECTION_ASM_OP ".data"
1396 /* Define an extra section for read-only data, a routine to enter it, and
1397 indicate that it is for read-only data. */
1399 #define EXTRA_SECTIONS readonly_data
1401 #define EXTRA_SECTION_FUNCTIONS \
1403 literal_section () \
1405 if (in_section != readonly_data) \
1407 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1408 in_section = readonly_data; \
1412 #define READONLY_DATA_SECTION literal_section
1414 /* If we are referencing a function that is static or is known to be
1415 in this file, make the SYMBOL_REF special. We can use this to see
1416 indicate that we can branch to this function without setting PV or
1419 #define ENCODE_SECTION_INFO(DECL) \
1420 if (TREE_CODE (DECL) == FUNCTION_DECL \
1421 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1422 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1424 /* How to refer to registers in assembler output.
1425 This sequence is indexed by compiler's hard-register-number (see above). */
1427 #define REGISTER_NAMES \
1428 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1429 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1430 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1431 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1432 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1433 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1434 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1435 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"}
1437 /* How to renumber registers for dbx and gdb. */
1439 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1441 /* This is how to output the definition of a user-level label named NAME,
1442 such as the label on a static function or variable NAME. */
1444 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1445 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1447 /* This is how to output a command to make the user-level label named NAME
1448 defined for reference from other files. */
1450 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1451 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1453 /* This is how to output a reference to a user-level label named NAME.
1454 `assemble_name' uses this. */
1456 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1457 fprintf (FILE, "%s", NAME)
1459 /* This is how to output an internal numbered label where
1460 PREFIX is the class of label and NUM is the number within the class. */
1462 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1463 if ((PREFIX)[0] == 'L') \
1464 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1466 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1468 /* This is how to output a label for a jump table. Arguments are the same as
1469 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1472 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1473 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1475 /* This is how to store into the string LABEL
1476 the symbol_ref name of an internal numbered label where
1477 PREFIX is the class of label and NUM is the number within the class.
1478 This is suitable for output with `assemble_name'. */
1480 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1481 if ((PREFIX)[0] == 'L') \
1482 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1484 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1486 /* This is how to output an assembler line defining a `double' constant. */
1488 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1490 if (REAL_VALUE_ISINF (VALUE) \
1491 || REAL_VALUE_ISNAN (VALUE) \
1492 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1495 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1496 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1497 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1502 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1503 fprintf (FILE, "\t.t_floating %s\n", str); \
1507 /* This is how to output an assembler line defining a `float' constant. */
1509 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1511 if (REAL_VALUE_ISINF (VALUE) \
1512 || REAL_VALUE_ISNAN (VALUE) \
1513 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1516 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1517 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1522 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1523 fprintf (FILE, "\t.s_floating %s\n", str); \
1527 /* This is how to output an assembler line defining an `int' constant. */
1529 #define ASM_OUTPUT_INT(FILE,VALUE) \
1530 fprintf (FILE, "\t.long %d\n", \
1531 (GET_CODE (VALUE) == CONST_INT \
1532 ? INTVAL (VALUE) & 0xffffffff : (abort (), 0)))
1534 /* This is how to output an assembler line defining a `long' constant. */
1536 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1537 ( fprintf (FILE, "\t.quad "), \
1538 output_addr_const (FILE, (VALUE)), \
1539 fprintf (FILE, "\n"))
1541 /* Likewise for `char' and `short' constants. */
1543 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1544 fprintf (FILE, "\t.word %d\n", \
1545 (GET_CODE (VALUE) == CONST_INT \
1546 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1548 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1549 fprintf (FILE, "\t.byte %d\n", \
1550 (GET_CODE (VALUE) == CONST_INT \
1551 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1553 /* We use the default ASCII-output routine, except that we don't write more
1554 than 50 characters since the assembler doesn't support very long lines. */
1556 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1558 FILE *_hide_asm_out_file = (MYFILE); \
1559 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1560 int _hide_thissize = (MYLENGTH); \
1561 int _size_so_far = 0; \
1563 FILE *asm_out_file = _hide_asm_out_file; \
1564 unsigned char *p = _hide_p; \
1565 int thissize = _hide_thissize; \
1567 fprintf (asm_out_file, "\t.ascii \""); \
1569 for (i = 0; i < thissize; i++) \
1571 register int c = p[i]; \
1573 if (_size_so_far ++ > 50 && i < thissize - 4) \
1574 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1576 if (c == '\"' || c == '\\') \
1577 putc ('\\', asm_out_file); \
1578 if (c >= ' ' && c < 0177) \
1579 putc (c, asm_out_file); \
1582 fprintf (asm_out_file, "\\%o", c); \
1583 /* After an octal-escape, if a digit follows, \
1584 terminate one string constant and start another. \
1585 The Vax assembler fails to stop reading the escape \
1586 after three digits, so this is the only way we \
1587 can get it to parse the data properly. */ \
1588 if (i < thissize - 1 \
1589 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1590 fprintf (asm_out_file, "\"\n\t.ascii \""); \
1593 fprintf (asm_out_file, "\"\n"); \
1597 /* This is how to output an insn to push a register on the stack.
1598 It need not be very fast code. */
1600 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1601 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1602 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1605 /* This is how to output an insn to pop a register from the stack.
1606 It need not be very fast code. */
1608 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1609 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1610 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1613 /* This is how to output an assembler line for a numeric constant byte. */
1615 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1616 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1618 /* This is how to output an element of a case-vector that is absolute. */
1620 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1621 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1623 /* This is how to output an element of a case-vector that is relative.
1624 (Alpha does not use such vectors, but we must define this macro anyway.) */
1626 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1628 /* This is how to output an assembler line
1629 that says to advance the location counter
1630 to a multiple of 2**LOG bytes. */
1632 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1634 fprintf (FILE, "\t.align %d\n", LOG);
1636 /* This is how to advance the location counter by SIZE bytes. */
1638 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1639 fprintf (FILE, "\t.space %d\n", (SIZE))
1641 /* This says how to output an assembler line
1642 to define a global common symbol. */
1644 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1645 ( fputs ("\t.comm ", (FILE)), \
1646 assemble_name ((FILE), (NAME)), \
1647 fprintf ((FILE), ",%d\n", (SIZE)))
1649 /* This says how to output an assembler line
1650 to define a local common symbol. */
1652 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1653 ( fputs ("\t.lcomm ", (FILE)), \
1654 assemble_name ((FILE), (NAME)), \
1655 fprintf ((FILE), ",%d\n", (SIZE)))
1657 /* Store in OUTPUT a string (made with alloca) containing
1658 an assembler-name for a local static variable named NAME.
1659 LABELNO is an integer which is different for each call. */
1661 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1662 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1663 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1665 /* Define the parentheses used to group arithmetic operations
1666 in assembler code. */
1668 #define ASM_OPEN_PAREN "("
1669 #define ASM_CLOSE_PAREN ")"
1671 /* Define results of standard character escape sequences. */
1672 #define TARGET_BELL 007
1673 #define TARGET_BS 010
1674 #define TARGET_TAB 011
1675 #define TARGET_NEWLINE 012
1676 #define TARGET_VT 013
1677 #define TARGET_FF 014
1678 #define TARGET_CR 015
1680 /* Print operand X (an rtx) in assembler syntax to file FILE.
1681 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1682 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1684 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1686 /* Determine which codes are valid without a following integer. These must
1687 not be alphabetic. */
1689 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1691 /* Print a memory address as an operand to reference that memory location. */
1693 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1694 { rtx addr = (ADDR); \
1696 HOST_WIDE_INT offset = 0; \
1698 if (GET_CODE (addr) == AND) \
1699 addr = XEXP (addr, 0); \
1701 if (GET_CODE (addr) == REG) \
1702 basereg = REGNO (addr); \
1703 else if (GET_CODE (addr) == CONST_INT) \
1704 offset = INTVAL (addr); \
1705 else if (GET_CODE (addr) == PLUS \
1706 && GET_CODE (XEXP (addr, 0)) == REG \
1707 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1708 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1712 fprintf (FILE, "%d($%d)", offset, basereg); \
1714 /* Define the codes that are matched by predicates in alpha.c. */
1716 #define PREDICATE_CODES \
1717 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1718 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1719 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1720 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1721 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1722 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1723 {"const48_operand", {CONST_INT}}, \
1724 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1725 {"ior_operand", {SUBREG, REG, CONST_INT}}, \
1726 {"mode_mask_operand", {CONST_INT}}, \
1727 {"mul8_operand", {CONST_INT}}, \
1728 {"mode_width_operand", {CONST_INT}}, \
1729 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1730 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1731 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1732 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1733 {"fp0_operand", {CONST_DOUBLE}}, \
1734 {"current_file_function_operand", {SYMBOL_REF}}, \
1735 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1736 SYMBOL_REF, CONST, LABEL_REF}}, \
1737 {"aligned_memory_operand", {MEM}}, \
1738 {"unaligned_memory_operand", {MEM}}, \
1739 {"any_memory_operand", {MEM}},
1741 /* Tell collect that the object format is ECOFF. */
1742 #define OBJECT_FORMAT_COFF
1743 #define EXTENDED_COFF
1745 /* If we use NM, pass -g to it so it only lists globals. */
1746 #define NM_FLAGS "-pg"
1748 /* Definitions for debugging. */
1750 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1751 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1752 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1754 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1755 #define PREFERRED_DEBUGGING_TYPE ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1759 /* Correct the offset of automatic variables and arguments. Note that
1760 the Alpha debug format wants all automatic variables and arguments
1761 to be in terms of two different offsets from the virtual frame pointer,
1762 which is the stack pointer before any adjustment in the function.
1763 The offset for the argument pointer is fixed for the native compiler,
1764 it is either zero (for the no arguments case) or large enough to hold
1765 all argument registers.
1766 The offset for the auto pointer is the fourth argument to the .frame
1767 directive (local_offset).
1768 To stay compatible with the native tools we use the same offsets
1769 from the virtual frame pointer and adjust the debugger arg/auto offsets
1770 accordingly. These debugger offsets are set up in output_prolog. */
1772 long alpha_arg_offset
;
1773 long alpha_auto_offset
;
1774 #define DEBUGGER_AUTO_OFFSET(X) \
1775 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1776 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1779 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1780 alpha_output_lineno (STREAM, LINE)
1781 extern void alpha_output_lineno ();
1783 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1784 alpha_output_filename (STREAM, NAME)
1785 extern void alpha_output_filename ();
1788 /* mips-tfile.c limits us to strings of one page. */
1789 #define DBX_CONTIN_LENGTH 4000
1791 /* By default, turn on GDB extensions. */
1792 #define DEFAULT_GDB_EXTENSIONS 1
1794 /* If we are smuggling stabs through the ALPHA ECOFF object
1795 format, put a comment in front of the .stab<x> operation so
1796 that the ALPHA assembler does not choke. The mips-tfile program
1797 will correctly put the stab into the object file. */
1799 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1800 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1801 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1803 /* Forward references to tags are allowed. */
1804 #define SDB_ALLOW_FORWARD_REFERENCES
1806 /* Unknown tags are also allowed. */
1807 #define SDB_ALLOW_UNKNOWN_REFERENCES
1809 #define PUT_SDB_DEF(a) \
1811 fprintf (asm_out_file, "\t%s.def\t", \
1812 (TARGET_GAS) ? "" : "#"); \
1813 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1814 fputc (';', asm_out_file); \
1817 #define PUT_SDB_PLAIN_DEF(a) \
1819 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1820 (TARGET_GAS) ? "" : "#", (a)); \
1823 #define PUT_SDB_TYPE(a) \
1825 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1828 /* For block start and end, we create labels, so that
1829 later we can figure out where the correct offset is.
1830 The normal .ent/.end serve well enough for functions,
1831 so those are just commented out. */
1833 extern int sdb_label_count
; /* block start/end next label # */
1835 #define PUT_SDB_BLOCK_START(LINE) \
1837 fprintf (asm_out_file, \
1838 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1840 (TARGET_GAS) ? "" : "#", \
1843 sdb_label_count++; \
1846 #define PUT_SDB_BLOCK_END(LINE) \
1848 fprintf (asm_out_file, \
1849 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1851 (TARGET_GAS) ? "" : "#", \
1854 sdb_label_count++; \
1857 #define PUT_SDB_FUNCTION_START(LINE)
1859 #define PUT_SDB_FUNCTION_END(LINE)
1861 #define PUT_SDB_EPILOGUE_END(NAME)
1863 /* Specify to run a post-processor, mips-tfile after the assembler
1864 has run to stuff the ecoff debug information into the object file.
1865 This is needed because the Alpha assembler provides no way
1866 of specifying such information in the assembly file. */
1868 #if (TARGET_DEFAULT & MASK_GAS) != 0
1870 #define ASM_FINAL_SPEC "\
1871 %{malpha-as: %{!mno-mips-tfile: \
1872 \n mips-tfile %{v*: -v} \
1874 %{!K: %{save-temps: -I %b.o~}} \
1875 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1876 %{.s:%i} %{!.s:%g.s}}}"
1879 #define ASM_FINAL_SPEC "\
1880 %{!mgas: %{!mno-mips-tfile: \
1881 \n mips-tfile %{v*: -v} \
1883 %{!K: %{save-temps: -I %b.o~}} \
1884 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1885 %{.s:%i} %{!.s:%g.s}}}"
1889 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1890 mips-tdump.c to print them out.
1892 These must match the corresponding definitions in gdb/mipsread.c.
1893 Unfortunately, gcc and gdb do not currently share any directories. */
1895 #define CODE_MASK 0x8F300
1896 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1897 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1898 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1900 /* Override some mips-tfile definitions. */
1902 #define SHASH_SIZE 511
1903 #define THASH_SIZE 55
This page took 0.118018 seconds and 5 git commands to generate.