]>
gcc.gnu.org Git - gcc.git/blob - gcc/config/alpha/alpha.h
a7d339b119cfca96762d67073336c9eb073aaf9b
1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "\
25 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
26 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
28 /* Write out the correct language type definition for the header files.
29 Unless we have assembler language, write out the symbols for C. */
31 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
34 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
38 /* Set the spec to use for signed char. The default tests the above macro
39 but DEC's compiler can't handle the conditional in a "constant"
42 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
44 /* No point in running CPP on our assembler output. */
45 #define ASM_SPEC "-nocpp"
47 /* Under OSF/1, -p and -pg require -lprof1. */
49 #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} %{a:-lprof2} -lc"
51 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are
52 optimizing, -O1 if we are not. Pass -shared, -non_shared or
53 -call_shared as appropriate. Also pass -pg. */
55 "-G 8 %{O*:-O3} %{!O*:-O1} %{!shared:-init __main} %{static:-non_shared} \
56 %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg}"
58 #define STARTFILE_SPEC \
59 "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}"
61 /* Print subsidiary information on the compiler version in use. */
62 #define TARGET_VERSION
64 /* Define the location for the startup file on OSF/1 for Alpha. */
66 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
68 /* Run-time compilation parameters selecting different hardware subsets. */
70 extern int target_flags
;
72 /* This means that floating-point support exists in the target implementation
73 of the Alpha architecture. This is usually the default. */
75 #define TARGET_FP (target_flags & 1)
77 /* This means that floating-point registers are allowed to be used. Note
78 that Alpha implementations without FP operations are required to
79 provide the FP registers. */
81 #define TARGET_FPREGS (target_flags & 2)
83 /* This means that gas is used to process the assembler file. */
86 #define TARGET_GAS (target_flags & MASK_GAS)
88 /* Macro to define tables used to set the flags.
89 This is a list in braces of pairs in braces,
90 each pair being { "NAME", VALUE }
91 where VALUE is the bits to set or minus the bits to clear.
92 An empty string NAME is used to identify the default VALUE. */
94 #define TARGET_SWITCHES \
95 { {"no-soft-float", 1}, \
99 {"alpha-as", -MASK_GAS}, \
101 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} }
103 #define TARGET_DEFAULT 3
105 #ifndef TARGET_CPU_DEFAULT
106 #define TARGET_CPU_DEFAULT 0
109 /* Define this macro to change register usage conditional on target flags.
111 On the Alpha, we use this to disable the floating-point registers when
114 #define CONDITIONAL_REGISTER_USAGE \
115 if (! TARGET_FPREGS) \
116 for (i = 32; i < 63; i++) \
117 fixed_regs[i] = call_used_regs[i] = 1;
119 /* Show we can debug even without a frame pointer. */
120 #define CAN_DEBUG_WITHOUT_FP
122 /* target machine storage layout */
124 /* Define to enable software floating point emulation. */
125 #define REAL_ARITHMETIC
127 /* Define the size of `int'. The default is the same as the word size. */
128 #define INT_TYPE_SIZE 32
130 /* Define the size of `long long'. The default is the twice the word size. */
131 #define LONG_LONG_TYPE_SIZE 64
133 /* The two floating-point formats we support are S-floating, which is
134 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
135 and `long double' are T. */
137 #define FLOAT_TYPE_SIZE 32
138 #define DOUBLE_TYPE_SIZE 64
139 #define LONG_DOUBLE_TYPE_SIZE 64
141 #define WCHAR_TYPE "short unsigned int"
142 #define WCHAR_TYPE_SIZE 16
144 /* Define this macro if it is advisable to hold scalars in registers
145 in a wider mode than that declared by the program. In such cases,
146 the value is constrained to be within the bounds of the declared
147 type, but kept valid in the wider mode. The signedness of the
148 extension may differ from that of the type.
150 For Alpha, we always store objects in a full register. 32-bit objects
151 are always sign-extended, but smaller objects retain their signedness. */
153 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
154 if (GET_MODE_CLASS (MODE) == MODE_INT \
155 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
157 if ((MODE) == SImode) \
162 /* Define this if function arguments should also be promoted using the above
165 #define PROMOTE_FUNCTION_ARGS
167 /* Likewise, if the function return value is promoted. */
169 #define PROMOTE_FUNCTION_RETURN
171 /* Define this if most significant bit is lowest numbered
172 in instructions that operate on numbered bit-fields.
174 There are no such instructions on the Alpha, but the documentation
176 #define BITS_BIG_ENDIAN 0
178 /* Define this if most significant byte of a word is the lowest numbered.
179 This is false on the Alpha. */
180 #define BYTES_BIG_ENDIAN 0
182 /* Define this if most significant word of a multiword number is lowest
185 For Alpha we can decide arbitrarily since there are no machine instructions
186 for them. Might as well be consistent with bytes. */
187 #define WORDS_BIG_ENDIAN 0
189 /* number of bits in an addressable storage unit */
190 #define BITS_PER_UNIT 8
192 /* Width in bits of a "word", which is the contents of a machine register.
193 Note that this is not necessarily the width of data type `int';
194 if using 16-bit ints on a 68000, this would still be 32.
195 But on a machine with 16-bit registers, this would be 16. */
196 #define BITS_PER_WORD 64
198 /* Width of a word, in units (bytes). */
199 #define UNITS_PER_WORD 8
201 /* Width in bits of a pointer.
202 See also the macro `Pmode' defined below. */
203 #define POINTER_SIZE 64
205 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
206 #define PARM_BOUNDARY 64
208 /* Boundary (in *bits*) on which stack pointer should be aligned. */
209 #define STACK_BOUNDARY 64
211 /* Allocation boundary (in *bits*) for the code of a function. */
212 #define FUNCTION_BOUNDARY 64
214 /* Alignment of field after `int : 0' in a structure. */
215 #define EMPTY_FIELD_BOUNDARY 64
217 /* Every structure's size must be a multiple of this. */
218 #define STRUCTURE_SIZE_BOUNDARY 8
220 /* A bitfield declared as `int' forces `int' alignment for the struct. */
221 #define PCC_BITFIELD_TYPE_MATTERS 1
223 /* Align loop starts for optimal branching.
225 ??? Kludge this and the next macro for the moment by not doing anything if
226 we don't optimize and also if we are writing ECOFF symbols to work around
227 a bug in DEC's assembler. */
229 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
230 if (optimize > 0 && write_symbols != SDB_DEBUG) \
231 ASM_OUTPUT_ALIGN (FILE, 5)
233 /* This is how to align an instruction for optimal branching.
234 On Alpha we'll get better performance by aligning on a quadword
237 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
238 if (optimize > 0 && write_symbols != SDB_DEBUG) \
239 ASM_OUTPUT_ALIGN ((FILE), 4)
241 /* No data type wants to be aligned rounder than this. */
242 #define BIGGEST_ALIGNMENT 64
244 /* Make strings word-aligned so strcpy from constants will be faster. */
245 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
246 (TREE_CODE (EXP) == STRING_CST \
247 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
249 /* Make arrays of chars word-aligned for the same reasons. */
250 #define DATA_ALIGNMENT(TYPE, ALIGN) \
251 (TREE_CODE (TYPE) == ARRAY_TYPE \
252 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
253 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
255 /* Set this non-zero if move instructions will actually fail to work
256 when given unaligned data.
258 Since we get an error message when we do one, call them invalid. */
260 #define STRICT_ALIGNMENT 1
262 /* Set this non-zero if unaligned move instructions are extremely slow.
264 On the Alpha, they trap. */
266 #define SLOW_UNALIGNED_ACCESS 1
268 /* Standard register usage. */
270 /* Number of actual hardware registers.
271 The hardware registers are assigned numbers for the compiler
272 from 0 to just below FIRST_PSEUDO_REGISTER.
273 All registers that the compiler knows about must be given numbers,
274 even those that are not normally considered general registers.
276 We define all 32 integer registers, even though $31 is always zero,
277 and all 32 floating-point registers, even though $f31 is also
278 always zero. We do not bother defining the FP status register and
279 there are no other registers.
281 Since $31 is always zero, we will use register number 31 as the
282 argument pointer. It will never appear in the generated code
283 because we will always be eliminating it in favor of the stack
284 pointer or hardware frame pointer.
286 Likewise, we use $f31 for the frame pointer, which will always
287 be eliminated in favor of the hardware frame pointer or the
290 #define FIRST_PSEUDO_REGISTER 64
292 /* 1 for registers that have pervasive standard uses
293 and are not available for the register allocator. */
295 #define FIXED_REGISTERS \
296 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
297 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
298 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
299 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
301 /* 1 for registers not available across function calls.
302 These must include the FIXED_REGISTERS and also any
303 registers that can be used without being saved.
304 The latter must include the registers where values are returned
305 and the register where structure-value addresses are passed.
306 Aside from that, you can include as many other registers as you like. */
307 #define CALL_USED_REGISTERS \
308 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
309 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
310 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
311 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
313 /* List the order in which to allocate registers. Each register must be
314 listed once, even those in FIXED_REGISTERS.
316 We allocate in the following order:
317 $f1 (nonsaved floating-point register)
320 $f21-$f16 (likewise, but input args)
321 $f0 (nonsaved, but return value)
322 $f2-$f9 (saved floating-point registers)
323 $1-$8 (nonsaved integer registers)
326 $0 (likewise, but return value)
327 $21-$16 (likewise, but input args)
328 $27 (procedure value)
329 $9-$14 (saved integer registers)
333 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
335 #define REG_ALLOC_ORDER \
337 42, 43, 44, 45, 46, 47, \
338 54, 55, 56, 57, 58, 59, 60, 61, 62, \
339 53, 52, 51, 50, 49, 48, \
341 34, 35, 36, 37, 38, 39, 40, 41, \
342 1, 2, 3, 4, 5, 6, 7, 8, \
346 21, 20, 19, 18, 17, 16, \
348 9, 10, 11, 12, 13, 14, \
354 /* Return number of consecutive hard regs needed starting at reg REGNO
355 to hold something of mode MODE.
356 This is ordinarily the length in words of a value of mode MODE
357 but can be less for certain modes in special long registers. */
359 #define HARD_REGNO_NREGS(REGNO, MODE) \
360 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
362 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
363 On Alpha, the integer registers can hold any mode. The floating-point
364 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
365 or 8-bit values. If we only allowed the larger integers into FP registers,
366 we'd have to say that QImode and SImode aren't tiable, which is a
367 pain. So say all registers can hold everything and see how that works. */
369 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
371 /* Value is 1 if it is a good idea to tie two pseudo registers
372 when one has mode MODE1 and one has mode MODE2.
373 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
374 for any hard reg, then this must be 0 for correct output. */
376 #define MODES_TIEABLE_P(MODE1, MODE2) 1
378 /* Specify the registers used for certain standard purposes.
379 The values of these macros are register numbers. */
381 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
382 /* #define PC_REGNUM */
384 /* Register to use for pushing function arguments. */
385 #define STACK_POINTER_REGNUM 30
387 /* Base register for access to local variables of the function. */
388 #define HARD_FRAME_POINTER_REGNUM 15
390 /* Value should be nonzero if functions must have frame pointers.
391 Zero means the frame pointer need not be set up (and parms
392 may be accessed via the stack pointer) in functions that seem suitable.
393 This is computed in `reload', in reload1.c. */
394 #define FRAME_POINTER_REQUIRED 0
396 /* Base register for access to arguments of the function. */
397 #define ARG_POINTER_REGNUM 31
399 /* Base register for access to local variables of function. */
400 #define FRAME_POINTER_REGNUM 63
402 /* Register in which static-chain is passed to a function.
404 For the Alpha, this is based on an example; the calling sequence
405 doesn't seem to specify this. */
406 #define STATIC_CHAIN_REGNUM 1
408 /* Register in which address to store a structure value
409 arrives in the function. On the Alpha, the address is passed
410 as a hidden argument. */
411 #define STRUCT_VALUE 0
413 /* Define the classes of registers for register constraints in the
414 machine description. Also define ranges of constants.
416 One of the classes must always be named ALL_REGS and include all hard regs.
417 If there is more than one class, another class must be named NO_REGS
418 and contain no registers.
420 The name GENERAL_REGS must be the name of a class (or an alias for
421 another name such as ALL_REGS). This is the class of registers
422 that is allowed by "g" or "r" in a register constraint.
423 Also, registers outside this class are allocated only when
424 instructions express preferences for them.
426 The classes must be numbered in nondecreasing order; that is,
427 a larger-numbered class must never be contained completely
428 in a smaller-numbered class.
430 For any two classes, it is very desirable that there be another
431 class that represents their union. */
433 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
436 #define N_REG_CLASSES (int) LIM_REG_CLASSES
438 /* Give names of register classes as strings for dump file. */
440 #define REG_CLASS_NAMES \
441 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
443 /* Define which registers fit in which classes.
444 This is an initializer for a vector of HARD_REG_SET
445 of length N_REG_CLASSES. */
447 #define REG_CLASS_CONTENTS \
448 { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
450 /* The same information, inverted:
451 Return the class number of the smallest class containing
452 reg number REGNO. This could be a conditional expression
453 or could index an array. */
455 #define REGNO_REG_CLASS(REGNO) \
456 ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS)
458 /* The class value for index registers, and the one for base regs. */
459 #define INDEX_REG_CLASS NO_REGS
460 #define BASE_REG_CLASS GENERAL_REGS
462 /* Get reg_class from a letter such as appears in the machine description. */
464 #define REG_CLASS_FROM_LETTER(C) \
465 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
467 /* Define this macro to change register usage conditional on target flags. */
468 /* #define CONDITIONAL_REGISTER_USAGE */
470 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
471 can be used to stand for particular ranges of immediate operands.
472 This macro defines what the ranges are.
473 C is the letter, and VALUE is a constant value.
474 Return 1 if VALUE is in the range specified by C.
477 `I' is used for the range of constants most insns can contain.
478 `J' is the constant zero.
479 `K' is used for the constant in an LDA insn.
480 `L' is used for the constant in a LDAH insn.
481 `M' is used for the constants that can be AND'ed with using a ZAP insn.
482 `N' is used for complemented 8-bit constants.
483 `O' is used for negated 8-bit constants.
484 `P' is used for the constants 1, 2 and 3. */
486 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
487 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
488 : (C) == 'J' ? (VALUE) == 0 \
489 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
490 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
491 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \
492 : (C) == 'M' ? zap_mask (VALUE) \
493 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
494 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
495 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
498 /* Similar, but for floating or large integer constants, and defining letters
499 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
501 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
502 that is the operand of a ZAP insn. */
504 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
505 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
506 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
507 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
508 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
509 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
512 /* Optional extra constraints for this machine.
514 For the Alpha, `Q' means that this is a memory operand but not a
515 reference to an unaligned location.
516 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
519 #define EXTRA_CONSTRAINT(OP, C) \
520 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
521 : (C) == 'R' ? current_file_function_operand (OP, Pmode) \
524 /* Given an rtx X being reloaded into a reg required to be
525 in class CLASS, return the class of reg to actually use.
526 In general this is just CLASS; but on some machines
527 in some cases it is preferable to use a more restrictive class.
529 On the Alpha, all constants except zero go into a floating-point
530 register via memory. */
532 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
533 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
534 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
537 /* Loading and storing HImode or QImode values to and from memory
538 usually requires a scratch register. The exceptions are loading
539 QImode and HImode from an aligned address to a general register.
540 We also cannot load an unaligned address into an FP register. */
542 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
543 (((GET_CODE (IN) == MEM \
544 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
545 || (GET_CODE (IN) == SUBREG \
546 && (GET_CODE (SUBREG_REG (IN)) == MEM \
547 || (GET_CODE (SUBREG_REG (IN)) == REG \
548 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
549 && (((CLASS) == FLOAT_REGS \
550 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
551 || (((MODE) == QImode || (MODE) == HImode) \
552 && unaligned_memory_operand (IN, MODE)))) \
554 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
555 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
558 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
559 (((GET_CODE (OUT) == MEM \
560 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
561 || (GET_CODE (OUT) == SUBREG \
562 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
563 || (GET_CODE (SUBREG_REG (OUT)) == REG \
564 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
565 && (((MODE) == HImode || (MODE) == QImode \
566 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
568 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
569 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
572 /* If we are copying between general and FP registers, we need a memory
575 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
577 /* Specify the mode to be used for memory when a secondary memory
578 location is needed. If MODE is floating-point, use it. Otherwise,
579 widen to a word like the default. This is needed because we always
580 store integers in FP registers in quadword format. This whole
581 area is very tricky! */
582 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
583 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
584 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
586 /* Return the maximum number of consecutive registers
587 needed to represent mode MODE in a register of class CLASS. */
589 #define CLASS_MAX_NREGS(CLASS, MODE) \
590 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
592 /* If defined, gives a class of registers that cannot be used as the
593 operand of a SUBREG that changes the size of the object. */
595 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS
597 /* Define the cost of moving between registers of various classes. Moving
598 between FLOAT_REGS and anything else except float regs is expensive.
599 In fact, we make it quite expensive because we really don't want to
600 do these moves unless it is clearly worth it. Optimizations may
601 reduce the impact of not being able to allocate a pseudo to a
604 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
605 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
607 /* A C expressions returning the cost of moving data of MODE from a register to
610 On the Alpha, bump this up a bit. */
612 #define MEMORY_MOVE_COST(MODE) 6
614 /* Provide the cost of a branch. Exact meaning under development. */
615 #define BRANCH_COST 5
617 /* Adjust the cost of dependencies. */
619 #define ADJUST_COST(INSN,LINK,DEP,COST) \
620 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
622 /* Stack layout; function entry, exit and calling. */
624 /* Define this if pushing a word on the stack
625 makes the stack pointer a smaller address. */
626 #define STACK_GROWS_DOWNWARD
628 /* Define this if the nominal address of the stack frame
629 is at the high-address end of the local variables;
630 that is, each additional local variable allocated
631 goes at a more negative offset in the frame. */
632 /* #define FRAME_GROWS_DOWNWARD */
634 /* Offset within stack frame to start allocating local variables at.
635 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
636 first local allocated. Otherwise, it is the offset to the BEGINNING
637 of the first local allocated. */
639 #define STARTING_FRAME_OFFSET 0
641 /* If we generate an insn to push BYTES bytes,
642 this says how many the stack pointer really advances by.
643 On Alpha, don't define this because there are no push insns. */
644 /* #define PUSH_ROUNDING(BYTES) */
646 /* Define this if the maximum size of all the outgoing args is to be
647 accumulated and pushed during the prologue. The amount can be
648 found in the variable current_function_outgoing_args_size. */
649 #define ACCUMULATE_OUTGOING_ARGS
651 /* Offset of first parameter from the argument pointer register value. */
653 #define FIRST_PARM_OFFSET(FNDECL) 0
655 /* Definitions for register eliminations.
657 We have two registers that can be eliminated on the Alpha. First, the
658 frame pointer register can often be eliminated in favor of the stack
659 pointer register. Secondly, the argument pointer register can always be
660 eliminated; it is replaced with either the stack or frame pointer. */
662 /* This is an array of structures. Each structure initializes one pair
663 of eliminable registers. The "from" register number is given first,
664 followed by "to". Eliminations of the same "from" register are listed
665 in order of preference. */
667 #define ELIMINABLE_REGS \
668 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
669 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
670 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
671 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
673 /* Given FROM and TO register numbers, say whether this elimination is allowed.
674 Frame pointer elimination is automatically handled.
676 All eliminations are valid since the cases where FP can't be
677 eliminated are already handled. */
679 #define CAN_ELIMINATE(FROM, TO) 1
681 /* Round up to a multiple of 16 bytes. */
682 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
684 /* Define the offset between two registers, one to be eliminated, and the other
685 its replacement, at the start of a routine. */
686 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
687 { if ((FROM) == FRAME_POINTER_REGNUM) \
688 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
689 + alpha_sa_size ()); \
690 else if ((FROM) == ARG_POINTER_REGNUM) \
691 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
693 + (ALPHA_ROUND (get_frame_size () \
694 + current_function_pretend_args_size) \
695 - current_function_pretend_args_size)); \
698 /* Define this if stack space is still allocated for a parameter passed
700 /* #define REG_PARM_STACK_SPACE */
702 /* Value is the number of bytes of arguments automatically
703 popped when returning from a subroutine call.
704 FUNTYPE is the data type of the function (as a tree),
705 or for a library call it is an identifier node for the subroutine name.
706 SIZE is the number of bytes of arguments passed on the stack. */
708 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
710 /* Define how to find the value returned by a function.
711 VALTYPE is the data type of the value (as a tree).
712 If the precise function being called is known, FUNC is its FUNCTION_DECL;
713 otherwise, FUNC is 0.
715 On Alpha the value is found in $0 for integer functions and
716 $f0 for floating-point functions. */
718 #define FUNCTION_VALUE(VALTYPE, FUNC) \
720 (INTEGRAL_MODE_P (TYPE_MODE (VALTYPE)) \
721 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
722 ? word_mode : TYPE_MODE (VALTYPE), \
723 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
725 /* Define how to find the value returned by a library function
726 assuming the value has mode MODE. */
728 #define LIBCALL_VALUE(MODE) \
729 gen_rtx (REG, MODE, \
730 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
732 /* The definition of this macro implies that there are cases where
733 a scalar value cannot be returned in registers.
735 For the Alpha, any structure or union type is returned in memory, as
736 are integers whose size is larger than 64 bits. */
738 #define RETURN_IN_MEMORY(TYPE) \
739 (TYPE_MODE (TYPE) == BLKmode \
740 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
742 /* 1 if N is a possible register number for a function value
743 as seen by the caller. */
745 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
747 /* 1 if N is a possible register number for function argument passing.
748 On Alpha, these are $16-$21 and $f16-$f21. */
750 #define FUNCTION_ARG_REGNO_P(N) \
751 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
753 /* Define a data type for recording info about an argument list
754 during the scan of that argument list. This data type should
755 hold all necessary information about the function itself
756 and about the args processed so far, enough to enable macros
757 such as FUNCTION_ARG to determine where the next arg should go.
759 On Alpha, this is a single integer, which is a number of words
760 of arguments scanned so far.
761 Thus 6 or more means all following args should go on the stack. */
763 #define CUMULATIVE_ARGS int
765 /* Initialize a variable CUM of type CUMULATIVE_ARGS
766 for a call to a function whose data type is FNTYPE.
767 For a library call, FNTYPE is 0. */
769 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
771 /* Define intermediate macro to compute the size (in registers) of an argument
774 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
776 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
777 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
779 /* Update the data in CUM to advance over an argument
780 of mode MODE and data type TYPE.
781 (TYPE is null for libcalls where that information may not be available.) */
783 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
784 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
787 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
789 /* Determine where to put an argument to a function.
790 Value is zero to push the argument on the stack,
791 or a hard register in which to store the argument.
793 MODE is the argument's machine mode.
794 TYPE is the data type of the argument (as a tree).
795 This is null for libcalls where that information may
797 CUM is a variable of type CUMULATIVE_ARGS which gives info about
798 the preceding args and about the function being called.
799 NAMED is nonzero if this argument is a named parameter
800 (otherwise it is an extra parameter matching an ellipsis).
802 On Alpha the first 6 words of args are normally in registers
803 and the rest are pushed. */
805 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
806 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
807 ? gen_rtx(REG, (MODE), \
808 (CUM) + 16 + ((TARGET_FPREGS \
809 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
810 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
814 /* Specify the padding direction of arguments.
816 On the Alpha, we must pad upwards in order to be able to pass args in
819 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
821 /* For an arg passed partly in registers and partly in memory,
822 this is the number of registers used.
823 For args passed entirely in registers or entirely in memory, zero. */
825 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
826 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
829 /* Perform any needed actions needed for a function that is receiving a
830 variable number of arguments.
834 MODE and TYPE are the mode and type of the current parameter.
836 PRETEND_SIZE is a variable that should be set to the amount of stack
837 that must be pushed by the prolog to pretend that our caller pushed
840 Normally, this macro will push all remaining incoming registers on the
841 stack and set PRETEND_SIZE to the length of the registers pushed.
843 On the Alpha, we allocate space for all 12 arg registers, but only
844 push those that are remaining.
846 However, if NO registers need to be saved, don't allocate any space.
847 This is not only because we won't need the space, but because AP includes
848 the current_pretend_args_size and we don't want to mess up any
849 ap-relative addresses already made.
851 If we are not to use the floating-point registers, save the integer
852 registers where we would put the floating-point registers. This is
853 not the most efficient way to implement varargs with just one register
854 class, but it isn't worth doing anything more efficient in this rare
858 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
863 move_block_from_reg \
865 gen_rtx (MEM, BLKmode, \
866 plus_constant (virtual_incoming_args_rtx, \
867 ((CUM) + 6)* UNITS_PER_WORD)), \
868 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
869 move_block_from_reg \
870 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
871 gen_rtx (MEM, BLKmode, \
872 plus_constant (virtual_incoming_args_rtx, \
873 (CUM) * UNITS_PER_WORD)), \
874 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
876 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
880 /* Generate necessary RTL for __builtin_saveregs().
881 ARGLIST is the argument list; see expr.c. */
882 extern struct rtx_def
*alpha_builtin_saveregs ();
883 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
885 /* Define the information needed to generate branch and scc insns. This is
886 stored from the compare operation. Note that we can't use "rtx" here
887 since it hasn't been defined! */
889 extern struct rtx_def
*alpha_compare_op0
, *alpha_compare_op1
;
890 extern int alpha_compare_fp_p
;
892 /* This macro produces the initial definition of a function name. On the
893 Alpha, we need to save the function name for the prologue and epilogue. */
895 extern char *alpha_function_name
;
897 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
899 alpha_function_name = NAME; \
902 /* This macro generates the assembly code for function entry.
903 FILE is a stdio stream to output the code to.
904 SIZE is an int: how many units of temporary storage to allocate.
905 Refer to the array `regs_ever_live' to determine which registers
906 to save; `regs_ever_live[I]' is nonzero if register number I
907 is ever used in the function. This macro is responsible for
908 knowing which registers should not be saved even if used. */
910 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
912 /* Output assembler code to FILE to increment profiler label # LABELNO
913 for profiling a function entry. Profiling for gprof does not
914 require LABELNO so we don't reference it at all. This does,
915 however, mean that -p won't work. But OSF/1 doesn't support the
916 traditional prof anyways, so there is no good reason to be
917 backwards compatible. */
919 #define FUNCTION_PROFILER(FILE, LABELNO) \
921 fputs ("\tlda $28,_mcount\n", (FILE)); \
922 fputs ("\tjsr $28,($28),_mcount\n", (FILE)); \
923 fputs ("\tldgp $29,0($27)\n", (FILE)); \
927 /* Output assembler code to FILE to initialize this source file's
928 basic block profiling info, if that has not already been done.
929 This assumes that __bb_init_func doesn't garble a1-a5. */
931 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
933 ASM_OUTPUT_REG_PUSH (FILE, 16); \
934 fputs ("\tlda $16,$PBX32\n", (FILE)); \
935 fputs ("\tldq $26,0($16)\n", (FILE)); \
936 fputs ("\tbne $26,1f\n", (FILE)); \
937 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
938 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
939 fputs ("\tldgp $29,0($26)\n", (FILE)); \
940 fputs ("1:\n", (FILE)); \
941 ASM_OUTPUT_REG_POP (FILE, 16); \
944 /* Output assembler code to FILE to increment the entry-count for
945 the BLOCKNO'th basic block in this source file. */
947 #define BLOCK_PROFILER(FILE, BLOCKNO) \
949 int blockn = (BLOCKNO); \
950 fputs ("\tsubq $30,16,$30\n", (FILE)); \
951 fputs ("\tstq $26,0($30)\n", (FILE)); \
952 fputs ("\tstq $27,8($30)\n", (FILE)); \
953 fputs ("\tlda $26,$PBX34\n", (FILE)); \
954 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
955 fputs ("\taddq $27,1,$27\n", (FILE)); \
956 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
957 fputs ("\tldq $26,0($30)\n", (FILE)); \
958 fputs ("\tldq $27,8($30)\n", (FILE)); \
959 fputs ("\taddq $30,16,$30\n", (FILE)); \
963 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
964 the stack pointer does not matter. The value is tested only in
965 functions that have frame pointers.
966 No definition is equivalent to always zero. */
968 #define EXIT_IGNORE_STACK 1
970 /* This macro generates the assembly code for function exit,
971 on machines that need it. If FUNCTION_EPILOGUE is not defined
972 then individual return instructions are generated for each
973 return statement. Args are same as for FUNCTION_PROLOGUE.
975 The function epilogue should not depend on the current stack pointer!
976 It should use the frame pointer only. This is mandatory because
977 of alloca; we also take advantage of it to omit stack adjustments
980 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
983 /* Output assembler code for a block containing the constant parts
984 of a trampoline, leaving space for the variable parts.
986 The trampoline should set the static chain pointer to value placed
987 into the trampoline and should branch to the specified routine.
988 Note that $27 has been set to the address of the trampoline, so we can
989 use it for addressability of the two data items. Trampolines are always
990 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
992 #define TRAMPOLINE_TEMPLATE(FILE) \
994 fprintf (FILE, "\tldq $1,24($27)\n"); \
995 fprintf (FILE, "\tldq $27,16($27)\n"); \
996 fprintf (FILE, "\tjmp $31,($27),0\n"); \
997 fprintf (FILE, "\tnop\n"); \
998 fprintf (FILE, "\t.quad 0,0\n"); \
1001 /* Section in which to place the trampoline. On Alpha, instructions
1002 may only be placed in a text segment. */
1004 #define TRAMPOLINE_SECTION text_section
1006 /* Length in units of the trampoline for entering a nested function. */
1008 #define TRAMPOLINE_SIZE 32
1010 /* Emit RTL insns to initialize the variable parts of a trampoline.
1011 FNADDR is an RTX for the address of the function's pure code.
1012 CXT is an RTX for the static chain value for the function. We assume
1013 here that a function will be called many more times than its address
1014 is taken (e.g., it might be passed to qsort), so we take the trouble
1015 to initialize the "hint" field in the JMP insn. Note that the hint
1016 field is PC (new) + 4 * bits 13:0. */
1018 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1020 rtx _temp, _temp1, _addr; \
1022 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1023 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
1024 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1025 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
1027 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
1028 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
1030 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
1031 build_int_2 (2, 0), NULL_RTX, 1); \
1032 _temp = expand_and (gen_lowpart (SImode, _temp), \
1033 GEN_INT (0x3fff), 0); \
1035 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
1036 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
1037 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
1038 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
1041 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
1043 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
1044 "__enable_execute_stack"), \
1045 0, VOIDmode, 1,_addr, Pmode); \
1047 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
1048 gen_rtvec (1, const0_rtx), 0)); \
1051 /* Attempt to turn on access permissions for the stack. */
1053 #define TRANSFER_FROM_TRAMPOLINE \
1056 __enable_execute_stack (addr) \
1059 long size = getpagesize (); \
1060 long mask = ~(size-1); \
1061 char *page = (char *) (((long) addr) & mask); \
1062 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1064 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1065 if (mprotect (page, end - page, 7) < 0) \
1066 perror ("mprotect of trampoline code"); \
1069 /* Addressing modes, and classification of registers for them. */
1071 /* #define HAVE_POST_INCREMENT */
1072 /* #define HAVE_POST_DECREMENT */
1074 /* #define HAVE_PRE_DECREMENT */
1075 /* #define HAVE_PRE_INCREMENT */
1077 /* Macros to check register numbers against specific register classes. */
1079 /* These assume that REGNO is a hard or pseudo reg number.
1080 They give nonzero only if REGNO is a hard reg of the suitable class
1081 or a pseudo reg currently allocated to a suitable hard reg.
1082 Since they use reg_renumber, they are safe only once reg_renumber
1083 has been allocated, which happens in local-alloc.c. */
1085 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1086 #define REGNO_OK_FOR_BASE_P(REGNO) \
1087 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1088 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1090 /* Maximum number of registers that can appear in a valid memory address. */
1091 #define MAX_REGS_PER_ADDRESS 1
1093 /* Recognize any constant value that is a valid address. For the Alpha,
1094 there are only constants none since we want to use LDA to load any
1095 symbolic addresses into registers. */
1097 #define CONSTANT_ADDRESS_P(X) \
1098 (GET_CODE (X) == CONST_INT \
1099 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1101 /* Include all constant integers and constant doubles, but not
1102 floating-point, except for floating-point zero. */
1104 #define LEGITIMATE_CONSTANT_P(X) \
1105 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1106 || (X) == CONST0_RTX (GET_MODE (X)))
1108 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1109 and check its validity for a certain class.
1110 We have two alternate definitions for each of them.
1111 The usual definition accepts all pseudo regs; the other rejects
1112 them unless they have been allocated suitable hard regs.
1113 The symbol REG_OK_STRICT causes the latter definition to be used.
1115 Most source files want to accept pseudo regs in the hope that
1116 they will get allocated to the class that the insn wants them to be in.
1117 Source files for reload pass need to be strict.
1118 After reload, it makes no difference, since pseudo regs have
1119 been eliminated by then. */
1121 #ifndef REG_OK_STRICT
1123 /* Nonzero if X is a hard reg that can be used as an index
1124 or if it is a pseudo reg. */
1125 #define REG_OK_FOR_INDEX_P(X) 0
1126 /* Nonzero if X is a hard reg that can be used as a base reg
1127 or if it is a pseudo reg. */
1128 #define REG_OK_FOR_BASE_P(X) \
1129 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1133 /* Nonzero if X is a hard reg that can be used as an index. */
1134 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1135 /* Nonzero if X is a hard reg that can be used as a base reg. */
1136 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1140 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1141 that is a valid memory address for an instruction.
1142 The MODE argument is the machine mode for the MEM expression
1143 that wants to use this address.
1145 For Alpha, we have either a constant address or the sum of a register
1146 and a constant address, or just a register. For DImode, any of those
1147 forms can be surrounded with an AND that clear the low-order three bits;
1148 this is an "unaligned" access.
1150 We also allow a SYMBOL_REF that is the name of the current function as
1151 valid address. This is for CALL_INSNs. It cannot be used in any other
1154 First define the basic valid address. */
1156 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1157 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1159 if (CONSTANT_ADDRESS_P (X)) \
1161 if (GET_CODE (X) == PLUS \
1162 && REG_P (XEXP (X, 0)) \
1163 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1164 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1168 /* Now accept the simple address, or, for DImode only, an AND of a simple
1169 address that turns off the low three bits. */
1171 extern char *current_function_name
;
1173 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1174 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1175 if ((MODE) == DImode \
1176 && GET_CODE (X) == AND \
1177 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1178 && INTVAL (XEXP (X, 1)) == -8) \
1179 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1180 if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1181 && ! strcmp (XSTR (X, 0), current_function_name)) \
1185 /* Try machine-dependent ways of modifying an illegitimate address
1186 to be legitimate. If we find one, return the new, valid address.
1187 This macro is used in only one place: `memory_address' in explow.c.
1189 OLDX is the address as it was before break_out_memory_refs was called.
1190 In some cases it is useful to look at this to decide what needs to be done.
1192 MODE and WIN are passed so that this macro can use
1193 GO_IF_LEGITIMATE_ADDRESS.
1195 It is always safe for this macro to do nothing. It exists to recognize
1196 opportunities to optimize the output.
1198 For the Alpha, there are three cases we handle:
1200 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1201 valid offset, compute the high part of the constant and add it to the
1202 register. Then our address is (plus temp low-part-const).
1203 (2) If the address is (const (plus FOO const_int)), find the low-order
1204 part of the CONST_INT. Then load FOO plus any high-order part of the
1205 CONST_INT into a register. Our address is (plus reg low-part-const).
1206 This is done to reduce the number of GOT entries.
1207 (3) If we have a (plus reg const), emit the load as in (2), then add
1208 the two registers, and finally generate (plus reg low-part-const) as
1211 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1212 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1213 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1214 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1216 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1217 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1218 HOST_WIDE_INT highpart = val - lowpart; \
1219 rtx high = GEN_INT (highpart); \
1220 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1221 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1223 (X) = plus_constant (temp, lowpart); \
1226 else if (GET_CODE (X) == CONST \
1227 && GET_CODE (XEXP (X, 0)) == PLUS \
1228 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1230 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1231 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1232 HOST_WIDE_INT highpart = val - lowpart; \
1233 rtx high = XEXP (XEXP (X, 0), 0); \
1236 high = plus_constant (high, highpart); \
1238 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1241 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1242 && GET_CODE (XEXP (X, 1)) == CONST \
1243 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1244 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1246 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1247 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1248 HOST_WIDE_INT highpart = val - lowpart; \
1249 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1252 high = plus_constant (high, highpart); \
1254 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1255 force_reg (Pmode, high), \
1256 high, 1, OPTAB_LIB_WIDEN); \
1257 (X) = plus_constant (high, lowpart); \
1262 /* Go to LABEL if ADDR (a legitimate address expression)
1263 has an effect that depends on the machine mode it is used for.
1264 On the Alpha this is true only for the unaligned modes. We can
1265 simplify this test since we know that the address must be valid. */
1267 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1268 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1270 /* Compute the cost of an address. For the Alpha, all valid addresses are
1273 #define ADDRESS_COST(X) 0
1275 /* Define this if some processing needs to be done immediately before
1276 emitting code for an insn. */
1278 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1280 /* Specify the machine mode that this machine uses
1281 for the index in the tablejump instruction. */
1282 #define CASE_VECTOR_MODE SImode
1284 /* Define this if the tablejump instruction expects the table
1285 to contain offsets from the address of the table.
1286 Do not define this if the table should contain absolute addresses.
1287 On the Alpha, the table is really GP-relative, not relative to the PC
1288 of the table, but we pretend that it is PC-relative; this should be OK,
1289 but we hsould try to find some better way sometime. */
1290 #define CASE_VECTOR_PC_RELATIVE
1292 /* Specify the tree operation to be used to convert reals to integers. */
1293 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1295 /* This is the kind of divide that is easiest to do in the general case. */
1296 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1298 /* Define this as 1 if `char' should by default be signed; else as 0. */
1299 #define DEFAULT_SIGNED_CHAR 1
1301 /* This flag, if defined, says the same insns that convert to a signed fixnum
1302 also convert validly to an unsigned one.
1304 We actually lie a bit here as overflow conditions are different. But
1305 they aren't being checked anyway. */
1307 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1309 /* Max number of bytes we can move to or from memory
1310 in one reasonably fast instruction. */
1314 /* Largest number of bytes of an object that can be placed in a register.
1315 On the Alpha we have plenty of registers, so use TImode. */
1316 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1318 /* Nonzero if access to memory by bytes is no faster than for words.
1319 Also non-zero if doing byte operations (specifically shifts) in registers
1322 On the Alpha, we want to not use the byte operation and instead use
1323 masking operations to access fields; these will save instructions. */
1325 #define SLOW_BYTE_ACCESS 1
1327 /* Define if operations between registers always perform the operation
1328 on the full register even if a narrower mode is specified. */
1329 #define WORD_REGISTER_OPERATIONS
1331 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1332 will either zero-extend or sign-extend. The value of this macro should
1333 be the code that says which one of the two operations is implicitly
1334 done, NIL if none. */
1335 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
1337 /* Define if loading short immediate values into registers sign extends. */
1338 #define SHORT_IMMEDIATES_SIGN_EXTEND
1340 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1341 is done just by pretending it is already truncated. */
1342 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1344 /* We assume that the store-condition-codes instructions store 0 for false
1345 and some other value for true. This is the value stored for true. */
1347 #define STORE_FLAG_VALUE 1
1349 /* Define the value returned by a floating-point comparison instruction. */
1351 #define FLOAT_STORE_FLAG_VALUE 0.5
1353 /* Canonicalize a comparison from one we don't have to one we do have. */
1355 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1357 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1358 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1363 (CODE) = swap_condition (CODE); \
1365 if (((CODE) == LT || (CODE) == LTU) \
1366 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1368 (CODE) = (CODE) == LT ? LE : LEU; \
1369 (OP1) = GEN_INT (255); \
1373 /* Specify the machine mode that pointers have.
1374 After generation of rtl, the compiler makes no further distinction
1375 between pointers and any other objects of this machine mode. */
1376 #define Pmode DImode
1378 /* Mode of a function address in a call instruction (for indexing purposes). */
1380 #define FUNCTION_MODE Pmode
1382 /* Define this if addresses of constant functions
1383 shouldn't be put through pseudo regs where they can be cse'd.
1384 Desirable on machines where ordinary constants are expensive
1385 but a CALL with constant address is cheap.
1387 We define this on the Alpha so that gen_call and gen_call_value
1388 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1389 then copy it into a register, thus actually letting the address be
1392 #define NO_FUNCTION_CSE
1394 /* Define this to be nonzero if shift instructions ignore all but the low-order
1396 #define SHIFT_COUNT_TRUNCATED 1
1398 /* Use atexit for static constructors/destructors, instead of defining
1399 our own exit function. */
1402 /* Compute the cost of computing a constant rtl expression RTX
1403 whose rtx-code is CODE. The body of this macro is a portion
1404 of a switch statement. If the code is computed here,
1405 return it with a return statement. Otherwise, break from the switch.
1407 If this is an 8-bit constant, return zero since it can be used
1408 nearly anywhere with no cost. If it is a valid operand for an
1409 ADD or AND, likewise return 0 if we know it will be used in that
1410 context. Otherwise, return 2 since it might be used there later.
1411 All other constants take at least two insns. */
1413 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1415 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1417 case CONST_DOUBLE: \
1418 if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1419 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1421 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1424 return COSTS_N_INSNS (2); \
1428 return COSTS_N_INSNS (3);
1430 /* Provide the costs of a rtl expression. This is in the body of a
1433 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1436 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1437 return COSTS_N_INSNS (6); \
1438 else if (GET_CODE (XEXP (X, 0)) == MULT \
1439 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1440 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1441 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1444 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1445 return COSTS_N_INSNS (6); \
1446 return COSTS_N_INSNS (23); \
1448 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1449 && INTVAL (XEXP (X, 1)) <= 3) \
1451 /* ... fall through ... */ \
1452 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1453 return COSTS_N_INSNS (2); \
1458 if (GET_MODE (X) == SFmode) \
1459 return COSTS_N_INSNS (34); \
1460 else if (GET_MODE (X) == DFmode) \
1461 return COSTS_N_INSNS (63); \
1463 return COSTS_N_INSNS (70); \
1465 return COSTS_N_INSNS (3);
1467 /* Control the assembler format that we output. */
1469 /* Output at beginning of assembler file. */
1471 #define ASM_FILE_START(FILE) \
1473 alpha_write_verstamp (FILE); \
1474 fprintf (FILE, "\t.set noreorder\n"); \
1475 fprintf (FILE, "\t.set volatile\n"); \
1476 fprintf (FILE, "\t.set noat\n"); \
1477 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1480 /* Output to assembler file text saying following lines
1481 may contain character constants, extra white space, comments, etc. */
1483 #define ASM_APP_ON ""
1485 /* Output to assembler file text saying following lines
1486 no longer contain unusual constructs. */
1488 #define ASM_APP_OFF ""
1490 #define TEXT_SECTION_ASM_OP ".text"
1492 /* Output before read-only data. */
1494 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1496 /* Output before writable data. */
1498 #define DATA_SECTION_ASM_OP ".data"
1500 /* Define an extra section for read-only data, a routine to enter it, and
1501 indicate that it is for read-only data. */
1503 #define EXTRA_SECTIONS readonly_data
1505 #define EXTRA_SECTION_FUNCTIONS \
1507 literal_section () \
1509 if (in_section != readonly_data) \
1511 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1512 in_section = readonly_data; \
1516 #define READONLY_DATA_SECTION literal_section
1518 /* If we are referencing a function that is static, make the SYMBOL_REF
1519 special. We use this to see indicate we can branch to this function
1520 without setting PV or restoring GP. */
1522 #define ENCODE_SECTION_INFO(DECL) \
1523 if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \
1524 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1526 /* How to refer to registers in assembler output.
1527 This sequence is indexed by compiler's hard-register-number (see above). */
1529 #define REGISTER_NAMES \
1530 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1531 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1532 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1533 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1534 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1535 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1536 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1537 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1539 /* How to renumber registers for dbx and gdb. */
1541 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1543 /* This is how to output the definition of a user-level label named NAME,
1544 such as the label on a static function or variable NAME. */
1546 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1547 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1549 /* This is how to output a command to make the user-level label named NAME
1550 defined for reference from other files. */
1552 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1553 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1555 /* This is how to output a reference to a user-level label named NAME.
1556 `assemble_name' uses this. */
1558 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1559 fprintf (FILE, "%s", NAME)
1561 /* This is how to output an internal numbered label where
1562 PREFIX is the class of label and NUM is the number within the class. */
1564 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1565 if ((PREFIX)[0] == 'L') \
1566 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1568 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1570 /* This is how to output a label for a jump table. Arguments are the same as
1571 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1574 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1575 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1577 /* This is how to store into the string LABEL
1578 the symbol_ref name of an internal numbered label where
1579 PREFIX is the class of label and NUM is the number within the class.
1580 This is suitable for output with `assemble_name'. */
1582 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1583 if ((PREFIX)[0] == 'L') \
1584 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1586 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1588 /* This is how to output an assembler line defining a `double' constant. */
1590 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1592 if (REAL_VALUE_ISINF (VALUE) \
1593 || REAL_VALUE_ISNAN (VALUE) \
1594 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1597 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1598 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1599 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1604 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1605 fprintf (FILE, "\t.t_floating %s\n", str); \
1609 /* This is how to output an assembler line defining a `float' constant. */
1611 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1613 if (REAL_VALUE_ISINF (VALUE) \
1614 || REAL_VALUE_ISNAN (VALUE) \
1615 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1618 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1619 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1624 REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \
1625 fprintf (FILE, "\t.s_floating %s\n", str); \
1629 /* This is how to output an assembler line defining an `int' constant. */
1631 #define ASM_OUTPUT_INT(FILE,VALUE) \
1632 fprintf (FILE, "\t.long %d\n", \
1633 (GET_CODE (VALUE) == CONST_INT \
1634 ? INTVAL (VALUE) & 0xffffffff : (abort (), 0)))
1636 /* This is how to output an assembler line defining a `long' constant. */
1638 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1639 ( fprintf (FILE, "\t.quad "), \
1640 output_addr_const (FILE, (VALUE)), \
1641 fprintf (FILE, "\n"))
1643 /* Likewise for `char' and `short' constants. */
1645 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1646 fprintf (FILE, "\t.word %d\n", \
1647 (GET_CODE (VALUE) == CONST_INT \
1648 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1650 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1651 fprintf (FILE, "\t.byte %d\n", \
1652 (GET_CODE (VALUE) == CONST_INT \
1653 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1655 /* We use the default ASCII-output routine, except that we don't write more
1656 than 50 characters since the assembler doesn't support very long lines. */
1658 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1660 FILE *_hide_asm_out_file = (MYFILE); \
1661 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1662 int _hide_thissize = (MYLENGTH); \
1663 int _size_so_far = 0; \
1665 FILE *asm_out_file = _hide_asm_out_file; \
1666 unsigned char *p = _hide_p; \
1667 int thissize = _hide_thissize; \
1669 fprintf (asm_out_file, "\t.ascii \""); \
1671 for (i = 0; i < thissize; i++) \
1673 register int c = p[i]; \
1675 if (_size_so_far ++ > 50 && i < thissize - 4) \
1676 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1678 if (c == '\"' || c == '\\') \
1679 putc ('\\', asm_out_file); \
1680 if (c >= ' ' && c < 0177) \
1681 putc (c, asm_out_file); \
1684 fprintf (asm_out_file, "\\%o", c); \
1685 /* After an octal-escape, if a digit follows, \
1686 terminate one string constant and start another. \
1687 The Vax assembler fails to stop reading the escape \
1688 after three digits, so this is the only way we \
1689 can get it to parse the data properly. */ \
1690 if (i < thissize - 1 \
1691 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1692 fprintf (asm_out_file, "\"\n\t.ascii \""); \
1695 fprintf (asm_out_file, "\"\n"); \
1700 /* This is how to output an insn to push a register on the stack.
1701 It need not be very fast code. */
1703 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1704 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1705 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1708 /* This is how to output an insn to pop a register from the stack.
1709 It need not be very fast code. */
1711 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1712 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1713 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1716 /* This is how to output an assembler line for a numeric constant byte. */
1718 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1719 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1721 /* This is how to output an element of a case-vector that is absolute.
1722 (Alpha does not use such vectors, but we must define this macro anyway.) */
1724 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1726 /* This is how to output an element of a case-vector that is relative. */
1728 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1729 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1731 /* This is how to output an assembler line
1732 that says to advance the location counter
1733 to a multiple of 2**LOG bytes. */
1735 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1737 fprintf (FILE, "\t.align %d\n", LOG);
1739 /* This is how to advance the location counter by SIZE bytes. */
1741 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1742 fprintf (FILE, "\t.space %d\n", (SIZE))
1744 /* This says how to output an assembler line
1745 to define a global common symbol. */
1747 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1748 ( fputs ("\t.comm ", (FILE)), \
1749 assemble_name ((FILE), (NAME)), \
1750 fprintf ((FILE), ",%d\n", (SIZE)))
1752 /* This says how to output an assembler line
1753 to define a local common symbol. */
1755 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1756 ( fputs ("\t.lcomm ", (FILE)), \
1757 assemble_name ((FILE), (NAME)), \
1758 fprintf ((FILE), ",%d\n", (SIZE)))
1760 /* Store in OUTPUT a string (made with alloca) containing
1761 an assembler-name for a local static variable named NAME.
1762 LABELNO is an integer which is different for each call. */
1764 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1765 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1766 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1768 /* Define the parentheses used to group arithmetic operations
1769 in assembler code. */
1771 #define ASM_OPEN_PAREN "("
1772 #define ASM_CLOSE_PAREN ")"
1774 /* Define results of standard character escape sequences. */
1775 #define TARGET_BELL 007
1776 #define TARGET_BS 010
1777 #define TARGET_TAB 011
1778 #define TARGET_NEWLINE 012
1779 #define TARGET_VT 013
1780 #define TARGET_FF 014
1781 #define TARGET_CR 015
1783 /* Print operand X (an rtx) in assembler syntax to file FILE.
1784 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1785 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1787 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1789 /* Determine which codes are valid without a following integer. These must
1790 not be alphabetic. */
1792 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1794 /* Print a memory address as an operand to reference that memory location. */
1796 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1797 { rtx addr = (ADDR); \
1799 HOST_WIDE_INT offset = 0; \
1801 if (GET_CODE (addr) == AND) \
1802 addr = XEXP (addr, 0); \
1804 if (GET_CODE (addr) == REG) \
1805 basereg = REGNO (addr); \
1806 else if (GET_CODE (addr) == CONST_INT) \
1807 offset = INTVAL (addr); \
1808 else if (GET_CODE (addr) == PLUS \
1809 && GET_CODE (XEXP (addr, 0)) == REG \
1810 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1811 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1815 fprintf (FILE, "%d($%d)", offset, basereg); \
1817 /* Define the codes that are matched by predicates in alpha.c. */
1819 #define PREDICATE_CODES \
1820 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1821 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1822 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1823 {"cint8_operand", {CONST_INT}}, \
1824 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1825 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1826 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1827 {"const48_operand", {CONST_INT}}, \
1828 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1829 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1830 {"mode_mask_operand", {CONST_INT}}, \
1831 {"mul8_operand", {CONST_INT}}, \
1832 {"mode_width_operand", {CONST_INT}}, \
1833 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1834 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1835 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1836 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1837 {"fp0_operand", {CONST_DOUBLE}}, \
1838 {"current_file_function_operand", {SYMBOL_REF}}, \
1839 {"call_operand", {REG, SYMBOL_REF}}, \
1840 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1841 SYMBOL_REF, CONST, LABEL_REF}}, \
1842 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1843 SYMBOL_REF, CONST, LABEL_REF}}, \
1844 {"aligned_memory_operand", {MEM}}, \
1845 {"unaligned_memory_operand", {MEM}}, \
1846 {"any_memory_operand", {MEM}},
1848 /* Tell collect that the object format is ECOFF. */
1849 #define OBJECT_FORMAT_COFF
1850 #define EXTENDED_COFF
1852 /* If we use NM, pass -g to it so it only lists globals. */
1853 #define NM_FLAGS "-pg"
1855 /* Definitions for debugging. */
1857 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1858 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1859 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1861 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1862 #define PREFERRED_DEBUGGING_TYPE \
1863 ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
1867 /* Correct the offset of automatic variables and arguments. Note that
1868 the Alpha debug format wants all automatic variables and arguments
1869 to be in terms of two different offsets from the virtual frame pointer,
1870 which is the stack pointer before any adjustment in the function.
1871 The offset for the argument pointer is fixed for the native compiler,
1872 it is either zero (for the no arguments case) or large enough to hold
1873 all argument registers.
1874 The offset for the auto pointer is the fourth argument to the .frame
1875 directive (local_offset).
1876 To stay compatible with the native tools we use the same offsets
1877 from the virtual frame pointer and adjust the debugger arg/auto offsets
1878 accordingly. These debugger offsets are set up in output_prolog. */
1880 long alpha_arg_offset
;
1881 long alpha_auto_offset
;
1882 #define DEBUGGER_AUTO_OFFSET(X) \
1883 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1884 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1887 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
1888 alpha_output_lineno (STREAM, LINE)
1889 extern void alpha_output_lineno ();
1891 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1892 alpha_output_filename (STREAM, NAME)
1893 extern void alpha_output_filename ();
1896 /* mips-tfile.c limits us to strings of one page. */
1897 #define DBX_CONTIN_LENGTH 4000
1899 /* By default, turn on GDB extensions. */
1900 #define DEFAULT_GDB_EXTENSIONS 1
1902 /* If we are smuggling stabs through the ALPHA ECOFF object
1903 format, put a comment in front of the .stab<x> operation so
1904 that the ALPHA assembler does not choke. The mips-tfile program
1905 will correctly put the stab into the object file. */
1907 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
1908 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
1909 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
1911 /* Forward references to tags are allowed. */
1912 #define SDB_ALLOW_FORWARD_REFERENCES
1914 /* Unknown tags are also allowed. */
1915 #define SDB_ALLOW_UNKNOWN_REFERENCES
1917 #define PUT_SDB_DEF(a) \
1919 fprintf (asm_out_file, "\t%s.def\t", \
1920 (TARGET_GAS) ? "" : "#"); \
1921 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1922 fputc (';', asm_out_file); \
1925 #define PUT_SDB_PLAIN_DEF(a) \
1927 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1928 (TARGET_GAS) ? "" : "#", (a)); \
1931 #define PUT_SDB_TYPE(a) \
1933 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1936 /* For block start and end, we create labels, so that
1937 later we can figure out where the correct offset is.
1938 The normal .ent/.end serve well enough for functions,
1939 so those are just commented out. */
1941 extern int sdb_label_count
; /* block start/end next label # */
1943 #define PUT_SDB_BLOCK_START(LINE) \
1945 fprintf (asm_out_file, \
1946 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1948 (TARGET_GAS) ? "" : "#", \
1951 sdb_label_count++; \
1954 #define PUT_SDB_BLOCK_END(LINE) \
1956 fprintf (asm_out_file, \
1957 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1959 (TARGET_GAS) ? "" : "#", \
1962 sdb_label_count++; \
1965 #define PUT_SDB_FUNCTION_START(LINE)
1967 #define PUT_SDB_FUNCTION_END(LINE)
1969 #define PUT_SDB_EPILOGUE_END(NAME)
1971 /* Specify to run a post-processor, mips-tfile after the assembler
1972 has run to stuff the ecoff debug information into the object file.
1973 This is needed because the Alpha assembler provides no way
1974 of specifying such information in the assembly file. */
1976 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
1978 #define ASM_FINAL_SPEC "\
1979 %{malpha-as: %{!mno-mips-tfile: \
1980 \n mips-tfile %{v*: -v} \
1982 %{!K: %{save-temps: -I %b.o~}} \
1983 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1984 %{.s:%i} %{!.s:%g.s}}}"
1987 #define ASM_FINAL_SPEC "\
1988 %{!mgas: %{!mno-mips-tfile: \
1989 \n mips-tfile %{v*: -v} \
1991 %{!K: %{save-temps: -I %b.o~}} \
1992 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
1993 %{.s:%i} %{!.s:%g.s}}}"
1997 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1998 mips-tdump.c to print them out.
2000 These must match the corresponding definitions in gdb/mipsread.c.
2001 Unfortunately, gcc and gdb do not currently share any directories. */
2003 #define CODE_MASK 0x8F300
2004 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2005 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2006 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2008 /* Override some mips-tfile definitions. */
2010 #define SHASH_SIZE 511
2011 #define THASH_SIZE 55
2013 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2015 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2017 /* The system headers under OSF/1 are C++-aware. */
2018 #define NO_IMPLICIT_EXTERN_C
2020 /* The linker will stick __main into the .init section. */
2021 #define HAS_INIT_SECTION
2022 #define LD_INIT_SWITCH "-init"
2023 #define LD_FINI_SWITCH "-fini"
2025 /* We do want to link in libgcc when building shared libraries under OSF/1. */
2026 #define LIBGCC_SPEC "-lgcc"
This page took 0.144567 seconds and 4 git commands to generate.