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gcc.gnu.org Git - gcc.git/blob - gcc/config/alpha/alpha.h
1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
22 /* Names to predefine in the preprocessor for this target machine. */
24 #define CPP_PREDEFINES "\
25 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
28 /* Write out the correct language type definition for the header files. */
30 %{.c: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
31 %{.h: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
32 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
33 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
34 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
35 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS} \
36 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}"
38 /* Set the spec to use for signed char. The default tests the above macro
39 but DEC's compiler can't handle the conditional in a "constant"
42 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
44 /* No point in running CPP on our assembler output. */
45 #define ASM_SPEC "-nocpp"
47 /* Right now Alpha OSF/1 doesn't seem to have debugging or profiled
50 #define LIB_SPEC "-lc"
52 /* Print subsidiary information on the compiler version in use. */
53 #define TARGET_VERSION
55 /* Define the location for the startup file on OSF/1 for Alpha. */
57 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
59 /* Run-time compilation parameters selecting different hardware subsets. */
61 extern int target_flags
;
63 /* This means that floating-point support exists in the target implementation
64 of the Alpha architecture. This is usually the default. */
66 #define TARGET_FP (target_flags & 1)
68 /* This means that floating-point registers are allowed to be used. Note
69 that Alpha implementations without FP operations are required to
70 provide the FP registers. */
72 #define TARGET_FPREGS (target_flags & 2)
74 /* Macro to define tables used to set the flags.
75 This is a list in braces of pairs in braces,
76 each pair being { "NAME", VALUE }
77 where VALUE is the bits to set or minus the bits to clear.
78 An empty string NAME is used to identify the default VALUE. */
80 #define TARGET_SWITCHES \
81 { {"no-soft-float", 1}, \
85 {"", TARGET_DEFAULT} }
87 #define TARGET_DEFAULT 3
89 /* Define this macro to change register usage conditional on target flags.
91 On the Alpha, we use this to disable the floating-point registers when
94 #define CONDITIONAL_REGISTER_USAGE \
95 if (! TARGET_FPREGS) \
96 for (i = 32; i < 64; i++) \
97 fixed_regs[i] = call_used_regs[i] = 1;
99 /* Define this to change the optimizations performed by default. */
101 #define OPTIMIZATION_OPTIONS(LEVEL) \
105 flag_force_addr = 1; \
106 flag_force_mem = 1; \
107 flag_omit_frame_pointer = 1; \
111 /* target machine storage layout */
113 /* Define the size of `int'. The default is the same as the word size. */
114 #define INT_TYPE_SIZE 32
116 /* Define the size of `long long'. The default is the twice the word size. */
117 #define LONG_LONG_TYPE_SIZE 64
119 /* The two floating-point formats we support are S-floating, which is
120 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
121 and `long double' are T. */
123 #define FLOAT_TYPE_SIZE 32
124 #define DOUBLE_TYPE_SIZE 64
125 #define LONG_DOUBLE_TYPE_SIZE 64
127 #define WCHAR_TYPE "short unsigned int"
128 #define WCHAR_TYPE_SIZE 16
130 /* Define this macro if it is advisable to hold scalars in registers
131 in a wider mode than that declared by the program. In such cases,
132 the value is constrained to be within the bounds of the declared
133 type, but kept valid in the wider mode. The signedness of the
134 extension may differ from that of the type.
136 For Alpha, we always store objects in a full register. 32-bit objects
137 are always sign-extended, but smaller objects retain their signedness. */
139 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
140 if (GET_MODE_CLASS (MODE) == MODE_INT \
141 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
143 if ((MODE) == SImode) \
148 /* Define this if function arguments should also be promoted using the above
151 #define PROMOTE_FUNCTION_ARGS
153 /* Likewise, if the function return value is promoted. */
155 #define PROMOTE_FUNCTION_RETURN
157 /* Define this if most significant bit is lowest numbered
158 in instructions that operate on numbered bit-fields.
160 There are no such instructions on the Alpha, but the documentation
162 #define BITS_BIG_ENDIAN 0
164 /* Define this if most significant byte of a word is the lowest numbered.
165 This is false on the Alpha. */
166 #define BYTES_BIG_ENDIAN 0
168 /* Define this if most significant word of a multiword number is lowest
171 For Alpha we can decide arbitrarily since there are no machine instructions
172 for them. Might as well be consistent with bytes. */
173 #define WORDS_BIG_ENDIAN 0
175 /* number of bits in an addressable storage unit */
176 #define BITS_PER_UNIT 8
178 /* Width in bits of a "word", which is the contents of a machine register.
179 Note that this is not necessarily the width of data type `int';
180 if using 16-bit ints on a 68000, this would still be 32.
181 But on a machine with 16-bit registers, this would be 16. */
182 #define BITS_PER_WORD 64
184 /* Width of a word, in units (bytes). */
185 #define UNITS_PER_WORD 8
187 /* Width in bits of a pointer.
188 See also the macro `Pmode' defined below. */
189 #define POINTER_SIZE 64
191 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
192 #define PARM_BOUNDARY 64
194 /* Boundary (in *bits*) on which stack pointer should be aligned. */
195 #define STACK_BOUNDARY 64
197 /* Allocation boundary (in *bits*) for the code of a function. */
198 #define FUNCTION_BOUNDARY 64
200 /* Alignment of field after `int : 0' in a structure. */
201 #define EMPTY_FIELD_BOUNDARY 64
203 /* Every structure's size must be a multiple of this. */
204 #define STRUCTURE_SIZE_BOUNDARY 8
206 /* A bitfield declared as `int' forces `int' alignment for the struct. */
207 #define PCC_BITFIELD_TYPE_MATTERS 1
209 /* Align loop starts for optimal branching. */
211 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
212 ASM_OUTPUT_ALIGN (FILE, 5)
214 /* This is how to align an instruction for optimal branching.
215 On Alpha we'll get better performance by aligning on a quadword
218 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
219 ASM_OUTPUT_ALIGN ((FILE), 4)
221 /* No data type wants to be aligned rounder than this. */
222 #define BIGGEST_ALIGNMENT 64
224 /* Make strings word-aligned so strcpy from constants will be faster. */
225 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
226 (TREE_CODE (EXP) == STRING_CST \
227 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
229 /* Make arrays of chars word-aligned for the same reasons. */
230 #define DATA_ALIGNMENT(TYPE, ALIGN) \
231 (TREE_CODE (TYPE) == ARRAY_TYPE \
232 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
233 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
235 /* Set this non-zero if move instructions will actually fail to work
236 when given unaligned data.
238 Since we get an error message when we do one, call them invalid. */
240 #define STRICT_ALIGNMENT 1
242 /* Set this non-zero if unaligned move instructions are extremely slow.
244 On the Alpha, they trap. */
246 #define SLOW_UNALIGNED_ACCESS 1
248 /* Standard register usage. */
250 /* Number of actual hardware registers.
251 The hardware registers are assigned numbers for the compiler
252 from 0 to just below FIRST_PSEUDO_REGISTER.
253 All registers that the compiler knows about must be given numbers,
254 even those that are not normally considered general registers.
256 We define all 32 integer registers, even though $31 is always zero,
257 and all 32 floating-point registers, even though $f31 is also
258 always zero. We do not bother defining the FP status register and
259 there are no other registers.
261 Since $31 is always zero, we will use register number 31 as the
262 argument pointer. It will never appear in the generated code
263 because we will always be eliminating it in favor of the stack
264 poointer or frame pointer. */
266 #define FIRST_PSEUDO_REGISTER 64
268 /* 1 for registers that have pervasive standard uses
269 and are not available for the register allocator. */
271 #define FIXED_REGISTERS \
272 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
273 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
274 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
275 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
277 /* 1 for registers not available across function calls.
278 These must include the FIXED_REGISTERS and also any
279 registers that can be used without being saved.
280 The latter must include the registers where values are returned
281 and the register where structure-value addresses are passed.
282 Aside from that, you can include as many other registers as you like. */
283 #define CALL_USED_REGISTERS \
284 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
285 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
286 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
287 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
289 /* List the order in which to allocate registers. Each register must be
290 listed once, even those in FIXED_REGISTERS.
292 We allocate in the following order:
293 $f1 (nonsaved floating-point register)
296 $f21-$f16 (likewise, but input args)
297 $f0 (nonsaved, but return value)
298 $f2-$f9 (saved floating-point registers)
299 $1-$8 (nonsaved integer registers)
302 $0 (likewise, but return value)
303 $21-$16 (likewise, but input args)
304 $27 (procedure value)
305 $9-$14 (saved integer registers)
309 $30, $31, $f31 (stack pointer and always zero/ap) */
311 #define REG_ALLOC_ORDER \
314 54, 55, 56, 57, 58, 59, 60, 61, 62, \
315 53, 52, 51, 50, 49, 48, \
317 34, 35, 36, 37, 38, 39, 40, 41, \
318 1, 2, 3, 4, 5, 6, 7, 8, \
322 21, 20, 19, 18, 17, 16, \
324 9, 10, 11, 12, 13, 14, \
330 /* Return number of consecutive hard regs needed starting at reg REGNO
331 to hold something of mode MODE.
332 This is ordinarily the length in words of a value of mode MODE
333 but can be less for certain modes in special long registers. */
335 #define HARD_REGNO_NREGS(REGNO, MODE) \
336 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
338 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
339 On Alpha, the integer registers can hold any mode. The floating-point
340 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
341 or 8-bit values. If we only allowed the larger integers into FP registers,
342 we'd have to say that QImode and SImode aren't tiable, which is a
343 pain. So say all registers can hold everything and see how that works. */
345 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
347 /* Value is 1 if it is a good idea to tie two pseudo registers
348 when one has mode MODE1 and one has mode MODE2.
349 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
350 for any hard reg, then this must be 0 for correct output. */
352 #define MODES_TIEABLE_P(MODE1, MODE2) 1
354 /* Specify the registers used for certain standard purposes.
355 The values of these macros are register numbers. */
357 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
358 /* #define PC_REGNUM */
360 /* Register to use for pushing function arguments. */
361 #define STACK_POINTER_REGNUM 30
363 /* Base register for access to local variables of the function. */
364 #define FRAME_POINTER_REGNUM 15
366 /* Value should be nonzero if functions must have frame pointers.
367 Zero means the frame pointer need not be set up (and parms
368 may be accessed via the stack pointer) in functions that seem suitable.
369 This is computed in `reload', in reload1.c. */
370 #define FRAME_POINTER_REQUIRED 0
372 /* Base register for access to arguments of the function. */
373 #define ARG_POINTER_REGNUM 31
375 /* Register in which static-chain is passed to a function.
377 For the Alpha, this is based on an example; the calling sequence
378 doesn't seem to specify this. */
379 #define STATIC_CHAIN_REGNUM 1
381 /* Register in which address to store a structure value
382 arrives in the function. On the Alpha, the address is passed
383 as a hidden argument. */
384 #define STRUCT_VALUE 0
386 /* Define the classes of registers for register constraints in the
387 machine description. Also define ranges of constants.
389 One of the classes must always be named ALL_REGS and include all hard regs.
390 If there is more than one class, another class must be named NO_REGS
391 and contain no registers.
393 The name GENERAL_REGS must be the name of a class (or an alias for
394 another name such as ALL_REGS). This is the class of registers
395 that is allowed by "g" or "r" in a register constraint.
396 Also, registers outside this class are allocated only when
397 instructions express preferences for them.
399 The classes must be numbered in nondecreasing order; that is,
400 a larger-numbered class must never be contained completely
401 in a smaller-numbered class.
403 For any two classes, it is very desirable that there be another
404 class that represents their union. */
406 enum reg_class
{ NO_REGS
, GENERAL_REGS
, FLOAT_REGS
, ALL_REGS
,
409 #define N_REG_CLASSES (int) LIM_REG_CLASSES
411 /* Give names of register classes as strings for dump file. */
413 #define REG_CLASS_NAMES \
414 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
416 /* Define which registers fit in which classes.
417 This is an initializer for a vector of HARD_REG_SET
418 of length N_REG_CLASSES. */
420 #define REG_CLASS_CONTENTS \
421 { {0, 0}, {~0, 0}, {0, ~0}, {~0, ~0} }
423 /* The same information, inverted:
424 Return the class number of the smallest class containing
425 reg number REGNO. This could be a conditional expression
426 or could index an array. */
428 #define REGNO_REG_CLASS(REGNO) ((REGNO) >= 32 ? FLOAT_REGS : GENERAL_REGS)
430 /* The class value for index registers, and the one for base regs. */
431 #define INDEX_REG_CLASS NO_REGS
432 #define BASE_REG_CLASS GENERAL_REGS
434 /* Get reg_class from a letter such as appears in the machine description. */
436 #define REG_CLASS_FROM_LETTER(C) \
437 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
439 /* Define this macro to change register usage conditional on target flags. */
440 /* #define CONDITIONAL_REGISTER_USAGE */
442 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
443 can be used to stand for particular ranges of immediate operands.
444 This macro defines what the ranges are.
445 C is the letter, and VALUE is a constant value.
446 Return 1 if VALUE is in the range specified by C.
449 `I' is used for the range of constants most insns can contain.
450 `J' is the constant zero.
451 `K' is used for the constant in an LDA insn.
452 `L' is used for the constant in a LDAH insn.
453 `M' is used for the constants that can be AND'ed with using a ZAP insn.
454 `N' is used for complemented 8-bit constants.
455 `O' is used for negated 8-bit constants.
456 `P' is used for the constants 1, 2 and 3. */
458 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
459 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
460 : (C) == 'J' ? (VALUE) == 0 \
461 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
462 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
463 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \
464 : (C) == 'M' ? zap_mask (VALUE) \
465 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
466 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
467 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
470 /* Similar, but for floating or large integer constants, and defining letters
471 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
473 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
474 that is the operand of a ZAP insn. */
476 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
477 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
478 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
479 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
480 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
481 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
484 /* Given an rtx X being reloaded into a reg required to be
485 in class CLASS, return the class of reg to actually use.
486 In general this is just CLASS; but on some machines
487 in some cases it is preferable to use a more restrictive class.
489 On the Alpha, all constants except zero go into a floating-point
490 register via memory. */
492 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
493 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
494 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
497 /* Loading and storing HImode or QImode values to and from memory
498 usually requires a scratch register. The exceptions are loading
499 QImode and HImode from an aligned address to a general register. */
501 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
502 (((GET_CODE (IN) == MEM \
503 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
504 || (GET_CODE (IN) == SUBREG \
505 && (GET_CODE (SUBREG_REG (IN)) == MEM \
506 || (GET_CODE (SUBREG_REG (IN)) == REG \
507 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
508 && (((CLASS) == FLOAT_REGS \
509 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
510 || (((MODE) == QImode || (MODE) == HImode) \
511 && unaligned_memory_operand (IN, MODE)))) \
512 ? GENERAL_REGS : NO_REGS)
514 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
515 (((GET_CODE (OUT) == MEM \
516 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
517 || (GET_CODE (OUT) == SUBREG \
518 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
519 || (GET_CODE (SUBREG_REG (OUT)) == REG \
520 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
521 && (((MODE) == HImode || (MODE) == QImode \
522 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
523 ? GENERAL_REGS : NO_REGS)
525 /* If we are copying between general and FP registers, we need a memory
528 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
530 /* Return the maximum number of consecutive registers
531 needed to represent mode MODE in a register of class CLASS. */
533 #define CLASS_MAX_NREGS(CLASS, MODE) \
534 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
536 /* Define the cost of moving between registers of various classes. Moving
537 between FLOAT_REGS and anything else except float regs is expensive.
538 In fact, we make it quite expensive because we really don't want to
539 do these moves unless it is clearly worth it. Optimizations may
540 reduce the impact of not being able to allocate a pseudo to a
543 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
544 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
546 /* A C expressions returning the cost of moving data of MODE from a register to
549 On the Alpha, bump this up a bit. */
551 #define MEMORY_MOVE_COST(MODE) 6
553 /* Provide the cost of a branch. Exact meaning under development. */
554 #define BRANCH_COST 5
556 /* Adjust the cost of dependencies. */
558 #define ADJUST_COST(INSN,LINK,DEP,COST) \
559 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
561 /* Stack layout; function entry, exit and calling. */
563 /* Define this if pushing a word on the stack
564 makes the stack pointer a smaller address. */
565 #define STACK_GROWS_DOWNWARD
567 /* Define this if the nominal address of the stack frame
568 is at the high-address end of the local variables;
569 that is, each additional local variable allocated
570 goes at a more negative offset in the frame. */
571 /* #define FRAME_GROWS_DOWNWARD */
573 /* Offset within stack frame to start allocating local variables at.
574 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
575 first local allocated. Otherwise, it is the offset to the BEGINNING
576 of the first local allocated. */
578 #define STARTING_FRAME_OFFSET current_function_outgoing_args_size
580 /* If we generate an insn to push BYTES bytes,
581 this says how many the stack pointer really advances by.
582 On Alpha, don't define this because there are no push insns. */
583 /* #define PUSH_ROUNDING(BYTES) */
585 /* Define this if the maximum size of all the outgoing args is to be
586 accumulated and pushed during the prologue. The amount can be
587 found in the variable current_function_outgoing_args_size. */
588 #define ACCUMULATE_OUTGOING_ARGS
590 /* Offset of first parameter from the argument pointer register value. */
592 #define FIRST_PARM_OFFSET(FNDECL) 0
594 /* Definitions for register eliminations.
596 We have two registers that can be eliminated on the i386. First, the
597 frame pointer register can often be eliminated in favor of the stack
598 pointer register. Secondly, the argument pointer register can always be
599 eliminated; it is replaced with either the stack or frame pointer. */
601 /* This is an array of structures. Each structure initializes one pair
602 of eliminable registers. The "from" register number is given first,
603 followed by "to". Eliminations of the same "from" register are listed
604 in order of preference. */
606 #define ELIMINABLE_REGS \
607 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
608 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
609 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
611 /* Given FROM and TO register numbers, say whether this elimination is allowed.
612 Frame pointer elimination is automatically handled.
614 All eliminations are valid since the cases where FP can't be
615 eliminated are already handled. */
617 #define CAN_ELIMINATE(FROM, TO) 1
619 /* Define the offset between two registers, one to be eliminated, and the other
620 its replacement, at the start of a routine. */
621 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
622 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
625 (OFFSET) = (get_frame_size () + current_function_outgoing_args_size \
626 + current_function_pretend_args_size \
627 + alpha_sa_size () + 15) & ~ 15; \
630 /* Define this if stack space is still allocated for a parameter passed
632 /* #define REG_PARM_STACK_SPACE */
634 /* Value is the number of bytes of arguments automatically
635 popped when returning from a subroutine call.
636 FUNTYPE is the data type of the function (as a tree),
637 or for a library call it is an identifier node for the subroutine name.
638 SIZE is the number of bytes of arguments passed on the stack. */
640 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
642 /* Define how to find the value returned by a function.
643 VALTYPE is the data type of the value (as a tree).
644 If the precise function being called is known, FUNC is its FUNCTION_DECL;
645 otherwise, FUNC is 0.
647 On Alpha the value is found in $0 for integer functions and
648 $f0 for floating-point functions. */
650 #define FUNCTION_VALUE(VALTYPE, FUNC) \
652 ((TREE_CODE (VALTYPE) == INTEGER_TYPE \
653 || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \
654 || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \
655 || TREE_CODE (VALTYPE) == CHAR_TYPE \
656 || TREE_CODE (VALTYPE) == POINTER_TYPE \
657 || TREE_CODE (VALTYPE) == OFFSET_TYPE) \
658 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
659 ? word_mode : TYPE_MODE (VALTYPE), \
660 TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0)
662 /* Define how to find the value returned by a library function
663 assuming the value has mode MODE. */
665 #define LIBCALL_VALUE(MODE) \
666 gen_rtx (REG, MODE, \
667 TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0)
669 /* The definition of this macro implies that there are cases where
670 a scalar value cannot be returned in registers.
672 For the Alpha, any structure or union type is returned in memory, as
673 are integers whose size is larger than 64 bits. */
675 #define RETURN_IN_MEMORY(TYPE) \
676 (TYPE_MODE (TYPE) == BLKmode \
677 || TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE (TYPE) == UNION_TYPE \
678 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
680 /* 1 if N is a possible register number for a function value
681 as seen by the caller. */
683 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32)
685 /* 1 if N is a possible register number for function argument passing.
686 On Alpha, these are $16-$21 and $f16-$f21. */
688 #define FUNCTION_ARG_REGNO_P(N) \
689 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
691 /* Define a data type for recording info about an argument list
692 during the scan of that argument list. This data type should
693 hold all necessary information about the function itself
694 and about the args processed so far, enough to enable macros
695 such as FUNCTION_ARG to determine where the next arg should go.
697 On Alpha, this is a single integer, which is a number of words
698 of arguments scanned so far.
699 Thus 6 or more means all following args should go on the stack. */
701 #define CUMULATIVE_ARGS int
703 /* Initialize a variable CUM of type CUMULATIVE_ARGS
704 for a call to a function whose data type is FNTYPE.
705 For a library call, FNTYPE is 0. */
707 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0
709 /* Define intermediate macro to compute the size (in registers) of an argument
712 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
714 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
715 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
717 /* Update the data in CUM to advance over an argument
718 of mode MODE and data type TYPE.
719 (TYPE is null for libcalls where that information may not be available.) */
721 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
722 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
725 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
727 /* Determine where to put an argument to a function.
728 Value is zero to push the argument on the stack,
729 or a hard register in which to store the argument.
731 MODE is the argument's machine mode.
732 TYPE is the data type of the argument (as a tree).
733 This is null for libcalls where that information may
735 CUM is a variable of type CUMULATIVE_ARGS which gives info about
736 the preceding args and about the function being called.
737 NAMED is nonzero if this argument is a named parameter
738 (otherwise it is an extra parameter matching an ellipsis).
740 On Alpha the first 6 words of args are normally in registers
741 and the rest are pushed. */
743 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
744 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
745 ? gen_rtx(REG, (MODE), \
746 (CUM) + 16 + (TARGET_FPREGS \
747 && GET_MODE_CLASS (MODE) == MODE_FLOAT) * 32) : 0)
749 /* Specify the padding direction of arguments.
751 On the Alpha, we must pad upwards in order to be able to pass args in
754 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
756 /* For an arg passed partly in registers and partly in memory,
757 this is the number of registers used.
758 For args passed entirely in registers or entirely in memory, zero. */
760 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
761 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
764 /* Perform any needed actions needed for a function that is receiving a
765 variable number of arguments.
769 MODE and TYPE are the mode and type of the current parameter.
771 PRETEND_SIZE is a variable that should be set to the amount of stack
772 that must be pushed by the prolog to pretend that our caller pushed
775 Normally, this macro will push all remaining incoming registers on the
776 stack and set PRETEND_SIZE to the length of the registers pushed.
778 On the Alpha, we allocate space for all 12 arg registers, but only
779 push those that are remaining.
781 However, if NO registers need to be saved, don't allocate any space.
782 This is not only because we won't need the space, but because AP includes
783 the current_pretend_args_size and we don't want to mess up any
784 ap-relative addresses already made. */
786 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
791 move_block_from_reg \
793 gen_rtx (MEM, BLKmode, \
794 plus_constant (virtual_incoming_args_rtx, \
795 ((CUM) - 6) * UNITS_PER_WORD)), \
797 move_block_from_reg \
799 gen_rtx (MEM, BLKmode, \
800 plus_constant (virtual_incoming_args_rtx, \
801 ((CUM) - 12) * UNITS_PER_WORD)), \
804 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
808 /* Generate necessary RTL for __builtin_saveregs().
809 ARGLIST is the argument list; see expr.c. */
810 extern struct rtx_def
*alpha_builtin_saveregs ();
811 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
813 /* Define the information needed to generate branch and scc insns. This is
814 stored from the compare operation. Note that we can't use "rtx" here
815 since it hasn't been defined! */
817 extern struct rtx_def
*alpha_compare_op0
, *alpha_compare_op1
;
818 extern int alpha_compare_fp_p
;
820 /* This macro produces the initial definition of a function name. On the
821 Alpha, we need to save the function name for the epilogue. */
823 extern char *alpha_function_name
;
825 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
828 for (_level = -1, _context = (DECL); _context; \
829 _context = DECL_CONTEXT (_context), _level++) \
831 fprintf (FILE, "\t.ent %s %d\n", NAME, _level); \
832 ASM_OUTPUT_LABEL (FILE, NAME); \
833 alpha_function_name = NAME; \
836 /* This macro generates the assembly code for function entry.
837 FILE is a stdio stream to output the code to.
838 SIZE is an int: how many units of temporary storage to allocate.
839 Refer to the array `regs_ever_live' to determine which registers
840 to save; `regs_ever_live[I]' is nonzero if register number I
841 is ever used in the function. This macro is responsible for
842 knowing which registers should not be saved even if used. */
844 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
846 /* Output assembler code to FILE to increment profiler label # LABELNO
847 for profiling a function entry. */
849 #define FUNCTION_PROFILER(FILE, LABELNO)
851 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
852 the stack pointer does not matter. The value is tested only in
853 functions that have frame pointers.
854 No definition is equivalent to always zero. */
856 #define EXIT_IGNORE_STACK 1
858 /* This macro generates the assembly code for function exit,
859 on machines that need it. If FUNCTION_EPILOGUE is not defined
860 then individual return instructions are generated for each
861 return statement. Args are same as for FUNCTION_PROLOGUE.
863 The function epilogue should not depend on the current stack pointer!
864 It should use the frame pointer only. This is mandatory because
865 of alloca; we also take advantage of it to omit stack adjustments
868 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
871 /* Output assembler code for a block containing the constant parts
872 of a trampoline, leaving space for the variable parts.
874 The trampoline should set the static chain pointer to value placed
875 into the trampoline and should branch to the specified routine.
876 Note that $27 has been set to the address of the trampoline, so we can
877 use it for addressability of the two data items. Trampolines are always
878 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
880 #define TRAMPOLINE_TEMPLATE(FILE) \
882 fprintf (FILE, "\tldq $1,24($27)\n"); \
883 fprintf (FILE, "\tldq $27,16($27)\n"); \
884 fprintf (FILE, "\tjmp $31,($27),0\n"); \
885 fprintf (FILE, "\tnop\n"); \
886 fprintf (FILE, "\t.quad 0,0\n"); \
889 /* Section in which to place the trampoline. On Alpha, instructions
890 may only be placed in a text segment. */
892 #define TRAMPOLINE_SECTION text_section
894 /* Length in units of the trampoline for entering a nested function. */
896 #define TRAMPOLINE_SIZE 32
898 /* Emit RTL insns to initialize the variable parts of a trampoline.
899 FNADDR is an RTX for the address of the function's pure code.
900 CXT is an RTX for the static chain value for the function. We assume
901 here that a function will be called many more times than its address
902 is taken (e.g., it might be passed to qsort), so we take the trouble
903 to initialize the "hint" field in the JMP insn. Note that the hint
904 field is PC (new) + 4 * bits 13:0. */
906 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
908 rtx _temp, _temp1, _addr; \
910 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
911 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
912 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
913 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
915 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
916 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
918 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
919 build_int_2 (2, 0), NULL_RTX, 1); \
920 _temp = expand_and (gen_lowpart (SImode, _temp), \
921 GEN_INT (0x3fff), 0); \
923 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
924 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
925 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
926 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
929 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
931 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
932 "__enable_execute_stack"), \
933 0, VOIDmode, 1,_addr, Pmode); \
935 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
936 gen_rtvec (1, const0_rtx), 0)); \
939 /* Attempt to turn on access permissions for the stack. */
941 #define TRANSFER_FROM_TRAMPOLINE \
944 __enable_execute_stack (addr) \
947 long size = getpagesize (); \
948 long mask = ~(size-1); \
949 char *page = (char *) (((long) addr) & mask); \
950 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
952 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
953 if (mprotect (page, end - page, 7) < 0) \
954 perror ("mprotect of trampoline code"); \
957 /* Addressing modes, and classification of registers for them. */
959 /* #define HAVE_POST_INCREMENT */
960 /* #define HAVE_POST_DECREMENT */
962 /* #define HAVE_PRE_DECREMENT */
963 /* #define HAVE_PRE_INCREMENT */
965 /* Macros to check register numbers against specific register classes. */
967 /* These assume that REGNO is a hard or pseudo reg number.
968 They give nonzero only if REGNO is a hard reg of the suitable class
969 or a pseudo reg currently allocated to a suitable hard reg.
970 Since they use reg_renumber, they are safe only once reg_renumber
971 has been allocated, which happens in local-alloc.c. */
973 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
974 #define REGNO_OK_FOR_BASE_P(REGNO) \
975 (((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
977 /* Maximum number of registers that can appear in a valid memory address. */
978 #define MAX_REGS_PER_ADDRESS 1
980 /* Recognize any constant value that is a valid address. For the Alpha,
981 there are only constants none since we want to use LDA to load any
982 symbolic addresses into registers. */
984 #define CONSTANT_ADDRESS_P(X) \
985 (GET_CODE (X) == CONST_INT \
986 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
988 /* Include all constant integers and constant doubles, but not
989 floating-point, except for floating-point zero. */
991 #define LEGITIMATE_CONSTANT_P(X) \
992 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
993 || (X) == CONST0_RTX (GET_MODE (X)))
995 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
996 and check its validity for a certain class.
997 We have two alternate definitions for each of them.
998 The usual definition accepts all pseudo regs; the other rejects
999 them unless they have been allocated suitable hard regs.
1000 The symbol REG_OK_STRICT causes the latter definition to be used.
1002 Most source files want to accept pseudo regs in the hope that
1003 they will get allocated to the class that the insn wants them to be in.
1004 Source files for reload pass need to be strict.
1005 After reload, it makes no difference, since pseudo regs have
1006 been eliminated by then. */
1008 #ifndef REG_OK_STRICT
1010 /* Nonzero if X is a hard reg that can be used as an index
1011 or if it is a pseudo reg. */
1012 #define REG_OK_FOR_INDEX_P(X) 0
1013 /* Nonzero if X is a hard reg that can be used as a base reg
1014 or if it is a pseudo reg. */
1015 #define REG_OK_FOR_BASE_P(X) \
1016 (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1020 /* Nonzero if X is a hard reg that can be used as an index. */
1021 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1022 /* Nonzero if X is a hard reg that can be used as a base reg. */
1023 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1027 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1028 that is a valid memory address for an instruction.
1029 The MODE argument is the machine mode for the MEM expression
1030 that wants to use this address.
1032 For Alpha, we have either a constant address or the sum of a register
1033 and a constant address, or just a register. For DImode, any of those
1034 forms can be surrounded with an AND that clear the low-order three bits;
1035 this is an "unaligned" access.
1037 We also allow a SYMBOL_REF that is the name of the current function as
1038 valid address. This is for CALL_INSNs. It cannot be used in any other
1041 First define the basic valid address. */
1043 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1044 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1046 if (CONSTANT_ADDRESS_P (X)) \
1048 if (GET_CODE (X) == PLUS \
1049 && REG_P (XEXP (X, 0)) \
1050 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1051 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1055 /* Now accept the simple address, or, for DImode only, an AND of a simple
1056 address that turns off the low three bits. */
1058 extern char *current_function_name
;
1060 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1061 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1062 if ((MODE) == DImode \
1063 && GET_CODE (X) == AND \
1064 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1065 && INTVAL (XEXP (X, 1)) == -8) \
1066 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1067 if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \
1068 && ! strcmp (XSTR (X, 0), current_function_name)) \
1072 /* Try machine-dependent ways of modifying an illegitimate address
1073 to be legitimate. If we find one, return the new, valid address.
1074 This macro is used in only one place: `memory_address' in explow.c.
1076 OLDX is the address as it was before break_out_memory_refs was called.
1077 In some cases it is useful to look at this to decide what needs to be done.
1079 MODE and WIN are passed so that this macro can use
1080 GO_IF_LEGITIMATE_ADDRESS.
1082 It is always safe for this macro to do nothing. It exists to recognize
1083 opportunities to optimize the output.
1085 For the Alpha, there are three cases we handle:
1087 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1088 valid offset, compute the high part of the constant and add it to the
1089 register. Then our address is (plus temp low-part-const).
1090 (2) If the address is (const (plus FOO const_int)), find the low-order
1091 part of the CONST_INT. Then load FOO plus any high-order part of the
1092 CONST_INT into a register. Our address is (plus reg low-part-const).
1093 This is done to reduce the number of GOT entries.
1094 (3) If we have a (plus reg const), emit the load as in (2), then add
1095 the two registers, and finally generate (plus reg low-part-const) as
1098 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1099 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1100 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1101 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1103 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1104 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1105 HOST_WIDE_INT highpart = val - lowpart; \
1106 rtx high = GEN_INT (highpart); \
1107 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1108 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1110 (X) = plus_constant (temp, lowpart); \
1113 else if (GET_CODE (X) == CONST \
1114 && GET_CODE (XEXP (X, 0)) == PLUS \
1115 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1117 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1118 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1119 HOST_WIDE_INT highpart = val - lowpart; \
1120 rtx high = XEXP (XEXP (X, 0), 0); \
1123 high = plus_constant (high, highpart); \
1125 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1128 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1129 && GET_CODE (XEXP (X, 1)) == CONST \
1130 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1131 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1133 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1134 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1135 HOST_WIDE_INT highpart = val - lowpart; \
1136 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1139 high = plus_constant (high, highpart); \
1141 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1142 force_reg (Pmode, high), \
1143 high, 1, OPTAB_LIB_WIDEN); \
1144 (X) = plus_constant (high, lowpart); \
1149 /* Go to LABEL if ADDR (a legitimate address expression)
1150 has an effect that depends on the machine mode it is used for.
1151 On the Alpha this is true only for the unaligned modes. We can
1152 simplify this test since we know that the address must be valid. */
1154 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1155 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1157 /* Compute the cost of an address. For the Alpha, all valid addresses are
1160 #define ADDRESS_COST(X) 0
1162 /* Define this if some processing needs to be done immediately before
1163 emitting code for an insn. */
1165 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
1167 /* Specify the machine mode that this machine uses
1168 for the index in the tablejump instruction. */
1169 #define CASE_VECTOR_MODE SImode
1171 /* Define this if the tablejump instruction expects the table
1172 to contain offsets from the address of the table.
1173 Do not define this if the table should contain absolute addresses. */
1174 /* #define CASE_VECTOR_PC_RELATIVE */
1176 /* Specify the tree operation to be used to convert reals to integers. */
1177 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1179 /* This is the kind of divide that is easiest to do in the general case. */
1180 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1182 /* Define this as 1 if `char' should by default be signed; else as 0. */
1183 #define DEFAULT_SIGNED_CHAR 1
1185 /* This flag, if defined, says the same insns that convert to a signed fixnum
1186 also convert validly to an unsigned one.
1188 We actually lie a bit here as overflow conditions are different. But
1189 they aren't being checked anyway. */
1191 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1193 /* Max number of bytes we can move to or from memory
1194 in one reasonably fast instruction. */
1198 /* Largest number of bytes of an object that can be placed in a register.
1199 On the Alpha we have plenty of registers, so use TImode. */
1200 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1202 /* Nonzero if access to memory by bytes is no faster than for words.
1203 Also non-zero if doing byte operations (specifically shifts) in registers
1206 On the Alpha, we want to not use the byte operation and instead use
1207 masking operations to access fields; these will save instructions. */
1209 #define SLOW_BYTE_ACCESS 1
1211 /* Define if normal loads of shorter-than-word items from memory clears
1212 the rest of the bits in the register. */
1213 /* #define BYTE_LOADS_ZERO_EXTEND */
1215 /* Define if normal loads of shorter-than-word items from memory sign-extends
1216 the rest of the bits in the register. */
1217 #define BYTE_LOADS_SIGN_EXTEND
1219 /* We aren't doing ANYTHING about debugging for now. */
1220 /* #define SDB_DEBUGGING_INFO */
1222 /* Do not break .stabs pseudos into continuations. */
1223 #define DBX_CONTIN_LENGTH 0
1225 /* Don't try to use the `x' type-cross-reference character in DBX data.
1226 Also has the consequence of putting each struct, union or enum
1227 into a separate .stabs, containing only cross-refs to the others. */
1228 #define DBX_NO_XREFS
1230 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1231 is done just by pretending it is already truncated. */
1232 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1234 /* We assume that the store-condition-codes instructions store 0 for false
1235 and some other value for true. This is the value stored for true. */
1237 #define STORE_FLAG_VALUE 1
1239 /* Define the value returned by a floating-point comparison instruction. */
1241 #define FLOAT_STORE_FLAG_VALUE 0.5
1243 /* Specify the machine mode that pointers have.
1244 After generation of rtl, the compiler makes no further distinction
1245 between pointers and any other objects of this machine mode. */
1246 #define Pmode DImode
1248 /* Mode of a function address in a call instruction (for indexing purposes). */
1250 #define FUNCTION_MODE Pmode
1252 /* Define this if addresses of constant functions
1253 shouldn't be put through pseudo regs where they can be cse'd.
1254 Desirable on machines where ordinary constants are expensive
1255 but a CALL with constant address is cheap.
1257 We define this on the Alpha so that gen_call and gen_call_value
1258 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1259 then copy it into a register, thus actually letting the address be
1262 #define NO_FUNCTION_CSE
1264 /* Define this if shift instructions ignore all but the low-order
1266 #define SHIFT_COUNT_TRUNCATED
1268 /* Compute the cost of computing a constant rtl expression RTX
1269 whose rtx-code is CODE. The body of this macro is a portion
1270 of a switch statement. If the code is computed here,
1271 return it with a return statement. Otherwise, break from the switch.
1273 We only care about the cost if it is valid in an insn, so all constants
1276 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1278 case CONST_DOUBLE: \
1285 /* Provide the costs of a rtl expression. This is in the body of a
1288 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1291 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1292 return COSTS_N_INSNS (6); \
1295 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1296 return COSTS_N_INSNS (6); \
1298 return COSTS_N_INSNS (21); \
1303 if (GET_MODE (X) == SFmode) \
1304 return COSTS_N_INSNS (34); \
1305 else if (GET_MODE (X) == DFmode) \
1306 return COSTS_N_INSNS (63); \
1308 return COSTS_N_INSNS (70); \
1310 return COSTS_N_INSNS (3);
1312 /* Control the assembler format that we output. */
1314 /* Output at beginning of assembler file. */
1316 #define ASM_FILE_START(FILE) \
1317 { char *p, *after_dir = main_input_filename; \
1319 alpha_write_verstamp (FILE); \
1320 fprintf (FILE, "\t.set noreorder\n"); \
1321 fprintf (FILE, "\t.set noat\n"); \
1322 for (p = main_input_filename; *p; p++) \
1324 after_dir = p + 1; \
1325 fprintf (FILE, "\n\t.file 2 \"%s\"\n", after_dir); \
1328 /* Output to assembler file text saying following lines
1329 may contain character constants, extra white space, comments, etc. */
1331 #define ASM_APP_ON ""
1333 /* Output to assembler file text saying following lines
1334 no longer contain unusual constructs. */
1336 #define ASM_APP_OFF ""
1338 #define TEXT_SECTION_ASM_OP ".text"
1340 /* Output before read-only data. */
1342 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1344 /* Output before writable data. */
1346 #define DATA_SECTION_ASM_OP ".data"
1348 /* Define an extra section for read-only data, a routine to enter it, and
1349 indicate that it is for read-only data. */
1351 #define EXTRA_SECTIONS readonly_data
1353 #define EXTRA_SECTION_FUNCTIONS \
1355 literal_section () \
1357 if (in_section != readonly_data) \
1359 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1360 in_section = readonly_data; \
1364 #define READONLY_DATA_SECTION literal_section
1366 /* If we are referencing a function that is static or is known to be
1367 in this file, make the SYMBOL_REF special. We can use this to see
1368 indicate that we can branch to this function without setting PV or
1371 #define ENCODE_SECTION_INFO(DECL) \
1372 if (TREE_CODE (DECL) == FUNCTION_DECL \
1373 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL))) \
1374 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1376 /* How to refer to registers in assembler output.
1377 This sequence is indexed by compiler's hard-register-number (see above). */
1379 #define REGISTER_NAMES \
1380 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1381 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1382 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1383 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1384 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1385 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1386 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1387 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31"}
1389 /* How to renumber registers for dbx and gdb. */
1391 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1393 /* This is how to output the definition of a user-level label named NAME,
1394 such as the label on a static function or variable NAME. */
1396 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1397 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1399 /* This is how to output a command to make the user-level label named NAME
1400 defined for reference from other files. */
1402 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1403 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1405 /* This is how to output a reference to a user-level label named NAME.
1406 `assemble_name' uses this. */
1408 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1409 fprintf (FILE, "%s", NAME)
1411 /* This is how to output an internal numbered label where
1412 PREFIX is the class of label and NUM is the number within the class. */
1414 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1415 if ((PREFIX)[0] == 'L') \
1416 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1418 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1420 /* This is how to output a label for a jump table. Arguments are the same as
1421 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1424 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1425 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1427 /* This is how to store into the string LABEL
1428 the symbol_ref name of an internal numbered label where
1429 PREFIX is the class of label and NUM is the number within the class.
1430 This is suitable for output with `assemble_name'. */
1432 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1433 if ((PREFIX)[0] == 'L') \
1434 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1436 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1438 /* This is how to output an assembler line defining a `double' constant. */
1440 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1441 fprintf (FILE, "\t.t_floating %.20e\n", (VALUE))
1443 /* This is how to output an assembler line defining a `float' constant. */
1445 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1446 fprintf (FILE, "\t.s_floating %.20e\n", (VALUE))
1448 /* This is how to output an assembler line defining an `int' constant. */
1450 #define ASM_OUTPUT_INT(FILE,VALUE) \
1451 ( fprintf (FILE, "\t.long "), \
1452 output_addr_const (FILE, (VALUE)), \
1453 fprintf (FILE, "\n"))
1455 /* This is how to output an assembler line defining a `long' constant. */
1457 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1458 ( fprintf (FILE, "\t.quad "), \
1459 output_addr_const (FILE, (VALUE)), \
1460 fprintf (FILE, "\n"))
1462 /* Likewise for `char' and `short' constants. */
1464 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1465 ( fprintf (FILE, "\t.word "), \
1466 output_addr_const (FILE, (VALUE)), \
1467 fprintf (FILE, "\n"))
1469 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1470 ( fprintf (FILE, "\t.byte "), \
1471 output_addr_const (FILE, (VALUE)), \
1472 fprintf (FILE, "\n"))
1474 /* We use the default ASCII-output routine, except that we don't write more
1475 than 50 characters since the assembler doesn't support very long lines. */
1477 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1479 FILE *_hide_asm_out_file = (MYFILE); \
1480 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1481 int _hide_thissize = (MYLENGTH); \
1482 int _size_so_far = 0; \
1484 FILE *asm_out_file = _hide_asm_out_file; \
1485 unsigned char *p = _hide_p; \
1486 int thissize = _hide_thissize; \
1488 fprintf (asm_out_file, "\t.ascii \""); \
1490 for (i = 0; i < thissize; i++) \
1492 register int c = p[i]; \
1494 if (_size_so_far ++ > 50 && i < thissize - 4) \
1495 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1497 if (c == '\"' || c == '\\') \
1498 putc ('\\', asm_out_file); \
1499 if (c >= ' ' && c < 0177) \
1500 putc (c, asm_out_file); \
1503 fprintf (asm_out_file, "\\%o", c); \
1504 /* After an octal-escape, if a digit follows, \
1505 terminate one string constant and start another. \
1506 The Vax assembler fails to stop reading the escape \
1507 after three digits, so this is the only way we \
1508 can get it to parse the data properly. */ \
1509 if (i < thissize - 1 \
1510 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1511 fprintf (asm_out_file, "\"\n\t.ascii \""); \
1514 fprintf (asm_out_file, "\"\n"); \
1518 /* This is how to output an insn to push a register on the stack.
1519 It need not be very fast code. */
1521 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1522 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1523 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1526 /* This is how to output an insn to pop a register from the stack.
1527 It need not be very fast code. */
1529 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1530 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1531 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1534 /* This is how to output an assembler line for a numeric constant byte. */
1536 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1537 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1539 /* This is how to output an element of a case-vector that is absolute. */
1541 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1542 fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32)
1544 /* This is how to output an element of a case-vector that is relative.
1545 (Alpha does not use such vectors, but we must define this macro anyway.) */
1547 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) abort ()
1549 /* This is how to output an assembler line
1550 that says to advance the location counter
1551 to a multiple of 2**LOG bytes. */
1553 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1555 fprintf (FILE, "\t.align %d\n", LOG);
1557 /* This is how to advance the location counter by SIZE bytes. */
1559 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1560 fprintf (FILE, "\t.space %d\n", (SIZE))
1562 /* This says how to output an assembler line
1563 to define a global common symbol. */
1565 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1566 ( fputs ("\t.comm ", (FILE)), \
1567 assemble_name ((FILE), (NAME)), \
1568 fprintf ((FILE), ",%d\n", (SIZE)))
1570 /* This says how to output an assembler line
1571 to define a local common symbol. */
1573 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1574 ( fputs ("\t.lcomm ", (FILE)), \
1575 assemble_name ((FILE), (NAME)), \
1576 fprintf ((FILE), ",%d\n", (SIZE)))
1578 /* Store in OUTPUT a string (made with alloca) containing
1579 an assembler-name for a local static variable named NAME.
1580 LABELNO is an integer which is different for each call. */
1582 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1583 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1584 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1586 /* Define the parentheses used to group arithmetic operations
1587 in assembler code. */
1589 #define ASM_OPEN_PAREN "("
1590 #define ASM_CLOSE_PAREN ")"
1592 /* Define results of standard character escape sequences. */
1593 #define TARGET_BELL 007
1594 #define TARGET_BS 010
1595 #define TARGET_TAB 011
1596 #define TARGET_NEWLINE 012
1597 #define TARGET_VT 013
1598 #define TARGET_FF 014
1599 #define TARGET_CR 015
1601 /* Print operand X (an rtx) in assembler syntax to file FILE.
1602 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1603 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1605 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1607 /* Determine which codes are valid without a following integer. These must
1608 not be alphabetic. */
1610 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1612 /* Print a memory address as an operand to reference that memory location. */
1614 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1615 { rtx addr = (ADDR); \
1617 HOST_WIDE_INT offset = 0; \
1619 if (GET_CODE (addr) == AND) \
1620 addr = XEXP (addr, 0); \
1622 if (GET_CODE (addr) == REG) \
1623 basereg = REGNO (addr); \
1624 else if (GET_CODE (addr) == CONST_INT) \
1625 offset = INTVAL (addr); \
1626 else if (GET_CODE (addr) == PLUS \
1627 && GET_CODE (XEXP (addr, 0)) == REG \
1628 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1629 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
1633 fprintf (FILE, "%d($%d)", offset, basereg); \
1635 /* Define the codes that are matched by predicates in alpha.c. */
1637 #define PREDICATE_CODES \
1638 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1639 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1640 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1641 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1642 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1643 {"const48_operand", {CONST_INT}}, \
1644 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1645 {"mode_mask_operand", {CONST_INT}}, \
1646 {"mul8_operand", {CONST_INT}}, \
1647 {"mode_width_operand", {CONST_INT}}, \
1648 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1649 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1650 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1651 {"fp0_operand", {CONST_DOUBLE}}, \
1652 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1653 SYMBOL_REF, CONST, LABEL_REF}}, \
1654 {"aligned_memory_operand", {MEM}}, \
1655 {"unaligned_memory_operand", {MEM}}, \
1656 {"any_memory_operand", {MEM}},
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