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1 /* Alias analysis for GNU C
2 Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
3 Contributed by John Carr (jfc@mit.edu).
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 #include "config.h"
23 #include "system.h"
24 #include "rtl.h"
25 #include "tree.h"
26 #include "tm_p.h"
27 #include "function.h"
28 #include "insn-flags.h"
29 #include "expr.h"
30 #include "regs.h"
31 #include "hard-reg-set.h"
32 #include "flags.h"
33 #include "output.h"
34 #include "toplev.h"
35 #include "cselib.h"
36 #include "splay-tree.h"
37 #include "ggc.h"
38
39 /* The alias sets assigned to MEMs assist the back-end in determining
40 which MEMs can alias which other MEMs. In general, two MEMs in
41 different alias sets cannot alias each other, with one important
42 exception. Consider something like:
43
44 struct S {int i; double d; };
45
46 a store to an `S' can alias something of either type `int' or type
47 `double'. (However, a store to an `int' cannot alias a `double'
48 and vice versa.) We indicate this via a tree structure that looks
49 like:
50 struct S
51 / \
52 / \
53 |/_ _\|
54 int double
55
56 (The arrows are directed and point downwards.)
57 In this situation we say the alias set for `struct S' is the
58 `superset' and that those for `int' and `double' are `subsets'.
59
60 To see whether two alias sets can point to the same memory, we must
61 see if either alias set is a subset of the other. We need not trace
62 past immediate decendents, however, since we propagate all
63 grandchildren up one level.
64
65 Alias set zero is implicitly a superset of all other alias sets.
66 However, this is no actual entry for alias set zero. It is an
67 error to attempt to explicitly construct a subset of zero. */
68
69 typedef struct alias_set_entry
70 {
71 /* The alias set number, as stored in MEM_ALIAS_SET. */
72 HOST_WIDE_INT alias_set;
73
74 /* The children of the alias set. These are not just the immediate
75 children, but, in fact, all decendents. So, if we have:
76
77 struct T { struct S s; float f; }
78
79 continuing our example above, the children here will be all of
80 `int', `double', `float', and `struct S'. */
81 splay_tree children;
82
83 /* Nonzero if would have a child of zero: this effectively makes this
84 alias set the same as alias set zero. */
85 int has_zero_child;
86 } *alias_set_entry;
87
88 static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
89 static rtx find_symbolic_term PARAMS ((rtx));
90 static rtx get_addr PARAMS ((rtx));
91 static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
92 HOST_WIDE_INT));
93 static void record_set PARAMS ((rtx, rtx, void *));
94 static rtx find_base_term PARAMS ((rtx));
95 static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
96 enum machine_mode));
97 static rtx find_base_value PARAMS ((rtx));
98 static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
99 static int insert_subset_children PARAMS ((splay_tree_node, void*));
100 static tree find_base_decl PARAMS ((tree));
101 static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
102 static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
103 int (*) (rtx)));
104 static int aliases_everything_p PARAMS ((rtx));
105 static int write_dependence_p PARAMS ((rtx, rtx, int));
106 static int nonlocal_reference_p PARAMS ((rtx));
107
108 /* Set up all info needed to perform alias analysis on memory references. */
109
110 /* Returns the size in bytes of the mode of X. */
111 #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
112
113 /* Returns nonzero if MEM1 and MEM2 do not alias because they are in
114 different alias sets. We ignore alias sets in functions making use
115 of variable arguments because the va_arg macros on some systems are
116 not legal ANSI C. */
117 #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
118 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
119
120 /* Cap the number of passes we make over the insns propagating alias
121 information through set chains. 10 is a completely arbitrary choice. */
122 #define MAX_ALIAS_LOOP_PASSES 10
123
124 /* reg_base_value[N] gives an address to which register N is related.
125 If all sets after the first add or subtract to the current value
126 or otherwise modify it so it does not point to a different top level
127 object, reg_base_value[N] is equal to the address part of the source
128 of the first set.
129
130 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
131 expressions represent certain special values: function arguments and
132 the stack, frame, and argument pointers.
133
134 The contents of an ADDRESS is not normally used, the mode of the
135 ADDRESS determines whether the ADDRESS is a function argument or some
136 other special value. Pointer equality, not rtx_equal_p, determines whether
137 two ADDRESS expressions refer to the same base address.
138
139 The only use of the contents of an ADDRESS is for determining if the
140 current function performs nonlocal memory memory references for the
141 purposes of marking the function as a constant function. */
142
143 static rtx *reg_base_value;
144 static rtx *new_reg_base_value;
145 static unsigned int reg_base_value_size; /* size of reg_base_value array */
146
147 #define REG_BASE_VALUE(X) \
148 (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
149
150 /* Vector of known invariant relationships between registers. Set in
151 loop unrolling. Indexed by register number, if nonzero the value
152 is an expression describing this register in terms of another.
153
154 The length of this array is REG_BASE_VALUE_SIZE.
155
156 Because this array contains only pseudo registers it has no effect
157 after reload. */
158 static rtx *alias_invariant;
159
160 /* Vector indexed by N giving the initial (unchanging) value known for
161 pseudo-register N. This array is initialized in
162 init_alias_analysis, and does not change until end_alias_analysis
163 is called. */
164 rtx *reg_known_value;
165
166 /* Indicates number of valid entries in reg_known_value. */
167 static unsigned int reg_known_value_size;
168
169 /* Vector recording for each reg_known_value whether it is due to a
170 REG_EQUIV note. Future passes (viz., reload) may replace the
171 pseudo with the equivalent expression and so we account for the
172 dependences that would be introduced if that happens.
173
174 The REG_EQUIV notes created in assign_parms may mention the arg
175 pointer, and there are explicit insns in the RTL that modify the
176 arg pointer. Thus we must ensure that such insns don't get
177 scheduled across each other because that would invalidate the
178 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
179 wrong, but solving the problem in the scheduler will likely give
180 better code, so we do it here. */
181 char *reg_known_equiv_p;
182
183 /* True when scanning insns from the start of the rtl to the
184 NOTE_INSN_FUNCTION_BEG note. */
185 static int copying_arguments;
186
187 /* The splay-tree used to store the various alias set entries. */
188 static splay_tree alias_sets;
189 \f
190 /* Returns a pointer to the alias set entry for ALIAS_SET, if there is
191 such an entry, or NULL otherwise. */
192
193 static alias_set_entry
194 get_alias_set_entry (alias_set)
195 HOST_WIDE_INT alias_set;
196 {
197 splay_tree_node sn
198 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
199
200 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
201 }
202
203 /* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
204 the two MEMs cannot alias each other. */
205
206 static int
207 mems_in_disjoint_alias_sets_p (mem1, mem2)
208 rtx mem1;
209 rtx mem2;
210 {
211 alias_set_entry ase;
212
213 #ifdef ENABLE_CHECKING
214 /* Perform a basic sanity check. Namely, that there are no alias sets
215 if we're not using strict aliasing. This helps to catch bugs
216 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
217 where a MEM is allocated in some way other than by the use of
218 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
219 use alias sets to indicate that spilled registers cannot alias each
220 other, we might need to remove this check. */
221 if (! flag_strict_aliasing
222 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
223 abort ();
224 #endif
225
226 /* The code used in varargs macros are often not conforming ANSI C,
227 which can trick the compiler into making incorrect aliasing
228 assumptions in these functions. So, we don't use alias sets in
229 such a function. FIXME: This should be moved into the front-end;
230 it is a language-dependent notion, and there's no reason not to
231 still use these checks to handle globals. */
232 if (current_function_stdarg || current_function_varargs)
233 return 0;
234
235 /* If have no alias set information for one of the MEMs, we have to assume
236 it can alias anything. */
237 if (MEM_ALIAS_SET (mem1) == 0 || MEM_ALIAS_SET (mem2) == 0)
238 return 0;
239
240 /* If the two alias sets are the same, they may alias. */
241 if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2))
242 return 0;
243
244 /* See if the first alias set is a subset of the second. */
245 ase = get_alias_set_entry (MEM_ALIAS_SET (mem1));
246 if (ase != 0
247 && (ase->has_zero_child
248 || splay_tree_lookup (ase->children,
249 (splay_tree_key) MEM_ALIAS_SET (mem2))))
250 return 0;
251
252 /* Now do the same, but with the alias sets reversed. */
253 ase = get_alias_set_entry (MEM_ALIAS_SET (mem2));
254 if (ase != 0
255 && (ase->has_zero_child
256 || splay_tree_lookup (ase->children,
257 (splay_tree_key) MEM_ALIAS_SET (mem1))))
258 return 0;
259
260 /* The two MEMs are in distinct alias sets, and neither one is the
261 child of the other. Therefore, they cannot alias. */
262 return 1;
263 }
264
265 /* Insert the NODE into the splay tree given by DATA. Used by
266 record_alias_subset via splay_tree_foreach. */
267
268 static int
269 insert_subset_children (node, data)
270 splay_tree_node node;
271 void *data;
272 {
273 splay_tree_insert ((splay_tree) data, node->key, node->value);
274
275 return 0;
276 }
277 \f
278 /* T is an expression with pointer type. Find the DECL on which this
279 expression is based. (For example, in `a[i]' this would be `a'.)
280 If there is no such DECL, or a unique decl cannot be determined,
281 NULL_TREE is retured. */
282
283 static tree
284 find_base_decl (t)
285 tree t;
286 {
287 tree d0, d1, d2;
288
289 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
290 return 0;
291
292 /* If this is a declaration, return it. */
293 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
294 return t;
295
296 /* Handle general expressions. It would be nice to deal with
297 COMPONENT_REFs here. If we could tell that `a' and `b' were the
298 same, then `a->f' and `b->f' are also the same. */
299 switch (TREE_CODE_CLASS (TREE_CODE (t)))
300 {
301 case '1':
302 return find_base_decl (TREE_OPERAND (t, 0));
303
304 case '2':
305 /* Return 0 if found in neither or both are the same. */
306 d0 = find_base_decl (TREE_OPERAND (t, 0));
307 d1 = find_base_decl (TREE_OPERAND (t, 1));
308 if (d0 == d1)
309 return d0;
310 else if (d0 == 0)
311 return d1;
312 else if (d1 == 0)
313 return d0;
314 else
315 return 0;
316
317 case '3':
318 d0 = find_base_decl (TREE_OPERAND (t, 0));
319 d1 = find_base_decl (TREE_OPERAND (t, 1));
320 d0 = find_base_decl (TREE_OPERAND (t, 0));
321 d2 = find_base_decl (TREE_OPERAND (t, 2));
322
323 /* Set any nonzero values from the last, then from the first. */
324 if (d1 == 0) d1 = d2;
325 if (d0 == 0) d0 = d1;
326 if (d1 == 0) d1 = d0;
327 if (d2 == 0) d2 = d1;
328
329 /* At this point all are nonzero or all are zero. If all three are the
330 same, return it. Otherwise, return zero. */
331 return (d0 == d1 && d1 == d2) ? d0 : 0;
332
333 default:
334 return 0;
335 }
336 }
337
338 /* Return the alias set for T, which may be either a type or an
339 expression. Call language-specific routine for help, if needed. */
340
341 HOST_WIDE_INT
342 get_alias_set (t)
343 tree t;
344 {
345 tree orig_t;
346 HOST_WIDE_INT set;
347
348 /* If we're not doing any alias analysis, just assume everything
349 aliases everything else. Also return 0 if this or its type is
350 an error. */
351 if (! flag_strict_aliasing || t == error_mark_node
352 || (! TYPE_P (t)
353 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
354 return 0;
355
356 /* We can be passed either an expression or a type. This and the
357 language-specific routine may make mutually-recursive calls to
358 each other to figure out what to do. At each juncture, we see if
359 this is a tree that the language may need to handle specially.
360 First handle things that aren't types and start by removing nops
361 since we care only about the actual object. */
362 if (! TYPE_P (t))
363 {
364 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
365 || TREE_CODE (t) == NON_LVALUE_EXPR)
366 t = TREE_OPERAND (t, 0);
367
368 /* Now give the language a chance to do something but record what we
369 gave it this time. */
370 orig_t = t;
371 if ((set = lang_get_alias_set (t)) != -1)
372 return set;
373
374 /* Now loop the same way as get_inner_reference and get the alias
375 set to use. Pick up the outermost object that we could have
376 a pointer to. */
377 while (1)
378 {
379 /* Unnamed bitfields are not an addressable object. */
380 if (TREE_CODE (t) == BIT_FIELD_REF)
381 ;
382 else if (TREE_CODE (t) == COMPONENT_REF)
383 {
384 if (! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)))
385 /* Stop at an adressable decl. */
386 break;
387 }
388 else if (TREE_CODE (t) == ARRAY_REF)
389 {
390 if (! TYPE_NONALIASED_COMPONENT
391 (TREE_TYPE (TREE_OPERAND (t, 0))))
392 /* Stop at an addresssable array element. */
393 break;
394 }
395 else if (TREE_CODE (t) != NON_LVALUE_EXPR
396 && ! ((TREE_CODE (t) == NOP_EXPR
397 || TREE_CODE (t) == CONVERT_EXPR)
398 && (TYPE_MODE (TREE_TYPE (t))
399 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0))))))
400 /* Stop if not one of above and not mode-preserving conversion. */
401 break;
402
403 t = TREE_OPERAND (t, 0);
404 }
405
406 if (TREE_CODE (t) == INDIRECT_REF)
407 {
408 /* Check for accesses through restrict-qualified pointers. */
409 tree decl = find_base_decl (TREE_OPERAND (t, 0));
410
411 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
412 /* We use the alias set indicated in the declaration. */
413 return DECL_POINTER_ALIAS_SET (decl);
414
415 /* If we have an INDIRECT_REF via a void pointer, we don't
416 know anything about what that might alias. */
417 if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE)
418 return 0;
419 }
420
421 /* Give the language another chance to do something special. */
422 if (orig_t != t
423 && (set = lang_get_alias_set (t)) != -1)
424 return set;
425
426 /* Now all we care about is the type. */
427 t = TREE_TYPE (t);
428 }
429
430 /* Variant qualifiers don't affect the alias set, so get the main
431 variant. If this is a type with a known alias set, return it. */
432 t = TYPE_MAIN_VARIANT (t);
433 if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t))
434 return TYPE_ALIAS_SET (t);
435
436 /* See if the language has special handling for this type. */
437 if ((set = lang_get_alias_set (t)) != -1)
438 {
439 /* If the alias set is now known, we are done. */
440 if (TYPE_ALIAS_SET_KNOWN_P (t))
441 return TYPE_ALIAS_SET (t);
442 }
443
444 /* There are no objects of FUNCTION_TYPE, so there's no point in
445 using up an alias set for them. (There are, of course, pointers
446 and references to functions, but that's different.) */
447 else if (TREE_CODE (t) == FUNCTION_TYPE)
448 set = 0;
449 else
450 /* Otherwise make a new alias set for this type. */
451 set = new_alias_set ();
452
453 TYPE_ALIAS_SET (t) = set;
454
455 /* If this is an aggregate type, we must record any component aliasing
456 information. */
457 if (AGGREGATE_TYPE_P (t))
458 record_component_aliases (t);
459
460 return set;
461 }
462
463 /* Return a brand-new alias set. */
464
465 HOST_WIDE_INT
466 new_alias_set ()
467 {
468 static HOST_WIDE_INT last_alias_set;
469
470 if (flag_strict_aliasing)
471 return ++last_alias_set;
472 else
473 return 0;
474 }
475
476 /* Indicate that things in SUBSET can alias things in SUPERSET, but
477 not vice versa. For example, in C, a store to an `int' can alias a
478 structure containing an `int', but not vice versa. Here, the
479 structure would be the SUPERSET and `int' the SUBSET. This
480 function should be called only once per SUPERSET/SUBSET pair.
481
482 It is illegal for SUPERSET to be zero; everything is implicitly a
483 subset of alias set zero. */
484
485 void
486 record_alias_subset (superset, subset)
487 HOST_WIDE_INT superset;
488 HOST_WIDE_INT subset;
489 {
490 alias_set_entry superset_entry;
491 alias_set_entry subset_entry;
492
493 if (superset == 0)
494 abort ();
495
496 superset_entry = get_alias_set_entry (superset);
497 if (superset_entry == 0)
498 {
499 /* Create an entry for the SUPERSET, so that we have a place to
500 attach the SUBSET. */
501 superset_entry
502 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
503 superset_entry->alias_set = superset;
504 superset_entry->children
505 = splay_tree_new (splay_tree_compare_ints, 0, 0);
506 superset_entry->has_zero_child = 0;
507 splay_tree_insert (alias_sets, (splay_tree_key) superset,
508 (splay_tree_value) superset_entry);
509 }
510
511 if (subset == 0)
512 superset_entry->has_zero_child = 1;
513 else
514 {
515 subset_entry = get_alias_set_entry (subset);
516 /* If there is an entry for the subset, enter all of its children
517 (if they are not already present) as children of the SUPERSET. */
518 if (subset_entry)
519 {
520 if (subset_entry->has_zero_child)
521 superset_entry->has_zero_child = 1;
522
523 splay_tree_foreach (subset_entry->children, insert_subset_children,
524 superset_entry->children);
525 }
526
527 /* Enter the SUBSET itself as a child of the SUPERSET. */
528 splay_tree_insert (superset_entry->children,
529 (splay_tree_key) subset, 0);
530 }
531 }
532
533 /* Record that component types of TYPE, if any, are part of that type for
534 aliasing purposes. For record types, we only record component types
535 for fields that are marked addressable. For array types, we always
536 record the component types, so the front end should not call this
537 function if the individual component aren't addressable. */
538
539 void
540 record_component_aliases (type)
541 tree type;
542 {
543 HOST_WIDE_INT superset = get_alias_set (type);
544 tree field;
545
546 if (superset == 0)
547 return;
548
549 switch (TREE_CODE (type))
550 {
551 case ARRAY_TYPE:
552 if (! TYPE_NONALIASED_COMPONENT (type))
553 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
554 break;
555
556 case RECORD_TYPE:
557 case UNION_TYPE:
558 case QUAL_UNION_TYPE:
559 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
560 if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field))
561 record_alias_subset (superset, get_alias_set (TREE_TYPE (field)));
562 break;
563
564 default:
565 break;
566 }
567 }
568
569 /* Allocate an alias set for use in storing and reading from the varargs
570 spill area. */
571
572 HOST_WIDE_INT
573 get_varargs_alias_set ()
574 {
575 static HOST_WIDE_INT set = -1;
576
577 if (set == -1)
578 set = new_alias_set ();
579
580 return set;
581 }
582
583 /* Likewise, but used for the fixed portions of the frame, e.g., register
584 save areas. */
585
586 HOST_WIDE_INT
587 get_frame_alias_set ()
588 {
589 static HOST_WIDE_INT set = -1;
590
591 if (set == -1)
592 set = new_alias_set ();
593
594 return set;
595 }
596
597 /* Inside SRC, the source of a SET, find a base address. */
598
599 static rtx
600 find_base_value (src)
601 register rtx src;
602 {
603 switch (GET_CODE (src))
604 {
605 case SYMBOL_REF:
606 case LABEL_REF:
607 return src;
608
609 case REG:
610 /* At the start of a function, argument registers have known base
611 values which may be lost later. Returning an ADDRESS
612 expression here allows optimization based on argument values
613 even when the argument registers are used for other purposes. */
614 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
615 return new_reg_base_value[REGNO (src)];
616
617 /* If a pseudo has a known base value, return it. Do not do this
618 for hard regs since it can result in a circular dependency
619 chain for registers which have values at function entry.
620
621 The test above is not sufficient because the scheduler may move
622 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
623 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
624 && (unsigned) REGNO (src) < reg_base_value_size
625 && reg_base_value[REGNO (src)])
626 return reg_base_value[REGNO (src)];
627
628 return src;
629
630 case MEM:
631 /* Check for an argument passed in memory. Only record in the
632 copying-arguments block; it is too hard to track changes
633 otherwise. */
634 if (copying_arguments
635 && (XEXP (src, 0) == arg_pointer_rtx
636 || (GET_CODE (XEXP (src, 0)) == PLUS
637 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
638 return gen_rtx_ADDRESS (VOIDmode, src);
639 return 0;
640
641 case CONST:
642 src = XEXP (src, 0);
643 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
644 break;
645
646 /* ... fall through ... */
647
648 case PLUS:
649 case MINUS:
650 {
651 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
652
653 /* If either operand is a REG, then see if we already have
654 a known value for it. */
655 if (GET_CODE (src_0) == REG)
656 {
657 temp = find_base_value (src_0);
658 if (temp != 0)
659 src_0 = temp;
660 }
661
662 if (GET_CODE (src_1) == REG)
663 {
664 temp = find_base_value (src_1);
665 if (temp!= 0)
666 src_1 = temp;
667 }
668
669 /* Guess which operand is the base address:
670 If either operand is a symbol, then it is the base. If
671 either operand is a CONST_INT, then the other is the base. */
672 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
673 return find_base_value (src_0);
674 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
675 return find_base_value (src_1);
676
677 /* This might not be necessary anymore:
678 If either operand is a REG that is a known pointer, then it
679 is the base. */
680 else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
681 return find_base_value (src_0);
682 else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
683 return find_base_value (src_1);
684
685 return 0;
686 }
687
688 case LO_SUM:
689 /* The standard form is (lo_sum reg sym) so look only at the
690 second operand. */
691 return find_base_value (XEXP (src, 1));
692
693 case AND:
694 /* If the second operand is constant set the base
695 address to the first operand. */
696 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
697 return find_base_value (XEXP (src, 0));
698 return 0;
699
700 case ZERO_EXTEND:
701 case SIGN_EXTEND: /* used for NT/Alpha pointers */
702 case HIGH:
703 return find_base_value (XEXP (src, 0));
704
705 default:
706 break;
707 }
708
709 return 0;
710 }
711
712 /* Called from init_alias_analysis indirectly through note_stores. */
713
714 /* While scanning insns to find base values, reg_seen[N] is nonzero if
715 register N has been set in this function. */
716 static char *reg_seen;
717
718 /* Addresses which are known not to alias anything else are identified
719 by a unique integer. */
720 static int unique_id;
721
722 static void
723 record_set (dest, set, data)
724 rtx dest, set;
725 void *data ATTRIBUTE_UNUSED;
726 {
727 register unsigned regno;
728 rtx src;
729
730 if (GET_CODE (dest) != REG)
731 return;
732
733 regno = REGNO (dest);
734
735 if (regno >= reg_base_value_size)
736 abort ();
737
738 if (set)
739 {
740 /* A CLOBBER wipes out any old value but does not prevent a previously
741 unset register from acquiring a base address (i.e. reg_seen is not
742 set). */
743 if (GET_CODE (set) == CLOBBER)
744 {
745 new_reg_base_value[regno] = 0;
746 return;
747 }
748 src = SET_SRC (set);
749 }
750 else
751 {
752 if (reg_seen[regno])
753 {
754 new_reg_base_value[regno] = 0;
755 return;
756 }
757 reg_seen[regno] = 1;
758 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
759 GEN_INT (unique_id++));
760 return;
761 }
762
763 /* This is not the first set. If the new value is not related to the
764 old value, forget the base value. Note that the following code is
765 not detected:
766 extern int x, y; int *p = &x; p += (&y-&x);
767 ANSI C does not allow computing the difference of addresses
768 of distinct top level objects. */
769 if (new_reg_base_value[regno])
770 switch (GET_CODE (src))
771 {
772 case LO_SUM:
773 case PLUS:
774 case MINUS:
775 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
776 new_reg_base_value[regno] = 0;
777 break;
778 case AND:
779 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
780 new_reg_base_value[regno] = 0;
781 break;
782 default:
783 new_reg_base_value[regno] = 0;
784 break;
785 }
786 /* If this is the first set of a register, record the value. */
787 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
788 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
789 new_reg_base_value[regno] = find_base_value (src);
790
791 reg_seen[regno] = 1;
792 }
793
794 /* Called from loop optimization when a new pseudo-register is
795 created. It indicates that REGNO is being set to VAL. f INVARIANT
796 is true then this value also describes an invariant relationship
797 which can be used to deduce that two registers with unknown values
798 are different. */
799
800 void
801 record_base_value (regno, val, invariant)
802 unsigned int regno;
803 rtx val;
804 int invariant;
805 {
806 if (regno >= reg_base_value_size)
807 return;
808
809 if (invariant && alias_invariant)
810 alias_invariant[regno] = val;
811
812 if (GET_CODE (val) == REG)
813 {
814 if (REGNO (val) < reg_base_value_size)
815 reg_base_value[regno] = reg_base_value[REGNO (val)];
816
817 return;
818 }
819
820 reg_base_value[regno] = find_base_value (val);
821 }
822
823 /* Returns a canonical version of X, from the point of view alias
824 analysis. (For example, if X is a MEM whose address is a register,
825 and the register has a known value (say a SYMBOL_REF), then a MEM
826 whose address is the SYMBOL_REF is returned.) */
827
828 rtx
829 canon_rtx (x)
830 rtx x;
831 {
832 /* Recursively look for equivalences. */
833 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
834 && REGNO (x) < reg_known_value_size)
835 return reg_known_value[REGNO (x)] == x
836 ? x : canon_rtx (reg_known_value[REGNO (x)]);
837 else if (GET_CODE (x) == PLUS)
838 {
839 rtx x0 = canon_rtx (XEXP (x, 0));
840 rtx x1 = canon_rtx (XEXP (x, 1));
841
842 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
843 {
844 /* We can tolerate LO_SUMs being offset here; these
845 rtl are used for nothing other than comparisons. */
846 if (GET_CODE (x0) == CONST_INT)
847 return plus_constant_for_output (x1, INTVAL (x0));
848 else if (GET_CODE (x1) == CONST_INT)
849 return plus_constant_for_output (x0, INTVAL (x1));
850 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
851 }
852 }
853
854 /* This gives us much better alias analysis when called from
855 the loop optimizer. Note we want to leave the original
856 MEM alone, but need to return the canonicalized MEM with
857 all the flags with their original values. */
858 else if (GET_CODE (x) == MEM)
859 {
860 rtx addr = canon_rtx (XEXP (x, 0));
861
862 if (addr != XEXP (x, 0))
863 {
864 rtx new = gen_rtx_MEM (GET_MODE (x), addr);
865
866 MEM_COPY_ATTRIBUTES (new, x);
867 x = new;
868 }
869 }
870 return x;
871 }
872
873 /* Return 1 if X and Y are identical-looking rtx's.
874
875 We use the data in reg_known_value above to see if two registers with
876 different numbers are, in fact, equivalent. */
877
878 static int
879 rtx_equal_for_memref_p (x, y)
880 rtx x, y;
881 {
882 register int i;
883 register int j;
884 register enum rtx_code code;
885 register const char *fmt;
886
887 if (x == 0 && y == 0)
888 return 1;
889 if (x == 0 || y == 0)
890 return 0;
891
892 x = canon_rtx (x);
893 y = canon_rtx (y);
894
895 if (x == y)
896 return 1;
897
898 code = GET_CODE (x);
899 /* Rtx's of different codes cannot be equal. */
900 if (code != GET_CODE (y))
901 return 0;
902
903 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
904 (REG:SI x) and (REG:HI x) are NOT equivalent. */
905
906 if (GET_MODE (x) != GET_MODE (y))
907 return 0;
908
909 /* Some RTL can be compared without a recursive examination. */
910 switch (code)
911 {
912 case REG:
913 return REGNO (x) == REGNO (y);
914
915 case LABEL_REF:
916 return XEXP (x, 0) == XEXP (y, 0);
917
918 case SYMBOL_REF:
919 return XSTR (x, 0) == XSTR (y, 0);
920
921 case CONST_INT:
922 case CONST_DOUBLE:
923 /* There's no need to compare the contents of CONST_DOUBLEs or
924 CONST_INTs because pointer equality is a good enough
925 comparison for these nodes. */
926 return 0;
927
928 case ADDRESSOF:
929 return (REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0))
930 && XINT (x, 1) == XINT (y, 1));
931
932 default:
933 break;
934 }
935
936 /* For commutative operations, the RTX match if the operand match in any
937 order. Also handle the simple binary and unary cases without a loop. */
938 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
939 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
940 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
941 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
942 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
943 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
944 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
945 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
946 else if (GET_RTX_CLASS (code) == '1')
947 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
948
949 /* Compare the elements. If any pair of corresponding elements
950 fail to match, return 0 for the whole things.
951
952 Limit cases to types which actually appear in addresses. */
953
954 fmt = GET_RTX_FORMAT (code);
955 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
956 {
957 switch (fmt[i])
958 {
959 case 'i':
960 if (XINT (x, i) != XINT (y, i))
961 return 0;
962 break;
963
964 case 'E':
965 /* Two vectors must have the same length. */
966 if (XVECLEN (x, i) != XVECLEN (y, i))
967 return 0;
968
969 /* And the corresponding elements must match. */
970 for (j = 0; j < XVECLEN (x, i); j++)
971 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
972 XVECEXP (y, i, j)) == 0)
973 return 0;
974 break;
975
976 case 'e':
977 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
978 return 0;
979 break;
980
981 /* This can happen for an asm which clobbers memory. */
982 case '0':
983 break;
984
985 /* It is believed that rtx's at this level will never
986 contain anything but integers and other rtx's,
987 except for within LABEL_REFs and SYMBOL_REFs. */
988 default:
989 abort ();
990 }
991 }
992 return 1;
993 }
994
995 /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
996 X and return it, or return 0 if none found. */
997
998 static rtx
999 find_symbolic_term (x)
1000 rtx x;
1001 {
1002 register int i;
1003 register enum rtx_code code;
1004 register const char *fmt;
1005
1006 code = GET_CODE (x);
1007 if (code == SYMBOL_REF || code == LABEL_REF)
1008 return x;
1009 if (GET_RTX_CLASS (code) == 'o')
1010 return 0;
1011
1012 fmt = GET_RTX_FORMAT (code);
1013 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1014 {
1015 rtx t;
1016
1017 if (fmt[i] == 'e')
1018 {
1019 t = find_symbolic_term (XEXP (x, i));
1020 if (t != 0)
1021 return t;
1022 }
1023 else if (fmt[i] == 'E')
1024 break;
1025 }
1026 return 0;
1027 }
1028
1029 static rtx
1030 find_base_term (x)
1031 register rtx x;
1032 {
1033 cselib_val *val;
1034 struct elt_loc_list *l;
1035
1036 #if defined (FIND_BASE_TERM)
1037 /* Try machine-dependent ways to find the base term. */
1038 x = FIND_BASE_TERM (x);
1039 #endif
1040
1041 switch (GET_CODE (x))
1042 {
1043 case REG:
1044 return REG_BASE_VALUE (x);
1045
1046 case ZERO_EXTEND:
1047 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
1048 case HIGH:
1049 case PRE_INC:
1050 case PRE_DEC:
1051 case POST_INC:
1052 case POST_DEC:
1053 return find_base_term (XEXP (x, 0));
1054
1055 case VALUE:
1056 val = CSELIB_VAL_PTR (x);
1057 for (l = val->locs; l; l = l->next)
1058 if ((x = find_base_term (l->loc)) != 0)
1059 return x;
1060 return 0;
1061
1062 case CONST:
1063 x = XEXP (x, 0);
1064 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1065 return 0;
1066 /* fall through */
1067 case LO_SUM:
1068 case PLUS:
1069 case MINUS:
1070 {
1071 rtx tmp1 = XEXP (x, 0);
1072 rtx tmp2 = XEXP (x, 1);
1073
1074 /* This is a litle bit tricky since we have to determine which of
1075 the two operands represents the real base address. Otherwise this
1076 routine may return the index register instead of the base register.
1077
1078 That may cause us to believe no aliasing was possible, when in
1079 fact aliasing is possible.
1080
1081 We use a few simple tests to guess the base register. Additional
1082 tests can certainly be added. For example, if one of the operands
1083 is a shift or multiply, then it must be the index register and the
1084 other operand is the base register. */
1085
1086 if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2))
1087 return find_base_term (tmp2);
1088
1089 /* If either operand is known to be a pointer, then use it
1090 to determine the base term. */
1091 if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1)))
1092 return find_base_term (tmp1);
1093
1094 if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2)))
1095 return find_base_term (tmp2);
1096
1097 /* Neither operand was known to be a pointer. Go ahead and find the
1098 base term for both operands. */
1099 tmp1 = find_base_term (tmp1);
1100 tmp2 = find_base_term (tmp2);
1101
1102 /* If either base term is named object or a special address
1103 (like an argument or stack reference), then use it for the
1104 base term. */
1105 if (tmp1 != 0
1106 && (GET_CODE (tmp1) == SYMBOL_REF
1107 || GET_CODE (tmp1) == LABEL_REF
1108 || (GET_CODE (tmp1) == ADDRESS
1109 && GET_MODE (tmp1) != VOIDmode)))
1110 return tmp1;
1111
1112 if (tmp2 != 0
1113 && (GET_CODE (tmp2) == SYMBOL_REF
1114 || GET_CODE (tmp2) == LABEL_REF
1115 || (GET_CODE (tmp2) == ADDRESS
1116 && GET_MODE (tmp2) != VOIDmode)))
1117 return tmp2;
1118
1119 /* We could not determine which of the two operands was the
1120 base register and which was the index. So we can determine
1121 nothing from the base alias check. */
1122 return 0;
1123 }
1124
1125 case AND:
1126 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
1127 return REG_BASE_VALUE (XEXP (x, 0));
1128 return 0;
1129
1130 case SYMBOL_REF:
1131 case LABEL_REF:
1132 return x;
1133
1134 case ADDRESSOF:
1135 return REG_BASE_VALUE (frame_pointer_rtx);
1136
1137 default:
1138 return 0;
1139 }
1140 }
1141
1142 /* Return 0 if the addresses X and Y are known to point to different
1143 objects, 1 if they might be pointers to the same object. */
1144
1145 static int
1146 base_alias_check (x, y, x_mode, y_mode)
1147 rtx x, y;
1148 enum machine_mode x_mode, y_mode;
1149 {
1150 rtx x_base = find_base_term (x);
1151 rtx y_base = find_base_term (y);
1152
1153 /* If the address itself has no known base see if a known equivalent
1154 value has one. If either address still has no known base, nothing
1155 is known about aliasing. */
1156 if (x_base == 0)
1157 {
1158 rtx x_c;
1159
1160 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1161 return 1;
1162
1163 x_base = find_base_term (x_c);
1164 if (x_base == 0)
1165 return 1;
1166 }
1167
1168 if (y_base == 0)
1169 {
1170 rtx y_c;
1171 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1172 return 1;
1173
1174 y_base = find_base_term (y_c);
1175 if (y_base == 0)
1176 return 1;
1177 }
1178
1179 /* If the base addresses are equal nothing is known about aliasing. */
1180 if (rtx_equal_p (x_base, y_base))
1181 return 1;
1182
1183 /* The base addresses of the read and write are different expressions.
1184 If they are both symbols and they are not accessed via AND, there is
1185 no conflict. We can bring knowledge of object alignment into play
1186 here. For example, on alpha, "char a, b;" can alias one another,
1187 though "char a; long b;" cannot. */
1188 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
1189 {
1190 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1191 return 1;
1192 if (GET_CODE (x) == AND
1193 && (GET_CODE (XEXP (x, 1)) != CONST_INT
1194 || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
1195 return 1;
1196 if (GET_CODE (y) == AND
1197 && (GET_CODE (XEXP (y, 1)) != CONST_INT
1198 || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
1199 return 1;
1200 /* Differing symbols never alias. */
1201 return 0;
1202 }
1203
1204 /* If one address is a stack reference there can be no alias:
1205 stack references using different base registers do not alias,
1206 a stack reference can not alias a parameter, and a stack reference
1207 can not alias a global. */
1208 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1209 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1210 return 0;
1211
1212 if (! flag_argument_noalias)
1213 return 1;
1214
1215 if (flag_argument_noalias > 1)
1216 return 0;
1217
1218 /* Weak noalias assertion (arguments are distinct, but may match globals). */
1219 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1220 }
1221
1222 /* Convert the address X into something we can use. This is done by returning
1223 it unchanged unless it is a value; in the latter case we call cselib to get
1224 a more useful rtx. */
1225
1226 static rtx
1227 get_addr (x)
1228 rtx x;
1229 {
1230 cselib_val *v;
1231 struct elt_loc_list *l;
1232
1233 if (GET_CODE (x) != VALUE)
1234 return x;
1235 v = CSELIB_VAL_PTR (x);
1236 for (l = v->locs; l; l = l->next)
1237 if (CONSTANT_P (l->loc))
1238 return l->loc;
1239 for (l = v->locs; l; l = l->next)
1240 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1241 return l->loc;
1242 if (v->locs)
1243 return v->locs->loc;
1244 return x;
1245 }
1246
1247 /* Return the address of the (N_REFS + 1)th memory reference to ADDR
1248 where SIZE is the size in bytes of the memory reference. If ADDR
1249 is not modified by the memory reference then ADDR is returned. */
1250
1251 rtx
1252 addr_side_effect_eval (addr, size, n_refs)
1253 rtx addr;
1254 int size;
1255 int n_refs;
1256 {
1257 int offset = 0;
1258
1259 switch (GET_CODE (addr))
1260 {
1261 case PRE_INC:
1262 offset = (n_refs + 1) * size;
1263 break;
1264 case PRE_DEC:
1265 offset = -(n_refs + 1) * size;
1266 break;
1267 case POST_INC:
1268 offset = n_refs * size;
1269 break;
1270 case POST_DEC:
1271 offset = -n_refs * size;
1272 break;
1273
1274 default:
1275 return addr;
1276 }
1277
1278 if (offset)
1279 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1280 else
1281 addr = XEXP (addr, 0);
1282
1283 return addr;
1284 }
1285
1286 /* Return nonzero if X and Y (memory addresses) could reference the
1287 same location in memory. C is an offset accumulator. When
1288 C is nonzero, we are testing aliases between X and Y + C.
1289 XSIZE is the size in bytes of the X reference,
1290 similarly YSIZE is the size in bytes for Y.
1291
1292 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1293 referenced (the reference was BLKmode), so make the most pessimistic
1294 assumptions.
1295
1296 If XSIZE or YSIZE is negative, we may access memory outside the object
1297 being referenced as a side effect. This can happen when using AND to
1298 align memory references, as is done on the Alpha.
1299
1300 Nice to notice that varying addresses cannot conflict with fp if no
1301 local variables had their addresses taken, but that's too hard now. */
1302
1303 static int
1304 memrefs_conflict_p (xsize, x, ysize, y, c)
1305 register rtx x, y;
1306 int xsize, ysize;
1307 HOST_WIDE_INT c;
1308 {
1309 if (GET_CODE (x) == VALUE)
1310 x = get_addr (x);
1311 if (GET_CODE (y) == VALUE)
1312 y = get_addr (y);
1313 if (GET_CODE (x) == HIGH)
1314 x = XEXP (x, 0);
1315 else if (GET_CODE (x) == LO_SUM)
1316 x = XEXP (x, 1);
1317 else
1318 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
1319 if (GET_CODE (y) == HIGH)
1320 y = XEXP (y, 0);
1321 else if (GET_CODE (y) == LO_SUM)
1322 y = XEXP (y, 1);
1323 else
1324 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
1325
1326 if (rtx_equal_for_memref_p (x, y))
1327 {
1328 if (xsize <= 0 || ysize <= 0)
1329 return 1;
1330 if (c >= 0 && xsize > c)
1331 return 1;
1332 if (c < 0 && ysize+c > 0)
1333 return 1;
1334 return 0;
1335 }
1336
1337 /* This code used to check for conflicts involving stack references and
1338 globals but the base address alias code now handles these cases. */
1339
1340 if (GET_CODE (x) == PLUS)
1341 {
1342 /* The fact that X is canonicalized means that this
1343 PLUS rtx is canonicalized. */
1344 rtx x0 = XEXP (x, 0);
1345 rtx x1 = XEXP (x, 1);
1346
1347 if (GET_CODE (y) == PLUS)
1348 {
1349 /* The fact that Y is canonicalized means that this
1350 PLUS rtx is canonicalized. */
1351 rtx y0 = XEXP (y, 0);
1352 rtx y1 = XEXP (y, 1);
1353
1354 if (rtx_equal_for_memref_p (x1, y1))
1355 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1356 if (rtx_equal_for_memref_p (x0, y0))
1357 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1358 if (GET_CODE (x1) == CONST_INT)
1359 {
1360 if (GET_CODE (y1) == CONST_INT)
1361 return memrefs_conflict_p (xsize, x0, ysize, y0,
1362 c - INTVAL (x1) + INTVAL (y1));
1363 else
1364 return memrefs_conflict_p (xsize, x0, ysize, y,
1365 c - INTVAL (x1));
1366 }
1367 else if (GET_CODE (y1) == CONST_INT)
1368 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1369
1370 return 1;
1371 }
1372 else if (GET_CODE (x1) == CONST_INT)
1373 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1374 }
1375 else if (GET_CODE (y) == PLUS)
1376 {
1377 /* The fact that Y is canonicalized means that this
1378 PLUS rtx is canonicalized. */
1379 rtx y0 = XEXP (y, 0);
1380 rtx y1 = XEXP (y, 1);
1381
1382 if (GET_CODE (y1) == CONST_INT)
1383 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1384 else
1385 return 1;
1386 }
1387
1388 if (GET_CODE (x) == GET_CODE (y))
1389 switch (GET_CODE (x))
1390 {
1391 case MULT:
1392 {
1393 /* Handle cases where we expect the second operands to be the
1394 same, and check only whether the first operand would conflict
1395 or not. */
1396 rtx x0, y0;
1397 rtx x1 = canon_rtx (XEXP (x, 1));
1398 rtx y1 = canon_rtx (XEXP (y, 1));
1399 if (! rtx_equal_for_memref_p (x1, y1))
1400 return 1;
1401 x0 = canon_rtx (XEXP (x, 0));
1402 y0 = canon_rtx (XEXP (y, 0));
1403 if (rtx_equal_for_memref_p (x0, y0))
1404 return (xsize == 0 || ysize == 0
1405 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1406
1407 /* Can't properly adjust our sizes. */
1408 if (GET_CODE (x1) != CONST_INT)
1409 return 1;
1410 xsize /= INTVAL (x1);
1411 ysize /= INTVAL (x1);
1412 c /= INTVAL (x1);
1413 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1414 }
1415
1416 case REG:
1417 /* Are these registers known not to be equal? */
1418 if (alias_invariant)
1419 {
1420 unsigned int r_x = REGNO (x), r_y = REGNO (y);
1421 rtx i_x, i_y; /* invariant relationships of X and Y */
1422
1423 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1424 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1425
1426 if (i_x == 0 && i_y == 0)
1427 break;
1428
1429 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1430 ysize, i_y ? i_y : y, c))
1431 return 0;
1432 }
1433 break;
1434
1435 default:
1436 break;
1437 }
1438
1439 /* Treat an access through an AND (e.g. a subword access on an Alpha)
1440 as an access with indeterminate size. Assume that references
1441 besides AND are aligned, so if the size of the other reference is
1442 at least as large as the alignment, assume no other overlap. */
1443 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
1444 {
1445 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
1446 xsize = -1;
1447 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1448 }
1449 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
1450 {
1451 /* ??? If we are indexing far enough into the array/structure, we
1452 may yet be able to determine that we can not overlap. But we
1453 also need to that we are far enough from the end not to overlap
1454 a following reference, so we do nothing with that for now. */
1455 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
1456 ysize = -1;
1457 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
1458 }
1459
1460 if (GET_CODE (x) == ADDRESSOF)
1461 {
1462 if (y == frame_pointer_rtx
1463 || GET_CODE (y) == ADDRESSOF)
1464 return xsize <= 0 || ysize <= 0;
1465 }
1466 if (GET_CODE (y) == ADDRESSOF)
1467 {
1468 if (x == frame_pointer_rtx)
1469 return xsize <= 0 || ysize <= 0;
1470 }
1471
1472 if (CONSTANT_P (x))
1473 {
1474 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1475 {
1476 c += (INTVAL (y) - INTVAL (x));
1477 return (xsize <= 0 || ysize <= 0
1478 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1479 }
1480
1481 if (GET_CODE (x) == CONST)
1482 {
1483 if (GET_CODE (y) == CONST)
1484 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1485 ysize, canon_rtx (XEXP (y, 0)), c);
1486 else
1487 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1488 ysize, y, c);
1489 }
1490 if (GET_CODE (y) == CONST)
1491 return memrefs_conflict_p (xsize, x, ysize,
1492 canon_rtx (XEXP (y, 0)), c);
1493
1494 if (CONSTANT_P (y))
1495 return (xsize <= 0 || ysize <= 0
1496 || (rtx_equal_for_memref_p (x, y)
1497 && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
1498
1499 return 1;
1500 }
1501 return 1;
1502 }
1503
1504 /* Functions to compute memory dependencies.
1505
1506 Since we process the insns in execution order, we can build tables
1507 to keep track of what registers are fixed (and not aliased), what registers
1508 are varying in known ways, and what registers are varying in unknown
1509 ways.
1510
1511 If both memory references are volatile, then there must always be a
1512 dependence between the two references, since their order can not be
1513 changed. A volatile and non-volatile reference can be interchanged
1514 though.
1515
1516 A MEM_IN_STRUCT reference at a non-AND varying address can never
1517 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1518 also must allow AND addresses, because they may generate accesses
1519 outside the object being referenced. This is used to generate
1520 aligned addresses from unaligned addresses, for instance, the alpha
1521 storeqi_unaligned pattern. */
1522
1523 /* Read dependence: X is read after read in MEM takes place. There can
1524 only be a dependence here if both reads are volatile. */
1525
1526 int
1527 read_dependence (mem, x)
1528 rtx mem;
1529 rtx x;
1530 {
1531 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1532 }
1533
1534 /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1535 MEM2 is a reference to a structure at a varying address, or returns
1536 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1537 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1538 to decide whether or not an address may vary; it should return
1539 nonzero whenever variation is possible.
1540 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1541
1542 static rtx
1543 fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1544 rtx mem1, mem2;
1545 rtx mem1_addr, mem2_addr;
1546 int (*varies_p) PARAMS ((rtx));
1547 {
1548 if (! flag_strict_aliasing)
1549 return NULL_RTX;
1550
1551 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
1552 && !varies_p (mem1_addr) && varies_p (mem2_addr))
1553 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1554 varying address. */
1555 return mem1;
1556
1557 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
1558 && varies_p (mem1_addr) && !varies_p (mem2_addr))
1559 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1560 varying address. */
1561 return mem2;
1562
1563 return NULL_RTX;
1564 }
1565
1566 /* Returns nonzero if something about the mode or address format MEM1
1567 indicates that it might well alias *anything*. */
1568
1569 static int
1570 aliases_everything_p (mem)
1571 rtx mem;
1572 {
1573 if (GET_CODE (XEXP (mem, 0)) == AND)
1574 /* If the address is an AND, its very hard to know at what it is
1575 actually pointing. */
1576 return 1;
1577
1578 return 0;
1579 }
1580
1581 /* True dependence: X is read after store in MEM takes place. */
1582
1583 int
1584 true_dependence (mem, mem_mode, x, varies)
1585 rtx mem;
1586 enum machine_mode mem_mode;
1587 rtx x;
1588 int (*varies) PARAMS ((rtx));
1589 {
1590 register rtx x_addr, mem_addr;
1591 rtx base;
1592
1593 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1594 return 1;
1595
1596 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1597 return 0;
1598
1599 /* Unchanging memory can't conflict with non-unchanging memory.
1600 A non-unchanging read can conflict with a non-unchanging write.
1601 An unchanging read can conflict with an unchanging write since
1602 there may be a single store to this address to initialize it.
1603 Note that an unchanging store can conflict with a non-unchanging read
1604 since we have to make conservative assumptions when we have a
1605 record with readonly fields and we are copying the whole thing.
1606 Just fall through to the code below to resolve potential conflicts.
1607 This won't handle all cases optimally, but the possible performance
1608 loss should be negligible. */
1609 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1610 return 0;
1611
1612 if (mem_mode == VOIDmode)
1613 mem_mode = GET_MODE (mem);
1614
1615 x_addr = get_addr (XEXP (x, 0));
1616 mem_addr = get_addr (XEXP (mem, 0));
1617
1618 base = find_base_term (x_addr);
1619 if (base && (GET_CODE (base) == LABEL_REF
1620 || (GET_CODE (base) == SYMBOL_REF
1621 && CONSTANT_POOL_ADDRESS_P (base))))
1622 return 0;
1623
1624 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1625 return 0;
1626
1627 x_addr = canon_rtx (x_addr);
1628 mem_addr = canon_rtx (mem_addr);
1629
1630 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1631 SIZE_FOR_MODE (x), x_addr, 0))
1632 return 0;
1633
1634 if (aliases_everything_p (x))
1635 return 1;
1636
1637 /* We cannot use aliases_everyting_p to test MEM, since we must look
1638 at MEM_MODE, rather than GET_MODE (MEM). */
1639 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
1640 return 1;
1641
1642 /* In true_dependence we also allow BLKmode to alias anything. Why
1643 don't we do this in anti_dependence and output_dependence? */
1644 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1645 return 1;
1646
1647 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1648 varies);
1649 }
1650
1651 /* Returns non-zero if a write to X might alias a previous read from
1652 (or, if WRITEP is non-zero, a write to) MEM. */
1653
1654 static int
1655 write_dependence_p (mem, x, writep)
1656 rtx mem;
1657 rtx x;
1658 int writep;
1659 {
1660 rtx x_addr, mem_addr;
1661 rtx fixed_scalar;
1662 rtx base;
1663
1664 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1665 return 1;
1666
1667 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1668 return 0;
1669
1670 /* Unchanging memory can't conflict with non-unchanging memory. */
1671 if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem))
1672 return 0;
1673
1674 /* If MEM is an unchanging read, then it can't possibly conflict with
1675 the store to X, because there is at most one store to MEM, and it must
1676 have occurred somewhere before MEM. */
1677 if (! writep && RTX_UNCHANGING_P (mem))
1678 return 0;
1679
1680 x_addr = get_addr (XEXP (x, 0));
1681 mem_addr = get_addr (XEXP (mem, 0));
1682
1683 if (! writep)
1684 {
1685 base = find_base_term (mem_addr);
1686 if (base && (GET_CODE (base) == LABEL_REF
1687 || (GET_CODE (base) == SYMBOL_REF
1688 && CONSTANT_POOL_ADDRESS_P (base))))
1689 return 0;
1690 }
1691
1692 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
1693 GET_MODE (mem)))
1694 return 0;
1695
1696 x_addr = canon_rtx (x_addr);
1697 mem_addr = canon_rtx (mem_addr);
1698
1699 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1700 SIZE_FOR_MODE (x), x_addr, 0))
1701 return 0;
1702
1703 fixed_scalar
1704 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1705 rtx_addr_varies_p);
1706
1707 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1708 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1709 }
1710
1711 /* Anti dependence: X is written after read in MEM takes place. */
1712
1713 int
1714 anti_dependence (mem, x)
1715 rtx mem;
1716 rtx x;
1717 {
1718 return write_dependence_p (mem, x, /*writep=*/0);
1719 }
1720
1721 /* Output dependence: X is written after store in MEM takes place. */
1722
1723 int
1724 output_dependence (mem, x)
1725 register rtx mem;
1726 register rtx x;
1727 {
1728 return write_dependence_p (mem, x, /*writep=*/1);
1729 }
1730
1731 /* Returns non-zero if X might refer to something which is not
1732 local to the function and is not constant. */
1733
1734 static int
1735 nonlocal_reference_p (x)
1736 rtx x;
1737 {
1738 rtx base;
1739 register RTX_CODE code;
1740 int regno;
1741
1742 code = GET_CODE (x);
1743
1744 if (GET_RTX_CLASS (code) == 'i')
1745 {
1746 /* Constant functions can be constant if they don't use
1747 scratch memory used to mark function w/o side effects. */
1748 if (code == CALL_INSN && CONST_CALL_P (x))
1749 {
1750 x = CALL_INSN_FUNCTION_USAGE (x);
1751 if (x == 0)
1752 return 0;
1753 }
1754 else
1755 x = PATTERN (x);
1756 code = GET_CODE (x);
1757 }
1758
1759 switch (code)
1760 {
1761 case SUBREG:
1762 if (GET_CODE (SUBREG_REG (x)) == REG)
1763 {
1764 /* Global registers are not local. */
1765 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
1766 && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)])
1767 return 1;
1768 return 0;
1769 }
1770 break;
1771
1772 case REG:
1773 regno = REGNO (x);
1774 /* Global registers are not local. */
1775 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1776 return 1;
1777 return 0;
1778
1779 case SCRATCH:
1780 case PC:
1781 case CC0:
1782 case CONST_INT:
1783 case CONST_DOUBLE:
1784 case CONST:
1785 case LABEL_REF:
1786 return 0;
1787
1788 case SYMBOL_REF:
1789 /* Constants in the function's constants pool are constant. */
1790 if (CONSTANT_POOL_ADDRESS_P (x))
1791 return 0;
1792 return 1;
1793
1794 case CALL:
1795 /* Recursion introduces no additional considerations. */
1796 if (GET_CODE (XEXP (x, 0)) == MEM
1797 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1798 && strcmp(XSTR (XEXP (XEXP (x, 0), 0), 0),
1799 IDENTIFIER_POINTER (
1800 DECL_ASSEMBLER_NAME (current_function_decl))) == 0)
1801 return 0;
1802 return 1;
1803
1804 case MEM:
1805 /* Be overly conservative and consider any volatile memory
1806 reference as not local. */
1807 if (MEM_VOLATILE_P (x))
1808 return 1;
1809 base = find_base_term (XEXP (x, 0));
1810 if (base)
1811 {
1812 /* A Pmode ADDRESS could be a reference via the structure value
1813 address or static chain. Such memory references are nonlocal.
1814
1815 Thus, we have to examine the contents of the ADDRESS to find
1816 out if this is a local reference or not. */
1817 if (GET_CODE (base) == ADDRESS
1818 && GET_MODE (base) == Pmode
1819 && (XEXP (base, 0) == stack_pointer_rtx
1820 || XEXP (base, 0) == arg_pointer_rtx
1821 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1822 || XEXP (base, 0) == hard_frame_pointer_rtx
1823 #endif
1824 || XEXP (base, 0) == frame_pointer_rtx))
1825 return 0;
1826 /* Constants in the function's constant pool are constant. */
1827 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
1828 return 0;
1829 }
1830 return 1;
1831
1832 case ASM_INPUT:
1833 case ASM_OPERANDS:
1834 return 1;
1835
1836 default:
1837 break;
1838 }
1839
1840 /* Recursively scan the operands of this expression. */
1841
1842 {
1843 register const char *fmt = GET_RTX_FORMAT (code);
1844 register int i;
1845
1846 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1847 {
1848 if (fmt[i] == 'e' && XEXP (x, i))
1849 {
1850 if (nonlocal_reference_p (XEXP (x, i)))
1851 return 1;
1852 }
1853 else if (fmt[i] == 'E')
1854 {
1855 register int j;
1856 for (j = 0; j < XVECLEN (x, i); j++)
1857 if (nonlocal_reference_p (XVECEXP (x, i, j)))
1858 return 1;
1859 }
1860 }
1861 }
1862
1863 return 0;
1864 }
1865
1866 /* Mark the function if it is constant. */
1867
1868 void
1869 mark_constant_function ()
1870 {
1871 rtx insn;
1872
1873 if (TREE_PUBLIC (current_function_decl)
1874 || TREE_READONLY (current_function_decl)
1875 || TREE_THIS_VOLATILE (current_function_decl)
1876 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
1877 return;
1878
1879 /* Determine if this is a constant function. */
1880
1881 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1882 if (INSN_P (insn) && nonlocal_reference_p (insn))
1883 return;
1884
1885 /* Mark the function. */
1886
1887 TREE_READONLY (current_function_decl) = 1;
1888 }
1889
1890
1891 static HARD_REG_SET argument_registers;
1892
1893 void
1894 init_alias_once ()
1895 {
1896 register int i;
1897
1898 #ifndef OUTGOING_REGNO
1899 #define OUTGOING_REGNO(N) N
1900 #endif
1901 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1902 /* Check whether this register can hold an incoming pointer
1903 argument. FUNCTION_ARG_REGNO_P tests outgoing register
1904 numbers, so translate if necessary due to register windows. */
1905 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
1906 && HARD_REGNO_MODE_OK (i, Pmode))
1907 SET_HARD_REG_BIT (argument_registers, i);
1908
1909 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
1910 }
1911
1912 /* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
1913 array. */
1914
1915 void
1916 init_alias_analysis ()
1917 {
1918 int maxreg = max_reg_num ();
1919 int changed, pass;
1920 register int i;
1921 register unsigned int ui;
1922 register rtx insn;
1923
1924 reg_known_value_size = maxreg;
1925
1926 reg_known_value
1927 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
1928 - FIRST_PSEUDO_REGISTER;
1929 reg_known_equiv_p
1930 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
1931 - FIRST_PSEUDO_REGISTER;
1932
1933 /* Overallocate reg_base_value to allow some growth during loop
1934 optimization. Loop unrolling can create a large number of
1935 registers. */
1936 reg_base_value_size = maxreg * 2;
1937 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
1938 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
1939
1940 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
1941 reg_seen = (char *) xmalloc (reg_base_value_size);
1942 if (! reload_completed && flag_unroll_loops)
1943 {
1944 /* ??? Why are we realloc'ing if we're just going to zero it? */
1945 alias_invariant = (rtx *)xrealloc (alias_invariant,
1946 reg_base_value_size * sizeof (rtx));
1947 bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx));
1948 }
1949
1950
1951 /* The basic idea is that each pass through this loop will use the
1952 "constant" information from the previous pass to propagate alias
1953 information through another level of assignments.
1954
1955 This could get expensive if the assignment chains are long. Maybe
1956 we should throttle the number of iterations, possibly based on
1957 the optimization level or flag_expensive_optimizations.
1958
1959 We could propagate more information in the first pass by making use
1960 of REG_N_SETS to determine immediately that the alias information
1961 for a pseudo is "constant".
1962
1963 A program with an uninitialized variable can cause an infinite loop
1964 here. Instead of doing a full dataflow analysis to detect such problems
1965 we just cap the number of iterations for the loop.
1966
1967 The state of the arrays for the set chain in question does not matter
1968 since the program has undefined behavior. */
1969
1970 pass = 0;
1971 do
1972 {
1973 /* Assume nothing will change this iteration of the loop. */
1974 changed = 0;
1975
1976 /* We want to assign the same IDs each iteration of this loop, so
1977 start counting from zero each iteration of the loop. */
1978 unique_id = 0;
1979
1980 /* We're at the start of the funtion each iteration through the
1981 loop, so we're copying arguments. */
1982 copying_arguments = 1;
1983
1984 /* Wipe the potential alias information clean for this pass. */
1985 bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx));
1986
1987 /* Wipe the reg_seen array clean. */
1988 bzero ((char *) reg_seen, reg_base_value_size);
1989
1990 /* Mark all hard registers which may contain an address.
1991 The stack, frame and argument pointers may contain an address.
1992 An argument register which can hold a Pmode value may contain
1993 an address even if it is not in BASE_REGS.
1994
1995 The address expression is VOIDmode for an argument and
1996 Pmode for other registers. */
1997
1998 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1999 if (TEST_HARD_REG_BIT (argument_registers, i))
2000 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
2001 gen_rtx_REG (Pmode, i));
2002
2003 new_reg_base_value[STACK_POINTER_REGNUM]
2004 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
2005 new_reg_base_value[ARG_POINTER_REGNUM]
2006 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
2007 new_reg_base_value[FRAME_POINTER_REGNUM]
2008 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2009 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2010 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
2011 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2012 #endif
2013
2014 /* Walk the insns adding values to the new_reg_base_value array. */
2015 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2016 {
2017 if (INSN_P (insn))
2018 {
2019 rtx note, set;
2020
2021 #if defined (HAVE_prologue) || defined (HAVE_epilogue)
2022 /* The prologue/epilouge insns are not threaded onto the
2023 insn chain until after reload has completed. Thus,
2024 there is no sense wasting time checking if INSN is in
2025 the prologue/epilogue until after reload has completed. */
2026 if (reload_completed
2027 && prologue_epilogue_contains (insn))
2028 continue;
2029 #endif
2030
2031 /* If this insn has a noalias note, process it, Otherwise,
2032 scan for sets. A simple set will have no side effects
2033 which could change the base value of any other register. */
2034
2035 if (GET_CODE (PATTERN (insn)) == SET
2036 && REG_NOTES (insn) != 0
2037 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
2038 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
2039 else
2040 note_stores (PATTERN (insn), record_set, NULL);
2041
2042 set = single_set (insn);
2043
2044 if (set != 0
2045 && GET_CODE (SET_DEST (set)) == REG
2046 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
2047 && REG_NOTES (insn) != 0
2048 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
2049 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
2050 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
2051 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
2052 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
2053 {
2054 int regno = REGNO (SET_DEST (set));
2055 reg_known_value[regno] = XEXP (note, 0);
2056 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
2057 }
2058 }
2059 else if (GET_CODE (insn) == NOTE
2060 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2061 copying_arguments = 0;
2062 }
2063
2064 /* Now propagate values from new_reg_base_value to reg_base_value. */
2065 for (ui = 0; ui < reg_base_value_size; ui++)
2066 {
2067 if (new_reg_base_value[ui]
2068 && new_reg_base_value[ui] != reg_base_value[ui]
2069 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
2070 {
2071 reg_base_value[ui] = new_reg_base_value[ui];
2072 changed = 1;
2073 }
2074 }
2075 }
2076 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
2077
2078 /* Fill in the remaining entries. */
2079 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
2080 if (reg_known_value[i] == 0)
2081 reg_known_value[i] = regno_reg_rtx[i];
2082
2083 /* Simplify the reg_base_value array so that no register refers to
2084 another register, except to special registers indirectly through
2085 ADDRESS expressions.
2086
2087 In theory this loop can take as long as O(registers^2), but unless
2088 there are very long dependency chains it will run in close to linear
2089 time.
2090
2091 This loop may not be needed any longer now that the main loop does
2092 a better job at propagating alias information. */
2093 pass = 0;
2094 do
2095 {
2096 changed = 0;
2097 pass++;
2098 for (ui = 0; ui < reg_base_value_size; ui++)
2099 {
2100 rtx base = reg_base_value[ui];
2101 if (base && GET_CODE (base) == REG)
2102 {
2103 unsigned int base_regno = REGNO (base);
2104 if (base_regno == ui) /* register set from itself */
2105 reg_base_value[ui] = 0;
2106 else
2107 reg_base_value[ui] = reg_base_value[base_regno];
2108 changed = 1;
2109 }
2110 }
2111 }
2112 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
2113
2114 /* Clean up. */
2115 free (new_reg_base_value);
2116 new_reg_base_value = 0;
2117 free (reg_seen);
2118 reg_seen = 0;
2119 }
2120
2121 void
2122 end_alias_analysis ()
2123 {
2124 free (reg_known_value + FIRST_PSEUDO_REGISTER);
2125 reg_known_value = 0;
2126 reg_known_value_size = 0;
2127 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2128 reg_known_equiv_p = 0;
2129 if (reg_base_value)
2130 {
2131 ggc_del_root (reg_base_value);
2132 free (reg_base_value);
2133 reg_base_value = 0;
2134 }
2135 reg_base_value_size = 0;
2136 if (alias_invariant)
2137 {
2138 free (alias_invariant);
2139 alias_invariant = 0;
2140 }
2141 }
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