1 2020-05-25 Richard Biener <rguenther@suse.de>
3 PR tree-optimization/95284
4 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
7 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
10 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
11 (trunc<mode><sf2dfmode_lower>2) New expander.
12 (extend<sf2dfmode_lower><mode>2): Ditto.
14 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
16 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
17 ubsan_{data,type},ASAN symbols linker-visible.
19 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
21 * lto-streamer-out.c (DFS::DFS): Silence warning.
23 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
26 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
27 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
29 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
31 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
34 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
36 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
37 * lto-streamer-out.c (create_output_block): Fix whitespace
38 (lto_write_tree_1): Add (debug) dump.
40 (DFS::DFS_write_tree_body): Do not dump here.
41 (lto_output_tree): Improve dumping; do not stream ref when not needed.
42 (produce_asm_for_decls): Fix whitespace.
43 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
44 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
46 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
49 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
50 (truncv32hiv32qi2): Ditto.
51 (trunc<ssedoublemodelower><mode>2): Ditto.
52 (trunc<mode><pmov_dst_3>2): Ditto.
53 (trunc<mode><pmov_dst_mode_4>2): Ditto.
54 (truncv2div2si2): Ditto.
55 (truncv8div8qi2): Ditto.
56 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
57 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
58 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
59 *avx512vl_<code><mode>v<ssescalarnum>qi2.
61 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
64 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
67 2020-05-22 Richard Biener <rguenther@suse.de>
69 PR tree-optimization/95268
70 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
73 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
75 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
78 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
80 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
81 (lto_input_scc): Optimize streaming of entry lengths.
82 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
83 (DFS::DFS): Optimize stremaing of entry lengths
85 2020-05-22 Richard Biener <rguenther@suse.de>
88 * doc/invoke.texi (flto): Document behavior of diagnostic
91 2020-05-22 Richard Biener <rguenther@suse.de>
93 * tree-vectorizer.h (vect_is_simple_use): New overload.
94 (vect_maybe_update_slp_op_vectype): New.
95 * tree-vect-stmts.c (vect_is_simple_use): New overload
96 accessing operands of SLP vs. non-SLP operation transparently.
97 (vect_maybe_update_slp_op_vectype): New function updating
98 the possibly shared SLP operands vector type.
99 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
100 using the new vect_is_simple_use overload; update SLP invariant
101 operand nodes vector type.
102 (vectorizable_comparison): Likewise.
103 (vectorizable_call): Likewise.
104 (vectorizable_conversion): Likewise.
105 (vectorizable_shift): Likewise.
106 (vectorizable_store): Likewise.
107 (vectorizable_condition): Likewise.
108 (vectorizable_assignment): Likewise.
109 * tree-vect-loop.c (vectorizable_reduction): Likewise.
110 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
111 present SLP_TREE_VECTYPE and check it matches previous
114 2020-05-22 Richard Biener <rguenther@suse.de>
116 PR tree-optimization/95248
117 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
119 2020-05-22 Richard Biener <rguenther@suse.de>
121 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
122 (_slp_tree::~_slp_tree): Likewise.
123 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
125 (_slp_tree::~_slp_tree): Implement.
126 (vect_free_slp_tree): Simplify.
127 (vect_create_new_slp_node): Likewise. Add nops parameter.
128 (vect_build_slp_tree_2): Adjust.
129 (vect_analyze_slp_instance): Likewise.
131 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
133 * adjust-alignment.c: Include memmodel.h.
135 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
138 * config/i386/cpuid.h: Use hexadecimal in comments.
140 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
143 * config/i386/i386-builtins.c (processor_features): Move
144 F_AVX512VP2INTERSECT after F_AVX512BF16.
145 (isa_names_table): Likewise.
147 2020-05-21 Martin Liska <mliska@suse.cz>
149 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
150 Handle OPT_moutline_atomics.
151 * config/aarch64/aarch64.c: Add outline-atomics to
153 * doc/extend.texi: Document the newly added target attribute.
155 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
159 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
160 operands 1 and 2 commutative. Manually swap operands.
161 (*mmx_nabsv2sf2): Ditto.
164 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
166 * config/i386/i386.md (*<code>tf2_1):
167 Mark operands 1 and 2 commutative.
169 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
170 commutative. Do not swap operands.
171 (*nabs<mode>2): Ditto.
173 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
176 * config/i386/sse.md (<code>v8qiv8hi2): Use
177 simplify_gen_subreg instead of simplify_subreg.
178 (<code>v8qiv8si2): Ditto.
179 (<code>v4qiv4si2): Ditto.
180 (<code>v4hiv4si2): Ditto.
181 (<code>v8qiv8di2): Ditto.
182 (<code>v4qiv4di2): Ditto.
183 (<code>v2qiv2di2): Ditto.
184 (<code>v4hiv4di2): Ditto.
185 (<code>v2hiv2di2): Ditto.
186 (<code>v2siv2di2): Ditto.
188 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
191 * config/i386/i386.md (*pushsi2_rex64):
192 Use "e" constraint instead of "i".
194 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
196 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
197 (lto_input_tree_1): Strenghten sanity check.
198 (lto_input_tree): Update call of lto_input_scc.
199 * lto-streamer-out.c: Include ipa-utils.h
200 (create_output_block): Initialize local_trees if merigng is going
202 (destroy_output_block): Destroy local_trees.
203 (DFS): Add max_local_entry.
204 (local_tree_p): New function.
205 (DFS::DFS): Initialize and maintain it.
206 (DFS::DFS_write_tree): Decide on streaming format.
207 (lto_output_tree): Stream inline singleton SCCs
208 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
209 (struct output_block): Add local_trees.
210 (lto_input_scc): Update prototype.
212 2020-05-20 Patrick Palka <ppalka@redhat.com>
215 * hash-table.h (hash_table::find_with_hash): Move up the call to
218 2020-05-20 Martin Liska <mliska@suse.cz>
220 * lto-compress.c (lto_compression_zstd): Fill up
221 num_compressed_il_bytes.
222 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
224 2020-05-20 Richard Biener <rguenther@suse.de>
226 PR tree-optimization/95219
227 * tree-vect-loop.c (vectorizable_induction): Reduce
228 group_size before computing the number of required IVs.
230 2020-05-20 Richard Biener <rguenther@suse.de>
233 * tree-inline.c (remap_gimple_stmt): Revert adjusting
234 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
236 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
237 Andre Vieira <andre.simoesdiasvieira@arm.com>
240 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
242 (mve_vector_mem_operand): Likewise.
243 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
244 the load from memory to a core register is legitimate for give mode.
245 (mve_vector_mem_operand): Define function.
246 (arm_print_operand): Modify comment.
247 (arm_mode_base_reg_class): Define.
248 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
249 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
250 * config/arm/constraints.md (Ux): Likewise.
252 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
253 add support for missing Vector Store Register and Vector Load Register.
254 Add a new alternative to support load from memory to PC (or label) in
256 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
257 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
258 mve_memory_operand and also modify the MVE instructions to emit.
259 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
260 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
261 mve_memory_operand and also modify the MVE instructions to emit.
262 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
263 mve_memory_operand and also modify the MVE instructions to emit.
264 (mve_vldrhq_z_fv8hf): Likewise.
265 (mve_vldrhq_z_<supf><mode>): Likewise.
266 (mve_vldrwq_fv4sf): Likewise.
267 (mve_vldrwq_<supf>v4si): Likewise.
268 (mve_vldrwq_z_fv4sf): Likewise.
269 (mve_vldrwq_z_<supf>v4si): Likewise.
270 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
271 (mve_vld1q_<supf><mode>): Likewise.
272 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
274 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
275 mve_memory_operand and also modify the MVE instructions to emit.
276 (mve_vstrhq_p_<supf><mode>): Likewise.
277 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
279 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
280 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
281 instructions to emit.
282 (mve_vstrwq_p_<supf>v4si): Likewise.
283 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
284 * config/arm/predicates.md (mve_memory_operand): Define.
286 2020-05-30 Richard Biener <rguenther@suse.de>
289 * c-fold.c (c_fully_fold_internal): Enhance guard on
292 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
295 * Makefile.in (OBJS): Add adjust-alignment.o.
296 * adjust-alignment.c (pass_data_adjust_alignment): New.
297 (pass_adjust_alignment): New.
298 (pass_adjust_alignment::execute): New.
299 (make_pass_adjust_alignment): New.
300 * tree-pass.h (make_pass_adjust_alignment): New.
301 * passes.def: Add pass_adjust_alignment.
303 2020-05-19 Alex Coplan <alex.coplan@arm.com>
306 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
307 identity permutation.
309 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
311 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
312 msp430_small, msp430_large and size24plus DejaGNU effective
314 Improve grammar in descriptions for size20plus and size32plus effective
317 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
319 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
320 callee saved registers only in xBPF.
321 (bpf_expand_prologue): Save callee saved registers only in xBPF.
322 (bpf_expand_epilogue): Likewise for restoring.
323 * doc/invoke.texi (eBPF Options): Document this is activated by
326 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
328 * config/bpf/bpf.opt (mxbpf): New option.
329 * doc/invoke.texi (Option Summary): Add -mxbpf.
330 (eBPF Options): Document -mxbbpf.
332 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
335 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
336 (<code>v32qiv32hi2): Ditto.
337 (<code>v8qiv8hi2): Ditto.
338 (<code>v16qiv16si2): Ditto.
339 (<code>v8qiv8si2): Ditto.
340 (<code>v4qiv4si2): Ditto.
341 (<code>v16hiv16si2): Ditto.
342 (<code>v8hiv8si2): Ditto.
343 (<code>v4hiv4si2): Ditto.
344 (<code>v8qiv8di2): Ditto.
345 (<code>v4qiv4di2): Ditto.
346 (<code>v2qiv2di2): Ditto.
347 (<code>v8hiv8di2): Ditto.
348 (<code>v4hiv4di2): Ditto.
349 (<code>v2hiv2di2): Ditto.
350 (<code>v8siv8di2): Ditto.
351 (<code>v4siv4di2): Ditto.
352 (<code>v2siv2di2): Ditto.
354 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
356 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
357 (riscv_implied_info): New.
358 (riscv_subset_list): Add handle_implied_ext.
359 (riscv_subset_list::to_string): New parameter version_p to
360 control output format.
361 (riscv_subset_list::handle_implied_ext): New.
362 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
363 (riscv_arch_str): New parameter version_p to control output format.
364 (riscv_expand_arch): New.
365 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
367 * config/riscv/riscv.h (riscv_expand_arch): New,
368 (EXTRA_SPEC_FUNCTIONS): Define.
369 (ASM_SPEC): Transform -march= via riscv_expand_arch.
371 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
373 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
374 parse_multiletter_ext.
375 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
376 adjust parsing order for 's' and 'x'.
378 2020-05-19 Richard Biener <rguenther@suse.de>
380 * tree-vectorizer.h (_slp_tree::vectype): Add field.
381 (SLP_TREE_VECTYPE): New.
382 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
384 (vect_create_new_slp_node): Likewise.
385 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
387 (vect_slp_analyze_node_operations): Walk nodes children for
389 (vect_get_constant_vectors): Use local scope op variable.
390 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
391 (vect_model_simple_cost): Adjust.
392 (vect_model_store_cost): Likewise.
393 (vectorizable_store): Likewise.
395 2020-05-18 Martin Sebor <msebor@redhat.com>
398 * tree-object-size.c (decl_init_size): New function.
399 (addr_object_size): Call it.
400 * tree.h (last_field): Declare.
401 (first_field): Add attribute nonnull.
403 2020-05-18 Martin Sebor <msebor@redhat.com>
406 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
407 * tree.c (component_ref_size): Correct the handling or array members
409 Drop a pointless test.
410 Rename a local variable.
412 2020-05-18 Jason Merrill <jason@redhat.com>
414 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
415 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
417 2020-05-14 Jason Merrill <jason@redhat.com>
419 * doc/install.texi (Prerequisites): Update boostrap compiler
420 requirement to C++11/GCC 4.8.
422 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
424 PR tree-optimization/94952
425 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
426 Initialize variables bitpos, bitregion_start, and bitregion_end in
427 order to silence warnings about use of uninitialized variables.
429 2020-05-18 Carl Love <cel@us.ibm.com>
432 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
433 first_match_index_<mode>.
434 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
435 additional test cases with zero vector elements.
437 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
440 * config/i386/i386-expand.c (ix86_expand_int_movcc):
441 Avoid reversing a non-trapping comparison to a trapping one.
443 2020-05-18 Alex Coplan <alex.coplan@arm.com>
445 * config/arm/arm.c (output_move_double): Fix codegen when loading into
446 a register pair with an odd base register.
448 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
450 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
451 Do not emit FLAGS_REG clobber for TFmode.
452 * config/i386/i386.md (*<code>tf2_1): Rewrite as
453 define_insn_and_split. Mark operands 1 and 2 commutative.
455 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
456 Do not swap memory operands. Simplify RTX generation.
457 (neg abs SSE splitter): Ditto.
458 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
459 commutative. Do not swap operands. Simplify RTX generation.
460 (*nabs<mode>2): Ditto.
462 2020-05-18 Richard Biener <rguenther@suse.de>
464 * tree-vect-slp.c (vect_slp_bb): Start after labels.
465 (vect_get_constant_vectors): Really place init stmt after scalar defs.
466 * tree-vect-stmts.c (vect_init_vector_1): Insert before
469 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
471 * config/i386/driver-i386.c (host_detect_local_cpu): Support
472 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
475 2020-05-18 Richard Biener <rguenther@suse.de>
478 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
479 when inlining into a non-call EH function.
481 2020-05-18 Richard Biener <rguenther@suse.de>
483 PR tree-optimization/95172
484 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
485 eventually need the conditional processing.
486 (execute_sm_exit): When processing an orderd sequence
487 avoid doing any conditional processing.
488 (hoist_memory_references): Pass down whether all edges
489 have ordered processing for a ref to execute_sm.
491 2020-05-17 Jeff Law <law@redhat.com>
493 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
494 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
495 into a single pattern using pc_or_label_operand.
496 * config/h8300/combiner.md (bit branch patterns): Likewise.
497 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
499 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
502 * config/i386/i386-features.c (has_non_address_hard_reg):
504 (pseudo_reg_set): This. Return the SET expression. Ignore
505 pseudo register push.
506 (general_scalar_to_vector_candidate_p): Combine single_set and
507 has_non_address_hard_reg calls to pseudo_reg_set.
508 (timode_scalar_to_vector_candidate_p): Likewise.
509 * config/i386/i386.md (*pushv1ti2): New pattern.
511 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
514 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
516 * tree-vrp.c (operand_less_p): Move to...
517 * vr-values.c (operand_less_p): ...here.
518 * tree-vrp.h (operand_less_p): Remove.
520 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
522 * tree-vrp.c (operand_less_p): Move to...
523 * vr-values.c (operand_less_p): ...here.
524 * tree-vrp.h (operand_less_p): Remove.
526 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
528 * tree-vrp.c (class vrp_insert): Remove prototype for
531 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
533 * tree-vrp.c (class live_names): New.
534 (live_on_edge): Move into live_names.
535 (build_assert_expr_for): Move into vrp_insert.
536 (find_assert_locations_in_bb): Rename from
537 find_assert_locations_1.
538 (process_assert_insertions_for): Move into vrp_insert.
539 (compare_assert_loc): Same.
540 (remove_range_assertions): Same.
541 (dump_asserts_for): Rename to vrp_insert::dump.
542 (debug_asserts_for): Rename to vrp_insert::debug.
543 (dump_all_asserts): Rename to vrp_insert::dump.
544 (debug_all_asserts): Rename to vrp_insert::debug.
546 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
548 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
549 check_array_ref, check_mem_ref, and search_for_addr_array
551 (class array_bounds_checker): ...here.
552 (class check_array_bounds_dom_walker): Adjust to use
553 array_bounds_checker.
554 (check_all_array_refs): Move into array_bounds_checker and rename
556 (class vrp_folder): Make fold_predicate_in private.
558 2020-05-15 Jeff Law <law@redhat.com>
560 * config/h8300/h8300.md (SFI iterator): New iterator for
562 * config/h8300/peepholes.md (memory comparison): Use mode
563 iterator to consolidate 3 patterns into one.
564 (stack allocation and stack store): Handle SFmode. Handle
567 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
569 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
570 RS6000_BTM_POWERPC64.
572 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
574 * config/i386/i386.md (SWI48DWI): New mode iterator.
575 (*push<mode>2): Allow XMM registers.
576 (*pushdi2_rex64): Ditto.
577 (*pushsi2_rex64): Ditto.
579 (push XMM reg splitter): New splitter
581 (*pushdf) Change "x" operand constraint to "v".
582 (*pushsf_rex64): Ditto.
585 2020-05-15 Richard Biener <rguenther@suse.de>
587 PR tree-optimization/92260
588 * tree-vect-slp.c (vect_get_constant_vectors): Compute
589 the number of vector stmts in a canonical way.
591 2020-05-15 Martin Liska <mliska@suse.cz>
593 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
596 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
598 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
600 2020-05-15 Richard Biener <rguenther@suse.de>
602 PR tree-optimization/95133
603 * gimple-ssa-split-paths.c
604 (find_block_to_duplicate_for_splitting_paths): Check for
607 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
609 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
611 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
613 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
616 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
617 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
620 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
623 * config/i386/i386.md (isa): Add sse3_noavx.
624 (enabled): Handle sse3_noavx.
626 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
627 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
628 alternatives. Match commutative vec_select selector operands.
629 (*mmx_haddv2sf3_low): New insn pattern.
631 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
632 (*mmx_hsubv2sf3_low): New insn pattern.
634 2020-05-15 Richard Biener <rguenther@suse.de>
636 PR tree-optimization/33315
637 * tree-ssa-sink.c: Include tree-eh.h.
638 (sink_stats): Add commoned member.
639 (sink_common_stores_to_bb): New function implementing store
640 commoning by sinking to the successor.
641 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
642 (pass_sink_code::execute): Likewise. Record commoned stores
645 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
647 PR rtl-optimization/37451, part of PR target/61837
648 * loop-doloop.c (doloop_simplify_count): New function. Simplify
649 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
650 (doloop_modify): Call doloop_simplify_count.
652 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
655 * doc/sourcebuild.texi: Document effective target lgccjit.
657 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
659 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
660 define_expand, and rename the original to ...
661 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
662 (add<mode>3_zext_dup_exec): Likewise, with ...
663 (add<mode>3_vcc_zext_dup_exec): ... this.
664 (add<mode>3_zext_dup2): Likewise, with ...
665 (add<mode>3_zext_dup_exec): ... this.
666 (add<mode>3_zext_dup2_exec): Likewise, with ...
667 (add<mode>3_zext_dup2): ... this.
668 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
669 addv64di3_zext* calls to use addv64di3_vcc_zext*.
671 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
674 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
675 (extendv2sfv2df2): Ditto.
677 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
679 * configure: Regenerated.
681 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
683 * config/arm/arm.c (reg_needs_saving_p): New function.
684 (use_return_insn): Use reg_needs_saving_p.
685 (arm_get_vfp_saved_size): Likewise.
686 (arm_compute_frame_layout): Likewise.
687 (arm_save_coproc_regs): Likewise.
688 (thumb1_expand_epilogue): Likewise.
689 (arm_expand_epilogue_apcs_frame): Likewise.
690 (arm_expand_epilogue): Likewise.
692 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
694 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
696 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
699 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
701 (floatv2siv2df2): New expander.
702 (floatunsv2siv2df2): New insn pattern.
704 (fix_truncv2dfv2si2): New expander.
705 (fixuns_truncv2dfv2si2): New insn pattern.
707 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
710 * config/aarch64/aarch64-sve-builtins.cc
711 (handle_arm_sve_vector_bits_attribute): Create a copy of the
712 original type's TYPE_MAIN_VARIANT, then reapply all the differences
713 between the original type and its main variant.
715 2020-05-14 Richard Biener <rguenther@suse.de>
718 * real.c (real_to_decimal_for_mode): Make sure we handle
719 a zero with nonzero exponent.
721 2020-05-14 Jakub Jelinek <jakub@redhat.com>
723 * Makefile.in (GTFILES): Add omp-general.c.
724 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
725 calls_declare_variant_alt members and initialize them in the
727 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
728 calls to declare_variant_alt nodes.
729 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
730 and calls_declare_variant_alt.
731 (input_overwrite_node): Read them back.
732 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
734 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
736 (tree_function_versioning): Copy calls_declare_variant_alt bit.
737 * omp-offload.c (execute_omp_device_lower): Call
738 omp_resolve_declare_variant on direct function calls.
739 (pass_omp_device_lower::gate): Also enable for
740 calls_declare_variant_alt functions.
741 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
742 (omp_context_selector_matches): Handle the case when
743 cfun->curr_properties has PROP_gimple_any bit set.
744 (struct omp_declare_variant_entry): New type.
745 (struct omp_declare_variant_base_entry): New type.
746 (struct omp_declare_variant_hasher): New type.
747 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
749 (omp_declare_variants): New variable.
750 (struct omp_declare_variant_alt_hasher): New type.
751 (omp_declare_variant_alt_hasher::hash,
752 omp_declare_variant_alt_hasher::equal): New methods.
753 (omp_declare_variant_alt): New variables.
754 (omp_resolve_late_declare_variant): New function.
755 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
756 when called late. Create a magic declare_variant_alt fndecl and
757 cgraph node and return that if decision needs to be deferred until
758 after gimplification.
759 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
763 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
764 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
765 entry block if info->after_stmt is NULL, otherwise add after that stmt
766 and update it after adding each stmt.
767 (ipa_simd_modify_function_body): Initialize info.after_stmt.
769 * function.h (struct function): Add has_omp_target bit.
770 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
772 (omp_discover_declare_target_tgt_fn_r): ... this.
773 (omp_discover_declare_target_var_r): Call
774 omp_discover_declare_target_tgt_fn_r instead of
775 omp_discover_declare_target_fn_r.
776 (omp_discover_implicit_declare_target): Also queue functions with
777 has_omp_target bit set, for those walk with
778 omp_discover_declare_target_fn_r, for declare target to functions
779 walk with omp_discover_declare_target_tgt_fn_r.
781 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
784 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
785 Add SSE/AVX alternative. Change operand predicates from
786 nonimmediate_operand to register_mmxmem_operand.
787 Enable instruction pattern for TARGET_MMX_WITH_SSE.
788 (fix_truncv2sfv2si2): New expander.
789 (fixuns_truncv2sfv2si2): New insn pattern.
791 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
792 Add SSE/AVX alternative. Change operand predicates from
793 nonimmediate_operand to register_mmxmem_operand.
794 Enable instruction pattern for TARGET_MMX_WITH_SSE.
795 (floatv2siv2sf2): New expander.
796 (floatunsv2siv2sf2): New insn pattern.
798 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
800 (IX86_BUILTIN_PI2FD): Ditto.
802 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
804 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
806 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
809 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
811 * config/s390/s390.c (allocate_stack_space): Add missing updates
812 of last_probe_offset.
814 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
816 * config/s390/s390.md ("allocate_stack"): Call
817 anti_adjust_stack_and_probe_stack_clash when stack clash
818 protection is enabled.
819 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
820 prototype. Remove static.
821 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
824 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
826 * config/rs6000/altivec.h (vec_extractl): New #define.
827 (vec_extracth): Likewise.
828 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
829 (UNSPEC_EXTRACTR): Likewise.
830 (vextractl<mode>): New expansion.
831 (vextractl<mode>_internal): New insn.
832 (vextractr<mode>): New expansion.
833 (vextractr<mode>_internal): New insn.
834 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
835 New built-in function.
836 (__builtin_altivec_vextduhvlx): Likewise.
837 (__builtin_altivec_vextduwvlx): Likewise.
838 (__builtin_altivec_vextddvlx): Likewise.
839 (__builtin_altivec_vextdubvhx): Likewise.
840 (__builtin_altivec_vextduhvhx): Likewise.
841 (__builtin_altivec_vextduwvhx): Likewise.
842 (__builtin_altivec_vextddvhx): Likewise.
843 (__builtin_vec_extractl): New overloaded built-in function.
844 (__builtin_vec_extracth): Likewise.
845 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
846 Define overloaded forms of __builtin_vec_extractl and
847 __builtin_vec_extracth.
848 (builtin_function_type): Add cases to mark arguments of new
849 built-in functions as unsigned.
850 (rs6000_common_init_builtins): Add
851 opaque_ftype_opaque_opaque_opaque_opaque.
852 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
853 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
854 for a Future Architecture): Add description of vec_extractl and
855 vec_extractr built-in functions.
857 2020-05-13 Richard Biener <rguenther@suse.de>
859 * target.def (add_stmt_cost): Add new vectype parameter.
860 * targhooks.c (default_add_stmt_cost): Adjust.
861 * targhooks.h (default_add_stmt_cost): Likewise.
862 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
864 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
865 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
866 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
868 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
869 (dump_stmt_cost): Add new vectype parameter.
870 (add_stmt_cost): Likewise.
871 (record_stmt_cost): Likewise.
872 (record_stmt_cost): Add overload with old signature.
873 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
875 (vect_get_known_peeling_cost): Likewise.
876 (vect_estimate_min_profitable_iters): Likewise.
877 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
878 * tree-vect-stmts.c (record_stmt_cost): Likewise.
879 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
880 and pass down correct vectype and NULL stmt_info.
881 (vect_model_simple_cost): Adjust.
882 (vect_model_store_cost): Likewise.
884 2020-05-13 Richard Biener <rguenther@suse.de>
886 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
887 (_slp_instance::group_size): Likewise.
888 * tree-vect-loop.c (vectorizable_reduction): The group size
889 is the number of lanes in the node.
890 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
891 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
892 verify it matches the instance trees number of lanes.
893 (vect_slp_analyze_node_operations_1): Use the numer of lanes
894 in the node as group size.
895 (vect_bb_vectorization_profitable_p): Use the instance root
896 number of lanes for the size of life.
897 (vect_schedule_slp_instance): Use the number of lanes as
899 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
900 parameter. Use the number of lanes of the load for the group
901 size in the gap adjustment code.
902 (vect_analyze_stmt): Adjust.
903 (vect_transform_stmt): Likewise.
905 2020-05-13 Jakub Jelinek <jakub@redhat.com>
908 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
909 if the last insn is a note.
911 PR tree-optimization/95060
912 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
913 if it is the single use of the FMA internal builtin.
915 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
917 PR tree-optimization/94969
918 * tree-data-dependence.c (constant_access_functions): Rename to...
919 (invariant_access_functions): ...this. Add parameter. Check for
920 invariant access function, rather than constant.
921 (build_classic_dist_vector): Call above function.
922 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
924 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
927 * doc/extend.texi (x86Operandmodifiers): Document more x86
929 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
931 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
933 * tree-vrp.c (class vrp_insert): New.
934 (insert_range_assertions): Move to class vrp_insert.
935 (dump_all_asserts): Same as above.
936 (dump_asserts_for): Same as above.
937 (live): Same as above.
938 (need_assert_for): Same as above.
939 (live_on_edge): Same as above.
940 (finish_register_edge_assert_for): Same as above.
941 (find_switch_asserts): Same as above.
942 (find_assert_locations): Same as above.
943 (find_assert_locations_1): Same as above.
944 (find_conditional_asserts): Same as above.
945 (process_assert_insertions): Same as above.
946 (register_new_assert_for): Same as above.
947 (vrp_prop): New variable fun.
948 (vrp_initialize): New parameter.
949 (identify_jump_threads): Same as above.
950 (execute_vrp): Same as above.
953 2020-05-12 Keith Packard <keith.packard@sifive.com>
955 * config/riscv/riscv.c (riscv_unique_section): New.
956 (TARGET_ASM_UNIQUE_SECTION): New.
958 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
960 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
961 * config/riscv/riscv-passes.def: New file.
962 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
963 * config/riscv/riscv-shorten-memrefs.c: New file.
964 * config/riscv/riscv.c (tree-pass.h): New include.
965 (riscv_compressed_reg_p): New Function
966 (riscv_compressed_lw_offset_p): Likewise.
967 (riscv_compressed_lw_address_p): Likewise.
968 (riscv_shorten_lw_offset): Likewise.
969 (riscv_legitimize_address): Attempt to convert base + large_offset
970 to compressible new_base + small_offset.
971 (riscv_address_cost): Make anticipated compressed load/stores
972 cheaper for code size than uncompressed load/stores.
973 (riscv_register_priority): Move compressed register check to
974 riscv_compressed_reg_p.
975 * config/riscv/riscv.h (C_S_BITS): Define.
976 (CSW_MAX_OFFSET): Define.
977 * config/riscv/riscv.opt (mshorten-memefs): New option.
978 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
979 (PASSES_EXTRA): Add riscv-passes.def.
980 * doc/invoke.texi: Document -mshorten-memrefs.
982 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
983 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
984 * doc/tm.texi: Regenerate.
985 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
986 * sched-deps.c (attempt_change): Use old address if it is cheaper than
988 * target.def (new_address_profitable_p): New hook.
989 * targhooks.c (default_new_address_profitable_p): New function.
990 * targhooks.h (default_new_address_profitable_p): Declare.
992 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
995 * config/i386/mmx.md (copysignv2sf3): New expander.
996 (xorsignv2sf3): Ditto.
997 (signbitv2sf3): Ditto.
999 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
1002 * config/i386/mmx.md (fmav2sf4): New insn pattern.
1007 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
1009 * Makefile.in (CET_HOST_FLAGS): New.
1010 (COMPILER): Add $(CET_HOST_FLAGS).
1011 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
1012 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
1014 * aclocal.m4: Regenerated.
1015 * configure: Likewise.
1017 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
1020 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
1021 (*mmx_<code>v2sf2): New insn_and_split pattern.
1022 (*mmx_nabsv2sf2): Ditto.
1023 (*mmx_andnotv2sf3): New insn pattern.
1024 (*mmx_<code>v2sf3): Ditto.
1025 * config/i386/i386.md (absneg_op): New code attribute.
1026 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
1027 (ix86_build_signbit_mask): Ditto.
1029 2020-05-12 Richard Biener <rguenther@suse.de>
1031 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
1034 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1036 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
1037 Update prototype to include "local" argument.
1038 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
1039 "local" argument. Handle local common decls.
1040 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
1041 msp430_output_aligned_decl_common call with 0 for "local" argument.
1042 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
1044 2020-05-12 Richard Biener <rguenther@suse.de>
1046 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
1048 2020-05-12 Martin Liska <mliska@suse.cz>
1052 * sanopt.c (sanitize_rewrite_addressable_params):
1053 Clear DECL_NOT_GIMPLE_REG_P for argument.
1055 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1057 PR tree-optimization/94980
1058 * tree-vect-generic.c (expand_vector_comparison): Use
1059 vector_element_bits_tree to get the element size in bits,
1060 rather than using TYPE_SIZE.
1061 (expand_vector_condition, vector_element): Likewise.
1063 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1065 PR tree-optimization/94980
1066 * tree-vect-generic.c (build_replicated_const): Take the number
1067 of bits as a parameter, instead of the type of the elements.
1068 (do_plus_minus): Update accordingly, using vector_element_bits
1069 to calculate the correct number of bits.
1070 (do_negate): Likewise.
1072 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1074 PR tree-optimization/94980
1075 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
1076 * tree.c (vector_element_bits, vector_element_bits_tree): New.
1077 * match.pd: Use the new functions instead of determining the
1078 vector element size directly from TYPE_SIZE(_UNIT).
1079 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
1080 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
1081 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
1082 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
1083 (expand_vector_conversion): Likewise.
1084 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
1085 a divisor. Convert the dividend to bits to compensate.
1086 * tree-vect-loop.c (vectorizable_live_operation): Call
1087 vector_element_bits instead of open-coding it.
1089 2020-05-12 Jakub Jelinek <jakub@redhat.com>
1091 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
1092 * omp-offload.c: Include context.h.
1093 (omp_declare_target_fn_p, omp_declare_target_var_p,
1094 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
1095 omp_discover_implicit_declare_target): New functions.
1096 * cgraphunit.c (analyze_functions): Call
1097 omp_discover_implicit_declare_target.
1099 2020-05-12 Richard Biener <rguenther@suse.de>
1101 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
1102 literal constant &MEM[..] to a constant literal.
1104 2020-05-12 Richard Biener <rguenther@suse.de>
1106 PR tree-optimization/95045
1107 * dbgcnt.def (lim): Add debug-counter.
1108 * tree-ssa-loop-im.c: Include dbgcnt.h.
1109 (find_refs_for_sm): Use lim debug counter for store motion
1111 (do_store_motion): Rename form store_motion. Commit edge
1113 (store_motion_loop): ... here.
1114 (tree_ssa_lim): Adjust.
1116 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1118 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
1119 (vec_ctzm): Rename to vec_cnttzm.
1120 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1121 Change fourth operand for vec_ternarylogic to require
1122 compatibility with unsigned SImode rather than unsigned QImode.
1123 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1124 Remove overloaded forms of vec_gnb that are no longer needed.
1125 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1126 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
1127 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
1128 vec_gnb; move vec_ternarylogic documentation into this section
1129 and replace const unsigned char with const unsigned int as its
1132 2020-05-11 Carl Love <cel@us.ibm.com>
1134 * config/rs6000/altivec.h (vec_genpcvm): New #define.
1135 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
1137 (XXGENPCVM_V8HI): Likewise.
1138 (XXGENPCVM_V4SI): Likewise.
1139 (XXGENPCVM_V2DI): Likewise.
1140 (XXGENPCVM): New overloaded built-in instantiation.
1141 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
1142 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
1143 (altivec_expand_builtin): Add special handling for
1144 FUTURE_BUILTIN_VEC_XXGENPCVM.
1145 (builtin_function_type): Add handling for
1146 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
1147 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
1148 (UNSPEC_XXGENPCV): New constant.
1149 (xxgenpcvm_<mode>_internal): New insn.
1150 (xxgenpcvm_<mode>): New expansion.
1151 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
1153 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1155 * config/rs6000/altivec.h (vec_strir): New #define.
1156 (vec_stril): Likewise.
1157 (vec_strir_p): Likewise.
1158 (vec_stril_p): Likewise.
1159 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
1160 (UNSPEC_VSTRIL): Likewise.
1161 (vstrir_<mode>): New expansion.
1162 (vstrir_code_<mode>): New insn.
1163 (vstrir_p_<mode>): New expansion.
1164 (vstrir_p_code_<mode>): New insn.
1165 (vstril_<mode>): New expansion.
1166 (vstril_code_<mode>): New insn.
1167 (vstril_p_<mode>): New expansion.
1168 (vstril_p_code_<mode>): New insn.
1169 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
1170 New built-in function.
1171 (__builtin_altivec_vstrihr): Likewise.
1172 (__builtin_altivec_vstribl): Likewise.
1173 (__builtin_altivec_vstrihl): Likewise.
1174 (__builtin_altivec_vstribr_p): Likewise.
1175 (__builtin_altivec_vstrihr_p): Likewise.
1176 (__builtin_altivec_vstribl_p): Likewise.
1177 (__builtin_altivec_vstrihl_p): Likewise.
1178 (__builtin_vec_strir): New overloaded built-in function.
1179 (__builtin_vec_stril): Likewise.
1180 (__builtin_vec_strir_p): Likewise.
1181 (__builtin_vec_stril_p): Likewise.
1182 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1183 Define overloaded forms of __builtin_vec_strir,
1184 __builtin_vec_stril, __builtin_vec_strir_p, and
1185 __builtin_vec_stril_p.
1186 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1187 for a Future Architecture): Add description of vec_stril,
1188 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
1190 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
1192 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
1193 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
1195 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
1196 * config/rs6000/rs6000-builtin.def: Add handling of new macro
1198 (BU_FUTURE_V_4): New macro. Use it.
1199 (BU_FUTURE_OVERLOAD_4): Likewise.
1200 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
1201 handling for quaternary built-in functions.
1202 (altivec_resolve_overloaded_builtin): Add special-case handling
1203 for __builtin_vec_xxeval.
1204 * config/rs6000/rs6000-call.c: Add handling of new macro
1205 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
1206 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
1207 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
1208 (altivec_overloaded_builtins): Add definitions for
1209 FUTURE_BUILTIN_VEC_XXEVAL.
1210 (bdesc_4arg): New array.
1211 (htm_expand_builtin): Add handling for quaternary built-in
1213 (rs6000_expand_quaternop_builtin): New function.
1214 (rs6000_expand_builtin): Add handling for quaternary built-in
1216 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
1217 for unsigned QImode and unsigned HImode.
1218 (builtin_quaternary_function_type): New function.
1219 (rs6000_common_init_builtins): Add handling of quaternary
1221 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
1223 (RS6000_BTC_PREDICATE): Change value of constant.
1224 (RS6000_BTC_ABS): Likewise.
1225 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
1226 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
1227 for a Future Architecture): Add description of vec_ternarylogic
1230 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1232 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
1234 (__builtin_pextd): Likewise.
1235 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
1236 (UNSPEC_PEXTD): Likewise.
1239 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1240 a Future Architecture): Add descriptions of __builtin_pdepd and
1241 __builtin_pextd functions.
1243 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1245 * config/rs6000/altivec.h (vec_clrl): New #define.
1246 (vec_clrr): Likewise.
1247 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
1248 (UNSPEC_VCLRRB): Likewise.
1251 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
1253 (__builtin_altivec_vclrrb): Likewise.
1254 (__builtin_vec_clrl): New overloaded built-in function.
1255 (__builtin_vec_clrr): Likewise.
1256 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1257 Define overloaded forms of __builtin_vec_clrl and
1259 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1260 for a Future Architecture): Add descriptions of vec_clrl and
1263 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1265 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
1266 built-in function definition.
1267 (__builtin_cnttzdm): Likewise.
1268 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
1269 (UNSPEC_CNTTZDM): Likewise.
1270 (cntlzdm): New insn.
1271 (cnttzdm): Likewise.
1272 * doc/extend.texi (Basic PowerPC Built-in Functions available for
1273 a Future Architecture): Add descriptions of __builtin_cntlzdm and
1274 __builtin_cnttzdm functions.
1276 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1279 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
1281 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1283 * config/rs6000/altivec.h (vec_cfuge): New #define.
1284 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
1285 (vcfuged): New insn.
1286 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
1287 New built-in function.
1288 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1289 handling for FUTURE_BUILTIN_VCFUGED case.
1290 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1291 for a Future Architecture): Add description of vec_cfuge built-in
1294 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1296 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
1298 (BU_FUTURE_MISC_1): Likewise.
1299 (BU_FUTURE_MISC_2): Likewise.
1300 (BU_FUTURE_MISC_3): Likewise.
1301 (__builtin_cfuged): New built-in function definition.
1302 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
1304 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1305 a Future Architecture): New subsubsection.
1307 2020-05-11 Richard Biener <rguenther@suse.de>
1309 PR tree-optimization/95049
1310 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
1311 between different constants.
1313 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
1315 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
1317 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1318 Bill Schmidt <wschmidt@linux.ibm.com>
1320 * config/rs6000/altivec.h (vec_gnb): New #define.
1321 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
1323 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
1325 (BU_FUTURE_OVERLOAD_2): Likewise.
1326 (BU_FUTURE_OVERLOAD_3): Likewise.
1327 (__builtin_altivec_gnb): New built-in function.
1328 (__buiiltin_vec_gnb): New overloaded built-in function.
1329 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1330 Define overloaded forms of __builtin_vec_gnb.
1331 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
1332 of __builtin_vec_gnb.
1333 (builtin_function_type): Mark return value and arguments unsigned
1334 for FUTURE_BUILTIN_VGNB.
1335 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1336 for a Future Architecture): Add description of vec_gnb built-in
1339 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1340 Bill Schmidt <wschmidt@linux.ibm.com>
1342 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
1344 (vec_pext): Likewise.
1345 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
1346 (UNSPEC_VPEXTD): Likewise.
1349 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
1351 (__builtin_altivec_vpextd): Likewise.
1352 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1353 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
1355 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1356 for a Future Architecture): Add description of vec_pdep and
1357 vec_pext built-in functions.
1359 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1360 Bill Schmidt <wschmidt@linux.ibm.com>
1362 * config/rs6000/altivec.h (vec_clzm): New macro.
1363 (vec_ctzm): Likewise.
1364 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
1365 (UNSPEC_VCTZDM): Likewise.
1368 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
1369 (BU_FUTURE_V_1): Likewise.
1370 (BU_FUTURE_V_2): Likewise.
1371 (BU_FUTURE_V_3): Likewise.
1372 (__builtin_altivec_vclzdm): New builtin definition.
1373 (__builtin_altivec_vctzdm): Likewise.
1374 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
1375 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
1377 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
1378 value and parameter types to be unsigned for VCLZDM and VCTZDM.
1379 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
1380 support for TARGET_FUTURE flag.
1381 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
1382 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1383 for a Future Architecture): New subsubsection.
1385 2020-05-11 Richard Biener <rguenther@suse.de>
1387 PR tree-optimization/94988
1388 PR tree-optimization/95025
1389 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
1390 (sm_seq_push_down): Take extra parameter denoting where we
1392 (execute_sm_exit): Re-issue sm_other stores in the correct
1394 (sm_seq_valid_bb): When always executed, allow sm_other to
1395 prevail inbetween sm_ord and record their stored value.
1396 (hoist_memory_references): Adjust refs_not_supported propagation
1397 and prune sm_other from the end of the ordered sequences.
1399 2020-05-11 Felix Yang <felix.yang@huawei.com>
1402 * config/aarch64/aarch64.md (mov<mode>):
1403 Bitcasts to the equivalent integer mode using gen_lowpart
1404 instead of doing FAIL for scalar floating point move.
1406 2020-05-11 Alex Coplan <alex.coplan@arm.com>
1408 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
1409 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
1410 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
1411 (*csinv3_uxtw_insn2): New.
1412 (*csinv3_uxtw_insn3): New.
1413 * config/aarch64/iterators.md (neg_not_cs): New.
1415 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1418 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
1419 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
1420 (*mmx_addv2sf3): Ditto.
1421 (*mmx_subv2sf3): Ditto.
1422 (*mmx_mulv2sf3): Ditto.
1423 (*mmx_<code>v2sf3): Ditto.
1424 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1426 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1429 * config/i386/i386.c (ix86_vector_mode_supported_p):
1430 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
1431 * config/i386/mmx.md (*mov<mode>_internal): Do not set
1432 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
1434 (mmx_addv2sf3): Change operand predicates from
1435 nonimmediate_operand to register_mmxmem_operand.
1436 (addv2sf3): New expander.
1437 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
1438 predicates from nonimmediate_operand to register_mmxmem_operand.
1439 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1441 (mmx_subv2sf3): Change operand predicate from
1442 nonimmediate_operand to register_mmxmem_operand.
1443 (mmx_subrv2sf3): Ditto.
1444 (subv2sf3): New expander.
1445 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
1446 predicates from nonimmediate_operand to register_mmxmem_operand.
1447 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1449 (mmx_mulv2sf3): Change operand predicates from
1450 nonimmediate_operand to register_mmxmem_operand.
1451 (mulv2sf3): New expander.
1452 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
1453 predicates from nonimmediate_operand to register_mmxmem_operand.
1454 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1456 (mmx_<code>v2sf3): Change operand predicates from
1457 nonimmediate_operand to register_mmxmem_operand.
1458 (<code>v2sf3): New expander.
1459 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
1460 predicates from nonimmediate_operand to register_mmxmem_operand.
1461 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1462 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1464 2020-05-11 Martin Liska <mliska@suse.cz>
1467 * common.opt: Fix typo in option description.
1469 2020-05-11 Martin Liska <mliska@suse.cz>
1471 PR gcov-profile/94928
1472 * gcov-io.h: Add caveat about coverage format parsing and
1473 possible outdated documentation.
1475 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
1477 PR tree-optimization/83403
1478 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
1479 determine_value_range, Add fold conversion of MULT_EXPR, fix the
1482 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
1484 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
1485 __ILP32__ for 32-bit targets.
1487 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
1489 * tree.h (expr_align): Delete.
1490 * tree.c (expr_align): Likewise.
1492 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
1494 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
1495 from end_of_function_needs.
1497 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
1498 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
1500 * config/cris/t-elfmulti: Remove crisv32 multilib.
1501 * config/cris: Remove shared-library and CRIS v32 support.
1503 Move trivially from cc0 to reg:CC model, removing most optimizations.
1504 * config/cris/cris.md: Remove all side-effect patterns and their
1505 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
1506 to all but post-reload control-flow and movem insns. Remove
1507 constraints on all modified expanders. Remove obsoleted cc0-related
1509 (attr "cc"): Remove alternative "rev".
1510 (mode_iterator BWDD, DI_, SI_): New.
1511 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
1512 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
1513 ("mstep_shift", "mstep_mul"): Remove patterns.
1514 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
1515 * config/cris/cris.c: Change all non-condition-code,
1516 non-control-flow emitted insns to add a parallel with clobber of
1517 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
1518 emit_insn to use of emit_move_insn, gen_add2_insn or
1519 cris_emit_insn, as convenient.
1520 (cris_reg_overlap_mentioned_p)
1521 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
1522 (cris_movem_load_rest_p): Don't assume all elements in a
1524 (cris_store_multiple_op_p): Ditto.
1525 (cris_emit_insn): New function.
1526 * cris/cris-protos.h (cris_emit_insn): Declare.
1529 * config/cris/cris.md (zcond): New code_iterator.
1530 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
1532 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
1534 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
1536 * config/cris/cris.md ("movsi"): For memory destination
1537 post-reload, generate clobberless variant. Similarly for a
1538 zero-source post-reload.
1539 ("*mov_tomem<mode>_split"): New split.
1540 ("*mov_tomem<mode>"): New insn.
1541 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
1542 "Q>m" for less-than-SImode.
1543 ("*mov_fromzero<mode>_split"): New split.
1544 ("*mov_fromzero<mode>"): New insn.
1546 Prepare for cmpelim pass to eliminate redundant compare insns.
1547 * config/cris/cris-modes.def: New file.
1548 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
1549 (cris_notice_update_cc): Remove left-over declaration.
1550 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
1551 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
1552 * config/cris/cris.h (SELECT_CC_MODE): Define.
1553 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
1555 (cond): New code_iterator.
1556 (nzcond): Replacement for incorrect ncond. All callers changed.
1557 (nzvccond): Replacement for ocond. All callers changed.
1558 (rnzcond): Replacement for rcond. All callers changed.
1559 (xCC): New code_attr.
1560 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
1562 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
1563 CCmode with iteration over NZVCSET.
1564 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
1566 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
1567 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
1568 ("*btst<mode>"): Similarly, from "*btst".
1569 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
1570 iterating over cond instead of matching the comparison with
1571 ordered_comparison_operator.
1572 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
1573 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
1575 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
1576 NZVCUSE. Remove FIXME.
1577 ("*b<nzcond:code>_reversed<mode>"): Similarly from
1578 "*b<ncond:code>_reversed", over NZUSE.
1579 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
1580 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
1581 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
1582 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1583 depending on CC_NZmode vs. CCmode. Remove FIXME.
1584 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
1585 "*b<rcond:code>_reversed", over NZUSE.
1586 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
1587 iterating over cond instead of matching the comparison with
1588 ordered_comparison_operator.
1589 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
1590 iterating over NZUSE.
1591 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
1592 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1593 depending on CC_NZmode vs. CCmode.
1594 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
1595 NZVCUSE. Remove FIXME.
1596 ("cc"): Comment on new use.
1597 ("cc_enabled"): New attribute.
1598 ("enabled"): Make default fall back to cc_enabled.
1599 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
1600 default_subst_attrs.
1601 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
1602 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
1603 "*movsi_internal". Correct contents of, and rename attribute
1604 "cc" to "cc<cccc><ccnz><ccnzvc>".
1605 ("anz", "anzvc", "acc"): New define_subst_attrs.
1606 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
1607 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
1608 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
1609 "movqi". Correct contents of, and rename "cc" attribute to
1610 "cc<cccc><ccnz><ccnzvc>".
1611 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
1612 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
1613 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
1614 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
1615 Rename from "extend<mode>si2".
1616 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
1617 Similar, from "zero_extend<mode>si2".
1618 ("*adddi3<setnz>"): Rename from "*adddi3".
1619 ("*subdi3<setnz>"): Similarly from "*subdi3".
1620 ("*addsi3<setnz>"): Similarly from "*addsi3".
1621 ("*subsi3<setnz>"): Similarly from "*subsi3".
1622 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
1623 "cc" attribute to "cc<ccnz>".
1624 ("*addqi3<setnz>"): Similarly from "*addqi3".
1625 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
1626 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
1628 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
1629 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
1630 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
1631 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
1632 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
1633 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
1634 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
1635 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
1637 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
1639 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
1641 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
1643 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
1645 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
1647 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
1648 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
1649 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
1650 (znnCC, rznnCC): New code_attrs.
1651 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
1652 obseolete comment. Add belt-and-suspenders mode-test to condition.
1653 Add fixme regarding remaining matched-but-not-generated case.
1654 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
1655 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
1656 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
1657 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
1658 Handle output of CC_ZnNmode.
1659 ("*b<nzcond:code>_reversed<mode>"): Ditto.
1661 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
1662 NEG too. Correct comment.
1663 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
1666 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
1668 * ira-color.c (update_costs_from_allocno): Remove
1669 conflict_cost_update_p argument. Propagate costs only along
1670 threads. Always do conflict cost update. Add printing debugging
1672 (update_costs_from_copies): Add printing debugging info.
1673 (restore_costs_from_copies): Ditto.
1674 (assign_hard_reg): Improve debug info.
1675 (push_only_colorable): Ditto. Call update_costs_from_prefs.
1676 (color_allocnos): Remove update_costs_from_prefs.
1678 2020-05-08 Richard Biener <rguenther@suse.de>
1680 * tree-vectorizer.h (vec_info::slp_loads): New.
1681 (vect_optimize_slp): Declare.
1682 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
1683 nothing when there are no loads.
1684 (vect_gather_slp_loads): Gather loads into a vector.
1685 (vect_supported_load_permutation_p): Remove.
1686 (vect_analyze_slp_instance): Do not verify permutation
1688 (vect_analyze_slp): Optimize permutations of reductions
1689 after all SLP instances have been gathered and gather
1691 (vect_optimize_slp): New function split out from
1692 vect_supported_load_permutation_p. Elide some permutations.
1693 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
1694 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
1695 * tree-vect-stmts.c (vectorizable_load): Check whether
1696 the load can be permuted. When generating code assert we can.
1698 2020-05-08 Richard Biener <rguenther@suse.de>
1700 * tree-ssa-sccvn.c (rpo_avail): Change type to
1701 eliminate_dom_walker *.
1702 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
1703 use the DOM walker availability.
1704 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
1705 with vn_valueize as valueization callback.
1706 (vn_reference_maybe_forwprop_address): Likewise.
1707 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
1708 array_ref_low_bound.
1710 2020-05-08 Jakub Jelinek <jakub@redhat.com>
1712 PR tree-optimization/94786
1713 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
1717 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
1721 * tree.c (get_narrower): Reuse the op temporary instead of
1724 PR tree-optimization/94783
1725 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
1728 PR tree-optimization/94956
1729 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
1730 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
1732 PR tree-optimization/94913
1733 * match.pd (A - B + -1 >= A to B >= A): New simplification.
1734 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
1735 true for TYPE_UNSIGNED integral types.
1738 PR rtl-optimization/94516
1739 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
1741 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
1742 Call df_notes_rescan if that argument is not true and returning true.
1743 * combine.c (adjust_for_new_dest): Pass true as second argument to
1744 remove_reg_equal_equiv_notes.
1745 * postreload.c (reload_combine_recognize_pattern): Don't call
1748 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1750 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
1752 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
1753 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
1754 (*neg_ne_<mode>): Likewise.
1756 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1758 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
1760 (*setbcr_<un>signed_<GPR:mode>): Likewise.
1761 (cstore<mode>4): Use setbc[r] if available.
1762 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
1763 (eq<mode>3): Use setbc for TARGET_FUTURE.
1764 (*eq<mode>3): Avoid for TARGET_FUTURE.
1765 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
1766 else for non-Pmode, use gen_eq and gen_xor.
1767 (*ne<mode>3): Avoid for TARGET_FUTURE.
1768 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
1770 2020-05-07 Jeff Law <law@redhat.com>
1772 * config/h8300/h8300.md: Move expanders and patterns into
1773 files based on functionality.
1774 * config/h8300/addsub.md: New file.
1775 * config/h8300/bitfield.md: New file
1776 * config/h8300/combiner.md: New file
1777 * config/h8300/divmod.md: New file
1778 * config/h8300/extensions.md: New file
1779 * config/h8300/jumpcall.md: New file
1780 * config/h8300/logical.md: New file
1781 * config/h8300/movepush.md: New file
1782 * config/h8300/multiply.md: New file
1783 * config/h8300/other.md: New file
1784 * config/h8300/proepi.md: New file
1785 * config/h8300/shiftrotate.md: New file
1786 * config/h8300/testcompare.md: New file
1788 * config/h8300/h8300.md (adds/subs splitters): Merge into single
1790 (negation expanders and patterns): Simplify and combine using
1792 (one_cmpl expanders and patterns): Likewise.
1793 (tablejump, indirect_jump patterns ): Likewise.
1794 (shift and rotate expanders and patterns): Likewise.
1795 (absolute value expander and pattern): Drop expander, rename pattern
1797 (peephole2 patterns): Move into...
1798 * config/h8300/peepholes.md: New file.
1800 * config/h8300/constraints.md (L and N): Simplify now that we're not
1801 longer supporting the original H8/300 chip.
1802 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
1803 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
1804 (shift_alg_hi, shift_alg_si): Similarly.
1805 (h8300_option_overrides): Similarly. Default to H8/300H. If
1806 compiling for H8/S, then turn off H8/300H. Do not update the
1807 shift_alg tables for H8/300 port.
1808 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
1810 (push, split_adds_subs, h8300_rtx_costs): Likewise.
1811 (h8300_print_operand, compute_mov_length): Likewise.
1812 (output_plussi, compute_plussi_length): Likewise.
1813 (compute_plussi_cc, output_logical_op): Likewise.
1814 (compute_logical_op_length, compute_logical_op_cc): Likewise.
1815 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
1816 (output_a_shift, compute_a_shift_length): Likewise.
1817 (output_a_rotate, compute_a_rotate_length): Likewise.
1818 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
1819 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
1820 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
1821 (attr_cpu, TARGET_H8300): Remove.
1822 (TARGET_DEFAULT): Update.
1823 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
1824 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
1825 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
1826 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
1827 * config/h8300/h8300.md: Simplify patterns throughout.
1828 * config/h8300/t-h8300: Update multilib configuration.
1830 * config/h8300/h8300.h (LINK_SPEC): Remove.
1831 (USER_LABEL_PREFIX): Likewise.
1833 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
1834 (h8300_option_override): Remove remnants of COFF support.
1836 2020-05-07 Alan Modra <amodra@gmail.com>
1838 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
1839 set_rtx_cost with set_src_cost.
1840 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
1842 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
1844 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
1845 redundant half vector handlings for no peeling gaps.
1847 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
1849 * tree-ssa-operands.c (operands_scanner): New class.
1850 (operands_bitmap_obstack): Remove.
1851 (n_initialized): Remove.
1852 (build_uses): Move to operands_scanner class.
1853 (build_vuse): Same as above.
1854 (build_vdef): Same as above.
1855 (verify_ssa_operands): Same as above.
1856 (finalize_ssa_uses): Same as above.
1857 (cleanup_build_arrays): Same as above.
1858 (finalize_ssa_stmt_operands): Same as above.
1859 (start_ssa_stmt_operands): Same as above.
1860 (append_use): Same as above.
1861 (append_vdef): Same as above.
1862 (add_virtual_operand): Same as above.
1863 (add_stmt_operand): Same as above.
1864 (get_mem_ref_operands): Same as above.
1865 (get_tmr_operands): Same as above.
1866 (maybe_add_call_vops): Same as above.
1867 (get_asm_stmt_operands): Same as above.
1868 (get_expr_operands): Same as above.
1869 (parse_ssa_operands): Same as above.
1870 (finalize_ssa_defs): Same as above.
1871 (build_ssa_operands): Same as above, plus create a C-like wrapper.
1872 (update_stmt_operands): Create an instance of operands_scanner.
1874 2020-05-07 Richard Biener <rguenther@suse.de>
1877 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
1878 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
1879 (refered_from_nonlocal_var): Likewise.
1880 (ipa_pta_execute): Likewise.
1882 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
1884 * gcc/tree-ssa-struct-alias.c: Fix comments
1886 2020-05-07 Martin Liska <mliska@suse.cz>
1888 * doc/invoke.texi: Fix 2 optindex entries.
1890 2020-05-07 Richard Biener <rguenther@suse.de>
1893 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
1894 (tree_decl_common::not_gimple_reg_flag): ... to this.
1895 * tree.h (DECL_GIMPLE_REG_P): Rename ...
1896 (DECL_NOT_GIMPLE_REG_P): ... to this.
1897 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
1898 (create_tmp_reg): Simplify.
1899 (create_tmp_reg_fn): Likewise.
1900 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
1901 * gimplify.c (create_tmp_from_val): Simplify.
1902 (gimplify_bind_expr): Likewise.
1903 (gimplify_compound_literal_expr): Likewise.
1904 (gimplify_function_tree): Likewise.
1905 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
1906 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
1907 (asan_add_global): Copy it.
1908 * cgraphunit.c (cgraph_node::expand_thunk): Force args
1910 * function.c (gimplify_parameters): Copy
1911 DECL_NOT_GIMPLE_REG_P.
1912 * ipa-param-manipulation.c
1913 (ipa_param_body_adjustments::common_initialization): Simplify.
1914 (ipa_param_body_adjustments::reset_debug_stmts): Copy
1915 DECL_NOT_GIMPLE_REG_P.
1916 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
1917 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
1918 * tree-cfg.c (make_blocks_1): Simplify.
1919 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
1920 * tree-eh.c (lower_eh_constructs_2): Simplify.
1921 * tree-inline.c (declare_return_variable): Adjust and
1923 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
1924 (copy_result_decl_to_var): Likewise.
1925 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
1926 * tree-nested.c (create_tmp_var_for): Simplify.
1927 * tree-parloops.c (separate_decls_in_region_name): Copy
1928 DECL_NOT_GIMPLE_REG_P.
1929 * tree-sra.c (create_access_replacement): Adjust and
1930 generalize partial def support.
1931 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
1932 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
1933 * tree-ssa.c (maybe_optimize_var): Handle clearing of
1934 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
1936 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
1937 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
1938 DECL_NOT_GIMPLE_REG_P.
1939 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
1940 * cfgexpand.c (avoid_type_punning_on_regs): New.
1941 (discover_nonconstant_array_refs): Call
1942 avoid_type_punning_on_regs to avoid unsupported mode punning.
1944 2020-05-07 Alex Coplan <alex.coplan@arm.com>
1946 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
1949 2020-05-07 Richard Biener <rguenther@suse.de>
1951 PR tree-optimization/57359
1952 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
1953 (in_mem_ref::dep_loop): Repurpose.
1954 (LOOP_DEP_BIT): Remove.
1955 (enum dep_kind): New.
1956 (enum dep_state): Likewise.
1957 (record_loop_dependence): New function to populate the
1959 (query_loop_dependence): New function to query the dependence
1961 (memory_accesses::refs_in_loop): Rename to ...
1962 (memory_accesses::refs_loaded_in_loop): ... this and change to
1964 (outermost_indep_loop): Adjust.
1965 (mem_ref_alloc): Likewise.
1966 (gather_mem_refs_stmt): Likewise.
1967 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
1968 (struct sm_aux): New.
1969 (execute_sm): Split code generation on exits, record state
1971 (enum sm_kind): New.
1972 (execute_sm_exit): Exit code generation part.
1973 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
1974 dependence checking on stores reached from exits.
1975 (sm_seq_valid_bb): New function gathering SM stores on exits.
1976 (hoist_memory_references): Re-implement.
1977 (refs_independent_p): Add tbaa_p parameter and pass it down.
1978 (record_dep_loop): Remove.
1979 (ref_indep_loop_p_1): Fold into ...
1980 (ref_indep_loop_p): ... this and generalize for three kinds
1981 of dependence queries.
1982 (can_sm_ref_p): Adjust according to hoist_memory_references
1984 (store_motion_loop): Don't do anything if the set of SM
1985 candidates is empty.
1986 (tree_ssa_lim_initialize): Adjust.
1987 (tree_ssa_lim_finalize): Likewise.
1989 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
1990 Pierre-Marie de Rodat <derodat@adacore.com>
1992 * dwarf2out.c (add_data_member_location_attribute): Take into account
1993 the variant part offset in the computation of the data bit offset.
1994 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
1995 in the call to field_byte_offset.
1996 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
1997 confusing assertion.
1998 (analyze_variant_discr): Deal with boolean subtypes.
2000 2020-05-07 Martin Liska <mliska@suse.cz>
2002 * lto-wrapper.c: Split arguments of MAKE environment
2005 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
2007 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
2008 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
2009 fenv_var and new_fenv_var.
2011 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2014 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
2016 (avx512dq_vextract<shuffletype>64x2_1_maskm,
2017 avx512f_vextract<shuffletype>32x4_1_maskm,
2018 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
2019 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
2021 (*avx512dq_vextract<shuffletype>64x2_1,
2022 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
2023 define_insns. Even in the masked variant allow memory output but in
2024 that case use 0 rather than 0C constraint on the source of masked-out
2026 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
2028 (*avx512f_vextract<shuffletype>32x4_1,
2029 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
2030 Even in the masked variant allow memory output but in that case use
2031 0 rather than 0C constraint on the source of masked-out elts.
2032 (vec_extract_lo_<mode><mask_name>): Split into ...
2033 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
2034 define_insns. Even in the masked variant allow memory output but in
2035 that case use 0 rather than 0C constraint on the source of masked-out
2037 (vec_extract_hi_<mode><mask_name>): Split into ...
2038 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
2039 define_insns. Even in the masked variant allow memory output but in
2040 that case use 0 rather than 0C constraint on the source of masked-out
2043 2020-05-06 qing zhao <qing.zhao@oracle.com>
2046 * common.opt: Add -flarge-source-files.
2047 * doc/invoke.texi: Document it.
2048 * toplev.c (process_options): set line_table->default_range_bits
2049 to 0 when flag_large_source_files is true.
2051 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
2054 * config/i386/predicates.md (add_comparison_operator): New predicate.
2055 * config/i386/i386.md (compare->add splitter): New splitters.
2057 2020-05-06 Richard Biener <rguenther@suse.de>
2059 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
2060 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
2061 Remove slp_instance parameter, just iterate over all scalar stmts.
2062 (vect_slp_analyze_instance_dependence): Adjust and likewise.
2063 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
2065 (vect_schedule_slp): Just iterate over all scalar stmts.
2066 (vect_supported_load_permutation_p): Adjust.
2067 (vect_transform_slp_perm_load): Remove slp_instance parameter,
2068 instead use the number of lanes in the node as group size.
2069 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
2070 factor instead of slp_instance as parameter.
2071 (vectorizable_load): Adjust.
2073 2020-05-06 Andreas Schwab <schwab@suse.de>
2075 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
2076 (aarch64_get_extension_string_for_isa_flags): Don't declare.
2078 2020-05-06 Richard Biener <rguenther@suse.de>
2081 * cfgloopmanip.c (create_preheader): Require non-complex
2082 preheader edge for CP_SIMPLE_PREHEADERS.
2084 2020-05-06 Richard Biener <rguenther@suse.de>
2086 PR tree-optimization/94963
2087 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
2088 no-warning marking of the conditional store.
2089 (execute_sm): Instead mark the uninitialized state
2090 on loop entry to be not warned about.
2092 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2094 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
2095 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
2096 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
2097 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2099 * config/i386/i386-builtin.def: Add new builtins.
2100 * config/i386/i386-c.c (ix86_target_macros_internal): Define
2102 * config/i386/i386-options.c (ix86_target_string): Add
2104 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
2105 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
2107 * config/i386/i386.md (define_c_enum "unspec"): Add
2108 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
2109 (TSXLDTRK): New define_int_iterator.
2110 ("<tsxldtrk>"): New define_insn.
2111 * config/i386/i386.opt: Add -mtsxldtrk.
2112 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
2113 * config/i386/tsxldtrkintrin.h: New.
2114 * doc/invoke.texi: Document -mtsxldtrk.
2116 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2118 PR tree-optimization/94921
2119 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
2122 2020-05-06 Richard Biener <rguenther@suse.de>
2124 PR tree-optimization/94965
2125 * tree-vect-stmts.c (vectorizable_load): Fix typo.
2127 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2129 * doc/install.texi: Replace Sun with Solaris as appropriate.
2130 (Tools/packages necessary for building GCC, Perl version between
2131 5.6.1 and 5.6.24): Remove Solaris 8 reference.
2132 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
2134 (Specific, i?86-*-solaris2*): Update version references for
2135 Solaris 11.3 and later. Remove gas 2.26 caveat.
2136 (Specific, *-*-solaris2*): Update version references for
2137 Solaris 11.3 and later. Remove boehm-gc reference.
2138 Document GMP, MPFR caveats on Solaris 11.3.
2139 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
2140 (Specific, sparc64-*-solaris2*): Likewise.
2141 Document --build requirement.
2143 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2146 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
2147 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
2149 PR rtl-optimization/94873
2150 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
2151 note if SET_SRC (set) has side-effects.
2153 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2154 Wei Xiao <wei3.xiao@intel.com>
2156 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
2157 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
2158 (ix86_handle_option): Handle -mserialize.
2159 * config.gcc (serializeintrin.h): New header file.
2160 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
2161 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2163 * config/i386/i386-builtin.def: Add new builtin.
2164 * config/i386/i386-c.c (__SERIALIZE__): New macro.
2165 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
2167 * (ix86_valid_target_attribute_inner_p): Add target attribute
2169 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
2171 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
2172 (serialize): New define_insn.
2173 * config/i386/i386.opt (mserialize): New option
2174 * config/i386/immintrin.h: Include serailizeintrin.h.
2175 * config/i386/serializeintrin.h: New header file.
2176 * doc/invoke.texi: Add documents for -mserialize.
2178 2020-05-06 Richard Biener <rguenther@suse.de>
2180 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
2181 to/from pointer conversion checking.
2183 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
2185 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
2187 * config/rs6000/rs6000-c.c: Likewise.
2188 * config/rs6000/rs6000-call.c: Likewise.
2189 * config/rs6000/rs6000.c: Likewise.
2191 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2193 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
2194 (RTEMS_ENDFILE_SPEC): Likewise.
2195 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
2196 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
2197 (LIB_SPECS): Support -nodefaultlibs option.
2198 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
2199 (RTEMS_ENDFILE_SPEC): Likewise.
2200 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2201 (RTEMS_ENDFILE_SPEC): Likewise.
2202 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2203 (RTEMS_ENDFILE_SPEC): Likewise.
2205 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2207 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
2208 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
2210 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2212 * config/pru/pru.h: Mark R3.w0 as caller saved.
2214 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2216 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
2217 and gen_doloop_begin_internal.
2218 (pru_reorg_loop): Use gen_pruloop with mode.
2219 * config/pru/pru.md: Use new @insn syntax.
2221 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2223 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
2225 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2227 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
2228 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
2229 (addqi3_cconly_overflow): Ditto.
2230 (umulv<mode>4): Ditto.
2231 (<s>mul<mode>3_highpart): Ditto.
2232 (tls_global_dynamic_32): Ditto.
2233 (tls_local_dynamic_base_32): Ditto.
2240 (*adddi_4): Remove "m" constraint from scratch operand.
2241 (*add<mode>_4): Ditto.
2243 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2245 PR rtl-optimization/94516
2246 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
2247 with sp = reg, add REG_EQUAL note with sp + const.
2248 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
2249 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
2250 postreload sp = sp + const to sp = reg optimization if needed and
2252 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
2253 reg = sp insn with sp + const REG_EQUAL note. Adjust
2254 try_apply_stack_adjustment caller, call
2255 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
2256 (combine_stack_adjustments): Allocate and free LIVE bitmap,
2257 adjust combine_stack_adjustments_for_block caller.
2259 2020-05-05 Martin Liska <mliska@suse.cz>
2261 PR gcov-profile/93623
2262 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
2265 2020-05-05 Martin Liska <mliska@suse.cz>
2267 * opt-functions.awk (opt_args_non_empty): New function.
2268 * opt-read.awk: Use the function for various option arguments.
2270 2020-05-05 Martin Liska <mliska@suse.cz>
2273 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
2274 report warning when the jobserver is not detected.
2276 2020-05-05 Martin Liska <mliska@suse.cz>
2278 PR gcov-profile/94636
2279 * gcov.c (main): Print total lines summary at the end.
2280 (generate_results): Expect file_name always being non-null.
2281 Print newline after intermediate file is printed in order to align with
2282 what we do for normal files.
2284 2020-05-05 Martin Liska <mliska@suse.cz>
2286 * dumpfile.c (dump_switch_p): Change return type
2287 and print option suggestion.
2288 * dumpfile.h: Change return type.
2289 * opts-global.c (handle_common_deferred_options):
2290 Move error into dump_switch_p function.
2292 2020-05-05 Martin Liska <mliska@suse.cz>
2295 * alloc-pool.h: Use const for some arguments.
2296 * bitmap.h: Likewise.
2297 * mem-stats.h: Likewise.
2298 * sese.h (get_entry_bb): Likewise.
2299 (get_exit_bb): Likewise.
2301 2020-05-05 Richard Biener <rguenther@suse.de>
2303 * tree-vect-slp.c (struct vdhs_data): New.
2304 (vect_detect_hybrid_slp): New walker.
2305 (vect_detect_hybrid_slp): Rewrite.
2307 2020-05-05 Richard Biener <rguenther@suse.de>
2310 * tree-ssa-structalias.c (ipa_pta_execute): Use
2311 varpool_node::externally_visible_p ().
2312 (refered_from_nonlocal_var): Likewise.
2314 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2316 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
2317 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
2318 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
2320 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2322 * gimplify.c (gimplify_init_constructor): Do not put the constructor
2323 into static memory if it is not complete.
2325 2020-05-05 Richard Biener <rguenther@suse.de>
2327 PR tree-optimization/94949
2328 * tree-ssa-loop-im.c (execute_sm): Check whether we use
2329 the multithreaded model or always compute the stored value
2330 before eliding a load.
2332 2020-05-05 Alex Coplan <alex.coplan@arm.com>
2334 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
2336 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2338 PR tree-optimization/94800
2339 * match.pd (X + (X << C) to X * (1 + (1 << C)),
2340 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
2344 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
2346 PR tree-optimization/94914
2347 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
2350 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2352 * config/i386/i386.md (*testqi_ext_3): Use
2353 int_nonimmediate_operand instead of manual mode checks.
2354 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
2355 Use int_nonimmediate_operand predicate. Rewrite
2356 define_insn_and_split pattern to a combine pass splitter.
2358 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2360 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
2361 * configure: Regenerate.
2363 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2366 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
2367 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
2368 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
2369 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
2371 2020-05-04 Clement Chigot <clement.chigot@atos.net>
2372 David Edelsohn <dje.gcc@gmail.com>
2374 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
2375 for fmodl, frexpl, ldexpl and modfl builtins.
2377 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
2380 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
2381 chosen lhs is different from the gcall lhs.
2382 (expand_mask_load_optab_fn): Likewise.
2383 (expand_gather_load_optab_fn): Likewise.
2385 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2388 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
2389 (EQ compare->LTU compare splitter): New splitter.
2390 (NE compare->NEG splitter): Ditto.
2392 2020-05-04 Marek Polacek <polacek@redhat.com>
2395 2020-04-30 Marek Polacek <polacek@redhat.com>
2398 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2399 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2401 2020-05-04 Richard Biener <rguenther@suse.de>
2403 PR tree-optimization/93891
2404 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
2405 the original reference tree for assessing access alignment.
2407 2020-05-04 Richard Biener <rguenther@suse.de>
2409 PR tree-optimization/39612
2410 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
2411 (set_ref_loaded_in_loop): New.
2412 (mark_ref_loaded): Likewise.
2413 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
2414 (execute_sm): Avoid issueing a load when it was not there.
2415 (execute_sm_if_changed): Avoid issueing warnings for the
2418 2020-05-04 Martin Jambor <mjambor@suse.cz>
2421 * tree-inline.c (tree_function_versioning): Leave any type conversion
2422 of replacements to setup_one_parameter and its friend
2423 force_value_to_type.
2425 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2428 * config/i386/predicates.md (shr_comparison_operator): New predicate.
2429 * config/i386/i386.md (compare->shr splitter): New splitters.
2431 2020-05-04 Jakub Jelinek <jakub@redhat.com>
2433 PR tree-optimization/94718
2434 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
2436 PR tree-optimization/94718
2437 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
2438 replace two nop conversions on bit_{and,ior,xor} argument
2439 and result with just one conversion on the result or another argument.
2441 PR tree-optimization/94718
2442 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
2443 -> (X ^ Y) & C eqne 0 optimization to ...
2444 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
2446 * opts.c (get_option_html_page): Instead of hardcoding a list of
2447 options common between C/C++ and Fortran only use gfortran/
2448 documentation for warnings that have CL_Fortran set but not
2451 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
2453 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2454 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
2455 (emit_memmov): Ditto.
2456 (emit_memset): Ditto.
2457 (ix86_expand_strlensi_unroll_1): Ditto.
2458 (release_scratch_register_on_entry): Ditto.
2459 (gen_frame_set): Ditto.
2460 (ix86_emit_restore_reg_using_pop): Ditto.
2461 (ix86_emit_outlined_ms2sysv_restore): Ditto.
2462 (ix86_expand_epilogue): Ditto.
2463 (ix86_expand_split_stack_prologue): Ditto.
2464 * config/i386/i386.md (push immediate splitter): Ditto.
2468 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
2470 PR translation/93861
2471 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
2474 2020-05-02 Jakub Jelinek <jakub@redhat.com>
2476 * config/tilegx/tilegx.md
2477 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
2478 rather than just <n>.
2480 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
2483 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
2484 and crtl->patch_area_entry.
2485 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
2486 * opts.c (common_handle_option): Limit
2487 function_entry_patch_area_size and function_entry_patch_area_start
2488 to USHRT_MAX. Fix a typo in error message.
2489 * varasm.c (assemble_start_function): Use crtl->patch_area_size
2490 and crtl->patch_area_entry.
2491 * doc/invoke.texi: Document the maximum value for
2492 -fpatchable-function-entry.
2494 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
2496 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
2497 Override SUBTARGET_SHADOW_OFFSET macro.
2499 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
2501 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
2502 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
2503 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
2504 * config/i386/freebsd.h: Likewise.
2505 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
2506 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
2508 2020-04-30 Alexandre Oliva <oliva@adacore.com>
2510 * doc/sourcebuild.texi (Effective-Target Keywords): Document
2511 the newly-introduced fileio effective target.
2513 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
2515 PR rtl-optimization/94740
2516 * cse.c (cse_process_notes_1): Replace with...
2517 (cse_process_note_1): ...this new function, acting as a
2518 simplify_replace_fn_rtx callback to process_note. Handle only
2519 REGs and MEMs directly. Validate the MEM if cse_process_note
2520 changes its address.
2521 (cse_process_notes): Replace with...
2522 (cse_process_note): ...this new function.
2523 (cse_extended_basic_block): Update accordingly, iterating over
2524 the register notes and passing individual notes to cse_process_note.
2526 2020-04-30 Carl Love <cel@us.ibm.com>
2528 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
2530 2020-04-30 Martin Jambor <mjambor@suse.cz>
2533 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
2534 saved by the inliner and thunks which had their call inlined.
2535 * ipa-inline-transform.c (save_inline_function_body): Fill in
2536 former_clone_of of new body holders.
2538 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2540 * BASE-VER: Set to 11.0.0.
2542 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
2544 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
2546 2020-04-30 Marek Polacek <polacek@redhat.com>
2549 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2550 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2552 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2554 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
2555 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
2556 * doc/invoke.texi (moutline-atomics): Document as on by default.
2558 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
2561 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
2562 the check for NOTE_INSN_DELETED_LABEL.
2564 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2566 * configure.ac (--with-documentation-root-url,
2567 --with-changes-root-url): Diagnose URL not ending with /,
2568 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
2569 * opts.h (get_changes_url): Remove.
2570 * opts.c (get_changes_url): Remove.
2571 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
2572 or -DCHANGES_ROOT_URL.
2573 * doc/install.texi (--with-documentation-root-url,
2574 --with-changes-root-url): Document.
2575 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
2576 get_changes_url and free, change url variable type to const char * and
2577 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
2578 * config/s390/s390.c (s390_function_arg_vector,
2579 s390_function_arg_float): Likewise.
2580 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2582 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
2584 * config.in: Regenerate.
2585 * configure: Regenerate.
2587 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
2590 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
2592 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
2594 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
2595 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
2597 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
2599 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
2600 Change constraint for vlrl/vstrl to jb4.
2602 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2604 * var-tracking.c (vt_initialize): Move variables pre and post
2605 into inner block and initialize both in order to fix warning
2606 about uninitialized use. Remove unnecessary checks for
2607 frame_pointer_needed.
2609 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2611 * toplev.c (output_stack_usage_1): Ensure that first
2612 argument to fprintf is not null.
2614 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2616 * configure.ac (-with-changes-root-url): New configure option,
2617 defaulting to https://gcc.gnu.org/.
2618 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
2620 * pretty-print.c (get_end_url_string): New function.
2621 (pp_format): Handle %{ and %} for URLs.
2622 (pp_begin_url): Use pp_string instead of pp_printf.
2623 (pp_end_url): Use get_end_url_string.
2624 * opts.h (get_changes_url): Declare.
2625 * opts.c (get_changes_url): New function.
2626 * config/rs6000/rs6000-call.c: Include opts.h.
2627 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
2628 of just in GCC 10.1 in diagnostics and add URL.
2629 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
2630 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2632 * config/s390/s390.c (s390_function_arg_vector,
2633 s390_function_arg_float): Likewise.
2634 * configure: Regenerated.
2637 * config/s390/s390.c (s390_function_arg_vector,
2638 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
2639 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
2640 passed to the function rather than the type of the single element.
2641 Rename cxx17_empty_base_seen variable to empty_base_seen, change
2642 type to int, and adjust diagnostics depending on if the field
2643 has [[no_unique_attribute]] or not.
2646 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
2647 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
2648 used in casts into parens.
2649 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
2650 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
2651 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
2652 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
2653 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
2654 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
2655 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
2656 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
2657 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
2658 _mm256_mask_cmp_epu8_mask): Likewise.
2659 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
2660 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
2661 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
2662 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
2665 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
2666 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
2667 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
2668 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
2669 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
2670 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
2671 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
2672 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
2673 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
2674 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
2675 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
2676 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
2677 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
2679 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
2680 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
2681 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
2682 as mask vector containing -1.0 or -1.0f elts, but instead vector
2683 with all bits set using _mm*_cmpeq_p? with zero operands.
2684 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
2685 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
2686 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
2687 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
2688 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
2689 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
2690 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
2691 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
2692 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
2693 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
2694 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
2695 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
2696 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
2697 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
2698 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
2699 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
2700 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
2702 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
2703 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
2704 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
2705 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
2706 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
2707 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
2708 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
2709 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
2710 _mm512_mask_prefetch_i64scatter_ps): Likewise.
2711 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
2712 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
2713 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
2714 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
2715 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
2716 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
2717 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
2718 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
2719 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
2720 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
2721 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
2722 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
2723 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
2724 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
2725 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
2726 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
2727 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
2728 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
2729 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
2730 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
2731 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
2732 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
2733 _mm_mask_i64scatter_epi64): Likewise.
2735 2020-04-29 Jeff Law <law@redhat.com>
2737 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
2738 division instructions are 4 bytes long.
2740 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2743 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
2744 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2745 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
2746 take address of TARGET_EXPR of fenv_var with void_node initializer.
2749 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2751 PR tree-optimization/94774
2752 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
2755 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2757 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
2758 * calls.c (cxx17_empty_base_field_p): New function. Check
2759 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
2762 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
2765 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
2766 Allow -fcf-protection with -mindirect-branch=thunk-extern and
2767 -mfunction-return=thunk-extern.
2768 * doc/invoke.texi: Update notes for -fcf-protection=branch with
2769 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
2771 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2773 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
2775 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2777 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
2778 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
2779 fenv_var and new_fenv_var.
2781 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2783 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
2784 effective-target keyword.
2785 (arm_arch_v8a_hard_multilib): Likewise.
2786 (arm_arch_v8a_hard): Document new dg-add-options keyword.
2787 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
2788 code is deprecated and has not been updated to handle
2789 DECL_FIELD_ABI_IGNORED.
2790 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2791 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2792 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2793 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2794 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2795 something actually is a HFA or HVA. Record whether we see a
2796 [[no_unique_address]] field that previous GCCs would not have
2797 ignored in this way.
2798 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
2799 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2800 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
2801 diagnostic messages.
2802 (arm_needs_doubleword_align): Add a comment explaining why we
2803 consider even zero-sized fields.
2805 2020-04-29 Richard Biener <rguenther@suse.de>
2806 Li Zekun <lizekun1@huawei.com>
2809 * tree.c (component_ref_size): Guard against error_mark_node
2810 DECL_INITIAL as it happens with LTO.
2812 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2814 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
2815 comment explaining why we consider even zero-sized fields.
2816 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2817 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2818 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2819 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2820 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2821 something actually is a HFA or HVA. Record whether we see a
2822 [[no_unique_address]] field that previous GCCs would not have
2823 ignored in this way.
2824 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
2825 whether diagnostics should be suppressed. Update the calls to
2826 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2827 [[no_unique_address]] case.
2828 (aarch64_return_in_msb): Update call accordingly, never silencing
2830 (aarch64_function_value): Likewise.
2831 (aarch64_return_in_memory_1): Likewise.
2832 (aarch64_init_cumulative_args): Likewise.
2833 (aarch64_gimplify_va_arg_expr): Likewise.
2834 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
2835 use it to decide whether arch64_vfp_is_call_or_return_candidate
2837 (aarch64_pass_by_reference): Update calls accordingly.
2838 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
2839 to decide whether arch64_vfp_is_call_or_return_candidate should be
2842 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
2845 * config/aarch64/aarch64-builtins.c
2846 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
2847 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
2850 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
2852 * configure.ac <$enable_offload_targets>: Do parsing as done
2854 * configure: Regenerate.
2856 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
2857 * configure: Regenerate.
2860 * rtlanal.c (set_noop_p): Handle non-constant selectors.
2863 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
2865 (TARGET_EXCEPT_UNWIND_INFO): Define.
2867 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2870 * config/gcn/gcn.md (*mov<mode>_insn): Use
2871 'reg_overlap_mentioned_p' to check for overlap.
2874 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
2875 instead of cxx17_empty_base_field_p.
2878 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
2879 DECL_FIELD_ABI_IGNORED.
2880 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
2881 * calls.h (cxx17_empty_base_field_p): Change into a temporary
2882 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
2884 * calls.c (cxx17_empty_base_field_p): Remove.
2885 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
2886 DECL_FIELD_ABI_IGNORED.
2887 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
2888 * lto-streamer-out.c (hash_tree): Likewise.
2889 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
2890 cxx17_empty_base_seen to empty_base_seen, change type to int *,
2891 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
2892 cxx17_empty_base_field_p, if "no_unique_address" attribute is
2893 present, propagate that to the caller too.
2894 (rs6000_discover_homogeneous_aggregate): Adjust
2895 rs6000_aggregate_candidate caller, emit different diagnostics
2896 when c++17 empty base fields are present and when empty
2897 [[no_unique_address]] fields are present.
2898 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
2899 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
2902 2020-04-29 Richard Biener <rguenther@suse.de>
2904 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
2905 Just check whether the stmt stores.
2907 2020-04-28 Alexandre Oliva <oliva@adacore.com>
2910 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
2911 output operand in emulation. Don't overwrite pseudos.
2913 2020-04-28 Jeff Law <law@redhat.com>
2915 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
2916 multiply patterns are 4 bytes long.
2918 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2920 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
2921 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
2923 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
2924 Jakub Jelinek <jakub@redhat.com>
2927 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
2928 base class artificial fields.
2929 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
2930 decision is different after this fix.
2932 2020-04-28 David Malcolm <dmalcolm@redhat.com>
2938 * doc/invoke.texi (Static Analyzer Options): Remove
2939 -Wanalyzer-use-of-uninitialized-value.
2940 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
2942 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2944 PR tree-optimization/94809
2945 * tree.c (build_call_expr_internal_loc_array): Call
2946 process_call_operands.
2948 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
2950 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
2951 * config/aarch64/aarch64-tune.md: Regenerate.
2952 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
2953 (thunderx3t110_regmove_cost): Likewise.
2954 (thunderx3t110_vector_cost): Likewise.
2955 (thunderx3t110_prefetch_tune): Likewise.
2956 (thunderx3t110_tunings): Likewise.
2957 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
2959 * config/aarch64/thunderx3t110.md: New file.
2960 * config/aarch64/aarch64.md: Include thunderx3t110.md.
2961 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
2963 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2966 * config/s390/s390.c (s390_function_arg_vector,
2967 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
2969 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
2971 PR tree-optimization/94727
2972 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
2973 operands are invariant booleans, use the mask type associated with the
2974 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
2975 (vectorizable_condition): Pass vectype unconditionally to
2976 vect_is_simple_cond.
2978 2020-04-27 Jakub Jelinek <jakub@redhat.com>
2981 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
2982 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2983 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
2985 2020-04-27 David Malcolm <dmalcolm@redhat.com>
2988 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
2989 default value, so that it can by supplied by get_option_html_page.
2990 * configure: Regenerate.
2991 * opts.c: Include "selftest.h".
2992 (get_option_html_page): New function.
2993 (get_option_url): Use it. Reformat to place comments next to the
2994 expressions they refer to.
2995 (selftest::test_get_option_html_page): New.
2996 (selftest::opts_c_tests): New.
2997 * selftest-run-tests.c (selftest::run_tests): Call
2998 selftest::opts_c_tests.
2999 * selftest.h (selftest::opts_c_tests): New decl.
3001 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
3003 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
3004 UINTVAL to CONST_INTs.
3006 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3008 * config/arm/constraints.md (e): Remove constraint.
3009 (Te): Define constraint.
3010 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
3011 operand 0 from "e" to "Te".
3012 (vaddvaq_<supf><mode>): Likewise.
3013 (vaddvq_p_<supf><mode>): Likewise.
3014 (vmladavq_<supf><mode>): Likewise.
3015 (vmladavxq_s<mode>): Likewise.
3016 (vmlsdavq_s<mode>): Likewise.
3017 (vmlsdavxq_s<mode>): Likewise.
3018 (vaddvaq_p_<supf><mode>): Likewise.
3019 (vmladavaq_<supf><mode>): Likewise.
3020 (vmladavq_p_<supf><mode>): Likewise.
3021 (vmladavxq_p_s<mode>): Likewise.
3022 (vmlsdavq_p_s<mode>): Likewise.
3023 (vmlsdavxq_p_s<mode>): Likewise.
3024 (vmlsdavaxq_s<mode>): Likewise.
3025 (vmlsdavaq_s<mode>): Likewise.
3026 (vmladavaxq_s<mode>): Likewise.
3027 (vmladavaq_p_<supf><mode>): Likewise.
3028 (vmladavaxq_p_s<mode>): Likewise.
3029 (vmlsdavaq_p_s<mode>): Likewise.
3030 (vmlsdavaxq_p_s<mode>): Likewise.
3032 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
3034 * config/arm/arm.c (output_move_neon): Only get the first operand if
3037 2020-04-27 Felix Yang <felix.yang@huawei.com>
3039 PR tree-optimization/94784
3040 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
3041 assert around so that it checks that the two vectors have equal
3042 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
3043 types is a useless_type_conversion_p.
3045 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
3048 * dwarf2cfi.c (struct GTY): Add ra_mangled.
3049 (cfi_row_equal_p): Check ra_mangled.
3050 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
3051 this only handles the sparc logic now.
3052 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
3053 the aarch64 specific logic.
3054 (dwarf2out_frame_debug): Update to use the new subroutines.
3055 (change_cfi_row): Check ra_mangled.
3057 2020-04-27 Jakub Jelinek <jakub@redhat.com>
3060 * config/s390/s390.c (s390_function_arg_vector,
3061 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
3063 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
3065 * common/config/rs6000/rs6000-common.c
3066 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
3068 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
3071 2020-04-27 Martin Liska <mliska@suse.cz>
3074 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
3075 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
3077 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
3080 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
3082 (rs6000_emit_prologue_components):
3083 Check with frame_pointer_needed_indeed.
3084 (rs6000_emit_epilogue_components): Likewise.
3085 (rs6000_emit_prologue): Likewise.
3086 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
3088 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
3090 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
3091 stack frame when debugging and flag_compare_debug is enabled.
3093 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
3095 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
3096 enable PC-relative addressing for -mcpu=future.
3097 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
3098 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
3099 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
3100 suppress PC-relative addressing.
3101 (rs6000_option_override_internal): Split up error messages
3102 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
3105 2020-04-25 Jakub Jelinek <jakub@redhat.com>
3106 Richard Biener <rguenther@suse.de>
3108 PR tree-optimization/94734
3109 PR tree-optimization/89430
3110 * tree-ssa-phiopt.c: Include tree-eh.h.
3111 (cond_store_replacement): Return false if an automatic variable
3112 access could trap. If -fstore-data-races, don't return false
3113 just because an automatic variable is addressable.
3115 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3117 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
3119 (add<mode>_sext_dup2_exec): Likewise.
3121 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
3124 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
3125 endian byteshift_val calculation.
3127 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3129 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
3131 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
3133 * config/aarch64/arm_sve.h: Add a comment.
3135 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
3137 PR rtl-optimization/94708
3138 * combine.c (simplify_if_then_else): Add check for
3139 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
3141 2020-04-23 Martin Sebor <msebor@redhat.com>
3144 * common.opt (-Wno-frame-larger-than): New option.
3145 (-Wno-larger-than, -Wno-stack-usage): Same.
3147 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3149 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
3151 (mov<mode>_exec): Likewise.
3152 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
3153 (<convop><mode><vndi>2_exec): Likewise.
3155 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
3157 PR tree-optimization/94717
3158 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
3159 of the stores doesn't have the same landing pad number as the first.
3160 (coalesce_immediate_stores): Do not try to coalesce the store using
3161 bswap if it doesn't have the same landing pad number as the first.
3163 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
3165 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
3166 Replace outdated link to ELFv2 ABI.
3168 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3171 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
3175 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
3176 temporarily with non-final second operand and updating it later,
3177 push COMPOUND_EXPRs into a vector and process it in reverse,
3178 creating COMPOUND_EXPRs with the final operands.
3180 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
3183 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
3184 bti c and bti j handling.
3186 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3187 Thomas Schwinge <thomas@codesourcery.com>
3191 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
3192 t_async and the wait arguments.
3194 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
3196 PR tree-optimization/94727
3197 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
3198 comparing invariant scalar booleans.
3200 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
3201 Jakub Jelinek <jakub@redhat.com>
3204 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
3205 empty base class artificial fields.
3206 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
3207 different after this fix.
3209 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3212 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
3213 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
3214 if the same type has been diagnosed most recently already.
3216 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3218 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
3220 (__arm_vbicq_n_s16): Likewise.
3221 (__arm_vbicq_n_u32): Likewise.
3222 (__arm_vbicq_n_s32): Likewise.
3223 (__arm_vbicq): Likewise.
3224 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
3225 (__arm_vbicq_n_s32): Likewise.
3226 (__arm_vbicq_n_u16): Likewise.
3227 (__arm_vbicq_n_u32): Likewise.
3228 (__arm_vdupq_m_n_s8): Likewise.
3229 (__arm_vdupq_m_n_s16): Likewise.
3230 (__arm_vdupq_m_n_s32): Likewise.
3231 (__arm_vdupq_m_n_u8): Likewise.
3232 (__arm_vdupq_m_n_u16): Likewise.
3233 (__arm_vdupq_m_n_u32): Likewise.
3234 (__arm_vdupq_m_n_f16): Likewise.
3235 (__arm_vdupq_m_n_f32): Likewise.
3236 (__arm_vldrhq_gather_offset_s16): Likewise.
3237 (__arm_vldrhq_gather_offset_s32): Likewise.
3238 (__arm_vldrhq_gather_offset_u16): Likewise.
3239 (__arm_vldrhq_gather_offset_u32): Likewise.
3240 (__arm_vldrhq_gather_offset_f16): Likewise.
3241 (__arm_vldrhq_gather_offset_z_s16): Likewise.
3242 (__arm_vldrhq_gather_offset_z_s32): Likewise.
3243 (__arm_vldrhq_gather_offset_z_u16): Likewise.
3244 (__arm_vldrhq_gather_offset_z_u32): Likewise.
3245 (__arm_vldrhq_gather_offset_z_f16): Likewise.
3246 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
3247 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
3248 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
3249 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
3250 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
3251 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
3252 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
3253 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
3254 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
3255 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
3256 (__arm_vldrwq_gather_offset_s32): Likewise.
3257 (__arm_vldrwq_gather_offset_u32): Likewise.
3258 (__arm_vldrwq_gather_offset_f32): Likewise.
3259 (__arm_vldrwq_gather_offset_z_s32): Likewise.
3260 (__arm_vldrwq_gather_offset_z_u32): Likewise.
3261 (__arm_vldrwq_gather_offset_z_f32): Likewise.
3262 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
3263 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
3264 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
3265 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
3266 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
3267 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
3268 (__arm_vdwdupq_x_n_u8): Likewise.
3269 (__arm_vdwdupq_x_n_u16): Likewise.
3270 (__arm_vdwdupq_x_n_u32): Likewise.
3271 (__arm_viwdupq_x_n_u8): Likewise.
3272 (__arm_viwdupq_x_n_u16): Likewise.
3273 (__arm_viwdupq_x_n_u32): Likewise.
3274 (__arm_vidupq_x_n_u8): Likewise.
3275 (__arm_vddupq_x_n_u8): Likewise.
3276 (__arm_vidupq_x_n_u16): Likewise.
3277 (__arm_vddupq_x_n_u16): Likewise.
3278 (__arm_vidupq_x_n_u32): Likewise.
3279 (__arm_vddupq_x_n_u32): Likewise.
3280 (__arm_vldrdq_gather_offset_s64): Likewise.
3281 (__arm_vldrdq_gather_offset_u64): Likewise.
3282 (__arm_vldrdq_gather_offset_z_s64): Likewise.
3283 (__arm_vldrdq_gather_offset_z_u64): Likewise.
3284 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
3285 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
3286 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
3287 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
3288 (__arm_vidupq_m_n_u8): Likewise.
3289 (__arm_vidupq_m_n_u16): Likewise.
3290 (__arm_vidupq_m_n_u32): Likewise.
3291 (__arm_vddupq_m_n_u8): Likewise.
3292 (__arm_vddupq_m_n_u16): Likewise.
3293 (__arm_vddupq_m_n_u32): Likewise.
3294 (__arm_vidupq_n_u16): Likewise.
3295 (__arm_vidupq_n_u32): Likewise.
3296 (__arm_vidupq_n_u8): Likewise.
3297 (__arm_vddupq_n_u16): Likewise.
3298 (__arm_vddupq_n_u32): Likewise.
3299 (__arm_vddupq_n_u8): Likewise.
3301 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
3303 * doc/install.texi (D-Specific Options): Document
3304 --enable-libphobos-checking and --with-libphobos-druntime-only.
3306 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3309 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
3310 cxx17_empty_base_seen argument. Pass it to recursive calls.
3311 Ignore cxx17_empty_base_field_p fields after setting
3312 *cxx17_empty_base_seen to true.
3313 (rs6000_discover_homogeneous_aggregate): Adjust
3314 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
3315 aggregates with C++17 empty base fields.
3318 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3319 if last_decl is error_mark_node or has such a TREE_TYPE.
3322 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3323 if last_decl is error_mark_node or has such a TREE_TYPE.
3325 2020-04-22 Felix Yang <felix.yang@huawei.com>
3328 * config/aarch64/aarch64.h (TARGET_SVE):
3329 Add && !TARGET_GENERAL_REGS_ONLY.
3330 (TARGET_SVE2): Add && TARGET_SVE.
3331 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
3332 TARGET_SVE2_SM4): Add && TARGET_SVE2.
3333 * config/aarch64/aarch64-sve-builtins.h
3334 (sve_switcher::m_old_general_regs_only): New member.
3335 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
3337 (reported_missing_registers_p): New variable.
3338 (check_required_extensions): Call check_required_registers before
3339 return if all required extenstions are present.
3340 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
3341 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
3342 global_options.x_target_flags.
3343 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
3344 global_options.x_target_flags if m_old_general_regs_only is true.
3346 2020-04-22 Zackery Spytz <zspytz@gmail.com>
3348 * doc/extend.exi: Add "free" to list of other builtin functions
3351 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
3354 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
3356 (store_quadpti): Ditto.
3357 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
3358 plq will be used and doesn't need it.
3359 (atomic_store<mode>): Ditto, for pstq.
3361 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
3363 * doc/invoke.texi: Update flags turned on by -O3.
3365 2020-04-22 Jakub Jelinek <jakub@redhat.com>
3368 * config/ia64/ia64.c (hfa_element_mode): Ignore
3369 cxx17_empty_base_field_p fields.
3372 * calls.h (cxx17_empty_base_field_p): Declare.
3373 * calls.c (cxx17_empty_base_field_p): Define.
3375 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
3377 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
3379 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3380 Andre Vieira <andre.simoesdiasvieira@arm.com>
3381 Mihail Ionescu <mihail.ionescu@arm.com>
3383 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
3384 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
3385 (ALL_QUIRKS): Add quirk_no_asmcpu.
3386 (cortex-m55): Define new cpu.
3387 * config/arm/arm-tables.opt: Regenerate.
3388 * config/arm/arm-tune.md: Likewise.
3389 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
3391 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
3393 PR tree-optimization/94700
3394 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
3395 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
3396 of similarly-structured but distinct vector types.
3398 2020-04-21 Martin Sebor <msebor@redhat.com>
3401 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
3402 the computation of the lower bound of the source access size.
3403 (builtin_access::generic_overlap): Remove a hack for setting ranges
3406 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
3408 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
3409 (ASM_WEAKEN_DECL): New define.
3410 (HAVE_GAS_WEAKREF): Undefine.
3412 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
3414 PR tree-optimization/94683
3415 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
3416 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
3417 but distinct vector types.
3419 2020-04-21 Jakub Jelinek <jakub@redhat.com>
3422 * stor-layout.c (place_field, finalize_record_size): Don't emit
3423 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
3424 * ubsan.c (ubsan_get_type_descriptor_type,
3425 ubsan_get_source_location_type, ubsan_create_data): Set
3427 * asan.c (asan_global_struct): Likewise.
3429 2020-04-21 Duan bo <duanbo3@huawei.com>
3432 * config/aarch64/aarch64.c: Add an error message for option conflict.
3433 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
3434 incompatible with -fpic, -fPIC and -mabi=ilp32.
3436 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
3439 * omp-low.c (new_omp_context): Remove assignments to
3440 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
3442 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3444 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
3445 ("popcountv2di2_vx"): Use simplify_gen_subreg.
3447 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3450 * config/s390/s390-builtin-types.def: Add 3 new function modes.
3451 * config/s390/s390-builtins.def: Add mode dependent low-level
3452 builtin and map the overloaded builtins to these.
3453 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
3454 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
3456 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3458 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
3459 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
3460 estimated VF and is no worse at double the estimated VF.
3462 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3465 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
3466 order of arguments to rtx_vector_builder.
3467 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
3468 When extending the trailing constants to a full vector, replace any
3469 variables with zeros.
3471 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
3474 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
3477 2020-04-20 Martin Liska <mliska@suse.cz>
3479 * symtab.c (symtab_node::dump_references): Add space after
3481 (symtab_node::dump_referring): Likewise.
3483 2020-04-18 Jeff Law <law@redhat.com>
3486 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
3489 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
3491 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
3492 attributes): Document d_runtime_has_std_library.
3494 2020-04-17 Jeff Law <law@redhat.com>
3496 PR rtl-optimization/90275
3497 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
3498 when the destination has a REG_UNUSED note.
3500 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
3503 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
3506 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
3508 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
3509 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
3510 cost of load and store insns if one loop iteration has enough scalar
3511 elements to use an Advanced SIMD LDP or STP.
3512 (aarch64_add_stmt_cost): Update call accordingly.
3514 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3515 Jeff Law <law@redhat.com>
3518 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
3519 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
3520 or pos + len >= 32, or pos + len is equal to operands[2] precision
3521 and operands[2] is not a register operand. During splitting perform
3522 SImode AND if operands[0] doesn't have CCZmode and pos + len is
3523 equal to mode precision.
3525 2020-04-17 Richard Biener <rguenther@suse.de>
3528 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
3530 * dwarf2out.c (dw_val_equal_p): Fix pasto in
3531 dw_val_class_vms_delta comparison.
3532 * optabs.c (expand_binop_directly): Fix pasto in commutation
3534 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
3537 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3539 PR rtl-optimization/94618
3540 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
3541 insn is the BB_END of its block, but also when it is only followed
3542 by DEBUG_INSNs in its block.
3544 PR tree-optimization/94621
3545 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
3546 Move id->adjust_array_error_bounds check first in the condition.
3548 2020-04-17 Martin Liska <mliska@suse.cz>
3549 Jonathan Yong <10walls@gmail.com>
3551 PR gcov-profile/94570
3552 * coverage.c (coverage_init): Use separator properly.
3554 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
3556 PR rtl-optimization/93974
3557 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
3558 (rs6000_cannot_substitute_mem_equiv_p): New function.
3560 2020-04-16 Martin Jambor <mjambor@suse.cz>
3563 * ipa-inline.h (ipa_saved_clone_sources): Declare.
3564 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
3565 (save_inline_function_body): Link the new body holder with the
3567 * cgraph.c: Include ipa-inline.h.
3568 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
3569 the statement in ipa_saved_clone_sources.
3570 * cgraphunit.c: Include ipa-inline.h.
3571 (expand_all_functions): Free ipa_saved_clone_sources.
3573 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3576 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
3577 the VNx16BI lowpart of the recursively-generated constant.
3579 2020-04-16 Martin Liska <mliska@suse.cz>
3580 Jakub Jelinek <jakub@redhat.com>
3583 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
3584 DECL_IS_REPLACEABLE_OPERATOR during cloning.
3585 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
3586 (propagate_necessity): Check operator names.
3588 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3590 PR rtl-optimization/94605
3591 * early-remat.c (early_remat::process_block): Handle insns that
3592 set multiple candidate registers.
3593 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
3595 PR gcov-profile/93401
3596 * common.opt (profile-prefix-path): New option.
3597 * coverae.c: Include diagnostics.h.
3598 (coverage_init): Strip profile prefix path.
3599 * doc/invoke.texi (-fprofile-prefix-path): Document.
3601 2020-04-16 Richard Biener <rguenther@suse.de>
3604 * expr.c (emit_move_multi_word): Do not generate code when
3605 the destination part is undefined_operand_subword_p.
3606 * lower-subreg.c (resolve_clobber): Look through a paradoxica
3609 2020-04-16 Martin Jambor <mjambor@suse.cz>
3611 PR tree-optimization/94598
3612 * tree-sra.c (verify_sra_access_forest): Fix verification of total
3613 scalarization accesses under access to one-element arrays.
3615 2020-04-16 Jakub Jelinek <jakub@redhat.com>
3618 * function.c (assign_parm_find_data_types): Add workaround for
3619 BROKEN_VALUE_INITIALIZATION compilers.
3621 2020-04-16 Richard Biener <rguenther@suse.de>
3623 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
3626 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
3629 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
3630 Require OPTION_MASK_ISA_SSE2.
3632 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
3635 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
3636 Don't construct a dump_context temporary to call static method.
3638 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
3640 * config/aarch64/falkor-tag-collision-avoidance.c
3641 (valid_src_p): Check for aarch64_address_info type before
3642 accessing base field.
3644 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
3646 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
3647 (V_sz_elem2): Remove unused mode attribute.
3649 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
3651 * config/arm/arm.md (arm_movdi): Disallow for MVE.
3653 2020-04-15 Richard Biener <rguenther@suse.de>
3656 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
3657 alias_sets_conflict_p for pointers.
3659 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
3662 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
3663 (extendhisi2_internal): Add %v1 before the load instructions.
3665 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
3668 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
3669 use PC-relative addressing for TLS references.
3671 2020-04-14 Martin Jambor <mjambor@suse.cz>
3674 * ipa-sra.c: Include internal-fn.h.
3675 (enum isra_scan_context): Update comment.
3676 (scan_function): Treat calls to internal_functions like loads or stores.
3678 2020-04-14 Yang Yang <yangyang305@huawei.com>
3680 PR tree-optimization/94574
3681 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
3682 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
3684 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
3687 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
3689 2020-04-13 Martin Sebor <msebor@redhat.com>
3691 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
3692 -Wformat-truncation. Move -Wzero-length-bounds last.
3693 (-Wrestrict): Document positive form of option enabled by -Wall.
3695 2020-04-13 Zachary Spytz <zspytz@gmail.com>
3697 * doc/extend.texi: Add realloc to list of built-in functions
3698 are recognized by the compiler.
3700 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
3703 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
3704 pointer in word_mode for eh_return epilogues.
3706 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3708 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
3709 memory references in %B, %C and %D operand selectors when the inner
3710 operand is a post increment address.
3712 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3714 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
3715 reference by 4 bytes, and %D memory reference by 6 bytes.
3717 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
3720 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
3721 condition for V4SI, V8HI and V16QI modes.
3723 2020-04-11 Jakub Jelinek <jakub@redhat.com>
3727 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
3730 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
3734 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
3735 "#pragma omp declare target" has also been applied.
3737 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3739 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
3740 when to emit the epilogue_helper insn.
3741 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
3744 2020-04-09 Jakub Jelinek <jakub@redhat.com>
3747 * cselib.h (cselib_record_sp_cfa_base_equiv,
3748 cselib_sp_derived_value_p): Declare.
3749 * cselib.c (cselib_record_sp_cfa_base_equiv,
3750 cselib_sp_derived_value_p): New functions.
3751 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
3752 cselib_sp_derived_value_p values.
3753 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
3754 start of extended basic blocks other than the first one
3755 for !frame_pointer_needed functions.
3757 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3759 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
3760 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
3761 (aarch64_sve2048_hw): Document.
3762 * config/aarch64/aarch64-protos.h
3763 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
3764 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
3765 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
3766 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
3768 (find_type_suffix_for_scalar_type): Use it instead of comparing
3770 (function_resolver::infer_vector_or_tuple_type): Likewise.
3771 (function_resolver::require_vector_type): Likewise.
3772 (handle_arm_sve_vector_bits_attribute): New function.
3773 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
3774 (aarch64_attribute_table): Add arm_sve_vector_bits.
3775 (aarch64_return_in_memory_1):
3776 (pure_scalable_type_info::piece::get_rtx): New function.
3777 (pure_scalable_type_info::num_zr): Likewise.
3778 (pure_scalable_type_info::num_pr): Likewise.
3779 (pure_scalable_type_info::get_rtx): Likewise.
3780 (pure_scalable_type_info::analyze): Likewise.
3781 (pure_scalable_type_info::analyze_registers): Likewise.
3782 (pure_scalable_type_info::analyze_array): Likewise.
3783 (pure_scalable_type_info::analyze_record): Likewise.
3784 (pure_scalable_type_info::add_piece): Likewise.
3785 (aarch64_some_values_include_pst_objects_p): Likewise.
3786 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
3787 to analyze whether the type is returned in SVE registers.
3788 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
3789 is passed in SVE registers.
3790 (aarch64_pass_by_reference_1): New function, extracted from...
3791 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
3792 to analyze whether the type is a pure scalable type and, if so,
3793 whether it should be passed by reference.
3794 (aarch64_return_in_msb): Return false for pure scalable types.
3795 (aarch64_function_value_1): Fold back into...
3796 (aarch64_function_value): ...this function. Use
3797 pure_scalable_type_info to analyze whether the type is a pure
3798 scalable type and, if so, which registers it should use. Handle
3799 types that include pure scalable types but are not themselves
3800 pure scalable types.
3801 (aarch64_return_in_memory_1): New function, split out from...
3802 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
3803 to analyze whether the type is a pure scalable type and, if so,
3804 whether it should be returned by reference.
3805 (aarch64_layout_arg): Remove orig_mode argument. Use
3806 pure_scalable_type_info to analyze whether the type is a pure
3807 scalable type and, if so, which registers it should use. Handle
3808 types that include pure scalable types but are not themselves
3809 pure scalable types.
3810 (aarch64_function_arg): Update call accordingly.
3811 (aarch64_function_arg_advance): Likewise.
3812 (aarch64_pad_reg_upward): On big-endian targets, return false for
3813 pure scalable types that are smaller than 16 bytes.
3814 (aarch64_member_type_forces_blk): New function.
3815 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
3816 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
3817 correspond to built-in SVE types. Do not rely on a vector mode
3818 if the type includes an pure scalable type. When returning true,
3819 assert that the mode is not an SVE mode.
3820 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
3821 built-in types here. When returning true, assert that the type
3822 does not have an SVE mode.
3823 (aarch64_can_change_mode_class): Don't allow anything to change
3824 between a predicate mode and a non-predicate mode. Also don't
3825 allow changes between SVE vector modes and other modes that
3826 might be bigger than 128 bits.
3827 (aarch64_invalid_binary_op): Reject binary operations that mix
3828 SVE and GNU vector types.
3829 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
3831 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3833 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
3834 "SVE sizeless type".
3835 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
3836 (sizeless_type_p): New functions.
3837 (register_builtin_types): Apply make_type_sizeless to the type.
3838 (register_tuple_type): Likewise.
3839 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
3841 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
3843 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
3846 2020-04-09 Martin Jambor <mjambor@suse.cz>
3847 Richard Biener <rguenther@suse.de>
3849 PR tree-optimization/94482
3850 * tree-sra.c (create_access_replacement): Dump new replacement with
3852 (sra_modify_expr): Fix handling of cases when the original EXPR writes
3853 to only part of the replacement.
3854 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
3855 the first operand of combinations into REAL/IMAGPART_EXPR and
3858 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3860 * doc/sourcebuild.texi (check-function-bodies): Treat the third
3861 parameter as a list of option regexps and require each regexp
3864 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
3867 * config/aarch64/falkor-tag-collision-avoidance.c
3868 (valid_src_p): Fix missing rtx type check.
3870 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3871 Richard Biener <rguenther@suse.de>
3873 PR tree-optimization/93674
3874 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
3875 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
3876 or non-mode precision type, add candidate in unsigned type with the
3879 2020-04-08 Clement Chigot <clement.chigot@atos.net>
3881 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
3882 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
3883 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
3885 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3888 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
3890 * reload1.c (eliminate_regs_1): Avoid creating
3891 (plus (reg) (const_int 0)) in DEBUG_INSNs.
3893 PR tree-optimization/94524
3894 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
3895 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
3896 op1 rather than op1 itself at the end. Punt for signed modulo by
3897 most negative constant.
3898 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
3899 modulo by most negative constant.
3901 2020-04-08 Richard Biener <rguenther@suse.de>
3903 PR rtl-optimization/93946
3904 * cse.c (cse_insn): Record the tabled expression in
3905 src_related. Verify a redundant store removal is valid.
3907 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
3910 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
3911 ENDBR at function entry if function will be called indirectly.
3913 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3916 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
3919 2020-04-08 Martin Liska <mliska@suse.cz>
3922 * gimple.c (gimple_call_operator_delete_p): Rename to...
3923 (gimple_call_replaceable_operator_delete_p): ... this.
3924 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3925 * gimple.h (gimple_call_operator_delete_p): Rename to ...
3926 (gimple_call_replaceable_operator_delete_p): ... this.
3927 * tree-core.h (tree_function_decl): Add replaceable_operator
3929 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
3930 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3931 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
3932 (eliminate_unnecessary_stmts): Likewise.
3933 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
3934 Pack DECL_IS_REPLACEABLE_OPERATOR.
3935 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
3936 Unpack the field here.
3937 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
3938 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
3939 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
3940 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
3941 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
3942 replaceable operator flags.
3944 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3945 Matthew Malcomson <matthew.malcomson@arm.com>
3947 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
3948 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
3949 (CX_TERNARY_QUALIFIERS): Likewise.
3950 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
3951 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
3952 (arm_init_acle_builtins): Initialize CDE builtins.
3953 (arm_expand_acle_builtin): Check CDE constant operands.
3954 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
3955 of CDE constant operand.
3956 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
3958 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
3959 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
3960 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
3961 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
3962 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
3963 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
3964 * config/arm/arm_cde_builtins.def: New file.
3965 * config/arm/iterators.md (V_reg): New attribute of SI.
3966 * config/arm/predicates.md (const_int_coproc_operand): New.
3967 (const_int_vcde1_operand, const_int_vcde2_operand): New.
3968 (const_int_vcde3_operand): New.
3969 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
3970 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
3971 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
3972 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
3974 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3976 * config.gcc: Add arm_cde.h.
3977 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
3978 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
3979 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
3980 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
3981 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
3982 * config/arm/arm.h (TARGET_CDE): New macro.
3983 * config/arm/arm_cde.h: New file.
3984 * doc/invoke.texi: Document CDE options +cdecp[0-7].
3985 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
3987 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
3989 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3991 PR rtl-optimization/94516
3992 * postreload.c: Include rtl-iter.h.
3993 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
3994 looking for all MEMs with RTX_AUTOINC operand.
3995 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
3997 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
3999 * omp-grid.c (grid_eliminate_combined_simd_part): Use
4000 OMP_CLAUSE_CODE to access the omp clause code.
4002 2020-04-07 Jeff Law <law@redhat.com>
4004 PR rtl-optimization/92264
4005 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
4006 the destination is the stack pointer.
4008 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4010 PR rtl-optimization/94291
4011 PR rtl-optimization/84169
4012 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
4013 must be a REG or SUBREG of REG; if it is not one of these, don't
4016 2020-04-07 Richard Biener <rguenther@suse.de>
4019 * gimplify.c (gimplify_addr_expr): Also consider generated
4022 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4024 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
4026 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4028 * config/arm/arm_mve.h: Cast some pointers to expected types.
4030 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4032 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
4033 same with '__arm_' prefix.
4035 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4037 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
4039 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4041 * config/arm/arm.c (arm_mve_immediate_check): Removed.
4042 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
4043 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
4044 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
4045 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
4046 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
4047 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
4049 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4051 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
4053 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4055 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
4056 * config/arm/mve/md: Fix v[id]wdup patterns.
4058 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4060 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
4061 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
4063 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4065 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
4066 and remove const_ptr enums.
4068 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4070 * config/arm/arm_mve.h (vsubq_n): Merge with...
4072 (vmulq_n): Merge with...
4074 (__ARM_mve_typeid): Simplify scalar and constant detection.
4076 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4079 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
4080 for inter-lane permutation for 64-byte modes.
4083 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
4084 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
4085 Assume it is a REG after that instead of testing it and doing FAIL
4086 otherwise. Formatting fix.
4088 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
4090 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
4092 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4095 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
4096 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
4098 2020-04-06 Jakub Jelinek <jakub@redhat.com>
4100 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
4101 + const0_rtx return the SP_DERIVED_VALUE_P.
4103 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
4105 PR rtl-optimization/92989
4106 * lra-lives.c (process_bb_lives): Do not treat eh_return data
4107 registers as being live at the beginning of the EH receiver.
4109 2020-04-05 Zachary Spytz <zspytz@gmail.com>
4111 * extend.texi: Add free to list of ISO C90 functions that
4112 are recognized by the compiler.
4114 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
4116 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
4119 * config/microblaze/microblaze.md (trap): Update output pattern.
4121 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
4122 Jakub Jelinek <jakub@redhat.com>
4125 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
4126 arrays, pointer-to-members, function types and qualifiers when
4127 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
4128 to emit type again on definition.
4130 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
4133 * ipa-fnsummary.c (vrp_will_run_p): New function.
4134 (fre_will_run_p): New function.
4135 (evaluate_properties_for_edge): Use it.
4136 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
4137 !optimize_debug to optimize_debug.
4139 2020-04-04 Jakub Jelinek <jakub@redhat.com>
4141 PR rtl-optimization/94468
4142 * cselib.c (references_value_p): Formatting fix.
4143 (cselib_useless_value_p): New function.
4144 (discard_useless_locs, discard_useless_values,
4145 cselib_invalidate_regno_val, cselib_invalidate_mem,
4146 cselib_record_set): Use it instead of
4147 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
4150 * tree-iterator.h (expr_single): Declare.
4151 * tree-iterator.c (expr_single): New function.
4152 * tree.h (protected_set_expr_location_if_unset): Declare.
4153 * tree.c (protected_set_expr_location): Use expr_single.
4154 (protected_set_expr_location_if_unset): New function.
4156 2020-04-03 Jeff Law <law@redhat.com>
4158 PR rtl-optimization/92264
4159 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
4160 reloading of auto-increment addressing modes.
4162 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
4165 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
4168 2020-04-03 Jeff Law <law@redhat.com>
4170 PR rtl-optimization/92264
4171 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
4172 post-increment addressing of source operands as well as residuals
4173 when computing any adjustments to the input pointer.
4175 2020-04-03 Jakub Jelinek <jakub@redhat.com>
4178 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4179 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
4180 second half of first lane from first lane of second operand and
4181 first half of second lane from second lane of first operand.
4183 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
4185 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
4187 2020-04-03 Tamar Christina <tamar.christina@arm.com>
4190 * common/config/aarch64/aarch64-common.c
4191 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
4193 2020-04-03 Richard Biener <rguenther@suse.de>
4196 * tree.c (array_ref_low_bound): Deal with released SSA names
4199 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
4201 * config/gcn/gcn.c (print_operand): Handle unordered comparison
4203 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
4204 comparison operators.
4206 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
4208 PR tree-optimization/94443
4209 * tree-vect-loop.c (vectorizable_live_operation): Use
4210 gsi_insert_seq_before to replace gsi_insert_before.
4212 2020-04-03 Martin Liska <mliska@suse.cz>
4215 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
4216 Compare type attributes for gimple_call_fntypes.
4218 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
4220 * alias.c (get_alias_set): Fix comment typos.
4222 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
4225 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
4226 attribute checking used by TYPE.
4228 2020-04-02 Martin Jambor <mjambor@suse.cz>
4231 * ipa-sra.c (struct caller_issues): New fields candidate and
4232 call_from_outside_comdat.
4233 (check_for_caller_issues): Check for calls from outsied of
4234 candidate's same_comdat_group.
4235 (check_all_callers_for_issues): Set up issues.candidate, check result
4237 (mark_callers_calls_comdat_local): New function.
4238 (process_isra_node_results): Set calls_comdat_local of callers if
4241 2020-04-02 Richard Biener <rguenther@suse.de>
4244 * common.opt (ffinite-loops): Initialize to zero.
4245 * opts.c (default_options_table): Remove OPT_ffinite_loops
4247 * cfgloop.h (loop::finite_p): New member.
4248 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
4249 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
4251 * lto-streamer-in.c (input_cfg): Stream finite_p.
4252 * lto-streamer-out.c (output_cfg): Likewise.
4253 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
4254 from flag_finite_loops at CFG build time.
4255 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
4256 finite_p flag instead of flag_finite_loops.
4257 * doc/invoke.texi (ffinite-loops): Adjust documentation of
4260 2020-04-02 Richard Biener <rguenther@suse.de>
4263 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
4264 DW_TAG_imported_unit.
4266 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
4268 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
4269 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
4272 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
4274 PR tree-optimization/94401
4275 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
4276 access type when loading halves of vector to avoid peeling for gaps.
4278 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4280 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
4281 between a string literal and MIPS_SYSVERSION_SPEC macro.
4283 2020-04-02 Martin Jambor <mjambor@suse.cz>
4285 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
4287 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4289 PR rtl-optimization/92264
4290 * params.opt (-param=max-find-base-term-values=): Decrease default
4293 PR rtl-optimization/92264
4294 * rtl.h (struct rtx_def): Mention that call bit is used as
4295 SP_DERIVED_VALUE_P in cselib.c.
4296 * cselib.c (SP_DERIVED_VALUE_P): Define.
4297 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
4298 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
4299 val_rtx and sp based expression where offsets cancel each other.
4300 (preserve_constants_and_equivs): Formatting fix.
4301 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
4302 locs list for cfa_base_preserved_val if needed. Formatting fix.
4303 (autoinc_split): If the to be returned value is a REG, MEM or
4304 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
4305 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
4306 (rtx_equal_for_cselib_1): Call autoinc_split even if both
4307 expressions are PLUS in Pmode with CONST_INT second operands.
4308 Handle SP_DERIVED_VALUE_P cases.
4309 (cselib_hash_plus_const_int): New function.
4310 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
4311 second operand, as well as for PRE_DEC etc. that ought to be
4312 hashed the same way.
4313 (cselib_subst_to_values): Substitute PLUS with Pmode and
4314 CONST_INT operand if the first operand is a VALUE which has
4315 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
4316 SP_DERIVED_VALUE_P + adjusted offset.
4317 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
4318 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
4319 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
4320 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
4321 on the sp value before calling cselib_add_permanent_equiv on the
4323 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
4324 in the insn without REG_INC note.
4325 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
4326 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
4329 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
4330 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
4332 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4335 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
4336 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
4337 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
4338 intrinsic defintion by adding a new builtin call to writeback into base
4340 (__arm_vldrdq_gather_base_wb_u64): Likewise.
4341 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4342 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4343 (__arm_vldrwq_gather_base_wb_s32): Likewise.
4344 (__arm_vldrwq_gather_base_wb_u32): Likewise.
4345 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4346 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4347 (__arm_vldrwq_gather_base_wb_f32): Likewise.
4348 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4349 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
4350 builtin's qualifier.
4351 (vldrdq_gather_base_wb_z_u): Likewise.
4352 (vldrwq_gather_base_wb_u): Likewise.
4353 (vldrdq_gather_base_wb_u): Likewise.
4354 (vldrwq_gather_base_wb_z_s): Likewise.
4355 (vldrwq_gather_base_wb_z_f): Likewise.
4356 (vldrdq_gather_base_wb_z_s): Likewise.
4357 (vldrwq_gather_base_wb_s): Likewise.
4358 (vldrwq_gather_base_wb_f): Likewise.
4359 (vldrdq_gather_base_wb_s): Likewise.
4360 (vldrwq_gather_base_nowb_z_u): Define builtin.
4361 (vldrdq_gather_base_nowb_z_u): Likewise.
4362 (vldrwq_gather_base_nowb_u): Likewise.
4363 (vldrdq_gather_base_nowb_u): Likewise.
4364 (vldrwq_gather_base_nowb_z_s): Likewise.
4365 (vldrwq_gather_base_nowb_z_f): Likewise.
4366 (vldrdq_gather_base_nowb_z_s): Likewise.
4367 (vldrwq_gather_base_nowb_s): Likewise.
4368 (vldrwq_gather_base_nowb_f): Likewise.
4369 (vldrdq_gather_base_nowb_s): Likewise.
4370 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
4372 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
4373 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
4374 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
4375 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
4376 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
4377 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
4378 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
4379 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
4380 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
4381 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
4382 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
4384 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
4386 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
4387 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
4388 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
4389 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
4390 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
4391 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
4392 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
4393 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
4394 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
4396 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
4397 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
4398 Remove constraints from expander.
4399 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
4400 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
4401 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
4402 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
4403 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
4404 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
4406 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
4408 PR rtl-optimization/94123
4409 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
4410 flag_split_wide_types_early.
4412 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
4414 * doc/extend.texi (Common Function Attributes): Fix typo.
4416 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
4419 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
4422 2020-04-01 Zackery Spytz <zspytz@gmail.com>
4424 * doc/extend.texi: Fix a typo in the documentation of the
4425 copy function attribute.
4427 2020-04-01 Jakub Jelinek <jakub@redhat.com>
4430 * tree-object-size.c (pass_object_sizes::execute): Don't call
4431 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
4432 call replace_call_with_value.
4434 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
4436 PR tree-optimization/94043
4437 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
4438 phi for vec_lhs and use it for lane extraction.
4440 2020-03-31 Felix Yang <felix.yang@huawei.com>
4442 PR tree-optimization/94398
4443 * tree-vect-stmts.c (vectorizable_store): Instead of calling
4444 vect_supportable_dr_alignment, set alignment_support_scheme to
4445 dr_unaligned_supported for gather-scatter accesses.
4446 (vectorizable_load): Likewise.
4448 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
4450 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
4452 (vnsi, VnSI, vndi, VnDI): New mode attributes.
4453 (mov<mode>): Use <VnDI> in place of V64DI.
4454 (mov<mode>_exec): Likewise.
4455 (mov<mode>_sgprbase): Likewise.
4456 (reload_out<mode>): Likewise.
4457 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
4458 (gather_load<mode>v64si): Rename to ...
4459 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
4460 and <VnDI> in place of V64DI.
4461 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
4462 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
4463 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
4464 (scatter_store<mode>v64si): Rename to ...
4465 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4466 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
4467 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
4468 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
4469 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
4470 (ds_bpermute<mode>): Use <VnSI>.
4471 (addv64si3_vcc<exec_vcc>): Rename to ...
4472 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4473 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
4474 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
4475 (addcv64si3<exec_vcc>): Rename to ...
4476 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
4477 (subv64si3_vcc<exec_vcc>): Rename to ...
4478 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4479 (subcv64si3<exec_vcc>): Rename to ...
4480 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
4481 (addv64di3): Rename to ...
4482 (add<mode>3): ... this, and use V_DI.
4483 (addv64di3_exec): Rename to ...
4484 (add<mode>3_exec): ... this, and use V_DI.
4485 (subv64di3): Rename to ...
4486 (sub<mode>3): ... this, and use V_DI.
4487 (subv64di3_exec): Rename to ...
4488 (sub<mode>3_exec): ... this, and use V_DI.
4489 (addv64di3_zext): Rename to ...
4490 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
4491 (addv64di3_zext_exec): Rename to ...
4492 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4493 (addv64di3_zext_dup): Rename to ...
4494 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
4495 (addv64di3_zext_dup_exec): Rename to ...
4496 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
4497 (addv64di3_zext_dup2): Rename to ...
4498 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4499 (addv64di3_zext_dup2_exec): Rename to ...
4500 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4501 (addv64di3_sext_dup2): Rename to ...
4502 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
4503 (addv64di3_sext_dup2_exec): Rename to ...
4504 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
4505 (<su>mulv64si3_highpart<exec>): Rename to ...
4506 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
4507 (mulv64di3): Rename to ...
4508 (mul<mode>3): ... this, and use V_DI and <VnSI>.
4509 (mulv64di3_exec): Rename to ...
4510 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
4511 (mulv64di3_zext): Rename to ...
4512 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
4513 (mulv64di3_zext_exec): Rename to ...
4514 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4515 (mulv64di3_zext_dup2): Rename to ...
4516 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4517 (mulv64di3_zext_dup2_exec): Rename to ...
4518 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4519 (<expander>v64di3): Rename to ...
4520 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
4521 (<expander>v64di3_exec): Rename to ...
4522 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
4523 (<expander>v64si3<exec>): Rename to ...
4524 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4525 (v<expander>v64si3<exec>): Rename to ...
4526 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4527 (<expander>v64si3<exec>): Rename to ...
4528 (<expander><vnsi>3<exec>): ... this, and use V_SI.
4529 (subv64df3<exec>): Rename to ...
4530 (sub<mode>3<exec>): ... this, and use V_DF.
4531 (truncv64di<mode>2): Rename to ...
4532 (trunc<vndi><mode>2): ... this, and use <VnDI>.
4533 (truncv64di<mode>2_exec): Rename to ...
4534 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
4535 (<convop><mode>v64di2): Rename to ...
4536 (<convop><mode><vndi>2): ... this, and use <VnDI>.
4537 (<convop><mode>v64di2_exec): Rename to ...
4538 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
4539 (vec_cmp<u>v64qidi): Rename to ...
4540 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
4541 (vec_cmp<u>v64qidi_exec): Rename to ...
4542 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
4543 (vcond_mask_<mode>di): Use <VnDI>.
4544 (maskload<mode>di): Likewise.
4545 (maskstore<mode>di): Likewise.
4546 (mask_gather_load<mode>v64si): Rename to ...
4547 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4548 (mask_scatter_store<mode>v64si): Rename to ...
4549 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4550 (*<reduc_op>_dpp_shr_v64di): Rename to ...
4551 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4552 (*plus_carry_in_dpp_shr_v64si): Rename to ...
4553 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
4554 (*plus_carry_dpp_shr_v64di): Rename to ...
4555 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4556 (vec_seriesv64si): Rename to ...
4557 (vec_series<mode>): ... this, and use V_SI.
4558 (vec_seriesv64di): Rename to ...
4559 (vec_series<mode>): ... this, and use V_DI.
4561 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4563 * config/arc/arc.c (arc_print_operand): Use
4564 HOST_WIDE_INT_PRINT_DEC macro.
4566 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4568 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
4570 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4572 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
4574 (__arm_vbicq): Likewise.
4576 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
4578 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
4580 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4582 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
4583 common section of both MVE Integer and MVE Floating Point.
4585 (vaddlvq_p): Likewise.
4586 (vaddvaq): Likewise.
4587 (vaddvq_p): Likewise.
4588 (vcmpcsq): Likewise.
4589 (vmlsdavxq): Likewise.
4590 (vmlsdavq): Likewise.
4591 (vmladavxq): Likewise.
4592 (vmladavq): Likewise.
4594 (vminavq): Likewise.
4596 (vmaxavq): Likewise.
4597 (vmlaldavq): Likewise.
4598 (vcmphiq): Likewise.
4599 (vaddlvaq): Likewise.
4600 (vrmlaldavhq): Likewise.
4601 (vrmlaldavhxq): Likewise.
4602 (vrmlsldavhq): Likewise.
4603 (vrmlsldavhxq): Likewise.
4604 (vmlsldavxq): Likewise.
4605 (vmlsldavq): Likewise.
4607 (vrmlaldavhaq): Likewise.
4608 (vcmpgeq_m_n): Likewise.
4609 (vmlsdavxq_p): Likewise.
4610 (vmlsdavq_p): Likewise.
4611 (vmlsdavaxq): Likewise.
4612 (vmlsdavaq): Likewise.
4613 (vaddvaq_p): Likewise.
4614 (vcmpcsq_m_n): Likewise.
4615 (vcmpcsq_m): Likewise.
4616 (vmladavxq_p): Likewise.
4617 (vmladavq_p): Likewise.
4618 (vmladavaxq): Likewise.
4619 (vmladavaq): Likewise.
4620 (vminvq_p): Likewise.
4621 (vminavq_p): Likewise.
4622 (vmaxvq_p): Likewise.
4623 (vmaxavq_p): Likewise.
4624 (vcmphiq_m): Likewise.
4625 (vaddlvaq_p): Likewise.
4626 (vmlaldavaq): Likewise.
4627 (vmlaldavaxq): Likewise.
4628 (vmlaldavq_p): Likewise.
4629 (vmlaldavxq_p): Likewise.
4630 (vmlsldavaq): Likewise.
4631 (vmlsldavaxq): Likewise.
4632 (vmlsldavq_p): Likewise.
4633 (vmlsldavxq_p): Likewise.
4634 (vrmlaldavhaxq): Likewise.
4635 (vrmlaldavhq_p): Likewise.
4636 (vrmlaldavhxq_p): Likewise.
4637 (vrmlsldavhaq): Likewise.
4638 (vrmlsldavhaxq): Likewise.
4639 (vrmlsldavhq_p): Likewise.
4640 (vrmlsldavhxq_p): Likewise.
4641 (vabavq_p): Likewise.
4642 (vmladavaq_p): Likewise.
4643 (vstrbq_scatter_offset): Likewise.
4644 (vstrbq_p): Likewise.
4645 (vstrbq_scatter_offset_p): Likewise.
4646 (vstrdq_scatter_base_p): Likewise.
4647 (vstrdq_scatter_base): Likewise.
4648 (vstrdq_scatter_offset_p): Likewise.
4649 (vstrdq_scatter_offset): Likewise.
4650 (vstrdq_scatter_shifted_offset_p): Likewise.
4651 (vstrdq_scatter_shifted_offset): Likewise.
4652 (vmaxq_x): Likewise.
4653 (vminq_x): Likewise.
4654 (vmovlbq_x): Likewise.
4655 (vmovltq_x): Likewise.
4656 (vmulhq_x): Likewise.
4657 (vmullbq_int_x): Likewise.
4658 (vmullbq_poly_x): Likewise.
4659 (vmulltq_int_x): Likewise.
4660 (vmulltq_poly_x): Likewise.
4663 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4666 * config/aarch64/constraints.md (Uph): New constraint.
4667 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
4668 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
4671 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
4672 Jakub Jelinek <jakub@redhat.com>
4675 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
4676 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
4678 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4680 PR tree-optimization/94403
4681 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
4682 ENUMERAL_TYPE lhs_type.
4684 PR rtl-optimization/94344
4685 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
4686 conversions, either on both operands of |^+ or just one. Handle
4687 also extra same precision conversion on RSHIFT_EXPR first operand
4688 provided RSHIFT_EXPR is performed in unsigned type.
4690 2020-03-30 David Malcolm <dmalcolm@redhat.com>
4692 * lra.c (finish_insn_code_data_once): Set the array elements
4693 to NULL after freeing them.
4695 2020-03-30 Andreas Schwab <schwab@suse.de>
4697 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
4700 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
4702 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
4703 to skip defining builtins based on builtin_mask.
4705 2020-03-30 Jakub Jelinek <jakub@redhat.com>
4708 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
4709 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
4710 operand is a register. Don't enable masked variants for V*[QH]Imode.
4713 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
4714 <store_mask_constraint> instead of m in output operand constraint.
4715 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
4718 2020-03-30 Alan Modra <amodra@gmail.com>
4720 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
4721 (rs6000_indirect_call_template_1): Adjust to suit.
4722 * config/rs6000/rs6000.md (call_local): Merge call_local32,
4723 call_local64, and call_local_aix.
4724 (call_value_local): Simlarly.
4725 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
4726 and disable pattern when CALL_LONG.
4727 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
4728 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
4729 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
4731 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
4734 * doc/invoke.texi: Update -falign-functions, -falign-loops and
4735 -falign-jumps documentation.
4737 2020-03-29 Martin Liska <mliska@suse.cz>
4740 * cgraphunit.c (process_function_and_variable_attributes): Remove
4741 double 'attribute' words.
4743 2020-03-29 John David Anglin <dave.anglin@bell.net>
4745 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
4748 2020-03-28 Jakub Jelinek <jakub@redhat.com>
4751 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
4752 to true after setting size to integer_one_node.
4754 PR tree-optimization/94329
4755 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
4756 on the last stmt in a bb, make sure gsi_prev isn't done immediately
4759 2020-03-27 Alan Modra <amodra@gmail.com>
4762 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
4763 for PLT16_LO and PLT_PCREL.
4764 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
4765 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
4766 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
4768 2020-03-27 Martin Sebor <msebor@redhat.com>
4771 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
4773 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
4775 * config/gcn/gcn-valu.md:
4776 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
4777 (VEC_1REG_MODE): Delete.
4778 (VEC_1REG_ALT): Delete.
4779 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
4780 (VEC_1REG_INT_MODE): Delete.
4781 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
4782 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
4783 (VEC_2REG_MODE): Rename to V_2REG throughout.
4784 (VEC_REG_MODE): Rename to V_noHI throughout.
4785 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
4786 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
4787 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
4788 (VEC_INT_MODE): Delete.
4789 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
4790 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
4791 (FP_MODE): Delete and replace with FP throughout.
4792 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
4793 (VCMP_MODE): Rename to V_noQI throughout and move to top.
4794 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
4795 * config/gcn/gcn.md (FP): New mode iterator.
4796 (FP_1REG): New mode iterator.
4798 2020-03-27 David Malcolm <dmalcolm@redhat.com>
4800 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
4801 now emits two .dot files.
4802 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
4803 (graphviz_out::end_tr): Only close a TR, not a TD.
4804 (graphviz_out::begin_td): New.
4805 (graphviz_out::end_td): New.
4806 (graphviz_out::begin_trtd): New, replacing the old implementation
4807 of graphviz_out::begin_tr.
4808 (graphviz_out::end_tdtr): New, replacing the old implementation
4809 of graphviz_out::end_tr.
4810 * graphviz.h (graphviz_out::begin_td): New decl.
4811 (graphviz_out::end_td): New decl.
4812 (graphviz_out::begin_trtd): New decl.
4813 (graphviz_out::end_tdtr): New decl.
4815 2020-03-27 Richard Biener <rguenther@suse.de>
4818 * dwarf2out.c (should_emit_struct_debug): Return false for
4821 2020-03-27 Richard Biener <rguenther@suse.de>
4823 PR tree-optimization/94352
4824 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
4826 (ssa_propagation_engine::ssa_propagate): ... here after
4827 initializing curr_order.
4829 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
4831 PR tree-optimization/90332
4832 * tree-vect-stmts.c (vector_vector_composition_type): New function.
4833 (get_group_load_store_type): Adjust to call
4834 vector_vector_composition_type, extend it to construct with scalar
4836 (vectorizable_load): Likewise.
4838 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
4840 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
4841 (create_ddg_dep_no_link): Likewise.
4842 (add_cross_iteration_register_deps): Move debug instruction check.
4843 Other minor refactoring.
4844 (add_intra_loop_mem_dep): Do not check for debug instructions.
4845 (add_inter_loop_mem_dep): Likewise.
4846 (build_intra_loop_deps): Likewise.
4847 (create_ddg): Do not include debug insns into the graph.
4848 * ddg.h (struct ddg): Remove num_debug field.
4849 * modulo-sched.c (doloop_register_get): Adjust condition.
4850 (res_MII): Remove DDG num_debug field usage.
4851 (sms_schedule_by_order): Use assertion against debug insns.
4852 (ps_has_conflicts): Drop debug insn check.
4854 2020-03-26 Jakub Jelinek <jakub@redhat.com>
4857 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
4858 that contains exactly one non-DEBUG_BEGIN_STMT statement.
4861 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
4862 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
4863 a single non-debug stmt followed by one or more debug stmts.
4864 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
4865 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
4866 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
4867 gimple_seq_last to check if outer_stmt gbind could be reused and
4868 if yes and it is surrounded by any debug stmts, move them into the
4871 PR rtl-optimization/92264
4872 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
4873 for sp based values in !frame_pointer_needed
4874 && !ACCUMULATE_OUTGOING_ARGS functions.
4876 2020-03-26 Felix Yang <felix.yang@huawei.com>
4878 PR tree-optimization/94269
4879 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
4881 operation to single basic block.
4883 2020-03-25 Jeff Law <law@redhat.com>
4885 PR rtl-optimization/90275
4886 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
4889 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4892 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
4893 mode rather than VOIDmode.
4895 2020-03-25 Martin Sebor <msebor@redhat.com>
4898 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
4899 even for alloca calls resulting from system macro expansion.
4900 Include inlining context in all warnings.
4902 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
4905 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
4906 FPRs to change between SDmode and DDmode.
4908 2020-03-25 Martin Sebor <msebor@redhat.com>
4910 PR tree-optimization/94131
4911 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
4913 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
4914 types have constant sizes.
4916 2020-03-25 Martin Liska <mliska@suse.cz>
4919 * configure.ac: Report error only when --with-zstd
4921 * configure: Regenerate.
4923 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4926 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
4927 INSN_CODE (insn) to -1 when changing the pattern.
4929 2020-03-25 Martin Liska <mliska@suse.cz>
4933 * config/i386/i386-features.c (make_resolver_func): Drop
4934 public flag for resolver.
4935 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
4936 group for resolver and drop public flag if possible.
4937 * multiple_target.c (create_dispatcher_calls): Drop unique_name
4938 and resolution as we want to enable LTO privatization of the default
4941 2020-03-25 Martin Liska <mliska@suse.cz>
4944 * configure.ac: Respect --without-zstd and report
4945 error when we can't find header file with --with-zstd.
4946 * configure: Regenerate.
4948 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4951 * varasm.c (output_constructor_array_range): If local->index
4952 RANGE_EXPR doesn't start at the current location in the constructor,
4953 skip needed number of bytes using assemble_zeros or assert we don't
4957 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
4958 counter instead of DECL_UID.
4960 PR tree-optimization/94300
4961 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
4962 is positive, make sure that off + size isn't larger than needed_len.
4964 2020-03-25 Richard Biener <rguenther@suse.de>
4965 Jakub Jelinek <jakub@redhat.com>
4968 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
4970 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
4972 * doc/sourcebuild.texi (ARM-specific attributes): Add
4974 (Features for dg-add-options): Add arm_fp_dp.
4976 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
4979 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
4981 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
4984 * omp-offload.c (omp_finish_file): Fix target-link handling if
4985 targetm_common.have_named_sections is false.
4987 2020-03-24 Jakub Jelinek <jakub@redhat.com>
4990 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
4994 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
4995 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
4996 If not after and at *incr_pos is a debug stmt, set stmt location to
4997 location of next non-debug stmt after it if any.
5000 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
5001 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
5002 worklist or set GF_PLF_2 just because it is used in a debug stmt in
5003 another bb. Formatting improvements.
5006 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
5007 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
5008 regardless of whether TREE_NO_WARNING is set on it or whether
5009 warn_unused_function is true or not.
5011 2020-03-23 Jeff Law <law@redhat.com>
5013 PR rtl-optimization/90275
5016 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
5017 (simplify_logical_relational_operation): Use it.
5019 2020-03-23 Jakub Jelinek <jakub@redhat.com>
5022 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
5023 ultimate rhs and if returned something different, reconstructing
5026 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
5028 * opts.c (print_filtered_help): Improve the help text for alias options.
5030 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5031 Andre Vieira <andre.simoesdiasvieira@arm.com>
5032 Mihail Ionescu <mihail.ionescu@arm.com>
5034 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
5035 (vshlcq_m_u8): Likewise.
5036 (vshlcq_m_s16): Likewise.
5037 (vshlcq_m_u16): Likewise.
5038 (vshlcq_m_s32): Likewise.
5039 (vshlcq_m_u32): Likewise.
5040 (__arm_vshlcq_m_s8): Define intrinsic.
5041 (__arm_vshlcq_m_u8): Likewise.
5042 (__arm_vshlcq_m_s16): Likewise.
5043 (__arm_vshlcq_m_u16): Likewise.
5044 (__arm_vshlcq_m_s32): Likewise.
5045 (__arm_vshlcq_m_u32): Likewise.
5046 (vshlcq_m): Define polymorphic variant.
5047 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
5048 Use builtin qualifier.
5049 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
5050 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
5051 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
5052 (mve_vshlcq_m_<supf><mode>): Likewise.
5054 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5056 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
5057 (UQSHL_QUALIFIERS): Likewise.
5058 (ASRL_QUALIFIERS): Likewise.
5059 (SQSHL_QUALIFIERS): Likewise.
5060 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
5062 (sqrshr): Define macro.
5063 (sqrshrl): Likewise.
5064 (sqrshrl_sat48): Likewise.
5070 (uqrshll): Likewise.
5071 (uqrshll_sat48): Likewise.
5078 (__arm_lsll): Define intrinsic.
5079 (__arm_asrl): Likewise.
5080 (__arm_uqrshll): Likewise.
5081 (__arm_uqrshll_sat48): Likewise.
5082 (__arm_sqrshrl): Likewise.
5083 (__arm_sqrshrl_sat48): Likewise.
5084 (__arm_uqshll): Likewise.
5085 (__arm_urshrl): Likewise.
5086 (__arm_srshrl): Likewise.
5087 (__arm_sqshll): Likewise.
5088 (__arm_uqrshl): Likewise.
5089 (__arm_sqrshr): Likewise.
5090 (__arm_uqshl): Likewise.
5091 (__arm_urshr): Likewise.
5092 (__arm_sqshl): Likewise.
5093 (__arm_srshr): Likewise.
5094 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
5096 (UQSHL_QUALIFIERS): Likewise.
5097 (ASRL_QUALIFIERS): Likewise.
5098 (SQSHL_QUALIFIERS): Likewise.
5099 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
5100 (mve_sqrshrl_sat<supf>_di): Likewise.
5101 (mve_uqrshl_si): Likewise.
5102 (mve_sqrshr_si): Likewise.
5103 (mve_uqshll_di): Likewise.
5104 (mve_urshrl_di): Likewise.
5105 (mve_uqshl_si): Likewise.
5106 (mve_urshr_si): Likewise.
5107 (mve_sqshl_si): Likewise.
5108 (mve_srshr_si): Likewise.
5109 (mve_srshrl_di): Likewise.
5110 (mve_sqshll_di): Likewise.
5112 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5113 Andre Vieira <andre.simoesdiasvieira@arm.com>
5114 Mihail Ionescu <mihail.ionescu@arm.com>
5116 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
5117 (vsetq_lane_f32): Likewise.
5118 (vsetq_lane_s16): Likewise.
5119 (vsetq_lane_s32): Likewise.
5120 (vsetq_lane_s8): Likewise.
5121 (vsetq_lane_s64): Likewise.
5122 (vsetq_lane_u8): Likewise.
5123 (vsetq_lane_u16): Likewise.
5124 (vsetq_lane_u32): Likewise.
5125 (vsetq_lane_u64): Likewise.
5126 (vgetq_lane_f16): Likewise.
5127 (vgetq_lane_f32): Likewise.
5128 (vgetq_lane_s16): Likewise.
5129 (vgetq_lane_s32): Likewise.
5130 (vgetq_lane_s8): Likewise.
5131 (vgetq_lane_s64): Likewise.
5132 (vgetq_lane_u8): Likewise.
5133 (vgetq_lane_u16): Likewise.
5134 (vgetq_lane_u32): Likewise.
5135 (vgetq_lane_u64): Likewise.
5136 (__ARM_NUM_LANES): Likewise.
5137 (__ARM_LANEQ): Likewise.
5138 (__ARM_CHECK_LANEQ): Likewise.
5139 (__arm_vsetq_lane_s16): Define intrinsic.
5140 (__arm_vsetq_lane_s32): Likewise.
5141 (__arm_vsetq_lane_s8): Likewise.
5142 (__arm_vsetq_lane_s64): Likewise.
5143 (__arm_vsetq_lane_u8): Likewise.
5144 (__arm_vsetq_lane_u16): Likewise.
5145 (__arm_vsetq_lane_u32): Likewise.
5146 (__arm_vsetq_lane_u64): Likewise.
5147 (__arm_vgetq_lane_s16): Likewise.
5148 (__arm_vgetq_lane_s32): Likewise.
5149 (__arm_vgetq_lane_s8): Likewise.
5150 (__arm_vgetq_lane_s64): Likewise.
5151 (__arm_vgetq_lane_u8): Likewise.
5152 (__arm_vgetq_lane_u16): Likewise.
5153 (__arm_vgetq_lane_u32): Likewise.
5154 (__arm_vgetq_lane_u64): Likewise.
5155 (__arm_vsetq_lane_f16): Likewise.
5156 (__arm_vsetq_lane_f32): Likewise.
5157 (__arm_vgetq_lane_f16): Likewise.
5158 (__arm_vgetq_lane_f32): Likewise.
5159 (vgetq_lane): Define polymorphic variant.
5160 (vsetq_lane): Likewise.
5161 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
5163 (mve_vec_extractv2didi): Likewise.
5164 (mve_vec_extract_sext_internal<mode>): Likewise.
5165 (mve_vec_extract_zext_internal<mode>): Likewise.
5166 (mve_vec_set<mode>_internal): Likewise.
5167 (mve_vec_setv2di_internal): Likewise.
5168 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
5170 (vec_extract<mode><V_elem_l>): Rename to
5171 "neon_vec_extract<mode><V_elem_l>".
5172 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
5173 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
5174 pattern common for MVE and NEON.
5175 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
5178 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5180 * config/arm/mve.md (earlyclobber_32): New mode attribute.
5181 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
5182 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
5184 2020-03-23 Richard Biener <rguenther@suse.de>
5186 PR tree-optimization/94261
5187 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
5188 IL operand swapping code.
5189 (vect_slp_rearrange_stmts): Do not arrange isomorphic
5190 nodes that would need operation code adjustments.
5192 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
5194 * doc/install.texi (amdgcn-*-amdhsa): Renamed
5195 from amdgcn-unknown-amdhsa; change
5196 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
5198 2020-03-23 Richard Biener <rguenther@suse.de>
5201 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
5202 directly rather than also folding it via build_fold_addr_expr.
5204 2020-03-23 Richard Biener <rguenther@suse.de>
5206 PR tree-optimization/94266
5207 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
5208 addresses of TARGET_MEM_REFs.
5210 2020-03-23 Martin Liska <mliska@suse.cz>
5213 * symtab.c (symtab_node::clone_references): Save speculative_id
5214 as ref may be overwritten by create_reference.
5215 (symtab_node::clone_referring): Likewise.
5216 (symtab_node::clone_reference): Likewise.
5218 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
5220 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
5221 references to Darwin.
5222 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
5223 unconditionally and comment on why.
5225 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5227 * config/darwin.c (darwin_mergeable_constant_section): Collect
5228 section anchor checks into the caller.
5229 (machopic_select_section): Collect section anchor checks into
5230 the determination of 'effective zero-size' objects. When the
5231 size is unknown, assume it is non-zero, and thus return the
5232 'generic' section for the DECL.
5234 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5237 * config/darwin.opt: Amend options descriptions.
5239 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
5241 PR rtl-optimization/94052
5242 * lra-constraints.c (simplify_operand_subreg): Reload the inner
5243 register of a paradoxical subreg if simplify_subreg_regno fails
5244 to give a valid hard register for the outer mode.
5246 2020-03-20 Martin Jambor <mjambor@suse.cz>
5248 PR tree-optimization/93435
5249 * params.opt (sra-max-propagations): New parameter.
5250 * tree-sra.c (propagation_budget): New variable.
5251 (budget_for_propagation_access): New function.
5252 (propagate_subaccesses_from_rhs): Use it.
5253 (propagate_subaccesses_from_lhs): Likewise.
5254 (propagate_all_subaccesses): Set up and destroy propagation_budget.
5256 2020-03-20 Carl Love <cel@us.ibm.com>
5259 * config/rs6000/rs6000.c (rs6000_option_override_internal):
5260 Add check for TARGET_FPRND for Power 7 or newer.
5262 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
5265 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
5266 (cgraph_edge::redirect_callee): Move here; likewise.
5267 (cgraph_node::remove_callees): Update calls_comdat_local flag.
5268 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
5270 (cgraph_node::check_calls_comdat_local_p): New member function.
5271 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
5272 (cgraph_edge::redirect_callee): Move offline.
5273 * ipa-fnsummary.c (compute_fn_summary): Do not compute
5274 calls_comdat_local flag here.
5275 * ipa-inline-transform.c (inline_call): Fix updating of
5276 calls_comdat_local flag.
5277 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
5278 * symtab.c (symtab_node::add_to_same_comdat_group): Update
5279 calls_comdat_local flag.
5281 2020-03-20 Richard Biener <rguenther@suse.de>
5283 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
5284 from the possibly modified root.
5286 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5287 Andre Vieira <andre.simoesdiasvieira@arm.com>
5288 Mihail Ionescu <mihail.ionescu@arm.com>
5290 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
5291 (vst1q_p_s8): Likewise.
5292 (vst2q_s8): Likewise.
5293 (vst2q_u8): Likewise.
5294 (vld1q_z_u8): Likewise.
5295 (vld1q_z_s8): Likewise.
5296 (vld2q_s8): Likewise.
5297 (vld2q_u8): Likewise.
5298 (vld4q_s8): Likewise.
5299 (vld4q_u8): Likewise.
5300 (vst1q_p_u16): Likewise.
5301 (vst1q_p_s16): Likewise.
5302 (vst2q_s16): Likewise.
5303 (vst2q_u16): Likewise.
5304 (vld1q_z_u16): Likewise.
5305 (vld1q_z_s16): Likewise.
5306 (vld2q_s16): Likewise.
5307 (vld2q_u16): Likewise.
5308 (vld4q_s16): Likewise.
5309 (vld4q_u16): Likewise.
5310 (vst1q_p_u32): Likewise.
5311 (vst1q_p_s32): Likewise.
5312 (vst2q_s32): Likewise.
5313 (vst2q_u32): Likewise.
5314 (vld1q_z_u32): Likewise.
5315 (vld1q_z_s32): Likewise.
5316 (vld2q_s32): Likewise.
5317 (vld2q_u32): Likewise.
5318 (vld4q_s32): Likewise.
5319 (vld4q_u32): Likewise.
5320 (vld4q_f16): Likewise.
5321 (vld2q_f16): Likewise.
5322 (vld1q_z_f16): Likewise.
5323 (vst2q_f16): Likewise.
5324 (vst1q_p_f16): Likewise.
5325 (vld4q_f32): Likewise.
5326 (vld2q_f32): Likewise.
5327 (vld1q_z_f32): Likewise.
5328 (vst2q_f32): Likewise.
5329 (vst1q_p_f32): Likewise.
5330 (__arm_vst1q_p_u8): Define intrinsic.
5331 (__arm_vst1q_p_s8): Likewise.
5332 (__arm_vst2q_s8): Likewise.
5333 (__arm_vst2q_u8): Likewise.
5334 (__arm_vld1q_z_u8): Likewise.
5335 (__arm_vld1q_z_s8): Likewise.
5336 (__arm_vld2q_s8): Likewise.
5337 (__arm_vld2q_u8): Likewise.
5338 (__arm_vld4q_s8): Likewise.
5339 (__arm_vld4q_u8): Likewise.
5340 (__arm_vst1q_p_u16): Likewise.
5341 (__arm_vst1q_p_s16): Likewise.
5342 (__arm_vst2q_s16): Likewise.
5343 (__arm_vst2q_u16): Likewise.
5344 (__arm_vld1q_z_u16): Likewise.
5345 (__arm_vld1q_z_s16): Likewise.
5346 (__arm_vld2q_s16): Likewise.
5347 (__arm_vld2q_u16): Likewise.
5348 (__arm_vld4q_s16): Likewise.
5349 (__arm_vld4q_u16): Likewise.
5350 (__arm_vst1q_p_u32): Likewise.
5351 (__arm_vst1q_p_s32): Likewise.
5352 (__arm_vst2q_s32): Likewise.
5353 (__arm_vst2q_u32): Likewise.
5354 (__arm_vld1q_z_u32): Likewise.
5355 (__arm_vld1q_z_s32): Likewise.
5356 (__arm_vld2q_s32): Likewise.
5357 (__arm_vld2q_u32): Likewise.
5358 (__arm_vld4q_s32): Likewise.
5359 (__arm_vld4q_u32): Likewise.
5360 (__arm_vld4q_f16): Likewise.
5361 (__arm_vld2q_f16): Likewise.
5362 (__arm_vld1q_z_f16): Likewise.
5363 (__arm_vst2q_f16): Likewise.
5364 (__arm_vst1q_p_f16): Likewise.
5365 (__arm_vld4q_f32): Likewise.
5366 (__arm_vld2q_f32): Likewise.
5367 (__arm_vld1q_z_f32): Likewise.
5368 (__arm_vst2q_f32): Likewise.
5369 (__arm_vst1q_p_f32): Likewise.
5370 (vld1q_z): Define polymorphic variant.
5373 (vst1q_p): Likewise.
5375 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
5377 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
5378 (mve_vld2q<mode>): Likewise.
5379 (mve_vld4q<mode>): Likewise.
5381 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5382 Andre Vieira <andre.simoesdiasvieira@arm.com>
5383 Mihail Ionescu <mihail.ionescu@arm.com>
5385 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
5386 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
5387 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
5388 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
5389 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
5390 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
5391 * config/arm/arm_mve.h (vadciq_s32): Define macro.
5392 (vadciq_u32): Likewise.
5393 (vadciq_m_s32): Likewise.
5394 (vadciq_m_u32): Likewise.
5395 (vadcq_s32): Likewise.
5396 (vadcq_u32): Likewise.
5397 (vadcq_m_s32): Likewise.
5398 (vadcq_m_u32): Likewise.
5399 (vsbciq_s32): Likewise.
5400 (vsbciq_u32): Likewise.
5401 (vsbciq_m_s32): Likewise.
5402 (vsbciq_m_u32): Likewise.
5403 (vsbcq_s32): Likewise.
5404 (vsbcq_u32): Likewise.
5405 (vsbcq_m_s32): Likewise.
5406 (vsbcq_m_u32): Likewise.
5407 (__arm_vadciq_s32): Define intrinsic.
5408 (__arm_vadciq_u32): Likewise.
5409 (__arm_vadciq_m_s32): Likewise.
5410 (__arm_vadciq_m_u32): Likewise.
5411 (__arm_vadcq_s32): Likewise.
5412 (__arm_vadcq_u32): Likewise.
5413 (__arm_vadcq_m_s32): Likewise.
5414 (__arm_vadcq_m_u32): Likewise.
5415 (__arm_vsbciq_s32): Likewise.
5416 (__arm_vsbciq_u32): Likewise.
5417 (__arm_vsbciq_m_s32): Likewise.
5418 (__arm_vsbciq_m_u32): Likewise.
5419 (__arm_vsbcq_s32): Likewise.
5420 (__arm_vsbcq_u32): Likewise.
5421 (__arm_vsbcq_m_s32): Likewise.
5422 (__arm_vsbcq_m_u32): Likewise.
5423 (vadciq_m): Define polymorphic variant.
5425 (vadcq_m): Likewise.
5427 (vsbciq_m): Likewise.
5429 (vsbcq_m): Likewise.
5431 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
5433 (BINOP_UNONE_UNONE_UNONE): Likewise.
5434 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5435 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5436 * config/arm/mve.md (VADCIQ): Define iterator.
5437 (VADCIQ_M): Likewise.
5439 (VSBCQ_M): Likewise.
5441 (VSBCIQ_M): Likewise.
5443 (VADCQ_M): Likewise.
5444 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
5445 (mve_vadciq_<supf>v4si): Likewise.
5446 (mve_vadcq_m_<supf>v4si): Likewise.
5447 (mve_vadcq_<supf>v4si): Likewise.
5448 (mve_vsbciq_m_<supf>v4si): Likewise.
5449 (mve_vsbciq_<supf>v4si): Likewise.
5450 (mve_vsbcq_m_<supf>v4si): Likewise.
5451 (mve_vsbcq_<supf>v4si): Likewise.
5452 (get_fpscr_nzcvqc): Define isns.
5453 (set_fpscr_nzcvqc): Define isns.
5454 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
5455 (UNSPEC_SET_FPSCR_NZCVQC): Define.
5457 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5459 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
5460 (vddupq_x_n_u16): Likewise.
5461 (vddupq_x_n_u32): Likewise.
5462 (vddupq_x_wb_u8): Likewise.
5463 (vddupq_x_wb_u16): Likewise.
5464 (vddupq_x_wb_u32): Likewise.
5465 (vdwdupq_x_n_u8): Likewise.
5466 (vdwdupq_x_n_u16): Likewise.
5467 (vdwdupq_x_n_u32): Likewise.
5468 (vdwdupq_x_wb_u8): Likewise.
5469 (vdwdupq_x_wb_u16): Likewise.
5470 (vdwdupq_x_wb_u32): Likewise.
5471 (vidupq_x_n_u8): Likewise.
5472 (vidupq_x_n_u16): Likewise.
5473 (vidupq_x_n_u32): Likewise.
5474 (vidupq_x_wb_u8): Likewise.
5475 (vidupq_x_wb_u16): Likewise.
5476 (vidupq_x_wb_u32): Likewise.
5477 (viwdupq_x_n_u8): Likewise.
5478 (viwdupq_x_n_u16): Likewise.
5479 (viwdupq_x_n_u32): Likewise.
5480 (viwdupq_x_wb_u8): Likewise.
5481 (viwdupq_x_wb_u16): Likewise.
5482 (viwdupq_x_wb_u32): Likewise.
5483 (vdupq_x_n_s8): Likewise.
5484 (vdupq_x_n_s16): Likewise.
5485 (vdupq_x_n_s32): Likewise.
5486 (vdupq_x_n_u8): Likewise.
5487 (vdupq_x_n_u16): Likewise.
5488 (vdupq_x_n_u32): Likewise.
5489 (vminq_x_s8): Likewise.
5490 (vminq_x_s16): Likewise.
5491 (vminq_x_s32): Likewise.
5492 (vminq_x_u8): Likewise.
5493 (vminq_x_u16): Likewise.
5494 (vminq_x_u32): Likewise.
5495 (vmaxq_x_s8): Likewise.
5496 (vmaxq_x_s16): Likewise.
5497 (vmaxq_x_s32): Likewise.
5498 (vmaxq_x_u8): Likewise.
5499 (vmaxq_x_u16): Likewise.
5500 (vmaxq_x_u32): Likewise.
5501 (vabdq_x_s8): Likewise.
5502 (vabdq_x_s16): Likewise.
5503 (vabdq_x_s32): Likewise.
5504 (vabdq_x_u8): Likewise.
5505 (vabdq_x_u16): Likewise.
5506 (vabdq_x_u32): Likewise.
5507 (vabsq_x_s8): Likewise.
5508 (vabsq_x_s16): Likewise.
5509 (vabsq_x_s32): Likewise.
5510 (vaddq_x_s8): Likewise.
5511 (vaddq_x_s16): Likewise.
5512 (vaddq_x_s32): Likewise.
5513 (vaddq_x_n_s8): Likewise.
5514 (vaddq_x_n_s16): Likewise.
5515 (vaddq_x_n_s32): Likewise.
5516 (vaddq_x_u8): Likewise.
5517 (vaddq_x_u16): Likewise.
5518 (vaddq_x_u32): Likewise.
5519 (vaddq_x_n_u8): Likewise.
5520 (vaddq_x_n_u16): Likewise.
5521 (vaddq_x_n_u32): Likewise.
5522 (vclsq_x_s8): Likewise.
5523 (vclsq_x_s16): Likewise.
5524 (vclsq_x_s32): Likewise.
5525 (vclzq_x_s8): Likewise.
5526 (vclzq_x_s16): Likewise.
5527 (vclzq_x_s32): Likewise.
5528 (vclzq_x_u8): Likewise.
5529 (vclzq_x_u16): Likewise.
5530 (vclzq_x_u32): Likewise.
5531 (vnegq_x_s8): Likewise.
5532 (vnegq_x_s16): Likewise.
5533 (vnegq_x_s32): Likewise.
5534 (vmulhq_x_s8): Likewise.
5535 (vmulhq_x_s16): Likewise.
5536 (vmulhq_x_s32): Likewise.
5537 (vmulhq_x_u8): Likewise.
5538 (vmulhq_x_u16): Likewise.
5539 (vmulhq_x_u32): Likewise.
5540 (vmullbq_poly_x_p8): Likewise.
5541 (vmullbq_poly_x_p16): Likewise.
5542 (vmullbq_int_x_s8): Likewise.
5543 (vmullbq_int_x_s16): Likewise.
5544 (vmullbq_int_x_s32): Likewise.
5545 (vmullbq_int_x_u8): Likewise.
5546 (vmullbq_int_x_u16): Likewise.
5547 (vmullbq_int_x_u32): Likewise.
5548 (vmulltq_poly_x_p8): Likewise.
5549 (vmulltq_poly_x_p16): Likewise.
5550 (vmulltq_int_x_s8): Likewise.
5551 (vmulltq_int_x_s16): Likewise.
5552 (vmulltq_int_x_s32): Likewise.
5553 (vmulltq_int_x_u8): Likewise.
5554 (vmulltq_int_x_u16): Likewise.
5555 (vmulltq_int_x_u32): Likewise.
5556 (vmulq_x_s8): Likewise.
5557 (vmulq_x_s16): Likewise.
5558 (vmulq_x_s32): Likewise.
5559 (vmulq_x_n_s8): Likewise.
5560 (vmulq_x_n_s16): Likewise.
5561 (vmulq_x_n_s32): Likewise.
5562 (vmulq_x_u8): Likewise.
5563 (vmulq_x_u16): Likewise.
5564 (vmulq_x_u32): Likewise.
5565 (vmulq_x_n_u8): Likewise.
5566 (vmulq_x_n_u16): Likewise.
5567 (vmulq_x_n_u32): Likewise.
5568 (vsubq_x_s8): Likewise.
5569 (vsubq_x_s16): Likewise.
5570 (vsubq_x_s32): Likewise.
5571 (vsubq_x_n_s8): Likewise.
5572 (vsubq_x_n_s16): Likewise.
5573 (vsubq_x_n_s32): Likewise.
5574 (vsubq_x_u8): Likewise.
5575 (vsubq_x_u16): Likewise.
5576 (vsubq_x_u32): Likewise.
5577 (vsubq_x_n_u8): Likewise.
5578 (vsubq_x_n_u16): Likewise.
5579 (vsubq_x_n_u32): Likewise.
5580 (vcaddq_rot90_x_s8): Likewise.
5581 (vcaddq_rot90_x_s16): Likewise.
5582 (vcaddq_rot90_x_s32): Likewise.
5583 (vcaddq_rot90_x_u8): Likewise.
5584 (vcaddq_rot90_x_u16): Likewise.
5585 (vcaddq_rot90_x_u32): Likewise.
5586 (vcaddq_rot270_x_s8): Likewise.
5587 (vcaddq_rot270_x_s16): Likewise.
5588 (vcaddq_rot270_x_s32): Likewise.
5589 (vcaddq_rot270_x_u8): Likewise.
5590 (vcaddq_rot270_x_u16): Likewise.
5591 (vcaddq_rot270_x_u32): Likewise.
5592 (vhaddq_x_n_s8): Likewise.
5593 (vhaddq_x_n_s16): Likewise.
5594 (vhaddq_x_n_s32): Likewise.
5595 (vhaddq_x_n_u8): Likewise.
5596 (vhaddq_x_n_u16): Likewise.
5597 (vhaddq_x_n_u32): Likewise.
5598 (vhaddq_x_s8): Likewise.
5599 (vhaddq_x_s16): Likewise.
5600 (vhaddq_x_s32): Likewise.
5601 (vhaddq_x_u8): Likewise.
5602 (vhaddq_x_u16): Likewise.
5603 (vhaddq_x_u32): Likewise.
5604 (vhcaddq_rot90_x_s8): Likewise.
5605 (vhcaddq_rot90_x_s16): Likewise.
5606 (vhcaddq_rot90_x_s32): Likewise.
5607 (vhcaddq_rot270_x_s8): Likewise.
5608 (vhcaddq_rot270_x_s16): Likewise.
5609 (vhcaddq_rot270_x_s32): Likewise.
5610 (vhsubq_x_n_s8): Likewise.
5611 (vhsubq_x_n_s16): Likewise.
5612 (vhsubq_x_n_s32): Likewise.
5613 (vhsubq_x_n_u8): Likewise.
5614 (vhsubq_x_n_u16): Likewise.
5615 (vhsubq_x_n_u32): Likewise.
5616 (vhsubq_x_s8): Likewise.
5617 (vhsubq_x_s16): Likewise.
5618 (vhsubq_x_s32): Likewise.
5619 (vhsubq_x_u8): Likewise.
5620 (vhsubq_x_u16): Likewise.
5621 (vhsubq_x_u32): Likewise.
5622 (vrhaddq_x_s8): Likewise.
5623 (vrhaddq_x_s16): Likewise.
5624 (vrhaddq_x_s32): Likewise.
5625 (vrhaddq_x_u8): Likewise.
5626 (vrhaddq_x_u16): Likewise.
5627 (vrhaddq_x_u32): Likewise.
5628 (vrmulhq_x_s8): Likewise.
5629 (vrmulhq_x_s16): Likewise.
5630 (vrmulhq_x_s32): Likewise.
5631 (vrmulhq_x_u8): Likewise.
5632 (vrmulhq_x_u16): Likewise.
5633 (vrmulhq_x_u32): Likewise.
5634 (vandq_x_s8): Likewise.
5635 (vandq_x_s16): Likewise.
5636 (vandq_x_s32): Likewise.
5637 (vandq_x_u8): Likewise.
5638 (vandq_x_u16): Likewise.
5639 (vandq_x_u32): Likewise.
5640 (vbicq_x_s8): Likewise.
5641 (vbicq_x_s16): Likewise.
5642 (vbicq_x_s32): Likewise.
5643 (vbicq_x_u8): Likewise.
5644 (vbicq_x_u16): Likewise.
5645 (vbicq_x_u32): Likewise.
5646 (vbrsrq_x_n_s8): Likewise.
5647 (vbrsrq_x_n_s16): Likewise.
5648 (vbrsrq_x_n_s32): Likewise.
5649 (vbrsrq_x_n_u8): Likewise.
5650 (vbrsrq_x_n_u16): Likewise.
5651 (vbrsrq_x_n_u32): Likewise.
5652 (veorq_x_s8): Likewise.
5653 (veorq_x_s16): Likewise.
5654 (veorq_x_s32): Likewise.
5655 (veorq_x_u8): Likewise.
5656 (veorq_x_u16): Likewise.
5657 (veorq_x_u32): Likewise.
5658 (vmovlbq_x_s8): Likewise.
5659 (vmovlbq_x_s16): Likewise.
5660 (vmovlbq_x_u8): Likewise.
5661 (vmovlbq_x_u16): Likewise.
5662 (vmovltq_x_s8): Likewise.
5663 (vmovltq_x_s16): Likewise.
5664 (vmovltq_x_u8): Likewise.
5665 (vmovltq_x_u16): Likewise.
5666 (vmvnq_x_s8): Likewise.
5667 (vmvnq_x_s16): Likewise.
5668 (vmvnq_x_s32): Likewise.
5669 (vmvnq_x_u8): Likewise.
5670 (vmvnq_x_u16): Likewise.
5671 (vmvnq_x_u32): Likewise.
5672 (vmvnq_x_n_s16): Likewise.
5673 (vmvnq_x_n_s32): Likewise.
5674 (vmvnq_x_n_u16): Likewise.
5675 (vmvnq_x_n_u32): Likewise.
5676 (vornq_x_s8): Likewise.
5677 (vornq_x_s16): Likewise.
5678 (vornq_x_s32): Likewise.
5679 (vornq_x_u8): Likewise.
5680 (vornq_x_u16): Likewise.
5681 (vornq_x_u32): Likewise.
5682 (vorrq_x_s8): Likewise.
5683 (vorrq_x_s16): Likewise.
5684 (vorrq_x_s32): Likewise.
5685 (vorrq_x_u8): Likewise.
5686 (vorrq_x_u16): Likewise.
5687 (vorrq_x_u32): Likewise.
5688 (vrev16q_x_s8): Likewise.
5689 (vrev16q_x_u8): Likewise.
5690 (vrev32q_x_s8): Likewise.
5691 (vrev32q_x_s16): Likewise.
5692 (vrev32q_x_u8): Likewise.
5693 (vrev32q_x_u16): Likewise.
5694 (vrev64q_x_s8): Likewise.
5695 (vrev64q_x_s16): Likewise.
5696 (vrev64q_x_s32): Likewise.
5697 (vrev64q_x_u8): Likewise.
5698 (vrev64q_x_u16): Likewise.
5699 (vrev64q_x_u32): Likewise.
5700 (vrshlq_x_s8): Likewise.
5701 (vrshlq_x_s16): Likewise.
5702 (vrshlq_x_s32): Likewise.
5703 (vrshlq_x_u8): Likewise.
5704 (vrshlq_x_u16): Likewise.
5705 (vrshlq_x_u32): Likewise.
5706 (vshllbq_x_n_s8): Likewise.
5707 (vshllbq_x_n_s16): Likewise.
5708 (vshllbq_x_n_u8): Likewise.
5709 (vshllbq_x_n_u16): Likewise.
5710 (vshlltq_x_n_s8): Likewise.
5711 (vshlltq_x_n_s16): Likewise.
5712 (vshlltq_x_n_u8): Likewise.
5713 (vshlltq_x_n_u16): Likewise.
5714 (vshlq_x_s8): Likewise.
5715 (vshlq_x_s16): Likewise.
5716 (vshlq_x_s32): Likewise.
5717 (vshlq_x_u8): Likewise.
5718 (vshlq_x_u16): Likewise.
5719 (vshlq_x_u32): Likewise.
5720 (vshlq_x_n_s8): Likewise.
5721 (vshlq_x_n_s16): Likewise.
5722 (vshlq_x_n_s32): Likewise.
5723 (vshlq_x_n_u8): Likewise.
5724 (vshlq_x_n_u16): Likewise.
5725 (vshlq_x_n_u32): Likewise.
5726 (vrshrq_x_n_s8): Likewise.
5727 (vrshrq_x_n_s16): Likewise.
5728 (vrshrq_x_n_s32): Likewise.
5729 (vrshrq_x_n_u8): Likewise.
5730 (vrshrq_x_n_u16): Likewise.
5731 (vrshrq_x_n_u32): Likewise.
5732 (vshrq_x_n_s8): Likewise.
5733 (vshrq_x_n_s16): Likewise.
5734 (vshrq_x_n_s32): Likewise.
5735 (vshrq_x_n_u8): Likewise.
5736 (vshrq_x_n_u16): Likewise.
5737 (vshrq_x_n_u32): Likewise.
5738 (vdupq_x_n_f16): Likewise.
5739 (vdupq_x_n_f32): Likewise.
5740 (vminnmq_x_f16): Likewise.
5741 (vminnmq_x_f32): Likewise.
5742 (vmaxnmq_x_f16): Likewise.
5743 (vmaxnmq_x_f32): Likewise.
5744 (vabdq_x_f16): Likewise.
5745 (vabdq_x_f32): Likewise.
5746 (vabsq_x_f16): Likewise.
5747 (vabsq_x_f32): Likewise.
5748 (vaddq_x_f16): Likewise.
5749 (vaddq_x_f32): Likewise.
5750 (vaddq_x_n_f16): Likewise.
5751 (vaddq_x_n_f32): Likewise.
5752 (vnegq_x_f16): Likewise.
5753 (vnegq_x_f32): Likewise.
5754 (vmulq_x_f16): Likewise.
5755 (vmulq_x_f32): Likewise.
5756 (vmulq_x_n_f16): Likewise.
5757 (vmulq_x_n_f32): Likewise.
5758 (vsubq_x_f16): Likewise.
5759 (vsubq_x_f32): Likewise.
5760 (vsubq_x_n_f16): Likewise.
5761 (vsubq_x_n_f32): Likewise.
5762 (vcaddq_rot90_x_f16): Likewise.
5763 (vcaddq_rot90_x_f32): Likewise.
5764 (vcaddq_rot270_x_f16): Likewise.
5765 (vcaddq_rot270_x_f32): Likewise.
5766 (vcmulq_x_f16): Likewise.
5767 (vcmulq_x_f32): Likewise.
5768 (vcmulq_rot90_x_f16): Likewise.
5769 (vcmulq_rot90_x_f32): Likewise.
5770 (vcmulq_rot180_x_f16): Likewise.
5771 (vcmulq_rot180_x_f32): Likewise.
5772 (vcmulq_rot270_x_f16): Likewise.
5773 (vcmulq_rot270_x_f32): Likewise.
5774 (vcvtaq_x_s16_f16): Likewise.
5775 (vcvtaq_x_s32_f32): Likewise.
5776 (vcvtaq_x_u16_f16): Likewise.
5777 (vcvtaq_x_u32_f32): Likewise.
5778 (vcvtnq_x_s16_f16): Likewise.
5779 (vcvtnq_x_s32_f32): Likewise.
5780 (vcvtnq_x_u16_f16): Likewise.
5781 (vcvtnq_x_u32_f32): Likewise.
5782 (vcvtpq_x_s16_f16): Likewise.
5783 (vcvtpq_x_s32_f32): Likewise.
5784 (vcvtpq_x_u16_f16): Likewise.
5785 (vcvtpq_x_u32_f32): Likewise.
5786 (vcvtmq_x_s16_f16): Likewise.
5787 (vcvtmq_x_s32_f32): Likewise.
5788 (vcvtmq_x_u16_f16): Likewise.
5789 (vcvtmq_x_u32_f32): Likewise.
5790 (vcvtbq_x_f32_f16): Likewise.
5791 (vcvttq_x_f32_f16): Likewise.
5792 (vcvtq_x_f16_u16): Likewise.
5793 (vcvtq_x_f16_s16): Likewise.
5794 (vcvtq_x_f32_s32): Likewise.
5795 (vcvtq_x_f32_u32): Likewise.
5796 (vcvtq_x_n_f16_s16): Likewise.
5797 (vcvtq_x_n_f16_u16): Likewise.
5798 (vcvtq_x_n_f32_s32): Likewise.
5799 (vcvtq_x_n_f32_u32): Likewise.
5800 (vcvtq_x_s16_f16): Likewise.
5801 (vcvtq_x_s32_f32): Likewise.
5802 (vcvtq_x_u16_f16): Likewise.
5803 (vcvtq_x_u32_f32): Likewise.
5804 (vcvtq_x_n_s16_f16): Likewise.
5805 (vcvtq_x_n_s32_f32): Likewise.
5806 (vcvtq_x_n_u16_f16): Likewise.
5807 (vcvtq_x_n_u32_f32): Likewise.
5808 (vrndq_x_f16): Likewise.
5809 (vrndq_x_f32): Likewise.
5810 (vrndnq_x_f16): Likewise.
5811 (vrndnq_x_f32): Likewise.
5812 (vrndmq_x_f16): Likewise.
5813 (vrndmq_x_f32): Likewise.
5814 (vrndpq_x_f16): Likewise.
5815 (vrndpq_x_f32): Likewise.
5816 (vrndaq_x_f16): Likewise.
5817 (vrndaq_x_f32): Likewise.
5818 (vrndxq_x_f16): Likewise.
5819 (vrndxq_x_f32): Likewise.
5820 (vandq_x_f16): Likewise.
5821 (vandq_x_f32): Likewise.
5822 (vbicq_x_f16): Likewise.
5823 (vbicq_x_f32): Likewise.
5824 (vbrsrq_x_n_f16): Likewise.
5825 (vbrsrq_x_n_f32): Likewise.
5826 (veorq_x_f16): Likewise.
5827 (veorq_x_f32): Likewise.
5828 (vornq_x_f16): Likewise.
5829 (vornq_x_f32): Likewise.
5830 (vorrq_x_f16): Likewise.
5831 (vorrq_x_f32): Likewise.
5832 (vrev32q_x_f16): Likewise.
5833 (vrev64q_x_f16): Likewise.
5834 (vrev64q_x_f32): Likewise.
5835 (__arm_vddupq_x_n_u8): Define intrinsic.
5836 (__arm_vddupq_x_n_u16): Likewise.
5837 (__arm_vddupq_x_n_u32): Likewise.
5838 (__arm_vddupq_x_wb_u8): Likewise.
5839 (__arm_vddupq_x_wb_u16): Likewise.
5840 (__arm_vddupq_x_wb_u32): Likewise.
5841 (__arm_vdwdupq_x_n_u8): Likewise.
5842 (__arm_vdwdupq_x_n_u16): Likewise.
5843 (__arm_vdwdupq_x_n_u32): Likewise.
5844 (__arm_vdwdupq_x_wb_u8): Likewise.
5845 (__arm_vdwdupq_x_wb_u16): Likewise.
5846 (__arm_vdwdupq_x_wb_u32): Likewise.
5847 (__arm_vidupq_x_n_u8): Likewise.
5848 (__arm_vidupq_x_n_u16): Likewise.
5849 (__arm_vidupq_x_n_u32): Likewise.
5850 (__arm_vidupq_x_wb_u8): Likewise.
5851 (__arm_vidupq_x_wb_u16): Likewise.
5852 (__arm_vidupq_x_wb_u32): Likewise.
5853 (__arm_viwdupq_x_n_u8): Likewise.
5854 (__arm_viwdupq_x_n_u16): Likewise.
5855 (__arm_viwdupq_x_n_u32): Likewise.
5856 (__arm_viwdupq_x_wb_u8): Likewise.
5857 (__arm_viwdupq_x_wb_u16): Likewise.
5858 (__arm_viwdupq_x_wb_u32): Likewise.
5859 (__arm_vdupq_x_n_s8): Likewise.
5860 (__arm_vdupq_x_n_s16): Likewise.
5861 (__arm_vdupq_x_n_s32): Likewise.
5862 (__arm_vdupq_x_n_u8): Likewise.
5863 (__arm_vdupq_x_n_u16): Likewise.
5864 (__arm_vdupq_x_n_u32): Likewise.
5865 (__arm_vminq_x_s8): Likewise.
5866 (__arm_vminq_x_s16): Likewise.
5867 (__arm_vminq_x_s32): Likewise.
5868 (__arm_vminq_x_u8): Likewise.
5869 (__arm_vminq_x_u16): Likewise.
5870 (__arm_vminq_x_u32): Likewise.
5871 (__arm_vmaxq_x_s8): Likewise.
5872 (__arm_vmaxq_x_s16): Likewise.
5873 (__arm_vmaxq_x_s32): Likewise.
5874 (__arm_vmaxq_x_u8): Likewise.
5875 (__arm_vmaxq_x_u16): Likewise.
5876 (__arm_vmaxq_x_u32): Likewise.
5877 (__arm_vabdq_x_s8): Likewise.
5878 (__arm_vabdq_x_s16): Likewise.
5879 (__arm_vabdq_x_s32): Likewise.
5880 (__arm_vabdq_x_u8): Likewise.
5881 (__arm_vabdq_x_u16): Likewise.
5882 (__arm_vabdq_x_u32): Likewise.
5883 (__arm_vabsq_x_s8): Likewise.
5884 (__arm_vabsq_x_s16): Likewise.
5885 (__arm_vabsq_x_s32): Likewise.
5886 (__arm_vaddq_x_s8): Likewise.
5887 (__arm_vaddq_x_s16): Likewise.
5888 (__arm_vaddq_x_s32): Likewise.
5889 (__arm_vaddq_x_n_s8): Likewise.
5890 (__arm_vaddq_x_n_s16): Likewise.
5891 (__arm_vaddq_x_n_s32): Likewise.
5892 (__arm_vaddq_x_u8): Likewise.
5893 (__arm_vaddq_x_u16): Likewise.
5894 (__arm_vaddq_x_u32): Likewise.
5895 (__arm_vaddq_x_n_u8): Likewise.
5896 (__arm_vaddq_x_n_u16): Likewise.
5897 (__arm_vaddq_x_n_u32): Likewise.
5898 (__arm_vclsq_x_s8): Likewise.
5899 (__arm_vclsq_x_s16): Likewise.
5900 (__arm_vclsq_x_s32): Likewise.
5901 (__arm_vclzq_x_s8): Likewise.
5902 (__arm_vclzq_x_s16): Likewise.
5903 (__arm_vclzq_x_s32): Likewise.
5904 (__arm_vclzq_x_u8): Likewise.
5905 (__arm_vclzq_x_u16): Likewise.
5906 (__arm_vclzq_x_u32): Likewise.
5907 (__arm_vnegq_x_s8): Likewise.
5908 (__arm_vnegq_x_s16): Likewise.
5909 (__arm_vnegq_x_s32): Likewise.
5910 (__arm_vmulhq_x_s8): Likewise.
5911 (__arm_vmulhq_x_s16): Likewise.
5912 (__arm_vmulhq_x_s32): Likewise.
5913 (__arm_vmulhq_x_u8): Likewise.
5914 (__arm_vmulhq_x_u16): Likewise.
5915 (__arm_vmulhq_x_u32): Likewise.
5916 (__arm_vmullbq_poly_x_p8): Likewise.
5917 (__arm_vmullbq_poly_x_p16): Likewise.
5918 (__arm_vmullbq_int_x_s8): Likewise.
5919 (__arm_vmullbq_int_x_s16): Likewise.
5920 (__arm_vmullbq_int_x_s32): Likewise.
5921 (__arm_vmullbq_int_x_u8): Likewise.
5922 (__arm_vmullbq_int_x_u16): Likewise.
5923 (__arm_vmullbq_int_x_u32): Likewise.
5924 (__arm_vmulltq_poly_x_p8): Likewise.
5925 (__arm_vmulltq_poly_x_p16): Likewise.
5926 (__arm_vmulltq_int_x_s8): Likewise.
5927 (__arm_vmulltq_int_x_s16): Likewise.
5928 (__arm_vmulltq_int_x_s32): Likewise.
5929 (__arm_vmulltq_int_x_u8): Likewise.
5930 (__arm_vmulltq_int_x_u16): Likewise.
5931 (__arm_vmulltq_int_x_u32): Likewise.
5932 (__arm_vmulq_x_s8): Likewise.
5933 (__arm_vmulq_x_s16): Likewise.
5934 (__arm_vmulq_x_s32): Likewise.
5935 (__arm_vmulq_x_n_s8): Likewise.
5936 (__arm_vmulq_x_n_s16): Likewise.
5937 (__arm_vmulq_x_n_s32): Likewise.
5938 (__arm_vmulq_x_u8): Likewise.
5939 (__arm_vmulq_x_u16): Likewise.
5940 (__arm_vmulq_x_u32): Likewise.
5941 (__arm_vmulq_x_n_u8): Likewise.
5942 (__arm_vmulq_x_n_u16): Likewise.
5943 (__arm_vmulq_x_n_u32): Likewise.
5944 (__arm_vsubq_x_s8): Likewise.
5945 (__arm_vsubq_x_s16): Likewise.
5946 (__arm_vsubq_x_s32): Likewise.
5947 (__arm_vsubq_x_n_s8): Likewise.
5948 (__arm_vsubq_x_n_s16): Likewise.
5949 (__arm_vsubq_x_n_s32): Likewise.
5950 (__arm_vsubq_x_u8): Likewise.
5951 (__arm_vsubq_x_u16): Likewise.
5952 (__arm_vsubq_x_u32): Likewise.
5953 (__arm_vsubq_x_n_u8): Likewise.
5954 (__arm_vsubq_x_n_u16): Likewise.
5955 (__arm_vsubq_x_n_u32): Likewise.
5956 (__arm_vcaddq_rot90_x_s8): Likewise.
5957 (__arm_vcaddq_rot90_x_s16): Likewise.
5958 (__arm_vcaddq_rot90_x_s32): Likewise.
5959 (__arm_vcaddq_rot90_x_u8): Likewise.
5960 (__arm_vcaddq_rot90_x_u16): Likewise.
5961 (__arm_vcaddq_rot90_x_u32): Likewise.
5962 (__arm_vcaddq_rot270_x_s8): Likewise.
5963 (__arm_vcaddq_rot270_x_s16): Likewise.
5964 (__arm_vcaddq_rot270_x_s32): Likewise.
5965 (__arm_vcaddq_rot270_x_u8): Likewise.
5966 (__arm_vcaddq_rot270_x_u16): Likewise.
5967 (__arm_vcaddq_rot270_x_u32): Likewise.
5968 (__arm_vhaddq_x_n_s8): Likewise.
5969 (__arm_vhaddq_x_n_s16): Likewise.
5970 (__arm_vhaddq_x_n_s32): Likewise.
5971 (__arm_vhaddq_x_n_u8): Likewise.
5972 (__arm_vhaddq_x_n_u16): Likewise.
5973 (__arm_vhaddq_x_n_u32): Likewise.
5974 (__arm_vhaddq_x_s8): Likewise.
5975 (__arm_vhaddq_x_s16): Likewise.
5976 (__arm_vhaddq_x_s32): Likewise.
5977 (__arm_vhaddq_x_u8): Likewise.
5978 (__arm_vhaddq_x_u16): Likewise.
5979 (__arm_vhaddq_x_u32): Likewise.
5980 (__arm_vhcaddq_rot90_x_s8): Likewise.
5981 (__arm_vhcaddq_rot90_x_s16): Likewise.
5982 (__arm_vhcaddq_rot90_x_s32): Likewise.
5983 (__arm_vhcaddq_rot270_x_s8): Likewise.
5984 (__arm_vhcaddq_rot270_x_s16): Likewise.
5985 (__arm_vhcaddq_rot270_x_s32): Likewise.
5986 (__arm_vhsubq_x_n_s8): Likewise.
5987 (__arm_vhsubq_x_n_s16): Likewise.
5988 (__arm_vhsubq_x_n_s32): Likewise.
5989 (__arm_vhsubq_x_n_u8): Likewise.
5990 (__arm_vhsubq_x_n_u16): Likewise.
5991 (__arm_vhsubq_x_n_u32): Likewise.
5992 (__arm_vhsubq_x_s8): Likewise.
5993 (__arm_vhsubq_x_s16): Likewise.
5994 (__arm_vhsubq_x_s32): Likewise.
5995 (__arm_vhsubq_x_u8): Likewise.
5996 (__arm_vhsubq_x_u16): Likewise.
5997 (__arm_vhsubq_x_u32): Likewise.
5998 (__arm_vrhaddq_x_s8): Likewise.
5999 (__arm_vrhaddq_x_s16): Likewise.
6000 (__arm_vrhaddq_x_s32): Likewise.
6001 (__arm_vrhaddq_x_u8): Likewise.
6002 (__arm_vrhaddq_x_u16): Likewise.
6003 (__arm_vrhaddq_x_u32): Likewise.
6004 (__arm_vrmulhq_x_s8): Likewise.
6005 (__arm_vrmulhq_x_s16): Likewise.
6006 (__arm_vrmulhq_x_s32): Likewise.
6007 (__arm_vrmulhq_x_u8): Likewise.
6008 (__arm_vrmulhq_x_u16): Likewise.
6009 (__arm_vrmulhq_x_u32): Likewise.
6010 (__arm_vandq_x_s8): Likewise.
6011 (__arm_vandq_x_s16): Likewise.
6012 (__arm_vandq_x_s32): Likewise.
6013 (__arm_vandq_x_u8): Likewise.
6014 (__arm_vandq_x_u16): Likewise.
6015 (__arm_vandq_x_u32): Likewise.
6016 (__arm_vbicq_x_s8): Likewise.
6017 (__arm_vbicq_x_s16): Likewise.
6018 (__arm_vbicq_x_s32): Likewise.
6019 (__arm_vbicq_x_u8): Likewise.
6020 (__arm_vbicq_x_u16): Likewise.
6021 (__arm_vbicq_x_u32): Likewise.
6022 (__arm_vbrsrq_x_n_s8): Likewise.
6023 (__arm_vbrsrq_x_n_s16): Likewise.
6024 (__arm_vbrsrq_x_n_s32): Likewise.
6025 (__arm_vbrsrq_x_n_u8): Likewise.
6026 (__arm_vbrsrq_x_n_u16): Likewise.
6027 (__arm_vbrsrq_x_n_u32): Likewise.
6028 (__arm_veorq_x_s8): Likewise.
6029 (__arm_veorq_x_s16): Likewise.
6030 (__arm_veorq_x_s32): Likewise.
6031 (__arm_veorq_x_u8): Likewise.
6032 (__arm_veorq_x_u16): Likewise.
6033 (__arm_veorq_x_u32): Likewise.
6034 (__arm_vmovlbq_x_s8): Likewise.
6035 (__arm_vmovlbq_x_s16): Likewise.
6036 (__arm_vmovlbq_x_u8): Likewise.
6037 (__arm_vmovlbq_x_u16): Likewise.
6038 (__arm_vmovltq_x_s8): Likewise.
6039 (__arm_vmovltq_x_s16): Likewise.
6040 (__arm_vmovltq_x_u8): Likewise.
6041 (__arm_vmovltq_x_u16): Likewise.
6042 (__arm_vmvnq_x_s8): Likewise.
6043 (__arm_vmvnq_x_s16): Likewise.
6044 (__arm_vmvnq_x_s32): Likewise.
6045 (__arm_vmvnq_x_u8): Likewise.
6046 (__arm_vmvnq_x_u16): Likewise.
6047 (__arm_vmvnq_x_u32): Likewise.
6048 (__arm_vmvnq_x_n_s16): Likewise.
6049 (__arm_vmvnq_x_n_s32): Likewise.
6050 (__arm_vmvnq_x_n_u16): Likewise.
6051 (__arm_vmvnq_x_n_u32): Likewise.
6052 (__arm_vornq_x_s8): Likewise.
6053 (__arm_vornq_x_s16): Likewise.
6054 (__arm_vornq_x_s32): Likewise.
6055 (__arm_vornq_x_u8): Likewise.
6056 (__arm_vornq_x_u16): Likewise.
6057 (__arm_vornq_x_u32): Likewise.
6058 (__arm_vorrq_x_s8): Likewise.
6059 (__arm_vorrq_x_s16): Likewise.
6060 (__arm_vorrq_x_s32): Likewise.
6061 (__arm_vorrq_x_u8): Likewise.
6062 (__arm_vorrq_x_u16): Likewise.
6063 (__arm_vorrq_x_u32): Likewise.
6064 (__arm_vrev16q_x_s8): Likewise.
6065 (__arm_vrev16q_x_u8): Likewise.
6066 (__arm_vrev32q_x_s8): Likewise.
6067 (__arm_vrev32q_x_s16): Likewise.
6068 (__arm_vrev32q_x_u8): Likewise.
6069 (__arm_vrev32q_x_u16): Likewise.
6070 (__arm_vrev64q_x_s8): Likewise.
6071 (__arm_vrev64q_x_s16): Likewise.
6072 (__arm_vrev64q_x_s32): Likewise.
6073 (__arm_vrev64q_x_u8): Likewise.
6074 (__arm_vrev64q_x_u16): Likewise.
6075 (__arm_vrev64q_x_u32): Likewise.
6076 (__arm_vrshlq_x_s8): Likewise.
6077 (__arm_vrshlq_x_s16): Likewise.
6078 (__arm_vrshlq_x_s32): Likewise.
6079 (__arm_vrshlq_x_u8): Likewise.
6080 (__arm_vrshlq_x_u16): Likewise.
6081 (__arm_vrshlq_x_u32): Likewise.
6082 (__arm_vshllbq_x_n_s8): Likewise.
6083 (__arm_vshllbq_x_n_s16): Likewise.
6084 (__arm_vshllbq_x_n_u8): Likewise.
6085 (__arm_vshllbq_x_n_u16): Likewise.
6086 (__arm_vshlltq_x_n_s8): Likewise.
6087 (__arm_vshlltq_x_n_s16): Likewise.
6088 (__arm_vshlltq_x_n_u8): Likewise.
6089 (__arm_vshlltq_x_n_u16): Likewise.
6090 (__arm_vshlq_x_s8): Likewise.
6091 (__arm_vshlq_x_s16): Likewise.
6092 (__arm_vshlq_x_s32): Likewise.
6093 (__arm_vshlq_x_u8): Likewise.
6094 (__arm_vshlq_x_u16): Likewise.
6095 (__arm_vshlq_x_u32): Likewise.
6096 (__arm_vshlq_x_n_s8): Likewise.
6097 (__arm_vshlq_x_n_s16): Likewise.
6098 (__arm_vshlq_x_n_s32): Likewise.
6099 (__arm_vshlq_x_n_u8): Likewise.
6100 (__arm_vshlq_x_n_u16): Likewise.
6101 (__arm_vshlq_x_n_u32): Likewise.
6102 (__arm_vrshrq_x_n_s8): Likewise.
6103 (__arm_vrshrq_x_n_s16): Likewise.
6104 (__arm_vrshrq_x_n_s32): Likewise.
6105 (__arm_vrshrq_x_n_u8): Likewise.
6106 (__arm_vrshrq_x_n_u16): Likewise.
6107 (__arm_vrshrq_x_n_u32): Likewise.
6108 (__arm_vshrq_x_n_s8): Likewise.
6109 (__arm_vshrq_x_n_s16): Likewise.
6110 (__arm_vshrq_x_n_s32): Likewise.
6111 (__arm_vshrq_x_n_u8): Likewise.
6112 (__arm_vshrq_x_n_u16): Likewise.
6113 (__arm_vshrq_x_n_u32): Likewise.
6114 (__arm_vdupq_x_n_f16): Likewise.
6115 (__arm_vdupq_x_n_f32): Likewise.
6116 (__arm_vminnmq_x_f16): Likewise.
6117 (__arm_vminnmq_x_f32): Likewise.
6118 (__arm_vmaxnmq_x_f16): Likewise.
6119 (__arm_vmaxnmq_x_f32): Likewise.
6120 (__arm_vabdq_x_f16): Likewise.
6121 (__arm_vabdq_x_f32): Likewise.
6122 (__arm_vabsq_x_f16): Likewise.
6123 (__arm_vabsq_x_f32): Likewise.
6124 (__arm_vaddq_x_f16): Likewise.
6125 (__arm_vaddq_x_f32): Likewise.
6126 (__arm_vaddq_x_n_f16): Likewise.
6127 (__arm_vaddq_x_n_f32): Likewise.
6128 (__arm_vnegq_x_f16): Likewise.
6129 (__arm_vnegq_x_f32): Likewise.
6130 (__arm_vmulq_x_f16): Likewise.
6131 (__arm_vmulq_x_f32): Likewise.
6132 (__arm_vmulq_x_n_f16): Likewise.
6133 (__arm_vmulq_x_n_f32): Likewise.
6134 (__arm_vsubq_x_f16): Likewise.
6135 (__arm_vsubq_x_f32): Likewise.
6136 (__arm_vsubq_x_n_f16): Likewise.
6137 (__arm_vsubq_x_n_f32): Likewise.
6138 (__arm_vcaddq_rot90_x_f16): Likewise.
6139 (__arm_vcaddq_rot90_x_f32): Likewise.
6140 (__arm_vcaddq_rot270_x_f16): Likewise.
6141 (__arm_vcaddq_rot270_x_f32): Likewise.
6142 (__arm_vcmulq_x_f16): Likewise.
6143 (__arm_vcmulq_x_f32): Likewise.
6144 (__arm_vcmulq_rot90_x_f16): Likewise.
6145 (__arm_vcmulq_rot90_x_f32): Likewise.
6146 (__arm_vcmulq_rot180_x_f16): Likewise.
6147 (__arm_vcmulq_rot180_x_f32): Likewise.
6148 (__arm_vcmulq_rot270_x_f16): Likewise.
6149 (__arm_vcmulq_rot270_x_f32): Likewise.
6150 (__arm_vcvtaq_x_s16_f16): Likewise.
6151 (__arm_vcvtaq_x_s32_f32): Likewise.
6152 (__arm_vcvtaq_x_u16_f16): Likewise.
6153 (__arm_vcvtaq_x_u32_f32): Likewise.
6154 (__arm_vcvtnq_x_s16_f16): Likewise.
6155 (__arm_vcvtnq_x_s32_f32): Likewise.
6156 (__arm_vcvtnq_x_u16_f16): Likewise.
6157 (__arm_vcvtnq_x_u32_f32): Likewise.
6158 (__arm_vcvtpq_x_s16_f16): Likewise.
6159 (__arm_vcvtpq_x_s32_f32): Likewise.
6160 (__arm_vcvtpq_x_u16_f16): Likewise.
6161 (__arm_vcvtpq_x_u32_f32): Likewise.
6162 (__arm_vcvtmq_x_s16_f16): Likewise.
6163 (__arm_vcvtmq_x_s32_f32): Likewise.
6164 (__arm_vcvtmq_x_u16_f16): Likewise.
6165 (__arm_vcvtmq_x_u32_f32): Likewise.
6166 (__arm_vcvtbq_x_f32_f16): Likewise.
6167 (__arm_vcvttq_x_f32_f16): Likewise.
6168 (__arm_vcvtq_x_f16_u16): Likewise.
6169 (__arm_vcvtq_x_f16_s16): Likewise.
6170 (__arm_vcvtq_x_f32_s32): Likewise.
6171 (__arm_vcvtq_x_f32_u32): Likewise.
6172 (__arm_vcvtq_x_n_f16_s16): Likewise.
6173 (__arm_vcvtq_x_n_f16_u16): Likewise.
6174 (__arm_vcvtq_x_n_f32_s32): Likewise.
6175 (__arm_vcvtq_x_n_f32_u32): Likewise.
6176 (__arm_vcvtq_x_s16_f16): Likewise.
6177 (__arm_vcvtq_x_s32_f32): Likewise.
6178 (__arm_vcvtq_x_u16_f16): Likewise.
6179 (__arm_vcvtq_x_u32_f32): Likewise.
6180 (__arm_vcvtq_x_n_s16_f16): Likewise.
6181 (__arm_vcvtq_x_n_s32_f32): Likewise.
6182 (__arm_vcvtq_x_n_u16_f16): Likewise.
6183 (__arm_vcvtq_x_n_u32_f32): Likewise.
6184 (__arm_vrndq_x_f16): Likewise.
6185 (__arm_vrndq_x_f32): Likewise.
6186 (__arm_vrndnq_x_f16): Likewise.
6187 (__arm_vrndnq_x_f32): Likewise.
6188 (__arm_vrndmq_x_f16): Likewise.
6189 (__arm_vrndmq_x_f32): Likewise.
6190 (__arm_vrndpq_x_f16): Likewise.
6191 (__arm_vrndpq_x_f32): Likewise.
6192 (__arm_vrndaq_x_f16): Likewise.
6193 (__arm_vrndaq_x_f32): Likewise.
6194 (__arm_vrndxq_x_f16): Likewise.
6195 (__arm_vrndxq_x_f32): Likewise.
6196 (__arm_vandq_x_f16): Likewise.
6197 (__arm_vandq_x_f32): Likewise.
6198 (__arm_vbicq_x_f16): Likewise.
6199 (__arm_vbicq_x_f32): Likewise.
6200 (__arm_vbrsrq_x_n_f16): Likewise.
6201 (__arm_vbrsrq_x_n_f32): Likewise.
6202 (__arm_veorq_x_f16): Likewise.
6203 (__arm_veorq_x_f32): Likewise.
6204 (__arm_vornq_x_f16): Likewise.
6205 (__arm_vornq_x_f32): Likewise.
6206 (__arm_vorrq_x_f16): Likewise.
6207 (__arm_vorrq_x_f32): Likewise.
6208 (__arm_vrev32q_x_f16): Likewise.
6209 (__arm_vrev64q_x_f16): Likewise.
6210 (__arm_vrev64q_x_f32): Likewise.
6211 (vabdq_x): Define polymorphic variant.
6212 (vabsq_x): Likewise.
6213 (vaddq_x): Likewise.
6214 (vandq_x): Likewise.
6215 (vbicq_x): Likewise.
6216 (vbrsrq_x): Likewise.
6217 (vcaddq_rot270_x): Likewise.
6218 (vcaddq_rot90_x): Likewise.
6219 (vcmulq_rot180_x): Likewise.
6220 (vcmulq_rot270_x): Likewise.
6221 (vcmulq_x): Likewise.
6222 (vcvtq_x): Likewise.
6223 (vcvtq_x_n): Likewise.
6224 (vcvtnq_m): Likewise.
6225 (veorq_x): Likewise.
6226 (vmaxnmq_x): Likewise.
6227 (vminnmq_x): Likewise.
6228 (vmulq_x): Likewise.
6229 (vnegq_x): Likewise.
6230 (vornq_x): Likewise.
6231 (vorrq_x): Likewise.
6232 (vrev32q_x): Likewise.
6233 (vrev64q_x): Likewise.
6234 (vrndaq_x): Likewise.
6235 (vrndmq_x): Likewise.
6236 (vrndnq_x): Likewise.
6237 (vrndpq_x): Likewise.
6238 (vrndq_x): Likewise.
6239 (vrndxq_x): Likewise.
6240 (vsubq_x): Likewise.
6241 (vcmulq_rot90_x): Likewise.
6243 (vclsq_x): Likewise.
6244 (vclzq_x): Likewise.
6245 (vhaddq_x): Likewise.
6246 (vhcaddq_rot270_x): Likewise.
6247 (vhcaddq_rot90_x): Likewise.
6248 (vhsubq_x): Likewise.
6249 (vmaxq_x): Likewise.
6250 (vminq_x): Likewise.
6251 (vmovlbq_x): Likewise.
6252 (vmovltq_x): Likewise.
6253 (vmulhq_x): Likewise.
6254 (vmullbq_int_x): Likewise.
6255 (vmullbq_poly_x): Likewise.
6256 (vmulltq_int_x): Likewise.
6257 (vmulltq_poly_x): Likewise.
6258 (vmvnq_x): Likewise.
6259 (vrev16q_x): Likewise.
6260 (vrhaddq_x): Likewise.
6261 (vrmulhq_x): Likewise.
6262 (vrshlq_x): Likewise.
6263 (vrshrq_x): Likewise.
6264 (vshllbq_x): Likewise.
6265 (vshlltq_x): Likewise.
6266 (vshlq_x_n): Likewise.
6267 (vshlq_x): Likewise.
6268 (vdwdupq_x_u8): Likewise.
6269 (vdwdupq_x_u16): Likewise.
6270 (vdwdupq_x_u32): Likewise.
6271 (viwdupq_x_u8): Likewise.
6272 (viwdupq_x_u16): Likewise.
6273 (viwdupq_x_u32): Likewise.
6274 (vidupq_x_u8): Likewise.
6275 (vddupq_x_u8): Likewise.
6276 (vidupq_x_u16): Likewise.
6277 (vddupq_x_u16): Likewise.
6278 (vidupq_x_u32): Likewise.
6279 (vddupq_x_u32): Likewise.
6280 (vshrq_x): Likewise.
6282 2020-03-20 Richard Biener <rguenther@suse.de>
6284 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
6285 to vectorize for CTOR defs.
6287 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6288 Andre Vieira <andre.simoesdiasvieira@arm.com>
6289 Mihail Ionescu <mihail.ionescu@arm.com>
6291 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
6293 (LDRGBWBU_QUALIFIERS): Likewise.
6294 (LDRGBWBS_Z_QUALIFIERS): Likewise.
6295 (LDRGBWBU_Z_QUALIFIERS): Likewise.
6296 (STRSBWBS_QUALIFIERS): Likewise.
6297 (STRSBWBU_QUALIFIERS): Likewise.
6298 (STRSBWBS_P_QUALIFIERS): Likewise.
6299 (STRSBWBU_P_QUALIFIERS): Likewise.
6300 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
6301 (vldrdq_gather_base_wb_u64): Likewise.
6302 (vldrdq_gather_base_wb_z_s64): Likewise.
6303 (vldrdq_gather_base_wb_z_u64): Likewise.
6304 (vldrwq_gather_base_wb_f32): Likewise.
6305 (vldrwq_gather_base_wb_s32): Likewise.
6306 (vldrwq_gather_base_wb_u32): Likewise.
6307 (vldrwq_gather_base_wb_z_f32): Likewise.
6308 (vldrwq_gather_base_wb_z_s32): Likewise.
6309 (vldrwq_gather_base_wb_z_u32): Likewise.
6310 (vstrdq_scatter_base_wb_p_s64): Likewise.
6311 (vstrdq_scatter_base_wb_p_u64): Likewise.
6312 (vstrdq_scatter_base_wb_s64): Likewise.
6313 (vstrdq_scatter_base_wb_u64): Likewise.
6314 (vstrwq_scatter_base_wb_p_s32): Likewise.
6315 (vstrwq_scatter_base_wb_p_f32): Likewise.
6316 (vstrwq_scatter_base_wb_p_u32): Likewise.
6317 (vstrwq_scatter_base_wb_s32): Likewise.
6318 (vstrwq_scatter_base_wb_u32): Likewise.
6319 (vstrwq_scatter_base_wb_f32): Likewise.
6320 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
6321 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6322 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6323 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6324 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6325 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6326 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6327 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6328 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
6329 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
6330 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
6331 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
6332 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
6333 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
6334 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
6335 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
6336 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6337 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6338 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
6339 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
6340 (vstrwq_scatter_base_wb): Define polymorphic variant.
6341 (vstrwq_scatter_base_wb_p): Likewise.
6342 (vstrdq_scatter_base_wb_p): Likewise.
6343 (vstrdq_scatter_base_wb): Likewise.
6344 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
6346 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
6348 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
6349 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
6350 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
6351 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
6352 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
6353 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
6354 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
6355 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
6356 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
6357 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
6358 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
6359 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
6360 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
6361 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
6362 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
6363 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
6364 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
6365 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
6366 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
6367 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
6368 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
6369 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
6370 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
6371 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
6372 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
6373 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
6374 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
6375 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
6376 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
6378 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6379 Andre Vieira <andre.simoesdiasvieira@arm.com>
6380 Mihail Ionescu <mihail.ionescu@arm.com>
6382 * config/arm/arm-builtins.c
6383 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
6385 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
6386 (vddupq_m_n_u32): Likewise.
6387 (vddupq_m_n_u16): Likewise.
6388 (vddupq_m_wb_u8): Likewise.
6389 (vddupq_m_wb_u16): Likewise.
6390 (vddupq_m_wb_u32): Likewise.
6391 (vddupq_n_u8): Likewise.
6392 (vddupq_n_u32): Likewise.
6393 (vddupq_n_u16): Likewise.
6394 (vddupq_wb_u8): Likewise.
6395 (vddupq_wb_u16): Likewise.
6396 (vddupq_wb_u32): Likewise.
6397 (vdwdupq_m_n_u8): Likewise.
6398 (vdwdupq_m_n_u32): Likewise.
6399 (vdwdupq_m_n_u16): Likewise.
6400 (vdwdupq_m_wb_u8): Likewise.
6401 (vdwdupq_m_wb_u32): Likewise.
6402 (vdwdupq_m_wb_u16): Likewise.
6403 (vdwdupq_n_u8): Likewise.
6404 (vdwdupq_n_u32): Likewise.
6405 (vdwdupq_n_u16): Likewise.
6406 (vdwdupq_wb_u8): Likewise.
6407 (vdwdupq_wb_u32): Likewise.
6408 (vdwdupq_wb_u16): Likewise.
6409 (vidupq_m_n_u8): Likewise.
6410 (vidupq_m_n_u32): Likewise.
6411 (vidupq_m_n_u16): Likewise.
6412 (vidupq_m_wb_u8): Likewise.
6413 (vidupq_m_wb_u16): Likewise.
6414 (vidupq_m_wb_u32): Likewise.
6415 (vidupq_n_u8): Likewise.
6416 (vidupq_n_u32): Likewise.
6417 (vidupq_n_u16): Likewise.
6418 (vidupq_wb_u8): Likewise.
6419 (vidupq_wb_u16): Likewise.
6420 (vidupq_wb_u32): Likewise.
6421 (viwdupq_m_n_u8): Likewise.
6422 (viwdupq_m_n_u32): Likewise.
6423 (viwdupq_m_n_u16): Likewise.
6424 (viwdupq_m_wb_u8): Likewise.
6425 (viwdupq_m_wb_u32): Likewise.
6426 (viwdupq_m_wb_u16): Likewise.
6427 (viwdupq_n_u8): Likewise.
6428 (viwdupq_n_u32): Likewise.
6429 (viwdupq_n_u16): Likewise.
6430 (viwdupq_wb_u8): Likewise.
6431 (viwdupq_wb_u32): Likewise.
6432 (viwdupq_wb_u16): Likewise.
6433 (__arm_vddupq_m_n_u8): Define intrinsic.
6434 (__arm_vddupq_m_n_u32): Likewise.
6435 (__arm_vddupq_m_n_u16): Likewise.
6436 (__arm_vddupq_m_wb_u8): Likewise.
6437 (__arm_vddupq_m_wb_u16): Likewise.
6438 (__arm_vddupq_m_wb_u32): Likewise.
6439 (__arm_vddupq_n_u8): Likewise.
6440 (__arm_vddupq_n_u32): Likewise.
6441 (__arm_vddupq_n_u16): Likewise.
6442 (__arm_vdwdupq_m_n_u8): Likewise.
6443 (__arm_vdwdupq_m_n_u32): Likewise.
6444 (__arm_vdwdupq_m_n_u16): Likewise.
6445 (__arm_vdwdupq_m_wb_u8): Likewise.
6446 (__arm_vdwdupq_m_wb_u32): Likewise.
6447 (__arm_vdwdupq_m_wb_u16): Likewise.
6448 (__arm_vdwdupq_n_u8): Likewise.
6449 (__arm_vdwdupq_n_u32): Likewise.
6450 (__arm_vdwdupq_n_u16): Likewise.
6451 (__arm_vdwdupq_wb_u8): Likewise.
6452 (__arm_vdwdupq_wb_u32): Likewise.
6453 (__arm_vdwdupq_wb_u16): Likewise.
6454 (__arm_vidupq_m_n_u8): Likewise.
6455 (__arm_vidupq_m_n_u32): Likewise.
6456 (__arm_vidupq_m_n_u16): Likewise.
6457 (__arm_vidupq_n_u8): Likewise.
6458 (__arm_vidupq_m_wb_u8): Likewise.
6459 (__arm_vidupq_m_wb_u16): Likewise.
6460 (__arm_vidupq_m_wb_u32): Likewise.
6461 (__arm_vidupq_n_u32): Likewise.
6462 (__arm_vidupq_n_u16): Likewise.
6463 (__arm_vidupq_wb_u8): Likewise.
6464 (__arm_vidupq_wb_u16): Likewise.
6465 (__arm_vidupq_wb_u32): Likewise.
6466 (__arm_vddupq_wb_u8): Likewise.
6467 (__arm_vddupq_wb_u16): Likewise.
6468 (__arm_vddupq_wb_u32): Likewise.
6469 (__arm_viwdupq_m_n_u8): Likewise.
6470 (__arm_viwdupq_m_n_u32): Likewise.
6471 (__arm_viwdupq_m_n_u16): Likewise.
6472 (__arm_viwdupq_m_wb_u8): Likewise.
6473 (__arm_viwdupq_m_wb_u32): Likewise.
6474 (__arm_viwdupq_m_wb_u16): Likewise.
6475 (__arm_viwdupq_n_u8): Likewise.
6476 (__arm_viwdupq_n_u32): Likewise.
6477 (__arm_viwdupq_n_u16): Likewise.
6478 (__arm_viwdupq_wb_u8): Likewise.
6479 (__arm_viwdupq_wb_u32): Likewise.
6480 (__arm_viwdupq_wb_u16): Likewise.
6481 (vidupq_m): Define polymorphic variant.
6482 (vddupq_m): Likewise.
6483 (vidupq_u16): Likewise.
6484 (vidupq_u32): Likewise.
6485 (vidupq_u8): Likewise.
6486 (vddupq_u16): Likewise.
6487 (vddupq_u32): Likewise.
6488 (vddupq_u8): Likewise.
6489 (viwdupq_m): Likewise.
6490 (viwdupq_u16): Likewise.
6491 (viwdupq_u32): Likewise.
6492 (viwdupq_u8): Likewise.
6493 (vdwdupq_m): Likewise.
6494 (vdwdupq_u16): Likewise.
6495 (vdwdupq_u32): Likewise.
6496 (vdwdupq_u8): Likewise.
6497 * config/arm/arm_mve_builtins.def
6498 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
6500 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
6501 (mve_vidupq_u<mode>_insn): Likewise.
6502 (mve_vidupq_m_n_u<mode>): Likewise.
6503 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
6504 (mve_vddupq_n_u<mode>): Likewise.
6505 (mve_vddupq_u<mode>_insn): Likewise.
6506 (mve_vddupq_m_n_u<mode>): Likewise.
6507 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
6508 (mve_vdwdupq_n_u<mode>): Likewise.
6509 (mve_vdwdupq_wb_u<mode>): Likewise.
6510 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
6511 (mve_vdwdupq_m_n_u<mode>): Likewise.
6512 (mve_vdwdupq_m_wb_u<mode>): Likewise.
6513 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
6514 (mve_viwdupq_n_u<mode>): Likewise.
6515 (mve_viwdupq_wb_u<mode>): Likewise.
6516 (mve_viwdupq_wb_u<mode>_insn): Likewise.
6517 (mve_viwdupq_m_n_u<mode>): Likewise.
6518 (mve_viwdupq_m_wb_u<mode>): Likewise.
6519 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
6521 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6523 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
6524 (vreinterpretq_s16_s64): Likewise.
6525 (vreinterpretq_s16_s8): Likewise.
6526 (vreinterpretq_s16_u16): Likewise.
6527 (vreinterpretq_s16_u32): Likewise.
6528 (vreinterpretq_s16_u64): Likewise.
6529 (vreinterpretq_s16_u8): Likewise.
6530 (vreinterpretq_s32_s16): Likewise.
6531 (vreinterpretq_s32_s64): Likewise.
6532 (vreinterpretq_s32_s8): Likewise.
6533 (vreinterpretq_s32_u16): Likewise.
6534 (vreinterpretq_s32_u32): Likewise.
6535 (vreinterpretq_s32_u64): Likewise.
6536 (vreinterpretq_s32_u8): Likewise.
6537 (vreinterpretq_s64_s16): Likewise.
6538 (vreinterpretq_s64_s32): Likewise.
6539 (vreinterpretq_s64_s8): Likewise.
6540 (vreinterpretq_s64_u16): Likewise.
6541 (vreinterpretq_s64_u32): Likewise.
6542 (vreinterpretq_s64_u64): Likewise.
6543 (vreinterpretq_s64_u8): Likewise.
6544 (vreinterpretq_s8_s16): Likewise.
6545 (vreinterpretq_s8_s32): Likewise.
6546 (vreinterpretq_s8_s64): Likewise.
6547 (vreinterpretq_s8_u16): Likewise.
6548 (vreinterpretq_s8_u32): Likewise.
6549 (vreinterpretq_s8_u64): Likewise.
6550 (vreinterpretq_s8_u8): Likewise.
6551 (vreinterpretq_u16_s16): Likewise.
6552 (vreinterpretq_u16_s32): Likewise.
6553 (vreinterpretq_u16_s64): Likewise.
6554 (vreinterpretq_u16_s8): Likewise.
6555 (vreinterpretq_u16_u32): Likewise.
6556 (vreinterpretq_u16_u64): Likewise.
6557 (vreinterpretq_u16_u8): Likewise.
6558 (vreinterpretq_u32_s16): Likewise.
6559 (vreinterpretq_u32_s32): Likewise.
6560 (vreinterpretq_u32_s64): Likewise.
6561 (vreinterpretq_u32_s8): Likewise.
6562 (vreinterpretq_u32_u16): Likewise.
6563 (vreinterpretq_u32_u64): Likewise.
6564 (vreinterpretq_u32_u8): Likewise.
6565 (vreinterpretq_u64_s16): Likewise.
6566 (vreinterpretq_u64_s32): Likewise.
6567 (vreinterpretq_u64_s64): Likewise.
6568 (vreinterpretq_u64_s8): Likewise.
6569 (vreinterpretq_u64_u16): Likewise.
6570 (vreinterpretq_u64_u32): Likewise.
6571 (vreinterpretq_u64_u8): Likewise.
6572 (vreinterpretq_u8_s16): Likewise.
6573 (vreinterpretq_u8_s32): Likewise.
6574 (vreinterpretq_u8_s64): Likewise.
6575 (vreinterpretq_u8_s8): Likewise.
6576 (vreinterpretq_u8_u16): Likewise.
6577 (vreinterpretq_u8_u32): Likewise.
6578 (vreinterpretq_u8_u64): Likewise.
6579 (vreinterpretq_s32_f16): Likewise.
6580 (vreinterpretq_s32_f32): Likewise.
6581 (vreinterpretq_u16_f16): Likewise.
6582 (vreinterpretq_u16_f32): Likewise.
6583 (vreinterpretq_u32_f16): Likewise.
6584 (vreinterpretq_u32_f32): Likewise.
6585 (vreinterpretq_u64_f16): Likewise.
6586 (vreinterpretq_u64_f32): Likewise.
6587 (vreinterpretq_u8_f16): Likewise.
6588 (vreinterpretq_u8_f32): Likewise.
6589 (vreinterpretq_f16_f32): Likewise.
6590 (vreinterpretq_f16_s16): Likewise.
6591 (vreinterpretq_f16_s32): Likewise.
6592 (vreinterpretq_f16_s64): Likewise.
6593 (vreinterpretq_f16_s8): Likewise.
6594 (vreinterpretq_f16_u16): Likewise.
6595 (vreinterpretq_f16_u32): Likewise.
6596 (vreinterpretq_f16_u64): Likewise.
6597 (vreinterpretq_f16_u8): Likewise.
6598 (vreinterpretq_f32_f16): Likewise.
6599 (vreinterpretq_f32_s16): Likewise.
6600 (vreinterpretq_f32_s32): Likewise.
6601 (vreinterpretq_f32_s64): Likewise.
6602 (vreinterpretq_f32_s8): Likewise.
6603 (vreinterpretq_f32_u16): Likewise.
6604 (vreinterpretq_f32_u32): Likewise.
6605 (vreinterpretq_f32_u64): Likewise.
6606 (vreinterpretq_f32_u8): Likewise.
6607 (vreinterpretq_s16_f16): Likewise.
6608 (vreinterpretq_s16_f32): Likewise.
6609 (vreinterpretq_s64_f16): Likewise.
6610 (vreinterpretq_s64_f32): Likewise.
6611 (vreinterpretq_s8_f16): Likewise.
6612 (vreinterpretq_s8_f32): Likewise.
6613 (vuninitializedq_u8): Likewise.
6614 (vuninitializedq_u16): Likewise.
6615 (vuninitializedq_u32): Likewise.
6616 (vuninitializedq_u64): Likewise.
6617 (vuninitializedq_s8): Likewise.
6618 (vuninitializedq_s16): Likewise.
6619 (vuninitializedq_s32): Likewise.
6620 (vuninitializedq_s64): Likewise.
6621 (vuninitializedq_f16): Likewise.
6622 (vuninitializedq_f32): Likewise.
6623 (__arm_vuninitializedq_u8): Define intrinsic.
6624 (__arm_vuninitializedq_u16): Likewise.
6625 (__arm_vuninitializedq_u32): Likewise.
6626 (__arm_vuninitializedq_u64): Likewise.
6627 (__arm_vuninitializedq_s8): Likewise.
6628 (__arm_vuninitializedq_s16): Likewise.
6629 (__arm_vuninitializedq_s32): Likewise.
6630 (__arm_vuninitializedq_s64): Likewise.
6631 (__arm_vreinterpretq_s16_s32): Likewise.
6632 (__arm_vreinterpretq_s16_s64): Likewise.
6633 (__arm_vreinterpretq_s16_s8): Likewise.
6634 (__arm_vreinterpretq_s16_u16): Likewise.
6635 (__arm_vreinterpretq_s16_u32): Likewise.
6636 (__arm_vreinterpretq_s16_u64): Likewise.
6637 (__arm_vreinterpretq_s16_u8): Likewise.
6638 (__arm_vreinterpretq_s32_s16): Likewise.
6639 (__arm_vreinterpretq_s32_s64): Likewise.
6640 (__arm_vreinterpretq_s32_s8): Likewise.
6641 (__arm_vreinterpretq_s32_u16): Likewise.
6642 (__arm_vreinterpretq_s32_u32): Likewise.
6643 (__arm_vreinterpretq_s32_u64): Likewise.
6644 (__arm_vreinterpretq_s32_u8): Likewise.
6645 (__arm_vreinterpretq_s64_s16): Likewise.
6646 (__arm_vreinterpretq_s64_s32): Likewise.
6647 (__arm_vreinterpretq_s64_s8): Likewise.
6648 (__arm_vreinterpretq_s64_u16): Likewise.
6649 (__arm_vreinterpretq_s64_u32): Likewise.
6650 (__arm_vreinterpretq_s64_u64): Likewise.
6651 (__arm_vreinterpretq_s64_u8): Likewise.
6652 (__arm_vreinterpretq_s8_s16): Likewise.
6653 (__arm_vreinterpretq_s8_s32): Likewise.
6654 (__arm_vreinterpretq_s8_s64): Likewise.
6655 (__arm_vreinterpretq_s8_u16): Likewise.
6656 (__arm_vreinterpretq_s8_u32): Likewise.
6657 (__arm_vreinterpretq_s8_u64): Likewise.
6658 (__arm_vreinterpretq_s8_u8): Likewise.
6659 (__arm_vreinterpretq_u16_s16): Likewise.
6660 (__arm_vreinterpretq_u16_s32): Likewise.
6661 (__arm_vreinterpretq_u16_s64): Likewise.
6662 (__arm_vreinterpretq_u16_s8): Likewise.
6663 (__arm_vreinterpretq_u16_u32): Likewise.
6664 (__arm_vreinterpretq_u16_u64): Likewise.
6665 (__arm_vreinterpretq_u16_u8): Likewise.
6666 (__arm_vreinterpretq_u32_s16): Likewise.
6667 (__arm_vreinterpretq_u32_s32): Likewise.
6668 (__arm_vreinterpretq_u32_s64): Likewise.
6669 (__arm_vreinterpretq_u32_s8): Likewise.
6670 (__arm_vreinterpretq_u32_u16): Likewise.
6671 (__arm_vreinterpretq_u32_u64): Likewise.
6672 (__arm_vreinterpretq_u32_u8): Likewise.
6673 (__arm_vreinterpretq_u64_s16): Likewise.
6674 (__arm_vreinterpretq_u64_s32): Likewise.
6675 (__arm_vreinterpretq_u64_s64): Likewise.
6676 (__arm_vreinterpretq_u64_s8): Likewise.
6677 (__arm_vreinterpretq_u64_u16): Likewise.
6678 (__arm_vreinterpretq_u64_u32): Likewise.
6679 (__arm_vreinterpretq_u64_u8): Likewise.
6680 (__arm_vreinterpretq_u8_s16): Likewise.
6681 (__arm_vreinterpretq_u8_s32): Likewise.
6682 (__arm_vreinterpretq_u8_s64): Likewise.
6683 (__arm_vreinterpretq_u8_s8): Likewise.
6684 (__arm_vreinterpretq_u8_u16): Likewise.
6685 (__arm_vreinterpretq_u8_u32): Likewise.
6686 (__arm_vreinterpretq_u8_u64): Likewise.
6687 (__arm_vuninitializedq_f16): Likewise.
6688 (__arm_vuninitializedq_f32): Likewise.
6689 (__arm_vreinterpretq_s32_f16): Likewise.
6690 (__arm_vreinterpretq_s32_f32): Likewise.
6691 (__arm_vreinterpretq_s16_f16): Likewise.
6692 (__arm_vreinterpretq_s16_f32): Likewise.
6693 (__arm_vreinterpretq_s64_f16): Likewise.
6694 (__arm_vreinterpretq_s64_f32): Likewise.
6695 (__arm_vreinterpretq_s8_f16): Likewise.
6696 (__arm_vreinterpretq_s8_f32): Likewise.
6697 (__arm_vreinterpretq_u16_f16): Likewise.
6698 (__arm_vreinterpretq_u16_f32): Likewise.
6699 (__arm_vreinterpretq_u32_f16): Likewise.
6700 (__arm_vreinterpretq_u32_f32): Likewise.
6701 (__arm_vreinterpretq_u64_f16): Likewise.
6702 (__arm_vreinterpretq_u64_f32): Likewise.
6703 (__arm_vreinterpretq_u8_f16): Likewise.
6704 (__arm_vreinterpretq_u8_f32): Likewise.
6705 (__arm_vreinterpretq_f16_f32): Likewise.
6706 (__arm_vreinterpretq_f16_s16): Likewise.
6707 (__arm_vreinterpretq_f16_s32): Likewise.
6708 (__arm_vreinterpretq_f16_s64): Likewise.
6709 (__arm_vreinterpretq_f16_s8): Likewise.
6710 (__arm_vreinterpretq_f16_u16): Likewise.
6711 (__arm_vreinterpretq_f16_u32): Likewise.
6712 (__arm_vreinterpretq_f16_u64): Likewise.
6713 (__arm_vreinterpretq_f16_u8): Likewise.
6714 (__arm_vreinterpretq_f32_f16): Likewise.
6715 (__arm_vreinterpretq_f32_s16): Likewise.
6716 (__arm_vreinterpretq_f32_s32): Likewise.
6717 (__arm_vreinterpretq_f32_s64): Likewise.
6718 (__arm_vreinterpretq_f32_s8): Likewise.
6719 (__arm_vreinterpretq_f32_u16): Likewise.
6720 (__arm_vreinterpretq_f32_u32): Likewise.
6721 (__arm_vreinterpretq_f32_u64): Likewise.
6722 (__arm_vreinterpretq_f32_u8): Likewise.
6723 (vuninitializedq): Define polymorphic variant.
6724 (vreinterpretq_f16): Likewise.
6725 (vreinterpretq_f32): Likewise.
6726 (vreinterpretq_s16): Likewise.
6727 (vreinterpretq_s32): Likewise.
6728 (vreinterpretq_s64): Likewise.
6729 (vreinterpretq_s8): Likewise.
6730 (vreinterpretq_u16): Likewise.
6731 (vreinterpretq_u32): Likewise.
6732 (vreinterpretq_u64): Likewise.
6733 (vreinterpretq_u8): Likewise.
6735 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6736 Andre Vieira <andre.simoesdiasvieira@arm.com>
6737 Mihail Ionescu <mihail.ionescu@arm.com>
6739 * config/arm/arm_mve.h (vaddq_s8): Define macro.
6740 (vaddq_s16): Likewise.
6741 (vaddq_s32): Likewise.
6742 (vaddq_u8): Likewise.
6743 (vaddq_u16): Likewise.
6744 (vaddq_u32): Likewise.
6745 (vaddq_f16): Likewise.
6746 (vaddq_f32): Likewise.
6747 (__arm_vaddq_s8): Define intrinsic.
6748 (__arm_vaddq_s16): Likewise.
6749 (__arm_vaddq_s32): Likewise.
6750 (__arm_vaddq_u8): Likewise.
6751 (__arm_vaddq_u16): Likewise.
6752 (__arm_vaddq_u32): Likewise.
6753 (__arm_vaddq_f16): Likewise.
6754 (__arm_vaddq_f32): Likewise.
6755 (vaddq): Define polymorphic variant.
6756 * config/arm/iterators.md (VNIM): Define mode iterator for common types
6757 Neon, IWMMXT and MVE.
6758 (VNINOTM): Likewise.
6759 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
6760 (mve_vaddq_f<mode>): Define RTL pattern.
6761 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
6762 (addv8hf3_neon): Define RTL pattern.
6763 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
6765 (addv8hf3): Define standard RTL pattern for MVE and Neon.
6766 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
6768 2020-03-20 Martin Liska <mliska@suse.cz>
6771 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
6772 build_ref_for_offset function was used and it transforms off to bytes
6775 2020-03-20 Richard Biener <rguenther@suse.de>
6777 PR tree-optimization/94266
6778 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
6779 type of the underlying object to adjust for the containing
6782 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6784 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
6785 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
6786 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
6788 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6790 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
6792 2020-03-20 Jakub Jelinek <jakub@redhat.com>
6794 PR tree-optimization/94224
6795 * gimple-ssa-store-merging.c
6796 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
6797 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
6800 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6802 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
6804 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6807 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
6808 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
6810 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6813 * cgraphunit.c (process_function_and_variable_attributes): warn
6814 for flatten attribute on alias.
6815 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
6817 2020-03-19 Martin Liska <mliska@suse.cz>
6819 * lto-section-in.c: Add ext_symtab.
6820 * lto-streamer-out.c (write_symbol_extension_info): New.
6821 (produce_symtab_extension): New.
6822 (produce_asm_for_decls): Stream also produce_symtab_extension.
6823 * lto-streamer.h (enum lto_section_type): New section.
6825 2020-03-19 Jakub Jelinek <jakub@redhat.com>
6827 PR tree-optimization/94211
6828 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
6829 instead of estimate_num_insns for bb_seq (middle_bb). Rename
6830 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
6833 2020-03-19 Richard Biener <rguenther@suse.de>
6836 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
6837 and build_ref_for_offset.
6839 2020-03-19 Richard Biener <rguenther@suse.de>
6842 * fold-const.c (fold_binary_loc): Avoid using
6843 build_fold_addr_expr when we really want an ADDR_EXPR.
6845 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
6847 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
6850 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
6852 PR rtl-optimization/90275
6853 * cse.c (cse_insn): Delete no-op register moves too.
6855 2020-03-18 Martin Sebor <msebor@redhat.com>
6858 * cgraphunit.c (process_function_and_variable_attributes): Also
6859 complain about weakref function definitions and drop all effects
6862 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6863 Mihail Ionescu <mihail.ionescu@arm.com>
6864 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6866 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
6867 (vstrdq_scatter_base_p_u64): Likewise.
6868 (vstrdq_scatter_base_s64): Likewise.
6869 (vstrdq_scatter_base_u64): Likewise.
6870 (vstrdq_scatter_offset_p_s64): Likewise.
6871 (vstrdq_scatter_offset_p_u64): Likewise.
6872 (vstrdq_scatter_offset_s64): Likewise.
6873 (vstrdq_scatter_offset_u64): Likewise.
6874 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
6875 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
6876 (vstrdq_scatter_shifted_offset_s64): Likewise.
6877 (vstrdq_scatter_shifted_offset_u64): Likewise.
6878 (vstrhq_scatter_offset_f16): Likewise.
6879 (vstrhq_scatter_offset_p_f16): Likewise.
6880 (vstrhq_scatter_shifted_offset_f16): Likewise.
6881 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
6882 (vstrwq_scatter_base_f32): Likewise.
6883 (vstrwq_scatter_base_p_f32): Likewise.
6884 (vstrwq_scatter_offset_f32): Likewise.
6885 (vstrwq_scatter_offset_p_f32): Likewise.
6886 (vstrwq_scatter_offset_p_s32): Likewise.
6887 (vstrwq_scatter_offset_p_u32): Likewise.
6888 (vstrwq_scatter_offset_s32): Likewise.
6889 (vstrwq_scatter_offset_u32): Likewise.
6890 (vstrwq_scatter_shifted_offset_f32): Likewise.
6891 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
6892 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
6893 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
6894 (vstrwq_scatter_shifted_offset_s32): Likewise.
6895 (vstrwq_scatter_shifted_offset_u32): Likewise.
6896 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
6897 (__arm_vstrdq_scatter_base_p_u64): Likewise.
6898 (__arm_vstrdq_scatter_base_s64): Likewise.
6899 (__arm_vstrdq_scatter_base_u64): Likewise.
6900 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
6901 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
6902 (__arm_vstrdq_scatter_offset_s64): Likewise.
6903 (__arm_vstrdq_scatter_offset_u64): Likewise.
6904 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
6905 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
6906 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
6907 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
6908 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
6909 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
6910 (__arm_vstrwq_scatter_offset_s32): Likewise.
6911 (__arm_vstrwq_scatter_offset_u32): Likewise.
6912 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
6913 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
6914 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
6915 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
6916 (__arm_vstrhq_scatter_offset_f16): Likewise.
6917 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
6918 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
6919 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
6920 (__arm_vstrwq_scatter_base_f32): Likewise.
6921 (__arm_vstrwq_scatter_base_p_f32): Likewise.
6922 (__arm_vstrwq_scatter_offset_f32): Likewise.
6923 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
6924 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
6925 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
6926 (vstrhq_scatter_offset): Define polymorphic variant.
6927 (vstrhq_scatter_offset_p): Likewise.
6928 (vstrhq_scatter_shifted_offset): Likewise.
6929 (vstrhq_scatter_shifted_offset_p): Likewise.
6930 (vstrwq_scatter_base): Likewise.
6931 (vstrwq_scatter_base_p): Likewise.
6932 (vstrwq_scatter_offset): Likewise.
6933 (vstrwq_scatter_offset_p): Likewise.
6934 (vstrwq_scatter_shifted_offset): Likewise.
6935 (vstrwq_scatter_shifted_offset_p): Likewise.
6936 (vstrdq_scatter_base_p): Likewise.
6937 (vstrdq_scatter_base): Likewise.
6938 (vstrdq_scatter_offset_p): Likewise.
6939 (vstrdq_scatter_offset): Likewise.
6940 (vstrdq_scatter_shifted_offset_p): Likewise.
6941 (vstrdq_scatter_shifted_offset): Likewise.
6942 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
6943 (STRSBS_P): Likewise.
6945 (STRSBU_P): Likewise.
6947 (STRSS_P): Likewise.
6949 (STRSU_P): Likewise.
6950 * config/arm/constraints.md (Ri): Define.
6951 * config/arm/mve.md (VSTRDSBQ): Define iterator.
6952 (VSTRDSOQ): Likewise.
6953 (VSTRDSSOQ): Likewise.
6954 (VSTRWSOQ): Likewise.
6955 (VSTRWSSOQ): Likewise.
6956 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
6957 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
6958 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6959 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6960 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6961 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6962 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6963 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6964 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6965 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6966 (mve_vstrwq_scatter_base_fv4sf): Likewise.
6967 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
6968 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6969 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6970 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6971 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6972 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6973 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6974 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6975 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6976 * config/arm/predicates.md (Ri): Define predicate to check immediate
6977 is the range +/-1016 and multiple of 8.
6979 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6980 Mihail Ionescu <mihail.ionescu@arm.com>
6981 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6983 * config/arm/arm_mve.h (vst1q_f32): Define macro.
6984 (vst1q_f16): Likewise.
6985 (vst1q_s8): Likewise.
6986 (vst1q_s32): Likewise.
6987 (vst1q_s16): Likewise.
6988 (vst1q_u8): Likewise.
6989 (vst1q_u32): Likewise.
6990 (vst1q_u16): Likewise.
6991 (vstrhq_f16): Likewise.
6992 (vstrhq_scatter_offset_s32): Likewise.
6993 (vstrhq_scatter_offset_s16): Likewise.
6994 (vstrhq_scatter_offset_u32): Likewise.
6995 (vstrhq_scatter_offset_u16): Likewise.
6996 (vstrhq_scatter_offset_p_s32): Likewise.
6997 (vstrhq_scatter_offset_p_s16): Likewise.
6998 (vstrhq_scatter_offset_p_u32): Likewise.
6999 (vstrhq_scatter_offset_p_u16): Likewise.
7000 (vstrhq_scatter_shifted_offset_s32): Likewise.
7001 (vstrhq_scatter_shifted_offset_s16): Likewise.
7002 (vstrhq_scatter_shifted_offset_u32): Likewise.
7003 (vstrhq_scatter_shifted_offset_u16): Likewise.
7004 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
7005 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
7006 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
7007 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
7008 (vstrhq_s32): Likewise.
7009 (vstrhq_s16): Likewise.
7010 (vstrhq_u32): Likewise.
7011 (vstrhq_u16): Likewise.
7012 (vstrhq_p_f16): Likewise.
7013 (vstrhq_p_s32): Likewise.
7014 (vstrhq_p_s16): Likewise.
7015 (vstrhq_p_u32): Likewise.
7016 (vstrhq_p_u16): Likewise.
7017 (vstrwq_f32): Likewise.
7018 (vstrwq_s32): Likewise.
7019 (vstrwq_u32): Likewise.
7020 (vstrwq_p_f32): Likewise.
7021 (vstrwq_p_s32): Likewise.
7022 (vstrwq_p_u32): Likewise.
7023 (__arm_vst1q_s8): Define intrinsic.
7024 (__arm_vst1q_s32): Likewise.
7025 (__arm_vst1q_s16): Likewise.
7026 (__arm_vst1q_u8): Likewise.
7027 (__arm_vst1q_u32): Likewise.
7028 (__arm_vst1q_u16): Likewise.
7029 (__arm_vstrhq_scatter_offset_s32): Likewise.
7030 (__arm_vstrhq_scatter_offset_s16): Likewise.
7031 (__arm_vstrhq_scatter_offset_u32): Likewise.
7032 (__arm_vstrhq_scatter_offset_u16): Likewise.
7033 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
7034 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
7035 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
7036 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
7037 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
7038 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
7039 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
7040 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
7041 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
7042 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
7043 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
7044 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
7045 (__arm_vstrhq_s32): Likewise.
7046 (__arm_vstrhq_s16): Likewise.
7047 (__arm_vstrhq_u32): Likewise.
7048 (__arm_vstrhq_u16): Likewise.
7049 (__arm_vstrhq_p_s32): Likewise.
7050 (__arm_vstrhq_p_s16): Likewise.
7051 (__arm_vstrhq_p_u32): Likewise.
7052 (__arm_vstrhq_p_u16): Likewise.
7053 (__arm_vstrwq_s32): Likewise.
7054 (__arm_vstrwq_u32): Likewise.
7055 (__arm_vstrwq_p_s32): Likewise.
7056 (__arm_vstrwq_p_u32): Likewise.
7057 (__arm_vstrwq_p_f32): Likewise.
7058 (__arm_vstrwq_f32): Likewise.
7059 (__arm_vst1q_f32): Likewise.
7060 (__arm_vst1q_f16): Likewise.
7061 (__arm_vstrhq_f16): Likewise.
7062 (__arm_vstrhq_p_f16): Likewise.
7063 (vst1q): Define polymorphic variant.
7065 (vstrhq_p): Likewise.
7066 (vstrhq_scatter_offset_p): Likewise.
7067 (vstrhq_scatter_offset): Likewise.
7068 (vstrhq_scatter_shifted_offset_p): Likewise.
7069 (vstrhq_scatter_shifted_offset): Likewise.
7070 (vstrwq_p): Likewise.
7072 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
7075 (STRSS_P): Likewise.
7077 (STRSU_P): Likewise.
7080 * config/arm/mve.md (VST1Q): Define iterator.
7081 (VSTRHSOQ): Likewise.
7082 (VSTRHSSOQ): Likewise.
7085 (mve_vstrhq_fv8hf): Define RTL pattern.
7086 (mve_vstrhq_p_fv8hf): Likewise.
7087 (mve_vstrhq_p_<supf><mode>): Likewise.
7088 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
7089 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
7090 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
7091 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
7092 (mve_vstrhq_<supf><mode>): Likewise.
7093 (mve_vstrwq_fv4sf): Likewise.
7094 (mve_vstrwq_p_fv4sf): Likewise.
7095 (mve_vstrwq_p_<supf>v4si): Likewise.
7096 (mve_vstrwq_<supf>v4si): Likewise.
7097 (mve_vst1q_f<mode>): Define expand.
7098 (mve_vst1q_<supf><mode>): Likewise.
7100 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7101 Mihail Ionescu <mihail.ionescu@arm.com>
7102 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7104 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7105 (vld1q_s32): Likewise.
7106 (vld1q_s16): Likewise.
7107 (vld1q_u8): Likewise.
7108 (vld1q_u32): Likewise.
7109 (vld1q_u16): Likewise.
7110 (vldrhq_gather_offset_s32): Likewise.
7111 (vldrhq_gather_offset_s16): Likewise.
7112 (vldrhq_gather_offset_u32): Likewise.
7113 (vldrhq_gather_offset_u16): Likewise.
7114 (vldrhq_gather_offset_z_s32): Likewise.
7115 (vldrhq_gather_offset_z_s16): Likewise.
7116 (vldrhq_gather_offset_z_u32): Likewise.
7117 (vldrhq_gather_offset_z_u16): Likewise.
7118 (vldrhq_gather_shifted_offset_s32): Likewise.
7119 (vldrhq_gather_shifted_offset_s16): Likewise.
7120 (vldrhq_gather_shifted_offset_u32): Likewise.
7121 (vldrhq_gather_shifted_offset_u16): Likewise.
7122 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7123 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7124 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7125 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7126 (vldrhq_s32): Likewise.
7127 (vldrhq_s16): Likewise.
7128 (vldrhq_u32): Likewise.
7129 (vldrhq_u16): Likewise.
7130 (vldrhq_z_s32): Likewise.
7131 (vldrhq_z_s16): Likewise.
7132 (vldrhq_z_u32): Likewise.
7133 (vldrhq_z_u16): Likewise.
7134 (vldrwq_s32): Likewise.
7135 (vldrwq_u32): Likewise.
7136 (vldrwq_z_s32): Likewise.
7137 (vldrwq_z_u32): Likewise.
7138 (vld1q_f32): Likewise.
7139 (vld1q_f16): Likewise.
7140 (vldrhq_f16): Likewise.
7141 (vldrhq_z_f16): Likewise.
7142 (vldrwq_f32): Likewise.
7143 (vldrwq_z_f32): Likewise.
7144 (__arm_vld1q_s8): Define intrinsic.
7145 (__arm_vld1q_s32): Likewise.
7146 (__arm_vld1q_s16): Likewise.
7147 (__arm_vld1q_u8): Likewise.
7148 (__arm_vld1q_u32): Likewise.
7149 (__arm_vld1q_u16): Likewise.
7150 (__arm_vldrhq_gather_offset_s32): Likewise.
7151 (__arm_vldrhq_gather_offset_s16): Likewise.
7152 (__arm_vldrhq_gather_offset_u32): Likewise.
7153 (__arm_vldrhq_gather_offset_u16): Likewise.
7154 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7155 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7156 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7157 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7158 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7159 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7160 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7161 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7162 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7163 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7164 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7165 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7166 (__arm_vldrhq_s32): Likewise.
7167 (__arm_vldrhq_s16): Likewise.
7168 (__arm_vldrhq_u32): Likewise.
7169 (__arm_vldrhq_u16): Likewise.
7170 (__arm_vldrhq_z_s32): Likewise.
7171 (__arm_vldrhq_z_s16): Likewise.
7172 (__arm_vldrhq_z_u32): Likewise.
7173 (__arm_vldrhq_z_u16): Likewise.
7174 (__arm_vldrwq_s32): Likewise.
7175 (__arm_vldrwq_u32): Likewise.
7176 (__arm_vldrwq_z_s32): Likewise.
7177 (__arm_vldrwq_z_u32): Likewise.
7178 (__arm_vld1q_f32): Likewise.
7179 (__arm_vld1q_f16): Likewise.
7180 (__arm_vldrwq_f32): Likewise.
7181 (__arm_vldrwq_z_f32): Likewise.
7182 (__arm_vldrhq_z_f16): Likewise.
7183 (__arm_vldrhq_f16): Likewise.
7184 (vld1q): Define polymorphic variant.
7185 (vldrhq_gather_offset): Likewise.
7186 (vldrhq_gather_offset_z): Likewise.
7187 (vldrhq_gather_shifted_offset): Likewise.
7188 (vldrhq_gather_shifted_offset_z): Likewise.
7189 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7193 (LDRGU_Z): Likewise.
7195 (LDRGS_Z): Likewise.
7197 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7198 (V_sz_elem1): Likewise.
7199 (VLD1Q): Define iterator.
7200 (VLDRHGOQ): Likewise.
7201 (VLDRHGSOQ): Likewise.
7204 (mve_vldrhq_fv8hf): Define RTL pattern.
7205 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7206 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7207 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7208 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7209 (mve_vldrhq_<supf><mode>): Likewise.
7210 (mve_vldrhq_z_fv8hf): Likewise.
7211 (mve_vldrhq_z_<supf><mode>): Likewise.
7212 (mve_vldrwq_fv4sf): Likewise.
7213 (mve_vldrwq_<supf>v4si): Likewise.
7214 (mve_vldrwq_z_fv4sf): Likewise.
7215 (mve_vldrwq_z_<supf>v4si): Likewise.
7216 (mve_vld1q_f<mode>): Define RTL expand pattern.
7217 (mve_vld1q_<supf><mode>): Likewise.
7219 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7220 Mihail Ionescu <mihail.ionescu@arm.com>
7221 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7223 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7224 (vld1q_s32): Likewise.
7225 (vld1q_s16): Likewise.
7226 (vld1q_u8): Likewise.
7227 (vld1q_u32): Likewise.
7228 (vld1q_u16): Likewise.
7229 (vldrhq_gather_offset_s32): Likewise.
7230 (vldrhq_gather_offset_s16): Likewise.
7231 (vldrhq_gather_offset_u32): Likewise.
7232 (vldrhq_gather_offset_u16): Likewise.
7233 (vldrhq_gather_offset_z_s32): Likewise.
7234 (vldrhq_gather_offset_z_s16): Likewise.
7235 (vldrhq_gather_offset_z_u32): Likewise.
7236 (vldrhq_gather_offset_z_u16): Likewise.
7237 (vldrhq_gather_shifted_offset_s32): Likewise.
7238 (vldrhq_gather_shifted_offset_s16): Likewise.
7239 (vldrhq_gather_shifted_offset_u32): Likewise.
7240 (vldrhq_gather_shifted_offset_u16): Likewise.
7241 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7242 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7243 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7244 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7245 (vldrhq_s32): Likewise.
7246 (vldrhq_s16): Likewise.
7247 (vldrhq_u32): Likewise.
7248 (vldrhq_u16): Likewise.
7249 (vldrhq_z_s32): Likewise.
7250 (vldrhq_z_s16): Likewise.
7251 (vldrhq_z_u32): Likewise.
7252 (vldrhq_z_u16): Likewise.
7253 (vldrwq_s32): Likewise.
7254 (vldrwq_u32): Likewise.
7255 (vldrwq_z_s32): Likewise.
7256 (vldrwq_z_u32): Likewise.
7257 (vld1q_f32): Likewise.
7258 (vld1q_f16): Likewise.
7259 (vldrhq_f16): Likewise.
7260 (vldrhq_z_f16): Likewise.
7261 (vldrwq_f32): Likewise.
7262 (vldrwq_z_f32): Likewise.
7263 (__arm_vld1q_s8): Define intrinsic.
7264 (__arm_vld1q_s32): Likewise.
7265 (__arm_vld1q_s16): Likewise.
7266 (__arm_vld1q_u8): Likewise.
7267 (__arm_vld1q_u32): Likewise.
7268 (__arm_vld1q_u16): Likewise.
7269 (__arm_vldrhq_gather_offset_s32): Likewise.
7270 (__arm_vldrhq_gather_offset_s16): Likewise.
7271 (__arm_vldrhq_gather_offset_u32): Likewise.
7272 (__arm_vldrhq_gather_offset_u16): Likewise.
7273 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7274 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7275 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7276 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7277 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7278 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7279 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7280 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7281 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7282 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7283 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7284 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7285 (__arm_vldrhq_s32): Likewise.
7286 (__arm_vldrhq_s16): Likewise.
7287 (__arm_vldrhq_u32): Likewise.
7288 (__arm_vldrhq_u16): Likewise.
7289 (__arm_vldrhq_z_s32): Likewise.
7290 (__arm_vldrhq_z_s16): Likewise.
7291 (__arm_vldrhq_z_u32): Likewise.
7292 (__arm_vldrhq_z_u16): Likewise.
7293 (__arm_vldrwq_s32): Likewise.
7294 (__arm_vldrwq_u32): Likewise.
7295 (__arm_vldrwq_z_s32): Likewise.
7296 (__arm_vldrwq_z_u32): Likewise.
7297 (__arm_vld1q_f32): Likewise.
7298 (__arm_vld1q_f16): Likewise.
7299 (__arm_vldrwq_f32): Likewise.
7300 (__arm_vldrwq_z_f32): Likewise.
7301 (__arm_vldrhq_z_f16): Likewise.
7302 (__arm_vldrhq_f16): Likewise.
7303 (vld1q): Define polymorphic variant.
7304 (vldrhq_gather_offset): Likewise.
7305 (vldrhq_gather_offset_z): Likewise.
7306 (vldrhq_gather_shifted_offset): Likewise.
7307 (vldrhq_gather_shifted_offset_z): Likewise.
7308 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7312 (LDRGU_Z): Likewise.
7314 (LDRGS_Z): Likewise.
7316 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7317 (V_sz_elem1): Likewise.
7318 (VLD1Q): Define iterator.
7319 (VLDRHGOQ): Likewise.
7320 (VLDRHGSOQ): Likewise.
7323 (mve_vldrhq_fv8hf): Define RTL pattern.
7324 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7325 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7326 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7327 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7328 (mve_vldrhq_<supf><mode>): Likewise.
7329 (mve_vldrhq_z_fv8hf): Likewise.
7330 (mve_vldrhq_z_<supf><mode>): Likewise.
7331 (mve_vldrwq_fv4sf): Likewise.
7332 (mve_vldrwq_<supf>v4si): Likewise.
7333 (mve_vldrwq_z_fv4sf): Likewise.
7334 (mve_vldrwq_z_<supf>v4si): Likewise.
7335 (mve_vld1q_f<mode>): Define RTL expand pattern.
7336 (mve_vld1q_<supf><mode>): Likewise.
7338 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7339 Mihail Ionescu <mihail.ionescu@arm.com>
7340 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7342 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
7344 (LDRGBU_Z_QUALIFIERS): Likewise.
7345 (LDRGS_Z_QUALIFIERS): Likewise.
7346 (LDRGU_Z_QUALIFIERS): Likewise.
7347 (LDRS_Z_QUALIFIERS): Likewise.
7348 (LDRU_Z_QUALIFIERS): Likewise.
7349 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
7350 (vldrbq_gather_offset_z_u8): Likewise.
7351 (vldrbq_gather_offset_z_s32): Likewise.
7352 (vldrbq_gather_offset_z_u16): Likewise.
7353 (vldrbq_gather_offset_z_u32): Likewise.
7354 (vldrbq_gather_offset_z_s8): Likewise.
7355 (vldrbq_z_s16): Likewise.
7356 (vldrbq_z_u8): Likewise.
7357 (vldrbq_z_s8): Likewise.
7358 (vldrbq_z_s32): Likewise.
7359 (vldrbq_z_u16): Likewise.
7360 (vldrbq_z_u32): Likewise.
7361 (vldrwq_gather_base_z_u32): Likewise.
7362 (vldrwq_gather_base_z_s32): Likewise.
7363 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
7364 (__arm_vldrbq_gather_offset_z_s32): Likewise.
7365 (__arm_vldrbq_gather_offset_z_s16): Likewise.
7366 (__arm_vldrbq_gather_offset_z_u8): Likewise.
7367 (__arm_vldrbq_gather_offset_z_u32): Likewise.
7368 (__arm_vldrbq_gather_offset_z_u16): Likewise.
7369 (__arm_vldrbq_z_s8): Likewise.
7370 (__arm_vldrbq_z_s32): Likewise.
7371 (__arm_vldrbq_z_s16): Likewise.
7372 (__arm_vldrbq_z_u8): Likewise.
7373 (__arm_vldrbq_z_u32): Likewise.
7374 (__arm_vldrbq_z_u16): Likewise.
7375 (__arm_vldrwq_gather_base_z_s32): Likewise.
7376 (__arm_vldrwq_gather_base_z_u32): Likewise.
7377 (vldrbq_gather_offset_z): Define polymorphic variant.
7378 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
7380 (LDRGBU_Z_QUALIFIERS): Likewise.
7381 (LDRGS_Z_QUALIFIERS): Likewise.
7382 (LDRGU_Z_QUALIFIERS): Likewise.
7383 (LDRS_Z_QUALIFIERS): Likewise.
7384 (LDRU_Z_QUALIFIERS): Likewise.
7385 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
7387 (mve_vldrbq_z_<supf><mode>): Likewise.
7388 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
7390 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7391 Mihail Ionescu <mihail.ionescu@arm.com>
7392 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7394 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
7396 (STRU_P_QUALIFIERS): Likewise.
7397 (STRSU_P_QUALIFIERS): Likewise.
7398 (STRSS_P_QUALIFIERS): Likewise.
7399 (STRSBS_P_QUALIFIERS): Likewise.
7400 (STRSBU_P_QUALIFIERS): Likewise.
7401 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
7402 (vstrbq_p_s32): Likewise.
7403 (vstrbq_p_s16): Likewise.
7404 (vstrbq_p_u8): Likewise.
7405 (vstrbq_p_u32): Likewise.
7406 (vstrbq_p_u16): Likewise.
7407 (vstrbq_scatter_offset_p_s8): Likewise.
7408 (vstrbq_scatter_offset_p_s32): Likewise.
7409 (vstrbq_scatter_offset_p_s16): Likewise.
7410 (vstrbq_scatter_offset_p_u8): Likewise.
7411 (vstrbq_scatter_offset_p_u32): Likewise.
7412 (vstrbq_scatter_offset_p_u16): Likewise.
7413 (vstrwq_scatter_base_p_s32): Likewise.
7414 (vstrwq_scatter_base_p_u32): Likewise.
7415 (__arm_vstrbq_p_s8): Define intrinsic.
7416 (__arm_vstrbq_p_s32): Likewise.
7417 (__arm_vstrbq_p_s16): Likewise.
7418 (__arm_vstrbq_p_u8): Likewise.
7419 (__arm_vstrbq_p_u32): Likewise.
7420 (__arm_vstrbq_p_u16): Likewise.
7421 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
7422 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
7423 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
7424 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
7425 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
7426 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
7427 (__arm_vstrwq_scatter_base_p_s32): Likewise.
7428 (__arm_vstrwq_scatter_base_p_u32): Likewise.
7429 (vstrbq_p): Define polymorphic variant.
7430 (vstrbq_scatter_offset_p): Likewise.
7431 (vstrwq_scatter_base_p): Likewise.
7432 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
7434 (STRU_P_QUALIFIERS): Likewise.
7435 (STRSU_P_QUALIFIERS): Likewise.
7436 (STRSS_P_QUALIFIERS): Likewise.
7437 (STRSBS_P_QUALIFIERS): Likewise.
7438 (STRSBU_P_QUALIFIERS): Likewise.
7439 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
7441 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
7442 (mve_vstrbq_p_<supf><mode>): Likewise.
7444 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7445 Mihail Ionescu <mihail.ionescu@arm.com>
7446 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7448 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
7450 (LDRGS_QUALIFIERS): Likewise.
7451 (LDRS_QUALIFIERS): Likewise.
7452 (LDRU_QUALIFIERS): Likewise.
7453 (LDRGBS_QUALIFIERS): Likewise.
7454 (LDRGBU_QUALIFIERS): Likewise.
7455 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
7456 (vldrbq_gather_offset_s8): Likewise.
7457 (vldrbq_s8): Likewise.
7458 (vldrbq_u8): Likewise.
7459 (vldrbq_gather_offset_u16): Likewise.
7460 (vldrbq_gather_offset_s16): Likewise.
7461 (vldrbq_s16): Likewise.
7462 (vldrbq_u16): Likewise.
7463 (vldrbq_gather_offset_u32): Likewise.
7464 (vldrbq_gather_offset_s32): Likewise.
7465 (vldrbq_s32): Likewise.
7466 (vldrbq_u32): Likewise.
7467 (vldrwq_gather_base_s32): Likewise.
7468 (vldrwq_gather_base_u32): Likewise.
7469 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
7470 (__arm_vldrbq_gather_offset_s8): Likewise.
7471 (__arm_vldrbq_s8): Likewise.
7472 (__arm_vldrbq_u8): Likewise.
7473 (__arm_vldrbq_gather_offset_u16): Likewise.
7474 (__arm_vldrbq_gather_offset_s16): Likewise.
7475 (__arm_vldrbq_s16): Likewise.
7476 (__arm_vldrbq_u16): Likewise.
7477 (__arm_vldrbq_gather_offset_u32): Likewise.
7478 (__arm_vldrbq_gather_offset_s32): Likewise.
7479 (__arm_vldrbq_s32): Likewise.
7480 (__arm_vldrbq_u32): Likewise.
7481 (__arm_vldrwq_gather_base_s32): Likewise.
7482 (__arm_vldrwq_gather_base_u32): Likewise.
7483 (vldrbq_gather_offset): Define polymorphic variant.
7484 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
7486 (LDRGS_QUALIFIERS): Likewise.
7487 (LDRS_QUALIFIERS): Likewise.
7488 (LDRU_QUALIFIERS): Likewise.
7489 (LDRGBS_QUALIFIERS): Likewise.
7490 (LDRGBU_QUALIFIERS): Likewise.
7491 * config/arm/mve.md (VLDRBGOQ): Define iterator.
7493 (VLDRWGBQ): Likewise.
7494 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
7495 (mve_vldrbq_<supf><mode>): Likewise.
7496 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
7498 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7499 Mihail Ionescu <mihail.ionescu@arm.com>
7500 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7502 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
7503 (STRU_QUALIFIERS): Likewise.
7504 (STRSS_QUALIFIERS): Likewise.
7505 (STRSU_QUALIFIERS): Likewise.
7506 (STRSBS_QUALIFIERS): Likewise.
7507 (STRSBU_QUALIFIERS): Likewise.
7508 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
7509 (vstrbq_u8): Likewise.
7510 (vstrbq_u16): Likewise.
7511 (vstrbq_scatter_offset_s8): Likewise.
7512 (vstrbq_scatter_offset_u8): Likewise.
7513 (vstrbq_scatter_offset_u16): Likewise.
7514 (vstrbq_s16): Likewise.
7515 (vstrbq_u32): Likewise.
7516 (vstrbq_scatter_offset_s16): Likewise.
7517 (vstrbq_scatter_offset_u32): Likewise.
7518 (vstrbq_s32): Likewise.
7519 (vstrbq_scatter_offset_s32): Likewise.
7520 (vstrwq_scatter_base_s32): Likewise.
7521 (vstrwq_scatter_base_u32): Likewise.
7522 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
7523 (__arm_vstrbq_scatter_offset_s32): Likewise.
7524 (__arm_vstrbq_scatter_offset_s16): Likewise.
7525 (__arm_vstrbq_scatter_offset_u8): Likewise.
7526 (__arm_vstrbq_scatter_offset_u32): Likewise.
7527 (__arm_vstrbq_scatter_offset_u16): Likewise.
7528 (__arm_vstrbq_s8): Likewise.
7529 (__arm_vstrbq_s32): Likewise.
7530 (__arm_vstrbq_s16): Likewise.
7531 (__arm_vstrbq_u8): Likewise.
7532 (__arm_vstrbq_u32): Likewise.
7533 (__arm_vstrbq_u16): Likewise.
7534 (__arm_vstrwq_scatter_base_s32): Likewise.
7535 (__arm_vstrwq_scatter_base_u32): Likewise.
7536 (vstrbq): Define polymorphic variant.
7537 (vstrbq_scatter_offset): Likewise.
7538 (vstrwq_scatter_base): Likewise.
7539 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
7541 (STRU_QUALIFIERS): Likewise.
7542 (STRSS_QUALIFIERS): Likewise.
7543 (STRSU_QUALIFIERS): Likewise.
7544 (STRSBS_QUALIFIERS): Likewise.
7545 (STRSBU_QUALIFIERS): Likewise.
7546 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
7547 (VSTRWSBQ): Define iterators.
7548 (VSTRBSOQ): Likewise.
7550 (mve_vstrbq_<supf><mode>): Define RTL pattern.
7551 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
7552 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
7554 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7555 Mihail Ionescu <mihail.ionescu@arm.com>
7556 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7558 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
7559 (vabdq_m_f16): Likewise.
7560 (vaddq_m_f32): Likewise.
7561 (vaddq_m_f16): Likewise.
7562 (vaddq_m_n_f32): Likewise.
7563 (vaddq_m_n_f16): Likewise.
7564 (vandq_m_f32): Likewise.
7565 (vandq_m_f16): Likewise.
7566 (vbicq_m_f32): Likewise.
7567 (vbicq_m_f16): Likewise.
7568 (vbrsrq_m_n_f32): Likewise.
7569 (vbrsrq_m_n_f16): Likewise.
7570 (vcaddq_rot270_m_f32): Likewise.
7571 (vcaddq_rot270_m_f16): Likewise.
7572 (vcaddq_rot90_m_f32): Likewise.
7573 (vcaddq_rot90_m_f16): Likewise.
7574 (vcmlaq_m_f32): Likewise.
7575 (vcmlaq_m_f16): Likewise.
7576 (vcmlaq_rot180_m_f32): Likewise.
7577 (vcmlaq_rot180_m_f16): Likewise.
7578 (vcmlaq_rot270_m_f32): Likewise.
7579 (vcmlaq_rot270_m_f16): Likewise.
7580 (vcmlaq_rot90_m_f32): Likewise.
7581 (vcmlaq_rot90_m_f16): Likewise.
7582 (vcmulq_m_f32): Likewise.
7583 (vcmulq_m_f16): Likewise.
7584 (vcmulq_rot180_m_f32): Likewise.
7585 (vcmulq_rot180_m_f16): Likewise.
7586 (vcmulq_rot270_m_f32): Likewise.
7587 (vcmulq_rot270_m_f16): Likewise.
7588 (vcmulq_rot90_m_f32): Likewise.
7589 (vcmulq_rot90_m_f16): Likewise.
7590 (vcvtq_m_n_s32_f32): Likewise.
7591 (vcvtq_m_n_s16_f16): Likewise.
7592 (vcvtq_m_n_u32_f32): Likewise.
7593 (vcvtq_m_n_u16_f16): Likewise.
7594 (veorq_m_f32): Likewise.
7595 (veorq_m_f16): Likewise.
7596 (vfmaq_m_f32): Likewise.
7597 (vfmaq_m_f16): Likewise.
7598 (vfmaq_m_n_f32): Likewise.
7599 (vfmaq_m_n_f16): Likewise.
7600 (vfmasq_m_n_f32): Likewise.
7601 (vfmasq_m_n_f16): Likewise.
7602 (vfmsq_m_f32): Likewise.
7603 (vfmsq_m_f16): Likewise.
7604 (vmaxnmq_m_f32): Likewise.
7605 (vmaxnmq_m_f16): Likewise.
7606 (vminnmq_m_f32): Likewise.
7607 (vminnmq_m_f16): Likewise.
7608 (vmulq_m_f32): Likewise.
7609 (vmulq_m_f16): Likewise.
7610 (vmulq_m_n_f32): Likewise.
7611 (vmulq_m_n_f16): Likewise.
7612 (vornq_m_f32): Likewise.
7613 (vornq_m_f16): Likewise.
7614 (vorrq_m_f32): Likewise.
7615 (vorrq_m_f16): Likewise.
7616 (vsubq_m_f32): Likewise.
7617 (vsubq_m_f16): Likewise.
7618 (vsubq_m_n_f32): Likewise.
7619 (vsubq_m_n_f16): Likewise.
7620 (__attribute__): Likewise.
7621 (__arm_vabdq_m_f32): Likewise.
7622 (__arm_vabdq_m_f16): Likewise.
7623 (__arm_vaddq_m_f32): Likewise.
7624 (__arm_vaddq_m_f16): Likewise.
7625 (__arm_vaddq_m_n_f32): Likewise.
7626 (__arm_vaddq_m_n_f16): Likewise.
7627 (__arm_vandq_m_f32): Likewise.
7628 (__arm_vandq_m_f16): Likewise.
7629 (__arm_vbicq_m_f32): Likewise.
7630 (__arm_vbicq_m_f16): Likewise.
7631 (__arm_vbrsrq_m_n_f32): Likewise.
7632 (__arm_vbrsrq_m_n_f16): Likewise.
7633 (__arm_vcaddq_rot270_m_f32): Likewise.
7634 (__arm_vcaddq_rot270_m_f16): Likewise.
7635 (__arm_vcaddq_rot90_m_f32): Likewise.
7636 (__arm_vcaddq_rot90_m_f16): Likewise.
7637 (__arm_vcmlaq_m_f32): Likewise.
7638 (__arm_vcmlaq_m_f16): Likewise.
7639 (__arm_vcmlaq_rot180_m_f32): Likewise.
7640 (__arm_vcmlaq_rot180_m_f16): Likewise.
7641 (__arm_vcmlaq_rot270_m_f32): Likewise.
7642 (__arm_vcmlaq_rot270_m_f16): Likewise.
7643 (__arm_vcmlaq_rot90_m_f32): Likewise.
7644 (__arm_vcmlaq_rot90_m_f16): Likewise.
7645 (__arm_vcmulq_m_f32): Likewise.
7646 (__arm_vcmulq_m_f16): Likewise.
7647 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
7648 (__arm_vcmulq_rot180_m_f16): Likewise.
7649 (__arm_vcmulq_rot270_m_f32): Likewise.
7650 (__arm_vcmulq_rot270_m_f16): Likewise.
7651 (__arm_vcmulq_rot90_m_f32): Likewise.
7652 (__arm_vcmulq_rot90_m_f16): Likewise.
7653 (__arm_vcvtq_m_n_s32_f32): Likewise.
7654 (__arm_vcvtq_m_n_s16_f16): Likewise.
7655 (__arm_vcvtq_m_n_u32_f32): Likewise.
7656 (__arm_vcvtq_m_n_u16_f16): Likewise.
7657 (__arm_veorq_m_f32): Likewise.
7658 (__arm_veorq_m_f16): Likewise.
7659 (__arm_vfmaq_m_f32): Likewise.
7660 (__arm_vfmaq_m_f16): Likewise.
7661 (__arm_vfmaq_m_n_f32): Likewise.
7662 (__arm_vfmaq_m_n_f16): Likewise.
7663 (__arm_vfmasq_m_n_f32): Likewise.
7664 (__arm_vfmasq_m_n_f16): Likewise.
7665 (__arm_vfmsq_m_f32): Likewise.
7666 (__arm_vfmsq_m_f16): Likewise.
7667 (__arm_vmaxnmq_m_f32): Likewise.
7668 (__arm_vmaxnmq_m_f16): Likewise.
7669 (__arm_vminnmq_m_f32): Likewise.
7670 (__arm_vminnmq_m_f16): Likewise.
7671 (__arm_vmulq_m_f32): Likewise.
7672 (__arm_vmulq_m_f16): Likewise.
7673 (__arm_vmulq_m_n_f32): Likewise.
7674 (__arm_vmulq_m_n_f16): Likewise.
7675 (__arm_vornq_m_f32): Likewise.
7676 (__arm_vornq_m_f16): Likewise.
7677 (__arm_vorrq_m_f32): Likewise.
7678 (__arm_vorrq_m_f16): Likewise.
7679 (__arm_vsubq_m_f32): Likewise.
7680 (__arm_vsubq_m_f16): Likewise.
7681 (__arm_vsubq_m_n_f32): Likewise.
7682 (__arm_vsubq_m_n_f16): Likewise.
7683 (vabdq_m): Define polymorphic variant.
7684 (vaddq_m): Likewise.
7685 (vaddq_m_n): Likewise.
7686 (vandq_m): Likewise.
7687 (vbicq_m): Likewise.
7688 (vbrsrq_m_n): Likewise.
7689 (vcaddq_rot270_m): Likewise.
7690 (vcaddq_rot90_m): Likewise.
7691 (vcmlaq_m): Likewise.
7692 (vcmlaq_rot180_m): Likewise.
7693 (vcmlaq_rot270_m): Likewise.
7694 (vcmlaq_rot90_m): Likewise.
7695 (vcmulq_m): Likewise.
7696 (vcmulq_rot180_m): Likewise.
7697 (vcmulq_rot270_m): Likewise.
7698 (vcmulq_rot90_m): Likewise.
7699 (veorq_m): Likewise.
7700 (vfmaq_m): Likewise.
7701 (vfmaq_m_n): Likewise.
7702 (vfmasq_m_n): Likewise.
7703 (vfmsq_m): Likewise.
7704 (vmaxnmq_m): Likewise.
7705 (vminnmq_m): Likewise.
7706 (vmulq_m): Likewise.
7707 (vmulq_m_n): Likewise.
7708 (vornq_m): Likewise.
7709 (vsubq_m): Likewise.
7710 (vsubq_m_n): Likewise.
7711 (vorrq_m): Likewise.
7712 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7714 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7715 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7716 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
7717 (mve_vaddq_m_f<mode>): Likewise.
7718 (mve_vaddq_m_n_f<mode>): Likewise.
7719 (mve_vandq_m_f<mode>): Likewise.
7720 (mve_vbicq_m_f<mode>): Likewise.
7721 (mve_vbrsrq_m_n_f<mode>): Likewise.
7722 (mve_vcaddq_rot270_m_f<mode>): Likewise.
7723 (mve_vcaddq_rot90_m_f<mode>): Likewise.
7724 (mve_vcmlaq_m_f<mode>): Likewise.
7725 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
7726 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
7727 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
7728 (mve_vcmulq_m_f<mode>): Likewise.
7729 (mve_vcmulq_rot180_m_f<mode>): Likewise.
7730 (mve_vcmulq_rot270_m_f<mode>): Likewise.
7731 (mve_vcmulq_rot90_m_f<mode>): Likewise.
7732 (mve_veorq_m_f<mode>): Likewise.
7733 (mve_vfmaq_m_f<mode>): Likewise.
7734 (mve_vfmaq_m_n_f<mode>): Likewise.
7735 (mve_vfmasq_m_n_f<mode>): Likewise.
7736 (mve_vfmsq_m_f<mode>): Likewise.
7737 (mve_vmaxnmq_m_f<mode>): Likewise.
7738 (mve_vminnmq_m_f<mode>): Likewise.
7739 (mve_vmulq_m_f<mode>): Likewise.
7740 (mve_vmulq_m_n_f<mode>): Likewise.
7741 (mve_vornq_m_f<mode>): Likewise.
7742 (mve_vorrq_m_f<mode>): Likewise.
7743 (mve_vsubq_m_f<mode>): Likewise.
7744 (mve_vsubq_m_n_f<mode>): Likewise.
7746 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7747 Mihail Ionescu <mihail.ionescu@arm.com>
7748 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7750 * config/arm/arm-protos.h (arm_mve_immediate_check):
7751 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
7752 mode and interger value.
7753 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
7754 (vmlaldavaq_p_s16): Likewise.
7755 (vmlaldavaq_p_u32): Likewise.
7756 (vmlaldavaq_p_u16): Likewise.
7757 (vmlaldavaxq_p_s32): Likewise.
7758 (vmlaldavaxq_p_s16): Likewise.
7759 (vmlaldavaxq_p_u32): Likewise.
7760 (vmlaldavaxq_p_u16): Likewise.
7761 (vmlsldavaq_p_s32): Likewise.
7762 (vmlsldavaq_p_s16): Likewise.
7763 (vmlsldavaxq_p_s32): Likewise.
7764 (vmlsldavaxq_p_s16): Likewise.
7765 (vmullbq_poly_m_p8): Likewise.
7766 (vmullbq_poly_m_p16): Likewise.
7767 (vmulltq_poly_m_p8): Likewise.
7768 (vmulltq_poly_m_p16): Likewise.
7769 (vqdmullbq_m_n_s32): Likewise.
7770 (vqdmullbq_m_n_s16): Likewise.
7771 (vqdmullbq_m_s32): Likewise.
7772 (vqdmullbq_m_s16): Likewise.
7773 (vqdmulltq_m_n_s32): Likewise.
7774 (vqdmulltq_m_n_s16): Likewise.
7775 (vqdmulltq_m_s32): Likewise.
7776 (vqdmulltq_m_s16): Likewise.
7777 (vqrshrnbq_m_n_s32): Likewise.
7778 (vqrshrnbq_m_n_s16): Likewise.
7779 (vqrshrnbq_m_n_u32): Likewise.
7780 (vqrshrnbq_m_n_u16): Likewise.
7781 (vqrshrntq_m_n_s32): Likewise.
7782 (vqrshrntq_m_n_s16): Likewise.
7783 (vqrshrntq_m_n_u32): Likewise.
7784 (vqrshrntq_m_n_u16): Likewise.
7785 (vqrshrunbq_m_n_s32): Likewise.
7786 (vqrshrunbq_m_n_s16): Likewise.
7787 (vqrshruntq_m_n_s32): Likewise.
7788 (vqrshruntq_m_n_s16): Likewise.
7789 (vqshrnbq_m_n_s32): Likewise.
7790 (vqshrnbq_m_n_s16): Likewise.
7791 (vqshrnbq_m_n_u32): Likewise.
7792 (vqshrnbq_m_n_u16): Likewise.
7793 (vqshrntq_m_n_s32): Likewise.
7794 (vqshrntq_m_n_s16): Likewise.
7795 (vqshrntq_m_n_u32): Likewise.
7796 (vqshrntq_m_n_u16): Likewise.
7797 (vqshrunbq_m_n_s32): Likewise.
7798 (vqshrunbq_m_n_s16): Likewise.
7799 (vqshruntq_m_n_s32): Likewise.
7800 (vqshruntq_m_n_s16): Likewise.
7801 (vrmlaldavhaq_p_s32): Likewise.
7802 (vrmlaldavhaq_p_u32): Likewise.
7803 (vrmlaldavhaxq_p_s32): Likewise.
7804 (vrmlsldavhaq_p_s32): Likewise.
7805 (vrmlsldavhaxq_p_s32): Likewise.
7806 (vrshrnbq_m_n_s32): Likewise.
7807 (vrshrnbq_m_n_s16): Likewise.
7808 (vrshrnbq_m_n_u32): Likewise.
7809 (vrshrnbq_m_n_u16): Likewise.
7810 (vrshrntq_m_n_s32): Likewise.
7811 (vrshrntq_m_n_s16): Likewise.
7812 (vrshrntq_m_n_u32): Likewise.
7813 (vrshrntq_m_n_u16): Likewise.
7814 (vshllbq_m_n_s8): Likewise.
7815 (vshllbq_m_n_s16): Likewise.
7816 (vshllbq_m_n_u8): Likewise.
7817 (vshllbq_m_n_u16): Likewise.
7818 (vshlltq_m_n_s8): Likewise.
7819 (vshlltq_m_n_s16): Likewise.
7820 (vshlltq_m_n_u8): Likewise.
7821 (vshlltq_m_n_u16): Likewise.
7822 (vshrnbq_m_n_s32): Likewise.
7823 (vshrnbq_m_n_s16): Likewise.
7824 (vshrnbq_m_n_u32): Likewise.
7825 (vshrnbq_m_n_u16): Likewise.
7826 (vshrntq_m_n_s32): Likewise.
7827 (vshrntq_m_n_s16): Likewise.
7828 (vshrntq_m_n_u32): Likewise.
7829 (vshrntq_m_n_u16): Likewise.
7830 (__arm_vmlaldavaq_p_s32): Define intrinsic.
7831 (__arm_vmlaldavaq_p_s16): Likewise.
7832 (__arm_vmlaldavaq_p_u32): Likewise.
7833 (__arm_vmlaldavaq_p_u16): Likewise.
7834 (__arm_vmlaldavaxq_p_s32): Likewise.
7835 (__arm_vmlaldavaxq_p_s16): Likewise.
7836 (__arm_vmlaldavaxq_p_u32): Likewise.
7837 (__arm_vmlaldavaxq_p_u16): Likewise.
7838 (__arm_vmlsldavaq_p_s32): Likewise.
7839 (__arm_vmlsldavaq_p_s16): Likewise.
7840 (__arm_vmlsldavaxq_p_s32): Likewise.
7841 (__arm_vmlsldavaxq_p_s16): Likewise.
7842 (__arm_vmullbq_poly_m_p8): Likewise.
7843 (__arm_vmullbq_poly_m_p16): Likewise.
7844 (__arm_vmulltq_poly_m_p8): Likewise.
7845 (__arm_vmulltq_poly_m_p16): Likewise.
7846 (__arm_vqdmullbq_m_n_s32): Likewise.
7847 (__arm_vqdmullbq_m_n_s16): Likewise.
7848 (__arm_vqdmullbq_m_s32): Likewise.
7849 (__arm_vqdmullbq_m_s16): Likewise.
7850 (__arm_vqdmulltq_m_n_s32): Likewise.
7851 (__arm_vqdmulltq_m_n_s16): Likewise.
7852 (__arm_vqdmulltq_m_s32): Likewise.
7853 (__arm_vqdmulltq_m_s16): Likewise.
7854 (__arm_vqrshrnbq_m_n_s32): Likewise.
7855 (__arm_vqrshrnbq_m_n_s16): Likewise.
7856 (__arm_vqrshrnbq_m_n_u32): Likewise.
7857 (__arm_vqrshrnbq_m_n_u16): Likewise.
7858 (__arm_vqrshrntq_m_n_s32): Likewise.
7859 (__arm_vqrshrntq_m_n_s16): Likewise.
7860 (__arm_vqrshrntq_m_n_u32): Likewise.
7861 (__arm_vqrshrntq_m_n_u16): Likewise.
7862 (__arm_vqrshrunbq_m_n_s32): Likewise.
7863 (__arm_vqrshrunbq_m_n_s16): Likewise.
7864 (__arm_vqrshruntq_m_n_s32): Likewise.
7865 (__arm_vqrshruntq_m_n_s16): Likewise.
7866 (__arm_vqshrnbq_m_n_s32): Likewise.
7867 (__arm_vqshrnbq_m_n_s16): Likewise.
7868 (__arm_vqshrnbq_m_n_u32): Likewise.
7869 (__arm_vqshrnbq_m_n_u16): Likewise.
7870 (__arm_vqshrntq_m_n_s32): Likewise.
7871 (__arm_vqshrntq_m_n_s16): Likewise.
7872 (__arm_vqshrntq_m_n_u32): Likewise.
7873 (__arm_vqshrntq_m_n_u16): Likewise.
7874 (__arm_vqshrunbq_m_n_s32): Likewise.
7875 (__arm_vqshrunbq_m_n_s16): Likewise.
7876 (__arm_vqshruntq_m_n_s32): Likewise.
7877 (__arm_vqshruntq_m_n_s16): Likewise.
7878 (__arm_vrmlaldavhaq_p_s32): Likewise.
7879 (__arm_vrmlaldavhaq_p_u32): Likewise.
7880 (__arm_vrmlaldavhaxq_p_s32): Likewise.
7881 (__arm_vrmlsldavhaq_p_s32): Likewise.
7882 (__arm_vrmlsldavhaxq_p_s32): Likewise.
7883 (__arm_vrshrnbq_m_n_s32): Likewise.
7884 (__arm_vrshrnbq_m_n_s16): Likewise.
7885 (__arm_vrshrnbq_m_n_u32): Likewise.
7886 (__arm_vrshrnbq_m_n_u16): Likewise.
7887 (__arm_vrshrntq_m_n_s32): Likewise.
7888 (__arm_vrshrntq_m_n_s16): Likewise.
7889 (__arm_vrshrntq_m_n_u32): Likewise.
7890 (__arm_vrshrntq_m_n_u16): Likewise.
7891 (__arm_vshllbq_m_n_s8): Likewise.
7892 (__arm_vshllbq_m_n_s16): Likewise.
7893 (__arm_vshllbq_m_n_u8): Likewise.
7894 (__arm_vshllbq_m_n_u16): Likewise.
7895 (__arm_vshlltq_m_n_s8): Likewise.
7896 (__arm_vshlltq_m_n_s16): Likewise.
7897 (__arm_vshlltq_m_n_u8): Likewise.
7898 (__arm_vshlltq_m_n_u16): Likewise.
7899 (__arm_vshrnbq_m_n_s32): Likewise.
7900 (__arm_vshrnbq_m_n_s16): Likewise.
7901 (__arm_vshrnbq_m_n_u32): Likewise.
7902 (__arm_vshrnbq_m_n_u16): Likewise.
7903 (__arm_vshrntq_m_n_s32): Likewise.
7904 (__arm_vshrntq_m_n_s16): Likewise.
7905 (__arm_vshrntq_m_n_u32): Likewise.
7906 (__arm_vshrntq_m_n_u16): Likewise.
7907 (vmullbq_poly_m): Define polymorphic variant.
7908 (vmulltq_poly_m): Likewise.
7909 (vshllbq_m): Likewise.
7910 (vshrntq_m_n): Likewise.
7911 (vshrnbq_m_n): Likewise.
7912 (vshlltq_m_n): Likewise.
7913 (vshllbq_m_n): Likewise.
7914 (vrshrntq_m_n): Likewise.
7915 (vrshrnbq_m_n): Likewise.
7916 (vqshruntq_m_n): Likewise.
7917 (vqshrunbq_m_n): Likewise.
7918 (vqdmullbq_m_n): Likewise.
7919 (vqdmullbq_m): Likewise.
7920 (vqdmulltq_m_n): Likewise.
7921 (vqdmulltq_m): Likewise.
7922 (vqrshrnbq_m_n): Likewise.
7923 (vqrshrntq_m_n): Likewise.
7924 (vqrshrunbq_m_n): Likewise.
7925 (vqrshruntq_m_n): Likewise.
7926 (vqshrnbq_m_n): Likewise.
7927 (vqshrntq_m_n): Likewise.
7928 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7930 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7931 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7932 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
7933 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7934 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
7935 (VMLALDAVAXQ_P): Likewise.
7936 (VQRSHRNBQ_M_N): Likewise.
7937 (VQRSHRNTQ_M_N): Likewise.
7938 (VQSHRNBQ_M_N): Likewise.
7939 (VQSHRNTQ_M_N): Likewise.
7940 (VRSHRNBQ_M_N): Likewise.
7941 (VRSHRNTQ_M_N): Likewise.
7942 (VSHLLBQ_M_N): Likewise.
7943 (VSHLLTQ_M_N): Likewise.
7944 (VSHRNBQ_M_N): Likewise.
7945 (VSHRNTQ_M_N): Likewise.
7946 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
7947 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
7948 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
7949 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
7950 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
7951 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
7952 (mve_vrmlaldavhaq_p_sv4si): Likewise.
7953 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
7954 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
7955 (mve_vshllbq_m_n_<supf><mode>): Likewise.
7956 (mve_vshlltq_m_n_<supf><mode>): Likewise.
7957 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
7958 (mve_vshrntq_m_n_<supf><mode>): Likewise.
7959 (mve_vmlsldavaq_p_s<mode>): Likewise.
7960 (mve_vmlsldavaxq_p_s<mode>): Likewise.
7961 (mve_vmullbq_poly_m_p<mode>): Likewise.
7962 (mve_vmulltq_poly_m_p<mode>): Likewise.
7963 (mve_vqdmullbq_m_n_s<mode>): Likewise.
7964 (mve_vqdmullbq_m_s<mode>): Likewise.
7965 (mve_vqdmulltq_m_n_s<mode>): Likewise.
7966 (mve_vqdmulltq_m_s<mode>): Likewise.
7967 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
7968 (mve_vqrshruntq_m_n_s<mode>): Likewise.
7969 (mve_vqshrunbq_m_n_s<mode>): Likewise.
7970 (mve_vqshruntq_m_n_s<mode>): Likewise.
7971 (mve_vrmlaldavhaq_p_uv4si): Likewise.
7972 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
7973 (mve_vrmlsldavhaq_p_sv4si): Likewise.
7974 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
7976 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7977 Mihail Ionescu <mihail.ionescu@arm.com>
7978 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7980 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
7981 (vabdq_m_s32): Likewise.
7982 (vabdq_m_s16): Likewise.
7983 (vabdq_m_u8): Likewise.
7984 (vabdq_m_u32): Likewise.
7985 (vabdq_m_u16): Likewise.
7986 (vaddq_m_n_s8): Likewise.
7987 (vaddq_m_n_s32): Likewise.
7988 (vaddq_m_n_s16): Likewise.
7989 (vaddq_m_n_u8): Likewise.
7990 (vaddq_m_n_u32): Likewise.
7991 (vaddq_m_n_u16): Likewise.
7992 (vaddq_m_s8): Likewise.
7993 (vaddq_m_s32): Likewise.
7994 (vaddq_m_s16): Likewise.
7995 (vaddq_m_u8): Likewise.
7996 (vaddq_m_u32): Likewise.
7997 (vaddq_m_u16): Likewise.
7998 (vandq_m_s8): Likewise.
7999 (vandq_m_s32): Likewise.
8000 (vandq_m_s16): Likewise.
8001 (vandq_m_u8): Likewise.
8002 (vandq_m_u32): Likewise.
8003 (vandq_m_u16): Likewise.
8004 (vbicq_m_s8): Likewise.
8005 (vbicq_m_s32): Likewise.
8006 (vbicq_m_s16): Likewise.
8007 (vbicq_m_u8): Likewise.
8008 (vbicq_m_u32): Likewise.
8009 (vbicq_m_u16): Likewise.
8010 (vbrsrq_m_n_s8): Likewise.
8011 (vbrsrq_m_n_s32): Likewise.
8012 (vbrsrq_m_n_s16): Likewise.
8013 (vbrsrq_m_n_u8): Likewise.
8014 (vbrsrq_m_n_u32): Likewise.
8015 (vbrsrq_m_n_u16): Likewise.
8016 (vcaddq_rot270_m_s8): Likewise.
8017 (vcaddq_rot270_m_s32): Likewise.
8018 (vcaddq_rot270_m_s16): Likewise.
8019 (vcaddq_rot270_m_u8): Likewise.
8020 (vcaddq_rot270_m_u32): Likewise.
8021 (vcaddq_rot270_m_u16): Likewise.
8022 (vcaddq_rot90_m_s8): Likewise.
8023 (vcaddq_rot90_m_s32): Likewise.
8024 (vcaddq_rot90_m_s16): Likewise.
8025 (vcaddq_rot90_m_u8): Likewise.
8026 (vcaddq_rot90_m_u32): Likewise.
8027 (vcaddq_rot90_m_u16): Likewise.
8028 (veorq_m_s8): Likewise.
8029 (veorq_m_s32): Likewise.
8030 (veorq_m_s16): Likewise.
8031 (veorq_m_u8): Likewise.
8032 (veorq_m_u32): Likewise.
8033 (veorq_m_u16): Likewise.
8034 (vhaddq_m_n_s8): Likewise.
8035 (vhaddq_m_n_s32): Likewise.
8036 (vhaddq_m_n_s16): Likewise.
8037 (vhaddq_m_n_u8): Likewise.
8038 (vhaddq_m_n_u32): Likewise.
8039 (vhaddq_m_n_u16): Likewise.
8040 (vhaddq_m_s8): Likewise.
8041 (vhaddq_m_s32): Likewise.
8042 (vhaddq_m_s16): Likewise.
8043 (vhaddq_m_u8): Likewise.
8044 (vhaddq_m_u32): Likewise.
8045 (vhaddq_m_u16): Likewise.
8046 (vhcaddq_rot270_m_s8): Likewise.
8047 (vhcaddq_rot270_m_s32): Likewise.
8048 (vhcaddq_rot270_m_s16): Likewise.
8049 (vhcaddq_rot90_m_s8): Likewise.
8050 (vhcaddq_rot90_m_s32): Likewise.
8051 (vhcaddq_rot90_m_s16): Likewise.
8052 (vhsubq_m_n_s8): Likewise.
8053 (vhsubq_m_n_s32): Likewise.
8054 (vhsubq_m_n_s16): Likewise.
8055 (vhsubq_m_n_u8): Likewise.
8056 (vhsubq_m_n_u32): Likewise.
8057 (vhsubq_m_n_u16): Likewise.
8058 (vhsubq_m_s8): Likewise.
8059 (vhsubq_m_s32): Likewise.
8060 (vhsubq_m_s16): Likewise.
8061 (vhsubq_m_u8): Likewise.
8062 (vhsubq_m_u32): Likewise.
8063 (vhsubq_m_u16): Likewise.
8064 (vmaxq_m_s8): Likewise.
8065 (vmaxq_m_s32): Likewise.
8066 (vmaxq_m_s16): Likewise.
8067 (vmaxq_m_u8): Likewise.
8068 (vmaxq_m_u32): Likewise.
8069 (vmaxq_m_u16): Likewise.
8070 (vminq_m_s8): Likewise.
8071 (vminq_m_s32): Likewise.
8072 (vminq_m_s16): Likewise.
8073 (vminq_m_u8): Likewise.
8074 (vminq_m_u32): Likewise.
8075 (vminq_m_u16): Likewise.
8076 (vmladavaq_p_s8): Likewise.
8077 (vmladavaq_p_s32): Likewise.
8078 (vmladavaq_p_s16): Likewise.
8079 (vmladavaq_p_u8): Likewise.
8080 (vmladavaq_p_u32): Likewise.
8081 (vmladavaq_p_u16): Likewise.
8082 (vmladavaxq_p_s8): Likewise.
8083 (vmladavaxq_p_s32): Likewise.
8084 (vmladavaxq_p_s16): Likewise.
8085 (vmlaq_m_n_s8): Likewise.
8086 (vmlaq_m_n_s32): Likewise.
8087 (vmlaq_m_n_s16): Likewise.
8088 (vmlaq_m_n_u8): Likewise.
8089 (vmlaq_m_n_u32): Likewise.
8090 (vmlaq_m_n_u16): Likewise.
8091 (vmlasq_m_n_s8): Likewise.
8092 (vmlasq_m_n_s32): Likewise.
8093 (vmlasq_m_n_s16): Likewise.
8094 (vmlasq_m_n_u8): Likewise.
8095 (vmlasq_m_n_u32): Likewise.
8096 (vmlasq_m_n_u16): Likewise.
8097 (vmlsdavaq_p_s8): Likewise.
8098 (vmlsdavaq_p_s32): Likewise.
8099 (vmlsdavaq_p_s16): Likewise.
8100 (vmlsdavaxq_p_s8): Likewise.
8101 (vmlsdavaxq_p_s32): Likewise.
8102 (vmlsdavaxq_p_s16): Likewise.
8103 (vmulhq_m_s8): Likewise.
8104 (vmulhq_m_s32): Likewise.
8105 (vmulhq_m_s16): Likewise.
8106 (vmulhq_m_u8): Likewise.
8107 (vmulhq_m_u32): Likewise.
8108 (vmulhq_m_u16): Likewise.
8109 (vmullbq_int_m_s8): Likewise.
8110 (vmullbq_int_m_s32): Likewise.
8111 (vmullbq_int_m_s16): Likewise.
8112 (vmullbq_int_m_u8): Likewise.
8113 (vmullbq_int_m_u32): Likewise.
8114 (vmullbq_int_m_u16): Likewise.
8115 (vmulltq_int_m_s8): Likewise.
8116 (vmulltq_int_m_s32): Likewise.
8117 (vmulltq_int_m_s16): Likewise.
8118 (vmulltq_int_m_u8): Likewise.
8119 (vmulltq_int_m_u32): Likewise.
8120 (vmulltq_int_m_u16): Likewise.
8121 (vmulq_m_n_s8): Likewise.
8122 (vmulq_m_n_s32): Likewise.
8123 (vmulq_m_n_s16): Likewise.
8124 (vmulq_m_n_u8): Likewise.
8125 (vmulq_m_n_u32): Likewise.
8126 (vmulq_m_n_u16): Likewise.
8127 (vmulq_m_s8): Likewise.
8128 (vmulq_m_s32): Likewise.
8129 (vmulq_m_s16): Likewise.
8130 (vmulq_m_u8): Likewise.
8131 (vmulq_m_u32): Likewise.
8132 (vmulq_m_u16): Likewise.
8133 (vornq_m_s8): Likewise.
8134 (vornq_m_s32): Likewise.
8135 (vornq_m_s16): Likewise.
8136 (vornq_m_u8): Likewise.
8137 (vornq_m_u32): Likewise.
8138 (vornq_m_u16): Likewise.
8139 (vorrq_m_s8): Likewise.
8140 (vorrq_m_s32): Likewise.
8141 (vorrq_m_s16): Likewise.
8142 (vorrq_m_u8): Likewise.
8143 (vorrq_m_u32): Likewise.
8144 (vorrq_m_u16): Likewise.
8145 (vqaddq_m_n_s8): Likewise.
8146 (vqaddq_m_n_s32): Likewise.
8147 (vqaddq_m_n_s16): Likewise.
8148 (vqaddq_m_n_u8): Likewise.
8149 (vqaddq_m_n_u32): Likewise.
8150 (vqaddq_m_n_u16): Likewise.
8151 (vqaddq_m_s8): Likewise.
8152 (vqaddq_m_s32): Likewise.
8153 (vqaddq_m_s16): Likewise.
8154 (vqaddq_m_u8): Likewise.
8155 (vqaddq_m_u32): Likewise.
8156 (vqaddq_m_u16): Likewise.
8157 (vqdmladhq_m_s8): Likewise.
8158 (vqdmladhq_m_s32): Likewise.
8159 (vqdmladhq_m_s16): Likewise.
8160 (vqdmladhxq_m_s8): Likewise.
8161 (vqdmladhxq_m_s32): Likewise.
8162 (vqdmladhxq_m_s16): Likewise.
8163 (vqdmlahq_m_n_s8): Likewise.
8164 (vqdmlahq_m_n_s32): Likewise.
8165 (vqdmlahq_m_n_s16): Likewise.
8166 (vqdmlahq_m_n_u8): Likewise.
8167 (vqdmlahq_m_n_u32): Likewise.
8168 (vqdmlahq_m_n_u16): Likewise.
8169 (vqdmlsdhq_m_s8): Likewise.
8170 (vqdmlsdhq_m_s32): Likewise.
8171 (vqdmlsdhq_m_s16): Likewise.
8172 (vqdmlsdhxq_m_s8): Likewise.
8173 (vqdmlsdhxq_m_s32): Likewise.
8174 (vqdmlsdhxq_m_s16): Likewise.
8175 (vqdmulhq_m_n_s8): Likewise.
8176 (vqdmulhq_m_n_s32): Likewise.
8177 (vqdmulhq_m_n_s16): Likewise.
8178 (vqdmulhq_m_s8): Likewise.
8179 (vqdmulhq_m_s32): Likewise.
8180 (vqdmulhq_m_s16): Likewise.
8181 (vqrdmladhq_m_s8): Likewise.
8182 (vqrdmladhq_m_s32): Likewise.
8183 (vqrdmladhq_m_s16): Likewise.
8184 (vqrdmladhxq_m_s8): Likewise.
8185 (vqrdmladhxq_m_s32): Likewise.
8186 (vqrdmladhxq_m_s16): Likewise.
8187 (vqrdmlahq_m_n_s8): Likewise.
8188 (vqrdmlahq_m_n_s32): Likewise.
8189 (vqrdmlahq_m_n_s16): Likewise.
8190 (vqrdmlahq_m_n_u8): Likewise.
8191 (vqrdmlahq_m_n_u32): Likewise.
8192 (vqrdmlahq_m_n_u16): Likewise.
8193 (vqrdmlashq_m_n_s8): Likewise.
8194 (vqrdmlashq_m_n_s32): Likewise.
8195 (vqrdmlashq_m_n_s16): Likewise.
8196 (vqrdmlashq_m_n_u8): Likewise.
8197 (vqrdmlashq_m_n_u32): Likewise.
8198 (vqrdmlashq_m_n_u16): Likewise.
8199 (vqrdmlsdhq_m_s8): Likewise.
8200 (vqrdmlsdhq_m_s32): Likewise.
8201 (vqrdmlsdhq_m_s16): Likewise.
8202 (vqrdmlsdhxq_m_s8): Likewise.
8203 (vqrdmlsdhxq_m_s32): Likewise.
8204 (vqrdmlsdhxq_m_s16): Likewise.
8205 (vqrdmulhq_m_n_s8): Likewise.
8206 (vqrdmulhq_m_n_s32): Likewise.
8207 (vqrdmulhq_m_n_s16): Likewise.
8208 (vqrdmulhq_m_s8): Likewise.
8209 (vqrdmulhq_m_s32): Likewise.
8210 (vqrdmulhq_m_s16): Likewise.
8211 (vqrshlq_m_s8): Likewise.
8212 (vqrshlq_m_s32): Likewise.
8213 (vqrshlq_m_s16): Likewise.
8214 (vqrshlq_m_u8): Likewise.
8215 (vqrshlq_m_u32): Likewise.
8216 (vqrshlq_m_u16): Likewise.
8217 (vqshlq_m_n_s8): Likewise.
8218 (vqshlq_m_n_s32): Likewise.
8219 (vqshlq_m_n_s16): Likewise.
8220 (vqshlq_m_n_u8): Likewise.
8221 (vqshlq_m_n_u32): Likewise.
8222 (vqshlq_m_n_u16): Likewise.
8223 (vqshlq_m_s8): Likewise.
8224 (vqshlq_m_s32): Likewise.
8225 (vqshlq_m_s16): Likewise.
8226 (vqshlq_m_u8): Likewise.
8227 (vqshlq_m_u32): Likewise.
8228 (vqshlq_m_u16): Likewise.
8229 (vqsubq_m_n_s8): Likewise.
8230 (vqsubq_m_n_s32): Likewise.
8231 (vqsubq_m_n_s16): Likewise.
8232 (vqsubq_m_n_u8): Likewise.
8233 (vqsubq_m_n_u32): Likewise.
8234 (vqsubq_m_n_u16): Likewise.
8235 (vqsubq_m_s8): Likewise.
8236 (vqsubq_m_s32): Likewise.
8237 (vqsubq_m_s16): Likewise.
8238 (vqsubq_m_u8): Likewise.
8239 (vqsubq_m_u32): Likewise.
8240 (vqsubq_m_u16): Likewise.
8241 (vrhaddq_m_s8): Likewise.
8242 (vrhaddq_m_s32): Likewise.
8243 (vrhaddq_m_s16): Likewise.
8244 (vrhaddq_m_u8): Likewise.
8245 (vrhaddq_m_u32): Likewise.
8246 (vrhaddq_m_u16): Likewise.
8247 (vrmulhq_m_s8): Likewise.
8248 (vrmulhq_m_s32): Likewise.
8249 (vrmulhq_m_s16): Likewise.
8250 (vrmulhq_m_u8): Likewise.
8251 (vrmulhq_m_u32): Likewise.
8252 (vrmulhq_m_u16): Likewise.
8253 (vrshlq_m_s8): Likewise.
8254 (vrshlq_m_s32): Likewise.
8255 (vrshlq_m_s16): Likewise.
8256 (vrshlq_m_u8): Likewise.
8257 (vrshlq_m_u32): Likewise.
8258 (vrshlq_m_u16): Likewise.
8259 (vrshrq_m_n_s8): Likewise.
8260 (vrshrq_m_n_s32): Likewise.
8261 (vrshrq_m_n_s16): Likewise.
8262 (vrshrq_m_n_u8): Likewise.
8263 (vrshrq_m_n_u32): Likewise.
8264 (vrshrq_m_n_u16): Likewise.
8265 (vshlq_m_n_s8): Likewise.
8266 (vshlq_m_n_s32): Likewise.
8267 (vshlq_m_n_s16): Likewise.
8268 (vshlq_m_n_u8): Likewise.
8269 (vshlq_m_n_u32): Likewise.
8270 (vshlq_m_n_u16): Likewise.
8271 (vshrq_m_n_s8): Likewise.
8272 (vshrq_m_n_s32): Likewise.
8273 (vshrq_m_n_s16): Likewise.
8274 (vshrq_m_n_u8): Likewise.
8275 (vshrq_m_n_u32): Likewise.
8276 (vshrq_m_n_u16): Likewise.
8277 (vsliq_m_n_s8): Likewise.
8278 (vsliq_m_n_s32): Likewise.
8279 (vsliq_m_n_s16): Likewise.
8280 (vsliq_m_n_u8): Likewise.
8281 (vsliq_m_n_u32): Likewise.
8282 (vsliq_m_n_u16): Likewise.
8283 (vsubq_m_n_s8): Likewise.
8284 (vsubq_m_n_s32): Likewise.
8285 (vsubq_m_n_s16): Likewise.
8286 (vsubq_m_n_u8): Likewise.
8287 (vsubq_m_n_u32): Likewise.
8288 (vsubq_m_n_u16): Likewise.
8289 (__arm_vabdq_m_s8): Define intrinsic.
8290 (__arm_vabdq_m_s32): Likewise.
8291 (__arm_vabdq_m_s16): Likewise.
8292 (__arm_vabdq_m_u8): Likewise.
8293 (__arm_vabdq_m_u32): Likewise.
8294 (__arm_vabdq_m_u16): Likewise.
8295 (__arm_vaddq_m_n_s8): Likewise.
8296 (__arm_vaddq_m_n_s32): Likewise.
8297 (__arm_vaddq_m_n_s16): Likewise.
8298 (__arm_vaddq_m_n_u8): Likewise.
8299 (__arm_vaddq_m_n_u32): Likewise.
8300 (__arm_vaddq_m_n_u16): Likewise.
8301 (__arm_vaddq_m_s8): Likewise.
8302 (__arm_vaddq_m_s32): Likewise.
8303 (__arm_vaddq_m_s16): Likewise.
8304 (__arm_vaddq_m_u8): Likewise.
8305 (__arm_vaddq_m_u32): Likewise.
8306 (__arm_vaddq_m_u16): Likewise.
8307 (__arm_vandq_m_s8): Likewise.
8308 (__arm_vandq_m_s32): Likewise.
8309 (__arm_vandq_m_s16): Likewise.
8310 (__arm_vandq_m_u8): Likewise.
8311 (__arm_vandq_m_u32): Likewise.
8312 (__arm_vandq_m_u16): Likewise.
8313 (__arm_vbicq_m_s8): Likewise.
8314 (__arm_vbicq_m_s32): Likewise.
8315 (__arm_vbicq_m_s16): Likewise.
8316 (__arm_vbicq_m_u8): Likewise.
8317 (__arm_vbicq_m_u32): Likewise.
8318 (__arm_vbicq_m_u16): Likewise.
8319 (__arm_vbrsrq_m_n_s8): Likewise.
8320 (__arm_vbrsrq_m_n_s32): Likewise.
8321 (__arm_vbrsrq_m_n_s16): Likewise.
8322 (__arm_vbrsrq_m_n_u8): Likewise.
8323 (__arm_vbrsrq_m_n_u32): Likewise.
8324 (__arm_vbrsrq_m_n_u16): Likewise.
8325 (__arm_vcaddq_rot270_m_s8): Likewise.
8326 (__arm_vcaddq_rot270_m_s32): Likewise.
8327 (__arm_vcaddq_rot270_m_s16): Likewise.
8328 (__arm_vcaddq_rot270_m_u8): Likewise.
8329 (__arm_vcaddq_rot270_m_u32): Likewise.
8330 (__arm_vcaddq_rot270_m_u16): Likewise.
8331 (__arm_vcaddq_rot90_m_s8): Likewise.
8332 (__arm_vcaddq_rot90_m_s32): Likewise.
8333 (__arm_vcaddq_rot90_m_s16): Likewise.
8334 (__arm_vcaddq_rot90_m_u8): Likewise.
8335 (__arm_vcaddq_rot90_m_u32): Likewise.
8336 (__arm_vcaddq_rot90_m_u16): Likewise.
8337 (__arm_veorq_m_s8): Likewise.
8338 (__arm_veorq_m_s32): Likewise.
8339 (__arm_veorq_m_s16): Likewise.
8340 (__arm_veorq_m_u8): Likewise.
8341 (__arm_veorq_m_u32): Likewise.
8342 (__arm_veorq_m_u16): Likewise.
8343 (__arm_vhaddq_m_n_s8): Likewise.
8344 (__arm_vhaddq_m_n_s32): Likewise.
8345 (__arm_vhaddq_m_n_s16): Likewise.
8346 (__arm_vhaddq_m_n_u8): Likewise.
8347 (__arm_vhaddq_m_n_u32): Likewise.
8348 (__arm_vhaddq_m_n_u16): Likewise.
8349 (__arm_vhaddq_m_s8): Likewise.
8350 (__arm_vhaddq_m_s32): Likewise.
8351 (__arm_vhaddq_m_s16): Likewise.
8352 (__arm_vhaddq_m_u8): Likewise.
8353 (__arm_vhaddq_m_u32): Likewise.
8354 (__arm_vhaddq_m_u16): Likewise.
8355 (__arm_vhcaddq_rot270_m_s8): Likewise.
8356 (__arm_vhcaddq_rot270_m_s32): Likewise.
8357 (__arm_vhcaddq_rot270_m_s16): Likewise.
8358 (__arm_vhcaddq_rot90_m_s8): Likewise.
8359 (__arm_vhcaddq_rot90_m_s32): Likewise.
8360 (__arm_vhcaddq_rot90_m_s16): Likewise.
8361 (__arm_vhsubq_m_n_s8): Likewise.
8362 (__arm_vhsubq_m_n_s32): Likewise.
8363 (__arm_vhsubq_m_n_s16): Likewise.
8364 (__arm_vhsubq_m_n_u8): Likewise.
8365 (__arm_vhsubq_m_n_u32): Likewise.
8366 (__arm_vhsubq_m_n_u16): Likewise.
8367 (__arm_vhsubq_m_s8): Likewise.
8368 (__arm_vhsubq_m_s32): Likewise.
8369 (__arm_vhsubq_m_s16): Likewise.
8370 (__arm_vhsubq_m_u8): Likewise.
8371 (__arm_vhsubq_m_u32): Likewise.
8372 (__arm_vhsubq_m_u16): Likewise.
8373 (__arm_vmaxq_m_s8): Likewise.
8374 (__arm_vmaxq_m_s32): Likewise.
8375 (__arm_vmaxq_m_s16): Likewise.
8376 (__arm_vmaxq_m_u8): Likewise.
8377 (__arm_vmaxq_m_u32): Likewise.
8378 (__arm_vmaxq_m_u16): Likewise.
8379 (__arm_vminq_m_s8): Likewise.
8380 (__arm_vminq_m_s32): Likewise.
8381 (__arm_vminq_m_s16): Likewise.
8382 (__arm_vminq_m_u8): Likewise.
8383 (__arm_vminq_m_u32): Likewise.
8384 (__arm_vminq_m_u16): Likewise.
8385 (__arm_vmladavaq_p_s8): Likewise.
8386 (__arm_vmladavaq_p_s32): Likewise.
8387 (__arm_vmladavaq_p_s16): Likewise.
8388 (__arm_vmladavaq_p_u8): Likewise.
8389 (__arm_vmladavaq_p_u32): Likewise.
8390 (__arm_vmladavaq_p_u16): Likewise.
8391 (__arm_vmladavaxq_p_s8): Likewise.
8392 (__arm_vmladavaxq_p_s32): Likewise.
8393 (__arm_vmladavaxq_p_s16): Likewise.
8394 (__arm_vmlaq_m_n_s8): Likewise.
8395 (__arm_vmlaq_m_n_s32): Likewise.
8396 (__arm_vmlaq_m_n_s16): Likewise.
8397 (__arm_vmlaq_m_n_u8): Likewise.
8398 (__arm_vmlaq_m_n_u32): Likewise.
8399 (__arm_vmlaq_m_n_u16): Likewise.
8400 (__arm_vmlasq_m_n_s8): Likewise.
8401 (__arm_vmlasq_m_n_s32): Likewise.
8402 (__arm_vmlasq_m_n_s16): Likewise.
8403 (__arm_vmlasq_m_n_u8): Likewise.
8404 (__arm_vmlasq_m_n_u32): Likewise.
8405 (__arm_vmlasq_m_n_u16): Likewise.
8406 (__arm_vmlsdavaq_p_s8): Likewise.
8407 (__arm_vmlsdavaq_p_s32): Likewise.
8408 (__arm_vmlsdavaq_p_s16): Likewise.
8409 (__arm_vmlsdavaxq_p_s8): Likewise.
8410 (__arm_vmlsdavaxq_p_s32): Likewise.
8411 (__arm_vmlsdavaxq_p_s16): Likewise.
8412 (__arm_vmulhq_m_s8): Likewise.
8413 (__arm_vmulhq_m_s32): Likewise.
8414 (__arm_vmulhq_m_s16): Likewise.
8415 (__arm_vmulhq_m_u8): Likewise.
8416 (__arm_vmulhq_m_u32): Likewise.
8417 (__arm_vmulhq_m_u16): Likewise.
8418 (__arm_vmullbq_int_m_s8): Likewise.
8419 (__arm_vmullbq_int_m_s32): Likewise.
8420 (__arm_vmullbq_int_m_s16): Likewise.
8421 (__arm_vmullbq_int_m_u8): Likewise.
8422 (__arm_vmullbq_int_m_u32): Likewise.
8423 (__arm_vmullbq_int_m_u16): Likewise.
8424 (__arm_vmulltq_int_m_s8): Likewise.
8425 (__arm_vmulltq_int_m_s32): Likewise.
8426 (__arm_vmulltq_int_m_s16): Likewise.
8427 (__arm_vmulltq_int_m_u8): Likewise.
8428 (__arm_vmulltq_int_m_u32): Likewise.
8429 (__arm_vmulltq_int_m_u16): Likewise.
8430 (__arm_vmulq_m_n_s8): Likewise.
8431 (__arm_vmulq_m_n_s32): Likewise.
8432 (__arm_vmulq_m_n_s16): Likewise.
8433 (__arm_vmulq_m_n_u8): Likewise.
8434 (__arm_vmulq_m_n_u32): Likewise.
8435 (__arm_vmulq_m_n_u16): Likewise.
8436 (__arm_vmulq_m_s8): Likewise.
8437 (__arm_vmulq_m_s32): Likewise.
8438 (__arm_vmulq_m_s16): Likewise.
8439 (__arm_vmulq_m_u8): Likewise.
8440 (__arm_vmulq_m_u32): Likewise.
8441 (__arm_vmulq_m_u16): Likewise.
8442 (__arm_vornq_m_s8): Likewise.
8443 (__arm_vornq_m_s32): Likewise.
8444 (__arm_vornq_m_s16): Likewise.
8445 (__arm_vornq_m_u8): Likewise.
8446 (__arm_vornq_m_u32): Likewise.
8447 (__arm_vornq_m_u16): Likewise.
8448 (__arm_vorrq_m_s8): Likewise.
8449 (__arm_vorrq_m_s32): Likewise.
8450 (__arm_vorrq_m_s16): Likewise.
8451 (__arm_vorrq_m_u8): Likewise.
8452 (__arm_vorrq_m_u32): Likewise.
8453 (__arm_vorrq_m_u16): Likewise.
8454 (__arm_vqaddq_m_n_s8): Likewise.
8455 (__arm_vqaddq_m_n_s32): Likewise.
8456 (__arm_vqaddq_m_n_s16): Likewise.
8457 (__arm_vqaddq_m_n_u8): Likewise.
8458 (__arm_vqaddq_m_n_u32): Likewise.
8459 (__arm_vqaddq_m_n_u16): Likewise.
8460 (__arm_vqaddq_m_s8): Likewise.
8461 (__arm_vqaddq_m_s32): Likewise.
8462 (__arm_vqaddq_m_s16): Likewise.
8463 (__arm_vqaddq_m_u8): Likewise.
8464 (__arm_vqaddq_m_u32): Likewise.
8465 (__arm_vqaddq_m_u16): Likewise.
8466 (__arm_vqdmladhq_m_s8): Likewise.
8467 (__arm_vqdmladhq_m_s32): Likewise.
8468 (__arm_vqdmladhq_m_s16): Likewise.
8469 (__arm_vqdmladhxq_m_s8): Likewise.
8470 (__arm_vqdmladhxq_m_s32): Likewise.
8471 (__arm_vqdmladhxq_m_s16): Likewise.
8472 (__arm_vqdmlahq_m_n_s8): Likewise.
8473 (__arm_vqdmlahq_m_n_s32): Likewise.
8474 (__arm_vqdmlahq_m_n_s16): Likewise.
8475 (__arm_vqdmlahq_m_n_u8): Likewise.
8476 (__arm_vqdmlahq_m_n_u32): Likewise.
8477 (__arm_vqdmlahq_m_n_u16): Likewise.
8478 (__arm_vqdmlsdhq_m_s8): Likewise.
8479 (__arm_vqdmlsdhq_m_s32): Likewise.
8480 (__arm_vqdmlsdhq_m_s16): Likewise.
8481 (__arm_vqdmlsdhxq_m_s8): Likewise.
8482 (__arm_vqdmlsdhxq_m_s32): Likewise.
8483 (__arm_vqdmlsdhxq_m_s16): Likewise.
8484 (__arm_vqdmulhq_m_n_s8): Likewise.
8485 (__arm_vqdmulhq_m_n_s32): Likewise.
8486 (__arm_vqdmulhq_m_n_s16): Likewise.
8487 (__arm_vqdmulhq_m_s8): Likewise.
8488 (__arm_vqdmulhq_m_s32): Likewise.
8489 (__arm_vqdmulhq_m_s16): Likewise.
8490 (__arm_vqrdmladhq_m_s8): Likewise.
8491 (__arm_vqrdmladhq_m_s32): Likewise.
8492 (__arm_vqrdmladhq_m_s16): Likewise.
8493 (__arm_vqrdmladhxq_m_s8): Likewise.
8494 (__arm_vqrdmladhxq_m_s32): Likewise.
8495 (__arm_vqrdmladhxq_m_s16): Likewise.
8496 (__arm_vqrdmlahq_m_n_s8): Likewise.
8497 (__arm_vqrdmlahq_m_n_s32): Likewise.
8498 (__arm_vqrdmlahq_m_n_s16): Likewise.
8499 (__arm_vqrdmlahq_m_n_u8): Likewise.
8500 (__arm_vqrdmlahq_m_n_u32): Likewise.
8501 (__arm_vqrdmlahq_m_n_u16): Likewise.
8502 (__arm_vqrdmlashq_m_n_s8): Likewise.
8503 (__arm_vqrdmlashq_m_n_s32): Likewise.
8504 (__arm_vqrdmlashq_m_n_s16): Likewise.
8505 (__arm_vqrdmlashq_m_n_u8): Likewise.
8506 (__arm_vqrdmlashq_m_n_u32): Likewise.
8507 (__arm_vqrdmlashq_m_n_u16): Likewise.
8508 (__arm_vqrdmlsdhq_m_s8): Likewise.
8509 (__arm_vqrdmlsdhq_m_s32): Likewise.
8510 (__arm_vqrdmlsdhq_m_s16): Likewise.
8511 (__arm_vqrdmlsdhxq_m_s8): Likewise.
8512 (__arm_vqrdmlsdhxq_m_s32): Likewise.
8513 (__arm_vqrdmlsdhxq_m_s16): Likewise.
8514 (__arm_vqrdmulhq_m_n_s8): Likewise.
8515 (__arm_vqrdmulhq_m_n_s32): Likewise.
8516 (__arm_vqrdmulhq_m_n_s16): Likewise.
8517 (__arm_vqrdmulhq_m_s8): Likewise.
8518 (__arm_vqrdmulhq_m_s32): Likewise.
8519 (__arm_vqrdmulhq_m_s16): Likewise.
8520 (__arm_vqrshlq_m_s8): Likewise.
8521 (__arm_vqrshlq_m_s32): Likewise.
8522 (__arm_vqrshlq_m_s16): Likewise.
8523 (__arm_vqrshlq_m_u8): Likewise.
8524 (__arm_vqrshlq_m_u32): Likewise.
8525 (__arm_vqrshlq_m_u16): Likewise.
8526 (__arm_vqshlq_m_n_s8): Likewise.
8527 (__arm_vqshlq_m_n_s32): Likewise.
8528 (__arm_vqshlq_m_n_s16): Likewise.
8529 (__arm_vqshlq_m_n_u8): Likewise.
8530 (__arm_vqshlq_m_n_u32): Likewise.
8531 (__arm_vqshlq_m_n_u16): Likewise.
8532 (__arm_vqshlq_m_s8): Likewise.
8533 (__arm_vqshlq_m_s32): Likewise.
8534 (__arm_vqshlq_m_s16): Likewise.
8535 (__arm_vqshlq_m_u8): Likewise.
8536 (__arm_vqshlq_m_u32): Likewise.
8537 (__arm_vqshlq_m_u16): Likewise.
8538 (__arm_vqsubq_m_n_s8): Likewise.
8539 (__arm_vqsubq_m_n_s32): Likewise.
8540 (__arm_vqsubq_m_n_s16): Likewise.
8541 (__arm_vqsubq_m_n_u8): Likewise.
8542 (__arm_vqsubq_m_n_u32): Likewise.
8543 (__arm_vqsubq_m_n_u16): Likewise.
8544 (__arm_vqsubq_m_s8): Likewise.
8545 (__arm_vqsubq_m_s32): Likewise.
8546 (__arm_vqsubq_m_s16): Likewise.
8547 (__arm_vqsubq_m_u8): Likewise.
8548 (__arm_vqsubq_m_u32): Likewise.
8549 (__arm_vqsubq_m_u16): Likewise.
8550 (__arm_vrhaddq_m_s8): Likewise.
8551 (__arm_vrhaddq_m_s32): Likewise.
8552 (__arm_vrhaddq_m_s16): Likewise.
8553 (__arm_vrhaddq_m_u8): Likewise.
8554 (__arm_vrhaddq_m_u32): Likewise.
8555 (__arm_vrhaddq_m_u16): Likewise.
8556 (__arm_vrmulhq_m_s8): Likewise.
8557 (__arm_vrmulhq_m_s32): Likewise.
8558 (__arm_vrmulhq_m_s16): Likewise.
8559 (__arm_vrmulhq_m_u8): Likewise.
8560 (__arm_vrmulhq_m_u32): Likewise.
8561 (__arm_vrmulhq_m_u16): Likewise.
8562 (__arm_vrshlq_m_s8): Likewise.
8563 (__arm_vrshlq_m_s32): Likewise.
8564 (__arm_vrshlq_m_s16): Likewise.
8565 (__arm_vrshlq_m_u8): Likewise.
8566 (__arm_vrshlq_m_u32): Likewise.
8567 (__arm_vrshlq_m_u16): Likewise.
8568 (__arm_vrshrq_m_n_s8): Likewise.
8569 (__arm_vrshrq_m_n_s32): Likewise.
8570 (__arm_vrshrq_m_n_s16): Likewise.
8571 (__arm_vrshrq_m_n_u8): Likewise.
8572 (__arm_vrshrq_m_n_u32): Likewise.
8573 (__arm_vrshrq_m_n_u16): Likewise.
8574 (__arm_vshlq_m_n_s8): Likewise.
8575 (__arm_vshlq_m_n_s32): Likewise.
8576 (__arm_vshlq_m_n_s16): Likewise.
8577 (__arm_vshlq_m_n_u8): Likewise.
8578 (__arm_vshlq_m_n_u32): Likewise.
8579 (__arm_vshlq_m_n_u16): Likewise.
8580 (__arm_vshrq_m_n_s8): Likewise.
8581 (__arm_vshrq_m_n_s32): Likewise.
8582 (__arm_vshrq_m_n_s16): Likewise.
8583 (__arm_vshrq_m_n_u8): Likewise.
8584 (__arm_vshrq_m_n_u32): Likewise.
8585 (__arm_vshrq_m_n_u16): Likewise.
8586 (__arm_vsliq_m_n_s8): Likewise.
8587 (__arm_vsliq_m_n_s32): Likewise.
8588 (__arm_vsliq_m_n_s16): Likewise.
8589 (__arm_vsliq_m_n_u8): Likewise.
8590 (__arm_vsliq_m_n_u32): Likewise.
8591 (__arm_vsliq_m_n_u16): Likewise.
8592 (__arm_vsubq_m_n_s8): Likewise.
8593 (__arm_vsubq_m_n_s32): Likewise.
8594 (__arm_vsubq_m_n_s16): Likewise.
8595 (__arm_vsubq_m_n_u8): Likewise.
8596 (__arm_vsubq_m_n_u32): Likewise.
8597 (__arm_vsubq_m_n_u16): Likewise.
8598 (vqdmladhq_m): Define polymorphic variant.
8599 (vqdmladhxq_m): Likewise.
8600 (vqdmlsdhq_m): Likewise.
8601 (vqdmlsdhxq_m): Likewise.
8602 (vabdq_m): Likewise.
8603 (vandq_m): Likewise.
8604 (vbicq_m): Likewise.
8605 (vbrsrq_m_n): Likewise.
8606 (vcaddq_rot270_m): Likewise.
8607 (vcaddq_rot90_m): Likewise.
8608 (veorq_m): Likewise.
8609 (vmaxq_m): Likewise.
8610 (vminq_m): Likewise.
8611 (vmladavaq_p): Likewise.
8612 (vmlaq_m_n): Likewise.
8613 (vmlasq_m_n): Likewise.
8614 (vmulhq_m): Likewise.
8615 (vmullbq_int_m): Likewise.
8616 (vmulltq_int_m): Likewise.
8617 (vornq_m): Likewise.
8618 (vorrq_m): Likewise.
8619 (vqdmlahq_m_n): Likewise.
8620 (vqrdmlahq_m_n): Likewise.
8621 (vqrdmlashq_m_n): Likewise.
8622 (vqrshlq_m): Likewise.
8623 (vqshlq_m_n): Likewise.
8624 (vqshlq_m): Likewise.
8625 (vrhaddq_m): Likewise.
8626 (vrmulhq_m): Likewise.
8627 (vrshlq_m): Likewise.
8628 (vrshrq_m_n): Likewise.
8629 (vshlq_m_n): Likewise.
8630 (vshrq_m_n): Likewise.
8631 (vsliq_m): Likewise.
8632 (vaddq_m_n): Likewise.
8633 (vaddq_m): Likewise.
8634 (vhaddq_m_n): Likewise.
8635 (vhaddq_m): Likewise.
8636 (vhcaddq_rot270_m): Likewise.
8637 (vhcaddq_rot90_m): Likewise.
8638 (vhsubq_m): Likewise.
8639 (vhsubq_m_n): Likewise.
8640 (vmulq_m_n): Likewise.
8641 (vmulq_m): Likewise.
8642 (vqaddq_m_n): Likewise.
8643 (vqaddq_m): Likewise.
8644 (vqdmulhq_m_n): Likewise.
8645 (vqdmulhq_m): Likewise.
8646 (vsubq_m_n): Likewise.
8647 (vsliq_m_n): Likewise.
8648 (vqsubq_m_n): Likewise.
8649 (vqsubq_m): Likewise.
8650 (vqrdmulhq_m): Likewise.
8651 (vqrdmulhq_m_n): Likewise.
8652 (vqrdmlsdhxq_m): Likewise.
8653 (vqrdmlsdhq_m): Likewise.
8654 (vqrdmladhq_m): Likewise.
8655 (vqrdmladhxq_m): Likewise.
8656 (vmlsdavaxq_p): Likewise.
8657 (vmlsdavaq_p): Likewise.
8658 (vmladavaxq_p): Likewise.
8659 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
8661 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
8662 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8663 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
8664 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
8665 * config/arm/mve.md (VHSUBQ_M): Define iterators.
8666 (VSLIQ_M_N): Likewise.
8667 (VQRDMLAHQ_M_N): Likewise.
8668 (VRSHLQ_M): Likewise.
8669 (VMINQ_M): Likewise.
8670 (VMULLBQ_INT_M): Likewise.
8671 (VMULHQ_M): Likewise.
8672 (VMULQ_M): Likewise.
8673 (VHSUBQ_M_N): Likewise.
8674 (VHADDQ_M_N): Likewise.
8675 (VORRQ_M): Likewise.
8676 (VRMULHQ_M): Likewise.
8677 (VQADDQ_M): Likewise.
8678 (VRSHRQ_M_N): Likewise.
8679 (VQSUBQ_M_N): Likewise.
8680 (VADDQ_M): Likewise.
8681 (VORNQ_M): Likewise.
8682 (VQDMLAHQ_M_N): Likewise.
8683 (VRHADDQ_M): Likewise.
8684 (VQSHLQ_M): Likewise.
8685 (VANDQ_M): Likewise.
8686 (VBICQ_M): Likewise.
8687 (VSHLQ_M_N): Likewise.
8688 (VCADDQ_ROT270_M): Likewise.
8689 (VQRSHLQ_M): Likewise.
8690 (VQADDQ_M_N): Likewise.
8691 (VADDQ_M_N): Likewise.
8692 (VMAXQ_M): Likewise.
8693 (VQSUBQ_M): Likewise.
8694 (VMLASQ_M_N): Likewise.
8695 (VMLADAVAQ_P): Likewise.
8696 (VBRSRQ_M_N): Likewise.
8697 (VMULQ_M_N): Likewise.
8698 (VCADDQ_ROT90_M): Likewise.
8699 (VMULLTQ_INT_M): Likewise.
8700 (VEORQ_M): Likewise.
8701 (VSHRQ_M_N): Likewise.
8702 (VSUBQ_M_N): Likewise.
8703 (VHADDQ_M): Likewise.
8704 (VABDQ_M): Likewise.
8705 (VQRDMLASHQ_M_N): Likewise.
8706 (VMLAQ_M_N): Likewise.
8707 (VQSHLQ_M_N): Likewise.
8708 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
8709 (mve_vaddq_m_n_<supf><mode>): Likewise.
8710 (mve_vaddq_m_<supf><mode>): Likewise.
8711 (mve_vandq_m_<supf><mode>): Likewise.
8712 (mve_vbicq_m_<supf><mode>): Likewise.
8713 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
8714 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
8715 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
8716 (mve_veorq_m_<supf><mode>): Likewise.
8717 (mve_vhaddq_m_n_<supf><mode>): Likewise.
8718 (mve_vhaddq_m_<supf><mode>): Likewise.
8719 (mve_vhsubq_m_n_<supf><mode>): Likewise.
8720 (mve_vhsubq_m_<supf><mode>): Likewise.
8721 (mve_vmaxq_m_<supf><mode>): Likewise.
8722 (mve_vminq_m_<supf><mode>): Likewise.
8723 (mve_vmladavaq_p_<supf><mode>): Likewise.
8724 (mve_vmlaq_m_n_<supf><mode>): Likewise.
8725 (mve_vmlasq_m_n_<supf><mode>): Likewise.
8726 (mve_vmulhq_m_<supf><mode>): Likewise.
8727 (mve_vmullbq_int_m_<supf><mode>): Likewise.
8728 (mve_vmulltq_int_m_<supf><mode>): Likewise.
8729 (mve_vmulq_m_n_<supf><mode>): Likewise.
8730 (mve_vmulq_m_<supf><mode>): Likewise.
8731 (mve_vornq_m_<supf><mode>): Likewise.
8732 (mve_vorrq_m_<supf><mode>): Likewise.
8733 (mve_vqaddq_m_n_<supf><mode>): Likewise.
8734 (mve_vqaddq_m_<supf><mode>): Likewise.
8735 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
8736 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
8737 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
8738 (mve_vqrshlq_m_<supf><mode>): Likewise.
8739 (mve_vqshlq_m_n_<supf><mode>): Likewise.
8740 (mve_vqshlq_m_<supf><mode>): Likewise.
8741 (mve_vqsubq_m_n_<supf><mode>): Likewise.
8742 (mve_vqsubq_m_<supf><mode>): Likewise.
8743 (mve_vrhaddq_m_<supf><mode>): Likewise.
8744 (mve_vrmulhq_m_<supf><mode>): Likewise.
8745 (mve_vrshlq_m_<supf><mode>): Likewise.
8746 (mve_vrshrq_m_n_<supf><mode>): Likewise.
8747 (mve_vshlq_m_n_<supf><mode>): Likewise.
8748 (mve_vshrq_m_n_<supf><mode>): Likewise.
8749 (mve_vsliq_m_n_<supf><mode>): Likewise.
8750 (mve_vsubq_m_n_<supf><mode>): Likewise.
8751 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
8752 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
8753 (mve_vmladavaxq_p_s<mode>): Likewise.
8754 (mve_vmlsdavaq_p_s<mode>): Likewise.
8755 (mve_vmlsdavaxq_p_s<mode>): Likewise.
8756 (mve_vqdmladhq_m_s<mode>): Likewise.
8757 (mve_vqdmladhxq_m_s<mode>): Likewise.
8758 (mve_vqdmlsdhq_m_s<mode>): Likewise.
8759 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
8760 (mve_vqdmulhq_m_n_s<mode>): Likewise.
8761 (mve_vqdmulhq_m_s<mode>): Likewise.
8762 (mve_vqrdmladhq_m_s<mode>): Likewise.
8763 (mve_vqrdmladhxq_m_s<mode>): Likewise.
8764 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
8765 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
8766 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
8767 (mve_vqrdmulhq_m_s<mode>): Likewise.
8769 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8770 Mihail Ionescu <mihail.ionescu@arm.com>
8771 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8773 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
8774 Define builtin qualifier.
8775 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8776 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8777 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8778 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8779 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8780 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8781 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8782 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
8783 (vsubq_m_s8): Likewise.
8784 (vcvtq_m_n_f16_u16): Likewise.
8785 (vqshluq_m_n_s8): Likewise.
8786 (vabavq_p_s8): Likewise.
8787 (vsriq_m_n_u8): Likewise.
8788 (vshlq_m_u8): Likewise.
8789 (vsubq_m_u8): Likewise.
8790 (vabavq_p_u8): Likewise.
8791 (vshlq_m_s8): Likewise.
8792 (vcvtq_m_n_f16_s16): Likewise.
8793 (vsriq_m_n_s16): Likewise.
8794 (vsubq_m_s16): Likewise.
8795 (vcvtq_m_n_f32_u32): Likewise.
8796 (vqshluq_m_n_s16): Likewise.
8797 (vabavq_p_s16): Likewise.
8798 (vsriq_m_n_u16): Likewise.
8799 (vshlq_m_u16): Likewise.
8800 (vsubq_m_u16): Likewise.
8801 (vabavq_p_u16): Likewise.
8802 (vshlq_m_s16): Likewise.
8803 (vcvtq_m_n_f32_s32): Likewise.
8804 (vsriq_m_n_s32): Likewise.
8805 (vsubq_m_s32): Likewise.
8806 (vqshluq_m_n_s32): Likewise.
8807 (vabavq_p_s32): Likewise.
8808 (vsriq_m_n_u32): Likewise.
8809 (vshlq_m_u32): Likewise.
8810 (vsubq_m_u32): Likewise.
8811 (vabavq_p_u32): Likewise.
8812 (vshlq_m_s32): Likewise.
8813 (__arm_vsriq_m_n_s8): Define intrinsic.
8814 (__arm_vsubq_m_s8): Likewise.
8815 (__arm_vqshluq_m_n_s8): Likewise.
8816 (__arm_vabavq_p_s8): Likewise.
8817 (__arm_vsriq_m_n_u8): Likewise.
8818 (__arm_vshlq_m_u8): Likewise.
8819 (__arm_vsubq_m_u8): Likewise.
8820 (__arm_vabavq_p_u8): Likewise.
8821 (__arm_vshlq_m_s8): Likewise.
8822 (__arm_vsriq_m_n_s16): Likewise.
8823 (__arm_vsubq_m_s16): Likewise.
8824 (__arm_vqshluq_m_n_s16): Likewise.
8825 (__arm_vabavq_p_s16): Likewise.
8826 (__arm_vsriq_m_n_u16): Likewise.
8827 (__arm_vshlq_m_u16): Likewise.
8828 (__arm_vsubq_m_u16): Likewise.
8829 (__arm_vabavq_p_u16): Likewise.
8830 (__arm_vshlq_m_s16): Likewise.
8831 (__arm_vsriq_m_n_s32): Likewise.
8832 (__arm_vsubq_m_s32): Likewise.
8833 (__arm_vqshluq_m_n_s32): Likewise.
8834 (__arm_vabavq_p_s32): Likewise.
8835 (__arm_vsriq_m_n_u32): Likewise.
8836 (__arm_vshlq_m_u32): Likewise.
8837 (__arm_vsubq_m_u32): Likewise.
8838 (__arm_vabavq_p_u32): Likewise.
8839 (__arm_vshlq_m_s32): Likewise.
8840 (__arm_vcvtq_m_n_f16_u16): Likewise.
8841 (__arm_vcvtq_m_n_f16_s16): Likewise.
8842 (__arm_vcvtq_m_n_f32_u32): Likewise.
8843 (__arm_vcvtq_m_n_f32_s32): Likewise.
8844 (vcvtq_m_n): Define polymorphic variant.
8845 (vqshluq_m_n): Likewise.
8846 (vshlq_m): Likewise.
8847 (vsriq_m_n): Likewise.
8848 (vsubq_m): Likewise.
8849 (vabavq_p): Likewise.
8850 * config/arm/arm_mve_builtins.def
8851 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
8852 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8853 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8854 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8855 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8856 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8857 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8858 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8859 * config/arm/mve.md (VABAVQ_P): Define iterator.
8860 (VSHLQ_M): Likewise.
8861 (VSRIQ_M_N): Likewise.
8862 (VSUBQ_M): Likewise.
8863 (VCVTQ_M_N_TO_F): Likewise.
8864 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
8865 (mve_vqshluq_m_n_s<mode>): Likewise.
8866 (mve_vshlq_m_<supf><mode>): Likewise.
8867 (mve_vsriq_m_n_<supf><mode>): Likewise.
8868 (mve_vsubq_m_<supf><mode>): Likewise.
8869 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
8871 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8872 Mihail Ionescu <mihail.ionescu@arm.com>
8873 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8875 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
8876 (vrmlsldavhaq_s32): Likewise.
8877 (vrmlsldavhaxq_s32): Likewise.
8878 (vaddlvaq_p_s32): Likewise.
8879 (vcvtbq_m_f16_f32): Likewise.
8880 (vcvtbq_m_f32_f16): Likewise.
8881 (vcvttq_m_f16_f32): Likewise.
8882 (vcvttq_m_f32_f16): Likewise.
8883 (vrev16q_m_s8): Likewise.
8884 (vrev32q_m_f16): Likewise.
8885 (vrmlaldavhq_p_s32): Likewise.
8886 (vrmlaldavhxq_p_s32): Likewise.
8887 (vrmlsldavhq_p_s32): Likewise.
8888 (vrmlsldavhxq_p_s32): Likewise.
8889 (vaddlvaq_p_u32): Likewise.
8890 (vrev16q_m_u8): Likewise.
8891 (vrmlaldavhq_p_u32): Likewise.
8892 (vmvnq_m_n_s16): Likewise.
8893 (vorrq_m_n_s16): Likewise.
8894 (vqrshrntq_n_s16): Likewise.
8895 (vqshrnbq_n_s16): Likewise.
8896 (vqshrntq_n_s16): Likewise.
8897 (vrshrnbq_n_s16): Likewise.
8898 (vrshrntq_n_s16): Likewise.
8899 (vshrnbq_n_s16): Likewise.
8900 (vshrntq_n_s16): Likewise.
8901 (vcmlaq_f16): Likewise.
8902 (vcmlaq_rot180_f16): Likewise.
8903 (vcmlaq_rot270_f16): Likewise.
8904 (vcmlaq_rot90_f16): Likewise.
8905 (vfmaq_f16): Likewise.
8906 (vfmaq_n_f16): Likewise.
8907 (vfmasq_n_f16): Likewise.
8908 (vfmsq_f16): Likewise.
8909 (vmlaldavaq_s16): Likewise.
8910 (vmlaldavaxq_s16): Likewise.
8911 (vmlsldavaq_s16): Likewise.
8912 (vmlsldavaxq_s16): Likewise.
8913 (vabsq_m_f16): Likewise.
8914 (vcvtmq_m_s16_f16): Likewise.
8915 (vcvtnq_m_s16_f16): Likewise.
8916 (vcvtpq_m_s16_f16): Likewise.
8917 (vcvtq_m_s16_f16): Likewise.
8918 (vdupq_m_n_f16): Likewise.
8919 (vmaxnmaq_m_f16): Likewise.
8920 (vmaxnmavq_p_f16): Likewise.
8921 (vmaxnmvq_p_f16): Likewise.
8922 (vminnmaq_m_f16): Likewise.
8923 (vminnmavq_p_f16): Likewise.
8924 (vminnmvq_p_f16): Likewise.
8925 (vmlaldavq_p_s16): Likewise.
8926 (vmlaldavxq_p_s16): Likewise.
8927 (vmlsldavq_p_s16): Likewise.
8928 (vmlsldavxq_p_s16): Likewise.
8929 (vmovlbq_m_s8): Likewise.
8930 (vmovltq_m_s8): Likewise.
8931 (vmovnbq_m_s16): Likewise.
8932 (vmovntq_m_s16): Likewise.
8933 (vnegq_m_f16): Likewise.
8934 (vpselq_f16): Likewise.
8935 (vqmovnbq_m_s16): Likewise.
8936 (vqmovntq_m_s16): Likewise.
8937 (vrev32q_m_s8): Likewise.
8938 (vrev64q_m_f16): Likewise.
8939 (vrndaq_m_f16): Likewise.
8940 (vrndmq_m_f16): Likewise.
8941 (vrndnq_m_f16): Likewise.
8942 (vrndpq_m_f16): Likewise.
8943 (vrndq_m_f16): Likewise.
8944 (vrndxq_m_f16): Likewise.
8945 (vcmpeqq_m_n_f16): Likewise.
8946 (vcmpgeq_m_f16): Likewise.
8947 (vcmpgeq_m_n_f16): Likewise.
8948 (vcmpgtq_m_f16): Likewise.
8949 (vcmpgtq_m_n_f16): Likewise.
8950 (vcmpleq_m_f16): Likewise.
8951 (vcmpleq_m_n_f16): Likewise.
8952 (vcmpltq_m_f16): Likewise.
8953 (vcmpltq_m_n_f16): Likewise.
8954 (vcmpneq_m_f16): Likewise.
8955 (vcmpneq_m_n_f16): Likewise.
8956 (vmvnq_m_n_u16): Likewise.
8957 (vorrq_m_n_u16): Likewise.
8958 (vqrshruntq_n_s16): Likewise.
8959 (vqshrunbq_n_s16): Likewise.
8960 (vqshruntq_n_s16): Likewise.
8961 (vcvtmq_m_u16_f16): Likewise.
8962 (vcvtnq_m_u16_f16): Likewise.
8963 (vcvtpq_m_u16_f16): Likewise.
8964 (vcvtq_m_u16_f16): Likewise.
8965 (vqmovunbq_m_s16): Likewise.
8966 (vqmovuntq_m_s16): Likewise.
8967 (vqrshrntq_n_u16): Likewise.
8968 (vqshrnbq_n_u16): Likewise.
8969 (vqshrntq_n_u16): Likewise.
8970 (vrshrnbq_n_u16): Likewise.
8971 (vrshrntq_n_u16): Likewise.
8972 (vshrnbq_n_u16): Likewise.
8973 (vshrntq_n_u16): Likewise.
8974 (vmlaldavaq_u16): Likewise.
8975 (vmlaldavaxq_u16): Likewise.
8976 (vmlaldavq_p_u16): Likewise.
8977 (vmlaldavxq_p_u16): Likewise.
8978 (vmovlbq_m_u8): Likewise.
8979 (vmovltq_m_u8): Likewise.
8980 (vmovnbq_m_u16): Likewise.
8981 (vmovntq_m_u16): Likewise.
8982 (vqmovnbq_m_u16): Likewise.
8983 (vqmovntq_m_u16): Likewise.
8984 (vrev32q_m_u8): Likewise.
8985 (vmvnq_m_n_s32): Likewise.
8986 (vorrq_m_n_s32): Likewise.
8987 (vqrshrntq_n_s32): Likewise.
8988 (vqshrnbq_n_s32): Likewise.
8989 (vqshrntq_n_s32): Likewise.
8990 (vrshrnbq_n_s32): Likewise.
8991 (vrshrntq_n_s32): Likewise.
8992 (vshrnbq_n_s32): Likewise.
8993 (vshrntq_n_s32): Likewise.
8994 (vcmlaq_f32): Likewise.
8995 (vcmlaq_rot180_f32): Likewise.
8996 (vcmlaq_rot270_f32): Likewise.
8997 (vcmlaq_rot90_f32): Likewise.
8998 (vfmaq_f32): Likewise.
8999 (vfmaq_n_f32): Likewise.
9000 (vfmasq_n_f32): Likewise.
9001 (vfmsq_f32): Likewise.
9002 (vmlaldavaq_s32): Likewise.
9003 (vmlaldavaxq_s32): Likewise.
9004 (vmlsldavaq_s32): Likewise.
9005 (vmlsldavaxq_s32): Likewise.
9006 (vabsq_m_f32): Likewise.
9007 (vcvtmq_m_s32_f32): Likewise.
9008 (vcvtnq_m_s32_f32): Likewise.
9009 (vcvtpq_m_s32_f32): Likewise.
9010 (vcvtq_m_s32_f32): Likewise.
9011 (vdupq_m_n_f32): Likewise.
9012 (vmaxnmaq_m_f32): Likewise.
9013 (vmaxnmavq_p_f32): Likewise.
9014 (vmaxnmvq_p_f32): Likewise.
9015 (vminnmaq_m_f32): Likewise.
9016 (vminnmavq_p_f32): Likewise.
9017 (vminnmvq_p_f32): Likewise.
9018 (vmlaldavq_p_s32): Likewise.
9019 (vmlaldavxq_p_s32): Likewise.
9020 (vmlsldavq_p_s32): Likewise.
9021 (vmlsldavxq_p_s32): Likewise.
9022 (vmovlbq_m_s16): Likewise.
9023 (vmovltq_m_s16): Likewise.
9024 (vmovnbq_m_s32): Likewise.
9025 (vmovntq_m_s32): Likewise.
9026 (vnegq_m_f32): Likewise.
9027 (vpselq_f32): Likewise.
9028 (vqmovnbq_m_s32): Likewise.
9029 (vqmovntq_m_s32): Likewise.
9030 (vrev32q_m_s16): Likewise.
9031 (vrev64q_m_f32): Likewise.
9032 (vrndaq_m_f32): Likewise.
9033 (vrndmq_m_f32): Likewise.
9034 (vrndnq_m_f32): Likewise.
9035 (vrndpq_m_f32): Likewise.
9036 (vrndq_m_f32): Likewise.
9037 (vrndxq_m_f32): Likewise.
9038 (vcmpeqq_m_n_f32): Likewise.
9039 (vcmpgeq_m_f32): Likewise.
9040 (vcmpgeq_m_n_f32): Likewise.
9041 (vcmpgtq_m_f32): Likewise.
9042 (vcmpgtq_m_n_f32): Likewise.
9043 (vcmpleq_m_f32): Likewise.
9044 (vcmpleq_m_n_f32): Likewise.
9045 (vcmpltq_m_f32): Likewise.
9046 (vcmpltq_m_n_f32): Likewise.
9047 (vcmpneq_m_f32): Likewise.
9048 (vcmpneq_m_n_f32): Likewise.
9049 (vmvnq_m_n_u32): Likewise.
9050 (vorrq_m_n_u32): Likewise.
9051 (vqrshruntq_n_s32): Likewise.
9052 (vqshrunbq_n_s32): Likewise.
9053 (vqshruntq_n_s32): Likewise.
9054 (vcvtmq_m_u32_f32): Likewise.
9055 (vcvtnq_m_u32_f32): Likewise.
9056 (vcvtpq_m_u32_f32): Likewise.
9057 (vcvtq_m_u32_f32): Likewise.
9058 (vqmovunbq_m_s32): Likewise.
9059 (vqmovuntq_m_s32): Likewise.
9060 (vqrshrntq_n_u32): Likewise.
9061 (vqshrnbq_n_u32): Likewise.
9062 (vqshrntq_n_u32): Likewise.
9063 (vrshrnbq_n_u32): Likewise.
9064 (vrshrntq_n_u32): Likewise.
9065 (vshrnbq_n_u32): Likewise.
9066 (vshrntq_n_u32): Likewise.
9067 (vmlaldavaq_u32): Likewise.
9068 (vmlaldavaxq_u32): Likewise.
9069 (vmlaldavq_p_u32): Likewise.
9070 (vmlaldavxq_p_u32): Likewise.
9071 (vmovlbq_m_u16): Likewise.
9072 (vmovltq_m_u16): Likewise.
9073 (vmovnbq_m_u32): Likewise.
9074 (vmovntq_m_u32): Likewise.
9075 (vqmovnbq_m_u32): Likewise.
9076 (vqmovntq_m_u32): Likewise.
9077 (vrev32q_m_u16): Likewise.
9078 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
9079 (__arm_vrmlsldavhaq_s32): Likewise.
9080 (__arm_vrmlsldavhaxq_s32): Likewise.
9081 (__arm_vaddlvaq_p_s32): Likewise.
9082 (__arm_vrev16q_m_s8): Likewise.
9083 (__arm_vrmlaldavhq_p_s32): Likewise.
9084 (__arm_vrmlaldavhxq_p_s32): Likewise.
9085 (__arm_vrmlsldavhq_p_s32): Likewise.
9086 (__arm_vrmlsldavhxq_p_s32): Likewise.
9087 (__arm_vaddlvaq_p_u32): Likewise.
9088 (__arm_vrev16q_m_u8): Likewise.
9089 (__arm_vrmlaldavhq_p_u32): Likewise.
9090 (__arm_vmvnq_m_n_s16): Likewise.
9091 (__arm_vorrq_m_n_s16): Likewise.
9092 (__arm_vqrshrntq_n_s16): Likewise.
9093 (__arm_vqshrnbq_n_s16): Likewise.
9094 (__arm_vqshrntq_n_s16): Likewise.
9095 (__arm_vrshrnbq_n_s16): Likewise.
9096 (__arm_vrshrntq_n_s16): Likewise.
9097 (__arm_vshrnbq_n_s16): Likewise.
9098 (__arm_vshrntq_n_s16): Likewise.
9099 (__arm_vmlaldavaq_s16): Likewise.
9100 (__arm_vmlaldavaxq_s16): Likewise.
9101 (__arm_vmlsldavaq_s16): Likewise.
9102 (__arm_vmlsldavaxq_s16): Likewise.
9103 (__arm_vmlaldavq_p_s16): Likewise.
9104 (__arm_vmlaldavxq_p_s16): Likewise.
9105 (__arm_vmlsldavq_p_s16): Likewise.
9106 (__arm_vmlsldavxq_p_s16): Likewise.
9107 (__arm_vmovlbq_m_s8): Likewise.
9108 (__arm_vmovltq_m_s8): Likewise.
9109 (__arm_vmovnbq_m_s16): Likewise.
9110 (__arm_vmovntq_m_s16): Likewise.
9111 (__arm_vqmovnbq_m_s16): Likewise.
9112 (__arm_vqmovntq_m_s16): Likewise.
9113 (__arm_vrev32q_m_s8): Likewise.
9114 (__arm_vmvnq_m_n_u16): Likewise.
9115 (__arm_vorrq_m_n_u16): Likewise.
9116 (__arm_vqrshruntq_n_s16): Likewise.
9117 (__arm_vqshrunbq_n_s16): Likewise.
9118 (__arm_vqshruntq_n_s16): Likewise.
9119 (__arm_vqmovunbq_m_s16): Likewise.
9120 (__arm_vqmovuntq_m_s16): Likewise.
9121 (__arm_vqrshrntq_n_u16): Likewise.
9122 (__arm_vqshrnbq_n_u16): Likewise.
9123 (__arm_vqshrntq_n_u16): Likewise.
9124 (__arm_vrshrnbq_n_u16): Likewise.
9125 (__arm_vrshrntq_n_u16): Likewise.
9126 (__arm_vshrnbq_n_u16): Likewise.
9127 (__arm_vshrntq_n_u16): Likewise.
9128 (__arm_vmlaldavaq_u16): Likewise.
9129 (__arm_vmlaldavaxq_u16): Likewise.
9130 (__arm_vmlaldavq_p_u16): Likewise.
9131 (__arm_vmlaldavxq_p_u16): Likewise.
9132 (__arm_vmovlbq_m_u8): Likewise.
9133 (__arm_vmovltq_m_u8): Likewise.
9134 (__arm_vmovnbq_m_u16): Likewise.
9135 (__arm_vmovntq_m_u16): Likewise.
9136 (__arm_vqmovnbq_m_u16): Likewise.
9137 (__arm_vqmovntq_m_u16): Likewise.
9138 (__arm_vrev32q_m_u8): Likewise.
9139 (__arm_vmvnq_m_n_s32): Likewise.
9140 (__arm_vorrq_m_n_s32): Likewise.
9141 (__arm_vqrshrntq_n_s32): Likewise.
9142 (__arm_vqshrnbq_n_s32): Likewise.
9143 (__arm_vqshrntq_n_s32): Likewise.
9144 (__arm_vrshrnbq_n_s32): Likewise.
9145 (__arm_vrshrntq_n_s32): Likewise.
9146 (__arm_vshrnbq_n_s32): Likewise.
9147 (__arm_vshrntq_n_s32): Likewise.
9148 (__arm_vmlaldavaq_s32): Likewise.
9149 (__arm_vmlaldavaxq_s32): Likewise.
9150 (__arm_vmlsldavaq_s32): Likewise.
9151 (__arm_vmlsldavaxq_s32): Likewise.
9152 (__arm_vmlaldavq_p_s32): Likewise.
9153 (__arm_vmlaldavxq_p_s32): Likewise.
9154 (__arm_vmlsldavq_p_s32): Likewise.
9155 (__arm_vmlsldavxq_p_s32): Likewise.
9156 (__arm_vmovlbq_m_s16): Likewise.
9157 (__arm_vmovltq_m_s16): Likewise.
9158 (__arm_vmovnbq_m_s32): Likewise.
9159 (__arm_vmovntq_m_s32): Likewise.
9160 (__arm_vqmovnbq_m_s32): Likewise.
9161 (__arm_vqmovntq_m_s32): Likewise.
9162 (__arm_vrev32q_m_s16): Likewise.
9163 (__arm_vmvnq_m_n_u32): Likewise.
9164 (__arm_vorrq_m_n_u32): Likewise.
9165 (__arm_vqrshruntq_n_s32): Likewise.
9166 (__arm_vqshrunbq_n_s32): Likewise.
9167 (__arm_vqshruntq_n_s32): Likewise.
9168 (__arm_vqmovunbq_m_s32): Likewise.
9169 (__arm_vqmovuntq_m_s32): Likewise.
9170 (__arm_vqrshrntq_n_u32): Likewise.
9171 (__arm_vqshrnbq_n_u32): Likewise.
9172 (__arm_vqshrntq_n_u32): Likewise.
9173 (__arm_vrshrnbq_n_u32): Likewise.
9174 (__arm_vrshrntq_n_u32): Likewise.
9175 (__arm_vshrnbq_n_u32): Likewise.
9176 (__arm_vshrntq_n_u32): Likewise.
9177 (__arm_vmlaldavaq_u32): Likewise.
9178 (__arm_vmlaldavaxq_u32): Likewise.
9179 (__arm_vmlaldavq_p_u32): Likewise.
9180 (__arm_vmlaldavxq_p_u32): Likewise.
9181 (__arm_vmovlbq_m_u16): Likewise.
9182 (__arm_vmovltq_m_u16): Likewise.
9183 (__arm_vmovnbq_m_u32): Likewise.
9184 (__arm_vmovntq_m_u32): Likewise.
9185 (__arm_vqmovnbq_m_u32): Likewise.
9186 (__arm_vqmovntq_m_u32): Likewise.
9187 (__arm_vrev32q_m_u16): Likewise.
9188 (__arm_vcvtbq_m_f16_f32): Likewise.
9189 (__arm_vcvtbq_m_f32_f16): Likewise.
9190 (__arm_vcvttq_m_f16_f32): Likewise.
9191 (__arm_vcvttq_m_f32_f16): Likewise.
9192 (__arm_vrev32q_m_f16): Likewise.
9193 (__arm_vcmlaq_f16): Likewise.
9194 (__arm_vcmlaq_rot180_f16): Likewise.
9195 (__arm_vcmlaq_rot270_f16): Likewise.
9196 (__arm_vcmlaq_rot90_f16): Likewise.
9197 (__arm_vfmaq_f16): Likewise.
9198 (__arm_vfmaq_n_f16): Likewise.
9199 (__arm_vfmasq_n_f16): Likewise.
9200 (__arm_vfmsq_f16): Likewise.
9201 (__arm_vabsq_m_f16): Likewise.
9202 (__arm_vcvtmq_m_s16_f16): Likewise.
9203 (__arm_vcvtnq_m_s16_f16): Likewise.
9204 (__arm_vcvtpq_m_s16_f16): Likewise.
9205 (__arm_vcvtq_m_s16_f16): Likewise.
9206 (__arm_vdupq_m_n_f16): Likewise.
9207 (__arm_vmaxnmaq_m_f16): Likewise.
9208 (__arm_vmaxnmavq_p_f16): Likewise.
9209 (__arm_vmaxnmvq_p_f16): Likewise.
9210 (__arm_vminnmaq_m_f16): Likewise.
9211 (__arm_vminnmavq_p_f16): Likewise.
9212 (__arm_vminnmvq_p_f16): Likewise.
9213 (__arm_vnegq_m_f16): Likewise.
9214 (__arm_vpselq_f16): Likewise.
9215 (__arm_vrev64q_m_f16): Likewise.
9216 (__arm_vrndaq_m_f16): Likewise.
9217 (__arm_vrndmq_m_f16): Likewise.
9218 (__arm_vrndnq_m_f16): Likewise.
9219 (__arm_vrndpq_m_f16): Likewise.
9220 (__arm_vrndq_m_f16): Likewise.
9221 (__arm_vrndxq_m_f16): Likewise.
9222 (__arm_vcmpeqq_m_n_f16): Likewise.
9223 (__arm_vcmpgeq_m_f16): Likewise.
9224 (__arm_vcmpgeq_m_n_f16): Likewise.
9225 (__arm_vcmpgtq_m_f16): Likewise.
9226 (__arm_vcmpgtq_m_n_f16): Likewise.
9227 (__arm_vcmpleq_m_f16): Likewise.
9228 (__arm_vcmpleq_m_n_f16): Likewise.
9229 (__arm_vcmpltq_m_f16): Likewise.
9230 (__arm_vcmpltq_m_n_f16): Likewise.
9231 (__arm_vcmpneq_m_f16): Likewise.
9232 (__arm_vcmpneq_m_n_f16): Likewise.
9233 (__arm_vcvtmq_m_u16_f16): Likewise.
9234 (__arm_vcvtnq_m_u16_f16): Likewise.
9235 (__arm_vcvtpq_m_u16_f16): Likewise.
9236 (__arm_vcvtq_m_u16_f16): Likewise.
9237 (__arm_vcmlaq_f32): Likewise.
9238 (__arm_vcmlaq_rot180_f32): Likewise.
9239 (__arm_vcmlaq_rot270_f32): Likewise.
9240 (__arm_vcmlaq_rot90_f32): Likewise.
9241 (__arm_vfmaq_f32): Likewise.
9242 (__arm_vfmaq_n_f32): Likewise.
9243 (__arm_vfmasq_n_f32): Likewise.
9244 (__arm_vfmsq_f32): Likewise.
9245 (__arm_vabsq_m_f32): Likewise.
9246 (__arm_vcvtmq_m_s32_f32): Likewise.
9247 (__arm_vcvtnq_m_s32_f32): Likewise.
9248 (__arm_vcvtpq_m_s32_f32): Likewise.
9249 (__arm_vcvtq_m_s32_f32): Likewise.
9250 (__arm_vdupq_m_n_f32): Likewise.
9251 (__arm_vmaxnmaq_m_f32): Likewise.
9252 (__arm_vmaxnmavq_p_f32): Likewise.
9253 (__arm_vmaxnmvq_p_f32): Likewise.
9254 (__arm_vminnmaq_m_f32): Likewise.
9255 (__arm_vminnmavq_p_f32): Likewise.
9256 (__arm_vminnmvq_p_f32): Likewise.
9257 (__arm_vnegq_m_f32): Likewise.
9258 (__arm_vpselq_f32): Likewise.
9259 (__arm_vrev64q_m_f32): Likewise.
9260 (__arm_vrndaq_m_f32): Likewise.
9261 (__arm_vrndmq_m_f32): Likewise.
9262 (__arm_vrndnq_m_f32): Likewise.
9263 (__arm_vrndpq_m_f32): Likewise.
9264 (__arm_vrndq_m_f32): Likewise.
9265 (__arm_vrndxq_m_f32): Likewise.
9266 (__arm_vcmpeqq_m_n_f32): Likewise.
9267 (__arm_vcmpgeq_m_f32): Likewise.
9268 (__arm_vcmpgeq_m_n_f32): Likewise.
9269 (__arm_vcmpgtq_m_f32): Likewise.
9270 (__arm_vcmpgtq_m_n_f32): Likewise.
9271 (__arm_vcmpleq_m_f32): Likewise.
9272 (__arm_vcmpleq_m_n_f32): Likewise.
9273 (__arm_vcmpltq_m_f32): Likewise.
9274 (__arm_vcmpltq_m_n_f32): Likewise.
9275 (__arm_vcmpneq_m_f32): Likewise.
9276 (__arm_vcmpneq_m_n_f32): Likewise.
9277 (__arm_vcvtmq_m_u32_f32): Likewise.
9278 (__arm_vcvtnq_m_u32_f32): Likewise.
9279 (__arm_vcvtpq_m_u32_f32): Likewise.
9280 (__arm_vcvtq_m_u32_f32): Likewise.
9281 (vcvtq_m): Define polymorphic variant.
9282 (vabsq_m): Likewise.
9284 (vcmlaq_rot180): Likewise.
9285 (vcmlaq_rot270): Likewise.
9286 (vcmlaq_rot90): Likewise.
9287 (vcmpeqq_m_n): Likewise.
9288 (vcmpgeq_m_n): Likewise.
9289 (vrndxq_m): Likewise.
9290 (vrndq_m): Likewise.
9291 (vrndpq_m): Likewise.
9292 (vcmpgtq_m_n): Likewise.
9293 (vcmpgtq_m): Likewise.
9294 (vcmpleq_m): Likewise.
9295 (vcmpleq_m_n): Likewise.
9296 (vcmpltq_m_n): Likewise.
9297 (vcmpltq_m): Likewise.
9298 (vcmpneq_m): Likewise.
9299 (vcmpneq_m_n): Likewise.
9300 (vcvtbq_m): Likewise.
9301 (vcvttq_m): Likewise.
9302 (vcvtmq_m): Likewise.
9303 (vcvtnq_m): Likewise.
9304 (vcvtpq_m): Likewise.
9305 (vdupq_m_n): Likewise.
9306 (vfmaq_n): Likewise.
9308 (vfmasq_n): Likewise.
9310 (vmaxnmaq_m): Likewise.
9311 (vmaxnmavq_m): Likewise.
9312 (vmaxnmvq_m): Likewise.
9313 (vmaxnmavq_p): Likewise.
9314 (vmaxnmvq_p): Likewise.
9315 (vminnmaq_m): Likewise.
9316 (vminnmavq_p): Likewise.
9317 (vminnmvq_p): Likewise.
9318 (vrndnq_m): Likewise.
9319 (vrndaq_m): Likewise.
9320 (vrndmq_m): Likewise.
9321 (vrev64q_m): Likewise.
9322 (vrev32q_m): Likewise.
9324 (vnegq_m): Likewise.
9325 (vcmpgeq_m): Likewise.
9326 (vshrntq_n): Likewise.
9327 (vrshrntq_n): Likewise.
9328 (vmovlbq_m): Likewise.
9329 (vmovnbq_m): Likewise.
9330 (vmovntq_m): Likewise.
9331 (vmvnq_m_n): Likewise.
9332 (vmvnq_m): Likewise.
9333 (vshrnbq_n): Likewise.
9334 (vrshrnbq_n): Likewise.
9335 (vqshruntq_n): Likewise.
9336 (vrev16q_m): Likewise.
9337 (vqshrunbq_n): Likewise.
9338 (vqshrntq_n): Likewise.
9339 (vqrshruntq_n): Likewise.
9340 (vqrshrntq_n): Likewise.
9341 (vqshrnbq_n): Likewise.
9342 (vqmovuntq_m): Likewise.
9343 (vqmovntq_m): Likewise.
9344 (vqmovnbq_m): Likewise.
9345 (vorrq_m_n): Likewise.
9346 (vmovltq_m): Likewise.
9347 (vqmovunbq_m): Likewise.
9348 (vaddlvaq_p): Likewise.
9349 (vmlaldavaq): Likewise.
9350 (vmlaldavaxq): Likewise.
9351 (vmlaldavq_p): Likewise.
9352 (vmlaldavxq_p): Likewise.
9353 (vmlsldavaq): Likewise.
9354 (vmlsldavaxq): Likewise.
9355 (vmlsldavq_p): Likewise.
9356 (vmlsldavxq_p): Likewise.
9357 (vrmlaldavhaxq): Likewise.
9358 (vrmlaldavhq_p): Likewise.
9359 (vrmlaldavhxq_p): Likewise.
9360 (vrmlsldavhaq): Likewise.
9361 (vrmlsldavhaxq): Likewise.
9362 (vrmlsldavhq_p): Likewise.
9363 (vrmlsldavhxq_p): Likewise.
9364 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
9366 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
9367 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
9368 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
9369 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
9370 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
9371 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
9372 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
9373 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
9374 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
9375 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
9376 (MVE_pred3): Likewise.
9377 (MVE_constraint1): Likewise.
9378 (MVE_pred1): Likewise.
9379 (VMLALDAVQ_P): Define iterator.
9380 (VQMOVNBQ_M): Likewise.
9381 (VMOVLTQ_M): Likewise.
9382 (VMOVNBQ_M): Likewise.
9383 (VRSHRNTQ_N): Likewise.
9384 (VORRQ_M_N): Likewise.
9385 (VREV32Q_M): Likewise.
9386 (VREV16Q_M): Likewise.
9387 (VQRSHRNTQ_N): Likewise.
9388 (VMOVNTQ_M): Likewise.
9389 (VMOVLBQ_M): Likewise.
9390 (VMLALDAVAQ): Likewise.
9391 (VQSHRNBQ_N): Likewise.
9392 (VSHRNBQ_N): Likewise.
9393 (VRSHRNBQ_N): Likewise.
9394 (VMLALDAVXQ_P): Likewise.
9395 (VQMOVNTQ_M): Likewise.
9396 (VMVNQ_M_N): Likewise.
9397 (VQSHRNTQ_N): Likewise.
9398 (VMLALDAVAXQ): Likewise.
9399 (VSHRNTQ_N): Likewise.
9400 (VCVTMQ_M): Likewise.
9401 (VCVTNQ_M): Likewise.
9402 (VCVTPQ_M): Likewise.
9403 (VCVTQ_M_N_FROM_F): Likewise.
9404 (VCVTQ_M_FROM_F): Likewise.
9405 (VRMLALDAVHQ_P): Likewise.
9406 (VADDLVAQ_P): Likewise.
9407 (mve_vrndq_m_f<mode>): Define RTL pattern.
9408 (mve_vabsq_m_f<mode>): Likewise.
9409 (mve_vaddlvaq_p_<supf>v4si): Likewise.
9410 (mve_vcmlaq_f<mode>): Likewise.
9411 (mve_vcmlaq_rot180_f<mode>): Likewise.
9412 (mve_vcmlaq_rot270_f<mode>): Likewise.
9413 (mve_vcmlaq_rot90_f<mode>): Likewise.
9414 (mve_vcmpeqq_m_n_f<mode>): Likewise.
9415 (mve_vcmpgeq_m_f<mode>): Likewise.
9416 (mve_vcmpgeq_m_n_f<mode>): Likewise.
9417 (mve_vcmpgtq_m_f<mode>): Likewise.
9418 (mve_vcmpgtq_m_n_f<mode>): Likewise.
9419 (mve_vcmpleq_m_f<mode>): Likewise.
9420 (mve_vcmpleq_m_n_f<mode>): Likewise.
9421 (mve_vcmpltq_m_f<mode>): Likewise.
9422 (mve_vcmpltq_m_n_f<mode>): Likewise.
9423 (mve_vcmpneq_m_f<mode>): Likewise.
9424 (mve_vcmpneq_m_n_f<mode>): Likewise.
9425 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
9426 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
9427 (mve_vcvttq_m_f16_f32v8hf): Likewise.
9428 (mve_vcvttq_m_f32_f16v4sf): Likewise.
9429 (mve_vdupq_m_n_f<mode>): Likewise.
9430 (mve_vfmaq_f<mode>): Likewise.
9431 (mve_vfmaq_n_f<mode>): Likewise.
9432 (mve_vfmasq_n_f<mode>): Likewise.
9433 (mve_vfmsq_f<mode>): Likewise.
9434 (mve_vmaxnmaq_m_f<mode>): Likewise.
9435 (mve_vmaxnmavq_p_f<mode>): Likewise.
9436 (mve_vmaxnmvq_p_f<mode>): Likewise.
9437 (mve_vminnmaq_m_f<mode>): Likewise.
9438 (mve_vminnmavq_p_f<mode>): Likewise.
9439 (mve_vminnmvq_p_f<mode>): Likewise.
9440 (mve_vmlaldavaq_<supf><mode>): Likewise.
9441 (mve_vmlaldavaxq_<supf><mode>): Likewise.
9442 (mve_vmlaldavq_p_<supf><mode>): Likewise.
9443 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
9444 (mve_vmlsldavaq_s<mode>): Likewise.
9445 (mve_vmlsldavaxq_s<mode>): Likewise.
9446 (mve_vmlsldavq_p_s<mode>): Likewise.
9447 (mve_vmlsldavxq_p_s<mode>): Likewise.
9448 (mve_vmovlbq_m_<supf><mode>): Likewise.
9449 (mve_vmovltq_m_<supf><mode>): Likewise.
9450 (mve_vmovnbq_m_<supf><mode>): Likewise.
9451 (mve_vmovntq_m_<supf><mode>): Likewise.
9452 (mve_vmvnq_m_n_<supf><mode>): Likewise.
9453 (mve_vnegq_m_f<mode>): Likewise.
9454 (mve_vorrq_m_n_<supf><mode>): Likewise.
9455 (mve_vpselq_f<mode>): Likewise.
9456 (mve_vqmovnbq_m_<supf><mode>): Likewise.
9457 (mve_vqmovntq_m_<supf><mode>): Likewise.
9458 (mve_vqmovunbq_m_s<mode>): Likewise.
9459 (mve_vqmovuntq_m_s<mode>): Likewise.
9460 (mve_vqrshrntq_n_<supf><mode>): Likewise.
9461 (mve_vqrshruntq_n_s<mode>): Likewise.
9462 (mve_vqshrnbq_n_<supf><mode>): Likewise.
9463 (mve_vqshrntq_n_<supf><mode>): Likewise.
9464 (mve_vqshrunbq_n_s<mode>): Likewise.
9465 (mve_vqshruntq_n_s<mode>): Likewise.
9466 (mve_vrev32q_m_fv8hf): Likewise.
9467 (mve_vrev32q_m_<supf><mode>): Likewise.
9468 (mve_vrev64q_m_f<mode>): Likewise.
9469 (mve_vrmlaldavhaxq_sv4si): Likewise.
9470 (mve_vrmlaldavhxq_p_sv4si): Likewise.
9471 (mve_vrmlsldavhaxq_sv4si): Likewise.
9472 (mve_vrmlsldavhq_p_sv4si): Likewise.
9473 (mve_vrmlsldavhxq_p_sv4si): Likewise.
9474 (mve_vrndaq_m_f<mode>): Likewise.
9475 (mve_vrndmq_m_f<mode>): Likewise.
9476 (mve_vrndnq_m_f<mode>): Likewise.
9477 (mve_vrndpq_m_f<mode>): Likewise.
9478 (mve_vrndxq_m_f<mode>): Likewise.
9479 (mve_vrshrnbq_n_<supf><mode>): Likewise.
9480 (mve_vrshrntq_n_<supf><mode>): Likewise.
9481 (mve_vshrnbq_n_<supf><mode>): Likewise.
9482 (mve_vshrntq_n_<supf><mode>): Likewise.
9483 (mve_vcvtmq_m_<supf><mode>): Likewise.
9484 (mve_vcvtpq_m_<supf><mode>): Likewise.
9485 (mve_vcvtnq_m_<supf><mode>): Likewise.
9486 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
9487 (mve_vrev16q_m_<supf>v16qi): Likewise.
9488 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
9489 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
9490 (mve_vrmlsldavhaq_sv4si): Likewise.
9492 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9493 Mihail Ionescu <mihail.ionescu@arm.com>
9494 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9496 * config/arm/arm_mve.h (vpselq_u8): Define macro.
9497 (vpselq_s8): Likewise.
9498 (vrev64q_m_u8): Likewise.
9499 (vqrdmlashq_n_u8): Likewise.
9500 (vqrdmlahq_n_u8): Likewise.
9501 (vqdmlahq_n_u8): Likewise.
9502 (vmvnq_m_u8): Likewise.
9503 (vmlasq_n_u8): Likewise.
9504 (vmlaq_n_u8): Likewise.
9505 (vmladavq_p_u8): Likewise.
9506 (vmladavaq_u8): Likewise.
9507 (vminvq_p_u8): Likewise.
9508 (vmaxvq_p_u8): Likewise.
9509 (vdupq_m_n_u8): Likewise.
9510 (vcmpneq_m_u8): Likewise.
9511 (vcmpneq_m_n_u8): Likewise.
9512 (vcmphiq_m_u8): Likewise.
9513 (vcmphiq_m_n_u8): Likewise.
9514 (vcmpeqq_m_u8): Likewise.
9515 (vcmpeqq_m_n_u8): Likewise.
9516 (vcmpcsq_m_u8): Likewise.
9517 (vcmpcsq_m_n_u8): Likewise.
9518 (vclzq_m_u8): Likewise.
9519 (vaddvaq_p_u8): Likewise.
9520 (vsriq_n_u8): Likewise.
9521 (vsliq_n_u8): Likewise.
9522 (vshlq_m_r_u8): Likewise.
9523 (vrshlq_m_n_u8): Likewise.
9524 (vqshlq_m_r_u8): Likewise.
9525 (vqrshlq_m_n_u8): Likewise.
9526 (vminavq_p_s8): Likewise.
9527 (vminaq_m_s8): Likewise.
9528 (vmaxavq_p_s8): Likewise.
9529 (vmaxaq_m_s8): Likewise.
9530 (vcmpneq_m_s8): Likewise.
9531 (vcmpneq_m_n_s8): Likewise.
9532 (vcmpltq_m_s8): Likewise.
9533 (vcmpltq_m_n_s8): Likewise.
9534 (vcmpleq_m_s8): Likewise.
9535 (vcmpleq_m_n_s8): Likewise.
9536 (vcmpgtq_m_s8): Likewise.
9537 (vcmpgtq_m_n_s8): Likewise.
9538 (vcmpgeq_m_s8): Likewise.
9539 (vcmpgeq_m_n_s8): Likewise.
9540 (vcmpeqq_m_s8): Likewise.
9541 (vcmpeqq_m_n_s8): Likewise.
9542 (vshlq_m_r_s8): Likewise.
9543 (vrshlq_m_n_s8): Likewise.
9544 (vrev64q_m_s8): Likewise.
9545 (vqshlq_m_r_s8): Likewise.
9546 (vqrshlq_m_n_s8): Likewise.
9547 (vqnegq_m_s8): Likewise.
9548 (vqabsq_m_s8): Likewise.
9549 (vnegq_m_s8): Likewise.
9550 (vmvnq_m_s8): Likewise.
9551 (vmlsdavxq_p_s8): Likewise.
9552 (vmlsdavq_p_s8): Likewise.
9553 (vmladavxq_p_s8): Likewise.
9554 (vmladavq_p_s8): Likewise.
9555 (vminvq_p_s8): Likewise.
9556 (vmaxvq_p_s8): Likewise.
9557 (vdupq_m_n_s8): Likewise.
9558 (vclzq_m_s8): Likewise.
9559 (vclsq_m_s8): Likewise.
9560 (vaddvaq_p_s8): Likewise.
9561 (vabsq_m_s8): Likewise.
9562 (vqrdmlsdhxq_s8): Likewise.
9563 (vqrdmlsdhq_s8): Likewise.
9564 (vqrdmlashq_n_s8): Likewise.
9565 (vqrdmlahq_n_s8): Likewise.
9566 (vqrdmladhxq_s8): Likewise.
9567 (vqrdmladhq_s8): Likewise.
9568 (vqdmlsdhxq_s8): Likewise.
9569 (vqdmlsdhq_s8): Likewise.
9570 (vqdmlahq_n_s8): Likewise.
9571 (vqdmladhxq_s8): Likewise.
9572 (vqdmladhq_s8): Likewise.
9573 (vmlsdavaxq_s8): Likewise.
9574 (vmlsdavaq_s8): Likewise.
9575 (vmlasq_n_s8): Likewise.
9576 (vmlaq_n_s8): Likewise.
9577 (vmladavaxq_s8): Likewise.
9578 (vmladavaq_s8): Likewise.
9579 (vsriq_n_s8): Likewise.
9580 (vsliq_n_s8): Likewise.
9581 (vpselq_u16): Likewise.
9582 (vpselq_s16): Likewise.
9583 (vrev64q_m_u16): Likewise.
9584 (vqrdmlashq_n_u16): Likewise.
9585 (vqrdmlahq_n_u16): Likewise.
9586 (vqdmlahq_n_u16): Likewise.
9587 (vmvnq_m_u16): Likewise.
9588 (vmlasq_n_u16): Likewise.
9589 (vmlaq_n_u16): Likewise.
9590 (vmladavq_p_u16): Likewise.
9591 (vmladavaq_u16): Likewise.
9592 (vminvq_p_u16): Likewise.
9593 (vmaxvq_p_u16): Likewise.
9594 (vdupq_m_n_u16): Likewise.
9595 (vcmpneq_m_u16): Likewise.
9596 (vcmpneq_m_n_u16): Likewise.
9597 (vcmphiq_m_u16): Likewise.
9598 (vcmphiq_m_n_u16): Likewise.
9599 (vcmpeqq_m_u16): Likewise.
9600 (vcmpeqq_m_n_u16): Likewise.
9601 (vcmpcsq_m_u16): Likewise.
9602 (vcmpcsq_m_n_u16): Likewise.
9603 (vclzq_m_u16): Likewise.
9604 (vaddvaq_p_u16): Likewise.
9605 (vsriq_n_u16): Likewise.
9606 (vsliq_n_u16): Likewise.
9607 (vshlq_m_r_u16): Likewise.
9608 (vrshlq_m_n_u16): Likewise.
9609 (vqshlq_m_r_u16): Likewise.
9610 (vqrshlq_m_n_u16): Likewise.
9611 (vminavq_p_s16): Likewise.
9612 (vminaq_m_s16): Likewise.
9613 (vmaxavq_p_s16): Likewise.
9614 (vmaxaq_m_s16): Likewise.
9615 (vcmpneq_m_s16): Likewise.
9616 (vcmpneq_m_n_s16): Likewise.
9617 (vcmpltq_m_s16): Likewise.
9618 (vcmpltq_m_n_s16): Likewise.
9619 (vcmpleq_m_s16): Likewise.
9620 (vcmpleq_m_n_s16): Likewise.
9621 (vcmpgtq_m_s16): Likewise.
9622 (vcmpgtq_m_n_s16): Likewise.
9623 (vcmpgeq_m_s16): Likewise.
9624 (vcmpgeq_m_n_s16): Likewise.
9625 (vcmpeqq_m_s16): Likewise.
9626 (vcmpeqq_m_n_s16): Likewise.
9627 (vshlq_m_r_s16): Likewise.
9628 (vrshlq_m_n_s16): Likewise.
9629 (vrev64q_m_s16): Likewise.
9630 (vqshlq_m_r_s16): Likewise.
9631 (vqrshlq_m_n_s16): Likewise.
9632 (vqnegq_m_s16): Likewise.
9633 (vqabsq_m_s16): Likewise.
9634 (vnegq_m_s16): Likewise.
9635 (vmvnq_m_s16): Likewise.
9636 (vmlsdavxq_p_s16): Likewise.
9637 (vmlsdavq_p_s16): Likewise.
9638 (vmladavxq_p_s16): Likewise.
9639 (vmladavq_p_s16): Likewise.
9640 (vminvq_p_s16): Likewise.
9641 (vmaxvq_p_s16): Likewise.
9642 (vdupq_m_n_s16): Likewise.
9643 (vclzq_m_s16): Likewise.
9644 (vclsq_m_s16): Likewise.
9645 (vaddvaq_p_s16): Likewise.
9646 (vabsq_m_s16): Likewise.
9647 (vqrdmlsdhxq_s16): Likewise.
9648 (vqrdmlsdhq_s16): Likewise.
9649 (vqrdmlashq_n_s16): Likewise.
9650 (vqrdmlahq_n_s16): Likewise.
9651 (vqrdmladhxq_s16): Likewise.
9652 (vqrdmladhq_s16): Likewise.
9653 (vqdmlsdhxq_s16): Likewise.
9654 (vqdmlsdhq_s16): Likewise.
9655 (vqdmlahq_n_s16): Likewise.
9656 (vqdmladhxq_s16): Likewise.
9657 (vqdmladhq_s16): Likewise.
9658 (vmlsdavaxq_s16): Likewise.
9659 (vmlsdavaq_s16): Likewise.
9660 (vmlasq_n_s16): Likewise.
9661 (vmlaq_n_s16): Likewise.
9662 (vmladavaxq_s16): Likewise.
9663 (vmladavaq_s16): Likewise.
9664 (vsriq_n_s16): Likewise.
9665 (vsliq_n_s16): Likewise.
9666 (vpselq_u32): Likewise.
9667 (vpselq_s32): Likewise.
9668 (vrev64q_m_u32): Likewise.
9669 (vqrdmlashq_n_u32): Likewise.
9670 (vqrdmlahq_n_u32): Likewise.
9671 (vqdmlahq_n_u32): Likewise.
9672 (vmvnq_m_u32): Likewise.
9673 (vmlasq_n_u32): Likewise.
9674 (vmlaq_n_u32): Likewise.
9675 (vmladavq_p_u32): Likewise.
9676 (vmladavaq_u32): Likewise.
9677 (vminvq_p_u32): Likewise.
9678 (vmaxvq_p_u32): Likewise.
9679 (vdupq_m_n_u32): Likewise.
9680 (vcmpneq_m_u32): Likewise.
9681 (vcmpneq_m_n_u32): Likewise.
9682 (vcmphiq_m_u32): Likewise.
9683 (vcmphiq_m_n_u32): Likewise.
9684 (vcmpeqq_m_u32): Likewise.
9685 (vcmpeqq_m_n_u32): Likewise.
9686 (vcmpcsq_m_u32): Likewise.
9687 (vcmpcsq_m_n_u32): Likewise.
9688 (vclzq_m_u32): Likewise.
9689 (vaddvaq_p_u32): Likewise.
9690 (vsriq_n_u32): Likewise.
9691 (vsliq_n_u32): Likewise.
9692 (vshlq_m_r_u32): Likewise.
9693 (vrshlq_m_n_u32): Likewise.
9694 (vqshlq_m_r_u32): Likewise.
9695 (vqrshlq_m_n_u32): Likewise.
9696 (vminavq_p_s32): Likewise.
9697 (vminaq_m_s32): Likewise.
9698 (vmaxavq_p_s32): Likewise.
9699 (vmaxaq_m_s32): Likewise.
9700 (vcmpneq_m_s32): Likewise.
9701 (vcmpneq_m_n_s32): Likewise.
9702 (vcmpltq_m_s32): Likewise.
9703 (vcmpltq_m_n_s32): Likewise.
9704 (vcmpleq_m_s32): Likewise.
9705 (vcmpleq_m_n_s32): Likewise.
9706 (vcmpgtq_m_s32): Likewise.
9707 (vcmpgtq_m_n_s32): Likewise.
9708 (vcmpgeq_m_s32): Likewise.
9709 (vcmpgeq_m_n_s32): Likewise.
9710 (vcmpeqq_m_s32): Likewise.
9711 (vcmpeqq_m_n_s32): Likewise.
9712 (vshlq_m_r_s32): Likewise.
9713 (vrshlq_m_n_s32): Likewise.
9714 (vrev64q_m_s32): Likewise.
9715 (vqshlq_m_r_s32): Likewise.
9716 (vqrshlq_m_n_s32): Likewise.
9717 (vqnegq_m_s32): Likewise.
9718 (vqabsq_m_s32): Likewise.
9719 (vnegq_m_s32): Likewise.
9720 (vmvnq_m_s32): Likewise.
9721 (vmlsdavxq_p_s32): Likewise.
9722 (vmlsdavq_p_s32): Likewise.
9723 (vmladavxq_p_s32): Likewise.
9724 (vmladavq_p_s32): Likewise.
9725 (vminvq_p_s32): Likewise.
9726 (vmaxvq_p_s32): Likewise.
9727 (vdupq_m_n_s32): Likewise.
9728 (vclzq_m_s32): Likewise.
9729 (vclsq_m_s32): Likewise.
9730 (vaddvaq_p_s32): Likewise.
9731 (vabsq_m_s32): Likewise.
9732 (vqrdmlsdhxq_s32): Likewise.
9733 (vqrdmlsdhq_s32): Likewise.
9734 (vqrdmlashq_n_s32): Likewise.
9735 (vqrdmlahq_n_s32): Likewise.
9736 (vqrdmladhxq_s32): Likewise.
9737 (vqrdmladhq_s32): Likewise.
9738 (vqdmlsdhxq_s32): Likewise.
9739 (vqdmlsdhq_s32): Likewise.
9740 (vqdmlahq_n_s32): Likewise.
9741 (vqdmladhxq_s32): Likewise.
9742 (vqdmladhq_s32): Likewise.
9743 (vmlsdavaxq_s32): Likewise.
9744 (vmlsdavaq_s32): Likewise.
9745 (vmlasq_n_s32): Likewise.
9746 (vmlaq_n_s32): Likewise.
9747 (vmladavaxq_s32): Likewise.
9748 (vmladavaq_s32): Likewise.
9749 (vsriq_n_s32): Likewise.
9750 (vsliq_n_s32): Likewise.
9751 (vpselq_u64): Likewise.
9752 (vpselq_s64): Likewise.
9753 (__arm_vpselq_u8): Define intrinsic.
9754 (__arm_vpselq_s8): Likewise.
9755 (__arm_vrev64q_m_u8): Likewise.
9756 (__arm_vqrdmlashq_n_u8): Likewise.
9757 (__arm_vqrdmlahq_n_u8): Likewise.
9758 (__arm_vqdmlahq_n_u8): Likewise.
9759 (__arm_vmvnq_m_u8): Likewise.
9760 (__arm_vmlasq_n_u8): Likewise.
9761 (__arm_vmlaq_n_u8): Likewise.
9762 (__arm_vmladavq_p_u8): Likewise.
9763 (__arm_vmladavaq_u8): Likewise.
9764 (__arm_vminvq_p_u8): Likewise.
9765 (__arm_vmaxvq_p_u8): Likewise.
9766 (__arm_vdupq_m_n_u8): Likewise.
9767 (__arm_vcmpneq_m_u8): Likewise.
9768 (__arm_vcmpneq_m_n_u8): Likewise.
9769 (__arm_vcmphiq_m_u8): Likewise.
9770 (__arm_vcmphiq_m_n_u8): Likewise.
9771 (__arm_vcmpeqq_m_u8): Likewise.
9772 (__arm_vcmpeqq_m_n_u8): Likewise.
9773 (__arm_vcmpcsq_m_u8): Likewise.
9774 (__arm_vcmpcsq_m_n_u8): Likewise.
9775 (__arm_vclzq_m_u8): Likewise.
9776 (__arm_vaddvaq_p_u8): Likewise.
9777 (__arm_vsriq_n_u8): Likewise.
9778 (__arm_vsliq_n_u8): Likewise.
9779 (__arm_vshlq_m_r_u8): Likewise.
9780 (__arm_vrshlq_m_n_u8): Likewise.
9781 (__arm_vqshlq_m_r_u8): Likewise.
9782 (__arm_vqrshlq_m_n_u8): Likewise.
9783 (__arm_vminavq_p_s8): Likewise.
9784 (__arm_vminaq_m_s8): Likewise.
9785 (__arm_vmaxavq_p_s8): Likewise.
9786 (__arm_vmaxaq_m_s8): Likewise.
9787 (__arm_vcmpneq_m_s8): Likewise.
9788 (__arm_vcmpneq_m_n_s8): Likewise.
9789 (__arm_vcmpltq_m_s8): Likewise.
9790 (__arm_vcmpltq_m_n_s8): Likewise.
9791 (__arm_vcmpleq_m_s8): Likewise.
9792 (__arm_vcmpleq_m_n_s8): Likewise.
9793 (__arm_vcmpgtq_m_s8): Likewise.
9794 (__arm_vcmpgtq_m_n_s8): Likewise.
9795 (__arm_vcmpgeq_m_s8): Likewise.
9796 (__arm_vcmpgeq_m_n_s8): Likewise.
9797 (__arm_vcmpeqq_m_s8): Likewise.
9798 (__arm_vcmpeqq_m_n_s8): Likewise.
9799 (__arm_vshlq_m_r_s8): Likewise.
9800 (__arm_vrshlq_m_n_s8): Likewise.
9801 (__arm_vrev64q_m_s8): Likewise.
9802 (__arm_vqshlq_m_r_s8): Likewise.
9803 (__arm_vqrshlq_m_n_s8): Likewise.
9804 (__arm_vqnegq_m_s8): Likewise.
9805 (__arm_vqabsq_m_s8): Likewise.
9806 (__arm_vnegq_m_s8): Likewise.
9807 (__arm_vmvnq_m_s8): Likewise.
9808 (__arm_vmlsdavxq_p_s8): Likewise.
9809 (__arm_vmlsdavq_p_s8): Likewise.
9810 (__arm_vmladavxq_p_s8): Likewise.
9811 (__arm_vmladavq_p_s8): Likewise.
9812 (__arm_vminvq_p_s8): Likewise.
9813 (__arm_vmaxvq_p_s8): Likewise.
9814 (__arm_vdupq_m_n_s8): Likewise.
9815 (__arm_vclzq_m_s8): Likewise.
9816 (__arm_vclsq_m_s8): Likewise.
9817 (__arm_vaddvaq_p_s8): Likewise.
9818 (__arm_vabsq_m_s8): Likewise.
9819 (__arm_vqrdmlsdhxq_s8): Likewise.
9820 (__arm_vqrdmlsdhq_s8): Likewise.
9821 (__arm_vqrdmlashq_n_s8): Likewise.
9822 (__arm_vqrdmlahq_n_s8): Likewise.
9823 (__arm_vqrdmladhxq_s8): Likewise.
9824 (__arm_vqrdmladhq_s8): Likewise.
9825 (__arm_vqdmlsdhxq_s8): Likewise.
9826 (__arm_vqdmlsdhq_s8): Likewise.
9827 (__arm_vqdmlahq_n_s8): Likewise.
9828 (__arm_vqdmladhxq_s8): Likewise.
9829 (__arm_vqdmladhq_s8): Likewise.
9830 (__arm_vmlsdavaxq_s8): Likewise.
9831 (__arm_vmlsdavaq_s8): Likewise.
9832 (__arm_vmlasq_n_s8): Likewise.
9833 (__arm_vmlaq_n_s8): Likewise.
9834 (__arm_vmladavaxq_s8): Likewise.
9835 (__arm_vmladavaq_s8): Likewise.
9836 (__arm_vsriq_n_s8): Likewise.
9837 (__arm_vsliq_n_s8): Likewise.
9838 (__arm_vpselq_u16): Likewise.
9839 (__arm_vpselq_s16): Likewise.
9840 (__arm_vrev64q_m_u16): Likewise.
9841 (__arm_vqrdmlashq_n_u16): Likewise.
9842 (__arm_vqrdmlahq_n_u16): Likewise.
9843 (__arm_vqdmlahq_n_u16): Likewise.
9844 (__arm_vmvnq_m_u16): Likewise.
9845 (__arm_vmlasq_n_u16): Likewise.
9846 (__arm_vmlaq_n_u16): Likewise.
9847 (__arm_vmladavq_p_u16): Likewise.
9848 (__arm_vmladavaq_u16): Likewise.
9849 (__arm_vminvq_p_u16): Likewise.
9850 (__arm_vmaxvq_p_u16): Likewise.
9851 (__arm_vdupq_m_n_u16): Likewise.
9852 (__arm_vcmpneq_m_u16): Likewise.
9853 (__arm_vcmpneq_m_n_u16): Likewise.
9854 (__arm_vcmphiq_m_u16): Likewise.
9855 (__arm_vcmphiq_m_n_u16): Likewise.
9856 (__arm_vcmpeqq_m_u16): Likewise.
9857 (__arm_vcmpeqq_m_n_u16): Likewise.
9858 (__arm_vcmpcsq_m_u16): Likewise.
9859 (__arm_vcmpcsq_m_n_u16): Likewise.
9860 (__arm_vclzq_m_u16): Likewise.
9861 (__arm_vaddvaq_p_u16): Likewise.
9862 (__arm_vsriq_n_u16): Likewise.
9863 (__arm_vsliq_n_u16): Likewise.
9864 (__arm_vshlq_m_r_u16): Likewise.
9865 (__arm_vrshlq_m_n_u16): Likewise.
9866 (__arm_vqshlq_m_r_u16): Likewise.
9867 (__arm_vqrshlq_m_n_u16): Likewise.
9868 (__arm_vminavq_p_s16): Likewise.
9869 (__arm_vminaq_m_s16): Likewise.
9870 (__arm_vmaxavq_p_s16): Likewise.
9871 (__arm_vmaxaq_m_s16): Likewise.
9872 (__arm_vcmpneq_m_s16): Likewise.
9873 (__arm_vcmpneq_m_n_s16): Likewise.
9874 (__arm_vcmpltq_m_s16): Likewise.
9875 (__arm_vcmpltq_m_n_s16): Likewise.
9876 (__arm_vcmpleq_m_s16): Likewise.
9877 (__arm_vcmpleq_m_n_s16): Likewise.
9878 (__arm_vcmpgtq_m_s16): Likewise.
9879 (__arm_vcmpgtq_m_n_s16): Likewise.
9880 (__arm_vcmpgeq_m_s16): Likewise.
9881 (__arm_vcmpgeq_m_n_s16): Likewise.
9882 (__arm_vcmpeqq_m_s16): Likewise.
9883 (__arm_vcmpeqq_m_n_s16): Likewise.
9884 (__arm_vshlq_m_r_s16): Likewise.
9885 (__arm_vrshlq_m_n_s16): Likewise.
9886 (__arm_vrev64q_m_s16): Likewise.
9887 (__arm_vqshlq_m_r_s16): Likewise.
9888 (__arm_vqrshlq_m_n_s16): Likewise.
9889 (__arm_vqnegq_m_s16): Likewise.
9890 (__arm_vqabsq_m_s16): Likewise.
9891 (__arm_vnegq_m_s16): Likewise.
9892 (__arm_vmvnq_m_s16): Likewise.
9893 (__arm_vmlsdavxq_p_s16): Likewise.
9894 (__arm_vmlsdavq_p_s16): Likewise.
9895 (__arm_vmladavxq_p_s16): Likewise.
9896 (__arm_vmladavq_p_s16): Likewise.
9897 (__arm_vminvq_p_s16): Likewise.
9898 (__arm_vmaxvq_p_s16): Likewise.
9899 (__arm_vdupq_m_n_s16): Likewise.
9900 (__arm_vclzq_m_s16): Likewise.
9901 (__arm_vclsq_m_s16): Likewise.
9902 (__arm_vaddvaq_p_s16): Likewise.
9903 (__arm_vabsq_m_s16): Likewise.
9904 (__arm_vqrdmlsdhxq_s16): Likewise.
9905 (__arm_vqrdmlsdhq_s16): Likewise.
9906 (__arm_vqrdmlashq_n_s16): Likewise.
9907 (__arm_vqrdmlahq_n_s16): Likewise.
9908 (__arm_vqrdmladhxq_s16): Likewise.
9909 (__arm_vqrdmladhq_s16): Likewise.
9910 (__arm_vqdmlsdhxq_s16): Likewise.
9911 (__arm_vqdmlsdhq_s16): Likewise.
9912 (__arm_vqdmlahq_n_s16): Likewise.
9913 (__arm_vqdmladhxq_s16): Likewise.
9914 (__arm_vqdmladhq_s16): Likewise.
9915 (__arm_vmlsdavaxq_s16): Likewise.
9916 (__arm_vmlsdavaq_s16): Likewise.
9917 (__arm_vmlasq_n_s16): Likewise.
9918 (__arm_vmlaq_n_s16): Likewise.
9919 (__arm_vmladavaxq_s16): Likewise.
9920 (__arm_vmladavaq_s16): Likewise.
9921 (__arm_vsriq_n_s16): Likewise.
9922 (__arm_vsliq_n_s16): Likewise.
9923 (__arm_vpselq_u32): Likewise.
9924 (__arm_vpselq_s32): Likewise.
9925 (__arm_vrev64q_m_u32): Likewise.
9926 (__arm_vqrdmlashq_n_u32): Likewise.
9927 (__arm_vqrdmlahq_n_u32): Likewise.
9928 (__arm_vqdmlahq_n_u32): Likewise.
9929 (__arm_vmvnq_m_u32): Likewise.
9930 (__arm_vmlasq_n_u32): Likewise.
9931 (__arm_vmlaq_n_u32): Likewise.
9932 (__arm_vmladavq_p_u32): Likewise.
9933 (__arm_vmladavaq_u32): Likewise.
9934 (__arm_vminvq_p_u32): Likewise.
9935 (__arm_vmaxvq_p_u32): Likewise.
9936 (__arm_vdupq_m_n_u32): Likewise.
9937 (__arm_vcmpneq_m_u32): Likewise.
9938 (__arm_vcmpneq_m_n_u32): Likewise.
9939 (__arm_vcmphiq_m_u32): Likewise.
9940 (__arm_vcmphiq_m_n_u32): Likewise.
9941 (__arm_vcmpeqq_m_u32): Likewise.
9942 (__arm_vcmpeqq_m_n_u32): Likewise.
9943 (__arm_vcmpcsq_m_u32): Likewise.
9944 (__arm_vcmpcsq_m_n_u32): Likewise.
9945 (__arm_vclzq_m_u32): Likewise.
9946 (__arm_vaddvaq_p_u32): Likewise.
9947 (__arm_vsriq_n_u32): Likewise.
9948 (__arm_vsliq_n_u32): Likewise.
9949 (__arm_vshlq_m_r_u32): Likewise.
9950 (__arm_vrshlq_m_n_u32): Likewise.
9951 (__arm_vqshlq_m_r_u32): Likewise.
9952 (__arm_vqrshlq_m_n_u32): Likewise.
9953 (__arm_vminavq_p_s32): Likewise.
9954 (__arm_vminaq_m_s32): Likewise.
9955 (__arm_vmaxavq_p_s32): Likewise.
9956 (__arm_vmaxaq_m_s32): Likewise.
9957 (__arm_vcmpneq_m_s32): Likewise.
9958 (__arm_vcmpneq_m_n_s32): Likewise.
9959 (__arm_vcmpltq_m_s32): Likewise.
9960 (__arm_vcmpltq_m_n_s32): Likewise.
9961 (__arm_vcmpleq_m_s32): Likewise.
9962 (__arm_vcmpleq_m_n_s32): Likewise.
9963 (__arm_vcmpgtq_m_s32): Likewise.
9964 (__arm_vcmpgtq_m_n_s32): Likewise.
9965 (__arm_vcmpgeq_m_s32): Likewise.
9966 (__arm_vcmpgeq_m_n_s32): Likewise.
9967 (__arm_vcmpeqq_m_s32): Likewise.
9968 (__arm_vcmpeqq_m_n_s32): Likewise.
9969 (__arm_vshlq_m_r_s32): Likewise.
9970 (__arm_vrshlq_m_n_s32): Likewise.
9971 (__arm_vrev64q_m_s32): Likewise.
9972 (__arm_vqshlq_m_r_s32): Likewise.
9973 (__arm_vqrshlq_m_n_s32): Likewise.
9974 (__arm_vqnegq_m_s32): Likewise.
9975 (__arm_vqabsq_m_s32): Likewise.
9976 (__arm_vnegq_m_s32): Likewise.
9977 (__arm_vmvnq_m_s32): Likewise.
9978 (__arm_vmlsdavxq_p_s32): Likewise.
9979 (__arm_vmlsdavq_p_s32): Likewise.
9980 (__arm_vmladavxq_p_s32): Likewise.
9981 (__arm_vmladavq_p_s32): Likewise.
9982 (__arm_vminvq_p_s32): Likewise.
9983 (__arm_vmaxvq_p_s32): Likewise.
9984 (__arm_vdupq_m_n_s32): Likewise.
9985 (__arm_vclzq_m_s32): Likewise.
9986 (__arm_vclsq_m_s32): Likewise.
9987 (__arm_vaddvaq_p_s32): Likewise.
9988 (__arm_vabsq_m_s32): Likewise.
9989 (__arm_vqrdmlsdhxq_s32): Likewise.
9990 (__arm_vqrdmlsdhq_s32): Likewise.
9991 (__arm_vqrdmlashq_n_s32): Likewise.
9992 (__arm_vqrdmlahq_n_s32): Likewise.
9993 (__arm_vqrdmladhxq_s32): Likewise.
9994 (__arm_vqrdmladhq_s32): Likewise.
9995 (__arm_vqdmlsdhxq_s32): Likewise.
9996 (__arm_vqdmlsdhq_s32): Likewise.
9997 (__arm_vqdmlahq_n_s32): Likewise.
9998 (__arm_vqdmladhxq_s32): Likewise.
9999 (__arm_vqdmladhq_s32): Likewise.
10000 (__arm_vmlsdavaxq_s32): Likewise.
10001 (__arm_vmlsdavaq_s32): Likewise.
10002 (__arm_vmlasq_n_s32): Likewise.
10003 (__arm_vmlaq_n_s32): Likewise.
10004 (__arm_vmladavaxq_s32): Likewise.
10005 (__arm_vmladavaq_s32): Likewise.
10006 (__arm_vsriq_n_s32): Likewise.
10007 (__arm_vsliq_n_s32): Likewise.
10008 (__arm_vpselq_u64): Likewise.
10009 (__arm_vpselq_s64): Likewise.
10010 (vcmpneq_m_n): Define polymorphic variant.
10011 (vcmpneq_m): Likewise.
10012 (vqrdmlsdhq): Likewise.
10013 (vqrdmlsdhxq): Likewise.
10014 (vqrshlq_m_n): Likewise.
10015 (vqshlq_m_r): Likewise.
10016 (vrev64q_m): Likewise.
10017 (vrshlq_m_n): Likewise.
10018 (vshlq_m_r): Likewise.
10019 (vsliq_n): Likewise.
10020 (vsriq_n): Likewise.
10021 (vqrdmlashq_n): Likewise.
10022 (vqrdmlahq): Likewise.
10023 (vqrdmladhxq): Likewise.
10024 (vqrdmladhq): Likewise.
10025 (vqnegq_m): Likewise.
10026 (vqdmlsdhxq): Likewise.
10027 (vabsq_m): Likewise.
10028 (vclsq_m): Likewise.
10029 (vclzq_m): Likewise.
10030 (vcmpgeq_m): Likewise.
10031 (vcmpgeq_m_n): Likewise.
10032 (vdupq_m_n): Likewise.
10033 (vmaxaq_m): Likewise.
10034 (vmlaq_n): Likewise.
10035 (vmlasq_n): Likewise.
10036 (vmvnq_m): Likewise.
10037 (vnegq_m): Likewise.
10038 (vpselq): Likewise.
10039 (vqdmlahq_n): Likewise.
10040 (vqrdmlahq_n): Likewise.
10041 (vqdmlsdhq): Likewise.
10042 (vqdmladhq): Likewise.
10043 (vqabsq_m): Likewise.
10044 (vminaq_m): Likewise.
10045 (vrmlaldavhaq): Likewise.
10046 (vmlsdavxq_p): Likewise.
10047 (vmlsdavq_p): Likewise.
10048 (vmlsdavaxq): Likewise.
10049 (vmlsdavaq): Likewise.
10050 (vaddvaq_p): Likewise.
10051 (vcmpcsq_m_n): Likewise.
10052 (vcmpcsq_m): Likewise.
10053 (vcmpeqq_m_n): Likewise.
10054 (vcmpeqq_m): Likewise.
10055 (vmladavxq_p): Likewise.
10056 (vmladavq_p): Likewise.
10057 (vmladavaxq): Likewise.
10058 (vmladavaq): Likewise.
10059 (vminvq_p): Likewise.
10060 (vminavq_p): Likewise.
10061 (vmaxvq_p): Likewise.
10062 (vmaxavq_p): Likewise.
10063 (vcmpltq_m_n): Likewise.
10064 (vcmpltq_m): Likewise.
10065 (vcmpleq_m): Likewise.
10066 (vcmpleq_m_n): Likewise.
10067 (vcmphiq_m_n): Likewise.
10068 (vcmphiq_m): Likewise.
10069 (vcmpgtq_m_n): Likewise.
10070 (vcmpgtq_m): Likewise.
10071 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
10073 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
10074 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
10075 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
10076 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
10077 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
10078 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
10079 * config/arm/constraints.md (Rc): Define constraint to check constant is
10080 in the range of 0 to 15.
10081 (Re): Define constraint to check constant is in the range of 0 to 31.
10082 * config/arm/mve.md (VADDVAQ_P): Define iterator.
10083 (VCLZQ_M): Likewise.
10084 (VCMPEQQ_M_N): Likewise.
10085 (VCMPEQQ_M): Likewise.
10086 (VCMPNEQ_M_N): Likewise.
10087 (VCMPNEQ_M): Likewise.
10088 (VDUPQ_M_N): Likewise.
10089 (VMAXVQ_P): Likewise.
10090 (VMINVQ_P): Likewise.
10091 (VMLADAVAQ): Likewise.
10092 (VMLADAVQ_P): Likewise.
10093 (VMLAQ_N): Likewise.
10094 (VMLASQ_N): Likewise.
10095 (VMVNQ_M): Likewise.
10096 (VPSELQ): Likewise.
10097 (VQDMLAHQ_N): Likewise.
10098 (VQRDMLAHQ_N): Likewise.
10099 (VQRDMLASHQ_N): Likewise.
10100 (VQRSHLQ_M_N): Likewise.
10101 (VQSHLQ_M_R): Likewise.
10102 (VREV64Q_M): Likewise.
10103 (VRSHLQ_M_N): Likewise.
10104 (VSHLQ_M_R): Likewise.
10105 (VSLIQ_N): Likewise.
10106 (VSRIQ_N): Likewise.
10107 (mve_vabsq_m_s<mode>): Define RTL pattern.
10108 (mve_vaddvaq_p_<supf><mode>): Likewise.
10109 (mve_vclsq_m_s<mode>): Likewise.
10110 (mve_vclzq_m_<supf><mode>): Likewise.
10111 (mve_vcmpcsq_m_n_u<mode>): Likewise.
10112 (mve_vcmpcsq_m_u<mode>): Likewise.
10113 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
10114 (mve_vcmpeqq_m_<supf><mode>): Likewise.
10115 (mve_vcmpgeq_m_n_s<mode>): Likewise.
10116 (mve_vcmpgeq_m_s<mode>): Likewise.
10117 (mve_vcmpgtq_m_n_s<mode>): Likewise.
10118 (mve_vcmpgtq_m_s<mode>): Likewise.
10119 (mve_vcmphiq_m_n_u<mode>): Likewise.
10120 (mve_vcmphiq_m_u<mode>): Likewise.
10121 (mve_vcmpleq_m_n_s<mode>): Likewise.
10122 (mve_vcmpleq_m_s<mode>): Likewise.
10123 (mve_vcmpltq_m_n_s<mode>): Likewise.
10124 (mve_vcmpltq_m_s<mode>): Likewise.
10125 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
10126 (mve_vcmpneq_m_<supf><mode>): Likewise.
10127 (mve_vdupq_m_n_<supf><mode>): Likewise.
10128 (mve_vmaxaq_m_s<mode>): Likewise.
10129 (mve_vmaxavq_p_s<mode>): Likewise.
10130 (mve_vmaxvq_p_<supf><mode>): Likewise.
10131 (mve_vminaq_m_s<mode>): Likewise.
10132 (mve_vminavq_p_s<mode>): Likewise.
10133 (mve_vminvq_p_<supf><mode>): Likewise.
10134 (mve_vmladavaq_<supf><mode>): Likewise.
10135 (mve_vmladavq_p_<supf><mode>): Likewise.
10136 (mve_vmladavxq_p_s<mode>): Likewise.
10137 (mve_vmlaq_n_<supf><mode>): Likewise.
10138 (mve_vmlasq_n_<supf><mode>): Likewise.
10139 (mve_vmlsdavq_p_s<mode>): Likewise.
10140 (mve_vmlsdavxq_p_s<mode>): Likewise.
10141 (mve_vmvnq_m_<supf><mode>): Likewise.
10142 (mve_vnegq_m_s<mode>): Likewise.
10143 (mve_vpselq_<supf><mode>): Likewise.
10144 (mve_vqabsq_m_s<mode>): Likewise.
10145 (mve_vqdmlahq_n_<supf><mode>): Likewise.
10146 (mve_vqnegq_m_s<mode>): Likewise.
10147 (mve_vqrdmladhq_s<mode>): Likewise.
10148 (mve_vqrdmladhxq_s<mode>): Likewise.
10149 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
10150 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
10151 (mve_vqrdmlsdhq_s<mode>): Likewise.
10152 (mve_vqrdmlsdhxq_s<mode>): Likewise.
10153 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
10154 (mve_vqshlq_m_r_<supf><mode>): Likewise.
10155 (mve_vrev64q_m_<supf><mode>): Likewise.
10156 (mve_vrshlq_m_n_<supf><mode>): Likewise.
10157 (mve_vshlq_m_r_<supf><mode>): Likewise.
10158 (mve_vsliq_n_<supf><mode>): Likewise.
10159 (mve_vsriq_n_<supf><mode>): Likewise.
10160 (mve_vqdmlsdhxq_s<mode>): Likewise.
10161 (mve_vqdmlsdhq_s<mode>): Likewise.
10162 (mve_vqdmladhxq_s<mode>): Likewise.
10163 (mve_vqdmladhq_s<mode>): Likewise.
10164 (mve_vmlsdavaxq_s<mode>): Likewise.
10165 (mve_vmlsdavaq_s<mode>): Likewise.
10166 (mve_vmladavaxq_s<mode>): Likewise.
10167 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
10168 matching constraint Rc.
10169 (mve_imm_31): Define predicate to check the matching constraint Re.
10171 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10173 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
10174 (vec_cmp<mode>di_dup): Likewise.
10175 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
10177 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10179 * config/gcn/gcn-valu.md (COND_MODE): Delete.
10180 (COND_INT_MODE): Delete.
10181 (cond_op): Add "mult".
10182 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
10183 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
10185 2020-03-18 Richard Biener <rguenther@suse.de>
10187 PR middle-end/94206
10188 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
10189 partial int modes or not mode-precision integer types for
10192 2020-03-18 Jakub Jelinek <jakub@redhat.com>
10194 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
10196 * config/arc/arc.c (frame_stack_add): Likewise.
10197 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
10199 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
10200 * tree-ssa-strlen.h (handle_printf_call): Likewise.
10201 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
10202 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
10204 2020-03-18 Duan bo <duanbo3@huawei.com>
10207 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
10208 (@ldr_got_tiny_<mode>): New pattern.
10209 (ldr_got_tiny_sidi): Likewise.
10210 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
10211 them to handle SYMBOL_TINY_GOT for ILP32.
10213 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
10215 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
10216 call-preserved for SVE PCS functions.
10217 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
10218 Optimize the case in which there are no following vector save slots.
10220 2020-03-18 Richard Biener <rguenther@suse.de>
10222 PR middle-end/94188
10223 * fold-const.c (build_fold_addr_expr): Convert address to
10225 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
10226 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
10227 to build the ADDR_EXPR which we don't really want to simplify.
10228 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
10229 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
10230 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
10231 (simplify_builtin_call): Strip useless type conversions.
10232 * tree-ssa-strlen.c (new_strinfo): Likewise.
10234 2020-03-17 Alexey Neyman <stilor@att.net>
10237 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
10238 the debug level is terse and the declaration is public. Do not
10239 generate type info.
10240 (dwarf2out_decl): Same.
10241 (add_type_attribute): Return immediately if debug level is
10244 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
10246 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
10248 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10249 Mihail Ionescu <mihail.ionescu@arm.com>
10250 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10252 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
10253 Define qualifier for ternary operands.
10254 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10255 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10256 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10257 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10258 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10259 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10260 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10261 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10262 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10263 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10264 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10265 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10266 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10267 * config/arm/arm_mve.h (vabavq_s8): Define macro.
10268 (vabavq_s16): Likewise.
10269 (vabavq_s32): Likewise.
10270 (vbicq_m_n_s16): Likewise.
10271 (vbicq_m_n_s32): Likewise.
10272 (vbicq_m_n_u16): Likewise.
10273 (vbicq_m_n_u32): Likewise.
10274 (vcmpeqq_m_f16): Likewise.
10275 (vcmpeqq_m_f32): Likewise.
10276 (vcvtaq_m_s16_f16): Likewise.
10277 (vcvtaq_m_u16_f16): Likewise.
10278 (vcvtaq_m_s32_f32): Likewise.
10279 (vcvtaq_m_u32_f32): Likewise.
10280 (vcvtq_m_f16_s16): Likewise.
10281 (vcvtq_m_f16_u16): Likewise.
10282 (vcvtq_m_f32_s32): Likewise.
10283 (vcvtq_m_f32_u32): Likewise.
10284 (vqrshrnbq_n_s16): Likewise.
10285 (vqrshrnbq_n_u16): Likewise.
10286 (vqrshrnbq_n_s32): Likewise.
10287 (vqrshrnbq_n_u32): Likewise.
10288 (vqrshrunbq_n_s16): Likewise.
10289 (vqrshrunbq_n_s32): Likewise.
10290 (vrmlaldavhaq_s32): Likewise.
10291 (vrmlaldavhaq_u32): Likewise.
10292 (vshlcq_s8): Likewise.
10293 (vshlcq_u8): Likewise.
10294 (vshlcq_s16): Likewise.
10295 (vshlcq_u16): Likewise.
10296 (vshlcq_s32): Likewise.
10297 (vshlcq_u32): Likewise.
10298 (vabavq_u8): Likewise.
10299 (vabavq_u16): Likewise.
10300 (vabavq_u32): Likewise.
10301 (__arm_vabavq_s8): Define intrinsic.
10302 (__arm_vabavq_s16): Likewise.
10303 (__arm_vabavq_s32): Likewise.
10304 (__arm_vabavq_u8): Likewise.
10305 (__arm_vabavq_u16): Likewise.
10306 (__arm_vabavq_u32): Likewise.
10307 (__arm_vbicq_m_n_s16): Likewise.
10308 (__arm_vbicq_m_n_s32): Likewise.
10309 (__arm_vbicq_m_n_u16): Likewise.
10310 (__arm_vbicq_m_n_u32): Likewise.
10311 (__arm_vqrshrnbq_n_s16): Likewise.
10312 (__arm_vqrshrnbq_n_u16): Likewise.
10313 (__arm_vqrshrnbq_n_s32): Likewise.
10314 (__arm_vqrshrnbq_n_u32): Likewise.
10315 (__arm_vqrshrunbq_n_s16): Likewise.
10316 (__arm_vqrshrunbq_n_s32): Likewise.
10317 (__arm_vrmlaldavhaq_s32): Likewise.
10318 (__arm_vrmlaldavhaq_u32): Likewise.
10319 (__arm_vshlcq_s8): Likewise.
10320 (__arm_vshlcq_u8): Likewise.
10321 (__arm_vshlcq_s16): Likewise.
10322 (__arm_vshlcq_u16): Likewise.
10323 (__arm_vshlcq_s32): Likewise.
10324 (__arm_vshlcq_u32): Likewise.
10325 (__arm_vcmpeqq_m_f16): Likewise.
10326 (__arm_vcmpeqq_m_f32): Likewise.
10327 (__arm_vcvtaq_m_s16_f16): Likewise.
10328 (__arm_vcvtaq_m_u16_f16): Likewise.
10329 (__arm_vcvtaq_m_s32_f32): Likewise.
10330 (__arm_vcvtaq_m_u32_f32): Likewise.
10331 (__arm_vcvtq_m_f16_s16): Likewise.
10332 (__arm_vcvtq_m_f16_u16): Likewise.
10333 (__arm_vcvtq_m_f32_s32): Likewise.
10334 (__arm_vcvtq_m_f32_u32): Likewise.
10335 (vcvtaq_m): Define polymorphic variant.
10336 (vcvtq_m): Likewise.
10337 (vabavq): Likewise.
10338 (vshlcq): Likewise.
10339 (vbicq_m_n): Likewise.
10340 (vqrshrnbq_n): Likewise.
10341 (vqrshrunbq_n): Likewise.
10342 * config/arm/arm_mve_builtins.def
10343 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
10344 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10345 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10346 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10347 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10348 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10349 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10350 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10351 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10352 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10353 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10354 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10355 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10356 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10357 * config/arm/mve.md (VBICQ_M_N): Define iterator.
10358 (VCVTAQ_M): Likewise.
10359 (VCVTQ_M_TO_F): Likewise.
10360 (VQRSHRNBQ_N): Likewise.
10361 (VABAVQ): Likewise.
10362 (VSHLCQ): Likewise.
10363 (VRMLALDAVHAQ): Likewise.
10364 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
10365 (mve_vcmpeqq_m_f<mode>): Likewise.
10366 (mve_vcvtaq_m_<supf><mode>): Likewise.
10367 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
10368 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
10369 (mve_vqrshrunbq_n_s<mode>): Likewise.
10370 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
10371 (mve_vabavq_<supf><mode>): Likewise.
10372 (mve_vshlcq_<supf><mode>): Likewise.
10373 (mve_vshlcq_<supf><mode>): Likewise.
10374 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
10375 (mve_vshlcq_carry_<supf><mode>): Likewise.
10377 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10378 Mihail Ionescu <mihail.ionescu@arm.com>
10379 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10381 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
10382 (vqmovnbq_u16): Likewise.
10383 (vmulltq_poly_p8): Likewise.
10384 (vmullbq_poly_p8): Likewise.
10385 (vmovntq_u16): Likewise.
10386 (vmovnbq_u16): Likewise.
10387 (vmlaldavxq_u16): Likewise.
10388 (vmlaldavq_u16): Likewise.
10389 (vqmovuntq_s16): Likewise.
10390 (vqmovunbq_s16): Likewise.
10391 (vshlltq_n_u8): Likewise.
10392 (vshllbq_n_u8): Likewise.
10393 (vorrq_n_u16): Likewise.
10394 (vbicq_n_u16): Likewise.
10395 (vcmpneq_n_f16): Likewise.
10396 (vcmpneq_f16): Likewise.
10397 (vcmpltq_n_f16): Likewise.
10398 (vcmpltq_f16): Likewise.
10399 (vcmpleq_n_f16): Likewise.
10400 (vcmpleq_f16): Likewise.
10401 (vcmpgtq_n_f16): Likewise.
10402 (vcmpgtq_f16): Likewise.
10403 (vcmpgeq_n_f16): Likewise.
10404 (vcmpgeq_f16): Likewise.
10405 (vcmpeqq_n_f16): Likewise.
10406 (vcmpeqq_f16): Likewise.
10407 (vsubq_f16): Likewise.
10408 (vqmovntq_s16): Likewise.
10409 (vqmovnbq_s16): Likewise.
10410 (vqdmulltq_s16): Likewise.
10411 (vqdmulltq_n_s16): Likewise.
10412 (vqdmullbq_s16): Likewise.
10413 (vqdmullbq_n_s16): Likewise.
10414 (vorrq_f16): Likewise.
10415 (vornq_f16): Likewise.
10416 (vmulq_n_f16): Likewise.
10417 (vmulq_f16): Likewise.
10418 (vmovntq_s16): Likewise.
10419 (vmovnbq_s16): Likewise.
10420 (vmlsldavxq_s16): Likewise.
10421 (vmlsldavq_s16): Likewise.
10422 (vmlaldavxq_s16): Likewise.
10423 (vmlaldavq_s16): Likewise.
10424 (vminnmvq_f16): Likewise.
10425 (vminnmq_f16): Likewise.
10426 (vminnmavq_f16): Likewise.
10427 (vminnmaq_f16): Likewise.
10428 (vmaxnmvq_f16): Likewise.
10429 (vmaxnmq_f16): Likewise.
10430 (vmaxnmavq_f16): Likewise.
10431 (vmaxnmaq_f16): Likewise.
10432 (veorq_f16): Likewise.
10433 (vcmulq_rot90_f16): Likewise.
10434 (vcmulq_rot270_f16): Likewise.
10435 (vcmulq_rot180_f16): Likewise.
10436 (vcmulq_f16): Likewise.
10437 (vcaddq_rot90_f16): Likewise.
10438 (vcaddq_rot270_f16): Likewise.
10439 (vbicq_f16): Likewise.
10440 (vandq_f16): Likewise.
10441 (vaddq_n_f16): Likewise.
10442 (vabdq_f16): Likewise.
10443 (vshlltq_n_s8): Likewise.
10444 (vshllbq_n_s8): Likewise.
10445 (vorrq_n_s16): Likewise.
10446 (vbicq_n_s16): Likewise.
10447 (vqmovntq_u32): Likewise.
10448 (vqmovnbq_u32): Likewise.
10449 (vmulltq_poly_p16): Likewise.
10450 (vmullbq_poly_p16): Likewise.
10451 (vmovntq_u32): Likewise.
10452 (vmovnbq_u32): Likewise.
10453 (vmlaldavxq_u32): Likewise.
10454 (vmlaldavq_u32): Likewise.
10455 (vqmovuntq_s32): Likewise.
10456 (vqmovunbq_s32): Likewise.
10457 (vshlltq_n_u16): Likewise.
10458 (vshllbq_n_u16): Likewise.
10459 (vorrq_n_u32): Likewise.
10460 (vbicq_n_u32): Likewise.
10461 (vcmpneq_n_f32): Likewise.
10462 (vcmpneq_f32): Likewise.
10463 (vcmpltq_n_f32): Likewise.
10464 (vcmpltq_f32): Likewise.
10465 (vcmpleq_n_f32): Likewise.
10466 (vcmpleq_f32): Likewise.
10467 (vcmpgtq_n_f32): Likewise.
10468 (vcmpgtq_f32): Likewise.
10469 (vcmpgeq_n_f32): Likewise.
10470 (vcmpgeq_f32): Likewise.
10471 (vcmpeqq_n_f32): Likewise.
10472 (vcmpeqq_f32): Likewise.
10473 (vsubq_f32): Likewise.
10474 (vqmovntq_s32): Likewise.
10475 (vqmovnbq_s32): Likewise.
10476 (vqdmulltq_s32): Likewise.
10477 (vqdmulltq_n_s32): Likewise.
10478 (vqdmullbq_s32): Likewise.
10479 (vqdmullbq_n_s32): Likewise.
10480 (vorrq_f32): Likewise.
10481 (vornq_f32): Likewise.
10482 (vmulq_n_f32): Likewise.
10483 (vmulq_f32): Likewise.
10484 (vmovntq_s32): Likewise.
10485 (vmovnbq_s32): Likewise.
10486 (vmlsldavxq_s32): Likewise.
10487 (vmlsldavq_s32): Likewise.
10488 (vmlaldavxq_s32): Likewise.
10489 (vmlaldavq_s32): Likewise.
10490 (vminnmvq_f32): Likewise.
10491 (vminnmq_f32): Likewise.
10492 (vminnmavq_f32): Likewise.
10493 (vminnmaq_f32): Likewise.
10494 (vmaxnmvq_f32): Likewise.
10495 (vmaxnmq_f32): Likewise.
10496 (vmaxnmavq_f32): Likewise.
10497 (vmaxnmaq_f32): Likewise.
10498 (veorq_f32): Likewise.
10499 (vcmulq_rot90_f32): Likewise.
10500 (vcmulq_rot270_f32): Likewise.
10501 (vcmulq_rot180_f32): Likewise.
10502 (vcmulq_f32): Likewise.
10503 (vcaddq_rot90_f32): Likewise.
10504 (vcaddq_rot270_f32): Likewise.
10505 (vbicq_f32): Likewise.
10506 (vandq_f32): Likewise.
10507 (vaddq_n_f32): Likewise.
10508 (vabdq_f32): Likewise.
10509 (vshlltq_n_s16): Likewise.
10510 (vshllbq_n_s16): Likewise.
10511 (vorrq_n_s32): Likewise.
10512 (vbicq_n_s32): Likewise.
10513 (vrmlaldavhq_u32): Likewise.
10514 (vctp8q_m): Likewise.
10515 (vctp64q_m): Likewise.
10516 (vctp32q_m): Likewise.
10517 (vctp16q_m): Likewise.
10518 (vaddlvaq_u32): Likewise.
10519 (vrmlsldavhxq_s32): Likewise.
10520 (vrmlsldavhq_s32): Likewise.
10521 (vrmlaldavhxq_s32): Likewise.
10522 (vrmlaldavhq_s32): Likewise.
10523 (vcvttq_f16_f32): Likewise.
10524 (vcvtbq_f16_f32): Likewise.
10525 (vaddlvaq_s32): Likewise.
10526 (__arm_vqmovntq_u16): Define intrinsic.
10527 (__arm_vqmovnbq_u16): Likewise.
10528 (__arm_vmulltq_poly_p8): Likewise.
10529 (__arm_vmullbq_poly_p8): Likewise.
10530 (__arm_vmovntq_u16): Likewise.
10531 (__arm_vmovnbq_u16): Likewise.
10532 (__arm_vmlaldavxq_u16): Likewise.
10533 (__arm_vmlaldavq_u16): Likewise.
10534 (__arm_vqmovuntq_s16): Likewise.
10535 (__arm_vqmovunbq_s16): Likewise.
10536 (__arm_vshlltq_n_u8): Likewise.
10537 (__arm_vshllbq_n_u8): Likewise.
10538 (__arm_vorrq_n_u16): Likewise.
10539 (__arm_vbicq_n_u16): Likewise.
10540 (__arm_vcmpneq_n_f16): Likewise.
10541 (__arm_vcmpneq_f16): Likewise.
10542 (__arm_vcmpltq_n_f16): Likewise.
10543 (__arm_vcmpltq_f16): Likewise.
10544 (__arm_vcmpleq_n_f16): Likewise.
10545 (__arm_vcmpleq_f16): Likewise.
10546 (__arm_vcmpgtq_n_f16): Likewise.
10547 (__arm_vcmpgtq_f16): Likewise.
10548 (__arm_vcmpgeq_n_f16): Likewise.
10549 (__arm_vcmpgeq_f16): Likewise.
10550 (__arm_vcmpeqq_n_f16): Likewise.
10551 (__arm_vcmpeqq_f16): Likewise.
10552 (__arm_vsubq_f16): Likewise.
10553 (__arm_vqmovntq_s16): Likewise.
10554 (__arm_vqmovnbq_s16): Likewise.
10555 (__arm_vqdmulltq_s16): Likewise.
10556 (__arm_vqdmulltq_n_s16): Likewise.
10557 (__arm_vqdmullbq_s16): Likewise.
10558 (__arm_vqdmullbq_n_s16): Likewise.
10559 (__arm_vorrq_f16): Likewise.
10560 (__arm_vornq_f16): Likewise.
10561 (__arm_vmulq_n_f16): Likewise.
10562 (__arm_vmulq_f16): Likewise.
10563 (__arm_vmovntq_s16): Likewise.
10564 (__arm_vmovnbq_s16): Likewise.
10565 (__arm_vmlsldavxq_s16): Likewise.
10566 (__arm_vmlsldavq_s16): Likewise.
10567 (__arm_vmlaldavxq_s16): Likewise.
10568 (__arm_vmlaldavq_s16): Likewise.
10569 (__arm_vminnmvq_f16): Likewise.
10570 (__arm_vminnmq_f16): Likewise.
10571 (__arm_vminnmavq_f16): Likewise.
10572 (__arm_vminnmaq_f16): Likewise.
10573 (__arm_vmaxnmvq_f16): Likewise.
10574 (__arm_vmaxnmq_f16): Likewise.
10575 (__arm_vmaxnmavq_f16): Likewise.
10576 (__arm_vmaxnmaq_f16): Likewise.
10577 (__arm_veorq_f16): Likewise.
10578 (__arm_vcmulq_rot90_f16): Likewise.
10579 (__arm_vcmulq_rot270_f16): Likewise.
10580 (__arm_vcmulq_rot180_f16): Likewise.
10581 (__arm_vcmulq_f16): Likewise.
10582 (__arm_vcaddq_rot90_f16): Likewise.
10583 (__arm_vcaddq_rot270_f16): Likewise.
10584 (__arm_vbicq_f16): Likewise.
10585 (__arm_vandq_f16): Likewise.
10586 (__arm_vaddq_n_f16): Likewise.
10587 (__arm_vabdq_f16): Likewise.
10588 (__arm_vshlltq_n_s8): Likewise.
10589 (__arm_vshllbq_n_s8): Likewise.
10590 (__arm_vorrq_n_s16): Likewise.
10591 (__arm_vbicq_n_s16): Likewise.
10592 (__arm_vqmovntq_u32): Likewise.
10593 (__arm_vqmovnbq_u32): Likewise.
10594 (__arm_vmulltq_poly_p16): Likewise.
10595 (__arm_vmullbq_poly_p16): Likewise.
10596 (__arm_vmovntq_u32): Likewise.
10597 (__arm_vmovnbq_u32): Likewise.
10598 (__arm_vmlaldavxq_u32): Likewise.
10599 (__arm_vmlaldavq_u32): Likewise.
10600 (__arm_vqmovuntq_s32): Likewise.
10601 (__arm_vqmovunbq_s32): Likewise.
10602 (__arm_vshlltq_n_u16): Likewise.
10603 (__arm_vshllbq_n_u16): Likewise.
10604 (__arm_vorrq_n_u32): Likewise.
10605 (__arm_vbicq_n_u32): Likewise.
10606 (__arm_vcmpneq_n_f32): Likewise.
10607 (__arm_vcmpneq_f32): Likewise.
10608 (__arm_vcmpltq_n_f32): Likewise.
10609 (__arm_vcmpltq_f32): Likewise.
10610 (__arm_vcmpleq_n_f32): Likewise.
10611 (__arm_vcmpleq_f32): Likewise.
10612 (__arm_vcmpgtq_n_f32): Likewise.
10613 (__arm_vcmpgtq_f32): Likewise.
10614 (__arm_vcmpgeq_n_f32): Likewise.
10615 (__arm_vcmpgeq_f32): Likewise.
10616 (__arm_vcmpeqq_n_f32): Likewise.
10617 (__arm_vcmpeqq_f32): Likewise.
10618 (__arm_vsubq_f32): Likewise.
10619 (__arm_vqmovntq_s32): Likewise.
10620 (__arm_vqmovnbq_s32): Likewise.
10621 (__arm_vqdmulltq_s32): Likewise.
10622 (__arm_vqdmulltq_n_s32): Likewise.
10623 (__arm_vqdmullbq_s32): Likewise.
10624 (__arm_vqdmullbq_n_s32): Likewise.
10625 (__arm_vorrq_f32): Likewise.
10626 (__arm_vornq_f32): Likewise.
10627 (__arm_vmulq_n_f32): Likewise.
10628 (__arm_vmulq_f32): Likewise.
10629 (__arm_vmovntq_s32): Likewise.
10630 (__arm_vmovnbq_s32): Likewise.
10631 (__arm_vmlsldavxq_s32): Likewise.
10632 (__arm_vmlsldavq_s32): Likewise.
10633 (__arm_vmlaldavxq_s32): Likewise.
10634 (__arm_vmlaldavq_s32): Likewise.
10635 (__arm_vminnmvq_f32): Likewise.
10636 (__arm_vminnmq_f32): Likewise.
10637 (__arm_vminnmavq_f32): Likewise.
10638 (__arm_vminnmaq_f32): Likewise.
10639 (__arm_vmaxnmvq_f32): Likewise.
10640 (__arm_vmaxnmq_f32): Likewise.
10641 (__arm_vmaxnmavq_f32): Likewise.
10642 (__arm_vmaxnmaq_f32): Likewise.
10643 (__arm_veorq_f32): Likewise.
10644 (__arm_vcmulq_rot90_f32): Likewise.
10645 (__arm_vcmulq_rot270_f32): Likewise.
10646 (__arm_vcmulq_rot180_f32): Likewise.
10647 (__arm_vcmulq_f32): Likewise.
10648 (__arm_vcaddq_rot90_f32): Likewise.
10649 (__arm_vcaddq_rot270_f32): Likewise.
10650 (__arm_vbicq_f32): Likewise.
10651 (__arm_vandq_f32): Likewise.
10652 (__arm_vaddq_n_f32): Likewise.
10653 (__arm_vabdq_f32): Likewise.
10654 (__arm_vshlltq_n_s16): Likewise.
10655 (__arm_vshllbq_n_s16): Likewise.
10656 (__arm_vorrq_n_s32): Likewise.
10657 (__arm_vbicq_n_s32): Likewise.
10658 (__arm_vrmlaldavhq_u32): Likewise.
10659 (__arm_vctp8q_m): Likewise.
10660 (__arm_vctp64q_m): Likewise.
10661 (__arm_vctp32q_m): Likewise.
10662 (__arm_vctp16q_m): Likewise.
10663 (__arm_vaddlvaq_u32): Likewise.
10664 (__arm_vrmlsldavhxq_s32): Likewise.
10665 (__arm_vrmlsldavhq_s32): Likewise.
10666 (__arm_vrmlaldavhxq_s32): Likewise.
10667 (__arm_vrmlaldavhq_s32): Likewise.
10668 (__arm_vcvttq_f16_f32): Likewise.
10669 (__arm_vcvtbq_f16_f32): Likewise.
10670 (__arm_vaddlvaq_s32): Likewise.
10671 (vst4q): Define polymorphic variant.
10672 (vrndxq): Likewise.
10674 (vrndpq): Likewise.
10675 (vrndnq): Likewise.
10676 (vrndmq): Likewise.
10677 (vrndaq): Likewise.
10678 (vrev64q): Likewise.
10680 (vdupq_n): Likewise.
10682 (vrev32q): Likewise.
10683 (vcvtbq_f32): Likewise.
10684 (vcvttq_f32): Likewise.
10686 (vsubq_n): Likewise.
10687 (vbrsrq_n): Likewise.
10688 (vcvtq_n): Likewise.
10692 (vaddq_n): Likewise.
10696 (vmulq_n): Likewise.
10698 (vcaddq_rot270): Likewise.
10699 (vcmpeqq_n): Likewise.
10700 (vcmpeqq): Likewise.
10701 (vcaddq_rot90): Likewise.
10702 (vcmpgeq_n): Likewise.
10703 (vcmpgeq): Likewise.
10704 (vcmpgtq_n): Likewise.
10705 (vcmpgtq): Likewise.
10706 (vcmpgtq): Likewise.
10707 (vcmpleq_n): Likewise.
10708 (vcmpleq_n): Likewise.
10709 (vcmpleq): Likewise.
10710 (vcmpleq): Likewise.
10711 (vcmpltq_n): Likewise.
10712 (vcmpltq_n): Likewise.
10713 (vcmpltq): Likewise.
10714 (vcmpltq): Likewise.
10715 (vcmpneq_n): Likewise.
10716 (vcmpneq_n): Likewise.
10717 (vcmpneq): Likewise.
10718 (vcmpneq): Likewise.
10719 (vcmulq): Likewise.
10720 (vcmulq): Likewise.
10721 (vcmulq_rot180): Likewise.
10722 (vcmulq_rot180): Likewise.
10723 (vcmulq_rot270): Likewise.
10724 (vcmulq_rot270): Likewise.
10725 (vcmulq_rot90): Likewise.
10726 (vcmulq_rot90): Likewise.
10729 (vmaxnmaq): Likewise.
10730 (vmaxnmaq): Likewise.
10731 (vmaxnmavq): Likewise.
10732 (vmaxnmavq): Likewise.
10733 (vmaxnmq): Likewise.
10734 (vmaxnmq): Likewise.
10735 (vmaxnmvq): Likewise.
10736 (vmaxnmvq): Likewise.
10737 (vminnmaq): Likewise.
10738 (vminnmaq): Likewise.
10739 (vminnmavq): Likewise.
10740 (vminnmavq): Likewise.
10741 (vminnmq): Likewise.
10742 (vminnmq): Likewise.
10743 (vminnmvq): Likewise.
10744 (vminnmvq): Likewise.
10745 (vbicq_n): Likewise.
10746 (vqmovntq): Likewise.
10747 (vqmovntq): Likewise.
10748 (vqmovnbq): Likewise.
10749 (vqmovnbq): Likewise.
10750 (vmulltq_poly): Likewise.
10751 (vmulltq_poly): Likewise.
10752 (vmullbq_poly): Likewise.
10753 (vmullbq_poly): Likewise.
10754 (vmovntq): Likewise.
10755 (vmovntq): Likewise.
10756 (vmovnbq): Likewise.
10757 (vmovnbq): Likewise.
10758 (vmlaldavxq): Likewise.
10759 (vmlaldavxq): Likewise.
10760 (vqmovuntq): Likewise.
10761 (vqmovuntq): Likewise.
10762 (vshlltq_n): Likewise.
10763 (vshlltq_n): Likewise.
10764 (vshllbq_n): Likewise.
10765 (vshllbq_n): Likewise.
10766 (vorrq_n): Likewise.
10767 (vorrq_n): Likewise.
10768 (vmlaldavq): Likewise.
10769 (vmlaldavq): Likewise.
10770 (vqmovunbq): Likewise.
10771 (vqmovunbq): Likewise.
10772 (vqdmulltq_n): Likewise.
10773 (vqdmulltq_n): Likewise.
10774 (vqdmulltq): Likewise.
10775 (vqdmulltq): Likewise.
10776 (vqdmullbq_n): Likewise.
10777 (vqdmullbq_n): Likewise.
10778 (vqdmullbq): Likewise.
10779 (vqdmullbq): Likewise.
10780 (vaddlvaq): Likewise.
10781 (vaddlvaq): Likewise.
10782 (vrmlaldavhq): Likewise.
10783 (vrmlaldavhq): Likewise.
10784 (vrmlaldavhxq): Likewise.
10785 (vrmlaldavhxq): Likewise.
10786 (vrmlsldavhq): Likewise.
10787 (vrmlsldavhq): Likewise.
10788 (vrmlsldavhxq): Likewise.
10789 (vrmlsldavhxq): Likewise.
10790 (vmlsldavxq): Likewise.
10791 (vmlsldavxq): Likewise.
10792 (vmlsldavq): Likewise.
10793 (vmlsldavq): Likewise.
10794 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
10795 (BINOP_NONE_NONE_NONE): Likewise.
10796 (BINOP_UNONE_NONE_NONE): Likewise.
10797 (BINOP_UNONE_UNONE_IMM): Likewise.
10798 (BINOP_UNONE_UNONE_NONE): Likewise.
10799 (BINOP_UNONE_UNONE_UNONE): Likewise.
10800 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
10801 (mve_vaddlvaq_<supf>v4si): Likewise.
10802 (mve_vaddq_n_f<mode>): Likewise.
10803 (mve_vandq_f<mode>): Likewise.
10804 (mve_vbicq_f<mode>): Likewise.
10805 (mve_vbicq_n_<supf><mode>): Likewise.
10806 (mve_vcaddq_rot270_f<mode>): Likewise.
10807 (mve_vcaddq_rot90_f<mode>): Likewise.
10808 (mve_vcmpeqq_f<mode>): Likewise.
10809 (mve_vcmpeqq_n_f<mode>): Likewise.
10810 (mve_vcmpgeq_f<mode>): Likewise.
10811 (mve_vcmpgeq_n_f<mode>): Likewise.
10812 (mve_vcmpgtq_f<mode>): Likewise.
10813 (mve_vcmpgtq_n_f<mode>): Likewise.
10814 (mve_vcmpleq_f<mode>): Likewise.
10815 (mve_vcmpleq_n_f<mode>): Likewise.
10816 (mve_vcmpltq_f<mode>): Likewise.
10817 (mve_vcmpltq_n_f<mode>): Likewise.
10818 (mve_vcmpneq_f<mode>): Likewise.
10819 (mve_vcmpneq_n_f<mode>): Likewise.
10820 (mve_vcmulq_f<mode>): Likewise.
10821 (mve_vcmulq_rot180_f<mode>): Likewise.
10822 (mve_vcmulq_rot270_f<mode>): Likewise.
10823 (mve_vcmulq_rot90_f<mode>): Likewise.
10824 (mve_vctp<mode1>q_mhi): Likewise.
10825 (mve_vcvtbq_f16_f32v8hf): Likewise.
10826 (mve_vcvttq_f16_f32v8hf): Likewise.
10827 (mve_veorq_f<mode>): Likewise.
10828 (mve_vmaxnmaq_f<mode>): Likewise.
10829 (mve_vmaxnmavq_f<mode>): Likewise.
10830 (mve_vmaxnmq_f<mode>): Likewise.
10831 (mve_vmaxnmvq_f<mode>): Likewise.
10832 (mve_vminnmaq_f<mode>): Likewise.
10833 (mve_vminnmavq_f<mode>): Likewise.
10834 (mve_vminnmq_f<mode>): Likewise.
10835 (mve_vminnmvq_f<mode>): Likewise.
10836 (mve_vmlaldavq_<supf><mode>): Likewise.
10837 (mve_vmlaldavxq_<supf><mode>): Likewise.
10838 (mve_vmlsldavq_s<mode>): Likewise.
10839 (mve_vmlsldavxq_s<mode>): Likewise.
10840 (mve_vmovnbq_<supf><mode>): Likewise.
10841 (mve_vmovntq_<supf><mode>): Likewise.
10842 (mve_vmulq_f<mode>): Likewise.
10843 (mve_vmulq_n_f<mode>): Likewise.
10844 (mve_vornq_f<mode>): Likewise.
10845 (mve_vorrq_f<mode>): Likewise.
10846 (mve_vorrq_n_<supf><mode>): Likewise.
10847 (mve_vqdmullbq_n_s<mode>): Likewise.
10848 (mve_vqdmullbq_s<mode>): Likewise.
10849 (mve_vqdmulltq_n_s<mode>): Likewise.
10850 (mve_vqdmulltq_s<mode>): Likewise.
10851 (mve_vqmovnbq_<supf><mode>): Likewise.
10852 (mve_vqmovntq_<supf><mode>): Likewise.
10853 (mve_vqmovunbq_s<mode>): Likewise.
10854 (mve_vqmovuntq_s<mode>): Likewise.
10855 (mve_vrmlaldavhxq_sv4si): Likewise.
10856 (mve_vrmlsldavhq_sv4si): Likewise.
10857 (mve_vrmlsldavhxq_sv4si): Likewise.
10858 (mve_vshllbq_n_<supf><mode>): Likewise.
10859 (mve_vshlltq_n_<supf><mode>): Likewise.
10860 (mve_vsubq_f<mode>): Likewise.
10861 (mve_vmulltq_poly_p<mode>): Likewise.
10862 (mve_vmullbq_poly_p<mode>): Likewise.
10863 (mve_vrmlaldavhq_<supf>v4si): Likewise.
10865 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10866 Mihail Ionescu <mihail.ionescu@arm.com>
10867 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10869 * config/arm/arm_mve.h (vsubq_u8): Define macro.
10870 (vsubq_n_u8): Likewise.
10871 (vrmulhq_u8): Likewise.
10872 (vrhaddq_u8): Likewise.
10873 (vqsubq_u8): Likewise.
10874 (vqsubq_n_u8): Likewise.
10875 (vqaddq_u8): Likewise.
10876 (vqaddq_n_u8): Likewise.
10877 (vorrq_u8): Likewise.
10878 (vornq_u8): Likewise.
10879 (vmulq_u8): Likewise.
10880 (vmulq_n_u8): Likewise.
10881 (vmulltq_int_u8): Likewise.
10882 (vmullbq_int_u8): Likewise.
10883 (vmulhq_u8): Likewise.
10884 (vmladavq_u8): Likewise.
10885 (vminvq_u8): Likewise.
10886 (vminq_u8): Likewise.
10887 (vmaxvq_u8): Likewise.
10888 (vmaxq_u8): Likewise.
10889 (vhsubq_u8): Likewise.
10890 (vhsubq_n_u8): Likewise.
10891 (vhaddq_u8): Likewise.
10892 (vhaddq_n_u8): Likewise.
10893 (veorq_u8): Likewise.
10894 (vcmpneq_n_u8): Likewise.
10895 (vcmphiq_u8): Likewise.
10896 (vcmphiq_n_u8): Likewise.
10897 (vcmpeqq_u8): Likewise.
10898 (vcmpeqq_n_u8): Likewise.
10899 (vcmpcsq_u8): Likewise.
10900 (vcmpcsq_n_u8): Likewise.
10901 (vcaddq_rot90_u8): Likewise.
10902 (vcaddq_rot270_u8): Likewise.
10903 (vbicq_u8): Likewise.
10904 (vandq_u8): Likewise.
10905 (vaddvq_p_u8): Likewise.
10906 (vaddvaq_u8): Likewise.
10907 (vaddq_n_u8): Likewise.
10908 (vabdq_u8): Likewise.
10909 (vshlq_r_u8): Likewise.
10910 (vrshlq_u8): Likewise.
10911 (vrshlq_n_u8): Likewise.
10912 (vqshlq_u8): Likewise.
10913 (vqshlq_r_u8): Likewise.
10914 (vqrshlq_u8): Likewise.
10915 (vqrshlq_n_u8): Likewise.
10916 (vminavq_s8): Likewise.
10917 (vminaq_s8): Likewise.
10918 (vmaxavq_s8): Likewise.
10919 (vmaxaq_s8): Likewise.
10920 (vbrsrq_n_u8): Likewise.
10921 (vshlq_n_u8): Likewise.
10922 (vrshrq_n_u8): Likewise.
10923 (vqshlq_n_u8): Likewise.
10924 (vcmpneq_n_s8): Likewise.
10925 (vcmpltq_s8): Likewise.
10926 (vcmpltq_n_s8): Likewise.
10927 (vcmpleq_s8): Likewise.
10928 (vcmpleq_n_s8): Likewise.
10929 (vcmpgtq_s8): Likewise.
10930 (vcmpgtq_n_s8): Likewise.
10931 (vcmpgeq_s8): Likewise.
10932 (vcmpgeq_n_s8): Likewise.
10933 (vcmpeqq_s8): Likewise.
10934 (vcmpeqq_n_s8): Likewise.
10935 (vqshluq_n_s8): Likewise.
10936 (vaddvq_p_s8): Likewise.
10937 (vsubq_s8): Likewise.
10938 (vsubq_n_s8): Likewise.
10939 (vshlq_r_s8): Likewise.
10940 (vrshlq_s8): Likewise.
10941 (vrshlq_n_s8): Likewise.
10942 (vrmulhq_s8): Likewise.
10943 (vrhaddq_s8): Likewise.
10944 (vqsubq_s8): Likewise.
10945 (vqsubq_n_s8): Likewise.
10946 (vqshlq_s8): Likewise.
10947 (vqshlq_r_s8): Likewise.
10948 (vqrshlq_s8): Likewise.
10949 (vqrshlq_n_s8): Likewise.
10950 (vqrdmulhq_s8): Likewise.
10951 (vqrdmulhq_n_s8): Likewise.
10952 (vqdmulhq_s8): Likewise.
10953 (vqdmulhq_n_s8): Likewise.
10954 (vqaddq_s8): Likewise.
10955 (vqaddq_n_s8): Likewise.
10956 (vorrq_s8): Likewise.
10957 (vornq_s8): Likewise.
10958 (vmulq_s8): Likewise.
10959 (vmulq_n_s8): Likewise.
10960 (vmulltq_int_s8): Likewise.
10961 (vmullbq_int_s8): Likewise.
10962 (vmulhq_s8): Likewise.
10963 (vmlsdavxq_s8): Likewise.
10964 (vmlsdavq_s8): Likewise.
10965 (vmladavxq_s8): Likewise.
10966 (vmladavq_s8): Likewise.
10967 (vminvq_s8): Likewise.
10968 (vminq_s8): Likewise.
10969 (vmaxvq_s8): Likewise.
10970 (vmaxq_s8): Likewise.
10971 (vhsubq_s8): Likewise.
10972 (vhsubq_n_s8): Likewise.
10973 (vhcaddq_rot90_s8): Likewise.
10974 (vhcaddq_rot270_s8): Likewise.
10975 (vhaddq_s8): Likewise.
10976 (vhaddq_n_s8): Likewise.
10977 (veorq_s8): Likewise.
10978 (vcaddq_rot90_s8): Likewise.
10979 (vcaddq_rot270_s8): Likewise.
10980 (vbrsrq_n_s8): Likewise.
10981 (vbicq_s8): Likewise.
10982 (vandq_s8): Likewise.
10983 (vaddvaq_s8): Likewise.
10984 (vaddq_n_s8): Likewise.
10985 (vabdq_s8): Likewise.
10986 (vshlq_n_s8): Likewise.
10987 (vrshrq_n_s8): Likewise.
10988 (vqshlq_n_s8): Likewise.
10989 (vsubq_u16): Likewise.
10990 (vsubq_n_u16): Likewise.
10991 (vrmulhq_u16): Likewise.
10992 (vrhaddq_u16): Likewise.
10993 (vqsubq_u16): Likewise.
10994 (vqsubq_n_u16): Likewise.
10995 (vqaddq_u16): Likewise.
10996 (vqaddq_n_u16): Likewise.
10997 (vorrq_u16): Likewise.
10998 (vornq_u16): Likewise.
10999 (vmulq_u16): Likewise.
11000 (vmulq_n_u16): Likewise.
11001 (vmulltq_int_u16): Likewise.
11002 (vmullbq_int_u16): Likewise.
11003 (vmulhq_u16): Likewise.
11004 (vmladavq_u16): Likewise.
11005 (vminvq_u16): Likewise.
11006 (vminq_u16): Likewise.
11007 (vmaxvq_u16): Likewise.
11008 (vmaxq_u16): Likewise.
11009 (vhsubq_u16): Likewise.
11010 (vhsubq_n_u16): Likewise.
11011 (vhaddq_u16): Likewise.
11012 (vhaddq_n_u16): Likewise.
11013 (veorq_u16): Likewise.
11014 (vcmpneq_n_u16): Likewise.
11015 (vcmphiq_u16): Likewise.
11016 (vcmphiq_n_u16): Likewise.
11017 (vcmpeqq_u16): Likewise.
11018 (vcmpeqq_n_u16): Likewise.
11019 (vcmpcsq_u16): Likewise.
11020 (vcmpcsq_n_u16): Likewise.
11021 (vcaddq_rot90_u16): Likewise.
11022 (vcaddq_rot270_u16): Likewise.
11023 (vbicq_u16): Likewise.
11024 (vandq_u16): Likewise.
11025 (vaddvq_p_u16): Likewise.
11026 (vaddvaq_u16): Likewise.
11027 (vaddq_n_u16): Likewise.
11028 (vabdq_u16): Likewise.
11029 (vshlq_r_u16): Likewise.
11030 (vrshlq_u16): Likewise.
11031 (vrshlq_n_u16): Likewise.
11032 (vqshlq_u16): Likewise.
11033 (vqshlq_r_u16): Likewise.
11034 (vqrshlq_u16): Likewise.
11035 (vqrshlq_n_u16): Likewise.
11036 (vminavq_s16): Likewise.
11037 (vminaq_s16): Likewise.
11038 (vmaxavq_s16): Likewise.
11039 (vmaxaq_s16): Likewise.
11040 (vbrsrq_n_u16): Likewise.
11041 (vshlq_n_u16): Likewise.
11042 (vrshrq_n_u16): Likewise.
11043 (vqshlq_n_u16): Likewise.
11044 (vcmpneq_n_s16): Likewise.
11045 (vcmpltq_s16): Likewise.
11046 (vcmpltq_n_s16): Likewise.
11047 (vcmpleq_s16): Likewise.
11048 (vcmpleq_n_s16): Likewise.
11049 (vcmpgtq_s16): Likewise.
11050 (vcmpgtq_n_s16): Likewise.
11051 (vcmpgeq_s16): Likewise.
11052 (vcmpgeq_n_s16): Likewise.
11053 (vcmpeqq_s16): Likewise.
11054 (vcmpeqq_n_s16): Likewise.
11055 (vqshluq_n_s16): Likewise.
11056 (vaddvq_p_s16): Likewise.
11057 (vsubq_s16): Likewise.
11058 (vsubq_n_s16): Likewise.
11059 (vshlq_r_s16): Likewise.
11060 (vrshlq_s16): Likewise.
11061 (vrshlq_n_s16): Likewise.
11062 (vrmulhq_s16): Likewise.
11063 (vrhaddq_s16): Likewise.
11064 (vqsubq_s16): Likewise.
11065 (vqsubq_n_s16): Likewise.
11066 (vqshlq_s16): Likewise.
11067 (vqshlq_r_s16): Likewise.
11068 (vqrshlq_s16): Likewise.
11069 (vqrshlq_n_s16): Likewise.
11070 (vqrdmulhq_s16): Likewise.
11071 (vqrdmulhq_n_s16): Likewise.
11072 (vqdmulhq_s16): Likewise.
11073 (vqdmulhq_n_s16): Likewise.
11074 (vqaddq_s16): Likewise.
11075 (vqaddq_n_s16): Likewise.
11076 (vorrq_s16): Likewise.
11077 (vornq_s16): Likewise.
11078 (vmulq_s16): Likewise.
11079 (vmulq_n_s16): Likewise.
11080 (vmulltq_int_s16): Likewise.
11081 (vmullbq_int_s16): Likewise.
11082 (vmulhq_s16): Likewise.
11083 (vmlsdavxq_s16): Likewise.
11084 (vmlsdavq_s16): Likewise.
11085 (vmladavxq_s16): Likewise.
11086 (vmladavq_s16): Likewise.
11087 (vminvq_s16): Likewise.
11088 (vminq_s16): Likewise.
11089 (vmaxvq_s16): Likewise.
11090 (vmaxq_s16): Likewise.
11091 (vhsubq_s16): Likewise.
11092 (vhsubq_n_s16): Likewise.
11093 (vhcaddq_rot90_s16): Likewise.
11094 (vhcaddq_rot270_s16): Likewise.
11095 (vhaddq_s16): Likewise.
11096 (vhaddq_n_s16): Likewise.
11097 (veorq_s16): Likewise.
11098 (vcaddq_rot90_s16): Likewise.
11099 (vcaddq_rot270_s16): Likewise.
11100 (vbrsrq_n_s16): Likewise.
11101 (vbicq_s16): Likewise.
11102 (vandq_s16): Likewise.
11103 (vaddvaq_s16): Likewise.
11104 (vaddq_n_s16): Likewise.
11105 (vabdq_s16): Likewise.
11106 (vshlq_n_s16): Likewise.
11107 (vrshrq_n_s16): Likewise.
11108 (vqshlq_n_s16): Likewise.
11109 (vsubq_u32): Likewise.
11110 (vsubq_n_u32): Likewise.
11111 (vrmulhq_u32): Likewise.
11112 (vrhaddq_u32): Likewise.
11113 (vqsubq_u32): Likewise.
11114 (vqsubq_n_u32): Likewise.
11115 (vqaddq_u32): Likewise.
11116 (vqaddq_n_u32): Likewise.
11117 (vorrq_u32): Likewise.
11118 (vornq_u32): Likewise.
11119 (vmulq_u32): Likewise.
11120 (vmulq_n_u32): Likewise.
11121 (vmulltq_int_u32): Likewise.
11122 (vmullbq_int_u32): Likewise.
11123 (vmulhq_u32): Likewise.
11124 (vmladavq_u32): Likewise.
11125 (vminvq_u32): Likewise.
11126 (vminq_u32): Likewise.
11127 (vmaxvq_u32): Likewise.
11128 (vmaxq_u32): Likewise.
11129 (vhsubq_u32): Likewise.
11130 (vhsubq_n_u32): Likewise.
11131 (vhaddq_u32): Likewise.
11132 (vhaddq_n_u32): Likewise.
11133 (veorq_u32): Likewise.
11134 (vcmpneq_n_u32): Likewise.
11135 (vcmphiq_u32): Likewise.
11136 (vcmphiq_n_u32): Likewise.
11137 (vcmpeqq_u32): Likewise.
11138 (vcmpeqq_n_u32): Likewise.
11139 (vcmpcsq_u32): Likewise.
11140 (vcmpcsq_n_u32): Likewise.
11141 (vcaddq_rot90_u32): Likewise.
11142 (vcaddq_rot270_u32): Likewise.
11143 (vbicq_u32): Likewise.
11144 (vandq_u32): Likewise.
11145 (vaddvq_p_u32): Likewise.
11146 (vaddvaq_u32): Likewise.
11147 (vaddq_n_u32): Likewise.
11148 (vabdq_u32): Likewise.
11149 (vshlq_r_u32): Likewise.
11150 (vrshlq_u32): Likewise.
11151 (vrshlq_n_u32): Likewise.
11152 (vqshlq_u32): Likewise.
11153 (vqshlq_r_u32): Likewise.
11154 (vqrshlq_u32): Likewise.
11155 (vqrshlq_n_u32): Likewise.
11156 (vminavq_s32): Likewise.
11157 (vminaq_s32): Likewise.
11158 (vmaxavq_s32): Likewise.
11159 (vmaxaq_s32): Likewise.
11160 (vbrsrq_n_u32): Likewise.
11161 (vshlq_n_u32): Likewise.
11162 (vrshrq_n_u32): Likewise.
11163 (vqshlq_n_u32): Likewise.
11164 (vcmpneq_n_s32): Likewise.
11165 (vcmpltq_s32): Likewise.
11166 (vcmpltq_n_s32): Likewise.
11167 (vcmpleq_s32): Likewise.
11168 (vcmpleq_n_s32): Likewise.
11169 (vcmpgtq_s32): Likewise.
11170 (vcmpgtq_n_s32): Likewise.
11171 (vcmpgeq_s32): Likewise.
11172 (vcmpgeq_n_s32): Likewise.
11173 (vcmpeqq_s32): Likewise.
11174 (vcmpeqq_n_s32): Likewise.
11175 (vqshluq_n_s32): Likewise.
11176 (vaddvq_p_s32): Likewise.
11177 (vsubq_s32): Likewise.
11178 (vsubq_n_s32): Likewise.
11179 (vshlq_r_s32): Likewise.
11180 (vrshlq_s32): Likewise.
11181 (vrshlq_n_s32): Likewise.
11182 (vrmulhq_s32): Likewise.
11183 (vrhaddq_s32): Likewise.
11184 (vqsubq_s32): Likewise.
11185 (vqsubq_n_s32): Likewise.
11186 (vqshlq_s32): Likewise.
11187 (vqshlq_r_s32): Likewise.
11188 (vqrshlq_s32): Likewise.
11189 (vqrshlq_n_s32): Likewise.
11190 (vqrdmulhq_s32): Likewise.
11191 (vqrdmulhq_n_s32): Likewise.
11192 (vqdmulhq_s32): Likewise.
11193 (vqdmulhq_n_s32): Likewise.
11194 (vqaddq_s32): Likewise.
11195 (vqaddq_n_s32): Likewise.
11196 (vorrq_s32): Likewise.
11197 (vornq_s32): Likewise.
11198 (vmulq_s32): Likewise.
11199 (vmulq_n_s32): Likewise.
11200 (vmulltq_int_s32): Likewise.
11201 (vmullbq_int_s32): Likewise.
11202 (vmulhq_s32): Likewise.
11203 (vmlsdavxq_s32): Likewise.
11204 (vmlsdavq_s32): Likewise.
11205 (vmladavxq_s32): Likewise.
11206 (vmladavq_s32): Likewise.
11207 (vminvq_s32): Likewise.
11208 (vminq_s32): Likewise.
11209 (vmaxvq_s32): Likewise.
11210 (vmaxq_s32): Likewise.
11211 (vhsubq_s32): Likewise.
11212 (vhsubq_n_s32): Likewise.
11213 (vhcaddq_rot90_s32): Likewise.
11214 (vhcaddq_rot270_s32): Likewise.
11215 (vhaddq_s32): Likewise.
11216 (vhaddq_n_s32): Likewise.
11217 (veorq_s32): Likewise.
11218 (vcaddq_rot90_s32): Likewise.
11219 (vcaddq_rot270_s32): Likewise.
11220 (vbrsrq_n_s32): Likewise.
11221 (vbicq_s32): Likewise.
11222 (vandq_s32): Likewise.
11223 (vaddvaq_s32): Likewise.
11224 (vaddq_n_s32): Likewise.
11225 (vabdq_s32): Likewise.
11226 (vshlq_n_s32): Likewise.
11227 (vrshrq_n_s32): Likewise.
11228 (vqshlq_n_s32): Likewise.
11229 (__arm_vsubq_u8): Define intrinsic.
11230 (__arm_vsubq_n_u8): Likewise.
11231 (__arm_vrmulhq_u8): Likewise.
11232 (__arm_vrhaddq_u8): Likewise.
11233 (__arm_vqsubq_u8): Likewise.
11234 (__arm_vqsubq_n_u8): Likewise.
11235 (__arm_vqaddq_u8): Likewise.
11236 (__arm_vqaddq_n_u8): Likewise.
11237 (__arm_vorrq_u8): Likewise.
11238 (__arm_vornq_u8): Likewise.
11239 (__arm_vmulq_u8): Likewise.
11240 (__arm_vmulq_n_u8): Likewise.
11241 (__arm_vmulltq_int_u8): Likewise.
11242 (__arm_vmullbq_int_u8): Likewise.
11243 (__arm_vmulhq_u8): Likewise.
11244 (__arm_vmladavq_u8): Likewise.
11245 (__arm_vminvq_u8): Likewise.
11246 (__arm_vminq_u8): Likewise.
11247 (__arm_vmaxvq_u8): Likewise.
11248 (__arm_vmaxq_u8): Likewise.
11249 (__arm_vhsubq_u8): Likewise.
11250 (__arm_vhsubq_n_u8): Likewise.
11251 (__arm_vhaddq_u8): Likewise.
11252 (__arm_vhaddq_n_u8): Likewise.
11253 (__arm_veorq_u8): Likewise.
11254 (__arm_vcmpneq_n_u8): Likewise.
11255 (__arm_vcmphiq_u8): Likewise.
11256 (__arm_vcmphiq_n_u8): Likewise.
11257 (__arm_vcmpeqq_u8): Likewise.
11258 (__arm_vcmpeqq_n_u8): Likewise.
11259 (__arm_vcmpcsq_u8): Likewise.
11260 (__arm_vcmpcsq_n_u8): Likewise.
11261 (__arm_vcaddq_rot90_u8): Likewise.
11262 (__arm_vcaddq_rot270_u8): Likewise.
11263 (__arm_vbicq_u8): Likewise.
11264 (__arm_vandq_u8): Likewise.
11265 (__arm_vaddvq_p_u8): Likewise.
11266 (__arm_vaddvaq_u8): Likewise.
11267 (__arm_vaddq_n_u8): Likewise.
11268 (__arm_vabdq_u8): Likewise.
11269 (__arm_vshlq_r_u8): Likewise.
11270 (__arm_vrshlq_u8): Likewise.
11271 (__arm_vrshlq_n_u8): Likewise.
11272 (__arm_vqshlq_u8): Likewise.
11273 (__arm_vqshlq_r_u8): Likewise.
11274 (__arm_vqrshlq_u8): Likewise.
11275 (__arm_vqrshlq_n_u8): Likewise.
11276 (__arm_vminavq_s8): Likewise.
11277 (__arm_vminaq_s8): Likewise.
11278 (__arm_vmaxavq_s8): Likewise.
11279 (__arm_vmaxaq_s8): Likewise.
11280 (__arm_vbrsrq_n_u8): Likewise.
11281 (__arm_vshlq_n_u8): Likewise.
11282 (__arm_vrshrq_n_u8): Likewise.
11283 (__arm_vqshlq_n_u8): Likewise.
11284 (__arm_vcmpneq_n_s8): Likewise.
11285 (__arm_vcmpltq_s8): Likewise.
11286 (__arm_vcmpltq_n_s8): Likewise.
11287 (__arm_vcmpleq_s8): Likewise.
11288 (__arm_vcmpleq_n_s8): Likewise.
11289 (__arm_vcmpgtq_s8): Likewise.
11290 (__arm_vcmpgtq_n_s8): Likewise.
11291 (__arm_vcmpgeq_s8): Likewise.
11292 (__arm_vcmpgeq_n_s8): Likewise.
11293 (__arm_vcmpeqq_s8): Likewise.
11294 (__arm_vcmpeqq_n_s8): Likewise.
11295 (__arm_vqshluq_n_s8): Likewise.
11296 (__arm_vaddvq_p_s8): Likewise.
11297 (__arm_vsubq_s8): Likewise.
11298 (__arm_vsubq_n_s8): Likewise.
11299 (__arm_vshlq_r_s8): Likewise.
11300 (__arm_vrshlq_s8): Likewise.
11301 (__arm_vrshlq_n_s8): Likewise.
11302 (__arm_vrmulhq_s8): Likewise.
11303 (__arm_vrhaddq_s8): Likewise.
11304 (__arm_vqsubq_s8): Likewise.
11305 (__arm_vqsubq_n_s8): Likewise.
11306 (__arm_vqshlq_s8): Likewise.
11307 (__arm_vqshlq_r_s8): Likewise.
11308 (__arm_vqrshlq_s8): Likewise.
11309 (__arm_vqrshlq_n_s8): Likewise.
11310 (__arm_vqrdmulhq_s8): Likewise.
11311 (__arm_vqrdmulhq_n_s8): Likewise.
11312 (__arm_vqdmulhq_s8): Likewise.
11313 (__arm_vqdmulhq_n_s8): Likewise.
11314 (__arm_vqaddq_s8): Likewise.
11315 (__arm_vqaddq_n_s8): Likewise.
11316 (__arm_vorrq_s8): Likewise.
11317 (__arm_vornq_s8): Likewise.
11318 (__arm_vmulq_s8): Likewise.
11319 (__arm_vmulq_n_s8): Likewise.
11320 (__arm_vmulltq_int_s8): Likewise.
11321 (__arm_vmullbq_int_s8): Likewise.
11322 (__arm_vmulhq_s8): Likewise.
11323 (__arm_vmlsdavxq_s8): Likewise.
11324 (__arm_vmlsdavq_s8): Likewise.
11325 (__arm_vmladavxq_s8): Likewise.
11326 (__arm_vmladavq_s8): Likewise.
11327 (__arm_vminvq_s8): Likewise.
11328 (__arm_vminq_s8): Likewise.
11329 (__arm_vmaxvq_s8): Likewise.
11330 (__arm_vmaxq_s8): Likewise.
11331 (__arm_vhsubq_s8): Likewise.
11332 (__arm_vhsubq_n_s8): Likewise.
11333 (__arm_vhcaddq_rot90_s8): Likewise.
11334 (__arm_vhcaddq_rot270_s8): Likewise.
11335 (__arm_vhaddq_s8): Likewise.
11336 (__arm_vhaddq_n_s8): Likewise.
11337 (__arm_veorq_s8): Likewise.
11338 (__arm_vcaddq_rot90_s8): Likewise.
11339 (__arm_vcaddq_rot270_s8): Likewise.
11340 (__arm_vbrsrq_n_s8): Likewise.
11341 (__arm_vbicq_s8): Likewise.
11342 (__arm_vandq_s8): Likewise.
11343 (__arm_vaddvaq_s8): Likewise.
11344 (__arm_vaddq_n_s8): Likewise.
11345 (__arm_vabdq_s8): Likewise.
11346 (__arm_vshlq_n_s8): Likewise.
11347 (__arm_vrshrq_n_s8): Likewise.
11348 (__arm_vqshlq_n_s8): Likewise.
11349 (__arm_vsubq_u16): Likewise.
11350 (__arm_vsubq_n_u16): Likewise.
11351 (__arm_vrmulhq_u16): Likewise.
11352 (__arm_vrhaddq_u16): Likewise.
11353 (__arm_vqsubq_u16): Likewise.
11354 (__arm_vqsubq_n_u16): Likewise.
11355 (__arm_vqaddq_u16): Likewise.
11356 (__arm_vqaddq_n_u16): Likewise.
11357 (__arm_vorrq_u16): Likewise.
11358 (__arm_vornq_u16): Likewise.
11359 (__arm_vmulq_u16): Likewise.
11360 (__arm_vmulq_n_u16): Likewise.
11361 (__arm_vmulltq_int_u16): Likewise.
11362 (__arm_vmullbq_int_u16): Likewise.
11363 (__arm_vmulhq_u16): Likewise.
11364 (__arm_vmladavq_u16): Likewise.
11365 (__arm_vminvq_u16): Likewise.
11366 (__arm_vminq_u16): Likewise.
11367 (__arm_vmaxvq_u16): Likewise.
11368 (__arm_vmaxq_u16): Likewise.
11369 (__arm_vhsubq_u16): Likewise.
11370 (__arm_vhsubq_n_u16): Likewise.
11371 (__arm_vhaddq_u16): Likewise.
11372 (__arm_vhaddq_n_u16): Likewise.
11373 (__arm_veorq_u16): Likewise.
11374 (__arm_vcmpneq_n_u16): Likewise.
11375 (__arm_vcmphiq_u16): Likewise.
11376 (__arm_vcmphiq_n_u16): Likewise.
11377 (__arm_vcmpeqq_u16): Likewise.
11378 (__arm_vcmpeqq_n_u16): Likewise.
11379 (__arm_vcmpcsq_u16): Likewise.
11380 (__arm_vcmpcsq_n_u16): Likewise.
11381 (__arm_vcaddq_rot90_u16): Likewise.
11382 (__arm_vcaddq_rot270_u16): Likewise.
11383 (__arm_vbicq_u16): Likewise.
11384 (__arm_vandq_u16): Likewise.
11385 (__arm_vaddvq_p_u16): Likewise.
11386 (__arm_vaddvaq_u16): Likewise.
11387 (__arm_vaddq_n_u16): Likewise.
11388 (__arm_vabdq_u16): Likewise.
11389 (__arm_vshlq_r_u16): Likewise.
11390 (__arm_vrshlq_u16): Likewise.
11391 (__arm_vrshlq_n_u16): Likewise.
11392 (__arm_vqshlq_u16): Likewise.
11393 (__arm_vqshlq_r_u16): Likewise.
11394 (__arm_vqrshlq_u16): Likewise.
11395 (__arm_vqrshlq_n_u16): Likewise.
11396 (__arm_vminavq_s16): Likewise.
11397 (__arm_vminaq_s16): Likewise.
11398 (__arm_vmaxavq_s16): Likewise.
11399 (__arm_vmaxaq_s16): Likewise.
11400 (__arm_vbrsrq_n_u16): Likewise.
11401 (__arm_vshlq_n_u16): Likewise.
11402 (__arm_vrshrq_n_u16): Likewise.
11403 (__arm_vqshlq_n_u16): Likewise.
11404 (__arm_vcmpneq_n_s16): Likewise.
11405 (__arm_vcmpltq_s16): Likewise.
11406 (__arm_vcmpltq_n_s16): Likewise.
11407 (__arm_vcmpleq_s16): Likewise.
11408 (__arm_vcmpleq_n_s16): Likewise.
11409 (__arm_vcmpgtq_s16): Likewise.
11410 (__arm_vcmpgtq_n_s16): Likewise.
11411 (__arm_vcmpgeq_s16): Likewise.
11412 (__arm_vcmpgeq_n_s16): Likewise.
11413 (__arm_vcmpeqq_s16): Likewise.
11414 (__arm_vcmpeqq_n_s16): Likewise.
11415 (__arm_vqshluq_n_s16): Likewise.
11416 (__arm_vaddvq_p_s16): Likewise.
11417 (__arm_vsubq_s16): Likewise.
11418 (__arm_vsubq_n_s16): Likewise.
11419 (__arm_vshlq_r_s16): Likewise.
11420 (__arm_vrshlq_s16): Likewise.
11421 (__arm_vrshlq_n_s16): Likewise.
11422 (__arm_vrmulhq_s16): Likewise.
11423 (__arm_vrhaddq_s16): Likewise.
11424 (__arm_vqsubq_s16): Likewise.
11425 (__arm_vqsubq_n_s16): Likewise.
11426 (__arm_vqshlq_s16): Likewise.
11427 (__arm_vqshlq_r_s16): Likewise.
11428 (__arm_vqrshlq_s16): Likewise.
11429 (__arm_vqrshlq_n_s16): Likewise.
11430 (__arm_vqrdmulhq_s16): Likewise.
11431 (__arm_vqrdmulhq_n_s16): Likewise.
11432 (__arm_vqdmulhq_s16): Likewise.
11433 (__arm_vqdmulhq_n_s16): Likewise.
11434 (__arm_vqaddq_s16): Likewise.
11435 (__arm_vqaddq_n_s16): Likewise.
11436 (__arm_vorrq_s16): Likewise.
11437 (__arm_vornq_s16): Likewise.
11438 (__arm_vmulq_s16): Likewise.
11439 (__arm_vmulq_n_s16): Likewise.
11440 (__arm_vmulltq_int_s16): Likewise.
11441 (__arm_vmullbq_int_s16): Likewise.
11442 (__arm_vmulhq_s16): Likewise.
11443 (__arm_vmlsdavxq_s16): Likewise.
11444 (__arm_vmlsdavq_s16): Likewise.
11445 (__arm_vmladavxq_s16): Likewise.
11446 (__arm_vmladavq_s16): Likewise.
11447 (__arm_vminvq_s16): Likewise.
11448 (__arm_vminq_s16): Likewise.
11449 (__arm_vmaxvq_s16): Likewise.
11450 (__arm_vmaxq_s16): Likewise.
11451 (__arm_vhsubq_s16): Likewise.
11452 (__arm_vhsubq_n_s16): Likewise.
11453 (__arm_vhcaddq_rot90_s16): Likewise.
11454 (__arm_vhcaddq_rot270_s16): Likewise.
11455 (__arm_vhaddq_s16): Likewise.
11456 (__arm_vhaddq_n_s16): Likewise.
11457 (__arm_veorq_s16): Likewise.
11458 (__arm_vcaddq_rot90_s16): Likewise.
11459 (__arm_vcaddq_rot270_s16): Likewise.
11460 (__arm_vbrsrq_n_s16): Likewise.
11461 (__arm_vbicq_s16): Likewise.
11462 (__arm_vandq_s16): Likewise.
11463 (__arm_vaddvaq_s16): Likewise.
11464 (__arm_vaddq_n_s16): Likewise.
11465 (__arm_vabdq_s16): Likewise.
11466 (__arm_vshlq_n_s16): Likewise.
11467 (__arm_vrshrq_n_s16): Likewise.
11468 (__arm_vqshlq_n_s16): Likewise.
11469 (__arm_vsubq_u32): Likewise.
11470 (__arm_vsubq_n_u32): Likewise.
11471 (__arm_vrmulhq_u32): Likewise.
11472 (__arm_vrhaddq_u32): Likewise.
11473 (__arm_vqsubq_u32): Likewise.
11474 (__arm_vqsubq_n_u32): Likewise.
11475 (__arm_vqaddq_u32): Likewise.
11476 (__arm_vqaddq_n_u32): Likewise.
11477 (__arm_vorrq_u32): Likewise.
11478 (__arm_vornq_u32): Likewise.
11479 (__arm_vmulq_u32): Likewise.
11480 (__arm_vmulq_n_u32): Likewise.
11481 (__arm_vmulltq_int_u32): Likewise.
11482 (__arm_vmullbq_int_u32): Likewise.
11483 (__arm_vmulhq_u32): Likewise.
11484 (__arm_vmladavq_u32): Likewise.
11485 (__arm_vminvq_u32): Likewise.
11486 (__arm_vminq_u32): Likewise.
11487 (__arm_vmaxvq_u32): Likewise.
11488 (__arm_vmaxq_u32): Likewise.
11489 (__arm_vhsubq_u32): Likewise.
11490 (__arm_vhsubq_n_u32): Likewise.
11491 (__arm_vhaddq_u32): Likewise.
11492 (__arm_vhaddq_n_u32): Likewise.
11493 (__arm_veorq_u32): Likewise.
11494 (__arm_vcmpneq_n_u32): Likewise.
11495 (__arm_vcmphiq_u32): Likewise.
11496 (__arm_vcmphiq_n_u32): Likewise.
11497 (__arm_vcmpeqq_u32): Likewise.
11498 (__arm_vcmpeqq_n_u32): Likewise.
11499 (__arm_vcmpcsq_u32): Likewise.
11500 (__arm_vcmpcsq_n_u32): Likewise.
11501 (__arm_vcaddq_rot90_u32): Likewise.
11502 (__arm_vcaddq_rot270_u32): Likewise.
11503 (__arm_vbicq_u32): Likewise.
11504 (__arm_vandq_u32): Likewise.
11505 (__arm_vaddvq_p_u32): Likewise.
11506 (__arm_vaddvaq_u32): Likewise.
11507 (__arm_vaddq_n_u32): Likewise.
11508 (__arm_vabdq_u32): Likewise.
11509 (__arm_vshlq_r_u32): Likewise.
11510 (__arm_vrshlq_u32): Likewise.
11511 (__arm_vrshlq_n_u32): Likewise.
11512 (__arm_vqshlq_u32): Likewise.
11513 (__arm_vqshlq_r_u32): Likewise.
11514 (__arm_vqrshlq_u32): Likewise.
11515 (__arm_vqrshlq_n_u32): Likewise.
11516 (__arm_vminavq_s32): Likewise.
11517 (__arm_vminaq_s32): Likewise.
11518 (__arm_vmaxavq_s32): Likewise.
11519 (__arm_vmaxaq_s32): Likewise.
11520 (__arm_vbrsrq_n_u32): Likewise.
11521 (__arm_vshlq_n_u32): Likewise.
11522 (__arm_vrshrq_n_u32): Likewise.
11523 (__arm_vqshlq_n_u32): Likewise.
11524 (__arm_vcmpneq_n_s32): Likewise.
11525 (__arm_vcmpltq_s32): Likewise.
11526 (__arm_vcmpltq_n_s32): Likewise.
11527 (__arm_vcmpleq_s32): Likewise.
11528 (__arm_vcmpleq_n_s32): Likewise.
11529 (__arm_vcmpgtq_s32): Likewise.
11530 (__arm_vcmpgtq_n_s32): Likewise.
11531 (__arm_vcmpgeq_s32): Likewise.
11532 (__arm_vcmpgeq_n_s32): Likewise.
11533 (__arm_vcmpeqq_s32): Likewise.
11534 (__arm_vcmpeqq_n_s32): Likewise.
11535 (__arm_vqshluq_n_s32): Likewise.
11536 (__arm_vaddvq_p_s32): Likewise.
11537 (__arm_vsubq_s32): Likewise.
11538 (__arm_vsubq_n_s32): Likewise.
11539 (__arm_vshlq_r_s32): Likewise.
11540 (__arm_vrshlq_s32): Likewise.
11541 (__arm_vrshlq_n_s32): Likewise.
11542 (__arm_vrmulhq_s32): Likewise.
11543 (__arm_vrhaddq_s32): Likewise.
11544 (__arm_vqsubq_s32): Likewise.
11545 (__arm_vqsubq_n_s32): Likewise.
11546 (__arm_vqshlq_s32): Likewise.
11547 (__arm_vqshlq_r_s32): Likewise.
11548 (__arm_vqrshlq_s32): Likewise.
11549 (__arm_vqrshlq_n_s32): Likewise.
11550 (__arm_vqrdmulhq_s32): Likewise.
11551 (__arm_vqrdmulhq_n_s32): Likewise.
11552 (__arm_vqdmulhq_s32): Likewise.
11553 (__arm_vqdmulhq_n_s32): Likewise.
11554 (__arm_vqaddq_s32): Likewise.
11555 (__arm_vqaddq_n_s32): Likewise.
11556 (__arm_vorrq_s32): Likewise.
11557 (__arm_vornq_s32): Likewise.
11558 (__arm_vmulq_s32): Likewise.
11559 (__arm_vmulq_n_s32): Likewise.
11560 (__arm_vmulltq_int_s32): Likewise.
11561 (__arm_vmullbq_int_s32): Likewise.
11562 (__arm_vmulhq_s32): Likewise.
11563 (__arm_vmlsdavxq_s32): Likewise.
11564 (__arm_vmlsdavq_s32): Likewise.
11565 (__arm_vmladavxq_s32): Likewise.
11566 (__arm_vmladavq_s32): Likewise.
11567 (__arm_vminvq_s32): Likewise.
11568 (__arm_vminq_s32): Likewise.
11569 (__arm_vmaxvq_s32): Likewise.
11570 (__arm_vmaxq_s32): Likewise.
11571 (__arm_vhsubq_s32): Likewise.
11572 (__arm_vhsubq_n_s32): Likewise.
11573 (__arm_vhcaddq_rot90_s32): Likewise.
11574 (__arm_vhcaddq_rot270_s32): Likewise.
11575 (__arm_vhaddq_s32): Likewise.
11576 (__arm_vhaddq_n_s32): Likewise.
11577 (__arm_veorq_s32): Likewise.
11578 (__arm_vcaddq_rot90_s32): Likewise.
11579 (__arm_vcaddq_rot270_s32): Likewise.
11580 (__arm_vbrsrq_n_s32): Likewise.
11581 (__arm_vbicq_s32): Likewise.
11582 (__arm_vandq_s32): Likewise.
11583 (__arm_vaddvaq_s32): Likewise.
11584 (__arm_vaddq_n_s32): Likewise.
11585 (__arm_vabdq_s32): Likewise.
11586 (__arm_vshlq_n_s32): Likewise.
11587 (__arm_vrshrq_n_s32): Likewise.
11588 (__arm_vqshlq_n_s32): Likewise.
11589 (vsubq): Define polymorphic variant.
11590 (vsubq_n): Likewise.
11591 (vshlq_r): Likewise.
11592 (vrshlq_n): Likewise.
11593 (vrshlq): Likewise.
11594 (vrmulhq): Likewise.
11595 (vrhaddq): Likewise.
11596 (vqsubq_n): Likewise.
11597 (vqsubq): Likewise.
11598 (vqshlq): Likewise.
11599 (vqshlq_r): Likewise.
11600 (vqshluq): Likewise.
11601 (vrshrq_n): Likewise.
11602 (vshlq_n): Likewise.
11603 (vqshluq_n): Likewise.
11604 (vqshlq_n): Likewise.
11605 (vqrshlq_n): Likewise.
11606 (vqrshlq): Likewise.
11607 (vqrdmulhq_n): Likewise.
11608 (vqrdmulhq): Likewise.
11609 (vqdmulhq_n): Likewise.
11610 (vqdmulhq): Likewise.
11611 (vqaddq_n): Likewise.
11612 (vqaddq): Likewise.
11613 (vorrq_n): Likewise.
11616 (vmulq_n): Likewise.
11618 (vmulltq_int): Likewise.
11619 (vmullbq_int): Likewise.
11620 (vmulhq): Likewise.
11622 (vminaq): Likewise.
11624 (vmaxaq): Likewise.
11625 (vhsubq_n): Likewise.
11626 (vhsubq): Likewise.
11627 (vhcaddq_rot90): Likewise.
11628 (vhcaddq_rot270): Likewise.
11629 (vhaddq_n): Likewise.
11630 (vhaddq): Likewise.
11632 (vcaddq_rot90): Likewise.
11633 (vcaddq_rot270): Likewise.
11634 (vbrsrq_n): Likewise.
11635 (vbicq_n): Likewise.
11638 (vaddq_n): Likewise.
11641 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
11642 (BINOP_NONE_NONE_NONE): Likewise.
11643 (BINOP_NONE_NONE_UNONE): Likewise.
11644 (BINOP_UNONE_NONE_IMM): Likewise.
11645 (BINOP_UNONE_NONE_NONE): Likewise.
11646 (BINOP_UNONE_UNONE_IMM): Likewise.
11647 (BINOP_UNONE_UNONE_NONE): Likewise.
11648 (BINOP_UNONE_UNONE_UNONE): Likewise.
11649 * config/arm/constraints.md (Ra): Define constraint to check constant is
11650 in the range of 0 to 7.
11651 (Rg): Define constriant to check the constant is one among 1, 2, 4
11653 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
11654 (mve_vaddq_n_<supf>): Likewise.
11655 (mve_vaddvaq_<supf>): Likewise.
11656 (mve_vaddvq_p_<supf>): Likewise.
11657 (mve_vandq_<supf>): Likewise.
11658 (mve_vbicq_<supf>): Likewise.
11659 (mve_vbrsrq_n_<supf>): Likewise.
11660 (mve_vcaddq_rot270_<supf>): Likewise.
11661 (mve_vcaddq_rot90_<supf>): Likewise.
11662 (mve_vcmpcsq_n_u): Likewise.
11663 (mve_vcmpcsq_u): Likewise.
11664 (mve_vcmpeqq_n_<supf>): Likewise.
11665 (mve_vcmpeqq_<supf>): Likewise.
11666 (mve_vcmpgeq_n_s): Likewise.
11667 (mve_vcmpgeq_s): Likewise.
11668 (mve_vcmpgtq_n_s): Likewise.
11669 (mve_vcmpgtq_s): Likewise.
11670 (mve_vcmphiq_n_u): Likewise.
11671 (mve_vcmphiq_u): Likewise.
11672 (mve_vcmpleq_n_s): Likewise.
11673 (mve_vcmpleq_s): Likewise.
11674 (mve_vcmpltq_n_s): Likewise.
11675 (mve_vcmpltq_s): Likewise.
11676 (mve_vcmpneq_n_<supf>): Likewise.
11677 (mve_vddupq_n_u): Likewise.
11678 (mve_veorq_<supf>): Likewise.
11679 (mve_vhaddq_n_<supf>): Likewise.
11680 (mve_vhaddq_<supf>): Likewise.
11681 (mve_vhcaddq_rot270_s): Likewise.
11682 (mve_vhcaddq_rot90_s): Likewise.
11683 (mve_vhsubq_n_<supf>): Likewise.
11684 (mve_vhsubq_<supf>): Likewise.
11685 (mve_vidupq_n_u): Likewise.
11686 (mve_vmaxaq_s): Likewise.
11687 (mve_vmaxavq_s): Likewise.
11688 (mve_vmaxq_<supf>): Likewise.
11689 (mve_vmaxvq_<supf>): Likewise.
11690 (mve_vminaq_s): Likewise.
11691 (mve_vminavq_s): Likewise.
11692 (mve_vminq_<supf>): Likewise.
11693 (mve_vminvq_<supf>): Likewise.
11694 (mve_vmladavq_<supf>): Likewise.
11695 (mve_vmladavxq_s): Likewise.
11696 (mve_vmlsdavq_s): Likewise.
11697 (mve_vmlsdavxq_s): Likewise.
11698 (mve_vmulhq_<supf>): Likewise.
11699 (mve_vmullbq_int_<supf>): Likewise.
11700 (mve_vmulltq_int_<supf>): Likewise.
11701 (mve_vmulq_n_<supf>): Likewise.
11702 (mve_vmulq_<supf>): Likewise.
11703 (mve_vornq_<supf>): Likewise.
11704 (mve_vorrq_<supf>): Likewise.
11705 (mve_vqaddq_n_<supf>): Likewise.
11706 (mve_vqaddq_<supf>): Likewise.
11707 (mve_vqdmulhq_n_s): Likewise.
11708 (mve_vqdmulhq_s): Likewise.
11709 (mve_vqrdmulhq_n_s): Likewise.
11710 (mve_vqrdmulhq_s): Likewise.
11711 (mve_vqrshlq_n_<supf>): Likewise.
11712 (mve_vqrshlq_<supf>): Likewise.
11713 (mve_vqshlq_n_<supf>): Likewise.
11714 (mve_vqshlq_r_<supf>): Likewise.
11715 (mve_vqshlq_<supf>): Likewise.
11716 (mve_vqshluq_n_s): Likewise.
11717 (mve_vqsubq_n_<supf>): Likewise.
11718 (mve_vqsubq_<supf>): Likewise.
11719 (mve_vrhaddq_<supf>): Likewise.
11720 (mve_vrmulhq_<supf>): Likewise.
11721 (mve_vrshlq_n_<supf>): Likewise.
11722 (mve_vrshlq_<supf>): Likewise.
11723 (mve_vrshrq_n_<supf>): Likewise.
11724 (mve_vshlq_n_<supf>): Likewise.
11725 (mve_vshlq_r_<supf>): Likewise.
11726 (mve_vsubq_n_<supf>): Likewise.
11727 (mve_vsubq_<supf>): Likewise.
11728 * config/arm/predicates.md (mve_imm_7): Define predicate to check
11729 the matching constraint Ra.
11730 (mve_imm_selective_upto_8): Define predicate to check the matching
11733 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11734 Mihail Ionescu <mihail.ionescu@arm.com>
11735 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11737 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
11738 qualifier for binary operands.
11739 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11740 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11741 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
11742 (vaddlvq_p_u32): Likewise.
11743 (vcmpneq_s8): Likewise.
11744 (vcmpneq_s16): Likewise.
11745 (vcmpneq_s32): Likewise.
11746 (vcmpneq_u8): Likewise.
11747 (vcmpneq_u16): Likewise.
11748 (vcmpneq_u32): Likewise.
11749 (vshlq_s8): Likewise.
11750 (vshlq_s16): Likewise.
11751 (vshlq_s32): Likewise.
11752 (vshlq_u8): Likewise.
11753 (vshlq_u16): Likewise.
11754 (vshlq_u32): Likewise.
11755 (__arm_vaddlvq_p_s32): Define intrinsic.
11756 (__arm_vaddlvq_p_u32): Likewise.
11757 (__arm_vcmpneq_s8): Likewise.
11758 (__arm_vcmpneq_s16): Likewise.
11759 (__arm_vcmpneq_s32): Likewise.
11760 (__arm_vcmpneq_u8): Likewise.
11761 (__arm_vcmpneq_u16): Likewise.
11762 (__arm_vcmpneq_u32): Likewise.
11763 (__arm_vshlq_s8): Likewise.
11764 (__arm_vshlq_s16): Likewise.
11765 (__arm_vshlq_s32): Likewise.
11766 (__arm_vshlq_u8): Likewise.
11767 (__arm_vshlq_u16): Likewise.
11768 (__arm_vshlq_u32): Likewise.
11769 (vaddlvq_p): Define polymorphic variant.
11770 (vcmpneq): Likewise.
11772 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
11774 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11775 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11776 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
11777 (mve_vcmpneq_<supf><mode>): Likewise.
11778 (mve_vshlq_<supf><mode>): Likewise.
11780 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11781 Mihail Ionescu <mihail.ionescu@arm.com>
11782 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11784 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
11785 qualifier for binary operands.
11786 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11787 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11788 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
11789 (vcvtq_n_s32_f32): Likewise.
11790 (vcvtq_n_u16_f16): Likewise.
11791 (vcvtq_n_u32_f32): Likewise.
11792 (vcreateq_u8): Likewise.
11793 (vcreateq_u16): Likewise.
11794 (vcreateq_u32): Likewise.
11795 (vcreateq_u64): Likewise.
11796 (vcreateq_s8): Likewise.
11797 (vcreateq_s16): Likewise.
11798 (vcreateq_s32): Likewise.
11799 (vcreateq_s64): Likewise.
11800 (vshrq_n_s8): Likewise.
11801 (vshrq_n_s16): Likewise.
11802 (vshrq_n_s32): Likewise.
11803 (vshrq_n_u8): Likewise.
11804 (vshrq_n_u16): Likewise.
11805 (vshrq_n_u32): Likewise.
11806 (__arm_vcreateq_u8): Define intrinsic.
11807 (__arm_vcreateq_u16): Likewise.
11808 (__arm_vcreateq_u32): Likewise.
11809 (__arm_vcreateq_u64): Likewise.
11810 (__arm_vcreateq_s8): Likewise.
11811 (__arm_vcreateq_s16): Likewise.
11812 (__arm_vcreateq_s32): Likewise.
11813 (__arm_vcreateq_s64): Likewise.
11814 (__arm_vshrq_n_s8): Likewise.
11815 (__arm_vshrq_n_s16): Likewise.
11816 (__arm_vshrq_n_s32): Likewise.
11817 (__arm_vshrq_n_u8): Likewise.
11818 (__arm_vshrq_n_u16): Likewise.
11819 (__arm_vshrq_n_u32): Likewise.
11820 (__arm_vcvtq_n_s16_f16): Likewise.
11821 (__arm_vcvtq_n_s32_f32): Likewise.
11822 (__arm_vcvtq_n_u16_f16): Likewise.
11823 (__arm_vcvtq_n_u32_f32): Likewise.
11824 (vshrq_n): Define polymorphic variant.
11825 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
11827 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11828 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11829 * config/arm/constraints.md (Rb): Define constraint to check constant is
11830 in the range of 1 to 8.
11831 (Rf): Define constraint to check constant is in the range of 1 to 32.
11832 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
11833 (mve_vshrq_n_<supf><mode>): Likewise.
11834 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
11835 * config/arm/predicates.md (mve_imm_8): Define predicate to check
11836 the matching constraint Rb.
11837 (mve_imm_32): Define predicate to check the matching constraint Rf.
11839 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11840 Mihail Ionescu <mihail.ionescu@arm.com>
11841 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11843 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
11844 qualifier for binary operands.
11845 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11846 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11847 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11848 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
11849 (vsubq_n_f32): Likewise.
11850 (vbrsrq_n_f16): Likewise.
11851 (vbrsrq_n_f32): Likewise.
11852 (vcvtq_n_f16_s16): Likewise.
11853 (vcvtq_n_f32_s32): Likewise.
11854 (vcvtq_n_f16_u16): Likewise.
11855 (vcvtq_n_f32_u32): Likewise.
11856 (vcreateq_f16): Likewise.
11857 (vcreateq_f32): Likewise.
11858 (__arm_vsubq_n_f16): Define intrinsic.
11859 (__arm_vsubq_n_f32): Likewise.
11860 (__arm_vbrsrq_n_f16): Likewise.
11861 (__arm_vbrsrq_n_f32): Likewise.
11862 (__arm_vcvtq_n_f16_s16): Likewise.
11863 (__arm_vcvtq_n_f32_s32): Likewise.
11864 (__arm_vcvtq_n_f16_u16): Likewise.
11865 (__arm_vcvtq_n_f32_u32): Likewise.
11866 (__arm_vcreateq_f16): Likewise.
11867 (__arm_vcreateq_f32): Likewise.
11868 (vsubq): Define polymorphic variant.
11869 (vbrsrq): Likewise.
11870 (vcvtq_n): Likewise.
11871 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
11873 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11874 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11875 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11876 * config/arm/constraints.md (Rd): Define constraint to check constant is
11877 in the range of 1 to 16.
11878 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
11879 mve_vbrsrq_n_f<mode>: Likewise.
11880 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
11881 mve_vcreateq_f<mode>: Likewise.
11882 * config/arm/predicates.md (mve_imm_16): Define predicate to check
11883 the matching constraint Rd.
11885 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11886 Mihail Ionescu <mihail.ionescu@arm.com>
11887 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11889 * config/arm/arm-builtins.c (hi_UP): Define mode.
11890 * config/arm/arm.h (IS_VPR_REGNUM): Move.
11891 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
11892 (APSRQ_REGNUM): Modify.
11893 (APSRGE_REGNUM): Modify.
11894 * config/arm/arm_mve.h (vctp16q): Define macro.
11895 (vctp32q): Likewise.
11896 (vctp64q): Likewise.
11897 (vctp8q): Likewise.
11899 (__arm_vctp16q): Define intrinsic.
11900 (__arm_vctp32q): Likewise.
11901 (__arm_vctp64q): Likewise.
11902 (__arm_vctp8q): Likewise.
11903 (__arm_vpnot): Likewise.
11904 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
11906 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
11907 (mve_vpnothi): Likewise.
11909 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11910 Mihail Ionescu <mihail.ionescu@arm.com>
11911 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11913 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
11914 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
11915 (vdupq_n_s16): Likewise.
11916 (vdupq_n_s32): Likewise.
11917 (vabsq_s8): Likewise.
11918 (vabsq_s16): Likewise.
11919 (vabsq_s32): Likewise.
11920 (vclsq_s8): Likewise.
11921 (vclsq_s16): Likewise.
11922 (vclsq_s32): Likewise.
11923 (vclzq_s8): Likewise.
11924 (vclzq_s16): Likewise.
11925 (vclzq_s32): Likewise.
11926 (vnegq_s8): Likewise.
11927 (vnegq_s16): Likewise.
11928 (vnegq_s32): Likewise.
11929 (vaddlvq_s32): Likewise.
11930 (vaddvq_s8): Likewise.
11931 (vaddvq_s16): Likewise.
11932 (vaddvq_s32): Likewise.
11933 (vmovlbq_s8): Likewise.
11934 (vmovlbq_s16): Likewise.
11935 (vmovltq_s8): Likewise.
11936 (vmovltq_s16): Likewise.
11937 (vmvnq_s8): Likewise.
11938 (vmvnq_s16): Likewise.
11939 (vmvnq_s32): Likewise.
11940 (vrev16q_s8): Likewise.
11941 (vrev32q_s8): Likewise.
11942 (vrev32q_s16): Likewise.
11943 (vqabsq_s8): Likewise.
11944 (vqabsq_s16): Likewise.
11945 (vqabsq_s32): Likewise.
11946 (vqnegq_s8): Likewise.
11947 (vqnegq_s16): Likewise.
11948 (vqnegq_s32): Likewise.
11949 (vcvtaq_s16_f16): Likewise.
11950 (vcvtaq_s32_f32): Likewise.
11951 (vcvtnq_s16_f16): Likewise.
11952 (vcvtnq_s32_f32): Likewise.
11953 (vcvtpq_s16_f16): Likewise.
11954 (vcvtpq_s32_f32): Likewise.
11955 (vcvtmq_s16_f16): Likewise.
11956 (vcvtmq_s32_f32): Likewise.
11957 (vmvnq_u8): Likewise.
11958 (vmvnq_u16): Likewise.
11959 (vmvnq_u32): Likewise.
11960 (vdupq_n_u8): Likewise.
11961 (vdupq_n_u16): Likewise.
11962 (vdupq_n_u32): Likewise.
11963 (vclzq_u8): Likewise.
11964 (vclzq_u16): Likewise.
11965 (vclzq_u32): Likewise.
11966 (vaddvq_u8): Likewise.
11967 (vaddvq_u16): Likewise.
11968 (vaddvq_u32): Likewise.
11969 (vrev32q_u8): Likewise.
11970 (vrev32q_u16): Likewise.
11971 (vmovltq_u8): Likewise.
11972 (vmovltq_u16): Likewise.
11973 (vmovlbq_u8): Likewise.
11974 (vmovlbq_u16): Likewise.
11975 (vrev16q_u8): Likewise.
11976 (vaddlvq_u32): Likewise.
11977 (vcvtpq_u16_f16): Likewise.
11978 (vcvtpq_u32_f32): Likewise.
11979 (vcvtnq_u16_f16): Likewise.
11980 (vcvtmq_u16_f16): Likewise.
11981 (vcvtmq_u32_f32): Likewise.
11982 (vcvtaq_u16_f16): Likewise.
11983 (vcvtaq_u32_f32): Likewise.
11984 (__arm_vdupq_n_s8): Define intrinsic.
11985 (__arm_vdupq_n_s16): Likewise.
11986 (__arm_vdupq_n_s32): Likewise.
11987 (__arm_vabsq_s8): Likewise.
11988 (__arm_vabsq_s16): Likewise.
11989 (__arm_vabsq_s32): Likewise.
11990 (__arm_vclsq_s8): Likewise.
11991 (__arm_vclsq_s16): Likewise.
11992 (__arm_vclsq_s32): Likewise.
11993 (__arm_vclzq_s8): Likewise.
11994 (__arm_vclzq_s16): Likewise.
11995 (__arm_vclzq_s32): Likewise.
11996 (__arm_vnegq_s8): Likewise.
11997 (__arm_vnegq_s16): Likewise.
11998 (__arm_vnegq_s32): Likewise.
11999 (__arm_vaddlvq_s32): Likewise.
12000 (__arm_vaddvq_s8): Likewise.
12001 (__arm_vaddvq_s16): Likewise.
12002 (__arm_vaddvq_s32): Likewise.
12003 (__arm_vmovlbq_s8): Likewise.
12004 (__arm_vmovlbq_s16): Likewise.
12005 (__arm_vmovltq_s8): Likewise.
12006 (__arm_vmovltq_s16): Likewise.
12007 (__arm_vmvnq_s8): Likewise.
12008 (__arm_vmvnq_s16): Likewise.
12009 (__arm_vmvnq_s32): Likewise.
12010 (__arm_vrev16q_s8): Likewise.
12011 (__arm_vrev32q_s8): Likewise.
12012 (__arm_vrev32q_s16): Likewise.
12013 (__arm_vqabsq_s8): Likewise.
12014 (__arm_vqabsq_s16): Likewise.
12015 (__arm_vqabsq_s32): Likewise.
12016 (__arm_vqnegq_s8): Likewise.
12017 (__arm_vqnegq_s16): Likewise.
12018 (__arm_vqnegq_s32): Likewise.
12019 (__arm_vmvnq_u8): Likewise.
12020 (__arm_vmvnq_u16): Likewise.
12021 (__arm_vmvnq_u32): Likewise.
12022 (__arm_vdupq_n_u8): Likewise.
12023 (__arm_vdupq_n_u16): Likewise.
12024 (__arm_vdupq_n_u32): Likewise.
12025 (__arm_vclzq_u8): Likewise.
12026 (__arm_vclzq_u16): Likewise.
12027 (__arm_vclzq_u32): Likewise.
12028 (__arm_vaddvq_u8): Likewise.
12029 (__arm_vaddvq_u16): Likewise.
12030 (__arm_vaddvq_u32): Likewise.
12031 (__arm_vrev32q_u8): Likewise.
12032 (__arm_vrev32q_u16): Likewise.
12033 (__arm_vmovltq_u8): Likewise.
12034 (__arm_vmovltq_u16): Likewise.
12035 (__arm_vmovlbq_u8): Likewise.
12036 (__arm_vmovlbq_u16): Likewise.
12037 (__arm_vrev16q_u8): Likewise.
12038 (__arm_vaddlvq_u32): Likewise.
12039 (__arm_vcvtpq_u16_f16): Likewise.
12040 (__arm_vcvtpq_u32_f32): Likewise.
12041 (__arm_vcvtnq_u16_f16): Likewise.
12042 (__arm_vcvtmq_u16_f16): Likewise.
12043 (__arm_vcvtmq_u32_f32): Likewise.
12044 (__arm_vcvtaq_u16_f16): Likewise.
12045 (__arm_vcvtaq_u32_f32): Likewise.
12046 (__arm_vcvtaq_s16_f16): Likewise.
12047 (__arm_vcvtaq_s32_f32): Likewise.
12048 (__arm_vcvtnq_s16_f16): Likewise.
12049 (__arm_vcvtnq_s32_f32): Likewise.
12050 (__arm_vcvtpq_s16_f16): Likewise.
12051 (__arm_vcvtpq_s32_f32): Likewise.
12052 (__arm_vcvtmq_s16_f16): Likewise.
12053 (__arm_vcvtmq_s32_f32): Likewise.
12054 (vdupq_n): Define polymorphic variant.
12059 (vaddlvq): Likewise.
12060 (vaddvq): Likewise.
12061 (vmovlbq): Likewise.
12062 (vmovltq): Likewise.
12064 (vrev16q): Likewise.
12065 (vrev32q): Likewise.
12066 (vqabsq): Likewise.
12067 (vqnegq): Likewise.
12068 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12069 (UNOP_SNONE_NONE): Likewise.
12070 (UNOP_UNONE_UNONE): Likewise.
12071 (UNOP_UNONE_NONE): Likewise.
12072 * config/arm/constraints.md (e): Define new constriant to allow only
12074 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
12075 (mve_vnegq_s<mode>): Likewise.
12076 (mve_vmvnq_<supf><mode>): Likewise.
12077 (mve_vdupq_n_<supf><mode>): Likewise.
12078 (mve_vclzq_<supf><mode>): Likewise.
12079 (mve_vclsq_s<mode>): Likewise.
12080 (mve_vaddvq_<supf><mode>): Likewise.
12081 (mve_vabsq_s<mode>): Likewise.
12082 (mve_vrev32q_<supf><mode>): Likewise.
12083 (mve_vmovltq_<supf><mode>): Likewise.
12084 (mve_vmovlbq_<supf><mode>): Likewise.
12085 (mve_vcvtpq_<supf><mode>): Likewise.
12086 (mve_vcvtnq_<supf><mode>): Likewise.
12087 (mve_vcvtmq_<supf><mode>): Likewise.
12088 (mve_vcvtaq_<supf><mode>): Likewise.
12089 (mve_vrev16q_<supf>v16qi): Likewise.
12090 (mve_vaddlvq_<supf>v4si): Likewise.
12092 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12094 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
12096 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
12098 * read-rtl-function.c (find_param_by_name,
12099 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
12101 * spellcheck.c (get_edit_distance_cutoff): Likewise.
12102 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
12103 * tree.def (SWITCH_EXPR): Likewise.
12104 * selftest.c (assert_str_contains): Likewise.
12105 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
12107 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
12108 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
12109 * langhooks.h (struct lang_hooks_for_decls): Likewise.
12110 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
12111 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
12113 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
12114 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
12115 * tree.c (component_ref_size): Likewise.
12116 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
12117 * gimple-ssa-sprintf.c (get_string_length, format_string,
12118 format_directive): Likewise.
12119 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
12120 * input.c (string_concat_db::get_string_concatenation,
12121 test_lexer_string_locations_ucn4): Likewise.
12122 * cfgexpand.c (pass_expand::execute): Likewise.
12123 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
12124 maybe_diag_overlap): Likewise.
12125 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
12126 * shrink-wrap.c (spread_components): Likewise.
12127 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
12129 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
12131 * dwarf2out.c (dwarf2out_early_finish): Likewise.
12132 * gimple-ssa-store-merging.c: Likewise.
12133 * ira-costs.c (record_operand_costs): Likewise.
12134 * tree-vect-loop.c (vectorizable_reduction): Likewise.
12135 * target.def (dispatch): Likewise.
12136 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
12137 in documentation text.
12138 * doc/tm.texi: Regenerated.
12139 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
12140 duplicated word issue in a comment.
12141 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
12142 * config/i386/i386-features.c (remove_partial_avx_dependency):
12144 * config/msp430/msp430.c (msp430_select_section): Likewise.
12145 * config/gcn/gcn-run.c (load_image): Likewise.
12146 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
12147 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
12148 * config/aarch64/falkor-tag-collision-avoidance.c
12149 (single_dest_per_chain): Likewise.
12150 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
12151 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
12152 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
12153 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
12155 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
12156 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
12157 * config/rs6000/rs6000-logue.c
12158 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
12159 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
12160 Fix various other issues in the comment.
12162 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
12164 * config/arm/t-rmprofile: create new multilib for
12165 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
12168 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12170 PR tree-optimization/94015
12171 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
12172 function where EXP is address of the bytes being stored rather than
12173 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
12174 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
12175 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
12176 calling native_encode_expr if host or target doesn't have 8-bit
12177 chars. Formatting fixes.
12178 (count_nonzero_bytes_addr): New function.
12180 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12181 Mihail Ionescu <mihail.ionescu@arm.com>
12182 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12184 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
12185 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
12186 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
12187 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
12188 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
12189 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
12190 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
12191 (vmvnq_n_s32): Likewise.
12192 (vrev64q_s8): Likewise.
12193 (vrev64q_s16): Likewise.
12194 (vrev64q_s32): Likewise.
12195 (vcvtq_s16_f16): Likewise.
12196 (vcvtq_s32_f32): Likewise.
12197 (vrev64q_u8): Likewise.
12198 (vrev64q_u16): Likewise.
12199 (vrev64q_u32): Likewise.
12200 (vmvnq_n_u16): Likewise.
12201 (vmvnq_n_u32): Likewise.
12202 (vcvtq_u16_f16): Likewise.
12203 (vcvtq_u32_f32): Likewise.
12204 (__arm_vmvnq_n_s16): Define intrinsic.
12205 (__arm_vmvnq_n_s32): Likewise.
12206 (__arm_vrev64q_s8): Likewise.
12207 (__arm_vrev64q_s16): Likewise.
12208 (__arm_vrev64q_s32): Likewise.
12209 (__arm_vrev64q_u8): Likewise.
12210 (__arm_vrev64q_u16): Likewise.
12211 (__arm_vrev64q_u32): Likewise.
12212 (__arm_vmvnq_n_u16): Likewise.
12213 (__arm_vmvnq_n_u32): Likewise.
12214 (__arm_vcvtq_s16_f16): Likewise.
12215 (__arm_vcvtq_s32_f32): Likewise.
12216 (__arm_vcvtq_u16_f16): Likewise.
12217 (__arm_vcvtq_u32_f32): Likewise.
12218 (vrev64q): Define polymorphic variant.
12219 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12220 (UNOP_SNONE_NONE): Likewise.
12221 (UNOP_SNONE_IMM): Likewise.
12222 (UNOP_UNONE_UNONE): Likewise.
12223 (UNOP_UNONE_NONE): Likewise.
12224 (UNOP_UNONE_IMM): Likewise.
12225 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
12226 (mve_vcvtq_from_f_<supf><mode>): Likewise.
12227 (mve_vmvnq_n_<supf><mode>): Likewise.
12229 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12230 Mihail Ionescu <mihail.ionescu@arm.com>
12231 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12233 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
12234 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
12235 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
12236 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
12237 (vrndxq_f32): Likewise.
12238 (vrndq_f16) Likewise.
12239 (vrndq_f32): Likewise.
12240 (vrndpq_f16): Likewise.
12241 (vrndpq_f32): Likewise.
12242 (vrndnq_f16): Likewise.
12243 (vrndnq_f32): Likewise.
12244 (vrndmq_f16): Likewise.
12245 (vrndmq_f32): Likewise.
12246 (vrndaq_f16): Likewise.
12247 (vrndaq_f32): Likewise.
12248 (vrev64q_f16): Likewise.
12249 (vrev64q_f32): Likewise.
12250 (vnegq_f16): Likewise.
12251 (vnegq_f32): Likewise.
12252 (vdupq_n_f16): Likewise.
12253 (vdupq_n_f32): Likewise.
12254 (vabsq_f16): Likewise.
12255 (vabsq_f32): Likewise.
12256 (vrev32q_f16): Likewise.
12257 (vcvttq_f32_f16): Likewise.
12258 (vcvtbq_f32_f16): Likewise.
12259 (vcvtq_f16_s16): Likewise.
12260 (vcvtq_f32_s32): Likewise.
12261 (vcvtq_f16_u16): Likewise.
12262 (vcvtq_f32_u32): Likewise.
12263 (__arm_vrndxq_f16): Define intrinsic.
12264 (__arm_vrndxq_f32): Likewise.
12265 (__arm_vrndq_f16): Likewise.
12266 (__arm_vrndq_f32): Likewise.
12267 (__arm_vrndpq_f16): Likewise.
12268 (__arm_vrndpq_f32): Likewise.
12269 (__arm_vrndnq_f16): Likewise.
12270 (__arm_vrndnq_f32): Likewise.
12271 (__arm_vrndmq_f16): Likewise.
12272 (__arm_vrndmq_f32): Likewise.
12273 (__arm_vrndaq_f16): Likewise.
12274 (__arm_vrndaq_f32): Likewise.
12275 (__arm_vrev64q_f16): Likewise.
12276 (__arm_vrev64q_f32): Likewise.
12277 (__arm_vnegq_f16): Likewise.
12278 (__arm_vnegq_f32): Likewise.
12279 (__arm_vdupq_n_f16): Likewise.
12280 (__arm_vdupq_n_f32): Likewise.
12281 (__arm_vabsq_f16): Likewise.
12282 (__arm_vabsq_f32): Likewise.
12283 (__arm_vrev32q_f16): Likewise.
12284 (__arm_vcvttq_f32_f16): Likewise.
12285 (__arm_vcvtbq_f32_f16): Likewise.
12286 (__arm_vcvtq_f16_s16): Likewise.
12287 (__arm_vcvtq_f32_s32): Likewise.
12288 (__arm_vcvtq_f16_u16): Likewise.
12289 (__arm_vcvtq_f32_u32): Likewise.
12290 (vrndxq): Define polymorphic variants.
12292 (vrndpq): Likewise.
12293 (vrndnq): Likewise.
12294 (vrndmq): Likewise.
12295 (vrndaq): Likewise.
12296 (vrev64q): Likewise.
12299 (vrev32q): Likewise.
12300 (vcvtbq_f32): Likewise.
12301 (vcvttq_f32): Likewise.
12303 * config/arm/arm_mve_builtins.def (VAR2): Define.
12305 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
12306 (mve_vrndq_f<mode>): Likewise.
12307 (mve_vrndpq_f<mode>): Likewise.
12308 (mve_vrndnq_f<mode>): Likewise.
12309 (mve_vrndmq_f<mode>): Likewise.
12310 (mve_vrndaq_f<mode>): Likewise.
12311 (mve_vrev64q_f<mode>): Likewise.
12312 (mve_vnegq_f<mode>): Likewise.
12313 (mve_vdupq_n_f<mode>): Likewise.
12314 (mve_vabsq_f<mode>): Likewise.
12315 (mve_vrev32q_fv8hf): Likewise.
12316 (mve_vcvttq_f32_f16v4sf): Likewise.
12317 (mve_vcvtbq_f32_f16v4sf): Likewise.
12318 (mve_vcvtq_to_f_<supf><mode>): Likewise.
12320 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12321 Mihail Ionescu <mihail.ionescu@arm.com>
12322 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12324 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
12326 (ARM_BUILTIN_MVE_PATTERN_START): Define.
12327 (arm_init_mve_builtins): Define function.
12328 (arm_init_builtins): Add TARGET_HAVE_MVE check.
12329 (arm_expand_builtin_1): Check the range of fcode.
12330 (arm_expand_mve_builtin): Define function to expand MVE builtins.
12331 (arm_expand_builtin): Check the range of fcode.
12332 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
12334 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
12335 (vst4q_s8): Define macro.
12336 (vst4q_s16): Likewise.
12337 (vst4q_s32): Likewise.
12338 (vst4q_u8): Likewise.
12339 (vst4q_u16): Likewise.
12340 (vst4q_u32): Likewise.
12341 (vst4q_f16): Likewise.
12342 (vst4q_f32): Likewise.
12343 (__arm_vst4q_s8): Define inline builtin.
12344 (__arm_vst4q_s16): Likewise.
12345 (__arm_vst4q_s32): Likewise.
12346 (__arm_vst4q_u8): Likewise.
12347 (__arm_vst4q_u16): Likewise.
12348 (__arm_vst4q_u32): Likewise.
12349 (__arm_vst4q_f16): Likewise.
12350 (__arm_vst4q_f32): Likewise.
12351 (__ARM_mve_typeid): Define macro with MVE types.
12352 (__ARM_mve_coerce): Define macro with _Generic feature.
12353 (vst4q): Define polymorphic variant for different vst4q builtins.
12354 * config/arm/arm_mve_builtins.def: New file.
12355 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
12357 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
12358 (unspec): Define unspec.
12359 (mve_vst4q<mode>): Define RTL pattern.
12360 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
12362 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
12364 (define_split): Allow OI mode split for MVE after reload.
12365 (define_split): Allow XI mode split for MVE after reload.
12366 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
12367 (arm-builtins.o): Likewise.
12369 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
12371 * c-typeck.c (process_init_element): Handle constructor_type with
12372 type size represented by POLY_INT_CST.
12374 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12376 PR tree-optimization/94187
12377 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
12378 nchars - offset < nbytes.
12380 PR middle-end/94189
12381 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
12382 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
12383 for code-generation.
12385 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
12388 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
12389 after changing memory subreg.
12391 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12392 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12394 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
12395 emulator calls for dobule precision arithmetic operations for MVE.
12397 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12398 Mihail Ionescu <mihail.ionescu@arm.com>
12399 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12401 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
12402 feature bit is on and -mfpu=auto is passed as compiler option, do not
12403 generate error on not finding any matching fpu. Because in this case
12404 fpu is not required.
12405 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
12406 enabled for MVE and also for all VFP extensions.
12407 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
12409 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
12410 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
12411 along with feature bits mve_float.
12412 (mve): Modify add options in armv8.1-m.main arch for MVE.
12413 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
12415 * config/arm/arm.c (use_return_insn): Replace the
12416 check with TARGET_VFP_BASE.
12417 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
12419 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12420 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
12422 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
12423 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
12425 (arm_compute_frame_layout): Likewise.
12426 (arm_save_coproc_regs): Likewise.
12427 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
12429 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12430 with equivalent macro TARGET_VFP_BASE.
12431 (arm_expand_epilogue_apcs_frame): Likewise.
12432 (arm_expand_epilogue): Likewise.
12433 (arm_conditional_register_usage): Likewise.
12434 (arm_declare_function_name): Add check to skip printing .fpu directive
12435 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
12437 * config/arm/arm.h (TARGET_VFP_BASE): Define.
12438 * config/arm/arm.md (arch): Add "mve" to arch.
12439 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
12440 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
12441 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
12442 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
12444 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
12445 to not allow for MVE.
12446 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
12448 (VUNSPEC_GET_FPSCR): Define.
12449 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
12450 instructions which move to general-purpose Register from Floating-point
12451 Special register and vice-versa.
12452 (thumb2_movhi_fp16): Likewise.
12453 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
12454 with MCR and MRC instructions which set and get Floating-point Status
12455 and Control Register (FPSCR).
12456 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
12458 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
12459 float move patterns in MVE.
12460 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
12461 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12462 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
12463 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12464 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
12465 TARGET_VFP_BASE check.
12466 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
12467 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12469 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
12470 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12474 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12475 Mihail Ionescu <mihail.ionescu@arm.com>
12476 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12478 * config.gcc (arm_mve.h): Include mve intrinsics header file.
12479 * config/arm/aout.h (p0): Add new register name for MVE predicated
12481 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
12482 common to Neon and MVE.
12483 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
12484 (arm_init_simd_builtin_types): Disable poly types for MVE.
12485 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
12486 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
12487 ARM_BUILTIN_NEON_LANE_CHECK.
12488 (mve_dereference_pointer): Add function.
12489 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
12491 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
12492 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
12493 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
12494 with floating point enabled.
12495 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
12496 simd_immediate_valid_for_move.
12497 (simd_immediate_valid_for_move): Renamed from
12498 neon_immediate_valid_for_move function.
12499 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
12500 error if vfpv2 feature bit is disabled and mve feature bit is also
12501 disabled for HARD_FLOAT_ABI.
12502 (use_return_insn): Check to not push VFP regs for MVE.
12503 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
12505 (aapcs_vfp_allocate_return_reg): Likewise.
12506 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
12507 address operand for MVE.
12508 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
12509 (neon_valid_immediate): Rename to simd_valid_immediate.
12510 (simd_valid_immediate): Rename from neon_valid_immediate.
12511 (simd_valid_immediate): MVE check on size of vector is 128 bits.
12512 (neon_immediate_valid_for_move): Rename to
12513 simd_immediate_valid_for_move.
12514 (simd_immediate_valid_for_move): Rename from
12515 neon_immediate_valid_for_move.
12516 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
12518 (neon_make_constant): Modify call to neon_valid_immediate function.
12519 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
12521 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
12522 (arm_compute_frame_layout): Calculate space for saved VFP registers for
12524 (arm_save_coproc_regs): Save coproc registers for MVE.
12525 (arm_print_operand): Add case 'E' to print memory operands for MVE.
12526 (arm_print_operand_address): Check to print register number for MVE.
12527 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
12528 (arm_modes_tieable_p): Check to allow structure mode for MVE.
12529 (arm_regno_class): Add VPR_REGNUM check.
12530 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
12532 (arm_expand_epilogue): MVE check for enabling pop instructions in
12534 (arm_print_asm_arch_directives): Modify function to disable print of
12535 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12537 (arm_vector_mode_supported_p): Check for modes available in MVE interger
12538 and MVE floating point.
12539 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
12541 (arm_conditional_register_usage): Enable usage of conditional regsiter
12543 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
12544 (arm_declare_function_name): Modify function to disable print of
12545 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12547 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
12548 when target general registers are required.
12549 (TARGET_HAVE_MVE_FLOAT): Likewise.
12550 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
12552 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
12553 which indicate this is not available for across function calls.
12554 (FIRST_PSEUDO_REGISTER): Modify.
12555 (VALID_MVE_MODE): Define valid MVE mode.
12556 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
12557 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
12558 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
12559 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
12561 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
12562 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
12563 (enum reg_class): Add VPR_REG entry.
12564 (REG_CLASS_NAMES): Add VPR_REG entry.
12565 * config/arm/arm.md (VPR_REGNUM): Define.
12566 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
12567 "unconditional" instructions.
12568 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
12569 (movdf_soft_insn): Modify RTL to not allow for MVE.
12570 (vfp_pop_multiple_with_writeback): Enable for MVE.
12571 (include "mve.md"): Include mve.md file.
12572 * config/arm/arm_mve.h: Add MVE intrinsics head file.
12573 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
12574 for vector predicated operands.
12575 * config/arm/iterators.md (VNIM1): Define.
12576 (VNINOTM1): Define.
12577 (VHFBF_split): Define
12578 * config/arm/mve.md: New file.
12579 (mve_mov<mode>): Define RTL for move, store and load in MVE.
12580 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
12582 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
12583 simd_immediate_valid_for_move.
12584 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
12585 is common to MVE and NEON to vec-common.md file.
12586 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
12587 * config/arm/predicates.md (vpr_register_operand): Define.
12588 * config/arm/t-arm: Add mve.md file.
12589 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
12591 (mve_store): Add MVE instructions mve_store to attribute "type".
12592 (mve_load): Add MVE instructions mve_load to attribute "type".
12593 (is_mve_type): Define attribute.
12594 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
12595 standard move patterns in MVE along with NEON and IWMMXT with mode
12597 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
12598 and IWMMXT with mode iterator V8HF.
12599 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
12601 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
12602 simd_immediate_valid_for_move.
12605 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
12608 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
12609 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12611 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
12613 2020-03-16 Jakub Jelinek <jakub@redhat.com>
12616 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
12619 PR tree-optimization/94166
12620 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
12621 as secondary comparison key.
12623 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
12625 PR tree-optimization/94125
12626 * tree-loop-distribution.c
12627 (loop_distribution::break_alias_scc_partitions): Update post order
12628 number for merged scc.
12630 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
12633 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
12635 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
12636 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
12637 and ext_sse_reg_operand check.
12639 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
12641 * common.opt: Avoid redundancy in the help text.
12642 * config/arc/arc.opt: Likewise.
12643 * config/cr16/cr16.opt: Likewise.
12645 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12647 PR middle-end/93566
12648 * tree-nested.c (convert_nonlocal_omp_clauses,
12649 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
12650 with C/C++ array sections.
12652 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
12655 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
12656 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12659 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12661 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
12662 "a an" to "an" in a comment.
12663 * hsa-common.h (is_a_helper): Likewise.
12664 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
12665 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
12666 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
12668 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
12671 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
12672 64-bit value by 64 bits (UB).
12674 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
12676 PR rtl-optimization/92303
12677 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
12679 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
12681 PR rtl-optimization/94148
12682 PR rtl-optimization/94042
12683 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
12684 (df_worklist_propagate_forward): New parameter last_change_age, use
12685 that instead of bb->aux.
12686 (df_worklist_propagate_backward): Ditto.
12687 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
12689 2020-03-13 Richard Biener <rguenther@suse.de>
12691 PR tree-optimization/94163
12692 * tree-ssa-pre.c (create_expression_by_pieces): Check
12693 whether alignment would be zero.
12695 2020-03-13 Martin Liska <mliska@suse.cz>
12698 * lto-wrapper.c (run_gcc): Use concat for appending
12699 to collect_gcc_options.
12701 2020-03-13 Jakub Jelinek <jakub@redhat.com>
12704 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
12705 instead of GEN_INT.
12707 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
12710 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
12711 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
12712 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
12713 TARGET_AVX512VL and ext_sse_reg_operand check.
12715 2020-03-13 Bu Le <bule1@huawei.com>
12718 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
12719 (-param=aarch64-double-recp-precision=): New options.
12720 * doc/invoke.texi: Document them.
12721 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
12722 instead of hard-coding the choice of 1 for float and 2 for double.
12724 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12726 PR rtl-optimization/94119
12727 * resource.h (clear_hashed_info_until_next_barrier): Declare.
12728 * resource.c (clear_hashed_info_until_next_barrier): New function.
12729 * reorg.c (add_to_delay_list): Fix formatting.
12730 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
12731 the next instruction after removing a BARRIER.
12733 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12735 PR middle-end/92071
12736 * expmed.c (store_integral_bit_field): For fields larger than a word,
12737 call extract_bit_field on the value if the mode is BLKmode. Remove
12738 specific path for big-endian targets and tidy things up a little bit.
12740 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
12742 PR rtl-optimization/90275
12743 * cse.c (cse_insn): Delete no-op register moves too.
12745 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
12747 * config/rx/rx.md (CTRLREG_CPEN): Remove.
12748 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
12750 2020-03-12 Richard Biener <rguenther@suse.de>
12752 PR tree-optimization/94103
12753 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
12754 punning when the mode precision is not sufficient.
12756 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
12759 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
12760 MODE_V1DF and MODE_V2SF.
12761 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
12762 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
12765 2020-03-12 Jakub Jelinek <jakub@redhat.com>
12767 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
12768 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
12769 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
12770 * doc/tm.texi: Regenerated.
12772 PR tree-optimization/94130
12773 * tree-ssa-dse.c: Include gimplify.h.
12774 (increment_start_addr): If stmt has lhs, drop the lhs from call and
12775 set it after the call to the original value of the first argument.
12777 (decrement_count): Formatting fix.
12779 2020-03-11 Delia Burduv <delia.burduv@arm.com>
12781 * config/arm/arm-builtins.c
12782 (arm_init_simd_builtin_scalar_types): New.
12783 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
12784 (vld2q_bf16): Used new builtin type.
12785 (vld3_bf16): Used new builtin type.
12786 (vld3q_bf16): Used new builtin type.
12787 (vld4_bf16): Used new builtin type.
12788 (vld4q_bf16): Used new builtin type.
12789 (vld2_dup_bf16): Used new builtin type.
12790 (vld2q_dup_bf16): Used new builtin type.
12791 (vld3_dup_bf16): Used new builtin type.
12792 (vld3q_dup_bf16): Used new builtin type.
12793 (vld4_dup_bf16): Used new builtin type.
12794 (vld4q_dup_bf16): Used new builtin type.
12796 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12799 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
12800 at the start to switch to data section. Don't print extra newline if
12801 .globl directive has not been emitted.
12803 2020-03-11 Richard Biener <rguenther@suse.de>
12805 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
12808 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
12810 PR middle-end/93961
12811 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
12812 whose type is a qualified union.
12814 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12817 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
12818 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
12821 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
12823 (get_nth_most_common_value): Use abs_hwi instead of abs.
12825 PR middle-end/94111
12826 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
12827 is rvc_normal, otherwise use real_to_decimal to print the number to
12830 PR tree-optimization/94114
12831 * tree-loop-distribution.c (generate_memset_builtin): Call
12832 rewrite_to_non_trapping_overflow even on mem.
12833 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
12836 2020-03-10 Jeff Law <law@redhat.com>
12838 * config/bfin/bfin.md (movsi_insv): Add length attribute.
12840 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
12843 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
12844 NAN and SIGNED_ZEROR for smax/smin.
12846 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
12849 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
12850 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
12852 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12854 * loop-iv.c (find_simple_exit): Make it static.
12855 * cfgloop.h: Remove the corresponding prototype.
12857 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12859 * ddg.c (create_ddg): Fix intendation.
12860 (set_recurrence_length): Likewise.
12861 (create_ddg_all_sccs): Likewise.
12863 2020-03-10 Jakub Jelinek <jakub@redhat.com>
12866 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
12867 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
12870 2020-03-09 Jason Merrill <jason@redhat.com>
12872 * gdbinit.in (pgs): Fix typo in documentation.
12874 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
12878 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
12880 PR rtl-optimization/93564
12881 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
12882 do not honor reg alloc order.
12884 2020-03-09 Andrew Pinski <apinski@marvell.com>
12886 PR inline-asm/94095
12887 * doc/extend.texi (x86 Operand Modifiers): Fix column
12890 2020-03-09 Martin Liska <mliska@suse.cz>
12893 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12894 Remove set of str_align_loops and str_align_jumps as these
12895 should be set in previous 2 conditions in the function.
12897 2020-03-09 Jakub Jelinek <jakub@redhat.com>
12899 PR rtl-optimization/94045
12900 * params.opt (-param=max-find-base-term-values=): New option.
12901 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
12902 in a single toplevel find_base_term call.
12904 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12907 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
12908 * config/aarch64/aarch64-simd.md
12909 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
12910 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
12911 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
12912 * config/aarch64/arm_neon.h:
12913 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
12914 (vmlal_lane_u16): Likewise.
12915 (vmlal_lane_s32): Likewise.
12916 (vmlal_lane_u32): Likewise.
12917 (vmlal_laneq_s16): Likewise.
12918 (vmlal_laneq_u16): Likewise.
12919 (vmlal_laneq_s32): Likewise.
12920 (vmlal_laneq_u32): Likewise.
12921 (vmull_lane_s16): Likewise.
12922 (vmull_lane_u16): Likewise.
12923 (vmull_lane_s32): Likewise.
12924 (vmull_lane_u32): Likewise.
12925 (vmull_laneq_s16): Likewise.
12926 (vmull_laneq_u16): Likewise.
12927 (vmull_laneq_s32): Likewise.
12928 (vmull_laneq_u32): Likewise.
12929 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
12932 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12934 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
12935 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
12936 (aarch64_mls_elt<mode>): Likewise.
12937 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
12938 (aarch64_fma4_elt<mode>): Likewise.
12939 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
12940 (aarch64_fma4_elt_to_64v2df): Likewise.
12941 (aarch64_fnma4_elt<mode>): Likewise.
12942 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
12943 (aarch64_fnma4_elt_to_64v2df): Likewise.
12945 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12947 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
12948 Specify movprfx attribute.
12949 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
12951 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
12954 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
12956 (TARGET_NO_FP_IN_TOC): Same.
12957 * config/rs6000/aix71.h: Same.
12958 * config/rs6000/aix72.h: Same.
12960 2020-03-06 Andrew Pinski <apinski@marvell.com>
12961 Jeff Law <law@redhat.com>
12963 PR rtl-optimization/93996
12964 * haifa-sched.c (remove_notes): Be more careful when adding
12967 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12969 * config/arm/arm_neon.h (vld2_bf16): New.
12975 (vld2_dup_bf16): New.
12976 (vld2q_dup_bf16): New.
12977 (vld3_dup_bf16): New.
12978 (vld3q_dup_bf16): New.
12979 (vld4_dup_bf16): New.
12980 (vld4q_dup_bf16): New.
12981 * config/arm/arm_neon_builtins.def
12982 (vld2): Changed to VAR13 and added v4bf, v8bf
12983 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
12984 (vld3): Changed to VAR13 and added v4bf, v8bf
12985 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
12986 (vld4): Changed to VAR13 and added v4bf, v8bf
12987 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
12988 * config/arm/iterators.md (VDXBF2): New iterator.
12989 *config/arm/neon.md (neon_vld2): Use new iterators.
12990 (neon_vld2_dup<mode): Use new iterators.
12991 (neon_vld3<mode>): Likewise.
12992 (neon_vld3qa<mode>): Likewise.
12993 (neon_vld3qb<mode>): Likewise.
12994 (neon_vld3_dup<mode>): Likewise.
12995 (neon_vld4<mode>): Likewise.
12996 (neon_vld4qa<mode>): Likewise.
12997 (neon_vld4qb<mode>): Likewise.
12998 (neon_vld4_dup<mode>): Likewise.
12999 (neon_vld2_dupv8bf): New.
13000 (neon_vld3_dupv8bf): Likewise.
13001 (neon_vld4_dupv8bf): Likewise.
13003 2020-03-06 Delia Burduv <delia.burduv@arm.com>
13005 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
13006 (bfloat16x8x2_t): New typedef.
13007 (bfloat16x4x3_t): New typedef.
13008 (bfloat16x8x3_t): New typedef.
13009 (bfloat16x4x4_t): New typedef.
13010 (bfloat16x8x4_t): New typedef.
13017 * config/arm/arm-builtins.c (v2bf_UP): Define.
13019 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
13020 * config/arm/arm-modes.def (V2BF): New mode.
13021 * config/arm/arm-simd-builtin-types.def
13022 (Bfloat16x2_t): New entry.
13023 * config/arm/arm_neon_builtins.def
13024 (vst2): Changed to VAR13 and added v4bf, v8bf
13025 (vst3): Changed to VAR13 and added v4bf, v8bf
13026 (vst4): Changed to VAR13 and added v4bf, v8bf
13027 * config/arm/iterators.md (VDXBF): New iterator.
13028 (VQ2BF): New iterator.
13029 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
13030 (neon_vst2<mode>): Used new iterators.
13031 (neon_vst3<mode>): Used new iterators.
13032 (neon_vst3<mode>): Used new iterators.
13033 (neon_vst3qa<mode>): Used new iterators.
13034 (neon_vst3qb<mode>): Used new iterators.
13035 (neon_vst4<mode>): Used new iterators.
13036 (neon_vst4<mode>): Used new iterators.
13037 (neon_vst4qa<mode>): Used new iterators.
13038 (neon_vst4qb<mode>): Used new iterators.
13040 2020-03-06 Delia Burduv <delia.burduv@arm.com>
13042 * config/aarch64/aarch64-simd-builtins.def
13043 (bfcvtn): New built-in function.
13044 (bfcvtn_q): New built-in function.
13045 (bfcvtn2): New built-in function.
13046 (bfcvt): New built-in function.
13047 * config/aarch64/aarch64-simd.md
13048 (aarch64_bfcvtn<q><mode>): New pattern.
13049 (aarch64_bfcvtn2v8bf): New pattern.
13050 (aarch64_bfcvtbf): New pattern.
13051 * config/aarch64/arm_bf16.h (float32_t): New typedef.
13052 (vcvth_bf16_f32): New intrinsic.
13053 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
13054 (vcvtq_low_bf16_f32): New intrinsic.
13055 (vcvtq_high_bf16_f32): New intrinsic.
13056 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
13057 (UNSPEC_BFCVTN): New UNSPEC.
13058 (UNSPEC_BFCVTN2): New UNSPEC.
13059 (UNSPEC_BFCVT): New UNSPEC.
13060 * config/arm/types.md (bf_cvt): New type.
13062 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
13064 * config/s390/s390.md ("tabort"): Get rid of two consecutive
13065 blanks in format string.
13067 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
13071 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
13072 * config/i386/i386.c (ix86_get_ssemov): New function.
13073 (ix86_output_ssemov): Likewise.
13074 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
13075 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
13077 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
13078 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
13079 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
13080 (*movti_internal): Likewise.
13081 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
13083 2020-03-05 Jeff Law <law@redhat.com>
13085 PR tree-optimization/91890
13086 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
13087 Use gimple_or_expr_nonartificial_location.
13088 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
13089 Use gimple_or_expr_nonartificial_location.
13090 * gimple.c (gimple_or_expr_nonartificial_location): New function.
13091 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
13092 * tree-ssa-strlen.c (maybe_warn_overflow): Use
13093 gimple_or_expr_nonartificial_location.
13094 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
13095 (maybe_warn_pointless_strcmp): Likewise.
13097 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13100 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
13101 SRC and MASK arguments to __m128 from __m128d.
13102 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
13104 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
13106 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
13107 argument to __m128i from __m128d.
13108 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
13110 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
13111 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
13114 2020-03-05 Delia Burduv <delia.burduv@arm.com>
13116 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
13117 (vbfmlalbq_f32): New.
13118 (vbfmlaltq_f32): New.
13119 (vbfmlalbq_lane_f32): New.
13120 (vbfmlaltq_lane_f32): New.
13121 (vbfmlalbq_laneq_f32): New.
13122 (vbfmlaltq_laneq_f32): New.
13123 * config/arm/arm_neon_builtins.def (vmmla): New.
13128 (vfmab_laneq): New.
13129 (vfmat_laneq): New.
13130 * config/arm/iterators.md (BF_MA): New int iterator.
13131 (bt): New int attribute.
13132 (VQXBF): Copy of VQX with V8BF.
13133 * config/arm/neon.md (neon_vmmlav8bf): New insn.
13134 (neon_vfma<bt>v8bf): New insn.
13135 (neon_vfma<bt>_lanev8bf): New insn.
13136 (neon_vfma<bt>_laneqv8bf): New expand.
13137 (neon_vget_high<mode>): Changed iterator to VQXBF.
13138 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
13139 (UNSPEC_BFMAB): New UNSPEC.
13140 (UNSPEC_BFMAT): New UNSPEC.
13142 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13144 PR middle-end/93399
13145 * tree-pretty-print.h (pretty_print_string): Declare.
13146 * tree-pretty-print.c (pretty_print_string): Remove forward
13147 declaration, no longer static. Change nbytes parameter type
13148 from unsigned to size_t.
13149 * print-rtl.c (print_value) <case CONST_STRING>: Use
13150 pretty_print_string and for shrink way too long strings.
13152 2020-03-05 Richard Biener <rguenther@suse.de>
13153 Jakub Jelinek <jakub@redhat.com>
13155 PR tree-optimization/93582
13156 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
13157 last operand as signed when looking for memset offset. Formatting
13160 2020-03-04 Andrew Pinski <apinski@marvell.com>
13163 * value-prof.c (dump_histogram_value): Use std::abs.
13165 2020-03-04 Martin Sebor <msebor@redhat.com>
13167 PR tree-optimization/93986
13168 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
13169 operands to the same precision widest_int to avoid ICEs.
13171 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
13174 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
13175 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
13176 for OPTION_MASK_ALTIVEC.
13178 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13180 * config.gcc: Include the glibc-stdint.h header for zTPF.
13182 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13184 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
13185 direct FPR-GPR copies.
13186 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
13189 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13191 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
13192 operands to the prologue_tpf expander.
13193 (s390_emit_epilogue): Likewise.
13194 (s390_option_override_internal): Do error checking and setup for
13196 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
13197 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
13198 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
13199 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
13200 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
13201 operands for the check flag and the branch target.
13202 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
13203 ("mtpf-trace-hook-prologue-target")
13204 ("mtpf-trace-hook-epilogue-check")
13205 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
13207 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
13208 options are for debugging purposes and will not be documented
13211 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13214 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
13216 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
13217 argument. Change pd argument so that it can be modified. Turn
13218 constant non-CONSTRUCTOR store into non-constant if it is too large.
13219 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
13221 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
13224 2020-02-04 Richard Biener <rguenther@suse.de>
13226 PR tree-optimization/93964
13227 * graphite-isl-ast-to-gimple.c
13228 (gcc_expression_from_isl_ast_expr_id): Add intermediate
13229 conversion for pointer to integer converts.
13230 * graphite-scop-detection.c (assign_parameter_index_in_region):
13233 2020-03-04 Martin Liska <mliska@suse.cz>
13237 * doc/invoke.texi: Clarify --help=language and --help=common
13240 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13242 PR tree-optimization/94001
13243 * tree-tailcall.c (process_assignment): Before comparing op1 to
13244 *ass_var, verify *ass_var is non-NULL.
13246 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
13249 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
13252 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
13254 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
13255 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
13256 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
13257 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
13258 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
13259 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
13260 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
13261 (V_bf_low, V_bf_cvt_m): New mode attributes.
13262 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
13263 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
13264 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
13265 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
13266 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
13268 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13270 PR tree-optimization/93582
13271 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
13272 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
13273 members, initialize them in the constructor and if mask is non-NULL,
13274 artificially push_partial_def {} for the portions of the mask that
13276 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
13277 val and return (void *)-1. Formatting fix.
13278 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
13280 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
13281 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
13283 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
13285 (visit_stmt): Formatting fix.
13287 2020-03-03 Richard Biener <rguenther@suse.de>
13289 PR tree-optimization/93946
13290 * alias.h (refs_same_for_tbaa_p): Declare.
13291 * alias.c (refs_same_for_tbaa_p): New function.
13292 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
13294 * tree-ssa-scopedtables.h
13295 (avail_exprs_stack::lookup_avail_expr): Add output argument
13296 giving access to the hashtable entry.
13297 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
13299 * tree-ssa-dom.c: Include alias.h.
13300 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
13301 removing redundant store.
13302 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
13303 (ao_ref_init_from_vn_reference): Adjust prototype.
13304 (vn_reference_lookup_pieces): Likewise.
13305 (vn_reference_insert_pieces): Likewise.
13306 * tree-ssa-sccvn.c: Track base alias set in addition to alias
13308 (eliminate_dom_walker::eliminate_stmt): Also check base alias
13309 set when removing redundant stores.
13310 (visit_reference_op_store): Likewise.
13311 * dse.c (record_store): Adjust valdity check for redundant
13314 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13317 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
13319 PR rtl-optimization/94002
13320 * explow.c (plus_constant): Punt if cst has VOIDmode and
13321 get_pool_mode is different from mode.
13323 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13325 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
13326 address has an offset which fits the scalling constraint for a
13327 load/store operation.
13328 (legitimate_scaled_address_p): Update use
13329 leigitimate_small_data_address_p.
13330 (arc_print_operand): Likewise.
13331 (arc_legitimate_address_p): Likewise.
13332 (legitimate_small_data_address_p): Likewise.
13334 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13336 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
13337 (fnmasf4_fpu): Likewise.
13339 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13341 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
13343 (subdi3): Likewise.
13344 (adddi3_i): Remove pattern.
13345 (subdi3_i): Likewise.
13347 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13349 * config/arc/arc.md (eh_return): Add length info.
13351 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13353 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
13355 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13357 * doc/invoke.texi (Static Analyzer Options): Add
13358 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
13361 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
13364 * config/i386/i386.md (movstrict<mode>): Allow only
13365 registers with VALID_INT_MODE_P modes.
13367 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
13369 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
13370 (reduc_insn): Use 'U' and 'B' operand codes.
13371 (reduc_<reduc_op>_scal_<mode>): Allow all types.
13372 (reduc_<reduc_op>_scal_v64di): Delete.
13373 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
13374 (*plus_carry_dpp_shr_v64si): Change to ...
13375 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
13376 (mov_from_lane63_v64di): Change to ...
13377 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
13378 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
13379 Support UNSPEC_MOV_DPP_SHR output formats.
13380 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
13381 Add "use_extends" reductions.
13382 (print_operand_address): Add 'I' and 'U' codes.
13383 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
13385 2020-03-02 Martin Liska <mliska@suse.cz>
13387 * lto-wrapper.c: Fix typo in comment about
13388 C++ standard version.
13390 2020-03-01 Martin Sebor <msebor@redhat.com>
13393 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
13395 2020-03-01 Martin Sebor <msebor@redhat.com>
13397 PR middle-end/93829
13398 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
13399 of a pointer in the outermost ADDR_EXPRs.
13401 2020-02-28 Jeff Law <law@redhat.com>
13403 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
13404 * config/v850/v850.c (v850_asm_trampoline_template): Update
13407 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
13410 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
13413 2020-02-28 Martin Liska <mliska@suse.cz>
13416 * configure.ac: Improve detection of ld_date by requiring
13417 either two dashes or none.
13418 * configure: Regenerate.
13420 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
13422 PR rtl-optimization/93564
13423 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
13424 do not honor reg alloc order.
13426 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
13429 * config/aarch64/aarch64.c (aarch64_override_options): Fix
13430 misleading warning string.
13432 2020-02-27 Martin Sebor <msebor@redhat.com>
13434 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
13436 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
13439 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
13440 Split the insn into two parts. This insn only does variable
13441 extract from a register.
13442 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
13443 variable extract from memory.
13444 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
13445 only does variable extract from a register.
13446 (vsx_extract_v4sf_var_load): New insn, do variable extract from
13448 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
13449 into two parts. This insn only does variable extract from a
13451 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
13452 do variable extract from memory.
13454 2020-02-27 Martin Jambor <mjambor@suse.cz>
13455 Feng Xue <fxue@os.amperecomputing.com>
13458 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
13459 new function calls_same_node_or_its_all_contexts_clone_p.
13460 (cgraph_edge_brings_value_p): Use it.
13461 (cgraph_edge_brings_value_p): Likewise.
13462 (self_recursive_pass_through_p): Return false if caller is a clone.
13463 (self_recursive_agg_pass_through_p): Likewise.
13465 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
13467 PR middle-end/92152
13468 * alias.c (ends_tbaa_access_path_p): Break out from ...
13469 (component_uses_parent_alias_set_from): ... here.
13470 * alias.h (ends_tbaa_access_path_p): Declare.
13471 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
13472 handle trailing arrays past end of tbaa access path.
13473 (aliasing_component_refs_p): ... here; likewise.
13474 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
13475 path; disambiguate also past end of it.
13476 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
13479 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
13481 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
13482 beginning of the file.
13483 (vcreate_bf16, vcombine_bf16): New.
13484 (vdup_n_bf16, vdupq_n_bf16): New.
13485 (vdup_lane_bf16, vdup_laneq_bf16): New.
13486 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13487 (vduph_lane_bf16, vduph_laneq_bf16): New.
13488 (vset_lane_bf16, vsetq_lane_bf16): New.
13489 (vget_lane_bf16, vgetq_lane_bf16): New.
13490 (vget_high_bf16, vget_low_bf16): New.
13491 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13492 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13493 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13494 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13495 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13496 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13497 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13498 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13499 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13500 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13501 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
13502 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13503 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13504 (vreinterpretq_bf16_p128): New.
13505 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13506 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13507 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13508 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13509 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13510 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13511 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13512 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13513 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13514 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13515 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13516 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13517 (vreinterpretq_p128_bf16): New.
13518 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
13519 (V_elem): Likewise.
13520 (V_elem_l): Likewise.
13521 (VD_LANE): Likewise.
13523 (V_DOUBLE): Likewise.
13524 (VDQX): Add V4BF and V8BF.
13525 (V_two_elem, V_three_elem, V_four_elem): Likewise.
13527 (V_HALF): Likewise.
13528 (V_double_vector_mode): Likewise.
13529 (V_cmp_result): Likewise.
13530 (V_uf_sclr): Likewise.
13531 (V_sz_elem): Likewise.
13532 (Is_d_reg): Likewise.
13533 (V_mode_nunits): Likewise.
13534 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
13536 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13538 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
13539 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
13540 (<expander><mode>3<exec>): Likewise.
13541 (<expander><mode>3): New.
13542 (v<expander><mode>3): New.
13543 (<expander><mode>3): New.
13544 (<expander><mode>3<exec>): Rename to ...
13545 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
13546 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
13548 2020-02-27 Alexandre Oliva <oliva@adacore.com>
13550 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
13553 2020-02-27 Richard Biener <rguenther@suse.de>
13555 PR tree-optimization/93508
13556 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
13557 non-_CHK variants. Valueize their length arguments.
13559 2020-02-27 Richard Biener <rguenther@suse.de>
13561 PR tree-optimization/93953
13562 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
13563 to the hash-map entry.
13565 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13567 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
13569 2020-02-27 Mark Williams <mwilliams@fb.com>
13571 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
13572 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
13573 -ffile-prefix-map and -fmacro-prefix-map.
13574 * lto-streamer-out.c: Include file-prefix-map.h.
13575 (lto_output_location): Remap the file part of locations.
13577 2020-02-27 Jakub Jelinek <jakub@redhat.com>
13580 * gimplify.c (gimplify_init_constructor): Don't promote readonly
13581 DECL_REGISTER variables to TREE_STATIC.
13583 PR tree-optimization/93582
13584 PR tree-optimization/93945
13585 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
13586 non-zero INTEGER_CST second argument and ref->offset or ref->size
13587 not a multiple of BITS_PER_UNIT.
13589 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
13591 * doc/install.texi (Binaries): Update description of BullFreeware.
13593 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
13597 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
13598 C++ Language Options, Warning Options, and Static Analyzer
13599 Options lists. Document negative form of options enabled by
13600 default. Move some things around to more accurately sort
13601 warnings by category.
13602 (C++ Dialect Options, Warning Options, Static Analyzer
13603 Options): Document negative form of options when enabled by
13604 default. Move some things around to more accurately sort
13605 warnings by category. Add some missing index entries.
13606 Light copy-editing.
13608 2020-02-26 Carl Love <cel@us.ibm.com>
13611 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
13612 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
13613 for the vector unsigned short arguments. It is also listed as the
13614 name of the built-in for arguments vector unsigned short,
13615 vector unsigned int and vector unsigned long long built-ins. The
13616 name of the builtins for these arguments should be:
13617 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
13618 __builtin_crypto_vpmsumd respectively.
13620 2020-02-26 Richard Biener <rguenther@suse.de>
13622 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
13623 and load permutation.
13625 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
13627 PR middle-end/93843
13628 * optabs-tree.c (supportable_convert_operation): Reject types with
13631 2020-02-26 David Malcolm <dmalcolm@redhat.com>
13633 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
13635 2020-02-26 Jakub Jelinek <jakub@redhat.com>
13637 PR tree-optimization/93820
13638 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
13639 argument to ALL_INTEGER_CST_P boolean.
13640 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
13641 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
13642 adjacent INTEGER_CST store into merged_store->only_constants like
13645 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13648 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
13650 * cfghooks.c (verify_flow_info): Likewise.
13651 * predict.c (combine_predictions_for_bb): Likewise.
13652 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
13653 sucessor -> successor.
13654 (find_traces_1_round): Fix comment typo, destinarion -> destination.
13655 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
13657 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
13658 message typo, sucessors -> successors.
13660 2020-02-25 Martin Sebor <msebor@redhat.com>
13662 * doc/extend.texi (attribute access): Correct an example.
13664 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13666 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
13668 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
13669 (VAR15, VAR16): New.
13670 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
13671 (VD): Enable for V4BF.
13673 (VQ): Enable for V8BF.
13675 (VQ_NO2E): Likewise.
13676 (VDBL, Vdbl): Add V4BF.
13677 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
13678 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
13679 (bfloat16x8x2_t): Likewise.
13680 (bfloat16x4x3_t): Likewise.
13681 (bfloat16x8x3_t): Likewise.
13682 (bfloat16x4x4_t): Likewise.
13683 (bfloat16x8x4_t): Likewise.
13684 (vcombine_bf16): New.
13685 (vld1_bf16, vld1_bf16_x2): New.
13686 (vld1_bf16_x3, vld1_bf16_x4): New.
13687 (vld1q_bf16, vld1q_bf16_x2): New.
13688 (vld1q_bf16_x3, vld1q_bf16_x4): New.
13689 (vld1_lane_bf16): New.
13690 (vld1q_lane_bf16): New.
13691 (vld1_dup_bf16): New.
13692 (vld1q_dup_bf16): New.
13695 (vld2_dup_bf16): New.
13696 (vld2q_dup_bf16): New.
13699 (vld3_dup_bf16): New.
13700 (vld3q_dup_bf16): New.
13703 (vld4_dup_bf16): New.
13704 (vld4q_dup_bf16): New.
13705 (vst1_bf16, vst1_bf16_x2): New.
13706 (vst1_bf16_x3, vst1_bf16_x4): New.
13707 (vst1q_bf16, vst1q_bf16_x2): New.
13708 (vst1q_bf16_x3, vst1q_bf16_x4): New.
13709 (vst1_lane_bf16): New.
13710 (vst1q_lane_bf16): New.
13718 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13720 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
13721 (VALL_F16): Likewise.
13722 (VALLDI_F16): Likewise.
13724 (Vetype): Likewise.
13725 (vswap_width_name): Likewise.
13726 (VSWAP_WIDTH): Likewise.
13730 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
13731 (vget_lane_bf16, vgetq_lane_bf16): New.
13732 (vcreate_bf16): New.
13733 (vdup_n_bf16, vdupq_n_bf16): New.
13734 (vdup_lane_bf16, vdup_laneq_bf16): New.
13735 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13736 (vduph_lane_bf16, vduph_laneq_bf16): New.
13737 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13738 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13739 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13740 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13741 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13742 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13743 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13744 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13745 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13746 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13747 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
13748 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
13749 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13750 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13751 (vreinterpretq_bf16_p128): New.
13752 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13753 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13754 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13755 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13756 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13757 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13758 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13759 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13760 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13761 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13762 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13763 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13764 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
13765 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
13766 (vreinterpretq_p128_bf16): New.
13768 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
13770 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
13771 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
13772 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
13773 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
13774 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
13775 * config/arm/iterators.md (VSF2BF): New attribute.
13776 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
13777 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
13778 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
13780 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
13782 * config/arm/arm.md (required_for_purecode): New attribute.
13783 (enabled): Handle required_for_purecode.
13784 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
13785 work with -mpure-code.
13787 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13789 PR rtl-optimization/93908
13790 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
13793 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
13795 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
13797 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
13799 * doc/install.texi (--enable-checking): Adjust wording.
13801 2020-02-25 Richard Biener <rguenther@suse.de>
13803 PR tree-optimization/93868
13804 * tree-vect-slp.c (slp_copy_subtree): New function.
13805 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
13806 re-arranging stmts in it.
13808 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13810 PR middle-end/93874
13811 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
13812 dummy function and remove it at the end.
13814 PR translation/93864
13815 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
13816 paramter -> parameter.
13817 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
13818 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
13820 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
13822 * doc/install.texi (--enable-checking): Properly document current
13824 (--enable-stage1-checking): Minor clarification about bootstrap.
13826 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13829 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
13830 -fanalyzer-checker=taint is also required.
13831 (-fanalyzer-checker=): Note that providing this option enables the
13832 given checker, and doing so may be required for checkers that are
13833 disabled by default.
13835 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13837 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
13838 significant control flow events; add a "3" which shows all
13839 control flow events; the old "3" becomes "4".
13841 2020-02-24 Jakub Jelinek <jakub@redhat.com>
13843 PR tree-optimization/93582
13844 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
13845 pd.offset and pd.size to be counted in bits rather than bytes, add
13846 support for maxsizei that is not a multiple of BITS_PER_UNIT and
13847 handle bitfield stores and loads.
13848 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
13849 uncomparable quantities - bytes vs. bits. Allow push_partial_def
13850 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
13851 pd.offset/pd.size to be counted in bits rather than bytes.
13852 Formatting fix. Rename shadowed len variable to buflen.
13854 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13855 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
13858 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
13859 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
13860 * opts-common.c (parse_options_from_collect_gcc_options): New function.
13861 (prepend_xassembler_to_collect_as_options): Likewise.
13862 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
13863 (prepend_xassembler_to_collect_as_options): Likewise.
13864 * lto-opts.c (lto_write_options): Stream assembler options
13865 in COLLECT_AS_OPTIONS.
13866 * lto-wrapper.c (xassembler_options_error): New static variable.
13867 (get_options_from_collect_gcc_options): Move parsing options code to
13868 parse_options_from_collect_gcc_options and call it.
13869 (merge_and_complain): Validate -Xassembler options.
13870 (append_compiler_options): Handle OPT_Xassembler.
13871 (run_gcc): Append command line -Xassembler options to
13872 collect_gcc_options.
13873 * doc/invoke.texi: Add documentation about using Xassembler
13876 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
13878 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
13880 (riscv_rtx_costs): Update cost model for LTGT.
13882 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
13884 PR rtl-optimization/93564
13885 * ira-color.c (struct update_cost_queue_elem): New member start.
13886 (queue_update_cost, get_next_update_cost): Add new arg start.
13887 (allocnos_conflict_p): New function.
13888 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
13889 Add checking conflicts with allocnos_conflict_p.
13890 (update_costs_from_prefs, restore_costs_from_copies): Adjust
13891 update_costs_from_allocno calls.
13892 (update_conflict_hard_regno_costs): Add checking conflicts with
13893 allocnos_conflict_p. Adjust calls of queue_update_cost and
13894 get_next_update_cost.
13895 (assign_hard_reg): Adjust calls of queue_update_cost. Add
13897 (bucket_allocno_compare_func): Restore previous version.
13899 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
13901 * config/pa/pa.c (pa_function_value): Fix check for word and
13902 double-word size when handling aggregate return values.
13903 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
13904 that homogeneous SFmode and DFmode aggregates are passed and returned
13905 in general registers.
13907 2020-02-21 Jakub Jelinek <jakub@redhat.com>
13909 PR translation/93759
13910 * opts.c (print_filtered_help): Translate help before appending
13911 messages to it rather than after that.
13913 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
13915 PR rtl-optimization/PR92989
13916 * lra-lives.c (process_bb_lives): Restore the original order
13917 of the bb liveness update. Call make_hard_regno_dead for each
13918 register clobbered at the start of an EH receiver.
13920 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
13923 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
13924 self-recursively generated.
13926 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
13929 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
13932 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
13934 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
13935 Document new target supports option.
13937 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
13939 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
13940 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
13941 * config/arm/iterators.md (MATMUL): New iterator.
13942 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
13943 (mmla_sfx): New attribute.
13944 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
13945 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
13946 (UNSPEC_MATMUL_US): New.
13948 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13950 * config/arm/arm.md: Prevent scalar shifts from being used when big
13953 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
13954 Richard Biener <rguenther@suse.de>
13956 PR tree-optimization/93586
13957 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
13958 after mismatched array refs; do not sure type size information to
13959 recover from unmatched referneces with !flag_strict_aliasing_p.
13961 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13963 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
13964 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
13965 (scatter_store<mode>): Rename to ...
13966 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
13967 (scatter<mode>_exec): Delete. Move contents ...
13968 (mask_scatter_store<mode>): ... here, and rename that to ...
13969 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
13970 Remove mode conversion.
13971 (mask_gather_load<mode>): Rename to ...
13972 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
13973 Remove mode conversion.
13974 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
13976 2020-02-21 Martin Jambor <mjambor@suse.cz>
13978 PR tree-optimization/93845
13979 * tree-sra.c (verify_sra_access_forest): Only test access size of
13982 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13984 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
13985 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
13986 (addv64di3_exec): Likewise.
13987 (subv64di3): Likewise.
13988 (subv64di3_exec): Likewise.
13989 (addv64di3_zext): Likewise.
13990 (addv64di3_zext_exec): Likewise.
13991 (addv64di3_zext_dup): Likewise.
13992 (addv64di3_zext_dup_exec): Likewise.
13993 (addv64di3_zext_dup2): Likewise.
13994 (addv64di3_zext_dup2_exec): Likewise.
13995 (addv64di3_sext_dup2): Likewise.
13996 (addv64di3_sext_dup2_exec): Likewise.
13997 (<expander>v64di3): Likewise.
13998 (<expander>v64di3_exec): Likewise.
13999 (*<reduc_op>_dpp_shr_v64di): Likewise.
14000 (*plus_carry_dpp_shr_v64di): Likewise.
14001 * config/gcn/gcn.md (adddi3): Likewise.
14002 (addptrdi3): Likewise.
14003 (<expander>di3): Likewise.
14005 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
14007 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
14009 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14011 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
14012 support. Use aarch64_emit_mult instead of emitting multiplication
14013 instructions directly.
14014 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
14015 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
14017 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14019 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
14020 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
14021 instead of emitting multiplication instructions directly.
14022 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
14023 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
14024 (@aarch64_frecps<mode>): New expanders.
14026 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14028 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
14029 on and produce uint64_ts rather than ints.
14030 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
14031 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
14033 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14035 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
14036 an unused xmsk register when handling approximate rsqrt.
14038 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14040 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
14041 flag_finite_math_only condition.
14043 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
14046 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
14047 to destination operand for shufps alternative.
14048 (*vec_extractv2si_1): Ditto.
14050 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
14053 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
14056 2020-02-20 Martin Liska <mliska@suse.cz>
14058 PR translation/93831
14059 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
14061 2020-02-20 Martin Liska <mliska@suse.cz>
14063 PR translation/93830
14064 * common/config/avr/avr-common.c: Remote trailing "|".
14066 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14068 * collect2.c (maybe_run_lto_and_relink): Fix typo in
14071 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
14073 PR tree-optimization/93767
14074 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
14075 access-size bias from the offset calculations for negative strides.
14077 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14079 * collect2.c (c_file, o_file): Make const again.
14080 (ldout,lderrout, dump_ld_file): Remove.
14081 (tool_cleanup): Avoid calling not signal-safe functions.
14082 (maybe_run_lto_and_relink): Avoid possible signal handler
14083 access to unintialzed memory (lto_o_files).
14084 (main): Avoid leaking temp files in $TMPDIR.
14085 Initialize c_file/o_file with concat, which avoids exposing
14086 uninitialized memory to signal handler, which calls unlink(!).
14087 Avoid calling maybe_unlink when the main function returns,
14088 since the atexit handler is already doing this.
14089 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
14091 2020-02-19 Martin Jambor <mjambor@suse.cz>
14093 PR tree-optimization/93776
14094 * tree-sra.c (create_access): Do not create zero size accesses.
14095 (get_access_for_expr): Do not search for zero sized accesses.
14097 2020-02-19 Martin Jambor <mjambor@suse.cz>
14099 PR tree-optimization/93667
14100 * tree-sra.c (scalarizable_type_p): Return false if record fields
14101 do not follow wach other.
14103 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
14105 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
14106 rather than fmv.x.s/fmv.s.x.
14108 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
14110 * config/aarch64/aarch64-simd-builtins.def
14111 (intrinsic_vec_smult_lo_): New.
14112 (intrinsic_vec_umult_lo_): Likewise.
14113 (vec_widen_smult_hi_): Likewise.
14114 (vec_widen_umult_hi_): Likewise.
14115 * config/aarch64/aarch64-simd.md
14116 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
14117 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
14118 (vmull_high_s16): Likewise.
14119 (vmull_high_s32): Likewise.
14120 (vmull_high_u8): Likewise.
14121 (vmull_high_u16): Likewise.
14122 (vmull_high_u32): Likewise.
14123 (vmull_s8): Likewise.
14124 (vmull_s16): Likewise.
14125 (vmull_s32): Likewise.
14126 (vmull_u8): Likewise.
14127 (vmull_u16): Likewise.
14128 (vmull_u32): Likewise.
14130 2020-02-18 Martin Liska <mliska@suse.cz>
14132 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
14133 bootstrap by missing removal of invalid sanity check.
14135 2020-02-18 Martin Liska <mliska@suse.cz>
14138 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
14139 Always compare LHS of gimple_assign.
14141 2020-02-18 Martin Liska <mliska@suse.cz>
14144 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
14145 and return type of functions.
14146 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
14147 Drop MALLOC attribute for void functions.
14148 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
14149 malloc_state for a new VOID clone.
14151 2020-02-18 Martin Liska <mliska@suse.cz>
14154 * common.opt: Add -fprofile-reproducibility.
14155 * doc/invoke.texi: Document it.
14156 * value-prof.c (dump_histogram_value):
14157 Document and support behavior for counters[0]
14158 being a negative value.
14159 (get_nth_most_common_value): Handle negative
14160 counters[0] in respect to flag_profile_reproducible.
14162 2020-02-18 Jakub Jelinek <jakub@redhat.com>
14165 * cgraph.c (verify_speculative_call): Use speculative_id instead of
14166 speculative_uid in messages. Remove trailing whitespace from error
14167 message. Use num_speculative_call_targets instead of
14168 num_speculative_targets in a message.
14169 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
14170 edge messages and stmt instead of cal_stmt in reference message.
14172 PR tree-optimization/93780
14173 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
14174 before calling build_vector_type.
14175 (execute_update_addresses_taken): Likewise.
14178 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
14179 typo, functoin -> function.
14180 * tree.c (free_lang_data_in_decl): Fix comment typo,
14181 functoin -> function.
14182 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
14184 2020-02-17 David Malcolm <dmalcolm@redhat.com>
14186 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
14188 (print_option_information): Don't call get_option_url if URLs
14191 2020-02-17 Alexandre Oliva <oliva@adacore.com>
14193 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
14194 handling of register_common-less targets.
14196 2020-02-17 Martin Liska <mliska@suse.cz>
14199 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
14201 2020-02-17 Martin Liska <mliska@suse.cz>
14203 PR translation/93755
14204 * config/rs6000/rs6000.c (rs6000_option_override_internal):
14207 2020-02-17 Martin Liska <mliska@suse.cz>
14210 * config/rx/elf.opt: Fix typo.
14212 2020-02-17 Richard Biener <rguenther@suse.de>
14215 * opts-global.c (print_ignored_options): Use inform and
14218 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
14221 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
14223 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
14226 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
14227 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
14229 2020-02-15 Jason Merrill <jason@redhat.com>
14231 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
14233 2020-02-15 Jakub Jelinek <jakub@redhat.com>
14235 PR tree-optimization/93744
14236 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
14237 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
14238 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
14239 sure @2 in the first and @1 in the other patterns has no side-effects.
14241 2020-02-15 David Malcolm <dmalcolm@redhat.com>
14242 Bernd Edlinger <bernd.edlinger@hotmail.de>
14246 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
14247 * configure.ac (--with-diagnostics-urls): New configuration
14248 option, based on --with-diagnostics-color.
14249 (DIAGNOSTICS_URLS_DEFAULT): New define.
14250 * config.h: Regenerate.
14251 * configure: Regenerate.
14252 * diagnostic.c (diagnostic_urls_init): Handle -1 for
14253 DIAGNOSTICS_URLS_DEFAULT from configure-time
14254 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
14255 and TERM_URLS environment variable.
14256 * diagnostic-url.h (diagnostic_url_format): New enum type.
14257 (diagnostic_urls_enabled_p): rename to...
14258 (determine_url_format): ... this, and change return type.
14259 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
14260 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
14261 the linux console, and mingw.
14262 (diagnostic_urls_enabled_p): rename to...
14263 (determine_url_format): ... this, and adjust.
14264 * pretty-print.h (pretty_printer::show_urls): rename to...
14265 (pretty_printer::url_format): ... this, and change to enum.
14266 * pretty-print.c (pretty_printer::pretty_printer,
14267 pp_begin_url, pp_end_url, test_urls): Adjust.
14268 * doc/install.texi (--with-diagnostics-urls): Document the new
14269 configuration option.
14270 (--with-diagnostics-color): Document the existing interaction
14271 with GCC_COLORS better.
14272 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
14273 vindex reference. Update description of defaults based on the above.
14274 (-fdiagnostics-color): Update description of how -fdiagnostics-color
14275 interacts with GCC_COLORS.
14277 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
14280 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
14281 conjunction with TARGET_GNU_TLS in early return.
14283 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
14285 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
14286 the mode is not wider than UNITS_PER_WORD.
14288 2020-02-14 Martin Jambor <mjambor@suse.cz>
14290 PR tree-optimization/93516
14291 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
14292 access of the same type as the parent.
14293 (propagate_subaccesses_from_lhs): Likewise.
14295 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
14298 * config/i386/avx512vbmi2intrin.h
14299 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
14300 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
14301 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
14302 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
14303 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
14304 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
14305 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
14306 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
14307 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
14308 of lacking a closing parenthesis.
14309 * config/i386/avx512vbmi2vlintrin.h
14310 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
14311 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
14312 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
14313 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
14314 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
14315 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
14316 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
14317 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
14318 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
14319 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
14320 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
14321 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
14322 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
14323 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
14324 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
14325 _mm_shldi_epi32, _mm_mask_shldi_epi32,
14326 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
14327 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
14329 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
14332 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
14333 the target function entry.
14335 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14337 * common/config/arc/arc-common.c (arc_option_optimization_table):
14338 Disable if-conversion step when optimized for size.
14340 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14342 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
14343 R12-R15 are always in ARCOMPACT16_REGS register class.
14344 * config/arc/arc.opt (mq-class): Deprecate.
14345 * config/arc/constraint.md ("q"): Remove dependency on mq-class
14347 * doc/invoke.texi (mq-class): Update text.
14348 * common/config/arc/arc-common.c (arc_option_optimization_table):
14351 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14353 * config/arc/arc.c (arc_insn_cost): New function.
14354 (TARGET_INSN_COST): Define.
14355 * config/arc/arc.md (cost): New attribute.
14356 (add_n): Use arc_nonmemory_operand.
14357 (ashlsi3_insn): Likewise, also update constraints.
14358 (ashrsi3_insn): Likewise.
14359 (rotrsi3): Likewise.
14360 (add_shift): Likewise.
14361 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
14363 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14365 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
14367 (umulsidi_600): Likewise.
14369 2020-02-13 Jakub Jelinek <jakub@redhat.com>
14372 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
14373 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
14374 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
14375 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
14376 pass __A to the builtin followed by __W instead of __A followed by
14378 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
14379 _mm512_mask_popcnt_epi64): Likewise.
14380 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
14381 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
14382 _mm256_mask_popcnt_epi64): Likewise.
14384 PR tree-optimization/93582
14385 * fold-const.h (shift_bytes_in_array_left,
14386 shift_bytes_in_array_right): Declare.
14387 * fold-const.c (shift_bytes_in_array_left,
14388 shift_bytes_in_array_right): New function, moved from
14389 gimple-ssa-store-merging.c, no longer static.
14390 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
14391 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
14392 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
14393 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
14394 shift_bytes_in_array.
14395 (verify_shift_bytes_in_array): Rename to ...
14396 (verify_shift_bytes_in_array_left): ... this. Use
14397 shift_bytes_in_array_left instead of shift_bytes_in_array.
14398 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
14399 instead of verify_shift_bytes_in_array.
14400 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
14401 / native_interpret_expr where the store covers all needed bits,
14402 punt on PDP-endian, otherwise allow all involved offsets and sizes
14403 not to be byte-aligned.
14406 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
14407 use const_0_to_255_operand predicate instead of immediate_operand.
14408 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
14409 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
14410 vgf2p8affineinvqb_<mode><mask_name>,
14411 vgf2p8affineqb_<mode><mask_name>): Drop mode from
14412 const_0_to_255_operand predicated operands.
14414 2020-02-12 Jeff Law <law@redhat.com>
14416 * config/h8300/h8300.md (comparison shortening peepholes): Use
14417 a mode iterator to merge the HImode and SImode peepholes.
14419 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14421 PR middle-end/93663
14422 * real.c (is_even): Make static. Function comment fix.
14423 (is_halfway_below): Make static, don't assert R is not inf/nan,
14424 instead return false for those. Small formatting fixes.
14426 2020-02-12 Martin Sebor <msebor@redhat.com>
14428 PR middle-end/93646
14429 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
14430 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
14431 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
14432 (strlen_check_and_optimize_call): Adjust callee name.
14434 2020-02-12 Jeff Law <law@redhat.com>
14436 * config/h8300/h8300.md (comparison shortening peepholes): Drop
14437 (and (xor)) variant. Combine other two into single peephole.
14439 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14441 PR rtl-optimization/93565
14442 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
14444 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14446 * config/aarch64/aarch64-simd.md
14447 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
14448 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
14449 generating separate ADDV and zero_extend patterns.
14450 * config/aarch64/iterators.md (VDQV_E): New iterator.
14452 2020-02-12 Jeff Law <law@redhat.com>
14454 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
14455 expanders, splits, etc.
14456 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
14457 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
14458 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
14459 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
14460 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
14461 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
14462 function prototype.
14463 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
14465 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14468 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
14469 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
14470 TARGET_AVX512DQ from condition.
14471 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
14472 instead of <mask_mode512bit_condition> in condition. If
14473 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
14475 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
14478 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
14481 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
14483 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
14485 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
14486 where strlen is more legible.
14487 (rs6000_builtin_vectorized_libmass): Ditto.
14488 (rs6000_print_options_internal): Ditto.
14490 2020-02-11 Martin Sebor <msebor@redhat.com>
14492 PR tree-optimization/93683
14493 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
14495 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
14497 * config/rs6000/predicates.md (cint34_operand): Rename the
14498 -mprefixed-addr option to be -mprefixed.
14499 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
14500 the -mprefixed-addr option to be -mprefixed.
14501 (OTHER_FUTURE_MASKS): Likewise.
14502 (POWERPC_MASKS): Likewise.
14503 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
14504 the -mprefixed-addr option to be -mprefixed. Change error
14505 messages to refer to -mprefixed.
14506 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
14508 (rs6000_legitimate_offset_address_p): Likewise.
14509 (rs6000_mode_dependent_address): Likewise.
14510 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
14511 "-mprefixed" for target attributes and pragmas.
14512 (address_to_insn_form): Rename the -mprefixed-addr option to be
14514 (rs6000_adjust_insn_length): Likewise.
14515 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
14516 -mprefixed-addr option to be -mprefixed.
14517 (ASM_OUTPUT_OPCODE): Likewise.
14518 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
14519 -mprefixed-addr option to be -mprefixed.
14520 * config/rs6000/rs6000.opt (-mprefixed): Rename the
14521 -mprefixed-addr option to be prefixed. Change the option from
14522 being undocumented to being documented.
14523 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
14524 -mprefixed option. Update the -mpcrel documentation to mention
14527 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
14529 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
14530 including FIRST_PSEUDO_REGISTER - 1.
14531 * ira-color.c (print_hard_reg_set): Ditto.
14533 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14535 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
14536 (USTERNOP_QUALIFIERS): New define.
14537 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
14538 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
14539 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
14540 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
14541 * config/arm/arm_neon.h (vusdot_s32): New.
14542 (vusdot_lane_s32): New.
14543 (vusdotq_lane_s32): New.
14544 (vsudot_lane_s32): New.
14545 (vsudotq_lane_s32): New.
14546 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
14547 * config/arm/iterators.md (DOTPROD_I8MM): New.
14548 (sup, opsuffix): Add <us/su>.
14549 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
14550 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
14552 2020-02-11 Richard Biener <rguenther@suse.de>
14554 PR tree-optimization/93661
14555 PR tree-optimization/93662
14556 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
14557 tree_to_poly_int64.
14558 * tree-sra.c (get_access_for_expr): Likewise.
14560 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14563 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
14564 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
14565 Change condition from TARGET_AVX2 to TARGET_AVX.
14567 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
14570 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
14571 argument of strncmp.
14573 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14575 Try to generate zero-based comparisons.
14576 * config/cris/cris.c (cris_reduce_compare): New function.
14577 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
14578 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
14579 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
14581 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
14584 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
14585 in Thumb state and also as a destination in Arm state. Add T16
14588 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14590 * md.texi (Define Subst): Match closing paren in example.
14592 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14596 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
14597 arguments of strncmp.
14599 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
14602 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
14603 but different source value.
14604 (adjust_callers_for_value_intersection): New function.
14605 (gather_edges_for_value): Adjust order of callers to let a
14606 non-self-recursive caller be the first element.
14607 (self_recursive_pass_through_p): Add a new parameter "simple", and
14608 check generalized self-recursive pass-through jump function.
14609 (self_recursive_agg_pass_through_p): Likewise.
14610 (find_more_scalar_values_for_callers_subset): Compute value from
14611 pass-through jump function for self-recursive.
14612 (intersect_with_plats): Cleanup previous implementation code for value
14613 itersection with self-recursive call edge.
14614 (intersect_with_agg_replacements): Likewise.
14615 (intersect_aggregates_with_edge): Deduce value from pass-through jump
14616 function for self-recursive call edge. Cleanup previous implementation
14617 code for value intersection with self-recursive call edge.
14618 (decide_whether_version_node): Remove dead callers and adjust order
14619 to let a non-self-recursive caller be the first element.
14621 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
14623 * recog.c: Move pass_split_before_sched2 code in front of
14624 pass_split_before_regstack.
14625 (pass_data_split_before_sched2): Rename pass to split3 from split4.
14626 (pass_data_split_before_regstack): Rename pass to split4 from split3.
14627 (rest_of_handle_split_before_sched2): Remove.
14628 (pass_split_before_sched2::execute): Unconditionally call
14630 (enable_split_before_sched2): New function.
14631 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
14632 (pass_split_before_regstack::gate): Ditto.
14633 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
14634 Update name check for renamed split4 pass.
14635 * config/sh/sh.c (register_sh_passes): Update pass insertion
14636 point for renamed split4 pass.
14638 2020-02-09 Jakub Jelinek <jakub@redhat.com>
14640 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
14641 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
14642 copying them around between host and target.
14644 2020-02-08 Andrew Pinski <apinski@marvell.com>
14647 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
14648 STRICT_ALIGNMENT also.
14650 2020-02-08 Jim Wilson <jimw@sifive.com>
14653 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
14655 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
14656 Jakub Jelinek <jakub@redhat.com>
14659 * config/i386/i386.h (CALL_USED_REGISTERS): Make
14660 xmm16-xmm31 call-used even in 64-bit ms-abi.
14662 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
14664 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
14665 (simd_ummla, simd_usmmla): Likewise.
14666 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
14667 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
14668 (vusmmlaq_s32): New.
14670 2020-02-07 Richard Biener <rguenther@suse.de>
14672 PR middle-end/93519
14673 * tree-inline.c (fold_marked_statements): Do a PRE walk,
14674 skipping unreachable regions.
14675 (optimize_inline_calls): Skip folding stmts when we didn't
14678 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
14681 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
14682 Don't return aggregates with only SFmode and DFmode in SSE
14684 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
14686 2020-02-07 Jakub Jelinek <jakub@redhat.com>
14689 * config/rs6000/rs6000-logue.c
14690 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
14691 if it fails, move rs into end_addr and retry. Add
14692 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
14693 the insn pattern doesn't describe well what exactly happens to
14697 * config/i386/predicates.md (avx_identity_operand): Remove.
14698 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
14699 (avx_<castmode><avxsizesuffix>_<castmode>,
14700 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
14701 a VEC_CONCAT of the operand and UNSPEC_CAST.
14702 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
14703 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
14707 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
14708 recog_data.insn if distance_non_agu_define changed it.
14710 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
14713 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
14714 we only had X-FORM (reg+reg) addressing for vectors. Also before
14715 ISA 3.0, we only had X-FORM addressing for scalars in the
14716 traditional Altivec registers.
14718 2020-02-06 <zhongyunde@huawei.com>
14719 Vladimir Makarov <vmakarov@redhat.com>
14721 PR rtl-optimization/93561
14722 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
14723 hard register range.
14725 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14727 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
14730 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
14732 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
14733 where the low and the high 32 bits are equal to each other specially,
14734 with an rldimi instruction.
14736 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14738 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
14740 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14742 * config/arm/arm-tables.opt: Regenerate.
14744 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14747 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
14748 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
14749 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
14751 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14753 PR rtl-optimization/87763
14754 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
14756 2020-02-06 Delia Burduv <delia.burduv@arm.com>
14758 * config/aarch64/aarch64-simd-builtins.def
14759 (bfmlaq): New built-in function.
14760 (bfmlalb): New built-in function.
14761 (bfmlalt): New built-in function.
14762 (bfmlalb_lane): New built-in function.
14763 (bfmlalt_lane): New built-in function.
14764 * config/aarch64/aarch64-simd.md
14765 (aarch64_bfmmlaqv4sf): New pattern.
14766 (aarch64_bfmlal<bt>v4sf): New pattern.
14767 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
14768 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
14769 (vbfmlalbq_f32): New intrinsic.
14770 (vbfmlaltq_f32): New intrinsic.
14771 (vbfmlalbq_lane_f32): New intrinsic.
14772 (vbfmlaltq_lane_f32): New intrinsic.
14773 (vbfmlalbq_laneq_f32): New intrinsic.
14774 (vbfmlaltq_laneq_f32): New intrinsic.
14775 * config/aarch64/iterators.md (BF_MLA): New int iterator.
14776 (bt): New int attribute.
14778 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
14780 * config/i386/i386.md (*pushtf): Emit "#" instead of
14781 calling gcc_unreachable in insn output.
14784 (*pushsf_rex64): Ditto for alternatives other than 1.
14785 (*pushsf): Ditto for alternatives other than 1.
14787 2020-02-06 Martin Liska <mliska@suse.cz>
14789 PR gcov-profile/91971
14790 PR gcov-profile/93466
14791 * coverage.c (coverage_init): Revert mangling of
14792 path into filename. It can lead to huge filename length.
14793 Creation of subfolders seem more natural.
14795 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14798 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
14799 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
14800 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
14802 2020-02-06 Jakub Jelinek <jakub@redhat.com>
14805 * config/i386/predicates.md (avx_identity_operand): New predicate.
14806 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
14807 define_insn_and_split.
14810 * omp-low.c (use_pointer_for_field): For nested constructs, also
14811 look for map clauses on target construct.
14812 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
14813 taskreg_nesting_level.
14816 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
14817 shared clause, call omp_notice_variable on outer context if any.
14819 2020-02-05 Jason Merrill <jason@redhat.com>
14822 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
14823 non-zero address even if weak and not yet defined.
14825 2020-02-05 Martin Sebor <msebor@redhat.com>
14827 PR tree-optimization/92765
14828 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
14829 * tree-ssa-strlen.c (compute_string_length): Remove.
14830 (determine_min_objsize): Remove.
14831 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
14832 Avoid using type size as the upper bound on string length.
14833 (handle_builtin_string_cmp): Add an argument. Adjust.
14834 (strlen_check_and_optimize_call): Pass additional argument to
14835 handle_builtin_string_cmp.
14837 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
14839 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
14840 (*pushdi2_rex64 peephole2): Unconditionally split after
14841 epilogue_completed.
14842 (*ashl<mode>3_doubleword): Ditto.
14843 (*<shift_insn><mode>3_doubleword): Ditto.
14845 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
14848 * config/rs6000/rs6000.c (get_vector_offset): Fix
14850 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
14852 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
14854 2020-02-05 David Malcolm <dmalcolm@redhat.com>
14856 * doc/analyzer.texi
14857 (Special Functions for Debugging the Analyzer): Update description
14858 of __analyzer_dump_exploded_nodes.
14860 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14863 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
14864 include sets and not clobbers in the vzeroupper pattern.
14865 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
14866 the parallel has 17 (64-bit) or 9 (32-bit) elts.
14867 (*avx_vzeroupper_1): New define_insn_and_split.
14870 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
14871 don't run when !optimize.
14872 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
14875 2020-02-05 Richard Biener <rguenther@suse.de>
14877 PR middle-end/90648
14878 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
14879 checks before matching calls.
14881 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14883 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
14884 function comment typo.
14886 PR middle-end/93555
14887 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
14888 simd_clone_create failed when i == 0, adjust clone->nargs by
14891 2020-02-05 Martin Liska <mliska@suse.cz>
14894 * doc/invoke.texi: Document that one should
14895 not combine ASLR and -fpch.
14897 2020-02-04 Richard Biener <rguenther@suse.de>
14899 PR tree-optimization/93538
14900 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
14902 2020-02-04 Richard Biener <rguenther@suse.de>
14904 PR tree-optimization/91123
14905 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
14906 (vn_walk_cb_data::last_vuse): New member.
14907 (vn_walk_cb_data::saved_operands): Likewsie.
14908 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
14909 (vn_walk_cb_data::push_partial_def): Use finish.
14910 (vn_reference_lookup_2): Update last_vuse and use finish if
14911 we've saved operands.
14912 (vn_reference_lookup_3): Use finish and update calls to
14913 push_partial_defs everywhere. When translating through
14914 memcpy or aggregate copies save off operands and alias-set.
14915 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
14916 operation for redundant store removal.
14918 2020-02-04 Richard Biener <rguenther@suse.de>
14920 PR tree-optimization/92819
14921 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
14922 generating more stmts than before.
14924 2020-02-04 Martin Liska <mliska@suse.cz>
14926 * config/arm/arm.c (arm_gen_far_branch): Move the function
14927 outside of selftests.
14929 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14931 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
14932 function to adjust PC-relative vector addresses.
14933 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
14934 handle vectors with PC-relative addresses.
14936 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14938 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
14940 (hard_reg_and_mode_to_addr_mask): Delete.
14941 (rs6000_adjust_vec_address): If the original vector address
14942 was REG+REG or REG+OFFSET and the element is not zero, do the add
14943 of the elements in the original address before adding the offset
14944 for the vector element. Use address_to_insn_form to validate the
14945 address using the register being loaded, rather than guessing
14946 whether the address is a DS-FORM or DQ-FORM address.
14948 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14950 * config/rs6000/rs6000.c (get_vector_offset): New helper function
14951 to calculate the offset in memory from the start of a vector of a
14952 particular element. Add code to keep the element number in
14953 bounds if the element number is variable.
14954 (rs6000_adjust_vec_address): Move calculation of offset of the
14955 vector element to get_vector_offset.
14956 (rs6000_split_vec_extract_var): Do not do the initial AND of
14957 element here, move the code to get_vector_offset.
14959 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14961 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
14964 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
14966 * config/rs6000/constraints.md: Improve documentation.
14968 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
14971 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
14972 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
14974 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
14976 * config.gcc: Remove "carrizo" support.
14977 * config/gcn/gcn-opts.h (processor_type): Likewise.
14978 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
14979 * config/gcn/gcn.opt (gpu_type): Likewise.
14980 * config/gcn/t-omp-device: Likewise.
14982 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14985 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
14986 * config/arm/arm.c (arm_gen_far_branch): New function
14987 arm_gen_far_branch.
14988 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
14990 2020-02-03 Julian Brown <julian@codesourcery.com>
14991 Tobias Burnus <tobias@codesourcery.com>
14993 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
14995 2020-02-03 Jakub Jelinek <jakub@redhat.com>
14998 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
14999 valid RTL to sum up the lowest and second lowest bytes of the popcnt
15002 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
15004 PR rtl-optimization/91333
15005 * ira-color.c (struct allocno_color_data): Add member
15007 (init_allocno_threads): Set the member up.
15008 (bucket_allocno_compare_func): Add compare hard reg
15011 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
15013 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
15015 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
15016 * config.in: Regenerated.
15017 * configure: Regenerated.
15018 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
15019 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
15020 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
15022 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
15024 * configure: Regenerate.
15026 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
15028 PR rtl-optimization/91333
15029 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
15030 reg preferences comparison up.
15032 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
15034 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
15035 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
15036 aarch64-sve-builtins-base.h.
15037 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
15038 aarch64-sve-builtins-base.cc.
15039 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
15040 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15041 (svcvtnt): Declare.
15042 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
15043 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15044 (svcvtnt): New functions.
15045 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
15046 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15047 (svcvtnt): New functions.
15048 (svcvt): Add a form that converts f32 to bf16.
15049 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
15050 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
15052 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
15053 Treat B as bfloat16_t.
15054 (ternary_bfloat_lane_base): New class.
15055 (ternary_bfloat_def): Likewise.
15056 (ternary_bfloat): New shape.
15057 (ternary_bfloat_lane_def): New class.
15058 (ternary_bfloat_lane): New shape.
15059 (ternary_bfloat_lanex2_def): New class.
15060 (ternary_bfloat_lanex2): New shape.
15061 (ternary_bfloat_opt_n_def): New class.
15062 (ternary_bfloat_opt_n): New shape.
15063 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
15064 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
15065 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
15066 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
15067 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15068 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15069 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
15070 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
15071 the pattern off the narrow mode instead of the wider one.
15072 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
15073 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
15074 (sve_fp_op): Handle them.
15075 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
15076 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
15078 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
15080 * config/aarch64/arm_sve.h: Include arm_bf16.h.
15081 * config/aarch64/aarch64-modes.def (BF): Move definition before
15082 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
15083 (SVE_MODES): Handle BF modes.
15084 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
15086 (aarch64_full_sve_mode): Likewise.
15087 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
15089 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
15090 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
15091 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
15092 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
15094 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
15096 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
15097 (TYPES_all_data): Add bf16.
15098 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
15099 (register_tuple_type): Increase buffer size.
15100 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
15101 (bf16): New type suffix.
15102 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
15103 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
15104 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
15105 Change type from all_data to all_arith.
15106 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
15107 (svminp): Likewise.
15109 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
15110 Matthew Malcomson <matthew.malcomson@arm.com>
15111 Richard Sandiford <richard.sandiford@arm.com>
15113 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
15114 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
15115 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
15116 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
15117 __ARM_FEATURE_MATMUL_FP64.
15118 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
15119 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
15120 be disabled at the same time.
15121 (f32mm): New extension.
15122 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
15123 (AARCH64_FL_F64MM): Bump to the next bit up.
15124 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
15125 (TARGET_SVE_F64MM): New macros.
15126 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
15127 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
15128 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
15129 (UNSPEC_ZIP2Q): New unspeccs.
15130 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
15131 (optab, sur, perm_insn): Handle the new unspecs.
15132 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
15133 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
15134 TARGET_SVE_F64MM instead of separate tests.
15135 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
15136 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
15137 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
15138 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
15139 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
15140 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
15141 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
15142 (TYPES_s_signed): New macro.
15143 (TYPES_s_integer): Use it.
15144 (TYPES_d_float): New macro.
15145 (TYPES_d_data): Use it.
15146 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
15147 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
15148 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
15149 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
15150 (svmmla): New shape.
15151 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
15152 template parameters.
15153 (ternary_resize2_lane_base): Likewise.
15154 (ternary_resize2_base): New class.
15155 (ternary_qq_lane_base): Likewise.
15156 (ternary_intq_uintq_lane_def): Likewise.
15157 (ternary_intq_uintq_lane): New shape.
15158 (ternary_intq_uintq_opt_n_def): New class
15159 (ternary_intq_uintq_opt_n): New shape.
15160 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
15161 (ternary_uintq_intq_def): New class.
15162 (ternary_uintq_intq): New shape.
15163 (ternary_uintq_intq_lane_def): New class.
15164 (ternary_uintq_intq_lane): New shape.
15165 (ternary_uintq_intq_opt_n_def): New class.
15166 (ternary_uintq_intq_opt_n): New shape.
15167 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
15168 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
15169 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
15170 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
15172 (svdotprod_lane_impl): ...this new class.
15173 (svmmla_impl, svusdot_impl): New classes.
15174 (svdot_lane): Update to use svdotprod_lane_impl.
15175 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
15176 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
15178 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
15179 function, with no types defined.
15180 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
15181 AARCH64_FL_I8MM functions.
15182 (svmmla): New AARCH64_FL_F32MM function.
15183 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
15184 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
15185 AARCH64_FL_F64MM function.
15186 (REQUIRED_EXTENSIONS):
15188 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15190 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
15193 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
15195 * config/i386/i386.md (*movoi_internal_avx): Do not check for
15196 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
15197 (*movti_internal): Do not check for
15198 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15199 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
15200 just after check for TARGET_AVX.
15201 (*movdf_internal): Ditto.
15202 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
15203 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15204 * config/i386/sse.md (mov<mode>_internal): Only check
15205 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
15206 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
15207 (<sse>_andnot<mode>3<mask_name>): Move check for
15208 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
15209 (<code><mode>3<mask_name>): Ditto.
15210 (*andnot<mode>3): Ditto.
15211 (*andnottf3): Ditto.
15212 (*<code><mode>3): Ditto.
15213 (*<code>tf3): Ditto.
15214 (*andnot<VI:mode>3): Remove
15215 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
15216 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
15217 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
15218 (sse4_1_blendv<ssemodesuffix>): Ditto.
15219 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
15220 Explain that tune applies to 128bit instructions only.
15222 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
15224 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
15225 to definition of hsa_kernel_description. Parse assembly to find SGPR
15226 and VGPR count of kernel and store in hsa_kernel_description.
15228 2020-01-31 Tamar Christina <tamar.christina@arm.com>
15230 PR rtl-optimization/91838
15231 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
15232 to truncate if allowed or reject combination.
15234 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15236 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
15237 (find_inv_vars_cb): Likewise.
15239 2020-01-31 David Malcolm <dmalcolm@redhat.com>
15241 * calls.c (special_function_p): Split out the check for DECL_NAME
15242 being non-NULL and fndecl being extern at file scope into a
15243 new maybe_special_function_p and call it. Drop check for fndecl
15244 being non-NULL that was after a usage of DECL_NAME (fndecl).
15245 * tree.h (maybe_special_function_p): New inline function.
15247 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15249 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
15250 (mask_gather_load<mode>): ... here, and zero-initialize the
15252 (maskload<mode>di): Zero-initialize the destination.
15253 * config/gcn/gcn.c:
15255 2020-01-30 David Malcolm <dmalcolm@redhat.com>
15258 * doc/analyzer.texi (Limitations): Note that constraints on
15259 floating-point values are currently ignored.
15261 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15264 * symtab.c (symtab_node::noninterposable_alias): If localalias
15265 already exists, but is not usable, append numbers after it until
15266 a unique name is found. Formatting fix.
15268 PR middle-end/93505
15269 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
15272 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15274 * config/gcn/gcn.c (print_operand): Handle LTGT.
15275 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
15277 2020-01-30 Richard Biener <rguenther@suse.de>
15279 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
15280 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
15282 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
15284 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
15285 without a DECL in .data.rel.ro.local.
15287 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15290 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
15294 * config/i386/sse.md
15295 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
15296 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
15297 any_extend code iterator instead of always zero_extend.
15298 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
15299 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
15300 Use any_extend code iterator instead of always zero_extend.
15301 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
15302 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
15303 Use any_extend code iterator instead of always zero_extend.
15304 (*sse2_pmovmskb_ext): New define_insn.
15305 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
15308 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
15309 (*popcountsi2_zext_falsedep): New define_insn.
15311 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15313 * config.in: Regenerated.
15314 * configure: Regenerated.
15316 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
15319 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
15320 LLVM's assembler changed the default in version 9.
15322 2020-01-24 Jeff Law <law@redhat.com>
15324 PR tree-optimization/89689
15325 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
15327 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
15331 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15333 PR rtl-optimization/87763
15334 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15335 simplification to handle subregs as well as bare regs.
15336 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15338 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
15341 * ira.c (ira): Revert use of simplified LRA algorithm.
15343 2020-01-29 Martin Jambor <mjambor@suse.cz>
15345 PR tree-optimization/92706
15346 * tree-sra.c (struct access): Fields first_link, last_link,
15347 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
15348 next_rhs_queued and grp_rhs_queued respectively, new fields
15349 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
15350 (struct assign_link): Field next renamed to next_rhs, new field
15351 next_lhs. Updated comment.
15352 (work_queue_head): Renamed to rhs_work_queue_head.
15353 (lhs_work_queue_head): New variable.
15354 (add_link_to_lhs): New function.
15355 (relink_to_new_repr): Also relink LHS lists.
15356 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
15357 (add_access_to_lhs_work_queue): New function.
15358 (pop_access_from_work_queue): Renamed to
15359 pop_access_from_rhs_work_queue.
15360 (pop_access_from_lhs_work_queue): New function.
15361 (build_accesses_from_assign): Also add links to LHS lists and to LHS
15363 (child_would_conflict_in_lacc): Renamed to
15364 child_would_conflict_in_acc. Adjusted parameter names.
15365 (create_artificial_child_access): New parameter set_grp_read, use it.
15366 (subtree_mark_written_and_enqueue): Renamed to
15367 subtree_mark_written_and_rhs_enqueue.
15368 (propagate_subaccesses_across_link): Renamed to
15369 propagate_subaccesses_from_rhs.
15370 (propagate_subaccesses_from_lhs): New function.
15371 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
15374 2020-01-29 Martin Jambor <mjambor@suse.cz>
15376 PR tree-optimization/92706
15377 * tree-sra.c (struct access): Adjust comment of
15378 grp_total_scalarization.
15379 (find_access_in_subtree): Look for single children spanning an entire
15381 (scalarizable_type_p): Allow register accesses, adjust callers.
15382 (completely_scalarize): Remove function.
15383 (scalarize_elem): Likewise.
15384 (create_total_scalarization_access): Likewise.
15385 (sort_and_splice_var_accesses): Do not track total scalarization
15387 (analyze_access_subtree): New parameter totally, adjust to new meaning
15388 of grp_total_scalarization.
15389 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
15390 (can_totally_scalarize_forest_p): New function.
15391 (create_total_scalarization_access): Likewise.
15392 (create_total_access_and_reshape): Likewise.
15393 (total_should_skip_creating_access): Likewise.
15394 (totally_scalarize_subtree): Likewise.
15395 (analyze_all_variable_accesses): Perform total scalarization after
15396 subaccess propagation using the new functions above.
15397 (initialize_constant_pool_replacements): Output initializers by
15398 traversing the access tree.
15400 2020-01-29 Martin Jambor <mjambor@suse.cz>
15402 * tree-sra.c (verify_sra_access_forest): New function.
15403 (verify_all_sra_access_forests): Likewise.
15404 (create_artificial_child_access): Set parent.
15405 (analyze_all_variable_accesses): Call the verifier.
15407 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15409 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
15410 if called on indirect edge.
15411 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
15412 speculative call if needed.
15414 2020-01-29 Richard Biener <rguenther@suse.de>
15416 PR tree-optimization/93428
15417 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
15418 permutation when the load node is created.
15419 (vect_analyze_slp_instance): Re-use it here.
15421 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15423 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
15425 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
15427 PR rtl-optimization/93272
15428 * ira-lives.c (process_out_of_region_eh_regs): New function.
15429 (process_bb_node_lives): Call it.
15431 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15433 * coverage.c (read_counts_file): Make error message lowercase.
15435 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15437 * profile-count.c (profile_quality_display_names): Fix ordering.
15439 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15442 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
15443 hash only when edge is first within the sequence.
15444 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
15445 (symbol_table::create_edge): Do not set target_prob.
15446 (cgraph_edge::remove_caller): Watch for speculative calls when updating
15447 the call site hash.
15448 (cgraph_edge::make_speculative): Drop target_prob parameter.
15449 (cgraph_edge::speculative_call_info): Remove.
15450 (cgraph_edge::first_speculative_call_target): New member function.
15451 (update_call_stmt_hash_for_removing_direct_edge): New function.
15452 (cgraph_edge::resolve_speculation): Rewrite to new API.
15453 (cgraph_edge::speculative_call_for_target): New member function.
15454 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
15455 multiple speculation targets.
15456 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
15458 (verify_speculative_call): Verify that targets form an interval.
15459 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
15460 (cgraph_edge::first_speculative_call_target): New member function.
15461 (cgraph_edge::next_speculative_call_target): New member function.
15462 (cgraph_edge::speculative_call_target_ref): New member function.
15463 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
15464 (cgraph_edge): Remove target_prob.
15465 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15466 Fix handling of speculative calls.
15467 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
15468 * ipa-fnsummary.c (analyze_function_body): Likewise.
15469 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
15470 * ipa-profile.c (dump_histogram): Fix formating.
15471 (ipa_profile_generate_summary): Watch for overflows.
15472 (ipa_profile): Do not require probablity to be 1/2; update to new API.
15473 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
15474 (update_indirect_edges_after_inlining): Update to new API.
15475 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
15477 * profile-count.h: (profile_probability::adjusted): New.
15478 * tree-inline.c (copy_bb): Update to new speculative call API; fix
15479 updating of profile.
15480 * value-prof.c (gimple_ic_transform): Rename to ...
15481 (dump_ic_profile): ... this one; update dumping.
15482 (stream_in_histogram_value): Fix formating.
15483 (gimple_value_profile_transformations): Update.
15485 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15488 * config/i386/i386.md (*movoi_internal_avx): Remove
15489 TARGET_SSE_TYPELESS_STORES check.
15490 (*movti_internal): Prefer TARGET_AVX over
15491 TARGET_SSE_TYPELESS_STORES.
15492 (*movtf_internal): Likewise.
15493 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
15494 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
15495 from TARGET_SSE_TYPELESS_STORES.
15497 2020-01-28 David Malcolm <dmalcolm@redhat.com>
15499 * diagnostic-core.h (warning_at): Rename overload to...
15500 (warning_meta): ...this.
15501 (emit_diagnostic_valist): Delete decl of overload taking
15502 diagnostic_metadata.
15503 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
15504 (warning_at): Rename overload taking diagnostic_metadata to...
15505 (warning_meta): ...this.
15507 2020-01-28 Richard Biener <rguenther@suse.de>
15509 PR tree-optimization/93439
15510 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
15511 * tree-cfg.c (move_sese_region_to_fn): ... here.
15512 (verify_types_in_gimple_reference): Verify used cliques are
15515 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15518 * config/i386/i386-options.c (set_ix86_tune_features): Add an
15519 argument of a pointer to struct gcc_options and pass it to
15520 parse_mtune_ctrl_str.
15521 (ix86_function_specific_restore): Pass opts to
15522 set_ix86_tune_features.
15523 (ix86_option_override_internal): Likewise.
15524 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
15525 gcc_options and use it for x_ix86_tune_ctrl_string.
15527 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15529 PR rtl-optimization/87763
15530 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15531 simplification to handle subregs as well as bare regs.
15532 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15534 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15536 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
15537 for reduction chains that (now) include a call.
15539 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15541 PR tree-optimization/92822
15542 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
15543 out the don't-care elements of a vector whose significant elements
15544 are duplicates, make the don't-care elements duplicates too.
15546 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15548 PR tree-optimization/93434
15549 * tree-predcom.c (split_data_refs_to_components): Record which
15550 components have had aliasing loads removed. Prevent store-store
15551 commoning for all such components.
15553 2020-01-28 Jakub Jelinek <jakub@redhat.com>
15556 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
15557 -1 or is_vshift is true, use new_vector with number of elts npatterns
15558 rather than new_unary_operation.
15560 PR tree-optimization/93454
15561 * gimple-fold.c (fold_array_ctor_reference): Perform
15562 elt_size.to_uhwi () just once, instead of calling it in every
15563 iteration. Punt if that value is above size of the temporary
15564 buffer. Decrease third native_encode_expr argument when
15565 bufoff + elt_sz is above size of buf.
15567 2020-01-27 Joseph Myers <joseph@codesourcery.com>
15569 * config/mips/mips.c (mips_declare_object_name)
15570 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
15572 2020-01-27 Martin Liska <mliska@suse.cz>
15574 PR gcov-profile/93403
15575 * tree-profile.c (gimple_init_gcov_profiler): Generate
15576 both __gcov_indirect_call_profiler_v4 and
15577 __gcov_indirect_call_profiler_v4_atomic.
15579 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15582 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
15584 (@aarch64_split_simd_mov<mode>): Use it.
15585 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
15586 Leave the vec_extract patterns to handle 2-element vectors.
15587 (aarch64_simd_mov_from_<mode>high): Likewise.
15588 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
15589 (vec_extractv2dfv1df): Likewise.
15591 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15593 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
15594 jump conditions for *compare_condjump<GPI:mode>.
15596 2020-01-27 David Malcolm <dmalcolm@redhat.com>
15599 * digraph.cc (test_edge::test_edge): Specify template for base
15602 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15604 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
15606 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15608 * config/arc/arc-protos.h (gen_mlo): Remove.
15609 (gen_mhi): Likewise.
15610 * config/arc/arc.c (AUX_MULHI): Define.
15611 (arc_must_save_reister): Special handling for r58/59.
15612 (arc_compute_frame_size): Consider mlo/mhi registers.
15613 (arc_save_callee_saves): Emit fp/sp move only when emit_move
15615 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
15616 mlo/mhi name selection.
15617 (arc_restore_callee_saves): Don't early restore blink when ISR.
15618 (arc_expand_prologue): Add mlo/mhi saving.
15619 (arc_expand_epilogue): Add mlo/mhi restoring.
15622 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
15623 numbering when MUL64 option is used.
15624 (DWARF2_FRAME_REG_OUT): Define.
15625 * config/arc/arc.md (arc600_stall): New pattern.
15626 (VUNSPEC_ARC_ARC600_STALL): Define.
15627 (mulsi64): Use correct mlo/mhi registers.
15628 (mulsi_600): Clean it up.
15629 * config/arc/predicates.md (mlo_operand): Remove any dependency on
15631 (mhi_operand): Likewise.
15633 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15634 Petro Karashchenko <petro.karashchenko@ring.com>
15636 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
15637 attributes if needed.
15638 (prepare_move_operands): Generate special unspec instruction for
15640 (arc_isuncached_mem_p): Propagate uncached attribute to each
15642 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
15643 (VUNSPEC_ARC_STDI): Likewise.
15644 (ALLI): New mode iterator.
15645 (mALLI): New mode attribute.
15646 (lddi): New instruction pattern.
15648 (stdidi_split): Split instruction for architectures which are not
15649 supporting ll64 option.
15650 (lddidi_split): Likewise.
15652 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15654 PR rtl-optimization/92989
15655 * lra-lives.c (process_bb_lives): Update the live-in set before
15656 processing additional clobbers.
15658 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15660 PR rtl-optimization/93170
15661 * cselib.c (cselib_invalidate_regno_val): New function, split out
15663 (cselib_invalidate_regno): ...here.
15664 (cselib_invalidated_by_call_p): New function.
15665 (cselib_process_insn): Iterate over all the hard-register entries in
15666 REG_VALUES and invalidate any that cross call-clobbered registers.
15668 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15670 * dojump.c (split_comparison): Use HONOR_NANS rather than
15671 HONOR_SNANS when splitting LTGT.
15673 2020-01-27 Martin Liska <mliska@suse.cz>
15676 * opts.c (print_filtered_help): Exclude language-specific
15677 options from --help=common unless enabled in all FEs.
15679 2020-01-27 Martin Liska <mliska@suse.cz>
15681 * opts.c (print_help): Exclude params from
15682 all except --help=param.
15684 2020-01-27 Martin Liska <mliska@suse.cz>
15687 * config/i386/i386-features.c (make_resolver_func):
15688 Align the code with ppc64 target implementation.
15689 Do not generate a unique name for resolver function.
15691 2020-01-27 Richard Biener <rguenther@suse.de>
15693 PR tree-optimization/93397
15694 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
15695 converted reduction chain SLP graph adjustment.
15697 2020-01-26 Marek Polacek <polacek@redhat.com>
15700 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
15703 2020-01-26 Jason Merrill <jason@redhat.com>
15706 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
15709 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
15711 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
15712 (rx_setmem): Likewise.
15714 2020-01-26 Jakub Jelinek <jakub@redhat.com>
15717 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
15718 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
15719 drop <di> from constraint of last operand.
15722 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
15723 TARGET_AVX2 and V4DFmode not in the split condition, but in the
15724 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
15726 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
15729 * ipa-cp.c (get_info_about_necessary_edges): Remove value
15732 2020-01-24 Jeff Law <law@redhat.com>
15734 PR tree-optimization/92788
15735 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
15738 2020-01-24 Jakub Jelinek <jakub@redhat.com>
15741 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
15742 *avx_vperm_broadcast_<mode>,
15743 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
15744 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
15745 Move before avx2_perm<mode>/avx512f_perm<mode>.
15748 * simplify-rtx.c (simplify_const_unary_operation,
15749 simplify_const_binary_operation): Punt for mode precision above
15750 MAX_BITSIZE_MODE_ANY_INT.
15752 2020-01-24 Andrew Pinski <apinski@marvell.com>
15754 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
15755 alu.shift_reg to 0.
15757 2020-01-24 Jeff Law <law@redhat.com>
15760 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
15761 for REGs. Call output_operand_lossage to get more reasonable
15764 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
15766 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
15767 gcn_fp_compare_operator.
15768 (vec_cmpu<mode>di): Use gcn_compare_operator.
15769 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
15770 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
15771 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
15772 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
15773 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
15774 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
15775 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
15776 gcn_fp_compare_operator.
15777 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
15778 gcn_fp_compare_operator.
15779 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
15780 gcn_fp_compare_operator.
15781 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
15782 gcn_fp_compare_operator.
15784 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
15786 * doc/install.texi (Cross-Compiler-Specific Options): Document
15787 `--with-toolexeclibdir' option.
15789 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
15791 * target.def (flags_regnum): Also mention effect on delay slot filling.
15792 * doc/tm.texi: Regenerate.
15794 2020-01-23 Jeff Law <law@redhat.com>
15796 PR translation/90162
15797 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
15799 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
15802 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
15805 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15807 PR rtl-optimization/93402
15808 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
15811 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15813 * config.in: Regenerated.
15814 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
15815 for TARGET_LIBC_GNUSTACK.
15816 * configure: Regenerated.
15817 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
15818 found to be 2.31 or greater.
15820 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15822 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
15824 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
15825 (mips_asm_file_end): New function. Delegate to
15826 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
15827 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
15829 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15832 * config/i386/i386-modes.def (POImode): New mode.
15833 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
15834 * config/i386/i386.md (DPWI): New mode attribute.
15835 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
15836 (QWI): Rename to...
15837 (QPWI): ... this. Use POI instead of OI for TImode.
15838 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
15839 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
15842 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15845 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
15847 (speculation_tracker_rev): New pattern.
15848 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
15849 Use speculation_tracker_rev to track the inverse condition.
15851 2020-01-23 Richard Biener <rguenther@suse.de>
15853 PR tree-optimization/93381
15854 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
15855 alias-set of the def as argument and record the first one.
15856 (vn_walk_cb_data::first_set): New member.
15857 (vn_reference_lookup_3): Pass the alias-set of the current def
15858 to push_partial_def. Fix alias-set used in the aggregate copy
15860 (vn_reference_lookup): Consistently set *last_vuse_ptr.
15861 * real.c (clear_significand_below): Fix out-of-bound access.
15863 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15866 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
15867 New define_insn patterns.
15869 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15871 * doc/sourcebuild.texi (check-function-bodies): Add an
15872 optional target/xfail selector.
15874 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15876 PR rtl-optimization/93124
15877 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
15878 bare USE and CLOBBER insns.
15880 2020-01-22 Andrew Pinski <apinski@marvell.com>
15882 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
15884 2020-01-22 David Malcolm <dmalcolm@redhat.com>
15887 * gdbinit.in (break-on-saved-diagnostic): Update for move of
15888 diagnostic_manager into "ana" namespace.
15889 * selftest-run-tests.c (selftest::run_tests): Update for move of
15890 selftest::run_analyzer_selftests to
15891 ana::selftest::run_analyzer_selftests.
15893 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
15895 * cfgexpand.c (union_stack_vars): Update the size.
15897 2020-01-22 Richard Biener <rguenther@suse.de>
15899 PR tree-optimization/93381
15900 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
15901 throughout, handle all conversions the same.
15903 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15906 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
15907 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
15908 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
15909 Call force_reg on high_in2 unconditionally.
15911 2020-01-22 Martin Liska <mliska@suse.cz>
15913 PR tree-optimization/92924
15914 * profile.c (compute_value_histograms): Divide
15915 all counter values.
15917 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15920 * output.h (assemble_name_resolve): Declare.
15921 * varasm.c (assemble_name_resolve): New function.
15922 (assemble_name): Use it.
15923 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
15925 2020-01-22 Joseph Myers <joseph@codesourcery.com>
15927 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
15928 update_web_docs_git instead of update_web_docs_svn.
15930 2020-01-21 Andrew Pinski <apinski@marvell.com>
15933 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
15934 as PTR mode. Have operand 1 as being modeless, it can be P mode.
15935 (*tlsgd_small_<mode>): Likewise.
15936 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
15937 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
15938 register. Convert that register back to dest using convert_mode.
15940 2020-01-21 Jim Wilson <jimw@sifive.com>
15942 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
15945 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
15946 Uros Bizjak <ubizjak@gmail.com>
15949 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
15951 (legitimize_tls_address): Do GNU2 TLS address computation in
15952 ptr_mode and zero-extend result to Pmode.
15953 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
15954 :P with :PTR and Pmode with ptr_mode.
15955 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
15956 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
15957 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
15959 2020-01-21 Jakub Jelinek <jakub@redhat.com>
15962 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
15963 the last two operands are CONST_INT_P before using them as such.
15965 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15967 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
15968 to get the integer element types.
15970 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15972 * config/aarch64/aarch64-sve-builtins.h
15973 (function_expander::convert_to_pmode): Declare.
15974 * config/aarch64/aarch64-sve-builtins.cc
15975 (function_expander::convert_to_pmode): New function.
15976 (function_expander::get_contiguous_base): Use it.
15977 (function_expander::prepare_gather_address_operands): Likewise.
15978 * config/aarch64/aarch64-sve-builtins-sve2.cc
15979 (svwhilerw_svwhilewr_impl::expand): Likewise.
15981 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
15984 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
15985 cfun->machine->label_is_assembled.
15986 (aarch64_print_patchable_function_entry): New.
15987 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
15988 * config/aarch64/aarch64.h (struct machine_function): New field,
15989 label_is_assembled.
15991 2020-01-21 David Malcolm <dmalcolm@redhat.com>
15994 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
15997 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16000 * cgraph.c (cgraph_edge::resolve_speculation,
16001 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
16002 call_stmt_site_hash.
16004 2020-01-21 Martin Liska <mliska@suse.cz>
16006 * config/rs6000/rs6000.c (common_mode_defined): Remove
16009 2020-01-21 Richard Biener <rguenther@suse.de>
16011 PR tree-optimization/92328
16012 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
16013 type when value-numbering same-sized store by inserting a
16015 (eliminate_dom_walker::eliminate_stmt): When eliminating
16016 a redundant store handle bit-reinterpretation of the same value.
16018 2020-01-21 Andrew Pinski <apinski@marvel.com>
16021 * tree-into-ssa.c (prepare_block_for_update_1): Split out
16023 (prepare_block_for_update): This. Use a worklist instead of
16026 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16028 * config/arm/arm.c (clear_operation_p):
16029 Initialise last_regno, skip first iteration
16030 based on the first_set value and use ints instead
16031 of the unnecessary HOST_WIDE_INTs.
16033 2020-01-21 Jakub Jelinek <jakub@redhat.com>
16036 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
16037 compare_mode other than SFmode or DFmode.
16039 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
16042 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
16043 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
16044 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
16046 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
16048 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
16050 2020-01-20 Andrew Pinski <apinski@marvell.com>
16052 PR middle-end/93242
16053 * targhooks.c (default_print_patchable_function_entry): Use
16054 output_asm_insn to emit the nop instruction.
16056 2020-01-20 Fangrui Song <maskray@google.com>
16058 PR middle-end/93194
16059 * targhooks.c (default_print_patchable_function_entry): Align to
16062 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
16065 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
16066 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
16067 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
16068 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
16069 (*tls_dynamic_gnu2_lea_64): Renamed to ...
16070 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
16071 Remove the {q} suffix from lea.
16072 (*tls_dynamic_gnu2_call_64): Renamed to ...
16073 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
16074 (*tls_dynamic_gnu2_combine_64): Renamed to ...
16075 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
16076 Pass Pmode to gen_tls_dynamic_gnu2_64.
16078 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
16080 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
16082 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
16084 * config/aarch64/aarch64-sve-builtins-base.cc
16085 (svld1ro_impl::memory_vector_mode): Remove parameter name.
16087 2020-01-20 Richard Biener <rguenther@suse.de>
16090 * dwarf2out.c (prune_unused_types): Unconditionally mark
16091 called function DIEs.
16093 2020-01-20 Martin Liska <mliska@suse.cz>
16095 PR tree-optimization/93199
16096 * tree-eh.c (struct leh_state): Add
16097 new field outer_non_cleanup.
16098 (cleanup_is_dead_in): Pass leh_state instead
16099 of eh_region. Add a checking that state->outer_non_cleanup
16100 points to outer non-clean up region.
16101 (lower_try_finally): Record outer_non_cleanup
16103 (lower_catch): Likewise.
16104 (lower_eh_filter): Likewise.
16105 (lower_eh_must_not_throw): Likewise.
16106 (lower_cleanup): Likewise.
16108 2020-01-20 Richard Biener <rguenther@suse.de>
16110 PR tree-optimization/93094
16111 * tree-vectorizer.h (vect_loop_versioning): Adjust.
16112 (vect_transform_loop): Likewise.
16113 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
16114 loop_vectorized_call to vect_transform_loop.
16115 * tree-vect-loop.c (vect_transform_loop): Pass down
16116 loop_vectorized_call to vect_loop_versioning.
16117 * tree-vect-loop-manip.c (vect_loop_versioning): Use
16118 the earlier discovered loop_vectorized_call.
16120 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
16122 * doc/contribute.texi: Update for SVN -> Git transition.
16123 * doc/install.texi: Likewise.
16125 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16128 * cgraph.c (cgraph_edge::make_speculative): Increase number of
16129 speculative targets.
16130 (verify_speculative_call): New function
16131 (cgraph_node::verify_node): Use it.
16132 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
16135 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16138 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
16139 (cgraph_edge::make_direct): Remove all indirect targets.
16140 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
16141 (cgraph_node::verify_node): Verify that only one call_stmt or
16142 lto_stmt_uid is set.
16143 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
16145 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
16146 (lto_output_ref): Simplify streaming of stmt.
16147 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
16149 2020-01-18 Tamar Christina <tamar.christina@arm.com>
16151 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
16152 Mark parameter unused.
16154 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
16156 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
16158 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
16160 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
16162 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
16164 * Makefile.in: Add coroutine-passes.o.
16165 * builtin-types.def (BT_CONST_SIZE): New.
16166 (BT_FN_BOOL_PTR): New.
16167 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
16168 * builtins.def (DEF_COROUTINE_BUILTIN): New.
16169 * coroutine-builtins.def: New file.
16170 * coroutine-passes.cc: New file.
16171 * function.h (struct GTY function): Add a bit to indicate that the
16172 function is a coroutine component.
16173 * internal-fn.c (expand_CO_FRAME): New.
16174 (expand_CO_YIELD): New.
16175 (expand_CO_SUSPN): New.
16176 (expand_CO_ACTOR): New.
16177 * internal-fn.def (CO_ACTOR): New.
16181 * passes.def: Add pass_coroutine_lower_builtins,
16182 pass_coroutine_early_expand_ifns.
16183 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
16184 (make_pass_coroutine_early_expand_ifns): New.
16185 * doc/invoke.texi: Document the fcoroutines command line
16188 2020-01-18 Jakub Jelinek <jakub@redhat.com>
16190 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
16193 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
16194 after checking the argument is a REG. Don't use REGNO (reg)
16195 again to set last_regno, reuse regno variable instead.
16197 2020-01-17 David Malcolm <dmalcolm@redhat.com>
16199 * doc/analyzer.texi (Limitations): Add note about NaN.
16201 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16202 Sudakshina Das <sudi.das@arm.com>
16204 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
16205 and valid immediate.
16206 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
16207 (lshrdi3): Generate thumb2_lsrl for valid immediates.
16208 * config/arm/constraints.md (Pg): New.
16209 * config/arm/predicates.md (long_shift_imm): New.
16210 (arm_reg_or_long_shift_imm): Likewise.
16211 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
16212 (thumb2_lsll): Likewise.
16213 (thumb2_lsrl): New.
16215 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16216 Sudakshina Das <sudi.das@arm.com>
16218 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
16219 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
16220 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
16221 register pairs for doubleword quantities for ARMv8.1M-Mainline.
16222 * config/arm/thumb2.md (thumb2_asrl): New.
16223 (thumb2_lsll): Likewise.
16225 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16227 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
16230 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
16232 * gdbinit.in (help-gcc-hooks): New command.
16233 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
16234 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
16237 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16239 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
16240 correct target macro.
16242 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16244 * config/aarch64/aarch64-protos.h
16245 (aarch64_sve_ld1ro_operand_p): New.
16246 * config/aarch64/aarch64-sve-builtins-base.cc
16247 (class load_replicate): New.
16248 (class svld1ro_impl): New.
16249 (class svld1rq_impl): Change to inherit from load_replicate.
16250 (svld1ro): New sve intrinsic function base.
16251 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
16252 New DEF_SVE_FUNCTION.
16253 * config/aarch64/aarch64-sve-builtins-base.h
16254 (svld1ro): New decl.
16255 * config/aarch64/aarch64-sve-builtins.cc
16256 (function_expander::add_mem_operand): Modify assert to allow
16258 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
16260 * config/aarch64/aarch64.c
16261 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
16262 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
16263 (aarch64_sve_ld1ro_operand_p): New.
16264 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
16265 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
16266 * config/aarch64/predicates.md
16267 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
16269 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16271 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
16272 Introduce this ACLE specified predefined macro.
16273 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
16274 (fp): Disabling this disables f64mm.
16275 (simd): Disabling this disables f64mm.
16276 (fp16): Disabling this disables f64mm.
16277 (sve): Disabling this disables f64mm.
16278 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
16279 (AARCH64_ISA_F64MM): New.
16280 (TARGET_F64MM): New.
16281 * doc/invoke.texi (f64mm): Document new option.
16283 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16285 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
16286 (neoversen1_tunings): Likewise.
16288 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16291 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
16292 Add assert to ensure prolog has been emitted.
16293 (aarch64_split_atomic_op): Likewise.
16294 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
16295 Use epilogue_completed rather than reload_completed.
16296 (aarch64_atomic_exchange<mode>): Likewise.
16297 (aarch64_atomic_<atomic_optab><mode>): Likewise.
16298 (atomic_nand<mode>): Likewise.
16299 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
16300 (atomic_fetch_nand<mode>): Likewise.
16301 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
16302 (atomic_nand_fetch<mode>): Likewise.
16304 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16307 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
16309 (REVERSE_CONDITION): Delete.
16310 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
16311 (CCFP_CCFPE): Likewise.
16312 (e): New mode attribute.
16313 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
16314 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
16315 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
16316 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
16317 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
16318 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
16319 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
16320 name of generator from gen_ccmpdi to gen_ccmpccdi.
16321 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
16322 the previous comparison but aren't able to, use the new ccmp_rev
16325 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16327 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
16328 than testing directly for INTEGER_CST.
16329 (gimplify_target_expr, gimplify_omp_depend): Likewise.
16331 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16333 PR tree-optimization/93292
16334 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
16335 get_vectype_for_scalar_type returns NULL.
16337 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16339 * params.opt (-param=max-predicted-iterations): Increase range from 0.
16340 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
16342 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16344 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
16346 * params.opt: (max-predicted-iterations): Set bounds.
16347 * predict.c (real_almost_one, real_br_prob_base,
16348 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
16349 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
16350 probabilities; do not truncate to reg_br_prob_bases.
16351 (estimate_loops_at_level): Pass max_cyclic_prob.
16352 (estimate_loops): Compute max_cyclic_prob.
16353 (estimate_bb_frequencies): Do not initialize real_*; update calculation
16355 * profile-count.c (profile_probability::to_sreal): New.
16356 * profile-count.h (class sreal): Move up in file.
16357 (profile_probability::to_sreal): Declare.
16359 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16362 (arm_invalid_conversion): New function for target hook.
16363 (arm_invalid_unary_op): New function for target hook.
16364 (arm_invalid_binary_op): New function for target hook.
16366 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16368 * config.gcc: Add arm_bf16.h.
16369 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
16370 (arm_simd_builtin_std_type): Add BFmode.
16371 (arm_init_simd_builtin_types): Define element types for vector types.
16372 (arm_init_bf16_types): New function.
16373 (arm_init_builtins): Add arm_init_bf16_types function call.
16374 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
16375 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
16376 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
16377 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
16378 (arm_vector_mode_supported_p): Add V4BF, V8BF.
16379 (arm_mangle_type): Add __bf16.
16380 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
16381 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
16382 arm_bf16_ptr_type_node.
16383 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
16384 define_split between ARM registers.
16385 * config/arm/arm_bf16.h: New file.
16386 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
16387 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
16388 (VQXMOV): Add V8BF.
16389 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
16390 * config/arm/vfp.md: Add BFmode to movhf patterns.
16392 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
16393 Andre Vieira <andre.simoesdiasvieira@arm.com>
16395 * config/arm/arm-cpus.in (mve, mve_float): New features.
16396 (dsp, mve, mve.fp): New options.
16397 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
16398 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
16399 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
16401 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16402 Thomas Preud'homme <thomas.preudhomme@arm.com>
16404 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
16406 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
16407 error for using -mcmse when targeting Armv8.1-M Mainline.
16409 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16410 Thomas Preud'homme <thomas.preudhomme@arm.com>
16412 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
16413 address in r4 when targeting Armv8.1-M Mainline.
16414 (nonsecure_call_value_internal): Likewise.
16415 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
16416 a register match_operand again. Emit BLXNS when targeting
16417 Armv8.1-M Mainline.
16418 (nonsecure_call_value_reg_thumb2): Likewise.
16420 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16421 Thomas Preud'homme <thomas.preudhomme@arm.com>
16423 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
16424 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
16425 variable as true when floating-point ABI is not hard. Replace
16426 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
16427 Generate VLSTM and VLLDM instruction respectively before and
16428 after a function call to cmse_nonsecure_call function.
16429 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
16430 (VUNSPEC_VLLDM): Likewise.
16431 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
16432 (lazy_load_multiple_insn): Likewise.
16434 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16435 Thomas Preud'homme <thomas.preudhomme@arm.com>
16437 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
16438 (arm_emit_vfp_multi_reg_pop): Likewise.
16439 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
16440 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
16441 restore callee-saved VFP registers.
16443 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16444 Thomas Preud'homme <thomas.preudhomme@arm.com>
16446 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
16447 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
16448 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
16449 callee-saved GPRs as well as clear ip register before doing a nonsecure
16450 call then restore callee-saved GPRs after it when targeting
16451 Armv8.1-M Mainline.
16452 (arm_reorg): Adapt to function rename.
16454 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16455 Thomas Preud'homme <thomas.preudhomme@arm.com>
16457 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
16458 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
16459 clear_vfp_multiple pattern based on a new vfp parameter.
16460 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
16461 targeting Armv8.1-M Mainline.
16462 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
16463 unconditionally when targeting Armv8.1-M Mainline architecture. Check
16464 whether VFP registers are available before looking call_used_regs for a
16466 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
16467 of prototype of clear_operation_p.
16468 (clear_vfp_multiple_operation): New predicate.
16469 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
16470 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
16472 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16473 Thomas Preud'homme <thomas.preudhomme@arm.com>
16475 * config/arm/arm-protos.h (clear_operation_p): Declare.
16476 * config/arm/arm.c (clear_operation_p): New function.
16477 (cmse_clear_registers): Generate clear_multiple instruction pattern if
16478 targeting Armv8.1-M Mainline or successor.
16479 (output_return_instruction): Only output APSR register clearing if
16480 Armv8.1-M Mainline instructions not available.
16481 (thumb_exit): Likewise.
16482 * config/arm/predicates.md (clear_multiple_operation): New predicate.
16483 * config/arm/thumb2.md (clear_apsr): New define_insn.
16484 (clear_multiple): Likewise.
16485 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
16487 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16488 Thomas Preud'homme <thomas.preudhomme@arm.com>
16490 * config/arm/arm.c (fp_sysreg_names): Declare and define.
16491 (use_return_insn): Also return false for Armv8.1-M Mainline.
16492 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
16493 Mainline instructions are available.
16494 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
16495 when targeting Armv8.1-M Mainline Security Extensions.
16496 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
16497 Mainline entry function.
16498 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
16499 targeting Armv8.1-M Mainline or successor.
16500 (arm_expand_epilogue): Fix indentation of caller-saved register
16501 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
16503 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
16504 (FP_SYSREGS): Likewise.
16505 (enum vfp_sysregs_encoding): Define enum.
16506 (fp_sysreg_names): Declare.
16507 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
16508 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
16509 (pop_fpsysreg_insn): Likewise.
16511 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16512 Thomas Preud'homme <thomas.preudhomme@arm.com>
16514 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
16515 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
16516 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
16517 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
16518 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
16519 (ARMv8_1m_main): New feature group.
16520 (armv8.1-m.main): New architecture.
16521 * config/arm/arm-tables.opt: Regenerate.
16522 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
16523 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
16524 (arm_options_perform_arch_sanity_checks): Error out when targeting
16525 Armv8.1-M Mainline Security Extensions.
16526 * config/arm/arm.h (arm_arch8_1m_main): Declare.
16528 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16530 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
16531 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
16532 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
16533 aarch64_bfdot_laneq): New.
16534 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
16535 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
16536 vbfdotq_laneq_f32): New.
16537 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
16538 VBFMLA_W, VBF): New.
16539 (isquadop): Add V4BF, V8BF.
16541 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16543 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
16544 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
16545 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
16546 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
16547 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
16548 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
16549 usdot_laneq, sudot_lane,sudot_laneq): New.
16550 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
16551 (aarch64_<sur>dot_lane): New.
16552 * config/aarch64/arm_neon.h (vusdot_s32): New.
16553 (vusdotq_s32): New.
16554 (vusdot_lane_s32): New.
16555 (vsudot_lane_s32): New.
16556 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
16557 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
16559 2020-01-16 Martin Liska <mliska@suse.cz>
16561 * value-prof.c (dump_histogram_value): Fix
16562 obvious spacing issue.
16564 2020-01-16 Andrew Pinski <apinski@marvell.com>
16566 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
16567 !storage_order_barrier_p.
16569 2020-01-16 Andrew Pinski <apinski@marvell.com>
16571 * sched-int.h (_dep): Add unused bit-field field for the padding.
16572 * sched-deps.c (init_dep_1): Init unused field.
16574 2020-01-16 Andrew Pinski <apinski@marvell.com>
16576 * optabs.h (create_expand_operand): Initialize target field also.
16578 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16580 PR tree-optimization/92429
16581 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
16582 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
16584 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
16587 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
16589 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
16590 aarch64_sve_int_mode to each mode.
16592 2020-01-15 David Malcolm <dmalcolm@redhat.com>
16594 * doc/analyzer.texi (Overview): Add note about
16595 -fdump-ipa-analyzer.
16597 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
16599 PR tree-optimization/93231
16600 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
16601 input_type is unsigned. Use tree_to_shwi for shift constant.
16602 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
16603 (simplify_count_trailing_zeroes): Add test to handle known non-zero
16604 inputs more efficiently.
16606 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
16608 * config/i386/i386.md (*movsf_internal): Do not require
16609 SSE2 ISA for alternatives 14 and 15.
16611 2020-01-15 Richard Biener <rguenther@suse.de>
16613 PR middle-end/93273
16614 * tree-eh.c (sink_clobbers): If we already visited the destination
16615 block do not defer insertion.
16616 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
16617 the purpose of defered insertion.
16619 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16621 * BASE-VER: Bump to 10.0.1.
16623 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16625 PR tree-optimization/93247
16626 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
16627 type of the stmt that we're going to vectorize.
16629 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16631 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
16632 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
16635 2020-01-15 Martin Liska <mliska@suse.cz>
16637 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
16638 2 calls of streamer_read_hwi in a function call.
16640 2020-01-15 Richard Biener <rguenther@suse.de>
16642 * alias.c (record_alias_subset): Avoid redundant work when
16643 subset is already recorded.
16645 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16647 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
16648 the analyzer options provide CWE identifiers.
16650 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16652 * tree-diagnostic-path.cc (path_summary::event_range::print):
16653 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
16654 using get_pure_location.
16656 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16658 PR tree-optimization/93262
16659 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
16660 perform head trimming only if the last argument is constant,
16661 either all ones, or larger or equal to head trim, in the latter
16662 case decrease the last argument by head_trim.
16664 PR tree-optimization/93249
16665 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
16666 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
16667 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
16668 perform head trim unless we can prove there are no '\0' chars
16669 from the source among the first head_trim chars.
16671 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16673 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
16675 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16678 * config/i386/sse.md
16679 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
16680 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
16681 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
16682 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
16683 just a single alternative instead of two, make operands 1 and 2
16686 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
16689 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
16692 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16694 * Makefile.in (lang_opt_files): Add analyzer.opt.
16695 (ANALYZER_OBJS): New.
16696 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
16697 tristate.o and ANALYZER_OBJS.
16698 (TEXI_GCCINT_FILES): Add analyzer.texi.
16699 * common.opt (-fanalyzer): New driver option.
16700 * config.in: Regenerate.
16701 * configure: Regenerate.
16702 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
16703 (gccdepdir): Also create depdir for "analyzer" subdir.
16704 * digraph.cc: New file.
16705 * digraph.h: New file.
16706 * doc/analyzer.texi: New file.
16707 * doc/gccint.texi ("Static Analyzer") New menu item.
16708 (analyzer.texi): Include it.
16709 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
16710 ("Warning Options"): Add static analysis warnings to the list.
16711 (-Wno-analyzer-double-fclose): New option.
16712 (-Wno-analyzer-double-free): New option.
16713 (-Wno-analyzer-exposure-through-output-file): New option.
16714 (-Wno-analyzer-file-leak): New option.
16715 (-Wno-analyzer-free-of-non-heap): New option.
16716 (-Wno-analyzer-malloc-leak): New option.
16717 (-Wno-analyzer-possible-null-argument): New option.
16718 (-Wno-analyzer-possible-null-dereference): New option.
16719 (-Wno-analyzer-null-argument): New option.
16720 (-Wno-analyzer-null-dereference): New option.
16721 (-Wno-analyzer-stale-setjmp-buffer): New option.
16722 (-Wno-analyzer-tainted-array-index): New option.
16723 (-Wno-analyzer-use-after-free): New option.
16724 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
16725 (-Wno-analyzer-use-of-uninitialized-value): New option.
16726 (-Wanalyzer-too-complex): New option.
16727 (-fanalyzer-call-summaries): New warning.
16728 (-fanalyzer-checker=): New warning.
16729 (-fanalyzer-fine-grained): New warning.
16730 (-fno-analyzer-state-merge): New warning.
16731 (-fno-analyzer-state-purge): New warning.
16732 (-fanalyzer-transitivity): New warning.
16733 (-fanalyzer-verbose-edges): New warning.
16734 (-fanalyzer-verbose-state-changes): New warning.
16735 (-fanalyzer-verbosity=): New warning.
16736 (-fdump-analyzer): New warning.
16737 (-fdump-analyzer-callgraph): New warning.
16738 (-fdump-analyzer-exploded-graph): New warning.
16739 (-fdump-analyzer-exploded-nodes): New warning.
16740 (-fdump-analyzer-exploded-nodes-2): New warning.
16741 (-fdump-analyzer-exploded-nodes-3): New warning.
16742 (-fdump-analyzer-supergraph): New warning.
16743 * doc/sourcebuild.texi (dg-require-dot): New.
16744 (dg-check-dot): New.
16745 * gdbinit.in (break-on-saved-diagnostic): New command.
16746 * graphviz.cc: New file.
16747 * graphviz.h: New file.
16748 * ordered-hash-map-tests.cc: New file.
16749 * ordered-hash-map.h: New file.
16750 * passes.def (pass_analyzer): Add before
16751 pass_ipa_whole_program_visibility.
16752 * selftest-run-tests.c (selftest::run_tests): Call
16753 selftest::ordered_hash_map_tests_cc_tests.
16754 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
16756 * shortest-paths.h: New file.
16757 * timevar.def (TV_ANALYZER): New timevar.
16758 (TV_ANALYZER_SUPERGRAPH): Likewise.
16759 (TV_ANALYZER_STATE_PURGE): Likewise.
16760 (TV_ANALYZER_PLAN): Likewise.
16761 (TV_ANALYZER_SCC): Likewise.
16762 (TV_ANALYZER_WORKLIST): Likewise.
16763 (TV_ANALYZER_DUMP): Likewise.
16764 (TV_ANALYZER_DIAGNOSTICS): Likewise.
16765 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
16766 * tree-pass.h (make_pass_analyzer): New decl.
16767 * tristate.cc: New file.
16768 * tristate.h: New file.
16770 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
16773 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
16774 alternatives 9 and 10.
16776 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16778 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
16779 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
16780 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
16781 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
16782 (selftest::hash_map_tests_c_tests): Call it.
16783 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
16784 New static constant, using the value of = H::empty_zero_p.
16785 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
16786 from default_hash_traits <Value>.
16787 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
16789 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
16790 * hash-table.h (hash_table::alloc_entries): Guard the loop of
16791 calls to mark_empty with !Descriptor::empty_zero_p.
16792 (hash_table::empty_slow): Conditionalize the memset call with a
16793 check that Descriptor::empty_zero_p; otherwise, loop through the
16794 entries calling mark_empty on them.
16795 * hash-traits.h (int_hash::empty_zero_p): New static constant.
16796 (pointer_hash::empty_zero_p): Likewise.
16797 (pair_hash::empty_zero_p): Likewise.
16798 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
16800 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
16801 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
16802 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
16803 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
16804 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
16805 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
16806 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
16807 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
16808 * tree-vectorizer.h
16809 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
16812 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
16814 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
16815 fix typo on return value.
16817 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
16820 * cgraph.c (symbol_table::create_edge): Init speculative_id and
16822 (cgraph_edge::make_speculative): Add param for setting speculative_id
16824 (cgraph_edge::speculative_call_info): Update comments and find reference
16825 by speculative_id for multiple indirect targets.
16826 (cgraph_edge::resolve_speculation): Decrease the speculations
16827 for indirect edge, drop it's speculative if not direct target
16828 left. Update comments.
16829 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
16830 (cgraph_node::dump): Print num_speculative_call_targets.
16831 (cgraph_node::verify_node): Don't report error if speculative
16832 edge not include statement.
16833 (cgraph_edge::num_speculative_call_targets_p): New function.
16834 * cgraph.h (int common_target_id): Remove.
16835 (int common_target_probability): Remove.
16836 (num_speculative_call_targets): New variable.
16837 (make_speculative): Add param for setting speculative_id.
16838 (cgraph_edge::num_speculative_call_targets_p): New declare.
16839 (target_prob): New variable.
16840 (speculative_id): New variable.
16841 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
16842 call summaries for multiple speculative call targets.
16843 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
16844 * ipa-profile.c (struct speculative_call_target): New struct.
16845 (class speculative_call_summary): New class.
16846 (class speculative_call_summaries): New class.
16847 (call_sums): New variable.
16848 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
16849 (ipa_profile_write_edge_summary): New function.
16850 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
16851 (ipa_profile_dump_all_summaries): New function.
16852 (ipa_profile_read_edge_summary): New function.
16853 (ipa_profile_read_summary_section): New function.
16854 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
16855 (ipa_profile): Generate num_speculative_call_targets from
16857 * ipa-ref.h (speculative_id): New variable.
16858 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
16859 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
16860 common_target_probability. Stream out speculative_id and
16861 num_speculative_call_targets.
16862 (input_edge): Likewise.
16863 * predict.c (dump_prediction): Remove edges count assert to be
16865 * symtab.c (symtab_node::create_reference): Init speculative_id.
16866 (symtab_node::clone_references): Clone speculative_id.
16867 (symtab_node::clone_referring): Clone speculative_id.
16868 (symtab_node::clone_reference): Clone speculative_id.
16869 (symtab_node::clear_stmts_in_references): Clear speculative_id.
16870 * tree-inline.c (copy_bb): Duplicate all the speculative edges
16871 if indirect call contains multiple speculative targets.
16872 * value-prof.h (check_ic_target): Remove.
16873 * value-prof.c (gimple_value_profile_transformations):
16874 Use void function gimple_ic_transform.
16875 * value-prof.c (gimple_ic_transform): Handle topn case.
16876 Fix comment typos. Change it to a void function.
16878 2020-01-13 Andrew Pinski <apinski@marvell.com>
16880 * config/aarch64/aarch64-cores.def (octeontx2): New define.
16881 (octeontx2t98): New define.
16882 (octeontx2t96): New define.
16883 (octeontx2t93): New define.
16884 (octeontx2f95): New define.
16885 (octeontx2f95n): New define.
16886 (octeontx2f95mm): New define.
16887 * config/aarch64/aarch64-tune.md: Regenerate.
16888 * doc/invoke.texi (-mcpu=): Document the new cpu types.
16890 2020-01-13 Jason Merrill <jason@redhat.com>
16892 PR c++/33799 - destroy return value if local cleanup throws.
16893 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
16895 2020-01-13 Martin Liska <mliska@suse.cz>
16897 * ipa-cp.c (get_max_overall_size): Use newly
16898 renamed param param_ipa_cp_unit_growth.
16899 * params.opt: Remove legacy param name.
16901 2020-01-13 Martin Sebor <msebor@redhat.com>
16903 PR tree-optimization/93213
16904 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
16905 stores to be eliminated.
16907 2020-01-13 Martin Liska <mliska@suse.cz>
16909 * opts.c (print_help): Do not print CL_PARAM
16910 and CL_WARNING for CL_OPTIMIZATION.
16912 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
16915 * doc/invoke.texi (Warning Options): Add caveat about some warnings
16916 depending on optimization settings.
16918 2020-01-13 Jakub Jelinek <jakub@redhat.com>
16920 PR tree-optimization/90838
16921 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
16922 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
16923 argument rather than to initialize temporary for targets that
16924 don't use the mode argument at all. Initialize ctzval to avoid
16927 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
16929 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
16930 * tree-core.h: Document it.
16931 * gimplify.c (gimplify_omp_workshare): Set it.
16932 * omp-low.c (lower_omp_target): Use it.
16933 * tree-pretty-print.c (dump_omp_clause): Print it.
16935 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
16936 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
16938 2020-01-10 David Malcolm <dmalcolm@redhat.com>
16940 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
16941 * common.opt (fdiagnostics-path-format=): New option.
16942 (diagnostic_path_format): New enum.
16943 (fdiagnostics-show-path-depths): New option.
16944 * coretypes.h (diagnostic_event_id_t): New forward decl.
16945 * diagnostic-color.c (color_dict): Add "path".
16946 * diagnostic-event-id.h: New file.
16947 * diagnostic-format-json.cc (json_from_expanded_location): Make
16949 (json_end_diagnostic): Call context->make_json_for_path if it
16950 exists and the diagnostic has a path.
16951 (diagnostic_output_format_init): Clear context->print_path.
16952 * diagnostic-path.h: New file.
16953 * diagnostic-show-locus.c (colorizer::set_range): Special-case
16954 when printing a run of events in a diagnostic_path so that they
16955 all get the same color.
16956 (layout::m_diagnostic_path_p): New field.
16957 (layout::layout): Initialize it.
16958 (layout::print_any_labels): Don't colorize the label text for an
16959 event in a diagnostic_path.
16960 (gcc_rich_location::add_location_if_nearby): Add
16961 "restrict_to_current_line_spans" and "label" params. Pass the
16962 former to layout.maybe_add_location_range; pass the latter
16963 when calling add_range.
16964 * diagnostic.c: Include "diagnostic-path.h".
16965 (diagnostic_initialize): Initialize context->path_format and
16966 context->show_path_depths.
16967 (diagnostic_show_any_path): New function.
16968 (diagnostic_path::interprocedural_p): New function.
16969 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
16970 (simple_diagnostic_path::num_events): New function.
16971 (simple_diagnostic_path::get_event): New function.
16972 (simple_diagnostic_path::add_event): New function.
16973 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
16974 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
16975 (debug): New overload taking a diagnostic_path *.
16976 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
16977 * diagnostic.h (enum diagnostic_path_format): New enum.
16978 (json::value): New forward decl.
16979 (diagnostic_context::path_format): New field.
16980 (diagnostic_context::show_path_depths): New field.
16981 (diagnostic_context::print_path): New callback field.
16982 (diagnostic_context::make_json_for_path): New callback field.
16983 (diagnostic_show_any_path): New decl.
16984 (json_from_expanded_location): New decl.
16985 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
16986 (-fdiagnostics-show-path-depths): New option.
16987 (-fdiagnostics-color): Add "path" to description of default
16988 GCC_COLORS; describe it.
16989 (-fdiagnostics-format=json): Document how diagnostic paths are
16990 represented in the JSON output format.
16991 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
16992 Add optional params "restrict_to_current_line_spans" and "label".
16993 * opts.c (common_handle_option): Handle
16994 OPT_fdiagnostics_path_format_ and
16995 OPT_fdiagnostics_show_path_depths.
16996 * pretty-print.c: Include "diagnostic-event-id.h".
16997 (pp_format): Implement "%@" format code for printing
16998 diagnostic_event_id_t *.
16999 (selftest::test_pp_format): Add tests for "%@".
17000 * selftest-run-tests.c (selftest::run_tests): Call
17001 selftest::tree_diagnostic_path_cc_tests.
17002 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
17003 * toplev.c (general_init): Initialize global_dc->path_format and
17004 global_dc->show_path_depths.
17005 * tree-diagnostic-path.cc: New file.
17006 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
17007 non-static. Drop "diagnostic" param in favor of storing the
17008 original value of "where" and re-using it.
17009 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
17010 maybe_unwind_expanded_macro_loc.
17011 (tree_diagnostics_defaults): Initialize context->print_path and
17012 context->make_json_for_path.
17013 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
17015 (default_tree_make_json_for_path): New decl.
17016 (maybe_unwind_expanded_macro_loc): New decl.
17018 2020-01-10 Jakub Jelinek <jakub@redhat.com>
17020 PR tree-optimization/93210
17021 * fold-const.h (native_encode_initializer,
17022 can_native_interpret_type_p): Declare.
17023 * fold-const.c (native_encode_string): Fix up handling with off != -1,
17025 (native_encode_initializer): New function, moved from dwarf2out.c.
17026 Adjust to native_encode_expr compatible arguments, including dry-run
17027 and partial extraction modes. Don't handle STRING_CST.
17028 (can_native_interpret_type_p): No longer static.
17029 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
17030 offset / BITS_PER_UNIT fits into int and don't call it if
17031 can_native_interpret_type_p fails. If suboff is NULL and for
17032 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
17033 native_encode_initializer.
17034 (fold_const_aggregate_ref_1): Formatting fix.
17035 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
17036 (tree_add_const_value_attribute): Adjust caller.
17038 PR tree-optimization/90838
17039 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
17040 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
17041 CTZ_DEFINED_VALUE_AT_ZERO.
17043 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
17045 PR inline-asm/93027
17046 * lra-constraints.c (match_reload): Permit input operands have the
17047 same mode as output while other input operands have a different
17050 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
17052 PR tree-optimization/90838
17053 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
17054 (check_ctz_string): Likewise.
17055 (optimize_count_trailing_zeroes): Likewise.
17056 (simplify_count_trailing_zeroes): Likewise.
17057 (pass_forwprop::execute): Try ctz simplification.
17058 * match.pd: Add matching for ctz idioms.
17060 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17062 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
17064 (aarch64_invalid_unary_op): New function for target hook.
17065 (aarch64_invalid_binary_op): New function for target hook.
17067 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17069 * config.gcc: Add arm_bf16.h.
17070 * config/aarch64/aarch64-builtins.c
17071 (aarch64_simd_builtin_std_type): Add BFmode.
17072 (aarch64_init_simd_builtin_types): Define element types for vector
17074 (aarch64_init_bf16_types): New function.
17075 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
17076 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
17078 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
17079 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
17081 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
17082 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
17083 * config/aarch64/aarch64.c
17084 (aarch64_classify_vector_mode): Add support for BF types.
17085 (aarch64_gimplify_va_arg_expr): Add support for BF types.
17086 (aarch64_vq_mode): Add support for BF types.
17087 (aarch64_simd_container_mode): Add support for BF types.
17088 (aarch64_mangle_type): Add support for BF scalar type.
17089 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
17090 * config/aarch64/arm_bf16.h: New file.
17091 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
17092 * config/aarch64/iterators.md: Add BF types to mode attributes.
17093 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
17095 2020-01-10 Jason Merrill <jason@redhat.com>
17097 PR c++/93173 - incorrect tree sharing.
17098 * gimplify.c (copy_if_shared): No longer static.
17099 * gimplify.h: Declare it.
17101 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17103 * doc/invoke.texi (-msve-vector-bits=): Document that
17104 -msve-vector-bits=128 now generates VL-specific code for
17105 little-endian targets.
17106 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
17107 build_vector_type_for_mode to construct the data vector types.
17108 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
17109 VL-specific code for -msve-vector-bits=128 on little-endian targets.
17110 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
17111 for 128-bit vectors.
17113 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17115 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
17118 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17120 * config/aarch64/aarch64-builtins.c
17121 (aarch64_builtin_vectorized_function): Check for specific vector modes,
17122 rather than checking the number of elements and the element mode.
17124 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17126 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
17127 get_related_vectype_for_scalar_type rather than build_vector_type
17128 to create the index type for a conditional reduction.
17130 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17132 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
17133 for any type of gather or scatter, including strided accesses.
17135 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17137 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
17140 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17142 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
17143 get_dr_vinfo_offset
17144 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
17145 parameter and its use to reset DR_OFFSET's.
17146 (vect_transform_loop): Remove orig_drs_init argument.
17147 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
17148 member of dr_vec_info rather than the offset of the associated
17149 data_reference's innermost_loop_behavior.
17150 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
17151 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
17152 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
17153 get_dr_vinfo_offset.
17154 (vectorizable_store): Likewise.
17155 (vectorizable_load): Likewise.
17157 2020-01-10 Richard Biener <rguenther@suse.de>
17159 * gimple-ssa-store-merging
17160 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
17162 2020-01-10 Martin Liska <mliska@suse.cz>
17165 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
17166 encapsulation that was there before r280040.
17168 2020-01-10 Richard Biener <rguenther@suse.de>
17170 PR middle-end/93199
17171 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
17172 sequences to avoid walking them again for secondary opportunities.
17173 (pass_lower_eh_dispatch::execute): Instead actually insert
17176 2020-01-10 Richard Biener <rguenther@suse.de>
17178 PR middle-end/93199
17179 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
17180 (cleanup_all_empty_eh): Walk landing pads in reverse order to
17181 avoid quadraticness.
17183 2020-01-10 Martin Jambor <mjambor@suse.cz>
17185 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
17186 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
17187 to get param_ipa_sra_max_replacements.
17188 (param_splitting_across_edge): Pass the caller to
17189 pull_accesses_from_callee.
17191 2020-01-10 Martin Jambor <mjambor@suse.cz>
17193 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
17194 * ipa-cp.c (max_new_size): Removed.
17195 (orig_overall_size): New variable.
17196 (get_max_overall_size): New function.
17197 (estimate_local_effects): Use it. Adjust dump.
17198 (decide_about_value): Likewise.
17199 (ipcp_propagate_stage): Do not calculate max_new_size, just store
17200 orig_overall_size. Adjust dump.
17201 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
17203 2020-01-10 Martin Jambor <mjambor@suse.cz>
17205 * params.opt (param_ipa_max_agg_items): Mark as Optimization
17206 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
17207 instead of param_ipa_max_agg_items.
17208 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
17209 optimization info for the callee.
17211 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
17213 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
17214 markers if debug_inline_points is false.
17216 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17218 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
17220 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
17221 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
17222 aarch64-sve-builtins-sve2.h.
17223 (aarch64-sve-builtins-sve2.o): New rule.
17224 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
17225 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
17226 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
17227 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
17228 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
17229 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
17231 * config/aarch64/aarch64-sve.md: Update comments with SVE2
17232 instructions that are handled here.
17233 (@cond_asrd<mode>): Generalize to...
17234 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
17235 (*cond_asrd<mode>_2): Generalize to...
17236 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
17237 (*cond_asrd<mode>_z): Generalize to...
17238 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
17239 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
17240 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
17241 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
17242 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
17244 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17245 (@aarch64_scatter_stnt<mode>): Likewise.
17246 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17247 (@aarch64_mul_lane_<mode>): Likewise.
17248 (@aarch64_sve_suqadd<mode>_const): Likewise.
17249 (*<sur>h<addsub><mode>): Generalize to...
17250 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
17252 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
17253 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
17254 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
17255 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
17256 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
17257 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
17258 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
17259 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
17260 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
17261 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
17262 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
17263 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
17264 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
17265 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
17266 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
17267 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
17268 (@aarch64_sve2_xar<mode>): Likewise.
17269 (@aarch64_sve2_bcax<mode>): Likewise.
17270 (*aarch64_sve2_eor3<mode>): Rename to...
17271 (@aarch64_sve2_eor3<mode>): ...this.
17272 (@aarch64_sve2_bsl<mode>): New expander.
17273 (@aarch64_sve2_nbsl<mode>): Likewise.
17274 (@aarch64_sve2_bsl1n<mode>): Likewise.
17275 (@aarch64_sve2_bsl2n<mode>): Likewise.
17276 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
17277 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
17278 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
17279 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
17280 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
17281 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
17282 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
17283 (<su>mull<bt><Vwide>): Generalize to...
17284 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
17286 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
17287 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
17288 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
17289 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17290 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
17291 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17292 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
17293 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17294 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
17295 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17296 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
17297 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
17298 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
17299 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
17300 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
17301 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
17302 (<SHRNB:r>shrnb<mode>): Generalize to...
17303 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
17305 (<SHRNT:r>shrnt<mode>): Generalize to...
17306 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
17308 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
17309 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
17310 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
17311 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
17312 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
17313 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
17314 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
17315 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
17316 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
17317 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
17318 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
17319 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
17320 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
17321 (@aarch64_sve2_cvtnt<mode>): Likewise.
17322 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
17323 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
17324 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
17325 (@aarch64_sve2_cvtxnt<mode>): Likewise.
17326 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
17327 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
17328 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
17329 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
17330 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
17331 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
17332 (@aarch64_sve2_pmul<mode>): Likewise.
17333 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
17334 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
17335 (@aarch64_sve2_tbl2<mode>): Likewise.
17336 (@aarch64_sve2_tbx<mode>): Likewise.
17337 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
17338 (@aarch64_sve2_histcnt<mode>): Likewise.
17339 (@aarch64_sve2_histseg<mode>): Likewise.
17340 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
17341 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
17342 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
17343 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
17344 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
17345 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
17346 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
17347 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
17348 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
17349 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
17350 (SVE2_PMULL_PAIR_I): New mode iterators.
17351 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
17352 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
17353 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
17354 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
17355 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
17356 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
17357 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
17358 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
17359 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
17360 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
17361 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
17362 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
17363 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
17364 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
17365 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
17366 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
17367 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
17368 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
17369 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
17370 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
17371 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
17372 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
17373 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
17374 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
17375 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
17376 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
17377 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
17378 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
17379 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
17380 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
17381 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
17383 (VNARROW, Ventype): New mode attributes.
17384 (Vewtype): Handle VNx2DI. Fix typo in comment.
17385 (VDOUBLE): New mode attribute.
17386 (sve_lane_con): Handle VNx8HI.
17387 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
17388 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
17389 (sve_int_op, sve_int_op_rev): Handle the above codes.
17390 (sve_pred_int_rhs2_operand): Likewise.
17391 (MULLBT, SHRNB, SHRNT): Delete.
17392 (SVE_INT_SHIFT_IMM): New int iterator.
17393 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
17394 and UNSPEC_WHILEHS for TARGET_SVE2.
17395 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
17396 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
17397 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
17398 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
17399 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
17400 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
17401 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
17402 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
17403 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
17404 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
17405 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
17406 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
17407 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
17408 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
17409 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
17410 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
17411 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
17412 (optab): Handle the new unspecs.
17413 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
17415 (lr): Handle the new unspecs.
17417 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
17418 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
17419 (sve_int_qsub_op): New int attributes.
17420 (sve_fp_op, rot): Handle the new unspecs.
17421 * config/aarch64/aarch64-sve-builtins.h
17422 (function_resolver::require_matching_pointer_type): Declare.
17423 (function_resolver::resolve_unary): Add an optional boolean argument.
17424 (function_resolver::finish_opt_n_resolution): Add an optional
17425 type_suffix_index argument.
17426 (gimple_folder::redirect_call): Declare.
17427 (gimple_expander::prepare_gather_address_operands): Add an optional
17429 * config/aarch64/aarch64-sve-builtins.cc: Include
17430 aarch64-sve-builtins-sve2.h.
17431 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
17432 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
17433 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
17434 (TYPES_hsd_integer): Use TYPES_hsd_signed.
17435 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
17436 (TYPES_s_unsigned): Likewise.
17437 (TYPES_s_integer): Use TYPES_s_unsigned.
17438 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
17439 (TYPES_sd_integer): Use them.
17440 (TYPES_d_unsigned): New macro.
17441 (TYPES_d_integer): Use it.
17442 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
17443 (TYPES_cvt_narrow): Likewise.
17444 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
17445 (preds_mx): New variable.
17446 (function_builder::add_overloaded_function): Allow the new feature
17447 set to be more restrictive than the original one.
17448 (function_resolver::infer_pointer_type): Remove qualifiers from
17449 the pointer type before printing it.
17450 (function_resolver::require_matching_pointer_type): New function.
17451 (function_resolver::resolve_sv_displacement): Handle functions
17452 that don't support 32-bit vector indices or svint32_t vector offsets.
17453 (function_resolver::finish_opt_n_resolution): Take the inferred type
17454 as a separate argument.
17455 (function_resolver::resolve_unary): Optionally treat all forms in
17456 the same way as normal merging functions.
17457 (gimple_folder::redirect_call): New function.
17458 (function_expander::prepare_gather_address_operands): Add an argument
17459 that says whether scaled forms are available. If they aren't,
17460 handle scaling of vector indices and don't add the extension and
17462 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
17463 fall back to using cond_* instead.
17464 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
17465 Split out the member variables into...
17466 (rtx_code_function_base): ...this new base class.
17467 (rtx_code_function_rotated): Inherit rtx_code_function_base.
17468 (unspec_based_function): Split out the member variables into...
17469 (unspec_based_function_base): ...this new base class.
17470 (unspec_based_function_rotated): Inherit unspec_based_function_base.
17471 (unspec_based_function_exact_insn): New class.
17472 (unspec_based_add_function, unspec_based_add_lane_function)
17473 (unspec_based_lane_function, unspec_based_pred_function)
17474 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
17475 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
17476 (unspec_based_sub_function, unspec_based_sub_lane_function): New
17478 (unspec_based_fused_function): New class.
17479 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
17480 (unspec_based_fused_lane_function): New class.
17481 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
17483 (CODE_FOR_MODE1): New macro.
17484 (fixed_insn_function): New class.
17485 (while_comparison): Likewise.
17486 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
17487 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
17488 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
17489 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
17490 (load_gather_sv_restricted, shift_left_imm_long): Declare.
17491 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
17492 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
17493 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
17494 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
17495 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
17496 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
17497 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
17498 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
17499 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
17500 Also add an initial argument for unary_convert_narrowt, regardless
17501 of the predication type.
17502 (build_32_64): Allow loads and stores to specify MODE_none.
17503 (build_sv_index64, build_sv_uint_offset): New functions.
17504 (long_type_suffix): New function.
17505 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
17506 (binary_imm_long_base, load_gather_sv_base): Likewise.
17507 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
17508 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
17509 (unary_narrowb_base, unary_narrowt_base): Likewise.
17510 (binary_long_lane_def, binary_long_lane): New shape.
17511 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
17512 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
17513 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
17514 (binary_to_uint_def, binary_to_uint): Likewise.
17515 (binary_wide_def, binary_wide): Likewise.
17516 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
17517 (compare_def, compare): Likewise.
17518 (compare_ptr_def, compare_ptr): Likewise.
17519 (load_ext_gather_index_restricted_def,
17520 load_ext_gather_index_restricted): Likewise.
17521 (load_ext_gather_offset_restricted_def,
17522 load_ext_gather_offset_restricted): Likewise.
17523 (load_gather_sv_def): Inherit from load_gather_sv_base.
17524 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
17525 (shift_left_imm_def, shift_left_imm): Likewise.
17526 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
17527 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
17528 (store_scatter_index_restricted_def,
17529 store_scatter_index_restricted): Likewise.
17530 (store_scatter_offset_restricted_def,
17531 store_scatter_offset_restricted): Likewise.
17532 (tbl_tuple_def, tbl_tuple): Likewise.
17533 (ternary_long_lane_def, ternary_long_lane): Likewise.
17534 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
17535 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
17536 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
17537 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
17538 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
17539 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
17540 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
17541 (ternary_uint_def, ternary_uint): Likewise.
17542 (unary_convert): Fix typo in comment.
17543 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
17544 (unary_long_def, unary_long): Likewise.
17545 (unary_narrowb_def, unary_narrowb): Likewise.
17546 (unary_narrowt_def, unary_narrowt): Likewise.
17547 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
17548 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
17549 (unary_to_int_def, unary_to_int): Likewise.
17550 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
17551 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
17552 (svasrd_impl): Delete.
17553 (svcadd_impl::expand): Handle integer operations too.
17554 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
17555 new functions to derive the unspec numbers.
17556 (svmla_svmls_lane_impl): Replace with...
17557 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
17558 integer operations too.
17559 (svwhile_impl): Rename to...
17560 (svwhilelx_impl): ...this and inherit from while_comparison.
17561 (svasrd): Use unspec_based_function.
17562 (svmla_lane): Use svmla_lane_impl.
17563 (svmls_lane): Use svmls_lane_impl.
17564 (svrecpe, svrsqrte): Handle unsigned integer operations too.
17565 (svwhilele, svwhilelt): Use svwhilelx_impl.
17566 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
17567 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
17568 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
17569 * config/aarch64/aarch64-sve-builtins.def: Include
17570 aarch64-sve-builtins-sve2.def.
17572 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17574 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
17575 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
17576 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
17577 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
17578 immediates as well as vector ones.
17579 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
17580 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
17581 (aarch64_sve_qsub_immediate): Update calls accordingly.
17583 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17585 * config/aarch64/aarch64-sve2.md: Add banner comments.
17586 (<su>mulh<r>s<mode>3): Move further up file.
17587 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
17588 (*aarch64_sve2_sra<mode>): Move further down file.
17589 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
17591 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17593 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
17594 and UNSPEC_WHILEWR.
17595 (while_optab_cmp): Handle them.
17596 * config/aarch64/aarch64-sve.md
17597 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
17598 and add a "@" marker.
17599 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
17600 instead of gen_aarch64_sve2_while_ptest.
17601 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
17603 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17605 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
17606 (UNSPEC_WHILELE): ...this.
17607 (UNSPEC_WHILE_LO): Rename to...
17608 (UNSPEC_WHILELO): ...this.
17609 (UNSPEC_WHILE_LS): Rename to...
17610 (UNSPEC_WHILELS): ...this.
17611 (UNSPEC_WHILE_LT): Rename to...
17612 (UNSPEC_WHILELT): ...this.
17613 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
17614 (cmp_op, while_optab_cmp): Likewise.
17615 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
17616 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
17617 (svwhilelt): Likewise.
17619 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17621 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
17622 (unary_to_uint): Define.
17623 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
17624 (unary_count): Rename to...
17625 (unary_to_uint_def, unary_to_uint): ...this.
17626 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
17628 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17630 * config/aarch64/aarch64-sve-builtins-functions.h
17631 (code_for_mode_function): New class.
17632 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
17633 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
17634 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
17635 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
17636 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
17638 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17640 * config/aarch64/iterators.md (addsub): New code attribute.
17641 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
17643 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
17644 in the asm string and attributes. Fix indentation.
17645 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
17647 (@aarch64_sve_<optab><mode>): ...this.
17648 * config/aarch64/aarch64-sve-builtins.h
17649 (function_expander::expand_signed_unpred_op): Delete.
17650 * config/aarch64/aarch64-sve-builtins.cc
17651 (function_expander::expand_signed_unpred_op): Likewise.
17652 (function_expander::map_to_rtx_codes): If the optab isn't defined,
17653 try using code_for_aarch64_sve instead.
17654 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
17655 (svqsub_impl): Likewise.
17656 (svqadd, svqsub): Use rtx_code_function instead.
17658 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17660 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
17661 (HADDSUB, sur, addsub): Remove them.
17663 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17665 * tree-nrv.c (pass_return_slot::execute): Handle all internal
17666 functions the same way, rather than singling out those that
17667 aren't mapped directly to optabs.
17669 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17671 * target.def (compatible_vector_types_p): New target hook.
17672 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
17673 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
17674 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
17675 * doc/tm.texi: Regenerate.
17676 * gimple-expr.c: Include target.h.
17677 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
17678 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
17680 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
17681 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
17682 Use the original predicate if it already has a suitable type.
17684 2020-01-09 Martin Jambor <mjambor@suse.cz>
17686 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
17687 resolve_speculation and redirect_call_stmt_to_callee static. Change
17688 return type of set_call_stmt to cgraph_edge *.
17689 * auto-profile.c (afdo_indirect_call): Adjust call to
17690 redirect_call_stmt_to_callee.
17691 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
17692 make the this pointer explicit, adjust self-recursive calls and the
17693 call top make_direct. Return the resulting edge.
17694 (cgraph_edge::remove): Make this pointer explicit.
17695 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
17696 (cgraph_edge::make_direct): Likewise, adjust call to
17697 resolve_speculation.
17698 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
17699 call to set_call_stmt.
17700 (cgraph_update_edges_for_call_stmt_node): Update call to
17701 set_call_stmt and remove.
17702 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17703 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
17704 (cgraph_node::create_edge_including_clones): Moved "first" definition
17705 of edge to the block where it was used. Adjusted calls to
17707 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
17708 cgraph_edge::remove.
17709 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
17710 make_direct and redirect_call_stmt_to_callee.
17711 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
17712 resolve_speculation and make_direct.
17713 * ipa-inline-transform.c (inline_transform): Adjust call to
17714 redirect_call_stmt_to_callee.
17715 (check_speculations_1):: Adjust call to resolve_speculation.
17716 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
17717 resolve-speculation.
17718 (inline_small_functions): Adjust call to resolve_speculation.
17719 (ipa_inline): Likewise.
17720 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
17722 * ipa-visibility.c (function_and_variable_visibility): Make iteration
17723 safe with regards to edge removal, adjust calls to
17724 redirect_call_stmt_to_callee.
17725 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
17726 and redirect_call_stmt_to_callee.
17727 * multiple_target.c (create_dispatcher_calls): Adjust call to
17728 redirect_call_stmt_to_callee
17729 (redirect_to_specific_clone): Likewise.
17730 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
17731 Adjust calls to cgraph_edge::remove.
17732 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
17733 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
17734 (expand_call_inline): Adjust call to cgraph_edge::remove.
17736 2020-01-09 Martin Liska <mliska@suse.cz>
17738 * params.opt: Set Optimization for
17739 param_max_speculative_devirt_maydefs.
17741 2020-01-09 Martin Sebor <msebor@redhat.com>
17743 PR middle-end/93200
17745 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
17747 2020-01-09 Martin Liska <mliska@suse.cz>
17749 * auto-profile.c (auto_profile): Use opt_for_fn
17751 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
17752 (propagate_vals_across_arith_jfunc): Likewise.
17753 (hint_time_bonus): Likewise.
17754 (incorporate_penalties): Likewise.
17755 (good_cloning_opportunity_p): Likewise.
17756 (perform_estimation_of_a_value): Likewise.
17757 (estimate_local_effects): Likewise.
17758 (ipcp_propagate_stage): Likewise.
17759 * ipa-fnsummary.c (decompose_param_expr): Likewise.
17760 (set_switch_stmt_execution_predicate): Likewise.
17761 (analyze_function_body): Likewise.
17762 * ipa-inline-analysis.c (offline_size): Likewise.
17763 * ipa-inline.c (early_inliner): Likewise.
17764 * ipa-prop.c (ipa_analyze_node): Likewise.
17765 (ipcp_transform_function): Likewise.
17766 * ipa-sra.c (process_scan_results): Likewise.
17767 (ipa_sra_summarize_function): Likewise.
17768 * params.opt: Rename ipcp-unit-growth to
17769 ipa-cp-unit-growth. Add Optimization for various
17770 IPA-related parameters.
17772 2020-01-09 Richard Biener <rguenther@suse.de>
17774 PR middle-end/93054
17775 * gimplify.c (gimplify_expr): Deal with NOP definitions.
17777 2020-01-09 Richard Biener <rguenther@suse.de>
17779 PR tree-optimization/93040
17780 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
17782 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
17784 * common/config/avr/avr-common.c (avr_option_optimization_table)
17785 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
17787 2020-01-09 Martin Liska <mliska@suse.cz>
17789 * cgraphclones.c (symbol_table::materialize_all_clones):
17790 Use cgraph_node::dump_name.
17792 2020-01-09 Jakub Jelinek <jakub@redhat.com>
17794 PR inline-asm/93202
17795 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
17796 output_operand_lossage instead of gcc_unreachable.
17797 * doc/md.texi (riscv f constraint): Fix typo.
17800 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
17801 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
17802 CONST_SCALAR_INT_P instead of CONST_INT_P.
17803 (*subv<mode>4_1): Rename to ...
17804 (subv<mode>4_1): ... this.
17805 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
17806 define_insn_and_split patterns.
17807 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
17810 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17812 * vec.c (class selftest::count_dtor): New class.
17813 (selftest::test_auto_delete_vec): New test.
17814 (selftest::vec_c_tests): Call it.
17815 * vec.h (class auto_delete_vec): New class template.
17816 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
17818 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17820 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
17822 2020-01-08 Jim Wilson <jimw@sifive.com>
17824 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
17825 use of TLS_MODEL_LOCAL_EXEC when not pic.
17827 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17829 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
17832 2020-01-08 Jakub Jelinek <jakub@redhat.com>
17835 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
17836 *stack_protect_set_3 peephole2): Also check that the second
17837 insns source is general_operand.
17840 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
17841 predicate for output operand instead of register_operand.
17842 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
17843 memory destination and non-memory operands[2].
17845 2020-01-08 Martin Liska <mliska@suse.cz>
17847 * cgraph.c (cgraph_node::dump): Use ::dump_name or
17848 ::dump_asm_name instead of (::name or ::asm_name).
17849 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
17850 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
17851 (analyze_functions): Likewise.
17852 (expand_all_functions): Likewise.
17853 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
17854 (propagate_bits_across_jump_function): Likewise.
17855 (dump_profile_updates): Likewise.
17856 (ipcp_store_bits_results): Likewise.
17857 (ipcp_store_vr_results): Likewise.
17858 * ipa-devirt.c (dump_targets): Likewise.
17859 * ipa-fnsummary.c (analyze_function_body): Likewise.
17860 * ipa-hsa.c (check_warn_node_versionable): Likewise.
17861 (process_hsa_functions): Likewise.
17862 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
17863 (set_alias_uids): Likewise.
17864 * ipa-inline-transform.c (save_inline_function_body): Likewise.
17865 * ipa-inline.c (recursive_inlining): Likewise.
17866 (inline_to_all_callers_1): Likewise.
17867 (ipa_inline): Likewise.
17868 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
17869 (ipa_propagate_frequency): Likewise.
17870 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
17871 (remove_described_reference): Likewise.
17872 * ipa-pure-const.c (worse_state): Likewise.
17873 (check_retval_uses): Likewise.
17874 (analyze_function): Likewise.
17875 (propagate_pure_const): Likewise.
17876 (propagate_nothrow): Likewise.
17877 (dump_malloc_lattice): Likewise.
17878 (propagate_malloc): Likewise.
17879 (pass_local_pure_const::execute): Likewise.
17880 * ipa-visibility.c (optimize_weakref): Likewise.
17881 (function_and_variable_visibility): Likewise.
17882 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
17883 (ipa_discover_variable_flags): Likewise.
17884 * lto-streamer-out.c (output_function): Likewise.
17885 (output_constructor): Likewise.
17886 * tree-inline.c (copy_bb): Likewise.
17887 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
17888 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
17890 2020-01-08 Richard Biener <rguenther@suse.de>
17892 PR middle-end/93199
17893 * tree-eh.c (sink_clobbers): Update virtual operands for
17894 the first and last stmt only. Add a dry-run capability.
17895 (pass_lower_eh_dispatch::execute): Perform clobber sinking
17896 after CFG manipulations and in RPO order to catch all
17897 secondary opportunities reliably.
17899 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17902 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17904 2019-01-08 Richard Biener <rguenther@suse.de>
17906 PR middle-end/93199
17907 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
17908 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
17909 virtual operand, also updating SSA use.
17910 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
17911 Update stmt after resetting virtual operand.
17912 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
17913 * gimple-iterator.c (gsi_remove): When not removing the stmt
17914 permanently do not delink immediate uses or mark the stmt modified.
17916 2020-01-08 Martin Liska <mliska@suse.cz>
17918 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
17919 (ipa_call_context::estimate_size_and_time): Likewise.
17920 (inline_analyze_function): Likewise.
17922 2020-01-08 Martin Liska <mliska@suse.cz>
17924 * cgraph.c (cgraph_node::dump): Use systematically
17927 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17929 Add -nodevicespecs option for avr.
17932 * config/avr/avr.opt (-nodevicespecs): New driver option.
17933 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
17934 "-specs=device-specs/..." if that option is not set.
17935 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17937 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17939 Implement 64-bit double functions for avr.
17942 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
17943 --with-double-comparison.
17944 * doc/install.texi: Document them.
17945 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
17946 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
17947 <WITH_DOUBLE_COMPARISON>: New built-in defines.
17948 * doc/invoke.texi (AVR Built-in Macros): Document them.
17949 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
17950 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
17951 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
17953 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
17956 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
17957 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
17958 when only building rm-profile multilibs.
17960 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
17963 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
17964 lattice for a value to check.
17965 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
17966 finite propagation in self-recursive scc.
17968 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
17970 * ipa-inline.c (caller_growth_limits): Restore the AND.
17972 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
17974 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
17975 (VEC_ALLREG_ALT): New iterator.
17976 (VEC_ALLREG_INT_MODE): New iterator.
17977 (VCMP_MODE): New iterator.
17978 (VCMP_MODE_INT): New iterator.
17979 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
17980 (vec_cmp<u>v64qidi): New define_expand.
17981 (vec_cmp<mode>di_exec): Use VCMP_MODE.
17982 (vec_cmpu<mode>di_exec): New define_expand.
17983 (vec_cmp<u>v64qidi_exec): New define_expand.
17984 (vec_cmp<mode>di_dup): Use VCMP_MODE.
17985 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
17986 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
17987 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
17988 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
17989 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
17990 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
17991 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
17992 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
17993 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
17995 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
17996 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
17998 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
18000 * config/gcn/constraints.md (DA): Update description and match.
18002 (Db): New constraint.
18003 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
18005 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
18006 Implement 'Db' mixed immediate type.
18007 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
18008 (addcv64si3_dup<exec_vcc>): Delete.
18009 (subcv64si3<exec_vcc>): Rework constraints.
18010 (addv64di3): Rework constraints.
18011 (addv64di3_exec): Rework constraints.
18012 (subv64di3): Rework constraints.
18013 (addv64di3_dup): Delete.
18014 (addv64di3_dup_exec): Delete.
18015 (addv64di3_zext): Rework constraints.
18016 (addv64di3_zext_exec): Rework constraints.
18017 (addv64di3_zext_dup): Rework constraints.
18018 (addv64di3_zext_dup_exec): Rework constraints.
18019 (addv64di3_zext_dup2): Rework constraints.
18020 (addv64di3_zext_dup2_exec): Rework constraints.
18021 (addv64di3_sext_dup2): Rework constraints.
18022 (addv64di3_sext_dup2_exec): Rework constraints.
18024 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
18026 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
18027 existing target checks.
18029 2020-01-07 Richard Biener <rguenther@suse.de>
18031 * doc/install.texi: Bump minimal supported MPC version.
18033 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
18035 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
18036 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
18037 * langhooks.c: Include stor-layout.h.
18038 (lhd_simulate_enum_decl): New function.
18039 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
18040 handle_arm_sve_h for the LTO frontend.
18041 (register_vector_type): Cope with null returns from pushdecl.
18043 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
18045 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
18046 (aarch64_sve::nvectors_if_data_type): Replace with...
18047 (aarch64_sve::builtin_type_p): ...this.
18048 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
18049 (find_vector_type): Delete.
18050 (add_sve_type_attribute): New function.
18051 (lookup_sve_type_attribute): Likewise.
18052 (register_builtin_types): Add an "SVE type" attribute to each type.
18053 (register_tuple_type): Likewise.
18054 (svbool_type_p, nvectors_if_data_type): Delete.
18055 (mangle_builtin_type): Use lookup_sve_type_attribute.
18056 (builtin_type_p): Likewise. Add an overload that returns the
18057 number of constituent vector and predicate registers.
18058 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
18059 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
18060 instead of aarch64_sve_argument_p.
18061 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
18062 (aarch64_pass_by_reference): Likewise.
18063 (aarch64_function_value_1): Likewise.
18064 (aarch64_return_in_memory): Likewise.
18065 (aarch64_layout_arg): Likewise.
18067 2020-01-07 Jakub Jelinek <jakub@redhat.com>
18069 PR tree-optimization/93156
18070 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
18071 least significant bit is always clear.
18073 PR tree-optimization/93118
18074 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
18075 simplifier with two intermediate conversions.
18077 2020-01-07 Martin Liska <mliska@suse.cz>
18079 * params.opt: Add Optimization for various parameters.
18081 2020-01-07 Martin Liska <mliska@suse.cz>
18084 * doc/extend.texi: Explain cloning for target_clone
18087 2020-01-07 Martin Liska <mliska@suse.cz>
18089 PR tree-optimization/92860
18090 * common.opt: Make in Optimization option
18091 as it is affected by -O0, which is an Optimization
18093 * tree-inline.c (tree_inlinable_function_p):
18094 Use opt_for_fn for warn_inline.
18095 (expand_call_inline): Likewise.
18097 2020-01-07 Martin Liska <mliska@suse.cz>
18099 PR tree-optimization/92860
18100 * common.opt: Make flag_ree as optimization
18103 2020-01-07 Martin Liska <mliska@suse.cz>
18105 PR optimization/92860
18106 * params.opt: Mark param_min_crossjump_insns with Optimization
18109 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
18111 * ipa-inline-analysis.c (estimate_growth): Fix typo.
18112 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
18114 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
18116 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
18117 helper function to return the valid addressing formats for a given
18118 hard register and mode.
18119 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
18121 * config/rs6000/constraints.md (Q constraint): Update
18123 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
18126 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
18127 Use 'Q' for doing vector extract from memory.
18128 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
18130 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
18131 doing vector extract from memory.
18132 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
18133 extract from memory.
18135 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
18136 for the offset being 34-bits when -mcpu=future is used.
18138 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
18140 * config/pa/pa.md: Revert change to use ordered_comparison_operator
18141 instead of cmpib_comparison_operator in cmpib patterns.
18142 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
18143 of cmpib_comparison_operator. Revise comment.
18145 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18147 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
18148 in an IFN_DIV_POW2 node to be equal.
18150 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18152 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
18153 (vect_check_scalar_mask): ...this.
18154 (vectorizable_store, vectorizable_load): Update call accordingly.
18155 (vectorizable_call): Use vect_check_scalar_mask to check the mask
18156 argument in calls to conditional internal functions.
18158 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18160 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
18161 '0' matching inputs.
18162 (subv64di3_exec): Likewise.
18164 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
18166 * config/mips/mips.c (vr4130_align_insns): Fix typo.
18167 * doc/md.texi (movstr): Likewise.
18169 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18171 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
18174 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18176 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
18178 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
18179 to a temporary file and use move-if-change to update the real
18180 file where necessary.
18182 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18184 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
18185 rather than Upa for CPY /M.
18187 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18189 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
18192 2020-01-06 Martin Liska <mliska@suse.cz>
18194 PR tree-optimization/92860
18195 * params.opt: Mark param_max_combine_insns with Optimization
18198 2020-01-05 Jakub Jelinek <jakub@redhat.com>
18201 * config/i386/i386.md (SWIDWI): New mode iterator.
18202 (DWI, dwi): Add TImode variants.
18203 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
18204 <general_hilo_operand> instead of <general_operand>. Use
18205 CONST_SCALAR_INT_P instead of CONST_INT_P.
18206 (*addv<mode>4_1): Rename to ...
18207 (addv<mode>4_1): ... this.
18208 (QWI): New mode attribute.
18209 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
18210 define_insn_and_split patterns.
18211 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
18213 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
18214 <general_hilo_operand> instead of <general_operand>.
18215 (*addcarry<mode>_1): New define_insn.
18216 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
18218 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
18220 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
18221 Use "call" instead of "set".
18223 2020-01-03 Martin Jambor <mjambor@suse.cz>
18226 * ipa-cp.c (print_all_lattices): Skip functions without info.
18228 2020-01-03 Jakub Jelinek <jakub@redhat.com>
18231 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
18232 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
18233 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
18234 for 'e' simd clones.
18237 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
18239 (mprefer-vector-width=): Add Save.
18240 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
18241 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
18242 (ix86_debug_options, ix86_function_specific_print): Adjust
18243 ix86_target_string callers.
18244 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
18245 (ix86_valid_target_attribute_tree): Likewise.
18246 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
18247 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
18248 ix86_target_string caller.
18251 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
18252 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
18253 instead of gen_int_shift_amount + convert_modes.
18255 PR rtl-optimization/93088
18256 * loop-iv.c (find_single_def_src): Punt after looking through
18257 128 reg copies for regs with single definitions. Move definitions
18260 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
18262 * config/arm/arm-c.c (arm_cpu_builtins): Define
18263 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
18264 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
18265 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
18266 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
18267 * config/arm/arm-tables.opt: Regenerated.
18268 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
18269 arm_arch_i8mm and arm_arch_bf16 when enabled.
18270 * config/arm/arm.h (TARGET_I8MM): New macro.
18271 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
18272 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
18273 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
18274 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
18275 (v8_6_a_simd_variants): New.
18276 (v8_*_a_simd_variants): Add i8mm and bf16.
18277 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
18279 2020-01-02 Jakub Jelinek <jakub@redhat.com>
18282 * predict.c (compute_function_frequency): Don't call
18283 warn_function_cold on functions that already have cold attribute.
18285 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
18288 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
18289 COMDAT group function labels in .data.rel.ro.local section.
18290 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
18293 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
18294 comparison_operator in B and S integer comparisons. Likewise, use
18295 ordered_comparison_operator instead of cmpib_comparison_operator in
18297 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
18299 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18301 Update copyright years.
18303 * gcc.c (process_command): Update copyright notice dates.
18304 * gcov-dump.c (print_version): Ditto.
18305 * gcov.c (print_version): Ditto.
18306 * gcov-tool.c (print_version): Ditto.
18307 * gengtype.c (create_file): Ditto.
18308 * doc/cpp.texi: Bump @copying's copyright year.
18309 * doc/cppinternals.texi: Ditto.
18310 * doc/gcc.texi: Ditto.
18311 * doc/gccint.texi: Ditto.
18312 * doc/gcov.texi: Ditto.
18313 * doc/install.texi: Ditto.
18314 * doc/invoke.texi: Ditto.
18316 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
18318 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
18321 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18323 PR tree-optimization/93098
18324 * match.pd (popcount): For shift amounts, use integer_onep
18325 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
18326 tests. Make sure that precision is power of two larger than or equal
18327 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
18328 instead of ULL suffixed constants. Formatting fixes.
18330 Copyright (C) 2020 Free Software Foundation, Inc.
18332 Copying and distribution of this file, with or without modification,
18333 are permitted in any medium without royalty provided the copyright
18334 notice and this notice are preserved.