1 2020-06-12 Marco Elver <elver@google.com>
3 * gimplify.c (gimplify_function_tree): Optimize and do not emit
4 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
5 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
6 * tsan.c (instrument_memory_accesses): Make
7 fentry_exit_instrument bool depend on new param.
9 2020-06-12 Felix Yang <felix.yang@huawei.com>
11 PR tree-optimization/95570
12 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
13 (vect_verify_datarefs_alignment): Call it to filter out data references
14 in the loop whose alignment is irrelevant.
15 (vect_get_peeling_costs_all_drs): Likewise.
16 (vect_peeling_supportable): Likewise.
17 (vect_enhance_data_refs_alignment): Likewise.
19 2020-06-12 Richard Biener <rguenther@suse.de>
21 PR tree-optimization/95633
22 * tree-vect-stmts.c (vectorizable_condition): Properly
23 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
25 2020-06-12 Martin Liška <mliska@suse.cz>
27 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
28 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
30 * lto-wrapper.c (merge_and_complain): Wrap option names.
32 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
34 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
35 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
36 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
37 (vect_set_loop_condition_masked): Renamed to ...
38 (vect_set_loop_condition_partial_vectors): ... this. Rename
39 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
40 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
41 (vect_set_loop_condition_unmasked): Renamed to ...
42 (vect_set_loop_condition_normal): ... this.
43 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
44 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
45 to vect_set_loop_condition_partial_vectors.
46 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
47 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
48 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
50 (vect_analyze_loop_costing): ... this.
51 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
53 (vect_min_prec_for_max_niters): New, factored out from ...
54 (vect_verify_full_masking): ... this. Rename
55 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
56 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
57 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
58 (vectorizable_reduction): Update some dumpings with partial
59 vectors instead of fully-masked.
60 (vectorizable_live_operation): Likewise.
61 (vect_iv_limit_for_full_masking): Renamed to ...
62 (vect_iv_limit_for_partial_vectors): ... this.
63 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
64 (check_load_store_for_partial_vectors): ... this. Update some
65 dumpings with partial vectors instead of fully-masked.
66 (vectorizable_store): Rename check_load_store_masking to
67 check_load_store_for_partial_vectors.
68 (vectorizable_load): Likewise.
69 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
70 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
71 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
72 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
73 (vect_iv_limit_for_full_masking): Renamed to ...
74 (vect_iv_limit_for_partial_vectors): this.
75 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
76 Rename iv_type to rgroup_iv_type.
78 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
80 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
81 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
82 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
83 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
84 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
85 (insn_gen_fn::operator()): Replace overloaded definitions with
86 a parameter-pack version.
88 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
91 * config/i386/i386-features.c (rest_of_insert_endbranch):
93 (rest_of_insert_endbr_and_patchable_area): Change return type
94 to void. Add need_endbr and patchable_area_size arguments.
95 Don't call timevar_push nor timevar_pop. Replace
96 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
97 UNSPECV_PATCHABLE_AREA for patchable area.
98 (pass_data_insert_endbranch): Renamed to ...
99 (pass_data_insert_endbr_and_patchable_area): This. Change
100 pass name to endbr_and_patchable_area.
101 (pass_insert_endbranch): Renamed to ...
102 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
103 and patchable_area_size;.
104 (pass_insert_endbr_and_patchable_area::gate): Set and check
105 need_endbr and patchable_area_size.
106 (pass_insert_endbr_and_patchable_area::execute): Call
107 timevar_push and timevar_pop. Pass need_endbr and
108 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
109 (make_pass_insert_endbranch): Renamed to ...
110 (make_pass_insert_endbr_and_patchable_area): This.
111 * config/i386/i386-passes.def: Replace pass_insert_endbranch
112 with pass_insert_endbr_and_patchable_area.
113 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
114 (make_pass_insert_endbranch): Renamed to ...
115 (make_pass_insert_endbr_and_patchable_area): This.
116 * config/i386/i386.c (ix86_asm_output_function_label): Set
117 function_label_emitted to true.
118 (ix86_print_patchable_function_entry): New function.
119 (ix86_output_patchable_area): Likewise.
120 (x86_function_profiler): Replace endbr_queued_at_entrance with
121 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
122 Call ix86_output_patchable_area to generate patchable area if
124 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
125 * config/i386/i386.h (queued_insn_type): New.
126 (machine_function): Add function_label_emitted. Replace
127 endbr_queued_at_entrance with insn_queued_at_entrance.
128 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
129 (patchable_area): New.
131 2020-06-11 Martin Liska <mliska@suse.cz>
133 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
136 2020-06-11 Martin Liska <mliska@suse.cz>
139 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
142 2020-06-11 Martin Liska <mliska@suse.cz>
143 Jakub Jelinek <jakub@redhat.com>
146 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
147 by using Pmode instead of ptr_mode.
149 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
151 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
152 (vect_set_loop_control): ... this.
153 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
154 (vect_set_loop_masks_directly): Renamed to ...
155 (vect_set_loop_controls_directly): ... this. Also rename some
156 variables with ctrl instead of mask. Rename vect_set_loop_mask to
157 vect_set_loop_control.
158 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
159 Also rename some variables with ctrl instead of mask.
160 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
161 (release_vec_loop_controls): ... this. Rename rgroup_masks related
163 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
164 release_vec_loop_controls.
165 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
166 (vect_get_max_nscalars_per_iter): Likewise.
167 (vect_estimate_min_profitable_iters): Likewise.
168 (vect_record_loop_mask): Likewise.
169 (vect_get_loop_mask): Likewise.
170 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
171 (struct rgroup_controls): ... this. Also rename mask_type
172 to type and rename masks to controls.
174 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
176 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
177 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
178 (vect_gen_vector_loop_niters): Likewise.
179 (vect_do_peeling): Likewise.
180 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
181 fully_masked_p to using_partial_vectors_p.
182 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
183 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
184 (determine_peel_for_niter): Likewise.
185 (vect_estimate_min_profitable_iters): Likewise.
186 (vect_transform_loop): Likewise.
187 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
188 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
190 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
192 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
193 can_fully_mask_p to can_use_partial_vectors_p.
194 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
195 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
196 to saved_can_use_partial_vectors_p.
197 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
198 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
199 (vectorizable_live_operation): Likewise.
200 * tree-vect-stmts.c (permute_vec_elements): Likewise.
201 (check_load_store_masking): Likewise.
202 (vectorizable_operation): Likewise.
203 (vectorizable_store): Likewise.
204 (vectorizable_load): Likewise.
205 (vectorizable_condition): Likewise.
206 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
207 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
208 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
210 2020-06-11 Martin Liska <mliska@suse.cz>
212 * optc-save-gen.awk: Quote error string.
214 2020-06-11 Alexandre Oliva <oliva@adacore.com>
216 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
218 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
220 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
221 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
223 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
224 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
226 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
228 * config/riscv/predicates.md (gpr_save_operation): New.
229 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
230 (riscv_gpr_save_operation_p): Ditto.
231 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
232 Ignore USEs for gpr_save patter.
233 * config/riscv/riscv.c (gpr_save_reg_order): New.
234 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
235 (riscv_gen_gpr_save_insn): New.
236 (riscv_gpr_save_operation_p): Ditto.
237 * config/riscv/riscv.md (S3_REGNUM): New.
246 (gpr_save): Model USEs correctly.
248 2020-06-10 Martin Sebor <msebor@redhat.com>
252 * builtins.c (inform_access): New function.
253 (check_access): Call it. Add argument.
254 (addr_decl_size): Remove.
255 (get_range): New function.
256 (compute_objsize): New overload. Only use compute_builtin_object_size
257 with raw memory function.
258 (check_memop_access): Pass new argument to compute_objsize and
260 (expand_builtin_memchr, expand_builtin_strcat): Same.
261 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
262 (expand_builtin_stpncpy, check_strncat_sizes): Same.
263 (expand_builtin_strncat, expand_builtin_strncpy): Same.
264 (expand_builtin_memcmp): Same.
265 * builtins.h (check_nul_terminated_array): Declare extern.
266 (check_access): Add argument.
267 (struct access_ref, struct access_data): New structs.
268 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
269 (builtin_access::overlap): Call it.
270 * tree-object-size.c (decl_init_size): Declare extern.
271 (addr_object_size): Correct offset computation.
272 * tree-object-size.h (decl_init_size): Declare.
273 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
274 to maybe_warn_overflow when assigning to an SSA_NAME.
276 2020-06-10 Richard Biener <rguenther@suse.de>
278 * tree-vect-loop.c (vect_determine_vectorization_factor):
280 (_loop_vec_info::_loop_vec_info): Likewise.
281 (vect_update_vf_for_slp): Likewise.
282 (vect_analyze_loop_operations): Likewise.
283 (update_epilogue_loop_vinfo): Likewise.
284 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
285 (vect_pattern_recog): Likewise.
286 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
287 (_bb_vec_info::_bb_vec_info): Likewise.
288 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
291 2020-06-10 Richard Biener <rguenther@suse.de>
293 PR tree-optimization/95576
294 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
296 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
299 * config/aarch64/aarch64-sve-builtins.h
300 (sve_switcher::m_old_maximum_field_alignment): New member.
301 * config/aarch64/aarch64-sve-builtins.cc
302 (sve_switcher::sve_switcher): Save maximum_field_alignment in
303 m_old_maximum_field_alignment and clear maximum_field_alignment.
304 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
306 2020-06-10 Richard Biener <rguenther@suse.de>
308 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
310 (_stmt_vec_info::vec_stmts): Likewise.
311 (vec_info::stmt_vec_info_ro): New flag.
312 (vect_finish_replace_stmt): Adjust declaration.
313 (vect_finish_stmt_generation): Likewise.
314 (vectorizable_induction): Likewise.
315 (vect_transform_reduction): Likewise.
316 (vectorizable_lc_phi): Likewise.
317 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
318 allocate stmt infos for increments.
319 (vect_record_grouped_load_vectors): Adjust.
320 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
321 (vectorize_fold_left_reduction): Likewise.
322 (vect_transform_reduction): Likewise.
323 (vect_transform_cycle_phi): Likewise.
324 (vectorizable_lc_phi): Likewise.
325 (vectorizable_induction): Likewise.
326 (vectorizable_live_operation): Likewise.
327 (vect_transform_loop): Likewise.
328 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
329 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
330 (vect_get_slp_defs): Likewise.
331 (vect_transform_slp_perm_load): Likewise.
332 (vect_schedule_slp_instance): Likewise.
333 (vectorize_slp_instance_root_stmt): Likewise.
334 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
335 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
336 (vect_finish_replace_stmt): Do not return anything.
337 (vect_finish_stmt_generation): Likewise.
338 (vect_build_gather_load_calls): Adjust.
339 (vectorizable_bswap): Likewise.
340 (vectorizable_call): Likewise.
341 (vectorizable_simd_clone_call): Likewise.
342 (vect_create_vectorized_demotion_stmts): Likewise.
343 (vectorizable_conversion): Likewise.
344 (vectorizable_assignment): Likewise.
345 (vectorizable_shift): Likewise.
346 (vectorizable_operation): Likewise.
347 (vectorizable_scan_store): Likewise.
348 (vectorizable_store): Likewise.
349 (vectorizable_load): Likewise.
350 (vectorizable_condition): Likewise.
351 (vectorizable_comparison): Likewise.
352 (vect_transform_stmt): Likewise.
353 * tree-vectorizer.c (vec_info::vec_info): Initialize
355 (vec_info::replace_stmt): Copy over stmt UID rather than
356 unsetting/setting a stmt info allocating a new UID.
357 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
359 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
361 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
363 * gimple-ssa-evrp.c (class evrp_folder): New.
364 (class evrp_dom_walker): Remove.
365 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
366 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
367 * tree-ssa-copy.c (copy_folder::get_value): Same.
368 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
369 Pass stmt to get_value.
370 (substitute_and_fold_engine::replace_phi_args_in): Same.
371 (substitute_and_fold_dom_walker::after_dom_children): Call
373 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
374 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
375 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
376 call virtual functions for folding, pre_folding, and post folding.
377 Call get_value with PHI. Tweak dump.
378 * tree-ssa-propagate.h (class substitute_and_fold_engine):
379 New argument to get_value.
380 New virtual function pre_fold_bb.
381 New virtual function post_fold_bb.
382 New virtual function pre_fold_stmt.
383 New virtual function post_new_stmt.
384 New function propagate_into_phi_args.
385 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
386 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
388 (vr_values::fold_cond): New.
389 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
390 * vr-values.h (class vr_values): Add
391 simplify_cond_using_ranges_when_edge_is_known.
393 2020-06-10 Martin Liska <mliska@suse.cz>
396 * asan.c (asan_emit_stack_protection): Emit
397 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
400 2020-06-10 Tamar Christina <tamar.christina@arm.com>
402 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
404 2020-06-10 Richard Biener <rguenther@suse.de>
406 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
407 (vect_record_grouped_load_vectors): Likewise.
408 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
409 (vectorize_fold_left_reduction): Likewise.
410 (vect_transform_reduction): Likewise.
411 (vect_transform_cycle_phi): Likewise.
412 (vectorizable_lc_phi): Likewise.
413 (vectorizable_induction): Likewise.
414 (vectorizable_live_operation): Likewise.
415 (vect_transform_loop): Likewise.
416 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
418 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
419 (vect_get_vec_def_for_operand): Likewise.
420 (vect_get_vec_def_for_stmt_copy): Likewise.
421 (vect_get_vec_defs_for_stmt_copy): Likewise.
422 (vect_get_vec_defs_for_operand): New function.
423 (vect_get_vec_defs): Likewise.
424 (vect_build_gather_load_calls): Adjust.
425 (vect_get_gather_scatter_ops): Likewise.
426 (vectorizable_bswap): Likewise.
427 (vectorizable_call): Likewise.
428 (vectorizable_simd_clone_call): Likewise.
429 (vect_get_loop_based_defs): Remove.
430 (vect_create_vectorized_demotion_stmts): Adjust.
431 (vectorizable_conversion): Likewise.
432 (vectorizable_assignment): Likewise.
433 (vectorizable_shift): Likewise.
434 (vectorizable_operation): Likewise.
435 (vectorizable_scan_store): Likewise.
436 (vectorizable_store): Likewise.
437 (vectorizable_load): Likewise.
438 (vectorizable_condition): Likewise.
439 (vectorizable_comparison): Likewise.
440 (vect_transform_stmt): Adjust and remove no longer applicable
442 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
443 STMT_VINFO_VEC_STMTS.
444 (vec_info::free_stmt_vec_info): Relase it.
445 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
446 (_stmt_vec_info::vec_stmts): Add.
447 (STMT_VINFO_VEC_STMT): Remove.
448 (STMT_VINFO_VEC_STMTS): New.
449 (vect_get_vec_def_for_operand_1): Remove.
450 (vect_get_vec_def_for_operand): Likewise.
451 (vect_get_vec_defs_for_stmt_copy): Likewise.
452 (vect_get_vec_def_for_stmt_copy): Likewise.
453 (vect_get_vec_defs): New overloads.
454 (vect_get_vec_defs_for_operand): New.
455 (vect_get_slp_defs): Declare.
457 2020-06-10 Qian Chao <qianchao9@huawei.com>
459 PR tree-optimization/95569
460 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
462 2020-06-10 Martin Liska <mliska@suse.cz>
464 PR tree-optimization/92860
465 * optc-save-gen.awk: Generate new function cl_optimization_compare.
466 * opth-gen.awk: Generate declaration of the function.
468 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
470 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
471 'future' PowerPC platform.
472 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
473 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
474 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
476 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
477 (rs6000_clone_map): Add 'future' system target_clones support.
479 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
481 * Makefile.in (ZSTD_INC): Define.
482 (ZSTD_LIB): Include ZSTD_LDFLAGS.
483 (CFLAGS-lto-compress.o): Add ZSTD_INC.
484 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
486 * configure: Rebuilt.
488 2020-06-09 Jason Merrill <jason@redhat.com>
491 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
493 2020-06-09 Marco Elver <elver@google.com>
495 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
496 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
497 builtin for volatile instrumentation of reads/writes.
498 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
499 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
500 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
501 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
502 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
503 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
504 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
505 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
506 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
507 * tsan.c (get_memory_access_decl): Argument if access is
508 volatile. If param tsan-distinguish-volatile is non-zero, and
509 access if volatile, return volatile instrumentation decl.
510 (instrument_expr): Check if access is volatile.
512 2020-06-09 Richard Biener <rguenther@suse.de>
514 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
516 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
518 * omp-offload.c (add_decls_addresses_to_decl_constructor,
519 omp_finish_file): With in_lto_p, stream out all offload-table
520 items even if the symtab_node does not exist.
522 2020-06-09 Richard Biener <rguenther@suse.de>
524 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
526 2020-06-09 Martin Liska <mliska@suse.cz>
528 * gcov-dump.c (print_usage): Fix spacing for --raw option
531 2020-06-09 Martin Liska <mliska@suse.cz>
533 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
534 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
535 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
536 Handle all sanitizer options.
537 (can_inline_edge_p): Use renamed CIF_* enum value.
539 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
541 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
543 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
544 (@aarch64_bic<mode>): Enable unpacked BIC.
545 (*bic<mode>3): Enable unpacked BIC.
547 2020-06-09 Martin Liska <mliska@suse.cz>
549 PR gcov-profile/95365
550 * doc/gcov.texi: Compile and link one example in 2 steps.
552 2020-06-09 Jakub Jelinek <jakub@redhat.com>
554 PR tree-optimization/95527
555 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
557 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
559 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
560 'future' PowerPC platform.
561 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
562 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
563 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
565 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
566 (rs6000_clone_map): Add 'future' system target_clones support.
568 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
572 * omp-offload.c (add_decls_addresses_to_decl_constructor,
573 omp_finish_file): Skip removed items.
574 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
575 to this node for variables and functions.
577 2020-06-08 Jason Merrill <jason@redhat.com>
579 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
580 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
581 * configure: Regenerate.
583 2020-06-08 Martin Sebor <msebor@redhat.com>
585 * postreload.c (reload_cse_simplify_operands): Clear first array element
586 before using it. Assert a precondition.
588 2020-06-08 Jakub Jelinek <jakub@redhat.com>
591 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
592 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
593 type is vector boolean.
595 2020-06-08 Tamar Christina <tamar.christina@arm.com>
597 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
599 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
601 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
604 2020-06-08 Martin Liska <mliska@suse.cz>
606 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
607 in all vcond* patterns.
609 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
611 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
612 Define. No longer include <algorithm>.
614 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
616 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
617 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
618 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
619 (parityhi2, parityqi2): New expanders.
620 (parityhi2_cmp): Implement set parity flag with xorb insn.
621 (parityqi2_cmp): Implement set parity flag with testb insn.
622 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
624 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
627 * config/rs6000/rs6000.c (rs6000_option_override_internal):
628 Override flag_cunroll_grow_size.
630 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
632 * common.opt (flag_cunroll_grow_size): New flag.
633 * toplev.c (process_options): Set flag_cunroll_grow_size.
634 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
635 Use flag_cunroll_grow_size.
637 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
640 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
641 (ipa_odr_summary_write): Update streaming.
642 (ipa_odr_read_section): Update streaming.
644 2020-06-06 Alexandre Oliva <oliva@adacore.com>
647 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
649 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
650 Julian Brown <julian@codesourcery.com>
652 * gimplify.c (gimplify_adjust_omp_clauses): Remove
653 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
655 2020-06-05 Richard Biener <rguenther@suse.de>
657 PR tree-optimization/95539
658 * tree-vect-data-refs.c
659 (vect_slp_analyze_and_verify_instance_alignment): Use
660 SLP_TREE_REPRESENTATIVE for the data-ref check.
661 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
662 back to the first scalar stmt rather than the
663 SLP_TREE_REPRESENTATIVE to match previous behavior.
665 2020-06-05 Felix Yang <felix.yang@huawei.com>
668 * expr.c (emit_move_insn): Check src and dest of the copy to see
669 if one or both of them are subregs, try to remove the subregs when
670 innermode and outermode are equal in size and the mode change involves
671 an implicit round trip through memory.
673 2020-06-05 Jakub Jelinek <jakub@redhat.com>
676 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
677 define_insn_and_split patterns.
678 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
679 define_insn patterns.
681 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
683 * alloc-pool.h (object_allocator::remove_raw): New.
684 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
685 (occurrence::occurrence): Add.
686 (occurrence::~occurrence): Likewise.
687 (occurrence::new): Likewise.
688 (occurrence::delete): Likewise.
690 (insert_bb): Use new occurence (...) instead of occ_new.
691 (register_division_in): Likewise.
692 (free_bb): Use delete occ instead of manually removing
695 2020-06-05 Richard Biener <rguenther@suse.de>
698 * cfgexpand.c (expand_debug_expr): Avoid calling
699 set_mem_attributes_minus_bitpos when we were expanding
701 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
702 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
703 special-cases we do not want MEM_EXPRs for. Assert
704 we end up with reasonable MEM_EXPRs.
706 2020-06-05 Lili Cui <lili.cui@intel.com>
709 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
711 2020-06-04 Martin Sebor <msebor@redhat.com>
715 * attribs.c (init_attr_rdwr_indices): Move function here.
716 * attribs.h (rdwr_access_hash, rdwr_map): Define.
717 (attr_access): Add 'none'.
718 (init_attr_rdwr_indices): Declared function.
719 * builtins.c (warn_for_access)): New function.
720 (check_access): Call it.
721 * builtins.h (checK-access): Add an optional argument.
722 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
723 (init_attr_rdwr_indices): Declare extern.
724 (append_attrname): Handle attr_access::none.
725 (maybe_warn_rdwr_sizes): Same.
726 (initialize_argument_information): Update comments.
727 * doc/extend.texi (attribute access): Document 'none'.
728 * tree-ssa-uninit.c (struct wlimits): New.
729 (maybe_warn_operand): New function.
730 (maybe_warn_pass_by_reference): Same.
731 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
732 Also call for function calls.
733 (pass_late_warn_uninitialized::execute): Adjust comments.
734 (execute_early_warn_uninitialized): Same.
736 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
739 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
740 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
741 reload if the original insn has it too.
743 2020-06-04 Richard Biener <rguenther@suse.de>
745 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
746 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
748 2020-06-04 Martin Jambor <mjambor@suse.cz>
751 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
752 exceptions check to...
753 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
755 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
756 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
759 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
762 * config/arm/predicates.md (mve_scatter_memory): Define to
763 match (mem (reg)) for scatter store memory.
764 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
765 define_insn to define_expand.
766 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
767 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
768 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
769 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
770 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
771 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
772 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
773 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
774 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
775 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
776 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
777 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
778 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
779 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
780 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
781 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
782 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
783 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
784 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
785 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
786 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
788 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
789 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
790 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
791 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
792 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
793 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
794 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
795 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
796 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
797 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
798 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
799 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
800 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
801 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
802 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
803 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
804 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
805 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
806 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
807 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
809 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
811 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
813 (__arm_vbicq_n_s16): Likewise.
814 (__arm_vbicq_n_u32): Likewise.
815 (__arm_vbicq_n_s32): Likewise.
816 (__arm_vbicq): Modify polymorphic variant.
818 2020-06-04 Richard Biener <rguenther@suse.de>
820 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
821 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
822 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
823 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
824 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
826 (vect_get_slp_defs): ... here.
827 (vect_get_slp_vect_def): New function.
829 2020-06-04 Richard Biener <rguenther@suse.de>
831 * tree-vectorizer.h (_slp_tree::lanes): New.
832 (SLP_TREE_LANES): Likewise.
833 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
834 (vectorizable_reduction): Likewise.
835 (vect_transform_cycle_phi): Likewise.
836 (vectorizable_induction): Likewise.
837 (vectorizable_live_operation): Likewise.
838 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
839 (vect_create_new_slp_node): Likewise.
840 (slp_copy_subtree): Copy it.
841 (vect_optimize_slp): Use it.
842 (vect_slp_analyze_node_operations_1): Likewise.
843 (vect_slp_convert_to_external): Likewise.
844 (vect_bb_vectorization_profitable_p): Likewise.
845 * tree-vect-stmts.c (vectorizable_load): Likewise.
846 (get_vectype_for_scalar_type): Likewise.
848 2020-06-04 Richard Biener <rguenther@suse.de>
850 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
851 (vect_build_slp_tree_2): Simplify building all external op
853 (vect_slp_analyze_node_operations): Remove push/pop of
855 (vect_schedule_slp_instance): Likewise.
856 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
857 stmt_info, use the vect_is_simple_use overload combining
858 SLP and stmt_info analysis.
859 (vect_is_simple_cond): Likewise.
860 (vectorizable_store): Adjust.
861 (vectorizable_condition): Likewise.
862 (vect_is_simple_use): Fully handle invariant SLP nodes
863 here. Amend stmt_info operand extraction with COND_EXPR
865 * tree-vect-loop.c (vectorizable_reduction): Deal with
866 COND_EXPR representation ugliness.
868 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
871 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
872 Refine from *vcvtps2ph_store<mask_name>.
873 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
874 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
875 (*vcvtps2ph256<merge_mask_name>): New define_insn.
876 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
877 * config/i386/subst.md (merge_mask): New define_subst.
878 (merge_mask_name): New define_subst_attr.
879 (merge_mask_operand3): Ditto.
881 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
883 PR tree-optimization/89430
885 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
886 remove ssa_name_ver, store, offset fields.
887 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
888 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
889 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
892 2020-06-04 Andreas Schwab <schwab@suse.de>
895 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
897 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
899 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
900 (trunc<mode><pmov_dst_3_lower>2): Refine from
901 trunc<mode><pmov_dst_3>2.
903 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
905 * match.pd (tanh/sinh -> 1/cosh): New simplification.
907 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
910 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
911 is_lfs_stfs_insn and make it recognize lfs as well.
912 (prefixed_store_p): Use is_lfs_stfs_insn().
913 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
915 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
917 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
919 (odr_enums): New static var.
920 (struct odr_enum_val): New struct.
921 (class odr_enum): New struct.
922 (odr_enum_map): New hashtable.
923 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
924 (add_type_duplicate): Likewise.
925 (free_odr_warning_data): Do not free TYPE_VALUES.
926 (register_odr_enum): New function.
927 (ipa_odr_summary_write): New function.
928 (ipa_odr_read_section): New function.
929 (ipa_odr_summary_read): New function.
930 (class pass_ipa_odr): New pass.
931 (make_pass_ipa_odr): New function.
932 * ipa-utils.h (register_odr_enum): Declare.
933 * lto-section-in.c: (lto_section_name): Add odr_types section.
934 * lto-streamer.h (enum lto_section_type): Add odr_types section.
935 * passes.def: Add odr_types pass.
936 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
938 (hash_tree): Likewise.
939 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
941 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
943 * timevar.def (TV_IPA_ODR): New timervar.
944 * tree-pass.h (make_pass_ipa_odr): Declare.
945 * tree.c (free_lang_data_in_type): Regiser ODR types.
947 2020-06-03 Romain Naour <romain.naour@gmail.com>
949 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
952 2020-06-03 Richard Biener <rguenther@suse.de>
954 PR tree-optimization/95487
955 * tree-vect-stmts.c (vectorizable_store): Use a truth type
956 for the scatter mask.
958 2020-06-03 Richard Biener <rguenther@suse.de>
960 PR tree-optimization/95495
961 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
962 SLP_TREE_REPRESENTATIVE in the shift assertion.
964 2020-06-03 Tom Tromey <tromey@adacore.com>
966 * spellcheck.c (CASE_COST): New define.
967 (BASE_COST): New define.
968 (get_edit_distance): Recognize case changes.
969 (get_edit_distance_cutoff): Update.
970 (test_edit_distances): Update.
971 (get_old_cutoff): Update.
972 (test_find_closest_string): Add case sensitivity test.
974 2020-06-03 Richard Biener <rguenther@suse.de>
976 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
977 the cost vector to unset the visited flag on stmts.
979 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
981 * gimplify.c (omp_notice_variable): Use new hook.
982 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
983 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
984 (LANG_HOOKS_DECLS): Add it.
985 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
986 (lhd_omp_predetermined_mapping): New.
987 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
989 2020-06-03 Jan Hubicka <jh@suse.cz>
991 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
992 add LTO_first_tree_tag and LTO_first_gimple_tag.
993 (lto_tag_is_tree_code_p): Update.
994 (lto_tag_is_gimple_code_p): Update.
995 (lto_gimple_code_to_tag): Update.
996 (lto_tag_to_gimple_code): Update.
997 (lto_tree_code_to_tag): Update.
998 (lto_tag_to_tree_code): Update.
1000 2020-06-02 Felix Yang <felix.yang@huawei.com>
1003 * config/aarch64/aarch64.c (aarch64_short_vector_p):
1004 Leave later code to report an error if SVE is disabled.
1006 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1008 * config/aarch64/aarch64-cores.def (zeus): Define.
1009 * config/aarch64/aarch64-tune.md: Regenerate.
1010 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
1012 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
1015 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
1017 (is_stfs_insn): New helper function.
1019 2020-06-02 Jan Hubicka <jh@suse.cz>
1021 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
1023 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
1025 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
1027 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
1028 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
1029 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
1031 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
1034 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
1035 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
1037 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1039 * config/s390/s390.c (print_operand): Emit vector alignment
1042 2020-06-02 Martin Liska <mliska@suse.cz>
1044 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
1045 as they have variable number of counters.
1046 * gcov-dump.c (main): Add new option -r.
1047 (print_usage): Likewise.
1048 (tag_counters): All new raw format.
1049 * gcov-io.h (struct gcov_kvp): New.
1050 (GCOV_TOPN_VALUES): Remove.
1051 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
1052 (GCOV_TOPN_MEM_COUNTERS): New.
1053 (GCOV_TOPN_DISK_COUNTERS): Likewise.
1054 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
1055 * ipa-profile.c (ipa_profile_generate_summary): Use
1056 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
1057 (ipa_profile_write_edge_summary): Likewise.
1058 (ipa_profile_read_edge_summary): Likewise.
1059 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
1060 * profile.c (sort_hist_values): Sort variable number
1062 (compute_value_histograms): Special case for TOP N counters
1063 that have dynamic number of key-value pairs.
1064 * value-prof.c (dump_histogram_value): Dump variable number
1066 (stream_in_histogram_value): Stream in variable number
1067 of key-value pairs for TOP N counter.
1068 (get_nth_most_common_value): Deal with variable number
1070 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
1072 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
1074 * doc/gcov-dump.texi: Document new -r option.
1076 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
1079 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
1081 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
1083 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
1084 returns (const_int 0) for the destination, then emit nothing.
1086 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
1088 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
1089 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
1090 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
1091 LTO_const_decl_ref, LTO_imported_decl_ref,
1092 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
1093 LTO_namelist_decl_ref; add LTO_global_stream_ref.
1094 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
1095 (lto_input_scc): Update.
1096 (lto_input_tree_1): Update.
1097 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
1098 * lto-streamer.c (lto_tag_name): Update.
1100 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
1102 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
1103 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
1104 * lto-cgraph.c (lto_output_node): Likewise.
1105 (lto_output_varpool_node): Likewise.
1106 (output_offload_tables): Likewise.
1107 (input_node): Likewise.
1108 (input_varpool_node): Likewise.
1109 (input_offload_tables): Likewise.
1110 * lto-streamer-in.c (lto_input_tree_ref): Declare.
1111 (lto_input_var_decl_ref): Declare.
1112 (lto_input_fn_decl_ref): Declare.
1113 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
1114 (lto_output_var_decl_index): Rename to ..
1115 (lto_output_var_decl_ref): ... this.
1116 (lto_output_fn_decl_index): Rename to ...
1117 (lto_output_fn_decl_ref): ... this.
1118 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
1119 (DEFINE_DECL_STREAM_FUNCS): Remove.
1120 (lto_output_var_decl_index): Remove.
1121 (lto_output_fn_decl_index): Remove.
1122 (lto_output_var_decl_ref): Declare.
1123 (lto_output_fn_decl_ref): Declare.
1124 (lto_input_var_decl_ref): Declare.
1125 (lto_input_fn_decl_ref): Declare.
1127 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
1129 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
1130 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
1131 dump infomation if there is no adjusted parameter.
1132 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
1134 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1136 * Makefile.in (gimple-array-bounds.o): New.
1137 * tree-vrp.c: Move array bounds code...
1138 * gimple-array-bounds.cc: ...here...
1139 * gimple-array-bounds.h: ...and here.
1141 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1143 * Makefile.in (OBJS): Add value-range-equiv.o.
1144 * tree-vrp.c (*value_range_equiv*): Move to...
1145 * value-range-equiv.cc: ...here.
1146 * tree-vrp.h (class value_range_equiv): Move to...
1147 * value-range-equiv.h: ...here.
1148 * vr-values.h: Include value-range-equiv.h.
1150 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
1153 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
1154 lattice for simple pass-through by-ref argument.
1156 2020-05-31 Jeff Law <law@redhat.com>
1158 * lra.c (add_auto_inc_notes): Remove function.
1159 * reload1.c (add_auto_inc_notes): Similarly. Move into...
1160 * rtlanal.c (add_auto_inc_notes): New function.
1161 * rtl.h (add_auto_inc_notes): Add prototype.
1162 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
1165 2020-05-31 Jan Hubicka <jh@suse.cz>
1167 * lto-section-out.c (lto_output_decl_index): Remove.
1168 (lto_output_field_decl_index): Move to lto-streamer-out.c
1169 (lto_output_fn_decl_index): Move to lto-streamer-out.c
1170 (lto_output_namespace_decl_index): Remove.
1171 (lto_output_var_decl_index): Remove.
1172 (lto_output_type_decl_index): Remove.
1173 (lto_output_type_ref_index): Remove.
1174 * lto-streamer-out.c (output_type_ref): Remove.
1175 (lto_get_index): New function.
1176 (lto_output_tree_ref): Remove.
1177 (lto_indexable_tree_ref): New function.
1178 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
1179 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
1180 (stream_write_tree_ref): Update.
1181 (lto_output_tree): Update.
1182 * lto-streamer.h (lto_output_decl_index): Remove prototype.
1183 (lto_output_field_decl_index): Remove prototype.
1184 (lto_output_namespace_decl_index): Remove prototype.
1185 (lto_output_type_decl_index): Remove prototype.
1186 (lto_output_type_ref_index): Remove prototype.
1187 (lto_output_var_decl_index): Move.
1188 (lto_output_fn_decl_index): Move
1190 2020-05-31 Jakub Jelinek <jakub@redhat.com>
1193 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
1196 2020-05-31 Jeff Law <law@redhat.com>
1198 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
1200 2020-05-31 Jim Wilson <jimw@sifive.com>
1202 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
1204 2020-05-30 Jonathan Yong <10walls@gmail.com>
1206 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
1207 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
1208 import library, but also contains some functions that invoke
1209 others in KERNEL32.DLL.
1211 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
1213 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
1214 (altivec_vmrglw_direct): Ditto.
1215 (altivec_vperm_<mode>_direct): Ditto.
1216 (altivec_vperm_v8hiv16qi): Ditto.
1217 (*altivec_vperm_<mode>_uns_internal): Ditto.
1218 (*altivec_vpermr_<mode>_internal): Ditto.
1219 (vperm_v8hiv4si): Ditto.
1220 (vperm_v16qiv8hi): Ditto.
1222 2020-05-29 Jan Hubicka <jh@suse.cz>
1224 * lto-streamer-in.c (streamer_read_chain): Move here from
1226 (stream_read_tree_ref): New.
1227 (lto_input_tree_1): Simplify.
1228 * lto-streamer-out.c (stream_write_tree_ref): New.
1229 (lto_write_tree_1): Simplify.
1230 (lto_output_tree_1): Simplify.
1231 (DFS::DFS_write_tree): Simplify.
1232 (streamer_write_chain): Move here from tree-stremaer-out.c.
1233 * lto-streamer.h (lto_output_tree_ref): Update prototype.
1234 (stream_read_tree_ref): Declare
1235 (stream_write_tree_ref): Declare
1236 * tree-streamer-in.c (streamer_read_chain): Update to use
1237 stream_read_tree_ref.
1238 (lto_input_ts_common_tree_pointers): Likewise.
1239 (lto_input_ts_vector_tree_pointers): Likewise.
1240 (lto_input_ts_poly_tree_pointers): Likewise.
1241 (lto_input_ts_complex_tree_pointers): Likewise.
1242 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
1243 (lto_input_ts_decl_common_tree_pointers): Likewise.
1244 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
1245 (lto_input_ts_field_decl_tree_pointers): Likewise.
1246 (lto_input_ts_function_decl_tree_pointers): Likewise.
1247 (lto_input_ts_type_common_tree_pointers): Likewise.
1248 (lto_input_ts_type_non_common_tree_pointers): Likewise.
1249 (lto_input_ts_list_tree_pointers): Likewise.
1250 (lto_input_ts_vec_tree_pointers): Likewise.
1251 (lto_input_ts_exp_tree_pointers): Likewise.
1252 (lto_input_ts_block_tree_pointers): Likewise.
1253 (lto_input_ts_binfo_tree_pointers): Likewise.
1254 (lto_input_ts_constructor_tree_pointers): Likewise.
1255 (lto_input_ts_omp_clause_tree_pointers): Likewise.
1256 * tree-streamer-out.c (streamer_write_chain): Update to use
1257 stream_write_tree_ref.
1258 (write_ts_common_tree_pointers): Likewise.
1259 (write_ts_vector_tree_pointers): Likewise.
1260 (write_ts_poly_tree_pointers): Likewise.
1261 (write_ts_complex_tree_pointers): Likewise.
1262 (write_ts_decl_minimal_tree_pointers): Likewise.
1263 (write_ts_decl_common_tree_pointers): Likewise.
1264 (write_ts_decl_non_common_tree_pointers): Likewise.
1265 (write_ts_decl_with_vis_tree_pointers): Likewise.
1266 (write_ts_field_decl_tree_pointers): Likewise.
1267 (write_ts_function_decl_tree_pointers): Likewise.
1268 (write_ts_type_common_tree_pointers): Likewise.
1269 (write_ts_type_non_common_tree_pointers): Likewise.
1270 (write_ts_list_tree_pointers): Likewise.
1271 (write_ts_vec_tree_pointers): Likewise.
1272 (write_ts_exp_tree_pointers): Likewise.
1273 (write_ts_block_tree_pointers): Likewise.
1274 (write_ts_binfo_tree_pointers): Likewise.
1275 (write_ts_constructor_tree_pointers): Likewise.
1276 (write_ts_omp_clause_tree_pointers): Likewise.
1277 (streamer_write_tree_body): Likewise.
1278 (streamer_write_integer_cst): Likewise.
1279 * tree-streamer.h (streamer_read_chain):Declare.
1280 (streamer_write_chain):Declare.
1281 (streamer_write_tree_body): Update prototype.
1282 (streamer_write_integer_cst): Update prototype.
1284 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
1287 * configure: Regenerated.
1289 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
1291 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
1292 (add<mode>3_vcc_zext_dup_exec): Likewise.
1293 (add<mode>3_vcc_zext_dup2): Likewise.
1294 (add<mode>3_vcc_zext_dup2_exec): Likewise.
1296 2020-05-29 Richard Biener <rguenther@suse.de>
1298 PR tree-optimization/95272
1299 * tree-vectorizer.h (_slp_tree::representative): Add.
1300 (SLP_TREE_REPRESENTATIVE): Likewise.
1301 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
1303 (vectorizable_live_operation): Use the representative to
1304 attach the reduction info to.
1305 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
1306 SLP_TREE_REPRESENTATIVE.
1307 (vect_create_new_slp_node): Likewise.
1308 (slp_copy_subtree): Copy it.
1309 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
1310 (vect_slp_analyze_node_operations_1): Pass the representative
1311 to vect_analyze_stmt.
1312 (vect_schedule_slp_instance): Pass the representative to
1313 vect_transform_stmt.
1315 2020-05-29 Richard Biener <rguenther@suse.de>
1317 PR tree-optimization/95356
1318 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
1319 node hacking during analysis.
1321 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
1324 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
1326 2020-05-29 Richard Biener <rguenther@suse.de>
1328 PR tree-optimization/95403
1329 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
1332 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1335 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
1336 declare variant cgraph node removal callback.
1338 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1341 * expr.c (store_expr): If expr_size is constant and significantly
1342 larger than TREE_STRING_LENGTH, set temp to just the
1343 TREE_STRING_LENGTH portion of the STRING_CST.
1345 2020-05-29 Richard Biener <rguenther@suse.de>
1347 PR tree-optimization/95393
1348 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
1349 to build the min/max expression so we simplify cases like
1350 MAX(0, s) immediately.
1352 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
1354 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
1355 for unpacked EOR, ORR, AND.
1357 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
1359 * Makefile.in: don't look for libiberty in the "pic" subdirectory
1360 when building for Mingw. Add dependency on xgcc with the proper
1363 2020-05-28 Jeff Law <law@redhat.com>
1365 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
1367 2020-05-28 Jeff Law <law@redhat.com>
1369 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
1370 make a nonzero adjustment to the memory offset.
1371 (b<ior,xor>hi_msx): Turn into a splitter.
1373 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
1375 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
1376 Fix off-by-one error.
1378 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1380 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
1381 wb_candidate1 and wb_candidate2.
1382 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
1383 wb_candidate1 and wb_candidate2 if we decided not to use them.
1385 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1388 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
1389 we have at least some CFI operations when using a frame pointer.
1390 Only redefine the CFA if we have CFI operations.
1392 2020-05-28 Richard Biener <rguenther@suse.de>
1394 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
1395 case for !SLP_TREE_VECTYPE.
1396 (vect_slp_analyze_node_operations): Adjust.
1398 2020-05-28 Richard Biener <rguenther@suse.de>
1400 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
1401 (SLP_TREE_VEC_DEFS): Likewise.
1402 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
1403 (_slp_tree::~_slp_tree): Likewise.
1404 (vect_mask_constant_operand_p): Remove unused function.
1405 (vect_get_constant_vectors): Rename to...
1406 (vect_create_constant_vectors): ... this. Take the
1407 invariant node as argument and code generate it. Remove
1408 dead code, remove temporary asserts. Pass a NULL stmt_info
1409 to vect_init_vector.
1410 (vect_get_slp_defs): Simplify.
1411 (vect_schedule_slp_instance): Code-generate externals and
1412 invariants using vect_create_constant_vectors.
1414 2020-05-28 Richard Biener <rguenther@suse.de>
1416 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
1417 Conditionalize stmt_info use, assert the new stmt cannot throw
1419 (vect_finish_stmt_generation): Adjust assert.
1421 2020-05-28 Richard Biener <rguenther@suse.de>
1423 PR tree-optimization/95273
1424 PR tree-optimization/95356
1425 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
1426 what we set the vector type of the shift operand SLP node
1429 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
1431 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
1434 2020-05-28 Martin Liska <mliska@suse.cz>
1437 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
1438 rename ipcp-unit-growth to ipa-cp-unit-growth.
1440 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
1442 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
1443 from *avx512vl_<code>v2div2qi_store and refine memory size of
1445 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
1446 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
1447 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
1448 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
1449 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
1450 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
1451 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
1452 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
1453 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
1454 (*avx512vl_<code>v2div2si2_store_1): Ditto.
1455 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
1456 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1457 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1458 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
1459 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
1460 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
1461 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
1462 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
1463 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
1464 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
1465 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
1466 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
1467 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
1468 (*avx512vl_<code>v2div2si2_store_2): Ditto.
1469 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
1470 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1471 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1472 * config/i386/i386-builtin-types.def: Adjust builtin type.
1473 * config/i386/i386-expand.c: Ditto.
1474 * config/i386/i386-builtin.def: Adjust builtin.
1475 * config/i386/avx512fintrin.h: Ditto.
1476 * config/i386/avx512vlbwintrin.h: Ditto.
1477 * config/i386/avx512vlintrin.h: Ditto.
1479 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
1481 PR gcov-profile/95332
1482 * gcov-io.c (gcov_var::endian): Move field.
1483 (from_file): Add IN_GCOV_TOOL check.
1484 * gcov-io.h (gcov_magic): Ditto.
1486 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
1488 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
1490 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
1492 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
1494 * builtin-types.def (BT_UINT128): New primitive type.
1495 (BT_FN_UINT128_UINT128): New function type.
1496 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
1497 * doc/extend.texi (__builtin_bswap128): Document it.
1498 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
1499 (is_inexpensive_builtin): Likewise.
1500 * fold-const-call.c (fold_const_call_ss): Likewise.
1501 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
1502 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
1503 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
1504 (vectorizable_call): Likewise.
1505 * optabs.c (expand_unop): Always use the double word path for it.
1506 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
1507 * tree.h (uint128_type_node): New global type.
1508 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
1510 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1512 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
1513 (mmx_hsubv2sf3): Ditto.
1514 (mmx_haddsubv2sf3): New expander.
1515 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
1516 RTL template to model horizontal subtraction and addition.
1517 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
1520 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1523 * config/i386/sse.md
1524 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
1525 Remove %q operand modifier from insn template.
1526 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
1528 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
1530 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
1531 Enable insn pattern for TARGET_MMX_WITH_SSE.
1532 (*mmx_movshdup): New insn pattern.
1533 (*mmx_movsldup): Ditto.
1534 (*mmx_movss): Ditto.
1535 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
1537 (expand_vec_perm_movs): Handle E_V2SFmode.
1538 (expand_vec_perm_even_odd): Ditto.
1539 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
1540 is already handled by standard shuffle patterns.
1542 2020-05-27 Richard Biener <rguenther@suse.de>
1544 PR tree-optimization/95295
1545 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
1546 merging stores from paths.
1548 2020-05-27 Richard Biener <rguenther@suse.de>
1550 PR tree-optimization/95356
1551 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
1552 type for the shift operand.
1554 2020-05-27 Richard Biener <rguenther@suse.de>
1556 PR tree-optimization/95335
1557 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
1558 lvisited for nodes made external.
1560 2020-05-27 Richard Biener <rguenther@suse.de>
1562 * dump-context.h (debug_dump_context): New class.
1563 (dump_context): Make it friend.
1564 * dumpfile.c (debug_dump_context::debug_dump_context):
1566 (debug_dump_context::~debug_dump_context): Likewise.
1567 * tree-vect-slp.c: Include dump-context.h.
1568 (vect_print_slp_tree): Dump a single SLP node.
1569 (debug): New overload for slp_tree.
1570 (vect_print_slp_graph): Rename from vect_print_slp_tree and
1572 (vect_analyze_slp_instance): Adjust.
1574 2020-05-27 Jakub Jelinek <jakub@redhat.com>
1577 * omp-general.c (omp_declare_variant_remove_hook): New function.
1578 (omp_resolve_declare_variant): Always return base if it is already
1579 declare_variant_alt magic decl itself. Register
1580 omp_declare_variant_remove_hook as cgraph node removal hook.
1582 2020-05-27 Jeff Law <law@redhat.com>
1584 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
1585 for the primary input operand.
1586 (tstsi_variable_bit_qi): Similarly.
1588 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
1590 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
1592 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
1595 * ipa-utils.h (odr_type_p): Also permit calls with
1596 only flag_generate_offload set.
1598 2020-05-26 Alexandre Oliva <oliva@adacore.com>
1600 * gcc.c (validate_switches): Add braced parameter. Adjust all
1601 callers. Expected and skip trailing brace only if braced.
1602 Return after handling one atom otherwise.
1603 (DUMPS_OPTIONS): New.
1604 (cpp_debug_options): Define in terms of it.
1606 2020-05-26 Richard Biener <rguenther@suse.de>
1608 PR tree-optimization/95327
1609 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
1610 when we are not using a scalar shift.
1612 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
1614 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
1615 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
1616 Handle E_V2SImode and E_V4HImode.
1617 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
1618 Assert that E_V2SImode is already handled.
1619 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
1620 is already handled by standard shuffle patterns.
1622 2020-05-26 Jan Hubicka <jh@suse.cz>
1624 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
1627 2020-05-26 Jakub Jelinek <jakub@redhat.com>
1630 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
1631 * omp-general.h (find_combined_omp_for): Declare.
1632 * omp-general.c: Include tree-iterator.h.
1633 (find_combined_omp_for): New function, moved from gimplify.c.
1635 2020-05-26 Alexandre Oliva <oliva@adacore.com>
1637 * common.opt (aux_base_name): Define.
1638 (dumpbase, dumpdir): Mark as Driver options.
1639 (-dumpbase, -dumpdir): Likewise.
1640 (dumpbase-ext, -dumpbase-ext): New.
1641 (auxbase, auxbase-strip): Drop.
1642 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
1644 (-o): Introduce the notion of primary output, mention it
1645 influences auxiliary and dump output names as well, add
1647 (-save-temps): Adjust, move examples into -dump*.
1648 (-save-temps=cwd, -save-temps=obj): Likewise.
1649 (-fdump-final-insns): Adjust.
1650 * dwarf2out.c (gen_producer_string): Drop auxbase and
1651 auxbase_strip; add dumpbase_ext.
1652 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
1653 (save_temps_prefix, save_temps_length): Drop.
1654 (save_temps_overrides_dumpdir): New.
1655 (dumpdir, dumpbase, dumpbase_ext): New.
1656 (dumpdir_length, dumpdir_trailing_dash_added): New.
1657 (outbase, outbase_length): New.
1658 (The Specs Language): Introduce %". Adjust %b and %B.
1659 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
1660 Precede object file with %w when it's the primary output.
1661 (cpp_debug_options): Do not pass on incoming -dumpdir,
1662 -dumpbase and -dumpbase-ext options; recompute them with
1664 (cc1_options): Drop auxbase with and without compare-debug;
1665 use cpp_debug_options instead of dumpbase. Mark asm output
1666 with %w when it's the primary output.
1667 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
1668 %:replace-exception. Add %:dumps.
1669 (driver_handle_option): Implement -save-temps=*/-dumpdir
1670 mutual overriding logic. Save dumpdir, dumpbase and
1671 dumpbase-ext options. Do not save output_file in
1673 (adds_single_suffix_p): New.
1674 (single_input_file_index): New.
1675 (process_command): Combine output dir, output base name, and
1676 dumpbase into dumpdir and outbase.
1677 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
1678 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
1679 and outbase instead of input_basename in %b, %B and in
1680 -save-temps aux files. Handle empty argument %".
1681 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
1682 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
1683 naming. Spec-quote the computed -fdump-final-insns file name.
1684 (debug_auxbase_opt): Drop.
1685 (compare_debug_self_opt_spec_function): Drop auxbase-strip
1687 (compare_debug_auxbase_opt_spec_function): Drop.
1688 (not_actual_file_p): New.
1689 (replace_extension_spec_func): Drop.
1690 (dumps_spec_func): New.
1691 (convert_white_space): Split-out parts into...
1692 (quote_string, whitespace_to_convert_p): ... these. New.
1693 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
1694 (driver::finalize): Release and reset new variables; drop
1696 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
1697 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
1698 empty string otherwise.
1699 (DUMPBASE_SUFFIX): Drop leading period.
1700 (debug_objcopy): Use concat.
1701 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
1702 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
1703 component. Simplify temp file names.
1704 * opts.c (finish_options): Drop aux base name handling.
1705 (common_handle_option): Drop auxbase-strip handling.
1706 * toplev.c (print_switch_values): Drop auxbase, add
1708 (process_options): Derive aux_base_name from dump_base_name
1710 (lang_dependent_init): Compute dump_base_ext along with
1711 dump_base_name. Disable stack usage and callgraph-info during
1712 lto generation and compare-debug recompilation.
1714 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
1715 Uroš Bizjak <ubizjak@gmail.com>
1719 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
1720 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
1721 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
1722 float<floatunssuffix>v2div2sf2.
1723 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
1724 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
1725 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
1726 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
1727 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
1728 * config/i386/i386-builtin.def: Ditto.
1729 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
1730 subregs when both omode and imode are vector mode and
1731 have the same inner mode.
1733 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
1735 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
1736 Only turn MEM_REFs into bit-field stores for small bit-field regions.
1737 (imm_store_chain_info::output_merged_store): Be prepared for sources
1738 with non-integral type in the bit-field insertion case.
1739 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
1740 the largest size for the bit-field case.
1742 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
1744 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
1745 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
1746 (*vec_dupv4hi): Redefine as define_insn.
1747 Remove alternative with general register input.
1748 (*vec_dupv2si): Ditto.
1750 2020-05-25 Richard Biener <rguenther@suse.de>
1752 PR tree-optimization/95309
1753 * tree-vect-slp.c (vect_get_constant_vectors): Move number
1754 of vector computation ...
1755 (vect_slp_analyze_node_operations): ... to analysis phase.
1757 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
1759 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
1760 * lto-streamer.h (streamer_debugging): New constant
1761 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
1762 streamer_debugging check.
1763 (streamer_get_pickled_tree): Likewise.
1764 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
1766 2020-05-25 Richard Biener <rguenther@suse.de>
1768 PR tree-optimization/95308
1769 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
1770 test for TARGET_MEM_REFs.
1772 2020-05-25 Richard Biener <rguenther@suse.de>
1774 PR tree-optimization/95295
1775 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
1776 RHSes and drop to full sm_other if they are not equal.
1778 2020-05-25 Richard Biener <rguenther@suse.de>
1780 PR tree-optimization/95271
1781 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
1782 children vector type.
1783 (vectorizable_call): Pass down slp ops.
1785 2020-05-25 Richard Biener <rguenther@suse.de>
1787 PR tree-optimization/95297
1788 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
1789 skip updating operand 1 vector type.
1791 2020-05-25 Richard Biener <rguenther@suse.de>
1793 PR tree-optimization/95284
1794 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
1797 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
1800 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
1801 (trunc<mode><sf2dfmode_lower>2) New expander.
1802 (extend<sf2dfmode_lower><mode>2): Ditto.
1804 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
1806 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
1807 ubsan_{data,type},ASAN symbols linker-visible.
1809 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1811 * lto-streamer-out.c (DFS::DFS): Silence warning.
1813 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
1816 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
1817 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
1819 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1821 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
1824 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1826 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
1827 * lto-streamer-out.c (create_output_block): Fix whitespace
1828 (lto_write_tree_1): Add (debug) dump.
1829 (DFS::DFS): Add dump.
1830 (DFS::DFS_write_tree_body): Do not dump here.
1831 (lto_output_tree): Improve dumping; do not stream ref when not needed.
1832 (produce_asm_for_decls): Fix whitespace.
1833 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
1834 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
1836 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
1839 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
1840 (truncv32hiv32qi2): Ditto.
1841 (trunc<ssedoublemodelower><mode>2): Ditto.
1842 (trunc<mode><pmov_dst_3>2): Ditto.
1843 (trunc<mode><pmov_dst_mode_4>2): Ditto.
1844 (truncv2div2si2): Ditto.
1845 (truncv8div8qi2): Ditto.
1846 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
1847 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
1848 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
1849 *avx512vl_<code><mode>v<ssescalarnum>qi2.
1851 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
1854 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
1857 2020-05-22 Richard Biener <rguenther@suse.de>
1859 PR tree-optimization/95268
1860 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
1863 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1865 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
1868 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
1870 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
1871 (lto_input_scc): Optimize streaming of entry lengths.
1872 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
1873 (DFS::DFS): Optimize stremaing of entry lengths
1875 2020-05-22 Richard Biener <rguenther@suse.de>
1878 * doc/invoke.texi (flto): Document behavior of diagnostic
1881 2020-05-22 Richard Biener <rguenther@suse.de>
1883 * tree-vectorizer.h (vect_is_simple_use): New overload.
1884 (vect_maybe_update_slp_op_vectype): New.
1885 * tree-vect-stmts.c (vect_is_simple_use): New overload
1886 accessing operands of SLP vs. non-SLP operation transparently.
1887 (vect_maybe_update_slp_op_vectype): New function updating
1888 the possibly shared SLP operands vector type.
1889 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
1890 using the new vect_is_simple_use overload; update SLP invariant
1891 operand nodes vector type.
1892 (vectorizable_comparison): Likewise.
1893 (vectorizable_call): Likewise.
1894 (vectorizable_conversion): Likewise.
1895 (vectorizable_shift): Likewise.
1896 (vectorizable_store): Likewise.
1897 (vectorizable_condition): Likewise.
1898 (vectorizable_assignment): Likewise.
1899 * tree-vect-loop.c (vectorizable_reduction): Likewise.
1900 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
1901 present SLP_TREE_VECTYPE and check it matches previous
1904 2020-05-22 Richard Biener <rguenther@suse.de>
1906 PR tree-optimization/95248
1907 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
1909 2020-05-22 Richard Biener <rguenther@suse.de>
1911 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
1912 (_slp_tree::~_slp_tree): Likewise.
1913 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
1915 (_slp_tree::~_slp_tree): Implement.
1916 (vect_free_slp_tree): Simplify.
1917 (vect_create_new_slp_node): Likewise. Add nops parameter.
1918 (vect_build_slp_tree_2): Adjust.
1919 (vect_analyze_slp_instance): Likewise.
1921 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1923 * adjust-alignment.c: Include memmodel.h.
1925 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
1928 * config/i386/cpuid.h: Use hexadecimal in comments.
1930 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
1933 * config/i386/i386-builtins.c (processor_features): Move
1934 F_AVX512VP2INTERSECT after F_AVX512BF16.
1935 (isa_names_table): Likewise.
1937 2020-05-21 Martin Liska <mliska@suse.cz>
1939 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
1940 Handle OPT_moutline_atomics.
1941 * config/aarch64/aarch64.c: Add outline-atomics to
1943 * doc/extend.texi: Document the newly added target attribute.
1945 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
1949 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
1950 operands 1 and 2 commutative. Manually swap operands.
1951 (*mmx_nabsv2sf2): Ditto.
1954 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
1956 * config/i386/i386.md (*<code>tf2_1):
1957 Mark operands 1 and 2 commutative.
1958 (*nabstf2_1): Ditto.
1959 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
1960 commutative. Do not swap operands.
1961 (*nabs<mode>2): Ditto.
1963 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
1966 * config/i386/sse.md (<code>v8qiv8hi2): Use
1967 simplify_gen_subreg instead of simplify_subreg.
1968 (<code>v8qiv8si2): Ditto.
1969 (<code>v4qiv4si2): Ditto.
1970 (<code>v4hiv4si2): Ditto.
1971 (<code>v8qiv8di2): Ditto.
1972 (<code>v4qiv4di2): Ditto.
1973 (<code>v2qiv2di2): Ditto.
1974 (<code>v4hiv4di2): Ditto.
1975 (<code>v2hiv2di2): Ditto.
1976 (<code>v2siv2di2): Ditto.
1978 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
1981 * config/i386/i386.md (*pushsi2_rex64):
1982 Use "e" constraint instead of "i".
1984 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
1986 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
1987 (lto_input_tree_1): Strenghten sanity check.
1988 (lto_input_tree): Update call of lto_input_scc.
1989 * lto-streamer-out.c: Include ipa-utils.h
1990 (create_output_block): Initialize local_trees if merigng is going
1992 (destroy_output_block): Destroy local_trees.
1993 (DFS): Add max_local_entry.
1994 (local_tree_p): New function.
1995 (DFS::DFS): Initialize and maintain it.
1996 (DFS::DFS_write_tree): Decide on streaming format.
1997 (lto_output_tree): Stream inline singleton SCCs
1998 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
1999 (struct output_block): Add local_trees.
2000 (lto_input_scc): Update prototype.
2002 2020-05-20 Patrick Palka <ppalka@redhat.com>
2005 * hash-table.h (hash_table::find_with_hash): Move up the call to
2008 2020-05-20 Martin Liska <mliska@suse.cz>
2010 * lto-compress.c (lto_compression_zstd): Fill up
2011 num_compressed_il_bytes.
2012 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
2014 2020-05-20 Richard Biener <rguenther@suse.de>
2016 PR tree-optimization/95219
2017 * tree-vect-loop.c (vectorizable_induction): Reduce
2018 group_size before computing the number of required IVs.
2020 2020-05-20 Richard Biener <rguenther@suse.de>
2023 * tree-inline.c (remap_gimple_stmt): Revert adjusting
2024 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
2026 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2027 Andre Vieira <andre.simoesdiasvieira@arm.com>
2030 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
2032 (mve_vector_mem_operand): Likewise.
2033 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
2034 the load from memory to a core register is legitimate for give mode.
2035 (mve_vector_mem_operand): Define function.
2036 (arm_print_operand): Modify comment.
2037 (arm_mode_base_reg_class): Define.
2038 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
2039 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
2040 * config/arm/constraints.md (Ux): Likewise.
2042 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
2043 add support for missing Vector Store Register and Vector Load Register.
2044 Add a new alternative to support load from memory to PC (or label) in
2046 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
2047 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
2048 mve_memory_operand and also modify the MVE instructions to emit.
2049 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
2050 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
2051 mve_memory_operand and also modify the MVE instructions to emit.
2052 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
2053 mve_memory_operand and also modify the MVE instructions to emit.
2054 (mve_vldrhq_z_fv8hf): Likewise.
2055 (mve_vldrhq_z_<supf><mode>): Likewise.
2056 (mve_vldrwq_fv4sf): Likewise.
2057 (mve_vldrwq_<supf>v4si): Likewise.
2058 (mve_vldrwq_z_fv4sf): Likewise.
2059 (mve_vldrwq_z_<supf>v4si): Likewise.
2060 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
2061 (mve_vld1q_<supf><mode>): Likewise.
2062 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
2064 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
2065 mve_memory_operand and also modify the MVE instructions to emit.
2066 (mve_vstrhq_p_<supf><mode>): Likewise.
2067 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
2069 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
2070 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
2071 instructions to emit.
2072 (mve_vstrwq_p_<supf>v4si): Likewise.
2073 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
2074 * config/arm/predicates.md (mve_memory_operand): Define.
2076 2020-05-30 Richard Biener <rguenther@suse.de>
2079 * c-fold.c (c_fully_fold_internal): Enhance guard on
2082 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
2085 * Makefile.in (OBJS): Add adjust-alignment.o.
2086 * adjust-alignment.c (pass_data_adjust_alignment): New.
2087 (pass_adjust_alignment): New.
2088 (pass_adjust_alignment::execute): New.
2089 (make_pass_adjust_alignment): New.
2090 * tree-pass.h (make_pass_adjust_alignment): New.
2091 * passes.def: Add pass_adjust_alignment.
2093 2020-05-19 Alex Coplan <alex.coplan@arm.com>
2096 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
2097 identity permutation.
2099 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2101 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
2102 msp430_small, msp430_large and size24plus DejaGNU effective
2104 Improve grammar in descriptions for size20plus and size32plus effective
2107 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
2109 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
2110 callee saved registers only in xBPF.
2111 (bpf_expand_prologue): Save callee saved registers only in xBPF.
2112 (bpf_expand_epilogue): Likewise for restoring.
2113 * doc/invoke.texi (eBPF Options): Document this is activated by
2116 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
2118 * config/bpf/bpf.opt (mxbpf): New option.
2119 * doc/invoke.texi (Option Summary): Add -mxbpf.
2120 (eBPF Options): Document -mxbbpf.
2122 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
2125 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
2126 (<code>v32qiv32hi2): Ditto.
2127 (<code>v8qiv8hi2): Ditto.
2128 (<code>v16qiv16si2): Ditto.
2129 (<code>v8qiv8si2): Ditto.
2130 (<code>v4qiv4si2): Ditto.
2131 (<code>v16hiv16si2): Ditto.
2132 (<code>v8hiv8si2): Ditto.
2133 (<code>v4hiv4si2): Ditto.
2134 (<code>v8qiv8di2): Ditto.
2135 (<code>v4qiv4di2): Ditto.
2136 (<code>v2qiv2di2): Ditto.
2137 (<code>v8hiv8di2): Ditto.
2138 (<code>v4hiv4di2): Ditto.
2139 (<code>v2hiv2di2): Ditto.
2140 (<code>v8siv8di2): Ditto.
2141 (<code>v4siv4di2): Ditto.
2142 (<code>v2siv2di2): Ditto.
2144 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2146 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
2147 (riscv_implied_info): New.
2148 (riscv_subset_list): Add handle_implied_ext.
2149 (riscv_subset_list::to_string): New parameter version_p to
2150 control output format.
2151 (riscv_subset_list::handle_implied_ext): New.
2152 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
2153 (riscv_arch_str): New parameter version_p to control output format.
2154 (riscv_expand_arch): New.
2155 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
2157 * config/riscv/riscv.h (riscv_expand_arch): New,
2158 (EXTRA_SPEC_FUNCTIONS): Define.
2159 (ASM_SPEC): Transform -march= via riscv_expand_arch.
2161 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2163 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
2164 parse_multiletter_ext.
2165 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
2166 adjust parsing order for 's' and 'x'.
2168 2020-05-19 Richard Biener <rguenther@suse.de>
2170 * tree-vectorizer.h (_slp_tree::vectype): Add field.
2171 (SLP_TREE_VECTYPE): New.
2172 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
2174 (vect_create_new_slp_node): Likewise.
2175 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
2177 (vect_slp_analyze_node_operations): Walk nodes children for
2179 (vect_get_constant_vectors): Use local scope op variable.
2180 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
2181 (vect_model_simple_cost): Adjust.
2182 (vect_model_store_cost): Likewise.
2183 (vectorizable_store): Likewise.
2185 2020-05-18 Martin Sebor <msebor@redhat.com>
2188 * tree-object-size.c (decl_init_size): New function.
2189 (addr_object_size): Call it.
2190 * tree.h (last_field): Declare.
2191 (first_field): Add attribute nonnull.
2193 2020-05-18 Martin Sebor <msebor@redhat.com>
2196 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
2197 * tree.c (component_ref_size): Correct the handling or array members
2199 Drop a pointless test.
2200 Rename a local variable.
2202 2020-05-18 Jason Merrill <jason@redhat.com>
2204 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
2205 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
2207 2020-05-14 Jason Merrill <jason@redhat.com>
2209 * doc/install.texi (Prerequisites): Update boostrap compiler
2210 requirement to C++11/GCC 4.8.
2212 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2214 PR tree-optimization/94952
2215 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
2216 Initialize variables bitpos, bitregion_start, and bitregion_end in
2217 order to silence warnings about use of uninitialized variables.
2219 2020-05-18 Carl Love <cel@us.ibm.com>
2222 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
2223 first_match_index_<mode>.
2224 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
2225 additional test cases with zero vector elements.
2227 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2230 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2231 Avoid reversing a non-trapping comparison to a trapping one.
2233 2020-05-18 Alex Coplan <alex.coplan@arm.com>
2235 * config/arm/arm.c (output_move_double): Fix codegen when loading into
2236 a register pair with an odd base register.
2238 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2240 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
2241 Do not emit FLAGS_REG clobber for TFmode.
2242 * config/i386/i386.md (*<code>tf2_1): Rewrite as
2243 define_insn_and_split. Mark operands 1 and 2 commutative.
2244 (*nabstf2_1): Ditto.
2245 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
2246 Do not swap memory operands. Simplify RTX generation.
2247 (neg abs SSE splitter): Ditto.
2248 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
2249 commutative. Do not swap operands. Simplify RTX generation.
2250 (*nabs<mode>2): Ditto.
2252 2020-05-18 Richard Biener <rguenther@suse.de>
2254 * tree-vect-slp.c (vect_slp_bb): Start after labels.
2255 (vect_get_constant_vectors): Really place init stmt after scalar defs.
2256 * tree-vect-stmts.c (vect_init_vector_1): Insert before
2259 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
2261 * config/i386/driver-i386.c (host_detect_local_cpu): Support
2262 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
2265 2020-05-18 Richard Biener <rguenther@suse.de>
2268 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
2269 when inlining into a non-call EH function.
2271 2020-05-18 Richard Biener <rguenther@suse.de>
2273 PR tree-optimization/95172
2274 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
2275 eventually need the conditional processing.
2276 (execute_sm_exit): When processing an orderd sequence
2277 avoid doing any conditional processing.
2278 (hoist_memory_references): Pass down whether all edges
2279 have ordered processing for a ref to execute_sm.
2281 2020-05-17 Jeff Law <law@redhat.com>
2283 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
2284 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
2285 into a single pattern using pc_or_label_operand.
2286 * config/h8300/combiner.md (bit branch patterns): Likewise.
2287 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
2289 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
2292 * config/i386/i386-features.c (has_non_address_hard_reg):
2294 (pseudo_reg_set): This. Return the SET expression. Ignore
2295 pseudo register push.
2296 (general_scalar_to_vector_candidate_p): Combine single_set and
2297 has_non_address_hard_reg calls to pseudo_reg_set.
2298 (timode_scalar_to_vector_candidate_p): Likewise.
2299 * config/i386/i386.md (*pushv1ti2): New pattern.
2301 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2304 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2306 * tree-vrp.c (operand_less_p): Move to...
2307 * vr-values.c (operand_less_p): ...here.
2308 * tree-vrp.h (operand_less_p): Remove.
2310 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2312 * tree-vrp.c (operand_less_p): Move to...
2313 * vr-values.c (operand_less_p): ...here.
2314 * tree-vrp.h (operand_less_p): Remove.
2316 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2318 * tree-vrp.c (class vrp_insert): Remove prototype for
2321 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2323 * tree-vrp.c (class live_names): New.
2324 (live_on_edge): Move into live_names.
2325 (build_assert_expr_for): Move into vrp_insert.
2326 (find_assert_locations_in_bb): Rename from
2327 find_assert_locations_1.
2328 (process_assert_insertions_for): Move into vrp_insert.
2329 (compare_assert_loc): Same.
2330 (remove_range_assertions): Same.
2331 (dump_asserts_for): Rename to vrp_insert::dump.
2332 (debug_asserts_for): Rename to vrp_insert::debug.
2333 (dump_all_asserts): Rename to vrp_insert::dump.
2334 (debug_all_asserts): Rename to vrp_insert::debug.
2336 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2338 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
2339 check_array_ref, check_mem_ref, and search_for_addr_array
2341 (class array_bounds_checker): ...here.
2342 (class check_array_bounds_dom_walker): Adjust to use
2343 array_bounds_checker.
2344 (check_all_array_refs): Move into array_bounds_checker and rename
2346 (class vrp_folder): Make fold_predicate_in private.
2348 2020-05-15 Jeff Law <law@redhat.com>
2350 * config/h8300/h8300.md (SFI iterator): New iterator for
2352 * config/h8300/peepholes.md (memory comparison): Use mode
2353 iterator to consolidate 3 patterns into one.
2354 (stack allocation and stack store): Handle SFmode. Handle
2357 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
2359 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
2360 RS6000_BTM_POWERPC64.
2362 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2364 * config/i386/i386.md (SWI48DWI): New mode iterator.
2365 (*push<mode>2): Allow XMM registers.
2366 (*pushdi2_rex64): Ditto.
2367 (*pushsi2_rex64): Ditto.
2369 (push XMM reg splitter): New splitter
2371 (*pushdf) Change "x" operand constraint to "v".
2372 (*pushsf_rex64): Ditto.
2375 2020-05-15 Richard Biener <rguenther@suse.de>
2377 PR tree-optimization/92260
2378 * tree-vect-slp.c (vect_get_constant_vectors): Compute
2379 the number of vector stmts in a canonical way.
2381 2020-05-15 Martin Liska <mliska@suse.cz>
2383 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
2386 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
2388 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
2390 2020-05-15 Richard Biener <rguenther@suse.de>
2392 PR tree-optimization/95133
2393 * gimple-ssa-split-paths.c
2394 (find_block_to_duplicate_for_splitting_paths): Check for
2397 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
2399 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
2401 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
2403 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
2406 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
2407 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
2410 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2413 * config/i386/i386.md (isa): Add sse3_noavx.
2414 (enabled): Handle sse3_noavx.
2416 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
2417 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
2418 alternatives. Match commutative vec_select selector operands.
2419 (*mmx_haddv2sf3_low): New insn pattern.
2421 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
2422 (*mmx_hsubv2sf3_low): New insn pattern.
2424 2020-05-15 Richard Biener <rguenther@suse.de>
2426 PR tree-optimization/33315
2427 * tree-ssa-sink.c: Include tree-eh.h.
2428 (sink_stats): Add commoned member.
2429 (sink_common_stores_to_bb): New function implementing store
2430 commoning by sinking to the successor.
2431 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
2432 (pass_sink_code::execute): Likewise. Record commoned stores
2435 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
2437 PR rtl-optimization/37451, part of PR target/61837
2438 * loop-doloop.c (doloop_simplify_count): New function. Simplify
2439 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
2440 (doloop_modify): Call doloop_simplify_count.
2442 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2445 * doc/sourcebuild.texi: Document effective target lgccjit.
2447 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
2449 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
2450 define_expand, and rename the original to ...
2451 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
2452 (add<mode>3_zext_dup_exec): Likewise, with ...
2453 (add<mode>3_vcc_zext_dup_exec): ... this.
2454 (add<mode>3_zext_dup2): Likewise, with ...
2455 (add<mode>3_zext_dup_exec): ... this.
2456 (add<mode>3_zext_dup2_exec): Likewise, with ...
2457 (add<mode>3_zext_dup2): ... this.
2458 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
2459 addv64di3_zext* calls to use addv64di3_vcc_zext*.
2461 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2464 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
2465 (extendv2sfv2df2): Ditto.
2467 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2469 * configure: Regenerated.
2471 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2473 * config/arm/arm.c (reg_needs_saving_p): New function.
2474 (use_return_insn): Use reg_needs_saving_p.
2475 (arm_get_vfp_saved_size): Likewise.
2476 (arm_compute_frame_layout): Likewise.
2477 (arm_save_coproc_regs): Likewise.
2478 (thumb1_expand_epilogue): Likewise.
2479 (arm_expand_epilogue_apcs_frame): Likewise.
2480 (arm_expand_epilogue): Likewise.
2482 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2484 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
2486 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2489 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
2491 (floatv2siv2df2): New expander.
2492 (floatunsv2siv2df2): New insn pattern.
2494 (fix_truncv2dfv2si2): New expander.
2495 (fixuns_truncv2dfv2si2): New insn pattern.
2497 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
2500 * config/aarch64/aarch64-sve-builtins.cc
2501 (handle_arm_sve_vector_bits_attribute): Create a copy of the
2502 original type's TYPE_MAIN_VARIANT, then reapply all the differences
2503 between the original type and its main variant.
2505 2020-05-14 Richard Biener <rguenther@suse.de>
2508 * real.c (real_to_decimal_for_mode): Make sure we handle
2509 a zero with nonzero exponent.
2511 2020-05-14 Jakub Jelinek <jakub@redhat.com>
2513 * Makefile.in (GTFILES): Add omp-general.c.
2514 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
2515 calls_declare_variant_alt members and initialize them in the
2517 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
2518 calls to declare_variant_alt nodes.
2519 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
2520 and calls_declare_variant_alt.
2521 (input_overwrite_node): Read them back.
2522 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
2524 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
2526 (tree_function_versioning): Copy calls_declare_variant_alt bit.
2527 * omp-offload.c (execute_omp_device_lower): Call
2528 omp_resolve_declare_variant on direct function calls.
2529 (pass_omp_device_lower::gate): Also enable for
2530 calls_declare_variant_alt functions.
2531 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
2532 (omp_context_selector_matches): Handle the case when
2533 cfun->curr_properties has PROP_gimple_any bit set.
2534 (struct omp_declare_variant_entry): New type.
2535 (struct omp_declare_variant_base_entry): New type.
2536 (struct omp_declare_variant_hasher): New type.
2537 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
2539 (omp_declare_variants): New variable.
2540 (struct omp_declare_variant_alt_hasher): New type.
2541 (omp_declare_variant_alt_hasher::hash,
2542 omp_declare_variant_alt_hasher::equal): New methods.
2543 (omp_declare_variant_alt): New variables.
2544 (omp_resolve_late_declare_variant): New function.
2545 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
2546 when called late. Create a magic declare_variant_alt fndecl and
2547 cgraph node and return that if decision needs to be deferred until
2548 after gimplification.
2549 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
2553 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
2554 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
2555 entry block if info->after_stmt is NULL, otherwise add after that stmt
2556 and update it after adding each stmt.
2557 (ipa_simd_modify_function_body): Initialize info.after_stmt.
2559 * function.h (struct function): Add has_omp_target bit.
2560 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
2562 (omp_discover_declare_target_tgt_fn_r): ... this.
2563 (omp_discover_declare_target_var_r): Call
2564 omp_discover_declare_target_tgt_fn_r instead of
2565 omp_discover_declare_target_fn_r.
2566 (omp_discover_implicit_declare_target): Also queue functions with
2567 has_omp_target bit set, for those walk with
2568 omp_discover_declare_target_fn_r, for declare target to functions
2569 walk with omp_discover_declare_target_tgt_fn_r.
2571 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2574 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
2575 Add SSE/AVX alternative. Change operand predicates from
2576 nonimmediate_operand to register_mmxmem_operand.
2577 Enable instruction pattern for TARGET_MMX_WITH_SSE.
2578 (fix_truncv2sfv2si2): New expander.
2579 (fixuns_truncv2sfv2si2): New insn pattern.
2581 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
2582 Add SSE/AVX alternative. Change operand predicates from
2583 nonimmediate_operand to register_mmxmem_operand.
2584 Enable instruction pattern for TARGET_MMX_WITH_SSE.
2585 (floatv2siv2sf2): New expander.
2586 (floatunsv2siv2sf2): New insn pattern.
2588 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
2590 (IX86_BUILTIN_PI2FD): Ditto.
2592 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2594 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
2596 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
2599 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2601 * config/s390/s390.c (allocate_stack_space): Add missing updates
2602 of last_probe_offset.
2604 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
2606 * config/s390/s390.md ("allocate_stack"): Call
2607 anti_adjust_stack_and_probe_stack_clash when stack clash
2608 protection is enabled.
2609 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
2610 prototype. Remove static.
2611 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
2614 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
2616 * config/rs6000/altivec.h (vec_extractl): New #define.
2617 (vec_extracth): Likewise.
2618 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
2619 (UNSPEC_EXTRACTR): Likewise.
2620 (vextractl<mode>): New expansion.
2621 (vextractl<mode>_internal): New insn.
2622 (vextractr<mode>): New expansion.
2623 (vextractr<mode>_internal): New insn.
2624 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
2625 New built-in function.
2626 (__builtin_altivec_vextduhvlx): Likewise.
2627 (__builtin_altivec_vextduwvlx): Likewise.
2628 (__builtin_altivec_vextddvlx): Likewise.
2629 (__builtin_altivec_vextdubvhx): Likewise.
2630 (__builtin_altivec_vextduhvhx): Likewise.
2631 (__builtin_altivec_vextduwvhx): Likewise.
2632 (__builtin_altivec_vextddvhx): Likewise.
2633 (__builtin_vec_extractl): New overloaded built-in function.
2634 (__builtin_vec_extracth): Likewise.
2635 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2636 Define overloaded forms of __builtin_vec_extractl and
2637 __builtin_vec_extracth.
2638 (builtin_function_type): Add cases to mark arguments of new
2639 built-in functions as unsigned.
2640 (rs6000_common_init_builtins): Add
2641 opaque_ftype_opaque_opaque_opaque_opaque.
2642 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
2643 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2644 for a Future Architecture): Add description of vec_extractl and
2645 vec_extractr built-in functions.
2647 2020-05-13 Richard Biener <rguenther@suse.de>
2649 * target.def (add_stmt_cost): Add new vectype parameter.
2650 * targhooks.c (default_add_stmt_cost): Adjust.
2651 * targhooks.h (default_add_stmt_cost): Likewise.
2652 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
2654 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
2655 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
2656 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
2658 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
2659 (dump_stmt_cost): Add new vectype parameter.
2660 (add_stmt_cost): Likewise.
2661 (record_stmt_cost): Likewise.
2662 (record_stmt_cost): Add overload with old signature.
2663 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
2665 (vect_get_known_peeling_cost): Likewise.
2666 (vect_estimate_min_profitable_iters): Likewise.
2667 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
2668 * tree-vect-stmts.c (record_stmt_cost): Likewise.
2669 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
2670 and pass down correct vectype and NULL stmt_info.
2671 (vect_model_simple_cost): Adjust.
2672 (vect_model_store_cost): Likewise.
2674 2020-05-13 Richard Biener <rguenther@suse.de>
2676 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
2677 (_slp_instance::group_size): Likewise.
2678 * tree-vect-loop.c (vectorizable_reduction): The group size
2679 is the number of lanes in the node.
2680 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
2681 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
2682 verify it matches the instance trees number of lanes.
2683 (vect_slp_analyze_node_operations_1): Use the numer of lanes
2684 in the node as group size.
2685 (vect_bb_vectorization_profitable_p): Use the instance root
2686 number of lanes for the size of life.
2687 (vect_schedule_slp_instance): Use the number of lanes as
2689 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
2690 parameter. Use the number of lanes of the load for the group
2691 size in the gap adjustment code.
2692 (vect_analyze_stmt): Adjust.
2693 (vect_transform_stmt): Likewise.
2695 2020-05-13 Jakub Jelinek <jakub@redhat.com>
2698 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
2699 if the last insn is a note.
2701 PR tree-optimization/95060
2702 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
2703 if it is the single use of the FMA internal builtin.
2705 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
2707 PR tree-optimization/94969
2708 * tree-data-dependence.c (constant_access_functions): Rename to...
2709 (invariant_access_functions): ...this. Add parameter. Check for
2710 invariant access function, rather than constant.
2711 (build_classic_dist_vector): Call above function.
2712 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
2714 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
2717 * doc/extend.texi (x86Operandmodifiers): Document more x86
2719 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
2721 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
2723 * tree-vrp.c (class vrp_insert): New.
2724 (insert_range_assertions): Move to class vrp_insert.
2725 (dump_all_asserts): Same as above.
2726 (dump_asserts_for): Same as above.
2727 (live): Same as above.
2728 (need_assert_for): Same as above.
2729 (live_on_edge): Same as above.
2730 (finish_register_edge_assert_for): Same as above.
2731 (find_switch_asserts): Same as above.
2732 (find_assert_locations): Same as above.
2733 (find_assert_locations_1): Same as above.
2734 (find_conditional_asserts): Same as above.
2735 (process_assert_insertions): Same as above.
2736 (register_new_assert_for): Same as above.
2737 (vrp_prop): New variable fun.
2738 (vrp_initialize): New parameter.
2739 (identify_jump_threads): Same as above.
2740 (execute_vrp): Same as above.
2743 2020-05-12 Keith Packard <keith.packard@sifive.com>
2745 * config/riscv/riscv.c (riscv_unique_section): New.
2746 (TARGET_ASM_UNIQUE_SECTION): New.
2748 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
2750 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
2751 * config/riscv/riscv-passes.def: New file.
2752 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
2753 * config/riscv/riscv-shorten-memrefs.c: New file.
2754 * config/riscv/riscv.c (tree-pass.h): New include.
2755 (riscv_compressed_reg_p): New Function
2756 (riscv_compressed_lw_offset_p): Likewise.
2757 (riscv_compressed_lw_address_p): Likewise.
2758 (riscv_shorten_lw_offset): Likewise.
2759 (riscv_legitimize_address): Attempt to convert base + large_offset
2760 to compressible new_base + small_offset.
2761 (riscv_address_cost): Make anticipated compressed load/stores
2762 cheaper for code size than uncompressed load/stores.
2763 (riscv_register_priority): Move compressed register check to
2764 riscv_compressed_reg_p.
2765 * config/riscv/riscv.h (C_S_BITS): Define.
2766 (CSW_MAX_OFFSET): Define.
2767 * config/riscv/riscv.opt (mshorten-memefs): New option.
2768 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
2769 (PASSES_EXTRA): Add riscv-passes.def.
2770 * doc/invoke.texi: Document -mshorten-memrefs.
2772 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
2773 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
2774 * doc/tm.texi: Regenerate.
2775 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
2776 * sched-deps.c (attempt_change): Use old address if it is cheaper than
2778 * target.def (new_address_profitable_p): New hook.
2779 * targhooks.c (default_new_address_profitable_p): New function.
2780 * targhooks.h (default_new_address_profitable_p): Declare.
2782 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2785 * config/i386/mmx.md (copysignv2sf3): New expander.
2786 (xorsignv2sf3): Ditto.
2787 (signbitv2sf3): Ditto.
2789 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2792 * config/i386/mmx.md (fmav2sf4): New insn pattern.
2797 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
2799 * Makefile.in (CET_HOST_FLAGS): New.
2800 (COMPILER): Add $(CET_HOST_FLAGS).
2801 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
2802 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
2804 * aclocal.m4: Regenerated.
2805 * configure: Likewise.
2807 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
2810 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
2811 (*mmx_<code>v2sf2): New insn_and_split pattern.
2812 (*mmx_nabsv2sf2): Ditto.
2813 (*mmx_andnotv2sf3): New insn pattern.
2814 (*mmx_<code>v2sf3): Ditto.
2815 * config/i386/i386.md (absneg_op): New code attribute.
2816 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
2817 (ix86_build_signbit_mask): Ditto.
2819 2020-05-12 Richard Biener <rguenther@suse.de>
2821 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
2824 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2826 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
2827 Update prototype to include "local" argument.
2828 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
2829 "local" argument. Handle local common decls.
2830 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
2831 msp430_output_aligned_decl_common call with 0 for "local" argument.
2832 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
2834 2020-05-12 Richard Biener <rguenther@suse.de>
2836 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
2838 2020-05-12 Martin Liska <mliska@suse.cz>
2842 * sanopt.c (sanitize_rewrite_addressable_params):
2843 Clear DECL_NOT_GIMPLE_REG_P for argument.
2845 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2847 PR tree-optimization/94980
2848 * tree-vect-generic.c (expand_vector_comparison): Use
2849 vector_element_bits_tree to get the element size in bits,
2850 rather than using TYPE_SIZE.
2851 (expand_vector_condition, vector_element): Likewise.
2853 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2855 PR tree-optimization/94980
2856 * tree-vect-generic.c (build_replicated_const): Take the number
2857 of bits as a parameter, instead of the type of the elements.
2858 (do_plus_minus): Update accordingly, using vector_element_bits
2859 to calculate the correct number of bits.
2860 (do_negate): Likewise.
2862 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
2864 PR tree-optimization/94980
2865 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
2866 * tree.c (vector_element_bits, vector_element_bits_tree): New.
2867 * match.pd: Use the new functions instead of determining the
2868 vector element size directly from TYPE_SIZE(_UNIT).
2869 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
2870 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
2871 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
2872 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
2873 (expand_vector_conversion): Likewise.
2874 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
2875 a divisor. Convert the dividend to bits to compensate.
2876 * tree-vect-loop.c (vectorizable_live_operation): Call
2877 vector_element_bits instead of open-coding it.
2879 2020-05-12 Jakub Jelinek <jakub@redhat.com>
2881 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
2882 * omp-offload.c: Include context.h.
2883 (omp_declare_target_fn_p, omp_declare_target_var_p,
2884 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
2885 omp_discover_implicit_declare_target): New functions.
2886 * cgraphunit.c (analyze_functions): Call
2887 omp_discover_implicit_declare_target.
2889 2020-05-12 Richard Biener <rguenther@suse.de>
2891 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
2892 literal constant &MEM[..] to a constant literal.
2894 2020-05-12 Richard Biener <rguenther@suse.de>
2896 PR tree-optimization/95045
2897 * dbgcnt.def (lim): Add debug-counter.
2898 * tree-ssa-loop-im.c: Include dbgcnt.h.
2899 (find_refs_for_sm): Use lim debug counter for store motion
2901 (do_store_motion): Rename form store_motion. Commit edge
2903 (store_motion_loop): ... here.
2904 (tree_ssa_lim): Adjust.
2906 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2908 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
2909 (vec_ctzm): Rename to vec_cnttzm.
2910 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
2911 Change fourth operand for vec_ternarylogic to require
2912 compatibility with unsigned SImode rather than unsigned QImode.
2913 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2914 Remove overloaded forms of vec_gnb that are no longer needed.
2915 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2916 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
2917 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
2918 vec_gnb; move vec_ternarylogic documentation into this section
2919 and replace const unsigned char with const unsigned int as its
2922 2020-05-11 Carl Love <cel@us.ibm.com>
2924 * config/rs6000/altivec.h (vec_genpcvm): New #define.
2925 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
2927 (XXGENPCVM_V8HI): Likewise.
2928 (XXGENPCVM_V4SI): Likewise.
2929 (XXGENPCVM_V2DI): Likewise.
2930 (XXGENPCVM): New overloaded built-in instantiation.
2931 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
2932 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
2933 (altivec_expand_builtin): Add special handling for
2934 FUTURE_BUILTIN_VEC_XXGENPCVM.
2935 (builtin_function_type): Add handling for
2936 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
2937 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
2938 (UNSPEC_XXGENPCV): New constant.
2939 (xxgenpcvm_<mode>_internal): New insn.
2940 (xxgenpcvm_<mode>): New expansion.
2941 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
2943 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
2945 * config/rs6000/altivec.h (vec_strir): New #define.
2946 (vec_stril): Likewise.
2947 (vec_strir_p): Likewise.
2948 (vec_stril_p): Likewise.
2949 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
2950 (UNSPEC_VSTRIL): Likewise.
2951 (vstrir_<mode>): New expansion.
2952 (vstrir_code_<mode>): New insn.
2953 (vstrir_p_<mode>): New expansion.
2954 (vstrir_p_code_<mode>): New insn.
2955 (vstril_<mode>): New expansion.
2956 (vstril_code_<mode>): New insn.
2957 (vstril_p_<mode>): New expansion.
2958 (vstril_p_code_<mode>): New insn.
2959 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
2960 New built-in function.
2961 (__builtin_altivec_vstrihr): Likewise.
2962 (__builtin_altivec_vstribl): Likewise.
2963 (__builtin_altivec_vstrihl): Likewise.
2964 (__builtin_altivec_vstribr_p): Likewise.
2965 (__builtin_altivec_vstrihr_p): Likewise.
2966 (__builtin_altivec_vstribl_p): Likewise.
2967 (__builtin_altivec_vstrihl_p): Likewise.
2968 (__builtin_vec_strir): New overloaded built-in function.
2969 (__builtin_vec_stril): Likewise.
2970 (__builtin_vec_strir_p): Likewise.
2971 (__builtin_vec_stril_p): Likewise.
2972 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
2973 Define overloaded forms of __builtin_vec_strir,
2974 __builtin_vec_stril, __builtin_vec_strir_p, and
2975 __builtin_vec_stril_p.
2976 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
2977 for a Future Architecture): Add description of vec_stril,
2978 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
2980 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
2982 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
2983 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
2985 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
2986 * config/rs6000/rs6000-builtin.def: Add handling of new macro
2988 (BU_FUTURE_V_4): New macro. Use it.
2989 (BU_FUTURE_OVERLOAD_4): Likewise.
2990 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
2991 handling for quaternary built-in functions.
2992 (altivec_resolve_overloaded_builtin): Add special-case handling
2993 for __builtin_vec_xxeval.
2994 * config/rs6000/rs6000-call.c: Add handling of new macro
2995 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
2996 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
2997 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
2998 (altivec_overloaded_builtins): Add definitions for
2999 FUTURE_BUILTIN_VEC_XXEVAL.
3000 (bdesc_4arg): New array.
3001 (htm_expand_builtin): Add handling for quaternary built-in
3003 (rs6000_expand_quaternop_builtin): New function.
3004 (rs6000_expand_builtin): Add handling for quaternary built-in
3006 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
3007 for unsigned QImode and unsigned HImode.
3008 (builtin_quaternary_function_type): New function.
3009 (rs6000_common_init_builtins): Add handling of quaternary
3011 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
3013 (RS6000_BTC_PREDICATE): Change value of constant.
3014 (RS6000_BTC_ABS): Likewise.
3015 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
3016 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
3017 for a Future Architecture): Add description of vec_ternarylogic
3020 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3022 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
3024 (__builtin_pextd): Likewise.
3025 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
3026 (UNSPEC_PEXTD): Likewise.
3029 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
3030 a Future Architecture): Add descriptions of __builtin_pdepd and
3031 __builtin_pextd functions.
3033 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3035 * config/rs6000/altivec.h (vec_clrl): New #define.
3036 (vec_clrr): Likewise.
3037 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
3038 (UNSPEC_VCLRRB): Likewise.
3041 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
3043 (__builtin_altivec_vclrrb): Likewise.
3044 (__builtin_vec_clrl): New overloaded built-in function.
3045 (__builtin_vec_clrr): Likewise.
3046 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3047 Define overloaded forms of __builtin_vec_clrl and
3049 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3050 for a Future Architecture): Add descriptions of vec_clrl and
3053 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3055 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
3056 built-in function definition.
3057 (__builtin_cnttzdm): Likewise.
3058 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
3059 (UNSPEC_CNTTZDM): Likewise.
3060 (cntlzdm): New insn.
3061 (cnttzdm): Likewise.
3062 * doc/extend.texi (Basic PowerPC Built-in Functions available for
3063 a Future Architecture): Add descriptions of __builtin_cntlzdm and
3064 __builtin_cnttzdm functions.
3066 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3069 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
3071 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3073 * config/rs6000/altivec.h (vec_cfuge): New #define.
3074 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
3075 (vcfuged): New insn.
3076 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
3077 New built-in function.
3078 * config/rs6000/rs6000-call.c (builtin_function_type): Add
3079 handling for FUTURE_BUILTIN_VCFUGED case.
3080 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3081 for a Future Architecture): Add description of vec_cfuge built-in
3084 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3086 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
3088 (BU_FUTURE_MISC_1): Likewise.
3089 (BU_FUTURE_MISC_2): Likewise.
3090 (BU_FUTURE_MISC_3): Likewise.
3091 (__builtin_cfuged): New built-in function definition.
3092 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
3094 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
3095 a Future Architecture): New subsubsection.
3097 2020-05-11 Richard Biener <rguenther@suse.de>
3099 PR tree-optimization/95049
3100 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
3101 between different constants.
3103 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
3105 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
3107 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3108 Bill Schmidt <wschmidt@linux.ibm.com>
3110 * config/rs6000/altivec.h (vec_gnb): New #define.
3111 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
3113 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
3115 (BU_FUTURE_OVERLOAD_2): Likewise.
3116 (BU_FUTURE_OVERLOAD_3): Likewise.
3117 (__builtin_altivec_gnb): New built-in function.
3118 (__buiiltin_vec_gnb): New overloaded built-in function.
3119 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3120 Define overloaded forms of __builtin_vec_gnb.
3121 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
3122 of __builtin_vec_gnb.
3123 (builtin_function_type): Mark return value and arguments unsigned
3124 for FUTURE_BUILTIN_VGNB.
3125 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3126 for a Future Architecture): Add description of vec_gnb built-in
3129 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3130 Bill Schmidt <wschmidt@linux.ibm.com>
3132 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
3134 (vec_pext): Likewise.
3135 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
3136 (UNSPEC_VPEXTD): Likewise.
3139 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
3141 (__builtin_altivec_vpextd): Likewise.
3142 * config/rs6000/rs6000-call.c (builtin_function_type): Add
3143 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
3145 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3146 for a Future Architecture): Add description of vec_pdep and
3147 vec_pext built-in functions.
3149 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3150 Bill Schmidt <wschmidt@linux.ibm.com>
3152 * config/rs6000/altivec.h (vec_clzm): New macro.
3153 (vec_ctzm): Likewise.
3154 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
3155 (UNSPEC_VCTZDM): Likewise.
3158 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
3159 (BU_FUTURE_V_1): Likewise.
3160 (BU_FUTURE_V_2): Likewise.
3161 (BU_FUTURE_V_3): Likewise.
3162 (__builtin_altivec_vclzdm): New builtin definition.
3163 (__builtin_altivec_vctzdm): Likewise.
3164 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
3165 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
3167 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
3168 value and parameter types to be unsigned for VCLZDM and VCTZDM.
3169 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
3170 support for TARGET_FUTURE flag.
3171 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
3172 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3173 for a Future Architecture): New subsubsection.
3175 2020-05-11 Richard Biener <rguenther@suse.de>
3177 PR tree-optimization/94988
3178 PR tree-optimization/95025
3179 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
3180 (sm_seq_push_down): Take extra parameter denoting where we
3182 (execute_sm_exit): Re-issue sm_other stores in the correct
3184 (sm_seq_valid_bb): When always executed, allow sm_other to
3185 prevail inbetween sm_ord and record their stored value.
3186 (hoist_memory_references): Adjust refs_not_supported propagation
3187 and prune sm_other from the end of the ordered sequences.
3189 2020-05-11 Felix Yang <felix.yang@huawei.com>
3192 * config/aarch64/aarch64.md (mov<mode>):
3193 Bitcasts to the equivalent integer mode using gen_lowpart
3194 instead of doing FAIL for scalar floating point move.
3196 2020-05-11 Alex Coplan <alex.coplan@arm.com>
3198 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
3199 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
3200 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
3201 (*csinv3_uxtw_insn2): New.
3202 (*csinv3_uxtw_insn3): New.
3203 * config/aarch64/iterators.md (neg_not_cs): New.
3205 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3208 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
3209 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
3210 (*mmx_addv2sf3): Ditto.
3211 (*mmx_subv2sf3): Ditto.
3212 (*mmx_mulv2sf3): Ditto.
3213 (*mmx_<code>v2sf3): Ditto.
3214 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3216 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3219 * config/i386/i386.c (ix86_vector_mode_supported_p):
3220 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
3221 * config/i386/mmx.md (*mov<mode>_internal): Do not set
3222 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
3224 (mmx_addv2sf3): Change operand predicates from
3225 nonimmediate_operand to register_mmxmem_operand.
3226 (addv2sf3): New expander.
3227 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
3228 predicates from nonimmediate_operand to register_mmxmem_operand.
3229 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3231 (mmx_subv2sf3): Change operand predicate from
3232 nonimmediate_operand to register_mmxmem_operand.
3233 (mmx_subrv2sf3): Ditto.
3234 (subv2sf3): New expander.
3235 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
3236 predicates from nonimmediate_operand to register_mmxmem_operand.
3237 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3239 (mmx_mulv2sf3): Change operand predicates from
3240 nonimmediate_operand to register_mmxmem_operand.
3241 (mulv2sf3): New expander.
3242 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
3243 predicates from nonimmediate_operand to register_mmxmem_operand.
3244 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3246 (mmx_<code>v2sf3): Change operand predicates from
3247 nonimmediate_operand to register_mmxmem_operand.
3248 (<code>v2sf3): New expander.
3249 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
3250 predicates from nonimmediate_operand to register_mmxmem_operand.
3251 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3252 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3254 2020-05-11 Martin Liska <mliska@suse.cz>
3257 * common.opt: Fix typo in option description.
3259 2020-05-11 Martin Liska <mliska@suse.cz>
3261 PR gcov-profile/94928
3262 * gcov-io.h: Add caveat about coverage format parsing and
3263 possible outdated documentation.
3265 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
3267 PR tree-optimization/83403
3268 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
3269 determine_value_range, Add fold conversion of MULT_EXPR, fix the
3272 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
3274 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
3275 __ILP32__ for 32-bit targets.
3277 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
3279 * tree.h (expr_align): Delete.
3280 * tree.c (expr_align): Likewise.
3282 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
3284 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
3285 from end_of_function_needs.
3287 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
3288 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
3290 * config/cris/t-elfmulti: Remove crisv32 multilib.
3291 * config/cris: Remove shared-library and CRIS v32 support.
3293 Move trivially from cc0 to reg:CC model, removing most optimizations.
3294 * config/cris/cris.md: Remove all side-effect patterns and their
3295 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
3296 to all but post-reload control-flow and movem insns. Remove
3297 constraints on all modified expanders. Remove obsoleted cc0-related
3299 (attr "cc"): Remove alternative "rev".
3300 (mode_iterator BWDD, DI_, SI_): New.
3301 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
3302 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
3303 ("mstep_shift", "mstep_mul"): Remove patterns.
3304 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
3305 * config/cris/cris.c: Change all non-condition-code,
3306 non-control-flow emitted insns to add a parallel with clobber of
3307 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
3308 emit_insn to use of emit_move_insn, gen_add2_insn or
3309 cris_emit_insn, as convenient.
3310 (cris_reg_overlap_mentioned_p)
3311 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
3312 (cris_movem_load_rest_p): Don't assume all elements in a
3314 (cris_store_multiple_op_p): Ditto.
3315 (cris_emit_insn): New function.
3316 * cris/cris-protos.h (cris_emit_insn): Declare.
3319 * config/cris/cris.md (zcond): New code_iterator.
3320 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
3322 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
3324 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
3326 * config/cris/cris.md ("movsi"): For memory destination
3327 post-reload, generate clobberless variant. Similarly for a
3328 zero-source post-reload.
3329 ("*mov_tomem<mode>_split"): New split.
3330 ("*mov_tomem<mode>"): New insn.
3331 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
3332 "Q>m" for less-than-SImode.
3333 ("*mov_fromzero<mode>_split"): New split.
3334 ("*mov_fromzero<mode>"): New insn.
3336 Prepare for cmpelim pass to eliminate redundant compare insns.
3337 * config/cris/cris-modes.def: New file.
3338 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
3339 (cris_notice_update_cc): Remove left-over declaration.
3340 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
3341 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
3342 * config/cris/cris.h (SELECT_CC_MODE): Define.
3343 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
3345 (cond): New code_iterator.
3346 (nzcond): Replacement for incorrect ncond. All callers changed.
3347 (nzvccond): Replacement for ocond. All callers changed.
3348 (rnzcond): Replacement for rcond. All callers changed.
3349 (xCC): New code_attr.
3350 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
3352 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
3353 CCmode with iteration over NZVCSET.
3354 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
3356 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
3357 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
3358 ("*btst<mode>"): Similarly, from "*btst".
3359 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
3360 iterating over cond instead of matching the comparison with
3361 ordered_comparison_operator.
3362 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
3363 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
3365 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
3366 NZVCUSE. Remove FIXME.
3367 ("*b<nzcond:code>_reversed<mode>"): Similarly from
3368 "*b<ncond:code>_reversed", over NZUSE.
3369 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
3370 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
3371 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
3372 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3373 depending on CC_NZmode vs. CCmode. Remove FIXME.
3374 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
3375 "*b<rcond:code>_reversed", over NZUSE.
3376 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
3377 iterating over cond instead of matching the comparison with
3378 ordered_comparison_operator.
3379 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
3380 iterating over NZUSE.
3381 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
3382 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3383 depending on CC_NZmode vs. CCmode.
3384 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
3385 NZVCUSE. Remove FIXME.
3386 ("cc"): Comment on new use.
3387 ("cc_enabled"): New attribute.
3388 ("enabled"): Make default fall back to cc_enabled.
3389 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
3390 default_subst_attrs.
3391 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
3392 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
3393 "*movsi_internal". Correct contents of, and rename attribute
3394 "cc" to "cc<cccc><ccnz><ccnzvc>".
3395 ("anz", "anzvc", "acc"): New define_subst_attrs.
3396 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
3397 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
3398 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
3399 "movqi". Correct contents of, and rename "cc" attribute to
3400 "cc<cccc><ccnz><ccnzvc>".
3401 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
3402 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
3403 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
3404 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
3405 Rename from "extend<mode>si2".
3406 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
3407 Similar, from "zero_extend<mode>si2".
3408 ("*adddi3<setnz>"): Rename from "*adddi3".
3409 ("*subdi3<setnz>"): Similarly from "*subdi3".
3410 ("*addsi3<setnz>"): Similarly from "*addsi3".
3411 ("*subsi3<setnz>"): Similarly from "*subsi3".
3412 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
3413 "cc" attribute to "cc<ccnz>".
3414 ("*addqi3<setnz>"): Similarly from "*addqi3".
3415 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
3416 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
3418 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
3419 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
3420 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
3421 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
3422 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
3423 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
3424 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
3425 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
3427 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
3429 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
3431 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
3433 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
3435 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
3437 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
3438 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
3439 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
3440 (znnCC, rznnCC): New code_attrs.
3441 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
3442 obseolete comment. Add belt-and-suspenders mode-test to condition.
3443 Add fixme regarding remaining matched-but-not-generated case.
3444 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
3445 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
3446 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
3447 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
3448 Handle output of CC_ZnNmode.
3449 ("*b<nzcond:code>_reversed<mode>"): Ditto.
3451 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
3452 NEG too. Correct comment.
3453 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
3456 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
3458 * ira-color.c (update_costs_from_allocno): Remove
3459 conflict_cost_update_p argument. Propagate costs only along
3460 threads. Always do conflict cost update. Add printing debugging
3462 (update_costs_from_copies): Add printing debugging info.
3463 (restore_costs_from_copies): Ditto.
3464 (assign_hard_reg): Improve debug info.
3465 (push_only_colorable): Ditto. Call update_costs_from_prefs.
3466 (color_allocnos): Remove update_costs_from_prefs.
3468 2020-05-08 Richard Biener <rguenther@suse.de>
3470 * tree-vectorizer.h (vec_info::slp_loads): New.
3471 (vect_optimize_slp): Declare.
3472 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
3473 nothing when there are no loads.
3474 (vect_gather_slp_loads): Gather loads into a vector.
3475 (vect_supported_load_permutation_p): Remove.
3476 (vect_analyze_slp_instance): Do not verify permutation
3478 (vect_analyze_slp): Optimize permutations of reductions
3479 after all SLP instances have been gathered and gather
3481 (vect_optimize_slp): New function split out from
3482 vect_supported_load_permutation_p. Elide some permutations.
3483 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
3484 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
3485 * tree-vect-stmts.c (vectorizable_load): Check whether
3486 the load can be permuted. When generating code assert we can.
3488 2020-05-08 Richard Biener <rguenther@suse.de>
3490 * tree-ssa-sccvn.c (rpo_avail): Change type to
3491 eliminate_dom_walker *.
3492 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
3493 use the DOM walker availability.
3494 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
3495 with vn_valueize as valueization callback.
3496 (vn_reference_maybe_forwprop_address): Likewise.
3497 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
3498 array_ref_low_bound.
3500 2020-05-08 Jakub Jelinek <jakub@redhat.com>
3502 PR tree-optimization/94786
3503 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
3507 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
3511 * tree.c (get_narrower): Reuse the op temporary instead of
3514 PR tree-optimization/94783
3515 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
3518 PR tree-optimization/94956
3519 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
3520 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
3522 PR tree-optimization/94913
3523 * match.pd (A - B + -1 >= A to B >= A): New simplification.
3524 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
3525 true for TYPE_UNSIGNED integral types.
3528 PR rtl-optimization/94516
3529 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
3531 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
3532 Call df_notes_rescan if that argument is not true and returning true.
3533 * combine.c (adjust_for_new_dest): Pass true as second argument to
3534 remove_reg_equal_equiv_notes.
3535 * postreload.c (reload_combine_recognize_pattern): Don't call
3538 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
3540 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
3542 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
3543 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
3544 (*neg_ne_<mode>): Likewise.
3546 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
3548 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
3550 (*setbcr_<un>signed_<GPR:mode>): Likewise.
3551 (cstore<mode>4): Use setbc[r] if available.
3552 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
3553 (eq<mode>3): Use setbc for TARGET_FUTURE.
3554 (*eq<mode>3): Avoid for TARGET_FUTURE.
3555 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
3556 else for non-Pmode, use gen_eq and gen_xor.
3557 (*ne<mode>3): Avoid for TARGET_FUTURE.
3558 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
3560 2020-05-07 Jeff Law <law@redhat.com>
3562 * config/h8300/h8300.md: Move expanders and patterns into
3563 files based on functionality.
3564 * config/h8300/addsub.md: New file.
3565 * config/h8300/bitfield.md: New file
3566 * config/h8300/combiner.md: New file
3567 * config/h8300/divmod.md: New file
3568 * config/h8300/extensions.md: New file
3569 * config/h8300/jumpcall.md: New file
3570 * config/h8300/logical.md: New file
3571 * config/h8300/movepush.md: New file
3572 * config/h8300/multiply.md: New file
3573 * config/h8300/other.md: New file
3574 * config/h8300/proepi.md: New file
3575 * config/h8300/shiftrotate.md: New file
3576 * config/h8300/testcompare.md: New file
3578 * config/h8300/h8300.md (adds/subs splitters): Merge into single
3580 (negation expanders and patterns): Simplify and combine using
3582 (one_cmpl expanders and patterns): Likewise.
3583 (tablejump, indirect_jump patterns ): Likewise.
3584 (shift and rotate expanders and patterns): Likewise.
3585 (absolute value expander and pattern): Drop expander, rename pattern
3587 (peephole2 patterns): Move into...
3588 * config/h8300/peepholes.md: New file.
3590 * config/h8300/constraints.md (L and N): Simplify now that we're not
3591 longer supporting the original H8/300 chip.
3592 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
3593 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
3594 (shift_alg_hi, shift_alg_si): Similarly.
3595 (h8300_option_overrides): Similarly. Default to H8/300H. If
3596 compiling for H8/S, then turn off H8/300H. Do not update the
3597 shift_alg tables for H8/300 port.
3598 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
3600 (push, split_adds_subs, h8300_rtx_costs): Likewise.
3601 (h8300_print_operand, compute_mov_length): Likewise.
3602 (output_plussi, compute_plussi_length): Likewise.
3603 (compute_plussi_cc, output_logical_op): Likewise.
3604 (compute_logical_op_length, compute_logical_op_cc): Likewise.
3605 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
3606 (output_a_shift, compute_a_shift_length): Likewise.
3607 (output_a_rotate, compute_a_rotate_length): Likewise.
3608 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
3609 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
3610 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
3611 (attr_cpu, TARGET_H8300): Remove.
3612 (TARGET_DEFAULT): Update.
3613 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
3614 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
3615 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
3616 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
3617 * config/h8300/h8300.md: Simplify patterns throughout.
3618 * config/h8300/t-h8300: Update multilib configuration.
3620 * config/h8300/h8300.h (LINK_SPEC): Remove.
3621 (USER_LABEL_PREFIX): Likewise.
3623 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
3624 (h8300_option_override): Remove remnants of COFF support.
3626 2020-05-07 Alan Modra <amodra@gmail.com>
3628 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
3629 set_rtx_cost with set_src_cost.
3630 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
3632 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
3634 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
3635 redundant half vector handlings for no peeling gaps.
3637 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
3639 * tree-ssa-operands.c (operands_scanner): New class.
3640 (operands_bitmap_obstack): Remove.
3641 (n_initialized): Remove.
3642 (build_uses): Move to operands_scanner class.
3643 (build_vuse): Same as above.
3644 (build_vdef): Same as above.
3645 (verify_ssa_operands): Same as above.
3646 (finalize_ssa_uses): Same as above.
3647 (cleanup_build_arrays): Same as above.
3648 (finalize_ssa_stmt_operands): Same as above.
3649 (start_ssa_stmt_operands): Same as above.
3650 (append_use): Same as above.
3651 (append_vdef): Same as above.
3652 (add_virtual_operand): Same as above.
3653 (add_stmt_operand): Same as above.
3654 (get_mem_ref_operands): Same as above.
3655 (get_tmr_operands): Same as above.
3656 (maybe_add_call_vops): Same as above.
3657 (get_asm_stmt_operands): Same as above.
3658 (get_expr_operands): Same as above.
3659 (parse_ssa_operands): Same as above.
3660 (finalize_ssa_defs): Same as above.
3661 (build_ssa_operands): Same as above, plus create a C-like wrapper.
3662 (update_stmt_operands): Create an instance of operands_scanner.
3664 2020-05-07 Richard Biener <rguenther@suse.de>
3667 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
3668 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
3669 (refered_from_nonlocal_var): Likewise.
3670 (ipa_pta_execute): Likewise.
3672 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
3674 * gcc/tree-ssa-struct-alias.c: Fix comments
3676 2020-05-07 Martin Liska <mliska@suse.cz>
3678 * doc/invoke.texi: Fix 2 optindex entries.
3680 2020-05-07 Richard Biener <rguenther@suse.de>
3683 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
3684 (tree_decl_common::not_gimple_reg_flag): ... to this.
3685 * tree.h (DECL_GIMPLE_REG_P): Rename ...
3686 (DECL_NOT_GIMPLE_REG_P): ... to this.
3687 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
3688 (create_tmp_reg): Simplify.
3689 (create_tmp_reg_fn): Likewise.
3690 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
3691 * gimplify.c (create_tmp_from_val): Simplify.
3692 (gimplify_bind_expr): Likewise.
3693 (gimplify_compound_literal_expr): Likewise.
3694 (gimplify_function_tree): Likewise.
3695 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
3696 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
3697 (asan_add_global): Copy it.
3698 * cgraphunit.c (cgraph_node::expand_thunk): Force args
3700 * function.c (gimplify_parameters): Copy
3701 DECL_NOT_GIMPLE_REG_P.
3702 * ipa-param-manipulation.c
3703 (ipa_param_body_adjustments::common_initialization): Simplify.
3704 (ipa_param_body_adjustments::reset_debug_stmts): Copy
3705 DECL_NOT_GIMPLE_REG_P.
3706 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
3707 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
3708 * tree-cfg.c (make_blocks_1): Simplify.
3709 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
3710 * tree-eh.c (lower_eh_constructs_2): Simplify.
3711 * tree-inline.c (declare_return_variable): Adjust and
3713 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
3714 (copy_result_decl_to_var): Likewise.
3715 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
3716 * tree-nested.c (create_tmp_var_for): Simplify.
3717 * tree-parloops.c (separate_decls_in_region_name): Copy
3718 DECL_NOT_GIMPLE_REG_P.
3719 * tree-sra.c (create_access_replacement): Adjust and
3720 generalize partial def support.
3721 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
3722 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
3723 * tree-ssa.c (maybe_optimize_var): Handle clearing of
3724 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
3726 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
3727 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
3728 DECL_NOT_GIMPLE_REG_P.
3729 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
3730 * cfgexpand.c (avoid_type_punning_on_regs): New.
3731 (discover_nonconstant_array_refs): Call
3732 avoid_type_punning_on_regs to avoid unsupported mode punning.
3734 2020-05-07 Alex Coplan <alex.coplan@arm.com>
3736 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
3739 2020-05-07 Richard Biener <rguenther@suse.de>
3741 PR tree-optimization/57359
3742 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
3743 (in_mem_ref::dep_loop): Repurpose.
3744 (LOOP_DEP_BIT): Remove.
3745 (enum dep_kind): New.
3746 (enum dep_state): Likewise.
3747 (record_loop_dependence): New function to populate the
3749 (query_loop_dependence): New function to query the dependence
3751 (memory_accesses::refs_in_loop): Rename to ...
3752 (memory_accesses::refs_loaded_in_loop): ... this and change to
3754 (outermost_indep_loop): Adjust.
3755 (mem_ref_alloc): Likewise.
3756 (gather_mem_refs_stmt): Likewise.
3757 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
3758 (struct sm_aux): New.
3759 (execute_sm): Split code generation on exits, record state
3761 (enum sm_kind): New.
3762 (execute_sm_exit): Exit code generation part.
3763 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
3764 dependence checking on stores reached from exits.
3765 (sm_seq_valid_bb): New function gathering SM stores on exits.
3766 (hoist_memory_references): Re-implement.
3767 (refs_independent_p): Add tbaa_p parameter and pass it down.
3768 (record_dep_loop): Remove.
3769 (ref_indep_loop_p_1): Fold into ...
3770 (ref_indep_loop_p): ... this and generalize for three kinds
3771 of dependence queries.
3772 (can_sm_ref_p): Adjust according to hoist_memory_references
3774 (store_motion_loop): Don't do anything if the set of SM
3775 candidates is empty.
3776 (tree_ssa_lim_initialize): Adjust.
3777 (tree_ssa_lim_finalize): Likewise.
3779 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
3780 Pierre-Marie de Rodat <derodat@adacore.com>
3782 * dwarf2out.c (add_data_member_location_attribute): Take into account
3783 the variant part offset in the computation of the data bit offset.
3784 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
3785 in the call to field_byte_offset.
3786 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
3787 confusing assertion.
3788 (analyze_variant_discr): Deal with boolean subtypes.
3790 2020-05-07 Martin Liska <mliska@suse.cz>
3792 * lto-wrapper.c: Split arguments of MAKE environment
3795 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
3797 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
3798 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
3799 fenv_var and new_fenv_var.
3801 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3804 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
3806 (avx512dq_vextract<shuffletype>64x2_1_maskm,
3807 avx512f_vextract<shuffletype>32x4_1_maskm,
3808 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
3809 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
3811 (*avx512dq_vextract<shuffletype>64x2_1,
3812 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
3813 define_insns. Even in the masked variant allow memory output but in
3814 that case use 0 rather than 0C constraint on the source of masked-out
3816 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
3818 (*avx512f_vextract<shuffletype>32x4_1,
3819 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
3820 Even in the masked variant allow memory output but in that case use
3821 0 rather than 0C constraint on the source of masked-out elts.
3822 (vec_extract_lo_<mode><mask_name>): Split into ...
3823 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
3824 define_insns. Even in the masked variant allow memory output but in
3825 that case use 0 rather than 0C constraint on the source of masked-out
3827 (vec_extract_hi_<mode><mask_name>): Split into ...
3828 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
3829 define_insns. Even in the masked variant allow memory output but in
3830 that case use 0 rather than 0C constraint on the source of masked-out
3833 2020-05-06 qing zhao <qing.zhao@oracle.com>
3836 * common.opt: Add -flarge-source-files.
3837 * doc/invoke.texi: Document it.
3838 * toplev.c (process_options): set line_table->default_range_bits
3839 to 0 when flag_large_source_files is true.
3841 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
3844 * config/i386/predicates.md (add_comparison_operator): New predicate.
3845 * config/i386/i386.md (compare->add splitter): New splitters.
3847 2020-05-06 Richard Biener <rguenther@suse.de>
3849 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
3850 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
3851 Remove slp_instance parameter, just iterate over all scalar stmts.
3852 (vect_slp_analyze_instance_dependence): Adjust and likewise.
3853 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
3855 (vect_schedule_slp): Just iterate over all scalar stmts.
3856 (vect_supported_load_permutation_p): Adjust.
3857 (vect_transform_slp_perm_load): Remove slp_instance parameter,
3858 instead use the number of lanes in the node as group size.
3859 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
3860 factor instead of slp_instance as parameter.
3861 (vectorizable_load): Adjust.
3863 2020-05-06 Andreas Schwab <schwab@suse.de>
3865 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
3866 (aarch64_get_extension_string_for_isa_flags): Don't declare.
3868 2020-05-06 Richard Biener <rguenther@suse.de>
3871 * cfgloopmanip.c (create_preheader): Require non-complex
3872 preheader edge for CP_SIMPLE_PREHEADERS.
3874 2020-05-06 Richard Biener <rguenther@suse.de>
3876 PR tree-optimization/94963
3877 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
3878 no-warning marking of the conditional store.
3879 (execute_sm): Instead mark the uninitialized state
3880 on loop entry to be not warned about.
3882 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
3884 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
3885 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
3886 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
3887 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3889 * config/i386/i386-builtin.def: Add new builtins.
3890 * config/i386/i386-c.c (ix86_target_macros_internal): Define
3892 * config/i386/i386-options.c (ix86_target_string): Add
3894 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
3895 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
3897 * config/i386/i386.md (define_c_enum "unspec"): Add
3898 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
3899 (TSXLDTRK): New define_int_iterator.
3900 ("<tsxldtrk>"): New define_insn.
3901 * config/i386/i386.opt: Add -mtsxldtrk.
3902 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
3903 * config/i386/tsxldtrkintrin.h: New.
3904 * doc/invoke.texi: Document -mtsxldtrk.
3906 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3908 PR tree-optimization/94921
3909 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
3912 2020-05-06 Richard Biener <rguenther@suse.de>
3914 PR tree-optimization/94965
3915 * tree-vect-stmts.c (vectorizable_load): Fix typo.
3917 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3919 * doc/install.texi: Replace Sun with Solaris as appropriate.
3920 (Tools/packages necessary for building GCC, Perl version between
3921 5.6.1 and 5.6.24): Remove Solaris 8 reference.
3922 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
3924 (Specific, i?86-*-solaris2*): Update version references for
3925 Solaris 11.3 and later. Remove gas 2.26 caveat.
3926 (Specific, *-*-solaris2*): Update version references for
3927 Solaris 11.3 and later. Remove boehm-gc reference.
3928 Document GMP, MPFR caveats on Solaris 11.3.
3929 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
3930 (Specific, sparc64-*-solaris2*): Likewise.
3931 Document --build requirement.
3933 2020-05-06 Jakub Jelinek <jakub@redhat.com>
3936 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
3937 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
3939 PR rtl-optimization/94873
3940 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
3941 note if SET_SRC (set) has side-effects.
3943 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
3944 Wei Xiao <wei3.xiao@intel.com>
3946 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
3947 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
3948 (ix86_handle_option): Handle -mserialize.
3949 * config.gcc (serializeintrin.h): New header file.
3950 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
3951 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
3953 * config/i386/i386-builtin.def: Add new builtin.
3954 * config/i386/i386-c.c (__SERIALIZE__): New macro.
3955 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
3957 * (ix86_valid_target_attribute_inner_p): Add target attribute
3959 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
3961 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
3962 (serialize): New define_insn.
3963 * config/i386/i386.opt (mserialize): New option
3964 * config/i386/immintrin.h: Include serailizeintrin.h.
3965 * config/i386/serializeintrin.h: New header file.
3966 * doc/invoke.texi: Add documents for -mserialize.
3968 2020-05-06 Richard Biener <rguenther@suse.de>
3970 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
3971 to/from pointer conversion checking.
3973 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
3975 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
3977 * config/rs6000/rs6000-c.c: Likewise.
3978 * config/rs6000/rs6000-call.c: Likewise.
3979 * config/rs6000/rs6000.c: Likewise.
3981 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3983 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
3984 (RTEMS_ENDFILE_SPEC): Likewise.
3985 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
3986 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
3987 (LIB_SPECS): Support -nodefaultlibs option.
3988 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
3989 (RTEMS_ENDFILE_SPEC): Likewise.
3990 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
3991 (RTEMS_ENDFILE_SPEC): Likewise.
3992 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
3993 (RTEMS_ENDFILE_SPEC): Likewise.
3995 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
3997 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
3998 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
4000 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4002 * config/pru/pru.h: Mark R3.w0 as caller saved.
4004 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4006 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
4007 and gen_doloop_begin_internal.
4008 (pru_reorg_loop): Use gen_pruloop with mode.
4009 * config/pru/pru.md: Use new @insn syntax.
4011 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4013 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
4015 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
4017 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
4018 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
4019 (addqi3_cconly_overflow): Ditto.
4020 (umulv<mode>4): Ditto.
4021 (<s>mul<mode>3_highpart): Ditto.
4022 (tls_global_dynamic_32): Ditto.
4023 (tls_local_dynamic_base_32): Ditto.
4030 (*adddi_4): Remove "m" constraint from scratch operand.
4031 (*add<mode>_4): Ditto.
4033 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4035 PR rtl-optimization/94516
4036 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
4037 with sp = reg, add REG_EQUAL note with sp + const.
4038 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
4039 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
4040 postreload sp = sp + const to sp = reg optimization if needed and
4042 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
4043 reg = sp insn with sp + const REG_EQUAL note. Adjust
4044 try_apply_stack_adjustment caller, call
4045 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
4046 (combine_stack_adjustments): Allocate and free LIVE bitmap,
4047 adjust combine_stack_adjustments_for_block caller.
4049 2020-05-05 Martin Liska <mliska@suse.cz>
4051 PR gcov-profile/93623
4052 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
4055 2020-05-05 Martin Liska <mliska@suse.cz>
4057 * opt-functions.awk (opt_args_non_empty): New function.
4058 * opt-read.awk: Use the function for various option arguments.
4060 2020-05-05 Martin Liska <mliska@suse.cz>
4063 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
4064 report warning when the jobserver is not detected.
4066 2020-05-05 Martin Liska <mliska@suse.cz>
4068 PR gcov-profile/94636
4069 * gcov.c (main): Print total lines summary at the end.
4070 (generate_results): Expect file_name always being non-null.
4071 Print newline after intermediate file is printed in order to align with
4072 what we do for normal files.
4074 2020-05-05 Martin Liska <mliska@suse.cz>
4076 * dumpfile.c (dump_switch_p): Change return type
4077 and print option suggestion.
4078 * dumpfile.h: Change return type.
4079 * opts-global.c (handle_common_deferred_options):
4080 Move error into dump_switch_p function.
4082 2020-05-05 Martin Liska <mliska@suse.cz>
4085 * alloc-pool.h: Use const for some arguments.
4086 * bitmap.h: Likewise.
4087 * mem-stats.h: Likewise.
4088 * sese.h (get_entry_bb): Likewise.
4089 (get_exit_bb): Likewise.
4091 2020-05-05 Richard Biener <rguenther@suse.de>
4093 * tree-vect-slp.c (struct vdhs_data): New.
4094 (vect_detect_hybrid_slp): New walker.
4095 (vect_detect_hybrid_slp): Rewrite.
4097 2020-05-05 Richard Biener <rguenther@suse.de>
4100 * tree-ssa-structalias.c (ipa_pta_execute): Use
4101 varpool_node::externally_visible_p ().
4102 (refered_from_nonlocal_var): Likewise.
4104 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
4106 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
4107 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
4108 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
4110 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
4112 * gimplify.c (gimplify_init_constructor): Do not put the constructor
4113 into static memory if it is not complete.
4115 2020-05-05 Richard Biener <rguenther@suse.de>
4117 PR tree-optimization/94949
4118 * tree-ssa-loop-im.c (execute_sm): Check whether we use
4119 the multithreaded model or always compute the stored value
4120 before eliding a load.
4122 2020-05-05 Alex Coplan <alex.coplan@arm.com>
4124 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
4126 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4128 PR tree-optimization/94800
4129 * match.pd (X + (X << C) to X * (1 + (1 << C)),
4130 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
4134 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
4136 PR tree-optimization/94914
4137 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
4140 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
4142 * config/i386/i386.md (*testqi_ext_3): Use
4143 int_nonimmediate_operand instead of manual mode checks.
4144 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
4145 Use int_nonimmediate_operand predicate. Rewrite
4146 define_insn_and_split pattern to a combine pass splitter.
4148 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4150 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
4151 * configure: Regenerate.
4153 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4156 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4157 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
4158 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
4159 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
4161 2020-05-04 Clement Chigot <clement.chigot@atos.net>
4162 David Edelsohn <dje.gcc@gmail.com>
4164 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
4165 for fmodl, frexpl, ldexpl and modfl builtins.
4167 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
4170 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
4171 chosen lhs is different from the gcall lhs.
4172 (expand_mask_load_optab_fn): Likewise.
4173 (expand_gather_load_optab_fn): Likewise.
4175 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4178 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
4179 (EQ compare->LTU compare splitter): New splitter.
4180 (NE compare->NEG splitter): Ditto.
4182 2020-05-04 Marek Polacek <polacek@redhat.com>
4185 2020-04-30 Marek Polacek <polacek@redhat.com>
4188 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4189 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4191 2020-05-04 Richard Biener <rguenther@suse.de>
4193 PR tree-optimization/93891
4194 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
4195 the original reference tree for assessing access alignment.
4197 2020-05-04 Richard Biener <rguenther@suse.de>
4199 PR tree-optimization/39612
4200 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
4201 (set_ref_loaded_in_loop): New.
4202 (mark_ref_loaded): Likewise.
4203 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
4204 (execute_sm): Avoid issueing a load when it was not there.
4205 (execute_sm_if_changed): Avoid issueing warnings for the
4208 2020-05-04 Martin Jambor <mjambor@suse.cz>
4211 * tree-inline.c (tree_function_versioning): Leave any type conversion
4212 of replacements to setup_one_parameter and its friend
4213 force_value_to_type.
4215 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4218 * config/i386/predicates.md (shr_comparison_operator): New predicate.
4219 * config/i386/i386.md (compare->shr splitter): New splitters.
4221 2020-05-04 Jakub Jelinek <jakub@redhat.com>
4223 PR tree-optimization/94718
4224 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
4226 PR tree-optimization/94718
4227 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
4228 replace two nop conversions on bit_{and,ior,xor} argument
4229 and result with just one conversion on the result or another argument.
4231 PR tree-optimization/94718
4232 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
4233 -> (X ^ Y) & C eqne 0 optimization to ...
4234 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
4236 * opts.c (get_option_html_page): Instead of hardcoding a list of
4237 options common between C/C++ and Fortran only use gfortran/
4238 documentation for warnings that have CL_Fortran set but not
4241 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
4243 * config/i386/i386-expand.c (ix86_expand_int_movcc):
4244 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
4245 (emit_memmov): Ditto.
4246 (emit_memset): Ditto.
4247 (ix86_expand_strlensi_unroll_1): Ditto.
4248 (release_scratch_register_on_entry): Ditto.
4249 (gen_frame_set): Ditto.
4250 (ix86_emit_restore_reg_using_pop): Ditto.
4251 (ix86_emit_outlined_ms2sysv_restore): Ditto.
4252 (ix86_expand_epilogue): Ditto.
4253 (ix86_expand_split_stack_prologue): Ditto.
4254 * config/i386/i386.md (push immediate splitter): Ditto.
4258 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
4260 PR translation/93861
4261 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
4264 2020-05-02 Jakub Jelinek <jakub@redhat.com>
4266 * config/tilegx/tilegx.md
4267 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
4268 rather than just <n>.
4270 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
4273 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
4274 and crtl->patch_area_entry.
4275 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
4276 * opts.c (common_handle_option): Limit
4277 function_entry_patch_area_size and function_entry_patch_area_start
4278 to USHRT_MAX. Fix a typo in error message.
4279 * varasm.c (assemble_start_function): Use crtl->patch_area_size
4280 and crtl->patch_area_entry.
4281 * doc/invoke.texi: Document the maximum value for
4282 -fpatchable-function-entry.
4284 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
4286 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
4287 Override SUBTARGET_SHADOW_OFFSET macro.
4289 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
4291 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
4292 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
4293 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
4294 * config/i386/freebsd.h: Likewise.
4295 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
4296 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
4298 2020-04-30 Alexandre Oliva <oliva@adacore.com>
4300 * doc/sourcebuild.texi (Effective-Target Keywords): Document
4301 the newly-introduced fileio effective target.
4303 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
4305 PR rtl-optimization/94740
4306 * cse.c (cse_process_notes_1): Replace with...
4307 (cse_process_note_1): ...this new function, acting as a
4308 simplify_replace_fn_rtx callback to process_note. Handle only
4309 REGs and MEMs directly. Validate the MEM if cse_process_note
4310 changes its address.
4311 (cse_process_notes): Replace with...
4312 (cse_process_note): ...this new function.
4313 (cse_extended_basic_block): Update accordingly, iterating over
4314 the register notes and passing individual notes to cse_process_note.
4316 2020-04-30 Carl Love <cel@us.ibm.com>
4318 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
4320 2020-04-30 Martin Jambor <mjambor@suse.cz>
4323 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
4324 saved by the inliner and thunks which had their call inlined.
4325 * ipa-inline-transform.c (save_inline_function_body): Fill in
4326 former_clone_of of new body holders.
4328 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4330 * BASE-VER: Set to 11.0.0.
4332 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
4334 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
4336 2020-04-30 Marek Polacek <polacek@redhat.com>
4339 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4340 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4342 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4344 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
4345 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
4346 * doc/invoke.texi (moutline-atomics): Document as on by default.
4348 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
4351 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
4352 the check for NOTE_INSN_DELETED_LABEL.
4354 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4356 * configure.ac (--with-documentation-root-url,
4357 --with-changes-root-url): Diagnose URL not ending with /,
4358 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
4359 * opts.h (get_changes_url): Remove.
4360 * opts.c (get_changes_url): Remove.
4361 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
4362 or -DCHANGES_ROOT_URL.
4363 * doc/install.texi (--with-documentation-root-url,
4364 --with-changes-root-url): Document.
4365 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
4366 get_changes_url and free, change url variable type to const char * and
4367 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
4368 * config/s390/s390.c (s390_function_arg_vector,
4369 s390_function_arg_float): Likewise.
4370 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4372 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
4374 * config.in: Regenerate.
4375 * configure: Regenerate.
4377 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
4380 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
4382 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
4384 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
4385 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
4387 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
4389 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
4390 Change constraint for vlrl/vstrl to jb4.
4392 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4394 * var-tracking.c (vt_initialize): Move variables pre and post
4395 into inner block and initialize both in order to fix warning
4396 about uninitialized use. Remove unnecessary checks for
4397 frame_pointer_needed.
4399 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4401 * toplev.c (output_stack_usage_1): Ensure that first
4402 argument to fprintf is not null.
4404 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4406 * configure.ac (-with-changes-root-url): New configure option,
4407 defaulting to https://gcc.gnu.org/.
4408 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
4410 * pretty-print.c (get_end_url_string): New function.
4411 (pp_format): Handle %{ and %} for URLs.
4412 (pp_begin_url): Use pp_string instead of pp_printf.
4413 (pp_end_url): Use get_end_url_string.
4414 * opts.h (get_changes_url): Declare.
4415 * opts.c (get_changes_url): New function.
4416 * config/rs6000/rs6000-call.c: Include opts.h.
4417 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
4418 of just in GCC 10.1 in diagnostics and add URL.
4419 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
4420 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4422 * config/s390/s390.c (s390_function_arg_vector,
4423 s390_function_arg_float): Likewise.
4424 * configure: Regenerated.
4427 * config/s390/s390.c (s390_function_arg_vector,
4428 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
4429 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
4430 passed to the function rather than the type of the single element.
4431 Rename cxx17_empty_base_seen variable to empty_base_seen, change
4432 type to int, and adjust diagnostics depending on if the field
4433 has [[no_unique_attribute]] or not.
4436 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
4437 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
4438 used in casts into parens.
4439 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
4440 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
4441 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
4442 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
4443 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
4444 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
4445 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
4446 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
4447 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
4448 _mm256_mask_cmp_epu8_mask): Likewise.
4449 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
4450 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
4451 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
4452 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
4455 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
4456 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
4457 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
4458 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
4459 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
4460 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
4461 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
4462 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
4463 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
4464 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
4465 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
4466 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
4467 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
4469 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
4470 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
4471 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
4472 as mask vector containing -1.0 or -1.0f elts, but instead vector
4473 with all bits set using _mm*_cmpeq_p? with zero operands.
4474 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
4475 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
4476 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
4477 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
4478 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
4479 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
4480 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
4481 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
4482 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
4483 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
4484 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
4485 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
4486 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
4487 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
4488 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
4489 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
4490 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
4492 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
4493 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
4494 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
4495 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
4496 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
4497 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
4498 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
4499 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
4500 _mm512_mask_prefetch_i64scatter_ps): Likewise.
4501 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
4502 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
4503 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
4504 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
4505 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
4506 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
4507 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
4508 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
4509 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
4510 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
4511 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
4512 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
4513 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
4514 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
4515 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
4516 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
4517 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
4518 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
4519 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
4520 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
4521 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
4522 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
4523 _mm_mask_i64scatter_epi64): Likewise.
4525 2020-04-29 Jeff Law <law@redhat.com>
4527 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
4528 division instructions are 4 bytes long.
4530 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4533 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
4534 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
4535 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
4536 take address of TARGET_EXPR of fenv_var with void_node initializer.
4539 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4541 PR tree-optimization/94774
4542 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
4545 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4547 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
4548 * calls.c (cxx17_empty_base_field_p): New function. Check
4549 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
4552 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
4555 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
4556 Allow -fcf-protection with -mindirect-branch=thunk-extern and
4557 -mfunction-return=thunk-extern.
4558 * doc/invoke.texi: Update notes for -fcf-protection=branch with
4559 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
4561 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4563 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
4565 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4567 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
4568 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
4569 fenv_var and new_fenv_var.
4571 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4573 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
4574 effective-target keyword.
4575 (arm_arch_v8a_hard_multilib): Likewise.
4576 (arm_arch_v8a_hard): Document new dg-add-options keyword.
4577 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
4578 code is deprecated and has not been updated to handle
4579 DECL_FIELD_ABI_IGNORED.
4580 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
4581 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
4582 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
4583 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
4584 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
4585 something actually is a HFA or HVA. Record whether we see a
4586 [[no_unique_address]] field that previous GCCs would not have
4587 ignored in this way.
4588 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
4589 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
4590 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
4591 diagnostic messages.
4592 (arm_needs_doubleword_align): Add a comment explaining why we
4593 consider even zero-sized fields.
4595 2020-04-29 Richard Biener <rguenther@suse.de>
4596 Li Zekun <lizekun1@huawei.com>
4599 * tree.c (component_ref_size): Guard against error_mark_node
4600 DECL_INITIAL as it happens with LTO.
4602 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
4604 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
4605 comment explaining why we consider even zero-sized fields.
4606 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
4607 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
4608 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
4609 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
4610 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
4611 something actually is a HFA or HVA. Record whether we see a
4612 [[no_unique_address]] field that previous GCCs would not have
4613 ignored in this way.
4614 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
4615 whether diagnostics should be suppressed. Update the calls to
4616 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
4617 [[no_unique_address]] case.
4618 (aarch64_return_in_msb): Update call accordingly, never silencing
4620 (aarch64_function_value): Likewise.
4621 (aarch64_return_in_memory_1): Likewise.
4622 (aarch64_init_cumulative_args): Likewise.
4623 (aarch64_gimplify_va_arg_expr): Likewise.
4624 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
4625 use it to decide whether arch64_vfp_is_call_or_return_candidate
4627 (aarch64_pass_by_reference): Update calls accordingly.
4628 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
4629 to decide whether arch64_vfp_is_call_or_return_candidate should be
4632 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
4635 * config/aarch64/aarch64-builtins.c
4636 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
4637 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
4640 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
4642 * configure.ac <$enable_offload_targets>: Do parsing as done
4644 * configure: Regenerate.
4646 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
4647 * configure: Regenerate.
4650 * rtlanal.c (set_noop_p): Handle non-constant selectors.
4653 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
4655 (TARGET_EXCEPT_UNWIND_INFO): Define.
4657 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4660 * config/gcn/gcn.md (*mov<mode>_insn): Use
4661 'reg_overlap_mentioned_p' to check for overlap.
4664 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
4665 instead of cxx17_empty_base_field_p.
4668 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
4669 DECL_FIELD_ABI_IGNORED.
4670 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
4671 * calls.h (cxx17_empty_base_field_p): Change into a temporary
4672 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
4674 * calls.c (cxx17_empty_base_field_p): Remove.
4675 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
4676 DECL_FIELD_ABI_IGNORED.
4677 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
4678 * lto-streamer-out.c (hash_tree): Likewise.
4679 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
4680 cxx17_empty_base_seen to empty_base_seen, change type to int *,
4681 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
4682 cxx17_empty_base_field_p, if "no_unique_address" attribute is
4683 present, propagate that to the caller too.
4684 (rs6000_discover_homogeneous_aggregate): Adjust
4685 rs6000_aggregate_candidate caller, emit different diagnostics
4686 when c++17 empty base fields are present and when empty
4687 [[no_unique_address]] fields are present.
4688 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
4689 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
4692 2020-04-29 Richard Biener <rguenther@suse.de>
4694 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
4695 Just check whether the stmt stores.
4697 2020-04-28 Alexandre Oliva <oliva@adacore.com>
4700 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
4701 output operand in emulation. Don't overwrite pseudos.
4703 2020-04-28 Jeff Law <law@redhat.com>
4705 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
4706 multiply patterns are 4 bytes long.
4708 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4710 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
4711 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
4713 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
4714 Jakub Jelinek <jakub@redhat.com>
4717 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
4718 base class artificial fields.
4719 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
4720 decision is different after this fix.
4722 2020-04-28 David Malcolm <dmalcolm@redhat.com>
4728 * doc/invoke.texi (Static Analyzer Options): Remove
4729 -Wanalyzer-use-of-uninitialized-value.
4730 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
4732 2020-04-28 Jakub Jelinek <jakub@redhat.com>
4734 PR tree-optimization/94809
4735 * tree.c (build_call_expr_internal_loc_array): Call
4736 process_call_operands.
4738 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
4740 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
4741 * config/aarch64/aarch64-tune.md: Regenerate.
4742 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
4743 (thunderx3t110_regmove_cost): Likewise.
4744 (thunderx3t110_vector_cost): Likewise.
4745 (thunderx3t110_prefetch_tune): Likewise.
4746 (thunderx3t110_tunings): Likewise.
4747 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
4749 * config/aarch64/thunderx3t110.md: New file.
4750 * config/aarch64/aarch64.md: Include thunderx3t110.md.
4751 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
4753 2020-04-28 Jakub Jelinek <jakub@redhat.com>
4756 * config/s390/s390.c (s390_function_arg_vector,
4757 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
4759 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
4761 PR tree-optimization/94727
4762 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
4763 operands are invariant booleans, use the mask type associated with the
4764 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
4765 (vectorizable_condition): Pass vectype unconditionally to
4766 vect_is_simple_cond.
4768 2020-04-27 Jakub Jelinek <jakub@redhat.com>
4771 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
4772 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
4773 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
4775 2020-04-27 David Malcolm <dmalcolm@redhat.com>
4778 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
4779 default value, so that it can by supplied by get_option_html_page.
4780 * configure: Regenerate.
4781 * opts.c: Include "selftest.h".
4782 (get_option_html_page): New function.
4783 (get_option_url): Use it. Reformat to place comments next to the
4784 expressions they refer to.
4785 (selftest::test_get_option_html_page): New.
4786 (selftest::opts_c_tests): New.
4787 * selftest-run-tests.c (selftest::run_tests): Call
4788 selftest::opts_c_tests.
4789 * selftest.h (selftest::opts_c_tests): New decl.
4791 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
4793 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
4794 UINTVAL to CONST_INTs.
4796 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4798 * config/arm/constraints.md (e): Remove constraint.
4799 (Te): Define constraint.
4800 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
4801 operand 0 from "e" to "Te".
4802 (vaddvaq_<supf><mode>): Likewise.
4803 (vaddvq_p_<supf><mode>): Likewise.
4804 (vmladavq_<supf><mode>): Likewise.
4805 (vmladavxq_s<mode>): Likewise.
4806 (vmlsdavq_s<mode>): Likewise.
4807 (vmlsdavxq_s<mode>): Likewise.
4808 (vaddvaq_p_<supf><mode>): Likewise.
4809 (vmladavaq_<supf><mode>): Likewise.
4810 (vmladavq_p_<supf><mode>): Likewise.
4811 (vmladavxq_p_s<mode>): Likewise.
4812 (vmlsdavq_p_s<mode>): Likewise.
4813 (vmlsdavxq_p_s<mode>): Likewise.
4814 (vmlsdavaxq_s<mode>): Likewise.
4815 (vmlsdavaq_s<mode>): Likewise.
4816 (vmladavaxq_s<mode>): Likewise.
4817 (vmladavaq_p_<supf><mode>): Likewise.
4818 (vmladavaxq_p_s<mode>): Likewise.
4819 (vmlsdavaq_p_s<mode>): Likewise.
4820 (vmlsdavaxq_p_s<mode>): Likewise.
4822 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
4824 * config/arm/arm.c (output_move_neon): Only get the first operand if
4827 2020-04-27 Felix Yang <felix.yang@huawei.com>
4829 PR tree-optimization/94784
4830 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
4831 assert around so that it checks that the two vectors have equal
4832 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
4833 types is a useless_type_conversion_p.
4835 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
4838 * dwarf2cfi.c (struct GTY): Add ra_mangled.
4839 (cfi_row_equal_p): Check ra_mangled.
4840 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
4841 this only handles the sparc logic now.
4842 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
4843 the aarch64 specific logic.
4844 (dwarf2out_frame_debug): Update to use the new subroutines.
4845 (change_cfi_row): Check ra_mangled.
4847 2020-04-27 Jakub Jelinek <jakub@redhat.com>
4850 * config/s390/s390.c (s390_function_arg_vector,
4851 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
4853 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
4855 * common/config/rs6000/rs6000-common.c
4856 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
4858 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
4861 2020-04-27 Martin Liska <mliska@suse.cz>
4864 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
4865 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
4867 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
4870 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
4872 (rs6000_emit_prologue_components):
4873 Check with frame_pointer_needed_indeed.
4874 (rs6000_emit_epilogue_components): Likewise.
4875 (rs6000_emit_prologue): Likewise.
4876 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
4878 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
4880 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
4881 stack frame when debugging and flag_compare_debug is enabled.
4883 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
4885 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
4886 enable PC-relative addressing for -mcpu=future.
4887 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
4888 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
4889 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
4890 suppress PC-relative addressing.
4891 (rs6000_option_override_internal): Split up error messages
4892 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
4895 2020-04-25 Jakub Jelinek <jakub@redhat.com>
4896 Richard Biener <rguenther@suse.de>
4898 PR tree-optimization/94734
4899 PR tree-optimization/89430
4900 * tree-ssa-phiopt.c: Include tree-eh.h.
4901 (cond_store_replacement): Return false if an automatic variable
4902 access could trap. If -fstore-data-races, don't return false
4903 just because an automatic variable is addressable.
4905 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
4907 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
4909 (add<mode>_sext_dup2_exec): Likewise.
4911 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
4914 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
4915 endian byteshift_val calculation.
4917 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
4919 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
4921 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
4923 * config/aarch64/arm_sve.h: Add a comment.
4925 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
4927 PR rtl-optimization/94708
4928 * combine.c (simplify_if_then_else): Add check for
4929 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
4931 2020-04-23 Martin Sebor <msebor@redhat.com>
4934 * common.opt (-Wno-frame-larger-than): New option.
4935 (-Wno-larger-than, -Wno-stack-usage): Same.
4937 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
4939 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
4941 (mov<mode>_exec): Likewise.
4942 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
4943 (<convop><mode><vndi>2_exec): Likewise.
4945 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
4947 PR tree-optimization/94717
4948 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
4949 of the stores doesn't have the same landing pad number as the first.
4950 (coalesce_immediate_stores): Do not try to coalesce the store using
4951 bswap if it doesn't have the same landing pad number as the first.
4953 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
4955 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
4956 Replace outdated link to ELFv2 ABI.
4958 2020-04-23 Jakub Jelinek <jakub@redhat.com>
4961 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
4965 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
4966 temporarily with non-final second operand and updating it later,
4967 push COMPOUND_EXPRs into a vector and process it in reverse,
4968 creating COMPOUND_EXPRs with the final operands.
4970 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
4973 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
4974 bti c and bti j handling.
4976 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
4977 Thomas Schwinge <thomas@codesourcery.com>
4981 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
4982 t_async and the wait arguments.
4984 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
4986 PR tree-optimization/94727
4987 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
4988 comparing invariant scalar booleans.
4990 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
4991 Jakub Jelinek <jakub@redhat.com>
4994 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
4995 empty base class artificial fields.
4996 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
4997 different after this fix.
4999 2020-04-23 Jakub Jelinek <jakub@redhat.com>
5002 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
5003 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
5004 if the same type has been diagnosed most recently already.
5006 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5008 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
5010 (__arm_vbicq_n_s16): Likewise.
5011 (__arm_vbicq_n_u32): Likewise.
5012 (__arm_vbicq_n_s32): Likewise.
5013 (__arm_vbicq): Likewise.
5014 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
5015 (__arm_vbicq_n_s32): Likewise.
5016 (__arm_vbicq_n_u16): Likewise.
5017 (__arm_vbicq_n_u32): Likewise.
5018 (__arm_vdupq_m_n_s8): Likewise.
5019 (__arm_vdupq_m_n_s16): Likewise.
5020 (__arm_vdupq_m_n_s32): Likewise.
5021 (__arm_vdupq_m_n_u8): Likewise.
5022 (__arm_vdupq_m_n_u16): Likewise.
5023 (__arm_vdupq_m_n_u32): Likewise.
5024 (__arm_vdupq_m_n_f16): Likewise.
5025 (__arm_vdupq_m_n_f32): Likewise.
5026 (__arm_vldrhq_gather_offset_s16): Likewise.
5027 (__arm_vldrhq_gather_offset_s32): Likewise.
5028 (__arm_vldrhq_gather_offset_u16): Likewise.
5029 (__arm_vldrhq_gather_offset_u32): Likewise.
5030 (__arm_vldrhq_gather_offset_f16): Likewise.
5031 (__arm_vldrhq_gather_offset_z_s16): Likewise.
5032 (__arm_vldrhq_gather_offset_z_s32): Likewise.
5033 (__arm_vldrhq_gather_offset_z_u16): Likewise.
5034 (__arm_vldrhq_gather_offset_z_u32): Likewise.
5035 (__arm_vldrhq_gather_offset_z_f16): Likewise.
5036 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
5037 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
5038 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
5039 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
5040 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
5041 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
5042 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
5043 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
5044 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
5045 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
5046 (__arm_vldrwq_gather_offset_s32): Likewise.
5047 (__arm_vldrwq_gather_offset_u32): Likewise.
5048 (__arm_vldrwq_gather_offset_f32): Likewise.
5049 (__arm_vldrwq_gather_offset_z_s32): Likewise.
5050 (__arm_vldrwq_gather_offset_z_u32): Likewise.
5051 (__arm_vldrwq_gather_offset_z_f32): Likewise.
5052 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
5053 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
5054 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
5055 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
5056 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
5057 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
5058 (__arm_vdwdupq_x_n_u8): Likewise.
5059 (__arm_vdwdupq_x_n_u16): Likewise.
5060 (__arm_vdwdupq_x_n_u32): Likewise.
5061 (__arm_viwdupq_x_n_u8): Likewise.
5062 (__arm_viwdupq_x_n_u16): Likewise.
5063 (__arm_viwdupq_x_n_u32): Likewise.
5064 (__arm_vidupq_x_n_u8): Likewise.
5065 (__arm_vddupq_x_n_u8): Likewise.
5066 (__arm_vidupq_x_n_u16): Likewise.
5067 (__arm_vddupq_x_n_u16): Likewise.
5068 (__arm_vidupq_x_n_u32): Likewise.
5069 (__arm_vddupq_x_n_u32): Likewise.
5070 (__arm_vldrdq_gather_offset_s64): Likewise.
5071 (__arm_vldrdq_gather_offset_u64): Likewise.
5072 (__arm_vldrdq_gather_offset_z_s64): Likewise.
5073 (__arm_vldrdq_gather_offset_z_u64): Likewise.
5074 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
5075 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
5076 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
5077 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
5078 (__arm_vidupq_m_n_u8): Likewise.
5079 (__arm_vidupq_m_n_u16): Likewise.
5080 (__arm_vidupq_m_n_u32): Likewise.
5081 (__arm_vddupq_m_n_u8): Likewise.
5082 (__arm_vddupq_m_n_u16): Likewise.
5083 (__arm_vddupq_m_n_u32): Likewise.
5084 (__arm_vidupq_n_u16): Likewise.
5085 (__arm_vidupq_n_u32): Likewise.
5086 (__arm_vidupq_n_u8): Likewise.
5087 (__arm_vddupq_n_u16): Likewise.
5088 (__arm_vddupq_n_u32): Likewise.
5089 (__arm_vddupq_n_u8): Likewise.
5091 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
5093 * doc/install.texi (D-Specific Options): Document
5094 --enable-libphobos-checking and --with-libphobos-druntime-only.
5096 2020-04-23 Jakub Jelinek <jakub@redhat.com>
5099 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
5100 cxx17_empty_base_seen argument. Pass it to recursive calls.
5101 Ignore cxx17_empty_base_field_p fields after setting
5102 *cxx17_empty_base_seen to true.
5103 (rs6000_discover_homogeneous_aggregate): Adjust
5104 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
5105 aggregates with C++17 empty base fields.
5108 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
5109 if last_decl is error_mark_node or has such a TREE_TYPE.
5112 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
5113 if last_decl is error_mark_node or has such a TREE_TYPE.
5115 2020-04-22 Felix Yang <felix.yang@huawei.com>
5118 * config/aarch64/aarch64.h (TARGET_SVE):
5119 Add && !TARGET_GENERAL_REGS_ONLY.
5120 (TARGET_SVE2): Add && TARGET_SVE.
5121 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
5122 TARGET_SVE2_SM4): Add && TARGET_SVE2.
5123 * config/aarch64/aarch64-sve-builtins.h
5124 (sve_switcher::m_old_general_regs_only): New member.
5125 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
5127 (reported_missing_registers_p): New variable.
5128 (check_required_extensions): Call check_required_registers before
5129 return if all required extenstions are present.
5130 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
5131 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
5132 global_options.x_target_flags.
5133 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
5134 global_options.x_target_flags if m_old_general_regs_only is true.
5136 2020-04-22 Zackery Spytz <zspytz@gmail.com>
5138 * doc/extend.exi: Add "free" to list of other builtin functions
5141 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
5144 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
5146 (store_quadpti): Ditto.
5147 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
5148 plq will be used and doesn't need it.
5149 (atomic_store<mode>): Ditto, for pstq.
5151 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
5153 * doc/invoke.texi: Update flags turned on by -O3.
5155 2020-04-22 Jakub Jelinek <jakub@redhat.com>
5158 * config/ia64/ia64.c (hfa_element_mode): Ignore
5159 cxx17_empty_base_field_p fields.
5162 * calls.h (cxx17_empty_base_field_p): Declare.
5163 * calls.c (cxx17_empty_base_field_p): Define.
5165 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
5167 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
5169 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5170 Andre Vieira <andre.simoesdiasvieira@arm.com>
5171 Mihail Ionescu <mihail.ionescu@arm.com>
5173 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
5174 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
5175 (ALL_QUIRKS): Add quirk_no_asmcpu.
5176 (cortex-m55): Define new cpu.
5177 * config/arm/arm-tables.opt: Regenerate.
5178 * config/arm/arm-tune.md: Likewise.
5179 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
5181 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
5183 PR tree-optimization/94700
5184 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
5185 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
5186 of similarly-structured but distinct vector types.
5188 2020-04-21 Martin Sebor <msebor@redhat.com>
5191 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
5192 the computation of the lower bound of the source access size.
5193 (builtin_access::generic_overlap): Remove a hack for setting ranges
5196 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
5198 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
5199 (ASM_WEAKEN_DECL): New define.
5200 (HAVE_GAS_WEAKREF): Undefine.
5202 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
5204 PR tree-optimization/94683
5205 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
5206 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
5207 but distinct vector types.
5209 2020-04-21 Jakub Jelinek <jakub@redhat.com>
5212 * stor-layout.c (place_field, finalize_record_size): Don't emit
5213 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
5214 * ubsan.c (ubsan_get_type_descriptor_type,
5215 ubsan_get_source_location_type, ubsan_create_data): Set
5217 * asan.c (asan_global_struct): Likewise.
5219 2020-04-21 Duan bo <duanbo3@huawei.com>
5222 * config/aarch64/aarch64.c: Add an error message for option conflict.
5223 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
5224 incompatible with -fpic, -fPIC and -mabi=ilp32.
5226 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
5229 * omp-low.c (new_omp_context): Remove assignments to
5230 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
5232 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5234 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
5235 ("popcountv2di2_vx"): Use simplify_gen_subreg.
5237 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5240 * config/s390/s390-builtin-types.def: Add 3 new function modes.
5241 * config/s390/s390-builtins.def: Add mode dependent low-level
5242 builtin and map the overloaded builtins to these.
5243 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
5244 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
5246 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5248 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
5249 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
5250 estimated VF and is no worse at double the estimated VF.
5252 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5255 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
5256 order of arguments to rtx_vector_builder.
5257 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
5258 When extending the trailing constants to a full vector, replace any
5259 variables with zeros.
5261 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
5264 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
5267 2020-04-20 Martin Liska <mliska@suse.cz>
5269 * symtab.c (symtab_node::dump_references): Add space after
5271 (symtab_node::dump_referring): Likewise.
5273 2020-04-18 Jeff Law <law@redhat.com>
5276 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
5279 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
5281 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
5282 attributes): Document d_runtime_has_std_library.
5284 2020-04-17 Jeff Law <law@redhat.com>
5286 PR rtl-optimization/90275
5287 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
5288 when the destination has a REG_UNUSED note.
5290 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
5293 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
5296 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
5298 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
5299 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
5300 cost of load and store insns if one loop iteration has enough scalar
5301 elements to use an Advanced SIMD LDP or STP.
5302 (aarch64_add_stmt_cost): Update call accordingly.
5304 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5305 Jeff Law <law@redhat.com>
5308 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
5309 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
5310 or pos + len >= 32, or pos + len is equal to operands[2] precision
5311 and operands[2] is not a register operand. During splitting perform
5312 SImode AND if operands[0] doesn't have CCZmode and pos + len is
5313 equal to mode precision.
5315 2020-04-17 Richard Biener <rguenther@suse.de>
5318 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
5320 * dwarf2out.c (dw_val_equal_p): Fix pasto in
5321 dw_val_class_vms_delta comparison.
5322 * optabs.c (expand_binop_directly): Fix pasto in commutation
5324 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
5327 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5329 PR rtl-optimization/94618
5330 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
5331 insn is the BB_END of its block, but also when it is only followed
5332 by DEBUG_INSNs in its block.
5334 PR tree-optimization/94621
5335 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
5336 Move id->adjust_array_error_bounds check first in the condition.
5338 2020-04-17 Martin Liska <mliska@suse.cz>
5339 Jonathan Yong <10walls@gmail.com>
5341 PR gcov-profile/94570
5342 * coverage.c (coverage_init): Use separator properly.
5344 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
5346 PR rtl-optimization/93974
5347 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
5348 (rs6000_cannot_substitute_mem_equiv_p): New function.
5350 2020-04-16 Martin Jambor <mjambor@suse.cz>
5353 * ipa-inline.h (ipa_saved_clone_sources): Declare.
5354 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
5355 (save_inline_function_body): Link the new body holder with the
5357 * cgraph.c: Include ipa-inline.h.
5358 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
5359 the statement in ipa_saved_clone_sources.
5360 * cgraphunit.c: Include ipa-inline.h.
5361 (expand_all_functions): Free ipa_saved_clone_sources.
5363 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5366 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
5367 the VNx16BI lowpart of the recursively-generated constant.
5369 2020-04-16 Martin Liska <mliska@suse.cz>
5370 Jakub Jelinek <jakub@redhat.com>
5373 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
5374 DECL_IS_REPLACEABLE_OPERATOR during cloning.
5375 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
5376 (propagate_necessity): Check operator names.
5378 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5380 PR rtl-optimization/94605
5381 * early-remat.c (early_remat::process_block): Handle insns that
5382 set multiple candidate registers.
5383 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
5385 PR gcov-profile/93401
5386 * common.opt (profile-prefix-path): New option.
5387 * coverae.c: Include diagnostics.h.
5388 (coverage_init): Strip profile prefix path.
5389 * doc/invoke.texi (-fprofile-prefix-path): Document.
5391 2020-04-16 Richard Biener <rguenther@suse.de>
5394 * expr.c (emit_move_multi_word): Do not generate code when
5395 the destination part is undefined_operand_subword_p.
5396 * lower-subreg.c (resolve_clobber): Look through a paradoxica
5399 2020-04-16 Martin Jambor <mjambor@suse.cz>
5401 PR tree-optimization/94598
5402 * tree-sra.c (verify_sra_access_forest): Fix verification of total
5403 scalarization accesses under access to one-element arrays.
5405 2020-04-16 Jakub Jelinek <jakub@redhat.com>
5408 * function.c (assign_parm_find_data_types): Add workaround for
5409 BROKEN_VALUE_INITIALIZATION compilers.
5411 2020-04-16 Richard Biener <rguenther@suse.de>
5413 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
5416 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
5419 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
5420 Require OPTION_MASK_ISA_SSE2.
5422 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
5425 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
5426 Don't construct a dump_context temporary to call static method.
5428 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
5430 * config/aarch64/falkor-tag-collision-avoidance.c
5431 (valid_src_p): Check for aarch64_address_info type before
5432 accessing base field.
5434 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
5436 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
5437 (V_sz_elem2): Remove unused mode attribute.
5439 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
5441 * config/arm/arm.md (arm_movdi): Disallow for MVE.
5443 2020-04-15 Richard Biener <rguenther@suse.de>
5446 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
5447 alias_sets_conflict_p for pointers.
5449 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
5452 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
5453 (extendhisi2_internal): Add %v1 before the load instructions.
5455 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
5458 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
5459 use PC-relative addressing for TLS references.
5461 2020-04-14 Martin Jambor <mjambor@suse.cz>
5464 * ipa-sra.c: Include internal-fn.h.
5465 (enum isra_scan_context): Update comment.
5466 (scan_function): Treat calls to internal_functions like loads or stores.
5468 2020-04-14 Yang Yang <yangyang305@huawei.com>
5470 PR tree-optimization/94574
5471 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
5472 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
5474 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
5477 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
5479 2020-04-13 Martin Sebor <msebor@redhat.com>
5481 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
5482 -Wformat-truncation. Move -Wzero-length-bounds last.
5483 (-Wrestrict): Document positive form of option enabled by -Wall.
5485 2020-04-13 Zachary Spytz <zspytz@gmail.com>
5487 * doc/extend.texi: Add realloc to list of built-in functions
5488 are recognized by the compiler.
5490 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
5493 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
5494 pointer in word_mode for eh_return epilogues.
5496 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5498 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
5499 memory references in %B, %C and %D operand selectors when the inner
5500 operand is a post increment address.
5502 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5504 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
5505 reference by 4 bytes, and %D memory reference by 6 bytes.
5507 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
5510 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
5511 condition for V4SI, V8HI and V16QI modes.
5513 2020-04-11 Jakub Jelinek <jakub@redhat.com>
5517 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
5520 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
5524 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
5525 "#pragma omp declare target" has also been applied.
5527 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
5529 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
5530 when to emit the epilogue_helper insn.
5531 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
5534 2020-04-09 Jakub Jelinek <jakub@redhat.com>
5537 * cselib.h (cselib_record_sp_cfa_base_equiv,
5538 cselib_sp_derived_value_p): Declare.
5539 * cselib.c (cselib_record_sp_cfa_base_equiv,
5540 cselib_sp_derived_value_p): New functions.
5541 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
5542 cselib_sp_derived_value_p values.
5543 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
5544 start of extended basic blocks other than the first one
5545 for !frame_pointer_needed functions.
5547 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5549 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
5550 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
5551 (aarch64_sve2048_hw): Document.
5552 * config/aarch64/aarch64-protos.h
5553 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
5554 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
5555 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
5556 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
5558 (find_type_suffix_for_scalar_type): Use it instead of comparing
5560 (function_resolver::infer_vector_or_tuple_type): Likewise.
5561 (function_resolver::require_vector_type): Likewise.
5562 (handle_arm_sve_vector_bits_attribute): New function.
5563 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
5564 (aarch64_attribute_table): Add arm_sve_vector_bits.
5565 (aarch64_return_in_memory_1):
5566 (pure_scalable_type_info::piece::get_rtx): New function.
5567 (pure_scalable_type_info::num_zr): Likewise.
5568 (pure_scalable_type_info::num_pr): Likewise.
5569 (pure_scalable_type_info::get_rtx): Likewise.
5570 (pure_scalable_type_info::analyze): Likewise.
5571 (pure_scalable_type_info::analyze_registers): Likewise.
5572 (pure_scalable_type_info::analyze_array): Likewise.
5573 (pure_scalable_type_info::analyze_record): Likewise.
5574 (pure_scalable_type_info::add_piece): Likewise.
5575 (aarch64_some_values_include_pst_objects_p): Likewise.
5576 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
5577 to analyze whether the type is returned in SVE registers.
5578 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
5579 is passed in SVE registers.
5580 (aarch64_pass_by_reference_1): New function, extracted from...
5581 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
5582 to analyze whether the type is a pure scalable type and, if so,
5583 whether it should be passed by reference.
5584 (aarch64_return_in_msb): Return false for pure scalable types.
5585 (aarch64_function_value_1): Fold back into...
5586 (aarch64_function_value): ...this function. Use
5587 pure_scalable_type_info to analyze whether the type is a pure
5588 scalable type and, if so, which registers it should use. Handle
5589 types that include pure scalable types but are not themselves
5590 pure scalable types.
5591 (aarch64_return_in_memory_1): New function, split out from...
5592 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
5593 to analyze whether the type is a pure scalable type and, if so,
5594 whether it should be returned by reference.
5595 (aarch64_layout_arg): Remove orig_mode argument. Use
5596 pure_scalable_type_info to analyze whether the type is a pure
5597 scalable type and, if so, which registers it should use. Handle
5598 types that include pure scalable types but are not themselves
5599 pure scalable types.
5600 (aarch64_function_arg): Update call accordingly.
5601 (aarch64_function_arg_advance): Likewise.
5602 (aarch64_pad_reg_upward): On big-endian targets, return false for
5603 pure scalable types that are smaller than 16 bytes.
5604 (aarch64_member_type_forces_blk): New function.
5605 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
5606 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
5607 correspond to built-in SVE types. Do not rely on a vector mode
5608 if the type includes an pure scalable type. When returning true,
5609 assert that the mode is not an SVE mode.
5610 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
5611 built-in types here. When returning true, assert that the type
5612 does not have an SVE mode.
5613 (aarch64_can_change_mode_class): Don't allow anything to change
5614 between a predicate mode and a non-predicate mode. Also don't
5615 allow changes between SVE vector modes and other modes that
5616 might be bigger than 128 bits.
5617 (aarch64_invalid_binary_op): Reject binary operations that mix
5618 SVE and GNU vector types.
5619 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
5621 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5623 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
5624 "SVE sizeless type".
5625 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
5626 (sizeless_type_p): New functions.
5627 (register_builtin_types): Apply make_type_sizeless to the type.
5628 (register_tuple_type): Likewise.
5629 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
5631 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
5633 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
5636 2020-04-09 Martin Jambor <mjambor@suse.cz>
5637 Richard Biener <rguenther@suse.de>
5639 PR tree-optimization/94482
5640 * tree-sra.c (create_access_replacement): Dump new replacement with
5642 (sra_modify_expr): Fix handling of cases when the original EXPR writes
5643 to only part of the replacement.
5644 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
5645 the first operand of combinations into REAL/IMAGPART_EXPR and
5648 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
5650 * doc/sourcebuild.texi (check-function-bodies): Treat the third
5651 parameter as a list of option regexps and require each regexp
5654 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
5657 * config/aarch64/falkor-tag-collision-avoidance.c
5658 (valid_src_p): Fix missing rtx type check.
5660 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
5661 Richard Biener <rguenther@suse.de>
5663 PR tree-optimization/93674
5664 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
5665 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
5666 or non-mode precision type, add candidate in unsigned type with the
5669 2020-04-08 Clement Chigot <clement.chigot@atos.net>
5671 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
5672 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
5673 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
5675 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5678 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
5680 * reload1.c (eliminate_regs_1): Avoid creating
5681 (plus (reg) (const_int 0)) in DEBUG_INSNs.
5683 PR tree-optimization/94524
5684 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
5685 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
5686 op1 rather than op1 itself at the end. Punt for signed modulo by
5687 most negative constant.
5688 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
5689 modulo by most negative constant.
5691 2020-04-08 Richard Biener <rguenther@suse.de>
5693 PR rtl-optimization/93946
5694 * cse.c (cse_insn): Record the tabled expression in
5695 src_related. Verify a redundant store removal is valid.
5697 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
5700 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
5701 ENDBR at function entry if function will be called indirectly.
5703 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5706 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
5709 2020-04-08 Martin Liska <mliska@suse.cz>
5712 * gimple.c (gimple_call_operator_delete_p): Rename to...
5713 (gimple_call_replaceable_operator_delete_p): ... this.
5714 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
5715 * gimple.h (gimple_call_operator_delete_p): Rename to ...
5716 (gimple_call_replaceable_operator_delete_p): ... this.
5717 * tree-core.h (tree_function_decl): Add replaceable_operator
5719 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
5720 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
5721 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
5722 (eliminate_unnecessary_stmts): Likewise.
5723 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
5724 Pack DECL_IS_REPLACEABLE_OPERATOR.
5725 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
5726 Unpack the field here.
5727 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
5728 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
5729 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
5730 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
5731 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
5732 replaceable operator flags.
5734 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
5735 Matthew Malcomson <matthew.malcomson@arm.com>
5737 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
5738 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
5739 (CX_TERNARY_QUALIFIERS): Likewise.
5740 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
5741 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
5742 (arm_init_acle_builtins): Initialize CDE builtins.
5743 (arm_expand_acle_builtin): Check CDE constant operands.
5744 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
5745 of CDE constant operand.
5746 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
5748 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
5749 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
5750 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
5751 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
5752 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
5753 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
5754 * config/arm/arm_cde_builtins.def: New file.
5755 * config/arm/iterators.md (V_reg): New attribute of SI.
5756 * config/arm/predicates.md (const_int_coproc_operand): New.
5757 (const_int_vcde1_operand, const_int_vcde2_operand): New.
5758 (const_int_vcde3_operand): New.
5759 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
5760 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
5761 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
5762 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
5764 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
5766 * config.gcc: Add arm_cde.h.
5767 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
5768 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
5769 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
5770 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
5771 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
5772 * config/arm/arm.h (TARGET_CDE): New macro.
5773 * config/arm/arm_cde.h: New file.
5774 * doc/invoke.texi: Document CDE options +cdecp[0-7].
5775 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
5777 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
5779 2020-04-08 Jakub Jelinek <jakub@redhat.com>
5781 PR rtl-optimization/94516
5782 * postreload.c: Include rtl-iter.h.
5783 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
5784 looking for all MEMs with RTX_AUTOINC operand.
5785 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
5787 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
5789 * omp-grid.c (grid_eliminate_combined_simd_part): Use
5790 OMP_CLAUSE_CODE to access the omp clause code.
5792 2020-04-07 Jeff Law <law@redhat.com>
5794 PR rtl-optimization/92264
5795 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
5796 the destination is the stack pointer.
5798 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5800 PR rtl-optimization/94291
5801 PR rtl-optimization/84169
5802 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
5803 must be a REG or SUBREG of REG; if it is not one of these, don't
5806 2020-04-07 Richard Biener <rguenther@suse.de>
5809 * gimplify.c (gimplify_addr_expr): Also consider generated
5812 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5814 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
5816 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5818 * config/arm/arm_mve.h: Cast some pointers to expected types.
5820 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5822 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
5823 same with '__arm_' prefix.
5825 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5827 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
5829 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5831 * config/arm/arm.c (arm_mve_immediate_check): Removed.
5832 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
5833 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
5834 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
5835 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
5836 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
5837 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
5839 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5841 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
5843 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5845 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
5846 * config/arm/mve/md: Fix v[id]wdup patterns.
5848 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5850 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
5851 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
5853 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5855 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
5856 and remove const_ptr enums.
5858 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
5860 * config/arm/arm_mve.h (vsubq_n): Merge with...
5862 (vmulq_n): Merge with...
5864 (__ARM_mve_typeid): Simplify scalar and constant detection.
5866 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5869 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
5870 for inter-lane permutation for 64-byte modes.
5873 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
5874 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
5875 Assume it is a REG after that instead of testing it and doing FAIL
5876 otherwise. Formatting fix.
5878 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
5880 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
5882 2020-04-07 Jakub Jelinek <jakub@redhat.com>
5885 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
5886 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
5888 2020-04-06 Jakub Jelinek <jakub@redhat.com>
5890 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
5891 + const0_rtx return the SP_DERIVED_VALUE_P.
5893 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
5895 PR rtl-optimization/92989
5896 * lra-lives.c (process_bb_lives): Do not treat eh_return data
5897 registers as being live at the beginning of the EH receiver.
5899 2020-04-05 Zachary Spytz <zspytz@gmail.com>
5901 * extend.texi: Add free to list of ISO C90 functions that
5902 are recognized by the compiler.
5904 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
5906 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
5909 * config/microblaze/microblaze.md (trap): Update output pattern.
5911 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
5912 Jakub Jelinek <jakub@redhat.com>
5915 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
5916 arrays, pointer-to-members, function types and qualifiers when
5917 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
5918 to emit type again on definition.
5920 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
5923 * ipa-fnsummary.c (vrp_will_run_p): New function.
5924 (fre_will_run_p): New function.
5925 (evaluate_properties_for_edge): Use it.
5926 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
5927 !optimize_debug to optimize_debug.
5929 2020-04-04 Jakub Jelinek <jakub@redhat.com>
5931 PR rtl-optimization/94468
5932 * cselib.c (references_value_p): Formatting fix.
5933 (cselib_useless_value_p): New function.
5934 (discard_useless_locs, discard_useless_values,
5935 cselib_invalidate_regno_val, cselib_invalidate_mem,
5936 cselib_record_set): Use it instead of
5937 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
5940 * tree-iterator.h (expr_single): Declare.
5941 * tree-iterator.c (expr_single): New function.
5942 * tree.h (protected_set_expr_location_if_unset): Declare.
5943 * tree.c (protected_set_expr_location): Use expr_single.
5944 (protected_set_expr_location_if_unset): New function.
5946 2020-04-03 Jeff Law <law@redhat.com>
5948 PR rtl-optimization/92264
5949 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
5950 reloading of auto-increment addressing modes.
5952 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
5955 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
5958 2020-04-03 Jeff Law <law@redhat.com>
5960 PR rtl-optimization/92264
5961 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
5962 post-increment addressing of source operands as well as residuals
5963 when computing any adjustments to the input pointer.
5965 2020-04-03 Jakub Jelinek <jakub@redhat.com>
5968 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
5969 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
5970 second half of first lane from first lane of second operand and
5971 first half of second lane from second lane of first operand.
5973 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
5975 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
5977 2020-04-03 Tamar Christina <tamar.christina@arm.com>
5980 * common/config/aarch64/aarch64-common.c
5981 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
5983 2020-04-03 Richard Biener <rguenther@suse.de>
5986 * tree.c (array_ref_low_bound): Deal with released SSA names
5989 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
5991 * config/gcn/gcn.c (print_operand): Handle unordered comparison
5993 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
5994 comparison operators.
5996 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
5998 PR tree-optimization/94443
5999 * tree-vect-loop.c (vectorizable_live_operation): Use
6000 gsi_insert_seq_before to replace gsi_insert_before.
6002 2020-04-03 Martin Liska <mliska@suse.cz>
6005 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
6006 Compare type attributes for gimple_call_fntypes.
6008 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
6010 * alias.c (get_alias_set): Fix comment typos.
6012 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
6015 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
6016 attribute checking used by TYPE.
6018 2020-04-02 Martin Jambor <mjambor@suse.cz>
6021 * ipa-sra.c (struct caller_issues): New fields candidate and
6022 call_from_outside_comdat.
6023 (check_for_caller_issues): Check for calls from outsied of
6024 candidate's same_comdat_group.
6025 (check_all_callers_for_issues): Set up issues.candidate, check result
6027 (mark_callers_calls_comdat_local): New function.
6028 (process_isra_node_results): Set calls_comdat_local of callers if
6031 2020-04-02 Richard Biener <rguenther@suse.de>
6034 * common.opt (ffinite-loops): Initialize to zero.
6035 * opts.c (default_options_table): Remove OPT_ffinite_loops
6037 * cfgloop.h (loop::finite_p): New member.
6038 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
6039 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
6041 * lto-streamer-in.c (input_cfg): Stream finite_p.
6042 * lto-streamer-out.c (output_cfg): Likewise.
6043 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
6044 from flag_finite_loops at CFG build time.
6045 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
6046 finite_p flag instead of flag_finite_loops.
6047 * doc/invoke.texi (ffinite-loops): Adjust documentation of
6050 2020-04-02 Richard Biener <rguenther@suse.de>
6053 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
6054 DW_TAG_imported_unit.
6056 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
6058 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
6059 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
6062 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
6064 PR tree-optimization/94401
6065 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
6066 access type when loading halves of vector to avoid peeling for gaps.
6068 2020-04-02 Jakub Jelinek <jakub@redhat.com>
6070 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
6071 between a string literal and MIPS_SYSVERSION_SPEC macro.
6073 2020-04-02 Martin Jambor <mjambor@suse.cz>
6075 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
6077 2020-04-02 Jakub Jelinek <jakub@redhat.com>
6079 PR rtl-optimization/92264
6080 * params.opt (-param=max-find-base-term-values=): Decrease default
6083 PR rtl-optimization/92264
6084 * rtl.h (struct rtx_def): Mention that call bit is used as
6085 SP_DERIVED_VALUE_P in cselib.c.
6086 * cselib.c (SP_DERIVED_VALUE_P): Define.
6087 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
6088 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
6089 val_rtx and sp based expression where offsets cancel each other.
6090 (preserve_constants_and_equivs): Formatting fix.
6091 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
6092 locs list for cfa_base_preserved_val if needed. Formatting fix.
6093 (autoinc_split): If the to be returned value is a REG, MEM or
6094 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
6095 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
6096 (rtx_equal_for_cselib_1): Call autoinc_split even if both
6097 expressions are PLUS in Pmode with CONST_INT second operands.
6098 Handle SP_DERIVED_VALUE_P cases.
6099 (cselib_hash_plus_const_int): New function.
6100 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
6101 second operand, as well as for PRE_DEC etc. that ought to be
6102 hashed the same way.
6103 (cselib_subst_to_values): Substitute PLUS with Pmode and
6104 CONST_INT operand if the first operand is a VALUE which has
6105 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
6106 SP_DERIVED_VALUE_P + adjusted offset.
6107 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
6108 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
6109 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
6110 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
6111 on the sp value before calling cselib_add_permanent_equiv on the
6113 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
6114 in the insn without REG_INC note.
6115 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
6116 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
6119 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
6120 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
6122 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6125 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
6126 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
6127 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
6128 intrinsic defintion by adding a new builtin call to writeback into base
6130 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6131 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6132 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6133 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6134 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6135 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6136 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6137 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6138 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6139 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
6140 builtin's qualifier.
6141 (vldrdq_gather_base_wb_z_u): Likewise.
6142 (vldrwq_gather_base_wb_u): Likewise.
6143 (vldrdq_gather_base_wb_u): Likewise.
6144 (vldrwq_gather_base_wb_z_s): Likewise.
6145 (vldrwq_gather_base_wb_z_f): Likewise.
6146 (vldrdq_gather_base_wb_z_s): Likewise.
6147 (vldrwq_gather_base_wb_s): Likewise.
6148 (vldrwq_gather_base_wb_f): Likewise.
6149 (vldrdq_gather_base_wb_s): Likewise.
6150 (vldrwq_gather_base_nowb_z_u): Define builtin.
6151 (vldrdq_gather_base_nowb_z_u): Likewise.
6152 (vldrwq_gather_base_nowb_u): Likewise.
6153 (vldrdq_gather_base_nowb_u): Likewise.
6154 (vldrwq_gather_base_nowb_z_s): Likewise.
6155 (vldrwq_gather_base_nowb_z_f): Likewise.
6156 (vldrdq_gather_base_nowb_z_s): Likewise.
6157 (vldrwq_gather_base_nowb_s): Likewise.
6158 (vldrwq_gather_base_nowb_f): Likewise.
6159 (vldrdq_gather_base_nowb_s): Likewise.
6160 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
6162 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
6163 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
6164 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
6165 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
6166 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
6167 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
6168 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
6169 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
6170 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
6171 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
6172 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
6174 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
6176 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
6177 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
6178 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
6179 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
6180 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
6181 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
6182 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
6183 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
6184 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
6186 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
6187 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
6188 Remove constraints from expander.
6189 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
6190 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
6191 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
6192 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
6193 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
6194 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
6196 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
6198 PR rtl-optimization/94123
6199 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
6200 flag_split_wide_types_early.
6202 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
6204 * doc/extend.texi (Common Function Attributes): Fix typo.
6206 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
6209 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
6212 2020-04-01 Zackery Spytz <zspytz@gmail.com>
6214 * doc/extend.texi: Fix a typo in the documentation of the
6215 copy function attribute.
6217 2020-04-01 Jakub Jelinek <jakub@redhat.com>
6220 * tree-object-size.c (pass_object_sizes::execute): Don't call
6221 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
6222 call replace_call_with_value.
6224 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
6226 PR tree-optimization/94043
6227 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
6228 phi for vec_lhs and use it for lane extraction.
6230 2020-03-31 Felix Yang <felix.yang@huawei.com>
6232 PR tree-optimization/94398
6233 * tree-vect-stmts.c (vectorizable_store): Instead of calling
6234 vect_supportable_dr_alignment, set alignment_support_scheme to
6235 dr_unaligned_supported for gather-scatter accesses.
6236 (vectorizable_load): Likewise.
6238 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
6240 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
6242 (vnsi, VnSI, vndi, VnDI): New mode attributes.
6243 (mov<mode>): Use <VnDI> in place of V64DI.
6244 (mov<mode>_exec): Likewise.
6245 (mov<mode>_sgprbase): Likewise.
6246 (reload_out<mode>): Likewise.
6247 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
6248 (gather_load<mode>v64si): Rename to ...
6249 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
6250 and <VnDI> in place of V64DI.
6251 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
6252 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
6253 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
6254 (scatter_store<mode>v64si): Rename to ...
6255 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6256 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
6257 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
6258 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
6259 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
6260 (ds_bpermute<mode>): Use <VnSI>.
6261 (addv64si3_vcc<exec_vcc>): Rename to ...
6262 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6263 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
6264 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
6265 (addcv64si3<exec_vcc>): Rename to ...
6266 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
6267 (subv64si3_vcc<exec_vcc>): Rename to ...
6268 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6269 (subcv64si3<exec_vcc>): Rename to ...
6270 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
6271 (addv64di3): Rename to ...
6272 (add<mode>3): ... this, and use V_DI.
6273 (addv64di3_exec): Rename to ...
6274 (add<mode>3_exec): ... this, and use V_DI.
6275 (subv64di3): Rename to ...
6276 (sub<mode>3): ... this, and use V_DI.
6277 (subv64di3_exec): Rename to ...
6278 (sub<mode>3_exec): ... this, and use V_DI.
6279 (addv64di3_zext): Rename to ...
6280 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
6281 (addv64di3_zext_exec): Rename to ...
6282 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6283 (addv64di3_zext_dup): Rename to ...
6284 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
6285 (addv64di3_zext_dup_exec): Rename to ...
6286 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
6287 (addv64di3_zext_dup2): Rename to ...
6288 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6289 (addv64di3_zext_dup2_exec): Rename to ...
6290 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6291 (addv64di3_sext_dup2): Rename to ...
6292 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
6293 (addv64di3_sext_dup2_exec): Rename to ...
6294 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
6295 (<su>mulv64si3_highpart<exec>): Rename to ...
6296 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
6297 (mulv64di3): Rename to ...
6298 (mul<mode>3): ... this, and use V_DI and <VnSI>.
6299 (mulv64di3_exec): Rename to ...
6300 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
6301 (mulv64di3_zext): Rename to ...
6302 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
6303 (mulv64di3_zext_exec): Rename to ...
6304 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6305 (mulv64di3_zext_dup2): Rename to ...
6306 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6307 (mulv64di3_zext_dup2_exec): Rename to ...
6308 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6309 (<expander>v64di3): Rename to ...
6310 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
6311 (<expander>v64di3_exec): Rename to ...
6312 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
6313 (<expander>v64si3<exec>): Rename to ...
6314 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6315 (v<expander>v64si3<exec>): Rename to ...
6316 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6317 (<expander>v64si3<exec>): Rename to ...
6318 (<expander><vnsi>3<exec>): ... this, and use V_SI.
6319 (subv64df3<exec>): Rename to ...
6320 (sub<mode>3<exec>): ... this, and use V_DF.
6321 (truncv64di<mode>2): Rename to ...
6322 (trunc<vndi><mode>2): ... this, and use <VnDI>.
6323 (truncv64di<mode>2_exec): Rename to ...
6324 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
6325 (<convop><mode>v64di2): Rename to ...
6326 (<convop><mode><vndi>2): ... this, and use <VnDI>.
6327 (<convop><mode>v64di2_exec): Rename to ...
6328 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
6329 (vec_cmp<u>v64qidi): Rename to ...
6330 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
6331 (vec_cmp<u>v64qidi_exec): Rename to ...
6332 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
6333 (vcond_mask_<mode>di): Use <VnDI>.
6334 (maskload<mode>di): Likewise.
6335 (maskstore<mode>di): Likewise.
6336 (mask_gather_load<mode>v64si): Rename to ...
6337 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6338 (mask_scatter_store<mode>v64si): Rename to ...
6339 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6340 (*<reduc_op>_dpp_shr_v64di): Rename to ...
6341 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6342 (*plus_carry_in_dpp_shr_v64si): Rename to ...
6343 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
6344 (*plus_carry_dpp_shr_v64di): Rename to ...
6345 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6346 (vec_seriesv64si): Rename to ...
6347 (vec_series<mode>): ... this, and use V_SI.
6348 (vec_seriesv64di): Rename to ...
6349 (vec_series<mode>): ... this, and use V_DI.
6351 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6353 * config/arc/arc.c (arc_print_operand): Use
6354 HOST_WIDE_INT_PRINT_DEC macro.
6356 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6358 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
6360 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6362 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
6364 (__arm_vbicq): Likewise.
6366 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
6368 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
6370 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6372 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
6373 common section of both MVE Integer and MVE Floating Point.
6375 (vaddlvq_p): Likewise.
6376 (vaddvaq): Likewise.
6377 (vaddvq_p): Likewise.
6378 (vcmpcsq): Likewise.
6379 (vmlsdavxq): Likewise.
6380 (vmlsdavq): Likewise.
6381 (vmladavxq): Likewise.
6382 (vmladavq): Likewise.
6384 (vminavq): Likewise.
6386 (vmaxavq): Likewise.
6387 (vmlaldavq): Likewise.
6388 (vcmphiq): Likewise.
6389 (vaddlvaq): Likewise.
6390 (vrmlaldavhq): Likewise.
6391 (vrmlaldavhxq): Likewise.
6392 (vrmlsldavhq): Likewise.
6393 (vrmlsldavhxq): Likewise.
6394 (vmlsldavxq): Likewise.
6395 (vmlsldavq): Likewise.
6397 (vrmlaldavhaq): Likewise.
6398 (vcmpgeq_m_n): Likewise.
6399 (vmlsdavxq_p): Likewise.
6400 (vmlsdavq_p): Likewise.
6401 (vmlsdavaxq): Likewise.
6402 (vmlsdavaq): Likewise.
6403 (vaddvaq_p): Likewise.
6404 (vcmpcsq_m_n): Likewise.
6405 (vcmpcsq_m): Likewise.
6406 (vmladavxq_p): Likewise.
6407 (vmladavq_p): Likewise.
6408 (vmladavaxq): Likewise.
6409 (vmladavaq): Likewise.
6410 (vminvq_p): Likewise.
6411 (vminavq_p): Likewise.
6412 (vmaxvq_p): Likewise.
6413 (vmaxavq_p): Likewise.
6414 (vcmphiq_m): Likewise.
6415 (vaddlvaq_p): Likewise.
6416 (vmlaldavaq): Likewise.
6417 (vmlaldavaxq): Likewise.
6418 (vmlaldavq_p): Likewise.
6419 (vmlaldavxq_p): Likewise.
6420 (vmlsldavaq): Likewise.
6421 (vmlsldavaxq): Likewise.
6422 (vmlsldavq_p): Likewise.
6423 (vmlsldavxq_p): Likewise.
6424 (vrmlaldavhaxq): Likewise.
6425 (vrmlaldavhq_p): Likewise.
6426 (vrmlaldavhxq_p): Likewise.
6427 (vrmlsldavhaq): Likewise.
6428 (vrmlsldavhaxq): Likewise.
6429 (vrmlsldavhq_p): Likewise.
6430 (vrmlsldavhxq_p): Likewise.
6431 (vabavq_p): Likewise.
6432 (vmladavaq_p): Likewise.
6433 (vstrbq_scatter_offset): Likewise.
6434 (vstrbq_p): Likewise.
6435 (vstrbq_scatter_offset_p): Likewise.
6436 (vstrdq_scatter_base_p): Likewise.
6437 (vstrdq_scatter_base): Likewise.
6438 (vstrdq_scatter_offset_p): Likewise.
6439 (vstrdq_scatter_offset): Likewise.
6440 (vstrdq_scatter_shifted_offset_p): Likewise.
6441 (vstrdq_scatter_shifted_offset): Likewise.
6442 (vmaxq_x): Likewise.
6443 (vminq_x): Likewise.
6444 (vmovlbq_x): Likewise.
6445 (vmovltq_x): Likewise.
6446 (vmulhq_x): Likewise.
6447 (vmullbq_int_x): Likewise.
6448 (vmullbq_poly_x): Likewise.
6449 (vmulltq_int_x): Likewise.
6450 (vmulltq_poly_x): Likewise.
6453 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6456 * config/aarch64/constraints.md (Uph): New constraint.
6457 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
6458 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
6461 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
6462 Jakub Jelinek <jakub@redhat.com>
6465 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
6466 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
6468 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6470 PR tree-optimization/94403
6471 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
6472 ENUMERAL_TYPE lhs_type.
6474 PR rtl-optimization/94344
6475 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
6476 conversions, either on both operands of |^+ or just one. Handle
6477 also extra same precision conversion on RSHIFT_EXPR first operand
6478 provided RSHIFT_EXPR is performed in unsigned type.
6480 2020-03-30 David Malcolm <dmalcolm@redhat.com>
6482 * lra.c (finish_insn_code_data_once): Set the array elements
6483 to NULL after freeing them.
6485 2020-03-30 Andreas Schwab <schwab@suse.de>
6487 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
6490 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
6492 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
6493 to skip defining builtins based on builtin_mask.
6495 2020-03-30 Jakub Jelinek <jakub@redhat.com>
6498 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
6499 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
6500 operand is a register. Don't enable masked variants for V*[QH]Imode.
6503 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
6504 <store_mask_constraint> instead of m in output operand constraint.
6505 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
6508 2020-03-30 Alan Modra <amodra@gmail.com>
6510 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
6511 (rs6000_indirect_call_template_1): Adjust to suit.
6512 * config/rs6000/rs6000.md (call_local): Merge call_local32,
6513 call_local64, and call_local_aix.
6514 (call_value_local): Simlarly.
6515 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
6516 and disable pattern when CALL_LONG.
6517 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
6518 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
6519 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
6521 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
6524 * doc/invoke.texi: Update -falign-functions, -falign-loops and
6525 -falign-jumps documentation.
6527 2020-03-29 Martin Liska <mliska@suse.cz>
6530 * cgraphunit.c (process_function_and_variable_attributes): Remove
6531 double 'attribute' words.
6533 2020-03-29 John David Anglin <dave.anglin@bell.net>
6535 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
6538 2020-03-28 Jakub Jelinek <jakub@redhat.com>
6541 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
6542 to true after setting size to integer_one_node.
6544 PR tree-optimization/94329
6545 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
6546 on the last stmt in a bb, make sure gsi_prev isn't done immediately
6549 2020-03-27 Alan Modra <amodra@gmail.com>
6552 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
6553 for PLT16_LO and PLT_PCREL.
6554 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
6555 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
6556 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
6558 2020-03-27 Martin Sebor <msebor@redhat.com>
6561 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
6563 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
6565 * config/gcn/gcn-valu.md:
6566 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
6567 (VEC_1REG_MODE): Delete.
6568 (VEC_1REG_ALT): Delete.
6569 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
6570 (VEC_1REG_INT_MODE): Delete.
6571 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
6572 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
6573 (VEC_2REG_MODE): Rename to V_2REG throughout.
6574 (VEC_REG_MODE): Rename to V_noHI throughout.
6575 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
6576 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
6577 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
6578 (VEC_INT_MODE): Delete.
6579 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
6580 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
6581 (FP_MODE): Delete and replace with FP throughout.
6582 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
6583 (VCMP_MODE): Rename to V_noQI throughout and move to top.
6584 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
6585 * config/gcn/gcn.md (FP): New mode iterator.
6586 (FP_1REG): New mode iterator.
6588 2020-03-27 David Malcolm <dmalcolm@redhat.com>
6590 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
6591 now emits two .dot files.
6592 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
6593 (graphviz_out::end_tr): Only close a TR, not a TD.
6594 (graphviz_out::begin_td): New.
6595 (graphviz_out::end_td): New.
6596 (graphviz_out::begin_trtd): New, replacing the old implementation
6597 of graphviz_out::begin_tr.
6598 (graphviz_out::end_tdtr): New, replacing the old implementation
6599 of graphviz_out::end_tr.
6600 * graphviz.h (graphviz_out::begin_td): New decl.
6601 (graphviz_out::end_td): New decl.
6602 (graphviz_out::begin_trtd): New decl.
6603 (graphviz_out::end_tdtr): New decl.
6605 2020-03-27 Richard Biener <rguenther@suse.de>
6608 * dwarf2out.c (should_emit_struct_debug): Return false for
6611 2020-03-27 Richard Biener <rguenther@suse.de>
6613 PR tree-optimization/94352
6614 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
6616 (ssa_propagation_engine::ssa_propagate): ... here after
6617 initializing curr_order.
6619 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
6621 PR tree-optimization/90332
6622 * tree-vect-stmts.c (vector_vector_composition_type): New function.
6623 (get_group_load_store_type): Adjust to call
6624 vector_vector_composition_type, extend it to construct with scalar
6626 (vectorizable_load): Likewise.
6628 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
6630 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
6631 (create_ddg_dep_no_link): Likewise.
6632 (add_cross_iteration_register_deps): Move debug instruction check.
6633 Other minor refactoring.
6634 (add_intra_loop_mem_dep): Do not check for debug instructions.
6635 (add_inter_loop_mem_dep): Likewise.
6636 (build_intra_loop_deps): Likewise.
6637 (create_ddg): Do not include debug insns into the graph.
6638 * ddg.h (struct ddg): Remove num_debug field.
6639 * modulo-sched.c (doloop_register_get): Adjust condition.
6640 (res_MII): Remove DDG num_debug field usage.
6641 (sms_schedule_by_order): Use assertion against debug insns.
6642 (ps_has_conflicts): Drop debug insn check.
6644 2020-03-26 Jakub Jelinek <jakub@redhat.com>
6647 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
6648 that contains exactly one non-DEBUG_BEGIN_STMT statement.
6651 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
6652 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
6653 a single non-debug stmt followed by one or more debug stmts.
6654 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
6655 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
6656 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
6657 gimple_seq_last to check if outer_stmt gbind could be reused and
6658 if yes and it is surrounded by any debug stmts, move them into the
6661 PR rtl-optimization/92264
6662 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
6663 for sp based values in !frame_pointer_needed
6664 && !ACCUMULATE_OUTGOING_ARGS functions.
6666 2020-03-26 Felix Yang <felix.yang@huawei.com>
6668 PR tree-optimization/94269
6669 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
6671 operation to single basic block.
6673 2020-03-25 Jeff Law <law@redhat.com>
6675 PR rtl-optimization/90275
6676 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
6679 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6682 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
6683 mode rather than VOIDmode.
6685 2020-03-25 Martin Sebor <msebor@redhat.com>
6688 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
6689 even for alloca calls resulting from system macro expansion.
6690 Include inlining context in all warnings.
6692 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
6695 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
6696 FPRs to change between SDmode and DDmode.
6698 2020-03-25 Martin Sebor <msebor@redhat.com>
6700 PR tree-optimization/94131
6701 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
6703 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
6704 types have constant sizes.
6706 2020-03-25 Martin Liska <mliska@suse.cz>
6709 * configure.ac: Report error only when --with-zstd
6711 * configure: Regenerate.
6713 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6716 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
6717 INSN_CODE (insn) to -1 when changing the pattern.
6719 2020-03-25 Martin Liska <mliska@suse.cz>
6723 * config/i386/i386-features.c (make_resolver_func): Drop
6724 public flag for resolver.
6725 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
6726 group for resolver and drop public flag if possible.
6727 * multiple_target.c (create_dispatcher_calls): Drop unique_name
6728 and resolution as we want to enable LTO privatization of the default
6731 2020-03-25 Martin Liska <mliska@suse.cz>
6734 * configure.ac: Respect --without-zstd and report
6735 error when we can't find header file with --with-zstd.
6736 * configure: Regenerate.
6738 2020-03-25 Jakub Jelinek <jakub@redhat.com>
6741 * varasm.c (output_constructor_array_range): If local->index
6742 RANGE_EXPR doesn't start at the current location in the constructor,
6743 skip needed number of bytes using assemble_zeros or assert we don't
6747 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
6748 counter instead of DECL_UID.
6750 PR tree-optimization/94300
6751 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
6752 is positive, make sure that off + size isn't larger than needed_len.
6754 2020-03-25 Richard Biener <rguenther@suse.de>
6755 Jakub Jelinek <jakub@redhat.com>
6758 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
6760 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
6762 * doc/sourcebuild.texi (ARM-specific attributes): Add
6764 (Features for dg-add-options): Add arm_fp_dp.
6766 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
6769 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
6771 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
6774 * omp-offload.c (omp_finish_file): Fix target-link handling if
6775 targetm_common.have_named_sections is false.
6777 2020-03-24 Jakub Jelinek <jakub@redhat.com>
6780 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
6784 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
6785 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
6786 If not after and at *incr_pos is a debug stmt, set stmt location to
6787 location of next non-debug stmt after it if any.
6790 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
6791 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
6792 worklist or set GF_PLF_2 just because it is used in a debug stmt in
6793 another bb. Formatting improvements.
6796 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
6797 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
6798 regardless of whether TREE_NO_WARNING is set on it or whether
6799 warn_unused_function is true or not.
6801 2020-03-23 Jeff Law <law@redhat.com>
6803 PR rtl-optimization/90275
6806 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
6807 (simplify_logical_relational_operation): Use it.
6809 2020-03-23 Jakub Jelinek <jakub@redhat.com>
6812 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
6813 ultimate rhs and if returned something different, reconstructing
6816 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
6818 * opts.c (print_filtered_help): Improve the help text for alias options.
6820 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6821 Andre Vieira <andre.simoesdiasvieira@arm.com>
6822 Mihail Ionescu <mihail.ionescu@arm.com>
6824 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
6825 (vshlcq_m_u8): Likewise.
6826 (vshlcq_m_s16): Likewise.
6827 (vshlcq_m_u16): Likewise.
6828 (vshlcq_m_s32): Likewise.
6829 (vshlcq_m_u32): Likewise.
6830 (__arm_vshlcq_m_s8): Define intrinsic.
6831 (__arm_vshlcq_m_u8): Likewise.
6832 (__arm_vshlcq_m_s16): Likewise.
6833 (__arm_vshlcq_m_u16): Likewise.
6834 (__arm_vshlcq_m_s32): Likewise.
6835 (__arm_vshlcq_m_u32): Likewise.
6836 (vshlcq_m): Define polymorphic variant.
6837 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
6838 Use builtin qualifier.
6839 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
6840 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
6841 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
6842 (mve_vshlcq_m_<supf><mode>): Likewise.
6844 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6846 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
6847 (UQSHL_QUALIFIERS): Likewise.
6848 (ASRL_QUALIFIERS): Likewise.
6849 (SQSHL_QUALIFIERS): Likewise.
6850 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
6852 (sqrshr): Define macro.
6853 (sqrshrl): Likewise.
6854 (sqrshrl_sat48): Likewise.
6860 (uqrshll): Likewise.
6861 (uqrshll_sat48): Likewise.
6868 (__arm_lsll): Define intrinsic.
6869 (__arm_asrl): Likewise.
6870 (__arm_uqrshll): Likewise.
6871 (__arm_uqrshll_sat48): Likewise.
6872 (__arm_sqrshrl): Likewise.
6873 (__arm_sqrshrl_sat48): Likewise.
6874 (__arm_uqshll): Likewise.
6875 (__arm_urshrl): Likewise.
6876 (__arm_srshrl): Likewise.
6877 (__arm_sqshll): Likewise.
6878 (__arm_uqrshl): Likewise.
6879 (__arm_sqrshr): Likewise.
6880 (__arm_uqshl): Likewise.
6881 (__arm_urshr): Likewise.
6882 (__arm_sqshl): Likewise.
6883 (__arm_srshr): Likewise.
6884 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
6886 (UQSHL_QUALIFIERS): Likewise.
6887 (ASRL_QUALIFIERS): Likewise.
6888 (SQSHL_QUALIFIERS): Likewise.
6889 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
6890 (mve_sqrshrl_sat<supf>_di): Likewise.
6891 (mve_uqrshl_si): Likewise.
6892 (mve_sqrshr_si): Likewise.
6893 (mve_uqshll_di): Likewise.
6894 (mve_urshrl_di): Likewise.
6895 (mve_uqshl_si): Likewise.
6896 (mve_urshr_si): Likewise.
6897 (mve_sqshl_si): Likewise.
6898 (mve_srshr_si): Likewise.
6899 (mve_srshrl_di): Likewise.
6900 (mve_sqshll_di): Likewise.
6902 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6903 Andre Vieira <andre.simoesdiasvieira@arm.com>
6904 Mihail Ionescu <mihail.ionescu@arm.com>
6906 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
6907 (vsetq_lane_f32): Likewise.
6908 (vsetq_lane_s16): Likewise.
6909 (vsetq_lane_s32): Likewise.
6910 (vsetq_lane_s8): Likewise.
6911 (vsetq_lane_s64): Likewise.
6912 (vsetq_lane_u8): Likewise.
6913 (vsetq_lane_u16): Likewise.
6914 (vsetq_lane_u32): Likewise.
6915 (vsetq_lane_u64): Likewise.
6916 (vgetq_lane_f16): Likewise.
6917 (vgetq_lane_f32): Likewise.
6918 (vgetq_lane_s16): Likewise.
6919 (vgetq_lane_s32): Likewise.
6920 (vgetq_lane_s8): Likewise.
6921 (vgetq_lane_s64): Likewise.
6922 (vgetq_lane_u8): Likewise.
6923 (vgetq_lane_u16): Likewise.
6924 (vgetq_lane_u32): Likewise.
6925 (vgetq_lane_u64): Likewise.
6926 (__ARM_NUM_LANES): Likewise.
6927 (__ARM_LANEQ): Likewise.
6928 (__ARM_CHECK_LANEQ): Likewise.
6929 (__arm_vsetq_lane_s16): Define intrinsic.
6930 (__arm_vsetq_lane_s32): Likewise.
6931 (__arm_vsetq_lane_s8): Likewise.
6932 (__arm_vsetq_lane_s64): Likewise.
6933 (__arm_vsetq_lane_u8): Likewise.
6934 (__arm_vsetq_lane_u16): Likewise.
6935 (__arm_vsetq_lane_u32): Likewise.
6936 (__arm_vsetq_lane_u64): Likewise.
6937 (__arm_vgetq_lane_s16): Likewise.
6938 (__arm_vgetq_lane_s32): Likewise.
6939 (__arm_vgetq_lane_s8): Likewise.
6940 (__arm_vgetq_lane_s64): Likewise.
6941 (__arm_vgetq_lane_u8): Likewise.
6942 (__arm_vgetq_lane_u16): Likewise.
6943 (__arm_vgetq_lane_u32): Likewise.
6944 (__arm_vgetq_lane_u64): Likewise.
6945 (__arm_vsetq_lane_f16): Likewise.
6946 (__arm_vsetq_lane_f32): Likewise.
6947 (__arm_vgetq_lane_f16): Likewise.
6948 (__arm_vgetq_lane_f32): Likewise.
6949 (vgetq_lane): Define polymorphic variant.
6950 (vsetq_lane): Likewise.
6951 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
6953 (mve_vec_extractv2didi): Likewise.
6954 (mve_vec_extract_sext_internal<mode>): Likewise.
6955 (mve_vec_extract_zext_internal<mode>): Likewise.
6956 (mve_vec_set<mode>_internal): Likewise.
6957 (mve_vec_setv2di_internal): Likewise.
6958 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
6960 (vec_extract<mode><V_elem_l>): Rename to
6961 "neon_vec_extract<mode><V_elem_l>".
6962 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
6963 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
6964 pattern common for MVE and NEON.
6965 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
6968 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
6970 * config/arm/mve.md (earlyclobber_32): New mode attribute.
6971 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
6972 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
6974 2020-03-23 Richard Biener <rguenther@suse.de>
6976 PR tree-optimization/94261
6977 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
6978 IL operand swapping code.
6979 (vect_slp_rearrange_stmts): Do not arrange isomorphic
6980 nodes that would need operation code adjustments.
6982 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
6984 * doc/install.texi (amdgcn-*-amdhsa): Renamed
6985 from amdgcn-unknown-amdhsa; change
6986 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
6988 2020-03-23 Richard Biener <rguenther@suse.de>
6991 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
6992 directly rather than also folding it via build_fold_addr_expr.
6994 2020-03-23 Richard Biener <rguenther@suse.de>
6996 PR tree-optimization/94266
6997 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
6998 addresses of TARGET_MEM_REFs.
7000 2020-03-23 Martin Liska <mliska@suse.cz>
7003 * symtab.c (symtab_node::clone_references): Save speculative_id
7004 as ref may be overwritten by create_reference.
7005 (symtab_node::clone_referring): Likewise.
7006 (symtab_node::clone_reference): Likewise.
7008 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
7010 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
7011 references to Darwin.
7012 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
7013 unconditionally and comment on why.
7015 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
7017 * config/darwin.c (darwin_mergeable_constant_section): Collect
7018 section anchor checks into the caller.
7019 (machopic_select_section): Collect section anchor checks into
7020 the determination of 'effective zero-size' objects. When the
7021 size is unknown, assume it is non-zero, and thus return the
7022 'generic' section for the DECL.
7024 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
7027 * config/darwin.opt: Amend options descriptions.
7029 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
7031 PR rtl-optimization/94052
7032 * lra-constraints.c (simplify_operand_subreg): Reload the inner
7033 register of a paradoxical subreg if simplify_subreg_regno fails
7034 to give a valid hard register for the outer mode.
7036 2020-03-20 Martin Jambor <mjambor@suse.cz>
7038 PR tree-optimization/93435
7039 * params.opt (sra-max-propagations): New parameter.
7040 * tree-sra.c (propagation_budget): New variable.
7041 (budget_for_propagation_access): New function.
7042 (propagate_subaccesses_from_rhs): Use it.
7043 (propagate_subaccesses_from_lhs): Likewise.
7044 (propagate_all_subaccesses): Set up and destroy propagation_budget.
7046 2020-03-20 Carl Love <cel@us.ibm.com>
7049 * config/rs6000/rs6000.c (rs6000_option_override_internal):
7050 Add check for TARGET_FPRND for Power 7 or newer.
7052 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
7055 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
7056 (cgraph_edge::redirect_callee): Move here; likewise.
7057 (cgraph_node::remove_callees): Update calls_comdat_local flag.
7058 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
7060 (cgraph_node::check_calls_comdat_local_p): New member function.
7061 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
7062 (cgraph_edge::redirect_callee): Move offline.
7063 * ipa-fnsummary.c (compute_fn_summary): Do not compute
7064 calls_comdat_local flag here.
7065 * ipa-inline-transform.c (inline_call): Fix updating of
7066 calls_comdat_local flag.
7067 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
7068 * symtab.c (symtab_node::add_to_same_comdat_group): Update
7069 calls_comdat_local flag.
7071 2020-03-20 Richard Biener <rguenther@suse.de>
7073 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
7074 from the possibly modified root.
7076 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7077 Andre Vieira <andre.simoesdiasvieira@arm.com>
7078 Mihail Ionescu <mihail.ionescu@arm.com>
7080 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
7081 (vst1q_p_s8): Likewise.
7082 (vst2q_s8): Likewise.
7083 (vst2q_u8): Likewise.
7084 (vld1q_z_u8): Likewise.
7085 (vld1q_z_s8): Likewise.
7086 (vld2q_s8): Likewise.
7087 (vld2q_u8): Likewise.
7088 (vld4q_s8): Likewise.
7089 (vld4q_u8): Likewise.
7090 (vst1q_p_u16): Likewise.
7091 (vst1q_p_s16): Likewise.
7092 (vst2q_s16): Likewise.
7093 (vst2q_u16): Likewise.
7094 (vld1q_z_u16): Likewise.
7095 (vld1q_z_s16): Likewise.
7096 (vld2q_s16): Likewise.
7097 (vld2q_u16): Likewise.
7098 (vld4q_s16): Likewise.
7099 (vld4q_u16): Likewise.
7100 (vst1q_p_u32): Likewise.
7101 (vst1q_p_s32): Likewise.
7102 (vst2q_s32): Likewise.
7103 (vst2q_u32): Likewise.
7104 (vld1q_z_u32): Likewise.
7105 (vld1q_z_s32): Likewise.
7106 (vld2q_s32): Likewise.
7107 (vld2q_u32): Likewise.
7108 (vld4q_s32): Likewise.
7109 (vld4q_u32): Likewise.
7110 (vld4q_f16): Likewise.
7111 (vld2q_f16): Likewise.
7112 (vld1q_z_f16): Likewise.
7113 (vst2q_f16): Likewise.
7114 (vst1q_p_f16): Likewise.
7115 (vld4q_f32): Likewise.
7116 (vld2q_f32): Likewise.
7117 (vld1q_z_f32): Likewise.
7118 (vst2q_f32): Likewise.
7119 (vst1q_p_f32): Likewise.
7120 (__arm_vst1q_p_u8): Define intrinsic.
7121 (__arm_vst1q_p_s8): Likewise.
7122 (__arm_vst2q_s8): Likewise.
7123 (__arm_vst2q_u8): Likewise.
7124 (__arm_vld1q_z_u8): Likewise.
7125 (__arm_vld1q_z_s8): Likewise.
7126 (__arm_vld2q_s8): Likewise.
7127 (__arm_vld2q_u8): Likewise.
7128 (__arm_vld4q_s8): Likewise.
7129 (__arm_vld4q_u8): Likewise.
7130 (__arm_vst1q_p_u16): Likewise.
7131 (__arm_vst1q_p_s16): Likewise.
7132 (__arm_vst2q_s16): Likewise.
7133 (__arm_vst2q_u16): Likewise.
7134 (__arm_vld1q_z_u16): Likewise.
7135 (__arm_vld1q_z_s16): Likewise.
7136 (__arm_vld2q_s16): Likewise.
7137 (__arm_vld2q_u16): Likewise.
7138 (__arm_vld4q_s16): Likewise.
7139 (__arm_vld4q_u16): Likewise.
7140 (__arm_vst1q_p_u32): Likewise.
7141 (__arm_vst1q_p_s32): Likewise.
7142 (__arm_vst2q_s32): Likewise.
7143 (__arm_vst2q_u32): Likewise.
7144 (__arm_vld1q_z_u32): Likewise.
7145 (__arm_vld1q_z_s32): Likewise.
7146 (__arm_vld2q_s32): Likewise.
7147 (__arm_vld2q_u32): Likewise.
7148 (__arm_vld4q_s32): Likewise.
7149 (__arm_vld4q_u32): Likewise.
7150 (__arm_vld4q_f16): Likewise.
7151 (__arm_vld2q_f16): Likewise.
7152 (__arm_vld1q_z_f16): Likewise.
7153 (__arm_vst2q_f16): Likewise.
7154 (__arm_vst1q_p_f16): Likewise.
7155 (__arm_vld4q_f32): Likewise.
7156 (__arm_vld2q_f32): Likewise.
7157 (__arm_vld1q_z_f32): Likewise.
7158 (__arm_vst2q_f32): Likewise.
7159 (__arm_vst1q_p_f32): Likewise.
7160 (vld1q_z): Define polymorphic variant.
7163 (vst1q_p): Likewise.
7165 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
7167 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
7168 (mve_vld2q<mode>): Likewise.
7169 (mve_vld4q<mode>): Likewise.
7171 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7172 Andre Vieira <andre.simoesdiasvieira@arm.com>
7173 Mihail Ionescu <mihail.ionescu@arm.com>
7175 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
7176 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
7177 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
7178 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
7179 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
7180 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
7181 * config/arm/arm_mve.h (vadciq_s32): Define macro.
7182 (vadciq_u32): Likewise.
7183 (vadciq_m_s32): Likewise.
7184 (vadciq_m_u32): Likewise.
7185 (vadcq_s32): Likewise.
7186 (vadcq_u32): Likewise.
7187 (vadcq_m_s32): Likewise.
7188 (vadcq_m_u32): Likewise.
7189 (vsbciq_s32): Likewise.
7190 (vsbciq_u32): Likewise.
7191 (vsbciq_m_s32): Likewise.
7192 (vsbciq_m_u32): Likewise.
7193 (vsbcq_s32): Likewise.
7194 (vsbcq_u32): Likewise.
7195 (vsbcq_m_s32): Likewise.
7196 (vsbcq_m_u32): Likewise.
7197 (__arm_vadciq_s32): Define intrinsic.
7198 (__arm_vadciq_u32): Likewise.
7199 (__arm_vadciq_m_s32): Likewise.
7200 (__arm_vadciq_m_u32): Likewise.
7201 (__arm_vadcq_s32): Likewise.
7202 (__arm_vadcq_u32): Likewise.
7203 (__arm_vadcq_m_s32): Likewise.
7204 (__arm_vadcq_m_u32): Likewise.
7205 (__arm_vsbciq_s32): Likewise.
7206 (__arm_vsbciq_u32): Likewise.
7207 (__arm_vsbciq_m_s32): Likewise.
7208 (__arm_vsbciq_m_u32): Likewise.
7209 (__arm_vsbcq_s32): Likewise.
7210 (__arm_vsbcq_u32): Likewise.
7211 (__arm_vsbcq_m_s32): Likewise.
7212 (__arm_vsbcq_m_u32): Likewise.
7213 (vadciq_m): Define polymorphic variant.
7215 (vadcq_m): Likewise.
7217 (vsbciq_m): Likewise.
7219 (vsbcq_m): Likewise.
7221 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
7223 (BINOP_UNONE_UNONE_UNONE): Likewise.
7224 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7225 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7226 * config/arm/mve.md (VADCIQ): Define iterator.
7227 (VADCIQ_M): Likewise.
7229 (VSBCQ_M): Likewise.
7231 (VSBCIQ_M): Likewise.
7233 (VADCQ_M): Likewise.
7234 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
7235 (mve_vadciq_<supf>v4si): Likewise.
7236 (mve_vadcq_m_<supf>v4si): Likewise.
7237 (mve_vadcq_<supf>v4si): Likewise.
7238 (mve_vsbciq_m_<supf>v4si): Likewise.
7239 (mve_vsbciq_<supf>v4si): Likewise.
7240 (mve_vsbcq_m_<supf>v4si): Likewise.
7241 (mve_vsbcq_<supf>v4si): Likewise.
7242 (get_fpscr_nzcvqc): Define isns.
7243 (set_fpscr_nzcvqc): Define isns.
7244 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
7245 (UNSPEC_SET_FPSCR_NZCVQC): Define.
7247 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7249 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
7250 (vddupq_x_n_u16): Likewise.
7251 (vddupq_x_n_u32): Likewise.
7252 (vddupq_x_wb_u8): Likewise.
7253 (vddupq_x_wb_u16): Likewise.
7254 (vddupq_x_wb_u32): Likewise.
7255 (vdwdupq_x_n_u8): Likewise.
7256 (vdwdupq_x_n_u16): Likewise.
7257 (vdwdupq_x_n_u32): Likewise.
7258 (vdwdupq_x_wb_u8): Likewise.
7259 (vdwdupq_x_wb_u16): Likewise.
7260 (vdwdupq_x_wb_u32): Likewise.
7261 (vidupq_x_n_u8): Likewise.
7262 (vidupq_x_n_u16): Likewise.
7263 (vidupq_x_n_u32): Likewise.
7264 (vidupq_x_wb_u8): Likewise.
7265 (vidupq_x_wb_u16): Likewise.
7266 (vidupq_x_wb_u32): Likewise.
7267 (viwdupq_x_n_u8): Likewise.
7268 (viwdupq_x_n_u16): Likewise.
7269 (viwdupq_x_n_u32): Likewise.
7270 (viwdupq_x_wb_u8): Likewise.
7271 (viwdupq_x_wb_u16): Likewise.
7272 (viwdupq_x_wb_u32): Likewise.
7273 (vdupq_x_n_s8): Likewise.
7274 (vdupq_x_n_s16): Likewise.
7275 (vdupq_x_n_s32): Likewise.
7276 (vdupq_x_n_u8): Likewise.
7277 (vdupq_x_n_u16): Likewise.
7278 (vdupq_x_n_u32): Likewise.
7279 (vminq_x_s8): Likewise.
7280 (vminq_x_s16): Likewise.
7281 (vminq_x_s32): Likewise.
7282 (vminq_x_u8): Likewise.
7283 (vminq_x_u16): Likewise.
7284 (vminq_x_u32): Likewise.
7285 (vmaxq_x_s8): Likewise.
7286 (vmaxq_x_s16): Likewise.
7287 (vmaxq_x_s32): Likewise.
7288 (vmaxq_x_u8): Likewise.
7289 (vmaxq_x_u16): Likewise.
7290 (vmaxq_x_u32): Likewise.
7291 (vabdq_x_s8): Likewise.
7292 (vabdq_x_s16): Likewise.
7293 (vabdq_x_s32): Likewise.
7294 (vabdq_x_u8): Likewise.
7295 (vabdq_x_u16): Likewise.
7296 (vabdq_x_u32): Likewise.
7297 (vabsq_x_s8): Likewise.
7298 (vabsq_x_s16): Likewise.
7299 (vabsq_x_s32): Likewise.
7300 (vaddq_x_s8): Likewise.
7301 (vaddq_x_s16): Likewise.
7302 (vaddq_x_s32): Likewise.
7303 (vaddq_x_n_s8): Likewise.
7304 (vaddq_x_n_s16): Likewise.
7305 (vaddq_x_n_s32): Likewise.
7306 (vaddq_x_u8): Likewise.
7307 (vaddq_x_u16): Likewise.
7308 (vaddq_x_u32): Likewise.
7309 (vaddq_x_n_u8): Likewise.
7310 (vaddq_x_n_u16): Likewise.
7311 (vaddq_x_n_u32): Likewise.
7312 (vclsq_x_s8): Likewise.
7313 (vclsq_x_s16): Likewise.
7314 (vclsq_x_s32): Likewise.
7315 (vclzq_x_s8): Likewise.
7316 (vclzq_x_s16): Likewise.
7317 (vclzq_x_s32): Likewise.
7318 (vclzq_x_u8): Likewise.
7319 (vclzq_x_u16): Likewise.
7320 (vclzq_x_u32): Likewise.
7321 (vnegq_x_s8): Likewise.
7322 (vnegq_x_s16): Likewise.
7323 (vnegq_x_s32): Likewise.
7324 (vmulhq_x_s8): Likewise.
7325 (vmulhq_x_s16): Likewise.
7326 (vmulhq_x_s32): Likewise.
7327 (vmulhq_x_u8): Likewise.
7328 (vmulhq_x_u16): Likewise.
7329 (vmulhq_x_u32): Likewise.
7330 (vmullbq_poly_x_p8): Likewise.
7331 (vmullbq_poly_x_p16): Likewise.
7332 (vmullbq_int_x_s8): Likewise.
7333 (vmullbq_int_x_s16): Likewise.
7334 (vmullbq_int_x_s32): Likewise.
7335 (vmullbq_int_x_u8): Likewise.
7336 (vmullbq_int_x_u16): Likewise.
7337 (vmullbq_int_x_u32): Likewise.
7338 (vmulltq_poly_x_p8): Likewise.
7339 (vmulltq_poly_x_p16): Likewise.
7340 (vmulltq_int_x_s8): Likewise.
7341 (vmulltq_int_x_s16): Likewise.
7342 (vmulltq_int_x_s32): Likewise.
7343 (vmulltq_int_x_u8): Likewise.
7344 (vmulltq_int_x_u16): Likewise.
7345 (vmulltq_int_x_u32): Likewise.
7346 (vmulq_x_s8): Likewise.
7347 (vmulq_x_s16): Likewise.
7348 (vmulq_x_s32): Likewise.
7349 (vmulq_x_n_s8): Likewise.
7350 (vmulq_x_n_s16): Likewise.
7351 (vmulq_x_n_s32): Likewise.
7352 (vmulq_x_u8): Likewise.
7353 (vmulq_x_u16): Likewise.
7354 (vmulq_x_u32): Likewise.
7355 (vmulq_x_n_u8): Likewise.
7356 (vmulq_x_n_u16): Likewise.
7357 (vmulq_x_n_u32): Likewise.
7358 (vsubq_x_s8): Likewise.
7359 (vsubq_x_s16): Likewise.
7360 (vsubq_x_s32): Likewise.
7361 (vsubq_x_n_s8): Likewise.
7362 (vsubq_x_n_s16): Likewise.
7363 (vsubq_x_n_s32): Likewise.
7364 (vsubq_x_u8): Likewise.
7365 (vsubq_x_u16): Likewise.
7366 (vsubq_x_u32): Likewise.
7367 (vsubq_x_n_u8): Likewise.
7368 (vsubq_x_n_u16): Likewise.
7369 (vsubq_x_n_u32): Likewise.
7370 (vcaddq_rot90_x_s8): Likewise.
7371 (vcaddq_rot90_x_s16): Likewise.
7372 (vcaddq_rot90_x_s32): Likewise.
7373 (vcaddq_rot90_x_u8): Likewise.
7374 (vcaddq_rot90_x_u16): Likewise.
7375 (vcaddq_rot90_x_u32): Likewise.
7376 (vcaddq_rot270_x_s8): Likewise.
7377 (vcaddq_rot270_x_s16): Likewise.
7378 (vcaddq_rot270_x_s32): Likewise.
7379 (vcaddq_rot270_x_u8): Likewise.
7380 (vcaddq_rot270_x_u16): Likewise.
7381 (vcaddq_rot270_x_u32): Likewise.
7382 (vhaddq_x_n_s8): Likewise.
7383 (vhaddq_x_n_s16): Likewise.
7384 (vhaddq_x_n_s32): Likewise.
7385 (vhaddq_x_n_u8): Likewise.
7386 (vhaddq_x_n_u16): Likewise.
7387 (vhaddq_x_n_u32): Likewise.
7388 (vhaddq_x_s8): Likewise.
7389 (vhaddq_x_s16): Likewise.
7390 (vhaddq_x_s32): Likewise.
7391 (vhaddq_x_u8): Likewise.
7392 (vhaddq_x_u16): Likewise.
7393 (vhaddq_x_u32): Likewise.
7394 (vhcaddq_rot90_x_s8): Likewise.
7395 (vhcaddq_rot90_x_s16): Likewise.
7396 (vhcaddq_rot90_x_s32): Likewise.
7397 (vhcaddq_rot270_x_s8): Likewise.
7398 (vhcaddq_rot270_x_s16): Likewise.
7399 (vhcaddq_rot270_x_s32): Likewise.
7400 (vhsubq_x_n_s8): Likewise.
7401 (vhsubq_x_n_s16): Likewise.
7402 (vhsubq_x_n_s32): Likewise.
7403 (vhsubq_x_n_u8): Likewise.
7404 (vhsubq_x_n_u16): Likewise.
7405 (vhsubq_x_n_u32): Likewise.
7406 (vhsubq_x_s8): Likewise.
7407 (vhsubq_x_s16): Likewise.
7408 (vhsubq_x_s32): Likewise.
7409 (vhsubq_x_u8): Likewise.
7410 (vhsubq_x_u16): Likewise.
7411 (vhsubq_x_u32): Likewise.
7412 (vrhaddq_x_s8): Likewise.
7413 (vrhaddq_x_s16): Likewise.
7414 (vrhaddq_x_s32): Likewise.
7415 (vrhaddq_x_u8): Likewise.
7416 (vrhaddq_x_u16): Likewise.
7417 (vrhaddq_x_u32): Likewise.
7418 (vrmulhq_x_s8): Likewise.
7419 (vrmulhq_x_s16): Likewise.
7420 (vrmulhq_x_s32): Likewise.
7421 (vrmulhq_x_u8): Likewise.
7422 (vrmulhq_x_u16): Likewise.
7423 (vrmulhq_x_u32): Likewise.
7424 (vandq_x_s8): Likewise.
7425 (vandq_x_s16): Likewise.
7426 (vandq_x_s32): Likewise.
7427 (vandq_x_u8): Likewise.
7428 (vandq_x_u16): Likewise.
7429 (vandq_x_u32): Likewise.
7430 (vbicq_x_s8): Likewise.
7431 (vbicq_x_s16): Likewise.
7432 (vbicq_x_s32): Likewise.
7433 (vbicq_x_u8): Likewise.
7434 (vbicq_x_u16): Likewise.
7435 (vbicq_x_u32): Likewise.
7436 (vbrsrq_x_n_s8): Likewise.
7437 (vbrsrq_x_n_s16): Likewise.
7438 (vbrsrq_x_n_s32): Likewise.
7439 (vbrsrq_x_n_u8): Likewise.
7440 (vbrsrq_x_n_u16): Likewise.
7441 (vbrsrq_x_n_u32): Likewise.
7442 (veorq_x_s8): Likewise.
7443 (veorq_x_s16): Likewise.
7444 (veorq_x_s32): Likewise.
7445 (veorq_x_u8): Likewise.
7446 (veorq_x_u16): Likewise.
7447 (veorq_x_u32): Likewise.
7448 (vmovlbq_x_s8): Likewise.
7449 (vmovlbq_x_s16): Likewise.
7450 (vmovlbq_x_u8): Likewise.
7451 (vmovlbq_x_u16): Likewise.
7452 (vmovltq_x_s8): Likewise.
7453 (vmovltq_x_s16): Likewise.
7454 (vmovltq_x_u8): Likewise.
7455 (vmovltq_x_u16): Likewise.
7456 (vmvnq_x_s8): Likewise.
7457 (vmvnq_x_s16): Likewise.
7458 (vmvnq_x_s32): Likewise.
7459 (vmvnq_x_u8): Likewise.
7460 (vmvnq_x_u16): Likewise.
7461 (vmvnq_x_u32): Likewise.
7462 (vmvnq_x_n_s16): Likewise.
7463 (vmvnq_x_n_s32): Likewise.
7464 (vmvnq_x_n_u16): Likewise.
7465 (vmvnq_x_n_u32): Likewise.
7466 (vornq_x_s8): Likewise.
7467 (vornq_x_s16): Likewise.
7468 (vornq_x_s32): Likewise.
7469 (vornq_x_u8): Likewise.
7470 (vornq_x_u16): Likewise.
7471 (vornq_x_u32): Likewise.
7472 (vorrq_x_s8): Likewise.
7473 (vorrq_x_s16): Likewise.
7474 (vorrq_x_s32): Likewise.
7475 (vorrq_x_u8): Likewise.
7476 (vorrq_x_u16): Likewise.
7477 (vorrq_x_u32): Likewise.
7478 (vrev16q_x_s8): Likewise.
7479 (vrev16q_x_u8): Likewise.
7480 (vrev32q_x_s8): Likewise.
7481 (vrev32q_x_s16): Likewise.
7482 (vrev32q_x_u8): Likewise.
7483 (vrev32q_x_u16): Likewise.
7484 (vrev64q_x_s8): Likewise.
7485 (vrev64q_x_s16): Likewise.
7486 (vrev64q_x_s32): Likewise.
7487 (vrev64q_x_u8): Likewise.
7488 (vrev64q_x_u16): Likewise.
7489 (vrev64q_x_u32): Likewise.
7490 (vrshlq_x_s8): Likewise.
7491 (vrshlq_x_s16): Likewise.
7492 (vrshlq_x_s32): Likewise.
7493 (vrshlq_x_u8): Likewise.
7494 (vrshlq_x_u16): Likewise.
7495 (vrshlq_x_u32): Likewise.
7496 (vshllbq_x_n_s8): Likewise.
7497 (vshllbq_x_n_s16): Likewise.
7498 (vshllbq_x_n_u8): Likewise.
7499 (vshllbq_x_n_u16): Likewise.
7500 (vshlltq_x_n_s8): Likewise.
7501 (vshlltq_x_n_s16): Likewise.
7502 (vshlltq_x_n_u8): Likewise.
7503 (vshlltq_x_n_u16): Likewise.
7504 (vshlq_x_s8): Likewise.
7505 (vshlq_x_s16): Likewise.
7506 (vshlq_x_s32): Likewise.
7507 (vshlq_x_u8): Likewise.
7508 (vshlq_x_u16): Likewise.
7509 (vshlq_x_u32): Likewise.
7510 (vshlq_x_n_s8): Likewise.
7511 (vshlq_x_n_s16): Likewise.
7512 (vshlq_x_n_s32): Likewise.
7513 (vshlq_x_n_u8): Likewise.
7514 (vshlq_x_n_u16): Likewise.
7515 (vshlq_x_n_u32): Likewise.
7516 (vrshrq_x_n_s8): Likewise.
7517 (vrshrq_x_n_s16): Likewise.
7518 (vrshrq_x_n_s32): Likewise.
7519 (vrshrq_x_n_u8): Likewise.
7520 (vrshrq_x_n_u16): Likewise.
7521 (vrshrq_x_n_u32): Likewise.
7522 (vshrq_x_n_s8): Likewise.
7523 (vshrq_x_n_s16): Likewise.
7524 (vshrq_x_n_s32): Likewise.
7525 (vshrq_x_n_u8): Likewise.
7526 (vshrq_x_n_u16): Likewise.
7527 (vshrq_x_n_u32): Likewise.
7528 (vdupq_x_n_f16): Likewise.
7529 (vdupq_x_n_f32): Likewise.
7530 (vminnmq_x_f16): Likewise.
7531 (vminnmq_x_f32): Likewise.
7532 (vmaxnmq_x_f16): Likewise.
7533 (vmaxnmq_x_f32): Likewise.
7534 (vabdq_x_f16): Likewise.
7535 (vabdq_x_f32): Likewise.
7536 (vabsq_x_f16): Likewise.
7537 (vabsq_x_f32): Likewise.
7538 (vaddq_x_f16): Likewise.
7539 (vaddq_x_f32): Likewise.
7540 (vaddq_x_n_f16): Likewise.
7541 (vaddq_x_n_f32): Likewise.
7542 (vnegq_x_f16): Likewise.
7543 (vnegq_x_f32): Likewise.
7544 (vmulq_x_f16): Likewise.
7545 (vmulq_x_f32): Likewise.
7546 (vmulq_x_n_f16): Likewise.
7547 (vmulq_x_n_f32): Likewise.
7548 (vsubq_x_f16): Likewise.
7549 (vsubq_x_f32): Likewise.
7550 (vsubq_x_n_f16): Likewise.
7551 (vsubq_x_n_f32): Likewise.
7552 (vcaddq_rot90_x_f16): Likewise.
7553 (vcaddq_rot90_x_f32): Likewise.
7554 (vcaddq_rot270_x_f16): Likewise.
7555 (vcaddq_rot270_x_f32): Likewise.
7556 (vcmulq_x_f16): Likewise.
7557 (vcmulq_x_f32): Likewise.
7558 (vcmulq_rot90_x_f16): Likewise.
7559 (vcmulq_rot90_x_f32): Likewise.
7560 (vcmulq_rot180_x_f16): Likewise.
7561 (vcmulq_rot180_x_f32): Likewise.
7562 (vcmulq_rot270_x_f16): Likewise.
7563 (vcmulq_rot270_x_f32): Likewise.
7564 (vcvtaq_x_s16_f16): Likewise.
7565 (vcvtaq_x_s32_f32): Likewise.
7566 (vcvtaq_x_u16_f16): Likewise.
7567 (vcvtaq_x_u32_f32): Likewise.
7568 (vcvtnq_x_s16_f16): Likewise.
7569 (vcvtnq_x_s32_f32): Likewise.
7570 (vcvtnq_x_u16_f16): Likewise.
7571 (vcvtnq_x_u32_f32): Likewise.
7572 (vcvtpq_x_s16_f16): Likewise.
7573 (vcvtpq_x_s32_f32): Likewise.
7574 (vcvtpq_x_u16_f16): Likewise.
7575 (vcvtpq_x_u32_f32): Likewise.
7576 (vcvtmq_x_s16_f16): Likewise.
7577 (vcvtmq_x_s32_f32): Likewise.
7578 (vcvtmq_x_u16_f16): Likewise.
7579 (vcvtmq_x_u32_f32): Likewise.
7580 (vcvtbq_x_f32_f16): Likewise.
7581 (vcvttq_x_f32_f16): Likewise.
7582 (vcvtq_x_f16_u16): Likewise.
7583 (vcvtq_x_f16_s16): Likewise.
7584 (vcvtq_x_f32_s32): Likewise.
7585 (vcvtq_x_f32_u32): Likewise.
7586 (vcvtq_x_n_f16_s16): Likewise.
7587 (vcvtq_x_n_f16_u16): Likewise.
7588 (vcvtq_x_n_f32_s32): Likewise.
7589 (vcvtq_x_n_f32_u32): Likewise.
7590 (vcvtq_x_s16_f16): Likewise.
7591 (vcvtq_x_s32_f32): Likewise.
7592 (vcvtq_x_u16_f16): Likewise.
7593 (vcvtq_x_u32_f32): Likewise.
7594 (vcvtq_x_n_s16_f16): Likewise.
7595 (vcvtq_x_n_s32_f32): Likewise.
7596 (vcvtq_x_n_u16_f16): Likewise.
7597 (vcvtq_x_n_u32_f32): Likewise.
7598 (vrndq_x_f16): Likewise.
7599 (vrndq_x_f32): Likewise.
7600 (vrndnq_x_f16): Likewise.
7601 (vrndnq_x_f32): Likewise.
7602 (vrndmq_x_f16): Likewise.
7603 (vrndmq_x_f32): Likewise.
7604 (vrndpq_x_f16): Likewise.
7605 (vrndpq_x_f32): Likewise.
7606 (vrndaq_x_f16): Likewise.
7607 (vrndaq_x_f32): Likewise.
7608 (vrndxq_x_f16): Likewise.
7609 (vrndxq_x_f32): Likewise.
7610 (vandq_x_f16): Likewise.
7611 (vandq_x_f32): Likewise.
7612 (vbicq_x_f16): Likewise.
7613 (vbicq_x_f32): Likewise.
7614 (vbrsrq_x_n_f16): Likewise.
7615 (vbrsrq_x_n_f32): Likewise.
7616 (veorq_x_f16): Likewise.
7617 (veorq_x_f32): Likewise.
7618 (vornq_x_f16): Likewise.
7619 (vornq_x_f32): Likewise.
7620 (vorrq_x_f16): Likewise.
7621 (vorrq_x_f32): Likewise.
7622 (vrev32q_x_f16): Likewise.
7623 (vrev64q_x_f16): Likewise.
7624 (vrev64q_x_f32): Likewise.
7625 (__arm_vddupq_x_n_u8): Define intrinsic.
7626 (__arm_vddupq_x_n_u16): Likewise.
7627 (__arm_vddupq_x_n_u32): Likewise.
7628 (__arm_vddupq_x_wb_u8): Likewise.
7629 (__arm_vddupq_x_wb_u16): Likewise.
7630 (__arm_vddupq_x_wb_u32): Likewise.
7631 (__arm_vdwdupq_x_n_u8): Likewise.
7632 (__arm_vdwdupq_x_n_u16): Likewise.
7633 (__arm_vdwdupq_x_n_u32): Likewise.
7634 (__arm_vdwdupq_x_wb_u8): Likewise.
7635 (__arm_vdwdupq_x_wb_u16): Likewise.
7636 (__arm_vdwdupq_x_wb_u32): Likewise.
7637 (__arm_vidupq_x_n_u8): Likewise.
7638 (__arm_vidupq_x_n_u16): Likewise.
7639 (__arm_vidupq_x_n_u32): Likewise.
7640 (__arm_vidupq_x_wb_u8): Likewise.
7641 (__arm_vidupq_x_wb_u16): Likewise.
7642 (__arm_vidupq_x_wb_u32): Likewise.
7643 (__arm_viwdupq_x_n_u8): Likewise.
7644 (__arm_viwdupq_x_n_u16): Likewise.
7645 (__arm_viwdupq_x_n_u32): Likewise.
7646 (__arm_viwdupq_x_wb_u8): Likewise.
7647 (__arm_viwdupq_x_wb_u16): Likewise.
7648 (__arm_viwdupq_x_wb_u32): Likewise.
7649 (__arm_vdupq_x_n_s8): Likewise.
7650 (__arm_vdupq_x_n_s16): Likewise.
7651 (__arm_vdupq_x_n_s32): Likewise.
7652 (__arm_vdupq_x_n_u8): Likewise.
7653 (__arm_vdupq_x_n_u16): Likewise.
7654 (__arm_vdupq_x_n_u32): Likewise.
7655 (__arm_vminq_x_s8): Likewise.
7656 (__arm_vminq_x_s16): Likewise.
7657 (__arm_vminq_x_s32): Likewise.
7658 (__arm_vminq_x_u8): Likewise.
7659 (__arm_vminq_x_u16): Likewise.
7660 (__arm_vminq_x_u32): Likewise.
7661 (__arm_vmaxq_x_s8): Likewise.
7662 (__arm_vmaxq_x_s16): Likewise.
7663 (__arm_vmaxq_x_s32): Likewise.
7664 (__arm_vmaxq_x_u8): Likewise.
7665 (__arm_vmaxq_x_u16): Likewise.
7666 (__arm_vmaxq_x_u32): Likewise.
7667 (__arm_vabdq_x_s8): Likewise.
7668 (__arm_vabdq_x_s16): Likewise.
7669 (__arm_vabdq_x_s32): Likewise.
7670 (__arm_vabdq_x_u8): Likewise.
7671 (__arm_vabdq_x_u16): Likewise.
7672 (__arm_vabdq_x_u32): Likewise.
7673 (__arm_vabsq_x_s8): Likewise.
7674 (__arm_vabsq_x_s16): Likewise.
7675 (__arm_vabsq_x_s32): Likewise.
7676 (__arm_vaddq_x_s8): Likewise.
7677 (__arm_vaddq_x_s16): Likewise.
7678 (__arm_vaddq_x_s32): Likewise.
7679 (__arm_vaddq_x_n_s8): Likewise.
7680 (__arm_vaddq_x_n_s16): Likewise.
7681 (__arm_vaddq_x_n_s32): Likewise.
7682 (__arm_vaddq_x_u8): Likewise.
7683 (__arm_vaddq_x_u16): Likewise.
7684 (__arm_vaddq_x_u32): Likewise.
7685 (__arm_vaddq_x_n_u8): Likewise.
7686 (__arm_vaddq_x_n_u16): Likewise.
7687 (__arm_vaddq_x_n_u32): Likewise.
7688 (__arm_vclsq_x_s8): Likewise.
7689 (__arm_vclsq_x_s16): Likewise.
7690 (__arm_vclsq_x_s32): Likewise.
7691 (__arm_vclzq_x_s8): Likewise.
7692 (__arm_vclzq_x_s16): Likewise.
7693 (__arm_vclzq_x_s32): Likewise.
7694 (__arm_vclzq_x_u8): Likewise.
7695 (__arm_vclzq_x_u16): Likewise.
7696 (__arm_vclzq_x_u32): Likewise.
7697 (__arm_vnegq_x_s8): Likewise.
7698 (__arm_vnegq_x_s16): Likewise.
7699 (__arm_vnegq_x_s32): Likewise.
7700 (__arm_vmulhq_x_s8): Likewise.
7701 (__arm_vmulhq_x_s16): Likewise.
7702 (__arm_vmulhq_x_s32): Likewise.
7703 (__arm_vmulhq_x_u8): Likewise.
7704 (__arm_vmulhq_x_u16): Likewise.
7705 (__arm_vmulhq_x_u32): Likewise.
7706 (__arm_vmullbq_poly_x_p8): Likewise.
7707 (__arm_vmullbq_poly_x_p16): Likewise.
7708 (__arm_vmullbq_int_x_s8): Likewise.
7709 (__arm_vmullbq_int_x_s16): Likewise.
7710 (__arm_vmullbq_int_x_s32): Likewise.
7711 (__arm_vmullbq_int_x_u8): Likewise.
7712 (__arm_vmullbq_int_x_u16): Likewise.
7713 (__arm_vmullbq_int_x_u32): Likewise.
7714 (__arm_vmulltq_poly_x_p8): Likewise.
7715 (__arm_vmulltq_poly_x_p16): Likewise.
7716 (__arm_vmulltq_int_x_s8): Likewise.
7717 (__arm_vmulltq_int_x_s16): Likewise.
7718 (__arm_vmulltq_int_x_s32): Likewise.
7719 (__arm_vmulltq_int_x_u8): Likewise.
7720 (__arm_vmulltq_int_x_u16): Likewise.
7721 (__arm_vmulltq_int_x_u32): Likewise.
7722 (__arm_vmulq_x_s8): Likewise.
7723 (__arm_vmulq_x_s16): Likewise.
7724 (__arm_vmulq_x_s32): Likewise.
7725 (__arm_vmulq_x_n_s8): Likewise.
7726 (__arm_vmulq_x_n_s16): Likewise.
7727 (__arm_vmulq_x_n_s32): Likewise.
7728 (__arm_vmulq_x_u8): Likewise.
7729 (__arm_vmulq_x_u16): Likewise.
7730 (__arm_vmulq_x_u32): Likewise.
7731 (__arm_vmulq_x_n_u8): Likewise.
7732 (__arm_vmulq_x_n_u16): Likewise.
7733 (__arm_vmulq_x_n_u32): Likewise.
7734 (__arm_vsubq_x_s8): Likewise.
7735 (__arm_vsubq_x_s16): Likewise.
7736 (__arm_vsubq_x_s32): Likewise.
7737 (__arm_vsubq_x_n_s8): Likewise.
7738 (__arm_vsubq_x_n_s16): Likewise.
7739 (__arm_vsubq_x_n_s32): Likewise.
7740 (__arm_vsubq_x_u8): Likewise.
7741 (__arm_vsubq_x_u16): Likewise.
7742 (__arm_vsubq_x_u32): Likewise.
7743 (__arm_vsubq_x_n_u8): Likewise.
7744 (__arm_vsubq_x_n_u16): Likewise.
7745 (__arm_vsubq_x_n_u32): Likewise.
7746 (__arm_vcaddq_rot90_x_s8): Likewise.
7747 (__arm_vcaddq_rot90_x_s16): Likewise.
7748 (__arm_vcaddq_rot90_x_s32): Likewise.
7749 (__arm_vcaddq_rot90_x_u8): Likewise.
7750 (__arm_vcaddq_rot90_x_u16): Likewise.
7751 (__arm_vcaddq_rot90_x_u32): Likewise.
7752 (__arm_vcaddq_rot270_x_s8): Likewise.
7753 (__arm_vcaddq_rot270_x_s16): Likewise.
7754 (__arm_vcaddq_rot270_x_s32): Likewise.
7755 (__arm_vcaddq_rot270_x_u8): Likewise.
7756 (__arm_vcaddq_rot270_x_u16): Likewise.
7757 (__arm_vcaddq_rot270_x_u32): Likewise.
7758 (__arm_vhaddq_x_n_s8): Likewise.
7759 (__arm_vhaddq_x_n_s16): Likewise.
7760 (__arm_vhaddq_x_n_s32): Likewise.
7761 (__arm_vhaddq_x_n_u8): Likewise.
7762 (__arm_vhaddq_x_n_u16): Likewise.
7763 (__arm_vhaddq_x_n_u32): Likewise.
7764 (__arm_vhaddq_x_s8): Likewise.
7765 (__arm_vhaddq_x_s16): Likewise.
7766 (__arm_vhaddq_x_s32): Likewise.
7767 (__arm_vhaddq_x_u8): Likewise.
7768 (__arm_vhaddq_x_u16): Likewise.
7769 (__arm_vhaddq_x_u32): Likewise.
7770 (__arm_vhcaddq_rot90_x_s8): Likewise.
7771 (__arm_vhcaddq_rot90_x_s16): Likewise.
7772 (__arm_vhcaddq_rot90_x_s32): Likewise.
7773 (__arm_vhcaddq_rot270_x_s8): Likewise.
7774 (__arm_vhcaddq_rot270_x_s16): Likewise.
7775 (__arm_vhcaddq_rot270_x_s32): Likewise.
7776 (__arm_vhsubq_x_n_s8): Likewise.
7777 (__arm_vhsubq_x_n_s16): Likewise.
7778 (__arm_vhsubq_x_n_s32): Likewise.
7779 (__arm_vhsubq_x_n_u8): Likewise.
7780 (__arm_vhsubq_x_n_u16): Likewise.
7781 (__arm_vhsubq_x_n_u32): Likewise.
7782 (__arm_vhsubq_x_s8): Likewise.
7783 (__arm_vhsubq_x_s16): Likewise.
7784 (__arm_vhsubq_x_s32): Likewise.
7785 (__arm_vhsubq_x_u8): Likewise.
7786 (__arm_vhsubq_x_u16): Likewise.
7787 (__arm_vhsubq_x_u32): Likewise.
7788 (__arm_vrhaddq_x_s8): Likewise.
7789 (__arm_vrhaddq_x_s16): Likewise.
7790 (__arm_vrhaddq_x_s32): Likewise.
7791 (__arm_vrhaddq_x_u8): Likewise.
7792 (__arm_vrhaddq_x_u16): Likewise.
7793 (__arm_vrhaddq_x_u32): Likewise.
7794 (__arm_vrmulhq_x_s8): Likewise.
7795 (__arm_vrmulhq_x_s16): Likewise.
7796 (__arm_vrmulhq_x_s32): Likewise.
7797 (__arm_vrmulhq_x_u8): Likewise.
7798 (__arm_vrmulhq_x_u16): Likewise.
7799 (__arm_vrmulhq_x_u32): Likewise.
7800 (__arm_vandq_x_s8): Likewise.
7801 (__arm_vandq_x_s16): Likewise.
7802 (__arm_vandq_x_s32): Likewise.
7803 (__arm_vandq_x_u8): Likewise.
7804 (__arm_vandq_x_u16): Likewise.
7805 (__arm_vandq_x_u32): Likewise.
7806 (__arm_vbicq_x_s8): Likewise.
7807 (__arm_vbicq_x_s16): Likewise.
7808 (__arm_vbicq_x_s32): Likewise.
7809 (__arm_vbicq_x_u8): Likewise.
7810 (__arm_vbicq_x_u16): Likewise.
7811 (__arm_vbicq_x_u32): Likewise.
7812 (__arm_vbrsrq_x_n_s8): Likewise.
7813 (__arm_vbrsrq_x_n_s16): Likewise.
7814 (__arm_vbrsrq_x_n_s32): Likewise.
7815 (__arm_vbrsrq_x_n_u8): Likewise.
7816 (__arm_vbrsrq_x_n_u16): Likewise.
7817 (__arm_vbrsrq_x_n_u32): Likewise.
7818 (__arm_veorq_x_s8): Likewise.
7819 (__arm_veorq_x_s16): Likewise.
7820 (__arm_veorq_x_s32): Likewise.
7821 (__arm_veorq_x_u8): Likewise.
7822 (__arm_veorq_x_u16): Likewise.
7823 (__arm_veorq_x_u32): Likewise.
7824 (__arm_vmovlbq_x_s8): Likewise.
7825 (__arm_vmovlbq_x_s16): Likewise.
7826 (__arm_vmovlbq_x_u8): Likewise.
7827 (__arm_vmovlbq_x_u16): Likewise.
7828 (__arm_vmovltq_x_s8): Likewise.
7829 (__arm_vmovltq_x_s16): Likewise.
7830 (__arm_vmovltq_x_u8): Likewise.
7831 (__arm_vmovltq_x_u16): Likewise.
7832 (__arm_vmvnq_x_s8): Likewise.
7833 (__arm_vmvnq_x_s16): Likewise.
7834 (__arm_vmvnq_x_s32): Likewise.
7835 (__arm_vmvnq_x_u8): Likewise.
7836 (__arm_vmvnq_x_u16): Likewise.
7837 (__arm_vmvnq_x_u32): Likewise.
7838 (__arm_vmvnq_x_n_s16): Likewise.
7839 (__arm_vmvnq_x_n_s32): Likewise.
7840 (__arm_vmvnq_x_n_u16): Likewise.
7841 (__arm_vmvnq_x_n_u32): Likewise.
7842 (__arm_vornq_x_s8): Likewise.
7843 (__arm_vornq_x_s16): Likewise.
7844 (__arm_vornq_x_s32): Likewise.
7845 (__arm_vornq_x_u8): Likewise.
7846 (__arm_vornq_x_u16): Likewise.
7847 (__arm_vornq_x_u32): Likewise.
7848 (__arm_vorrq_x_s8): Likewise.
7849 (__arm_vorrq_x_s16): Likewise.
7850 (__arm_vorrq_x_s32): Likewise.
7851 (__arm_vorrq_x_u8): Likewise.
7852 (__arm_vorrq_x_u16): Likewise.
7853 (__arm_vorrq_x_u32): Likewise.
7854 (__arm_vrev16q_x_s8): Likewise.
7855 (__arm_vrev16q_x_u8): Likewise.
7856 (__arm_vrev32q_x_s8): Likewise.
7857 (__arm_vrev32q_x_s16): Likewise.
7858 (__arm_vrev32q_x_u8): Likewise.
7859 (__arm_vrev32q_x_u16): Likewise.
7860 (__arm_vrev64q_x_s8): Likewise.
7861 (__arm_vrev64q_x_s16): Likewise.
7862 (__arm_vrev64q_x_s32): Likewise.
7863 (__arm_vrev64q_x_u8): Likewise.
7864 (__arm_vrev64q_x_u16): Likewise.
7865 (__arm_vrev64q_x_u32): Likewise.
7866 (__arm_vrshlq_x_s8): Likewise.
7867 (__arm_vrshlq_x_s16): Likewise.
7868 (__arm_vrshlq_x_s32): Likewise.
7869 (__arm_vrshlq_x_u8): Likewise.
7870 (__arm_vrshlq_x_u16): Likewise.
7871 (__arm_vrshlq_x_u32): Likewise.
7872 (__arm_vshllbq_x_n_s8): Likewise.
7873 (__arm_vshllbq_x_n_s16): Likewise.
7874 (__arm_vshllbq_x_n_u8): Likewise.
7875 (__arm_vshllbq_x_n_u16): Likewise.
7876 (__arm_vshlltq_x_n_s8): Likewise.
7877 (__arm_vshlltq_x_n_s16): Likewise.
7878 (__arm_vshlltq_x_n_u8): Likewise.
7879 (__arm_vshlltq_x_n_u16): Likewise.
7880 (__arm_vshlq_x_s8): Likewise.
7881 (__arm_vshlq_x_s16): Likewise.
7882 (__arm_vshlq_x_s32): Likewise.
7883 (__arm_vshlq_x_u8): Likewise.
7884 (__arm_vshlq_x_u16): Likewise.
7885 (__arm_vshlq_x_u32): Likewise.
7886 (__arm_vshlq_x_n_s8): Likewise.
7887 (__arm_vshlq_x_n_s16): Likewise.
7888 (__arm_vshlq_x_n_s32): Likewise.
7889 (__arm_vshlq_x_n_u8): Likewise.
7890 (__arm_vshlq_x_n_u16): Likewise.
7891 (__arm_vshlq_x_n_u32): Likewise.
7892 (__arm_vrshrq_x_n_s8): Likewise.
7893 (__arm_vrshrq_x_n_s16): Likewise.
7894 (__arm_vrshrq_x_n_s32): Likewise.
7895 (__arm_vrshrq_x_n_u8): Likewise.
7896 (__arm_vrshrq_x_n_u16): Likewise.
7897 (__arm_vrshrq_x_n_u32): Likewise.
7898 (__arm_vshrq_x_n_s8): Likewise.
7899 (__arm_vshrq_x_n_s16): Likewise.
7900 (__arm_vshrq_x_n_s32): Likewise.
7901 (__arm_vshrq_x_n_u8): Likewise.
7902 (__arm_vshrq_x_n_u16): Likewise.
7903 (__arm_vshrq_x_n_u32): Likewise.
7904 (__arm_vdupq_x_n_f16): Likewise.
7905 (__arm_vdupq_x_n_f32): Likewise.
7906 (__arm_vminnmq_x_f16): Likewise.
7907 (__arm_vminnmq_x_f32): Likewise.
7908 (__arm_vmaxnmq_x_f16): Likewise.
7909 (__arm_vmaxnmq_x_f32): Likewise.
7910 (__arm_vabdq_x_f16): Likewise.
7911 (__arm_vabdq_x_f32): Likewise.
7912 (__arm_vabsq_x_f16): Likewise.
7913 (__arm_vabsq_x_f32): Likewise.
7914 (__arm_vaddq_x_f16): Likewise.
7915 (__arm_vaddq_x_f32): Likewise.
7916 (__arm_vaddq_x_n_f16): Likewise.
7917 (__arm_vaddq_x_n_f32): Likewise.
7918 (__arm_vnegq_x_f16): Likewise.
7919 (__arm_vnegq_x_f32): Likewise.
7920 (__arm_vmulq_x_f16): Likewise.
7921 (__arm_vmulq_x_f32): Likewise.
7922 (__arm_vmulq_x_n_f16): Likewise.
7923 (__arm_vmulq_x_n_f32): Likewise.
7924 (__arm_vsubq_x_f16): Likewise.
7925 (__arm_vsubq_x_f32): Likewise.
7926 (__arm_vsubq_x_n_f16): Likewise.
7927 (__arm_vsubq_x_n_f32): Likewise.
7928 (__arm_vcaddq_rot90_x_f16): Likewise.
7929 (__arm_vcaddq_rot90_x_f32): Likewise.
7930 (__arm_vcaddq_rot270_x_f16): Likewise.
7931 (__arm_vcaddq_rot270_x_f32): Likewise.
7932 (__arm_vcmulq_x_f16): Likewise.
7933 (__arm_vcmulq_x_f32): Likewise.
7934 (__arm_vcmulq_rot90_x_f16): Likewise.
7935 (__arm_vcmulq_rot90_x_f32): Likewise.
7936 (__arm_vcmulq_rot180_x_f16): Likewise.
7937 (__arm_vcmulq_rot180_x_f32): Likewise.
7938 (__arm_vcmulq_rot270_x_f16): Likewise.
7939 (__arm_vcmulq_rot270_x_f32): Likewise.
7940 (__arm_vcvtaq_x_s16_f16): Likewise.
7941 (__arm_vcvtaq_x_s32_f32): Likewise.
7942 (__arm_vcvtaq_x_u16_f16): Likewise.
7943 (__arm_vcvtaq_x_u32_f32): Likewise.
7944 (__arm_vcvtnq_x_s16_f16): Likewise.
7945 (__arm_vcvtnq_x_s32_f32): Likewise.
7946 (__arm_vcvtnq_x_u16_f16): Likewise.
7947 (__arm_vcvtnq_x_u32_f32): Likewise.
7948 (__arm_vcvtpq_x_s16_f16): Likewise.
7949 (__arm_vcvtpq_x_s32_f32): Likewise.
7950 (__arm_vcvtpq_x_u16_f16): Likewise.
7951 (__arm_vcvtpq_x_u32_f32): Likewise.
7952 (__arm_vcvtmq_x_s16_f16): Likewise.
7953 (__arm_vcvtmq_x_s32_f32): Likewise.
7954 (__arm_vcvtmq_x_u16_f16): Likewise.
7955 (__arm_vcvtmq_x_u32_f32): Likewise.
7956 (__arm_vcvtbq_x_f32_f16): Likewise.
7957 (__arm_vcvttq_x_f32_f16): Likewise.
7958 (__arm_vcvtq_x_f16_u16): Likewise.
7959 (__arm_vcvtq_x_f16_s16): Likewise.
7960 (__arm_vcvtq_x_f32_s32): Likewise.
7961 (__arm_vcvtq_x_f32_u32): Likewise.
7962 (__arm_vcvtq_x_n_f16_s16): Likewise.
7963 (__arm_vcvtq_x_n_f16_u16): Likewise.
7964 (__arm_vcvtq_x_n_f32_s32): Likewise.
7965 (__arm_vcvtq_x_n_f32_u32): Likewise.
7966 (__arm_vcvtq_x_s16_f16): Likewise.
7967 (__arm_vcvtq_x_s32_f32): Likewise.
7968 (__arm_vcvtq_x_u16_f16): Likewise.
7969 (__arm_vcvtq_x_u32_f32): Likewise.
7970 (__arm_vcvtq_x_n_s16_f16): Likewise.
7971 (__arm_vcvtq_x_n_s32_f32): Likewise.
7972 (__arm_vcvtq_x_n_u16_f16): Likewise.
7973 (__arm_vcvtq_x_n_u32_f32): Likewise.
7974 (__arm_vrndq_x_f16): Likewise.
7975 (__arm_vrndq_x_f32): Likewise.
7976 (__arm_vrndnq_x_f16): Likewise.
7977 (__arm_vrndnq_x_f32): Likewise.
7978 (__arm_vrndmq_x_f16): Likewise.
7979 (__arm_vrndmq_x_f32): Likewise.
7980 (__arm_vrndpq_x_f16): Likewise.
7981 (__arm_vrndpq_x_f32): Likewise.
7982 (__arm_vrndaq_x_f16): Likewise.
7983 (__arm_vrndaq_x_f32): Likewise.
7984 (__arm_vrndxq_x_f16): Likewise.
7985 (__arm_vrndxq_x_f32): Likewise.
7986 (__arm_vandq_x_f16): Likewise.
7987 (__arm_vandq_x_f32): Likewise.
7988 (__arm_vbicq_x_f16): Likewise.
7989 (__arm_vbicq_x_f32): Likewise.
7990 (__arm_vbrsrq_x_n_f16): Likewise.
7991 (__arm_vbrsrq_x_n_f32): Likewise.
7992 (__arm_veorq_x_f16): Likewise.
7993 (__arm_veorq_x_f32): Likewise.
7994 (__arm_vornq_x_f16): Likewise.
7995 (__arm_vornq_x_f32): Likewise.
7996 (__arm_vorrq_x_f16): Likewise.
7997 (__arm_vorrq_x_f32): Likewise.
7998 (__arm_vrev32q_x_f16): Likewise.
7999 (__arm_vrev64q_x_f16): Likewise.
8000 (__arm_vrev64q_x_f32): Likewise.
8001 (vabdq_x): Define polymorphic variant.
8002 (vabsq_x): Likewise.
8003 (vaddq_x): Likewise.
8004 (vandq_x): Likewise.
8005 (vbicq_x): Likewise.
8006 (vbrsrq_x): Likewise.
8007 (vcaddq_rot270_x): Likewise.
8008 (vcaddq_rot90_x): Likewise.
8009 (vcmulq_rot180_x): Likewise.
8010 (vcmulq_rot270_x): Likewise.
8011 (vcmulq_x): Likewise.
8012 (vcvtq_x): Likewise.
8013 (vcvtq_x_n): Likewise.
8014 (vcvtnq_m): Likewise.
8015 (veorq_x): Likewise.
8016 (vmaxnmq_x): Likewise.
8017 (vminnmq_x): Likewise.
8018 (vmulq_x): Likewise.
8019 (vnegq_x): Likewise.
8020 (vornq_x): Likewise.
8021 (vorrq_x): Likewise.
8022 (vrev32q_x): Likewise.
8023 (vrev64q_x): Likewise.
8024 (vrndaq_x): Likewise.
8025 (vrndmq_x): Likewise.
8026 (vrndnq_x): Likewise.
8027 (vrndpq_x): Likewise.
8028 (vrndq_x): Likewise.
8029 (vrndxq_x): Likewise.
8030 (vsubq_x): Likewise.
8031 (vcmulq_rot90_x): Likewise.
8033 (vclsq_x): Likewise.
8034 (vclzq_x): Likewise.
8035 (vhaddq_x): Likewise.
8036 (vhcaddq_rot270_x): Likewise.
8037 (vhcaddq_rot90_x): Likewise.
8038 (vhsubq_x): Likewise.
8039 (vmaxq_x): Likewise.
8040 (vminq_x): Likewise.
8041 (vmovlbq_x): Likewise.
8042 (vmovltq_x): Likewise.
8043 (vmulhq_x): Likewise.
8044 (vmullbq_int_x): Likewise.
8045 (vmullbq_poly_x): Likewise.
8046 (vmulltq_int_x): Likewise.
8047 (vmulltq_poly_x): Likewise.
8048 (vmvnq_x): Likewise.
8049 (vrev16q_x): Likewise.
8050 (vrhaddq_x): Likewise.
8051 (vrmulhq_x): Likewise.
8052 (vrshlq_x): Likewise.
8053 (vrshrq_x): Likewise.
8054 (vshllbq_x): Likewise.
8055 (vshlltq_x): Likewise.
8056 (vshlq_x_n): Likewise.
8057 (vshlq_x): Likewise.
8058 (vdwdupq_x_u8): Likewise.
8059 (vdwdupq_x_u16): Likewise.
8060 (vdwdupq_x_u32): Likewise.
8061 (viwdupq_x_u8): Likewise.
8062 (viwdupq_x_u16): Likewise.
8063 (viwdupq_x_u32): Likewise.
8064 (vidupq_x_u8): Likewise.
8065 (vddupq_x_u8): Likewise.
8066 (vidupq_x_u16): Likewise.
8067 (vddupq_x_u16): Likewise.
8068 (vidupq_x_u32): Likewise.
8069 (vddupq_x_u32): Likewise.
8070 (vshrq_x): Likewise.
8072 2020-03-20 Richard Biener <rguenther@suse.de>
8074 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
8075 to vectorize for CTOR defs.
8077 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8078 Andre Vieira <andre.simoesdiasvieira@arm.com>
8079 Mihail Ionescu <mihail.ionescu@arm.com>
8081 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
8083 (LDRGBWBU_QUALIFIERS): Likewise.
8084 (LDRGBWBS_Z_QUALIFIERS): Likewise.
8085 (LDRGBWBU_Z_QUALIFIERS): Likewise.
8086 (STRSBWBS_QUALIFIERS): Likewise.
8087 (STRSBWBU_QUALIFIERS): Likewise.
8088 (STRSBWBS_P_QUALIFIERS): Likewise.
8089 (STRSBWBU_P_QUALIFIERS): Likewise.
8090 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
8091 (vldrdq_gather_base_wb_u64): Likewise.
8092 (vldrdq_gather_base_wb_z_s64): Likewise.
8093 (vldrdq_gather_base_wb_z_u64): Likewise.
8094 (vldrwq_gather_base_wb_f32): Likewise.
8095 (vldrwq_gather_base_wb_s32): Likewise.
8096 (vldrwq_gather_base_wb_u32): Likewise.
8097 (vldrwq_gather_base_wb_z_f32): Likewise.
8098 (vldrwq_gather_base_wb_z_s32): Likewise.
8099 (vldrwq_gather_base_wb_z_u32): Likewise.
8100 (vstrdq_scatter_base_wb_p_s64): Likewise.
8101 (vstrdq_scatter_base_wb_p_u64): Likewise.
8102 (vstrdq_scatter_base_wb_s64): Likewise.
8103 (vstrdq_scatter_base_wb_u64): Likewise.
8104 (vstrwq_scatter_base_wb_p_s32): Likewise.
8105 (vstrwq_scatter_base_wb_p_f32): Likewise.
8106 (vstrwq_scatter_base_wb_p_u32): Likewise.
8107 (vstrwq_scatter_base_wb_s32): Likewise.
8108 (vstrwq_scatter_base_wb_u32): Likewise.
8109 (vstrwq_scatter_base_wb_f32): Likewise.
8110 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
8111 (__arm_vldrdq_gather_base_wb_u64): Likewise.
8112 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
8113 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
8114 (__arm_vldrwq_gather_base_wb_s32): Likewise.
8115 (__arm_vldrwq_gather_base_wb_u32): Likewise.
8116 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
8117 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
8118 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
8119 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
8120 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
8121 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
8122 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
8123 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
8124 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
8125 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
8126 (__arm_vldrwq_gather_base_wb_f32): Likewise.
8127 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
8128 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
8129 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
8130 (vstrwq_scatter_base_wb): Define polymorphic variant.
8131 (vstrwq_scatter_base_wb_p): Likewise.
8132 (vstrdq_scatter_base_wb_p): Likewise.
8133 (vstrdq_scatter_base_wb): Likewise.
8134 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
8136 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
8138 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
8139 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
8140 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
8141 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
8142 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
8143 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
8144 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
8145 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
8146 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
8147 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
8148 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
8149 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
8150 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
8151 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
8152 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
8153 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
8154 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
8155 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
8156 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
8157 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
8158 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
8159 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
8160 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
8161 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
8162 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
8163 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
8164 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
8165 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
8166 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
8168 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8169 Andre Vieira <andre.simoesdiasvieira@arm.com>
8170 Mihail Ionescu <mihail.ionescu@arm.com>
8172 * config/arm/arm-builtins.c
8173 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
8175 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
8176 (vddupq_m_n_u32): Likewise.
8177 (vddupq_m_n_u16): Likewise.
8178 (vddupq_m_wb_u8): Likewise.
8179 (vddupq_m_wb_u16): Likewise.
8180 (vddupq_m_wb_u32): Likewise.
8181 (vddupq_n_u8): Likewise.
8182 (vddupq_n_u32): Likewise.
8183 (vddupq_n_u16): Likewise.
8184 (vddupq_wb_u8): Likewise.
8185 (vddupq_wb_u16): Likewise.
8186 (vddupq_wb_u32): Likewise.
8187 (vdwdupq_m_n_u8): Likewise.
8188 (vdwdupq_m_n_u32): Likewise.
8189 (vdwdupq_m_n_u16): Likewise.
8190 (vdwdupq_m_wb_u8): Likewise.
8191 (vdwdupq_m_wb_u32): Likewise.
8192 (vdwdupq_m_wb_u16): Likewise.
8193 (vdwdupq_n_u8): Likewise.
8194 (vdwdupq_n_u32): Likewise.
8195 (vdwdupq_n_u16): Likewise.
8196 (vdwdupq_wb_u8): Likewise.
8197 (vdwdupq_wb_u32): Likewise.
8198 (vdwdupq_wb_u16): Likewise.
8199 (vidupq_m_n_u8): Likewise.
8200 (vidupq_m_n_u32): Likewise.
8201 (vidupq_m_n_u16): Likewise.
8202 (vidupq_m_wb_u8): Likewise.
8203 (vidupq_m_wb_u16): Likewise.
8204 (vidupq_m_wb_u32): Likewise.
8205 (vidupq_n_u8): Likewise.
8206 (vidupq_n_u32): Likewise.
8207 (vidupq_n_u16): Likewise.
8208 (vidupq_wb_u8): Likewise.
8209 (vidupq_wb_u16): Likewise.
8210 (vidupq_wb_u32): Likewise.
8211 (viwdupq_m_n_u8): Likewise.
8212 (viwdupq_m_n_u32): Likewise.
8213 (viwdupq_m_n_u16): Likewise.
8214 (viwdupq_m_wb_u8): Likewise.
8215 (viwdupq_m_wb_u32): Likewise.
8216 (viwdupq_m_wb_u16): Likewise.
8217 (viwdupq_n_u8): Likewise.
8218 (viwdupq_n_u32): Likewise.
8219 (viwdupq_n_u16): Likewise.
8220 (viwdupq_wb_u8): Likewise.
8221 (viwdupq_wb_u32): Likewise.
8222 (viwdupq_wb_u16): Likewise.
8223 (__arm_vddupq_m_n_u8): Define intrinsic.
8224 (__arm_vddupq_m_n_u32): Likewise.
8225 (__arm_vddupq_m_n_u16): Likewise.
8226 (__arm_vddupq_m_wb_u8): Likewise.
8227 (__arm_vddupq_m_wb_u16): Likewise.
8228 (__arm_vddupq_m_wb_u32): Likewise.
8229 (__arm_vddupq_n_u8): Likewise.
8230 (__arm_vddupq_n_u32): Likewise.
8231 (__arm_vddupq_n_u16): Likewise.
8232 (__arm_vdwdupq_m_n_u8): Likewise.
8233 (__arm_vdwdupq_m_n_u32): Likewise.
8234 (__arm_vdwdupq_m_n_u16): Likewise.
8235 (__arm_vdwdupq_m_wb_u8): Likewise.
8236 (__arm_vdwdupq_m_wb_u32): Likewise.
8237 (__arm_vdwdupq_m_wb_u16): Likewise.
8238 (__arm_vdwdupq_n_u8): Likewise.
8239 (__arm_vdwdupq_n_u32): Likewise.
8240 (__arm_vdwdupq_n_u16): Likewise.
8241 (__arm_vdwdupq_wb_u8): Likewise.
8242 (__arm_vdwdupq_wb_u32): Likewise.
8243 (__arm_vdwdupq_wb_u16): Likewise.
8244 (__arm_vidupq_m_n_u8): Likewise.
8245 (__arm_vidupq_m_n_u32): Likewise.
8246 (__arm_vidupq_m_n_u16): Likewise.
8247 (__arm_vidupq_n_u8): Likewise.
8248 (__arm_vidupq_m_wb_u8): Likewise.
8249 (__arm_vidupq_m_wb_u16): Likewise.
8250 (__arm_vidupq_m_wb_u32): Likewise.
8251 (__arm_vidupq_n_u32): Likewise.
8252 (__arm_vidupq_n_u16): Likewise.
8253 (__arm_vidupq_wb_u8): Likewise.
8254 (__arm_vidupq_wb_u16): Likewise.
8255 (__arm_vidupq_wb_u32): Likewise.
8256 (__arm_vddupq_wb_u8): Likewise.
8257 (__arm_vddupq_wb_u16): Likewise.
8258 (__arm_vddupq_wb_u32): Likewise.
8259 (__arm_viwdupq_m_n_u8): Likewise.
8260 (__arm_viwdupq_m_n_u32): Likewise.
8261 (__arm_viwdupq_m_n_u16): Likewise.
8262 (__arm_viwdupq_m_wb_u8): Likewise.
8263 (__arm_viwdupq_m_wb_u32): Likewise.
8264 (__arm_viwdupq_m_wb_u16): Likewise.
8265 (__arm_viwdupq_n_u8): Likewise.
8266 (__arm_viwdupq_n_u32): Likewise.
8267 (__arm_viwdupq_n_u16): Likewise.
8268 (__arm_viwdupq_wb_u8): Likewise.
8269 (__arm_viwdupq_wb_u32): Likewise.
8270 (__arm_viwdupq_wb_u16): Likewise.
8271 (vidupq_m): Define polymorphic variant.
8272 (vddupq_m): Likewise.
8273 (vidupq_u16): Likewise.
8274 (vidupq_u32): Likewise.
8275 (vidupq_u8): Likewise.
8276 (vddupq_u16): Likewise.
8277 (vddupq_u32): Likewise.
8278 (vddupq_u8): Likewise.
8279 (viwdupq_m): Likewise.
8280 (viwdupq_u16): Likewise.
8281 (viwdupq_u32): Likewise.
8282 (viwdupq_u8): Likewise.
8283 (vdwdupq_m): Likewise.
8284 (vdwdupq_u16): Likewise.
8285 (vdwdupq_u32): Likewise.
8286 (vdwdupq_u8): Likewise.
8287 * config/arm/arm_mve_builtins.def
8288 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
8290 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
8291 (mve_vidupq_u<mode>_insn): Likewise.
8292 (mve_vidupq_m_n_u<mode>): Likewise.
8293 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
8294 (mve_vddupq_n_u<mode>): Likewise.
8295 (mve_vddupq_u<mode>_insn): Likewise.
8296 (mve_vddupq_m_n_u<mode>): Likewise.
8297 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
8298 (mve_vdwdupq_n_u<mode>): Likewise.
8299 (mve_vdwdupq_wb_u<mode>): Likewise.
8300 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
8301 (mve_vdwdupq_m_n_u<mode>): Likewise.
8302 (mve_vdwdupq_m_wb_u<mode>): Likewise.
8303 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
8304 (mve_viwdupq_n_u<mode>): Likewise.
8305 (mve_viwdupq_wb_u<mode>): Likewise.
8306 (mve_viwdupq_wb_u<mode>_insn): Likewise.
8307 (mve_viwdupq_m_n_u<mode>): Likewise.
8308 (mve_viwdupq_m_wb_u<mode>): Likewise.
8309 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
8311 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8313 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
8314 (vreinterpretq_s16_s64): Likewise.
8315 (vreinterpretq_s16_s8): Likewise.
8316 (vreinterpretq_s16_u16): Likewise.
8317 (vreinterpretq_s16_u32): Likewise.
8318 (vreinterpretq_s16_u64): Likewise.
8319 (vreinterpretq_s16_u8): Likewise.
8320 (vreinterpretq_s32_s16): Likewise.
8321 (vreinterpretq_s32_s64): Likewise.
8322 (vreinterpretq_s32_s8): Likewise.
8323 (vreinterpretq_s32_u16): Likewise.
8324 (vreinterpretq_s32_u32): Likewise.
8325 (vreinterpretq_s32_u64): Likewise.
8326 (vreinterpretq_s32_u8): Likewise.
8327 (vreinterpretq_s64_s16): Likewise.
8328 (vreinterpretq_s64_s32): Likewise.
8329 (vreinterpretq_s64_s8): Likewise.
8330 (vreinterpretq_s64_u16): Likewise.
8331 (vreinterpretq_s64_u32): Likewise.
8332 (vreinterpretq_s64_u64): Likewise.
8333 (vreinterpretq_s64_u8): Likewise.
8334 (vreinterpretq_s8_s16): Likewise.
8335 (vreinterpretq_s8_s32): Likewise.
8336 (vreinterpretq_s8_s64): Likewise.
8337 (vreinterpretq_s8_u16): Likewise.
8338 (vreinterpretq_s8_u32): Likewise.
8339 (vreinterpretq_s8_u64): Likewise.
8340 (vreinterpretq_s8_u8): Likewise.
8341 (vreinterpretq_u16_s16): Likewise.
8342 (vreinterpretq_u16_s32): Likewise.
8343 (vreinterpretq_u16_s64): Likewise.
8344 (vreinterpretq_u16_s8): Likewise.
8345 (vreinterpretq_u16_u32): Likewise.
8346 (vreinterpretq_u16_u64): Likewise.
8347 (vreinterpretq_u16_u8): Likewise.
8348 (vreinterpretq_u32_s16): Likewise.
8349 (vreinterpretq_u32_s32): Likewise.
8350 (vreinterpretq_u32_s64): Likewise.
8351 (vreinterpretq_u32_s8): Likewise.
8352 (vreinterpretq_u32_u16): Likewise.
8353 (vreinterpretq_u32_u64): Likewise.
8354 (vreinterpretq_u32_u8): Likewise.
8355 (vreinterpretq_u64_s16): Likewise.
8356 (vreinterpretq_u64_s32): Likewise.
8357 (vreinterpretq_u64_s64): Likewise.
8358 (vreinterpretq_u64_s8): Likewise.
8359 (vreinterpretq_u64_u16): Likewise.
8360 (vreinterpretq_u64_u32): Likewise.
8361 (vreinterpretq_u64_u8): Likewise.
8362 (vreinterpretq_u8_s16): Likewise.
8363 (vreinterpretq_u8_s32): Likewise.
8364 (vreinterpretq_u8_s64): Likewise.
8365 (vreinterpretq_u8_s8): Likewise.
8366 (vreinterpretq_u8_u16): Likewise.
8367 (vreinterpretq_u8_u32): Likewise.
8368 (vreinterpretq_u8_u64): Likewise.
8369 (vreinterpretq_s32_f16): Likewise.
8370 (vreinterpretq_s32_f32): Likewise.
8371 (vreinterpretq_u16_f16): Likewise.
8372 (vreinterpretq_u16_f32): Likewise.
8373 (vreinterpretq_u32_f16): Likewise.
8374 (vreinterpretq_u32_f32): Likewise.
8375 (vreinterpretq_u64_f16): Likewise.
8376 (vreinterpretq_u64_f32): Likewise.
8377 (vreinterpretq_u8_f16): Likewise.
8378 (vreinterpretq_u8_f32): Likewise.
8379 (vreinterpretq_f16_f32): Likewise.
8380 (vreinterpretq_f16_s16): Likewise.
8381 (vreinterpretq_f16_s32): Likewise.
8382 (vreinterpretq_f16_s64): Likewise.
8383 (vreinterpretq_f16_s8): Likewise.
8384 (vreinterpretq_f16_u16): Likewise.
8385 (vreinterpretq_f16_u32): Likewise.
8386 (vreinterpretq_f16_u64): Likewise.
8387 (vreinterpretq_f16_u8): Likewise.
8388 (vreinterpretq_f32_f16): Likewise.
8389 (vreinterpretq_f32_s16): Likewise.
8390 (vreinterpretq_f32_s32): Likewise.
8391 (vreinterpretq_f32_s64): Likewise.
8392 (vreinterpretq_f32_s8): Likewise.
8393 (vreinterpretq_f32_u16): Likewise.
8394 (vreinterpretq_f32_u32): Likewise.
8395 (vreinterpretq_f32_u64): Likewise.
8396 (vreinterpretq_f32_u8): Likewise.
8397 (vreinterpretq_s16_f16): Likewise.
8398 (vreinterpretq_s16_f32): Likewise.
8399 (vreinterpretq_s64_f16): Likewise.
8400 (vreinterpretq_s64_f32): Likewise.
8401 (vreinterpretq_s8_f16): Likewise.
8402 (vreinterpretq_s8_f32): Likewise.
8403 (vuninitializedq_u8): Likewise.
8404 (vuninitializedq_u16): Likewise.
8405 (vuninitializedq_u32): Likewise.
8406 (vuninitializedq_u64): Likewise.
8407 (vuninitializedq_s8): Likewise.
8408 (vuninitializedq_s16): Likewise.
8409 (vuninitializedq_s32): Likewise.
8410 (vuninitializedq_s64): Likewise.
8411 (vuninitializedq_f16): Likewise.
8412 (vuninitializedq_f32): Likewise.
8413 (__arm_vuninitializedq_u8): Define intrinsic.
8414 (__arm_vuninitializedq_u16): Likewise.
8415 (__arm_vuninitializedq_u32): Likewise.
8416 (__arm_vuninitializedq_u64): Likewise.
8417 (__arm_vuninitializedq_s8): Likewise.
8418 (__arm_vuninitializedq_s16): Likewise.
8419 (__arm_vuninitializedq_s32): Likewise.
8420 (__arm_vuninitializedq_s64): Likewise.
8421 (__arm_vreinterpretq_s16_s32): Likewise.
8422 (__arm_vreinterpretq_s16_s64): Likewise.
8423 (__arm_vreinterpretq_s16_s8): Likewise.
8424 (__arm_vreinterpretq_s16_u16): Likewise.
8425 (__arm_vreinterpretq_s16_u32): Likewise.
8426 (__arm_vreinterpretq_s16_u64): Likewise.
8427 (__arm_vreinterpretq_s16_u8): Likewise.
8428 (__arm_vreinterpretq_s32_s16): Likewise.
8429 (__arm_vreinterpretq_s32_s64): Likewise.
8430 (__arm_vreinterpretq_s32_s8): Likewise.
8431 (__arm_vreinterpretq_s32_u16): Likewise.
8432 (__arm_vreinterpretq_s32_u32): Likewise.
8433 (__arm_vreinterpretq_s32_u64): Likewise.
8434 (__arm_vreinterpretq_s32_u8): Likewise.
8435 (__arm_vreinterpretq_s64_s16): Likewise.
8436 (__arm_vreinterpretq_s64_s32): Likewise.
8437 (__arm_vreinterpretq_s64_s8): Likewise.
8438 (__arm_vreinterpretq_s64_u16): Likewise.
8439 (__arm_vreinterpretq_s64_u32): Likewise.
8440 (__arm_vreinterpretq_s64_u64): Likewise.
8441 (__arm_vreinterpretq_s64_u8): Likewise.
8442 (__arm_vreinterpretq_s8_s16): Likewise.
8443 (__arm_vreinterpretq_s8_s32): Likewise.
8444 (__arm_vreinterpretq_s8_s64): Likewise.
8445 (__arm_vreinterpretq_s8_u16): Likewise.
8446 (__arm_vreinterpretq_s8_u32): Likewise.
8447 (__arm_vreinterpretq_s8_u64): Likewise.
8448 (__arm_vreinterpretq_s8_u8): Likewise.
8449 (__arm_vreinterpretq_u16_s16): Likewise.
8450 (__arm_vreinterpretq_u16_s32): Likewise.
8451 (__arm_vreinterpretq_u16_s64): Likewise.
8452 (__arm_vreinterpretq_u16_s8): Likewise.
8453 (__arm_vreinterpretq_u16_u32): Likewise.
8454 (__arm_vreinterpretq_u16_u64): Likewise.
8455 (__arm_vreinterpretq_u16_u8): Likewise.
8456 (__arm_vreinterpretq_u32_s16): Likewise.
8457 (__arm_vreinterpretq_u32_s32): Likewise.
8458 (__arm_vreinterpretq_u32_s64): Likewise.
8459 (__arm_vreinterpretq_u32_s8): Likewise.
8460 (__arm_vreinterpretq_u32_u16): Likewise.
8461 (__arm_vreinterpretq_u32_u64): Likewise.
8462 (__arm_vreinterpretq_u32_u8): Likewise.
8463 (__arm_vreinterpretq_u64_s16): Likewise.
8464 (__arm_vreinterpretq_u64_s32): Likewise.
8465 (__arm_vreinterpretq_u64_s64): Likewise.
8466 (__arm_vreinterpretq_u64_s8): Likewise.
8467 (__arm_vreinterpretq_u64_u16): Likewise.
8468 (__arm_vreinterpretq_u64_u32): Likewise.
8469 (__arm_vreinterpretq_u64_u8): Likewise.
8470 (__arm_vreinterpretq_u8_s16): Likewise.
8471 (__arm_vreinterpretq_u8_s32): Likewise.
8472 (__arm_vreinterpretq_u8_s64): Likewise.
8473 (__arm_vreinterpretq_u8_s8): Likewise.
8474 (__arm_vreinterpretq_u8_u16): Likewise.
8475 (__arm_vreinterpretq_u8_u32): Likewise.
8476 (__arm_vreinterpretq_u8_u64): Likewise.
8477 (__arm_vuninitializedq_f16): Likewise.
8478 (__arm_vuninitializedq_f32): Likewise.
8479 (__arm_vreinterpretq_s32_f16): Likewise.
8480 (__arm_vreinterpretq_s32_f32): Likewise.
8481 (__arm_vreinterpretq_s16_f16): Likewise.
8482 (__arm_vreinterpretq_s16_f32): Likewise.
8483 (__arm_vreinterpretq_s64_f16): Likewise.
8484 (__arm_vreinterpretq_s64_f32): Likewise.
8485 (__arm_vreinterpretq_s8_f16): Likewise.
8486 (__arm_vreinterpretq_s8_f32): Likewise.
8487 (__arm_vreinterpretq_u16_f16): Likewise.
8488 (__arm_vreinterpretq_u16_f32): Likewise.
8489 (__arm_vreinterpretq_u32_f16): Likewise.
8490 (__arm_vreinterpretq_u32_f32): Likewise.
8491 (__arm_vreinterpretq_u64_f16): Likewise.
8492 (__arm_vreinterpretq_u64_f32): Likewise.
8493 (__arm_vreinterpretq_u8_f16): Likewise.
8494 (__arm_vreinterpretq_u8_f32): Likewise.
8495 (__arm_vreinterpretq_f16_f32): Likewise.
8496 (__arm_vreinterpretq_f16_s16): Likewise.
8497 (__arm_vreinterpretq_f16_s32): Likewise.
8498 (__arm_vreinterpretq_f16_s64): Likewise.
8499 (__arm_vreinterpretq_f16_s8): Likewise.
8500 (__arm_vreinterpretq_f16_u16): Likewise.
8501 (__arm_vreinterpretq_f16_u32): Likewise.
8502 (__arm_vreinterpretq_f16_u64): Likewise.
8503 (__arm_vreinterpretq_f16_u8): Likewise.
8504 (__arm_vreinterpretq_f32_f16): Likewise.
8505 (__arm_vreinterpretq_f32_s16): Likewise.
8506 (__arm_vreinterpretq_f32_s32): Likewise.
8507 (__arm_vreinterpretq_f32_s64): Likewise.
8508 (__arm_vreinterpretq_f32_s8): Likewise.
8509 (__arm_vreinterpretq_f32_u16): Likewise.
8510 (__arm_vreinterpretq_f32_u32): Likewise.
8511 (__arm_vreinterpretq_f32_u64): Likewise.
8512 (__arm_vreinterpretq_f32_u8): Likewise.
8513 (vuninitializedq): Define polymorphic variant.
8514 (vreinterpretq_f16): Likewise.
8515 (vreinterpretq_f32): Likewise.
8516 (vreinterpretq_s16): Likewise.
8517 (vreinterpretq_s32): Likewise.
8518 (vreinterpretq_s64): Likewise.
8519 (vreinterpretq_s8): Likewise.
8520 (vreinterpretq_u16): Likewise.
8521 (vreinterpretq_u32): Likewise.
8522 (vreinterpretq_u64): Likewise.
8523 (vreinterpretq_u8): Likewise.
8525 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8526 Andre Vieira <andre.simoesdiasvieira@arm.com>
8527 Mihail Ionescu <mihail.ionescu@arm.com>
8529 * config/arm/arm_mve.h (vaddq_s8): Define macro.
8530 (vaddq_s16): Likewise.
8531 (vaddq_s32): Likewise.
8532 (vaddq_u8): Likewise.
8533 (vaddq_u16): Likewise.
8534 (vaddq_u32): Likewise.
8535 (vaddq_f16): Likewise.
8536 (vaddq_f32): Likewise.
8537 (__arm_vaddq_s8): Define intrinsic.
8538 (__arm_vaddq_s16): Likewise.
8539 (__arm_vaddq_s32): Likewise.
8540 (__arm_vaddq_u8): Likewise.
8541 (__arm_vaddq_u16): Likewise.
8542 (__arm_vaddq_u32): Likewise.
8543 (__arm_vaddq_f16): Likewise.
8544 (__arm_vaddq_f32): Likewise.
8545 (vaddq): Define polymorphic variant.
8546 * config/arm/iterators.md (VNIM): Define mode iterator for common types
8547 Neon, IWMMXT and MVE.
8548 (VNINOTM): Likewise.
8549 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
8550 (mve_vaddq_f<mode>): Define RTL pattern.
8551 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
8552 (addv8hf3_neon): Define RTL pattern.
8553 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
8555 (addv8hf3): Define standard RTL pattern for MVE and Neon.
8556 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
8558 2020-03-20 Martin Liska <mliska@suse.cz>
8561 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
8562 build_ref_for_offset function was used and it transforms off to bytes
8565 2020-03-20 Richard Biener <rguenther@suse.de>
8567 PR tree-optimization/94266
8568 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
8569 type of the underlying object to adjust for the containing
8572 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8574 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
8575 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
8576 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
8578 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8580 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
8582 2020-03-20 Jakub Jelinek <jakub@redhat.com>
8584 PR tree-optimization/94224
8585 * gimple-ssa-store-merging.c
8586 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
8587 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
8590 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
8592 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
8594 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
8597 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
8598 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
8600 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
8603 * cgraphunit.c (process_function_and_variable_attributes): warn
8604 for flatten attribute on alias.
8605 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
8607 2020-03-19 Martin Liska <mliska@suse.cz>
8609 * lto-section-in.c: Add ext_symtab.
8610 * lto-streamer-out.c (write_symbol_extension_info): New.
8611 (produce_symtab_extension): New.
8612 (produce_asm_for_decls): Stream also produce_symtab_extension.
8613 * lto-streamer.h (enum lto_section_type): New section.
8615 2020-03-19 Jakub Jelinek <jakub@redhat.com>
8617 PR tree-optimization/94211
8618 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
8619 instead of estimate_num_insns for bb_seq (middle_bb). Rename
8620 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
8623 2020-03-19 Richard Biener <rguenther@suse.de>
8626 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
8627 and build_ref_for_offset.
8629 2020-03-19 Richard Biener <rguenther@suse.de>
8632 * fold-const.c (fold_binary_loc): Avoid using
8633 build_fold_addr_expr when we really want an ADDR_EXPR.
8635 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
8637 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
8640 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
8642 PR rtl-optimization/90275
8643 * cse.c (cse_insn): Delete no-op register moves too.
8645 2020-03-18 Martin Sebor <msebor@redhat.com>
8648 * cgraphunit.c (process_function_and_variable_attributes): Also
8649 complain about weakref function definitions and drop all effects
8652 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8653 Mihail Ionescu <mihail.ionescu@arm.com>
8654 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8656 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
8657 (vstrdq_scatter_base_p_u64): Likewise.
8658 (vstrdq_scatter_base_s64): Likewise.
8659 (vstrdq_scatter_base_u64): Likewise.
8660 (vstrdq_scatter_offset_p_s64): Likewise.
8661 (vstrdq_scatter_offset_p_u64): Likewise.
8662 (vstrdq_scatter_offset_s64): Likewise.
8663 (vstrdq_scatter_offset_u64): Likewise.
8664 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
8665 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
8666 (vstrdq_scatter_shifted_offset_s64): Likewise.
8667 (vstrdq_scatter_shifted_offset_u64): Likewise.
8668 (vstrhq_scatter_offset_f16): Likewise.
8669 (vstrhq_scatter_offset_p_f16): Likewise.
8670 (vstrhq_scatter_shifted_offset_f16): Likewise.
8671 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
8672 (vstrwq_scatter_base_f32): Likewise.
8673 (vstrwq_scatter_base_p_f32): Likewise.
8674 (vstrwq_scatter_offset_f32): Likewise.
8675 (vstrwq_scatter_offset_p_f32): Likewise.
8676 (vstrwq_scatter_offset_p_s32): Likewise.
8677 (vstrwq_scatter_offset_p_u32): Likewise.
8678 (vstrwq_scatter_offset_s32): Likewise.
8679 (vstrwq_scatter_offset_u32): Likewise.
8680 (vstrwq_scatter_shifted_offset_f32): Likewise.
8681 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
8682 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
8683 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
8684 (vstrwq_scatter_shifted_offset_s32): Likewise.
8685 (vstrwq_scatter_shifted_offset_u32): Likewise.
8686 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
8687 (__arm_vstrdq_scatter_base_p_u64): Likewise.
8688 (__arm_vstrdq_scatter_base_s64): Likewise.
8689 (__arm_vstrdq_scatter_base_u64): Likewise.
8690 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
8691 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
8692 (__arm_vstrdq_scatter_offset_s64): Likewise.
8693 (__arm_vstrdq_scatter_offset_u64): Likewise.
8694 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
8695 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
8696 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
8697 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
8698 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
8699 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
8700 (__arm_vstrwq_scatter_offset_s32): Likewise.
8701 (__arm_vstrwq_scatter_offset_u32): Likewise.
8702 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
8703 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
8704 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
8705 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
8706 (__arm_vstrhq_scatter_offset_f16): Likewise.
8707 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
8708 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
8709 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
8710 (__arm_vstrwq_scatter_base_f32): Likewise.
8711 (__arm_vstrwq_scatter_base_p_f32): Likewise.
8712 (__arm_vstrwq_scatter_offset_f32): Likewise.
8713 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
8714 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
8715 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
8716 (vstrhq_scatter_offset): Define polymorphic variant.
8717 (vstrhq_scatter_offset_p): Likewise.
8718 (vstrhq_scatter_shifted_offset): Likewise.
8719 (vstrhq_scatter_shifted_offset_p): Likewise.
8720 (vstrwq_scatter_base): Likewise.
8721 (vstrwq_scatter_base_p): Likewise.
8722 (vstrwq_scatter_offset): Likewise.
8723 (vstrwq_scatter_offset_p): Likewise.
8724 (vstrwq_scatter_shifted_offset): Likewise.
8725 (vstrwq_scatter_shifted_offset_p): Likewise.
8726 (vstrdq_scatter_base_p): Likewise.
8727 (vstrdq_scatter_base): Likewise.
8728 (vstrdq_scatter_offset_p): Likewise.
8729 (vstrdq_scatter_offset): Likewise.
8730 (vstrdq_scatter_shifted_offset_p): Likewise.
8731 (vstrdq_scatter_shifted_offset): Likewise.
8732 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
8733 (STRSBS_P): Likewise.
8735 (STRSBU_P): Likewise.
8737 (STRSS_P): Likewise.
8739 (STRSU_P): Likewise.
8740 * config/arm/constraints.md (Ri): Define.
8741 * config/arm/mve.md (VSTRDSBQ): Define iterator.
8742 (VSTRDSOQ): Likewise.
8743 (VSTRDSSOQ): Likewise.
8744 (VSTRWSOQ): Likewise.
8745 (VSTRWSSOQ): Likewise.
8746 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
8747 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
8748 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
8749 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
8750 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
8751 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
8752 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
8753 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
8754 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
8755 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
8756 (mve_vstrwq_scatter_base_fv4sf): Likewise.
8757 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
8758 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
8759 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
8760 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
8761 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
8762 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
8763 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
8764 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
8765 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
8766 * config/arm/predicates.md (Ri): Define predicate to check immediate
8767 is the range +/-1016 and multiple of 8.
8769 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8770 Mihail Ionescu <mihail.ionescu@arm.com>
8771 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8773 * config/arm/arm_mve.h (vst1q_f32): Define macro.
8774 (vst1q_f16): Likewise.
8775 (vst1q_s8): Likewise.
8776 (vst1q_s32): Likewise.
8777 (vst1q_s16): Likewise.
8778 (vst1q_u8): Likewise.
8779 (vst1q_u32): Likewise.
8780 (vst1q_u16): Likewise.
8781 (vstrhq_f16): Likewise.
8782 (vstrhq_scatter_offset_s32): Likewise.
8783 (vstrhq_scatter_offset_s16): Likewise.
8784 (vstrhq_scatter_offset_u32): Likewise.
8785 (vstrhq_scatter_offset_u16): Likewise.
8786 (vstrhq_scatter_offset_p_s32): Likewise.
8787 (vstrhq_scatter_offset_p_s16): Likewise.
8788 (vstrhq_scatter_offset_p_u32): Likewise.
8789 (vstrhq_scatter_offset_p_u16): Likewise.
8790 (vstrhq_scatter_shifted_offset_s32): Likewise.
8791 (vstrhq_scatter_shifted_offset_s16): Likewise.
8792 (vstrhq_scatter_shifted_offset_u32): Likewise.
8793 (vstrhq_scatter_shifted_offset_u16): Likewise.
8794 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
8795 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
8796 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
8797 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
8798 (vstrhq_s32): Likewise.
8799 (vstrhq_s16): Likewise.
8800 (vstrhq_u32): Likewise.
8801 (vstrhq_u16): Likewise.
8802 (vstrhq_p_f16): Likewise.
8803 (vstrhq_p_s32): Likewise.
8804 (vstrhq_p_s16): Likewise.
8805 (vstrhq_p_u32): Likewise.
8806 (vstrhq_p_u16): Likewise.
8807 (vstrwq_f32): Likewise.
8808 (vstrwq_s32): Likewise.
8809 (vstrwq_u32): Likewise.
8810 (vstrwq_p_f32): Likewise.
8811 (vstrwq_p_s32): Likewise.
8812 (vstrwq_p_u32): Likewise.
8813 (__arm_vst1q_s8): Define intrinsic.
8814 (__arm_vst1q_s32): Likewise.
8815 (__arm_vst1q_s16): Likewise.
8816 (__arm_vst1q_u8): Likewise.
8817 (__arm_vst1q_u32): Likewise.
8818 (__arm_vst1q_u16): Likewise.
8819 (__arm_vstrhq_scatter_offset_s32): Likewise.
8820 (__arm_vstrhq_scatter_offset_s16): Likewise.
8821 (__arm_vstrhq_scatter_offset_u32): Likewise.
8822 (__arm_vstrhq_scatter_offset_u16): Likewise.
8823 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
8824 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
8825 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
8826 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
8827 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
8828 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
8829 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
8830 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
8831 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
8832 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
8833 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
8834 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
8835 (__arm_vstrhq_s32): Likewise.
8836 (__arm_vstrhq_s16): Likewise.
8837 (__arm_vstrhq_u32): Likewise.
8838 (__arm_vstrhq_u16): Likewise.
8839 (__arm_vstrhq_p_s32): Likewise.
8840 (__arm_vstrhq_p_s16): Likewise.
8841 (__arm_vstrhq_p_u32): Likewise.
8842 (__arm_vstrhq_p_u16): Likewise.
8843 (__arm_vstrwq_s32): Likewise.
8844 (__arm_vstrwq_u32): Likewise.
8845 (__arm_vstrwq_p_s32): Likewise.
8846 (__arm_vstrwq_p_u32): Likewise.
8847 (__arm_vstrwq_p_f32): Likewise.
8848 (__arm_vstrwq_f32): Likewise.
8849 (__arm_vst1q_f32): Likewise.
8850 (__arm_vst1q_f16): Likewise.
8851 (__arm_vstrhq_f16): Likewise.
8852 (__arm_vstrhq_p_f16): Likewise.
8853 (vst1q): Define polymorphic variant.
8855 (vstrhq_p): Likewise.
8856 (vstrhq_scatter_offset_p): Likewise.
8857 (vstrhq_scatter_offset): Likewise.
8858 (vstrhq_scatter_shifted_offset_p): Likewise.
8859 (vstrhq_scatter_shifted_offset): Likewise.
8860 (vstrwq_p): Likewise.
8862 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
8865 (STRSS_P): Likewise.
8867 (STRSU_P): Likewise.
8870 * config/arm/mve.md (VST1Q): Define iterator.
8871 (VSTRHSOQ): Likewise.
8872 (VSTRHSSOQ): Likewise.
8875 (mve_vstrhq_fv8hf): Define RTL pattern.
8876 (mve_vstrhq_p_fv8hf): Likewise.
8877 (mve_vstrhq_p_<supf><mode>): Likewise.
8878 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
8879 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
8880 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
8881 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
8882 (mve_vstrhq_<supf><mode>): Likewise.
8883 (mve_vstrwq_fv4sf): Likewise.
8884 (mve_vstrwq_p_fv4sf): Likewise.
8885 (mve_vstrwq_p_<supf>v4si): Likewise.
8886 (mve_vstrwq_<supf>v4si): Likewise.
8887 (mve_vst1q_f<mode>): Define expand.
8888 (mve_vst1q_<supf><mode>): Likewise.
8890 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8891 Mihail Ionescu <mihail.ionescu@arm.com>
8892 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8894 * config/arm/arm_mve.h (vld1q_s8): Define macro.
8895 (vld1q_s32): Likewise.
8896 (vld1q_s16): Likewise.
8897 (vld1q_u8): Likewise.
8898 (vld1q_u32): Likewise.
8899 (vld1q_u16): Likewise.
8900 (vldrhq_gather_offset_s32): Likewise.
8901 (vldrhq_gather_offset_s16): Likewise.
8902 (vldrhq_gather_offset_u32): Likewise.
8903 (vldrhq_gather_offset_u16): Likewise.
8904 (vldrhq_gather_offset_z_s32): Likewise.
8905 (vldrhq_gather_offset_z_s16): Likewise.
8906 (vldrhq_gather_offset_z_u32): Likewise.
8907 (vldrhq_gather_offset_z_u16): Likewise.
8908 (vldrhq_gather_shifted_offset_s32): Likewise.
8909 (vldrhq_gather_shifted_offset_s16): Likewise.
8910 (vldrhq_gather_shifted_offset_u32): Likewise.
8911 (vldrhq_gather_shifted_offset_u16): Likewise.
8912 (vldrhq_gather_shifted_offset_z_s32): Likewise.
8913 (vldrhq_gather_shifted_offset_z_s16): Likewise.
8914 (vldrhq_gather_shifted_offset_z_u32): Likewise.
8915 (vldrhq_gather_shifted_offset_z_u16): Likewise.
8916 (vldrhq_s32): Likewise.
8917 (vldrhq_s16): Likewise.
8918 (vldrhq_u32): Likewise.
8919 (vldrhq_u16): Likewise.
8920 (vldrhq_z_s32): Likewise.
8921 (vldrhq_z_s16): Likewise.
8922 (vldrhq_z_u32): Likewise.
8923 (vldrhq_z_u16): Likewise.
8924 (vldrwq_s32): Likewise.
8925 (vldrwq_u32): Likewise.
8926 (vldrwq_z_s32): Likewise.
8927 (vldrwq_z_u32): Likewise.
8928 (vld1q_f32): Likewise.
8929 (vld1q_f16): Likewise.
8930 (vldrhq_f16): Likewise.
8931 (vldrhq_z_f16): Likewise.
8932 (vldrwq_f32): Likewise.
8933 (vldrwq_z_f32): Likewise.
8934 (__arm_vld1q_s8): Define intrinsic.
8935 (__arm_vld1q_s32): Likewise.
8936 (__arm_vld1q_s16): Likewise.
8937 (__arm_vld1q_u8): Likewise.
8938 (__arm_vld1q_u32): Likewise.
8939 (__arm_vld1q_u16): Likewise.
8940 (__arm_vldrhq_gather_offset_s32): Likewise.
8941 (__arm_vldrhq_gather_offset_s16): Likewise.
8942 (__arm_vldrhq_gather_offset_u32): Likewise.
8943 (__arm_vldrhq_gather_offset_u16): Likewise.
8944 (__arm_vldrhq_gather_offset_z_s32): Likewise.
8945 (__arm_vldrhq_gather_offset_z_s16): Likewise.
8946 (__arm_vldrhq_gather_offset_z_u32): Likewise.
8947 (__arm_vldrhq_gather_offset_z_u16): Likewise.
8948 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
8949 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
8950 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
8951 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
8952 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
8953 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
8954 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
8955 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
8956 (__arm_vldrhq_s32): Likewise.
8957 (__arm_vldrhq_s16): Likewise.
8958 (__arm_vldrhq_u32): Likewise.
8959 (__arm_vldrhq_u16): Likewise.
8960 (__arm_vldrhq_z_s32): Likewise.
8961 (__arm_vldrhq_z_s16): Likewise.
8962 (__arm_vldrhq_z_u32): Likewise.
8963 (__arm_vldrhq_z_u16): Likewise.
8964 (__arm_vldrwq_s32): Likewise.
8965 (__arm_vldrwq_u32): Likewise.
8966 (__arm_vldrwq_z_s32): Likewise.
8967 (__arm_vldrwq_z_u32): Likewise.
8968 (__arm_vld1q_f32): Likewise.
8969 (__arm_vld1q_f16): Likewise.
8970 (__arm_vldrwq_f32): Likewise.
8971 (__arm_vldrwq_z_f32): Likewise.
8972 (__arm_vldrhq_z_f16): Likewise.
8973 (__arm_vldrhq_f16): Likewise.
8974 (vld1q): Define polymorphic variant.
8975 (vldrhq_gather_offset): Likewise.
8976 (vldrhq_gather_offset_z): Likewise.
8977 (vldrhq_gather_shifted_offset): Likewise.
8978 (vldrhq_gather_shifted_offset_z): Likewise.
8979 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
8983 (LDRGU_Z): Likewise.
8985 (LDRGS_Z): Likewise.
8987 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
8988 (V_sz_elem1): Likewise.
8989 (VLD1Q): Define iterator.
8990 (VLDRHGOQ): Likewise.
8991 (VLDRHGSOQ): Likewise.
8994 (mve_vldrhq_fv8hf): Define RTL pattern.
8995 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
8996 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
8997 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
8998 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
8999 (mve_vldrhq_<supf><mode>): Likewise.
9000 (mve_vldrhq_z_fv8hf): Likewise.
9001 (mve_vldrhq_z_<supf><mode>): Likewise.
9002 (mve_vldrwq_fv4sf): Likewise.
9003 (mve_vldrwq_<supf>v4si): Likewise.
9004 (mve_vldrwq_z_fv4sf): Likewise.
9005 (mve_vldrwq_z_<supf>v4si): Likewise.
9006 (mve_vld1q_f<mode>): Define RTL expand pattern.
9007 (mve_vld1q_<supf><mode>): Likewise.
9009 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9010 Mihail Ionescu <mihail.ionescu@arm.com>
9011 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9013 * config/arm/arm_mve.h (vld1q_s8): Define macro.
9014 (vld1q_s32): Likewise.
9015 (vld1q_s16): Likewise.
9016 (vld1q_u8): Likewise.
9017 (vld1q_u32): Likewise.
9018 (vld1q_u16): Likewise.
9019 (vldrhq_gather_offset_s32): Likewise.
9020 (vldrhq_gather_offset_s16): Likewise.
9021 (vldrhq_gather_offset_u32): Likewise.
9022 (vldrhq_gather_offset_u16): Likewise.
9023 (vldrhq_gather_offset_z_s32): Likewise.
9024 (vldrhq_gather_offset_z_s16): Likewise.
9025 (vldrhq_gather_offset_z_u32): Likewise.
9026 (vldrhq_gather_offset_z_u16): Likewise.
9027 (vldrhq_gather_shifted_offset_s32): Likewise.
9028 (vldrhq_gather_shifted_offset_s16): Likewise.
9029 (vldrhq_gather_shifted_offset_u32): Likewise.
9030 (vldrhq_gather_shifted_offset_u16): Likewise.
9031 (vldrhq_gather_shifted_offset_z_s32): Likewise.
9032 (vldrhq_gather_shifted_offset_z_s16): Likewise.
9033 (vldrhq_gather_shifted_offset_z_u32): Likewise.
9034 (vldrhq_gather_shifted_offset_z_u16): Likewise.
9035 (vldrhq_s32): Likewise.
9036 (vldrhq_s16): Likewise.
9037 (vldrhq_u32): Likewise.
9038 (vldrhq_u16): Likewise.
9039 (vldrhq_z_s32): Likewise.
9040 (vldrhq_z_s16): Likewise.
9041 (vldrhq_z_u32): Likewise.
9042 (vldrhq_z_u16): Likewise.
9043 (vldrwq_s32): Likewise.
9044 (vldrwq_u32): Likewise.
9045 (vldrwq_z_s32): Likewise.
9046 (vldrwq_z_u32): Likewise.
9047 (vld1q_f32): Likewise.
9048 (vld1q_f16): Likewise.
9049 (vldrhq_f16): Likewise.
9050 (vldrhq_z_f16): Likewise.
9051 (vldrwq_f32): Likewise.
9052 (vldrwq_z_f32): Likewise.
9053 (__arm_vld1q_s8): Define intrinsic.
9054 (__arm_vld1q_s32): Likewise.
9055 (__arm_vld1q_s16): Likewise.
9056 (__arm_vld1q_u8): Likewise.
9057 (__arm_vld1q_u32): Likewise.
9058 (__arm_vld1q_u16): Likewise.
9059 (__arm_vldrhq_gather_offset_s32): Likewise.
9060 (__arm_vldrhq_gather_offset_s16): Likewise.
9061 (__arm_vldrhq_gather_offset_u32): Likewise.
9062 (__arm_vldrhq_gather_offset_u16): Likewise.
9063 (__arm_vldrhq_gather_offset_z_s32): Likewise.
9064 (__arm_vldrhq_gather_offset_z_s16): Likewise.
9065 (__arm_vldrhq_gather_offset_z_u32): Likewise.
9066 (__arm_vldrhq_gather_offset_z_u16): Likewise.
9067 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
9068 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
9069 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
9070 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
9071 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
9072 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
9073 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
9074 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
9075 (__arm_vldrhq_s32): Likewise.
9076 (__arm_vldrhq_s16): Likewise.
9077 (__arm_vldrhq_u32): Likewise.
9078 (__arm_vldrhq_u16): Likewise.
9079 (__arm_vldrhq_z_s32): Likewise.
9080 (__arm_vldrhq_z_s16): Likewise.
9081 (__arm_vldrhq_z_u32): Likewise.
9082 (__arm_vldrhq_z_u16): Likewise.
9083 (__arm_vldrwq_s32): Likewise.
9084 (__arm_vldrwq_u32): Likewise.
9085 (__arm_vldrwq_z_s32): Likewise.
9086 (__arm_vldrwq_z_u32): Likewise.
9087 (__arm_vld1q_f32): Likewise.
9088 (__arm_vld1q_f16): Likewise.
9089 (__arm_vldrwq_f32): Likewise.
9090 (__arm_vldrwq_z_f32): Likewise.
9091 (__arm_vldrhq_z_f16): Likewise.
9092 (__arm_vldrhq_f16): Likewise.
9093 (vld1q): Define polymorphic variant.
9094 (vldrhq_gather_offset): Likewise.
9095 (vldrhq_gather_offset_z): Likewise.
9096 (vldrhq_gather_shifted_offset): Likewise.
9097 (vldrhq_gather_shifted_offset_z): Likewise.
9098 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
9102 (LDRGU_Z): Likewise.
9104 (LDRGS_Z): Likewise.
9106 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
9107 (V_sz_elem1): Likewise.
9108 (VLD1Q): Define iterator.
9109 (VLDRHGOQ): Likewise.
9110 (VLDRHGSOQ): Likewise.
9113 (mve_vldrhq_fv8hf): Define RTL pattern.
9114 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
9115 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
9116 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
9117 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
9118 (mve_vldrhq_<supf><mode>): Likewise.
9119 (mve_vldrhq_z_fv8hf): Likewise.
9120 (mve_vldrhq_z_<supf><mode>): Likewise.
9121 (mve_vldrwq_fv4sf): Likewise.
9122 (mve_vldrwq_<supf>v4si): Likewise.
9123 (mve_vldrwq_z_fv4sf): Likewise.
9124 (mve_vldrwq_z_<supf>v4si): Likewise.
9125 (mve_vld1q_f<mode>): Define RTL expand pattern.
9126 (mve_vld1q_<supf><mode>): Likewise.
9128 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9129 Mihail Ionescu <mihail.ionescu@arm.com>
9130 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9132 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
9134 (LDRGBU_Z_QUALIFIERS): Likewise.
9135 (LDRGS_Z_QUALIFIERS): Likewise.
9136 (LDRGU_Z_QUALIFIERS): Likewise.
9137 (LDRS_Z_QUALIFIERS): Likewise.
9138 (LDRU_Z_QUALIFIERS): Likewise.
9139 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
9140 (vldrbq_gather_offset_z_u8): Likewise.
9141 (vldrbq_gather_offset_z_s32): Likewise.
9142 (vldrbq_gather_offset_z_u16): Likewise.
9143 (vldrbq_gather_offset_z_u32): Likewise.
9144 (vldrbq_gather_offset_z_s8): Likewise.
9145 (vldrbq_z_s16): Likewise.
9146 (vldrbq_z_u8): Likewise.
9147 (vldrbq_z_s8): Likewise.
9148 (vldrbq_z_s32): Likewise.
9149 (vldrbq_z_u16): Likewise.
9150 (vldrbq_z_u32): Likewise.
9151 (vldrwq_gather_base_z_u32): Likewise.
9152 (vldrwq_gather_base_z_s32): Likewise.
9153 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
9154 (__arm_vldrbq_gather_offset_z_s32): Likewise.
9155 (__arm_vldrbq_gather_offset_z_s16): Likewise.
9156 (__arm_vldrbq_gather_offset_z_u8): Likewise.
9157 (__arm_vldrbq_gather_offset_z_u32): Likewise.
9158 (__arm_vldrbq_gather_offset_z_u16): Likewise.
9159 (__arm_vldrbq_z_s8): Likewise.
9160 (__arm_vldrbq_z_s32): Likewise.
9161 (__arm_vldrbq_z_s16): Likewise.
9162 (__arm_vldrbq_z_u8): Likewise.
9163 (__arm_vldrbq_z_u32): Likewise.
9164 (__arm_vldrbq_z_u16): Likewise.
9165 (__arm_vldrwq_gather_base_z_s32): Likewise.
9166 (__arm_vldrwq_gather_base_z_u32): Likewise.
9167 (vldrbq_gather_offset_z): Define polymorphic variant.
9168 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
9170 (LDRGBU_Z_QUALIFIERS): Likewise.
9171 (LDRGS_Z_QUALIFIERS): Likewise.
9172 (LDRGU_Z_QUALIFIERS): Likewise.
9173 (LDRS_Z_QUALIFIERS): Likewise.
9174 (LDRU_Z_QUALIFIERS): Likewise.
9175 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
9177 (mve_vldrbq_z_<supf><mode>): Likewise.
9178 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
9180 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9181 Mihail Ionescu <mihail.ionescu@arm.com>
9182 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9184 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
9186 (STRU_P_QUALIFIERS): Likewise.
9187 (STRSU_P_QUALIFIERS): Likewise.
9188 (STRSS_P_QUALIFIERS): Likewise.
9189 (STRSBS_P_QUALIFIERS): Likewise.
9190 (STRSBU_P_QUALIFIERS): Likewise.
9191 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
9192 (vstrbq_p_s32): Likewise.
9193 (vstrbq_p_s16): Likewise.
9194 (vstrbq_p_u8): Likewise.
9195 (vstrbq_p_u32): Likewise.
9196 (vstrbq_p_u16): Likewise.
9197 (vstrbq_scatter_offset_p_s8): Likewise.
9198 (vstrbq_scatter_offset_p_s32): Likewise.
9199 (vstrbq_scatter_offset_p_s16): Likewise.
9200 (vstrbq_scatter_offset_p_u8): Likewise.
9201 (vstrbq_scatter_offset_p_u32): Likewise.
9202 (vstrbq_scatter_offset_p_u16): Likewise.
9203 (vstrwq_scatter_base_p_s32): Likewise.
9204 (vstrwq_scatter_base_p_u32): Likewise.
9205 (__arm_vstrbq_p_s8): Define intrinsic.
9206 (__arm_vstrbq_p_s32): Likewise.
9207 (__arm_vstrbq_p_s16): Likewise.
9208 (__arm_vstrbq_p_u8): Likewise.
9209 (__arm_vstrbq_p_u32): Likewise.
9210 (__arm_vstrbq_p_u16): Likewise.
9211 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
9212 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
9213 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
9214 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
9215 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
9216 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
9217 (__arm_vstrwq_scatter_base_p_s32): Likewise.
9218 (__arm_vstrwq_scatter_base_p_u32): Likewise.
9219 (vstrbq_p): Define polymorphic variant.
9220 (vstrbq_scatter_offset_p): Likewise.
9221 (vstrwq_scatter_base_p): Likewise.
9222 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
9224 (STRU_P_QUALIFIERS): Likewise.
9225 (STRSU_P_QUALIFIERS): Likewise.
9226 (STRSS_P_QUALIFIERS): Likewise.
9227 (STRSBS_P_QUALIFIERS): Likewise.
9228 (STRSBU_P_QUALIFIERS): Likewise.
9229 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
9231 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
9232 (mve_vstrbq_p_<supf><mode>): Likewise.
9234 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9235 Mihail Ionescu <mihail.ionescu@arm.com>
9236 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9238 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
9240 (LDRGS_QUALIFIERS): Likewise.
9241 (LDRS_QUALIFIERS): Likewise.
9242 (LDRU_QUALIFIERS): Likewise.
9243 (LDRGBS_QUALIFIERS): Likewise.
9244 (LDRGBU_QUALIFIERS): Likewise.
9245 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
9246 (vldrbq_gather_offset_s8): Likewise.
9247 (vldrbq_s8): Likewise.
9248 (vldrbq_u8): Likewise.
9249 (vldrbq_gather_offset_u16): Likewise.
9250 (vldrbq_gather_offset_s16): Likewise.
9251 (vldrbq_s16): Likewise.
9252 (vldrbq_u16): Likewise.
9253 (vldrbq_gather_offset_u32): Likewise.
9254 (vldrbq_gather_offset_s32): Likewise.
9255 (vldrbq_s32): Likewise.
9256 (vldrbq_u32): Likewise.
9257 (vldrwq_gather_base_s32): Likewise.
9258 (vldrwq_gather_base_u32): Likewise.
9259 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
9260 (__arm_vldrbq_gather_offset_s8): Likewise.
9261 (__arm_vldrbq_s8): Likewise.
9262 (__arm_vldrbq_u8): Likewise.
9263 (__arm_vldrbq_gather_offset_u16): Likewise.
9264 (__arm_vldrbq_gather_offset_s16): Likewise.
9265 (__arm_vldrbq_s16): Likewise.
9266 (__arm_vldrbq_u16): Likewise.
9267 (__arm_vldrbq_gather_offset_u32): Likewise.
9268 (__arm_vldrbq_gather_offset_s32): Likewise.
9269 (__arm_vldrbq_s32): Likewise.
9270 (__arm_vldrbq_u32): Likewise.
9271 (__arm_vldrwq_gather_base_s32): Likewise.
9272 (__arm_vldrwq_gather_base_u32): Likewise.
9273 (vldrbq_gather_offset): Define polymorphic variant.
9274 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
9276 (LDRGS_QUALIFIERS): Likewise.
9277 (LDRS_QUALIFIERS): Likewise.
9278 (LDRU_QUALIFIERS): Likewise.
9279 (LDRGBS_QUALIFIERS): Likewise.
9280 (LDRGBU_QUALIFIERS): Likewise.
9281 * config/arm/mve.md (VLDRBGOQ): Define iterator.
9283 (VLDRWGBQ): Likewise.
9284 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
9285 (mve_vldrbq_<supf><mode>): Likewise.
9286 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
9288 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9289 Mihail Ionescu <mihail.ionescu@arm.com>
9290 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9292 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
9293 (STRU_QUALIFIERS): Likewise.
9294 (STRSS_QUALIFIERS): Likewise.
9295 (STRSU_QUALIFIERS): Likewise.
9296 (STRSBS_QUALIFIERS): Likewise.
9297 (STRSBU_QUALIFIERS): Likewise.
9298 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
9299 (vstrbq_u8): Likewise.
9300 (vstrbq_u16): Likewise.
9301 (vstrbq_scatter_offset_s8): Likewise.
9302 (vstrbq_scatter_offset_u8): Likewise.
9303 (vstrbq_scatter_offset_u16): Likewise.
9304 (vstrbq_s16): Likewise.
9305 (vstrbq_u32): Likewise.
9306 (vstrbq_scatter_offset_s16): Likewise.
9307 (vstrbq_scatter_offset_u32): Likewise.
9308 (vstrbq_s32): Likewise.
9309 (vstrbq_scatter_offset_s32): Likewise.
9310 (vstrwq_scatter_base_s32): Likewise.
9311 (vstrwq_scatter_base_u32): Likewise.
9312 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
9313 (__arm_vstrbq_scatter_offset_s32): Likewise.
9314 (__arm_vstrbq_scatter_offset_s16): Likewise.
9315 (__arm_vstrbq_scatter_offset_u8): Likewise.
9316 (__arm_vstrbq_scatter_offset_u32): Likewise.
9317 (__arm_vstrbq_scatter_offset_u16): Likewise.
9318 (__arm_vstrbq_s8): Likewise.
9319 (__arm_vstrbq_s32): Likewise.
9320 (__arm_vstrbq_s16): Likewise.
9321 (__arm_vstrbq_u8): Likewise.
9322 (__arm_vstrbq_u32): Likewise.
9323 (__arm_vstrbq_u16): Likewise.
9324 (__arm_vstrwq_scatter_base_s32): Likewise.
9325 (__arm_vstrwq_scatter_base_u32): Likewise.
9326 (vstrbq): Define polymorphic variant.
9327 (vstrbq_scatter_offset): Likewise.
9328 (vstrwq_scatter_base): Likewise.
9329 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
9331 (STRU_QUALIFIERS): Likewise.
9332 (STRSS_QUALIFIERS): Likewise.
9333 (STRSU_QUALIFIERS): Likewise.
9334 (STRSBS_QUALIFIERS): Likewise.
9335 (STRSBU_QUALIFIERS): Likewise.
9336 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
9337 (VSTRWSBQ): Define iterators.
9338 (VSTRBSOQ): Likewise.
9340 (mve_vstrbq_<supf><mode>): Define RTL pattern.
9341 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
9342 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
9344 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9345 Mihail Ionescu <mihail.ionescu@arm.com>
9346 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9348 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
9349 (vabdq_m_f16): Likewise.
9350 (vaddq_m_f32): Likewise.
9351 (vaddq_m_f16): Likewise.
9352 (vaddq_m_n_f32): Likewise.
9353 (vaddq_m_n_f16): Likewise.
9354 (vandq_m_f32): Likewise.
9355 (vandq_m_f16): Likewise.
9356 (vbicq_m_f32): Likewise.
9357 (vbicq_m_f16): Likewise.
9358 (vbrsrq_m_n_f32): Likewise.
9359 (vbrsrq_m_n_f16): Likewise.
9360 (vcaddq_rot270_m_f32): Likewise.
9361 (vcaddq_rot270_m_f16): Likewise.
9362 (vcaddq_rot90_m_f32): Likewise.
9363 (vcaddq_rot90_m_f16): Likewise.
9364 (vcmlaq_m_f32): Likewise.
9365 (vcmlaq_m_f16): Likewise.
9366 (vcmlaq_rot180_m_f32): Likewise.
9367 (vcmlaq_rot180_m_f16): Likewise.
9368 (vcmlaq_rot270_m_f32): Likewise.
9369 (vcmlaq_rot270_m_f16): Likewise.
9370 (vcmlaq_rot90_m_f32): Likewise.
9371 (vcmlaq_rot90_m_f16): Likewise.
9372 (vcmulq_m_f32): Likewise.
9373 (vcmulq_m_f16): Likewise.
9374 (vcmulq_rot180_m_f32): Likewise.
9375 (vcmulq_rot180_m_f16): Likewise.
9376 (vcmulq_rot270_m_f32): Likewise.
9377 (vcmulq_rot270_m_f16): Likewise.
9378 (vcmulq_rot90_m_f32): Likewise.
9379 (vcmulq_rot90_m_f16): Likewise.
9380 (vcvtq_m_n_s32_f32): Likewise.
9381 (vcvtq_m_n_s16_f16): Likewise.
9382 (vcvtq_m_n_u32_f32): Likewise.
9383 (vcvtq_m_n_u16_f16): Likewise.
9384 (veorq_m_f32): Likewise.
9385 (veorq_m_f16): Likewise.
9386 (vfmaq_m_f32): Likewise.
9387 (vfmaq_m_f16): Likewise.
9388 (vfmaq_m_n_f32): Likewise.
9389 (vfmaq_m_n_f16): Likewise.
9390 (vfmasq_m_n_f32): Likewise.
9391 (vfmasq_m_n_f16): Likewise.
9392 (vfmsq_m_f32): Likewise.
9393 (vfmsq_m_f16): Likewise.
9394 (vmaxnmq_m_f32): Likewise.
9395 (vmaxnmq_m_f16): Likewise.
9396 (vminnmq_m_f32): Likewise.
9397 (vminnmq_m_f16): Likewise.
9398 (vmulq_m_f32): Likewise.
9399 (vmulq_m_f16): Likewise.
9400 (vmulq_m_n_f32): Likewise.
9401 (vmulq_m_n_f16): Likewise.
9402 (vornq_m_f32): Likewise.
9403 (vornq_m_f16): Likewise.
9404 (vorrq_m_f32): Likewise.
9405 (vorrq_m_f16): Likewise.
9406 (vsubq_m_f32): Likewise.
9407 (vsubq_m_f16): Likewise.
9408 (vsubq_m_n_f32): Likewise.
9409 (vsubq_m_n_f16): Likewise.
9410 (__attribute__): Likewise.
9411 (__arm_vabdq_m_f32): Likewise.
9412 (__arm_vabdq_m_f16): Likewise.
9413 (__arm_vaddq_m_f32): Likewise.
9414 (__arm_vaddq_m_f16): Likewise.
9415 (__arm_vaddq_m_n_f32): Likewise.
9416 (__arm_vaddq_m_n_f16): Likewise.
9417 (__arm_vandq_m_f32): Likewise.
9418 (__arm_vandq_m_f16): Likewise.
9419 (__arm_vbicq_m_f32): Likewise.
9420 (__arm_vbicq_m_f16): Likewise.
9421 (__arm_vbrsrq_m_n_f32): Likewise.
9422 (__arm_vbrsrq_m_n_f16): Likewise.
9423 (__arm_vcaddq_rot270_m_f32): Likewise.
9424 (__arm_vcaddq_rot270_m_f16): Likewise.
9425 (__arm_vcaddq_rot90_m_f32): Likewise.
9426 (__arm_vcaddq_rot90_m_f16): Likewise.
9427 (__arm_vcmlaq_m_f32): Likewise.
9428 (__arm_vcmlaq_m_f16): Likewise.
9429 (__arm_vcmlaq_rot180_m_f32): Likewise.
9430 (__arm_vcmlaq_rot180_m_f16): Likewise.
9431 (__arm_vcmlaq_rot270_m_f32): Likewise.
9432 (__arm_vcmlaq_rot270_m_f16): Likewise.
9433 (__arm_vcmlaq_rot90_m_f32): Likewise.
9434 (__arm_vcmlaq_rot90_m_f16): Likewise.
9435 (__arm_vcmulq_m_f32): Likewise.
9436 (__arm_vcmulq_m_f16): Likewise.
9437 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
9438 (__arm_vcmulq_rot180_m_f16): Likewise.
9439 (__arm_vcmulq_rot270_m_f32): Likewise.
9440 (__arm_vcmulq_rot270_m_f16): Likewise.
9441 (__arm_vcmulq_rot90_m_f32): Likewise.
9442 (__arm_vcmulq_rot90_m_f16): Likewise.
9443 (__arm_vcvtq_m_n_s32_f32): Likewise.
9444 (__arm_vcvtq_m_n_s16_f16): Likewise.
9445 (__arm_vcvtq_m_n_u32_f32): Likewise.
9446 (__arm_vcvtq_m_n_u16_f16): Likewise.
9447 (__arm_veorq_m_f32): Likewise.
9448 (__arm_veorq_m_f16): Likewise.
9449 (__arm_vfmaq_m_f32): Likewise.
9450 (__arm_vfmaq_m_f16): Likewise.
9451 (__arm_vfmaq_m_n_f32): Likewise.
9452 (__arm_vfmaq_m_n_f16): Likewise.
9453 (__arm_vfmasq_m_n_f32): Likewise.
9454 (__arm_vfmasq_m_n_f16): Likewise.
9455 (__arm_vfmsq_m_f32): Likewise.
9456 (__arm_vfmsq_m_f16): Likewise.
9457 (__arm_vmaxnmq_m_f32): Likewise.
9458 (__arm_vmaxnmq_m_f16): Likewise.
9459 (__arm_vminnmq_m_f32): Likewise.
9460 (__arm_vminnmq_m_f16): Likewise.
9461 (__arm_vmulq_m_f32): Likewise.
9462 (__arm_vmulq_m_f16): Likewise.
9463 (__arm_vmulq_m_n_f32): Likewise.
9464 (__arm_vmulq_m_n_f16): Likewise.
9465 (__arm_vornq_m_f32): Likewise.
9466 (__arm_vornq_m_f16): Likewise.
9467 (__arm_vorrq_m_f32): Likewise.
9468 (__arm_vorrq_m_f16): Likewise.
9469 (__arm_vsubq_m_f32): Likewise.
9470 (__arm_vsubq_m_f16): Likewise.
9471 (__arm_vsubq_m_n_f32): Likewise.
9472 (__arm_vsubq_m_n_f16): Likewise.
9473 (vabdq_m): Define polymorphic variant.
9474 (vaddq_m): Likewise.
9475 (vaddq_m_n): Likewise.
9476 (vandq_m): Likewise.
9477 (vbicq_m): Likewise.
9478 (vbrsrq_m_n): Likewise.
9479 (vcaddq_rot270_m): Likewise.
9480 (vcaddq_rot90_m): Likewise.
9481 (vcmlaq_m): Likewise.
9482 (vcmlaq_rot180_m): Likewise.
9483 (vcmlaq_rot270_m): Likewise.
9484 (vcmlaq_rot90_m): Likewise.
9485 (vcmulq_m): Likewise.
9486 (vcmulq_rot180_m): Likewise.
9487 (vcmulq_rot270_m): Likewise.
9488 (vcmulq_rot90_m): Likewise.
9489 (veorq_m): Likewise.
9490 (vfmaq_m): Likewise.
9491 (vfmaq_m_n): Likewise.
9492 (vfmasq_m_n): Likewise.
9493 (vfmsq_m): Likewise.
9494 (vmaxnmq_m): Likewise.
9495 (vminnmq_m): Likewise.
9496 (vmulq_m): Likewise.
9497 (vmulq_m_n): Likewise.
9498 (vornq_m): Likewise.
9499 (vsubq_m): Likewise.
9500 (vsubq_m_n): Likewise.
9501 (vorrq_m): Likewise.
9502 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
9504 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9505 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
9506 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
9507 (mve_vaddq_m_f<mode>): Likewise.
9508 (mve_vaddq_m_n_f<mode>): Likewise.
9509 (mve_vandq_m_f<mode>): Likewise.
9510 (mve_vbicq_m_f<mode>): Likewise.
9511 (mve_vbrsrq_m_n_f<mode>): Likewise.
9512 (mve_vcaddq_rot270_m_f<mode>): Likewise.
9513 (mve_vcaddq_rot90_m_f<mode>): Likewise.
9514 (mve_vcmlaq_m_f<mode>): Likewise.
9515 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
9516 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
9517 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
9518 (mve_vcmulq_m_f<mode>): Likewise.
9519 (mve_vcmulq_rot180_m_f<mode>): Likewise.
9520 (mve_vcmulq_rot270_m_f<mode>): Likewise.
9521 (mve_vcmulq_rot90_m_f<mode>): Likewise.
9522 (mve_veorq_m_f<mode>): Likewise.
9523 (mve_vfmaq_m_f<mode>): Likewise.
9524 (mve_vfmaq_m_n_f<mode>): Likewise.
9525 (mve_vfmasq_m_n_f<mode>): Likewise.
9526 (mve_vfmsq_m_f<mode>): Likewise.
9527 (mve_vmaxnmq_m_f<mode>): Likewise.
9528 (mve_vminnmq_m_f<mode>): Likewise.
9529 (mve_vmulq_m_f<mode>): Likewise.
9530 (mve_vmulq_m_n_f<mode>): Likewise.
9531 (mve_vornq_m_f<mode>): Likewise.
9532 (mve_vorrq_m_f<mode>): Likewise.
9533 (mve_vsubq_m_f<mode>): Likewise.
9534 (mve_vsubq_m_n_f<mode>): Likewise.
9536 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9537 Mihail Ionescu <mihail.ionescu@arm.com>
9538 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9540 * config/arm/arm-protos.h (arm_mve_immediate_check):
9541 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
9542 mode and interger value.
9543 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
9544 (vmlaldavaq_p_s16): Likewise.
9545 (vmlaldavaq_p_u32): Likewise.
9546 (vmlaldavaq_p_u16): Likewise.
9547 (vmlaldavaxq_p_s32): Likewise.
9548 (vmlaldavaxq_p_s16): Likewise.
9549 (vmlaldavaxq_p_u32): Likewise.
9550 (vmlaldavaxq_p_u16): Likewise.
9551 (vmlsldavaq_p_s32): Likewise.
9552 (vmlsldavaq_p_s16): Likewise.
9553 (vmlsldavaxq_p_s32): Likewise.
9554 (vmlsldavaxq_p_s16): Likewise.
9555 (vmullbq_poly_m_p8): Likewise.
9556 (vmullbq_poly_m_p16): Likewise.
9557 (vmulltq_poly_m_p8): Likewise.
9558 (vmulltq_poly_m_p16): Likewise.
9559 (vqdmullbq_m_n_s32): Likewise.
9560 (vqdmullbq_m_n_s16): Likewise.
9561 (vqdmullbq_m_s32): Likewise.
9562 (vqdmullbq_m_s16): Likewise.
9563 (vqdmulltq_m_n_s32): Likewise.
9564 (vqdmulltq_m_n_s16): Likewise.
9565 (vqdmulltq_m_s32): Likewise.
9566 (vqdmulltq_m_s16): Likewise.
9567 (vqrshrnbq_m_n_s32): Likewise.
9568 (vqrshrnbq_m_n_s16): Likewise.
9569 (vqrshrnbq_m_n_u32): Likewise.
9570 (vqrshrnbq_m_n_u16): Likewise.
9571 (vqrshrntq_m_n_s32): Likewise.
9572 (vqrshrntq_m_n_s16): Likewise.
9573 (vqrshrntq_m_n_u32): Likewise.
9574 (vqrshrntq_m_n_u16): Likewise.
9575 (vqrshrunbq_m_n_s32): Likewise.
9576 (vqrshrunbq_m_n_s16): Likewise.
9577 (vqrshruntq_m_n_s32): Likewise.
9578 (vqrshruntq_m_n_s16): Likewise.
9579 (vqshrnbq_m_n_s32): Likewise.
9580 (vqshrnbq_m_n_s16): Likewise.
9581 (vqshrnbq_m_n_u32): Likewise.
9582 (vqshrnbq_m_n_u16): Likewise.
9583 (vqshrntq_m_n_s32): Likewise.
9584 (vqshrntq_m_n_s16): Likewise.
9585 (vqshrntq_m_n_u32): Likewise.
9586 (vqshrntq_m_n_u16): Likewise.
9587 (vqshrunbq_m_n_s32): Likewise.
9588 (vqshrunbq_m_n_s16): Likewise.
9589 (vqshruntq_m_n_s32): Likewise.
9590 (vqshruntq_m_n_s16): Likewise.
9591 (vrmlaldavhaq_p_s32): Likewise.
9592 (vrmlaldavhaq_p_u32): Likewise.
9593 (vrmlaldavhaxq_p_s32): Likewise.
9594 (vrmlsldavhaq_p_s32): Likewise.
9595 (vrmlsldavhaxq_p_s32): Likewise.
9596 (vrshrnbq_m_n_s32): Likewise.
9597 (vrshrnbq_m_n_s16): Likewise.
9598 (vrshrnbq_m_n_u32): Likewise.
9599 (vrshrnbq_m_n_u16): Likewise.
9600 (vrshrntq_m_n_s32): Likewise.
9601 (vrshrntq_m_n_s16): Likewise.
9602 (vrshrntq_m_n_u32): Likewise.
9603 (vrshrntq_m_n_u16): Likewise.
9604 (vshllbq_m_n_s8): Likewise.
9605 (vshllbq_m_n_s16): Likewise.
9606 (vshllbq_m_n_u8): Likewise.
9607 (vshllbq_m_n_u16): Likewise.
9608 (vshlltq_m_n_s8): Likewise.
9609 (vshlltq_m_n_s16): Likewise.
9610 (vshlltq_m_n_u8): Likewise.
9611 (vshlltq_m_n_u16): Likewise.
9612 (vshrnbq_m_n_s32): Likewise.
9613 (vshrnbq_m_n_s16): Likewise.
9614 (vshrnbq_m_n_u32): Likewise.
9615 (vshrnbq_m_n_u16): Likewise.
9616 (vshrntq_m_n_s32): Likewise.
9617 (vshrntq_m_n_s16): Likewise.
9618 (vshrntq_m_n_u32): Likewise.
9619 (vshrntq_m_n_u16): Likewise.
9620 (__arm_vmlaldavaq_p_s32): Define intrinsic.
9621 (__arm_vmlaldavaq_p_s16): Likewise.
9622 (__arm_vmlaldavaq_p_u32): Likewise.
9623 (__arm_vmlaldavaq_p_u16): Likewise.
9624 (__arm_vmlaldavaxq_p_s32): Likewise.
9625 (__arm_vmlaldavaxq_p_s16): Likewise.
9626 (__arm_vmlaldavaxq_p_u32): Likewise.
9627 (__arm_vmlaldavaxq_p_u16): Likewise.
9628 (__arm_vmlsldavaq_p_s32): Likewise.
9629 (__arm_vmlsldavaq_p_s16): Likewise.
9630 (__arm_vmlsldavaxq_p_s32): Likewise.
9631 (__arm_vmlsldavaxq_p_s16): Likewise.
9632 (__arm_vmullbq_poly_m_p8): Likewise.
9633 (__arm_vmullbq_poly_m_p16): Likewise.
9634 (__arm_vmulltq_poly_m_p8): Likewise.
9635 (__arm_vmulltq_poly_m_p16): Likewise.
9636 (__arm_vqdmullbq_m_n_s32): Likewise.
9637 (__arm_vqdmullbq_m_n_s16): Likewise.
9638 (__arm_vqdmullbq_m_s32): Likewise.
9639 (__arm_vqdmullbq_m_s16): Likewise.
9640 (__arm_vqdmulltq_m_n_s32): Likewise.
9641 (__arm_vqdmulltq_m_n_s16): Likewise.
9642 (__arm_vqdmulltq_m_s32): Likewise.
9643 (__arm_vqdmulltq_m_s16): Likewise.
9644 (__arm_vqrshrnbq_m_n_s32): Likewise.
9645 (__arm_vqrshrnbq_m_n_s16): Likewise.
9646 (__arm_vqrshrnbq_m_n_u32): Likewise.
9647 (__arm_vqrshrnbq_m_n_u16): Likewise.
9648 (__arm_vqrshrntq_m_n_s32): Likewise.
9649 (__arm_vqrshrntq_m_n_s16): Likewise.
9650 (__arm_vqrshrntq_m_n_u32): Likewise.
9651 (__arm_vqrshrntq_m_n_u16): Likewise.
9652 (__arm_vqrshrunbq_m_n_s32): Likewise.
9653 (__arm_vqrshrunbq_m_n_s16): Likewise.
9654 (__arm_vqrshruntq_m_n_s32): Likewise.
9655 (__arm_vqrshruntq_m_n_s16): Likewise.
9656 (__arm_vqshrnbq_m_n_s32): Likewise.
9657 (__arm_vqshrnbq_m_n_s16): Likewise.
9658 (__arm_vqshrnbq_m_n_u32): Likewise.
9659 (__arm_vqshrnbq_m_n_u16): Likewise.
9660 (__arm_vqshrntq_m_n_s32): Likewise.
9661 (__arm_vqshrntq_m_n_s16): Likewise.
9662 (__arm_vqshrntq_m_n_u32): Likewise.
9663 (__arm_vqshrntq_m_n_u16): Likewise.
9664 (__arm_vqshrunbq_m_n_s32): Likewise.
9665 (__arm_vqshrunbq_m_n_s16): Likewise.
9666 (__arm_vqshruntq_m_n_s32): Likewise.
9667 (__arm_vqshruntq_m_n_s16): Likewise.
9668 (__arm_vrmlaldavhaq_p_s32): Likewise.
9669 (__arm_vrmlaldavhaq_p_u32): Likewise.
9670 (__arm_vrmlaldavhaxq_p_s32): Likewise.
9671 (__arm_vrmlsldavhaq_p_s32): Likewise.
9672 (__arm_vrmlsldavhaxq_p_s32): Likewise.
9673 (__arm_vrshrnbq_m_n_s32): Likewise.
9674 (__arm_vrshrnbq_m_n_s16): Likewise.
9675 (__arm_vrshrnbq_m_n_u32): Likewise.
9676 (__arm_vrshrnbq_m_n_u16): Likewise.
9677 (__arm_vrshrntq_m_n_s32): Likewise.
9678 (__arm_vrshrntq_m_n_s16): Likewise.
9679 (__arm_vrshrntq_m_n_u32): Likewise.
9680 (__arm_vrshrntq_m_n_u16): Likewise.
9681 (__arm_vshllbq_m_n_s8): Likewise.
9682 (__arm_vshllbq_m_n_s16): Likewise.
9683 (__arm_vshllbq_m_n_u8): Likewise.
9684 (__arm_vshllbq_m_n_u16): Likewise.
9685 (__arm_vshlltq_m_n_s8): Likewise.
9686 (__arm_vshlltq_m_n_s16): Likewise.
9687 (__arm_vshlltq_m_n_u8): Likewise.
9688 (__arm_vshlltq_m_n_u16): Likewise.
9689 (__arm_vshrnbq_m_n_s32): Likewise.
9690 (__arm_vshrnbq_m_n_s16): Likewise.
9691 (__arm_vshrnbq_m_n_u32): Likewise.
9692 (__arm_vshrnbq_m_n_u16): Likewise.
9693 (__arm_vshrntq_m_n_s32): Likewise.
9694 (__arm_vshrntq_m_n_s16): Likewise.
9695 (__arm_vshrntq_m_n_u32): Likewise.
9696 (__arm_vshrntq_m_n_u16): Likewise.
9697 (vmullbq_poly_m): Define polymorphic variant.
9698 (vmulltq_poly_m): Likewise.
9699 (vshllbq_m): Likewise.
9700 (vshrntq_m_n): Likewise.
9701 (vshrnbq_m_n): Likewise.
9702 (vshlltq_m_n): Likewise.
9703 (vshllbq_m_n): Likewise.
9704 (vrshrntq_m_n): Likewise.
9705 (vrshrnbq_m_n): Likewise.
9706 (vqshruntq_m_n): Likewise.
9707 (vqshrunbq_m_n): Likewise.
9708 (vqdmullbq_m_n): Likewise.
9709 (vqdmullbq_m): Likewise.
9710 (vqdmulltq_m_n): Likewise.
9711 (vqdmulltq_m): Likewise.
9712 (vqrshrnbq_m_n): Likewise.
9713 (vqrshrntq_m_n): Likewise.
9714 (vqrshrunbq_m_n): Likewise.
9715 (vqrshruntq_m_n): Likewise.
9716 (vqshrnbq_m_n): Likewise.
9717 (vqshrntq_m_n): Likewise.
9718 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
9720 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
9721 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
9722 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
9723 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
9724 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
9725 (VMLALDAVAXQ_P): Likewise.
9726 (VQRSHRNBQ_M_N): Likewise.
9727 (VQRSHRNTQ_M_N): Likewise.
9728 (VQSHRNBQ_M_N): Likewise.
9729 (VQSHRNTQ_M_N): Likewise.
9730 (VRSHRNBQ_M_N): Likewise.
9731 (VRSHRNTQ_M_N): Likewise.
9732 (VSHLLBQ_M_N): Likewise.
9733 (VSHLLTQ_M_N): Likewise.
9734 (VSHRNBQ_M_N): Likewise.
9735 (VSHRNTQ_M_N): Likewise.
9736 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
9737 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
9738 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
9739 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
9740 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
9741 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
9742 (mve_vrmlaldavhaq_p_sv4si): Likewise.
9743 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
9744 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
9745 (mve_vshllbq_m_n_<supf><mode>): Likewise.
9746 (mve_vshlltq_m_n_<supf><mode>): Likewise.
9747 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
9748 (mve_vshrntq_m_n_<supf><mode>): Likewise.
9749 (mve_vmlsldavaq_p_s<mode>): Likewise.
9750 (mve_vmlsldavaxq_p_s<mode>): Likewise.
9751 (mve_vmullbq_poly_m_p<mode>): Likewise.
9752 (mve_vmulltq_poly_m_p<mode>): Likewise.
9753 (mve_vqdmullbq_m_n_s<mode>): Likewise.
9754 (mve_vqdmullbq_m_s<mode>): Likewise.
9755 (mve_vqdmulltq_m_n_s<mode>): Likewise.
9756 (mve_vqdmulltq_m_s<mode>): Likewise.
9757 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
9758 (mve_vqrshruntq_m_n_s<mode>): Likewise.
9759 (mve_vqshrunbq_m_n_s<mode>): Likewise.
9760 (mve_vqshruntq_m_n_s<mode>): Likewise.
9761 (mve_vrmlaldavhaq_p_uv4si): Likewise.
9762 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
9763 (mve_vrmlsldavhaq_p_sv4si): Likewise.
9764 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
9766 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9767 Mihail Ionescu <mihail.ionescu@arm.com>
9768 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9770 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
9771 (vabdq_m_s32): Likewise.
9772 (vabdq_m_s16): Likewise.
9773 (vabdq_m_u8): Likewise.
9774 (vabdq_m_u32): Likewise.
9775 (vabdq_m_u16): Likewise.
9776 (vaddq_m_n_s8): Likewise.
9777 (vaddq_m_n_s32): Likewise.
9778 (vaddq_m_n_s16): Likewise.
9779 (vaddq_m_n_u8): Likewise.
9780 (vaddq_m_n_u32): Likewise.
9781 (vaddq_m_n_u16): Likewise.
9782 (vaddq_m_s8): Likewise.
9783 (vaddq_m_s32): Likewise.
9784 (vaddq_m_s16): Likewise.
9785 (vaddq_m_u8): Likewise.
9786 (vaddq_m_u32): Likewise.
9787 (vaddq_m_u16): Likewise.
9788 (vandq_m_s8): Likewise.
9789 (vandq_m_s32): Likewise.
9790 (vandq_m_s16): Likewise.
9791 (vandq_m_u8): Likewise.
9792 (vandq_m_u32): Likewise.
9793 (vandq_m_u16): Likewise.
9794 (vbicq_m_s8): Likewise.
9795 (vbicq_m_s32): Likewise.
9796 (vbicq_m_s16): Likewise.
9797 (vbicq_m_u8): Likewise.
9798 (vbicq_m_u32): Likewise.
9799 (vbicq_m_u16): Likewise.
9800 (vbrsrq_m_n_s8): Likewise.
9801 (vbrsrq_m_n_s32): Likewise.
9802 (vbrsrq_m_n_s16): Likewise.
9803 (vbrsrq_m_n_u8): Likewise.
9804 (vbrsrq_m_n_u32): Likewise.
9805 (vbrsrq_m_n_u16): Likewise.
9806 (vcaddq_rot270_m_s8): Likewise.
9807 (vcaddq_rot270_m_s32): Likewise.
9808 (vcaddq_rot270_m_s16): Likewise.
9809 (vcaddq_rot270_m_u8): Likewise.
9810 (vcaddq_rot270_m_u32): Likewise.
9811 (vcaddq_rot270_m_u16): Likewise.
9812 (vcaddq_rot90_m_s8): Likewise.
9813 (vcaddq_rot90_m_s32): Likewise.
9814 (vcaddq_rot90_m_s16): Likewise.
9815 (vcaddq_rot90_m_u8): Likewise.
9816 (vcaddq_rot90_m_u32): Likewise.
9817 (vcaddq_rot90_m_u16): Likewise.
9818 (veorq_m_s8): Likewise.
9819 (veorq_m_s32): Likewise.
9820 (veorq_m_s16): Likewise.
9821 (veorq_m_u8): Likewise.
9822 (veorq_m_u32): Likewise.
9823 (veorq_m_u16): Likewise.
9824 (vhaddq_m_n_s8): Likewise.
9825 (vhaddq_m_n_s32): Likewise.
9826 (vhaddq_m_n_s16): Likewise.
9827 (vhaddq_m_n_u8): Likewise.
9828 (vhaddq_m_n_u32): Likewise.
9829 (vhaddq_m_n_u16): Likewise.
9830 (vhaddq_m_s8): Likewise.
9831 (vhaddq_m_s32): Likewise.
9832 (vhaddq_m_s16): Likewise.
9833 (vhaddq_m_u8): Likewise.
9834 (vhaddq_m_u32): Likewise.
9835 (vhaddq_m_u16): Likewise.
9836 (vhcaddq_rot270_m_s8): Likewise.
9837 (vhcaddq_rot270_m_s32): Likewise.
9838 (vhcaddq_rot270_m_s16): Likewise.
9839 (vhcaddq_rot90_m_s8): Likewise.
9840 (vhcaddq_rot90_m_s32): Likewise.
9841 (vhcaddq_rot90_m_s16): Likewise.
9842 (vhsubq_m_n_s8): Likewise.
9843 (vhsubq_m_n_s32): Likewise.
9844 (vhsubq_m_n_s16): Likewise.
9845 (vhsubq_m_n_u8): Likewise.
9846 (vhsubq_m_n_u32): Likewise.
9847 (vhsubq_m_n_u16): Likewise.
9848 (vhsubq_m_s8): Likewise.
9849 (vhsubq_m_s32): Likewise.
9850 (vhsubq_m_s16): Likewise.
9851 (vhsubq_m_u8): Likewise.
9852 (vhsubq_m_u32): Likewise.
9853 (vhsubq_m_u16): Likewise.
9854 (vmaxq_m_s8): Likewise.
9855 (vmaxq_m_s32): Likewise.
9856 (vmaxq_m_s16): Likewise.
9857 (vmaxq_m_u8): Likewise.
9858 (vmaxq_m_u32): Likewise.
9859 (vmaxq_m_u16): Likewise.
9860 (vminq_m_s8): Likewise.
9861 (vminq_m_s32): Likewise.
9862 (vminq_m_s16): Likewise.
9863 (vminq_m_u8): Likewise.
9864 (vminq_m_u32): Likewise.
9865 (vminq_m_u16): Likewise.
9866 (vmladavaq_p_s8): Likewise.
9867 (vmladavaq_p_s32): Likewise.
9868 (vmladavaq_p_s16): Likewise.
9869 (vmladavaq_p_u8): Likewise.
9870 (vmladavaq_p_u32): Likewise.
9871 (vmladavaq_p_u16): Likewise.
9872 (vmladavaxq_p_s8): Likewise.
9873 (vmladavaxq_p_s32): Likewise.
9874 (vmladavaxq_p_s16): Likewise.
9875 (vmlaq_m_n_s8): Likewise.
9876 (vmlaq_m_n_s32): Likewise.
9877 (vmlaq_m_n_s16): Likewise.
9878 (vmlaq_m_n_u8): Likewise.
9879 (vmlaq_m_n_u32): Likewise.
9880 (vmlaq_m_n_u16): Likewise.
9881 (vmlasq_m_n_s8): Likewise.
9882 (vmlasq_m_n_s32): Likewise.
9883 (vmlasq_m_n_s16): Likewise.
9884 (vmlasq_m_n_u8): Likewise.
9885 (vmlasq_m_n_u32): Likewise.
9886 (vmlasq_m_n_u16): Likewise.
9887 (vmlsdavaq_p_s8): Likewise.
9888 (vmlsdavaq_p_s32): Likewise.
9889 (vmlsdavaq_p_s16): Likewise.
9890 (vmlsdavaxq_p_s8): Likewise.
9891 (vmlsdavaxq_p_s32): Likewise.
9892 (vmlsdavaxq_p_s16): Likewise.
9893 (vmulhq_m_s8): Likewise.
9894 (vmulhq_m_s32): Likewise.
9895 (vmulhq_m_s16): Likewise.
9896 (vmulhq_m_u8): Likewise.
9897 (vmulhq_m_u32): Likewise.
9898 (vmulhq_m_u16): Likewise.
9899 (vmullbq_int_m_s8): Likewise.
9900 (vmullbq_int_m_s32): Likewise.
9901 (vmullbq_int_m_s16): Likewise.
9902 (vmullbq_int_m_u8): Likewise.
9903 (vmullbq_int_m_u32): Likewise.
9904 (vmullbq_int_m_u16): Likewise.
9905 (vmulltq_int_m_s8): Likewise.
9906 (vmulltq_int_m_s32): Likewise.
9907 (vmulltq_int_m_s16): Likewise.
9908 (vmulltq_int_m_u8): Likewise.
9909 (vmulltq_int_m_u32): Likewise.
9910 (vmulltq_int_m_u16): Likewise.
9911 (vmulq_m_n_s8): Likewise.
9912 (vmulq_m_n_s32): Likewise.
9913 (vmulq_m_n_s16): Likewise.
9914 (vmulq_m_n_u8): Likewise.
9915 (vmulq_m_n_u32): Likewise.
9916 (vmulq_m_n_u16): Likewise.
9917 (vmulq_m_s8): Likewise.
9918 (vmulq_m_s32): Likewise.
9919 (vmulq_m_s16): Likewise.
9920 (vmulq_m_u8): Likewise.
9921 (vmulq_m_u32): Likewise.
9922 (vmulq_m_u16): Likewise.
9923 (vornq_m_s8): Likewise.
9924 (vornq_m_s32): Likewise.
9925 (vornq_m_s16): Likewise.
9926 (vornq_m_u8): Likewise.
9927 (vornq_m_u32): Likewise.
9928 (vornq_m_u16): Likewise.
9929 (vorrq_m_s8): Likewise.
9930 (vorrq_m_s32): Likewise.
9931 (vorrq_m_s16): Likewise.
9932 (vorrq_m_u8): Likewise.
9933 (vorrq_m_u32): Likewise.
9934 (vorrq_m_u16): Likewise.
9935 (vqaddq_m_n_s8): Likewise.
9936 (vqaddq_m_n_s32): Likewise.
9937 (vqaddq_m_n_s16): Likewise.
9938 (vqaddq_m_n_u8): Likewise.
9939 (vqaddq_m_n_u32): Likewise.
9940 (vqaddq_m_n_u16): Likewise.
9941 (vqaddq_m_s8): Likewise.
9942 (vqaddq_m_s32): Likewise.
9943 (vqaddq_m_s16): Likewise.
9944 (vqaddq_m_u8): Likewise.
9945 (vqaddq_m_u32): Likewise.
9946 (vqaddq_m_u16): Likewise.
9947 (vqdmladhq_m_s8): Likewise.
9948 (vqdmladhq_m_s32): Likewise.
9949 (vqdmladhq_m_s16): Likewise.
9950 (vqdmladhxq_m_s8): Likewise.
9951 (vqdmladhxq_m_s32): Likewise.
9952 (vqdmladhxq_m_s16): Likewise.
9953 (vqdmlahq_m_n_s8): Likewise.
9954 (vqdmlahq_m_n_s32): Likewise.
9955 (vqdmlahq_m_n_s16): Likewise.
9956 (vqdmlahq_m_n_u8): Likewise.
9957 (vqdmlahq_m_n_u32): Likewise.
9958 (vqdmlahq_m_n_u16): Likewise.
9959 (vqdmlsdhq_m_s8): Likewise.
9960 (vqdmlsdhq_m_s32): Likewise.
9961 (vqdmlsdhq_m_s16): Likewise.
9962 (vqdmlsdhxq_m_s8): Likewise.
9963 (vqdmlsdhxq_m_s32): Likewise.
9964 (vqdmlsdhxq_m_s16): Likewise.
9965 (vqdmulhq_m_n_s8): Likewise.
9966 (vqdmulhq_m_n_s32): Likewise.
9967 (vqdmulhq_m_n_s16): Likewise.
9968 (vqdmulhq_m_s8): Likewise.
9969 (vqdmulhq_m_s32): Likewise.
9970 (vqdmulhq_m_s16): Likewise.
9971 (vqrdmladhq_m_s8): Likewise.
9972 (vqrdmladhq_m_s32): Likewise.
9973 (vqrdmladhq_m_s16): Likewise.
9974 (vqrdmladhxq_m_s8): Likewise.
9975 (vqrdmladhxq_m_s32): Likewise.
9976 (vqrdmladhxq_m_s16): Likewise.
9977 (vqrdmlahq_m_n_s8): Likewise.
9978 (vqrdmlahq_m_n_s32): Likewise.
9979 (vqrdmlahq_m_n_s16): Likewise.
9980 (vqrdmlahq_m_n_u8): Likewise.
9981 (vqrdmlahq_m_n_u32): Likewise.
9982 (vqrdmlahq_m_n_u16): Likewise.
9983 (vqrdmlashq_m_n_s8): Likewise.
9984 (vqrdmlashq_m_n_s32): Likewise.
9985 (vqrdmlashq_m_n_s16): Likewise.
9986 (vqrdmlashq_m_n_u8): Likewise.
9987 (vqrdmlashq_m_n_u32): Likewise.
9988 (vqrdmlashq_m_n_u16): Likewise.
9989 (vqrdmlsdhq_m_s8): Likewise.
9990 (vqrdmlsdhq_m_s32): Likewise.
9991 (vqrdmlsdhq_m_s16): Likewise.
9992 (vqrdmlsdhxq_m_s8): Likewise.
9993 (vqrdmlsdhxq_m_s32): Likewise.
9994 (vqrdmlsdhxq_m_s16): Likewise.
9995 (vqrdmulhq_m_n_s8): Likewise.
9996 (vqrdmulhq_m_n_s32): Likewise.
9997 (vqrdmulhq_m_n_s16): Likewise.
9998 (vqrdmulhq_m_s8): Likewise.
9999 (vqrdmulhq_m_s32): Likewise.
10000 (vqrdmulhq_m_s16): Likewise.
10001 (vqrshlq_m_s8): Likewise.
10002 (vqrshlq_m_s32): Likewise.
10003 (vqrshlq_m_s16): Likewise.
10004 (vqrshlq_m_u8): Likewise.
10005 (vqrshlq_m_u32): Likewise.
10006 (vqrshlq_m_u16): Likewise.
10007 (vqshlq_m_n_s8): Likewise.
10008 (vqshlq_m_n_s32): Likewise.
10009 (vqshlq_m_n_s16): Likewise.
10010 (vqshlq_m_n_u8): Likewise.
10011 (vqshlq_m_n_u32): Likewise.
10012 (vqshlq_m_n_u16): Likewise.
10013 (vqshlq_m_s8): Likewise.
10014 (vqshlq_m_s32): Likewise.
10015 (vqshlq_m_s16): Likewise.
10016 (vqshlq_m_u8): Likewise.
10017 (vqshlq_m_u32): Likewise.
10018 (vqshlq_m_u16): Likewise.
10019 (vqsubq_m_n_s8): Likewise.
10020 (vqsubq_m_n_s32): Likewise.
10021 (vqsubq_m_n_s16): Likewise.
10022 (vqsubq_m_n_u8): Likewise.
10023 (vqsubq_m_n_u32): Likewise.
10024 (vqsubq_m_n_u16): Likewise.
10025 (vqsubq_m_s8): Likewise.
10026 (vqsubq_m_s32): Likewise.
10027 (vqsubq_m_s16): Likewise.
10028 (vqsubq_m_u8): Likewise.
10029 (vqsubq_m_u32): Likewise.
10030 (vqsubq_m_u16): Likewise.
10031 (vrhaddq_m_s8): Likewise.
10032 (vrhaddq_m_s32): Likewise.
10033 (vrhaddq_m_s16): Likewise.
10034 (vrhaddq_m_u8): Likewise.
10035 (vrhaddq_m_u32): Likewise.
10036 (vrhaddq_m_u16): Likewise.
10037 (vrmulhq_m_s8): Likewise.
10038 (vrmulhq_m_s32): Likewise.
10039 (vrmulhq_m_s16): Likewise.
10040 (vrmulhq_m_u8): Likewise.
10041 (vrmulhq_m_u32): Likewise.
10042 (vrmulhq_m_u16): Likewise.
10043 (vrshlq_m_s8): Likewise.
10044 (vrshlq_m_s32): Likewise.
10045 (vrshlq_m_s16): Likewise.
10046 (vrshlq_m_u8): Likewise.
10047 (vrshlq_m_u32): Likewise.
10048 (vrshlq_m_u16): Likewise.
10049 (vrshrq_m_n_s8): Likewise.
10050 (vrshrq_m_n_s32): Likewise.
10051 (vrshrq_m_n_s16): Likewise.
10052 (vrshrq_m_n_u8): Likewise.
10053 (vrshrq_m_n_u32): Likewise.
10054 (vrshrq_m_n_u16): Likewise.
10055 (vshlq_m_n_s8): Likewise.
10056 (vshlq_m_n_s32): Likewise.
10057 (vshlq_m_n_s16): Likewise.
10058 (vshlq_m_n_u8): Likewise.
10059 (vshlq_m_n_u32): Likewise.
10060 (vshlq_m_n_u16): Likewise.
10061 (vshrq_m_n_s8): Likewise.
10062 (vshrq_m_n_s32): Likewise.
10063 (vshrq_m_n_s16): Likewise.
10064 (vshrq_m_n_u8): Likewise.
10065 (vshrq_m_n_u32): Likewise.
10066 (vshrq_m_n_u16): Likewise.
10067 (vsliq_m_n_s8): Likewise.
10068 (vsliq_m_n_s32): Likewise.
10069 (vsliq_m_n_s16): Likewise.
10070 (vsliq_m_n_u8): Likewise.
10071 (vsliq_m_n_u32): Likewise.
10072 (vsliq_m_n_u16): Likewise.
10073 (vsubq_m_n_s8): Likewise.
10074 (vsubq_m_n_s32): Likewise.
10075 (vsubq_m_n_s16): Likewise.
10076 (vsubq_m_n_u8): Likewise.
10077 (vsubq_m_n_u32): Likewise.
10078 (vsubq_m_n_u16): Likewise.
10079 (__arm_vabdq_m_s8): Define intrinsic.
10080 (__arm_vabdq_m_s32): Likewise.
10081 (__arm_vabdq_m_s16): Likewise.
10082 (__arm_vabdq_m_u8): Likewise.
10083 (__arm_vabdq_m_u32): Likewise.
10084 (__arm_vabdq_m_u16): Likewise.
10085 (__arm_vaddq_m_n_s8): Likewise.
10086 (__arm_vaddq_m_n_s32): Likewise.
10087 (__arm_vaddq_m_n_s16): Likewise.
10088 (__arm_vaddq_m_n_u8): Likewise.
10089 (__arm_vaddq_m_n_u32): Likewise.
10090 (__arm_vaddq_m_n_u16): Likewise.
10091 (__arm_vaddq_m_s8): Likewise.
10092 (__arm_vaddq_m_s32): Likewise.
10093 (__arm_vaddq_m_s16): Likewise.
10094 (__arm_vaddq_m_u8): Likewise.
10095 (__arm_vaddq_m_u32): Likewise.
10096 (__arm_vaddq_m_u16): Likewise.
10097 (__arm_vandq_m_s8): Likewise.
10098 (__arm_vandq_m_s32): Likewise.
10099 (__arm_vandq_m_s16): Likewise.
10100 (__arm_vandq_m_u8): Likewise.
10101 (__arm_vandq_m_u32): Likewise.
10102 (__arm_vandq_m_u16): Likewise.
10103 (__arm_vbicq_m_s8): Likewise.
10104 (__arm_vbicq_m_s32): Likewise.
10105 (__arm_vbicq_m_s16): Likewise.
10106 (__arm_vbicq_m_u8): Likewise.
10107 (__arm_vbicq_m_u32): Likewise.
10108 (__arm_vbicq_m_u16): Likewise.
10109 (__arm_vbrsrq_m_n_s8): Likewise.
10110 (__arm_vbrsrq_m_n_s32): Likewise.
10111 (__arm_vbrsrq_m_n_s16): Likewise.
10112 (__arm_vbrsrq_m_n_u8): Likewise.
10113 (__arm_vbrsrq_m_n_u32): Likewise.
10114 (__arm_vbrsrq_m_n_u16): Likewise.
10115 (__arm_vcaddq_rot270_m_s8): Likewise.
10116 (__arm_vcaddq_rot270_m_s32): Likewise.
10117 (__arm_vcaddq_rot270_m_s16): Likewise.
10118 (__arm_vcaddq_rot270_m_u8): Likewise.
10119 (__arm_vcaddq_rot270_m_u32): Likewise.
10120 (__arm_vcaddq_rot270_m_u16): Likewise.
10121 (__arm_vcaddq_rot90_m_s8): Likewise.
10122 (__arm_vcaddq_rot90_m_s32): Likewise.
10123 (__arm_vcaddq_rot90_m_s16): Likewise.
10124 (__arm_vcaddq_rot90_m_u8): Likewise.
10125 (__arm_vcaddq_rot90_m_u32): Likewise.
10126 (__arm_vcaddq_rot90_m_u16): Likewise.
10127 (__arm_veorq_m_s8): Likewise.
10128 (__arm_veorq_m_s32): Likewise.
10129 (__arm_veorq_m_s16): Likewise.
10130 (__arm_veorq_m_u8): Likewise.
10131 (__arm_veorq_m_u32): Likewise.
10132 (__arm_veorq_m_u16): Likewise.
10133 (__arm_vhaddq_m_n_s8): Likewise.
10134 (__arm_vhaddq_m_n_s32): Likewise.
10135 (__arm_vhaddq_m_n_s16): Likewise.
10136 (__arm_vhaddq_m_n_u8): Likewise.
10137 (__arm_vhaddq_m_n_u32): Likewise.
10138 (__arm_vhaddq_m_n_u16): Likewise.
10139 (__arm_vhaddq_m_s8): Likewise.
10140 (__arm_vhaddq_m_s32): Likewise.
10141 (__arm_vhaddq_m_s16): Likewise.
10142 (__arm_vhaddq_m_u8): Likewise.
10143 (__arm_vhaddq_m_u32): Likewise.
10144 (__arm_vhaddq_m_u16): Likewise.
10145 (__arm_vhcaddq_rot270_m_s8): Likewise.
10146 (__arm_vhcaddq_rot270_m_s32): Likewise.
10147 (__arm_vhcaddq_rot270_m_s16): Likewise.
10148 (__arm_vhcaddq_rot90_m_s8): Likewise.
10149 (__arm_vhcaddq_rot90_m_s32): Likewise.
10150 (__arm_vhcaddq_rot90_m_s16): Likewise.
10151 (__arm_vhsubq_m_n_s8): Likewise.
10152 (__arm_vhsubq_m_n_s32): Likewise.
10153 (__arm_vhsubq_m_n_s16): Likewise.
10154 (__arm_vhsubq_m_n_u8): Likewise.
10155 (__arm_vhsubq_m_n_u32): Likewise.
10156 (__arm_vhsubq_m_n_u16): Likewise.
10157 (__arm_vhsubq_m_s8): Likewise.
10158 (__arm_vhsubq_m_s32): Likewise.
10159 (__arm_vhsubq_m_s16): Likewise.
10160 (__arm_vhsubq_m_u8): Likewise.
10161 (__arm_vhsubq_m_u32): Likewise.
10162 (__arm_vhsubq_m_u16): Likewise.
10163 (__arm_vmaxq_m_s8): Likewise.
10164 (__arm_vmaxq_m_s32): Likewise.
10165 (__arm_vmaxq_m_s16): Likewise.
10166 (__arm_vmaxq_m_u8): Likewise.
10167 (__arm_vmaxq_m_u32): Likewise.
10168 (__arm_vmaxq_m_u16): Likewise.
10169 (__arm_vminq_m_s8): Likewise.
10170 (__arm_vminq_m_s32): Likewise.
10171 (__arm_vminq_m_s16): Likewise.
10172 (__arm_vminq_m_u8): Likewise.
10173 (__arm_vminq_m_u32): Likewise.
10174 (__arm_vminq_m_u16): Likewise.
10175 (__arm_vmladavaq_p_s8): Likewise.
10176 (__arm_vmladavaq_p_s32): Likewise.
10177 (__arm_vmladavaq_p_s16): Likewise.
10178 (__arm_vmladavaq_p_u8): Likewise.
10179 (__arm_vmladavaq_p_u32): Likewise.
10180 (__arm_vmladavaq_p_u16): Likewise.
10181 (__arm_vmladavaxq_p_s8): Likewise.
10182 (__arm_vmladavaxq_p_s32): Likewise.
10183 (__arm_vmladavaxq_p_s16): Likewise.
10184 (__arm_vmlaq_m_n_s8): Likewise.
10185 (__arm_vmlaq_m_n_s32): Likewise.
10186 (__arm_vmlaq_m_n_s16): Likewise.
10187 (__arm_vmlaq_m_n_u8): Likewise.
10188 (__arm_vmlaq_m_n_u32): Likewise.
10189 (__arm_vmlaq_m_n_u16): Likewise.
10190 (__arm_vmlasq_m_n_s8): Likewise.
10191 (__arm_vmlasq_m_n_s32): Likewise.
10192 (__arm_vmlasq_m_n_s16): Likewise.
10193 (__arm_vmlasq_m_n_u8): Likewise.
10194 (__arm_vmlasq_m_n_u32): Likewise.
10195 (__arm_vmlasq_m_n_u16): Likewise.
10196 (__arm_vmlsdavaq_p_s8): Likewise.
10197 (__arm_vmlsdavaq_p_s32): Likewise.
10198 (__arm_vmlsdavaq_p_s16): Likewise.
10199 (__arm_vmlsdavaxq_p_s8): Likewise.
10200 (__arm_vmlsdavaxq_p_s32): Likewise.
10201 (__arm_vmlsdavaxq_p_s16): Likewise.
10202 (__arm_vmulhq_m_s8): Likewise.
10203 (__arm_vmulhq_m_s32): Likewise.
10204 (__arm_vmulhq_m_s16): Likewise.
10205 (__arm_vmulhq_m_u8): Likewise.
10206 (__arm_vmulhq_m_u32): Likewise.
10207 (__arm_vmulhq_m_u16): Likewise.
10208 (__arm_vmullbq_int_m_s8): Likewise.
10209 (__arm_vmullbq_int_m_s32): Likewise.
10210 (__arm_vmullbq_int_m_s16): Likewise.
10211 (__arm_vmullbq_int_m_u8): Likewise.
10212 (__arm_vmullbq_int_m_u32): Likewise.
10213 (__arm_vmullbq_int_m_u16): Likewise.
10214 (__arm_vmulltq_int_m_s8): Likewise.
10215 (__arm_vmulltq_int_m_s32): Likewise.
10216 (__arm_vmulltq_int_m_s16): Likewise.
10217 (__arm_vmulltq_int_m_u8): Likewise.
10218 (__arm_vmulltq_int_m_u32): Likewise.
10219 (__arm_vmulltq_int_m_u16): Likewise.
10220 (__arm_vmulq_m_n_s8): Likewise.
10221 (__arm_vmulq_m_n_s32): Likewise.
10222 (__arm_vmulq_m_n_s16): Likewise.
10223 (__arm_vmulq_m_n_u8): Likewise.
10224 (__arm_vmulq_m_n_u32): Likewise.
10225 (__arm_vmulq_m_n_u16): Likewise.
10226 (__arm_vmulq_m_s8): Likewise.
10227 (__arm_vmulq_m_s32): Likewise.
10228 (__arm_vmulq_m_s16): Likewise.
10229 (__arm_vmulq_m_u8): Likewise.
10230 (__arm_vmulq_m_u32): Likewise.
10231 (__arm_vmulq_m_u16): Likewise.
10232 (__arm_vornq_m_s8): Likewise.
10233 (__arm_vornq_m_s32): Likewise.
10234 (__arm_vornq_m_s16): Likewise.
10235 (__arm_vornq_m_u8): Likewise.
10236 (__arm_vornq_m_u32): Likewise.
10237 (__arm_vornq_m_u16): Likewise.
10238 (__arm_vorrq_m_s8): Likewise.
10239 (__arm_vorrq_m_s32): Likewise.
10240 (__arm_vorrq_m_s16): Likewise.
10241 (__arm_vorrq_m_u8): Likewise.
10242 (__arm_vorrq_m_u32): Likewise.
10243 (__arm_vorrq_m_u16): Likewise.
10244 (__arm_vqaddq_m_n_s8): Likewise.
10245 (__arm_vqaddq_m_n_s32): Likewise.
10246 (__arm_vqaddq_m_n_s16): Likewise.
10247 (__arm_vqaddq_m_n_u8): Likewise.
10248 (__arm_vqaddq_m_n_u32): Likewise.
10249 (__arm_vqaddq_m_n_u16): Likewise.
10250 (__arm_vqaddq_m_s8): Likewise.
10251 (__arm_vqaddq_m_s32): Likewise.
10252 (__arm_vqaddq_m_s16): Likewise.
10253 (__arm_vqaddq_m_u8): Likewise.
10254 (__arm_vqaddq_m_u32): Likewise.
10255 (__arm_vqaddq_m_u16): Likewise.
10256 (__arm_vqdmladhq_m_s8): Likewise.
10257 (__arm_vqdmladhq_m_s32): Likewise.
10258 (__arm_vqdmladhq_m_s16): Likewise.
10259 (__arm_vqdmladhxq_m_s8): Likewise.
10260 (__arm_vqdmladhxq_m_s32): Likewise.
10261 (__arm_vqdmladhxq_m_s16): Likewise.
10262 (__arm_vqdmlahq_m_n_s8): Likewise.
10263 (__arm_vqdmlahq_m_n_s32): Likewise.
10264 (__arm_vqdmlahq_m_n_s16): Likewise.
10265 (__arm_vqdmlahq_m_n_u8): Likewise.
10266 (__arm_vqdmlahq_m_n_u32): Likewise.
10267 (__arm_vqdmlahq_m_n_u16): Likewise.
10268 (__arm_vqdmlsdhq_m_s8): Likewise.
10269 (__arm_vqdmlsdhq_m_s32): Likewise.
10270 (__arm_vqdmlsdhq_m_s16): Likewise.
10271 (__arm_vqdmlsdhxq_m_s8): Likewise.
10272 (__arm_vqdmlsdhxq_m_s32): Likewise.
10273 (__arm_vqdmlsdhxq_m_s16): Likewise.
10274 (__arm_vqdmulhq_m_n_s8): Likewise.
10275 (__arm_vqdmulhq_m_n_s32): Likewise.
10276 (__arm_vqdmulhq_m_n_s16): Likewise.
10277 (__arm_vqdmulhq_m_s8): Likewise.
10278 (__arm_vqdmulhq_m_s32): Likewise.
10279 (__arm_vqdmulhq_m_s16): Likewise.
10280 (__arm_vqrdmladhq_m_s8): Likewise.
10281 (__arm_vqrdmladhq_m_s32): Likewise.
10282 (__arm_vqrdmladhq_m_s16): Likewise.
10283 (__arm_vqrdmladhxq_m_s8): Likewise.
10284 (__arm_vqrdmladhxq_m_s32): Likewise.
10285 (__arm_vqrdmladhxq_m_s16): Likewise.
10286 (__arm_vqrdmlahq_m_n_s8): Likewise.
10287 (__arm_vqrdmlahq_m_n_s32): Likewise.
10288 (__arm_vqrdmlahq_m_n_s16): Likewise.
10289 (__arm_vqrdmlahq_m_n_u8): Likewise.
10290 (__arm_vqrdmlahq_m_n_u32): Likewise.
10291 (__arm_vqrdmlahq_m_n_u16): Likewise.
10292 (__arm_vqrdmlashq_m_n_s8): Likewise.
10293 (__arm_vqrdmlashq_m_n_s32): Likewise.
10294 (__arm_vqrdmlashq_m_n_s16): Likewise.
10295 (__arm_vqrdmlashq_m_n_u8): Likewise.
10296 (__arm_vqrdmlashq_m_n_u32): Likewise.
10297 (__arm_vqrdmlashq_m_n_u16): Likewise.
10298 (__arm_vqrdmlsdhq_m_s8): Likewise.
10299 (__arm_vqrdmlsdhq_m_s32): Likewise.
10300 (__arm_vqrdmlsdhq_m_s16): Likewise.
10301 (__arm_vqrdmlsdhxq_m_s8): Likewise.
10302 (__arm_vqrdmlsdhxq_m_s32): Likewise.
10303 (__arm_vqrdmlsdhxq_m_s16): Likewise.
10304 (__arm_vqrdmulhq_m_n_s8): Likewise.
10305 (__arm_vqrdmulhq_m_n_s32): Likewise.
10306 (__arm_vqrdmulhq_m_n_s16): Likewise.
10307 (__arm_vqrdmulhq_m_s8): Likewise.
10308 (__arm_vqrdmulhq_m_s32): Likewise.
10309 (__arm_vqrdmulhq_m_s16): Likewise.
10310 (__arm_vqrshlq_m_s8): Likewise.
10311 (__arm_vqrshlq_m_s32): Likewise.
10312 (__arm_vqrshlq_m_s16): Likewise.
10313 (__arm_vqrshlq_m_u8): Likewise.
10314 (__arm_vqrshlq_m_u32): Likewise.
10315 (__arm_vqrshlq_m_u16): Likewise.
10316 (__arm_vqshlq_m_n_s8): Likewise.
10317 (__arm_vqshlq_m_n_s32): Likewise.
10318 (__arm_vqshlq_m_n_s16): Likewise.
10319 (__arm_vqshlq_m_n_u8): Likewise.
10320 (__arm_vqshlq_m_n_u32): Likewise.
10321 (__arm_vqshlq_m_n_u16): Likewise.
10322 (__arm_vqshlq_m_s8): Likewise.
10323 (__arm_vqshlq_m_s32): Likewise.
10324 (__arm_vqshlq_m_s16): Likewise.
10325 (__arm_vqshlq_m_u8): Likewise.
10326 (__arm_vqshlq_m_u32): Likewise.
10327 (__arm_vqshlq_m_u16): Likewise.
10328 (__arm_vqsubq_m_n_s8): Likewise.
10329 (__arm_vqsubq_m_n_s32): Likewise.
10330 (__arm_vqsubq_m_n_s16): Likewise.
10331 (__arm_vqsubq_m_n_u8): Likewise.
10332 (__arm_vqsubq_m_n_u32): Likewise.
10333 (__arm_vqsubq_m_n_u16): Likewise.
10334 (__arm_vqsubq_m_s8): Likewise.
10335 (__arm_vqsubq_m_s32): Likewise.
10336 (__arm_vqsubq_m_s16): Likewise.
10337 (__arm_vqsubq_m_u8): Likewise.
10338 (__arm_vqsubq_m_u32): Likewise.
10339 (__arm_vqsubq_m_u16): Likewise.
10340 (__arm_vrhaddq_m_s8): Likewise.
10341 (__arm_vrhaddq_m_s32): Likewise.
10342 (__arm_vrhaddq_m_s16): Likewise.
10343 (__arm_vrhaddq_m_u8): Likewise.
10344 (__arm_vrhaddq_m_u32): Likewise.
10345 (__arm_vrhaddq_m_u16): Likewise.
10346 (__arm_vrmulhq_m_s8): Likewise.
10347 (__arm_vrmulhq_m_s32): Likewise.
10348 (__arm_vrmulhq_m_s16): Likewise.
10349 (__arm_vrmulhq_m_u8): Likewise.
10350 (__arm_vrmulhq_m_u32): Likewise.
10351 (__arm_vrmulhq_m_u16): Likewise.
10352 (__arm_vrshlq_m_s8): Likewise.
10353 (__arm_vrshlq_m_s32): Likewise.
10354 (__arm_vrshlq_m_s16): Likewise.
10355 (__arm_vrshlq_m_u8): Likewise.
10356 (__arm_vrshlq_m_u32): Likewise.
10357 (__arm_vrshlq_m_u16): Likewise.
10358 (__arm_vrshrq_m_n_s8): Likewise.
10359 (__arm_vrshrq_m_n_s32): Likewise.
10360 (__arm_vrshrq_m_n_s16): Likewise.
10361 (__arm_vrshrq_m_n_u8): Likewise.
10362 (__arm_vrshrq_m_n_u32): Likewise.
10363 (__arm_vrshrq_m_n_u16): Likewise.
10364 (__arm_vshlq_m_n_s8): Likewise.
10365 (__arm_vshlq_m_n_s32): Likewise.
10366 (__arm_vshlq_m_n_s16): Likewise.
10367 (__arm_vshlq_m_n_u8): Likewise.
10368 (__arm_vshlq_m_n_u32): Likewise.
10369 (__arm_vshlq_m_n_u16): Likewise.
10370 (__arm_vshrq_m_n_s8): Likewise.
10371 (__arm_vshrq_m_n_s32): Likewise.
10372 (__arm_vshrq_m_n_s16): Likewise.
10373 (__arm_vshrq_m_n_u8): Likewise.
10374 (__arm_vshrq_m_n_u32): Likewise.
10375 (__arm_vshrq_m_n_u16): Likewise.
10376 (__arm_vsliq_m_n_s8): Likewise.
10377 (__arm_vsliq_m_n_s32): Likewise.
10378 (__arm_vsliq_m_n_s16): Likewise.
10379 (__arm_vsliq_m_n_u8): Likewise.
10380 (__arm_vsliq_m_n_u32): Likewise.
10381 (__arm_vsliq_m_n_u16): Likewise.
10382 (__arm_vsubq_m_n_s8): Likewise.
10383 (__arm_vsubq_m_n_s32): Likewise.
10384 (__arm_vsubq_m_n_s16): Likewise.
10385 (__arm_vsubq_m_n_u8): Likewise.
10386 (__arm_vsubq_m_n_u32): Likewise.
10387 (__arm_vsubq_m_n_u16): Likewise.
10388 (vqdmladhq_m): Define polymorphic variant.
10389 (vqdmladhxq_m): Likewise.
10390 (vqdmlsdhq_m): Likewise.
10391 (vqdmlsdhxq_m): Likewise.
10392 (vabdq_m): Likewise.
10393 (vandq_m): Likewise.
10394 (vbicq_m): Likewise.
10395 (vbrsrq_m_n): Likewise.
10396 (vcaddq_rot270_m): Likewise.
10397 (vcaddq_rot90_m): Likewise.
10398 (veorq_m): Likewise.
10399 (vmaxq_m): Likewise.
10400 (vminq_m): Likewise.
10401 (vmladavaq_p): Likewise.
10402 (vmlaq_m_n): Likewise.
10403 (vmlasq_m_n): Likewise.
10404 (vmulhq_m): Likewise.
10405 (vmullbq_int_m): Likewise.
10406 (vmulltq_int_m): Likewise.
10407 (vornq_m): Likewise.
10408 (vorrq_m): Likewise.
10409 (vqdmlahq_m_n): Likewise.
10410 (vqrdmlahq_m_n): Likewise.
10411 (vqrdmlashq_m_n): Likewise.
10412 (vqrshlq_m): Likewise.
10413 (vqshlq_m_n): Likewise.
10414 (vqshlq_m): Likewise.
10415 (vrhaddq_m): Likewise.
10416 (vrmulhq_m): Likewise.
10417 (vrshlq_m): Likewise.
10418 (vrshrq_m_n): Likewise.
10419 (vshlq_m_n): Likewise.
10420 (vshrq_m_n): Likewise.
10421 (vsliq_m): Likewise.
10422 (vaddq_m_n): Likewise.
10423 (vaddq_m): Likewise.
10424 (vhaddq_m_n): Likewise.
10425 (vhaddq_m): Likewise.
10426 (vhcaddq_rot270_m): Likewise.
10427 (vhcaddq_rot90_m): Likewise.
10428 (vhsubq_m): Likewise.
10429 (vhsubq_m_n): Likewise.
10430 (vmulq_m_n): Likewise.
10431 (vmulq_m): Likewise.
10432 (vqaddq_m_n): Likewise.
10433 (vqaddq_m): Likewise.
10434 (vqdmulhq_m_n): Likewise.
10435 (vqdmulhq_m): Likewise.
10436 (vsubq_m_n): Likewise.
10437 (vsliq_m_n): Likewise.
10438 (vqsubq_m_n): Likewise.
10439 (vqsubq_m): Likewise.
10440 (vqrdmulhq_m): Likewise.
10441 (vqrdmulhq_m_n): Likewise.
10442 (vqrdmlsdhxq_m): Likewise.
10443 (vqrdmlsdhq_m): Likewise.
10444 (vqrdmladhq_m): Likewise.
10445 (vqrdmladhxq_m): Likewise.
10446 (vmlsdavaxq_p): Likewise.
10447 (vmlsdavaq_p): Likewise.
10448 (vmladavaxq_p): Likewise.
10449 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10451 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10452 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10453 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
10454 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
10455 * config/arm/mve.md (VHSUBQ_M): Define iterators.
10456 (VSLIQ_M_N): Likewise.
10457 (VQRDMLAHQ_M_N): Likewise.
10458 (VRSHLQ_M): Likewise.
10459 (VMINQ_M): Likewise.
10460 (VMULLBQ_INT_M): Likewise.
10461 (VMULHQ_M): Likewise.
10462 (VMULQ_M): Likewise.
10463 (VHSUBQ_M_N): Likewise.
10464 (VHADDQ_M_N): Likewise.
10465 (VORRQ_M): Likewise.
10466 (VRMULHQ_M): Likewise.
10467 (VQADDQ_M): Likewise.
10468 (VRSHRQ_M_N): Likewise.
10469 (VQSUBQ_M_N): Likewise.
10470 (VADDQ_M): Likewise.
10471 (VORNQ_M): Likewise.
10472 (VQDMLAHQ_M_N): Likewise.
10473 (VRHADDQ_M): Likewise.
10474 (VQSHLQ_M): Likewise.
10475 (VANDQ_M): Likewise.
10476 (VBICQ_M): Likewise.
10477 (VSHLQ_M_N): Likewise.
10478 (VCADDQ_ROT270_M): Likewise.
10479 (VQRSHLQ_M): Likewise.
10480 (VQADDQ_M_N): Likewise.
10481 (VADDQ_M_N): Likewise.
10482 (VMAXQ_M): Likewise.
10483 (VQSUBQ_M): Likewise.
10484 (VMLASQ_M_N): Likewise.
10485 (VMLADAVAQ_P): Likewise.
10486 (VBRSRQ_M_N): Likewise.
10487 (VMULQ_M_N): Likewise.
10488 (VCADDQ_ROT90_M): Likewise.
10489 (VMULLTQ_INT_M): Likewise.
10490 (VEORQ_M): Likewise.
10491 (VSHRQ_M_N): Likewise.
10492 (VSUBQ_M_N): Likewise.
10493 (VHADDQ_M): Likewise.
10494 (VABDQ_M): Likewise.
10495 (VQRDMLASHQ_M_N): Likewise.
10496 (VMLAQ_M_N): Likewise.
10497 (VQSHLQ_M_N): Likewise.
10498 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
10499 (mve_vaddq_m_n_<supf><mode>): Likewise.
10500 (mve_vaddq_m_<supf><mode>): Likewise.
10501 (mve_vandq_m_<supf><mode>): Likewise.
10502 (mve_vbicq_m_<supf><mode>): Likewise.
10503 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
10504 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
10505 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
10506 (mve_veorq_m_<supf><mode>): Likewise.
10507 (mve_vhaddq_m_n_<supf><mode>): Likewise.
10508 (mve_vhaddq_m_<supf><mode>): Likewise.
10509 (mve_vhsubq_m_n_<supf><mode>): Likewise.
10510 (mve_vhsubq_m_<supf><mode>): Likewise.
10511 (mve_vmaxq_m_<supf><mode>): Likewise.
10512 (mve_vminq_m_<supf><mode>): Likewise.
10513 (mve_vmladavaq_p_<supf><mode>): Likewise.
10514 (mve_vmlaq_m_n_<supf><mode>): Likewise.
10515 (mve_vmlasq_m_n_<supf><mode>): Likewise.
10516 (mve_vmulhq_m_<supf><mode>): Likewise.
10517 (mve_vmullbq_int_m_<supf><mode>): Likewise.
10518 (mve_vmulltq_int_m_<supf><mode>): Likewise.
10519 (mve_vmulq_m_n_<supf><mode>): Likewise.
10520 (mve_vmulq_m_<supf><mode>): Likewise.
10521 (mve_vornq_m_<supf><mode>): Likewise.
10522 (mve_vorrq_m_<supf><mode>): Likewise.
10523 (mve_vqaddq_m_n_<supf><mode>): Likewise.
10524 (mve_vqaddq_m_<supf><mode>): Likewise.
10525 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
10526 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
10527 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
10528 (mve_vqrshlq_m_<supf><mode>): Likewise.
10529 (mve_vqshlq_m_n_<supf><mode>): Likewise.
10530 (mve_vqshlq_m_<supf><mode>): Likewise.
10531 (mve_vqsubq_m_n_<supf><mode>): Likewise.
10532 (mve_vqsubq_m_<supf><mode>): Likewise.
10533 (mve_vrhaddq_m_<supf><mode>): Likewise.
10534 (mve_vrmulhq_m_<supf><mode>): Likewise.
10535 (mve_vrshlq_m_<supf><mode>): Likewise.
10536 (mve_vrshrq_m_n_<supf><mode>): Likewise.
10537 (mve_vshlq_m_n_<supf><mode>): Likewise.
10538 (mve_vshrq_m_n_<supf><mode>): Likewise.
10539 (mve_vsliq_m_n_<supf><mode>): Likewise.
10540 (mve_vsubq_m_n_<supf><mode>): Likewise.
10541 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
10542 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
10543 (mve_vmladavaxq_p_s<mode>): Likewise.
10544 (mve_vmlsdavaq_p_s<mode>): Likewise.
10545 (mve_vmlsdavaxq_p_s<mode>): Likewise.
10546 (mve_vqdmladhq_m_s<mode>): Likewise.
10547 (mve_vqdmladhxq_m_s<mode>): Likewise.
10548 (mve_vqdmlsdhq_m_s<mode>): Likewise.
10549 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
10550 (mve_vqdmulhq_m_n_s<mode>): Likewise.
10551 (mve_vqdmulhq_m_s<mode>): Likewise.
10552 (mve_vqrdmladhq_m_s<mode>): Likewise.
10553 (mve_vqrdmladhxq_m_s<mode>): Likewise.
10554 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
10555 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
10556 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
10557 (mve_vqrdmulhq_m_s<mode>): Likewise.
10559 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10560 Mihail Ionescu <mihail.ionescu@arm.com>
10561 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10563 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
10564 Define builtin qualifier.
10565 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10566 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10567 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10568 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10569 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10570 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10571 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10572 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
10573 (vsubq_m_s8): Likewise.
10574 (vcvtq_m_n_f16_u16): Likewise.
10575 (vqshluq_m_n_s8): Likewise.
10576 (vabavq_p_s8): Likewise.
10577 (vsriq_m_n_u8): Likewise.
10578 (vshlq_m_u8): Likewise.
10579 (vsubq_m_u8): Likewise.
10580 (vabavq_p_u8): Likewise.
10581 (vshlq_m_s8): Likewise.
10582 (vcvtq_m_n_f16_s16): Likewise.
10583 (vsriq_m_n_s16): Likewise.
10584 (vsubq_m_s16): Likewise.
10585 (vcvtq_m_n_f32_u32): Likewise.
10586 (vqshluq_m_n_s16): Likewise.
10587 (vabavq_p_s16): Likewise.
10588 (vsriq_m_n_u16): Likewise.
10589 (vshlq_m_u16): Likewise.
10590 (vsubq_m_u16): Likewise.
10591 (vabavq_p_u16): Likewise.
10592 (vshlq_m_s16): Likewise.
10593 (vcvtq_m_n_f32_s32): Likewise.
10594 (vsriq_m_n_s32): Likewise.
10595 (vsubq_m_s32): Likewise.
10596 (vqshluq_m_n_s32): Likewise.
10597 (vabavq_p_s32): Likewise.
10598 (vsriq_m_n_u32): Likewise.
10599 (vshlq_m_u32): Likewise.
10600 (vsubq_m_u32): Likewise.
10601 (vabavq_p_u32): Likewise.
10602 (vshlq_m_s32): Likewise.
10603 (__arm_vsriq_m_n_s8): Define intrinsic.
10604 (__arm_vsubq_m_s8): Likewise.
10605 (__arm_vqshluq_m_n_s8): Likewise.
10606 (__arm_vabavq_p_s8): Likewise.
10607 (__arm_vsriq_m_n_u8): Likewise.
10608 (__arm_vshlq_m_u8): Likewise.
10609 (__arm_vsubq_m_u8): Likewise.
10610 (__arm_vabavq_p_u8): Likewise.
10611 (__arm_vshlq_m_s8): Likewise.
10612 (__arm_vsriq_m_n_s16): Likewise.
10613 (__arm_vsubq_m_s16): Likewise.
10614 (__arm_vqshluq_m_n_s16): Likewise.
10615 (__arm_vabavq_p_s16): Likewise.
10616 (__arm_vsriq_m_n_u16): Likewise.
10617 (__arm_vshlq_m_u16): Likewise.
10618 (__arm_vsubq_m_u16): Likewise.
10619 (__arm_vabavq_p_u16): Likewise.
10620 (__arm_vshlq_m_s16): Likewise.
10621 (__arm_vsriq_m_n_s32): Likewise.
10622 (__arm_vsubq_m_s32): Likewise.
10623 (__arm_vqshluq_m_n_s32): Likewise.
10624 (__arm_vabavq_p_s32): Likewise.
10625 (__arm_vsriq_m_n_u32): Likewise.
10626 (__arm_vshlq_m_u32): Likewise.
10627 (__arm_vsubq_m_u32): Likewise.
10628 (__arm_vabavq_p_u32): Likewise.
10629 (__arm_vshlq_m_s32): Likewise.
10630 (__arm_vcvtq_m_n_f16_u16): Likewise.
10631 (__arm_vcvtq_m_n_f16_s16): Likewise.
10632 (__arm_vcvtq_m_n_f32_u32): Likewise.
10633 (__arm_vcvtq_m_n_f32_s32): Likewise.
10634 (vcvtq_m_n): Define polymorphic variant.
10635 (vqshluq_m_n): Likewise.
10636 (vshlq_m): Likewise.
10637 (vsriq_m_n): Likewise.
10638 (vsubq_m): Likewise.
10639 (vabavq_p): Likewise.
10640 * config/arm/arm_mve_builtins.def
10641 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
10642 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10643 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10644 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10645 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10646 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10647 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10648 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10649 * config/arm/mve.md (VABAVQ_P): Define iterator.
10650 (VSHLQ_M): Likewise.
10651 (VSRIQ_M_N): Likewise.
10652 (VSUBQ_M): Likewise.
10653 (VCVTQ_M_N_TO_F): Likewise.
10654 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
10655 (mve_vqshluq_m_n_s<mode>): Likewise.
10656 (mve_vshlq_m_<supf><mode>): Likewise.
10657 (mve_vsriq_m_n_<supf><mode>): Likewise.
10658 (mve_vsubq_m_<supf><mode>): Likewise.
10659 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
10661 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10662 Mihail Ionescu <mihail.ionescu@arm.com>
10663 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10665 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
10666 (vrmlsldavhaq_s32): Likewise.
10667 (vrmlsldavhaxq_s32): Likewise.
10668 (vaddlvaq_p_s32): Likewise.
10669 (vcvtbq_m_f16_f32): Likewise.
10670 (vcvtbq_m_f32_f16): Likewise.
10671 (vcvttq_m_f16_f32): Likewise.
10672 (vcvttq_m_f32_f16): Likewise.
10673 (vrev16q_m_s8): Likewise.
10674 (vrev32q_m_f16): Likewise.
10675 (vrmlaldavhq_p_s32): Likewise.
10676 (vrmlaldavhxq_p_s32): Likewise.
10677 (vrmlsldavhq_p_s32): Likewise.
10678 (vrmlsldavhxq_p_s32): Likewise.
10679 (vaddlvaq_p_u32): Likewise.
10680 (vrev16q_m_u8): Likewise.
10681 (vrmlaldavhq_p_u32): Likewise.
10682 (vmvnq_m_n_s16): Likewise.
10683 (vorrq_m_n_s16): Likewise.
10684 (vqrshrntq_n_s16): Likewise.
10685 (vqshrnbq_n_s16): Likewise.
10686 (vqshrntq_n_s16): Likewise.
10687 (vrshrnbq_n_s16): Likewise.
10688 (vrshrntq_n_s16): Likewise.
10689 (vshrnbq_n_s16): Likewise.
10690 (vshrntq_n_s16): Likewise.
10691 (vcmlaq_f16): Likewise.
10692 (vcmlaq_rot180_f16): Likewise.
10693 (vcmlaq_rot270_f16): Likewise.
10694 (vcmlaq_rot90_f16): Likewise.
10695 (vfmaq_f16): Likewise.
10696 (vfmaq_n_f16): Likewise.
10697 (vfmasq_n_f16): Likewise.
10698 (vfmsq_f16): Likewise.
10699 (vmlaldavaq_s16): Likewise.
10700 (vmlaldavaxq_s16): Likewise.
10701 (vmlsldavaq_s16): Likewise.
10702 (vmlsldavaxq_s16): Likewise.
10703 (vabsq_m_f16): Likewise.
10704 (vcvtmq_m_s16_f16): Likewise.
10705 (vcvtnq_m_s16_f16): Likewise.
10706 (vcvtpq_m_s16_f16): Likewise.
10707 (vcvtq_m_s16_f16): Likewise.
10708 (vdupq_m_n_f16): Likewise.
10709 (vmaxnmaq_m_f16): Likewise.
10710 (vmaxnmavq_p_f16): Likewise.
10711 (vmaxnmvq_p_f16): Likewise.
10712 (vminnmaq_m_f16): Likewise.
10713 (vminnmavq_p_f16): Likewise.
10714 (vminnmvq_p_f16): Likewise.
10715 (vmlaldavq_p_s16): Likewise.
10716 (vmlaldavxq_p_s16): Likewise.
10717 (vmlsldavq_p_s16): Likewise.
10718 (vmlsldavxq_p_s16): Likewise.
10719 (vmovlbq_m_s8): Likewise.
10720 (vmovltq_m_s8): Likewise.
10721 (vmovnbq_m_s16): Likewise.
10722 (vmovntq_m_s16): Likewise.
10723 (vnegq_m_f16): Likewise.
10724 (vpselq_f16): Likewise.
10725 (vqmovnbq_m_s16): Likewise.
10726 (vqmovntq_m_s16): Likewise.
10727 (vrev32q_m_s8): Likewise.
10728 (vrev64q_m_f16): Likewise.
10729 (vrndaq_m_f16): Likewise.
10730 (vrndmq_m_f16): Likewise.
10731 (vrndnq_m_f16): Likewise.
10732 (vrndpq_m_f16): Likewise.
10733 (vrndq_m_f16): Likewise.
10734 (vrndxq_m_f16): Likewise.
10735 (vcmpeqq_m_n_f16): Likewise.
10736 (vcmpgeq_m_f16): Likewise.
10737 (vcmpgeq_m_n_f16): Likewise.
10738 (vcmpgtq_m_f16): Likewise.
10739 (vcmpgtq_m_n_f16): Likewise.
10740 (vcmpleq_m_f16): Likewise.
10741 (vcmpleq_m_n_f16): Likewise.
10742 (vcmpltq_m_f16): Likewise.
10743 (vcmpltq_m_n_f16): Likewise.
10744 (vcmpneq_m_f16): Likewise.
10745 (vcmpneq_m_n_f16): Likewise.
10746 (vmvnq_m_n_u16): Likewise.
10747 (vorrq_m_n_u16): Likewise.
10748 (vqrshruntq_n_s16): Likewise.
10749 (vqshrunbq_n_s16): Likewise.
10750 (vqshruntq_n_s16): Likewise.
10751 (vcvtmq_m_u16_f16): Likewise.
10752 (vcvtnq_m_u16_f16): Likewise.
10753 (vcvtpq_m_u16_f16): Likewise.
10754 (vcvtq_m_u16_f16): Likewise.
10755 (vqmovunbq_m_s16): Likewise.
10756 (vqmovuntq_m_s16): Likewise.
10757 (vqrshrntq_n_u16): Likewise.
10758 (vqshrnbq_n_u16): Likewise.
10759 (vqshrntq_n_u16): Likewise.
10760 (vrshrnbq_n_u16): Likewise.
10761 (vrshrntq_n_u16): Likewise.
10762 (vshrnbq_n_u16): Likewise.
10763 (vshrntq_n_u16): Likewise.
10764 (vmlaldavaq_u16): Likewise.
10765 (vmlaldavaxq_u16): Likewise.
10766 (vmlaldavq_p_u16): Likewise.
10767 (vmlaldavxq_p_u16): Likewise.
10768 (vmovlbq_m_u8): Likewise.
10769 (vmovltq_m_u8): Likewise.
10770 (vmovnbq_m_u16): Likewise.
10771 (vmovntq_m_u16): Likewise.
10772 (vqmovnbq_m_u16): Likewise.
10773 (vqmovntq_m_u16): Likewise.
10774 (vrev32q_m_u8): Likewise.
10775 (vmvnq_m_n_s32): Likewise.
10776 (vorrq_m_n_s32): Likewise.
10777 (vqrshrntq_n_s32): Likewise.
10778 (vqshrnbq_n_s32): Likewise.
10779 (vqshrntq_n_s32): Likewise.
10780 (vrshrnbq_n_s32): Likewise.
10781 (vrshrntq_n_s32): Likewise.
10782 (vshrnbq_n_s32): Likewise.
10783 (vshrntq_n_s32): Likewise.
10784 (vcmlaq_f32): Likewise.
10785 (vcmlaq_rot180_f32): Likewise.
10786 (vcmlaq_rot270_f32): Likewise.
10787 (vcmlaq_rot90_f32): Likewise.
10788 (vfmaq_f32): Likewise.
10789 (vfmaq_n_f32): Likewise.
10790 (vfmasq_n_f32): Likewise.
10791 (vfmsq_f32): Likewise.
10792 (vmlaldavaq_s32): Likewise.
10793 (vmlaldavaxq_s32): Likewise.
10794 (vmlsldavaq_s32): Likewise.
10795 (vmlsldavaxq_s32): Likewise.
10796 (vabsq_m_f32): Likewise.
10797 (vcvtmq_m_s32_f32): Likewise.
10798 (vcvtnq_m_s32_f32): Likewise.
10799 (vcvtpq_m_s32_f32): Likewise.
10800 (vcvtq_m_s32_f32): Likewise.
10801 (vdupq_m_n_f32): Likewise.
10802 (vmaxnmaq_m_f32): Likewise.
10803 (vmaxnmavq_p_f32): Likewise.
10804 (vmaxnmvq_p_f32): Likewise.
10805 (vminnmaq_m_f32): Likewise.
10806 (vminnmavq_p_f32): Likewise.
10807 (vminnmvq_p_f32): Likewise.
10808 (vmlaldavq_p_s32): Likewise.
10809 (vmlaldavxq_p_s32): Likewise.
10810 (vmlsldavq_p_s32): Likewise.
10811 (vmlsldavxq_p_s32): Likewise.
10812 (vmovlbq_m_s16): Likewise.
10813 (vmovltq_m_s16): Likewise.
10814 (vmovnbq_m_s32): Likewise.
10815 (vmovntq_m_s32): Likewise.
10816 (vnegq_m_f32): Likewise.
10817 (vpselq_f32): Likewise.
10818 (vqmovnbq_m_s32): Likewise.
10819 (vqmovntq_m_s32): Likewise.
10820 (vrev32q_m_s16): Likewise.
10821 (vrev64q_m_f32): Likewise.
10822 (vrndaq_m_f32): Likewise.
10823 (vrndmq_m_f32): Likewise.
10824 (vrndnq_m_f32): Likewise.
10825 (vrndpq_m_f32): Likewise.
10826 (vrndq_m_f32): Likewise.
10827 (vrndxq_m_f32): Likewise.
10828 (vcmpeqq_m_n_f32): Likewise.
10829 (vcmpgeq_m_f32): Likewise.
10830 (vcmpgeq_m_n_f32): Likewise.
10831 (vcmpgtq_m_f32): Likewise.
10832 (vcmpgtq_m_n_f32): Likewise.
10833 (vcmpleq_m_f32): Likewise.
10834 (vcmpleq_m_n_f32): Likewise.
10835 (vcmpltq_m_f32): Likewise.
10836 (vcmpltq_m_n_f32): Likewise.
10837 (vcmpneq_m_f32): Likewise.
10838 (vcmpneq_m_n_f32): Likewise.
10839 (vmvnq_m_n_u32): Likewise.
10840 (vorrq_m_n_u32): Likewise.
10841 (vqrshruntq_n_s32): Likewise.
10842 (vqshrunbq_n_s32): Likewise.
10843 (vqshruntq_n_s32): Likewise.
10844 (vcvtmq_m_u32_f32): Likewise.
10845 (vcvtnq_m_u32_f32): Likewise.
10846 (vcvtpq_m_u32_f32): Likewise.
10847 (vcvtq_m_u32_f32): Likewise.
10848 (vqmovunbq_m_s32): Likewise.
10849 (vqmovuntq_m_s32): Likewise.
10850 (vqrshrntq_n_u32): Likewise.
10851 (vqshrnbq_n_u32): Likewise.
10852 (vqshrntq_n_u32): Likewise.
10853 (vrshrnbq_n_u32): Likewise.
10854 (vrshrntq_n_u32): Likewise.
10855 (vshrnbq_n_u32): Likewise.
10856 (vshrntq_n_u32): Likewise.
10857 (vmlaldavaq_u32): Likewise.
10858 (vmlaldavaxq_u32): Likewise.
10859 (vmlaldavq_p_u32): Likewise.
10860 (vmlaldavxq_p_u32): Likewise.
10861 (vmovlbq_m_u16): Likewise.
10862 (vmovltq_m_u16): Likewise.
10863 (vmovnbq_m_u32): Likewise.
10864 (vmovntq_m_u32): Likewise.
10865 (vqmovnbq_m_u32): Likewise.
10866 (vqmovntq_m_u32): Likewise.
10867 (vrev32q_m_u16): Likewise.
10868 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
10869 (__arm_vrmlsldavhaq_s32): Likewise.
10870 (__arm_vrmlsldavhaxq_s32): Likewise.
10871 (__arm_vaddlvaq_p_s32): Likewise.
10872 (__arm_vrev16q_m_s8): Likewise.
10873 (__arm_vrmlaldavhq_p_s32): Likewise.
10874 (__arm_vrmlaldavhxq_p_s32): Likewise.
10875 (__arm_vrmlsldavhq_p_s32): Likewise.
10876 (__arm_vrmlsldavhxq_p_s32): Likewise.
10877 (__arm_vaddlvaq_p_u32): Likewise.
10878 (__arm_vrev16q_m_u8): Likewise.
10879 (__arm_vrmlaldavhq_p_u32): Likewise.
10880 (__arm_vmvnq_m_n_s16): Likewise.
10881 (__arm_vorrq_m_n_s16): Likewise.
10882 (__arm_vqrshrntq_n_s16): Likewise.
10883 (__arm_vqshrnbq_n_s16): Likewise.
10884 (__arm_vqshrntq_n_s16): Likewise.
10885 (__arm_vrshrnbq_n_s16): Likewise.
10886 (__arm_vrshrntq_n_s16): Likewise.
10887 (__arm_vshrnbq_n_s16): Likewise.
10888 (__arm_vshrntq_n_s16): Likewise.
10889 (__arm_vmlaldavaq_s16): Likewise.
10890 (__arm_vmlaldavaxq_s16): Likewise.
10891 (__arm_vmlsldavaq_s16): Likewise.
10892 (__arm_vmlsldavaxq_s16): Likewise.
10893 (__arm_vmlaldavq_p_s16): Likewise.
10894 (__arm_vmlaldavxq_p_s16): Likewise.
10895 (__arm_vmlsldavq_p_s16): Likewise.
10896 (__arm_vmlsldavxq_p_s16): Likewise.
10897 (__arm_vmovlbq_m_s8): Likewise.
10898 (__arm_vmovltq_m_s8): Likewise.
10899 (__arm_vmovnbq_m_s16): Likewise.
10900 (__arm_vmovntq_m_s16): Likewise.
10901 (__arm_vqmovnbq_m_s16): Likewise.
10902 (__arm_vqmovntq_m_s16): Likewise.
10903 (__arm_vrev32q_m_s8): Likewise.
10904 (__arm_vmvnq_m_n_u16): Likewise.
10905 (__arm_vorrq_m_n_u16): Likewise.
10906 (__arm_vqrshruntq_n_s16): Likewise.
10907 (__arm_vqshrunbq_n_s16): Likewise.
10908 (__arm_vqshruntq_n_s16): Likewise.
10909 (__arm_vqmovunbq_m_s16): Likewise.
10910 (__arm_vqmovuntq_m_s16): Likewise.
10911 (__arm_vqrshrntq_n_u16): Likewise.
10912 (__arm_vqshrnbq_n_u16): Likewise.
10913 (__arm_vqshrntq_n_u16): Likewise.
10914 (__arm_vrshrnbq_n_u16): Likewise.
10915 (__arm_vrshrntq_n_u16): Likewise.
10916 (__arm_vshrnbq_n_u16): Likewise.
10917 (__arm_vshrntq_n_u16): Likewise.
10918 (__arm_vmlaldavaq_u16): Likewise.
10919 (__arm_vmlaldavaxq_u16): Likewise.
10920 (__arm_vmlaldavq_p_u16): Likewise.
10921 (__arm_vmlaldavxq_p_u16): Likewise.
10922 (__arm_vmovlbq_m_u8): Likewise.
10923 (__arm_vmovltq_m_u8): Likewise.
10924 (__arm_vmovnbq_m_u16): Likewise.
10925 (__arm_vmovntq_m_u16): Likewise.
10926 (__arm_vqmovnbq_m_u16): Likewise.
10927 (__arm_vqmovntq_m_u16): Likewise.
10928 (__arm_vrev32q_m_u8): Likewise.
10929 (__arm_vmvnq_m_n_s32): Likewise.
10930 (__arm_vorrq_m_n_s32): Likewise.
10931 (__arm_vqrshrntq_n_s32): Likewise.
10932 (__arm_vqshrnbq_n_s32): Likewise.
10933 (__arm_vqshrntq_n_s32): Likewise.
10934 (__arm_vrshrnbq_n_s32): Likewise.
10935 (__arm_vrshrntq_n_s32): Likewise.
10936 (__arm_vshrnbq_n_s32): Likewise.
10937 (__arm_vshrntq_n_s32): Likewise.
10938 (__arm_vmlaldavaq_s32): Likewise.
10939 (__arm_vmlaldavaxq_s32): Likewise.
10940 (__arm_vmlsldavaq_s32): Likewise.
10941 (__arm_vmlsldavaxq_s32): Likewise.
10942 (__arm_vmlaldavq_p_s32): Likewise.
10943 (__arm_vmlaldavxq_p_s32): Likewise.
10944 (__arm_vmlsldavq_p_s32): Likewise.
10945 (__arm_vmlsldavxq_p_s32): Likewise.
10946 (__arm_vmovlbq_m_s16): Likewise.
10947 (__arm_vmovltq_m_s16): Likewise.
10948 (__arm_vmovnbq_m_s32): Likewise.
10949 (__arm_vmovntq_m_s32): Likewise.
10950 (__arm_vqmovnbq_m_s32): Likewise.
10951 (__arm_vqmovntq_m_s32): Likewise.
10952 (__arm_vrev32q_m_s16): Likewise.
10953 (__arm_vmvnq_m_n_u32): Likewise.
10954 (__arm_vorrq_m_n_u32): Likewise.
10955 (__arm_vqrshruntq_n_s32): Likewise.
10956 (__arm_vqshrunbq_n_s32): Likewise.
10957 (__arm_vqshruntq_n_s32): Likewise.
10958 (__arm_vqmovunbq_m_s32): Likewise.
10959 (__arm_vqmovuntq_m_s32): Likewise.
10960 (__arm_vqrshrntq_n_u32): Likewise.
10961 (__arm_vqshrnbq_n_u32): Likewise.
10962 (__arm_vqshrntq_n_u32): Likewise.
10963 (__arm_vrshrnbq_n_u32): Likewise.
10964 (__arm_vrshrntq_n_u32): Likewise.
10965 (__arm_vshrnbq_n_u32): Likewise.
10966 (__arm_vshrntq_n_u32): Likewise.
10967 (__arm_vmlaldavaq_u32): Likewise.
10968 (__arm_vmlaldavaxq_u32): Likewise.
10969 (__arm_vmlaldavq_p_u32): Likewise.
10970 (__arm_vmlaldavxq_p_u32): Likewise.
10971 (__arm_vmovlbq_m_u16): Likewise.
10972 (__arm_vmovltq_m_u16): Likewise.
10973 (__arm_vmovnbq_m_u32): Likewise.
10974 (__arm_vmovntq_m_u32): Likewise.
10975 (__arm_vqmovnbq_m_u32): Likewise.
10976 (__arm_vqmovntq_m_u32): Likewise.
10977 (__arm_vrev32q_m_u16): Likewise.
10978 (__arm_vcvtbq_m_f16_f32): Likewise.
10979 (__arm_vcvtbq_m_f32_f16): Likewise.
10980 (__arm_vcvttq_m_f16_f32): Likewise.
10981 (__arm_vcvttq_m_f32_f16): Likewise.
10982 (__arm_vrev32q_m_f16): Likewise.
10983 (__arm_vcmlaq_f16): Likewise.
10984 (__arm_vcmlaq_rot180_f16): Likewise.
10985 (__arm_vcmlaq_rot270_f16): Likewise.
10986 (__arm_vcmlaq_rot90_f16): Likewise.
10987 (__arm_vfmaq_f16): Likewise.
10988 (__arm_vfmaq_n_f16): Likewise.
10989 (__arm_vfmasq_n_f16): Likewise.
10990 (__arm_vfmsq_f16): Likewise.
10991 (__arm_vabsq_m_f16): Likewise.
10992 (__arm_vcvtmq_m_s16_f16): Likewise.
10993 (__arm_vcvtnq_m_s16_f16): Likewise.
10994 (__arm_vcvtpq_m_s16_f16): Likewise.
10995 (__arm_vcvtq_m_s16_f16): Likewise.
10996 (__arm_vdupq_m_n_f16): Likewise.
10997 (__arm_vmaxnmaq_m_f16): Likewise.
10998 (__arm_vmaxnmavq_p_f16): Likewise.
10999 (__arm_vmaxnmvq_p_f16): Likewise.
11000 (__arm_vminnmaq_m_f16): Likewise.
11001 (__arm_vminnmavq_p_f16): Likewise.
11002 (__arm_vminnmvq_p_f16): Likewise.
11003 (__arm_vnegq_m_f16): Likewise.
11004 (__arm_vpselq_f16): Likewise.
11005 (__arm_vrev64q_m_f16): Likewise.
11006 (__arm_vrndaq_m_f16): Likewise.
11007 (__arm_vrndmq_m_f16): Likewise.
11008 (__arm_vrndnq_m_f16): Likewise.
11009 (__arm_vrndpq_m_f16): Likewise.
11010 (__arm_vrndq_m_f16): Likewise.
11011 (__arm_vrndxq_m_f16): Likewise.
11012 (__arm_vcmpeqq_m_n_f16): Likewise.
11013 (__arm_vcmpgeq_m_f16): Likewise.
11014 (__arm_vcmpgeq_m_n_f16): Likewise.
11015 (__arm_vcmpgtq_m_f16): Likewise.
11016 (__arm_vcmpgtq_m_n_f16): Likewise.
11017 (__arm_vcmpleq_m_f16): Likewise.
11018 (__arm_vcmpleq_m_n_f16): Likewise.
11019 (__arm_vcmpltq_m_f16): Likewise.
11020 (__arm_vcmpltq_m_n_f16): Likewise.
11021 (__arm_vcmpneq_m_f16): Likewise.
11022 (__arm_vcmpneq_m_n_f16): Likewise.
11023 (__arm_vcvtmq_m_u16_f16): Likewise.
11024 (__arm_vcvtnq_m_u16_f16): Likewise.
11025 (__arm_vcvtpq_m_u16_f16): Likewise.
11026 (__arm_vcvtq_m_u16_f16): Likewise.
11027 (__arm_vcmlaq_f32): Likewise.
11028 (__arm_vcmlaq_rot180_f32): Likewise.
11029 (__arm_vcmlaq_rot270_f32): Likewise.
11030 (__arm_vcmlaq_rot90_f32): Likewise.
11031 (__arm_vfmaq_f32): Likewise.
11032 (__arm_vfmaq_n_f32): Likewise.
11033 (__arm_vfmasq_n_f32): Likewise.
11034 (__arm_vfmsq_f32): Likewise.
11035 (__arm_vabsq_m_f32): Likewise.
11036 (__arm_vcvtmq_m_s32_f32): Likewise.
11037 (__arm_vcvtnq_m_s32_f32): Likewise.
11038 (__arm_vcvtpq_m_s32_f32): Likewise.
11039 (__arm_vcvtq_m_s32_f32): Likewise.
11040 (__arm_vdupq_m_n_f32): Likewise.
11041 (__arm_vmaxnmaq_m_f32): Likewise.
11042 (__arm_vmaxnmavq_p_f32): Likewise.
11043 (__arm_vmaxnmvq_p_f32): Likewise.
11044 (__arm_vminnmaq_m_f32): Likewise.
11045 (__arm_vminnmavq_p_f32): Likewise.
11046 (__arm_vminnmvq_p_f32): Likewise.
11047 (__arm_vnegq_m_f32): Likewise.
11048 (__arm_vpselq_f32): Likewise.
11049 (__arm_vrev64q_m_f32): Likewise.
11050 (__arm_vrndaq_m_f32): Likewise.
11051 (__arm_vrndmq_m_f32): Likewise.
11052 (__arm_vrndnq_m_f32): Likewise.
11053 (__arm_vrndpq_m_f32): Likewise.
11054 (__arm_vrndq_m_f32): Likewise.
11055 (__arm_vrndxq_m_f32): Likewise.
11056 (__arm_vcmpeqq_m_n_f32): Likewise.
11057 (__arm_vcmpgeq_m_f32): Likewise.
11058 (__arm_vcmpgeq_m_n_f32): Likewise.
11059 (__arm_vcmpgtq_m_f32): Likewise.
11060 (__arm_vcmpgtq_m_n_f32): Likewise.
11061 (__arm_vcmpleq_m_f32): Likewise.
11062 (__arm_vcmpleq_m_n_f32): Likewise.
11063 (__arm_vcmpltq_m_f32): Likewise.
11064 (__arm_vcmpltq_m_n_f32): Likewise.
11065 (__arm_vcmpneq_m_f32): Likewise.
11066 (__arm_vcmpneq_m_n_f32): Likewise.
11067 (__arm_vcvtmq_m_u32_f32): Likewise.
11068 (__arm_vcvtnq_m_u32_f32): Likewise.
11069 (__arm_vcvtpq_m_u32_f32): Likewise.
11070 (__arm_vcvtq_m_u32_f32): Likewise.
11071 (vcvtq_m): Define polymorphic variant.
11072 (vabsq_m): Likewise.
11073 (vcmlaq): Likewise.
11074 (vcmlaq_rot180): Likewise.
11075 (vcmlaq_rot270): Likewise.
11076 (vcmlaq_rot90): Likewise.
11077 (vcmpeqq_m_n): Likewise.
11078 (vcmpgeq_m_n): Likewise.
11079 (vrndxq_m): Likewise.
11080 (vrndq_m): Likewise.
11081 (vrndpq_m): Likewise.
11082 (vcmpgtq_m_n): Likewise.
11083 (vcmpgtq_m): Likewise.
11084 (vcmpleq_m): Likewise.
11085 (vcmpleq_m_n): Likewise.
11086 (vcmpltq_m_n): Likewise.
11087 (vcmpltq_m): Likewise.
11088 (vcmpneq_m): Likewise.
11089 (vcmpneq_m_n): Likewise.
11090 (vcvtbq_m): Likewise.
11091 (vcvttq_m): Likewise.
11092 (vcvtmq_m): Likewise.
11093 (vcvtnq_m): Likewise.
11094 (vcvtpq_m): Likewise.
11095 (vdupq_m_n): Likewise.
11096 (vfmaq_n): Likewise.
11098 (vfmasq_n): Likewise.
11100 (vmaxnmaq_m): Likewise.
11101 (vmaxnmavq_m): Likewise.
11102 (vmaxnmvq_m): Likewise.
11103 (vmaxnmavq_p): Likewise.
11104 (vmaxnmvq_p): Likewise.
11105 (vminnmaq_m): Likewise.
11106 (vminnmavq_p): Likewise.
11107 (vminnmvq_p): Likewise.
11108 (vrndnq_m): Likewise.
11109 (vrndaq_m): Likewise.
11110 (vrndmq_m): Likewise.
11111 (vrev64q_m): Likewise.
11112 (vrev32q_m): Likewise.
11113 (vpselq): Likewise.
11114 (vnegq_m): Likewise.
11115 (vcmpgeq_m): Likewise.
11116 (vshrntq_n): Likewise.
11117 (vrshrntq_n): Likewise.
11118 (vmovlbq_m): Likewise.
11119 (vmovnbq_m): Likewise.
11120 (vmovntq_m): Likewise.
11121 (vmvnq_m_n): Likewise.
11122 (vmvnq_m): Likewise.
11123 (vshrnbq_n): Likewise.
11124 (vrshrnbq_n): Likewise.
11125 (vqshruntq_n): Likewise.
11126 (vrev16q_m): Likewise.
11127 (vqshrunbq_n): Likewise.
11128 (vqshrntq_n): Likewise.
11129 (vqrshruntq_n): Likewise.
11130 (vqrshrntq_n): Likewise.
11131 (vqshrnbq_n): Likewise.
11132 (vqmovuntq_m): Likewise.
11133 (vqmovntq_m): Likewise.
11134 (vqmovnbq_m): Likewise.
11135 (vorrq_m_n): Likewise.
11136 (vmovltq_m): Likewise.
11137 (vqmovunbq_m): Likewise.
11138 (vaddlvaq_p): Likewise.
11139 (vmlaldavaq): Likewise.
11140 (vmlaldavaxq): Likewise.
11141 (vmlaldavq_p): Likewise.
11142 (vmlaldavxq_p): Likewise.
11143 (vmlsldavaq): Likewise.
11144 (vmlsldavaxq): Likewise.
11145 (vmlsldavq_p): Likewise.
11146 (vmlsldavxq_p): Likewise.
11147 (vrmlaldavhaxq): Likewise.
11148 (vrmlaldavhq_p): Likewise.
11149 (vrmlaldavhxq_p): Likewise.
11150 (vrmlsldavhaq): Likewise.
11151 (vrmlsldavhaxq): Likewise.
11152 (vrmlsldavhq_p): Likewise.
11153 (vrmlsldavhxq_p): Likewise.
11154 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
11156 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
11157 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
11158 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
11159 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
11160 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
11161 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
11162 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
11163 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
11164 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
11165 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
11166 (MVE_pred3): Likewise.
11167 (MVE_constraint1): Likewise.
11168 (MVE_pred1): Likewise.
11169 (VMLALDAVQ_P): Define iterator.
11170 (VQMOVNBQ_M): Likewise.
11171 (VMOVLTQ_M): Likewise.
11172 (VMOVNBQ_M): Likewise.
11173 (VRSHRNTQ_N): Likewise.
11174 (VORRQ_M_N): Likewise.
11175 (VREV32Q_M): Likewise.
11176 (VREV16Q_M): Likewise.
11177 (VQRSHRNTQ_N): Likewise.
11178 (VMOVNTQ_M): Likewise.
11179 (VMOVLBQ_M): Likewise.
11180 (VMLALDAVAQ): Likewise.
11181 (VQSHRNBQ_N): Likewise.
11182 (VSHRNBQ_N): Likewise.
11183 (VRSHRNBQ_N): Likewise.
11184 (VMLALDAVXQ_P): Likewise.
11185 (VQMOVNTQ_M): Likewise.
11186 (VMVNQ_M_N): Likewise.
11187 (VQSHRNTQ_N): Likewise.
11188 (VMLALDAVAXQ): Likewise.
11189 (VSHRNTQ_N): Likewise.
11190 (VCVTMQ_M): Likewise.
11191 (VCVTNQ_M): Likewise.
11192 (VCVTPQ_M): Likewise.
11193 (VCVTQ_M_N_FROM_F): Likewise.
11194 (VCVTQ_M_FROM_F): Likewise.
11195 (VRMLALDAVHQ_P): Likewise.
11196 (VADDLVAQ_P): Likewise.
11197 (mve_vrndq_m_f<mode>): Define RTL pattern.
11198 (mve_vabsq_m_f<mode>): Likewise.
11199 (mve_vaddlvaq_p_<supf>v4si): Likewise.
11200 (mve_vcmlaq_f<mode>): Likewise.
11201 (mve_vcmlaq_rot180_f<mode>): Likewise.
11202 (mve_vcmlaq_rot270_f<mode>): Likewise.
11203 (mve_vcmlaq_rot90_f<mode>): Likewise.
11204 (mve_vcmpeqq_m_n_f<mode>): Likewise.
11205 (mve_vcmpgeq_m_f<mode>): Likewise.
11206 (mve_vcmpgeq_m_n_f<mode>): Likewise.
11207 (mve_vcmpgtq_m_f<mode>): Likewise.
11208 (mve_vcmpgtq_m_n_f<mode>): Likewise.
11209 (mve_vcmpleq_m_f<mode>): Likewise.
11210 (mve_vcmpleq_m_n_f<mode>): Likewise.
11211 (mve_vcmpltq_m_f<mode>): Likewise.
11212 (mve_vcmpltq_m_n_f<mode>): Likewise.
11213 (mve_vcmpneq_m_f<mode>): Likewise.
11214 (mve_vcmpneq_m_n_f<mode>): Likewise.
11215 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
11216 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
11217 (mve_vcvttq_m_f16_f32v8hf): Likewise.
11218 (mve_vcvttq_m_f32_f16v4sf): Likewise.
11219 (mve_vdupq_m_n_f<mode>): Likewise.
11220 (mve_vfmaq_f<mode>): Likewise.
11221 (mve_vfmaq_n_f<mode>): Likewise.
11222 (mve_vfmasq_n_f<mode>): Likewise.
11223 (mve_vfmsq_f<mode>): Likewise.
11224 (mve_vmaxnmaq_m_f<mode>): Likewise.
11225 (mve_vmaxnmavq_p_f<mode>): Likewise.
11226 (mve_vmaxnmvq_p_f<mode>): Likewise.
11227 (mve_vminnmaq_m_f<mode>): Likewise.
11228 (mve_vminnmavq_p_f<mode>): Likewise.
11229 (mve_vminnmvq_p_f<mode>): Likewise.
11230 (mve_vmlaldavaq_<supf><mode>): Likewise.
11231 (mve_vmlaldavaxq_<supf><mode>): Likewise.
11232 (mve_vmlaldavq_p_<supf><mode>): Likewise.
11233 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
11234 (mve_vmlsldavaq_s<mode>): Likewise.
11235 (mve_vmlsldavaxq_s<mode>): Likewise.
11236 (mve_vmlsldavq_p_s<mode>): Likewise.
11237 (mve_vmlsldavxq_p_s<mode>): Likewise.
11238 (mve_vmovlbq_m_<supf><mode>): Likewise.
11239 (mve_vmovltq_m_<supf><mode>): Likewise.
11240 (mve_vmovnbq_m_<supf><mode>): Likewise.
11241 (mve_vmovntq_m_<supf><mode>): Likewise.
11242 (mve_vmvnq_m_n_<supf><mode>): Likewise.
11243 (mve_vnegq_m_f<mode>): Likewise.
11244 (mve_vorrq_m_n_<supf><mode>): Likewise.
11245 (mve_vpselq_f<mode>): Likewise.
11246 (mve_vqmovnbq_m_<supf><mode>): Likewise.
11247 (mve_vqmovntq_m_<supf><mode>): Likewise.
11248 (mve_vqmovunbq_m_s<mode>): Likewise.
11249 (mve_vqmovuntq_m_s<mode>): Likewise.
11250 (mve_vqrshrntq_n_<supf><mode>): Likewise.
11251 (mve_vqrshruntq_n_s<mode>): Likewise.
11252 (mve_vqshrnbq_n_<supf><mode>): Likewise.
11253 (mve_vqshrntq_n_<supf><mode>): Likewise.
11254 (mve_vqshrunbq_n_s<mode>): Likewise.
11255 (mve_vqshruntq_n_s<mode>): Likewise.
11256 (mve_vrev32q_m_fv8hf): Likewise.
11257 (mve_vrev32q_m_<supf><mode>): Likewise.
11258 (mve_vrev64q_m_f<mode>): Likewise.
11259 (mve_vrmlaldavhaxq_sv4si): Likewise.
11260 (mve_vrmlaldavhxq_p_sv4si): Likewise.
11261 (mve_vrmlsldavhaxq_sv4si): Likewise.
11262 (mve_vrmlsldavhq_p_sv4si): Likewise.
11263 (mve_vrmlsldavhxq_p_sv4si): Likewise.
11264 (mve_vrndaq_m_f<mode>): Likewise.
11265 (mve_vrndmq_m_f<mode>): Likewise.
11266 (mve_vrndnq_m_f<mode>): Likewise.
11267 (mve_vrndpq_m_f<mode>): Likewise.
11268 (mve_vrndxq_m_f<mode>): Likewise.
11269 (mve_vrshrnbq_n_<supf><mode>): Likewise.
11270 (mve_vrshrntq_n_<supf><mode>): Likewise.
11271 (mve_vshrnbq_n_<supf><mode>): Likewise.
11272 (mve_vshrntq_n_<supf><mode>): Likewise.
11273 (mve_vcvtmq_m_<supf><mode>): Likewise.
11274 (mve_vcvtpq_m_<supf><mode>): Likewise.
11275 (mve_vcvtnq_m_<supf><mode>): Likewise.
11276 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
11277 (mve_vrev16q_m_<supf>v16qi): Likewise.
11278 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
11279 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
11280 (mve_vrmlsldavhaq_sv4si): Likewise.
11282 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11283 Mihail Ionescu <mihail.ionescu@arm.com>
11284 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11286 * config/arm/arm_mve.h (vpselq_u8): Define macro.
11287 (vpselq_s8): Likewise.
11288 (vrev64q_m_u8): Likewise.
11289 (vqrdmlashq_n_u8): Likewise.
11290 (vqrdmlahq_n_u8): Likewise.
11291 (vqdmlahq_n_u8): Likewise.
11292 (vmvnq_m_u8): Likewise.
11293 (vmlasq_n_u8): Likewise.
11294 (vmlaq_n_u8): Likewise.
11295 (vmladavq_p_u8): Likewise.
11296 (vmladavaq_u8): Likewise.
11297 (vminvq_p_u8): Likewise.
11298 (vmaxvq_p_u8): Likewise.
11299 (vdupq_m_n_u8): Likewise.
11300 (vcmpneq_m_u8): Likewise.
11301 (vcmpneq_m_n_u8): Likewise.
11302 (vcmphiq_m_u8): Likewise.
11303 (vcmphiq_m_n_u8): Likewise.
11304 (vcmpeqq_m_u8): Likewise.
11305 (vcmpeqq_m_n_u8): Likewise.
11306 (vcmpcsq_m_u8): Likewise.
11307 (vcmpcsq_m_n_u8): Likewise.
11308 (vclzq_m_u8): Likewise.
11309 (vaddvaq_p_u8): Likewise.
11310 (vsriq_n_u8): Likewise.
11311 (vsliq_n_u8): Likewise.
11312 (vshlq_m_r_u8): Likewise.
11313 (vrshlq_m_n_u8): Likewise.
11314 (vqshlq_m_r_u8): Likewise.
11315 (vqrshlq_m_n_u8): Likewise.
11316 (vminavq_p_s8): Likewise.
11317 (vminaq_m_s8): Likewise.
11318 (vmaxavq_p_s8): Likewise.
11319 (vmaxaq_m_s8): Likewise.
11320 (vcmpneq_m_s8): Likewise.
11321 (vcmpneq_m_n_s8): Likewise.
11322 (vcmpltq_m_s8): Likewise.
11323 (vcmpltq_m_n_s8): Likewise.
11324 (vcmpleq_m_s8): Likewise.
11325 (vcmpleq_m_n_s8): Likewise.
11326 (vcmpgtq_m_s8): Likewise.
11327 (vcmpgtq_m_n_s8): Likewise.
11328 (vcmpgeq_m_s8): Likewise.
11329 (vcmpgeq_m_n_s8): Likewise.
11330 (vcmpeqq_m_s8): Likewise.
11331 (vcmpeqq_m_n_s8): Likewise.
11332 (vshlq_m_r_s8): Likewise.
11333 (vrshlq_m_n_s8): Likewise.
11334 (vrev64q_m_s8): Likewise.
11335 (vqshlq_m_r_s8): Likewise.
11336 (vqrshlq_m_n_s8): Likewise.
11337 (vqnegq_m_s8): Likewise.
11338 (vqabsq_m_s8): Likewise.
11339 (vnegq_m_s8): Likewise.
11340 (vmvnq_m_s8): Likewise.
11341 (vmlsdavxq_p_s8): Likewise.
11342 (vmlsdavq_p_s8): Likewise.
11343 (vmladavxq_p_s8): Likewise.
11344 (vmladavq_p_s8): Likewise.
11345 (vminvq_p_s8): Likewise.
11346 (vmaxvq_p_s8): Likewise.
11347 (vdupq_m_n_s8): Likewise.
11348 (vclzq_m_s8): Likewise.
11349 (vclsq_m_s8): Likewise.
11350 (vaddvaq_p_s8): Likewise.
11351 (vabsq_m_s8): Likewise.
11352 (vqrdmlsdhxq_s8): Likewise.
11353 (vqrdmlsdhq_s8): Likewise.
11354 (vqrdmlashq_n_s8): Likewise.
11355 (vqrdmlahq_n_s8): Likewise.
11356 (vqrdmladhxq_s8): Likewise.
11357 (vqrdmladhq_s8): Likewise.
11358 (vqdmlsdhxq_s8): Likewise.
11359 (vqdmlsdhq_s8): Likewise.
11360 (vqdmlahq_n_s8): Likewise.
11361 (vqdmladhxq_s8): Likewise.
11362 (vqdmladhq_s8): Likewise.
11363 (vmlsdavaxq_s8): Likewise.
11364 (vmlsdavaq_s8): Likewise.
11365 (vmlasq_n_s8): Likewise.
11366 (vmlaq_n_s8): Likewise.
11367 (vmladavaxq_s8): Likewise.
11368 (vmladavaq_s8): Likewise.
11369 (vsriq_n_s8): Likewise.
11370 (vsliq_n_s8): Likewise.
11371 (vpselq_u16): Likewise.
11372 (vpselq_s16): Likewise.
11373 (vrev64q_m_u16): Likewise.
11374 (vqrdmlashq_n_u16): Likewise.
11375 (vqrdmlahq_n_u16): Likewise.
11376 (vqdmlahq_n_u16): Likewise.
11377 (vmvnq_m_u16): Likewise.
11378 (vmlasq_n_u16): Likewise.
11379 (vmlaq_n_u16): Likewise.
11380 (vmladavq_p_u16): Likewise.
11381 (vmladavaq_u16): Likewise.
11382 (vminvq_p_u16): Likewise.
11383 (vmaxvq_p_u16): Likewise.
11384 (vdupq_m_n_u16): Likewise.
11385 (vcmpneq_m_u16): Likewise.
11386 (vcmpneq_m_n_u16): Likewise.
11387 (vcmphiq_m_u16): Likewise.
11388 (vcmphiq_m_n_u16): Likewise.
11389 (vcmpeqq_m_u16): Likewise.
11390 (vcmpeqq_m_n_u16): Likewise.
11391 (vcmpcsq_m_u16): Likewise.
11392 (vcmpcsq_m_n_u16): Likewise.
11393 (vclzq_m_u16): Likewise.
11394 (vaddvaq_p_u16): Likewise.
11395 (vsriq_n_u16): Likewise.
11396 (vsliq_n_u16): Likewise.
11397 (vshlq_m_r_u16): Likewise.
11398 (vrshlq_m_n_u16): Likewise.
11399 (vqshlq_m_r_u16): Likewise.
11400 (vqrshlq_m_n_u16): Likewise.
11401 (vminavq_p_s16): Likewise.
11402 (vminaq_m_s16): Likewise.
11403 (vmaxavq_p_s16): Likewise.
11404 (vmaxaq_m_s16): Likewise.
11405 (vcmpneq_m_s16): Likewise.
11406 (vcmpneq_m_n_s16): Likewise.
11407 (vcmpltq_m_s16): Likewise.
11408 (vcmpltq_m_n_s16): Likewise.
11409 (vcmpleq_m_s16): Likewise.
11410 (vcmpleq_m_n_s16): Likewise.
11411 (vcmpgtq_m_s16): Likewise.
11412 (vcmpgtq_m_n_s16): Likewise.
11413 (vcmpgeq_m_s16): Likewise.
11414 (vcmpgeq_m_n_s16): Likewise.
11415 (vcmpeqq_m_s16): Likewise.
11416 (vcmpeqq_m_n_s16): Likewise.
11417 (vshlq_m_r_s16): Likewise.
11418 (vrshlq_m_n_s16): Likewise.
11419 (vrev64q_m_s16): Likewise.
11420 (vqshlq_m_r_s16): Likewise.
11421 (vqrshlq_m_n_s16): Likewise.
11422 (vqnegq_m_s16): Likewise.
11423 (vqabsq_m_s16): Likewise.
11424 (vnegq_m_s16): Likewise.
11425 (vmvnq_m_s16): Likewise.
11426 (vmlsdavxq_p_s16): Likewise.
11427 (vmlsdavq_p_s16): Likewise.
11428 (vmladavxq_p_s16): Likewise.
11429 (vmladavq_p_s16): Likewise.
11430 (vminvq_p_s16): Likewise.
11431 (vmaxvq_p_s16): Likewise.
11432 (vdupq_m_n_s16): Likewise.
11433 (vclzq_m_s16): Likewise.
11434 (vclsq_m_s16): Likewise.
11435 (vaddvaq_p_s16): Likewise.
11436 (vabsq_m_s16): Likewise.
11437 (vqrdmlsdhxq_s16): Likewise.
11438 (vqrdmlsdhq_s16): Likewise.
11439 (vqrdmlashq_n_s16): Likewise.
11440 (vqrdmlahq_n_s16): Likewise.
11441 (vqrdmladhxq_s16): Likewise.
11442 (vqrdmladhq_s16): Likewise.
11443 (vqdmlsdhxq_s16): Likewise.
11444 (vqdmlsdhq_s16): Likewise.
11445 (vqdmlahq_n_s16): Likewise.
11446 (vqdmladhxq_s16): Likewise.
11447 (vqdmladhq_s16): Likewise.
11448 (vmlsdavaxq_s16): Likewise.
11449 (vmlsdavaq_s16): Likewise.
11450 (vmlasq_n_s16): Likewise.
11451 (vmlaq_n_s16): Likewise.
11452 (vmladavaxq_s16): Likewise.
11453 (vmladavaq_s16): Likewise.
11454 (vsriq_n_s16): Likewise.
11455 (vsliq_n_s16): Likewise.
11456 (vpselq_u32): Likewise.
11457 (vpselq_s32): Likewise.
11458 (vrev64q_m_u32): Likewise.
11459 (vqrdmlashq_n_u32): Likewise.
11460 (vqrdmlahq_n_u32): Likewise.
11461 (vqdmlahq_n_u32): Likewise.
11462 (vmvnq_m_u32): Likewise.
11463 (vmlasq_n_u32): Likewise.
11464 (vmlaq_n_u32): Likewise.
11465 (vmladavq_p_u32): Likewise.
11466 (vmladavaq_u32): Likewise.
11467 (vminvq_p_u32): Likewise.
11468 (vmaxvq_p_u32): Likewise.
11469 (vdupq_m_n_u32): Likewise.
11470 (vcmpneq_m_u32): Likewise.
11471 (vcmpneq_m_n_u32): Likewise.
11472 (vcmphiq_m_u32): Likewise.
11473 (vcmphiq_m_n_u32): Likewise.
11474 (vcmpeqq_m_u32): Likewise.
11475 (vcmpeqq_m_n_u32): Likewise.
11476 (vcmpcsq_m_u32): Likewise.
11477 (vcmpcsq_m_n_u32): Likewise.
11478 (vclzq_m_u32): Likewise.
11479 (vaddvaq_p_u32): Likewise.
11480 (vsriq_n_u32): Likewise.
11481 (vsliq_n_u32): Likewise.
11482 (vshlq_m_r_u32): Likewise.
11483 (vrshlq_m_n_u32): Likewise.
11484 (vqshlq_m_r_u32): Likewise.
11485 (vqrshlq_m_n_u32): Likewise.
11486 (vminavq_p_s32): Likewise.
11487 (vminaq_m_s32): Likewise.
11488 (vmaxavq_p_s32): Likewise.
11489 (vmaxaq_m_s32): Likewise.
11490 (vcmpneq_m_s32): Likewise.
11491 (vcmpneq_m_n_s32): Likewise.
11492 (vcmpltq_m_s32): Likewise.
11493 (vcmpltq_m_n_s32): Likewise.
11494 (vcmpleq_m_s32): Likewise.
11495 (vcmpleq_m_n_s32): Likewise.
11496 (vcmpgtq_m_s32): Likewise.
11497 (vcmpgtq_m_n_s32): Likewise.
11498 (vcmpgeq_m_s32): Likewise.
11499 (vcmpgeq_m_n_s32): Likewise.
11500 (vcmpeqq_m_s32): Likewise.
11501 (vcmpeqq_m_n_s32): Likewise.
11502 (vshlq_m_r_s32): Likewise.
11503 (vrshlq_m_n_s32): Likewise.
11504 (vrev64q_m_s32): Likewise.
11505 (vqshlq_m_r_s32): Likewise.
11506 (vqrshlq_m_n_s32): Likewise.
11507 (vqnegq_m_s32): Likewise.
11508 (vqabsq_m_s32): Likewise.
11509 (vnegq_m_s32): Likewise.
11510 (vmvnq_m_s32): Likewise.
11511 (vmlsdavxq_p_s32): Likewise.
11512 (vmlsdavq_p_s32): Likewise.
11513 (vmladavxq_p_s32): Likewise.
11514 (vmladavq_p_s32): Likewise.
11515 (vminvq_p_s32): Likewise.
11516 (vmaxvq_p_s32): Likewise.
11517 (vdupq_m_n_s32): Likewise.
11518 (vclzq_m_s32): Likewise.
11519 (vclsq_m_s32): Likewise.
11520 (vaddvaq_p_s32): Likewise.
11521 (vabsq_m_s32): Likewise.
11522 (vqrdmlsdhxq_s32): Likewise.
11523 (vqrdmlsdhq_s32): Likewise.
11524 (vqrdmlashq_n_s32): Likewise.
11525 (vqrdmlahq_n_s32): Likewise.
11526 (vqrdmladhxq_s32): Likewise.
11527 (vqrdmladhq_s32): Likewise.
11528 (vqdmlsdhxq_s32): Likewise.
11529 (vqdmlsdhq_s32): Likewise.
11530 (vqdmlahq_n_s32): Likewise.
11531 (vqdmladhxq_s32): Likewise.
11532 (vqdmladhq_s32): Likewise.
11533 (vmlsdavaxq_s32): Likewise.
11534 (vmlsdavaq_s32): Likewise.
11535 (vmlasq_n_s32): Likewise.
11536 (vmlaq_n_s32): Likewise.
11537 (vmladavaxq_s32): Likewise.
11538 (vmladavaq_s32): Likewise.
11539 (vsriq_n_s32): Likewise.
11540 (vsliq_n_s32): Likewise.
11541 (vpselq_u64): Likewise.
11542 (vpselq_s64): Likewise.
11543 (__arm_vpselq_u8): Define intrinsic.
11544 (__arm_vpselq_s8): Likewise.
11545 (__arm_vrev64q_m_u8): Likewise.
11546 (__arm_vqrdmlashq_n_u8): Likewise.
11547 (__arm_vqrdmlahq_n_u8): Likewise.
11548 (__arm_vqdmlahq_n_u8): Likewise.
11549 (__arm_vmvnq_m_u8): Likewise.
11550 (__arm_vmlasq_n_u8): Likewise.
11551 (__arm_vmlaq_n_u8): Likewise.
11552 (__arm_vmladavq_p_u8): Likewise.
11553 (__arm_vmladavaq_u8): Likewise.
11554 (__arm_vminvq_p_u8): Likewise.
11555 (__arm_vmaxvq_p_u8): Likewise.
11556 (__arm_vdupq_m_n_u8): Likewise.
11557 (__arm_vcmpneq_m_u8): Likewise.
11558 (__arm_vcmpneq_m_n_u8): Likewise.
11559 (__arm_vcmphiq_m_u8): Likewise.
11560 (__arm_vcmphiq_m_n_u8): Likewise.
11561 (__arm_vcmpeqq_m_u8): Likewise.
11562 (__arm_vcmpeqq_m_n_u8): Likewise.
11563 (__arm_vcmpcsq_m_u8): Likewise.
11564 (__arm_vcmpcsq_m_n_u8): Likewise.
11565 (__arm_vclzq_m_u8): Likewise.
11566 (__arm_vaddvaq_p_u8): Likewise.
11567 (__arm_vsriq_n_u8): Likewise.
11568 (__arm_vsliq_n_u8): Likewise.
11569 (__arm_vshlq_m_r_u8): Likewise.
11570 (__arm_vrshlq_m_n_u8): Likewise.
11571 (__arm_vqshlq_m_r_u8): Likewise.
11572 (__arm_vqrshlq_m_n_u8): Likewise.
11573 (__arm_vminavq_p_s8): Likewise.
11574 (__arm_vminaq_m_s8): Likewise.
11575 (__arm_vmaxavq_p_s8): Likewise.
11576 (__arm_vmaxaq_m_s8): Likewise.
11577 (__arm_vcmpneq_m_s8): Likewise.
11578 (__arm_vcmpneq_m_n_s8): Likewise.
11579 (__arm_vcmpltq_m_s8): Likewise.
11580 (__arm_vcmpltq_m_n_s8): Likewise.
11581 (__arm_vcmpleq_m_s8): Likewise.
11582 (__arm_vcmpleq_m_n_s8): Likewise.
11583 (__arm_vcmpgtq_m_s8): Likewise.
11584 (__arm_vcmpgtq_m_n_s8): Likewise.
11585 (__arm_vcmpgeq_m_s8): Likewise.
11586 (__arm_vcmpgeq_m_n_s8): Likewise.
11587 (__arm_vcmpeqq_m_s8): Likewise.
11588 (__arm_vcmpeqq_m_n_s8): Likewise.
11589 (__arm_vshlq_m_r_s8): Likewise.
11590 (__arm_vrshlq_m_n_s8): Likewise.
11591 (__arm_vrev64q_m_s8): Likewise.
11592 (__arm_vqshlq_m_r_s8): Likewise.
11593 (__arm_vqrshlq_m_n_s8): Likewise.
11594 (__arm_vqnegq_m_s8): Likewise.
11595 (__arm_vqabsq_m_s8): Likewise.
11596 (__arm_vnegq_m_s8): Likewise.
11597 (__arm_vmvnq_m_s8): Likewise.
11598 (__arm_vmlsdavxq_p_s8): Likewise.
11599 (__arm_vmlsdavq_p_s8): Likewise.
11600 (__arm_vmladavxq_p_s8): Likewise.
11601 (__arm_vmladavq_p_s8): Likewise.
11602 (__arm_vminvq_p_s8): Likewise.
11603 (__arm_vmaxvq_p_s8): Likewise.
11604 (__arm_vdupq_m_n_s8): Likewise.
11605 (__arm_vclzq_m_s8): Likewise.
11606 (__arm_vclsq_m_s8): Likewise.
11607 (__arm_vaddvaq_p_s8): Likewise.
11608 (__arm_vabsq_m_s8): Likewise.
11609 (__arm_vqrdmlsdhxq_s8): Likewise.
11610 (__arm_vqrdmlsdhq_s8): Likewise.
11611 (__arm_vqrdmlashq_n_s8): Likewise.
11612 (__arm_vqrdmlahq_n_s8): Likewise.
11613 (__arm_vqrdmladhxq_s8): Likewise.
11614 (__arm_vqrdmladhq_s8): Likewise.
11615 (__arm_vqdmlsdhxq_s8): Likewise.
11616 (__arm_vqdmlsdhq_s8): Likewise.
11617 (__arm_vqdmlahq_n_s8): Likewise.
11618 (__arm_vqdmladhxq_s8): Likewise.
11619 (__arm_vqdmladhq_s8): Likewise.
11620 (__arm_vmlsdavaxq_s8): Likewise.
11621 (__arm_vmlsdavaq_s8): Likewise.
11622 (__arm_vmlasq_n_s8): Likewise.
11623 (__arm_vmlaq_n_s8): Likewise.
11624 (__arm_vmladavaxq_s8): Likewise.
11625 (__arm_vmladavaq_s8): Likewise.
11626 (__arm_vsriq_n_s8): Likewise.
11627 (__arm_vsliq_n_s8): Likewise.
11628 (__arm_vpselq_u16): Likewise.
11629 (__arm_vpselq_s16): Likewise.
11630 (__arm_vrev64q_m_u16): Likewise.
11631 (__arm_vqrdmlashq_n_u16): Likewise.
11632 (__arm_vqrdmlahq_n_u16): Likewise.
11633 (__arm_vqdmlahq_n_u16): Likewise.
11634 (__arm_vmvnq_m_u16): Likewise.
11635 (__arm_vmlasq_n_u16): Likewise.
11636 (__arm_vmlaq_n_u16): Likewise.
11637 (__arm_vmladavq_p_u16): Likewise.
11638 (__arm_vmladavaq_u16): Likewise.
11639 (__arm_vminvq_p_u16): Likewise.
11640 (__arm_vmaxvq_p_u16): Likewise.
11641 (__arm_vdupq_m_n_u16): Likewise.
11642 (__arm_vcmpneq_m_u16): Likewise.
11643 (__arm_vcmpneq_m_n_u16): Likewise.
11644 (__arm_vcmphiq_m_u16): Likewise.
11645 (__arm_vcmphiq_m_n_u16): Likewise.
11646 (__arm_vcmpeqq_m_u16): Likewise.
11647 (__arm_vcmpeqq_m_n_u16): Likewise.
11648 (__arm_vcmpcsq_m_u16): Likewise.
11649 (__arm_vcmpcsq_m_n_u16): Likewise.
11650 (__arm_vclzq_m_u16): Likewise.
11651 (__arm_vaddvaq_p_u16): Likewise.
11652 (__arm_vsriq_n_u16): Likewise.
11653 (__arm_vsliq_n_u16): Likewise.
11654 (__arm_vshlq_m_r_u16): Likewise.
11655 (__arm_vrshlq_m_n_u16): Likewise.
11656 (__arm_vqshlq_m_r_u16): Likewise.
11657 (__arm_vqrshlq_m_n_u16): Likewise.
11658 (__arm_vminavq_p_s16): Likewise.
11659 (__arm_vminaq_m_s16): Likewise.
11660 (__arm_vmaxavq_p_s16): Likewise.
11661 (__arm_vmaxaq_m_s16): Likewise.
11662 (__arm_vcmpneq_m_s16): Likewise.
11663 (__arm_vcmpneq_m_n_s16): Likewise.
11664 (__arm_vcmpltq_m_s16): Likewise.
11665 (__arm_vcmpltq_m_n_s16): Likewise.
11666 (__arm_vcmpleq_m_s16): Likewise.
11667 (__arm_vcmpleq_m_n_s16): Likewise.
11668 (__arm_vcmpgtq_m_s16): Likewise.
11669 (__arm_vcmpgtq_m_n_s16): Likewise.
11670 (__arm_vcmpgeq_m_s16): Likewise.
11671 (__arm_vcmpgeq_m_n_s16): Likewise.
11672 (__arm_vcmpeqq_m_s16): Likewise.
11673 (__arm_vcmpeqq_m_n_s16): Likewise.
11674 (__arm_vshlq_m_r_s16): Likewise.
11675 (__arm_vrshlq_m_n_s16): Likewise.
11676 (__arm_vrev64q_m_s16): Likewise.
11677 (__arm_vqshlq_m_r_s16): Likewise.
11678 (__arm_vqrshlq_m_n_s16): Likewise.
11679 (__arm_vqnegq_m_s16): Likewise.
11680 (__arm_vqabsq_m_s16): Likewise.
11681 (__arm_vnegq_m_s16): Likewise.
11682 (__arm_vmvnq_m_s16): Likewise.
11683 (__arm_vmlsdavxq_p_s16): Likewise.
11684 (__arm_vmlsdavq_p_s16): Likewise.
11685 (__arm_vmladavxq_p_s16): Likewise.
11686 (__arm_vmladavq_p_s16): Likewise.
11687 (__arm_vminvq_p_s16): Likewise.
11688 (__arm_vmaxvq_p_s16): Likewise.
11689 (__arm_vdupq_m_n_s16): Likewise.
11690 (__arm_vclzq_m_s16): Likewise.
11691 (__arm_vclsq_m_s16): Likewise.
11692 (__arm_vaddvaq_p_s16): Likewise.
11693 (__arm_vabsq_m_s16): Likewise.
11694 (__arm_vqrdmlsdhxq_s16): Likewise.
11695 (__arm_vqrdmlsdhq_s16): Likewise.
11696 (__arm_vqrdmlashq_n_s16): Likewise.
11697 (__arm_vqrdmlahq_n_s16): Likewise.
11698 (__arm_vqrdmladhxq_s16): Likewise.
11699 (__arm_vqrdmladhq_s16): Likewise.
11700 (__arm_vqdmlsdhxq_s16): Likewise.
11701 (__arm_vqdmlsdhq_s16): Likewise.
11702 (__arm_vqdmlahq_n_s16): Likewise.
11703 (__arm_vqdmladhxq_s16): Likewise.
11704 (__arm_vqdmladhq_s16): Likewise.
11705 (__arm_vmlsdavaxq_s16): Likewise.
11706 (__arm_vmlsdavaq_s16): Likewise.
11707 (__arm_vmlasq_n_s16): Likewise.
11708 (__arm_vmlaq_n_s16): Likewise.
11709 (__arm_vmladavaxq_s16): Likewise.
11710 (__arm_vmladavaq_s16): Likewise.
11711 (__arm_vsriq_n_s16): Likewise.
11712 (__arm_vsliq_n_s16): Likewise.
11713 (__arm_vpselq_u32): Likewise.
11714 (__arm_vpselq_s32): Likewise.
11715 (__arm_vrev64q_m_u32): Likewise.
11716 (__arm_vqrdmlashq_n_u32): Likewise.
11717 (__arm_vqrdmlahq_n_u32): Likewise.
11718 (__arm_vqdmlahq_n_u32): Likewise.
11719 (__arm_vmvnq_m_u32): Likewise.
11720 (__arm_vmlasq_n_u32): Likewise.
11721 (__arm_vmlaq_n_u32): Likewise.
11722 (__arm_vmladavq_p_u32): Likewise.
11723 (__arm_vmladavaq_u32): Likewise.
11724 (__arm_vminvq_p_u32): Likewise.
11725 (__arm_vmaxvq_p_u32): Likewise.
11726 (__arm_vdupq_m_n_u32): Likewise.
11727 (__arm_vcmpneq_m_u32): Likewise.
11728 (__arm_vcmpneq_m_n_u32): Likewise.
11729 (__arm_vcmphiq_m_u32): Likewise.
11730 (__arm_vcmphiq_m_n_u32): Likewise.
11731 (__arm_vcmpeqq_m_u32): Likewise.
11732 (__arm_vcmpeqq_m_n_u32): Likewise.
11733 (__arm_vcmpcsq_m_u32): Likewise.
11734 (__arm_vcmpcsq_m_n_u32): Likewise.
11735 (__arm_vclzq_m_u32): Likewise.
11736 (__arm_vaddvaq_p_u32): Likewise.
11737 (__arm_vsriq_n_u32): Likewise.
11738 (__arm_vsliq_n_u32): Likewise.
11739 (__arm_vshlq_m_r_u32): Likewise.
11740 (__arm_vrshlq_m_n_u32): Likewise.
11741 (__arm_vqshlq_m_r_u32): Likewise.
11742 (__arm_vqrshlq_m_n_u32): Likewise.
11743 (__arm_vminavq_p_s32): Likewise.
11744 (__arm_vminaq_m_s32): Likewise.
11745 (__arm_vmaxavq_p_s32): Likewise.
11746 (__arm_vmaxaq_m_s32): Likewise.
11747 (__arm_vcmpneq_m_s32): Likewise.
11748 (__arm_vcmpneq_m_n_s32): Likewise.
11749 (__arm_vcmpltq_m_s32): Likewise.
11750 (__arm_vcmpltq_m_n_s32): Likewise.
11751 (__arm_vcmpleq_m_s32): Likewise.
11752 (__arm_vcmpleq_m_n_s32): Likewise.
11753 (__arm_vcmpgtq_m_s32): Likewise.
11754 (__arm_vcmpgtq_m_n_s32): Likewise.
11755 (__arm_vcmpgeq_m_s32): Likewise.
11756 (__arm_vcmpgeq_m_n_s32): Likewise.
11757 (__arm_vcmpeqq_m_s32): Likewise.
11758 (__arm_vcmpeqq_m_n_s32): Likewise.
11759 (__arm_vshlq_m_r_s32): Likewise.
11760 (__arm_vrshlq_m_n_s32): Likewise.
11761 (__arm_vrev64q_m_s32): Likewise.
11762 (__arm_vqshlq_m_r_s32): Likewise.
11763 (__arm_vqrshlq_m_n_s32): Likewise.
11764 (__arm_vqnegq_m_s32): Likewise.
11765 (__arm_vqabsq_m_s32): Likewise.
11766 (__arm_vnegq_m_s32): Likewise.
11767 (__arm_vmvnq_m_s32): Likewise.
11768 (__arm_vmlsdavxq_p_s32): Likewise.
11769 (__arm_vmlsdavq_p_s32): Likewise.
11770 (__arm_vmladavxq_p_s32): Likewise.
11771 (__arm_vmladavq_p_s32): Likewise.
11772 (__arm_vminvq_p_s32): Likewise.
11773 (__arm_vmaxvq_p_s32): Likewise.
11774 (__arm_vdupq_m_n_s32): Likewise.
11775 (__arm_vclzq_m_s32): Likewise.
11776 (__arm_vclsq_m_s32): Likewise.
11777 (__arm_vaddvaq_p_s32): Likewise.
11778 (__arm_vabsq_m_s32): Likewise.
11779 (__arm_vqrdmlsdhxq_s32): Likewise.
11780 (__arm_vqrdmlsdhq_s32): Likewise.
11781 (__arm_vqrdmlashq_n_s32): Likewise.
11782 (__arm_vqrdmlahq_n_s32): Likewise.
11783 (__arm_vqrdmladhxq_s32): Likewise.
11784 (__arm_vqrdmladhq_s32): Likewise.
11785 (__arm_vqdmlsdhxq_s32): Likewise.
11786 (__arm_vqdmlsdhq_s32): Likewise.
11787 (__arm_vqdmlahq_n_s32): Likewise.
11788 (__arm_vqdmladhxq_s32): Likewise.
11789 (__arm_vqdmladhq_s32): Likewise.
11790 (__arm_vmlsdavaxq_s32): Likewise.
11791 (__arm_vmlsdavaq_s32): Likewise.
11792 (__arm_vmlasq_n_s32): Likewise.
11793 (__arm_vmlaq_n_s32): Likewise.
11794 (__arm_vmladavaxq_s32): Likewise.
11795 (__arm_vmladavaq_s32): Likewise.
11796 (__arm_vsriq_n_s32): Likewise.
11797 (__arm_vsliq_n_s32): Likewise.
11798 (__arm_vpselq_u64): Likewise.
11799 (__arm_vpselq_s64): Likewise.
11800 (vcmpneq_m_n): Define polymorphic variant.
11801 (vcmpneq_m): Likewise.
11802 (vqrdmlsdhq): Likewise.
11803 (vqrdmlsdhxq): Likewise.
11804 (vqrshlq_m_n): Likewise.
11805 (vqshlq_m_r): Likewise.
11806 (vrev64q_m): Likewise.
11807 (vrshlq_m_n): Likewise.
11808 (vshlq_m_r): Likewise.
11809 (vsliq_n): Likewise.
11810 (vsriq_n): Likewise.
11811 (vqrdmlashq_n): Likewise.
11812 (vqrdmlahq): Likewise.
11813 (vqrdmladhxq): Likewise.
11814 (vqrdmladhq): Likewise.
11815 (vqnegq_m): Likewise.
11816 (vqdmlsdhxq): Likewise.
11817 (vabsq_m): Likewise.
11818 (vclsq_m): Likewise.
11819 (vclzq_m): Likewise.
11820 (vcmpgeq_m): Likewise.
11821 (vcmpgeq_m_n): Likewise.
11822 (vdupq_m_n): Likewise.
11823 (vmaxaq_m): Likewise.
11824 (vmlaq_n): Likewise.
11825 (vmlasq_n): Likewise.
11826 (vmvnq_m): Likewise.
11827 (vnegq_m): Likewise.
11828 (vpselq): Likewise.
11829 (vqdmlahq_n): Likewise.
11830 (vqrdmlahq_n): Likewise.
11831 (vqdmlsdhq): Likewise.
11832 (vqdmladhq): Likewise.
11833 (vqabsq_m): Likewise.
11834 (vminaq_m): Likewise.
11835 (vrmlaldavhaq): Likewise.
11836 (vmlsdavxq_p): Likewise.
11837 (vmlsdavq_p): Likewise.
11838 (vmlsdavaxq): Likewise.
11839 (vmlsdavaq): Likewise.
11840 (vaddvaq_p): Likewise.
11841 (vcmpcsq_m_n): Likewise.
11842 (vcmpcsq_m): Likewise.
11843 (vcmpeqq_m_n): Likewise.
11844 (vcmpeqq_m): Likewise.
11845 (vmladavxq_p): Likewise.
11846 (vmladavq_p): Likewise.
11847 (vmladavaxq): Likewise.
11848 (vmladavaq): Likewise.
11849 (vminvq_p): Likewise.
11850 (vminavq_p): Likewise.
11851 (vmaxvq_p): Likewise.
11852 (vmaxavq_p): Likewise.
11853 (vcmpltq_m_n): Likewise.
11854 (vcmpltq_m): Likewise.
11855 (vcmpleq_m): Likewise.
11856 (vcmpleq_m_n): Likewise.
11857 (vcmphiq_m_n): Likewise.
11858 (vcmphiq_m): Likewise.
11859 (vcmpgtq_m_n): Likewise.
11860 (vcmpgtq_m): Likewise.
11861 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
11863 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
11864 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
11865 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
11866 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
11867 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
11868 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
11869 * config/arm/constraints.md (Rc): Define constraint to check constant is
11870 in the range of 0 to 15.
11871 (Re): Define constraint to check constant is in the range of 0 to 31.
11872 * config/arm/mve.md (VADDVAQ_P): Define iterator.
11873 (VCLZQ_M): Likewise.
11874 (VCMPEQQ_M_N): Likewise.
11875 (VCMPEQQ_M): Likewise.
11876 (VCMPNEQ_M_N): Likewise.
11877 (VCMPNEQ_M): Likewise.
11878 (VDUPQ_M_N): Likewise.
11879 (VMAXVQ_P): Likewise.
11880 (VMINVQ_P): Likewise.
11881 (VMLADAVAQ): Likewise.
11882 (VMLADAVQ_P): Likewise.
11883 (VMLAQ_N): Likewise.
11884 (VMLASQ_N): Likewise.
11885 (VMVNQ_M): Likewise.
11886 (VPSELQ): Likewise.
11887 (VQDMLAHQ_N): Likewise.
11888 (VQRDMLAHQ_N): Likewise.
11889 (VQRDMLASHQ_N): Likewise.
11890 (VQRSHLQ_M_N): Likewise.
11891 (VQSHLQ_M_R): Likewise.
11892 (VREV64Q_M): Likewise.
11893 (VRSHLQ_M_N): Likewise.
11894 (VSHLQ_M_R): Likewise.
11895 (VSLIQ_N): Likewise.
11896 (VSRIQ_N): Likewise.
11897 (mve_vabsq_m_s<mode>): Define RTL pattern.
11898 (mve_vaddvaq_p_<supf><mode>): Likewise.
11899 (mve_vclsq_m_s<mode>): Likewise.
11900 (mve_vclzq_m_<supf><mode>): Likewise.
11901 (mve_vcmpcsq_m_n_u<mode>): Likewise.
11902 (mve_vcmpcsq_m_u<mode>): Likewise.
11903 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
11904 (mve_vcmpeqq_m_<supf><mode>): Likewise.
11905 (mve_vcmpgeq_m_n_s<mode>): Likewise.
11906 (mve_vcmpgeq_m_s<mode>): Likewise.
11907 (mve_vcmpgtq_m_n_s<mode>): Likewise.
11908 (mve_vcmpgtq_m_s<mode>): Likewise.
11909 (mve_vcmphiq_m_n_u<mode>): Likewise.
11910 (mve_vcmphiq_m_u<mode>): Likewise.
11911 (mve_vcmpleq_m_n_s<mode>): Likewise.
11912 (mve_vcmpleq_m_s<mode>): Likewise.
11913 (mve_vcmpltq_m_n_s<mode>): Likewise.
11914 (mve_vcmpltq_m_s<mode>): Likewise.
11915 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
11916 (mve_vcmpneq_m_<supf><mode>): Likewise.
11917 (mve_vdupq_m_n_<supf><mode>): Likewise.
11918 (mve_vmaxaq_m_s<mode>): Likewise.
11919 (mve_vmaxavq_p_s<mode>): Likewise.
11920 (mve_vmaxvq_p_<supf><mode>): Likewise.
11921 (mve_vminaq_m_s<mode>): Likewise.
11922 (mve_vminavq_p_s<mode>): Likewise.
11923 (mve_vminvq_p_<supf><mode>): Likewise.
11924 (mve_vmladavaq_<supf><mode>): Likewise.
11925 (mve_vmladavq_p_<supf><mode>): Likewise.
11926 (mve_vmladavxq_p_s<mode>): Likewise.
11927 (mve_vmlaq_n_<supf><mode>): Likewise.
11928 (mve_vmlasq_n_<supf><mode>): Likewise.
11929 (mve_vmlsdavq_p_s<mode>): Likewise.
11930 (mve_vmlsdavxq_p_s<mode>): Likewise.
11931 (mve_vmvnq_m_<supf><mode>): Likewise.
11932 (mve_vnegq_m_s<mode>): Likewise.
11933 (mve_vpselq_<supf><mode>): Likewise.
11934 (mve_vqabsq_m_s<mode>): Likewise.
11935 (mve_vqdmlahq_n_<supf><mode>): Likewise.
11936 (mve_vqnegq_m_s<mode>): Likewise.
11937 (mve_vqrdmladhq_s<mode>): Likewise.
11938 (mve_vqrdmladhxq_s<mode>): Likewise.
11939 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
11940 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
11941 (mve_vqrdmlsdhq_s<mode>): Likewise.
11942 (mve_vqrdmlsdhxq_s<mode>): Likewise.
11943 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
11944 (mve_vqshlq_m_r_<supf><mode>): Likewise.
11945 (mve_vrev64q_m_<supf><mode>): Likewise.
11946 (mve_vrshlq_m_n_<supf><mode>): Likewise.
11947 (mve_vshlq_m_r_<supf><mode>): Likewise.
11948 (mve_vsliq_n_<supf><mode>): Likewise.
11949 (mve_vsriq_n_<supf><mode>): Likewise.
11950 (mve_vqdmlsdhxq_s<mode>): Likewise.
11951 (mve_vqdmlsdhq_s<mode>): Likewise.
11952 (mve_vqdmladhxq_s<mode>): Likewise.
11953 (mve_vqdmladhq_s<mode>): Likewise.
11954 (mve_vmlsdavaxq_s<mode>): Likewise.
11955 (mve_vmlsdavaq_s<mode>): Likewise.
11956 (mve_vmladavaxq_s<mode>): Likewise.
11957 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
11958 matching constraint Rc.
11959 (mve_imm_31): Define predicate to check the matching constraint Re.
11961 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
11963 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
11964 (vec_cmp<mode>di_dup): Likewise.
11965 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
11967 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
11969 * config/gcn/gcn-valu.md (COND_MODE): Delete.
11970 (COND_INT_MODE): Delete.
11971 (cond_op): Add "mult".
11972 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
11973 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
11975 2020-03-18 Richard Biener <rguenther@suse.de>
11977 PR middle-end/94206
11978 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
11979 partial int modes or not mode-precision integer types for
11982 2020-03-18 Jakub Jelinek <jakub@redhat.com>
11984 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
11986 * config/arc/arc.c (frame_stack_add): Likewise.
11987 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
11989 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
11990 * tree-ssa-strlen.h (handle_printf_call): Likewise.
11991 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
11992 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
11994 2020-03-18 Duan bo <duanbo3@huawei.com>
11997 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
11998 (@ldr_got_tiny_<mode>): New pattern.
11999 (ldr_got_tiny_sidi): Likewise.
12000 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
12001 them to handle SYMBOL_TINY_GOT for ILP32.
12003 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
12005 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
12006 call-preserved for SVE PCS functions.
12007 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
12008 Optimize the case in which there are no following vector save slots.
12010 2020-03-18 Richard Biener <rguenther@suse.de>
12012 PR middle-end/94188
12013 * fold-const.c (build_fold_addr_expr): Convert address to
12015 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
12016 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
12017 to build the ADDR_EXPR which we don't really want to simplify.
12018 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
12019 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
12020 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
12021 (simplify_builtin_call): Strip useless type conversions.
12022 * tree-ssa-strlen.c (new_strinfo): Likewise.
12024 2020-03-17 Alexey Neyman <stilor@att.net>
12027 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
12028 the debug level is terse and the declaration is public. Do not
12029 generate type info.
12030 (dwarf2out_decl): Same.
12031 (add_type_attribute): Return immediately if debug level is
12034 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
12036 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
12038 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12039 Mihail Ionescu <mihail.ionescu@arm.com>
12040 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12042 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
12043 Define qualifier for ternary operands.
12044 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
12045 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12046 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12047 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
12048 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12049 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12050 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12051 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
12052 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12053 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12054 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
12055 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12056 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
12057 * config/arm/arm_mve.h (vabavq_s8): Define macro.
12058 (vabavq_s16): Likewise.
12059 (vabavq_s32): Likewise.
12060 (vbicq_m_n_s16): Likewise.
12061 (vbicq_m_n_s32): Likewise.
12062 (vbicq_m_n_u16): Likewise.
12063 (vbicq_m_n_u32): Likewise.
12064 (vcmpeqq_m_f16): Likewise.
12065 (vcmpeqq_m_f32): Likewise.
12066 (vcvtaq_m_s16_f16): Likewise.
12067 (vcvtaq_m_u16_f16): Likewise.
12068 (vcvtaq_m_s32_f32): Likewise.
12069 (vcvtaq_m_u32_f32): Likewise.
12070 (vcvtq_m_f16_s16): Likewise.
12071 (vcvtq_m_f16_u16): Likewise.
12072 (vcvtq_m_f32_s32): Likewise.
12073 (vcvtq_m_f32_u32): Likewise.
12074 (vqrshrnbq_n_s16): Likewise.
12075 (vqrshrnbq_n_u16): Likewise.
12076 (vqrshrnbq_n_s32): Likewise.
12077 (vqrshrnbq_n_u32): Likewise.
12078 (vqrshrunbq_n_s16): Likewise.
12079 (vqrshrunbq_n_s32): Likewise.
12080 (vrmlaldavhaq_s32): Likewise.
12081 (vrmlaldavhaq_u32): Likewise.
12082 (vshlcq_s8): Likewise.
12083 (vshlcq_u8): Likewise.
12084 (vshlcq_s16): Likewise.
12085 (vshlcq_u16): Likewise.
12086 (vshlcq_s32): Likewise.
12087 (vshlcq_u32): Likewise.
12088 (vabavq_u8): Likewise.
12089 (vabavq_u16): Likewise.
12090 (vabavq_u32): Likewise.
12091 (__arm_vabavq_s8): Define intrinsic.
12092 (__arm_vabavq_s16): Likewise.
12093 (__arm_vabavq_s32): Likewise.
12094 (__arm_vabavq_u8): Likewise.
12095 (__arm_vabavq_u16): Likewise.
12096 (__arm_vabavq_u32): Likewise.
12097 (__arm_vbicq_m_n_s16): Likewise.
12098 (__arm_vbicq_m_n_s32): Likewise.
12099 (__arm_vbicq_m_n_u16): Likewise.
12100 (__arm_vbicq_m_n_u32): Likewise.
12101 (__arm_vqrshrnbq_n_s16): Likewise.
12102 (__arm_vqrshrnbq_n_u16): Likewise.
12103 (__arm_vqrshrnbq_n_s32): Likewise.
12104 (__arm_vqrshrnbq_n_u32): Likewise.
12105 (__arm_vqrshrunbq_n_s16): Likewise.
12106 (__arm_vqrshrunbq_n_s32): Likewise.
12107 (__arm_vrmlaldavhaq_s32): Likewise.
12108 (__arm_vrmlaldavhaq_u32): Likewise.
12109 (__arm_vshlcq_s8): Likewise.
12110 (__arm_vshlcq_u8): Likewise.
12111 (__arm_vshlcq_s16): Likewise.
12112 (__arm_vshlcq_u16): Likewise.
12113 (__arm_vshlcq_s32): Likewise.
12114 (__arm_vshlcq_u32): Likewise.
12115 (__arm_vcmpeqq_m_f16): Likewise.
12116 (__arm_vcmpeqq_m_f32): Likewise.
12117 (__arm_vcvtaq_m_s16_f16): Likewise.
12118 (__arm_vcvtaq_m_u16_f16): Likewise.
12119 (__arm_vcvtaq_m_s32_f32): Likewise.
12120 (__arm_vcvtaq_m_u32_f32): Likewise.
12121 (__arm_vcvtq_m_f16_s16): Likewise.
12122 (__arm_vcvtq_m_f16_u16): Likewise.
12123 (__arm_vcvtq_m_f32_s32): Likewise.
12124 (__arm_vcvtq_m_f32_u32): Likewise.
12125 (vcvtaq_m): Define polymorphic variant.
12126 (vcvtq_m): Likewise.
12127 (vabavq): Likewise.
12128 (vshlcq): Likewise.
12129 (vbicq_m_n): Likewise.
12130 (vqrshrnbq_n): Likewise.
12131 (vqrshrunbq_n): Likewise.
12132 * config/arm/arm_mve_builtins.def
12133 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
12134 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
12135 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12136 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12137 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
12138 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12139 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12140 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12141 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
12142 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12143 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12144 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
12145 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12146 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
12147 * config/arm/mve.md (VBICQ_M_N): Define iterator.
12148 (VCVTAQ_M): Likewise.
12149 (VCVTQ_M_TO_F): Likewise.
12150 (VQRSHRNBQ_N): Likewise.
12151 (VABAVQ): Likewise.
12152 (VSHLCQ): Likewise.
12153 (VRMLALDAVHAQ): Likewise.
12154 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
12155 (mve_vcmpeqq_m_f<mode>): Likewise.
12156 (mve_vcvtaq_m_<supf><mode>): Likewise.
12157 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
12158 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
12159 (mve_vqrshrunbq_n_s<mode>): Likewise.
12160 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
12161 (mve_vabavq_<supf><mode>): Likewise.
12162 (mve_vshlcq_<supf><mode>): Likewise.
12163 (mve_vshlcq_<supf><mode>): Likewise.
12164 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
12165 (mve_vshlcq_carry_<supf><mode>): Likewise.
12167 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12168 Mihail Ionescu <mihail.ionescu@arm.com>
12169 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12171 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
12172 (vqmovnbq_u16): Likewise.
12173 (vmulltq_poly_p8): Likewise.
12174 (vmullbq_poly_p8): Likewise.
12175 (vmovntq_u16): Likewise.
12176 (vmovnbq_u16): Likewise.
12177 (vmlaldavxq_u16): Likewise.
12178 (vmlaldavq_u16): Likewise.
12179 (vqmovuntq_s16): Likewise.
12180 (vqmovunbq_s16): Likewise.
12181 (vshlltq_n_u8): Likewise.
12182 (vshllbq_n_u8): Likewise.
12183 (vorrq_n_u16): Likewise.
12184 (vbicq_n_u16): Likewise.
12185 (vcmpneq_n_f16): Likewise.
12186 (vcmpneq_f16): Likewise.
12187 (vcmpltq_n_f16): Likewise.
12188 (vcmpltq_f16): Likewise.
12189 (vcmpleq_n_f16): Likewise.
12190 (vcmpleq_f16): Likewise.
12191 (vcmpgtq_n_f16): Likewise.
12192 (vcmpgtq_f16): Likewise.
12193 (vcmpgeq_n_f16): Likewise.
12194 (vcmpgeq_f16): Likewise.
12195 (vcmpeqq_n_f16): Likewise.
12196 (vcmpeqq_f16): Likewise.
12197 (vsubq_f16): Likewise.
12198 (vqmovntq_s16): Likewise.
12199 (vqmovnbq_s16): Likewise.
12200 (vqdmulltq_s16): Likewise.
12201 (vqdmulltq_n_s16): Likewise.
12202 (vqdmullbq_s16): Likewise.
12203 (vqdmullbq_n_s16): Likewise.
12204 (vorrq_f16): Likewise.
12205 (vornq_f16): Likewise.
12206 (vmulq_n_f16): Likewise.
12207 (vmulq_f16): Likewise.
12208 (vmovntq_s16): Likewise.
12209 (vmovnbq_s16): Likewise.
12210 (vmlsldavxq_s16): Likewise.
12211 (vmlsldavq_s16): Likewise.
12212 (vmlaldavxq_s16): Likewise.
12213 (vmlaldavq_s16): Likewise.
12214 (vminnmvq_f16): Likewise.
12215 (vminnmq_f16): Likewise.
12216 (vminnmavq_f16): Likewise.
12217 (vminnmaq_f16): Likewise.
12218 (vmaxnmvq_f16): Likewise.
12219 (vmaxnmq_f16): Likewise.
12220 (vmaxnmavq_f16): Likewise.
12221 (vmaxnmaq_f16): Likewise.
12222 (veorq_f16): Likewise.
12223 (vcmulq_rot90_f16): Likewise.
12224 (vcmulq_rot270_f16): Likewise.
12225 (vcmulq_rot180_f16): Likewise.
12226 (vcmulq_f16): Likewise.
12227 (vcaddq_rot90_f16): Likewise.
12228 (vcaddq_rot270_f16): Likewise.
12229 (vbicq_f16): Likewise.
12230 (vandq_f16): Likewise.
12231 (vaddq_n_f16): Likewise.
12232 (vabdq_f16): Likewise.
12233 (vshlltq_n_s8): Likewise.
12234 (vshllbq_n_s8): Likewise.
12235 (vorrq_n_s16): Likewise.
12236 (vbicq_n_s16): Likewise.
12237 (vqmovntq_u32): Likewise.
12238 (vqmovnbq_u32): Likewise.
12239 (vmulltq_poly_p16): Likewise.
12240 (vmullbq_poly_p16): Likewise.
12241 (vmovntq_u32): Likewise.
12242 (vmovnbq_u32): Likewise.
12243 (vmlaldavxq_u32): Likewise.
12244 (vmlaldavq_u32): Likewise.
12245 (vqmovuntq_s32): Likewise.
12246 (vqmovunbq_s32): Likewise.
12247 (vshlltq_n_u16): Likewise.
12248 (vshllbq_n_u16): Likewise.
12249 (vorrq_n_u32): Likewise.
12250 (vbicq_n_u32): Likewise.
12251 (vcmpneq_n_f32): Likewise.
12252 (vcmpneq_f32): Likewise.
12253 (vcmpltq_n_f32): Likewise.
12254 (vcmpltq_f32): Likewise.
12255 (vcmpleq_n_f32): Likewise.
12256 (vcmpleq_f32): Likewise.
12257 (vcmpgtq_n_f32): Likewise.
12258 (vcmpgtq_f32): Likewise.
12259 (vcmpgeq_n_f32): Likewise.
12260 (vcmpgeq_f32): Likewise.
12261 (vcmpeqq_n_f32): Likewise.
12262 (vcmpeqq_f32): Likewise.
12263 (vsubq_f32): Likewise.
12264 (vqmovntq_s32): Likewise.
12265 (vqmovnbq_s32): Likewise.
12266 (vqdmulltq_s32): Likewise.
12267 (vqdmulltq_n_s32): Likewise.
12268 (vqdmullbq_s32): Likewise.
12269 (vqdmullbq_n_s32): Likewise.
12270 (vorrq_f32): Likewise.
12271 (vornq_f32): Likewise.
12272 (vmulq_n_f32): Likewise.
12273 (vmulq_f32): Likewise.
12274 (vmovntq_s32): Likewise.
12275 (vmovnbq_s32): Likewise.
12276 (vmlsldavxq_s32): Likewise.
12277 (vmlsldavq_s32): Likewise.
12278 (vmlaldavxq_s32): Likewise.
12279 (vmlaldavq_s32): Likewise.
12280 (vminnmvq_f32): Likewise.
12281 (vminnmq_f32): Likewise.
12282 (vminnmavq_f32): Likewise.
12283 (vminnmaq_f32): Likewise.
12284 (vmaxnmvq_f32): Likewise.
12285 (vmaxnmq_f32): Likewise.
12286 (vmaxnmavq_f32): Likewise.
12287 (vmaxnmaq_f32): Likewise.
12288 (veorq_f32): Likewise.
12289 (vcmulq_rot90_f32): Likewise.
12290 (vcmulq_rot270_f32): Likewise.
12291 (vcmulq_rot180_f32): Likewise.
12292 (vcmulq_f32): Likewise.
12293 (vcaddq_rot90_f32): Likewise.
12294 (vcaddq_rot270_f32): Likewise.
12295 (vbicq_f32): Likewise.
12296 (vandq_f32): Likewise.
12297 (vaddq_n_f32): Likewise.
12298 (vabdq_f32): Likewise.
12299 (vshlltq_n_s16): Likewise.
12300 (vshllbq_n_s16): Likewise.
12301 (vorrq_n_s32): Likewise.
12302 (vbicq_n_s32): Likewise.
12303 (vrmlaldavhq_u32): Likewise.
12304 (vctp8q_m): Likewise.
12305 (vctp64q_m): Likewise.
12306 (vctp32q_m): Likewise.
12307 (vctp16q_m): Likewise.
12308 (vaddlvaq_u32): Likewise.
12309 (vrmlsldavhxq_s32): Likewise.
12310 (vrmlsldavhq_s32): Likewise.
12311 (vrmlaldavhxq_s32): Likewise.
12312 (vrmlaldavhq_s32): Likewise.
12313 (vcvttq_f16_f32): Likewise.
12314 (vcvtbq_f16_f32): Likewise.
12315 (vaddlvaq_s32): Likewise.
12316 (__arm_vqmovntq_u16): Define intrinsic.
12317 (__arm_vqmovnbq_u16): Likewise.
12318 (__arm_vmulltq_poly_p8): Likewise.
12319 (__arm_vmullbq_poly_p8): Likewise.
12320 (__arm_vmovntq_u16): Likewise.
12321 (__arm_vmovnbq_u16): Likewise.
12322 (__arm_vmlaldavxq_u16): Likewise.
12323 (__arm_vmlaldavq_u16): Likewise.
12324 (__arm_vqmovuntq_s16): Likewise.
12325 (__arm_vqmovunbq_s16): Likewise.
12326 (__arm_vshlltq_n_u8): Likewise.
12327 (__arm_vshllbq_n_u8): Likewise.
12328 (__arm_vorrq_n_u16): Likewise.
12329 (__arm_vbicq_n_u16): Likewise.
12330 (__arm_vcmpneq_n_f16): Likewise.
12331 (__arm_vcmpneq_f16): Likewise.
12332 (__arm_vcmpltq_n_f16): Likewise.
12333 (__arm_vcmpltq_f16): Likewise.
12334 (__arm_vcmpleq_n_f16): Likewise.
12335 (__arm_vcmpleq_f16): Likewise.
12336 (__arm_vcmpgtq_n_f16): Likewise.
12337 (__arm_vcmpgtq_f16): Likewise.
12338 (__arm_vcmpgeq_n_f16): Likewise.
12339 (__arm_vcmpgeq_f16): Likewise.
12340 (__arm_vcmpeqq_n_f16): Likewise.
12341 (__arm_vcmpeqq_f16): Likewise.
12342 (__arm_vsubq_f16): Likewise.
12343 (__arm_vqmovntq_s16): Likewise.
12344 (__arm_vqmovnbq_s16): Likewise.
12345 (__arm_vqdmulltq_s16): Likewise.
12346 (__arm_vqdmulltq_n_s16): Likewise.
12347 (__arm_vqdmullbq_s16): Likewise.
12348 (__arm_vqdmullbq_n_s16): Likewise.
12349 (__arm_vorrq_f16): Likewise.
12350 (__arm_vornq_f16): Likewise.
12351 (__arm_vmulq_n_f16): Likewise.
12352 (__arm_vmulq_f16): Likewise.
12353 (__arm_vmovntq_s16): Likewise.
12354 (__arm_vmovnbq_s16): Likewise.
12355 (__arm_vmlsldavxq_s16): Likewise.
12356 (__arm_vmlsldavq_s16): Likewise.
12357 (__arm_vmlaldavxq_s16): Likewise.
12358 (__arm_vmlaldavq_s16): Likewise.
12359 (__arm_vminnmvq_f16): Likewise.
12360 (__arm_vminnmq_f16): Likewise.
12361 (__arm_vminnmavq_f16): Likewise.
12362 (__arm_vminnmaq_f16): Likewise.
12363 (__arm_vmaxnmvq_f16): Likewise.
12364 (__arm_vmaxnmq_f16): Likewise.
12365 (__arm_vmaxnmavq_f16): Likewise.
12366 (__arm_vmaxnmaq_f16): Likewise.
12367 (__arm_veorq_f16): Likewise.
12368 (__arm_vcmulq_rot90_f16): Likewise.
12369 (__arm_vcmulq_rot270_f16): Likewise.
12370 (__arm_vcmulq_rot180_f16): Likewise.
12371 (__arm_vcmulq_f16): Likewise.
12372 (__arm_vcaddq_rot90_f16): Likewise.
12373 (__arm_vcaddq_rot270_f16): Likewise.
12374 (__arm_vbicq_f16): Likewise.
12375 (__arm_vandq_f16): Likewise.
12376 (__arm_vaddq_n_f16): Likewise.
12377 (__arm_vabdq_f16): Likewise.
12378 (__arm_vshlltq_n_s8): Likewise.
12379 (__arm_vshllbq_n_s8): Likewise.
12380 (__arm_vorrq_n_s16): Likewise.
12381 (__arm_vbicq_n_s16): Likewise.
12382 (__arm_vqmovntq_u32): Likewise.
12383 (__arm_vqmovnbq_u32): Likewise.
12384 (__arm_vmulltq_poly_p16): Likewise.
12385 (__arm_vmullbq_poly_p16): Likewise.
12386 (__arm_vmovntq_u32): Likewise.
12387 (__arm_vmovnbq_u32): Likewise.
12388 (__arm_vmlaldavxq_u32): Likewise.
12389 (__arm_vmlaldavq_u32): Likewise.
12390 (__arm_vqmovuntq_s32): Likewise.
12391 (__arm_vqmovunbq_s32): Likewise.
12392 (__arm_vshlltq_n_u16): Likewise.
12393 (__arm_vshllbq_n_u16): Likewise.
12394 (__arm_vorrq_n_u32): Likewise.
12395 (__arm_vbicq_n_u32): Likewise.
12396 (__arm_vcmpneq_n_f32): Likewise.
12397 (__arm_vcmpneq_f32): Likewise.
12398 (__arm_vcmpltq_n_f32): Likewise.
12399 (__arm_vcmpltq_f32): Likewise.
12400 (__arm_vcmpleq_n_f32): Likewise.
12401 (__arm_vcmpleq_f32): Likewise.
12402 (__arm_vcmpgtq_n_f32): Likewise.
12403 (__arm_vcmpgtq_f32): Likewise.
12404 (__arm_vcmpgeq_n_f32): Likewise.
12405 (__arm_vcmpgeq_f32): Likewise.
12406 (__arm_vcmpeqq_n_f32): Likewise.
12407 (__arm_vcmpeqq_f32): Likewise.
12408 (__arm_vsubq_f32): Likewise.
12409 (__arm_vqmovntq_s32): Likewise.
12410 (__arm_vqmovnbq_s32): Likewise.
12411 (__arm_vqdmulltq_s32): Likewise.
12412 (__arm_vqdmulltq_n_s32): Likewise.
12413 (__arm_vqdmullbq_s32): Likewise.
12414 (__arm_vqdmullbq_n_s32): Likewise.
12415 (__arm_vorrq_f32): Likewise.
12416 (__arm_vornq_f32): Likewise.
12417 (__arm_vmulq_n_f32): Likewise.
12418 (__arm_vmulq_f32): Likewise.
12419 (__arm_vmovntq_s32): Likewise.
12420 (__arm_vmovnbq_s32): Likewise.
12421 (__arm_vmlsldavxq_s32): Likewise.
12422 (__arm_vmlsldavq_s32): Likewise.
12423 (__arm_vmlaldavxq_s32): Likewise.
12424 (__arm_vmlaldavq_s32): Likewise.
12425 (__arm_vminnmvq_f32): Likewise.
12426 (__arm_vminnmq_f32): Likewise.
12427 (__arm_vminnmavq_f32): Likewise.
12428 (__arm_vminnmaq_f32): Likewise.
12429 (__arm_vmaxnmvq_f32): Likewise.
12430 (__arm_vmaxnmq_f32): Likewise.
12431 (__arm_vmaxnmavq_f32): Likewise.
12432 (__arm_vmaxnmaq_f32): Likewise.
12433 (__arm_veorq_f32): Likewise.
12434 (__arm_vcmulq_rot90_f32): Likewise.
12435 (__arm_vcmulq_rot270_f32): Likewise.
12436 (__arm_vcmulq_rot180_f32): Likewise.
12437 (__arm_vcmulq_f32): Likewise.
12438 (__arm_vcaddq_rot90_f32): Likewise.
12439 (__arm_vcaddq_rot270_f32): Likewise.
12440 (__arm_vbicq_f32): Likewise.
12441 (__arm_vandq_f32): Likewise.
12442 (__arm_vaddq_n_f32): Likewise.
12443 (__arm_vabdq_f32): Likewise.
12444 (__arm_vshlltq_n_s16): Likewise.
12445 (__arm_vshllbq_n_s16): Likewise.
12446 (__arm_vorrq_n_s32): Likewise.
12447 (__arm_vbicq_n_s32): Likewise.
12448 (__arm_vrmlaldavhq_u32): Likewise.
12449 (__arm_vctp8q_m): Likewise.
12450 (__arm_vctp64q_m): Likewise.
12451 (__arm_vctp32q_m): Likewise.
12452 (__arm_vctp16q_m): Likewise.
12453 (__arm_vaddlvaq_u32): Likewise.
12454 (__arm_vrmlsldavhxq_s32): Likewise.
12455 (__arm_vrmlsldavhq_s32): Likewise.
12456 (__arm_vrmlaldavhxq_s32): Likewise.
12457 (__arm_vrmlaldavhq_s32): Likewise.
12458 (__arm_vcvttq_f16_f32): Likewise.
12459 (__arm_vcvtbq_f16_f32): Likewise.
12460 (__arm_vaddlvaq_s32): Likewise.
12461 (vst4q): Define polymorphic variant.
12462 (vrndxq): Likewise.
12464 (vrndpq): Likewise.
12465 (vrndnq): Likewise.
12466 (vrndmq): Likewise.
12467 (vrndaq): Likewise.
12468 (vrev64q): Likewise.
12470 (vdupq_n): Likewise.
12472 (vrev32q): Likewise.
12473 (vcvtbq_f32): Likewise.
12474 (vcvttq_f32): Likewise.
12476 (vsubq_n): Likewise.
12477 (vbrsrq_n): Likewise.
12478 (vcvtq_n): Likewise.
12482 (vaddq_n): Likewise.
12486 (vmulq_n): Likewise.
12488 (vcaddq_rot270): Likewise.
12489 (vcmpeqq_n): Likewise.
12490 (vcmpeqq): Likewise.
12491 (vcaddq_rot90): Likewise.
12492 (vcmpgeq_n): Likewise.
12493 (vcmpgeq): Likewise.
12494 (vcmpgtq_n): Likewise.
12495 (vcmpgtq): Likewise.
12496 (vcmpgtq): Likewise.
12497 (vcmpleq_n): Likewise.
12498 (vcmpleq_n): Likewise.
12499 (vcmpleq): Likewise.
12500 (vcmpleq): Likewise.
12501 (vcmpltq_n): Likewise.
12502 (vcmpltq_n): Likewise.
12503 (vcmpltq): Likewise.
12504 (vcmpltq): Likewise.
12505 (vcmpneq_n): Likewise.
12506 (vcmpneq_n): Likewise.
12507 (vcmpneq): Likewise.
12508 (vcmpneq): Likewise.
12509 (vcmulq): Likewise.
12510 (vcmulq): Likewise.
12511 (vcmulq_rot180): Likewise.
12512 (vcmulq_rot180): Likewise.
12513 (vcmulq_rot270): Likewise.
12514 (vcmulq_rot270): Likewise.
12515 (vcmulq_rot90): Likewise.
12516 (vcmulq_rot90): Likewise.
12519 (vmaxnmaq): Likewise.
12520 (vmaxnmaq): Likewise.
12521 (vmaxnmavq): Likewise.
12522 (vmaxnmavq): Likewise.
12523 (vmaxnmq): Likewise.
12524 (vmaxnmq): Likewise.
12525 (vmaxnmvq): Likewise.
12526 (vmaxnmvq): Likewise.
12527 (vminnmaq): Likewise.
12528 (vminnmaq): Likewise.
12529 (vminnmavq): Likewise.
12530 (vminnmavq): Likewise.
12531 (vminnmq): Likewise.
12532 (vminnmq): Likewise.
12533 (vminnmvq): Likewise.
12534 (vminnmvq): Likewise.
12535 (vbicq_n): Likewise.
12536 (vqmovntq): Likewise.
12537 (vqmovntq): Likewise.
12538 (vqmovnbq): Likewise.
12539 (vqmovnbq): Likewise.
12540 (vmulltq_poly): Likewise.
12541 (vmulltq_poly): Likewise.
12542 (vmullbq_poly): Likewise.
12543 (vmullbq_poly): Likewise.
12544 (vmovntq): Likewise.
12545 (vmovntq): Likewise.
12546 (vmovnbq): Likewise.
12547 (vmovnbq): Likewise.
12548 (vmlaldavxq): Likewise.
12549 (vmlaldavxq): Likewise.
12550 (vqmovuntq): Likewise.
12551 (vqmovuntq): Likewise.
12552 (vshlltq_n): Likewise.
12553 (vshlltq_n): Likewise.
12554 (vshllbq_n): Likewise.
12555 (vshllbq_n): Likewise.
12556 (vorrq_n): Likewise.
12557 (vorrq_n): Likewise.
12558 (vmlaldavq): Likewise.
12559 (vmlaldavq): Likewise.
12560 (vqmovunbq): Likewise.
12561 (vqmovunbq): Likewise.
12562 (vqdmulltq_n): Likewise.
12563 (vqdmulltq_n): Likewise.
12564 (vqdmulltq): Likewise.
12565 (vqdmulltq): Likewise.
12566 (vqdmullbq_n): Likewise.
12567 (vqdmullbq_n): Likewise.
12568 (vqdmullbq): Likewise.
12569 (vqdmullbq): Likewise.
12570 (vaddlvaq): Likewise.
12571 (vaddlvaq): Likewise.
12572 (vrmlaldavhq): Likewise.
12573 (vrmlaldavhq): Likewise.
12574 (vrmlaldavhxq): Likewise.
12575 (vrmlaldavhxq): Likewise.
12576 (vrmlsldavhq): Likewise.
12577 (vrmlsldavhq): Likewise.
12578 (vrmlsldavhxq): Likewise.
12579 (vrmlsldavhxq): Likewise.
12580 (vmlsldavxq): Likewise.
12581 (vmlsldavxq): Likewise.
12582 (vmlsldavq): Likewise.
12583 (vmlsldavq): Likewise.
12584 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
12585 (BINOP_NONE_NONE_NONE): Likewise.
12586 (BINOP_UNONE_NONE_NONE): Likewise.
12587 (BINOP_UNONE_UNONE_IMM): Likewise.
12588 (BINOP_UNONE_UNONE_NONE): Likewise.
12589 (BINOP_UNONE_UNONE_UNONE): Likewise.
12590 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
12591 (mve_vaddlvaq_<supf>v4si): Likewise.
12592 (mve_vaddq_n_f<mode>): Likewise.
12593 (mve_vandq_f<mode>): Likewise.
12594 (mve_vbicq_f<mode>): Likewise.
12595 (mve_vbicq_n_<supf><mode>): Likewise.
12596 (mve_vcaddq_rot270_f<mode>): Likewise.
12597 (mve_vcaddq_rot90_f<mode>): Likewise.
12598 (mve_vcmpeqq_f<mode>): Likewise.
12599 (mve_vcmpeqq_n_f<mode>): Likewise.
12600 (mve_vcmpgeq_f<mode>): Likewise.
12601 (mve_vcmpgeq_n_f<mode>): Likewise.
12602 (mve_vcmpgtq_f<mode>): Likewise.
12603 (mve_vcmpgtq_n_f<mode>): Likewise.
12604 (mve_vcmpleq_f<mode>): Likewise.
12605 (mve_vcmpleq_n_f<mode>): Likewise.
12606 (mve_vcmpltq_f<mode>): Likewise.
12607 (mve_vcmpltq_n_f<mode>): Likewise.
12608 (mve_vcmpneq_f<mode>): Likewise.
12609 (mve_vcmpneq_n_f<mode>): Likewise.
12610 (mve_vcmulq_f<mode>): Likewise.
12611 (mve_vcmulq_rot180_f<mode>): Likewise.
12612 (mve_vcmulq_rot270_f<mode>): Likewise.
12613 (mve_vcmulq_rot90_f<mode>): Likewise.
12614 (mve_vctp<mode1>q_mhi): Likewise.
12615 (mve_vcvtbq_f16_f32v8hf): Likewise.
12616 (mve_vcvttq_f16_f32v8hf): Likewise.
12617 (mve_veorq_f<mode>): Likewise.
12618 (mve_vmaxnmaq_f<mode>): Likewise.
12619 (mve_vmaxnmavq_f<mode>): Likewise.
12620 (mve_vmaxnmq_f<mode>): Likewise.
12621 (mve_vmaxnmvq_f<mode>): Likewise.
12622 (mve_vminnmaq_f<mode>): Likewise.
12623 (mve_vminnmavq_f<mode>): Likewise.
12624 (mve_vminnmq_f<mode>): Likewise.
12625 (mve_vminnmvq_f<mode>): Likewise.
12626 (mve_vmlaldavq_<supf><mode>): Likewise.
12627 (mve_vmlaldavxq_<supf><mode>): Likewise.
12628 (mve_vmlsldavq_s<mode>): Likewise.
12629 (mve_vmlsldavxq_s<mode>): Likewise.
12630 (mve_vmovnbq_<supf><mode>): Likewise.
12631 (mve_vmovntq_<supf><mode>): Likewise.
12632 (mve_vmulq_f<mode>): Likewise.
12633 (mve_vmulq_n_f<mode>): Likewise.
12634 (mve_vornq_f<mode>): Likewise.
12635 (mve_vorrq_f<mode>): Likewise.
12636 (mve_vorrq_n_<supf><mode>): Likewise.
12637 (mve_vqdmullbq_n_s<mode>): Likewise.
12638 (mve_vqdmullbq_s<mode>): Likewise.
12639 (mve_vqdmulltq_n_s<mode>): Likewise.
12640 (mve_vqdmulltq_s<mode>): Likewise.
12641 (mve_vqmovnbq_<supf><mode>): Likewise.
12642 (mve_vqmovntq_<supf><mode>): Likewise.
12643 (mve_vqmovunbq_s<mode>): Likewise.
12644 (mve_vqmovuntq_s<mode>): Likewise.
12645 (mve_vrmlaldavhxq_sv4si): Likewise.
12646 (mve_vrmlsldavhq_sv4si): Likewise.
12647 (mve_vrmlsldavhxq_sv4si): Likewise.
12648 (mve_vshllbq_n_<supf><mode>): Likewise.
12649 (mve_vshlltq_n_<supf><mode>): Likewise.
12650 (mve_vsubq_f<mode>): Likewise.
12651 (mve_vmulltq_poly_p<mode>): Likewise.
12652 (mve_vmullbq_poly_p<mode>): Likewise.
12653 (mve_vrmlaldavhq_<supf>v4si): Likewise.
12655 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12656 Mihail Ionescu <mihail.ionescu@arm.com>
12657 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12659 * config/arm/arm_mve.h (vsubq_u8): Define macro.
12660 (vsubq_n_u8): Likewise.
12661 (vrmulhq_u8): Likewise.
12662 (vrhaddq_u8): Likewise.
12663 (vqsubq_u8): Likewise.
12664 (vqsubq_n_u8): Likewise.
12665 (vqaddq_u8): Likewise.
12666 (vqaddq_n_u8): Likewise.
12667 (vorrq_u8): Likewise.
12668 (vornq_u8): Likewise.
12669 (vmulq_u8): Likewise.
12670 (vmulq_n_u8): Likewise.
12671 (vmulltq_int_u8): Likewise.
12672 (vmullbq_int_u8): Likewise.
12673 (vmulhq_u8): Likewise.
12674 (vmladavq_u8): Likewise.
12675 (vminvq_u8): Likewise.
12676 (vminq_u8): Likewise.
12677 (vmaxvq_u8): Likewise.
12678 (vmaxq_u8): Likewise.
12679 (vhsubq_u8): Likewise.
12680 (vhsubq_n_u8): Likewise.
12681 (vhaddq_u8): Likewise.
12682 (vhaddq_n_u8): Likewise.
12683 (veorq_u8): Likewise.
12684 (vcmpneq_n_u8): Likewise.
12685 (vcmphiq_u8): Likewise.
12686 (vcmphiq_n_u8): Likewise.
12687 (vcmpeqq_u8): Likewise.
12688 (vcmpeqq_n_u8): Likewise.
12689 (vcmpcsq_u8): Likewise.
12690 (vcmpcsq_n_u8): Likewise.
12691 (vcaddq_rot90_u8): Likewise.
12692 (vcaddq_rot270_u8): Likewise.
12693 (vbicq_u8): Likewise.
12694 (vandq_u8): Likewise.
12695 (vaddvq_p_u8): Likewise.
12696 (vaddvaq_u8): Likewise.
12697 (vaddq_n_u8): Likewise.
12698 (vabdq_u8): Likewise.
12699 (vshlq_r_u8): Likewise.
12700 (vrshlq_u8): Likewise.
12701 (vrshlq_n_u8): Likewise.
12702 (vqshlq_u8): Likewise.
12703 (vqshlq_r_u8): Likewise.
12704 (vqrshlq_u8): Likewise.
12705 (vqrshlq_n_u8): Likewise.
12706 (vminavq_s8): Likewise.
12707 (vminaq_s8): Likewise.
12708 (vmaxavq_s8): Likewise.
12709 (vmaxaq_s8): Likewise.
12710 (vbrsrq_n_u8): Likewise.
12711 (vshlq_n_u8): Likewise.
12712 (vrshrq_n_u8): Likewise.
12713 (vqshlq_n_u8): Likewise.
12714 (vcmpneq_n_s8): Likewise.
12715 (vcmpltq_s8): Likewise.
12716 (vcmpltq_n_s8): Likewise.
12717 (vcmpleq_s8): Likewise.
12718 (vcmpleq_n_s8): Likewise.
12719 (vcmpgtq_s8): Likewise.
12720 (vcmpgtq_n_s8): Likewise.
12721 (vcmpgeq_s8): Likewise.
12722 (vcmpgeq_n_s8): Likewise.
12723 (vcmpeqq_s8): Likewise.
12724 (vcmpeqq_n_s8): Likewise.
12725 (vqshluq_n_s8): Likewise.
12726 (vaddvq_p_s8): Likewise.
12727 (vsubq_s8): Likewise.
12728 (vsubq_n_s8): Likewise.
12729 (vshlq_r_s8): Likewise.
12730 (vrshlq_s8): Likewise.
12731 (vrshlq_n_s8): Likewise.
12732 (vrmulhq_s8): Likewise.
12733 (vrhaddq_s8): Likewise.
12734 (vqsubq_s8): Likewise.
12735 (vqsubq_n_s8): Likewise.
12736 (vqshlq_s8): Likewise.
12737 (vqshlq_r_s8): Likewise.
12738 (vqrshlq_s8): Likewise.
12739 (vqrshlq_n_s8): Likewise.
12740 (vqrdmulhq_s8): Likewise.
12741 (vqrdmulhq_n_s8): Likewise.
12742 (vqdmulhq_s8): Likewise.
12743 (vqdmulhq_n_s8): Likewise.
12744 (vqaddq_s8): Likewise.
12745 (vqaddq_n_s8): Likewise.
12746 (vorrq_s8): Likewise.
12747 (vornq_s8): Likewise.
12748 (vmulq_s8): Likewise.
12749 (vmulq_n_s8): Likewise.
12750 (vmulltq_int_s8): Likewise.
12751 (vmullbq_int_s8): Likewise.
12752 (vmulhq_s8): Likewise.
12753 (vmlsdavxq_s8): Likewise.
12754 (vmlsdavq_s8): Likewise.
12755 (vmladavxq_s8): Likewise.
12756 (vmladavq_s8): Likewise.
12757 (vminvq_s8): Likewise.
12758 (vminq_s8): Likewise.
12759 (vmaxvq_s8): Likewise.
12760 (vmaxq_s8): Likewise.
12761 (vhsubq_s8): Likewise.
12762 (vhsubq_n_s8): Likewise.
12763 (vhcaddq_rot90_s8): Likewise.
12764 (vhcaddq_rot270_s8): Likewise.
12765 (vhaddq_s8): Likewise.
12766 (vhaddq_n_s8): Likewise.
12767 (veorq_s8): Likewise.
12768 (vcaddq_rot90_s8): Likewise.
12769 (vcaddq_rot270_s8): Likewise.
12770 (vbrsrq_n_s8): Likewise.
12771 (vbicq_s8): Likewise.
12772 (vandq_s8): Likewise.
12773 (vaddvaq_s8): Likewise.
12774 (vaddq_n_s8): Likewise.
12775 (vabdq_s8): Likewise.
12776 (vshlq_n_s8): Likewise.
12777 (vrshrq_n_s8): Likewise.
12778 (vqshlq_n_s8): Likewise.
12779 (vsubq_u16): Likewise.
12780 (vsubq_n_u16): Likewise.
12781 (vrmulhq_u16): Likewise.
12782 (vrhaddq_u16): Likewise.
12783 (vqsubq_u16): Likewise.
12784 (vqsubq_n_u16): Likewise.
12785 (vqaddq_u16): Likewise.
12786 (vqaddq_n_u16): Likewise.
12787 (vorrq_u16): Likewise.
12788 (vornq_u16): Likewise.
12789 (vmulq_u16): Likewise.
12790 (vmulq_n_u16): Likewise.
12791 (vmulltq_int_u16): Likewise.
12792 (vmullbq_int_u16): Likewise.
12793 (vmulhq_u16): Likewise.
12794 (vmladavq_u16): Likewise.
12795 (vminvq_u16): Likewise.
12796 (vminq_u16): Likewise.
12797 (vmaxvq_u16): Likewise.
12798 (vmaxq_u16): Likewise.
12799 (vhsubq_u16): Likewise.
12800 (vhsubq_n_u16): Likewise.
12801 (vhaddq_u16): Likewise.
12802 (vhaddq_n_u16): Likewise.
12803 (veorq_u16): Likewise.
12804 (vcmpneq_n_u16): Likewise.
12805 (vcmphiq_u16): Likewise.
12806 (vcmphiq_n_u16): Likewise.
12807 (vcmpeqq_u16): Likewise.
12808 (vcmpeqq_n_u16): Likewise.
12809 (vcmpcsq_u16): Likewise.
12810 (vcmpcsq_n_u16): Likewise.
12811 (vcaddq_rot90_u16): Likewise.
12812 (vcaddq_rot270_u16): Likewise.
12813 (vbicq_u16): Likewise.
12814 (vandq_u16): Likewise.
12815 (vaddvq_p_u16): Likewise.
12816 (vaddvaq_u16): Likewise.
12817 (vaddq_n_u16): Likewise.
12818 (vabdq_u16): Likewise.
12819 (vshlq_r_u16): Likewise.
12820 (vrshlq_u16): Likewise.
12821 (vrshlq_n_u16): Likewise.
12822 (vqshlq_u16): Likewise.
12823 (vqshlq_r_u16): Likewise.
12824 (vqrshlq_u16): Likewise.
12825 (vqrshlq_n_u16): Likewise.
12826 (vminavq_s16): Likewise.
12827 (vminaq_s16): Likewise.
12828 (vmaxavq_s16): Likewise.
12829 (vmaxaq_s16): Likewise.
12830 (vbrsrq_n_u16): Likewise.
12831 (vshlq_n_u16): Likewise.
12832 (vrshrq_n_u16): Likewise.
12833 (vqshlq_n_u16): Likewise.
12834 (vcmpneq_n_s16): Likewise.
12835 (vcmpltq_s16): Likewise.
12836 (vcmpltq_n_s16): Likewise.
12837 (vcmpleq_s16): Likewise.
12838 (vcmpleq_n_s16): Likewise.
12839 (vcmpgtq_s16): Likewise.
12840 (vcmpgtq_n_s16): Likewise.
12841 (vcmpgeq_s16): Likewise.
12842 (vcmpgeq_n_s16): Likewise.
12843 (vcmpeqq_s16): Likewise.
12844 (vcmpeqq_n_s16): Likewise.
12845 (vqshluq_n_s16): Likewise.
12846 (vaddvq_p_s16): Likewise.
12847 (vsubq_s16): Likewise.
12848 (vsubq_n_s16): Likewise.
12849 (vshlq_r_s16): Likewise.
12850 (vrshlq_s16): Likewise.
12851 (vrshlq_n_s16): Likewise.
12852 (vrmulhq_s16): Likewise.
12853 (vrhaddq_s16): Likewise.
12854 (vqsubq_s16): Likewise.
12855 (vqsubq_n_s16): Likewise.
12856 (vqshlq_s16): Likewise.
12857 (vqshlq_r_s16): Likewise.
12858 (vqrshlq_s16): Likewise.
12859 (vqrshlq_n_s16): Likewise.
12860 (vqrdmulhq_s16): Likewise.
12861 (vqrdmulhq_n_s16): Likewise.
12862 (vqdmulhq_s16): Likewise.
12863 (vqdmulhq_n_s16): Likewise.
12864 (vqaddq_s16): Likewise.
12865 (vqaddq_n_s16): Likewise.
12866 (vorrq_s16): Likewise.
12867 (vornq_s16): Likewise.
12868 (vmulq_s16): Likewise.
12869 (vmulq_n_s16): Likewise.
12870 (vmulltq_int_s16): Likewise.
12871 (vmullbq_int_s16): Likewise.
12872 (vmulhq_s16): Likewise.
12873 (vmlsdavxq_s16): Likewise.
12874 (vmlsdavq_s16): Likewise.
12875 (vmladavxq_s16): Likewise.
12876 (vmladavq_s16): Likewise.
12877 (vminvq_s16): Likewise.
12878 (vminq_s16): Likewise.
12879 (vmaxvq_s16): Likewise.
12880 (vmaxq_s16): Likewise.
12881 (vhsubq_s16): Likewise.
12882 (vhsubq_n_s16): Likewise.
12883 (vhcaddq_rot90_s16): Likewise.
12884 (vhcaddq_rot270_s16): Likewise.
12885 (vhaddq_s16): Likewise.
12886 (vhaddq_n_s16): Likewise.
12887 (veorq_s16): Likewise.
12888 (vcaddq_rot90_s16): Likewise.
12889 (vcaddq_rot270_s16): Likewise.
12890 (vbrsrq_n_s16): Likewise.
12891 (vbicq_s16): Likewise.
12892 (vandq_s16): Likewise.
12893 (vaddvaq_s16): Likewise.
12894 (vaddq_n_s16): Likewise.
12895 (vabdq_s16): Likewise.
12896 (vshlq_n_s16): Likewise.
12897 (vrshrq_n_s16): Likewise.
12898 (vqshlq_n_s16): Likewise.
12899 (vsubq_u32): Likewise.
12900 (vsubq_n_u32): Likewise.
12901 (vrmulhq_u32): Likewise.
12902 (vrhaddq_u32): Likewise.
12903 (vqsubq_u32): Likewise.
12904 (vqsubq_n_u32): Likewise.
12905 (vqaddq_u32): Likewise.
12906 (vqaddq_n_u32): Likewise.
12907 (vorrq_u32): Likewise.
12908 (vornq_u32): Likewise.
12909 (vmulq_u32): Likewise.
12910 (vmulq_n_u32): Likewise.
12911 (vmulltq_int_u32): Likewise.
12912 (vmullbq_int_u32): Likewise.
12913 (vmulhq_u32): Likewise.
12914 (vmladavq_u32): Likewise.
12915 (vminvq_u32): Likewise.
12916 (vminq_u32): Likewise.
12917 (vmaxvq_u32): Likewise.
12918 (vmaxq_u32): Likewise.
12919 (vhsubq_u32): Likewise.
12920 (vhsubq_n_u32): Likewise.
12921 (vhaddq_u32): Likewise.
12922 (vhaddq_n_u32): Likewise.
12923 (veorq_u32): Likewise.
12924 (vcmpneq_n_u32): Likewise.
12925 (vcmphiq_u32): Likewise.
12926 (vcmphiq_n_u32): Likewise.
12927 (vcmpeqq_u32): Likewise.
12928 (vcmpeqq_n_u32): Likewise.
12929 (vcmpcsq_u32): Likewise.
12930 (vcmpcsq_n_u32): Likewise.
12931 (vcaddq_rot90_u32): Likewise.
12932 (vcaddq_rot270_u32): Likewise.
12933 (vbicq_u32): Likewise.
12934 (vandq_u32): Likewise.
12935 (vaddvq_p_u32): Likewise.
12936 (vaddvaq_u32): Likewise.
12937 (vaddq_n_u32): Likewise.
12938 (vabdq_u32): Likewise.
12939 (vshlq_r_u32): Likewise.
12940 (vrshlq_u32): Likewise.
12941 (vrshlq_n_u32): Likewise.
12942 (vqshlq_u32): Likewise.
12943 (vqshlq_r_u32): Likewise.
12944 (vqrshlq_u32): Likewise.
12945 (vqrshlq_n_u32): Likewise.
12946 (vminavq_s32): Likewise.
12947 (vminaq_s32): Likewise.
12948 (vmaxavq_s32): Likewise.
12949 (vmaxaq_s32): Likewise.
12950 (vbrsrq_n_u32): Likewise.
12951 (vshlq_n_u32): Likewise.
12952 (vrshrq_n_u32): Likewise.
12953 (vqshlq_n_u32): Likewise.
12954 (vcmpneq_n_s32): Likewise.
12955 (vcmpltq_s32): Likewise.
12956 (vcmpltq_n_s32): Likewise.
12957 (vcmpleq_s32): Likewise.
12958 (vcmpleq_n_s32): Likewise.
12959 (vcmpgtq_s32): Likewise.
12960 (vcmpgtq_n_s32): Likewise.
12961 (vcmpgeq_s32): Likewise.
12962 (vcmpgeq_n_s32): Likewise.
12963 (vcmpeqq_s32): Likewise.
12964 (vcmpeqq_n_s32): Likewise.
12965 (vqshluq_n_s32): Likewise.
12966 (vaddvq_p_s32): Likewise.
12967 (vsubq_s32): Likewise.
12968 (vsubq_n_s32): Likewise.
12969 (vshlq_r_s32): Likewise.
12970 (vrshlq_s32): Likewise.
12971 (vrshlq_n_s32): Likewise.
12972 (vrmulhq_s32): Likewise.
12973 (vrhaddq_s32): Likewise.
12974 (vqsubq_s32): Likewise.
12975 (vqsubq_n_s32): Likewise.
12976 (vqshlq_s32): Likewise.
12977 (vqshlq_r_s32): Likewise.
12978 (vqrshlq_s32): Likewise.
12979 (vqrshlq_n_s32): Likewise.
12980 (vqrdmulhq_s32): Likewise.
12981 (vqrdmulhq_n_s32): Likewise.
12982 (vqdmulhq_s32): Likewise.
12983 (vqdmulhq_n_s32): Likewise.
12984 (vqaddq_s32): Likewise.
12985 (vqaddq_n_s32): Likewise.
12986 (vorrq_s32): Likewise.
12987 (vornq_s32): Likewise.
12988 (vmulq_s32): Likewise.
12989 (vmulq_n_s32): Likewise.
12990 (vmulltq_int_s32): Likewise.
12991 (vmullbq_int_s32): Likewise.
12992 (vmulhq_s32): Likewise.
12993 (vmlsdavxq_s32): Likewise.
12994 (vmlsdavq_s32): Likewise.
12995 (vmladavxq_s32): Likewise.
12996 (vmladavq_s32): Likewise.
12997 (vminvq_s32): Likewise.
12998 (vminq_s32): Likewise.
12999 (vmaxvq_s32): Likewise.
13000 (vmaxq_s32): Likewise.
13001 (vhsubq_s32): Likewise.
13002 (vhsubq_n_s32): Likewise.
13003 (vhcaddq_rot90_s32): Likewise.
13004 (vhcaddq_rot270_s32): Likewise.
13005 (vhaddq_s32): Likewise.
13006 (vhaddq_n_s32): Likewise.
13007 (veorq_s32): Likewise.
13008 (vcaddq_rot90_s32): Likewise.
13009 (vcaddq_rot270_s32): Likewise.
13010 (vbrsrq_n_s32): Likewise.
13011 (vbicq_s32): Likewise.
13012 (vandq_s32): Likewise.
13013 (vaddvaq_s32): Likewise.
13014 (vaddq_n_s32): Likewise.
13015 (vabdq_s32): Likewise.
13016 (vshlq_n_s32): Likewise.
13017 (vrshrq_n_s32): Likewise.
13018 (vqshlq_n_s32): Likewise.
13019 (__arm_vsubq_u8): Define intrinsic.
13020 (__arm_vsubq_n_u8): Likewise.
13021 (__arm_vrmulhq_u8): Likewise.
13022 (__arm_vrhaddq_u8): Likewise.
13023 (__arm_vqsubq_u8): Likewise.
13024 (__arm_vqsubq_n_u8): Likewise.
13025 (__arm_vqaddq_u8): Likewise.
13026 (__arm_vqaddq_n_u8): Likewise.
13027 (__arm_vorrq_u8): Likewise.
13028 (__arm_vornq_u8): Likewise.
13029 (__arm_vmulq_u8): Likewise.
13030 (__arm_vmulq_n_u8): Likewise.
13031 (__arm_vmulltq_int_u8): Likewise.
13032 (__arm_vmullbq_int_u8): Likewise.
13033 (__arm_vmulhq_u8): Likewise.
13034 (__arm_vmladavq_u8): Likewise.
13035 (__arm_vminvq_u8): Likewise.
13036 (__arm_vminq_u8): Likewise.
13037 (__arm_vmaxvq_u8): Likewise.
13038 (__arm_vmaxq_u8): Likewise.
13039 (__arm_vhsubq_u8): Likewise.
13040 (__arm_vhsubq_n_u8): Likewise.
13041 (__arm_vhaddq_u8): Likewise.
13042 (__arm_vhaddq_n_u8): Likewise.
13043 (__arm_veorq_u8): Likewise.
13044 (__arm_vcmpneq_n_u8): Likewise.
13045 (__arm_vcmphiq_u8): Likewise.
13046 (__arm_vcmphiq_n_u8): Likewise.
13047 (__arm_vcmpeqq_u8): Likewise.
13048 (__arm_vcmpeqq_n_u8): Likewise.
13049 (__arm_vcmpcsq_u8): Likewise.
13050 (__arm_vcmpcsq_n_u8): Likewise.
13051 (__arm_vcaddq_rot90_u8): Likewise.
13052 (__arm_vcaddq_rot270_u8): Likewise.
13053 (__arm_vbicq_u8): Likewise.
13054 (__arm_vandq_u8): Likewise.
13055 (__arm_vaddvq_p_u8): Likewise.
13056 (__arm_vaddvaq_u8): Likewise.
13057 (__arm_vaddq_n_u8): Likewise.
13058 (__arm_vabdq_u8): Likewise.
13059 (__arm_vshlq_r_u8): Likewise.
13060 (__arm_vrshlq_u8): Likewise.
13061 (__arm_vrshlq_n_u8): Likewise.
13062 (__arm_vqshlq_u8): Likewise.
13063 (__arm_vqshlq_r_u8): Likewise.
13064 (__arm_vqrshlq_u8): Likewise.
13065 (__arm_vqrshlq_n_u8): Likewise.
13066 (__arm_vminavq_s8): Likewise.
13067 (__arm_vminaq_s8): Likewise.
13068 (__arm_vmaxavq_s8): Likewise.
13069 (__arm_vmaxaq_s8): Likewise.
13070 (__arm_vbrsrq_n_u8): Likewise.
13071 (__arm_vshlq_n_u8): Likewise.
13072 (__arm_vrshrq_n_u8): Likewise.
13073 (__arm_vqshlq_n_u8): Likewise.
13074 (__arm_vcmpneq_n_s8): Likewise.
13075 (__arm_vcmpltq_s8): Likewise.
13076 (__arm_vcmpltq_n_s8): Likewise.
13077 (__arm_vcmpleq_s8): Likewise.
13078 (__arm_vcmpleq_n_s8): Likewise.
13079 (__arm_vcmpgtq_s8): Likewise.
13080 (__arm_vcmpgtq_n_s8): Likewise.
13081 (__arm_vcmpgeq_s8): Likewise.
13082 (__arm_vcmpgeq_n_s8): Likewise.
13083 (__arm_vcmpeqq_s8): Likewise.
13084 (__arm_vcmpeqq_n_s8): Likewise.
13085 (__arm_vqshluq_n_s8): Likewise.
13086 (__arm_vaddvq_p_s8): Likewise.
13087 (__arm_vsubq_s8): Likewise.
13088 (__arm_vsubq_n_s8): Likewise.
13089 (__arm_vshlq_r_s8): Likewise.
13090 (__arm_vrshlq_s8): Likewise.
13091 (__arm_vrshlq_n_s8): Likewise.
13092 (__arm_vrmulhq_s8): Likewise.
13093 (__arm_vrhaddq_s8): Likewise.
13094 (__arm_vqsubq_s8): Likewise.
13095 (__arm_vqsubq_n_s8): Likewise.
13096 (__arm_vqshlq_s8): Likewise.
13097 (__arm_vqshlq_r_s8): Likewise.
13098 (__arm_vqrshlq_s8): Likewise.
13099 (__arm_vqrshlq_n_s8): Likewise.
13100 (__arm_vqrdmulhq_s8): Likewise.
13101 (__arm_vqrdmulhq_n_s8): Likewise.
13102 (__arm_vqdmulhq_s8): Likewise.
13103 (__arm_vqdmulhq_n_s8): Likewise.
13104 (__arm_vqaddq_s8): Likewise.
13105 (__arm_vqaddq_n_s8): Likewise.
13106 (__arm_vorrq_s8): Likewise.
13107 (__arm_vornq_s8): Likewise.
13108 (__arm_vmulq_s8): Likewise.
13109 (__arm_vmulq_n_s8): Likewise.
13110 (__arm_vmulltq_int_s8): Likewise.
13111 (__arm_vmullbq_int_s8): Likewise.
13112 (__arm_vmulhq_s8): Likewise.
13113 (__arm_vmlsdavxq_s8): Likewise.
13114 (__arm_vmlsdavq_s8): Likewise.
13115 (__arm_vmladavxq_s8): Likewise.
13116 (__arm_vmladavq_s8): Likewise.
13117 (__arm_vminvq_s8): Likewise.
13118 (__arm_vminq_s8): Likewise.
13119 (__arm_vmaxvq_s8): Likewise.
13120 (__arm_vmaxq_s8): Likewise.
13121 (__arm_vhsubq_s8): Likewise.
13122 (__arm_vhsubq_n_s8): Likewise.
13123 (__arm_vhcaddq_rot90_s8): Likewise.
13124 (__arm_vhcaddq_rot270_s8): Likewise.
13125 (__arm_vhaddq_s8): Likewise.
13126 (__arm_vhaddq_n_s8): Likewise.
13127 (__arm_veorq_s8): Likewise.
13128 (__arm_vcaddq_rot90_s8): Likewise.
13129 (__arm_vcaddq_rot270_s8): Likewise.
13130 (__arm_vbrsrq_n_s8): Likewise.
13131 (__arm_vbicq_s8): Likewise.
13132 (__arm_vandq_s8): Likewise.
13133 (__arm_vaddvaq_s8): Likewise.
13134 (__arm_vaddq_n_s8): Likewise.
13135 (__arm_vabdq_s8): Likewise.
13136 (__arm_vshlq_n_s8): Likewise.
13137 (__arm_vrshrq_n_s8): Likewise.
13138 (__arm_vqshlq_n_s8): Likewise.
13139 (__arm_vsubq_u16): Likewise.
13140 (__arm_vsubq_n_u16): Likewise.
13141 (__arm_vrmulhq_u16): Likewise.
13142 (__arm_vrhaddq_u16): Likewise.
13143 (__arm_vqsubq_u16): Likewise.
13144 (__arm_vqsubq_n_u16): Likewise.
13145 (__arm_vqaddq_u16): Likewise.
13146 (__arm_vqaddq_n_u16): Likewise.
13147 (__arm_vorrq_u16): Likewise.
13148 (__arm_vornq_u16): Likewise.
13149 (__arm_vmulq_u16): Likewise.
13150 (__arm_vmulq_n_u16): Likewise.
13151 (__arm_vmulltq_int_u16): Likewise.
13152 (__arm_vmullbq_int_u16): Likewise.
13153 (__arm_vmulhq_u16): Likewise.
13154 (__arm_vmladavq_u16): Likewise.
13155 (__arm_vminvq_u16): Likewise.
13156 (__arm_vminq_u16): Likewise.
13157 (__arm_vmaxvq_u16): Likewise.
13158 (__arm_vmaxq_u16): Likewise.
13159 (__arm_vhsubq_u16): Likewise.
13160 (__arm_vhsubq_n_u16): Likewise.
13161 (__arm_vhaddq_u16): Likewise.
13162 (__arm_vhaddq_n_u16): Likewise.
13163 (__arm_veorq_u16): Likewise.
13164 (__arm_vcmpneq_n_u16): Likewise.
13165 (__arm_vcmphiq_u16): Likewise.
13166 (__arm_vcmphiq_n_u16): Likewise.
13167 (__arm_vcmpeqq_u16): Likewise.
13168 (__arm_vcmpeqq_n_u16): Likewise.
13169 (__arm_vcmpcsq_u16): Likewise.
13170 (__arm_vcmpcsq_n_u16): Likewise.
13171 (__arm_vcaddq_rot90_u16): Likewise.
13172 (__arm_vcaddq_rot270_u16): Likewise.
13173 (__arm_vbicq_u16): Likewise.
13174 (__arm_vandq_u16): Likewise.
13175 (__arm_vaddvq_p_u16): Likewise.
13176 (__arm_vaddvaq_u16): Likewise.
13177 (__arm_vaddq_n_u16): Likewise.
13178 (__arm_vabdq_u16): Likewise.
13179 (__arm_vshlq_r_u16): Likewise.
13180 (__arm_vrshlq_u16): Likewise.
13181 (__arm_vrshlq_n_u16): Likewise.
13182 (__arm_vqshlq_u16): Likewise.
13183 (__arm_vqshlq_r_u16): Likewise.
13184 (__arm_vqrshlq_u16): Likewise.
13185 (__arm_vqrshlq_n_u16): Likewise.
13186 (__arm_vminavq_s16): Likewise.
13187 (__arm_vminaq_s16): Likewise.
13188 (__arm_vmaxavq_s16): Likewise.
13189 (__arm_vmaxaq_s16): Likewise.
13190 (__arm_vbrsrq_n_u16): Likewise.
13191 (__arm_vshlq_n_u16): Likewise.
13192 (__arm_vrshrq_n_u16): Likewise.
13193 (__arm_vqshlq_n_u16): Likewise.
13194 (__arm_vcmpneq_n_s16): Likewise.
13195 (__arm_vcmpltq_s16): Likewise.
13196 (__arm_vcmpltq_n_s16): Likewise.
13197 (__arm_vcmpleq_s16): Likewise.
13198 (__arm_vcmpleq_n_s16): Likewise.
13199 (__arm_vcmpgtq_s16): Likewise.
13200 (__arm_vcmpgtq_n_s16): Likewise.
13201 (__arm_vcmpgeq_s16): Likewise.
13202 (__arm_vcmpgeq_n_s16): Likewise.
13203 (__arm_vcmpeqq_s16): Likewise.
13204 (__arm_vcmpeqq_n_s16): Likewise.
13205 (__arm_vqshluq_n_s16): Likewise.
13206 (__arm_vaddvq_p_s16): Likewise.
13207 (__arm_vsubq_s16): Likewise.
13208 (__arm_vsubq_n_s16): Likewise.
13209 (__arm_vshlq_r_s16): Likewise.
13210 (__arm_vrshlq_s16): Likewise.
13211 (__arm_vrshlq_n_s16): Likewise.
13212 (__arm_vrmulhq_s16): Likewise.
13213 (__arm_vrhaddq_s16): Likewise.
13214 (__arm_vqsubq_s16): Likewise.
13215 (__arm_vqsubq_n_s16): Likewise.
13216 (__arm_vqshlq_s16): Likewise.
13217 (__arm_vqshlq_r_s16): Likewise.
13218 (__arm_vqrshlq_s16): Likewise.
13219 (__arm_vqrshlq_n_s16): Likewise.
13220 (__arm_vqrdmulhq_s16): Likewise.
13221 (__arm_vqrdmulhq_n_s16): Likewise.
13222 (__arm_vqdmulhq_s16): Likewise.
13223 (__arm_vqdmulhq_n_s16): Likewise.
13224 (__arm_vqaddq_s16): Likewise.
13225 (__arm_vqaddq_n_s16): Likewise.
13226 (__arm_vorrq_s16): Likewise.
13227 (__arm_vornq_s16): Likewise.
13228 (__arm_vmulq_s16): Likewise.
13229 (__arm_vmulq_n_s16): Likewise.
13230 (__arm_vmulltq_int_s16): Likewise.
13231 (__arm_vmullbq_int_s16): Likewise.
13232 (__arm_vmulhq_s16): Likewise.
13233 (__arm_vmlsdavxq_s16): Likewise.
13234 (__arm_vmlsdavq_s16): Likewise.
13235 (__arm_vmladavxq_s16): Likewise.
13236 (__arm_vmladavq_s16): Likewise.
13237 (__arm_vminvq_s16): Likewise.
13238 (__arm_vminq_s16): Likewise.
13239 (__arm_vmaxvq_s16): Likewise.
13240 (__arm_vmaxq_s16): Likewise.
13241 (__arm_vhsubq_s16): Likewise.
13242 (__arm_vhsubq_n_s16): Likewise.
13243 (__arm_vhcaddq_rot90_s16): Likewise.
13244 (__arm_vhcaddq_rot270_s16): Likewise.
13245 (__arm_vhaddq_s16): Likewise.
13246 (__arm_vhaddq_n_s16): Likewise.
13247 (__arm_veorq_s16): Likewise.
13248 (__arm_vcaddq_rot90_s16): Likewise.
13249 (__arm_vcaddq_rot270_s16): Likewise.
13250 (__arm_vbrsrq_n_s16): Likewise.
13251 (__arm_vbicq_s16): Likewise.
13252 (__arm_vandq_s16): Likewise.
13253 (__arm_vaddvaq_s16): Likewise.
13254 (__arm_vaddq_n_s16): Likewise.
13255 (__arm_vabdq_s16): Likewise.
13256 (__arm_vshlq_n_s16): Likewise.
13257 (__arm_vrshrq_n_s16): Likewise.
13258 (__arm_vqshlq_n_s16): Likewise.
13259 (__arm_vsubq_u32): Likewise.
13260 (__arm_vsubq_n_u32): Likewise.
13261 (__arm_vrmulhq_u32): Likewise.
13262 (__arm_vrhaddq_u32): Likewise.
13263 (__arm_vqsubq_u32): Likewise.
13264 (__arm_vqsubq_n_u32): Likewise.
13265 (__arm_vqaddq_u32): Likewise.
13266 (__arm_vqaddq_n_u32): Likewise.
13267 (__arm_vorrq_u32): Likewise.
13268 (__arm_vornq_u32): Likewise.
13269 (__arm_vmulq_u32): Likewise.
13270 (__arm_vmulq_n_u32): Likewise.
13271 (__arm_vmulltq_int_u32): Likewise.
13272 (__arm_vmullbq_int_u32): Likewise.
13273 (__arm_vmulhq_u32): Likewise.
13274 (__arm_vmladavq_u32): Likewise.
13275 (__arm_vminvq_u32): Likewise.
13276 (__arm_vminq_u32): Likewise.
13277 (__arm_vmaxvq_u32): Likewise.
13278 (__arm_vmaxq_u32): Likewise.
13279 (__arm_vhsubq_u32): Likewise.
13280 (__arm_vhsubq_n_u32): Likewise.
13281 (__arm_vhaddq_u32): Likewise.
13282 (__arm_vhaddq_n_u32): Likewise.
13283 (__arm_veorq_u32): Likewise.
13284 (__arm_vcmpneq_n_u32): Likewise.
13285 (__arm_vcmphiq_u32): Likewise.
13286 (__arm_vcmphiq_n_u32): Likewise.
13287 (__arm_vcmpeqq_u32): Likewise.
13288 (__arm_vcmpeqq_n_u32): Likewise.
13289 (__arm_vcmpcsq_u32): Likewise.
13290 (__arm_vcmpcsq_n_u32): Likewise.
13291 (__arm_vcaddq_rot90_u32): Likewise.
13292 (__arm_vcaddq_rot270_u32): Likewise.
13293 (__arm_vbicq_u32): Likewise.
13294 (__arm_vandq_u32): Likewise.
13295 (__arm_vaddvq_p_u32): Likewise.
13296 (__arm_vaddvaq_u32): Likewise.
13297 (__arm_vaddq_n_u32): Likewise.
13298 (__arm_vabdq_u32): Likewise.
13299 (__arm_vshlq_r_u32): Likewise.
13300 (__arm_vrshlq_u32): Likewise.
13301 (__arm_vrshlq_n_u32): Likewise.
13302 (__arm_vqshlq_u32): Likewise.
13303 (__arm_vqshlq_r_u32): Likewise.
13304 (__arm_vqrshlq_u32): Likewise.
13305 (__arm_vqrshlq_n_u32): Likewise.
13306 (__arm_vminavq_s32): Likewise.
13307 (__arm_vminaq_s32): Likewise.
13308 (__arm_vmaxavq_s32): Likewise.
13309 (__arm_vmaxaq_s32): Likewise.
13310 (__arm_vbrsrq_n_u32): Likewise.
13311 (__arm_vshlq_n_u32): Likewise.
13312 (__arm_vrshrq_n_u32): Likewise.
13313 (__arm_vqshlq_n_u32): Likewise.
13314 (__arm_vcmpneq_n_s32): Likewise.
13315 (__arm_vcmpltq_s32): Likewise.
13316 (__arm_vcmpltq_n_s32): Likewise.
13317 (__arm_vcmpleq_s32): Likewise.
13318 (__arm_vcmpleq_n_s32): Likewise.
13319 (__arm_vcmpgtq_s32): Likewise.
13320 (__arm_vcmpgtq_n_s32): Likewise.
13321 (__arm_vcmpgeq_s32): Likewise.
13322 (__arm_vcmpgeq_n_s32): Likewise.
13323 (__arm_vcmpeqq_s32): Likewise.
13324 (__arm_vcmpeqq_n_s32): Likewise.
13325 (__arm_vqshluq_n_s32): Likewise.
13326 (__arm_vaddvq_p_s32): Likewise.
13327 (__arm_vsubq_s32): Likewise.
13328 (__arm_vsubq_n_s32): Likewise.
13329 (__arm_vshlq_r_s32): Likewise.
13330 (__arm_vrshlq_s32): Likewise.
13331 (__arm_vrshlq_n_s32): Likewise.
13332 (__arm_vrmulhq_s32): Likewise.
13333 (__arm_vrhaddq_s32): Likewise.
13334 (__arm_vqsubq_s32): Likewise.
13335 (__arm_vqsubq_n_s32): Likewise.
13336 (__arm_vqshlq_s32): Likewise.
13337 (__arm_vqshlq_r_s32): Likewise.
13338 (__arm_vqrshlq_s32): Likewise.
13339 (__arm_vqrshlq_n_s32): Likewise.
13340 (__arm_vqrdmulhq_s32): Likewise.
13341 (__arm_vqrdmulhq_n_s32): Likewise.
13342 (__arm_vqdmulhq_s32): Likewise.
13343 (__arm_vqdmulhq_n_s32): Likewise.
13344 (__arm_vqaddq_s32): Likewise.
13345 (__arm_vqaddq_n_s32): Likewise.
13346 (__arm_vorrq_s32): Likewise.
13347 (__arm_vornq_s32): Likewise.
13348 (__arm_vmulq_s32): Likewise.
13349 (__arm_vmulq_n_s32): Likewise.
13350 (__arm_vmulltq_int_s32): Likewise.
13351 (__arm_vmullbq_int_s32): Likewise.
13352 (__arm_vmulhq_s32): Likewise.
13353 (__arm_vmlsdavxq_s32): Likewise.
13354 (__arm_vmlsdavq_s32): Likewise.
13355 (__arm_vmladavxq_s32): Likewise.
13356 (__arm_vmladavq_s32): Likewise.
13357 (__arm_vminvq_s32): Likewise.
13358 (__arm_vminq_s32): Likewise.
13359 (__arm_vmaxvq_s32): Likewise.
13360 (__arm_vmaxq_s32): Likewise.
13361 (__arm_vhsubq_s32): Likewise.
13362 (__arm_vhsubq_n_s32): Likewise.
13363 (__arm_vhcaddq_rot90_s32): Likewise.
13364 (__arm_vhcaddq_rot270_s32): Likewise.
13365 (__arm_vhaddq_s32): Likewise.
13366 (__arm_vhaddq_n_s32): Likewise.
13367 (__arm_veorq_s32): Likewise.
13368 (__arm_vcaddq_rot90_s32): Likewise.
13369 (__arm_vcaddq_rot270_s32): Likewise.
13370 (__arm_vbrsrq_n_s32): Likewise.
13371 (__arm_vbicq_s32): Likewise.
13372 (__arm_vandq_s32): Likewise.
13373 (__arm_vaddvaq_s32): Likewise.
13374 (__arm_vaddq_n_s32): Likewise.
13375 (__arm_vabdq_s32): Likewise.
13376 (__arm_vshlq_n_s32): Likewise.
13377 (__arm_vrshrq_n_s32): Likewise.
13378 (__arm_vqshlq_n_s32): Likewise.
13379 (vsubq): Define polymorphic variant.
13380 (vsubq_n): Likewise.
13381 (vshlq_r): Likewise.
13382 (vrshlq_n): Likewise.
13383 (vrshlq): Likewise.
13384 (vrmulhq): Likewise.
13385 (vrhaddq): Likewise.
13386 (vqsubq_n): Likewise.
13387 (vqsubq): Likewise.
13388 (vqshlq): Likewise.
13389 (vqshlq_r): Likewise.
13390 (vqshluq): Likewise.
13391 (vrshrq_n): Likewise.
13392 (vshlq_n): Likewise.
13393 (vqshluq_n): Likewise.
13394 (vqshlq_n): Likewise.
13395 (vqrshlq_n): Likewise.
13396 (vqrshlq): Likewise.
13397 (vqrdmulhq_n): Likewise.
13398 (vqrdmulhq): Likewise.
13399 (vqdmulhq_n): Likewise.
13400 (vqdmulhq): Likewise.
13401 (vqaddq_n): Likewise.
13402 (vqaddq): Likewise.
13403 (vorrq_n): Likewise.
13406 (vmulq_n): Likewise.
13408 (vmulltq_int): Likewise.
13409 (vmullbq_int): Likewise.
13410 (vmulhq): Likewise.
13412 (vminaq): Likewise.
13414 (vmaxaq): Likewise.
13415 (vhsubq_n): Likewise.
13416 (vhsubq): Likewise.
13417 (vhcaddq_rot90): Likewise.
13418 (vhcaddq_rot270): Likewise.
13419 (vhaddq_n): Likewise.
13420 (vhaddq): Likewise.
13422 (vcaddq_rot90): Likewise.
13423 (vcaddq_rot270): Likewise.
13424 (vbrsrq_n): Likewise.
13425 (vbicq_n): Likewise.
13428 (vaddq_n): Likewise.
13431 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13432 (BINOP_NONE_NONE_NONE): Likewise.
13433 (BINOP_NONE_NONE_UNONE): Likewise.
13434 (BINOP_UNONE_NONE_IMM): Likewise.
13435 (BINOP_UNONE_NONE_NONE): Likewise.
13436 (BINOP_UNONE_UNONE_IMM): Likewise.
13437 (BINOP_UNONE_UNONE_NONE): Likewise.
13438 (BINOP_UNONE_UNONE_UNONE): Likewise.
13439 * config/arm/constraints.md (Ra): Define constraint to check constant is
13440 in the range of 0 to 7.
13441 (Rg): Define constriant to check the constant is one among 1, 2, 4
13443 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
13444 (mve_vaddq_n_<supf>): Likewise.
13445 (mve_vaddvaq_<supf>): Likewise.
13446 (mve_vaddvq_p_<supf>): Likewise.
13447 (mve_vandq_<supf>): Likewise.
13448 (mve_vbicq_<supf>): Likewise.
13449 (mve_vbrsrq_n_<supf>): Likewise.
13450 (mve_vcaddq_rot270_<supf>): Likewise.
13451 (mve_vcaddq_rot90_<supf>): Likewise.
13452 (mve_vcmpcsq_n_u): Likewise.
13453 (mve_vcmpcsq_u): Likewise.
13454 (mve_vcmpeqq_n_<supf>): Likewise.
13455 (mve_vcmpeqq_<supf>): Likewise.
13456 (mve_vcmpgeq_n_s): Likewise.
13457 (mve_vcmpgeq_s): Likewise.
13458 (mve_vcmpgtq_n_s): Likewise.
13459 (mve_vcmpgtq_s): Likewise.
13460 (mve_vcmphiq_n_u): Likewise.
13461 (mve_vcmphiq_u): Likewise.
13462 (mve_vcmpleq_n_s): Likewise.
13463 (mve_vcmpleq_s): Likewise.
13464 (mve_vcmpltq_n_s): Likewise.
13465 (mve_vcmpltq_s): Likewise.
13466 (mve_vcmpneq_n_<supf>): Likewise.
13467 (mve_vddupq_n_u): Likewise.
13468 (mve_veorq_<supf>): Likewise.
13469 (mve_vhaddq_n_<supf>): Likewise.
13470 (mve_vhaddq_<supf>): Likewise.
13471 (mve_vhcaddq_rot270_s): Likewise.
13472 (mve_vhcaddq_rot90_s): Likewise.
13473 (mve_vhsubq_n_<supf>): Likewise.
13474 (mve_vhsubq_<supf>): Likewise.
13475 (mve_vidupq_n_u): Likewise.
13476 (mve_vmaxaq_s): Likewise.
13477 (mve_vmaxavq_s): Likewise.
13478 (mve_vmaxq_<supf>): Likewise.
13479 (mve_vmaxvq_<supf>): Likewise.
13480 (mve_vminaq_s): Likewise.
13481 (mve_vminavq_s): Likewise.
13482 (mve_vminq_<supf>): Likewise.
13483 (mve_vminvq_<supf>): Likewise.
13484 (mve_vmladavq_<supf>): Likewise.
13485 (mve_vmladavxq_s): Likewise.
13486 (mve_vmlsdavq_s): Likewise.
13487 (mve_vmlsdavxq_s): Likewise.
13488 (mve_vmulhq_<supf>): Likewise.
13489 (mve_vmullbq_int_<supf>): Likewise.
13490 (mve_vmulltq_int_<supf>): Likewise.
13491 (mve_vmulq_n_<supf>): Likewise.
13492 (mve_vmulq_<supf>): Likewise.
13493 (mve_vornq_<supf>): Likewise.
13494 (mve_vorrq_<supf>): Likewise.
13495 (mve_vqaddq_n_<supf>): Likewise.
13496 (mve_vqaddq_<supf>): Likewise.
13497 (mve_vqdmulhq_n_s): Likewise.
13498 (mve_vqdmulhq_s): Likewise.
13499 (mve_vqrdmulhq_n_s): Likewise.
13500 (mve_vqrdmulhq_s): Likewise.
13501 (mve_vqrshlq_n_<supf>): Likewise.
13502 (mve_vqrshlq_<supf>): Likewise.
13503 (mve_vqshlq_n_<supf>): Likewise.
13504 (mve_vqshlq_r_<supf>): Likewise.
13505 (mve_vqshlq_<supf>): Likewise.
13506 (mve_vqshluq_n_s): Likewise.
13507 (mve_vqsubq_n_<supf>): Likewise.
13508 (mve_vqsubq_<supf>): Likewise.
13509 (mve_vrhaddq_<supf>): Likewise.
13510 (mve_vrmulhq_<supf>): Likewise.
13511 (mve_vrshlq_n_<supf>): Likewise.
13512 (mve_vrshlq_<supf>): Likewise.
13513 (mve_vrshrq_n_<supf>): Likewise.
13514 (mve_vshlq_n_<supf>): Likewise.
13515 (mve_vshlq_r_<supf>): Likewise.
13516 (mve_vsubq_n_<supf>): Likewise.
13517 (mve_vsubq_<supf>): Likewise.
13518 * config/arm/predicates.md (mve_imm_7): Define predicate to check
13519 the matching constraint Ra.
13520 (mve_imm_selective_upto_8): Define predicate to check the matching
13523 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13524 Mihail Ionescu <mihail.ionescu@arm.com>
13525 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13527 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
13528 qualifier for binary operands.
13529 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13530 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
13531 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
13532 (vaddlvq_p_u32): Likewise.
13533 (vcmpneq_s8): Likewise.
13534 (vcmpneq_s16): Likewise.
13535 (vcmpneq_s32): Likewise.
13536 (vcmpneq_u8): Likewise.
13537 (vcmpneq_u16): Likewise.
13538 (vcmpneq_u32): Likewise.
13539 (vshlq_s8): Likewise.
13540 (vshlq_s16): Likewise.
13541 (vshlq_s32): Likewise.
13542 (vshlq_u8): Likewise.
13543 (vshlq_u16): Likewise.
13544 (vshlq_u32): Likewise.
13545 (__arm_vaddlvq_p_s32): Define intrinsic.
13546 (__arm_vaddlvq_p_u32): Likewise.
13547 (__arm_vcmpneq_s8): Likewise.
13548 (__arm_vcmpneq_s16): Likewise.
13549 (__arm_vcmpneq_s32): Likewise.
13550 (__arm_vcmpneq_u8): Likewise.
13551 (__arm_vcmpneq_u16): Likewise.
13552 (__arm_vcmpneq_u32): Likewise.
13553 (__arm_vshlq_s8): Likewise.
13554 (__arm_vshlq_s16): Likewise.
13555 (__arm_vshlq_s32): Likewise.
13556 (__arm_vshlq_u8): Likewise.
13557 (__arm_vshlq_u16): Likewise.
13558 (__arm_vshlq_u32): Likewise.
13559 (vaddlvq_p): Define polymorphic variant.
13560 (vcmpneq): Likewise.
13562 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
13564 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
13565 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
13566 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
13567 (mve_vcmpneq_<supf><mode>): Likewise.
13568 (mve_vshlq_<supf><mode>): Likewise.
13570 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13571 Mihail Ionescu <mihail.ionescu@arm.com>
13572 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13574 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
13575 qualifier for binary operands.
13576 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13577 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13578 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
13579 (vcvtq_n_s32_f32): Likewise.
13580 (vcvtq_n_u16_f16): Likewise.
13581 (vcvtq_n_u32_f32): Likewise.
13582 (vcreateq_u8): Likewise.
13583 (vcreateq_u16): Likewise.
13584 (vcreateq_u32): Likewise.
13585 (vcreateq_u64): Likewise.
13586 (vcreateq_s8): Likewise.
13587 (vcreateq_s16): Likewise.
13588 (vcreateq_s32): Likewise.
13589 (vcreateq_s64): Likewise.
13590 (vshrq_n_s8): Likewise.
13591 (vshrq_n_s16): Likewise.
13592 (vshrq_n_s32): Likewise.
13593 (vshrq_n_u8): Likewise.
13594 (vshrq_n_u16): Likewise.
13595 (vshrq_n_u32): Likewise.
13596 (__arm_vcreateq_u8): Define intrinsic.
13597 (__arm_vcreateq_u16): Likewise.
13598 (__arm_vcreateq_u32): Likewise.
13599 (__arm_vcreateq_u64): Likewise.
13600 (__arm_vcreateq_s8): Likewise.
13601 (__arm_vcreateq_s16): Likewise.
13602 (__arm_vcreateq_s32): Likewise.
13603 (__arm_vcreateq_s64): Likewise.
13604 (__arm_vshrq_n_s8): Likewise.
13605 (__arm_vshrq_n_s16): Likewise.
13606 (__arm_vshrq_n_s32): Likewise.
13607 (__arm_vshrq_n_u8): Likewise.
13608 (__arm_vshrq_n_u16): Likewise.
13609 (__arm_vshrq_n_u32): Likewise.
13610 (__arm_vcvtq_n_s16_f16): Likewise.
13611 (__arm_vcvtq_n_s32_f32): Likewise.
13612 (__arm_vcvtq_n_u16_f16): Likewise.
13613 (__arm_vcvtq_n_u32_f32): Likewise.
13614 (vshrq_n): Define polymorphic variant.
13615 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
13617 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
13618 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
13619 * config/arm/constraints.md (Rb): Define constraint to check constant is
13620 in the range of 1 to 8.
13621 (Rf): Define constraint to check constant is in the range of 1 to 32.
13622 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
13623 (mve_vshrq_n_<supf><mode>): Likewise.
13624 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
13625 * config/arm/predicates.md (mve_imm_8): Define predicate to check
13626 the matching constraint Rb.
13627 (mve_imm_32): Define predicate to check the matching constraint Rf.
13629 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13630 Mihail Ionescu <mihail.ionescu@arm.com>
13631 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13633 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
13634 qualifier for binary operands.
13635 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
13636 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13637 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13638 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
13639 (vsubq_n_f32): Likewise.
13640 (vbrsrq_n_f16): Likewise.
13641 (vbrsrq_n_f32): Likewise.
13642 (vcvtq_n_f16_s16): Likewise.
13643 (vcvtq_n_f32_s32): Likewise.
13644 (vcvtq_n_f16_u16): Likewise.
13645 (vcvtq_n_f32_u32): Likewise.
13646 (vcreateq_f16): Likewise.
13647 (vcreateq_f32): Likewise.
13648 (__arm_vsubq_n_f16): Define intrinsic.
13649 (__arm_vsubq_n_f32): Likewise.
13650 (__arm_vbrsrq_n_f16): Likewise.
13651 (__arm_vbrsrq_n_f32): Likewise.
13652 (__arm_vcvtq_n_f16_s16): Likewise.
13653 (__arm_vcvtq_n_f32_s32): Likewise.
13654 (__arm_vcvtq_n_f16_u16): Likewise.
13655 (__arm_vcvtq_n_f32_u32): Likewise.
13656 (__arm_vcreateq_f16): Likewise.
13657 (__arm_vcreateq_f32): Likewise.
13658 (vsubq): Define polymorphic variant.
13659 (vbrsrq): Likewise.
13660 (vcvtq_n): Likewise.
13661 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
13663 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
13664 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
13665 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
13666 * config/arm/constraints.md (Rd): Define constraint to check constant is
13667 in the range of 1 to 16.
13668 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
13669 mve_vbrsrq_n_f<mode>: Likewise.
13670 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
13671 mve_vcreateq_f<mode>: Likewise.
13672 * config/arm/predicates.md (mve_imm_16): Define predicate to check
13673 the matching constraint Rd.
13675 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13676 Mihail Ionescu <mihail.ionescu@arm.com>
13677 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13679 * config/arm/arm-builtins.c (hi_UP): Define mode.
13680 * config/arm/arm.h (IS_VPR_REGNUM): Move.
13681 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
13682 (APSRQ_REGNUM): Modify.
13683 (APSRGE_REGNUM): Modify.
13684 * config/arm/arm_mve.h (vctp16q): Define macro.
13685 (vctp32q): Likewise.
13686 (vctp64q): Likewise.
13687 (vctp8q): Likewise.
13689 (__arm_vctp16q): Define intrinsic.
13690 (__arm_vctp32q): Likewise.
13691 (__arm_vctp64q): Likewise.
13692 (__arm_vctp8q): Likewise.
13693 (__arm_vpnot): Likewise.
13694 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
13696 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
13697 (mve_vpnothi): Likewise.
13699 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13700 Mihail Ionescu <mihail.ionescu@arm.com>
13701 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13703 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
13704 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
13705 (vdupq_n_s16): Likewise.
13706 (vdupq_n_s32): Likewise.
13707 (vabsq_s8): Likewise.
13708 (vabsq_s16): Likewise.
13709 (vabsq_s32): Likewise.
13710 (vclsq_s8): Likewise.
13711 (vclsq_s16): Likewise.
13712 (vclsq_s32): Likewise.
13713 (vclzq_s8): Likewise.
13714 (vclzq_s16): Likewise.
13715 (vclzq_s32): Likewise.
13716 (vnegq_s8): Likewise.
13717 (vnegq_s16): Likewise.
13718 (vnegq_s32): Likewise.
13719 (vaddlvq_s32): Likewise.
13720 (vaddvq_s8): Likewise.
13721 (vaddvq_s16): Likewise.
13722 (vaddvq_s32): Likewise.
13723 (vmovlbq_s8): Likewise.
13724 (vmovlbq_s16): Likewise.
13725 (vmovltq_s8): Likewise.
13726 (vmovltq_s16): Likewise.
13727 (vmvnq_s8): Likewise.
13728 (vmvnq_s16): Likewise.
13729 (vmvnq_s32): Likewise.
13730 (vrev16q_s8): Likewise.
13731 (vrev32q_s8): Likewise.
13732 (vrev32q_s16): Likewise.
13733 (vqabsq_s8): Likewise.
13734 (vqabsq_s16): Likewise.
13735 (vqabsq_s32): Likewise.
13736 (vqnegq_s8): Likewise.
13737 (vqnegq_s16): Likewise.
13738 (vqnegq_s32): Likewise.
13739 (vcvtaq_s16_f16): Likewise.
13740 (vcvtaq_s32_f32): Likewise.
13741 (vcvtnq_s16_f16): Likewise.
13742 (vcvtnq_s32_f32): Likewise.
13743 (vcvtpq_s16_f16): Likewise.
13744 (vcvtpq_s32_f32): Likewise.
13745 (vcvtmq_s16_f16): Likewise.
13746 (vcvtmq_s32_f32): Likewise.
13747 (vmvnq_u8): Likewise.
13748 (vmvnq_u16): Likewise.
13749 (vmvnq_u32): Likewise.
13750 (vdupq_n_u8): Likewise.
13751 (vdupq_n_u16): Likewise.
13752 (vdupq_n_u32): Likewise.
13753 (vclzq_u8): Likewise.
13754 (vclzq_u16): Likewise.
13755 (vclzq_u32): Likewise.
13756 (vaddvq_u8): Likewise.
13757 (vaddvq_u16): Likewise.
13758 (vaddvq_u32): Likewise.
13759 (vrev32q_u8): Likewise.
13760 (vrev32q_u16): Likewise.
13761 (vmovltq_u8): Likewise.
13762 (vmovltq_u16): Likewise.
13763 (vmovlbq_u8): Likewise.
13764 (vmovlbq_u16): Likewise.
13765 (vrev16q_u8): Likewise.
13766 (vaddlvq_u32): Likewise.
13767 (vcvtpq_u16_f16): Likewise.
13768 (vcvtpq_u32_f32): Likewise.
13769 (vcvtnq_u16_f16): Likewise.
13770 (vcvtmq_u16_f16): Likewise.
13771 (vcvtmq_u32_f32): Likewise.
13772 (vcvtaq_u16_f16): Likewise.
13773 (vcvtaq_u32_f32): Likewise.
13774 (__arm_vdupq_n_s8): Define intrinsic.
13775 (__arm_vdupq_n_s16): Likewise.
13776 (__arm_vdupq_n_s32): Likewise.
13777 (__arm_vabsq_s8): Likewise.
13778 (__arm_vabsq_s16): Likewise.
13779 (__arm_vabsq_s32): Likewise.
13780 (__arm_vclsq_s8): Likewise.
13781 (__arm_vclsq_s16): Likewise.
13782 (__arm_vclsq_s32): Likewise.
13783 (__arm_vclzq_s8): Likewise.
13784 (__arm_vclzq_s16): Likewise.
13785 (__arm_vclzq_s32): Likewise.
13786 (__arm_vnegq_s8): Likewise.
13787 (__arm_vnegq_s16): Likewise.
13788 (__arm_vnegq_s32): Likewise.
13789 (__arm_vaddlvq_s32): Likewise.
13790 (__arm_vaddvq_s8): Likewise.
13791 (__arm_vaddvq_s16): Likewise.
13792 (__arm_vaddvq_s32): Likewise.
13793 (__arm_vmovlbq_s8): Likewise.
13794 (__arm_vmovlbq_s16): Likewise.
13795 (__arm_vmovltq_s8): Likewise.
13796 (__arm_vmovltq_s16): Likewise.
13797 (__arm_vmvnq_s8): Likewise.
13798 (__arm_vmvnq_s16): Likewise.
13799 (__arm_vmvnq_s32): Likewise.
13800 (__arm_vrev16q_s8): Likewise.
13801 (__arm_vrev32q_s8): Likewise.
13802 (__arm_vrev32q_s16): Likewise.
13803 (__arm_vqabsq_s8): Likewise.
13804 (__arm_vqabsq_s16): Likewise.
13805 (__arm_vqabsq_s32): Likewise.
13806 (__arm_vqnegq_s8): Likewise.
13807 (__arm_vqnegq_s16): Likewise.
13808 (__arm_vqnegq_s32): Likewise.
13809 (__arm_vmvnq_u8): Likewise.
13810 (__arm_vmvnq_u16): Likewise.
13811 (__arm_vmvnq_u32): Likewise.
13812 (__arm_vdupq_n_u8): Likewise.
13813 (__arm_vdupq_n_u16): Likewise.
13814 (__arm_vdupq_n_u32): Likewise.
13815 (__arm_vclzq_u8): Likewise.
13816 (__arm_vclzq_u16): Likewise.
13817 (__arm_vclzq_u32): Likewise.
13818 (__arm_vaddvq_u8): Likewise.
13819 (__arm_vaddvq_u16): Likewise.
13820 (__arm_vaddvq_u32): Likewise.
13821 (__arm_vrev32q_u8): Likewise.
13822 (__arm_vrev32q_u16): Likewise.
13823 (__arm_vmovltq_u8): Likewise.
13824 (__arm_vmovltq_u16): Likewise.
13825 (__arm_vmovlbq_u8): Likewise.
13826 (__arm_vmovlbq_u16): Likewise.
13827 (__arm_vrev16q_u8): Likewise.
13828 (__arm_vaddlvq_u32): Likewise.
13829 (__arm_vcvtpq_u16_f16): Likewise.
13830 (__arm_vcvtpq_u32_f32): Likewise.
13831 (__arm_vcvtnq_u16_f16): Likewise.
13832 (__arm_vcvtmq_u16_f16): Likewise.
13833 (__arm_vcvtmq_u32_f32): Likewise.
13834 (__arm_vcvtaq_u16_f16): Likewise.
13835 (__arm_vcvtaq_u32_f32): Likewise.
13836 (__arm_vcvtaq_s16_f16): Likewise.
13837 (__arm_vcvtaq_s32_f32): Likewise.
13838 (__arm_vcvtnq_s16_f16): Likewise.
13839 (__arm_vcvtnq_s32_f32): Likewise.
13840 (__arm_vcvtpq_s16_f16): Likewise.
13841 (__arm_vcvtpq_s32_f32): Likewise.
13842 (__arm_vcvtmq_s16_f16): Likewise.
13843 (__arm_vcvtmq_s32_f32): Likewise.
13844 (vdupq_n): Define polymorphic variant.
13849 (vaddlvq): Likewise.
13850 (vaddvq): Likewise.
13851 (vmovlbq): Likewise.
13852 (vmovltq): Likewise.
13854 (vrev16q): Likewise.
13855 (vrev32q): Likewise.
13856 (vqabsq): Likewise.
13857 (vqnegq): Likewise.
13858 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
13859 (UNOP_SNONE_NONE): Likewise.
13860 (UNOP_UNONE_UNONE): Likewise.
13861 (UNOP_UNONE_NONE): Likewise.
13862 * config/arm/constraints.md (e): Define new constriant to allow only
13864 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
13865 (mve_vnegq_s<mode>): Likewise.
13866 (mve_vmvnq_<supf><mode>): Likewise.
13867 (mve_vdupq_n_<supf><mode>): Likewise.
13868 (mve_vclzq_<supf><mode>): Likewise.
13869 (mve_vclsq_s<mode>): Likewise.
13870 (mve_vaddvq_<supf><mode>): Likewise.
13871 (mve_vabsq_s<mode>): Likewise.
13872 (mve_vrev32q_<supf><mode>): Likewise.
13873 (mve_vmovltq_<supf><mode>): Likewise.
13874 (mve_vmovlbq_<supf><mode>): Likewise.
13875 (mve_vcvtpq_<supf><mode>): Likewise.
13876 (mve_vcvtnq_<supf><mode>): Likewise.
13877 (mve_vcvtmq_<supf><mode>): Likewise.
13878 (mve_vcvtaq_<supf><mode>): Likewise.
13879 (mve_vrev16q_<supf>v16qi): Likewise.
13880 (mve_vaddlvq_<supf>v4si): Likewise.
13882 2020-03-17 Jakub Jelinek <jakub@redhat.com>
13884 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
13886 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
13888 * read-rtl-function.c (find_param_by_name,
13889 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
13891 * spellcheck.c (get_edit_distance_cutoff): Likewise.
13892 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
13893 * tree.def (SWITCH_EXPR): Likewise.
13894 * selftest.c (assert_str_contains): Likewise.
13895 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
13897 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
13898 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
13899 * langhooks.h (struct lang_hooks_for_decls): Likewise.
13900 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
13901 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
13903 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
13904 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
13905 * tree.c (component_ref_size): Likewise.
13906 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
13907 * gimple-ssa-sprintf.c (get_string_length, format_string,
13908 format_directive): Likewise.
13909 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
13910 * input.c (string_concat_db::get_string_concatenation,
13911 test_lexer_string_locations_ucn4): Likewise.
13912 * cfgexpand.c (pass_expand::execute): Likewise.
13913 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
13914 maybe_diag_overlap): Likewise.
13915 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
13916 * shrink-wrap.c (spread_components): Likewise.
13917 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
13919 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
13921 * dwarf2out.c (dwarf2out_early_finish): Likewise.
13922 * gimple-ssa-store-merging.c: Likewise.
13923 * ira-costs.c (record_operand_costs): Likewise.
13924 * tree-vect-loop.c (vectorizable_reduction): Likewise.
13925 * target.def (dispatch): Likewise.
13926 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
13927 in documentation text.
13928 * doc/tm.texi: Regenerated.
13929 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
13930 duplicated word issue in a comment.
13931 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
13932 * config/i386/i386-features.c (remove_partial_avx_dependency):
13934 * config/msp430/msp430.c (msp430_select_section): Likewise.
13935 * config/gcn/gcn-run.c (load_image): Likewise.
13936 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
13937 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
13938 * config/aarch64/falkor-tag-collision-avoidance.c
13939 (single_dest_per_chain): Likewise.
13940 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
13941 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
13942 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
13943 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
13945 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
13946 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
13947 * config/rs6000/rs6000-logue.c
13948 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
13949 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
13950 Fix various other issues in the comment.
13952 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
13954 * config/arm/t-rmprofile: create new multilib for
13955 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
13958 2020-03-17 Jakub Jelinek <jakub@redhat.com>
13960 PR tree-optimization/94015
13961 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
13962 function where EXP is address of the bytes being stored rather than
13963 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
13964 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
13965 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
13966 calling native_encode_expr if host or target doesn't have 8-bit
13967 chars. Formatting fixes.
13968 (count_nonzero_bytes_addr): New function.
13970 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13971 Mihail Ionescu <mihail.ionescu@arm.com>
13972 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13974 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
13975 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
13976 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
13977 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
13978 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
13979 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
13980 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
13981 (vmvnq_n_s32): Likewise.
13982 (vrev64q_s8): Likewise.
13983 (vrev64q_s16): Likewise.
13984 (vrev64q_s32): Likewise.
13985 (vcvtq_s16_f16): Likewise.
13986 (vcvtq_s32_f32): Likewise.
13987 (vrev64q_u8): Likewise.
13988 (vrev64q_u16): Likewise.
13989 (vrev64q_u32): Likewise.
13990 (vmvnq_n_u16): Likewise.
13991 (vmvnq_n_u32): Likewise.
13992 (vcvtq_u16_f16): Likewise.
13993 (vcvtq_u32_f32): Likewise.
13994 (__arm_vmvnq_n_s16): Define intrinsic.
13995 (__arm_vmvnq_n_s32): Likewise.
13996 (__arm_vrev64q_s8): Likewise.
13997 (__arm_vrev64q_s16): Likewise.
13998 (__arm_vrev64q_s32): Likewise.
13999 (__arm_vrev64q_u8): Likewise.
14000 (__arm_vrev64q_u16): Likewise.
14001 (__arm_vrev64q_u32): Likewise.
14002 (__arm_vmvnq_n_u16): Likewise.
14003 (__arm_vmvnq_n_u32): Likewise.
14004 (__arm_vcvtq_s16_f16): Likewise.
14005 (__arm_vcvtq_s32_f32): Likewise.
14006 (__arm_vcvtq_u16_f16): Likewise.
14007 (__arm_vcvtq_u32_f32): Likewise.
14008 (vrev64q): Define polymorphic variant.
14009 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
14010 (UNOP_SNONE_NONE): Likewise.
14011 (UNOP_SNONE_IMM): Likewise.
14012 (UNOP_UNONE_UNONE): Likewise.
14013 (UNOP_UNONE_NONE): Likewise.
14014 (UNOP_UNONE_IMM): Likewise.
14015 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
14016 (mve_vcvtq_from_f_<supf><mode>): Likewise.
14017 (mve_vmvnq_n_<supf><mode>): Likewise.
14019 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14020 Mihail Ionescu <mihail.ionescu@arm.com>
14021 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14023 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
14024 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
14025 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
14026 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
14027 (vrndxq_f32): Likewise.
14028 (vrndq_f16) Likewise.
14029 (vrndq_f32): Likewise.
14030 (vrndpq_f16): Likewise.
14031 (vrndpq_f32): Likewise.
14032 (vrndnq_f16): Likewise.
14033 (vrndnq_f32): Likewise.
14034 (vrndmq_f16): Likewise.
14035 (vrndmq_f32): Likewise.
14036 (vrndaq_f16): Likewise.
14037 (vrndaq_f32): Likewise.
14038 (vrev64q_f16): Likewise.
14039 (vrev64q_f32): Likewise.
14040 (vnegq_f16): Likewise.
14041 (vnegq_f32): Likewise.
14042 (vdupq_n_f16): Likewise.
14043 (vdupq_n_f32): Likewise.
14044 (vabsq_f16): Likewise.
14045 (vabsq_f32): Likewise.
14046 (vrev32q_f16): Likewise.
14047 (vcvttq_f32_f16): Likewise.
14048 (vcvtbq_f32_f16): Likewise.
14049 (vcvtq_f16_s16): Likewise.
14050 (vcvtq_f32_s32): Likewise.
14051 (vcvtq_f16_u16): Likewise.
14052 (vcvtq_f32_u32): Likewise.
14053 (__arm_vrndxq_f16): Define intrinsic.
14054 (__arm_vrndxq_f32): Likewise.
14055 (__arm_vrndq_f16): Likewise.
14056 (__arm_vrndq_f32): Likewise.
14057 (__arm_vrndpq_f16): Likewise.
14058 (__arm_vrndpq_f32): Likewise.
14059 (__arm_vrndnq_f16): Likewise.
14060 (__arm_vrndnq_f32): Likewise.
14061 (__arm_vrndmq_f16): Likewise.
14062 (__arm_vrndmq_f32): Likewise.
14063 (__arm_vrndaq_f16): Likewise.
14064 (__arm_vrndaq_f32): Likewise.
14065 (__arm_vrev64q_f16): Likewise.
14066 (__arm_vrev64q_f32): Likewise.
14067 (__arm_vnegq_f16): Likewise.
14068 (__arm_vnegq_f32): Likewise.
14069 (__arm_vdupq_n_f16): Likewise.
14070 (__arm_vdupq_n_f32): Likewise.
14071 (__arm_vabsq_f16): Likewise.
14072 (__arm_vabsq_f32): Likewise.
14073 (__arm_vrev32q_f16): Likewise.
14074 (__arm_vcvttq_f32_f16): Likewise.
14075 (__arm_vcvtbq_f32_f16): Likewise.
14076 (__arm_vcvtq_f16_s16): Likewise.
14077 (__arm_vcvtq_f32_s32): Likewise.
14078 (__arm_vcvtq_f16_u16): Likewise.
14079 (__arm_vcvtq_f32_u32): Likewise.
14080 (vrndxq): Define polymorphic variants.
14082 (vrndpq): Likewise.
14083 (vrndnq): Likewise.
14084 (vrndmq): Likewise.
14085 (vrndaq): Likewise.
14086 (vrev64q): Likewise.
14089 (vrev32q): Likewise.
14090 (vcvtbq_f32): Likewise.
14091 (vcvttq_f32): Likewise.
14093 * config/arm/arm_mve_builtins.def (VAR2): Define.
14095 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
14096 (mve_vrndq_f<mode>): Likewise.
14097 (mve_vrndpq_f<mode>): Likewise.
14098 (mve_vrndnq_f<mode>): Likewise.
14099 (mve_vrndmq_f<mode>): Likewise.
14100 (mve_vrndaq_f<mode>): Likewise.
14101 (mve_vrev64q_f<mode>): Likewise.
14102 (mve_vnegq_f<mode>): Likewise.
14103 (mve_vdupq_n_f<mode>): Likewise.
14104 (mve_vabsq_f<mode>): Likewise.
14105 (mve_vrev32q_fv8hf): Likewise.
14106 (mve_vcvttq_f32_f16v4sf): Likewise.
14107 (mve_vcvtbq_f32_f16v4sf): Likewise.
14108 (mve_vcvtq_to_f_<supf><mode>): Likewise.
14110 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14111 Mihail Ionescu <mihail.ionescu@arm.com>
14112 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14114 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
14116 (ARM_BUILTIN_MVE_PATTERN_START): Define.
14117 (arm_init_mve_builtins): Define function.
14118 (arm_init_builtins): Add TARGET_HAVE_MVE check.
14119 (arm_expand_builtin_1): Check the range of fcode.
14120 (arm_expand_mve_builtin): Define function to expand MVE builtins.
14121 (arm_expand_builtin): Check the range of fcode.
14122 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
14124 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
14125 (vst4q_s8): Define macro.
14126 (vst4q_s16): Likewise.
14127 (vst4q_s32): Likewise.
14128 (vst4q_u8): Likewise.
14129 (vst4q_u16): Likewise.
14130 (vst4q_u32): Likewise.
14131 (vst4q_f16): Likewise.
14132 (vst4q_f32): Likewise.
14133 (__arm_vst4q_s8): Define inline builtin.
14134 (__arm_vst4q_s16): Likewise.
14135 (__arm_vst4q_s32): Likewise.
14136 (__arm_vst4q_u8): Likewise.
14137 (__arm_vst4q_u16): Likewise.
14138 (__arm_vst4q_u32): Likewise.
14139 (__arm_vst4q_f16): Likewise.
14140 (__arm_vst4q_f32): Likewise.
14141 (__ARM_mve_typeid): Define macro with MVE types.
14142 (__ARM_mve_coerce): Define macro with _Generic feature.
14143 (vst4q): Define polymorphic variant for different vst4q builtins.
14144 * config/arm/arm_mve_builtins.def: New file.
14145 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
14147 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
14148 (unspec): Define unspec.
14149 (mve_vst4q<mode>): Define RTL pattern.
14150 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
14152 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
14154 (define_split): Allow OI mode split for MVE after reload.
14155 (define_split): Allow XI mode split for MVE after reload.
14156 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
14157 (arm-builtins.o): Likewise.
14159 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
14161 * c-typeck.c (process_init_element): Handle constructor_type with
14162 type size represented by POLY_INT_CST.
14164 2020-03-17 Jakub Jelinek <jakub@redhat.com>
14166 PR tree-optimization/94187
14167 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
14168 nchars - offset < nbytes.
14170 PR middle-end/94189
14171 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
14172 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
14173 for code-generation.
14175 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
14178 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
14179 after changing memory subreg.
14181 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14182 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14184 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
14185 emulator calls for dobule precision arithmetic operations for MVE.
14187 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14188 Mihail Ionescu <mihail.ionescu@arm.com>
14189 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14191 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
14192 feature bit is on and -mfpu=auto is passed as compiler option, do not
14193 generate error on not finding any matching fpu. Because in this case
14194 fpu is not required.
14195 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
14196 enabled for MVE and also for all VFP extensions.
14197 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
14199 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
14200 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
14201 along with feature bits mve_float.
14202 (mve): Modify add options in armv8.1-m.main arch for MVE.
14203 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
14205 * config/arm/arm.c (use_return_insn): Replace the
14206 check with TARGET_VFP_BASE.
14207 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
14209 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14210 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
14212 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
14213 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
14215 (arm_compute_frame_layout): Likewise.
14216 (arm_save_coproc_regs): Likewise.
14217 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
14219 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14220 with equivalent macro TARGET_VFP_BASE.
14221 (arm_expand_epilogue_apcs_frame): Likewise.
14222 (arm_expand_epilogue): Likewise.
14223 (arm_conditional_register_usage): Likewise.
14224 (arm_declare_function_name): Add check to skip printing .fpu directive
14225 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
14227 * config/arm/arm.h (TARGET_VFP_BASE): Define.
14228 * config/arm/arm.md (arch): Add "mve" to arch.
14229 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
14230 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
14231 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
14232 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
14234 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
14235 to not allow for MVE.
14236 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
14238 (VUNSPEC_GET_FPSCR): Define.
14239 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
14240 instructions which move to general-purpose Register from Floating-point
14241 Special register and vice-versa.
14242 (thumb2_movhi_fp16): Likewise.
14243 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
14244 with MCR and MRC instructions which set and get Floating-point Status
14245 and Control Register (FPSCR).
14246 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
14248 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
14249 float move patterns in MVE.
14250 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
14251 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14252 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
14253 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14254 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
14255 TARGET_VFP_BASE check.
14256 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
14257 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14259 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
14260 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14264 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14265 Mihail Ionescu <mihail.ionescu@arm.com>
14266 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14268 * config.gcc (arm_mve.h): Include mve intrinsics header file.
14269 * config/arm/aout.h (p0): Add new register name for MVE predicated
14271 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
14272 common to Neon and MVE.
14273 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
14274 (arm_init_simd_builtin_types): Disable poly types for MVE.
14275 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
14276 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
14277 ARM_BUILTIN_NEON_LANE_CHECK.
14278 (mve_dereference_pointer): Add function.
14279 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
14281 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
14282 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
14283 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
14284 with floating point enabled.
14285 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
14286 simd_immediate_valid_for_move.
14287 (simd_immediate_valid_for_move): Renamed from
14288 neon_immediate_valid_for_move function.
14289 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
14290 error if vfpv2 feature bit is disabled and mve feature bit is also
14291 disabled for HARD_FLOAT_ABI.
14292 (use_return_insn): Check to not push VFP regs for MVE.
14293 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
14295 (aapcs_vfp_allocate_return_reg): Likewise.
14296 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
14297 address operand for MVE.
14298 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
14299 (neon_valid_immediate): Rename to simd_valid_immediate.
14300 (simd_valid_immediate): Rename from neon_valid_immediate.
14301 (simd_valid_immediate): MVE check on size of vector is 128 bits.
14302 (neon_immediate_valid_for_move): Rename to
14303 simd_immediate_valid_for_move.
14304 (simd_immediate_valid_for_move): Rename from
14305 neon_immediate_valid_for_move.
14306 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
14308 (neon_make_constant): Modify call to neon_valid_immediate function.
14309 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
14311 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
14312 (arm_compute_frame_layout): Calculate space for saved VFP registers for
14314 (arm_save_coproc_regs): Save coproc registers for MVE.
14315 (arm_print_operand): Add case 'E' to print memory operands for MVE.
14316 (arm_print_operand_address): Check to print register number for MVE.
14317 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
14318 (arm_modes_tieable_p): Check to allow structure mode for MVE.
14319 (arm_regno_class): Add VPR_REGNUM check.
14320 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
14322 (arm_expand_epilogue): MVE check for enabling pop instructions in
14324 (arm_print_asm_arch_directives): Modify function to disable print of
14325 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14327 (arm_vector_mode_supported_p): Check for modes available in MVE interger
14328 and MVE floating point.
14329 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
14331 (arm_conditional_register_usage): Enable usage of conditional regsiter
14333 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
14334 (arm_declare_function_name): Modify function to disable print of
14335 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14337 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
14338 when target general registers are required.
14339 (TARGET_HAVE_MVE_FLOAT): Likewise.
14340 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
14342 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
14343 which indicate this is not available for across function calls.
14344 (FIRST_PSEUDO_REGISTER): Modify.
14345 (VALID_MVE_MODE): Define valid MVE mode.
14346 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
14347 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
14348 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
14349 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
14351 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
14352 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
14353 (enum reg_class): Add VPR_REG entry.
14354 (REG_CLASS_NAMES): Add VPR_REG entry.
14355 * config/arm/arm.md (VPR_REGNUM): Define.
14356 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
14357 "unconditional" instructions.
14358 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
14359 (movdf_soft_insn): Modify RTL to not allow for MVE.
14360 (vfp_pop_multiple_with_writeback): Enable for MVE.
14361 (include "mve.md"): Include mve.md file.
14362 * config/arm/arm_mve.h: Add MVE intrinsics head file.
14363 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
14364 for vector predicated operands.
14365 * config/arm/iterators.md (VNIM1): Define.
14366 (VNINOTM1): Define.
14367 (VHFBF_split): Define
14368 * config/arm/mve.md: New file.
14369 (mve_mov<mode>): Define RTL for move, store and load in MVE.
14370 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
14372 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
14373 simd_immediate_valid_for_move.
14374 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
14375 is common to MVE and NEON to vec-common.md file.
14376 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
14377 * config/arm/predicates.md (vpr_register_operand): Define.
14378 * config/arm/t-arm: Add mve.md file.
14379 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
14381 (mve_store): Add MVE instructions mve_store to attribute "type".
14382 (mve_load): Add MVE instructions mve_load to attribute "type".
14383 (is_mve_type): Define attribute.
14384 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
14385 standard move patterns in MVE along with NEON and IWMMXT with mode
14387 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
14388 and IWMMXT with mode iterator V8HF.
14389 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
14391 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
14392 simd_immediate_valid_for_move.
14395 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
14398 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
14399 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14401 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
14403 2020-03-16 Jakub Jelinek <jakub@redhat.com>
14406 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
14409 PR tree-optimization/94166
14410 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
14411 as secondary comparison key.
14413 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
14415 PR tree-optimization/94125
14416 * tree-loop-distribution.c
14417 (loop_distribution::break_alias_scc_partitions): Update post order
14418 number for merged scc.
14420 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
14423 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
14425 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
14426 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
14427 and ext_sse_reg_operand check.
14429 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
14431 * common.opt: Avoid redundancy in the help text.
14432 * config/arc/arc.opt: Likewise.
14433 * config/cr16/cr16.opt: Likewise.
14435 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14437 PR middle-end/93566
14438 * tree-nested.c (convert_nonlocal_omp_clauses,
14439 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
14440 with C/C++ array sections.
14442 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
14445 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
14446 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14449 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14451 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
14452 "a an" to "an" in a comment.
14453 * hsa-common.h (is_a_helper): Likewise.
14454 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
14455 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
14456 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
14458 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
14461 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
14462 64-bit value by 64 bits (UB).
14464 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
14466 PR rtl-optimization/92303
14467 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
14469 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
14471 PR rtl-optimization/94148
14472 PR rtl-optimization/94042
14473 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
14474 (df_worklist_propagate_forward): New parameter last_change_age, use
14475 that instead of bb->aux.
14476 (df_worklist_propagate_backward): Ditto.
14477 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
14479 2020-03-13 Richard Biener <rguenther@suse.de>
14481 PR tree-optimization/94163
14482 * tree-ssa-pre.c (create_expression_by_pieces): Check
14483 whether alignment would be zero.
14485 2020-03-13 Martin Liska <mliska@suse.cz>
14488 * lto-wrapper.c (run_gcc): Use concat for appending
14489 to collect_gcc_options.
14491 2020-03-13 Jakub Jelinek <jakub@redhat.com>
14494 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
14495 instead of GEN_INT.
14497 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
14500 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
14501 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
14502 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
14503 TARGET_AVX512VL and ext_sse_reg_operand check.
14505 2020-03-13 Bu Le <bule1@huawei.com>
14508 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
14509 (-param=aarch64-double-recp-precision=): New options.
14510 * doc/invoke.texi: Document them.
14511 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
14512 instead of hard-coding the choice of 1 for float and 2 for double.
14514 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
14516 PR rtl-optimization/94119
14517 * resource.h (clear_hashed_info_until_next_barrier): Declare.
14518 * resource.c (clear_hashed_info_until_next_barrier): New function.
14519 * reorg.c (add_to_delay_list): Fix formatting.
14520 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
14521 the next instruction after removing a BARRIER.
14523 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
14525 PR middle-end/92071
14526 * expmed.c (store_integral_bit_field): For fields larger than a word,
14527 call extract_bit_field on the value if the mode is BLKmode. Remove
14528 specific path for big-endian targets and tidy things up a little bit.
14530 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
14532 PR rtl-optimization/90275
14533 * cse.c (cse_insn): Delete no-op register moves too.
14535 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
14537 * config/rx/rx.md (CTRLREG_CPEN): Remove.
14538 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
14540 2020-03-12 Richard Biener <rguenther@suse.de>
14542 PR tree-optimization/94103
14543 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
14544 punning when the mode precision is not sufficient.
14546 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
14549 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
14550 MODE_V1DF and MODE_V2SF.
14551 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
14552 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
14555 2020-03-12 Jakub Jelinek <jakub@redhat.com>
14557 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
14558 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
14559 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
14560 * doc/tm.texi: Regenerated.
14562 PR tree-optimization/94130
14563 * tree-ssa-dse.c: Include gimplify.h.
14564 (increment_start_addr): If stmt has lhs, drop the lhs from call and
14565 set it after the call to the original value of the first argument.
14567 (decrement_count): Formatting fix.
14569 2020-03-11 Delia Burduv <delia.burduv@arm.com>
14571 * config/arm/arm-builtins.c
14572 (arm_init_simd_builtin_scalar_types): New.
14573 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
14574 (vld2q_bf16): Used new builtin type.
14575 (vld3_bf16): Used new builtin type.
14576 (vld3q_bf16): Used new builtin type.
14577 (vld4_bf16): Used new builtin type.
14578 (vld4q_bf16): Used new builtin type.
14579 (vld2_dup_bf16): Used new builtin type.
14580 (vld2q_dup_bf16): Used new builtin type.
14581 (vld3_dup_bf16): Used new builtin type.
14582 (vld3q_dup_bf16): Used new builtin type.
14583 (vld4_dup_bf16): Used new builtin type.
14584 (vld4q_dup_bf16): Used new builtin type.
14586 2020-03-11 Jakub Jelinek <jakub@redhat.com>
14589 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
14590 at the start to switch to data section. Don't print extra newline if
14591 .globl directive has not been emitted.
14593 2020-03-11 Richard Biener <rguenther@suse.de>
14595 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
14598 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
14600 PR middle-end/93961
14601 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
14602 whose type is a qualified union.
14604 2020-03-11 Jakub Jelinek <jakub@redhat.com>
14607 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
14608 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
14611 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
14613 (get_nth_most_common_value): Use abs_hwi instead of abs.
14615 PR middle-end/94111
14616 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
14617 is rvc_normal, otherwise use real_to_decimal to print the number to
14620 PR tree-optimization/94114
14621 * tree-loop-distribution.c (generate_memset_builtin): Call
14622 rewrite_to_non_trapping_overflow even on mem.
14623 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
14626 2020-03-10 Jeff Law <law@redhat.com>
14628 * config/bfin/bfin.md (movsi_insv): Add length attribute.
14630 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
14633 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
14634 NAN and SIGNED_ZEROR for smax/smin.
14636 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
14639 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
14640 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
14642 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
14644 * loop-iv.c (find_simple_exit): Make it static.
14645 * cfgloop.h: Remove the corresponding prototype.
14647 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
14649 * ddg.c (create_ddg): Fix intendation.
14650 (set_recurrence_length): Likewise.
14651 (create_ddg_all_sccs): Likewise.
14653 2020-03-10 Jakub Jelinek <jakub@redhat.com>
14656 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
14657 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
14660 2020-03-09 Jason Merrill <jason@redhat.com>
14662 * gdbinit.in (pgs): Fix typo in documentation.
14664 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
14668 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
14670 PR rtl-optimization/93564
14671 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
14672 do not honor reg alloc order.
14674 2020-03-09 Andrew Pinski <apinski@marvell.com>
14676 PR inline-asm/94095
14677 * doc/extend.texi (x86 Operand Modifiers): Fix column
14680 2020-03-09 Martin Liska <mliska@suse.cz>
14683 * config/rs6000/rs6000.c (rs6000_option_override_internal):
14684 Remove set of str_align_loops and str_align_jumps as these
14685 should be set in previous 2 conditions in the function.
14687 2020-03-09 Jakub Jelinek <jakub@redhat.com>
14689 PR rtl-optimization/94045
14690 * params.opt (-param=max-find-base-term-values=): New option.
14691 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
14692 in a single toplevel find_base_term call.
14694 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
14697 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
14698 * config/aarch64/aarch64-simd.md
14699 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
14700 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
14701 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
14702 * config/aarch64/arm_neon.h:
14703 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
14704 (vmlal_lane_u16): Likewise.
14705 (vmlal_lane_s32): Likewise.
14706 (vmlal_lane_u32): Likewise.
14707 (vmlal_laneq_s16): Likewise.
14708 (vmlal_laneq_u16): Likewise.
14709 (vmlal_laneq_s32): Likewise.
14710 (vmlal_laneq_u32): Likewise.
14711 (vmull_lane_s16): Likewise.
14712 (vmull_lane_u16): Likewise.
14713 (vmull_lane_s32): Likewise.
14714 (vmull_lane_u32): Likewise.
14715 (vmull_laneq_s16): Likewise.
14716 (vmull_laneq_u16): Likewise.
14717 (vmull_laneq_s32): Likewise.
14718 (vmull_laneq_u32): Likewise.
14719 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
14722 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
14724 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
14725 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
14726 (aarch64_mls_elt<mode>): Likewise.
14727 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
14728 (aarch64_fma4_elt<mode>): Likewise.
14729 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
14730 (aarch64_fma4_elt_to_64v2df): Likewise.
14731 (aarch64_fnma4_elt<mode>): Likewise.
14732 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
14733 (aarch64_fnma4_elt_to_64v2df): Likewise.
14735 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
14737 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
14738 Specify movprfx attribute.
14739 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
14741 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
14744 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
14746 (TARGET_NO_FP_IN_TOC): Same.
14747 * config/rs6000/aix71.h: Same.
14748 * config/rs6000/aix72.h: Same.
14750 2020-03-06 Andrew Pinski <apinski@marvell.com>
14751 Jeff Law <law@redhat.com>
14753 PR rtl-optimization/93996
14754 * haifa-sched.c (remove_notes): Be more careful when adding
14757 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14759 * config/arm/arm_neon.h (vld2_bf16): New.
14765 (vld2_dup_bf16): New.
14766 (vld2q_dup_bf16): New.
14767 (vld3_dup_bf16): New.
14768 (vld3q_dup_bf16): New.
14769 (vld4_dup_bf16): New.
14770 (vld4q_dup_bf16): New.
14771 * config/arm/arm_neon_builtins.def
14772 (vld2): Changed to VAR13 and added v4bf, v8bf
14773 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
14774 (vld3): Changed to VAR13 and added v4bf, v8bf
14775 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
14776 (vld4): Changed to VAR13 and added v4bf, v8bf
14777 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
14778 * config/arm/iterators.md (VDXBF2): New iterator.
14779 *config/arm/neon.md (neon_vld2): Use new iterators.
14780 (neon_vld2_dup<mode): Use new iterators.
14781 (neon_vld3<mode>): Likewise.
14782 (neon_vld3qa<mode>): Likewise.
14783 (neon_vld3qb<mode>): Likewise.
14784 (neon_vld3_dup<mode>): Likewise.
14785 (neon_vld4<mode>): Likewise.
14786 (neon_vld4qa<mode>): Likewise.
14787 (neon_vld4qb<mode>): Likewise.
14788 (neon_vld4_dup<mode>): Likewise.
14789 (neon_vld2_dupv8bf): New.
14790 (neon_vld3_dupv8bf): Likewise.
14791 (neon_vld4_dupv8bf): Likewise.
14793 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14795 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
14796 (bfloat16x8x2_t): New typedef.
14797 (bfloat16x4x3_t): New typedef.
14798 (bfloat16x8x3_t): New typedef.
14799 (bfloat16x4x4_t): New typedef.
14800 (bfloat16x8x4_t): New typedef.
14807 * config/arm/arm-builtins.c (v2bf_UP): Define.
14809 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
14810 * config/arm/arm-modes.def (V2BF): New mode.
14811 * config/arm/arm-simd-builtin-types.def
14812 (Bfloat16x2_t): New entry.
14813 * config/arm/arm_neon_builtins.def
14814 (vst2): Changed to VAR13 and added v4bf, v8bf
14815 (vst3): Changed to VAR13 and added v4bf, v8bf
14816 (vst4): Changed to VAR13 and added v4bf, v8bf
14817 * config/arm/iterators.md (VDXBF): New iterator.
14818 (VQ2BF): New iterator.
14819 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
14820 (neon_vst2<mode>): Used new iterators.
14821 (neon_vst3<mode>): Used new iterators.
14822 (neon_vst3<mode>): Used new iterators.
14823 (neon_vst3qa<mode>): Used new iterators.
14824 (neon_vst3qb<mode>): Used new iterators.
14825 (neon_vst4<mode>): Used new iterators.
14826 (neon_vst4<mode>): Used new iterators.
14827 (neon_vst4qa<mode>): Used new iterators.
14828 (neon_vst4qb<mode>): Used new iterators.
14830 2020-03-06 Delia Burduv <delia.burduv@arm.com>
14832 * config/aarch64/aarch64-simd-builtins.def
14833 (bfcvtn): New built-in function.
14834 (bfcvtn_q): New built-in function.
14835 (bfcvtn2): New built-in function.
14836 (bfcvt): New built-in function.
14837 * config/aarch64/aarch64-simd.md
14838 (aarch64_bfcvtn<q><mode>): New pattern.
14839 (aarch64_bfcvtn2v8bf): New pattern.
14840 (aarch64_bfcvtbf): New pattern.
14841 * config/aarch64/arm_bf16.h (float32_t): New typedef.
14842 (vcvth_bf16_f32): New intrinsic.
14843 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
14844 (vcvtq_low_bf16_f32): New intrinsic.
14845 (vcvtq_high_bf16_f32): New intrinsic.
14846 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
14847 (UNSPEC_BFCVTN): New UNSPEC.
14848 (UNSPEC_BFCVTN2): New UNSPEC.
14849 (UNSPEC_BFCVT): New UNSPEC.
14850 * config/arm/types.md (bf_cvt): New type.
14852 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
14854 * config/s390/s390.md ("tabort"): Get rid of two consecutive
14855 blanks in format string.
14857 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
14861 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
14862 * config/i386/i386.c (ix86_get_ssemov): New function.
14863 (ix86_output_ssemov): Likewise.
14864 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
14865 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
14867 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
14868 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
14869 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
14870 (*movti_internal): Likewise.
14871 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
14873 2020-03-05 Jeff Law <law@redhat.com>
14875 PR tree-optimization/91890
14876 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
14877 Use gimple_or_expr_nonartificial_location.
14878 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
14879 Use gimple_or_expr_nonartificial_location.
14880 * gimple.c (gimple_or_expr_nonartificial_location): New function.
14881 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
14882 * tree-ssa-strlen.c (maybe_warn_overflow): Use
14883 gimple_or_expr_nonartificial_location.
14884 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
14885 (maybe_warn_pointless_strcmp): Likewise.
14887 2020-03-05 Jakub Jelinek <jakub@redhat.com>
14890 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
14891 SRC and MASK arguments to __m128 from __m128d.
14892 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
14894 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
14896 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
14897 argument to __m128i from __m128d.
14898 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
14900 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
14901 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
14904 2020-03-05 Delia Burduv <delia.burduv@arm.com>
14906 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
14907 (vbfmlalbq_f32): New.
14908 (vbfmlaltq_f32): New.
14909 (vbfmlalbq_lane_f32): New.
14910 (vbfmlaltq_lane_f32): New.
14911 (vbfmlalbq_laneq_f32): New.
14912 (vbfmlaltq_laneq_f32): New.
14913 * config/arm/arm_neon_builtins.def (vmmla): New.
14918 (vfmab_laneq): New.
14919 (vfmat_laneq): New.
14920 * config/arm/iterators.md (BF_MA): New int iterator.
14921 (bt): New int attribute.
14922 (VQXBF): Copy of VQX with V8BF.
14923 * config/arm/neon.md (neon_vmmlav8bf): New insn.
14924 (neon_vfma<bt>v8bf): New insn.
14925 (neon_vfma<bt>_lanev8bf): New insn.
14926 (neon_vfma<bt>_laneqv8bf): New expand.
14927 (neon_vget_high<mode>): Changed iterator to VQXBF.
14928 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
14929 (UNSPEC_BFMAB): New UNSPEC.
14930 (UNSPEC_BFMAT): New UNSPEC.
14932 2020-03-05 Jakub Jelinek <jakub@redhat.com>
14934 PR middle-end/93399
14935 * tree-pretty-print.h (pretty_print_string): Declare.
14936 * tree-pretty-print.c (pretty_print_string): Remove forward
14937 declaration, no longer static. Change nbytes parameter type
14938 from unsigned to size_t.
14939 * print-rtl.c (print_value) <case CONST_STRING>: Use
14940 pretty_print_string and for shrink way too long strings.
14942 2020-03-05 Richard Biener <rguenther@suse.de>
14943 Jakub Jelinek <jakub@redhat.com>
14945 PR tree-optimization/93582
14946 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
14947 last operand as signed when looking for memset offset. Formatting
14950 2020-03-04 Andrew Pinski <apinski@marvell.com>
14953 * value-prof.c (dump_histogram_value): Use std::abs.
14955 2020-03-04 Martin Sebor <msebor@redhat.com>
14957 PR tree-optimization/93986
14958 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
14959 operands to the same precision widest_int to avoid ICEs.
14961 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
14964 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
14965 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
14966 for OPTION_MASK_ALTIVEC.
14968 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14970 * config.gcc: Include the glibc-stdint.h header for zTPF.
14972 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14974 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
14975 direct FPR-GPR copies.
14976 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
14979 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
14981 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
14982 operands to the prologue_tpf expander.
14983 (s390_emit_epilogue): Likewise.
14984 (s390_option_override_internal): Do error checking and setup for
14986 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
14987 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
14988 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
14989 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
14990 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
14991 operands for the check flag and the branch target.
14992 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
14993 ("mtpf-trace-hook-prologue-target")
14994 ("mtpf-trace-hook-epilogue-check")
14995 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
14997 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
14998 options are for debugging purposes and will not be documented
15001 2020-03-04 Jakub Jelinek <jakub@redhat.com>
15004 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
15006 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
15007 argument. Change pd argument so that it can be modified. Turn
15008 constant non-CONSTRUCTOR store into non-constant if it is too large.
15009 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
15011 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
15014 2020-02-04 Richard Biener <rguenther@suse.de>
15016 PR tree-optimization/93964
15017 * graphite-isl-ast-to-gimple.c
15018 (gcc_expression_from_isl_ast_expr_id): Add intermediate
15019 conversion for pointer to integer converts.
15020 * graphite-scop-detection.c (assign_parameter_index_in_region):
15023 2020-03-04 Martin Liska <mliska@suse.cz>
15027 * doc/invoke.texi: Clarify --help=language and --help=common
15030 2020-03-04 Jakub Jelinek <jakub@redhat.com>
15032 PR tree-optimization/94001
15033 * tree-tailcall.c (process_assignment): Before comparing op1 to
15034 *ass_var, verify *ass_var is non-NULL.
15036 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
15039 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
15042 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
15044 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
15045 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
15046 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
15047 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
15048 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
15049 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
15050 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
15051 (V_bf_low, V_bf_cvt_m): New mode attributes.
15052 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
15053 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
15054 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
15055 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
15056 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
15058 2020-03-03 Jakub Jelinek <jakub@redhat.com>
15060 PR tree-optimization/93582
15061 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
15062 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
15063 members, initialize them in the constructor and if mask is non-NULL,
15064 artificially push_partial_def {} for the portions of the mask that
15066 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
15067 val and return (void *)-1. Formatting fix.
15068 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
15070 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
15071 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
15073 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
15075 (visit_stmt): Formatting fix.
15077 2020-03-03 Richard Biener <rguenther@suse.de>
15079 PR tree-optimization/93946
15080 * alias.h (refs_same_for_tbaa_p): Declare.
15081 * alias.c (refs_same_for_tbaa_p): New function.
15082 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
15084 * tree-ssa-scopedtables.h
15085 (avail_exprs_stack::lookup_avail_expr): Add output argument
15086 giving access to the hashtable entry.
15087 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
15089 * tree-ssa-dom.c: Include alias.h.
15090 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
15091 removing redundant store.
15092 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
15093 (ao_ref_init_from_vn_reference): Adjust prototype.
15094 (vn_reference_lookup_pieces): Likewise.
15095 (vn_reference_insert_pieces): Likewise.
15096 * tree-ssa-sccvn.c: Track base alias set in addition to alias
15098 (eliminate_dom_walker::eliminate_stmt): Also check base alias
15099 set when removing redundant stores.
15100 (visit_reference_op_store): Likewise.
15101 * dse.c (record_store): Adjust valdity check for redundant
15104 2020-03-03 Jakub Jelinek <jakub@redhat.com>
15107 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
15109 PR rtl-optimization/94002
15110 * explow.c (plus_constant): Punt if cst has VOIDmode and
15111 get_pool_mode is different from mode.
15113 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15115 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
15116 address has an offset which fits the scalling constraint for a
15117 load/store operation.
15118 (legitimate_scaled_address_p): Update use
15119 leigitimate_small_data_address_p.
15120 (arc_print_operand): Likewise.
15121 (arc_legitimate_address_p): Likewise.
15122 (legitimate_small_data_address_p): Likewise.
15124 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15126 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
15127 (fnmasf4_fpu): Likewise.
15129 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15131 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
15133 (subdi3): Likewise.
15134 (adddi3_i): Remove pattern.
15135 (subdi3_i): Likewise.
15137 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15139 * config/arc/arc.md (eh_return): Add length info.
15141 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15143 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
15145 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15147 * doc/invoke.texi (Static Analyzer Options): Add
15148 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
15151 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
15154 * config/i386/i386.md (movstrict<mode>): Allow only
15155 registers with VALID_INT_MODE_P modes.
15157 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
15159 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
15160 (reduc_insn): Use 'U' and 'B' operand codes.
15161 (reduc_<reduc_op>_scal_<mode>): Allow all types.
15162 (reduc_<reduc_op>_scal_v64di): Delete.
15163 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
15164 (*plus_carry_dpp_shr_v64si): Change to ...
15165 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
15166 (mov_from_lane63_v64di): Change to ...
15167 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
15168 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
15169 Support UNSPEC_MOV_DPP_SHR output formats.
15170 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
15171 Add "use_extends" reductions.
15172 (print_operand_address): Add 'I' and 'U' codes.
15173 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
15175 2020-03-02 Martin Liska <mliska@suse.cz>
15177 * lto-wrapper.c: Fix typo in comment about
15178 C++ standard version.
15180 2020-03-01 Martin Sebor <msebor@redhat.com>
15183 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
15185 2020-03-01 Martin Sebor <msebor@redhat.com>
15187 PR middle-end/93829
15188 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
15189 of a pointer in the outermost ADDR_EXPRs.
15191 2020-02-28 Jeff Law <law@redhat.com>
15193 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
15194 * config/v850/v850.c (v850_asm_trampoline_template): Update
15197 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
15200 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
15203 2020-02-28 Martin Liska <mliska@suse.cz>
15206 * configure.ac: Improve detection of ld_date by requiring
15207 either two dashes or none.
15208 * configure: Regenerate.
15210 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15212 PR rtl-optimization/93564
15213 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15214 do not honor reg alloc order.
15216 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
15219 * config/aarch64/aarch64.c (aarch64_override_options): Fix
15220 misleading warning string.
15222 2020-02-27 Martin Sebor <msebor@redhat.com>
15224 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
15226 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
15229 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15230 Split the insn into two parts. This insn only does variable
15231 extract from a register.
15232 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
15233 variable extract from memory.
15234 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
15235 only does variable extract from a register.
15236 (vsx_extract_v4sf_var_load): New insn, do variable extract from
15238 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
15239 into two parts. This insn only does variable extract from a
15241 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
15242 do variable extract from memory.
15244 2020-02-27 Martin Jambor <mjambor@suse.cz>
15245 Feng Xue <fxue@os.amperecomputing.com>
15248 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
15249 new function calls_same_node_or_its_all_contexts_clone_p.
15250 (cgraph_edge_brings_value_p): Use it.
15251 (cgraph_edge_brings_value_p): Likewise.
15252 (self_recursive_pass_through_p): Return false if caller is a clone.
15253 (self_recursive_agg_pass_through_p): Likewise.
15255 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
15257 PR middle-end/92152
15258 * alias.c (ends_tbaa_access_path_p): Break out from ...
15259 (component_uses_parent_alias_set_from): ... here.
15260 * alias.h (ends_tbaa_access_path_p): Declare.
15261 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
15262 handle trailing arrays past end of tbaa access path.
15263 (aliasing_component_refs_p): ... here; likewise.
15264 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
15265 path; disambiguate also past end of it.
15266 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
15269 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
15271 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
15272 beginning of the file.
15273 (vcreate_bf16, vcombine_bf16): New.
15274 (vdup_n_bf16, vdupq_n_bf16): New.
15275 (vdup_lane_bf16, vdup_laneq_bf16): New.
15276 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
15277 (vduph_lane_bf16, vduph_laneq_bf16): New.
15278 (vset_lane_bf16, vsetq_lane_bf16): New.
15279 (vget_lane_bf16, vgetq_lane_bf16): New.
15280 (vget_high_bf16, vget_low_bf16): New.
15281 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
15282 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
15283 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
15284 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
15285 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
15286 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
15287 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
15288 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
15289 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
15290 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
15291 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
15292 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
15293 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
15294 (vreinterpretq_bf16_p128): New.
15295 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
15296 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
15297 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
15298 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
15299 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
15300 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
15301 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
15302 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
15303 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
15304 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
15305 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
15306 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
15307 (vreinterpretq_p128_bf16): New.
15308 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
15309 (V_elem): Likewise.
15310 (V_elem_l): Likewise.
15311 (VD_LANE): Likewise.
15313 (V_DOUBLE): Likewise.
15314 (VDQX): Add V4BF and V8BF.
15315 (V_two_elem, V_three_elem, V_four_elem): Likewise.
15317 (V_HALF): Likewise.
15318 (V_double_vector_mode): Likewise.
15319 (V_cmp_result): Likewise.
15320 (V_uf_sclr): Likewise.
15321 (V_sz_elem): Likewise.
15322 (Is_d_reg): Likewise.
15323 (V_mode_nunits): Likewise.
15324 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
15326 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15328 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
15329 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
15330 (<expander><mode>3<exec>): Likewise.
15331 (<expander><mode>3): New.
15332 (v<expander><mode>3): New.
15333 (<expander><mode>3): New.
15334 (<expander><mode>3<exec>): Rename to ...
15335 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
15336 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
15338 2020-02-27 Alexandre Oliva <oliva@adacore.com>
15340 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
15343 2020-02-27 Richard Biener <rguenther@suse.de>
15345 PR tree-optimization/93508
15346 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
15347 non-_CHK variants. Valueize their length arguments.
15349 2020-02-27 Richard Biener <rguenther@suse.de>
15351 PR tree-optimization/93953
15352 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
15353 to the hash-map entry.
15355 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15357 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
15359 2020-02-27 Mark Williams <mwilliams@fb.com>
15361 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
15362 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
15363 -ffile-prefix-map and -fmacro-prefix-map.
15364 * lto-streamer-out.c: Include file-prefix-map.h.
15365 (lto_output_location): Remap the file part of locations.
15367 2020-02-27 Jakub Jelinek <jakub@redhat.com>
15370 * gimplify.c (gimplify_init_constructor): Don't promote readonly
15371 DECL_REGISTER variables to TREE_STATIC.
15373 PR tree-optimization/93582
15374 PR tree-optimization/93945
15375 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
15376 non-zero INTEGER_CST second argument and ref->offset or ref->size
15377 not a multiple of BITS_PER_UNIT.
15379 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
15381 * doc/install.texi (Binaries): Update description of BullFreeware.
15383 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
15387 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
15388 C++ Language Options, Warning Options, and Static Analyzer
15389 Options lists. Document negative form of options enabled by
15390 default. Move some things around to more accurately sort
15391 warnings by category.
15392 (C++ Dialect Options, Warning Options, Static Analyzer
15393 Options): Document negative form of options when enabled by
15394 default. Move some things around to more accurately sort
15395 warnings by category. Add some missing index entries.
15396 Light copy-editing.
15398 2020-02-26 Carl Love <cel@us.ibm.com>
15401 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
15402 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
15403 for the vector unsigned short arguments. It is also listed as the
15404 name of the built-in for arguments vector unsigned short,
15405 vector unsigned int and vector unsigned long long built-ins. The
15406 name of the builtins for these arguments should be:
15407 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
15408 __builtin_crypto_vpmsumd respectively.
15410 2020-02-26 Richard Biener <rguenther@suse.de>
15412 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
15413 and load permutation.
15415 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
15417 PR middle-end/93843
15418 * optabs-tree.c (supportable_convert_operation): Reject types with
15421 2020-02-26 David Malcolm <dmalcolm@redhat.com>
15423 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
15425 2020-02-26 Jakub Jelinek <jakub@redhat.com>
15427 PR tree-optimization/93820
15428 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
15429 argument to ALL_INTEGER_CST_P boolean.
15430 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
15431 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
15432 adjacent INTEGER_CST store into merged_store->only_constants like
15435 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15438 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
15440 * cfghooks.c (verify_flow_info): Likewise.
15441 * predict.c (combine_predictions_for_bb): Likewise.
15442 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
15443 sucessor -> successor.
15444 (find_traces_1_round): Fix comment typo, destinarion -> destination.
15445 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
15447 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
15448 message typo, sucessors -> successors.
15450 2020-02-25 Martin Sebor <msebor@redhat.com>
15452 * doc/extend.texi (attribute access): Correct an example.
15454 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
15456 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
15458 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
15459 (VAR15, VAR16): New.
15460 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
15461 (VD): Enable for V4BF.
15463 (VQ): Enable for V8BF.
15465 (VQ_NO2E): Likewise.
15466 (VDBL, Vdbl): Add V4BF.
15467 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
15468 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
15469 (bfloat16x8x2_t): Likewise.
15470 (bfloat16x4x3_t): Likewise.
15471 (bfloat16x8x3_t): Likewise.
15472 (bfloat16x4x4_t): Likewise.
15473 (bfloat16x8x4_t): Likewise.
15474 (vcombine_bf16): New.
15475 (vld1_bf16, vld1_bf16_x2): New.
15476 (vld1_bf16_x3, vld1_bf16_x4): New.
15477 (vld1q_bf16, vld1q_bf16_x2): New.
15478 (vld1q_bf16_x3, vld1q_bf16_x4): New.
15479 (vld1_lane_bf16): New.
15480 (vld1q_lane_bf16): New.
15481 (vld1_dup_bf16): New.
15482 (vld1q_dup_bf16): New.
15485 (vld2_dup_bf16): New.
15486 (vld2q_dup_bf16): New.
15489 (vld3_dup_bf16): New.
15490 (vld3q_dup_bf16): New.
15493 (vld4_dup_bf16): New.
15494 (vld4q_dup_bf16): New.
15495 (vst1_bf16, vst1_bf16_x2): New.
15496 (vst1_bf16_x3, vst1_bf16_x4): New.
15497 (vst1q_bf16, vst1q_bf16_x2): New.
15498 (vst1q_bf16_x3, vst1q_bf16_x4): New.
15499 (vst1_lane_bf16): New.
15500 (vst1q_lane_bf16): New.
15508 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
15510 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
15511 (VALL_F16): Likewise.
15512 (VALLDI_F16): Likewise.
15514 (Vetype): Likewise.
15515 (vswap_width_name): Likewise.
15516 (VSWAP_WIDTH): Likewise.
15520 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
15521 (vget_lane_bf16, vgetq_lane_bf16): New.
15522 (vcreate_bf16): New.
15523 (vdup_n_bf16, vdupq_n_bf16): New.
15524 (vdup_lane_bf16, vdup_laneq_bf16): New.
15525 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
15526 (vduph_lane_bf16, vduph_laneq_bf16): New.
15527 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
15528 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
15529 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
15530 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
15531 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
15532 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
15533 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
15534 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
15535 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
15536 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
15537 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
15538 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
15539 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
15540 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
15541 (vreinterpretq_bf16_p128): New.
15542 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
15543 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
15544 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
15545 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
15546 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
15547 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
15548 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
15549 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
15550 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
15551 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
15552 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
15553 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
15554 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
15555 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
15556 (vreinterpretq_p128_bf16): New.
15558 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
15560 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
15561 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
15562 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
15563 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
15564 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
15565 * config/arm/iterators.md (VSF2BF): New attribute.
15566 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
15567 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
15568 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
15570 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
15572 * config/arm/arm.md (required_for_purecode): New attribute.
15573 (enabled): Handle required_for_purecode.
15574 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
15575 work with -mpure-code.
15577 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15579 PR rtl-optimization/93908
15580 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
15583 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
15585 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
15587 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
15589 * doc/install.texi (--enable-checking): Adjust wording.
15591 2020-02-25 Richard Biener <rguenther@suse.de>
15593 PR tree-optimization/93868
15594 * tree-vect-slp.c (slp_copy_subtree): New function.
15595 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
15596 re-arranging stmts in it.
15598 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15600 PR middle-end/93874
15601 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
15602 dummy function and remove it at the end.
15604 PR translation/93864
15605 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
15606 paramter -> parameter.
15607 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
15608 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
15610 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
15612 * doc/install.texi (--enable-checking): Properly document current
15614 (--enable-stage1-checking): Minor clarification about bootstrap.
15616 2020-02-24 David Malcolm <dmalcolm@redhat.com>
15619 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
15620 -fanalyzer-checker=taint is also required.
15621 (-fanalyzer-checker=): Note that providing this option enables the
15622 given checker, and doing so may be required for checkers that are
15623 disabled by default.
15625 2020-02-24 David Malcolm <dmalcolm@redhat.com>
15627 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
15628 significant control flow events; add a "3" which shows all
15629 control flow events; the old "3" becomes "4".
15631 2020-02-24 Jakub Jelinek <jakub@redhat.com>
15633 PR tree-optimization/93582
15634 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
15635 pd.offset and pd.size to be counted in bits rather than bytes, add
15636 support for maxsizei that is not a multiple of BITS_PER_UNIT and
15637 handle bitfield stores and loads.
15638 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
15639 uncomparable quantities - bytes vs. bits. Allow push_partial_def
15640 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
15641 pd.offset/pd.size to be counted in bits rather than bytes.
15642 Formatting fix. Rename shadowed len variable to buflen.
15644 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
15645 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
15648 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
15649 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
15650 * opts-common.c (parse_options_from_collect_gcc_options): New function.
15651 (prepend_xassembler_to_collect_as_options): Likewise.
15652 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
15653 (prepend_xassembler_to_collect_as_options): Likewise.
15654 * lto-opts.c (lto_write_options): Stream assembler options
15655 in COLLECT_AS_OPTIONS.
15656 * lto-wrapper.c (xassembler_options_error): New static variable.
15657 (get_options_from_collect_gcc_options): Move parsing options code to
15658 parse_options_from_collect_gcc_options and call it.
15659 (merge_and_complain): Validate -Xassembler options.
15660 (append_compiler_options): Handle OPT_Xassembler.
15661 (run_gcc): Append command line -Xassembler options to
15662 collect_gcc_options.
15663 * doc/invoke.texi: Add documentation about using Xassembler
15666 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
15668 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
15670 (riscv_rtx_costs): Update cost model for LTGT.
15672 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
15674 PR rtl-optimization/93564
15675 * ira-color.c (struct update_cost_queue_elem): New member start.
15676 (queue_update_cost, get_next_update_cost): Add new arg start.
15677 (allocnos_conflict_p): New function.
15678 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
15679 Add checking conflicts with allocnos_conflict_p.
15680 (update_costs_from_prefs, restore_costs_from_copies): Adjust
15681 update_costs_from_allocno calls.
15682 (update_conflict_hard_regno_costs): Add checking conflicts with
15683 allocnos_conflict_p. Adjust calls of queue_update_cost and
15684 get_next_update_cost.
15685 (assign_hard_reg): Adjust calls of queue_update_cost. Add
15687 (bucket_allocno_compare_func): Restore previous version.
15689 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
15691 * config/pa/pa.c (pa_function_value): Fix check for word and
15692 double-word size when handling aggregate return values.
15693 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
15694 that homogeneous SFmode and DFmode aggregates are passed and returned
15695 in general registers.
15697 2020-02-21 Jakub Jelinek <jakub@redhat.com>
15699 PR translation/93759
15700 * opts.c (print_filtered_help): Translate help before appending
15701 messages to it rather than after that.
15703 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
15705 PR rtl-optimization/PR92989
15706 * lra-lives.c (process_bb_lives): Restore the original order
15707 of the bb liveness update. Call make_hard_regno_dead for each
15708 register clobbered at the start of an EH receiver.
15710 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
15713 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
15714 self-recursively generated.
15716 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
15719 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
15722 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
15724 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
15725 Document new target supports option.
15727 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
15729 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
15730 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
15731 * config/arm/iterators.md (MATMUL): New iterator.
15732 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
15733 (mmla_sfx): New attribute.
15734 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
15735 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
15736 (UNSPEC_MATMUL_US): New.
15738 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
15740 * config/arm/arm.md: Prevent scalar shifts from being used when big
15743 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
15744 Richard Biener <rguenther@suse.de>
15746 PR tree-optimization/93586
15747 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
15748 after mismatched array refs; do not sure type size information to
15749 recover from unmatched referneces with !flag_strict_aliasing_p.
15751 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15753 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
15754 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
15755 (scatter_store<mode>): Rename to ...
15756 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
15757 (scatter<mode>_exec): Delete. Move contents ...
15758 (mask_scatter_store<mode>): ... here, and rename that to ...
15759 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
15760 Remove mode conversion.
15761 (mask_gather_load<mode>): Rename to ...
15762 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
15763 Remove mode conversion.
15764 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
15766 2020-02-21 Martin Jambor <mjambor@suse.cz>
15768 PR tree-optimization/93845
15769 * tree-sra.c (verify_sra_access_forest): Only test access size of
15772 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15774 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
15775 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
15776 (addv64di3_exec): Likewise.
15777 (subv64di3): Likewise.
15778 (subv64di3_exec): Likewise.
15779 (addv64di3_zext): Likewise.
15780 (addv64di3_zext_exec): Likewise.
15781 (addv64di3_zext_dup): Likewise.
15782 (addv64di3_zext_dup_exec): Likewise.
15783 (addv64di3_zext_dup2): Likewise.
15784 (addv64di3_zext_dup2_exec): Likewise.
15785 (addv64di3_sext_dup2): Likewise.
15786 (addv64di3_sext_dup2_exec): Likewise.
15787 (<expander>v64di3): Likewise.
15788 (<expander>v64di3_exec): Likewise.
15789 (*<reduc_op>_dpp_shr_v64di): Likewise.
15790 (*plus_carry_dpp_shr_v64di): Likewise.
15791 * config/gcn/gcn.md (adddi3): Likewise.
15792 (addptrdi3): Likewise.
15793 (<expander>di3): Likewise.
15795 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
15797 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
15799 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15801 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
15802 support. Use aarch64_emit_mult instead of emitting multiplication
15803 instructions directly.
15804 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
15805 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
15807 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15809 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
15810 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
15811 instead of emitting multiplication instructions directly.
15812 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
15813 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
15814 (@aarch64_frecps<mode>): New expanders.
15816 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15818 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
15819 on and produce uint64_ts rather than ints.
15820 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
15821 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
15823 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15825 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
15826 an unused xmsk register when handling approximate rsqrt.
15828 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
15830 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
15831 flag_finite_math_only condition.
15833 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
15836 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
15837 to destination operand for shufps alternative.
15838 (*vec_extractv2si_1): Ditto.
15840 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
15843 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
15846 2020-02-20 Martin Liska <mliska@suse.cz>
15848 PR translation/93831
15849 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
15851 2020-02-20 Martin Liska <mliska@suse.cz>
15853 PR translation/93830
15854 * common/config/avr/avr-common.c: Remote trailing "|".
15856 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
15858 * collect2.c (maybe_run_lto_and_relink): Fix typo in
15861 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
15863 PR tree-optimization/93767
15864 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
15865 access-size bias from the offset calculations for negative strides.
15867 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
15869 * collect2.c (c_file, o_file): Make const again.
15870 (ldout,lderrout, dump_ld_file): Remove.
15871 (tool_cleanup): Avoid calling not signal-safe functions.
15872 (maybe_run_lto_and_relink): Avoid possible signal handler
15873 access to unintialzed memory (lto_o_files).
15874 (main): Avoid leaking temp files in $TMPDIR.
15875 Initialize c_file/o_file with concat, which avoids exposing
15876 uninitialized memory to signal handler, which calls unlink(!).
15877 Avoid calling maybe_unlink when the main function returns,
15878 since the atexit handler is already doing this.
15879 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
15881 2020-02-19 Martin Jambor <mjambor@suse.cz>
15883 PR tree-optimization/93776
15884 * tree-sra.c (create_access): Do not create zero size accesses.
15885 (get_access_for_expr): Do not search for zero sized accesses.
15887 2020-02-19 Martin Jambor <mjambor@suse.cz>
15889 PR tree-optimization/93667
15890 * tree-sra.c (scalarizable_type_p): Return false if record fields
15891 do not follow wach other.
15893 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
15895 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
15896 rather than fmv.x.s/fmv.s.x.
15898 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
15900 * config/aarch64/aarch64-simd-builtins.def
15901 (intrinsic_vec_smult_lo_): New.
15902 (intrinsic_vec_umult_lo_): Likewise.
15903 (vec_widen_smult_hi_): Likewise.
15904 (vec_widen_umult_hi_): Likewise.
15905 * config/aarch64/aarch64-simd.md
15906 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
15907 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
15908 (vmull_high_s16): Likewise.
15909 (vmull_high_s32): Likewise.
15910 (vmull_high_u8): Likewise.
15911 (vmull_high_u16): Likewise.
15912 (vmull_high_u32): Likewise.
15913 (vmull_s8): Likewise.
15914 (vmull_s16): Likewise.
15915 (vmull_s32): Likewise.
15916 (vmull_u8): Likewise.
15917 (vmull_u16): Likewise.
15918 (vmull_u32): Likewise.
15920 2020-02-18 Martin Liska <mliska@suse.cz>
15922 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
15923 bootstrap by missing removal of invalid sanity check.
15925 2020-02-18 Martin Liska <mliska@suse.cz>
15928 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
15929 Always compare LHS of gimple_assign.
15931 2020-02-18 Martin Liska <mliska@suse.cz>
15934 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
15935 and return type of functions.
15936 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
15937 Drop MALLOC attribute for void functions.
15938 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
15939 malloc_state for a new VOID clone.
15941 2020-02-18 Martin Liska <mliska@suse.cz>
15944 * common.opt: Add -fprofile-reproducibility.
15945 * doc/invoke.texi: Document it.
15946 * value-prof.c (dump_histogram_value):
15947 Document and support behavior for counters[0]
15948 being a negative value.
15949 (get_nth_most_common_value): Handle negative
15950 counters[0] in respect to flag_profile_reproducible.
15952 2020-02-18 Jakub Jelinek <jakub@redhat.com>
15955 * cgraph.c (verify_speculative_call): Use speculative_id instead of
15956 speculative_uid in messages. Remove trailing whitespace from error
15957 message. Use num_speculative_call_targets instead of
15958 num_speculative_targets in a message.
15959 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
15960 edge messages and stmt instead of cal_stmt in reference message.
15962 PR tree-optimization/93780
15963 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
15964 before calling build_vector_type.
15965 (execute_update_addresses_taken): Likewise.
15968 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
15969 typo, functoin -> function.
15970 * tree.c (free_lang_data_in_decl): Fix comment typo,
15971 functoin -> function.
15972 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
15974 2020-02-17 David Malcolm <dmalcolm@redhat.com>
15976 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
15978 (print_option_information): Don't call get_option_url if URLs
15981 2020-02-17 Alexandre Oliva <oliva@adacore.com>
15983 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
15984 handling of register_common-less targets.
15986 2020-02-17 Martin Liska <mliska@suse.cz>
15989 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
15991 2020-02-17 Martin Liska <mliska@suse.cz>
15993 PR translation/93755
15994 * config/rs6000/rs6000.c (rs6000_option_override_internal):
15997 2020-02-17 Martin Liska <mliska@suse.cz>
16000 * config/rx/elf.opt: Fix typo.
16002 2020-02-17 Richard Biener <rguenther@suse.de>
16005 * opts-global.c (print_ignored_options): Use inform and
16008 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
16011 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
16013 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
16016 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
16017 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
16019 2020-02-15 Jason Merrill <jason@redhat.com>
16021 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
16023 2020-02-15 Jakub Jelinek <jakub@redhat.com>
16025 PR tree-optimization/93744
16026 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
16027 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
16028 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
16029 sure @2 in the first and @1 in the other patterns has no side-effects.
16031 2020-02-15 David Malcolm <dmalcolm@redhat.com>
16032 Bernd Edlinger <bernd.edlinger@hotmail.de>
16036 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
16037 * configure.ac (--with-diagnostics-urls): New configuration
16038 option, based on --with-diagnostics-color.
16039 (DIAGNOSTICS_URLS_DEFAULT): New define.
16040 * config.h: Regenerate.
16041 * configure: Regenerate.
16042 * diagnostic.c (diagnostic_urls_init): Handle -1 for
16043 DIAGNOSTICS_URLS_DEFAULT from configure-time
16044 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
16045 and TERM_URLS environment variable.
16046 * diagnostic-url.h (diagnostic_url_format): New enum type.
16047 (diagnostic_urls_enabled_p): rename to...
16048 (determine_url_format): ... this, and change return type.
16049 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
16050 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
16051 the linux console, and mingw.
16052 (diagnostic_urls_enabled_p): rename to...
16053 (determine_url_format): ... this, and adjust.
16054 * pretty-print.h (pretty_printer::show_urls): rename to...
16055 (pretty_printer::url_format): ... this, and change to enum.
16056 * pretty-print.c (pretty_printer::pretty_printer,
16057 pp_begin_url, pp_end_url, test_urls): Adjust.
16058 * doc/install.texi (--with-diagnostics-urls): Document the new
16059 configuration option.
16060 (--with-diagnostics-color): Document the existing interaction
16061 with GCC_COLORS better.
16062 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
16063 vindex reference. Update description of defaults based on the above.
16064 (-fdiagnostics-color): Update description of how -fdiagnostics-color
16065 interacts with GCC_COLORS.
16067 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
16070 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
16071 conjunction with TARGET_GNU_TLS in early return.
16073 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
16075 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
16076 the mode is not wider than UNITS_PER_WORD.
16078 2020-02-14 Martin Jambor <mjambor@suse.cz>
16080 PR tree-optimization/93516
16081 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
16082 access of the same type as the parent.
16083 (propagate_subaccesses_from_lhs): Likewise.
16085 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
16088 * config/i386/avx512vbmi2intrin.h
16089 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
16090 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
16091 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
16092 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
16093 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
16094 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
16095 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
16096 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
16097 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
16098 of lacking a closing parenthesis.
16099 * config/i386/avx512vbmi2vlintrin.h
16100 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
16101 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
16102 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
16103 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
16104 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
16105 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
16106 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
16107 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
16108 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
16109 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
16110 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
16111 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
16112 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
16113 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
16114 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
16115 _mm_shldi_epi32, _mm_mask_shldi_epi32,
16116 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
16117 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
16119 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
16122 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
16123 the target function entry.
16125 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16127 * common/config/arc/arc-common.c (arc_option_optimization_table):
16128 Disable if-conversion step when optimized for size.
16130 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16132 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
16133 R12-R15 are always in ARCOMPACT16_REGS register class.
16134 * config/arc/arc.opt (mq-class): Deprecate.
16135 * config/arc/constraint.md ("q"): Remove dependency on mq-class
16137 * doc/invoke.texi (mq-class): Update text.
16138 * common/config/arc/arc-common.c (arc_option_optimization_table):
16141 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16143 * config/arc/arc.c (arc_insn_cost): New function.
16144 (TARGET_INSN_COST): Define.
16145 * config/arc/arc.md (cost): New attribute.
16146 (add_n): Use arc_nonmemory_operand.
16147 (ashlsi3_insn): Likewise, also update constraints.
16148 (ashrsi3_insn): Likewise.
16149 (rotrsi3): Likewise.
16150 (add_shift): Likewise.
16151 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
16153 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16155 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
16157 (umulsidi_600): Likewise.
16159 2020-02-13 Jakub Jelinek <jakub@redhat.com>
16162 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
16163 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
16164 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
16165 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
16166 pass __A to the builtin followed by __W instead of __A followed by
16168 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
16169 _mm512_mask_popcnt_epi64): Likewise.
16170 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
16171 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
16172 _mm256_mask_popcnt_epi64): Likewise.
16174 PR tree-optimization/93582
16175 * fold-const.h (shift_bytes_in_array_left,
16176 shift_bytes_in_array_right): Declare.
16177 * fold-const.c (shift_bytes_in_array_left,
16178 shift_bytes_in_array_right): New function, moved from
16179 gimple-ssa-store-merging.c, no longer static.
16180 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
16181 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
16182 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
16183 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
16184 shift_bytes_in_array.
16185 (verify_shift_bytes_in_array): Rename to ...
16186 (verify_shift_bytes_in_array_left): ... this. Use
16187 shift_bytes_in_array_left instead of shift_bytes_in_array.
16188 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
16189 instead of verify_shift_bytes_in_array.
16190 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
16191 / native_interpret_expr where the store covers all needed bits,
16192 punt on PDP-endian, otherwise allow all involved offsets and sizes
16193 not to be byte-aligned.
16196 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
16197 use const_0_to_255_operand predicate instead of immediate_operand.
16198 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
16199 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
16200 vgf2p8affineinvqb_<mode><mask_name>,
16201 vgf2p8affineqb_<mode><mask_name>): Drop mode from
16202 const_0_to_255_operand predicated operands.
16204 2020-02-12 Jeff Law <law@redhat.com>
16206 * config/h8300/h8300.md (comparison shortening peepholes): Use
16207 a mode iterator to merge the HImode and SImode peepholes.
16209 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16211 PR middle-end/93663
16212 * real.c (is_even): Make static. Function comment fix.
16213 (is_halfway_below): Make static, don't assert R is not inf/nan,
16214 instead return false for those. Small formatting fixes.
16216 2020-02-12 Martin Sebor <msebor@redhat.com>
16218 PR middle-end/93646
16219 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
16220 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
16221 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
16222 (strlen_check_and_optimize_call): Adjust callee name.
16224 2020-02-12 Jeff Law <law@redhat.com>
16226 * config/h8300/h8300.md (comparison shortening peepholes): Drop
16227 (and (xor)) variant. Combine other two into single peephole.
16229 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16231 PR rtl-optimization/93565
16232 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
16234 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16236 * config/aarch64/aarch64-simd.md
16237 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
16238 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
16239 generating separate ADDV and zero_extend patterns.
16240 * config/aarch64/iterators.md (VDQV_E): New iterator.
16242 2020-02-12 Jeff Law <law@redhat.com>
16244 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
16245 expanders, splits, etc.
16246 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
16247 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
16248 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
16249 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
16250 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
16251 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
16252 function prototype.
16253 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
16255 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16258 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
16259 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
16260 TARGET_AVX512DQ from condition.
16261 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
16262 instead of <mask_mode512bit_condition> in condition. If
16263 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
16265 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
16268 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
16271 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
16273 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
16275 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
16276 where strlen is more legible.
16277 (rs6000_builtin_vectorized_libmass): Ditto.
16278 (rs6000_print_options_internal): Ditto.
16280 2020-02-11 Martin Sebor <msebor@redhat.com>
16282 PR tree-optimization/93683
16283 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
16285 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
16287 * config/rs6000/predicates.md (cint34_operand): Rename the
16288 -mprefixed-addr option to be -mprefixed.
16289 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
16290 the -mprefixed-addr option to be -mprefixed.
16291 (OTHER_FUTURE_MASKS): Likewise.
16292 (POWERPC_MASKS): Likewise.
16293 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
16294 the -mprefixed-addr option to be -mprefixed. Change error
16295 messages to refer to -mprefixed.
16296 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
16298 (rs6000_legitimate_offset_address_p): Likewise.
16299 (rs6000_mode_dependent_address): Likewise.
16300 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
16301 "-mprefixed" for target attributes and pragmas.
16302 (address_to_insn_form): Rename the -mprefixed-addr option to be
16304 (rs6000_adjust_insn_length): Likewise.
16305 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
16306 -mprefixed-addr option to be -mprefixed.
16307 (ASM_OUTPUT_OPCODE): Likewise.
16308 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
16309 -mprefixed-addr option to be -mprefixed.
16310 * config/rs6000/rs6000.opt (-mprefixed): Rename the
16311 -mprefixed-addr option to be prefixed. Change the option from
16312 being undocumented to being documented.
16313 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
16314 -mprefixed option. Update the -mpcrel documentation to mention
16317 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
16319 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
16320 including FIRST_PSEUDO_REGISTER - 1.
16321 * ira-color.c (print_hard_reg_set): Ditto.
16323 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16325 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
16326 (USTERNOP_QUALIFIERS): New define.
16327 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
16328 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
16329 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
16330 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
16331 * config/arm/arm_neon.h (vusdot_s32): New.
16332 (vusdot_lane_s32): New.
16333 (vusdotq_lane_s32): New.
16334 (vsudot_lane_s32): New.
16335 (vsudotq_lane_s32): New.
16336 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
16337 * config/arm/iterators.md (DOTPROD_I8MM): New.
16338 (sup, opsuffix): Add <us/su>.
16339 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
16340 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
16342 2020-02-11 Richard Biener <rguenther@suse.de>
16344 PR tree-optimization/93661
16345 PR tree-optimization/93662
16346 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
16347 tree_to_poly_int64.
16348 * tree-sra.c (get_access_for_expr): Likewise.
16350 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16353 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
16354 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
16355 Change condition from TARGET_AVX2 to TARGET_AVX.
16357 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
16360 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
16361 argument of strncmp.
16363 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16365 Try to generate zero-based comparisons.
16366 * config/cris/cris.c (cris_reduce_compare): New function.
16367 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
16368 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
16369 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
16371 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
16374 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
16375 in Thumb state and also as a destination in Arm state. Add T16
16378 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16380 * md.texi (Define Subst): Match closing paren in example.
16382 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16386 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
16387 arguments of strncmp.
16389 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
16392 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
16393 but different source value.
16394 (adjust_callers_for_value_intersection): New function.
16395 (gather_edges_for_value): Adjust order of callers to let a
16396 non-self-recursive caller be the first element.
16397 (self_recursive_pass_through_p): Add a new parameter "simple", and
16398 check generalized self-recursive pass-through jump function.
16399 (self_recursive_agg_pass_through_p): Likewise.
16400 (find_more_scalar_values_for_callers_subset): Compute value from
16401 pass-through jump function for self-recursive.
16402 (intersect_with_plats): Cleanup previous implementation code for value
16403 itersection with self-recursive call edge.
16404 (intersect_with_agg_replacements): Likewise.
16405 (intersect_aggregates_with_edge): Deduce value from pass-through jump
16406 function for self-recursive call edge. Cleanup previous implementation
16407 code for value intersection with self-recursive call edge.
16408 (decide_whether_version_node): Remove dead callers and adjust order
16409 to let a non-self-recursive caller be the first element.
16411 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
16413 * recog.c: Move pass_split_before_sched2 code in front of
16414 pass_split_before_regstack.
16415 (pass_data_split_before_sched2): Rename pass to split3 from split4.
16416 (pass_data_split_before_regstack): Rename pass to split4 from split3.
16417 (rest_of_handle_split_before_sched2): Remove.
16418 (pass_split_before_sched2::execute): Unconditionally call
16420 (enable_split_before_sched2): New function.
16421 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
16422 (pass_split_before_regstack::gate): Ditto.
16423 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
16424 Update name check for renamed split4 pass.
16425 * config/sh/sh.c (register_sh_passes): Update pass insertion
16426 point for renamed split4 pass.
16428 2020-02-09 Jakub Jelinek <jakub@redhat.com>
16430 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
16431 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
16432 copying them around between host and target.
16434 2020-02-08 Andrew Pinski <apinski@marvell.com>
16437 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
16438 STRICT_ALIGNMENT also.
16440 2020-02-08 Jim Wilson <jimw@sifive.com>
16443 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
16445 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
16446 Jakub Jelinek <jakub@redhat.com>
16449 * config/i386/i386.h (CALL_USED_REGISTERS): Make
16450 xmm16-xmm31 call-used even in 64-bit ms-abi.
16452 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
16454 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
16455 (simd_ummla, simd_usmmla): Likewise.
16456 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
16457 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
16458 (vusmmlaq_s32): New.
16460 2020-02-07 Richard Biener <rguenther@suse.de>
16462 PR middle-end/93519
16463 * tree-inline.c (fold_marked_statements): Do a PRE walk,
16464 skipping unreachable regions.
16465 (optimize_inline_calls): Skip folding stmts when we didn't
16468 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
16471 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
16472 Don't return aggregates with only SFmode and DFmode in SSE
16474 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
16476 2020-02-07 Jakub Jelinek <jakub@redhat.com>
16479 * config/rs6000/rs6000-logue.c
16480 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
16481 if it fails, move rs into end_addr and retry. Add
16482 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
16483 the insn pattern doesn't describe well what exactly happens to
16487 * config/i386/predicates.md (avx_identity_operand): Remove.
16488 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
16489 (avx_<castmode><avxsizesuffix>_<castmode>,
16490 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
16491 a VEC_CONCAT of the operand and UNSPEC_CAST.
16492 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
16493 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
16497 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
16498 recog_data.insn if distance_non_agu_define changed it.
16500 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
16503 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
16504 we only had X-FORM (reg+reg) addressing for vectors. Also before
16505 ISA 3.0, we only had X-FORM addressing for scalars in the
16506 traditional Altivec registers.
16508 2020-02-06 <zhongyunde@huawei.com>
16509 Vladimir Makarov <vmakarov@redhat.com>
16511 PR rtl-optimization/93561
16512 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
16513 hard register range.
16515 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16517 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
16520 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
16522 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
16523 where the low and the high 32 bits are equal to each other specially,
16524 with an rldimi instruction.
16526 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
16528 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
16530 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
16532 * config/arm/arm-tables.opt: Regenerate.
16534 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16537 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
16538 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
16539 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
16541 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
16543 PR rtl-optimization/87763
16544 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
16546 2020-02-06 Delia Burduv <delia.burduv@arm.com>
16548 * config/aarch64/aarch64-simd-builtins.def
16549 (bfmlaq): New built-in function.
16550 (bfmlalb): New built-in function.
16551 (bfmlalt): New built-in function.
16552 (bfmlalb_lane): New built-in function.
16553 (bfmlalt_lane): New built-in function.
16554 * config/aarch64/aarch64-simd.md
16555 (aarch64_bfmmlaqv4sf): New pattern.
16556 (aarch64_bfmlal<bt>v4sf): New pattern.
16557 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
16558 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
16559 (vbfmlalbq_f32): New intrinsic.
16560 (vbfmlaltq_f32): New intrinsic.
16561 (vbfmlalbq_lane_f32): New intrinsic.
16562 (vbfmlaltq_lane_f32): New intrinsic.
16563 (vbfmlalbq_laneq_f32): New intrinsic.
16564 (vbfmlaltq_laneq_f32): New intrinsic.
16565 * config/aarch64/iterators.md (BF_MLA): New int iterator.
16566 (bt): New int attribute.
16568 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
16570 * config/i386/i386.md (*pushtf): Emit "#" instead of
16571 calling gcc_unreachable in insn output.
16574 (*pushsf_rex64): Ditto for alternatives other than 1.
16575 (*pushsf): Ditto for alternatives other than 1.
16577 2020-02-06 Martin Liska <mliska@suse.cz>
16579 PR gcov-profile/91971
16580 PR gcov-profile/93466
16581 * coverage.c (coverage_init): Revert mangling of
16582 path into filename. It can lead to huge filename length.
16583 Creation of subfolders seem more natural.
16585 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16588 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
16589 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
16590 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
16592 2020-02-06 Jakub Jelinek <jakub@redhat.com>
16595 * config/i386/predicates.md (avx_identity_operand): New predicate.
16596 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
16597 define_insn_and_split.
16600 * omp-low.c (use_pointer_for_field): For nested constructs, also
16601 look for map clauses on target construct.
16602 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
16603 taskreg_nesting_level.
16606 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
16607 shared clause, call omp_notice_variable on outer context if any.
16609 2020-02-05 Jason Merrill <jason@redhat.com>
16612 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
16613 non-zero address even if weak and not yet defined.
16615 2020-02-05 Martin Sebor <msebor@redhat.com>
16617 PR tree-optimization/92765
16618 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
16619 * tree-ssa-strlen.c (compute_string_length): Remove.
16620 (determine_min_objsize): Remove.
16621 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
16622 Avoid using type size as the upper bound on string length.
16623 (handle_builtin_string_cmp): Add an argument. Adjust.
16624 (strlen_check_and_optimize_call): Pass additional argument to
16625 handle_builtin_string_cmp.
16627 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
16629 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
16630 (*pushdi2_rex64 peephole2): Unconditionally split after
16631 epilogue_completed.
16632 (*ashl<mode>3_doubleword): Ditto.
16633 (*<shift_insn><mode>3_doubleword): Ditto.
16635 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
16638 * config/rs6000/rs6000.c (get_vector_offset): Fix
16640 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
16642 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
16644 2020-02-05 David Malcolm <dmalcolm@redhat.com>
16646 * doc/analyzer.texi
16647 (Special Functions for Debugging the Analyzer): Update description
16648 of __analyzer_dump_exploded_nodes.
16650 2020-02-05 Jakub Jelinek <jakub@redhat.com>
16653 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
16654 include sets and not clobbers in the vzeroupper pattern.
16655 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
16656 the parallel has 17 (64-bit) or 9 (32-bit) elts.
16657 (*avx_vzeroupper_1): New define_insn_and_split.
16660 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
16661 don't run when !optimize.
16662 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
16665 2020-02-05 Richard Biener <rguenther@suse.de>
16667 PR middle-end/90648
16668 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
16669 checks before matching calls.
16671 2020-02-05 Jakub Jelinek <jakub@redhat.com>
16673 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
16674 function comment typo.
16676 PR middle-end/93555
16677 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
16678 simd_clone_create failed when i == 0, adjust clone->nargs by
16681 2020-02-05 Martin Liska <mliska@suse.cz>
16684 * doc/invoke.texi: Document that one should
16685 not combine ASLR and -fpch.
16687 2020-02-04 Richard Biener <rguenther@suse.de>
16689 PR tree-optimization/93538
16690 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
16692 2020-02-04 Richard Biener <rguenther@suse.de>
16694 PR tree-optimization/91123
16695 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
16696 (vn_walk_cb_data::last_vuse): New member.
16697 (vn_walk_cb_data::saved_operands): Likewsie.
16698 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
16699 (vn_walk_cb_data::push_partial_def): Use finish.
16700 (vn_reference_lookup_2): Update last_vuse and use finish if
16701 we've saved operands.
16702 (vn_reference_lookup_3): Use finish and update calls to
16703 push_partial_defs everywhere. When translating through
16704 memcpy or aggregate copies save off operands and alias-set.
16705 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
16706 operation for redundant store removal.
16708 2020-02-04 Richard Biener <rguenther@suse.de>
16710 PR tree-optimization/92819
16711 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
16712 generating more stmts than before.
16714 2020-02-04 Martin Liska <mliska@suse.cz>
16716 * config/arm/arm.c (arm_gen_far_branch): Move the function
16717 outside of selftests.
16719 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16721 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
16722 function to adjust PC-relative vector addresses.
16723 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
16724 handle vectors with PC-relative addresses.
16726 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16728 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
16730 (hard_reg_and_mode_to_addr_mask): Delete.
16731 (rs6000_adjust_vec_address): If the original vector address
16732 was REG+REG or REG+OFFSET and the element is not zero, do the add
16733 of the elements in the original address before adding the offset
16734 for the vector element. Use address_to_insn_form to validate the
16735 address using the register being loaded, rather than guessing
16736 whether the address is a DS-FORM or DQ-FORM address.
16738 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16740 * config/rs6000/rs6000.c (get_vector_offset): New helper function
16741 to calculate the offset in memory from the start of a vector of a
16742 particular element. Add code to keep the element number in
16743 bounds if the element number is variable.
16744 (rs6000_adjust_vec_address): Move calculation of offset of the
16745 vector element to get_vector_offset.
16746 (rs6000_split_vec_extract_var): Do not do the initial AND of
16747 element here, move the code to get_vector_offset.
16749 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
16751 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
16754 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
16756 * config/rs6000/constraints.md: Improve documentation.
16758 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
16761 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
16762 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
16764 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
16766 * config.gcc: Remove "carrizo" support.
16767 * config/gcn/gcn-opts.h (processor_type): Likewise.
16768 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
16769 * config/gcn/gcn.opt (gpu_type): Likewise.
16770 * config/gcn/t-omp-device: Likewise.
16772 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16775 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
16776 * config/arm/arm.c (arm_gen_far_branch): New function
16777 arm_gen_far_branch.
16778 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
16780 2020-02-03 Julian Brown <julian@codesourcery.com>
16781 Tobias Burnus <tobias@codesourcery.com>
16783 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
16785 2020-02-03 Jakub Jelinek <jakub@redhat.com>
16788 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
16789 valid RTL to sum up the lowest and second lowest bytes of the popcnt
16792 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
16794 PR rtl-optimization/91333
16795 * ira-color.c (struct allocno_color_data): Add member
16797 (init_allocno_threads): Set the member up.
16798 (bucket_allocno_compare_func): Add compare hard reg
16801 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
16803 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
16805 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
16806 * config.in: Regenerated.
16807 * configure: Regenerated.
16808 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
16809 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
16810 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
16812 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
16814 * configure: Regenerate.
16816 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
16818 PR rtl-optimization/91333
16819 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
16820 reg preferences comparison up.
16822 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
16824 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
16825 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
16826 aarch64-sve-builtins-base.h.
16827 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
16828 aarch64-sve-builtins-base.cc.
16829 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
16830 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16831 (svcvtnt): Declare.
16832 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
16833 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16834 (svcvtnt): New functions.
16835 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
16836 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
16837 (svcvtnt): New functions.
16838 (svcvt): Add a form that converts f32 to bf16.
16839 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
16840 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
16842 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
16843 Treat B as bfloat16_t.
16844 (ternary_bfloat_lane_base): New class.
16845 (ternary_bfloat_def): Likewise.
16846 (ternary_bfloat): New shape.
16847 (ternary_bfloat_lane_def): New class.
16848 (ternary_bfloat_lane): New shape.
16849 (ternary_bfloat_lanex2_def): New class.
16850 (ternary_bfloat_lanex2): New shape.
16851 (ternary_bfloat_opt_n_def): New class.
16852 (ternary_bfloat_opt_n): New shape.
16853 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
16854 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
16855 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
16856 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
16857 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
16858 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
16859 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
16860 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
16861 the pattern off the narrow mode instead of the wider one.
16862 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
16863 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
16864 (sve_fp_op): Handle them.
16865 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
16866 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
16868 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
16870 * config/aarch64/arm_sve.h: Include arm_bf16.h.
16871 * config/aarch64/aarch64-modes.def (BF): Move definition before
16872 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
16873 (SVE_MODES): Handle BF modes.
16874 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
16876 (aarch64_full_sve_mode): Likewise.
16877 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
16879 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
16880 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
16881 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
16882 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
16884 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
16886 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
16887 (TYPES_all_data): Add bf16.
16888 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
16889 (register_tuple_type): Increase buffer size.
16890 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
16891 (bf16): New type suffix.
16892 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
16893 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
16894 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
16895 Change type from all_data to all_arith.
16896 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
16897 (svminp): Likewise.
16899 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
16900 Matthew Malcomson <matthew.malcomson@arm.com>
16901 Richard Sandiford <richard.sandiford@arm.com>
16903 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
16904 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
16905 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
16906 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
16907 __ARM_FEATURE_MATMUL_FP64.
16908 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
16909 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
16910 be disabled at the same time.
16911 (f32mm): New extension.
16912 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
16913 (AARCH64_FL_F64MM): Bump to the next bit up.
16914 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
16915 (TARGET_SVE_F64MM): New macros.
16916 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
16917 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
16918 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
16919 (UNSPEC_ZIP2Q): New unspeccs.
16920 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
16921 (optab, sur, perm_insn): Handle the new unspecs.
16922 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
16923 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
16924 TARGET_SVE_F64MM instead of separate tests.
16925 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
16926 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
16927 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
16928 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
16929 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
16930 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
16931 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
16932 (TYPES_s_signed): New macro.
16933 (TYPES_s_integer): Use it.
16934 (TYPES_d_float): New macro.
16935 (TYPES_d_data): Use it.
16936 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
16937 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
16938 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
16939 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
16940 (svmmla): New shape.
16941 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
16942 template parameters.
16943 (ternary_resize2_lane_base): Likewise.
16944 (ternary_resize2_base): New class.
16945 (ternary_qq_lane_base): Likewise.
16946 (ternary_intq_uintq_lane_def): Likewise.
16947 (ternary_intq_uintq_lane): New shape.
16948 (ternary_intq_uintq_opt_n_def): New class
16949 (ternary_intq_uintq_opt_n): New shape.
16950 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
16951 (ternary_uintq_intq_def): New class.
16952 (ternary_uintq_intq): New shape.
16953 (ternary_uintq_intq_lane_def): New class.
16954 (ternary_uintq_intq_lane): New shape.
16955 (ternary_uintq_intq_opt_n_def): New class.
16956 (ternary_uintq_intq_opt_n): New shape.
16957 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
16958 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
16959 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
16960 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
16962 (svdotprod_lane_impl): ...this new class.
16963 (svmmla_impl, svusdot_impl): New classes.
16964 (svdot_lane): Update to use svdotprod_lane_impl.
16965 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
16966 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
16968 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
16969 function, with no types defined.
16970 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
16971 AARCH64_FL_I8MM functions.
16972 (svmmla): New AARCH64_FL_F32MM function.
16973 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
16974 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
16975 AARCH64_FL_F64MM function.
16976 (REQUIRED_EXTENSIONS):
16978 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
16980 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
16983 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
16985 * config/i386/i386.md (*movoi_internal_avx): Do not check for
16986 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
16987 (*movti_internal): Do not check for
16988 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
16989 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
16990 just after check for TARGET_AVX.
16991 (*movdf_internal): Ditto.
16992 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
16993 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
16994 * config/i386/sse.md (mov<mode>_internal): Only check
16995 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
16996 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
16997 (<sse>_andnot<mode>3<mask_name>): Move check for
16998 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
16999 (<code><mode>3<mask_name>): Ditto.
17000 (*andnot<mode>3): Ditto.
17001 (*andnottf3): Ditto.
17002 (*<code><mode>3): Ditto.
17003 (*<code>tf3): Ditto.
17004 (*andnot<VI:mode>3): Remove
17005 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
17006 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
17007 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
17008 (sse4_1_blendv<ssemodesuffix>): Ditto.
17009 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
17010 Explain that tune applies to 128bit instructions only.
17012 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
17014 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
17015 to definition of hsa_kernel_description. Parse assembly to find SGPR
17016 and VGPR count of kernel and store in hsa_kernel_description.
17018 2020-01-31 Tamar Christina <tamar.christina@arm.com>
17020 PR rtl-optimization/91838
17021 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
17022 to truncate if allowed or reject combination.
17024 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
17026 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
17027 (find_inv_vars_cb): Likewise.
17029 2020-01-31 David Malcolm <dmalcolm@redhat.com>
17031 * calls.c (special_function_p): Split out the check for DECL_NAME
17032 being non-NULL and fndecl being extern at file scope into a
17033 new maybe_special_function_p and call it. Drop check for fndecl
17034 being non-NULL that was after a usage of DECL_NAME (fndecl).
17035 * tree.h (maybe_special_function_p): New inline function.
17037 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
17039 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
17040 (mask_gather_load<mode>): ... here, and zero-initialize the
17042 (maskload<mode>di): Zero-initialize the destination.
17043 * config/gcn/gcn.c:
17045 2020-01-30 David Malcolm <dmalcolm@redhat.com>
17048 * doc/analyzer.texi (Limitations): Note that constraints on
17049 floating-point values are currently ignored.
17051 2020-01-30 Jakub Jelinek <jakub@redhat.com>
17054 * symtab.c (symtab_node::noninterposable_alias): If localalias
17055 already exists, but is not usable, append numbers after it until
17056 a unique name is found. Formatting fix.
17058 PR middle-end/93505
17059 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
17062 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
17064 * config/gcn/gcn.c (print_operand): Handle LTGT.
17065 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
17067 2020-01-30 Richard Biener <rguenther@suse.de>
17069 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
17070 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
17072 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
17074 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
17075 without a DECL in .data.rel.ro.local.
17077 2020-01-30 Jakub Jelinek <jakub@redhat.com>
17080 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
17084 * config/i386/sse.md
17085 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
17086 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
17087 any_extend code iterator instead of always zero_extend.
17088 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
17089 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
17090 Use any_extend code iterator instead of always zero_extend.
17091 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
17092 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
17093 Use any_extend code iterator instead of always zero_extend.
17094 (*sse2_pmovmskb_ext): New define_insn.
17095 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
17098 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
17099 (*popcountsi2_zext_falsedep): New define_insn.
17101 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17103 * config.in: Regenerated.
17104 * configure: Regenerated.
17106 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
17109 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
17110 LLVM's assembler changed the default in version 9.
17112 2020-01-24 Jeff Law <law@redhat.com>
17114 PR tree-optimization/89689
17115 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
17117 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
17121 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17123 PR rtl-optimization/87763
17124 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
17125 simplification to handle subregs as well as bare regs.
17126 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
17128 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
17131 * ira.c (ira): Revert use of simplified LRA algorithm.
17133 2020-01-29 Martin Jambor <mjambor@suse.cz>
17135 PR tree-optimization/92706
17136 * tree-sra.c (struct access): Fields first_link, last_link,
17137 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
17138 next_rhs_queued and grp_rhs_queued respectively, new fields
17139 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
17140 (struct assign_link): Field next renamed to next_rhs, new field
17141 next_lhs. Updated comment.
17142 (work_queue_head): Renamed to rhs_work_queue_head.
17143 (lhs_work_queue_head): New variable.
17144 (add_link_to_lhs): New function.
17145 (relink_to_new_repr): Also relink LHS lists.
17146 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
17147 (add_access_to_lhs_work_queue): New function.
17148 (pop_access_from_work_queue): Renamed to
17149 pop_access_from_rhs_work_queue.
17150 (pop_access_from_lhs_work_queue): New function.
17151 (build_accesses_from_assign): Also add links to LHS lists and to LHS
17153 (child_would_conflict_in_lacc): Renamed to
17154 child_would_conflict_in_acc. Adjusted parameter names.
17155 (create_artificial_child_access): New parameter set_grp_read, use it.
17156 (subtree_mark_written_and_enqueue): Renamed to
17157 subtree_mark_written_and_rhs_enqueue.
17158 (propagate_subaccesses_across_link): Renamed to
17159 propagate_subaccesses_from_rhs.
17160 (propagate_subaccesses_from_lhs): New function.
17161 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
17164 2020-01-29 Martin Jambor <mjambor@suse.cz>
17166 PR tree-optimization/92706
17167 * tree-sra.c (struct access): Adjust comment of
17168 grp_total_scalarization.
17169 (find_access_in_subtree): Look for single children spanning an entire
17171 (scalarizable_type_p): Allow register accesses, adjust callers.
17172 (completely_scalarize): Remove function.
17173 (scalarize_elem): Likewise.
17174 (create_total_scalarization_access): Likewise.
17175 (sort_and_splice_var_accesses): Do not track total scalarization
17177 (analyze_access_subtree): New parameter totally, adjust to new meaning
17178 of grp_total_scalarization.
17179 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
17180 (can_totally_scalarize_forest_p): New function.
17181 (create_total_scalarization_access): Likewise.
17182 (create_total_access_and_reshape): Likewise.
17183 (total_should_skip_creating_access): Likewise.
17184 (totally_scalarize_subtree): Likewise.
17185 (analyze_all_variable_accesses): Perform total scalarization after
17186 subaccess propagation using the new functions above.
17187 (initialize_constant_pool_replacements): Output initializers by
17188 traversing the access tree.
17190 2020-01-29 Martin Jambor <mjambor@suse.cz>
17192 * tree-sra.c (verify_sra_access_forest): New function.
17193 (verify_all_sra_access_forests): Likewise.
17194 (create_artificial_child_access): Set parent.
17195 (analyze_all_variable_accesses): Call the verifier.
17197 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17199 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
17200 if called on indirect edge.
17201 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
17202 speculative call if needed.
17204 2020-01-29 Richard Biener <rguenther@suse.de>
17206 PR tree-optimization/93428
17207 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
17208 permutation when the load node is created.
17209 (vect_analyze_slp_instance): Re-use it here.
17211 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17213 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
17215 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
17217 PR rtl-optimization/93272
17218 * ira-lives.c (process_out_of_region_eh_regs): New function.
17219 (process_bb_node_lives): Call it.
17221 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17223 * coverage.c (read_counts_file): Make error message lowercase.
17225 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17227 * profile-count.c (profile_quality_display_names): Fix ordering.
17229 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17232 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
17233 hash only when edge is first within the sequence.
17234 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
17235 (symbol_table::create_edge): Do not set target_prob.
17236 (cgraph_edge::remove_caller): Watch for speculative calls when updating
17237 the call site hash.
17238 (cgraph_edge::make_speculative): Drop target_prob parameter.
17239 (cgraph_edge::speculative_call_info): Remove.
17240 (cgraph_edge::first_speculative_call_target): New member function.
17241 (update_call_stmt_hash_for_removing_direct_edge): New function.
17242 (cgraph_edge::resolve_speculation): Rewrite to new API.
17243 (cgraph_edge::speculative_call_for_target): New member function.
17244 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
17245 multiple speculation targets.
17246 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
17248 (verify_speculative_call): Verify that targets form an interval.
17249 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
17250 (cgraph_edge::first_speculative_call_target): New member function.
17251 (cgraph_edge::next_speculative_call_target): New member function.
17252 (cgraph_edge::speculative_call_target_ref): New member function.
17253 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
17254 (cgraph_edge): Remove target_prob.
17255 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17256 Fix handling of speculative calls.
17257 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
17258 * ipa-fnsummary.c (analyze_function_body): Likewise.
17259 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
17260 * ipa-profile.c (dump_histogram): Fix formating.
17261 (ipa_profile_generate_summary): Watch for overflows.
17262 (ipa_profile): Do not require probablity to be 1/2; update to new API.
17263 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
17264 (update_indirect_edges_after_inlining): Update to new API.
17265 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
17267 * profile-count.h: (profile_probability::adjusted): New.
17268 * tree-inline.c (copy_bb): Update to new speculative call API; fix
17269 updating of profile.
17270 * value-prof.c (gimple_ic_transform): Rename to ...
17271 (dump_ic_profile): ... this one; update dumping.
17272 (stream_in_histogram_value): Fix formating.
17273 (gimple_value_profile_transformations): Update.
17275 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17278 * config/i386/i386.md (*movoi_internal_avx): Remove
17279 TARGET_SSE_TYPELESS_STORES check.
17280 (*movti_internal): Prefer TARGET_AVX over
17281 TARGET_SSE_TYPELESS_STORES.
17282 (*movtf_internal): Likewise.
17283 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
17284 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
17285 from TARGET_SSE_TYPELESS_STORES.
17287 2020-01-28 David Malcolm <dmalcolm@redhat.com>
17289 * diagnostic-core.h (warning_at): Rename overload to...
17290 (warning_meta): ...this.
17291 (emit_diagnostic_valist): Delete decl of overload taking
17292 diagnostic_metadata.
17293 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
17294 (warning_at): Rename overload taking diagnostic_metadata to...
17295 (warning_meta): ...this.
17297 2020-01-28 Richard Biener <rguenther@suse.de>
17299 PR tree-optimization/93439
17300 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
17301 * tree-cfg.c (move_sese_region_to_fn): ... here.
17302 (verify_types_in_gimple_reference): Verify used cliques are
17305 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17308 * config/i386/i386-options.c (set_ix86_tune_features): Add an
17309 argument of a pointer to struct gcc_options and pass it to
17310 parse_mtune_ctrl_str.
17311 (ix86_function_specific_restore): Pass opts to
17312 set_ix86_tune_features.
17313 (ix86_option_override_internal): Likewise.
17314 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
17315 gcc_options and use it for x_ix86_tune_ctrl_string.
17317 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17319 PR rtl-optimization/87763
17320 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
17321 simplification to handle subregs as well as bare regs.
17322 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
17324 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17326 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
17327 for reduction chains that (now) include a call.
17329 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17331 PR tree-optimization/92822
17332 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
17333 out the don't-care elements of a vector whose significant elements
17334 are duplicates, make the don't-care elements duplicates too.
17336 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17338 PR tree-optimization/93434
17339 * tree-predcom.c (split_data_refs_to_components): Record which
17340 components have had aliasing loads removed. Prevent store-store
17341 commoning for all such components.
17343 2020-01-28 Jakub Jelinek <jakub@redhat.com>
17346 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
17347 -1 or is_vshift is true, use new_vector with number of elts npatterns
17348 rather than new_unary_operation.
17350 PR tree-optimization/93454
17351 * gimple-fold.c (fold_array_ctor_reference): Perform
17352 elt_size.to_uhwi () just once, instead of calling it in every
17353 iteration. Punt if that value is above size of the temporary
17354 buffer. Decrease third native_encode_expr argument when
17355 bufoff + elt_sz is above size of buf.
17357 2020-01-27 Joseph Myers <joseph@codesourcery.com>
17359 * config/mips/mips.c (mips_declare_object_name)
17360 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
17362 2020-01-27 Martin Liska <mliska@suse.cz>
17364 PR gcov-profile/93403
17365 * tree-profile.c (gimple_init_gcov_profiler): Generate
17366 both __gcov_indirect_call_profiler_v4 and
17367 __gcov_indirect_call_profiler_v4_atomic.
17369 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17372 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
17374 (@aarch64_split_simd_mov<mode>): Use it.
17375 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
17376 Leave the vec_extract patterns to handle 2-element vectors.
17377 (aarch64_simd_mov_from_<mode>high): Likewise.
17378 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
17379 (vec_extractv2dfv1df): Likewise.
17381 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17383 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
17384 jump conditions for *compare_condjump<GPI:mode>.
17386 2020-01-27 David Malcolm <dmalcolm@redhat.com>
17389 * digraph.cc (test_edge::test_edge): Specify template for base
17392 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17394 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
17396 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17398 * config/arc/arc-protos.h (gen_mlo): Remove.
17399 (gen_mhi): Likewise.
17400 * config/arc/arc.c (AUX_MULHI): Define.
17401 (arc_must_save_reister): Special handling for r58/59.
17402 (arc_compute_frame_size): Consider mlo/mhi registers.
17403 (arc_save_callee_saves): Emit fp/sp move only when emit_move
17405 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
17406 mlo/mhi name selection.
17407 (arc_restore_callee_saves): Don't early restore blink when ISR.
17408 (arc_expand_prologue): Add mlo/mhi saving.
17409 (arc_expand_epilogue): Add mlo/mhi restoring.
17412 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
17413 numbering when MUL64 option is used.
17414 (DWARF2_FRAME_REG_OUT): Define.
17415 * config/arc/arc.md (arc600_stall): New pattern.
17416 (VUNSPEC_ARC_ARC600_STALL): Define.
17417 (mulsi64): Use correct mlo/mhi registers.
17418 (mulsi_600): Clean it up.
17419 * config/arc/predicates.md (mlo_operand): Remove any dependency on
17421 (mhi_operand): Likewise.
17423 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17424 Petro Karashchenko <petro.karashchenko@ring.com>
17426 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
17427 attributes if needed.
17428 (prepare_move_operands): Generate special unspec instruction for
17430 (arc_isuncached_mem_p): Propagate uncached attribute to each
17432 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
17433 (VUNSPEC_ARC_STDI): Likewise.
17434 (ALLI): New mode iterator.
17435 (mALLI): New mode attribute.
17436 (lddi): New instruction pattern.
17438 (stdidi_split): Split instruction for architectures which are not
17439 supporting ll64 option.
17440 (lddidi_split): Likewise.
17442 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17444 PR rtl-optimization/92989
17445 * lra-lives.c (process_bb_lives): Update the live-in set before
17446 processing additional clobbers.
17448 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17450 PR rtl-optimization/93170
17451 * cselib.c (cselib_invalidate_regno_val): New function, split out
17453 (cselib_invalidate_regno): ...here.
17454 (cselib_invalidated_by_call_p): New function.
17455 (cselib_process_insn): Iterate over all the hard-register entries in
17456 REG_VALUES and invalidate any that cross call-clobbered registers.
17458 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17460 * dojump.c (split_comparison): Use HONOR_NANS rather than
17461 HONOR_SNANS when splitting LTGT.
17463 2020-01-27 Martin Liska <mliska@suse.cz>
17466 * opts.c (print_filtered_help): Exclude language-specific
17467 options from --help=common unless enabled in all FEs.
17469 2020-01-27 Martin Liska <mliska@suse.cz>
17471 * opts.c (print_help): Exclude params from
17472 all except --help=param.
17474 2020-01-27 Martin Liska <mliska@suse.cz>
17477 * config/i386/i386-features.c (make_resolver_func):
17478 Align the code with ppc64 target implementation.
17479 Do not generate a unique name for resolver function.
17481 2020-01-27 Richard Biener <rguenther@suse.de>
17483 PR tree-optimization/93397
17484 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
17485 converted reduction chain SLP graph adjustment.
17487 2020-01-26 Marek Polacek <polacek@redhat.com>
17490 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
17493 2020-01-26 Jason Merrill <jason@redhat.com>
17496 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
17499 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
17501 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
17502 (rx_setmem): Likewise.
17504 2020-01-26 Jakub Jelinek <jakub@redhat.com>
17507 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
17508 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
17509 drop <di> from constraint of last operand.
17512 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
17513 TARGET_AVX2 and V4DFmode not in the split condition, but in the
17514 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
17516 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
17519 * ipa-cp.c (get_info_about_necessary_edges): Remove value
17522 2020-01-24 Jeff Law <law@redhat.com>
17524 PR tree-optimization/92788
17525 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
17528 2020-01-24 Jakub Jelinek <jakub@redhat.com>
17531 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
17532 *avx_vperm_broadcast_<mode>,
17533 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
17534 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
17535 Move before avx2_perm<mode>/avx512f_perm<mode>.
17538 * simplify-rtx.c (simplify_const_unary_operation,
17539 simplify_const_binary_operation): Punt for mode precision above
17540 MAX_BITSIZE_MODE_ANY_INT.
17542 2020-01-24 Andrew Pinski <apinski@marvell.com>
17544 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
17545 alu.shift_reg to 0.
17547 2020-01-24 Jeff Law <law@redhat.com>
17550 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
17551 for REGs. Call output_operand_lossage to get more reasonable
17554 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
17556 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
17557 gcn_fp_compare_operator.
17558 (vec_cmpu<mode>di): Use gcn_compare_operator.
17559 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
17560 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
17561 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
17562 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
17563 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
17564 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
17565 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
17566 gcn_fp_compare_operator.
17567 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
17568 gcn_fp_compare_operator.
17569 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
17570 gcn_fp_compare_operator.
17571 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
17572 gcn_fp_compare_operator.
17574 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
17576 * doc/install.texi (Cross-Compiler-Specific Options): Document
17577 `--with-toolexeclibdir' option.
17579 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
17581 * target.def (flags_regnum): Also mention effect on delay slot filling.
17582 * doc/tm.texi: Regenerate.
17584 2020-01-23 Jeff Law <law@redhat.com>
17586 PR translation/90162
17587 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
17589 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
17592 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
17595 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17597 PR rtl-optimization/93402
17598 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
17601 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17603 * config.in: Regenerated.
17604 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
17605 for TARGET_LIBC_GNUSTACK.
17606 * configure: Regenerated.
17607 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
17608 found to be 2.31 or greater.
17610 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17612 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
17614 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
17615 (mips_asm_file_end): New function. Delegate to
17616 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
17617 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
17619 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17622 * config/i386/i386-modes.def (POImode): New mode.
17623 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
17624 * config/i386/i386.md (DPWI): New mode attribute.
17625 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
17626 (QWI): Rename to...
17627 (QPWI): ... this. Use POI instead of OI for TImode.
17628 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
17629 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
17632 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17635 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
17637 (speculation_tracker_rev): New pattern.
17638 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
17639 Use speculation_tracker_rev to track the inverse condition.
17641 2020-01-23 Richard Biener <rguenther@suse.de>
17643 PR tree-optimization/93381
17644 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
17645 alias-set of the def as argument and record the first one.
17646 (vn_walk_cb_data::first_set): New member.
17647 (vn_reference_lookup_3): Pass the alias-set of the current def
17648 to push_partial_def. Fix alias-set used in the aggregate copy
17650 (vn_reference_lookup): Consistently set *last_vuse_ptr.
17651 * real.c (clear_significand_below): Fix out-of-bound access.
17653 2020-01-23 Jakub Jelinek <jakub@redhat.com>
17656 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
17657 New define_insn patterns.
17659 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17661 * doc/sourcebuild.texi (check-function-bodies): Add an
17662 optional target/xfail selector.
17664 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
17666 PR rtl-optimization/93124
17667 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
17668 bare USE and CLOBBER insns.
17670 2020-01-22 Andrew Pinski <apinski@marvell.com>
17672 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
17674 2020-01-22 David Malcolm <dmalcolm@redhat.com>
17677 * gdbinit.in (break-on-saved-diagnostic): Update for move of
17678 diagnostic_manager into "ana" namespace.
17679 * selftest-run-tests.c (selftest::run_tests): Update for move of
17680 selftest::run_analyzer_selftests to
17681 ana::selftest::run_analyzer_selftests.
17683 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
17685 * cfgexpand.c (union_stack_vars): Update the size.
17687 2020-01-22 Richard Biener <rguenther@suse.de>
17689 PR tree-optimization/93381
17690 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
17691 throughout, handle all conversions the same.
17693 2020-01-22 Jakub Jelinek <jakub@redhat.com>
17696 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
17697 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
17698 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
17699 Call force_reg on high_in2 unconditionally.
17701 2020-01-22 Martin Liska <mliska@suse.cz>
17703 PR tree-optimization/92924
17704 * profile.c (compute_value_histograms): Divide
17705 all counter values.
17707 2020-01-22 Jakub Jelinek <jakub@redhat.com>
17710 * output.h (assemble_name_resolve): Declare.
17711 * varasm.c (assemble_name_resolve): New function.
17712 (assemble_name): Use it.
17713 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
17715 2020-01-22 Joseph Myers <joseph@codesourcery.com>
17717 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
17718 update_web_docs_git instead of update_web_docs_svn.
17720 2020-01-21 Andrew Pinski <apinski@marvell.com>
17723 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
17724 as PTR mode. Have operand 1 as being modeless, it can be P mode.
17725 (*tlsgd_small_<mode>): Likewise.
17726 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
17727 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
17728 register. Convert that register back to dest using convert_mode.
17730 2020-01-21 Jim Wilson <jimw@sifive.com>
17732 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
17735 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
17736 Uros Bizjak <ubizjak@gmail.com>
17739 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
17741 (legitimize_tls_address): Do GNU2 TLS address computation in
17742 ptr_mode and zero-extend result to Pmode.
17743 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
17744 :P with :PTR and Pmode with ptr_mode.
17745 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
17746 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
17747 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
17749 2020-01-21 Jakub Jelinek <jakub@redhat.com>
17752 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
17753 the last two operands are CONST_INT_P before using them as such.
17755 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
17757 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
17758 to get the integer element types.
17760 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
17762 * config/aarch64/aarch64-sve-builtins.h
17763 (function_expander::convert_to_pmode): Declare.
17764 * config/aarch64/aarch64-sve-builtins.cc
17765 (function_expander::convert_to_pmode): New function.
17766 (function_expander::get_contiguous_base): Use it.
17767 (function_expander::prepare_gather_address_operands): Likewise.
17768 * config/aarch64/aarch64-sve-builtins-sve2.cc
17769 (svwhilerw_svwhilewr_impl::expand): Likewise.
17771 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
17774 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
17775 cfun->machine->label_is_assembled.
17776 (aarch64_print_patchable_function_entry): New.
17777 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
17778 * config/aarch64/aarch64.h (struct machine_function): New field,
17779 label_is_assembled.
17781 2020-01-21 David Malcolm <dmalcolm@redhat.com>
17784 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
17787 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17790 * cgraph.c (cgraph_edge::resolve_speculation,
17791 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
17792 call_stmt_site_hash.
17794 2020-01-21 Martin Liska <mliska@suse.cz>
17796 * config/rs6000/rs6000.c (common_mode_defined): Remove
17799 2020-01-21 Richard Biener <rguenther@suse.de>
17801 PR tree-optimization/92328
17802 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
17803 type when value-numbering same-sized store by inserting a
17805 (eliminate_dom_walker::eliminate_stmt): When eliminating
17806 a redundant store handle bit-reinterpretation of the same value.
17808 2020-01-21 Andrew Pinski <apinski@marvel.com>
17811 * tree-into-ssa.c (prepare_block_for_update_1): Split out
17813 (prepare_block_for_update): This. Use a worklist instead of
17816 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17818 * config/arm/arm.c (clear_operation_p):
17819 Initialise last_regno, skip first iteration
17820 based on the first_set value and use ints instead
17821 of the unnecessary HOST_WIDE_INTs.
17823 2020-01-21 Jakub Jelinek <jakub@redhat.com>
17826 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
17827 compare_mode other than SFmode or DFmode.
17829 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
17832 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
17833 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
17834 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
17836 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
17838 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
17840 2020-01-20 Andrew Pinski <apinski@marvell.com>
17842 PR middle-end/93242
17843 * targhooks.c (default_print_patchable_function_entry): Use
17844 output_asm_insn to emit the nop instruction.
17846 2020-01-20 Fangrui Song <maskray@google.com>
17848 PR middle-end/93194
17849 * targhooks.c (default_print_patchable_function_entry): Align to
17852 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
17855 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
17856 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
17857 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
17858 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
17859 (*tls_dynamic_gnu2_lea_64): Renamed to ...
17860 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
17861 Remove the {q} suffix from lea.
17862 (*tls_dynamic_gnu2_call_64): Renamed to ...
17863 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
17864 (*tls_dynamic_gnu2_combine_64): Renamed to ...
17865 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
17866 Pass Pmode to gen_tls_dynamic_gnu2_64.
17868 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
17870 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
17872 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
17874 * config/aarch64/aarch64-sve-builtins-base.cc
17875 (svld1ro_impl::memory_vector_mode): Remove parameter name.
17877 2020-01-20 Richard Biener <rguenther@suse.de>
17880 * dwarf2out.c (prune_unused_types): Unconditionally mark
17881 called function DIEs.
17883 2020-01-20 Martin Liska <mliska@suse.cz>
17885 PR tree-optimization/93199
17886 * tree-eh.c (struct leh_state): Add
17887 new field outer_non_cleanup.
17888 (cleanup_is_dead_in): Pass leh_state instead
17889 of eh_region. Add a checking that state->outer_non_cleanup
17890 points to outer non-clean up region.
17891 (lower_try_finally): Record outer_non_cleanup
17893 (lower_catch): Likewise.
17894 (lower_eh_filter): Likewise.
17895 (lower_eh_must_not_throw): Likewise.
17896 (lower_cleanup): Likewise.
17898 2020-01-20 Richard Biener <rguenther@suse.de>
17900 PR tree-optimization/93094
17901 * tree-vectorizer.h (vect_loop_versioning): Adjust.
17902 (vect_transform_loop): Likewise.
17903 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
17904 loop_vectorized_call to vect_transform_loop.
17905 * tree-vect-loop.c (vect_transform_loop): Pass down
17906 loop_vectorized_call to vect_loop_versioning.
17907 * tree-vect-loop-manip.c (vect_loop_versioning): Use
17908 the earlier discovered loop_vectorized_call.
17910 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
17912 * doc/contribute.texi: Update for SVN -> Git transition.
17913 * doc/install.texi: Likewise.
17915 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17918 * cgraph.c (cgraph_edge::make_speculative): Increase number of
17919 speculative targets.
17920 (verify_speculative_call): New function
17921 (cgraph_node::verify_node): Use it.
17922 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
17925 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
17928 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
17929 (cgraph_edge::make_direct): Remove all indirect targets.
17930 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
17931 (cgraph_node::verify_node): Verify that only one call_stmt or
17932 lto_stmt_uid is set.
17933 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
17935 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
17936 (lto_output_ref): Simplify streaming of stmt.
17937 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
17939 2020-01-18 Tamar Christina <tamar.christina@arm.com>
17941 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
17942 Mark parameter unused.
17944 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
17946 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
17948 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
17950 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
17952 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
17954 * Makefile.in: Add coroutine-passes.o.
17955 * builtin-types.def (BT_CONST_SIZE): New.
17956 (BT_FN_BOOL_PTR): New.
17957 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
17958 * builtins.def (DEF_COROUTINE_BUILTIN): New.
17959 * coroutine-builtins.def: New file.
17960 * coroutine-passes.cc: New file.
17961 * function.h (struct GTY function): Add a bit to indicate that the
17962 function is a coroutine component.
17963 * internal-fn.c (expand_CO_FRAME): New.
17964 (expand_CO_YIELD): New.
17965 (expand_CO_SUSPN): New.
17966 (expand_CO_ACTOR): New.
17967 * internal-fn.def (CO_ACTOR): New.
17971 * passes.def: Add pass_coroutine_lower_builtins,
17972 pass_coroutine_early_expand_ifns.
17973 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
17974 (make_pass_coroutine_early_expand_ifns): New.
17975 * doc/invoke.texi: Document the fcoroutines command line
17978 2020-01-18 Jakub Jelinek <jakub@redhat.com>
17980 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
17983 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
17984 after checking the argument is a REG. Don't use REGNO (reg)
17985 again to set last_regno, reuse regno variable instead.
17987 2020-01-17 David Malcolm <dmalcolm@redhat.com>
17989 * doc/analyzer.texi (Limitations): Add note about NaN.
17991 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
17992 Sudakshina Das <sudi.das@arm.com>
17994 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
17995 and valid immediate.
17996 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
17997 (lshrdi3): Generate thumb2_lsrl for valid immediates.
17998 * config/arm/constraints.md (Pg): New.
17999 * config/arm/predicates.md (long_shift_imm): New.
18000 (arm_reg_or_long_shift_imm): Likewise.
18001 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
18002 (thumb2_lsll): Likewise.
18003 (thumb2_lsrl): New.
18005 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18006 Sudakshina Das <sudi.das@arm.com>
18008 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
18009 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
18010 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
18011 register pairs for doubleword quantities for ARMv8.1M-Mainline.
18012 * config/arm/thumb2.md (thumb2_asrl): New.
18013 (thumb2_lsll): Likewise.
18015 2020-01-17 Jakub Jelinek <jakub@redhat.com>
18017 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
18020 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
18022 * gdbinit.in (help-gcc-hooks): New command.
18023 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
18024 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
18027 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18029 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
18030 correct target macro.
18032 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18034 * config/aarch64/aarch64-protos.h
18035 (aarch64_sve_ld1ro_operand_p): New.
18036 * config/aarch64/aarch64-sve-builtins-base.cc
18037 (class load_replicate): New.
18038 (class svld1ro_impl): New.
18039 (class svld1rq_impl): Change to inherit from load_replicate.
18040 (svld1ro): New sve intrinsic function base.
18041 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
18042 New DEF_SVE_FUNCTION.
18043 * config/aarch64/aarch64-sve-builtins-base.h
18044 (svld1ro): New decl.
18045 * config/aarch64/aarch64-sve-builtins.cc
18046 (function_expander::add_mem_operand): Modify assert to allow
18048 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
18050 * config/aarch64/aarch64.c
18051 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
18052 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
18053 (aarch64_sve_ld1ro_operand_p): New.
18054 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
18055 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
18056 * config/aarch64/predicates.md
18057 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
18059 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18061 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
18062 Introduce this ACLE specified predefined macro.
18063 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
18064 (fp): Disabling this disables f64mm.
18065 (simd): Disabling this disables f64mm.
18066 (fp16): Disabling this disables f64mm.
18067 (sve): Disabling this disables f64mm.
18068 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
18069 (AARCH64_ISA_F64MM): New.
18070 (TARGET_F64MM): New.
18071 * doc/invoke.texi (f64mm): Document new option.
18073 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
18075 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
18076 (neoversen1_tunings): Likewise.
18078 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
18081 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
18082 Add assert to ensure prolog has been emitted.
18083 (aarch64_split_atomic_op): Likewise.
18084 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
18085 Use epilogue_completed rather than reload_completed.
18086 (aarch64_atomic_exchange<mode>): Likewise.
18087 (aarch64_atomic_<atomic_optab><mode>): Likewise.
18088 (atomic_nand<mode>): Likewise.
18089 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
18090 (atomic_fetch_nand<mode>): Likewise.
18091 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
18092 (atomic_nand_fetch<mode>): Likewise.
18094 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
18097 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
18099 (REVERSE_CONDITION): Delete.
18100 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
18101 (CCFP_CCFPE): Likewise.
18102 (e): New mode attribute.
18103 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
18104 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
18105 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
18106 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
18107 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
18108 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
18109 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
18110 name of generator from gen_ccmpdi to gen_ccmpccdi.
18111 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
18112 the previous comparison but aren't able to, use the new ccmp_rev
18115 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
18117 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
18118 than testing directly for INTEGER_CST.
18119 (gimplify_target_expr, gimplify_omp_depend): Likewise.
18121 2020-01-17 Jakub Jelinek <jakub@redhat.com>
18123 PR tree-optimization/93292
18124 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
18125 get_vectype_for_scalar_type returns NULL.
18127 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
18129 * params.opt (-param=max-predicted-iterations): Increase range from 0.
18130 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
18132 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
18134 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
18136 * params.opt: (max-predicted-iterations): Set bounds.
18137 * predict.c (real_almost_one, real_br_prob_base,
18138 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
18139 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
18140 probabilities; do not truncate to reg_br_prob_bases.
18141 (estimate_loops_at_level): Pass max_cyclic_prob.
18142 (estimate_loops): Compute max_cyclic_prob.
18143 (estimate_bb_frequencies): Do not initialize real_*; update calculation
18145 * profile-count.c (profile_probability::to_sreal): New.
18146 * profile-count.h (class sreal): Move up in file.
18147 (profile_probability::to_sreal): Declare.
18149 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18152 (arm_invalid_conversion): New function for target hook.
18153 (arm_invalid_unary_op): New function for target hook.
18154 (arm_invalid_binary_op): New function for target hook.
18156 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18158 * config.gcc: Add arm_bf16.h.
18159 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
18160 (arm_simd_builtin_std_type): Add BFmode.
18161 (arm_init_simd_builtin_types): Define element types for vector types.
18162 (arm_init_bf16_types): New function.
18163 (arm_init_builtins): Add arm_init_bf16_types function call.
18164 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
18165 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
18166 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
18167 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
18168 (arm_vector_mode_supported_p): Add V4BF, V8BF.
18169 (arm_mangle_type): Add __bf16.
18170 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
18171 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
18172 arm_bf16_ptr_type_node.
18173 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
18174 define_split between ARM registers.
18175 * config/arm/arm_bf16.h: New file.
18176 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
18177 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
18178 (VQXMOV): Add V8BF.
18179 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
18180 * config/arm/vfp.md: Add BFmode to movhf patterns.
18182 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
18183 Andre Vieira <andre.simoesdiasvieira@arm.com>
18185 * config/arm/arm-cpus.in (mve, mve_float): New features.
18186 (dsp, mve, mve.fp): New options.
18187 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
18188 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
18189 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
18191 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18192 Thomas Preud'homme <thomas.preudhomme@arm.com>
18194 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
18196 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
18197 error for using -mcmse when targeting Armv8.1-M Mainline.
18199 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18200 Thomas Preud'homme <thomas.preudhomme@arm.com>
18202 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
18203 address in r4 when targeting Armv8.1-M Mainline.
18204 (nonsecure_call_value_internal): Likewise.
18205 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
18206 a register match_operand again. Emit BLXNS when targeting
18207 Armv8.1-M Mainline.
18208 (nonsecure_call_value_reg_thumb2): Likewise.
18210 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18211 Thomas Preud'homme <thomas.preudhomme@arm.com>
18213 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
18214 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
18215 variable as true when floating-point ABI is not hard. Replace
18216 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
18217 Generate VLSTM and VLLDM instruction respectively before and
18218 after a function call to cmse_nonsecure_call function.
18219 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
18220 (VUNSPEC_VLLDM): Likewise.
18221 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
18222 (lazy_load_multiple_insn): Likewise.
18224 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18225 Thomas Preud'homme <thomas.preudhomme@arm.com>
18227 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
18228 (arm_emit_vfp_multi_reg_pop): Likewise.
18229 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
18230 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
18231 restore callee-saved VFP registers.
18233 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18234 Thomas Preud'homme <thomas.preudhomme@arm.com>
18236 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
18237 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
18238 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
18239 callee-saved GPRs as well as clear ip register before doing a nonsecure
18240 call then restore callee-saved GPRs after it when targeting
18241 Armv8.1-M Mainline.
18242 (arm_reorg): Adapt to function rename.
18244 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18245 Thomas Preud'homme <thomas.preudhomme@arm.com>
18247 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
18248 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
18249 clear_vfp_multiple pattern based on a new vfp parameter.
18250 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
18251 targeting Armv8.1-M Mainline.
18252 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
18253 unconditionally when targeting Armv8.1-M Mainline architecture. Check
18254 whether VFP registers are available before looking call_used_regs for a
18256 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
18257 of prototype of clear_operation_p.
18258 (clear_vfp_multiple_operation): New predicate.
18259 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
18260 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
18262 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18263 Thomas Preud'homme <thomas.preudhomme@arm.com>
18265 * config/arm/arm-protos.h (clear_operation_p): Declare.
18266 * config/arm/arm.c (clear_operation_p): New function.
18267 (cmse_clear_registers): Generate clear_multiple instruction pattern if
18268 targeting Armv8.1-M Mainline or successor.
18269 (output_return_instruction): Only output APSR register clearing if
18270 Armv8.1-M Mainline instructions not available.
18271 (thumb_exit): Likewise.
18272 * config/arm/predicates.md (clear_multiple_operation): New predicate.
18273 * config/arm/thumb2.md (clear_apsr): New define_insn.
18274 (clear_multiple): Likewise.
18275 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
18277 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18278 Thomas Preud'homme <thomas.preudhomme@arm.com>
18280 * config/arm/arm.c (fp_sysreg_names): Declare and define.
18281 (use_return_insn): Also return false for Armv8.1-M Mainline.
18282 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
18283 Mainline instructions are available.
18284 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
18285 when targeting Armv8.1-M Mainline Security Extensions.
18286 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
18287 Mainline entry function.
18288 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
18289 targeting Armv8.1-M Mainline or successor.
18290 (arm_expand_epilogue): Fix indentation of caller-saved register
18291 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
18293 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
18294 (FP_SYSREGS): Likewise.
18295 (enum vfp_sysregs_encoding): Define enum.
18296 (fp_sysreg_names): Declare.
18297 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
18298 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
18299 (pop_fpsysreg_insn): Likewise.
18301 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18302 Thomas Preud'homme <thomas.preudhomme@arm.com>
18304 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
18305 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
18306 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
18307 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
18308 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
18309 (ARMv8_1m_main): New feature group.
18310 (armv8.1-m.main): New architecture.
18311 * config/arm/arm-tables.opt: Regenerate.
18312 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
18313 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
18314 (arm_options_perform_arch_sanity_checks): Error out when targeting
18315 Armv8.1-M Mainline Security Extensions.
18316 * config/arm/arm.h (arm_arch8_1m_main): Declare.
18318 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18320 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
18321 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
18322 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
18323 aarch64_bfdot_laneq): New.
18324 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
18325 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
18326 vbfdotq_laneq_f32): New.
18327 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
18328 VBFMLA_W, VBF): New.
18329 (isquadop): Add V4BF, V8BF.
18331 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18333 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
18334 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
18335 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
18336 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
18337 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
18338 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
18339 usdot_laneq, sudot_lane,sudot_laneq): New.
18340 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
18341 (aarch64_<sur>dot_lane): New.
18342 * config/aarch64/arm_neon.h (vusdot_s32): New.
18343 (vusdotq_s32): New.
18344 (vusdot_lane_s32): New.
18345 (vsudot_lane_s32): New.
18346 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
18347 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
18349 2020-01-16 Martin Liska <mliska@suse.cz>
18351 * value-prof.c (dump_histogram_value): Fix
18352 obvious spacing issue.
18354 2020-01-16 Andrew Pinski <apinski@marvell.com>
18356 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
18357 !storage_order_barrier_p.
18359 2020-01-16 Andrew Pinski <apinski@marvell.com>
18361 * sched-int.h (_dep): Add unused bit-field field for the padding.
18362 * sched-deps.c (init_dep_1): Init unused field.
18364 2020-01-16 Andrew Pinski <apinski@marvell.com>
18366 * optabs.h (create_expand_operand): Initialize target field also.
18368 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18370 PR tree-optimization/92429
18371 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
18372 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
18374 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
18377 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
18379 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
18380 aarch64_sve_int_mode to each mode.
18382 2020-01-15 David Malcolm <dmalcolm@redhat.com>
18384 * doc/analyzer.texi (Overview): Add note about
18385 -fdump-ipa-analyzer.
18387 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
18389 PR tree-optimization/93231
18390 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
18391 input_type is unsigned. Use tree_to_shwi for shift constant.
18392 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
18393 (simplify_count_trailing_zeroes): Add test to handle known non-zero
18394 inputs more efficiently.
18396 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
18398 * config/i386/i386.md (*movsf_internal): Do not require
18399 SSE2 ISA for alternatives 14 and 15.
18401 2020-01-15 Richard Biener <rguenther@suse.de>
18403 PR middle-end/93273
18404 * tree-eh.c (sink_clobbers): If we already visited the destination
18405 block do not defer insertion.
18406 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
18407 the purpose of defered insertion.
18409 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18411 * BASE-VER: Bump to 10.0.1.
18413 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18415 PR tree-optimization/93247
18416 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
18417 type of the stmt that we're going to vectorize.
18419 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18421 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
18422 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
18425 2020-01-15 Martin Liska <mliska@suse.cz>
18427 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
18428 2 calls of streamer_read_hwi in a function call.
18430 2020-01-15 Richard Biener <rguenther@suse.de>
18432 * alias.c (record_alias_subset): Avoid redundant work when
18433 subset is already recorded.
18435 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18437 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
18438 the analyzer options provide CWE identifiers.
18440 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18442 * tree-diagnostic-path.cc (path_summary::event_range::print):
18443 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
18444 using get_pure_location.
18446 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18448 PR tree-optimization/93262
18449 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
18450 perform head trimming only if the last argument is constant,
18451 either all ones, or larger or equal to head trim, in the latter
18452 case decrease the last argument by head_trim.
18454 PR tree-optimization/93249
18455 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
18456 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
18457 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
18458 perform head trim unless we can prove there are no '\0' chars
18459 from the source among the first head_trim chars.
18461 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18463 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
18465 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18468 * config/i386/sse.md
18469 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
18470 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
18471 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
18472 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
18473 just a single alternative instead of two, make operands 1 and 2
18476 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
18479 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
18482 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18484 * Makefile.in (lang_opt_files): Add analyzer.opt.
18485 (ANALYZER_OBJS): New.
18486 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
18487 tristate.o and ANALYZER_OBJS.
18488 (TEXI_GCCINT_FILES): Add analyzer.texi.
18489 * common.opt (-fanalyzer): New driver option.
18490 * config.in: Regenerate.
18491 * configure: Regenerate.
18492 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
18493 (gccdepdir): Also create depdir for "analyzer" subdir.
18494 * digraph.cc: New file.
18495 * digraph.h: New file.
18496 * doc/analyzer.texi: New file.
18497 * doc/gccint.texi ("Static Analyzer") New menu item.
18498 (analyzer.texi): Include it.
18499 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
18500 ("Warning Options"): Add static analysis warnings to the list.
18501 (-Wno-analyzer-double-fclose): New option.
18502 (-Wno-analyzer-double-free): New option.
18503 (-Wno-analyzer-exposure-through-output-file): New option.
18504 (-Wno-analyzer-file-leak): New option.
18505 (-Wno-analyzer-free-of-non-heap): New option.
18506 (-Wno-analyzer-malloc-leak): New option.
18507 (-Wno-analyzer-possible-null-argument): New option.
18508 (-Wno-analyzer-possible-null-dereference): New option.
18509 (-Wno-analyzer-null-argument): New option.
18510 (-Wno-analyzer-null-dereference): New option.
18511 (-Wno-analyzer-stale-setjmp-buffer): New option.
18512 (-Wno-analyzer-tainted-array-index): New option.
18513 (-Wno-analyzer-use-after-free): New option.
18514 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
18515 (-Wno-analyzer-use-of-uninitialized-value): New option.
18516 (-Wanalyzer-too-complex): New option.
18517 (-fanalyzer-call-summaries): New warning.
18518 (-fanalyzer-checker=): New warning.
18519 (-fanalyzer-fine-grained): New warning.
18520 (-fno-analyzer-state-merge): New warning.
18521 (-fno-analyzer-state-purge): New warning.
18522 (-fanalyzer-transitivity): New warning.
18523 (-fanalyzer-verbose-edges): New warning.
18524 (-fanalyzer-verbose-state-changes): New warning.
18525 (-fanalyzer-verbosity=): New warning.
18526 (-fdump-analyzer): New warning.
18527 (-fdump-analyzer-callgraph): New warning.
18528 (-fdump-analyzer-exploded-graph): New warning.
18529 (-fdump-analyzer-exploded-nodes): New warning.
18530 (-fdump-analyzer-exploded-nodes-2): New warning.
18531 (-fdump-analyzer-exploded-nodes-3): New warning.
18532 (-fdump-analyzer-supergraph): New warning.
18533 * doc/sourcebuild.texi (dg-require-dot): New.
18534 (dg-check-dot): New.
18535 * gdbinit.in (break-on-saved-diagnostic): New command.
18536 * graphviz.cc: New file.
18537 * graphviz.h: New file.
18538 * ordered-hash-map-tests.cc: New file.
18539 * ordered-hash-map.h: New file.
18540 * passes.def (pass_analyzer): Add before
18541 pass_ipa_whole_program_visibility.
18542 * selftest-run-tests.c (selftest::run_tests): Call
18543 selftest::ordered_hash_map_tests_cc_tests.
18544 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
18546 * shortest-paths.h: New file.
18547 * timevar.def (TV_ANALYZER): New timevar.
18548 (TV_ANALYZER_SUPERGRAPH): Likewise.
18549 (TV_ANALYZER_STATE_PURGE): Likewise.
18550 (TV_ANALYZER_PLAN): Likewise.
18551 (TV_ANALYZER_SCC): Likewise.
18552 (TV_ANALYZER_WORKLIST): Likewise.
18553 (TV_ANALYZER_DUMP): Likewise.
18554 (TV_ANALYZER_DIAGNOSTICS): Likewise.
18555 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
18556 * tree-pass.h (make_pass_analyzer): New decl.
18557 * tristate.cc: New file.
18558 * tristate.h: New file.
18560 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
18563 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
18564 alternatives 9 and 10.
18566 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18568 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
18569 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
18570 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
18571 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
18572 (selftest::hash_map_tests_c_tests): Call it.
18573 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
18574 New static constant, using the value of = H::empty_zero_p.
18575 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
18576 from default_hash_traits <Value>.
18577 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
18579 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
18580 * hash-table.h (hash_table::alloc_entries): Guard the loop of
18581 calls to mark_empty with !Descriptor::empty_zero_p.
18582 (hash_table::empty_slow): Conditionalize the memset call with a
18583 check that Descriptor::empty_zero_p; otherwise, loop through the
18584 entries calling mark_empty on them.
18585 * hash-traits.h (int_hash::empty_zero_p): New static constant.
18586 (pointer_hash::empty_zero_p): Likewise.
18587 (pair_hash::empty_zero_p): Likewise.
18588 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
18590 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
18591 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
18592 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
18593 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
18594 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
18595 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
18596 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
18597 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
18598 * tree-vectorizer.h
18599 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
18602 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
18604 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
18605 fix typo on return value.
18607 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
18610 * cgraph.c (symbol_table::create_edge): Init speculative_id and
18612 (cgraph_edge::make_speculative): Add param for setting speculative_id
18614 (cgraph_edge::speculative_call_info): Update comments and find reference
18615 by speculative_id for multiple indirect targets.
18616 (cgraph_edge::resolve_speculation): Decrease the speculations
18617 for indirect edge, drop it's speculative if not direct target
18618 left. Update comments.
18619 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
18620 (cgraph_node::dump): Print num_speculative_call_targets.
18621 (cgraph_node::verify_node): Don't report error if speculative
18622 edge not include statement.
18623 (cgraph_edge::num_speculative_call_targets_p): New function.
18624 * cgraph.h (int common_target_id): Remove.
18625 (int common_target_probability): Remove.
18626 (num_speculative_call_targets): New variable.
18627 (make_speculative): Add param for setting speculative_id.
18628 (cgraph_edge::num_speculative_call_targets_p): New declare.
18629 (target_prob): New variable.
18630 (speculative_id): New variable.
18631 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
18632 call summaries for multiple speculative call targets.
18633 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
18634 * ipa-profile.c (struct speculative_call_target): New struct.
18635 (class speculative_call_summary): New class.
18636 (class speculative_call_summaries): New class.
18637 (call_sums): New variable.
18638 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
18639 (ipa_profile_write_edge_summary): New function.
18640 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
18641 (ipa_profile_dump_all_summaries): New function.
18642 (ipa_profile_read_edge_summary): New function.
18643 (ipa_profile_read_summary_section): New function.
18644 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
18645 (ipa_profile): Generate num_speculative_call_targets from
18647 * ipa-ref.h (speculative_id): New variable.
18648 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
18649 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
18650 common_target_probability. Stream out speculative_id and
18651 num_speculative_call_targets.
18652 (input_edge): Likewise.
18653 * predict.c (dump_prediction): Remove edges count assert to be
18655 * symtab.c (symtab_node::create_reference): Init speculative_id.
18656 (symtab_node::clone_references): Clone speculative_id.
18657 (symtab_node::clone_referring): Clone speculative_id.
18658 (symtab_node::clone_reference): Clone speculative_id.
18659 (symtab_node::clear_stmts_in_references): Clear speculative_id.
18660 * tree-inline.c (copy_bb): Duplicate all the speculative edges
18661 if indirect call contains multiple speculative targets.
18662 * value-prof.h (check_ic_target): Remove.
18663 * value-prof.c (gimple_value_profile_transformations):
18664 Use void function gimple_ic_transform.
18665 * value-prof.c (gimple_ic_transform): Handle topn case.
18666 Fix comment typos. Change it to a void function.
18668 2020-01-13 Andrew Pinski <apinski@marvell.com>
18670 * config/aarch64/aarch64-cores.def (octeontx2): New define.
18671 (octeontx2t98): New define.
18672 (octeontx2t96): New define.
18673 (octeontx2t93): New define.
18674 (octeontx2f95): New define.
18675 (octeontx2f95n): New define.
18676 (octeontx2f95mm): New define.
18677 * config/aarch64/aarch64-tune.md: Regenerate.
18678 * doc/invoke.texi (-mcpu=): Document the new cpu types.
18680 2020-01-13 Jason Merrill <jason@redhat.com>
18682 PR c++/33799 - destroy return value if local cleanup throws.
18683 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
18685 2020-01-13 Martin Liska <mliska@suse.cz>
18687 * ipa-cp.c (get_max_overall_size): Use newly
18688 renamed param param_ipa_cp_unit_growth.
18689 * params.opt: Remove legacy param name.
18691 2020-01-13 Martin Sebor <msebor@redhat.com>
18693 PR tree-optimization/93213
18694 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
18695 stores to be eliminated.
18697 2020-01-13 Martin Liska <mliska@suse.cz>
18699 * opts.c (print_help): Do not print CL_PARAM
18700 and CL_WARNING for CL_OPTIMIZATION.
18702 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
18705 * doc/invoke.texi (Warning Options): Add caveat about some warnings
18706 depending on optimization settings.
18708 2020-01-13 Jakub Jelinek <jakub@redhat.com>
18710 PR tree-optimization/90838
18711 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
18712 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
18713 argument rather than to initialize temporary for targets that
18714 don't use the mode argument at all. Initialize ctzval to avoid
18717 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
18719 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
18720 * tree-core.h: Document it.
18721 * gimplify.c (gimplify_omp_workshare): Set it.
18722 * omp-low.c (lower_omp_target): Use it.
18723 * tree-pretty-print.c (dump_omp_clause): Print it.
18725 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
18726 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
18728 2020-01-10 David Malcolm <dmalcolm@redhat.com>
18730 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
18731 * common.opt (fdiagnostics-path-format=): New option.
18732 (diagnostic_path_format): New enum.
18733 (fdiagnostics-show-path-depths): New option.
18734 * coretypes.h (diagnostic_event_id_t): New forward decl.
18735 * diagnostic-color.c (color_dict): Add "path".
18736 * diagnostic-event-id.h: New file.
18737 * diagnostic-format-json.cc (json_from_expanded_location): Make
18739 (json_end_diagnostic): Call context->make_json_for_path if it
18740 exists and the diagnostic has a path.
18741 (diagnostic_output_format_init): Clear context->print_path.
18742 * diagnostic-path.h: New file.
18743 * diagnostic-show-locus.c (colorizer::set_range): Special-case
18744 when printing a run of events in a diagnostic_path so that they
18745 all get the same color.
18746 (layout::m_diagnostic_path_p): New field.
18747 (layout::layout): Initialize it.
18748 (layout::print_any_labels): Don't colorize the label text for an
18749 event in a diagnostic_path.
18750 (gcc_rich_location::add_location_if_nearby): Add
18751 "restrict_to_current_line_spans" and "label" params. Pass the
18752 former to layout.maybe_add_location_range; pass the latter
18753 when calling add_range.
18754 * diagnostic.c: Include "diagnostic-path.h".
18755 (diagnostic_initialize): Initialize context->path_format and
18756 context->show_path_depths.
18757 (diagnostic_show_any_path): New function.
18758 (diagnostic_path::interprocedural_p): New function.
18759 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
18760 (simple_diagnostic_path::num_events): New function.
18761 (simple_diagnostic_path::get_event): New function.
18762 (simple_diagnostic_path::add_event): New function.
18763 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
18764 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
18765 (debug): New overload taking a diagnostic_path *.
18766 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
18767 * diagnostic.h (enum diagnostic_path_format): New enum.
18768 (json::value): New forward decl.
18769 (diagnostic_context::path_format): New field.
18770 (diagnostic_context::show_path_depths): New field.
18771 (diagnostic_context::print_path): New callback field.
18772 (diagnostic_context::make_json_for_path): New callback field.
18773 (diagnostic_show_any_path): New decl.
18774 (json_from_expanded_location): New decl.
18775 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
18776 (-fdiagnostics-show-path-depths): New option.
18777 (-fdiagnostics-color): Add "path" to description of default
18778 GCC_COLORS; describe it.
18779 (-fdiagnostics-format=json): Document how diagnostic paths are
18780 represented in the JSON output format.
18781 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
18782 Add optional params "restrict_to_current_line_spans" and "label".
18783 * opts.c (common_handle_option): Handle
18784 OPT_fdiagnostics_path_format_ and
18785 OPT_fdiagnostics_show_path_depths.
18786 * pretty-print.c: Include "diagnostic-event-id.h".
18787 (pp_format): Implement "%@" format code for printing
18788 diagnostic_event_id_t *.
18789 (selftest::test_pp_format): Add tests for "%@".
18790 * selftest-run-tests.c (selftest::run_tests): Call
18791 selftest::tree_diagnostic_path_cc_tests.
18792 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
18793 * toplev.c (general_init): Initialize global_dc->path_format and
18794 global_dc->show_path_depths.
18795 * tree-diagnostic-path.cc: New file.
18796 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
18797 non-static. Drop "diagnostic" param in favor of storing the
18798 original value of "where" and re-using it.
18799 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
18800 maybe_unwind_expanded_macro_loc.
18801 (tree_diagnostics_defaults): Initialize context->print_path and
18802 context->make_json_for_path.
18803 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
18805 (default_tree_make_json_for_path): New decl.
18806 (maybe_unwind_expanded_macro_loc): New decl.
18808 2020-01-10 Jakub Jelinek <jakub@redhat.com>
18810 PR tree-optimization/93210
18811 * fold-const.h (native_encode_initializer,
18812 can_native_interpret_type_p): Declare.
18813 * fold-const.c (native_encode_string): Fix up handling with off != -1,
18815 (native_encode_initializer): New function, moved from dwarf2out.c.
18816 Adjust to native_encode_expr compatible arguments, including dry-run
18817 and partial extraction modes. Don't handle STRING_CST.
18818 (can_native_interpret_type_p): No longer static.
18819 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
18820 offset / BITS_PER_UNIT fits into int and don't call it if
18821 can_native_interpret_type_p fails. If suboff is NULL and for
18822 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
18823 native_encode_initializer.
18824 (fold_const_aggregate_ref_1): Formatting fix.
18825 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
18826 (tree_add_const_value_attribute): Adjust caller.
18828 PR tree-optimization/90838
18829 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
18830 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
18831 CTZ_DEFINED_VALUE_AT_ZERO.
18833 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
18835 PR inline-asm/93027
18836 * lra-constraints.c (match_reload): Permit input operands have the
18837 same mode as output while other input operands have a different
18840 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
18842 PR tree-optimization/90838
18843 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
18844 (check_ctz_string): Likewise.
18845 (optimize_count_trailing_zeroes): Likewise.
18846 (simplify_count_trailing_zeroes): Likewise.
18847 (pass_forwprop::execute): Try ctz simplification.
18848 * match.pd: Add matching for ctz idioms.
18850 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18852 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
18854 (aarch64_invalid_unary_op): New function for target hook.
18855 (aarch64_invalid_binary_op): New function for target hook.
18857 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18859 * config.gcc: Add arm_bf16.h.
18860 * config/aarch64/aarch64-builtins.c
18861 (aarch64_simd_builtin_std_type): Add BFmode.
18862 (aarch64_init_simd_builtin_types): Define element types for vector
18864 (aarch64_init_bf16_types): New function.
18865 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
18866 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
18868 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
18869 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
18871 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
18872 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
18873 * config/aarch64/aarch64.c
18874 (aarch64_classify_vector_mode): Add support for BF types.
18875 (aarch64_gimplify_va_arg_expr): Add support for BF types.
18876 (aarch64_vq_mode): Add support for BF types.
18877 (aarch64_simd_container_mode): Add support for BF types.
18878 (aarch64_mangle_type): Add support for BF scalar type.
18879 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
18880 * config/aarch64/arm_bf16.h: New file.
18881 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
18882 * config/aarch64/iterators.md: Add BF types to mode attributes.
18883 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
18885 2020-01-10 Jason Merrill <jason@redhat.com>
18887 PR c++/93173 - incorrect tree sharing.
18888 * gimplify.c (copy_if_shared): No longer static.
18889 * gimplify.h: Declare it.
18891 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18893 * doc/invoke.texi (-msve-vector-bits=): Document that
18894 -msve-vector-bits=128 now generates VL-specific code for
18895 little-endian targets.
18896 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
18897 build_vector_type_for_mode to construct the data vector types.
18898 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
18899 VL-specific code for -msve-vector-bits=128 on little-endian targets.
18900 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
18901 for 128-bit vectors.
18903 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18905 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
18908 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18910 * config/aarch64/aarch64-builtins.c
18911 (aarch64_builtin_vectorized_function): Check for specific vector modes,
18912 rather than checking the number of elements and the element mode.
18914 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18916 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
18917 get_related_vectype_for_scalar_type rather than build_vector_type
18918 to create the index type for a conditional reduction.
18920 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
18922 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
18923 for any type of gather or scatter, including strided accesses.
18925 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
18927 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
18930 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
18932 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
18933 get_dr_vinfo_offset
18934 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
18935 parameter and its use to reset DR_OFFSET's.
18936 (vect_transform_loop): Remove orig_drs_init argument.
18937 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
18938 member of dr_vec_info rather than the offset of the associated
18939 data_reference's innermost_loop_behavior.
18940 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
18941 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
18942 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
18943 get_dr_vinfo_offset.
18944 (vectorizable_store): Likewise.
18945 (vectorizable_load): Likewise.
18947 2020-01-10 Richard Biener <rguenther@suse.de>
18949 * gimple-ssa-store-merging
18950 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
18952 2020-01-10 Martin Liska <mliska@suse.cz>
18955 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
18956 encapsulation that was there before r280040.
18958 2020-01-10 Richard Biener <rguenther@suse.de>
18960 PR middle-end/93199
18961 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
18962 sequences to avoid walking them again for secondary opportunities.
18963 (pass_lower_eh_dispatch::execute): Instead actually insert
18966 2020-01-10 Richard Biener <rguenther@suse.de>
18968 PR middle-end/93199
18969 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
18970 (cleanup_all_empty_eh): Walk landing pads in reverse order to
18971 avoid quadraticness.
18973 2020-01-10 Martin Jambor <mjambor@suse.cz>
18975 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
18976 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
18977 to get param_ipa_sra_max_replacements.
18978 (param_splitting_across_edge): Pass the caller to
18979 pull_accesses_from_callee.
18981 2020-01-10 Martin Jambor <mjambor@suse.cz>
18983 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
18984 * ipa-cp.c (max_new_size): Removed.
18985 (orig_overall_size): New variable.
18986 (get_max_overall_size): New function.
18987 (estimate_local_effects): Use it. Adjust dump.
18988 (decide_about_value): Likewise.
18989 (ipcp_propagate_stage): Do not calculate max_new_size, just store
18990 orig_overall_size. Adjust dump.
18991 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
18993 2020-01-10 Martin Jambor <mjambor@suse.cz>
18995 * params.opt (param_ipa_max_agg_items): Mark as Optimization
18996 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
18997 instead of param_ipa_max_agg_items.
18998 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
18999 optimization info for the callee.
19001 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
19003 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
19004 markers if debug_inline_points is false.
19006 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19008 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
19010 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
19011 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
19012 aarch64-sve-builtins-sve2.h.
19013 (aarch64-sve-builtins-sve2.o): New rule.
19014 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
19015 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
19016 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
19017 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
19018 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
19019 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
19021 * config/aarch64/aarch64-sve.md: Update comments with SVE2
19022 instructions that are handled here.
19023 (@cond_asrd<mode>): Generalize to...
19024 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
19025 (*cond_asrd<mode>_2): Generalize to...
19026 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
19027 (*cond_asrd<mode>_z): Generalize to...
19028 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
19029 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
19030 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
19031 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
19032 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
19034 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
19035 (@aarch64_scatter_stnt<mode>): Likewise.
19036 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
19037 (@aarch64_mul_lane_<mode>): Likewise.
19038 (@aarch64_sve_suqadd<mode>_const): Likewise.
19039 (*<sur>h<addsub><mode>): Generalize to...
19040 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
19042 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
19043 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
19044 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
19045 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
19046 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
19047 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
19048 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
19049 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
19050 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
19051 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
19052 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
19053 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
19054 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
19055 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
19056 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
19057 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
19058 (@aarch64_sve2_xar<mode>): Likewise.
19059 (@aarch64_sve2_bcax<mode>): Likewise.
19060 (*aarch64_sve2_eor3<mode>): Rename to...
19061 (@aarch64_sve2_eor3<mode>): ...this.
19062 (@aarch64_sve2_bsl<mode>): New expander.
19063 (@aarch64_sve2_nbsl<mode>): Likewise.
19064 (@aarch64_sve2_bsl1n<mode>): Likewise.
19065 (@aarch64_sve2_bsl2n<mode>): Likewise.
19066 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
19067 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
19068 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
19069 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
19070 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
19071 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
19072 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
19073 (<su>mull<bt><Vwide>): Generalize to...
19074 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
19076 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
19077 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
19078 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
19079 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19080 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
19081 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19082 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
19083 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19084 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
19085 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19086 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
19087 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
19088 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
19089 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
19090 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
19091 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
19092 (<SHRNB:r>shrnb<mode>): Generalize to...
19093 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
19095 (<SHRNT:r>shrnt<mode>): Generalize to...
19096 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
19098 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
19099 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
19100 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
19101 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
19102 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
19103 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
19104 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
19105 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
19106 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
19107 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
19108 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
19109 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
19110 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
19111 (@aarch64_sve2_cvtnt<mode>): Likewise.
19112 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
19113 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
19114 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
19115 (@aarch64_sve2_cvtxnt<mode>): Likewise.
19116 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
19117 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
19118 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
19119 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
19120 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
19121 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
19122 (@aarch64_sve2_pmul<mode>): Likewise.
19123 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
19124 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
19125 (@aarch64_sve2_tbl2<mode>): Likewise.
19126 (@aarch64_sve2_tbx<mode>): Likewise.
19127 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
19128 (@aarch64_sve2_histcnt<mode>): Likewise.
19129 (@aarch64_sve2_histseg<mode>): Likewise.
19130 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
19131 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
19132 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
19133 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
19134 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
19135 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
19136 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
19137 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
19138 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
19139 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
19140 (SVE2_PMULL_PAIR_I): New mode iterators.
19141 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
19142 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
19143 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
19144 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
19145 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
19146 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
19147 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
19148 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
19149 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
19150 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
19151 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
19152 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
19153 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
19154 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
19155 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
19156 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
19157 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
19158 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
19159 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
19160 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
19161 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
19162 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
19163 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
19164 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
19165 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
19166 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
19167 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
19168 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
19169 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
19170 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
19171 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
19173 (VNARROW, Ventype): New mode attributes.
19174 (Vewtype): Handle VNx2DI. Fix typo in comment.
19175 (VDOUBLE): New mode attribute.
19176 (sve_lane_con): Handle VNx8HI.
19177 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
19178 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
19179 (sve_int_op, sve_int_op_rev): Handle the above codes.
19180 (sve_pred_int_rhs2_operand): Likewise.
19181 (MULLBT, SHRNB, SHRNT): Delete.
19182 (SVE_INT_SHIFT_IMM): New int iterator.
19183 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
19184 and UNSPEC_WHILEHS for TARGET_SVE2.
19185 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
19186 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
19187 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
19188 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
19189 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
19190 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
19191 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
19192 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
19193 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
19194 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
19195 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
19196 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
19197 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
19198 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
19199 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
19200 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
19201 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
19202 (optab): Handle the new unspecs.
19203 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
19205 (lr): Handle the new unspecs.
19207 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
19208 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
19209 (sve_int_qsub_op): New int attributes.
19210 (sve_fp_op, rot): Handle the new unspecs.
19211 * config/aarch64/aarch64-sve-builtins.h
19212 (function_resolver::require_matching_pointer_type): Declare.
19213 (function_resolver::resolve_unary): Add an optional boolean argument.
19214 (function_resolver::finish_opt_n_resolution): Add an optional
19215 type_suffix_index argument.
19216 (gimple_folder::redirect_call): Declare.
19217 (gimple_expander::prepare_gather_address_operands): Add an optional
19219 * config/aarch64/aarch64-sve-builtins.cc: Include
19220 aarch64-sve-builtins-sve2.h.
19221 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
19222 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
19223 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
19224 (TYPES_hsd_integer): Use TYPES_hsd_signed.
19225 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
19226 (TYPES_s_unsigned): Likewise.
19227 (TYPES_s_integer): Use TYPES_s_unsigned.
19228 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
19229 (TYPES_sd_integer): Use them.
19230 (TYPES_d_unsigned): New macro.
19231 (TYPES_d_integer): Use it.
19232 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
19233 (TYPES_cvt_narrow): Likewise.
19234 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
19235 (preds_mx): New variable.
19236 (function_builder::add_overloaded_function): Allow the new feature
19237 set to be more restrictive than the original one.
19238 (function_resolver::infer_pointer_type): Remove qualifiers from
19239 the pointer type before printing it.
19240 (function_resolver::require_matching_pointer_type): New function.
19241 (function_resolver::resolve_sv_displacement): Handle functions
19242 that don't support 32-bit vector indices or svint32_t vector offsets.
19243 (function_resolver::finish_opt_n_resolution): Take the inferred type
19244 as a separate argument.
19245 (function_resolver::resolve_unary): Optionally treat all forms in
19246 the same way as normal merging functions.
19247 (gimple_folder::redirect_call): New function.
19248 (function_expander::prepare_gather_address_operands): Add an argument
19249 that says whether scaled forms are available. If they aren't,
19250 handle scaling of vector indices and don't add the extension and
19252 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
19253 fall back to using cond_* instead.
19254 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
19255 Split out the member variables into...
19256 (rtx_code_function_base): ...this new base class.
19257 (rtx_code_function_rotated): Inherit rtx_code_function_base.
19258 (unspec_based_function): Split out the member variables into...
19259 (unspec_based_function_base): ...this new base class.
19260 (unspec_based_function_rotated): Inherit unspec_based_function_base.
19261 (unspec_based_function_exact_insn): New class.
19262 (unspec_based_add_function, unspec_based_add_lane_function)
19263 (unspec_based_lane_function, unspec_based_pred_function)
19264 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
19265 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
19266 (unspec_based_sub_function, unspec_based_sub_lane_function): New
19268 (unspec_based_fused_function): New class.
19269 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
19270 (unspec_based_fused_lane_function): New class.
19271 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
19273 (CODE_FOR_MODE1): New macro.
19274 (fixed_insn_function): New class.
19275 (while_comparison): Likewise.
19276 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
19277 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
19278 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
19279 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
19280 (load_gather_sv_restricted, shift_left_imm_long): Declare.
19281 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
19282 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
19283 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
19284 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
19285 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
19286 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
19287 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
19288 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
19289 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
19290 Also add an initial argument for unary_convert_narrowt, regardless
19291 of the predication type.
19292 (build_32_64): Allow loads and stores to specify MODE_none.
19293 (build_sv_index64, build_sv_uint_offset): New functions.
19294 (long_type_suffix): New function.
19295 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
19296 (binary_imm_long_base, load_gather_sv_base): Likewise.
19297 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
19298 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
19299 (unary_narrowb_base, unary_narrowt_base): Likewise.
19300 (binary_long_lane_def, binary_long_lane): New shape.
19301 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
19302 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
19303 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
19304 (binary_to_uint_def, binary_to_uint): Likewise.
19305 (binary_wide_def, binary_wide): Likewise.
19306 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
19307 (compare_def, compare): Likewise.
19308 (compare_ptr_def, compare_ptr): Likewise.
19309 (load_ext_gather_index_restricted_def,
19310 load_ext_gather_index_restricted): Likewise.
19311 (load_ext_gather_offset_restricted_def,
19312 load_ext_gather_offset_restricted): Likewise.
19313 (load_gather_sv_def): Inherit from load_gather_sv_base.
19314 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
19315 (shift_left_imm_def, shift_left_imm): Likewise.
19316 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
19317 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
19318 (store_scatter_index_restricted_def,
19319 store_scatter_index_restricted): Likewise.
19320 (store_scatter_offset_restricted_def,
19321 store_scatter_offset_restricted): Likewise.
19322 (tbl_tuple_def, tbl_tuple): Likewise.
19323 (ternary_long_lane_def, ternary_long_lane): Likewise.
19324 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
19325 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
19326 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
19327 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
19328 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
19329 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
19330 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
19331 (ternary_uint_def, ternary_uint): Likewise.
19332 (unary_convert): Fix typo in comment.
19333 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
19334 (unary_long_def, unary_long): Likewise.
19335 (unary_narrowb_def, unary_narrowb): Likewise.
19336 (unary_narrowt_def, unary_narrowt): Likewise.
19337 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
19338 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
19339 (unary_to_int_def, unary_to_int): Likewise.
19340 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
19341 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
19342 (svasrd_impl): Delete.
19343 (svcadd_impl::expand): Handle integer operations too.
19344 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
19345 new functions to derive the unspec numbers.
19346 (svmla_svmls_lane_impl): Replace with...
19347 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
19348 integer operations too.
19349 (svwhile_impl): Rename to...
19350 (svwhilelx_impl): ...this and inherit from while_comparison.
19351 (svasrd): Use unspec_based_function.
19352 (svmla_lane): Use svmla_lane_impl.
19353 (svmls_lane): Use svmls_lane_impl.
19354 (svrecpe, svrsqrte): Handle unsigned integer operations too.
19355 (svwhilele, svwhilelt): Use svwhilelx_impl.
19356 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
19357 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
19358 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
19359 * config/aarch64/aarch64-sve-builtins.def: Include
19360 aarch64-sve-builtins-sve2.def.
19362 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19364 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
19365 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
19366 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
19367 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
19368 immediates as well as vector ones.
19369 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
19370 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
19371 (aarch64_sve_qsub_immediate): Update calls accordingly.
19373 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19375 * config/aarch64/aarch64-sve2.md: Add banner comments.
19376 (<su>mulh<r>s<mode>3): Move further up file.
19377 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
19378 (*aarch64_sve2_sra<mode>): Move further down file.
19379 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
19381 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19383 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
19384 and UNSPEC_WHILEWR.
19385 (while_optab_cmp): Handle them.
19386 * config/aarch64/aarch64-sve.md
19387 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
19388 and add a "@" marker.
19389 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
19390 instead of gen_aarch64_sve2_while_ptest.
19391 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
19393 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19395 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
19396 (UNSPEC_WHILELE): ...this.
19397 (UNSPEC_WHILE_LO): Rename to...
19398 (UNSPEC_WHILELO): ...this.
19399 (UNSPEC_WHILE_LS): Rename to...
19400 (UNSPEC_WHILELS): ...this.
19401 (UNSPEC_WHILE_LT): Rename to...
19402 (UNSPEC_WHILELT): ...this.
19403 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
19404 (cmp_op, while_optab_cmp): Likewise.
19405 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
19406 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
19407 (svwhilelt): Likewise.
19409 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19411 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
19412 (unary_to_uint): Define.
19413 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
19414 (unary_count): Rename to...
19415 (unary_to_uint_def, unary_to_uint): ...this.
19416 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
19418 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19420 * config/aarch64/aarch64-sve-builtins-functions.h
19421 (code_for_mode_function): New class.
19422 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
19423 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
19424 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
19425 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
19426 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
19428 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19430 * config/aarch64/iterators.md (addsub): New code attribute.
19431 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
19433 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
19434 in the asm string and attributes. Fix indentation.
19435 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
19437 (@aarch64_sve_<optab><mode>): ...this.
19438 * config/aarch64/aarch64-sve-builtins.h
19439 (function_expander::expand_signed_unpred_op): Delete.
19440 * config/aarch64/aarch64-sve-builtins.cc
19441 (function_expander::expand_signed_unpred_op): Likewise.
19442 (function_expander::map_to_rtx_codes): If the optab isn't defined,
19443 try using code_for_aarch64_sve instead.
19444 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
19445 (svqsub_impl): Likewise.
19446 (svqadd, svqsub): Use rtx_code_function instead.
19448 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19450 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
19451 (HADDSUB, sur, addsub): Remove them.
19453 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19455 * tree-nrv.c (pass_return_slot::execute): Handle all internal
19456 functions the same way, rather than singling out those that
19457 aren't mapped directly to optabs.
19459 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19461 * target.def (compatible_vector_types_p): New target hook.
19462 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
19463 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
19464 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
19465 * doc/tm.texi: Regenerate.
19466 * gimple-expr.c: Include target.h.
19467 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
19468 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
19470 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
19471 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
19472 Use the original predicate if it already has a suitable type.
19474 2020-01-09 Martin Jambor <mjambor@suse.cz>
19476 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
19477 resolve_speculation and redirect_call_stmt_to_callee static. Change
19478 return type of set_call_stmt to cgraph_edge *.
19479 * auto-profile.c (afdo_indirect_call): Adjust call to
19480 redirect_call_stmt_to_callee.
19481 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
19482 make the this pointer explicit, adjust self-recursive calls and the
19483 call top make_direct. Return the resulting edge.
19484 (cgraph_edge::remove): Make this pointer explicit.
19485 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
19486 (cgraph_edge::make_direct): Likewise, adjust call to
19487 resolve_speculation.
19488 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
19489 call to set_call_stmt.
19490 (cgraph_update_edges_for_call_stmt_node): Update call to
19491 set_call_stmt and remove.
19492 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
19493 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
19494 (cgraph_node::create_edge_including_clones): Moved "first" definition
19495 of edge to the block where it was used. Adjusted calls to
19497 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
19498 cgraph_edge::remove.
19499 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
19500 make_direct and redirect_call_stmt_to_callee.
19501 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
19502 resolve_speculation and make_direct.
19503 * ipa-inline-transform.c (inline_transform): Adjust call to
19504 redirect_call_stmt_to_callee.
19505 (check_speculations_1):: Adjust call to resolve_speculation.
19506 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
19507 resolve-speculation.
19508 (inline_small_functions): Adjust call to resolve_speculation.
19509 (ipa_inline): Likewise.
19510 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
19512 * ipa-visibility.c (function_and_variable_visibility): Make iteration
19513 safe with regards to edge removal, adjust calls to
19514 redirect_call_stmt_to_callee.
19515 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
19516 and redirect_call_stmt_to_callee.
19517 * multiple_target.c (create_dispatcher_calls): Adjust call to
19518 redirect_call_stmt_to_callee
19519 (redirect_to_specific_clone): Likewise.
19520 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
19521 Adjust calls to cgraph_edge::remove.
19522 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
19523 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
19524 (expand_call_inline): Adjust call to cgraph_edge::remove.
19526 2020-01-09 Martin Liska <mliska@suse.cz>
19528 * params.opt: Set Optimization for
19529 param_max_speculative_devirt_maydefs.
19531 2020-01-09 Martin Sebor <msebor@redhat.com>
19533 PR middle-end/93200
19535 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
19537 2020-01-09 Martin Liska <mliska@suse.cz>
19539 * auto-profile.c (auto_profile): Use opt_for_fn
19541 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
19542 (propagate_vals_across_arith_jfunc): Likewise.
19543 (hint_time_bonus): Likewise.
19544 (incorporate_penalties): Likewise.
19545 (good_cloning_opportunity_p): Likewise.
19546 (perform_estimation_of_a_value): Likewise.
19547 (estimate_local_effects): Likewise.
19548 (ipcp_propagate_stage): Likewise.
19549 * ipa-fnsummary.c (decompose_param_expr): Likewise.
19550 (set_switch_stmt_execution_predicate): Likewise.
19551 (analyze_function_body): Likewise.
19552 * ipa-inline-analysis.c (offline_size): Likewise.
19553 * ipa-inline.c (early_inliner): Likewise.
19554 * ipa-prop.c (ipa_analyze_node): Likewise.
19555 (ipcp_transform_function): Likewise.
19556 * ipa-sra.c (process_scan_results): Likewise.
19557 (ipa_sra_summarize_function): Likewise.
19558 * params.opt: Rename ipcp-unit-growth to
19559 ipa-cp-unit-growth. Add Optimization for various
19560 IPA-related parameters.
19562 2020-01-09 Richard Biener <rguenther@suse.de>
19564 PR middle-end/93054
19565 * gimplify.c (gimplify_expr): Deal with NOP definitions.
19567 2020-01-09 Richard Biener <rguenther@suse.de>
19569 PR tree-optimization/93040
19570 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
19572 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
19574 * common/config/avr/avr-common.c (avr_option_optimization_table)
19575 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
19577 2020-01-09 Martin Liska <mliska@suse.cz>
19579 * cgraphclones.c (symbol_table::materialize_all_clones):
19580 Use cgraph_node::dump_name.
19582 2020-01-09 Jakub Jelinek <jakub@redhat.com>
19584 PR inline-asm/93202
19585 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
19586 output_operand_lossage instead of gcc_unreachable.
19587 * doc/md.texi (riscv f constraint): Fix typo.
19590 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
19591 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
19592 CONST_SCALAR_INT_P instead of CONST_INT_P.
19593 (*subv<mode>4_1): Rename to ...
19594 (subv<mode>4_1): ... this.
19595 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
19596 define_insn_and_split patterns.
19597 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
19600 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19602 * vec.c (class selftest::count_dtor): New class.
19603 (selftest::test_auto_delete_vec): New test.
19604 (selftest::vec_c_tests): Call it.
19605 * vec.h (class auto_delete_vec): New class template.
19606 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
19608 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19610 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
19612 2020-01-08 Jim Wilson <jimw@sifive.com>
19614 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
19615 use of TLS_MODEL_LOCAL_EXEC when not pic.
19617 2020-01-08 David Malcolm <dmalcolm@redhat.com>
19619 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
19622 2020-01-08 Jakub Jelinek <jakub@redhat.com>
19625 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
19626 *stack_protect_set_3 peephole2): Also check that the second
19627 insns source is general_operand.
19630 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
19631 predicate for output operand instead of register_operand.
19632 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
19633 memory destination and non-memory operands[2].
19635 2020-01-08 Martin Liska <mliska@suse.cz>
19637 * cgraph.c (cgraph_node::dump): Use ::dump_name or
19638 ::dump_asm_name instead of (::name or ::asm_name).
19639 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
19640 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
19641 (analyze_functions): Likewise.
19642 (expand_all_functions): Likewise.
19643 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
19644 (propagate_bits_across_jump_function): Likewise.
19645 (dump_profile_updates): Likewise.
19646 (ipcp_store_bits_results): Likewise.
19647 (ipcp_store_vr_results): Likewise.
19648 * ipa-devirt.c (dump_targets): Likewise.
19649 * ipa-fnsummary.c (analyze_function_body): Likewise.
19650 * ipa-hsa.c (check_warn_node_versionable): Likewise.
19651 (process_hsa_functions): Likewise.
19652 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
19653 (set_alias_uids): Likewise.
19654 * ipa-inline-transform.c (save_inline_function_body): Likewise.
19655 * ipa-inline.c (recursive_inlining): Likewise.
19656 (inline_to_all_callers_1): Likewise.
19657 (ipa_inline): Likewise.
19658 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
19659 (ipa_propagate_frequency): Likewise.
19660 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
19661 (remove_described_reference): Likewise.
19662 * ipa-pure-const.c (worse_state): Likewise.
19663 (check_retval_uses): Likewise.
19664 (analyze_function): Likewise.
19665 (propagate_pure_const): Likewise.
19666 (propagate_nothrow): Likewise.
19667 (dump_malloc_lattice): Likewise.
19668 (propagate_malloc): Likewise.
19669 (pass_local_pure_const::execute): Likewise.
19670 * ipa-visibility.c (optimize_weakref): Likewise.
19671 (function_and_variable_visibility): Likewise.
19672 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
19673 (ipa_discover_variable_flags): Likewise.
19674 * lto-streamer-out.c (output_function): Likewise.
19675 (output_constructor): Likewise.
19676 * tree-inline.c (copy_bb): Likewise.
19677 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
19678 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
19680 2020-01-08 Richard Biener <rguenther@suse.de>
19682 PR middle-end/93199
19683 * tree-eh.c (sink_clobbers): Update virtual operands for
19684 the first and last stmt only. Add a dry-run capability.
19685 (pass_lower_eh_dispatch::execute): Perform clobber sinking
19686 after CFG manipulations and in RPO order to catch all
19687 secondary opportunities reliably.
19689 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19692 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
19694 2019-01-08 Richard Biener <rguenther@suse.de>
19696 PR middle-end/93199
19697 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
19698 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
19699 virtual operand, also updating SSA use.
19700 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
19701 Update stmt after resetting virtual operand.
19702 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
19703 * gimple-iterator.c (gsi_remove): When not removing the stmt
19704 permanently do not delink immediate uses or mark the stmt modified.
19706 2020-01-08 Martin Liska <mliska@suse.cz>
19708 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
19709 (ipa_call_context::estimate_size_and_time): Likewise.
19710 (inline_analyze_function): Likewise.
19712 2020-01-08 Martin Liska <mliska@suse.cz>
19714 * cgraph.c (cgraph_node::dump): Use systematically
19717 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19719 Add -nodevicespecs option for avr.
19722 * config/avr/avr.opt (-nodevicespecs): New driver option.
19723 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
19724 "-specs=device-specs/..." if that option is not set.
19725 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
19727 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
19729 Implement 64-bit double functions for avr.
19732 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
19733 --with-double-comparison.
19734 * doc/install.texi: Document them.
19735 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
19736 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
19737 <WITH_DOUBLE_COMPARISON>: New built-in defines.
19738 * doc/invoke.texi (AVR Built-in Macros): Document them.
19739 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
19740 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
19741 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
19743 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
19746 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
19747 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
19748 when only building rm-profile multilibs.
19750 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
19753 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
19754 lattice for a value to check.
19755 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
19756 finite propagation in self-recursive scc.
19758 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
19760 * ipa-inline.c (caller_growth_limits): Restore the AND.
19762 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
19764 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
19765 (VEC_ALLREG_ALT): New iterator.
19766 (VEC_ALLREG_INT_MODE): New iterator.
19767 (VCMP_MODE): New iterator.
19768 (VCMP_MODE_INT): New iterator.
19769 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
19770 (vec_cmp<u>v64qidi): New define_expand.
19771 (vec_cmp<mode>di_exec): Use VCMP_MODE.
19772 (vec_cmpu<mode>di_exec): New define_expand.
19773 (vec_cmp<u>v64qidi_exec): New define_expand.
19774 (vec_cmp<mode>di_dup): Use VCMP_MODE.
19775 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
19776 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
19777 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
19778 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
19779 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
19780 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
19781 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
19782 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
19783 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
19785 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
19786 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
19788 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
19790 * config/gcn/constraints.md (DA): Update description and match.
19792 (Db): New constraint.
19793 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
19795 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
19796 Implement 'Db' mixed immediate type.
19797 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
19798 (addcv64si3_dup<exec_vcc>): Delete.
19799 (subcv64si3<exec_vcc>): Rework constraints.
19800 (addv64di3): Rework constraints.
19801 (addv64di3_exec): Rework constraints.
19802 (subv64di3): Rework constraints.
19803 (addv64di3_dup): Delete.
19804 (addv64di3_dup_exec): Delete.
19805 (addv64di3_zext): Rework constraints.
19806 (addv64di3_zext_exec): Rework constraints.
19807 (addv64di3_zext_dup): Rework constraints.
19808 (addv64di3_zext_dup_exec): Rework constraints.
19809 (addv64di3_zext_dup2): Rework constraints.
19810 (addv64di3_zext_dup2_exec): Rework constraints.
19811 (addv64di3_sext_dup2): Rework constraints.
19812 (addv64di3_sext_dup2_exec): Rework constraints.
19814 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
19816 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
19817 existing target checks.
19819 2020-01-07 Richard Biener <rguenther@suse.de>
19821 * doc/install.texi: Bump minimal supported MPC version.
19823 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
19825 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
19826 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
19827 * langhooks.c: Include stor-layout.h.
19828 (lhd_simulate_enum_decl): New function.
19829 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
19830 handle_arm_sve_h for the LTO frontend.
19831 (register_vector_type): Cope with null returns from pushdecl.
19833 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
19835 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
19836 (aarch64_sve::nvectors_if_data_type): Replace with...
19837 (aarch64_sve::builtin_type_p): ...this.
19838 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
19839 (find_vector_type): Delete.
19840 (add_sve_type_attribute): New function.
19841 (lookup_sve_type_attribute): Likewise.
19842 (register_builtin_types): Add an "SVE type" attribute to each type.
19843 (register_tuple_type): Likewise.
19844 (svbool_type_p, nvectors_if_data_type): Delete.
19845 (mangle_builtin_type): Use lookup_sve_type_attribute.
19846 (builtin_type_p): Likewise. Add an overload that returns the
19847 number of constituent vector and predicate registers.
19848 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
19849 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
19850 instead of aarch64_sve_argument_p.
19851 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
19852 (aarch64_pass_by_reference): Likewise.
19853 (aarch64_function_value_1): Likewise.
19854 (aarch64_return_in_memory): Likewise.
19855 (aarch64_layout_arg): Likewise.
19857 2020-01-07 Jakub Jelinek <jakub@redhat.com>
19859 PR tree-optimization/93156
19860 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
19861 least significant bit is always clear.
19863 PR tree-optimization/93118
19864 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
19865 simplifier with two intermediate conversions.
19867 2020-01-07 Martin Liska <mliska@suse.cz>
19869 * params.opt: Add Optimization for various parameters.
19871 2020-01-07 Martin Liska <mliska@suse.cz>
19874 * doc/extend.texi: Explain cloning for target_clone
19877 2020-01-07 Martin Liska <mliska@suse.cz>
19879 PR tree-optimization/92860
19880 * common.opt: Make in Optimization option
19881 as it is affected by -O0, which is an Optimization
19883 * tree-inline.c (tree_inlinable_function_p):
19884 Use opt_for_fn for warn_inline.
19885 (expand_call_inline): Likewise.
19887 2020-01-07 Martin Liska <mliska@suse.cz>
19889 PR tree-optimization/92860
19890 * common.opt: Make flag_ree as optimization
19893 2020-01-07 Martin Liska <mliska@suse.cz>
19895 PR optimization/92860
19896 * params.opt: Mark param_min_crossjump_insns with Optimization
19899 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
19901 * ipa-inline-analysis.c (estimate_growth): Fix typo.
19902 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
19904 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
19906 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
19907 helper function to return the valid addressing formats for a given
19908 hard register and mode.
19909 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
19911 * config/rs6000/constraints.md (Q constraint): Update
19913 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
19916 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
19917 Use 'Q' for doing vector extract from memory.
19918 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
19920 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
19921 doing vector extract from memory.
19922 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
19923 extract from memory.
19925 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
19926 for the offset being 34-bits when -mcpu=future is used.
19928 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
19930 * config/pa/pa.md: Revert change to use ordered_comparison_operator
19931 instead of cmpib_comparison_operator in cmpib patterns.
19932 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
19933 of cmpib_comparison_operator. Revise comment.
19935 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19937 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
19938 in an IFN_DIV_POW2 node to be equal.
19940 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19942 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
19943 (vect_check_scalar_mask): ...this.
19944 (vectorizable_store, vectorizable_load): Update call accordingly.
19945 (vectorizable_call): Use vect_check_scalar_mask to check the mask
19946 argument in calls to conditional internal functions.
19948 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19950 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
19951 '0' matching inputs.
19952 (subv64di3_exec): Likewise.
19954 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
19956 * config/mips/mips.c (vr4130_align_insns): Fix typo.
19957 * doc/md.texi (movstr): Likewise.
19959 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19961 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
19964 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19966 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
19968 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
19969 to a temporary file and use move-if-change to update the real
19970 file where necessary.
19972 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
19974 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
19975 rather than Upa for CPY /M.
19977 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
19979 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
19982 2020-01-06 Martin Liska <mliska@suse.cz>
19984 PR tree-optimization/92860
19985 * params.opt: Mark param_max_combine_insns with Optimization
19988 2020-01-05 Jakub Jelinek <jakub@redhat.com>
19991 * config/i386/i386.md (SWIDWI): New mode iterator.
19992 (DWI, dwi): Add TImode variants.
19993 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
19994 <general_hilo_operand> instead of <general_operand>. Use
19995 CONST_SCALAR_INT_P instead of CONST_INT_P.
19996 (*addv<mode>4_1): Rename to ...
19997 (addv<mode>4_1): ... this.
19998 (QWI): New mode attribute.
19999 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
20000 define_insn_and_split patterns.
20001 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
20003 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
20004 <general_hilo_operand> instead of <general_operand>.
20005 (*addcarry<mode>_1): New define_insn.
20006 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
20008 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
20010 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
20011 Use "call" instead of "set".
20013 2020-01-03 Martin Jambor <mjambor@suse.cz>
20016 * ipa-cp.c (print_all_lattices): Skip functions without info.
20018 2020-01-03 Jakub Jelinek <jakub@redhat.com>
20021 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
20022 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
20023 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
20024 for 'e' simd clones.
20027 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
20029 (mprefer-vector-width=): Add Save.
20030 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
20031 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
20032 (ix86_debug_options, ix86_function_specific_print): Adjust
20033 ix86_target_string callers.
20034 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
20035 (ix86_valid_target_attribute_tree): Likewise.
20036 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
20037 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
20038 ix86_target_string caller.
20041 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
20042 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
20043 instead of gen_int_shift_amount + convert_modes.
20045 PR rtl-optimization/93088
20046 * loop-iv.c (find_single_def_src): Punt after looking through
20047 128 reg copies for regs with single definitions. Move definitions
20050 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
20052 * config/arm/arm-c.c (arm_cpu_builtins): Define
20053 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
20054 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
20055 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
20056 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
20057 * config/arm/arm-tables.opt: Regenerated.
20058 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
20059 arm_arch_i8mm and arm_arch_bf16 when enabled.
20060 * config/arm/arm.h (TARGET_I8MM): New macro.
20061 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
20062 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
20063 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
20064 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
20065 (v8_6_a_simd_variants): New.
20066 (v8_*_a_simd_variants): Add i8mm and bf16.
20067 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
20069 2020-01-02 Jakub Jelinek <jakub@redhat.com>
20072 * predict.c (compute_function_frequency): Don't call
20073 warn_function_cold on functions that already have cold attribute.
20075 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
20078 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
20079 COMDAT group function labels in .data.rel.ro.local section.
20080 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
20083 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
20084 comparison_operator in B and S integer comparisons. Likewise, use
20085 ordered_comparison_operator instead of cmpib_comparison_operator in
20087 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
20089 2020-01-01 Jakub Jelinek <jakub@redhat.com>
20091 Update copyright years.
20093 * gcc.c (process_command): Update copyright notice dates.
20094 * gcov-dump.c (print_version): Ditto.
20095 * gcov.c (print_version): Ditto.
20096 * gcov-tool.c (print_version): Ditto.
20097 * gengtype.c (create_file): Ditto.
20098 * doc/cpp.texi: Bump @copying's copyright year.
20099 * doc/cppinternals.texi: Ditto.
20100 * doc/gcc.texi: Ditto.
20101 * doc/gccint.texi: Ditto.
20102 * doc/gcov.texi: Ditto.
20103 * doc/install.texi: Ditto.
20104 * doc/invoke.texi: Ditto.
20106 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
20108 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
20111 2020-01-01 Jakub Jelinek <jakub@redhat.com>
20113 PR tree-optimization/93098
20114 * match.pd (popcount): For shift amounts, use integer_onep
20115 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
20116 tests. Make sure that precision is power of two larger than or equal
20117 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
20118 instead of ULL suffixed constants. Formatting fixes.
20120 Copyright (C) 2020 Free Software Foundation, Inc.
20122 Copying and distribution of this file, with or without modification,
20123 are permitted in any medium without royalty provided the copyright
20124 notice and this notice are preserved.