1 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
3 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
4 ubsan_{data,type},ASAN symbols linker-visible.
6 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
8 * lto-streamer-out.c (DFS::DFS): Silence warning.
10 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
13 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
14 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
16 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
18 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
21 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
23 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
24 * lto-streamer-out.c (create_output_block): Fix whitespace
25 (lto_write_tree_1): Add (debug) dump.
27 (DFS::DFS_write_tree_body): Do not dump here.
28 (lto_output_tree): Improve dumping; do not stream ref when not needed.
29 (produce_asm_for_decls): Fix whitespace.
30 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
31 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
33 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
36 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
37 (truncv32hiv32qi2): Ditto.
38 (trunc<ssedoublemodelower><mode>2): Ditto.
39 (trunc<mode><pmov_dst_3>2): Ditto.
40 (trunc<mode><pmov_dst_mode_4>2): Ditto.
41 (truncv2div2si2): Ditto.
42 (truncv8div8qi2): Ditto.
43 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
44 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
45 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
46 *avx512vl_<code><mode>v<ssescalarnum>qi2.
48 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
51 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
54 2020-05-22 Richard Biener <rguenther@suse.de>
56 PR tree-optimization/95268
57 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
60 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
62 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
65 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
67 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
68 (lto_input_scc): Optimize streaming of entry lengths.
69 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
70 (DFS::DFS): Optimize stremaing of entry lengths
72 2020-05-22 Richard Biener <rguenther@suse.de>
75 * doc/invoke.texi (flto): Document behavior of diagnostic
78 2020-05-22 Richard Biener <rguenther@suse.de>
80 * tree-vectorizer.h (vect_is_simple_use): New overload.
81 (vect_maybe_update_slp_op_vectype): New.
82 * tree-vect-stmts.c (vect_is_simple_use): New overload
83 accessing operands of SLP vs. non-SLP operation transparently.
84 (vect_maybe_update_slp_op_vectype): New function updating
85 the possibly shared SLP operands vector type.
86 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
87 using the new vect_is_simple_use overload; update SLP invariant
88 operand nodes vector type.
89 (vectorizable_comparison): Likewise.
90 (vectorizable_call): Likewise.
91 (vectorizable_conversion): Likewise.
92 (vectorizable_shift): Likewise.
93 (vectorizable_store): Likewise.
94 (vectorizable_condition): Likewise.
95 (vectorizable_assignment): Likewise.
96 * tree-vect-loop.c (vectorizable_reduction): Likewise.
97 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
98 present SLP_TREE_VECTYPE and check it matches previous
101 2020-05-22 Richard Biener <rguenther@suse.de>
103 PR tree-optimization/95248
104 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
106 2020-05-22 Richard Biener <rguenther@suse.de>
108 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
109 (_slp_tree::~_slp_tree): Likewise.
110 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
112 (_slp_tree::~_slp_tree): Implement.
113 (vect_free_slp_tree): Simplify.
114 (vect_create_new_slp_node): Likewise. Add nops parameter.
115 (vect_build_slp_tree_2): Adjust.
116 (vect_analyze_slp_instance): Likewise.
118 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
120 * adjust-alignment.c: Include memmodel.h.
122 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
125 * config/i386/cpuid.h: Use hexadecimal in comments.
127 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
130 * config/i386/i386-builtins.c (processor_features): Move
131 F_AVX512VP2INTERSECT after F_AVX512BF16.
132 (isa_names_table): Likewise.
134 2020-05-21 Martin Liska <mliska@suse.cz>
136 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
137 Handle OPT_moutline_atomics.
138 * config/aarch64/aarch64.c: Add outline-atomics to
140 * doc/extend.texi: Document the newly added target attribute.
142 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
146 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
147 operands 1 and 2 commutative. Manually swap operands.
148 (*mmx_nabsv2sf2): Ditto.
151 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
153 * config/i386/i386.md (*<code>tf2_1):
154 Mark operands 1 and 2 commutative.
156 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
157 commutative. Do not swap operands.
158 (*nabs<mode>2): Ditto.
160 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
163 * config/i386/sse.md (<code>v8qiv8hi2): Use
164 simplify_gen_subreg instead of simplify_subreg.
165 (<code>v8qiv8si2): Ditto.
166 (<code>v4qiv4si2): Ditto.
167 (<code>v4hiv4si2): Ditto.
168 (<code>v8qiv8di2): Ditto.
169 (<code>v4qiv4di2): Ditto.
170 (<code>v2qiv2di2): Ditto.
171 (<code>v4hiv4di2): Ditto.
172 (<code>v2hiv2di2): Ditto.
173 (<code>v2siv2di2): Ditto.
175 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
178 * config/i386/i386.md (*pushsi2_rex64):
179 Use "e" constraint instead of "i".
181 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
183 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
184 (lto_input_tree_1): Strenghten sanity check.
185 (lto_input_tree): Update call of lto_input_scc.
186 * lto-streamer-out.c: Include ipa-utils.h
187 (create_output_block): Initialize local_trees if merigng is going
189 (destroy_output_block): Destroy local_trees.
190 (DFS): Add max_local_entry.
191 (local_tree_p): New function.
192 (DFS::DFS): Initialize and maintain it.
193 (DFS::DFS_write_tree): Decide on streaming format.
194 (lto_output_tree): Stream inline singleton SCCs
195 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
196 (struct output_block): Add local_trees.
197 (lto_input_scc): Update prototype.
199 2020-05-20 Patrick Palka <ppalka@redhat.com>
202 * hash-table.h (hash_table::find_with_hash): Move up the call to
205 2020-05-20 Martin Liska <mliska@suse.cz>
207 * lto-compress.c (lto_compression_zstd): Fill up
208 num_compressed_il_bytes.
209 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
211 2020-05-20 Richard Biener <rguenther@suse.de>
213 PR tree-optimization/95219
214 * tree-vect-loop.c (vectorizable_induction): Reduce
215 group_size before computing the number of required IVs.
217 2020-05-20 Richard Biener <rguenther@suse.de>
220 * tree-inline.c (remap_gimple_stmt): Revert adjusting
221 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
223 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
224 Andre Vieira <andre.simoesdiasvieira@arm.com>
227 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
229 (mve_vector_mem_operand): Likewise.
230 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
231 the load from memory to a core register is legitimate for give mode.
232 (mve_vector_mem_operand): Define function.
233 (arm_print_operand): Modify comment.
234 (arm_mode_base_reg_class): Define.
235 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
236 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
237 * config/arm/constraints.md (Ux): Likewise.
239 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
240 add support for missing Vector Store Register and Vector Load Register.
241 Add a new alternative to support load from memory to PC (or label) in
243 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
244 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
245 mve_memory_operand and also modify the MVE instructions to emit.
246 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
247 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
248 mve_memory_operand and also modify the MVE instructions to emit.
249 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
250 mve_memory_operand and also modify the MVE instructions to emit.
251 (mve_vldrhq_z_fv8hf): Likewise.
252 (mve_vldrhq_z_<supf><mode>): Likewise.
253 (mve_vldrwq_fv4sf): Likewise.
254 (mve_vldrwq_<supf>v4si): Likewise.
255 (mve_vldrwq_z_fv4sf): Likewise.
256 (mve_vldrwq_z_<supf>v4si): Likewise.
257 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
258 (mve_vld1q_<supf><mode>): Likewise.
259 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
261 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
262 mve_memory_operand and also modify the MVE instructions to emit.
263 (mve_vstrhq_p_<supf><mode>): Likewise.
264 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
266 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
267 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
268 instructions to emit.
269 (mve_vstrwq_p_<supf>v4si): Likewise.
270 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
271 * config/arm/predicates.md (mve_memory_operand): Define.
273 2020-05-30 Richard Biener <rguenther@suse.de>
276 * c-fold.c (c_fully_fold_internal): Enhance guard on
279 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
282 * Makefile.in (OBJS): Add adjust-alignment.o.
283 * adjust-alignment.c (pass_data_adjust_alignment): New.
284 (pass_adjust_alignment): New.
285 (pass_adjust_alignment::execute): New.
286 (make_pass_adjust_alignment): New.
287 * tree-pass.h (make_pass_adjust_alignment): New.
288 * passes.def: Add pass_adjust_alignment.
290 2020-05-19 Alex Coplan <alex.coplan@arm.com>
293 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
294 identity permutation.
296 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
298 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
299 msp430_small, msp430_large and size24plus DejaGNU effective
301 Improve grammar in descriptions for size20plus and size32plus effective
304 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
306 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
307 callee saved registers only in xBPF.
308 (bpf_expand_prologue): Save callee saved registers only in xBPF.
309 (bpf_expand_epilogue): Likewise for restoring.
310 * doc/invoke.texi (eBPF Options): Document this is activated by
313 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
315 * config/bpf/bpf.opt (mxbpf): New option.
316 * doc/invoke.texi (Option Summary): Add -mxbpf.
317 (eBPF Options): Document -mxbbpf.
319 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
322 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
323 (<code>v32qiv32hi2): Ditto.
324 (<code>v8qiv8hi2): Ditto.
325 (<code>v16qiv16si2): Ditto.
326 (<code>v8qiv8si2): Ditto.
327 (<code>v4qiv4si2): Ditto.
328 (<code>v16hiv16si2): Ditto.
329 (<code>v8hiv8si2): Ditto.
330 (<code>v4hiv4si2): Ditto.
331 (<code>v8qiv8di2): Ditto.
332 (<code>v4qiv4di2): Ditto.
333 (<code>v2qiv2di2): Ditto.
334 (<code>v8hiv8di2): Ditto.
335 (<code>v4hiv4di2): Ditto.
336 (<code>v2hiv2di2): Ditto.
337 (<code>v8siv8di2): Ditto.
338 (<code>v4siv4di2): Ditto.
339 (<code>v2siv2di2): Ditto.
341 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
343 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
344 (riscv_implied_info): New.
345 (riscv_subset_list): Add handle_implied_ext.
346 (riscv_subset_list::to_string): New parameter version_p to
347 control output format.
348 (riscv_subset_list::handle_implied_ext): New.
349 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
350 (riscv_arch_str): New parameter version_p to control output format.
351 (riscv_expand_arch): New.
352 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
354 * config/riscv/riscv.h (riscv_expand_arch): New,
355 (EXTRA_SPEC_FUNCTIONS): Define.
356 (ASM_SPEC): Transform -march= via riscv_expand_arch.
358 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
360 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
361 parse_multiletter_ext.
362 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
363 adjust parsing order for 's' and 'x'.
365 2020-05-19 Richard Biener <rguenther@suse.de>
367 * tree-vectorizer.h (_slp_tree::vectype): Add field.
368 (SLP_TREE_VECTYPE): New.
369 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
371 (vect_create_new_slp_node): Likewise.
372 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
374 (vect_slp_analyze_node_operations): Walk nodes children for
376 (vect_get_constant_vectors): Use local scope op variable.
377 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
378 (vect_model_simple_cost): Adjust.
379 (vect_model_store_cost): Likewise.
380 (vectorizable_store): Likewise.
382 2020-05-18 Martin Sebor <msebor@redhat.com>
385 * tree-object-size.c (decl_init_size): New function.
386 (addr_object_size): Call it.
387 * tree.h (last_field): Declare.
388 (first_field): Add attribute nonnull.
390 2020-05-18 Martin Sebor <msebor@redhat.com>
393 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
394 * tree.c (component_ref_size): Correct the handling or array members
396 Drop a pointless test.
397 Rename a local variable.
399 2020-05-18 Jason Merrill <jason@redhat.com>
401 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
402 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
404 2020-05-14 Jason Merrill <jason@redhat.com>
406 * doc/install.texi (Prerequisites): Update boostrap compiler
407 requirement to C++11/GCC 4.8.
409 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
411 PR tree-optimization/94952
412 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
413 Initialize variables bitpos, bitregion_start, and bitregion_end in
414 order to silence warnings about use of uninitialized variables.
416 2020-05-18 Carl Love <cel@us.ibm.com>
419 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
420 first_match_index_<mode>.
421 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
422 additional test cases with zero vector elements.
424 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
427 * config/i386/i386-expand.c (ix86_expand_int_movcc):
428 Avoid reversing a non-trapping comparison to a trapping one.
430 2020-05-18 Alex Coplan <alex.coplan@arm.com>
432 * config/arm/arm.c (output_move_double): Fix codegen when loading into
433 a register pair with an odd base register.
435 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
437 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
438 Do not emit FLAGS_REG clobber for TFmode.
439 * config/i386/i386.md (*<code>tf2_1): Rewrite as
440 define_insn_and_split. Mark operands 1 and 2 commutative.
442 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
443 Do not swap memory operands. Simplify RTX generation.
444 (neg abs SSE splitter): Ditto.
445 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
446 commutative. Do not swap operands. Simplify RTX generation.
447 (*nabs<mode>2): Ditto.
449 2020-05-18 Richard Biener <rguenther@suse.de>
451 * tree-vect-slp.c (vect_slp_bb): Start after labels.
452 (vect_get_constant_vectors): Really place init stmt after scalar defs.
453 * tree-vect-stmts.c (vect_init_vector_1): Insert before
456 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
458 * config/i386/driver-i386.c (host_detect_local_cpu): Support
459 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
462 2020-05-18 Richard Biener <rguenther@suse.de>
465 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
466 when inlining into a non-call EH function.
468 2020-05-18 Richard Biener <rguenther@suse.de>
470 PR tree-optimization/95172
471 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
472 eventually need the conditional processing.
473 (execute_sm_exit): When processing an orderd sequence
474 avoid doing any conditional processing.
475 (hoist_memory_references): Pass down whether all edges
476 have ordered processing for a ref to execute_sm.
478 2020-05-17 Jeff Law <law@redhat.com>
480 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
481 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
482 into a single pattern using pc_or_label_operand.
483 * config/h8300/combiner.md (bit branch patterns): Likewise.
484 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
486 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
489 * config/i386/i386-features.c (has_non_address_hard_reg):
491 (pseudo_reg_set): This. Return the SET expression. Ignore
492 pseudo register push.
493 (general_scalar_to_vector_candidate_p): Combine single_set and
494 has_non_address_hard_reg calls to pseudo_reg_set.
495 (timode_scalar_to_vector_candidate_p): Likewise.
496 * config/i386/i386.md (*pushv1ti2): New pattern.
498 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
501 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
503 * tree-vrp.c (operand_less_p): Move to...
504 * vr-values.c (operand_less_p): ...here.
505 * tree-vrp.h (operand_less_p): Remove.
507 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
509 * tree-vrp.c (operand_less_p): Move to...
510 * vr-values.c (operand_less_p): ...here.
511 * tree-vrp.h (operand_less_p): Remove.
513 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
515 * tree-vrp.c (class vrp_insert): Remove prototype for
518 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
520 * tree-vrp.c (class live_names): New.
521 (live_on_edge): Move into live_names.
522 (build_assert_expr_for): Move into vrp_insert.
523 (find_assert_locations_in_bb): Rename from
524 find_assert_locations_1.
525 (process_assert_insertions_for): Move into vrp_insert.
526 (compare_assert_loc): Same.
527 (remove_range_assertions): Same.
528 (dump_asserts_for): Rename to vrp_insert::dump.
529 (debug_asserts_for): Rename to vrp_insert::debug.
530 (dump_all_asserts): Rename to vrp_insert::dump.
531 (debug_all_asserts): Rename to vrp_insert::debug.
533 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
535 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
536 check_array_ref, check_mem_ref, and search_for_addr_array
538 (class array_bounds_checker): ...here.
539 (class check_array_bounds_dom_walker): Adjust to use
540 array_bounds_checker.
541 (check_all_array_refs): Move into array_bounds_checker and rename
543 (class vrp_folder): Make fold_predicate_in private.
545 2020-05-15 Jeff Law <law@redhat.com>
547 * config/h8300/h8300.md (SFI iterator): New iterator for
549 * config/h8300/peepholes.md (memory comparison): Use mode
550 iterator to consolidate 3 patterns into one.
551 (stack allocation and stack store): Handle SFmode. Handle
554 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
556 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
557 RS6000_BTM_POWERPC64.
559 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
561 * config/i386/i386.md (SWI48DWI): New mode iterator.
562 (*push<mode>2): Allow XMM registers.
563 (*pushdi2_rex64): Ditto.
564 (*pushsi2_rex64): Ditto.
566 (push XMM reg splitter): New splitter
568 (*pushdf) Change "x" operand constraint to "v".
569 (*pushsf_rex64): Ditto.
572 2020-05-15 Richard Biener <rguenther@suse.de>
574 PR tree-optimization/92260
575 * tree-vect-slp.c (vect_get_constant_vectors): Compute
576 the number of vector stmts in a canonical way.
578 2020-05-15 Martin Liska <mliska@suse.cz>
580 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
583 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
585 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
587 2020-05-15 Richard Biener <rguenther@suse.de>
589 PR tree-optimization/95133
590 * gimple-ssa-split-paths.c
591 (find_block_to_duplicate_for_splitting_paths): Check for
594 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
596 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
598 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
600 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
603 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
604 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
607 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
610 * config/i386/i386.md (isa): Add sse3_noavx.
611 (enabled): Handle sse3_noavx.
613 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
614 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
615 alternatives. Match commutative vec_select selector operands.
616 (*mmx_haddv2sf3_low): New insn pattern.
618 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
619 (*mmx_hsubv2sf3_low): New insn pattern.
621 2020-05-15 Richard Biener <rguenther@suse.de>
623 PR tree-optimization/33315
624 * tree-ssa-sink.c: Include tree-eh.h.
625 (sink_stats): Add commoned member.
626 (sink_common_stores_to_bb): New function implementing store
627 commoning by sinking to the successor.
628 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
629 (pass_sink_code::execute): Likewise. Record commoned stores
632 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
634 PR rtl-optimization/37451, part of PR target/61837
635 * loop-doloop.c (doloop_simplify_count): New function. Simplify
636 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
637 (doloop_modify): Call doloop_simplify_count.
639 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
642 * doc/sourcebuild.texi: Document effective target lgccjit.
644 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
646 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
647 define_expand, and rename the original to ...
648 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
649 (add<mode>3_zext_dup_exec): Likewise, with ...
650 (add<mode>3_vcc_zext_dup_exec): ... this.
651 (add<mode>3_zext_dup2): Likewise, with ...
652 (add<mode>3_zext_dup_exec): ... this.
653 (add<mode>3_zext_dup2_exec): Likewise, with ...
654 (add<mode>3_zext_dup2): ... this.
655 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
656 addv64di3_zext* calls to use addv64di3_vcc_zext*.
658 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
661 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
662 (extendv2sfv2df2): Ditto.
664 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
666 * configure: Regenerated.
668 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
670 * config/arm/arm.c (reg_needs_saving_p): New function.
671 (use_return_insn): Use reg_needs_saving_p.
672 (arm_get_vfp_saved_size): Likewise.
673 (arm_compute_frame_layout): Likewise.
674 (arm_save_coproc_regs): Likewise.
675 (thumb1_expand_epilogue): Likewise.
676 (arm_expand_epilogue_apcs_frame): Likewise.
677 (arm_expand_epilogue): Likewise.
679 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
681 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
683 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
686 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
688 (floatv2siv2df2): New expander.
689 (floatunsv2siv2df2): New insn pattern.
691 (fix_truncv2dfv2si2): New expander.
692 (fixuns_truncv2dfv2si2): New insn pattern.
694 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
697 * config/aarch64/aarch64-sve-builtins.cc
698 (handle_arm_sve_vector_bits_attribute): Create a copy of the
699 original type's TYPE_MAIN_VARIANT, then reapply all the differences
700 between the original type and its main variant.
702 2020-05-14 Richard Biener <rguenther@suse.de>
705 * real.c (real_to_decimal_for_mode): Make sure we handle
706 a zero with nonzero exponent.
708 2020-05-14 Jakub Jelinek <jakub@redhat.com>
710 * Makefile.in (GTFILES): Add omp-general.c.
711 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
712 calls_declare_variant_alt members and initialize them in the
714 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
715 calls to declare_variant_alt nodes.
716 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
717 and calls_declare_variant_alt.
718 (input_overwrite_node): Read them back.
719 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
721 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
723 (tree_function_versioning): Copy calls_declare_variant_alt bit.
724 * omp-offload.c (execute_omp_device_lower): Call
725 omp_resolve_declare_variant on direct function calls.
726 (pass_omp_device_lower::gate): Also enable for
727 calls_declare_variant_alt functions.
728 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
729 (omp_context_selector_matches): Handle the case when
730 cfun->curr_properties has PROP_gimple_any bit set.
731 (struct omp_declare_variant_entry): New type.
732 (struct omp_declare_variant_base_entry): New type.
733 (struct omp_declare_variant_hasher): New type.
734 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
736 (omp_declare_variants): New variable.
737 (struct omp_declare_variant_alt_hasher): New type.
738 (omp_declare_variant_alt_hasher::hash,
739 omp_declare_variant_alt_hasher::equal): New methods.
740 (omp_declare_variant_alt): New variables.
741 (omp_resolve_late_declare_variant): New function.
742 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
743 when called late. Create a magic declare_variant_alt fndecl and
744 cgraph node and return that if decision needs to be deferred until
745 after gimplification.
746 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
750 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
751 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
752 entry block if info->after_stmt is NULL, otherwise add after that stmt
753 and update it after adding each stmt.
754 (ipa_simd_modify_function_body): Initialize info.after_stmt.
756 * function.h (struct function): Add has_omp_target bit.
757 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
759 (omp_discover_declare_target_tgt_fn_r): ... this.
760 (omp_discover_declare_target_var_r): Call
761 omp_discover_declare_target_tgt_fn_r instead of
762 omp_discover_declare_target_fn_r.
763 (omp_discover_implicit_declare_target): Also queue functions with
764 has_omp_target bit set, for those walk with
765 omp_discover_declare_target_fn_r, for declare target to functions
766 walk with omp_discover_declare_target_tgt_fn_r.
768 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
771 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
772 Add SSE/AVX alternative. Change operand predicates from
773 nonimmediate_operand to register_mmxmem_operand.
774 Enable instruction pattern for TARGET_MMX_WITH_SSE.
775 (fix_truncv2sfv2si2): New expander.
776 (fixuns_truncv2sfv2si2): New insn pattern.
778 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
779 Add SSE/AVX alternative. Change operand predicates from
780 nonimmediate_operand to register_mmxmem_operand.
781 Enable instruction pattern for TARGET_MMX_WITH_SSE.
782 (floatv2siv2sf2): New expander.
783 (floatunsv2siv2sf2): New insn pattern.
785 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
787 (IX86_BUILTIN_PI2FD): Ditto.
789 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
791 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
793 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
796 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
798 * config/s390/s390.c (allocate_stack_space): Add missing updates
799 of last_probe_offset.
801 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
803 * config/s390/s390.md ("allocate_stack"): Call
804 anti_adjust_stack_and_probe_stack_clash when stack clash
805 protection is enabled.
806 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
807 prototype. Remove static.
808 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
811 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
813 * config/rs6000/altivec.h (vec_extractl): New #define.
814 (vec_extracth): Likewise.
815 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
816 (UNSPEC_EXTRACTR): Likewise.
817 (vextractl<mode>): New expansion.
818 (vextractl<mode>_internal): New insn.
819 (vextractr<mode>): New expansion.
820 (vextractr<mode>_internal): New insn.
821 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
822 New built-in function.
823 (__builtin_altivec_vextduhvlx): Likewise.
824 (__builtin_altivec_vextduwvlx): Likewise.
825 (__builtin_altivec_vextddvlx): Likewise.
826 (__builtin_altivec_vextdubvhx): Likewise.
827 (__builtin_altivec_vextduhvhx): Likewise.
828 (__builtin_altivec_vextduwvhx): Likewise.
829 (__builtin_altivec_vextddvhx): Likewise.
830 (__builtin_vec_extractl): New overloaded built-in function.
831 (__builtin_vec_extracth): Likewise.
832 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
833 Define overloaded forms of __builtin_vec_extractl and
834 __builtin_vec_extracth.
835 (builtin_function_type): Add cases to mark arguments of new
836 built-in functions as unsigned.
837 (rs6000_common_init_builtins): Add
838 opaque_ftype_opaque_opaque_opaque_opaque.
839 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
840 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
841 for a Future Architecture): Add description of vec_extractl and
842 vec_extractr built-in functions.
844 2020-05-13 Richard Biener <rguenther@suse.de>
846 * target.def (add_stmt_cost): Add new vectype parameter.
847 * targhooks.c (default_add_stmt_cost): Adjust.
848 * targhooks.h (default_add_stmt_cost): Likewise.
849 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
851 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
852 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
853 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
855 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
856 (dump_stmt_cost): Add new vectype parameter.
857 (add_stmt_cost): Likewise.
858 (record_stmt_cost): Likewise.
859 (record_stmt_cost): Add overload with old signature.
860 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
862 (vect_get_known_peeling_cost): Likewise.
863 (vect_estimate_min_profitable_iters): Likewise.
864 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
865 * tree-vect-stmts.c (record_stmt_cost): Likewise.
866 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
867 and pass down correct vectype and NULL stmt_info.
868 (vect_model_simple_cost): Adjust.
869 (vect_model_store_cost): Likewise.
871 2020-05-13 Richard Biener <rguenther@suse.de>
873 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
874 (_slp_instance::group_size): Likewise.
875 * tree-vect-loop.c (vectorizable_reduction): The group size
876 is the number of lanes in the node.
877 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
878 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
879 verify it matches the instance trees number of lanes.
880 (vect_slp_analyze_node_operations_1): Use the numer of lanes
881 in the node as group size.
882 (vect_bb_vectorization_profitable_p): Use the instance root
883 number of lanes for the size of life.
884 (vect_schedule_slp_instance): Use the number of lanes as
886 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
887 parameter. Use the number of lanes of the load for the group
888 size in the gap adjustment code.
889 (vect_analyze_stmt): Adjust.
890 (vect_transform_stmt): Likewise.
892 2020-05-13 Jakub Jelinek <jakub@redhat.com>
895 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
896 if the last insn is a note.
898 PR tree-optimization/95060
899 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
900 if it is the single use of the FMA internal builtin.
902 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
904 PR tree-optimization/94969
905 * tree-data-dependence.c (constant_access_functions): Rename to...
906 (invariant_access_functions): ...this. Add parameter. Check for
907 invariant access function, rather than constant.
908 (build_classic_dist_vector): Call above function.
909 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
911 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
914 * doc/extend.texi (x86Operandmodifiers): Document more x86
916 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
918 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
920 * tree-vrp.c (class vrp_insert): New.
921 (insert_range_assertions): Move to class vrp_insert.
922 (dump_all_asserts): Same as above.
923 (dump_asserts_for): Same as above.
924 (live): Same as above.
925 (need_assert_for): Same as above.
926 (live_on_edge): Same as above.
927 (finish_register_edge_assert_for): Same as above.
928 (find_switch_asserts): Same as above.
929 (find_assert_locations): Same as above.
930 (find_assert_locations_1): Same as above.
931 (find_conditional_asserts): Same as above.
932 (process_assert_insertions): Same as above.
933 (register_new_assert_for): Same as above.
934 (vrp_prop): New variable fun.
935 (vrp_initialize): New parameter.
936 (identify_jump_threads): Same as above.
937 (execute_vrp): Same as above.
940 2020-05-12 Keith Packard <keith.packard@sifive.com>
942 * config/riscv/riscv.c (riscv_unique_section): New.
943 (TARGET_ASM_UNIQUE_SECTION): New.
945 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
947 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
948 * config/riscv/riscv-passes.def: New file.
949 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
950 * config/riscv/riscv-shorten-memrefs.c: New file.
951 * config/riscv/riscv.c (tree-pass.h): New include.
952 (riscv_compressed_reg_p): New Function
953 (riscv_compressed_lw_offset_p): Likewise.
954 (riscv_compressed_lw_address_p): Likewise.
955 (riscv_shorten_lw_offset): Likewise.
956 (riscv_legitimize_address): Attempt to convert base + large_offset
957 to compressible new_base + small_offset.
958 (riscv_address_cost): Make anticipated compressed load/stores
959 cheaper for code size than uncompressed load/stores.
960 (riscv_register_priority): Move compressed register check to
961 riscv_compressed_reg_p.
962 * config/riscv/riscv.h (C_S_BITS): Define.
963 (CSW_MAX_OFFSET): Define.
964 * config/riscv/riscv.opt (mshorten-memefs): New option.
965 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
966 (PASSES_EXTRA): Add riscv-passes.def.
967 * doc/invoke.texi: Document -mshorten-memrefs.
969 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
970 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
971 * doc/tm.texi: Regenerate.
972 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
973 * sched-deps.c (attempt_change): Use old address if it is cheaper than
975 * target.def (new_address_profitable_p): New hook.
976 * targhooks.c (default_new_address_profitable_p): New function.
977 * targhooks.h (default_new_address_profitable_p): Declare.
979 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
982 * config/i386/mmx.md (copysignv2sf3): New expander.
983 (xorsignv2sf3): Ditto.
984 (signbitv2sf3): Ditto.
986 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
989 * config/i386/mmx.md (fmav2sf4): New insn pattern.
994 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
996 * Makefile.in (CET_HOST_FLAGS): New.
997 (COMPILER): Add $(CET_HOST_FLAGS).
998 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
999 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
1001 * aclocal.m4: Regenerated.
1002 * configure: Likewise.
1004 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
1007 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
1008 (*mmx_<code>v2sf2): New insn_and_split pattern.
1009 (*mmx_nabsv2sf2): Ditto.
1010 (*mmx_andnotv2sf3): New insn pattern.
1011 (*mmx_<code>v2sf3): Ditto.
1012 * config/i386/i386.md (absneg_op): New code attribute.
1013 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
1014 (ix86_build_signbit_mask): Ditto.
1016 2020-05-12 Richard Biener <rguenther@suse.de>
1018 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
1021 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1023 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
1024 Update prototype to include "local" argument.
1025 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
1026 "local" argument. Handle local common decls.
1027 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
1028 msp430_output_aligned_decl_common call with 0 for "local" argument.
1029 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
1031 2020-05-12 Richard Biener <rguenther@suse.de>
1033 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
1035 2020-05-12 Martin Liska <mliska@suse.cz>
1039 * sanopt.c (sanitize_rewrite_addressable_params):
1040 Clear DECL_NOT_GIMPLE_REG_P for argument.
1042 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1044 PR tree-optimization/94980
1045 * tree-vect-generic.c (expand_vector_comparison): Use
1046 vector_element_bits_tree to get the element size in bits,
1047 rather than using TYPE_SIZE.
1048 (expand_vector_condition, vector_element): Likewise.
1050 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1052 PR tree-optimization/94980
1053 * tree-vect-generic.c (build_replicated_const): Take the number
1054 of bits as a parameter, instead of the type of the elements.
1055 (do_plus_minus): Update accordingly, using vector_element_bits
1056 to calculate the correct number of bits.
1057 (do_negate): Likewise.
1059 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1061 PR tree-optimization/94980
1062 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
1063 * tree.c (vector_element_bits, vector_element_bits_tree): New.
1064 * match.pd: Use the new functions instead of determining the
1065 vector element size directly from TYPE_SIZE(_UNIT).
1066 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
1067 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
1068 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
1069 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
1070 (expand_vector_conversion): Likewise.
1071 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
1072 a divisor. Convert the dividend to bits to compensate.
1073 * tree-vect-loop.c (vectorizable_live_operation): Call
1074 vector_element_bits instead of open-coding it.
1076 2020-05-12 Jakub Jelinek <jakub@redhat.com>
1078 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
1079 * omp-offload.c: Include context.h.
1080 (omp_declare_target_fn_p, omp_declare_target_var_p,
1081 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
1082 omp_discover_implicit_declare_target): New functions.
1083 * cgraphunit.c (analyze_functions): Call
1084 omp_discover_implicit_declare_target.
1086 2020-05-12 Richard Biener <rguenther@suse.de>
1088 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
1089 literal constant &MEM[..] to a constant literal.
1091 2020-05-12 Richard Biener <rguenther@suse.de>
1093 PR tree-optimization/95045
1094 * dbgcnt.def (lim): Add debug-counter.
1095 * tree-ssa-loop-im.c: Include dbgcnt.h.
1096 (find_refs_for_sm): Use lim debug counter for store motion
1098 (do_store_motion): Rename form store_motion. Commit edge
1100 (store_motion_loop): ... here.
1101 (tree_ssa_lim): Adjust.
1103 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1105 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
1106 (vec_ctzm): Rename to vec_cnttzm.
1107 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1108 Change fourth operand for vec_ternarylogic to require
1109 compatibility with unsigned SImode rather than unsigned QImode.
1110 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1111 Remove overloaded forms of vec_gnb that are no longer needed.
1112 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1113 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
1114 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
1115 vec_gnb; move vec_ternarylogic documentation into this section
1116 and replace const unsigned char with const unsigned int as its
1119 2020-05-11 Carl Love <cel@us.ibm.com>
1121 * config/rs6000/altivec.h (vec_genpcvm): New #define.
1122 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
1124 (XXGENPCVM_V8HI): Likewise.
1125 (XXGENPCVM_V4SI): Likewise.
1126 (XXGENPCVM_V2DI): Likewise.
1127 (XXGENPCVM): New overloaded built-in instantiation.
1128 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
1129 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
1130 (altivec_expand_builtin): Add special handling for
1131 FUTURE_BUILTIN_VEC_XXGENPCVM.
1132 (builtin_function_type): Add handling for
1133 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
1134 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
1135 (UNSPEC_XXGENPCV): New constant.
1136 (xxgenpcvm_<mode>_internal): New insn.
1137 (xxgenpcvm_<mode>): New expansion.
1138 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
1140 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1142 * config/rs6000/altivec.h (vec_strir): New #define.
1143 (vec_stril): Likewise.
1144 (vec_strir_p): Likewise.
1145 (vec_stril_p): Likewise.
1146 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
1147 (UNSPEC_VSTRIL): Likewise.
1148 (vstrir_<mode>): New expansion.
1149 (vstrir_code_<mode>): New insn.
1150 (vstrir_p_<mode>): New expansion.
1151 (vstrir_p_code_<mode>): New insn.
1152 (vstril_<mode>): New expansion.
1153 (vstril_code_<mode>): New insn.
1154 (vstril_p_<mode>): New expansion.
1155 (vstril_p_code_<mode>): New insn.
1156 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
1157 New built-in function.
1158 (__builtin_altivec_vstrihr): Likewise.
1159 (__builtin_altivec_vstribl): Likewise.
1160 (__builtin_altivec_vstrihl): Likewise.
1161 (__builtin_altivec_vstribr_p): Likewise.
1162 (__builtin_altivec_vstrihr_p): Likewise.
1163 (__builtin_altivec_vstribl_p): Likewise.
1164 (__builtin_altivec_vstrihl_p): Likewise.
1165 (__builtin_vec_strir): New overloaded built-in function.
1166 (__builtin_vec_stril): Likewise.
1167 (__builtin_vec_strir_p): Likewise.
1168 (__builtin_vec_stril_p): Likewise.
1169 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1170 Define overloaded forms of __builtin_vec_strir,
1171 __builtin_vec_stril, __builtin_vec_strir_p, and
1172 __builtin_vec_stril_p.
1173 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1174 for a Future Architecture): Add description of vec_stril,
1175 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
1177 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
1179 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
1180 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
1182 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
1183 * config/rs6000/rs6000-builtin.def: Add handling of new macro
1185 (BU_FUTURE_V_4): New macro. Use it.
1186 (BU_FUTURE_OVERLOAD_4): Likewise.
1187 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
1188 handling for quaternary built-in functions.
1189 (altivec_resolve_overloaded_builtin): Add special-case handling
1190 for __builtin_vec_xxeval.
1191 * config/rs6000/rs6000-call.c: Add handling of new macro
1192 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
1193 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
1194 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
1195 (altivec_overloaded_builtins): Add definitions for
1196 FUTURE_BUILTIN_VEC_XXEVAL.
1197 (bdesc_4arg): New array.
1198 (htm_expand_builtin): Add handling for quaternary built-in
1200 (rs6000_expand_quaternop_builtin): New function.
1201 (rs6000_expand_builtin): Add handling for quaternary built-in
1203 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
1204 for unsigned QImode and unsigned HImode.
1205 (builtin_quaternary_function_type): New function.
1206 (rs6000_common_init_builtins): Add handling of quaternary
1208 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
1210 (RS6000_BTC_PREDICATE): Change value of constant.
1211 (RS6000_BTC_ABS): Likewise.
1212 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
1213 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
1214 for a Future Architecture): Add description of vec_ternarylogic
1217 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1219 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
1221 (__builtin_pextd): Likewise.
1222 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
1223 (UNSPEC_PEXTD): Likewise.
1226 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1227 a Future Architecture): Add descriptions of __builtin_pdepd and
1228 __builtin_pextd functions.
1230 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1232 * config/rs6000/altivec.h (vec_clrl): New #define.
1233 (vec_clrr): Likewise.
1234 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
1235 (UNSPEC_VCLRRB): Likewise.
1238 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
1240 (__builtin_altivec_vclrrb): Likewise.
1241 (__builtin_vec_clrl): New overloaded built-in function.
1242 (__builtin_vec_clrr): Likewise.
1243 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1244 Define overloaded forms of __builtin_vec_clrl and
1246 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1247 for a Future Architecture): Add descriptions of vec_clrl and
1250 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1252 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
1253 built-in function definition.
1254 (__builtin_cnttzdm): Likewise.
1255 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
1256 (UNSPEC_CNTTZDM): Likewise.
1257 (cntlzdm): New insn.
1258 (cnttzdm): Likewise.
1259 * doc/extend.texi (Basic PowerPC Built-in Functions available for
1260 a Future Architecture): Add descriptions of __builtin_cntlzdm and
1261 __builtin_cnttzdm functions.
1263 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1266 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
1268 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1270 * config/rs6000/altivec.h (vec_cfuge): New #define.
1271 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
1272 (vcfuged): New insn.
1273 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
1274 New built-in function.
1275 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1276 handling for FUTURE_BUILTIN_VCFUGED case.
1277 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1278 for a Future Architecture): Add description of vec_cfuge built-in
1281 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1283 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
1285 (BU_FUTURE_MISC_1): Likewise.
1286 (BU_FUTURE_MISC_2): Likewise.
1287 (BU_FUTURE_MISC_3): Likewise.
1288 (__builtin_cfuged): New built-in function definition.
1289 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
1291 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1292 a Future Architecture): New subsubsection.
1294 2020-05-11 Richard Biener <rguenther@suse.de>
1296 PR tree-optimization/95049
1297 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
1298 between different constants.
1300 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
1302 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
1304 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1305 Bill Schmidt <wschmidt@linux.ibm.com>
1307 * config/rs6000/altivec.h (vec_gnb): New #define.
1308 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
1310 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
1312 (BU_FUTURE_OVERLOAD_2): Likewise.
1313 (BU_FUTURE_OVERLOAD_3): Likewise.
1314 (__builtin_altivec_gnb): New built-in function.
1315 (__buiiltin_vec_gnb): New overloaded built-in function.
1316 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1317 Define overloaded forms of __builtin_vec_gnb.
1318 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
1319 of __builtin_vec_gnb.
1320 (builtin_function_type): Mark return value and arguments unsigned
1321 for FUTURE_BUILTIN_VGNB.
1322 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1323 for a Future Architecture): Add description of vec_gnb built-in
1326 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1327 Bill Schmidt <wschmidt@linux.ibm.com>
1329 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
1331 (vec_pext): Likewise.
1332 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
1333 (UNSPEC_VPEXTD): Likewise.
1336 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
1338 (__builtin_altivec_vpextd): Likewise.
1339 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1340 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
1342 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1343 for a Future Architecture): Add description of vec_pdep and
1344 vec_pext built-in functions.
1346 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1347 Bill Schmidt <wschmidt@linux.ibm.com>
1349 * config/rs6000/altivec.h (vec_clzm): New macro.
1350 (vec_ctzm): Likewise.
1351 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
1352 (UNSPEC_VCTZDM): Likewise.
1355 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
1356 (BU_FUTURE_V_1): Likewise.
1357 (BU_FUTURE_V_2): Likewise.
1358 (BU_FUTURE_V_3): Likewise.
1359 (__builtin_altivec_vclzdm): New builtin definition.
1360 (__builtin_altivec_vctzdm): Likewise.
1361 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
1362 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
1364 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
1365 value and parameter types to be unsigned for VCLZDM and VCTZDM.
1366 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
1367 support for TARGET_FUTURE flag.
1368 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
1369 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1370 for a Future Architecture): New subsubsection.
1372 2020-05-11 Richard Biener <rguenther@suse.de>
1374 PR tree-optimization/94988
1375 PR tree-optimization/95025
1376 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
1377 (sm_seq_push_down): Take extra parameter denoting where we
1379 (execute_sm_exit): Re-issue sm_other stores in the correct
1381 (sm_seq_valid_bb): When always executed, allow sm_other to
1382 prevail inbetween sm_ord and record their stored value.
1383 (hoist_memory_references): Adjust refs_not_supported propagation
1384 and prune sm_other from the end of the ordered sequences.
1386 2020-05-11 Felix Yang <felix.yang@huawei.com>
1389 * config/aarch64/aarch64.md (mov<mode>):
1390 Bitcasts to the equivalent integer mode using gen_lowpart
1391 instead of doing FAIL for scalar floating point move.
1393 2020-05-11 Alex Coplan <alex.coplan@arm.com>
1395 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
1396 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
1397 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
1398 (*csinv3_uxtw_insn2): New.
1399 (*csinv3_uxtw_insn3): New.
1400 * config/aarch64/iterators.md (neg_not_cs): New.
1402 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1405 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
1406 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
1407 (*mmx_addv2sf3): Ditto.
1408 (*mmx_subv2sf3): Ditto.
1409 (*mmx_mulv2sf3): Ditto.
1410 (*mmx_<code>v2sf3): Ditto.
1411 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1413 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1416 * config/i386/i386.c (ix86_vector_mode_supported_p):
1417 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
1418 * config/i386/mmx.md (*mov<mode>_internal): Do not set
1419 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
1421 (mmx_addv2sf3): Change operand predicates from
1422 nonimmediate_operand to register_mmxmem_operand.
1423 (addv2sf3): New expander.
1424 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
1425 predicates from nonimmediate_operand to register_mmxmem_operand.
1426 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1428 (mmx_subv2sf3): Change operand predicate from
1429 nonimmediate_operand to register_mmxmem_operand.
1430 (mmx_subrv2sf3): Ditto.
1431 (subv2sf3): New expander.
1432 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
1433 predicates from nonimmediate_operand to register_mmxmem_operand.
1434 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1436 (mmx_mulv2sf3): Change operand predicates from
1437 nonimmediate_operand to register_mmxmem_operand.
1438 (mulv2sf3): New expander.
1439 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
1440 predicates from nonimmediate_operand to register_mmxmem_operand.
1441 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1443 (mmx_<code>v2sf3): Change operand predicates from
1444 nonimmediate_operand to register_mmxmem_operand.
1445 (<code>v2sf3): New expander.
1446 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
1447 predicates from nonimmediate_operand to register_mmxmem_operand.
1448 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1449 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1451 2020-05-11 Martin Liska <mliska@suse.cz>
1454 * common.opt: Fix typo in option description.
1456 2020-05-11 Martin Liska <mliska@suse.cz>
1458 PR gcov-profile/94928
1459 * gcov-io.h: Add caveat about coverage format parsing and
1460 possible outdated documentation.
1462 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
1464 PR tree-optimization/83403
1465 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
1466 determine_value_range, Add fold conversion of MULT_EXPR, fix the
1469 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
1471 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
1472 __ILP32__ for 32-bit targets.
1474 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
1476 * tree.h (expr_align): Delete.
1477 * tree.c (expr_align): Likewise.
1479 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
1481 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
1482 from end_of_function_needs.
1484 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
1485 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
1487 * config/cris/t-elfmulti: Remove crisv32 multilib.
1488 * config/cris: Remove shared-library and CRIS v32 support.
1490 Move trivially from cc0 to reg:CC model, removing most optimizations.
1491 * config/cris/cris.md: Remove all side-effect patterns and their
1492 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
1493 to all but post-reload control-flow and movem insns. Remove
1494 constraints on all modified expanders. Remove obsoleted cc0-related
1496 (attr "cc"): Remove alternative "rev".
1497 (mode_iterator BWDD, DI_, SI_): New.
1498 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
1499 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
1500 ("mstep_shift", "mstep_mul"): Remove patterns.
1501 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
1502 * config/cris/cris.c: Change all non-condition-code,
1503 non-control-flow emitted insns to add a parallel with clobber of
1504 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
1505 emit_insn to use of emit_move_insn, gen_add2_insn or
1506 cris_emit_insn, as convenient.
1507 (cris_reg_overlap_mentioned_p)
1508 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
1509 (cris_movem_load_rest_p): Don't assume all elements in a
1511 (cris_store_multiple_op_p): Ditto.
1512 (cris_emit_insn): New function.
1513 * cris/cris-protos.h (cris_emit_insn): Declare.
1516 * config/cris/cris.md (zcond): New code_iterator.
1517 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
1519 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
1521 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
1523 * config/cris/cris.md ("movsi"): For memory destination
1524 post-reload, generate clobberless variant. Similarly for a
1525 zero-source post-reload.
1526 ("*mov_tomem<mode>_split"): New split.
1527 ("*mov_tomem<mode>"): New insn.
1528 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
1529 "Q>m" for less-than-SImode.
1530 ("*mov_fromzero<mode>_split"): New split.
1531 ("*mov_fromzero<mode>"): New insn.
1533 Prepare for cmpelim pass to eliminate redundant compare insns.
1534 * config/cris/cris-modes.def: New file.
1535 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
1536 (cris_notice_update_cc): Remove left-over declaration.
1537 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
1538 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
1539 * config/cris/cris.h (SELECT_CC_MODE): Define.
1540 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
1542 (cond): New code_iterator.
1543 (nzcond): Replacement for incorrect ncond. All callers changed.
1544 (nzvccond): Replacement for ocond. All callers changed.
1545 (rnzcond): Replacement for rcond. All callers changed.
1546 (xCC): New code_attr.
1547 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
1549 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
1550 CCmode with iteration over NZVCSET.
1551 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
1553 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
1554 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
1555 ("*btst<mode>"): Similarly, from "*btst".
1556 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
1557 iterating over cond instead of matching the comparison with
1558 ordered_comparison_operator.
1559 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
1560 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
1562 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
1563 NZVCUSE. Remove FIXME.
1564 ("*b<nzcond:code>_reversed<mode>"): Similarly from
1565 "*b<ncond:code>_reversed", over NZUSE.
1566 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
1567 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
1568 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
1569 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1570 depending on CC_NZmode vs. CCmode. Remove FIXME.
1571 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
1572 "*b<rcond:code>_reversed", over NZUSE.
1573 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
1574 iterating over cond instead of matching the comparison with
1575 ordered_comparison_operator.
1576 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
1577 iterating over NZUSE.
1578 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
1579 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1580 depending on CC_NZmode vs. CCmode.
1581 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
1582 NZVCUSE. Remove FIXME.
1583 ("cc"): Comment on new use.
1584 ("cc_enabled"): New attribute.
1585 ("enabled"): Make default fall back to cc_enabled.
1586 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
1587 default_subst_attrs.
1588 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
1589 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
1590 "*movsi_internal". Correct contents of, and rename attribute
1591 "cc" to "cc<cccc><ccnz><ccnzvc>".
1592 ("anz", "anzvc", "acc"): New define_subst_attrs.
1593 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
1594 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
1595 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
1596 "movqi". Correct contents of, and rename "cc" attribute to
1597 "cc<cccc><ccnz><ccnzvc>".
1598 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
1599 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
1600 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
1601 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
1602 Rename from "extend<mode>si2".
1603 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
1604 Similar, from "zero_extend<mode>si2".
1605 ("*adddi3<setnz>"): Rename from "*adddi3".
1606 ("*subdi3<setnz>"): Similarly from "*subdi3".
1607 ("*addsi3<setnz>"): Similarly from "*addsi3".
1608 ("*subsi3<setnz>"): Similarly from "*subsi3".
1609 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
1610 "cc" attribute to "cc<ccnz>".
1611 ("*addqi3<setnz>"): Similarly from "*addqi3".
1612 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
1613 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
1615 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
1616 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
1617 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
1618 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
1619 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
1620 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
1621 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
1622 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
1624 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
1626 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
1628 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
1630 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
1632 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
1634 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
1635 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
1636 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
1637 (znnCC, rznnCC): New code_attrs.
1638 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
1639 obseolete comment. Add belt-and-suspenders mode-test to condition.
1640 Add fixme regarding remaining matched-but-not-generated case.
1641 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
1642 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
1643 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
1644 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
1645 Handle output of CC_ZnNmode.
1646 ("*b<nzcond:code>_reversed<mode>"): Ditto.
1648 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
1649 NEG too. Correct comment.
1650 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
1653 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
1655 * ira-color.c (update_costs_from_allocno): Remove
1656 conflict_cost_update_p argument. Propagate costs only along
1657 threads. Always do conflict cost update. Add printing debugging
1659 (update_costs_from_copies): Add printing debugging info.
1660 (restore_costs_from_copies): Ditto.
1661 (assign_hard_reg): Improve debug info.
1662 (push_only_colorable): Ditto. Call update_costs_from_prefs.
1663 (color_allocnos): Remove update_costs_from_prefs.
1665 2020-05-08 Richard Biener <rguenther@suse.de>
1667 * tree-vectorizer.h (vec_info::slp_loads): New.
1668 (vect_optimize_slp): Declare.
1669 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
1670 nothing when there are no loads.
1671 (vect_gather_slp_loads): Gather loads into a vector.
1672 (vect_supported_load_permutation_p): Remove.
1673 (vect_analyze_slp_instance): Do not verify permutation
1675 (vect_analyze_slp): Optimize permutations of reductions
1676 after all SLP instances have been gathered and gather
1678 (vect_optimize_slp): New function split out from
1679 vect_supported_load_permutation_p. Elide some permutations.
1680 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
1681 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
1682 * tree-vect-stmts.c (vectorizable_load): Check whether
1683 the load can be permuted. When generating code assert we can.
1685 2020-05-08 Richard Biener <rguenther@suse.de>
1687 * tree-ssa-sccvn.c (rpo_avail): Change type to
1688 eliminate_dom_walker *.
1689 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
1690 use the DOM walker availability.
1691 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
1692 with vn_valueize as valueization callback.
1693 (vn_reference_maybe_forwprop_address): Likewise.
1694 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
1695 array_ref_low_bound.
1697 2020-05-08 Jakub Jelinek <jakub@redhat.com>
1699 PR tree-optimization/94786
1700 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
1704 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
1708 * tree.c (get_narrower): Reuse the op temporary instead of
1711 PR tree-optimization/94783
1712 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
1715 PR tree-optimization/94956
1716 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
1717 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
1719 PR tree-optimization/94913
1720 * match.pd (A - B + -1 >= A to B >= A): New simplification.
1721 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
1722 true for TYPE_UNSIGNED integral types.
1725 PR rtl-optimization/94516
1726 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
1728 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
1729 Call df_notes_rescan if that argument is not true and returning true.
1730 * combine.c (adjust_for_new_dest): Pass true as second argument to
1731 remove_reg_equal_equiv_notes.
1732 * postreload.c (reload_combine_recognize_pattern): Don't call
1735 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1737 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
1739 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
1740 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
1741 (*neg_ne_<mode>): Likewise.
1743 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1745 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
1747 (*setbcr_<un>signed_<GPR:mode>): Likewise.
1748 (cstore<mode>4): Use setbc[r] if available.
1749 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
1750 (eq<mode>3): Use setbc for TARGET_FUTURE.
1751 (*eq<mode>3): Avoid for TARGET_FUTURE.
1752 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
1753 else for non-Pmode, use gen_eq and gen_xor.
1754 (*ne<mode>3): Avoid for TARGET_FUTURE.
1755 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
1757 2020-05-07 Jeff Law <law@redhat.com>
1759 * config/h8300/h8300.md: Move expanders and patterns into
1760 files based on functionality.
1761 * config/h8300/addsub.md: New file.
1762 * config/h8300/bitfield.md: New file
1763 * config/h8300/combiner.md: New file
1764 * config/h8300/divmod.md: New file
1765 * config/h8300/extensions.md: New file
1766 * config/h8300/jumpcall.md: New file
1767 * config/h8300/logical.md: New file
1768 * config/h8300/movepush.md: New file
1769 * config/h8300/multiply.md: New file
1770 * config/h8300/other.md: New file
1771 * config/h8300/proepi.md: New file
1772 * config/h8300/shiftrotate.md: New file
1773 * config/h8300/testcompare.md: New file
1775 * config/h8300/h8300.md (adds/subs splitters): Merge into single
1777 (negation expanders and patterns): Simplify and combine using
1779 (one_cmpl expanders and patterns): Likewise.
1780 (tablejump, indirect_jump patterns ): Likewise.
1781 (shift and rotate expanders and patterns): Likewise.
1782 (absolute value expander and pattern): Drop expander, rename pattern
1784 (peephole2 patterns): Move into...
1785 * config/h8300/peepholes.md: New file.
1787 * config/h8300/constraints.md (L and N): Simplify now that we're not
1788 longer supporting the original H8/300 chip.
1789 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
1790 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
1791 (shift_alg_hi, shift_alg_si): Similarly.
1792 (h8300_option_overrides): Similarly. Default to H8/300H. If
1793 compiling for H8/S, then turn off H8/300H. Do not update the
1794 shift_alg tables for H8/300 port.
1795 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
1797 (push, split_adds_subs, h8300_rtx_costs): Likewise.
1798 (h8300_print_operand, compute_mov_length): Likewise.
1799 (output_plussi, compute_plussi_length): Likewise.
1800 (compute_plussi_cc, output_logical_op): Likewise.
1801 (compute_logical_op_length, compute_logical_op_cc): Likewise.
1802 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
1803 (output_a_shift, compute_a_shift_length): Likewise.
1804 (output_a_rotate, compute_a_rotate_length): Likewise.
1805 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
1806 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
1807 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
1808 (attr_cpu, TARGET_H8300): Remove.
1809 (TARGET_DEFAULT): Update.
1810 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
1811 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
1812 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
1813 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
1814 * config/h8300/h8300.md: Simplify patterns throughout.
1815 * config/h8300/t-h8300: Update multilib configuration.
1817 * config/h8300/h8300.h (LINK_SPEC): Remove.
1818 (USER_LABEL_PREFIX): Likewise.
1820 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
1821 (h8300_option_override): Remove remnants of COFF support.
1823 2020-05-07 Alan Modra <amodra@gmail.com>
1825 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
1826 set_rtx_cost with set_src_cost.
1827 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
1829 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
1831 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
1832 redundant half vector handlings for no peeling gaps.
1834 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
1836 * tree-ssa-operands.c (operands_scanner): New class.
1837 (operands_bitmap_obstack): Remove.
1838 (n_initialized): Remove.
1839 (build_uses): Move to operands_scanner class.
1840 (build_vuse): Same as above.
1841 (build_vdef): Same as above.
1842 (verify_ssa_operands): Same as above.
1843 (finalize_ssa_uses): Same as above.
1844 (cleanup_build_arrays): Same as above.
1845 (finalize_ssa_stmt_operands): Same as above.
1846 (start_ssa_stmt_operands): Same as above.
1847 (append_use): Same as above.
1848 (append_vdef): Same as above.
1849 (add_virtual_operand): Same as above.
1850 (add_stmt_operand): Same as above.
1851 (get_mem_ref_operands): Same as above.
1852 (get_tmr_operands): Same as above.
1853 (maybe_add_call_vops): Same as above.
1854 (get_asm_stmt_operands): Same as above.
1855 (get_expr_operands): Same as above.
1856 (parse_ssa_operands): Same as above.
1857 (finalize_ssa_defs): Same as above.
1858 (build_ssa_operands): Same as above, plus create a C-like wrapper.
1859 (update_stmt_operands): Create an instance of operands_scanner.
1861 2020-05-07 Richard Biener <rguenther@suse.de>
1864 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
1865 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
1866 (refered_from_nonlocal_var): Likewise.
1867 (ipa_pta_execute): Likewise.
1869 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
1871 * gcc/tree-ssa-struct-alias.c: Fix comments
1873 2020-05-07 Martin Liska <mliska@suse.cz>
1875 * doc/invoke.texi: Fix 2 optindex entries.
1877 2020-05-07 Richard Biener <rguenther@suse.de>
1880 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
1881 (tree_decl_common::not_gimple_reg_flag): ... to this.
1882 * tree.h (DECL_GIMPLE_REG_P): Rename ...
1883 (DECL_NOT_GIMPLE_REG_P): ... to this.
1884 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
1885 (create_tmp_reg): Simplify.
1886 (create_tmp_reg_fn): Likewise.
1887 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
1888 * gimplify.c (create_tmp_from_val): Simplify.
1889 (gimplify_bind_expr): Likewise.
1890 (gimplify_compound_literal_expr): Likewise.
1891 (gimplify_function_tree): Likewise.
1892 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
1893 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
1894 (asan_add_global): Copy it.
1895 * cgraphunit.c (cgraph_node::expand_thunk): Force args
1897 * function.c (gimplify_parameters): Copy
1898 DECL_NOT_GIMPLE_REG_P.
1899 * ipa-param-manipulation.c
1900 (ipa_param_body_adjustments::common_initialization): Simplify.
1901 (ipa_param_body_adjustments::reset_debug_stmts): Copy
1902 DECL_NOT_GIMPLE_REG_P.
1903 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
1904 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
1905 * tree-cfg.c (make_blocks_1): Simplify.
1906 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
1907 * tree-eh.c (lower_eh_constructs_2): Simplify.
1908 * tree-inline.c (declare_return_variable): Adjust and
1910 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
1911 (copy_result_decl_to_var): Likewise.
1912 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
1913 * tree-nested.c (create_tmp_var_for): Simplify.
1914 * tree-parloops.c (separate_decls_in_region_name): Copy
1915 DECL_NOT_GIMPLE_REG_P.
1916 * tree-sra.c (create_access_replacement): Adjust and
1917 generalize partial def support.
1918 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
1919 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
1920 * tree-ssa.c (maybe_optimize_var): Handle clearing of
1921 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
1923 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
1924 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
1925 DECL_NOT_GIMPLE_REG_P.
1926 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
1927 * cfgexpand.c (avoid_type_punning_on_regs): New.
1928 (discover_nonconstant_array_refs): Call
1929 avoid_type_punning_on_regs to avoid unsupported mode punning.
1931 2020-05-07 Alex Coplan <alex.coplan@arm.com>
1933 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
1936 2020-05-07 Richard Biener <rguenther@suse.de>
1938 PR tree-optimization/57359
1939 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
1940 (in_mem_ref::dep_loop): Repurpose.
1941 (LOOP_DEP_BIT): Remove.
1942 (enum dep_kind): New.
1943 (enum dep_state): Likewise.
1944 (record_loop_dependence): New function to populate the
1946 (query_loop_dependence): New function to query the dependence
1948 (memory_accesses::refs_in_loop): Rename to ...
1949 (memory_accesses::refs_loaded_in_loop): ... this and change to
1951 (outermost_indep_loop): Adjust.
1952 (mem_ref_alloc): Likewise.
1953 (gather_mem_refs_stmt): Likewise.
1954 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
1955 (struct sm_aux): New.
1956 (execute_sm): Split code generation on exits, record state
1958 (enum sm_kind): New.
1959 (execute_sm_exit): Exit code generation part.
1960 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
1961 dependence checking on stores reached from exits.
1962 (sm_seq_valid_bb): New function gathering SM stores on exits.
1963 (hoist_memory_references): Re-implement.
1964 (refs_independent_p): Add tbaa_p parameter and pass it down.
1965 (record_dep_loop): Remove.
1966 (ref_indep_loop_p_1): Fold into ...
1967 (ref_indep_loop_p): ... this and generalize for three kinds
1968 of dependence queries.
1969 (can_sm_ref_p): Adjust according to hoist_memory_references
1971 (store_motion_loop): Don't do anything if the set of SM
1972 candidates is empty.
1973 (tree_ssa_lim_initialize): Adjust.
1974 (tree_ssa_lim_finalize): Likewise.
1976 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
1977 Pierre-Marie de Rodat <derodat@adacore.com>
1979 * dwarf2out.c (add_data_member_location_attribute): Take into account
1980 the variant part offset in the computation of the data bit offset.
1981 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
1982 in the call to field_byte_offset.
1983 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
1984 confusing assertion.
1985 (analyze_variant_discr): Deal with boolean subtypes.
1987 2020-05-07 Martin Liska <mliska@suse.cz>
1989 * lto-wrapper.c: Split arguments of MAKE environment
1992 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
1994 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
1995 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
1996 fenv_var and new_fenv_var.
1998 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2001 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
2003 (avx512dq_vextract<shuffletype>64x2_1_maskm,
2004 avx512f_vextract<shuffletype>32x4_1_maskm,
2005 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
2006 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
2008 (*avx512dq_vextract<shuffletype>64x2_1,
2009 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
2010 define_insns. Even in the masked variant allow memory output but in
2011 that case use 0 rather than 0C constraint on the source of masked-out
2013 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
2015 (*avx512f_vextract<shuffletype>32x4_1,
2016 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
2017 Even in the masked variant allow memory output but in that case use
2018 0 rather than 0C constraint on the source of masked-out elts.
2019 (vec_extract_lo_<mode><mask_name>): Split into ...
2020 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
2021 define_insns. Even in the masked variant allow memory output but in
2022 that case use 0 rather than 0C constraint on the source of masked-out
2024 (vec_extract_hi_<mode><mask_name>): Split into ...
2025 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
2026 define_insns. Even in the masked variant allow memory output but in
2027 that case use 0 rather than 0C constraint on the source of masked-out
2030 2020-05-06 qing zhao <qing.zhao@oracle.com>
2033 * common.opt: Add -flarge-source-files.
2034 * doc/invoke.texi: Document it.
2035 * toplev.c (process_options): set line_table->default_range_bits
2036 to 0 when flag_large_source_files is true.
2038 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
2041 * config/i386/predicates.md (add_comparison_operator): New predicate.
2042 * config/i386/i386.md (compare->add splitter): New splitters.
2044 2020-05-06 Richard Biener <rguenther@suse.de>
2046 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
2047 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
2048 Remove slp_instance parameter, just iterate over all scalar stmts.
2049 (vect_slp_analyze_instance_dependence): Adjust and likewise.
2050 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
2052 (vect_schedule_slp): Just iterate over all scalar stmts.
2053 (vect_supported_load_permutation_p): Adjust.
2054 (vect_transform_slp_perm_load): Remove slp_instance parameter,
2055 instead use the number of lanes in the node as group size.
2056 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
2057 factor instead of slp_instance as parameter.
2058 (vectorizable_load): Adjust.
2060 2020-05-06 Andreas Schwab <schwab@suse.de>
2062 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
2063 (aarch64_get_extension_string_for_isa_flags): Don't declare.
2065 2020-05-06 Richard Biener <rguenther@suse.de>
2068 * cfgloopmanip.c (create_preheader): Require non-complex
2069 preheader edge for CP_SIMPLE_PREHEADERS.
2071 2020-05-06 Richard Biener <rguenther@suse.de>
2073 PR tree-optimization/94963
2074 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
2075 no-warning marking of the conditional store.
2076 (execute_sm): Instead mark the uninitialized state
2077 on loop entry to be not warned about.
2079 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2081 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
2082 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
2083 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
2084 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2086 * config/i386/i386-builtin.def: Add new builtins.
2087 * config/i386/i386-c.c (ix86_target_macros_internal): Define
2089 * config/i386/i386-options.c (ix86_target_string): Add
2091 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
2092 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
2094 * config/i386/i386.md (define_c_enum "unspec"): Add
2095 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
2096 (TSXLDTRK): New define_int_iterator.
2097 ("<tsxldtrk>"): New define_insn.
2098 * config/i386/i386.opt: Add -mtsxldtrk.
2099 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
2100 * config/i386/tsxldtrkintrin.h: New.
2101 * doc/invoke.texi: Document -mtsxldtrk.
2103 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2105 PR tree-optimization/94921
2106 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
2109 2020-05-06 Richard Biener <rguenther@suse.de>
2111 PR tree-optimization/94965
2112 * tree-vect-stmts.c (vectorizable_load): Fix typo.
2114 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2116 * doc/install.texi: Replace Sun with Solaris as appropriate.
2117 (Tools/packages necessary for building GCC, Perl version between
2118 5.6.1 and 5.6.24): Remove Solaris 8 reference.
2119 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
2121 (Specific, i?86-*-solaris2*): Update version references for
2122 Solaris 11.3 and later. Remove gas 2.26 caveat.
2123 (Specific, *-*-solaris2*): Update version references for
2124 Solaris 11.3 and later. Remove boehm-gc reference.
2125 Document GMP, MPFR caveats on Solaris 11.3.
2126 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
2127 (Specific, sparc64-*-solaris2*): Likewise.
2128 Document --build requirement.
2130 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2133 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
2134 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
2136 PR rtl-optimization/94873
2137 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
2138 note if SET_SRC (set) has side-effects.
2140 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2141 Wei Xiao <wei3.xiao@intel.com>
2143 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
2144 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
2145 (ix86_handle_option): Handle -mserialize.
2146 * config.gcc (serializeintrin.h): New header file.
2147 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
2148 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2150 * config/i386/i386-builtin.def: Add new builtin.
2151 * config/i386/i386-c.c (__SERIALIZE__): New macro.
2152 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
2154 * (ix86_valid_target_attribute_inner_p): Add target attribute
2156 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
2158 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
2159 (serialize): New define_insn.
2160 * config/i386/i386.opt (mserialize): New option
2161 * config/i386/immintrin.h: Include serailizeintrin.h.
2162 * config/i386/serializeintrin.h: New header file.
2163 * doc/invoke.texi: Add documents for -mserialize.
2165 2020-05-06 Richard Biener <rguenther@suse.de>
2167 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
2168 to/from pointer conversion checking.
2170 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
2172 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
2174 * config/rs6000/rs6000-c.c: Likewise.
2175 * config/rs6000/rs6000-call.c: Likewise.
2176 * config/rs6000/rs6000.c: Likewise.
2178 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2180 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
2181 (RTEMS_ENDFILE_SPEC): Likewise.
2182 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
2183 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
2184 (LIB_SPECS): Support -nodefaultlibs option.
2185 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
2186 (RTEMS_ENDFILE_SPEC): Likewise.
2187 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2188 (RTEMS_ENDFILE_SPEC): Likewise.
2189 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2190 (RTEMS_ENDFILE_SPEC): Likewise.
2192 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2194 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
2195 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
2197 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2199 * config/pru/pru.h: Mark R3.w0 as caller saved.
2201 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2203 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
2204 and gen_doloop_begin_internal.
2205 (pru_reorg_loop): Use gen_pruloop with mode.
2206 * config/pru/pru.md: Use new @insn syntax.
2208 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2210 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
2212 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2214 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
2215 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
2216 (addqi3_cconly_overflow): Ditto.
2217 (umulv<mode>4): Ditto.
2218 (<s>mul<mode>3_highpart): Ditto.
2219 (tls_global_dynamic_32): Ditto.
2220 (tls_local_dynamic_base_32): Ditto.
2227 (*adddi_4): Remove "m" constraint from scratch operand.
2228 (*add<mode>_4): Ditto.
2230 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2232 PR rtl-optimization/94516
2233 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
2234 with sp = reg, add REG_EQUAL note with sp + const.
2235 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
2236 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
2237 postreload sp = sp + const to sp = reg optimization if needed and
2239 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
2240 reg = sp insn with sp + const REG_EQUAL note. Adjust
2241 try_apply_stack_adjustment caller, call
2242 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
2243 (combine_stack_adjustments): Allocate and free LIVE bitmap,
2244 adjust combine_stack_adjustments_for_block caller.
2246 2020-05-05 Martin Liska <mliska@suse.cz>
2248 PR gcov-profile/93623
2249 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
2252 2020-05-05 Martin Liska <mliska@suse.cz>
2254 * opt-functions.awk (opt_args_non_empty): New function.
2255 * opt-read.awk: Use the function for various option arguments.
2257 2020-05-05 Martin Liska <mliska@suse.cz>
2260 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
2261 report warning when the jobserver is not detected.
2263 2020-05-05 Martin Liska <mliska@suse.cz>
2265 PR gcov-profile/94636
2266 * gcov.c (main): Print total lines summary at the end.
2267 (generate_results): Expect file_name always being non-null.
2268 Print newline after intermediate file is printed in order to align with
2269 what we do for normal files.
2271 2020-05-05 Martin Liska <mliska@suse.cz>
2273 * dumpfile.c (dump_switch_p): Change return type
2274 and print option suggestion.
2275 * dumpfile.h: Change return type.
2276 * opts-global.c (handle_common_deferred_options):
2277 Move error into dump_switch_p function.
2279 2020-05-05 Martin Liska <mliska@suse.cz>
2282 * alloc-pool.h: Use const for some arguments.
2283 * bitmap.h: Likewise.
2284 * mem-stats.h: Likewise.
2285 * sese.h (get_entry_bb): Likewise.
2286 (get_exit_bb): Likewise.
2288 2020-05-05 Richard Biener <rguenther@suse.de>
2290 * tree-vect-slp.c (struct vdhs_data): New.
2291 (vect_detect_hybrid_slp): New walker.
2292 (vect_detect_hybrid_slp): Rewrite.
2294 2020-05-05 Richard Biener <rguenther@suse.de>
2297 * tree-ssa-structalias.c (ipa_pta_execute): Use
2298 varpool_node::externally_visible_p ().
2299 (refered_from_nonlocal_var): Likewise.
2301 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2303 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
2304 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
2305 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
2307 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2309 * gimplify.c (gimplify_init_constructor): Do not put the constructor
2310 into static memory if it is not complete.
2312 2020-05-05 Richard Biener <rguenther@suse.de>
2314 PR tree-optimization/94949
2315 * tree-ssa-loop-im.c (execute_sm): Check whether we use
2316 the multithreaded model or always compute the stored value
2317 before eliding a load.
2319 2020-05-05 Alex Coplan <alex.coplan@arm.com>
2321 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
2323 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2325 PR tree-optimization/94800
2326 * match.pd (X + (X << C) to X * (1 + (1 << C)),
2327 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
2331 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
2333 PR tree-optimization/94914
2334 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
2337 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2339 * config/i386/i386.md (*testqi_ext_3): Use
2340 int_nonimmediate_operand instead of manual mode checks.
2341 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
2342 Use int_nonimmediate_operand predicate. Rewrite
2343 define_insn_and_split pattern to a combine pass splitter.
2345 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2347 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
2348 * configure: Regenerate.
2350 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2353 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
2354 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
2355 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
2356 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
2358 2020-05-04 Clement Chigot <clement.chigot@atos.net>
2359 David Edelsohn <dje.gcc@gmail.com>
2361 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
2362 for fmodl, frexpl, ldexpl and modfl builtins.
2364 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
2367 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
2368 chosen lhs is different from the gcall lhs.
2369 (expand_mask_load_optab_fn): Likewise.
2370 (expand_gather_load_optab_fn): Likewise.
2372 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2375 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
2376 (EQ compare->LTU compare splitter): New splitter.
2377 (NE compare->NEG splitter): Ditto.
2379 2020-05-04 Marek Polacek <polacek@redhat.com>
2382 2020-04-30 Marek Polacek <polacek@redhat.com>
2385 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2386 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2388 2020-05-04 Richard Biener <rguenther@suse.de>
2390 PR tree-optimization/93891
2391 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
2392 the original reference tree for assessing access alignment.
2394 2020-05-04 Richard Biener <rguenther@suse.de>
2396 PR tree-optimization/39612
2397 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
2398 (set_ref_loaded_in_loop): New.
2399 (mark_ref_loaded): Likewise.
2400 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
2401 (execute_sm): Avoid issueing a load when it was not there.
2402 (execute_sm_if_changed): Avoid issueing warnings for the
2405 2020-05-04 Martin Jambor <mjambor@suse.cz>
2408 * tree-inline.c (tree_function_versioning): Leave any type conversion
2409 of replacements to setup_one_parameter and its friend
2410 force_value_to_type.
2412 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2415 * config/i386/predicates.md (shr_comparison_operator): New predicate.
2416 * config/i386/i386.md (compare->shr splitter): New splitters.
2418 2020-05-04 Jakub Jelinek <jakub@redhat.com>
2420 PR tree-optimization/94718
2421 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
2423 PR tree-optimization/94718
2424 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
2425 replace two nop conversions on bit_{and,ior,xor} argument
2426 and result with just one conversion on the result or another argument.
2428 PR tree-optimization/94718
2429 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
2430 -> (X ^ Y) & C eqne 0 optimization to ...
2431 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
2433 * opts.c (get_option_html_page): Instead of hardcoding a list of
2434 options common between C/C++ and Fortran only use gfortran/
2435 documentation for warnings that have CL_Fortran set but not
2438 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
2440 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2441 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
2442 (emit_memmov): Ditto.
2443 (emit_memset): Ditto.
2444 (ix86_expand_strlensi_unroll_1): Ditto.
2445 (release_scratch_register_on_entry): Ditto.
2446 (gen_frame_set): Ditto.
2447 (ix86_emit_restore_reg_using_pop): Ditto.
2448 (ix86_emit_outlined_ms2sysv_restore): Ditto.
2449 (ix86_expand_epilogue): Ditto.
2450 (ix86_expand_split_stack_prologue): Ditto.
2451 * config/i386/i386.md (push immediate splitter): Ditto.
2455 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
2457 PR translation/93861
2458 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
2461 2020-05-02 Jakub Jelinek <jakub@redhat.com>
2463 * config/tilegx/tilegx.md
2464 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
2465 rather than just <n>.
2467 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
2470 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
2471 and crtl->patch_area_entry.
2472 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
2473 * opts.c (common_handle_option): Limit
2474 function_entry_patch_area_size and function_entry_patch_area_start
2475 to USHRT_MAX. Fix a typo in error message.
2476 * varasm.c (assemble_start_function): Use crtl->patch_area_size
2477 and crtl->patch_area_entry.
2478 * doc/invoke.texi: Document the maximum value for
2479 -fpatchable-function-entry.
2481 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
2483 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
2484 Override SUBTARGET_SHADOW_OFFSET macro.
2486 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
2488 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
2489 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
2490 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
2491 * config/i386/freebsd.h: Likewise.
2492 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
2493 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
2495 2020-04-30 Alexandre Oliva <oliva@adacore.com>
2497 * doc/sourcebuild.texi (Effective-Target Keywords): Document
2498 the newly-introduced fileio effective target.
2500 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
2502 PR rtl-optimization/94740
2503 * cse.c (cse_process_notes_1): Replace with...
2504 (cse_process_note_1): ...this new function, acting as a
2505 simplify_replace_fn_rtx callback to process_note. Handle only
2506 REGs and MEMs directly. Validate the MEM if cse_process_note
2507 changes its address.
2508 (cse_process_notes): Replace with...
2509 (cse_process_note): ...this new function.
2510 (cse_extended_basic_block): Update accordingly, iterating over
2511 the register notes and passing individual notes to cse_process_note.
2513 2020-04-30 Carl Love <cel@us.ibm.com>
2515 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
2517 2020-04-30 Martin Jambor <mjambor@suse.cz>
2520 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
2521 saved by the inliner and thunks which had their call inlined.
2522 * ipa-inline-transform.c (save_inline_function_body): Fill in
2523 former_clone_of of new body holders.
2525 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2527 * BASE-VER: Set to 11.0.0.
2529 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
2531 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
2533 2020-04-30 Marek Polacek <polacek@redhat.com>
2536 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2537 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2539 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2541 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
2542 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
2543 * doc/invoke.texi (moutline-atomics): Document as on by default.
2545 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
2548 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
2549 the check for NOTE_INSN_DELETED_LABEL.
2551 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2553 * configure.ac (--with-documentation-root-url,
2554 --with-changes-root-url): Diagnose URL not ending with /,
2555 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
2556 * opts.h (get_changes_url): Remove.
2557 * opts.c (get_changes_url): Remove.
2558 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
2559 or -DCHANGES_ROOT_URL.
2560 * doc/install.texi (--with-documentation-root-url,
2561 --with-changes-root-url): Document.
2562 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
2563 get_changes_url and free, change url variable type to const char * and
2564 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
2565 * config/s390/s390.c (s390_function_arg_vector,
2566 s390_function_arg_float): Likewise.
2567 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2569 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
2571 * config.in: Regenerate.
2572 * configure: Regenerate.
2574 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
2577 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
2579 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
2581 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
2582 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
2584 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
2586 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
2587 Change constraint for vlrl/vstrl to jb4.
2589 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2591 * var-tracking.c (vt_initialize): Move variables pre and post
2592 into inner block and initialize both in order to fix warning
2593 about uninitialized use. Remove unnecessary checks for
2594 frame_pointer_needed.
2596 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2598 * toplev.c (output_stack_usage_1): Ensure that first
2599 argument to fprintf is not null.
2601 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2603 * configure.ac (-with-changes-root-url): New configure option,
2604 defaulting to https://gcc.gnu.org/.
2605 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
2607 * pretty-print.c (get_end_url_string): New function.
2608 (pp_format): Handle %{ and %} for URLs.
2609 (pp_begin_url): Use pp_string instead of pp_printf.
2610 (pp_end_url): Use get_end_url_string.
2611 * opts.h (get_changes_url): Declare.
2612 * opts.c (get_changes_url): New function.
2613 * config/rs6000/rs6000-call.c: Include opts.h.
2614 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
2615 of just in GCC 10.1 in diagnostics and add URL.
2616 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
2617 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2619 * config/s390/s390.c (s390_function_arg_vector,
2620 s390_function_arg_float): Likewise.
2621 * configure: Regenerated.
2624 * config/s390/s390.c (s390_function_arg_vector,
2625 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
2626 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
2627 passed to the function rather than the type of the single element.
2628 Rename cxx17_empty_base_seen variable to empty_base_seen, change
2629 type to int, and adjust diagnostics depending on if the field
2630 has [[no_unique_attribute]] or not.
2633 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
2634 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
2635 used in casts into parens.
2636 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
2637 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
2638 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
2639 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
2640 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
2641 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
2642 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
2643 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
2644 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
2645 _mm256_mask_cmp_epu8_mask): Likewise.
2646 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
2647 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
2648 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
2649 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
2652 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
2653 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
2654 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
2655 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
2656 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
2657 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
2658 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
2659 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
2660 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
2661 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
2662 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
2663 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
2664 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
2666 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
2667 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
2668 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
2669 as mask vector containing -1.0 or -1.0f elts, but instead vector
2670 with all bits set using _mm*_cmpeq_p? with zero operands.
2671 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
2672 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
2673 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
2674 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
2675 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
2676 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
2677 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
2678 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
2679 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
2680 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
2681 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
2682 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
2683 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
2684 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
2685 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
2686 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
2687 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
2689 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
2690 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
2691 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
2692 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
2693 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
2694 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
2695 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
2696 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
2697 _mm512_mask_prefetch_i64scatter_ps): Likewise.
2698 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
2699 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
2700 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
2701 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
2702 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
2703 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
2704 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
2705 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
2706 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
2707 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
2708 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
2709 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
2710 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
2711 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
2712 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
2713 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
2714 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
2715 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
2716 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
2717 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
2718 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
2719 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
2720 _mm_mask_i64scatter_epi64): Likewise.
2722 2020-04-29 Jeff Law <law@redhat.com>
2724 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
2725 division instructions are 4 bytes long.
2727 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2730 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
2731 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2732 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
2733 take address of TARGET_EXPR of fenv_var with void_node initializer.
2736 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2738 PR tree-optimization/94774
2739 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
2742 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2744 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
2745 * calls.c (cxx17_empty_base_field_p): New function. Check
2746 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
2749 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
2752 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
2753 Allow -fcf-protection with -mindirect-branch=thunk-extern and
2754 -mfunction-return=thunk-extern.
2755 * doc/invoke.texi: Update notes for -fcf-protection=branch with
2756 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
2758 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2760 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
2762 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2764 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
2765 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
2766 fenv_var and new_fenv_var.
2768 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2770 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
2771 effective-target keyword.
2772 (arm_arch_v8a_hard_multilib): Likewise.
2773 (arm_arch_v8a_hard): Document new dg-add-options keyword.
2774 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
2775 code is deprecated and has not been updated to handle
2776 DECL_FIELD_ABI_IGNORED.
2777 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2778 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2779 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2780 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2781 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2782 something actually is a HFA or HVA. Record whether we see a
2783 [[no_unique_address]] field that previous GCCs would not have
2784 ignored in this way.
2785 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
2786 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2787 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
2788 diagnostic messages.
2789 (arm_needs_doubleword_align): Add a comment explaining why we
2790 consider even zero-sized fields.
2792 2020-04-29 Richard Biener <rguenther@suse.de>
2793 Li Zekun <lizekun1@huawei.com>
2796 * tree.c (component_ref_size): Guard against error_mark_node
2797 DECL_INITIAL as it happens with LTO.
2799 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2801 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
2802 comment explaining why we consider even zero-sized fields.
2803 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2804 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2805 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2806 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2807 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2808 something actually is a HFA or HVA. Record whether we see a
2809 [[no_unique_address]] field that previous GCCs would not have
2810 ignored in this way.
2811 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
2812 whether diagnostics should be suppressed. Update the calls to
2813 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2814 [[no_unique_address]] case.
2815 (aarch64_return_in_msb): Update call accordingly, never silencing
2817 (aarch64_function_value): Likewise.
2818 (aarch64_return_in_memory_1): Likewise.
2819 (aarch64_init_cumulative_args): Likewise.
2820 (aarch64_gimplify_va_arg_expr): Likewise.
2821 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
2822 use it to decide whether arch64_vfp_is_call_or_return_candidate
2824 (aarch64_pass_by_reference): Update calls accordingly.
2825 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
2826 to decide whether arch64_vfp_is_call_or_return_candidate should be
2829 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
2832 * config/aarch64/aarch64-builtins.c
2833 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
2834 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
2837 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
2839 * configure.ac <$enable_offload_targets>: Do parsing as done
2841 * configure: Regenerate.
2843 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
2844 * configure: Regenerate.
2847 * rtlanal.c (set_noop_p): Handle non-constant selectors.
2850 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
2852 (TARGET_EXCEPT_UNWIND_INFO): Define.
2854 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2857 * config/gcn/gcn.md (*mov<mode>_insn): Use
2858 'reg_overlap_mentioned_p' to check for overlap.
2861 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
2862 instead of cxx17_empty_base_field_p.
2865 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
2866 DECL_FIELD_ABI_IGNORED.
2867 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
2868 * calls.h (cxx17_empty_base_field_p): Change into a temporary
2869 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
2871 * calls.c (cxx17_empty_base_field_p): Remove.
2872 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
2873 DECL_FIELD_ABI_IGNORED.
2874 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
2875 * lto-streamer-out.c (hash_tree): Likewise.
2876 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
2877 cxx17_empty_base_seen to empty_base_seen, change type to int *,
2878 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
2879 cxx17_empty_base_field_p, if "no_unique_address" attribute is
2880 present, propagate that to the caller too.
2881 (rs6000_discover_homogeneous_aggregate): Adjust
2882 rs6000_aggregate_candidate caller, emit different diagnostics
2883 when c++17 empty base fields are present and when empty
2884 [[no_unique_address]] fields are present.
2885 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
2886 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
2889 2020-04-29 Richard Biener <rguenther@suse.de>
2891 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
2892 Just check whether the stmt stores.
2894 2020-04-28 Alexandre Oliva <oliva@adacore.com>
2897 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
2898 output operand in emulation. Don't overwrite pseudos.
2900 2020-04-28 Jeff Law <law@redhat.com>
2902 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
2903 multiply patterns are 4 bytes long.
2905 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2907 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
2908 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
2910 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
2911 Jakub Jelinek <jakub@redhat.com>
2914 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
2915 base class artificial fields.
2916 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
2917 decision is different after this fix.
2919 2020-04-28 David Malcolm <dmalcolm@redhat.com>
2925 * doc/invoke.texi (Static Analyzer Options): Remove
2926 -Wanalyzer-use-of-uninitialized-value.
2927 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
2929 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2931 PR tree-optimization/94809
2932 * tree.c (build_call_expr_internal_loc_array): Call
2933 process_call_operands.
2935 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
2937 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
2938 * config/aarch64/aarch64-tune.md: Regenerate.
2939 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
2940 (thunderx3t110_regmove_cost): Likewise.
2941 (thunderx3t110_vector_cost): Likewise.
2942 (thunderx3t110_prefetch_tune): Likewise.
2943 (thunderx3t110_tunings): Likewise.
2944 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
2946 * config/aarch64/thunderx3t110.md: New file.
2947 * config/aarch64/aarch64.md: Include thunderx3t110.md.
2948 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
2950 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2953 * config/s390/s390.c (s390_function_arg_vector,
2954 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
2956 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
2958 PR tree-optimization/94727
2959 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
2960 operands are invariant booleans, use the mask type associated with the
2961 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
2962 (vectorizable_condition): Pass vectype unconditionally to
2963 vect_is_simple_cond.
2965 2020-04-27 Jakub Jelinek <jakub@redhat.com>
2968 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
2969 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2970 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
2972 2020-04-27 David Malcolm <dmalcolm@redhat.com>
2975 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
2976 default value, so that it can by supplied by get_option_html_page.
2977 * configure: Regenerate.
2978 * opts.c: Include "selftest.h".
2979 (get_option_html_page): New function.
2980 (get_option_url): Use it. Reformat to place comments next to the
2981 expressions they refer to.
2982 (selftest::test_get_option_html_page): New.
2983 (selftest::opts_c_tests): New.
2984 * selftest-run-tests.c (selftest::run_tests): Call
2985 selftest::opts_c_tests.
2986 * selftest.h (selftest::opts_c_tests): New decl.
2988 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
2990 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
2991 UINTVAL to CONST_INTs.
2993 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2995 * config/arm/constraints.md (e): Remove constraint.
2996 (Te): Define constraint.
2997 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
2998 operand 0 from "e" to "Te".
2999 (vaddvaq_<supf><mode>): Likewise.
3000 (vaddvq_p_<supf><mode>): Likewise.
3001 (vmladavq_<supf><mode>): Likewise.
3002 (vmladavxq_s<mode>): Likewise.
3003 (vmlsdavq_s<mode>): Likewise.
3004 (vmlsdavxq_s<mode>): Likewise.
3005 (vaddvaq_p_<supf><mode>): Likewise.
3006 (vmladavaq_<supf><mode>): Likewise.
3007 (vmladavq_p_<supf><mode>): Likewise.
3008 (vmladavxq_p_s<mode>): Likewise.
3009 (vmlsdavq_p_s<mode>): Likewise.
3010 (vmlsdavxq_p_s<mode>): Likewise.
3011 (vmlsdavaxq_s<mode>): Likewise.
3012 (vmlsdavaq_s<mode>): Likewise.
3013 (vmladavaxq_s<mode>): Likewise.
3014 (vmladavaq_p_<supf><mode>): Likewise.
3015 (vmladavaxq_p_s<mode>): Likewise.
3016 (vmlsdavaq_p_s<mode>): Likewise.
3017 (vmlsdavaxq_p_s<mode>): Likewise.
3019 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
3021 * config/arm/arm.c (output_move_neon): Only get the first operand if
3024 2020-04-27 Felix Yang <felix.yang@huawei.com>
3026 PR tree-optimization/94784
3027 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
3028 assert around so that it checks that the two vectors have equal
3029 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
3030 types is a useless_type_conversion_p.
3032 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
3035 * dwarf2cfi.c (struct GTY): Add ra_mangled.
3036 (cfi_row_equal_p): Check ra_mangled.
3037 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
3038 this only handles the sparc logic now.
3039 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
3040 the aarch64 specific logic.
3041 (dwarf2out_frame_debug): Update to use the new subroutines.
3042 (change_cfi_row): Check ra_mangled.
3044 2020-04-27 Jakub Jelinek <jakub@redhat.com>
3047 * config/s390/s390.c (s390_function_arg_vector,
3048 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
3050 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
3052 * common/config/rs6000/rs6000-common.c
3053 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
3055 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
3058 2020-04-27 Martin Liska <mliska@suse.cz>
3061 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
3062 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
3064 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
3067 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
3069 (rs6000_emit_prologue_components):
3070 Check with frame_pointer_needed_indeed.
3071 (rs6000_emit_epilogue_components): Likewise.
3072 (rs6000_emit_prologue): Likewise.
3073 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
3075 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
3077 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
3078 stack frame when debugging and flag_compare_debug is enabled.
3080 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
3082 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
3083 enable PC-relative addressing for -mcpu=future.
3084 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
3085 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
3086 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
3087 suppress PC-relative addressing.
3088 (rs6000_option_override_internal): Split up error messages
3089 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
3092 2020-04-25 Jakub Jelinek <jakub@redhat.com>
3093 Richard Biener <rguenther@suse.de>
3095 PR tree-optimization/94734
3096 PR tree-optimization/89430
3097 * tree-ssa-phiopt.c: Include tree-eh.h.
3098 (cond_store_replacement): Return false if an automatic variable
3099 access could trap. If -fstore-data-races, don't return false
3100 just because an automatic variable is addressable.
3102 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3104 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
3106 (add<mode>_sext_dup2_exec): Likewise.
3108 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
3111 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
3112 endian byteshift_val calculation.
3114 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3116 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
3118 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
3120 * config/aarch64/arm_sve.h: Add a comment.
3122 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
3124 PR rtl-optimization/94708
3125 * combine.c (simplify_if_then_else): Add check for
3126 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
3128 2020-04-23 Martin Sebor <msebor@redhat.com>
3131 * common.opt (-Wno-frame-larger-than): New option.
3132 (-Wno-larger-than, -Wno-stack-usage): Same.
3134 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3136 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
3138 (mov<mode>_exec): Likewise.
3139 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
3140 (<convop><mode><vndi>2_exec): Likewise.
3142 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
3144 PR tree-optimization/94717
3145 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
3146 of the stores doesn't have the same landing pad number as the first.
3147 (coalesce_immediate_stores): Do not try to coalesce the store using
3148 bswap if it doesn't have the same landing pad number as the first.
3150 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
3152 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
3153 Replace outdated link to ELFv2 ABI.
3155 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3158 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
3162 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
3163 temporarily with non-final second operand and updating it later,
3164 push COMPOUND_EXPRs into a vector and process it in reverse,
3165 creating COMPOUND_EXPRs with the final operands.
3167 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
3170 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
3171 bti c and bti j handling.
3173 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3174 Thomas Schwinge <thomas@codesourcery.com>
3178 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
3179 t_async and the wait arguments.
3181 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
3183 PR tree-optimization/94727
3184 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
3185 comparing invariant scalar booleans.
3187 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
3188 Jakub Jelinek <jakub@redhat.com>
3191 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
3192 empty base class artificial fields.
3193 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
3194 different after this fix.
3196 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3199 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
3200 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
3201 if the same type has been diagnosed most recently already.
3203 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3205 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
3207 (__arm_vbicq_n_s16): Likewise.
3208 (__arm_vbicq_n_u32): Likewise.
3209 (__arm_vbicq_n_s32): Likewise.
3210 (__arm_vbicq): Likewise.
3211 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
3212 (__arm_vbicq_n_s32): Likewise.
3213 (__arm_vbicq_n_u16): Likewise.
3214 (__arm_vbicq_n_u32): Likewise.
3215 (__arm_vdupq_m_n_s8): Likewise.
3216 (__arm_vdupq_m_n_s16): Likewise.
3217 (__arm_vdupq_m_n_s32): Likewise.
3218 (__arm_vdupq_m_n_u8): Likewise.
3219 (__arm_vdupq_m_n_u16): Likewise.
3220 (__arm_vdupq_m_n_u32): Likewise.
3221 (__arm_vdupq_m_n_f16): Likewise.
3222 (__arm_vdupq_m_n_f32): Likewise.
3223 (__arm_vldrhq_gather_offset_s16): Likewise.
3224 (__arm_vldrhq_gather_offset_s32): Likewise.
3225 (__arm_vldrhq_gather_offset_u16): Likewise.
3226 (__arm_vldrhq_gather_offset_u32): Likewise.
3227 (__arm_vldrhq_gather_offset_f16): Likewise.
3228 (__arm_vldrhq_gather_offset_z_s16): Likewise.
3229 (__arm_vldrhq_gather_offset_z_s32): Likewise.
3230 (__arm_vldrhq_gather_offset_z_u16): Likewise.
3231 (__arm_vldrhq_gather_offset_z_u32): Likewise.
3232 (__arm_vldrhq_gather_offset_z_f16): Likewise.
3233 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
3234 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
3235 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
3236 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
3237 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
3238 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
3239 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
3240 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
3241 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
3242 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
3243 (__arm_vldrwq_gather_offset_s32): Likewise.
3244 (__arm_vldrwq_gather_offset_u32): Likewise.
3245 (__arm_vldrwq_gather_offset_f32): Likewise.
3246 (__arm_vldrwq_gather_offset_z_s32): Likewise.
3247 (__arm_vldrwq_gather_offset_z_u32): Likewise.
3248 (__arm_vldrwq_gather_offset_z_f32): Likewise.
3249 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
3250 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
3251 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
3252 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
3253 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
3254 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
3255 (__arm_vdwdupq_x_n_u8): Likewise.
3256 (__arm_vdwdupq_x_n_u16): Likewise.
3257 (__arm_vdwdupq_x_n_u32): Likewise.
3258 (__arm_viwdupq_x_n_u8): Likewise.
3259 (__arm_viwdupq_x_n_u16): Likewise.
3260 (__arm_viwdupq_x_n_u32): Likewise.
3261 (__arm_vidupq_x_n_u8): Likewise.
3262 (__arm_vddupq_x_n_u8): Likewise.
3263 (__arm_vidupq_x_n_u16): Likewise.
3264 (__arm_vddupq_x_n_u16): Likewise.
3265 (__arm_vidupq_x_n_u32): Likewise.
3266 (__arm_vddupq_x_n_u32): Likewise.
3267 (__arm_vldrdq_gather_offset_s64): Likewise.
3268 (__arm_vldrdq_gather_offset_u64): Likewise.
3269 (__arm_vldrdq_gather_offset_z_s64): Likewise.
3270 (__arm_vldrdq_gather_offset_z_u64): Likewise.
3271 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
3272 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
3273 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
3274 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
3275 (__arm_vidupq_m_n_u8): Likewise.
3276 (__arm_vidupq_m_n_u16): Likewise.
3277 (__arm_vidupq_m_n_u32): Likewise.
3278 (__arm_vddupq_m_n_u8): Likewise.
3279 (__arm_vddupq_m_n_u16): Likewise.
3280 (__arm_vddupq_m_n_u32): Likewise.
3281 (__arm_vidupq_n_u16): Likewise.
3282 (__arm_vidupq_n_u32): Likewise.
3283 (__arm_vidupq_n_u8): Likewise.
3284 (__arm_vddupq_n_u16): Likewise.
3285 (__arm_vddupq_n_u32): Likewise.
3286 (__arm_vddupq_n_u8): Likewise.
3288 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
3290 * doc/install.texi (D-Specific Options): Document
3291 --enable-libphobos-checking and --with-libphobos-druntime-only.
3293 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3296 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
3297 cxx17_empty_base_seen argument. Pass it to recursive calls.
3298 Ignore cxx17_empty_base_field_p fields after setting
3299 *cxx17_empty_base_seen to true.
3300 (rs6000_discover_homogeneous_aggregate): Adjust
3301 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
3302 aggregates with C++17 empty base fields.
3305 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3306 if last_decl is error_mark_node or has such a TREE_TYPE.
3309 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3310 if last_decl is error_mark_node or has such a TREE_TYPE.
3312 2020-04-22 Felix Yang <felix.yang@huawei.com>
3315 * config/aarch64/aarch64.h (TARGET_SVE):
3316 Add && !TARGET_GENERAL_REGS_ONLY.
3317 (TARGET_SVE2): Add && TARGET_SVE.
3318 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
3319 TARGET_SVE2_SM4): Add && TARGET_SVE2.
3320 * config/aarch64/aarch64-sve-builtins.h
3321 (sve_switcher::m_old_general_regs_only): New member.
3322 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
3324 (reported_missing_registers_p): New variable.
3325 (check_required_extensions): Call check_required_registers before
3326 return if all required extenstions are present.
3327 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
3328 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
3329 global_options.x_target_flags.
3330 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
3331 global_options.x_target_flags if m_old_general_regs_only is true.
3333 2020-04-22 Zackery Spytz <zspytz@gmail.com>
3335 * doc/extend.exi: Add "free" to list of other builtin functions
3338 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
3341 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
3343 (store_quadpti): Ditto.
3344 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
3345 plq will be used and doesn't need it.
3346 (atomic_store<mode>): Ditto, for pstq.
3348 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
3350 * doc/invoke.texi: Update flags turned on by -O3.
3352 2020-04-22 Jakub Jelinek <jakub@redhat.com>
3355 * config/ia64/ia64.c (hfa_element_mode): Ignore
3356 cxx17_empty_base_field_p fields.
3359 * calls.h (cxx17_empty_base_field_p): Declare.
3360 * calls.c (cxx17_empty_base_field_p): Define.
3362 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
3364 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
3366 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3367 Andre Vieira <andre.simoesdiasvieira@arm.com>
3368 Mihail Ionescu <mihail.ionescu@arm.com>
3370 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
3371 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
3372 (ALL_QUIRKS): Add quirk_no_asmcpu.
3373 (cortex-m55): Define new cpu.
3374 * config/arm/arm-tables.opt: Regenerate.
3375 * config/arm/arm-tune.md: Likewise.
3376 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
3378 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
3380 PR tree-optimization/94700
3381 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
3382 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
3383 of similarly-structured but distinct vector types.
3385 2020-04-21 Martin Sebor <msebor@redhat.com>
3388 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
3389 the computation of the lower bound of the source access size.
3390 (builtin_access::generic_overlap): Remove a hack for setting ranges
3393 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
3395 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
3396 (ASM_WEAKEN_DECL): New define.
3397 (HAVE_GAS_WEAKREF): Undefine.
3399 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
3401 PR tree-optimization/94683
3402 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
3403 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
3404 but distinct vector types.
3406 2020-04-21 Jakub Jelinek <jakub@redhat.com>
3409 * stor-layout.c (place_field, finalize_record_size): Don't emit
3410 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
3411 * ubsan.c (ubsan_get_type_descriptor_type,
3412 ubsan_get_source_location_type, ubsan_create_data): Set
3414 * asan.c (asan_global_struct): Likewise.
3416 2020-04-21 Duan bo <duanbo3@huawei.com>
3419 * config/aarch64/aarch64.c: Add an error message for option conflict.
3420 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
3421 incompatible with -fpic, -fPIC and -mabi=ilp32.
3423 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
3426 * omp-low.c (new_omp_context): Remove assignments to
3427 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
3429 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3431 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
3432 ("popcountv2di2_vx"): Use simplify_gen_subreg.
3434 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3437 * config/s390/s390-builtin-types.def: Add 3 new function modes.
3438 * config/s390/s390-builtins.def: Add mode dependent low-level
3439 builtin and map the overloaded builtins to these.
3440 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
3441 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
3443 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3445 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
3446 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
3447 estimated VF and is no worse at double the estimated VF.
3449 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3452 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
3453 order of arguments to rtx_vector_builder.
3454 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
3455 When extending the trailing constants to a full vector, replace any
3456 variables with zeros.
3458 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
3461 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
3464 2020-04-20 Martin Liska <mliska@suse.cz>
3466 * symtab.c (symtab_node::dump_references): Add space after
3468 (symtab_node::dump_referring): Likewise.
3470 2020-04-18 Jeff Law <law@redhat.com>
3473 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
3476 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
3478 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
3479 attributes): Document d_runtime_has_std_library.
3481 2020-04-17 Jeff Law <law@redhat.com>
3483 PR rtl-optimization/90275
3484 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
3485 when the destination has a REG_UNUSED note.
3487 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
3490 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
3493 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
3495 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
3496 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
3497 cost of load and store insns if one loop iteration has enough scalar
3498 elements to use an Advanced SIMD LDP or STP.
3499 (aarch64_add_stmt_cost): Update call accordingly.
3501 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3502 Jeff Law <law@redhat.com>
3505 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
3506 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
3507 or pos + len >= 32, or pos + len is equal to operands[2] precision
3508 and operands[2] is not a register operand. During splitting perform
3509 SImode AND if operands[0] doesn't have CCZmode and pos + len is
3510 equal to mode precision.
3512 2020-04-17 Richard Biener <rguenther@suse.de>
3515 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
3517 * dwarf2out.c (dw_val_equal_p): Fix pasto in
3518 dw_val_class_vms_delta comparison.
3519 * optabs.c (expand_binop_directly): Fix pasto in commutation
3521 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
3524 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3526 PR rtl-optimization/94618
3527 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
3528 insn is the BB_END of its block, but also when it is only followed
3529 by DEBUG_INSNs in its block.
3531 PR tree-optimization/94621
3532 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
3533 Move id->adjust_array_error_bounds check first in the condition.
3535 2020-04-17 Martin Liska <mliska@suse.cz>
3536 Jonathan Yong <10walls@gmail.com>
3538 PR gcov-profile/94570
3539 * coverage.c (coverage_init): Use separator properly.
3541 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
3543 PR rtl-optimization/93974
3544 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
3545 (rs6000_cannot_substitute_mem_equiv_p): New function.
3547 2020-04-16 Martin Jambor <mjambor@suse.cz>
3550 * ipa-inline.h (ipa_saved_clone_sources): Declare.
3551 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
3552 (save_inline_function_body): Link the new body holder with the
3554 * cgraph.c: Include ipa-inline.h.
3555 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
3556 the statement in ipa_saved_clone_sources.
3557 * cgraphunit.c: Include ipa-inline.h.
3558 (expand_all_functions): Free ipa_saved_clone_sources.
3560 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3563 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
3564 the VNx16BI lowpart of the recursively-generated constant.
3566 2020-04-16 Martin Liska <mliska@suse.cz>
3567 Jakub Jelinek <jakub@redhat.com>
3570 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
3571 DECL_IS_REPLACEABLE_OPERATOR during cloning.
3572 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
3573 (propagate_necessity): Check operator names.
3575 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3577 PR rtl-optimization/94605
3578 * early-remat.c (early_remat::process_block): Handle insns that
3579 set multiple candidate registers.
3580 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
3582 PR gcov-profile/93401
3583 * common.opt (profile-prefix-path): New option.
3584 * coverae.c: Include diagnostics.h.
3585 (coverage_init): Strip profile prefix path.
3586 * doc/invoke.texi (-fprofile-prefix-path): Document.
3588 2020-04-16 Richard Biener <rguenther@suse.de>
3591 * expr.c (emit_move_multi_word): Do not generate code when
3592 the destination part is undefined_operand_subword_p.
3593 * lower-subreg.c (resolve_clobber): Look through a paradoxica
3596 2020-04-16 Martin Jambor <mjambor@suse.cz>
3598 PR tree-optimization/94598
3599 * tree-sra.c (verify_sra_access_forest): Fix verification of total
3600 scalarization accesses under access to one-element arrays.
3602 2020-04-16 Jakub Jelinek <jakub@redhat.com>
3605 * function.c (assign_parm_find_data_types): Add workaround for
3606 BROKEN_VALUE_INITIALIZATION compilers.
3608 2020-04-16 Richard Biener <rguenther@suse.de>
3610 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
3613 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
3616 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
3617 Require OPTION_MASK_ISA_SSE2.
3619 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
3622 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
3623 Don't construct a dump_context temporary to call static method.
3625 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
3627 * config/aarch64/falkor-tag-collision-avoidance.c
3628 (valid_src_p): Check for aarch64_address_info type before
3629 accessing base field.
3631 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
3633 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
3634 (V_sz_elem2): Remove unused mode attribute.
3636 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
3638 * config/arm/arm.md (arm_movdi): Disallow for MVE.
3640 2020-04-15 Richard Biener <rguenther@suse.de>
3643 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
3644 alias_sets_conflict_p for pointers.
3646 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
3649 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
3650 (extendhisi2_internal): Add %v1 before the load instructions.
3652 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
3655 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
3656 use PC-relative addressing for TLS references.
3658 2020-04-14 Martin Jambor <mjambor@suse.cz>
3661 * ipa-sra.c: Include internal-fn.h.
3662 (enum isra_scan_context): Update comment.
3663 (scan_function): Treat calls to internal_functions like loads or stores.
3665 2020-04-14 Yang Yang <yangyang305@huawei.com>
3667 PR tree-optimization/94574
3668 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
3669 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
3671 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
3674 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
3676 2020-04-13 Martin Sebor <msebor@redhat.com>
3678 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
3679 -Wformat-truncation. Move -Wzero-length-bounds last.
3680 (-Wrestrict): Document positive form of option enabled by -Wall.
3682 2020-04-13 Zachary Spytz <zspytz@gmail.com>
3684 * doc/extend.texi: Add realloc to list of built-in functions
3685 are recognized by the compiler.
3687 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
3690 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
3691 pointer in word_mode for eh_return epilogues.
3693 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3695 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
3696 memory references in %B, %C and %D operand selectors when the inner
3697 operand is a post increment address.
3699 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3701 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
3702 reference by 4 bytes, and %D memory reference by 6 bytes.
3704 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
3707 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
3708 condition for V4SI, V8HI and V16QI modes.
3710 2020-04-11 Jakub Jelinek <jakub@redhat.com>
3714 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
3717 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
3721 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
3722 "#pragma omp declare target" has also been applied.
3724 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3726 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
3727 when to emit the epilogue_helper insn.
3728 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
3731 2020-04-09 Jakub Jelinek <jakub@redhat.com>
3734 * cselib.h (cselib_record_sp_cfa_base_equiv,
3735 cselib_sp_derived_value_p): Declare.
3736 * cselib.c (cselib_record_sp_cfa_base_equiv,
3737 cselib_sp_derived_value_p): New functions.
3738 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
3739 cselib_sp_derived_value_p values.
3740 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
3741 start of extended basic blocks other than the first one
3742 for !frame_pointer_needed functions.
3744 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3746 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
3747 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
3748 (aarch64_sve2048_hw): Document.
3749 * config/aarch64/aarch64-protos.h
3750 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
3751 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
3752 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
3753 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
3755 (find_type_suffix_for_scalar_type): Use it instead of comparing
3757 (function_resolver::infer_vector_or_tuple_type): Likewise.
3758 (function_resolver::require_vector_type): Likewise.
3759 (handle_arm_sve_vector_bits_attribute): New function.
3760 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
3761 (aarch64_attribute_table): Add arm_sve_vector_bits.
3762 (aarch64_return_in_memory_1):
3763 (pure_scalable_type_info::piece::get_rtx): New function.
3764 (pure_scalable_type_info::num_zr): Likewise.
3765 (pure_scalable_type_info::num_pr): Likewise.
3766 (pure_scalable_type_info::get_rtx): Likewise.
3767 (pure_scalable_type_info::analyze): Likewise.
3768 (pure_scalable_type_info::analyze_registers): Likewise.
3769 (pure_scalable_type_info::analyze_array): Likewise.
3770 (pure_scalable_type_info::analyze_record): Likewise.
3771 (pure_scalable_type_info::add_piece): Likewise.
3772 (aarch64_some_values_include_pst_objects_p): Likewise.
3773 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
3774 to analyze whether the type is returned in SVE registers.
3775 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
3776 is passed in SVE registers.
3777 (aarch64_pass_by_reference_1): New function, extracted from...
3778 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
3779 to analyze whether the type is a pure scalable type and, if so,
3780 whether it should be passed by reference.
3781 (aarch64_return_in_msb): Return false for pure scalable types.
3782 (aarch64_function_value_1): Fold back into...
3783 (aarch64_function_value): ...this function. Use
3784 pure_scalable_type_info to analyze whether the type is a pure
3785 scalable type and, if so, which registers it should use. Handle
3786 types that include pure scalable types but are not themselves
3787 pure scalable types.
3788 (aarch64_return_in_memory_1): New function, split out from...
3789 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
3790 to analyze whether the type is a pure scalable type and, if so,
3791 whether it should be returned by reference.
3792 (aarch64_layout_arg): Remove orig_mode argument. Use
3793 pure_scalable_type_info to analyze whether the type is a pure
3794 scalable type and, if so, which registers it should use. Handle
3795 types that include pure scalable types but are not themselves
3796 pure scalable types.
3797 (aarch64_function_arg): Update call accordingly.
3798 (aarch64_function_arg_advance): Likewise.
3799 (aarch64_pad_reg_upward): On big-endian targets, return false for
3800 pure scalable types that are smaller than 16 bytes.
3801 (aarch64_member_type_forces_blk): New function.
3802 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
3803 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
3804 correspond to built-in SVE types. Do not rely on a vector mode
3805 if the type includes an pure scalable type. When returning true,
3806 assert that the mode is not an SVE mode.
3807 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
3808 built-in types here. When returning true, assert that the type
3809 does not have an SVE mode.
3810 (aarch64_can_change_mode_class): Don't allow anything to change
3811 between a predicate mode and a non-predicate mode. Also don't
3812 allow changes between SVE vector modes and other modes that
3813 might be bigger than 128 bits.
3814 (aarch64_invalid_binary_op): Reject binary operations that mix
3815 SVE and GNU vector types.
3816 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
3818 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3820 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
3821 "SVE sizeless type".
3822 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
3823 (sizeless_type_p): New functions.
3824 (register_builtin_types): Apply make_type_sizeless to the type.
3825 (register_tuple_type): Likewise.
3826 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
3828 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
3830 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
3833 2020-04-09 Martin Jambor <mjambor@suse.cz>
3834 Richard Biener <rguenther@suse.de>
3836 PR tree-optimization/94482
3837 * tree-sra.c (create_access_replacement): Dump new replacement with
3839 (sra_modify_expr): Fix handling of cases when the original EXPR writes
3840 to only part of the replacement.
3841 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
3842 the first operand of combinations into REAL/IMAGPART_EXPR and
3845 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3847 * doc/sourcebuild.texi (check-function-bodies): Treat the third
3848 parameter as a list of option regexps and require each regexp
3851 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
3854 * config/aarch64/falkor-tag-collision-avoidance.c
3855 (valid_src_p): Fix missing rtx type check.
3857 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3858 Richard Biener <rguenther@suse.de>
3860 PR tree-optimization/93674
3861 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
3862 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
3863 or non-mode precision type, add candidate in unsigned type with the
3866 2020-04-08 Clement Chigot <clement.chigot@atos.net>
3868 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
3869 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
3870 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
3872 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3875 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
3877 * reload1.c (eliminate_regs_1): Avoid creating
3878 (plus (reg) (const_int 0)) in DEBUG_INSNs.
3880 PR tree-optimization/94524
3881 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
3882 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
3883 op1 rather than op1 itself at the end. Punt for signed modulo by
3884 most negative constant.
3885 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
3886 modulo by most negative constant.
3888 2020-04-08 Richard Biener <rguenther@suse.de>
3890 PR rtl-optimization/93946
3891 * cse.c (cse_insn): Record the tabled expression in
3892 src_related. Verify a redundant store removal is valid.
3894 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
3897 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
3898 ENDBR at function entry if function will be called indirectly.
3900 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3903 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
3906 2020-04-08 Martin Liska <mliska@suse.cz>
3909 * gimple.c (gimple_call_operator_delete_p): Rename to...
3910 (gimple_call_replaceable_operator_delete_p): ... this.
3911 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3912 * gimple.h (gimple_call_operator_delete_p): Rename to ...
3913 (gimple_call_replaceable_operator_delete_p): ... this.
3914 * tree-core.h (tree_function_decl): Add replaceable_operator
3916 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
3917 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3918 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
3919 (eliminate_unnecessary_stmts): Likewise.
3920 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
3921 Pack DECL_IS_REPLACEABLE_OPERATOR.
3922 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
3923 Unpack the field here.
3924 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
3925 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
3926 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
3927 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
3928 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
3929 replaceable operator flags.
3931 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3932 Matthew Malcomson <matthew.malcomson@arm.com>
3934 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
3935 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
3936 (CX_TERNARY_QUALIFIERS): Likewise.
3937 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
3938 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
3939 (arm_init_acle_builtins): Initialize CDE builtins.
3940 (arm_expand_acle_builtin): Check CDE constant operands.
3941 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
3942 of CDE constant operand.
3943 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
3945 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
3946 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
3947 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
3948 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
3949 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
3950 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
3951 * config/arm/arm_cde_builtins.def: New file.
3952 * config/arm/iterators.md (V_reg): New attribute of SI.
3953 * config/arm/predicates.md (const_int_coproc_operand): New.
3954 (const_int_vcde1_operand, const_int_vcde2_operand): New.
3955 (const_int_vcde3_operand): New.
3956 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
3957 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
3958 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
3959 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
3961 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3963 * config.gcc: Add arm_cde.h.
3964 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
3965 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
3966 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
3967 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
3968 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
3969 * config/arm/arm.h (TARGET_CDE): New macro.
3970 * config/arm/arm_cde.h: New file.
3971 * doc/invoke.texi: Document CDE options +cdecp[0-7].
3972 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
3974 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
3976 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3978 PR rtl-optimization/94516
3979 * postreload.c: Include rtl-iter.h.
3980 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
3981 looking for all MEMs with RTX_AUTOINC operand.
3982 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
3984 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
3986 * omp-grid.c (grid_eliminate_combined_simd_part): Use
3987 OMP_CLAUSE_CODE to access the omp clause code.
3989 2020-04-07 Jeff Law <law@redhat.com>
3991 PR rtl-optimization/92264
3992 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
3993 the destination is the stack pointer.
3995 2020-04-07 Jakub Jelinek <jakub@redhat.com>
3997 PR rtl-optimization/94291
3998 PR rtl-optimization/84169
3999 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
4000 must be a REG or SUBREG of REG; if it is not one of these, don't
4003 2020-04-07 Richard Biener <rguenther@suse.de>
4006 * gimplify.c (gimplify_addr_expr): Also consider generated
4009 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4011 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
4013 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4015 * config/arm/arm_mve.h: Cast some pointers to expected types.
4017 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4019 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
4020 same with '__arm_' prefix.
4022 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4024 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
4026 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4028 * config/arm/arm.c (arm_mve_immediate_check): Removed.
4029 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
4030 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
4031 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
4032 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
4033 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
4034 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
4036 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4038 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
4040 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4042 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
4043 * config/arm/mve/md: Fix v[id]wdup patterns.
4045 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4047 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
4048 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
4050 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4052 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
4053 and remove const_ptr enums.
4055 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4057 * config/arm/arm_mve.h (vsubq_n): Merge with...
4059 (vmulq_n): Merge with...
4061 (__ARM_mve_typeid): Simplify scalar and constant detection.
4063 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4066 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
4067 for inter-lane permutation for 64-byte modes.
4070 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
4071 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
4072 Assume it is a REG after that instead of testing it and doing FAIL
4073 otherwise. Formatting fix.
4075 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
4077 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
4079 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4082 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
4083 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
4085 2020-04-06 Jakub Jelinek <jakub@redhat.com>
4087 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
4088 + const0_rtx return the SP_DERIVED_VALUE_P.
4090 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
4092 PR rtl-optimization/92989
4093 * lra-lives.c (process_bb_lives): Do not treat eh_return data
4094 registers as being live at the beginning of the EH receiver.
4096 2020-04-05 Zachary Spytz <zspytz@gmail.com>
4098 * extend.texi: Add free to list of ISO C90 functions that
4099 are recognized by the compiler.
4101 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
4103 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
4106 * config/microblaze/microblaze.md (trap): Update output pattern.
4108 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
4109 Jakub Jelinek <jakub@redhat.com>
4112 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
4113 arrays, pointer-to-members, function types and qualifiers when
4114 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
4115 to emit type again on definition.
4117 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
4120 * ipa-fnsummary.c (vrp_will_run_p): New function.
4121 (fre_will_run_p): New function.
4122 (evaluate_properties_for_edge): Use it.
4123 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
4124 !optimize_debug to optimize_debug.
4126 2020-04-04 Jakub Jelinek <jakub@redhat.com>
4128 PR rtl-optimization/94468
4129 * cselib.c (references_value_p): Formatting fix.
4130 (cselib_useless_value_p): New function.
4131 (discard_useless_locs, discard_useless_values,
4132 cselib_invalidate_regno_val, cselib_invalidate_mem,
4133 cselib_record_set): Use it instead of
4134 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
4137 * tree-iterator.h (expr_single): Declare.
4138 * tree-iterator.c (expr_single): New function.
4139 * tree.h (protected_set_expr_location_if_unset): Declare.
4140 * tree.c (protected_set_expr_location): Use expr_single.
4141 (protected_set_expr_location_if_unset): New function.
4143 2020-04-03 Jeff Law <law@redhat.com>
4145 PR rtl-optimization/92264
4146 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
4147 reloading of auto-increment addressing modes.
4149 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
4152 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
4155 2020-04-03 Jeff Law <law@redhat.com>
4157 PR rtl-optimization/92264
4158 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
4159 post-increment addressing of source operands as well as residuals
4160 when computing any adjustments to the input pointer.
4162 2020-04-03 Jakub Jelinek <jakub@redhat.com>
4165 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4166 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
4167 second half of first lane from first lane of second operand and
4168 first half of second lane from second lane of first operand.
4170 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
4172 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
4174 2020-04-03 Tamar Christina <tamar.christina@arm.com>
4177 * common/config/aarch64/aarch64-common.c
4178 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
4180 2020-04-03 Richard Biener <rguenther@suse.de>
4183 * tree.c (array_ref_low_bound): Deal with released SSA names
4186 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
4188 * config/gcn/gcn.c (print_operand): Handle unordered comparison
4190 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
4191 comparison operators.
4193 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
4195 PR tree-optimization/94443
4196 * tree-vect-loop.c (vectorizable_live_operation): Use
4197 gsi_insert_seq_before to replace gsi_insert_before.
4199 2020-04-03 Martin Liska <mliska@suse.cz>
4202 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
4203 Compare type attributes for gimple_call_fntypes.
4205 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
4207 * alias.c (get_alias_set): Fix comment typos.
4209 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
4212 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
4213 attribute checking used by TYPE.
4215 2020-04-02 Martin Jambor <mjambor@suse.cz>
4218 * ipa-sra.c (struct caller_issues): New fields candidate and
4219 call_from_outside_comdat.
4220 (check_for_caller_issues): Check for calls from outsied of
4221 candidate's same_comdat_group.
4222 (check_all_callers_for_issues): Set up issues.candidate, check result
4224 (mark_callers_calls_comdat_local): New function.
4225 (process_isra_node_results): Set calls_comdat_local of callers if
4228 2020-04-02 Richard Biener <rguenther@suse.de>
4231 * common.opt (ffinite-loops): Initialize to zero.
4232 * opts.c (default_options_table): Remove OPT_ffinite_loops
4234 * cfgloop.h (loop::finite_p): New member.
4235 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
4236 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
4238 * lto-streamer-in.c (input_cfg): Stream finite_p.
4239 * lto-streamer-out.c (output_cfg): Likewise.
4240 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
4241 from flag_finite_loops at CFG build time.
4242 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
4243 finite_p flag instead of flag_finite_loops.
4244 * doc/invoke.texi (ffinite-loops): Adjust documentation of
4247 2020-04-02 Richard Biener <rguenther@suse.de>
4250 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
4251 DW_TAG_imported_unit.
4253 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
4255 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
4256 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
4259 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
4261 PR tree-optimization/94401
4262 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
4263 access type when loading halves of vector to avoid peeling for gaps.
4265 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4267 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
4268 between a string literal and MIPS_SYSVERSION_SPEC macro.
4270 2020-04-02 Martin Jambor <mjambor@suse.cz>
4272 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
4274 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4276 PR rtl-optimization/92264
4277 * params.opt (-param=max-find-base-term-values=): Decrease default
4280 PR rtl-optimization/92264
4281 * rtl.h (struct rtx_def): Mention that call bit is used as
4282 SP_DERIVED_VALUE_P in cselib.c.
4283 * cselib.c (SP_DERIVED_VALUE_P): Define.
4284 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
4285 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
4286 val_rtx and sp based expression where offsets cancel each other.
4287 (preserve_constants_and_equivs): Formatting fix.
4288 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
4289 locs list for cfa_base_preserved_val if needed. Formatting fix.
4290 (autoinc_split): If the to be returned value is a REG, MEM or
4291 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
4292 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
4293 (rtx_equal_for_cselib_1): Call autoinc_split even if both
4294 expressions are PLUS in Pmode with CONST_INT second operands.
4295 Handle SP_DERIVED_VALUE_P cases.
4296 (cselib_hash_plus_const_int): New function.
4297 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
4298 second operand, as well as for PRE_DEC etc. that ought to be
4299 hashed the same way.
4300 (cselib_subst_to_values): Substitute PLUS with Pmode and
4301 CONST_INT operand if the first operand is a VALUE which has
4302 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
4303 SP_DERIVED_VALUE_P + adjusted offset.
4304 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
4305 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
4306 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
4307 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
4308 on the sp value before calling cselib_add_permanent_equiv on the
4310 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
4311 in the insn without REG_INC note.
4312 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
4313 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
4316 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
4317 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
4319 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4322 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
4323 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
4324 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
4325 intrinsic defintion by adding a new builtin call to writeback into base
4327 (__arm_vldrdq_gather_base_wb_u64): Likewise.
4328 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4329 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4330 (__arm_vldrwq_gather_base_wb_s32): Likewise.
4331 (__arm_vldrwq_gather_base_wb_u32): Likewise.
4332 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4333 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4334 (__arm_vldrwq_gather_base_wb_f32): Likewise.
4335 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4336 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
4337 builtin's qualifier.
4338 (vldrdq_gather_base_wb_z_u): Likewise.
4339 (vldrwq_gather_base_wb_u): Likewise.
4340 (vldrdq_gather_base_wb_u): Likewise.
4341 (vldrwq_gather_base_wb_z_s): Likewise.
4342 (vldrwq_gather_base_wb_z_f): Likewise.
4343 (vldrdq_gather_base_wb_z_s): Likewise.
4344 (vldrwq_gather_base_wb_s): Likewise.
4345 (vldrwq_gather_base_wb_f): Likewise.
4346 (vldrdq_gather_base_wb_s): Likewise.
4347 (vldrwq_gather_base_nowb_z_u): Define builtin.
4348 (vldrdq_gather_base_nowb_z_u): Likewise.
4349 (vldrwq_gather_base_nowb_u): Likewise.
4350 (vldrdq_gather_base_nowb_u): Likewise.
4351 (vldrwq_gather_base_nowb_z_s): Likewise.
4352 (vldrwq_gather_base_nowb_z_f): Likewise.
4353 (vldrdq_gather_base_nowb_z_s): Likewise.
4354 (vldrwq_gather_base_nowb_s): Likewise.
4355 (vldrwq_gather_base_nowb_f): Likewise.
4356 (vldrdq_gather_base_nowb_s): Likewise.
4357 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
4359 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
4360 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
4361 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
4362 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
4363 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
4364 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
4365 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
4366 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
4367 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
4368 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
4369 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
4371 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
4373 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
4374 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
4375 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
4376 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
4377 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
4378 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
4379 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
4380 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
4381 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
4383 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
4384 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
4385 Remove constraints from expander.
4386 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
4387 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
4388 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
4389 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
4390 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
4391 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
4393 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
4395 PR rtl-optimization/94123
4396 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
4397 flag_split_wide_types_early.
4399 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
4401 * doc/extend.texi (Common Function Attributes): Fix typo.
4403 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
4406 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
4409 2020-04-01 Zackery Spytz <zspytz@gmail.com>
4411 * doc/extend.texi: Fix a typo in the documentation of the
4412 copy function attribute.
4414 2020-04-01 Jakub Jelinek <jakub@redhat.com>
4417 * tree-object-size.c (pass_object_sizes::execute): Don't call
4418 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
4419 call replace_call_with_value.
4421 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
4423 PR tree-optimization/94043
4424 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
4425 phi for vec_lhs and use it for lane extraction.
4427 2020-03-31 Felix Yang <felix.yang@huawei.com>
4429 PR tree-optimization/94398
4430 * tree-vect-stmts.c (vectorizable_store): Instead of calling
4431 vect_supportable_dr_alignment, set alignment_support_scheme to
4432 dr_unaligned_supported for gather-scatter accesses.
4433 (vectorizable_load): Likewise.
4435 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
4437 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
4439 (vnsi, VnSI, vndi, VnDI): New mode attributes.
4440 (mov<mode>): Use <VnDI> in place of V64DI.
4441 (mov<mode>_exec): Likewise.
4442 (mov<mode>_sgprbase): Likewise.
4443 (reload_out<mode>): Likewise.
4444 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
4445 (gather_load<mode>v64si): Rename to ...
4446 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
4447 and <VnDI> in place of V64DI.
4448 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
4449 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
4450 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
4451 (scatter_store<mode>v64si): Rename to ...
4452 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4453 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
4454 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
4455 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
4456 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
4457 (ds_bpermute<mode>): Use <VnSI>.
4458 (addv64si3_vcc<exec_vcc>): Rename to ...
4459 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4460 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
4461 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
4462 (addcv64si3<exec_vcc>): Rename to ...
4463 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
4464 (subv64si3_vcc<exec_vcc>): Rename to ...
4465 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4466 (subcv64si3<exec_vcc>): Rename to ...
4467 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
4468 (addv64di3): Rename to ...
4469 (add<mode>3): ... this, and use V_DI.
4470 (addv64di3_exec): Rename to ...
4471 (add<mode>3_exec): ... this, and use V_DI.
4472 (subv64di3): Rename to ...
4473 (sub<mode>3): ... this, and use V_DI.
4474 (subv64di3_exec): Rename to ...
4475 (sub<mode>3_exec): ... this, and use V_DI.
4476 (addv64di3_zext): Rename to ...
4477 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
4478 (addv64di3_zext_exec): Rename to ...
4479 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4480 (addv64di3_zext_dup): Rename to ...
4481 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
4482 (addv64di3_zext_dup_exec): Rename to ...
4483 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
4484 (addv64di3_zext_dup2): Rename to ...
4485 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4486 (addv64di3_zext_dup2_exec): Rename to ...
4487 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4488 (addv64di3_sext_dup2): Rename to ...
4489 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
4490 (addv64di3_sext_dup2_exec): Rename to ...
4491 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
4492 (<su>mulv64si3_highpart<exec>): Rename to ...
4493 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
4494 (mulv64di3): Rename to ...
4495 (mul<mode>3): ... this, and use V_DI and <VnSI>.
4496 (mulv64di3_exec): Rename to ...
4497 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
4498 (mulv64di3_zext): Rename to ...
4499 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
4500 (mulv64di3_zext_exec): Rename to ...
4501 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4502 (mulv64di3_zext_dup2): Rename to ...
4503 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4504 (mulv64di3_zext_dup2_exec): Rename to ...
4505 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4506 (<expander>v64di3): Rename to ...
4507 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
4508 (<expander>v64di3_exec): Rename to ...
4509 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
4510 (<expander>v64si3<exec>): Rename to ...
4511 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4512 (v<expander>v64si3<exec>): Rename to ...
4513 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4514 (<expander>v64si3<exec>): Rename to ...
4515 (<expander><vnsi>3<exec>): ... this, and use V_SI.
4516 (subv64df3<exec>): Rename to ...
4517 (sub<mode>3<exec>): ... this, and use V_DF.
4518 (truncv64di<mode>2): Rename to ...
4519 (trunc<vndi><mode>2): ... this, and use <VnDI>.
4520 (truncv64di<mode>2_exec): Rename to ...
4521 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
4522 (<convop><mode>v64di2): Rename to ...
4523 (<convop><mode><vndi>2): ... this, and use <VnDI>.
4524 (<convop><mode>v64di2_exec): Rename to ...
4525 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
4526 (vec_cmp<u>v64qidi): Rename to ...
4527 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
4528 (vec_cmp<u>v64qidi_exec): Rename to ...
4529 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
4530 (vcond_mask_<mode>di): Use <VnDI>.
4531 (maskload<mode>di): Likewise.
4532 (maskstore<mode>di): Likewise.
4533 (mask_gather_load<mode>v64si): Rename to ...
4534 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4535 (mask_scatter_store<mode>v64si): Rename to ...
4536 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4537 (*<reduc_op>_dpp_shr_v64di): Rename to ...
4538 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4539 (*plus_carry_in_dpp_shr_v64si): Rename to ...
4540 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
4541 (*plus_carry_dpp_shr_v64di): Rename to ...
4542 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4543 (vec_seriesv64si): Rename to ...
4544 (vec_series<mode>): ... this, and use V_SI.
4545 (vec_seriesv64di): Rename to ...
4546 (vec_series<mode>): ... this, and use V_DI.
4548 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4550 * config/arc/arc.c (arc_print_operand): Use
4551 HOST_WIDE_INT_PRINT_DEC macro.
4553 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4555 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
4557 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4559 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
4561 (__arm_vbicq): Likewise.
4563 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
4565 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
4567 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4569 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
4570 common section of both MVE Integer and MVE Floating Point.
4572 (vaddlvq_p): Likewise.
4573 (vaddvaq): Likewise.
4574 (vaddvq_p): Likewise.
4575 (vcmpcsq): Likewise.
4576 (vmlsdavxq): Likewise.
4577 (vmlsdavq): Likewise.
4578 (vmladavxq): Likewise.
4579 (vmladavq): Likewise.
4581 (vminavq): Likewise.
4583 (vmaxavq): Likewise.
4584 (vmlaldavq): Likewise.
4585 (vcmphiq): Likewise.
4586 (vaddlvaq): Likewise.
4587 (vrmlaldavhq): Likewise.
4588 (vrmlaldavhxq): Likewise.
4589 (vrmlsldavhq): Likewise.
4590 (vrmlsldavhxq): Likewise.
4591 (vmlsldavxq): Likewise.
4592 (vmlsldavq): Likewise.
4594 (vrmlaldavhaq): Likewise.
4595 (vcmpgeq_m_n): Likewise.
4596 (vmlsdavxq_p): Likewise.
4597 (vmlsdavq_p): Likewise.
4598 (vmlsdavaxq): Likewise.
4599 (vmlsdavaq): Likewise.
4600 (vaddvaq_p): Likewise.
4601 (vcmpcsq_m_n): Likewise.
4602 (vcmpcsq_m): Likewise.
4603 (vmladavxq_p): Likewise.
4604 (vmladavq_p): Likewise.
4605 (vmladavaxq): Likewise.
4606 (vmladavaq): Likewise.
4607 (vminvq_p): Likewise.
4608 (vminavq_p): Likewise.
4609 (vmaxvq_p): Likewise.
4610 (vmaxavq_p): Likewise.
4611 (vcmphiq_m): Likewise.
4612 (vaddlvaq_p): Likewise.
4613 (vmlaldavaq): Likewise.
4614 (vmlaldavaxq): Likewise.
4615 (vmlaldavq_p): Likewise.
4616 (vmlaldavxq_p): Likewise.
4617 (vmlsldavaq): Likewise.
4618 (vmlsldavaxq): Likewise.
4619 (vmlsldavq_p): Likewise.
4620 (vmlsldavxq_p): Likewise.
4621 (vrmlaldavhaxq): Likewise.
4622 (vrmlaldavhq_p): Likewise.
4623 (vrmlaldavhxq_p): Likewise.
4624 (vrmlsldavhaq): Likewise.
4625 (vrmlsldavhaxq): Likewise.
4626 (vrmlsldavhq_p): Likewise.
4627 (vrmlsldavhxq_p): Likewise.
4628 (vabavq_p): Likewise.
4629 (vmladavaq_p): Likewise.
4630 (vstrbq_scatter_offset): Likewise.
4631 (vstrbq_p): Likewise.
4632 (vstrbq_scatter_offset_p): Likewise.
4633 (vstrdq_scatter_base_p): Likewise.
4634 (vstrdq_scatter_base): Likewise.
4635 (vstrdq_scatter_offset_p): Likewise.
4636 (vstrdq_scatter_offset): Likewise.
4637 (vstrdq_scatter_shifted_offset_p): Likewise.
4638 (vstrdq_scatter_shifted_offset): Likewise.
4639 (vmaxq_x): Likewise.
4640 (vminq_x): Likewise.
4641 (vmovlbq_x): Likewise.
4642 (vmovltq_x): Likewise.
4643 (vmulhq_x): Likewise.
4644 (vmullbq_int_x): Likewise.
4645 (vmullbq_poly_x): Likewise.
4646 (vmulltq_int_x): Likewise.
4647 (vmulltq_poly_x): Likewise.
4650 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4653 * config/aarch64/constraints.md (Uph): New constraint.
4654 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
4655 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
4658 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
4659 Jakub Jelinek <jakub@redhat.com>
4662 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
4663 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
4665 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4667 PR tree-optimization/94403
4668 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
4669 ENUMERAL_TYPE lhs_type.
4671 PR rtl-optimization/94344
4672 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
4673 conversions, either on both operands of |^+ or just one. Handle
4674 also extra same precision conversion on RSHIFT_EXPR first operand
4675 provided RSHIFT_EXPR is performed in unsigned type.
4677 2020-03-30 David Malcolm <dmalcolm@redhat.com>
4679 * lra.c (finish_insn_code_data_once): Set the array elements
4680 to NULL after freeing them.
4682 2020-03-30 Andreas Schwab <schwab@suse.de>
4684 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
4687 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
4689 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
4690 to skip defining builtins based on builtin_mask.
4692 2020-03-30 Jakub Jelinek <jakub@redhat.com>
4695 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
4696 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
4697 operand is a register. Don't enable masked variants for V*[QH]Imode.
4700 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
4701 <store_mask_constraint> instead of m in output operand constraint.
4702 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
4705 2020-03-30 Alan Modra <amodra@gmail.com>
4707 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
4708 (rs6000_indirect_call_template_1): Adjust to suit.
4709 * config/rs6000/rs6000.md (call_local): Merge call_local32,
4710 call_local64, and call_local_aix.
4711 (call_value_local): Simlarly.
4712 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
4713 and disable pattern when CALL_LONG.
4714 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
4715 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
4716 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
4718 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
4721 * doc/invoke.texi: Update -falign-functions, -falign-loops and
4722 -falign-jumps documentation.
4724 2020-03-29 Martin Liska <mliska@suse.cz>
4727 * cgraphunit.c (process_function_and_variable_attributes): Remove
4728 double 'attribute' words.
4730 2020-03-29 John David Anglin <dave.anglin@bell.net>
4732 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
4735 2020-03-28 Jakub Jelinek <jakub@redhat.com>
4738 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
4739 to true after setting size to integer_one_node.
4741 PR tree-optimization/94329
4742 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
4743 on the last stmt in a bb, make sure gsi_prev isn't done immediately
4746 2020-03-27 Alan Modra <amodra@gmail.com>
4749 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
4750 for PLT16_LO and PLT_PCREL.
4751 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
4752 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
4753 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
4755 2020-03-27 Martin Sebor <msebor@redhat.com>
4758 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
4760 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
4762 * config/gcn/gcn-valu.md:
4763 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
4764 (VEC_1REG_MODE): Delete.
4765 (VEC_1REG_ALT): Delete.
4766 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
4767 (VEC_1REG_INT_MODE): Delete.
4768 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
4769 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
4770 (VEC_2REG_MODE): Rename to V_2REG throughout.
4771 (VEC_REG_MODE): Rename to V_noHI throughout.
4772 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
4773 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
4774 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
4775 (VEC_INT_MODE): Delete.
4776 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
4777 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
4778 (FP_MODE): Delete and replace with FP throughout.
4779 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
4780 (VCMP_MODE): Rename to V_noQI throughout and move to top.
4781 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
4782 * config/gcn/gcn.md (FP): New mode iterator.
4783 (FP_1REG): New mode iterator.
4785 2020-03-27 David Malcolm <dmalcolm@redhat.com>
4787 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
4788 now emits two .dot files.
4789 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
4790 (graphviz_out::end_tr): Only close a TR, not a TD.
4791 (graphviz_out::begin_td): New.
4792 (graphviz_out::end_td): New.
4793 (graphviz_out::begin_trtd): New, replacing the old implementation
4794 of graphviz_out::begin_tr.
4795 (graphviz_out::end_tdtr): New, replacing the old implementation
4796 of graphviz_out::end_tr.
4797 * graphviz.h (graphviz_out::begin_td): New decl.
4798 (graphviz_out::end_td): New decl.
4799 (graphviz_out::begin_trtd): New decl.
4800 (graphviz_out::end_tdtr): New decl.
4802 2020-03-27 Richard Biener <rguenther@suse.de>
4805 * dwarf2out.c (should_emit_struct_debug): Return false for
4808 2020-03-27 Richard Biener <rguenther@suse.de>
4810 PR tree-optimization/94352
4811 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
4813 (ssa_propagation_engine::ssa_propagate): ... here after
4814 initializing curr_order.
4816 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
4818 PR tree-optimization/90332
4819 * tree-vect-stmts.c (vector_vector_composition_type): New function.
4820 (get_group_load_store_type): Adjust to call
4821 vector_vector_composition_type, extend it to construct with scalar
4823 (vectorizable_load): Likewise.
4825 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
4827 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
4828 (create_ddg_dep_no_link): Likewise.
4829 (add_cross_iteration_register_deps): Move debug instruction check.
4830 Other minor refactoring.
4831 (add_intra_loop_mem_dep): Do not check for debug instructions.
4832 (add_inter_loop_mem_dep): Likewise.
4833 (build_intra_loop_deps): Likewise.
4834 (create_ddg): Do not include debug insns into the graph.
4835 * ddg.h (struct ddg): Remove num_debug field.
4836 * modulo-sched.c (doloop_register_get): Adjust condition.
4837 (res_MII): Remove DDG num_debug field usage.
4838 (sms_schedule_by_order): Use assertion against debug insns.
4839 (ps_has_conflicts): Drop debug insn check.
4841 2020-03-26 Jakub Jelinek <jakub@redhat.com>
4844 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
4845 that contains exactly one non-DEBUG_BEGIN_STMT statement.
4848 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
4849 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
4850 a single non-debug stmt followed by one or more debug stmts.
4851 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
4852 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
4853 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
4854 gimple_seq_last to check if outer_stmt gbind could be reused and
4855 if yes and it is surrounded by any debug stmts, move them into the
4858 PR rtl-optimization/92264
4859 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
4860 for sp based values in !frame_pointer_needed
4861 && !ACCUMULATE_OUTGOING_ARGS functions.
4863 2020-03-26 Felix Yang <felix.yang@huawei.com>
4865 PR tree-optimization/94269
4866 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
4868 operation to single basic block.
4870 2020-03-25 Jeff Law <law@redhat.com>
4872 PR rtl-optimization/90275
4873 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
4876 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4879 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
4880 mode rather than VOIDmode.
4882 2020-03-25 Martin Sebor <msebor@redhat.com>
4885 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
4886 even for alloca calls resulting from system macro expansion.
4887 Include inlining context in all warnings.
4889 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
4892 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
4893 FPRs to change between SDmode and DDmode.
4895 2020-03-25 Martin Sebor <msebor@redhat.com>
4897 PR tree-optimization/94131
4898 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
4900 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
4901 types have constant sizes.
4903 2020-03-25 Martin Liska <mliska@suse.cz>
4906 * configure.ac: Report error only when --with-zstd
4908 * configure: Regenerate.
4910 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4913 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
4914 INSN_CODE (insn) to -1 when changing the pattern.
4916 2020-03-25 Martin Liska <mliska@suse.cz>
4920 * config/i386/i386-features.c (make_resolver_func): Drop
4921 public flag for resolver.
4922 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
4923 group for resolver and drop public flag if possible.
4924 * multiple_target.c (create_dispatcher_calls): Drop unique_name
4925 and resolution as we want to enable LTO privatization of the default
4928 2020-03-25 Martin Liska <mliska@suse.cz>
4931 * configure.ac: Respect --without-zstd and report
4932 error when we can't find header file with --with-zstd.
4933 * configure: Regenerate.
4935 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4938 * varasm.c (output_constructor_array_range): If local->index
4939 RANGE_EXPR doesn't start at the current location in the constructor,
4940 skip needed number of bytes using assemble_zeros or assert we don't
4944 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
4945 counter instead of DECL_UID.
4947 PR tree-optimization/94300
4948 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
4949 is positive, make sure that off + size isn't larger than needed_len.
4951 2020-03-25 Richard Biener <rguenther@suse.de>
4952 Jakub Jelinek <jakub@redhat.com>
4955 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
4957 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
4959 * doc/sourcebuild.texi (ARM-specific attributes): Add
4961 (Features for dg-add-options): Add arm_fp_dp.
4963 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
4966 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
4968 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
4971 * omp-offload.c (omp_finish_file): Fix target-link handling if
4972 targetm_common.have_named_sections is false.
4974 2020-03-24 Jakub Jelinek <jakub@redhat.com>
4977 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
4981 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
4982 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
4983 If not after and at *incr_pos is a debug stmt, set stmt location to
4984 location of next non-debug stmt after it if any.
4987 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
4988 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
4989 worklist or set GF_PLF_2 just because it is used in a debug stmt in
4990 another bb. Formatting improvements.
4993 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
4994 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
4995 regardless of whether TREE_NO_WARNING is set on it or whether
4996 warn_unused_function is true or not.
4998 2020-03-23 Jeff Law <law@redhat.com>
5000 PR rtl-optimization/90275
5003 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
5004 (simplify_logical_relational_operation): Use it.
5006 2020-03-23 Jakub Jelinek <jakub@redhat.com>
5009 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
5010 ultimate rhs and if returned something different, reconstructing
5013 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
5015 * opts.c (print_filtered_help): Improve the help text for alias options.
5017 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5018 Andre Vieira <andre.simoesdiasvieira@arm.com>
5019 Mihail Ionescu <mihail.ionescu@arm.com>
5021 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
5022 (vshlcq_m_u8): Likewise.
5023 (vshlcq_m_s16): Likewise.
5024 (vshlcq_m_u16): Likewise.
5025 (vshlcq_m_s32): Likewise.
5026 (vshlcq_m_u32): Likewise.
5027 (__arm_vshlcq_m_s8): Define intrinsic.
5028 (__arm_vshlcq_m_u8): Likewise.
5029 (__arm_vshlcq_m_s16): Likewise.
5030 (__arm_vshlcq_m_u16): Likewise.
5031 (__arm_vshlcq_m_s32): Likewise.
5032 (__arm_vshlcq_m_u32): Likewise.
5033 (vshlcq_m): Define polymorphic variant.
5034 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
5035 Use builtin qualifier.
5036 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
5037 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
5038 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
5039 (mve_vshlcq_m_<supf><mode>): Likewise.
5041 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5043 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
5044 (UQSHL_QUALIFIERS): Likewise.
5045 (ASRL_QUALIFIERS): Likewise.
5046 (SQSHL_QUALIFIERS): Likewise.
5047 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
5049 (sqrshr): Define macro.
5050 (sqrshrl): Likewise.
5051 (sqrshrl_sat48): Likewise.
5057 (uqrshll): Likewise.
5058 (uqrshll_sat48): Likewise.
5065 (__arm_lsll): Define intrinsic.
5066 (__arm_asrl): Likewise.
5067 (__arm_uqrshll): Likewise.
5068 (__arm_uqrshll_sat48): Likewise.
5069 (__arm_sqrshrl): Likewise.
5070 (__arm_sqrshrl_sat48): Likewise.
5071 (__arm_uqshll): Likewise.
5072 (__arm_urshrl): Likewise.
5073 (__arm_srshrl): Likewise.
5074 (__arm_sqshll): Likewise.
5075 (__arm_uqrshl): Likewise.
5076 (__arm_sqrshr): Likewise.
5077 (__arm_uqshl): Likewise.
5078 (__arm_urshr): Likewise.
5079 (__arm_sqshl): Likewise.
5080 (__arm_srshr): Likewise.
5081 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
5083 (UQSHL_QUALIFIERS): Likewise.
5084 (ASRL_QUALIFIERS): Likewise.
5085 (SQSHL_QUALIFIERS): Likewise.
5086 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
5087 (mve_sqrshrl_sat<supf>_di): Likewise.
5088 (mve_uqrshl_si): Likewise.
5089 (mve_sqrshr_si): Likewise.
5090 (mve_uqshll_di): Likewise.
5091 (mve_urshrl_di): Likewise.
5092 (mve_uqshl_si): Likewise.
5093 (mve_urshr_si): Likewise.
5094 (mve_sqshl_si): Likewise.
5095 (mve_srshr_si): Likewise.
5096 (mve_srshrl_di): Likewise.
5097 (mve_sqshll_di): Likewise.
5099 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5100 Andre Vieira <andre.simoesdiasvieira@arm.com>
5101 Mihail Ionescu <mihail.ionescu@arm.com>
5103 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
5104 (vsetq_lane_f32): Likewise.
5105 (vsetq_lane_s16): Likewise.
5106 (vsetq_lane_s32): Likewise.
5107 (vsetq_lane_s8): Likewise.
5108 (vsetq_lane_s64): Likewise.
5109 (vsetq_lane_u8): Likewise.
5110 (vsetq_lane_u16): Likewise.
5111 (vsetq_lane_u32): Likewise.
5112 (vsetq_lane_u64): Likewise.
5113 (vgetq_lane_f16): Likewise.
5114 (vgetq_lane_f32): Likewise.
5115 (vgetq_lane_s16): Likewise.
5116 (vgetq_lane_s32): Likewise.
5117 (vgetq_lane_s8): Likewise.
5118 (vgetq_lane_s64): Likewise.
5119 (vgetq_lane_u8): Likewise.
5120 (vgetq_lane_u16): Likewise.
5121 (vgetq_lane_u32): Likewise.
5122 (vgetq_lane_u64): Likewise.
5123 (__ARM_NUM_LANES): Likewise.
5124 (__ARM_LANEQ): Likewise.
5125 (__ARM_CHECK_LANEQ): Likewise.
5126 (__arm_vsetq_lane_s16): Define intrinsic.
5127 (__arm_vsetq_lane_s32): Likewise.
5128 (__arm_vsetq_lane_s8): Likewise.
5129 (__arm_vsetq_lane_s64): Likewise.
5130 (__arm_vsetq_lane_u8): Likewise.
5131 (__arm_vsetq_lane_u16): Likewise.
5132 (__arm_vsetq_lane_u32): Likewise.
5133 (__arm_vsetq_lane_u64): Likewise.
5134 (__arm_vgetq_lane_s16): Likewise.
5135 (__arm_vgetq_lane_s32): Likewise.
5136 (__arm_vgetq_lane_s8): Likewise.
5137 (__arm_vgetq_lane_s64): Likewise.
5138 (__arm_vgetq_lane_u8): Likewise.
5139 (__arm_vgetq_lane_u16): Likewise.
5140 (__arm_vgetq_lane_u32): Likewise.
5141 (__arm_vgetq_lane_u64): Likewise.
5142 (__arm_vsetq_lane_f16): Likewise.
5143 (__arm_vsetq_lane_f32): Likewise.
5144 (__arm_vgetq_lane_f16): Likewise.
5145 (__arm_vgetq_lane_f32): Likewise.
5146 (vgetq_lane): Define polymorphic variant.
5147 (vsetq_lane): Likewise.
5148 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
5150 (mve_vec_extractv2didi): Likewise.
5151 (mve_vec_extract_sext_internal<mode>): Likewise.
5152 (mve_vec_extract_zext_internal<mode>): Likewise.
5153 (mve_vec_set<mode>_internal): Likewise.
5154 (mve_vec_setv2di_internal): Likewise.
5155 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
5157 (vec_extract<mode><V_elem_l>): Rename to
5158 "neon_vec_extract<mode><V_elem_l>".
5159 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
5160 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
5161 pattern common for MVE and NEON.
5162 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
5165 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5167 * config/arm/mve.md (earlyclobber_32): New mode attribute.
5168 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
5169 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
5171 2020-03-23 Richard Biener <rguenther@suse.de>
5173 PR tree-optimization/94261
5174 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
5175 IL operand swapping code.
5176 (vect_slp_rearrange_stmts): Do not arrange isomorphic
5177 nodes that would need operation code adjustments.
5179 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
5181 * doc/install.texi (amdgcn-*-amdhsa): Renamed
5182 from amdgcn-unknown-amdhsa; change
5183 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
5185 2020-03-23 Richard Biener <rguenther@suse.de>
5188 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
5189 directly rather than also folding it via build_fold_addr_expr.
5191 2020-03-23 Richard Biener <rguenther@suse.de>
5193 PR tree-optimization/94266
5194 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
5195 addresses of TARGET_MEM_REFs.
5197 2020-03-23 Martin Liska <mliska@suse.cz>
5200 * symtab.c (symtab_node::clone_references): Save speculative_id
5201 as ref may be overwritten by create_reference.
5202 (symtab_node::clone_referring): Likewise.
5203 (symtab_node::clone_reference): Likewise.
5205 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
5207 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
5208 references to Darwin.
5209 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
5210 unconditionally and comment on why.
5212 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5214 * config/darwin.c (darwin_mergeable_constant_section): Collect
5215 section anchor checks into the caller.
5216 (machopic_select_section): Collect section anchor checks into
5217 the determination of 'effective zero-size' objects. When the
5218 size is unknown, assume it is non-zero, and thus return the
5219 'generic' section for the DECL.
5221 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5224 * config/darwin.opt: Amend options descriptions.
5226 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
5228 PR rtl-optimization/94052
5229 * lra-constraints.c (simplify_operand_subreg): Reload the inner
5230 register of a paradoxical subreg if simplify_subreg_regno fails
5231 to give a valid hard register for the outer mode.
5233 2020-03-20 Martin Jambor <mjambor@suse.cz>
5235 PR tree-optimization/93435
5236 * params.opt (sra-max-propagations): New parameter.
5237 * tree-sra.c (propagation_budget): New variable.
5238 (budget_for_propagation_access): New function.
5239 (propagate_subaccesses_from_rhs): Use it.
5240 (propagate_subaccesses_from_lhs): Likewise.
5241 (propagate_all_subaccesses): Set up and destroy propagation_budget.
5243 2020-03-20 Carl Love <cel@us.ibm.com>
5246 * config/rs6000/rs6000.c (rs6000_option_override_internal):
5247 Add check for TARGET_FPRND for Power 7 or newer.
5249 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
5252 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
5253 (cgraph_edge::redirect_callee): Move here; likewise.
5254 (cgraph_node::remove_callees): Update calls_comdat_local flag.
5255 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
5257 (cgraph_node::check_calls_comdat_local_p): New member function.
5258 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
5259 (cgraph_edge::redirect_callee): Move offline.
5260 * ipa-fnsummary.c (compute_fn_summary): Do not compute
5261 calls_comdat_local flag here.
5262 * ipa-inline-transform.c (inline_call): Fix updating of
5263 calls_comdat_local flag.
5264 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
5265 * symtab.c (symtab_node::add_to_same_comdat_group): Update
5266 calls_comdat_local flag.
5268 2020-03-20 Richard Biener <rguenther@suse.de>
5270 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
5271 from the possibly modified root.
5273 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5274 Andre Vieira <andre.simoesdiasvieira@arm.com>
5275 Mihail Ionescu <mihail.ionescu@arm.com>
5277 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
5278 (vst1q_p_s8): Likewise.
5279 (vst2q_s8): Likewise.
5280 (vst2q_u8): Likewise.
5281 (vld1q_z_u8): Likewise.
5282 (vld1q_z_s8): Likewise.
5283 (vld2q_s8): Likewise.
5284 (vld2q_u8): Likewise.
5285 (vld4q_s8): Likewise.
5286 (vld4q_u8): Likewise.
5287 (vst1q_p_u16): Likewise.
5288 (vst1q_p_s16): Likewise.
5289 (vst2q_s16): Likewise.
5290 (vst2q_u16): Likewise.
5291 (vld1q_z_u16): Likewise.
5292 (vld1q_z_s16): Likewise.
5293 (vld2q_s16): Likewise.
5294 (vld2q_u16): Likewise.
5295 (vld4q_s16): Likewise.
5296 (vld4q_u16): Likewise.
5297 (vst1q_p_u32): Likewise.
5298 (vst1q_p_s32): Likewise.
5299 (vst2q_s32): Likewise.
5300 (vst2q_u32): Likewise.
5301 (vld1q_z_u32): Likewise.
5302 (vld1q_z_s32): Likewise.
5303 (vld2q_s32): Likewise.
5304 (vld2q_u32): Likewise.
5305 (vld4q_s32): Likewise.
5306 (vld4q_u32): Likewise.
5307 (vld4q_f16): Likewise.
5308 (vld2q_f16): Likewise.
5309 (vld1q_z_f16): Likewise.
5310 (vst2q_f16): Likewise.
5311 (vst1q_p_f16): Likewise.
5312 (vld4q_f32): Likewise.
5313 (vld2q_f32): Likewise.
5314 (vld1q_z_f32): Likewise.
5315 (vst2q_f32): Likewise.
5316 (vst1q_p_f32): Likewise.
5317 (__arm_vst1q_p_u8): Define intrinsic.
5318 (__arm_vst1q_p_s8): Likewise.
5319 (__arm_vst2q_s8): Likewise.
5320 (__arm_vst2q_u8): Likewise.
5321 (__arm_vld1q_z_u8): Likewise.
5322 (__arm_vld1q_z_s8): Likewise.
5323 (__arm_vld2q_s8): Likewise.
5324 (__arm_vld2q_u8): Likewise.
5325 (__arm_vld4q_s8): Likewise.
5326 (__arm_vld4q_u8): Likewise.
5327 (__arm_vst1q_p_u16): Likewise.
5328 (__arm_vst1q_p_s16): Likewise.
5329 (__arm_vst2q_s16): Likewise.
5330 (__arm_vst2q_u16): Likewise.
5331 (__arm_vld1q_z_u16): Likewise.
5332 (__arm_vld1q_z_s16): Likewise.
5333 (__arm_vld2q_s16): Likewise.
5334 (__arm_vld2q_u16): Likewise.
5335 (__arm_vld4q_s16): Likewise.
5336 (__arm_vld4q_u16): Likewise.
5337 (__arm_vst1q_p_u32): Likewise.
5338 (__arm_vst1q_p_s32): Likewise.
5339 (__arm_vst2q_s32): Likewise.
5340 (__arm_vst2q_u32): Likewise.
5341 (__arm_vld1q_z_u32): Likewise.
5342 (__arm_vld1q_z_s32): Likewise.
5343 (__arm_vld2q_s32): Likewise.
5344 (__arm_vld2q_u32): Likewise.
5345 (__arm_vld4q_s32): Likewise.
5346 (__arm_vld4q_u32): Likewise.
5347 (__arm_vld4q_f16): Likewise.
5348 (__arm_vld2q_f16): Likewise.
5349 (__arm_vld1q_z_f16): Likewise.
5350 (__arm_vst2q_f16): Likewise.
5351 (__arm_vst1q_p_f16): Likewise.
5352 (__arm_vld4q_f32): Likewise.
5353 (__arm_vld2q_f32): Likewise.
5354 (__arm_vld1q_z_f32): Likewise.
5355 (__arm_vst2q_f32): Likewise.
5356 (__arm_vst1q_p_f32): Likewise.
5357 (vld1q_z): Define polymorphic variant.
5360 (vst1q_p): Likewise.
5362 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
5364 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
5365 (mve_vld2q<mode>): Likewise.
5366 (mve_vld4q<mode>): Likewise.
5368 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5369 Andre Vieira <andre.simoesdiasvieira@arm.com>
5370 Mihail Ionescu <mihail.ionescu@arm.com>
5372 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
5373 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
5374 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
5375 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
5376 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
5377 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
5378 * config/arm/arm_mve.h (vadciq_s32): Define macro.
5379 (vadciq_u32): Likewise.
5380 (vadciq_m_s32): Likewise.
5381 (vadciq_m_u32): Likewise.
5382 (vadcq_s32): Likewise.
5383 (vadcq_u32): Likewise.
5384 (vadcq_m_s32): Likewise.
5385 (vadcq_m_u32): Likewise.
5386 (vsbciq_s32): Likewise.
5387 (vsbciq_u32): Likewise.
5388 (vsbciq_m_s32): Likewise.
5389 (vsbciq_m_u32): Likewise.
5390 (vsbcq_s32): Likewise.
5391 (vsbcq_u32): Likewise.
5392 (vsbcq_m_s32): Likewise.
5393 (vsbcq_m_u32): Likewise.
5394 (__arm_vadciq_s32): Define intrinsic.
5395 (__arm_vadciq_u32): Likewise.
5396 (__arm_vadciq_m_s32): Likewise.
5397 (__arm_vadciq_m_u32): Likewise.
5398 (__arm_vadcq_s32): Likewise.
5399 (__arm_vadcq_u32): Likewise.
5400 (__arm_vadcq_m_s32): Likewise.
5401 (__arm_vadcq_m_u32): Likewise.
5402 (__arm_vsbciq_s32): Likewise.
5403 (__arm_vsbciq_u32): Likewise.
5404 (__arm_vsbciq_m_s32): Likewise.
5405 (__arm_vsbciq_m_u32): Likewise.
5406 (__arm_vsbcq_s32): Likewise.
5407 (__arm_vsbcq_u32): Likewise.
5408 (__arm_vsbcq_m_s32): Likewise.
5409 (__arm_vsbcq_m_u32): Likewise.
5410 (vadciq_m): Define polymorphic variant.
5412 (vadcq_m): Likewise.
5414 (vsbciq_m): Likewise.
5416 (vsbcq_m): Likewise.
5418 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
5420 (BINOP_UNONE_UNONE_UNONE): Likewise.
5421 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5422 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5423 * config/arm/mve.md (VADCIQ): Define iterator.
5424 (VADCIQ_M): Likewise.
5426 (VSBCQ_M): Likewise.
5428 (VSBCIQ_M): Likewise.
5430 (VADCQ_M): Likewise.
5431 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
5432 (mve_vadciq_<supf>v4si): Likewise.
5433 (mve_vadcq_m_<supf>v4si): Likewise.
5434 (mve_vadcq_<supf>v4si): Likewise.
5435 (mve_vsbciq_m_<supf>v4si): Likewise.
5436 (mve_vsbciq_<supf>v4si): Likewise.
5437 (mve_vsbcq_m_<supf>v4si): Likewise.
5438 (mve_vsbcq_<supf>v4si): Likewise.
5439 (get_fpscr_nzcvqc): Define isns.
5440 (set_fpscr_nzcvqc): Define isns.
5441 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
5442 (UNSPEC_SET_FPSCR_NZCVQC): Define.
5444 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5446 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
5447 (vddupq_x_n_u16): Likewise.
5448 (vddupq_x_n_u32): Likewise.
5449 (vddupq_x_wb_u8): Likewise.
5450 (vddupq_x_wb_u16): Likewise.
5451 (vddupq_x_wb_u32): Likewise.
5452 (vdwdupq_x_n_u8): Likewise.
5453 (vdwdupq_x_n_u16): Likewise.
5454 (vdwdupq_x_n_u32): Likewise.
5455 (vdwdupq_x_wb_u8): Likewise.
5456 (vdwdupq_x_wb_u16): Likewise.
5457 (vdwdupq_x_wb_u32): Likewise.
5458 (vidupq_x_n_u8): Likewise.
5459 (vidupq_x_n_u16): Likewise.
5460 (vidupq_x_n_u32): Likewise.
5461 (vidupq_x_wb_u8): Likewise.
5462 (vidupq_x_wb_u16): Likewise.
5463 (vidupq_x_wb_u32): Likewise.
5464 (viwdupq_x_n_u8): Likewise.
5465 (viwdupq_x_n_u16): Likewise.
5466 (viwdupq_x_n_u32): Likewise.
5467 (viwdupq_x_wb_u8): Likewise.
5468 (viwdupq_x_wb_u16): Likewise.
5469 (viwdupq_x_wb_u32): Likewise.
5470 (vdupq_x_n_s8): Likewise.
5471 (vdupq_x_n_s16): Likewise.
5472 (vdupq_x_n_s32): Likewise.
5473 (vdupq_x_n_u8): Likewise.
5474 (vdupq_x_n_u16): Likewise.
5475 (vdupq_x_n_u32): Likewise.
5476 (vminq_x_s8): Likewise.
5477 (vminq_x_s16): Likewise.
5478 (vminq_x_s32): Likewise.
5479 (vminq_x_u8): Likewise.
5480 (vminq_x_u16): Likewise.
5481 (vminq_x_u32): Likewise.
5482 (vmaxq_x_s8): Likewise.
5483 (vmaxq_x_s16): Likewise.
5484 (vmaxq_x_s32): Likewise.
5485 (vmaxq_x_u8): Likewise.
5486 (vmaxq_x_u16): Likewise.
5487 (vmaxq_x_u32): Likewise.
5488 (vabdq_x_s8): Likewise.
5489 (vabdq_x_s16): Likewise.
5490 (vabdq_x_s32): Likewise.
5491 (vabdq_x_u8): Likewise.
5492 (vabdq_x_u16): Likewise.
5493 (vabdq_x_u32): Likewise.
5494 (vabsq_x_s8): Likewise.
5495 (vabsq_x_s16): Likewise.
5496 (vabsq_x_s32): Likewise.
5497 (vaddq_x_s8): Likewise.
5498 (vaddq_x_s16): Likewise.
5499 (vaddq_x_s32): Likewise.
5500 (vaddq_x_n_s8): Likewise.
5501 (vaddq_x_n_s16): Likewise.
5502 (vaddq_x_n_s32): Likewise.
5503 (vaddq_x_u8): Likewise.
5504 (vaddq_x_u16): Likewise.
5505 (vaddq_x_u32): Likewise.
5506 (vaddq_x_n_u8): Likewise.
5507 (vaddq_x_n_u16): Likewise.
5508 (vaddq_x_n_u32): Likewise.
5509 (vclsq_x_s8): Likewise.
5510 (vclsq_x_s16): Likewise.
5511 (vclsq_x_s32): Likewise.
5512 (vclzq_x_s8): Likewise.
5513 (vclzq_x_s16): Likewise.
5514 (vclzq_x_s32): Likewise.
5515 (vclzq_x_u8): Likewise.
5516 (vclzq_x_u16): Likewise.
5517 (vclzq_x_u32): Likewise.
5518 (vnegq_x_s8): Likewise.
5519 (vnegq_x_s16): Likewise.
5520 (vnegq_x_s32): Likewise.
5521 (vmulhq_x_s8): Likewise.
5522 (vmulhq_x_s16): Likewise.
5523 (vmulhq_x_s32): Likewise.
5524 (vmulhq_x_u8): Likewise.
5525 (vmulhq_x_u16): Likewise.
5526 (vmulhq_x_u32): Likewise.
5527 (vmullbq_poly_x_p8): Likewise.
5528 (vmullbq_poly_x_p16): Likewise.
5529 (vmullbq_int_x_s8): Likewise.
5530 (vmullbq_int_x_s16): Likewise.
5531 (vmullbq_int_x_s32): Likewise.
5532 (vmullbq_int_x_u8): Likewise.
5533 (vmullbq_int_x_u16): Likewise.
5534 (vmullbq_int_x_u32): Likewise.
5535 (vmulltq_poly_x_p8): Likewise.
5536 (vmulltq_poly_x_p16): Likewise.
5537 (vmulltq_int_x_s8): Likewise.
5538 (vmulltq_int_x_s16): Likewise.
5539 (vmulltq_int_x_s32): Likewise.
5540 (vmulltq_int_x_u8): Likewise.
5541 (vmulltq_int_x_u16): Likewise.
5542 (vmulltq_int_x_u32): Likewise.
5543 (vmulq_x_s8): Likewise.
5544 (vmulq_x_s16): Likewise.
5545 (vmulq_x_s32): Likewise.
5546 (vmulq_x_n_s8): Likewise.
5547 (vmulq_x_n_s16): Likewise.
5548 (vmulq_x_n_s32): Likewise.
5549 (vmulq_x_u8): Likewise.
5550 (vmulq_x_u16): Likewise.
5551 (vmulq_x_u32): Likewise.
5552 (vmulq_x_n_u8): Likewise.
5553 (vmulq_x_n_u16): Likewise.
5554 (vmulq_x_n_u32): Likewise.
5555 (vsubq_x_s8): Likewise.
5556 (vsubq_x_s16): Likewise.
5557 (vsubq_x_s32): Likewise.
5558 (vsubq_x_n_s8): Likewise.
5559 (vsubq_x_n_s16): Likewise.
5560 (vsubq_x_n_s32): Likewise.
5561 (vsubq_x_u8): Likewise.
5562 (vsubq_x_u16): Likewise.
5563 (vsubq_x_u32): Likewise.
5564 (vsubq_x_n_u8): Likewise.
5565 (vsubq_x_n_u16): Likewise.
5566 (vsubq_x_n_u32): Likewise.
5567 (vcaddq_rot90_x_s8): Likewise.
5568 (vcaddq_rot90_x_s16): Likewise.
5569 (vcaddq_rot90_x_s32): Likewise.
5570 (vcaddq_rot90_x_u8): Likewise.
5571 (vcaddq_rot90_x_u16): Likewise.
5572 (vcaddq_rot90_x_u32): Likewise.
5573 (vcaddq_rot270_x_s8): Likewise.
5574 (vcaddq_rot270_x_s16): Likewise.
5575 (vcaddq_rot270_x_s32): Likewise.
5576 (vcaddq_rot270_x_u8): Likewise.
5577 (vcaddq_rot270_x_u16): Likewise.
5578 (vcaddq_rot270_x_u32): Likewise.
5579 (vhaddq_x_n_s8): Likewise.
5580 (vhaddq_x_n_s16): Likewise.
5581 (vhaddq_x_n_s32): Likewise.
5582 (vhaddq_x_n_u8): Likewise.
5583 (vhaddq_x_n_u16): Likewise.
5584 (vhaddq_x_n_u32): Likewise.
5585 (vhaddq_x_s8): Likewise.
5586 (vhaddq_x_s16): Likewise.
5587 (vhaddq_x_s32): Likewise.
5588 (vhaddq_x_u8): Likewise.
5589 (vhaddq_x_u16): Likewise.
5590 (vhaddq_x_u32): Likewise.
5591 (vhcaddq_rot90_x_s8): Likewise.
5592 (vhcaddq_rot90_x_s16): Likewise.
5593 (vhcaddq_rot90_x_s32): Likewise.
5594 (vhcaddq_rot270_x_s8): Likewise.
5595 (vhcaddq_rot270_x_s16): Likewise.
5596 (vhcaddq_rot270_x_s32): Likewise.
5597 (vhsubq_x_n_s8): Likewise.
5598 (vhsubq_x_n_s16): Likewise.
5599 (vhsubq_x_n_s32): Likewise.
5600 (vhsubq_x_n_u8): Likewise.
5601 (vhsubq_x_n_u16): Likewise.
5602 (vhsubq_x_n_u32): Likewise.
5603 (vhsubq_x_s8): Likewise.
5604 (vhsubq_x_s16): Likewise.
5605 (vhsubq_x_s32): Likewise.
5606 (vhsubq_x_u8): Likewise.
5607 (vhsubq_x_u16): Likewise.
5608 (vhsubq_x_u32): Likewise.
5609 (vrhaddq_x_s8): Likewise.
5610 (vrhaddq_x_s16): Likewise.
5611 (vrhaddq_x_s32): Likewise.
5612 (vrhaddq_x_u8): Likewise.
5613 (vrhaddq_x_u16): Likewise.
5614 (vrhaddq_x_u32): Likewise.
5615 (vrmulhq_x_s8): Likewise.
5616 (vrmulhq_x_s16): Likewise.
5617 (vrmulhq_x_s32): Likewise.
5618 (vrmulhq_x_u8): Likewise.
5619 (vrmulhq_x_u16): Likewise.
5620 (vrmulhq_x_u32): Likewise.
5621 (vandq_x_s8): Likewise.
5622 (vandq_x_s16): Likewise.
5623 (vandq_x_s32): Likewise.
5624 (vandq_x_u8): Likewise.
5625 (vandq_x_u16): Likewise.
5626 (vandq_x_u32): Likewise.
5627 (vbicq_x_s8): Likewise.
5628 (vbicq_x_s16): Likewise.
5629 (vbicq_x_s32): Likewise.
5630 (vbicq_x_u8): Likewise.
5631 (vbicq_x_u16): Likewise.
5632 (vbicq_x_u32): Likewise.
5633 (vbrsrq_x_n_s8): Likewise.
5634 (vbrsrq_x_n_s16): Likewise.
5635 (vbrsrq_x_n_s32): Likewise.
5636 (vbrsrq_x_n_u8): Likewise.
5637 (vbrsrq_x_n_u16): Likewise.
5638 (vbrsrq_x_n_u32): Likewise.
5639 (veorq_x_s8): Likewise.
5640 (veorq_x_s16): Likewise.
5641 (veorq_x_s32): Likewise.
5642 (veorq_x_u8): Likewise.
5643 (veorq_x_u16): Likewise.
5644 (veorq_x_u32): Likewise.
5645 (vmovlbq_x_s8): Likewise.
5646 (vmovlbq_x_s16): Likewise.
5647 (vmovlbq_x_u8): Likewise.
5648 (vmovlbq_x_u16): Likewise.
5649 (vmovltq_x_s8): Likewise.
5650 (vmovltq_x_s16): Likewise.
5651 (vmovltq_x_u8): Likewise.
5652 (vmovltq_x_u16): Likewise.
5653 (vmvnq_x_s8): Likewise.
5654 (vmvnq_x_s16): Likewise.
5655 (vmvnq_x_s32): Likewise.
5656 (vmvnq_x_u8): Likewise.
5657 (vmvnq_x_u16): Likewise.
5658 (vmvnq_x_u32): Likewise.
5659 (vmvnq_x_n_s16): Likewise.
5660 (vmvnq_x_n_s32): Likewise.
5661 (vmvnq_x_n_u16): Likewise.
5662 (vmvnq_x_n_u32): Likewise.
5663 (vornq_x_s8): Likewise.
5664 (vornq_x_s16): Likewise.
5665 (vornq_x_s32): Likewise.
5666 (vornq_x_u8): Likewise.
5667 (vornq_x_u16): Likewise.
5668 (vornq_x_u32): Likewise.
5669 (vorrq_x_s8): Likewise.
5670 (vorrq_x_s16): Likewise.
5671 (vorrq_x_s32): Likewise.
5672 (vorrq_x_u8): Likewise.
5673 (vorrq_x_u16): Likewise.
5674 (vorrq_x_u32): Likewise.
5675 (vrev16q_x_s8): Likewise.
5676 (vrev16q_x_u8): Likewise.
5677 (vrev32q_x_s8): Likewise.
5678 (vrev32q_x_s16): Likewise.
5679 (vrev32q_x_u8): Likewise.
5680 (vrev32q_x_u16): Likewise.
5681 (vrev64q_x_s8): Likewise.
5682 (vrev64q_x_s16): Likewise.
5683 (vrev64q_x_s32): Likewise.
5684 (vrev64q_x_u8): Likewise.
5685 (vrev64q_x_u16): Likewise.
5686 (vrev64q_x_u32): Likewise.
5687 (vrshlq_x_s8): Likewise.
5688 (vrshlq_x_s16): Likewise.
5689 (vrshlq_x_s32): Likewise.
5690 (vrshlq_x_u8): Likewise.
5691 (vrshlq_x_u16): Likewise.
5692 (vrshlq_x_u32): Likewise.
5693 (vshllbq_x_n_s8): Likewise.
5694 (vshllbq_x_n_s16): Likewise.
5695 (vshllbq_x_n_u8): Likewise.
5696 (vshllbq_x_n_u16): Likewise.
5697 (vshlltq_x_n_s8): Likewise.
5698 (vshlltq_x_n_s16): Likewise.
5699 (vshlltq_x_n_u8): Likewise.
5700 (vshlltq_x_n_u16): Likewise.
5701 (vshlq_x_s8): Likewise.
5702 (vshlq_x_s16): Likewise.
5703 (vshlq_x_s32): Likewise.
5704 (vshlq_x_u8): Likewise.
5705 (vshlq_x_u16): Likewise.
5706 (vshlq_x_u32): Likewise.
5707 (vshlq_x_n_s8): Likewise.
5708 (vshlq_x_n_s16): Likewise.
5709 (vshlq_x_n_s32): Likewise.
5710 (vshlq_x_n_u8): Likewise.
5711 (vshlq_x_n_u16): Likewise.
5712 (vshlq_x_n_u32): Likewise.
5713 (vrshrq_x_n_s8): Likewise.
5714 (vrshrq_x_n_s16): Likewise.
5715 (vrshrq_x_n_s32): Likewise.
5716 (vrshrq_x_n_u8): Likewise.
5717 (vrshrq_x_n_u16): Likewise.
5718 (vrshrq_x_n_u32): Likewise.
5719 (vshrq_x_n_s8): Likewise.
5720 (vshrq_x_n_s16): Likewise.
5721 (vshrq_x_n_s32): Likewise.
5722 (vshrq_x_n_u8): Likewise.
5723 (vshrq_x_n_u16): Likewise.
5724 (vshrq_x_n_u32): Likewise.
5725 (vdupq_x_n_f16): Likewise.
5726 (vdupq_x_n_f32): Likewise.
5727 (vminnmq_x_f16): Likewise.
5728 (vminnmq_x_f32): Likewise.
5729 (vmaxnmq_x_f16): Likewise.
5730 (vmaxnmq_x_f32): Likewise.
5731 (vabdq_x_f16): Likewise.
5732 (vabdq_x_f32): Likewise.
5733 (vabsq_x_f16): Likewise.
5734 (vabsq_x_f32): Likewise.
5735 (vaddq_x_f16): Likewise.
5736 (vaddq_x_f32): Likewise.
5737 (vaddq_x_n_f16): Likewise.
5738 (vaddq_x_n_f32): Likewise.
5739 (vnegq_x_f16): Likewise.
5740 (vnegq_x_f32): Likewise.
5741 (vmulq_x_f16): Likewise.
5742 (vmulq_x_f32): Likewise.
5743 (vmulq_x_n_f16): Likewise.
5744 (vmulq_x_n_f32): Likewise.
5745 (vsubq_x_f16): Likewise.
5746 (vsubq_x_f32): Likewise.
5747 (vsubq_x_n_f16): Likewise.
5748 (vsubq_x_n_f32): Likewise.
5749 (vcaddq_rot90_x_f16): Likewise.
5750 (vcaddq_rot90_x_f32): Likewise.
5751 (vcaddq_rot270_x_f16): Likewise.
5752 (vcaddq_rot270_x_f32): Likewise.
5753 (vcmulq_x_f16): Likewise.
5754 (vcmulq_x_f32): Likewise.
5755 (vcmulq_rot90_x_f16): Likewise.
5756 (vcmulq_rot90_x_f32): Likewise.
5757 (vcmulq_rot180_x_f16): Likewise.
5758 (vcmulq_rot180_x_f32): Likewise.
5759 (vcmulq_rot270_x_f16): Likewise.
5760 (vcmulq_rot270_x_f32): Likewise.
5761 (vcvtaq_x_s16_f16): Likewise.
5762 (vcvtaq_x_s32_f32): Likewise.
5763 (vcvtaq_x_u16_f16): Likewise.
5764 (vcvtaq_x_u32_f32): Likewise.
5765 (vcvtnq_x_s16_f16): Likewise.
5766 (vcvtnq_x_s32_f32): Likewise.
5767 (vcvtnq_x_u16_f16): Likewise.
5768 (vcvtnq_x_u32_f32): Likewise.
5769 (vcvtpq_x_s16_f16): Likewise.
5770 (vcvtpq_x_s32_f32): Likewise.
5771 (vcvtpq_x_u16_f16): Likewise.
5772 (vcvtpq_x_u32_f32): Likewise.
5773 (vcvtmq_x_s16_f16): Likewise.
5774 (vcvtmq_x_s32_f32): Likewise.
5775 (vcvtmq_x_u16_f16): Likewise.
5776 (vcvtmq_x_u32_f32): Likewise.
5777 (vcvtbq_x_f32_f16): Likewise.
5778 (vcvttq_x_f32_f16): Likewise.
5779 (vcvtq_x_f16_u16): Likewise.
5780 (vcvtq_x_f16_s16): Likewise.
5781 (vcvtq_x_f32_s32): Likewise.
5782 (vcvtq_x_f32_u32): Likewise.
5783 (vcvtq_x_n_f16_s16): Likewise.
5784 (vcvtq_x_n_f16_u16): Likewise.
5785 (vcvtq_x_n_f32_s32): Likewise.
5786 (vcvtq_x_n_f32_u32): Likewise.
5787 (vcvtq_x_s16_f16): Likewise.
5788 (vcvtq_x_s32_f32): Likewise.
5789 (vcvtq_x_u16_f16): Likewise.
5790 (vcvtq_x_u32_f32): Likewise.
5791 (vcvtq_x_n_s16_f16): Likewise.
5792 (vcvtq_x_n_s32_f32): Likewise.
5793 (vcvtq_x_n_u16_f16): Likewise.
5794 (vcvtq_x_n_u32_f32): Likewise.
5795 (vrndq_x_f16): Likewise.
5796 (vrndq_x_f32): Likewise.
5797 (vrndnq_x_f16): Likewise.
5798 (vrndnq_x_f32): Likewise.
5799 (vrndmq_x_f16): Likewise.
5800 (vrndmq_x_f32): Likewise.
5801 (vrndpq_x_f16): Likewise.
5802 (vrndpq_x_f32): Likewise.
5803 (vrndaq_x_f16): Likewise.
5804 (vrndaq_x_f32): Likewise.
5805 (vrndxq_x_f16): Likewise.
5806 (vrndxq_x_f32): Likewise.
5807 (vandq_x_f16): Likewise.
5808 (vandq_x_f32): Likewise.
5809 (vbicq_x_f16): Likewise.
5810 (vbicq_x_f32): Likewise.
5811 (vbrsrq_x_n_f16): Likewise.
5812 (vbrsrq_x_n_f32): Likewise.
5813 (veorq_x_f16): Likewise.
5814 (veorq_x_f32): Likewise.
5815 (vornq_x_f16): Likewise.
5816 (vornq_x_f32): Likewise.
5817 (vorrq_x_f16): Likewise.
5818 (vorrq_x_f32): Likewise.
5819 (vrev32q_x_f16): Likewise.
5820 (vrev64q_x_f16): Likewise.
5821 (vrev64q_x_f32): Likewise.
5822 (__arm_vddupq_x_n_u8): Define intrinsic.
5823 (__arm_vddupq_x_n_u16): Likewise.
5824 (__arm_vddupq_x_n_u32): Likewise.
5825 (__arm_vddupq_x_wb_u8): Likewise.
5826 (__arm_vddupq_x_wb_u16): Likewise.
5827 (__arm_vddupq_x_wb_u32): Likewise.
5828 (__arm_vdwdupq_x_n_u8): Likewise.
5829 (__arm_vdwdupq_x_n_u16): Likewise.
5830 (__arm_vdwdupq_x_n_u32): Likewise.
5831 (__arm_vdwdupq_x_wb_u8): Likewise.
5832 (__arm_vdwdupq_x_wb_u16): Likewise.
5833 (__arm_vdwdupq_x_wb_u32): Likewise.
5834 (__arm_vidupq_x_n_u8): Likewise.
5835 (__arm_vidupq_x_n_u16): Likewise.
5836 (__arm_vidupq_x_n_u32): Likewise.
5837 (__arm_vidupq_x_wb_u8): Likewise.
5838 (__arm_vidupq_x_wb_u16): Likewise.
5839 (__arm_vidupq_x_wb_u32): Likewise.
5840 (__arm_viwdupq_x_n_u8): Likewise.
5841 (__arm_viwdupq_x_n_u16): Likewise.
5842 (__arm_viwdupq_x_n_u32): Likewise.
5843 (__arm_viwdupq_x_wb_u8): Likewise.
5844 (__arm_viwdupq_x_wb_u16): Likewise.
5845 (__arm_viwdupq_x_wb_u32): Likewise.
5846 (__arm_vdupq_x_n_s8): Likewise.
5847 (__arm_vdupq_x_n_s16): Likewise.
5848 (__arm_vdupq_x_n_s32): Likewise.
5849 (__arm_vdupq_x_n_u8): Likewise.
5850 (__arm_vdupq_x_n_u16): Likewise.
5851 (__arm_vdupq_x_n_u32): Likewise.
5852 (__arm_vminq_x_s8): Likewise.
5853 (__arm_vminq_x_s16): Likewise.
5854 (__arm_vminq_x_s32): Likewise.
5855 (__arm_vminq_x_u8): Likewise.
5856 (__arm_vminq_x_u16): Likewise.
5857 (__arm_vminq_x_u32): Likewise.
5858 (__arm_vmaxq_x_s8): Likewise.
5859 (__arm_vmaxq_x_s16): Likewise.
5860 (__arm_vmaxq_x_s32): Likewise.
5861 (__arm_vmaxq_x_u8): Likewise.
5862 (__arm_vmaxq_x_u16): Likewise.
5863 (__arm_vmaxq_x_u32): Likewise.
5864 (__arm_vabdq_x_s8): Likewise.
5865 (__arm_vabdq_x_s16): Likewise.
5866 (__arm_vabdq_x_s32): Likewise.
5867 (__arm_vabdq_x_u8): Likewise.
5868 (__arm_vabdq_x_u16): Likewise.
5869 (__arm_vabdq_x_u32): Likewise.
5870 (__arm_vabsq_x_s8): Likewise.
5871 (__arm_vabsq_x_s16): Likewise.
5872 (__arm_vabsq_x_s32): Likewise.
5873 (__arm_vaddq_x_s8): Likewise.
5874 (__arm_vaddq_x_s16): Likewise.
5875 (__arm_vaddq_x_s32): Likewise.
5876 (__arm_vaddq_x_n_s8): Likewise.
5877 (__arm_vaddq_x_n_s16): Likewise.
5878 (__arm_vaddq_x_n_s32): Likewise.
5879 (__arm_vaddq_x_u8): Likewise.
5880 (__arm_vaddq_x_u16): Likewise.
5881 (__arm_vaddq_x_u32): Likewise.
5882 (__arm_vaddq_x_n_u8): Likewise.
5883 (__arm_vaddq_x_n_u16): Likewise.
5884 (__arm_vaddq_x_n_u32): Likewise.
5885 (__arm_vclsq_x_s8): Likewise.
5886 (__arm_vclsq_x_s16): Likewise.
5887 (__arm_vclsq_x_s32): Likewise.
5888 (__arm_vclzq_x_s8): Likewise.
5889 (__arm_vclzq_x_s16): Likewise.
5890 (__arm_vclzq_x_s32): Likewise.
5891 (__arm_vclzq_x_u8): Likewise.
5892 (__arm_vclzq_x_u16): Likewise.
5893 (__arm_vclzq_x_u32): Likewise.
5894 (__arm_vnegq_x_s8): Likewise.
5895 (__arm_vnegq_x_s16): Likewise.
5896 (__arm_vnegq_x_s32): Likewise.
5897 (__arm_vmulhq_x_s8): Likewise.
5898 (__arm_vmulhq_x_s16): Likewise.
5899 (__arm_vmulhq_x_s32): Likewise.
5900 (__arm_vmulhq_x_u8): Likewise.
5901 (__arm_vmulhq_x_u16): Likewise.
5902 (__arm_vmulhq_x_u32): Likewise.
5903 (__arm_vmullbq_poly_x_p8): Likewise.
5904 (__arm_vmullbq_poly_x_p16): Likewise.
5905 (__arm_vmullbq_int_x_s8): Likewise.
5906 (__arm_vmullbq_int_x_s16): Likewise.
5907 (__arm_vmullbq_int_x_s32): Likewise.
5908 (__arm_vmullbq_int_x_u8): Likewise.
5909 (__arm_vmullbq_int_x_u16): Likewise.
5910 (__arm_vmullbq_int_x_u32): Likewise.
5911 (__arm_vmulltq_poly_x_p8): Likewise.
5912 (__arm_vmulltq_poly_x_p16): Likewise.
5913 (__arm_vmulltq_int_x_s8): Likewise.
5914 (__arm_vmulltq_int_x_s16): Likewise.
5915 (__arm_vmulltq_int_x_s32): Likewise.
5916 (__arm_vmulltq_int_x_u8): Likewise.
5917 (__arm_vmulltq_int_x_u16): Likewise.
5918 (__arm_vmulltq_int_x_u32): Likewise.
5919 (__arm_vmulq_x_s8): Likewise.
5920 (__arm_vmulq_x_s16): Likewise.
5921 (__arm_vmulq_x_s32): Likewise.
5922 (__arm_vmulq_x_n_s8): Likewise.
5923 (__arm_vmulq_x_n_s16): Likewise.
5924 (__arm_vmulq_x_n_s32): Likewise.
5925 (__arm_vmulq_x_u8): Likewise.
5926 (__arm_vmulq_x_u16): Likewise.
5927 (__arm_vmulq_x_u32): Likewise.
5928 (__arm_vmulq_x_n_u8): Likewise.
5929 (__arm_vmulq_x_n_u16): Likewise.
5930 (__arm_vmulq_x_n_u32): Likewise.
5931 (__arm_vsubq_x_s8): Likewise.
5932 (__arm_vsubq_x_s16): Likewise.
5933 (__arm_vsubq_x_s32): Likewise.
5934 (__arm_vsubq_x_n_s8): Likewise.
5935 (__arm_vsubq_x_n_s16): Likewise.
5936 (__arm_vsubq_x_n_s32): Likewise.
5937 (__arm_vsubq_x_u8): Likewise.
5938 (__arm_vsubq_x_u16): Likewise.
5939 (__arm_vsubq_x_u32): Likewise.
5940 (__arm_vsubq_x_n_u8): Likewise.
5941 (__arm_vsubq_x_n_u16): Likewise.
5942 (__arm_vsubq_x_n_u32): Likewise.
5943 (__arm_vcaddq_rot90_x_s8): Likewise.
5944 (__arm_vcaddq_rot90_x_s16): Likewise.
5945 (__arm_vcaddq_rot90_x_s32): Likewise.
5946 (__arm_vcaddq_rot90_x_u8): Likewise.
5947 (__arm_vcaddq_rot90_x_u16): Likewise.
5948 (__arm_vcaddq_rot90_x_u32): Likewise.
5949 (__arm_vcaddq_rot270_x_s8): Likewise.
5950 (__arm_vcaddq_rot270_x_s16): Likewise.
5951 (__arm_vcaddq_rot270_x_s32): Likewise.
5952 (__arm_vcaddq_rot270_x_u8): Likewise.
5953 (__arm_vcaddq_rot270_x_u16): Likewise.
5954 (__arm_vcaddq_rot270_x_u32): Likewise.
5955 (__arm_vhaddq_x_n_s8): Likewise.
5956 (__arm_vhaddq_x_n_s16): Likewise.
5957 (__arm_vhaddq_x_n_s32): Likewise.
5958 (__arm_vhaddq_x_n_u8): Likewise.
5959 (__arm_vhaddq_x_n_u16): Likewise.
5960 (__arm_vhaddq_x_n_u32): Likewise.
5961 (__arm_vhaddq_x_s8): Likewise.
5962 (__arm_vhaddq_x_s16): Likewise.
5963 (__arm_vhaddq_x_s32): Likewise.
5964 (__arm_vhaddq_x_u8): Likewise.
5965 (__arm_vhaddq_x_u16): Likewise.
5966 (__arm_vhaddq_x_u32): Likewise.
5967 (__arm_vhcaddq_rot90_x_s8): Likewise.
5968 (__arm_vhcaddq_rot90_x_s16): Likewise.
5969 (__arm_vhcaddq_rot90_x_s32): Likewise.
5970 (__arm_vhcaddq_rot270_x_s8): Likewise.
5971 (__arm_vhcaddq_rot270_x_s16): Likewise.
5972 (__arm_vhcaddq_rot270_x_s32): Likewise.
5973 (__arm_vhsubq_x_n_s8): Likewise.
5974 (__arm_vhsubq_x_n_s16): Likewise.
5975 (__arm_vhsubq_x_n_s32): Likewise.
5976 (__arm_vhsubq_x_n_u8): Likewise.
5977 (__arm_vhsubq_x_n_u16): Likewise.
5978 (__arm_vhsubq_x_n_u32): Likewise.
5979 (__arm_vhsubq_x_s8): Likewise.
5980 (__arm_vhsubq_x_s16): Likewise.
5981 (__arm_vhsubq_x_s32): Likewise.
5982 (__arm_vhsubq_x_u8): Likewise.
5983 (__arm_vhsubq_x_u16): Likewise.
5984 (__arm_vhsubq_x_u32): Likewise.
5985 (__arm_vrhaddq_x_s8): Likewise.
5986 (__arm_vrhaddq_x_s16): Likewise.
5987 (__arm_vrhaddq_x_s32): Likewise.
5988 (__arm_vrhaddq_x_u8): Likewise.
5989 (__arm_vrhaddq_x_u16): Likewise.
5990 (__arm_vrhaddq_x_u32): Likewise.
5991 (__arm_vrmulhq_x_s8): Likewise.
5992 (__arm_vrmulhq_x_s16): Likewise.
5993 (__arm_vrmulhq_x_s32): Likewise.
5994 (__arm_vrmulhq_x_u8): Likewise.
5995 (__arm_vrmulhq_x_u16): Likewise.
5996 (__arm_vrmulhq_x_u32): Likewise.
5997 (__arm_vandq_x_s8): Likewise.
5998 (__arm_vandq_x_s16): Likewise.
5999 (__arm_vandq_x_s32): Likewise.
6000 (__arm_vandq_x_u8): Likewise.
6001 (__arm_vandq_x_u16): Likewise.
6002 (__arm_vandq_x_u32): Likewise.
6003 (__arm_vbicq_x_s8): Likewise.
6004 (__arm_vbicq_x_s16): Likewise.
6005 (__arm_vbicq_x_s32): Likewise.
6006 (__arm_vbicq_x_u8): Likewise.
6007 (__arm_vbicq_x_u16): Likewise.
6008 (__arm_vbicq_x_u32): Likewise.
6009 (__arm_vbrsrq_x_n_s8): Likewise.
6010 (__arm_vbrsrq_x_n_s16): Likewise.
6011 (__arm_vbrsrq_x_n_s32): Likewise.
6012 (__arm_vbrsrq_x_n_u8): Likewise.
6013 (__arm_vbrsrq_x_n_u16): Likewise.
6014 (__arm_vbrsrq_x_n_u32): Likewise.
6015 (__arm_veorq_x_s8): Likewise.
6016 (__arm_veorq_x_s16): Likewise.
6017 (__arm_veorq_x_s32): Likewise.
6018 (__arm_veorq_x_u8): Likewise.
6019 (__arm_veorq_x_u16): Likewise.
6020 (__arm_veorq_x_u32): Likewise.
6021 (__arm_vmovlbq_x_s8): Likewise.
6022 (__arm_vmovlbq_x_s16): Likewise.
6023 (__arm_vmovlbq_x_u8): Likewise.
6024 (__arm_vmovlbq_x_u16): Likewise.
6025 (__arm_vmovltq_x_s8): Likewise.
6026 (__arm_vmovltq_x_s16): Likewise.
6027 (__arm_vmovltq_x_u8): Likewise.
6028 (__arm_vmovltq_x_u16): Likewise.
6029 (__arm_vmvnq_x_s8): Likewise.
6030 (__arm_vmvnq_x_s16): Likewise.
6031 (__arm_vmvnq_x_s32): Likewise.
6032 (__arm_vmvnq_x_u8): Likewise.
6033 (__arm_vmvnq_x_u16): Likewise.
6034 (__arm_vmvnq_x_u32): Likewise.
6035 (__arm_vmvnq_x_n_s16): Likewise.
6036 (__arm_vmvnq_x_n_s32): Likewise.
6037 (__arm_vmvnq_x_n_u16): Likewise.
6038 (__arm_vmvnq_x_n_u32): Likewise.
6039 (__arm_vornq_x_s8): Likewise.
6040 (__arm_vornq_x_s16): Likewise.
6041 (__arm_vornq_x_s32): Likewise.
6042 (__arm_vornq_x_u8): Likewise.
6043 (__arm_vornq_x_u16): Likewise.
6044 (__arm_vornq_x_u32): Likewise.
6045 (__arm_vorrq_x_s8): Likewise.
6046 (__arm_vorrq_x_s16): Likewise.
6047 (__arm_vorrq_x_s32): Likewise.
6048 (__arm_vorrq_x_u8): Likewise.
6049 (__arm_vorrq_x_u16): Likewise.
6050 (__arm_vorrq_x_u32): Likewise.
6051 (__arm_vrev16q_x_s8): Likewise.
6052 (__arm_vrev16q_x_u8): Likewise.
6053 (__arm_vrev32q_x_s8): Likewise.
6054 (__arm_vrev32q_x_s16): Likewise.
6055 (__arm_vrev32q_x_u8): Likewise.
6056 (__arm_vrev32q_x_u16): Likewise.
6057 (__arm_vrev64q_x_s8): Likewise.
6058 (__arm_vrev64q_x_s16): Likewise.
6059 (__arm_vrev64q_x_s32): Likewise.
6060 (__arm_vrev64q_x_u8): Likewise.
6061 (__arm_vrev64q_x_u16): Likewise.
6062 (__arm_vrev64q_x_u32): Likewise.
6063 (__arm_vrshlq_x_s8): Likewise.
6064 (__arm_vrshlq_x_s16): Likewise.
6065 (__arm_vrshlq_x_s32): Likewise.
6066 (__arm_vrshlq_x_u8): Likewise.
6067 (__arm_vrshlq_x_u16): Likewise.
6068 (__arm_vrshlq_x_u32): Likewise.
6069 (__arm_vshllbq_x_n_s8): Likewise.
6070 (__arm_vshllbq_x_n_s16): Likewise.
6071 (__arm_vshllbq_x_n_u8): Likewise.
6072 (__arm_vshllbq_x_n_u16): Likewise.
6073 (__arm_vshlltq_x_n_s8): Likewise.
6074 (__arm_vshlltq_x_n_s16): Likewise.
6075 (__arm_vshlltq_x_n_u8): Likewise.
6076 (__arm_vshlltq_x_n_u16): Likewise.
6077 (__arm_vshlq_x_s8): Likewise.
6078 (__arm_vshlq_x_s16): Likewise.
6079 (__arm_vshlq_x_s32): Likewise.
6080 (__arm_vshlq_x_u8): Likewise.
6081 (__arm_vshlq_x_u16): Likewise.
6082 (__arm_vshlq_x_u32): Likewise.
6083 (__arm_vshlq_x_n_s8): Likewise.
6084 (__arm_vshlq_x_n_s16): Likewise.
6085 (__arm_vshlq_x_n_s32): Likewise.
6086 (__arm_vshlq_x_n_u8): Likewise.
6087 (__arm_vshlq_x_n_u16): Likewise.
6088 (__arm_vshlq_x_n_u32): Likewise.
6089 (__arm_vrshrq_x_n_s8): Likewise.
6090 (__arm_vrshrq_x_n_s16): Likewise.
6091 (__arm_vrshrq_x_n_s32): Likewise.
6092 (__arm_vrshrq_x_n_u8): Likewise.
6093 (__arm_vrshrq_x_n_u16): Likewise.
6094 (__arm_vrshrq_x_n_u32): Likewise.
6095 (__arm_vshrq_x_n_s8): Likewise.
6096 (__arm_vshrq_x_n_s16): Likewise.
6097 (__arm_vshrq_x_n_s32): Likewise.
6098 (__arm_vshrq_x_n_u8): Likewise.
6099 (__arm_vshrq_x_n_u16): Likewise.
6100 (__arm_vshrq_x_n_u32): Likewise.
6101 (__arm_vdupq_x_n_f16): Likewise.
6102 (__arm_vdupq_x_n_f32): Likewise.
6103 (__arm_vminnmq_x_f16): Likewise.
6104 (__arm_vminnmq_x_f32): Likewise.
6105 (__arm_vmaxnmq_x_f16): Likewise.
6106 (__arm_vmaxnmq_x_f32): Likewise.
6107 (__arm_vabdq_x_f16): Likewise.
6108 (__arm_vabdq_x_f32): Likewise.
6109 (__arm_vabsq_x_f16): Likewise.
6110 (__arm_vabsq_x_f32): Likewise.
6111 (__arm_vaddq_x_f16): Likewise.
6112 (__arm_vaddq_x_f32): Likewise.
6113 (__arm_vaddq_x_n_f16): Likewise.
6114 (__arm_vaddq_x_n_f32): Likewise.
6115 (__arm_vnegq_x_f16): Likewise.
6116 (__arm_vnegq_x_f32): Likewise.
6117 (__arm_vmulq_x_f16): Likewise.
6118 (__arm_vmulq_x_f32): Likewise.
6119 (__arm_vmulq_x_n_f16): Likewise.
6120 (__arm_vmulq_x_n_f32): Likewise.
6121 (__arm_vsubq_x_f16): Likewise.
6122 (__arm_vsubq_x_f32): Likewise.
6123 (__arm_vsubq_x_n_f16): Likewise.
6124 (__arm_vsubq_x_n_f32): Likewise.
6125 (__arm_vcaddq_rot90_x_f16): Likewise.
6126 (__arm_vcaddq_rot90_x_f32): Likewise.
6127 (__arm_vcaddq_rot270_x_f16): Likewise.
6128 (__arm_vcaddq_rot270_x_f32): Likewise.
6129 (__arm_vcmulq_x_f16): Likewise.
6130 (__arm_vcmulq_x_f32): Likewise.
6131 (__arm_vcmulq_rot90_x_f16): Likewise.
6132 (__arm_vcmulq_rot90_x_f32): Likewise.
6133 (__arm_vcmulq_rot180_x_f16): Likewise.
6134 (__arm_vcmulq_rot180_x_f32): Likewise.
6135 (__arm_vcmulq_rot270_x_f16): Likewise.
6136 (__arm_vcmulq_rot270_x_f32): Likewise.
6137 (__arm_vcvtaq_x_s16_f16): Likewise.
6138 (__arm_vcvtaq_x_s32_f32): Likewise.
6139 (__arm_vcvtaq_x_u16_f16): Likewise.
6140 (__arm_vcvtaq_x_u32_f32): Likewise.
6141 (__arm_vcvtnq_x_s16_f16): Likewise.
6142 (__arm_vcvtnq_x_s32_f32): Likewise.
6143 (__arm_vcvtnq_x_u16_f16): Likewise.
6144 (__arm_vcvtnq_x_u32_f32): Likewise.
6145 (__arm_vcvtpq_x_s16_f16): Likewise.
6146 (__arm_vcvtpq_x_s32_f32): Likewise.
6147 (__arm_vcvtpq_x_u16_f16): Likewise.
6148 (__arm_vcvtpq_x_u32_f32): Likewise.
6149 (__arm_vcvtmq_x_s16_f16): Likewise.
6150 (__arm_vcvtmq_x_s32_f32): Likewise.
6151 (__arm_vcvtmq_x_u16_f16): Likewise.
6152 (__arm_vcvtmq_x_u32_f32): Likewise.
6153 (__arm_vcvtbq_x_f32_f16): Likewise.
6154 (__arm_vcvttq_x_f32_f16): Likewise.
6155 (__arm_vcvtq_x_f16_u16): Likewise.
6156 (__arm_vcvtq_x_f16_s16): Likewise.
6157 (__arm_vcvtq_x_f32_s32): Likewise.
6158 (__arm_vcvtq_x_f32_u32): Likewise.
6159 (__arm_vcvtq_x_n_f16_s16): Likewise.
6160 (__arm_vcvtq_x_n_f16_u16): Likewise.
6161 (__arm_vcvtq_x_n_f32_s32): Likewise.
6162 (__arm_vcvtq_x_n_f32_u32): Likewise.
6163 (__arm_vcvtq_x_s16_f16): Likewise.
6164 (__arm_vcvtq_x_s32_f32): Likewise.
6165 (__arm_vcvtq_x_u16_f16): Likewise.
6166 (__arm_vcvtq_x_u32_f32): Likewise.
6167 (__arm_vcvtq_x_n_s16_f16): Likewise.
6168 (__arm_vcvtq_x_n_s32_f32): Likewise.
6169 (__arm_vcvtq_x_n_u16_f16): Likewise.
6170 (__arm_vcvtq_x_n_u32_f32): Likewise.
6171 (__arm_vrndq_x_f16): Likewise.
6172 (__arm_vrndq_x_f32): Likewise.
6173 (__arm_vrndnq_x_f16): Likewise.
6174 (__arm_vrndnq_x_f32): Likewise.
6175 (__arm_vrndmq_x_f16): Likewise.
6176 (__arm_vrndmq_x_f32): Likewise.
6177 (__arm_vrndpq_x_f16): Likewise.
6178 (__arm_vrndpq_x_f32): Likewise.
6179 (__arm_vrndaq_x_f16): Likewise.
6180 (__arm_vrndaq_x_f32): Likewise.
6181 (__arm_vrndxq_x_f16): Likewise.
6182 (__arm_vrndxq_x_f32): Likewise.
6183 (__arm_vandq_x_f16): Likewise.
6184 (__arm_vandq_x_f32): Likewise.
6185 (__arm_vbicq_x_f16): Likewise.
6186 (__arm_vbicq_x_f32): Likewise.
6187 (__arm_vbrsrq_x_n_f16): Likewise.
6188 (__arm_vbrsrq_x_n_f32): Likewise.
6189 (__arm_veorq_x_f16): Likewise.
6190 (__arm_veorq_x_f32): Likewise.
6191 (__arm_vornq_x_f16): Likewise.
6192 (__arm_vornq_x_f32): Likewise.
6193 (__arm_vorrq_x_f16): Likewise.
6194 (__arm_vorrq_x_f32): Likewise.
6195 (__arm_vrev32q_x_f16): Likewise.
6196 (__arm_vrev64q_x_f16): Likewise.
6197 (__arm_vrev64q_x_f32): Likewise.
6198 (vabdq_x): Define polymorphic variant.
6199 (vabsq_x): Likewise.
6200 (vaddq_x): Likewise.
6201 (vandq_x): Likewise.
6202 (vbicq_x): Likewise.
6203 (vbrsrq_x): Likewise.
6204 (vcaddq_rot270_x): Likewise.
6205 (vcaddq_rot90_x): Likewise.
6206 (vcmulq_rot180_x): Likewise.
6207 (vcmulq_rot270_x): Likewise.
6208 (vcmulq_x): Likewise.
6209 (vcvtq_x): Likewise.
6210 (vcvtq_x_n): Likewise.
6211 (vcvtnq_m): Likewise.
6212 (veorq_x): Likewise.
6213 (vmaxnmq_x): Likewise.
6214 (vminnmq_x): Likewise.
6215 (vmulq_x): Likewise.
6216 (vnegq_x): Likewise.
6217 (vornq_x): Likewise.
6218 (vorrq_x): Likewise.
6219 (vrev32q_x): Likewise.
6220 (vrev64q_x): Likewise.
6221 (vrndaq_x): Likewise.
6222 (vrndmq_x): Likewise.
6223 (vrndnq_x): Likewise.
6224 (vrndpq_x): Likewise.
6225 (vrndq_x): Likewise.
6226 (vrndxq_x): Likewise.
6227 (vsubq_x): Likewise.
6228 (vcmulq_rot90_x): Likewise.
6230 (vclsq_x): Likewise.
6231 (vclzq_x): Likewise.
6232 (vhaddq_x): Likewise.
6233 (vhcaddq_rot270_x): Likewise.
6234 (vhcaddq_rot90_x): Likewise.
6235 (vhsubq_x): Likewise.
6236 (vmaxq_x): Likewise.
6237 (vminq_x): Likewise.
6238 (vmovlbq_x): Likewise.
6239 (vmovltq_x): Likewise.
6240 (vmulhq_x): Likewise.
6241 (vmullbq_int_x): Likewise.
6242 (vmullbq_poly_x): Likewise.
6243 (vmulltq_int_x): Likewise.
6244 (vmulltq_poly_x): Likewise.
6245 (vmvnq_x): Likewise.
6246 (vrev16q_x): Likewise.
6247 (vrhaddq_x): Likewise.
6248 (vrmulhq_x): Likewise.
6249 (vrshlq_x): Likewise.
6250 (vrshrq_x): Likewise.
6251 (vshllbq_x): Likewise.
6252 (vshlltq_x): Likewise.
6253 (vshlq_x_n): Likewise.
6254 (vshlq_x): Likewise.
6255 (vdwdupq_x_u8): Likewise.
6256 (vdwdupq_x_u16): Likewise.
6257 (vdwdupq_x_u32): Likewise.
6258 (viwdupq_x_u8): Likewise.
6259 (viwdupq_x_u16): Likewise.
6260 (viwdupq_x_u32): Likewise.
6261 (vidupq_x_u8): Likewise.
6262 (vddupq_x_u8): Likewise.
6263 (vidupq_x_u16): Likewise.
6264 (vddupq_x_u16): Likewise.
6265 (vidupq_x_u32): Likewise.
6266 (vddupq_x_u32): Likewise.
6267 (vshrq_x): Likewise.
6269 2020-03-20 Richard Biener <rguenther@suse.de>
6271 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
6272 to vectorize for CTOR defs.
6274 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6275 Andre Vieira <andre.simoesdiasvieira@arm.com>
6276 Mihail Ionescu <mihail.ionescu@arm.com>
6278 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
6280 (LDRGBWBU_QUALIFIERS): Likewise.
6281 (LDRGBWBS_Z_QUALIFIERS): Likewise.
6282 (LDRGBWBU_Z_QUALIFIERS): Likewise.
6283 (STRSBWBS_QUALIFIERS): Likewise.
6284 (STRSBWBU_QUALIFIERS): Likewise.
6285 (STRSBWBS_P_QUALIFIERS): Likewise.
6286 (STRSBWBU_P_QUALIFIERS): Likewise.
6287 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
6288 (vldrdq_gather_base_wb_u64): Likewise.
6289 (vldrdq_gather_base_wb_z_s64): Likewise.
6290 (vldrdq_gather_base_wb_z_u64): Likewise.
6291 (vldrwq_gather_base_wb_f32): Likewise.
6292 (vldrwq_gather_base_wb_s32): Likewise.
6293 (vldrwq_gather_base_wb_u32): Likewise.
6294 (vldrwq_gather_base_wb_z_f32): Likewise.
6295 (vldrwq_gather_base_wb_z_s32): Likewise.
6296 (vldrwq_gather_base_wb_z_u32): Likewise.
6297 (vstrdq_scatter_base_wb_p_s64): Likewise.
6298 (vstrdq_scatter_base_wb_p_u64): Likewise.
6299 (vstrdq_scatter_base_wb_s64): Likewise.
6300 (vstrdq_scatter_base_wb_u64): Likewise.
6301 (vstrwq_scatter_base_wb_p_s32): Likewise.
6302 (vstrwq_scatter_base_wb_p_f32): Likewise.
6303 (vstrwq_scatter_base_wb_p_u32): Likewise.
6304 (vstrwq_scatter_base_wb_s32): Likewise.
6305 (vstrwq_scatter_base_wb_u32): Likewise.
6306 (vstrwq_scatter_base_wb_f32): Likewise.
6307 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
6308 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6309 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6310 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6311 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6312 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6313 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6314 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6315 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
6316 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
6317 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
6318 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
6319 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
6320 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
6321 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
6322 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
6323 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6324 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6325 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
6326 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
6327 (vstrwq_scatter_base_wb): Define polymorphic variant.
6328 (vstrwq_scatter_base_wb_p): Likewise.
6329 (vstrdq_scatter_base_wb_p): Likewise.
6330 (vstrdq_scatter_base_wb): Likewise.
6331 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
6333 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
6335 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
6336 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
6337 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
6338 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
6339 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
6340 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
6341 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
6342 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
6343 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
6344 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
6345 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
6346 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
6347 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
6348 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
6349 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
6350 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
6351 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
6352 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
6353 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
6354 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
6355 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
6356 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
6357 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
6358 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
6359 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
6360 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
6361 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
6362 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
6363 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
6365 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6366 Andre Vieira <andre.simoesdiasvieira@arm.com>
6367 Mihail Ionescu <mihail.ionescu@arm.com>
6369 * config/arm/arm-builtins.c
6370 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
6372 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
6373 (vddupq_m_n_u32): Likewise.
6374 (vddupq_m_n_u16): Likewise.
6375 (vddupq_m_wb_u8): Likewise.
6376 (vddupq_m_wb_u16): Likewise.
6377 (vddupq_m_wb_u32): Likewise.
6378 (vddupq_n_u8): Likewise.
6379 (vddupq_n_u32): Likewise.
6380 (vddupq_n_u16): Likewise.
6381 (vddupq_wb_u8): Likewise.
6382 (vddupq_wb_u16): Likewise.
6383 (vddupq_wb_u32): Likewise.
6384 (vdwdupq_m_n_u8): Likewise.
6385 (vdwdupq_m_n_u32): Likewise.
6386 (vdwdupq_m_n_u16): Likewise.
6387 (vdwdupq_m_wb_u8): Likewise.
6388 (vdwdupq_m_wb_u32): Likewise.
6389 (vdwdupq_m_wb_u16): Likewise.
6390 (vdwdupq_n_u8): Likewise.
6391 (vdwdupq_n_u32): Likewise.
6392 (vdwdupq_n_u16): Likewise.
6393 (vdwdupq_wb_u8): Likewise.
6394 (vdwdupq_wb_u32): Likewise.
6395 (vdwdupq_wb_u16): Likewise.
6396 (vidupq_m_n_u8): Likewise.
6397 (vidupq_m_n_u32): Likewise.
6398 (vidupq_m_n_u16): Likewise.
6399 (vidupq_m_wb_u8): Likewise.
6400 (vidupq_m_wb_u16): Likewise.
6401 (vidupq_m_wb_u32): Likewise.
6402 (vidupq_n_u8): Likewise.
6403 (vidupq_n_u32): Likewise.
6404 (vidupq_n_u16): Likewise.
6405 (vidupq_wb_u8): Likewise.
6406 (vidupq_wb_u16): Likewise.
6407 (vidupq_wb_u32): Likewise.
6408 (viwdupq_m_n_u8): Likewise.
6409 (viwdupq_m_n_u32): Likewise.
6410 (viwdupq_m_n_u16): Likewise.
6411 (viwdupq_m_wb_u8): Likewise.
6412 (viwdupq_m_wb_u32): Likewise.
6413 (viwdupq_m_wb_u16): Likewise.
6414 (viwdupq_n_u8): Likewise.
6415 (viwdupq_n_u32): Likewise.
6416 (viwdupq_n_u16): Likewise.
6417 (viwdupq_wb_u8): Likewise.
6418 (viwdupq_wb_u32): Likewise.
6419 (viwdupq_wb_u16): Likewise.
6420 (__arm_vddupq_m_n_u8): Define intrinsic.
6421 (__arm_vddupq_m_n_u32): Likewise.
6422 (__arm_vddupq_m_n_u16): Likewise.
6423 (__arm_vddupq_m_wb_u8): Likewise.
6424 (__arm_vddupq_m_wb_u16): Likewise.
6425 (__arm_vddupq_m_wb_u32): Likewise.
6426 (__arm_vddupq_n_u8): Likewise.
6427 (__arm_vddupq_n_u32): Likewise.
6428 (__arm_vddupq_n_u16): Likewise.
6429 (__arm_vdwdupq_m_n_u8): Likewise.
6430 (__arm_vdwdupq_m_n_u32): Likewise.
6431 (__arm_vdwdupq_m_n_u16): Likewise.
6432 (__arm_vdwdupq_m_wb_u8): Likewise.
6433 (__arm_vdwdupq_m_wb_u32): Likewise.
6434 (__arm_vdwdupq_m_wb_u16): Likewise.
6435 (__arm_vdwdupq_n_u8): Likewise.
6436 (__arm_vdwdupq_n_u32): Likewise.
6437 (__arm_vdwdupq_n_u16): Likewise.
6438 (__arm_vdwdupq_wb_u8): Likewise.
6439 (__arm_vdwdupq_wb_u32): Likewise.
6440 (__arm_vdwdupq_wb_u16): Likewise.
6441 (__arm_vidupq_m_n_u8): Likewise.
6442 (__arm_vidupq_m_n_u32): Likewise.
6443 (__arm_vidupq_m_n_u16): Likewise.
6444 (__arm_vidupq_n_u8): Likewise.
6445 (__arm_vidupq_m_wb_u8): Likewise.
6446 (__arm_vidupq_m_wb_u16): Likewise.
6447 (__arm_vidupq_m_wb_u32): Likewise.
6448 (__arm_vidupq_n_u32): Likewise.
6449 (__arm_vidupq_n_u16): Likewise.
6450 (__arm_vidupq_wb_u8): Likewise.
6451 (__arm_vidupq_wb_u16): Likewise.
6452 (__arm_vidupq_wb_u32): Likewise.
6453 (__arm_vddupq_wb_u8): Likewise.
6454 (__arm_vddupq_wb_u16): Likewise.
6455 (__arm_vddupq_wb_u32): Likewise.
6456 (__arm_viwdupq_m_n_u8): Likewise.
6457 (__arm_viwdupq_m_n_u32): Likewise.
6458 (__arm_viwdupq_m_n_u16): Likewise.
6459 (__arm_viwdupq_m_wb_u8): Likewise.
6460 (__arm_viwdupq_m_wb_u32): Likewise.
6461 (__arm_viwdupq_m_wb_u16): Likewise.
6462 (__arm_viwdupq_n_u8): Likewise.
6463 (__arm_viwdupq_n_u32): Likewise.
6464 (__arm_viwdupq_n_u16): Likewise.
6465 (__arm_viwdupq_wb_u8): Likewise.
6466 (__arm_viwdupq_wb_u32): Likewise.
6467 (__arm_viwdupq_wb_u16): Likewise.
6468 (vidupq_m): Define polymorphic variant.
6469 (vddupq_m): Likewise.
6470 (vidupq_u16): Likewise.
6471 (vidupq_u32): Likewise.
6472 (vidupq_u8): Likewise.
6473 (vddupq_u16): Likewise.
6474 (vddupq_u32): Likewise.
6475 (vddupq_u8): Likewise.
6476 (viwdupq_m): Likewise.
6477 (viwdupq_u16): Likewise.
6478 (viwdupq_u32): Likewise.
6479 (viwdupq_u8): Likewise.
6480 (vdwdupq_m): Likewise.
6481 (vdwdupq_u16): Likewise.
6482 (vdwdupq_u32): Likewise.
6483 (vdwdupq_u8): Likewise.
6484 * config/arm/arm_mve_builtins.def
6485 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
6487 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
6488 (mve_vidupq_u<mode>_insn): Likewise.
6489 (mve_vidupq_m_n_u<mode>): Likewise.
6490 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
6491 (mve_vddupq_n_u<mode>): Likewise.
6492 (mve_vddupq_u<mode>_insn): Likewise.
6493 (mve_vddupq_m_n_u<mode>): Likewise.
6494 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
6495 (mve_vdwdupq_n_u<mode>): Likewise.
6496 (mve_vdwdupq_wb_u<mode>): Likewise.
6497 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
6498 (mve_vdwdupq_m_n_u<mode>): Likewise.
6499 (mve_vdwdupq_m_wb_u<mode>): Likewise.
6500 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
6501 (mve_viwdupq_n_u<mode>): Likewise.
6502 (mve_viwdupq_wb_u<mode>): Likewise.
6503 (mve_viwdupq_wb_u<mode>_insn): Likewise.
6504 (mve_viwdupq_m_n_u<mode>): Likewise.
6505 (mve_viwdupq_m_wb_u<mode>): Likewise.
6506 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
6508 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6510 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
6511 (vreinterpretq_s16_s64): Likewise.
6512 (vreinterpretq_s16_s8): Likewise.
6513 (vreinterpretq_s16_u16): Likewise.
6514 (vreinterpretq_s16_u32): Likewise.
6515 (vreinterpretq_s16_u64): Likewise.
6516 (vreinterpretq_s16_u8): Likewise.
6517 (vreinterpretq_s32_s16): Likewise.
6518 (vreinterpretq_s32_s64): Likewise.
6519 (vreinterpretq_s32_s8): Likewise.
6520 (vreinterpretq_s32_u16): Likewise.
6521 (vreinterpretq_s32_u32): Likewise.
6522 (vreinterpretq_s32_u64): Likewise.
6523 (vreinterpretq_s32_u8): Likewise.
6524 (vreinterpretq_s64_s16): Likewise.
6525 (vreinterpretq_s64_s32): Likewise.
6526 (vreinterpretq_s64_s8): Likewise.
6527 (vreinterpretq_s64_u16): Likewise.
6528 (vreinterpretq_s64_u32): Likewise.
6529 (vreinterpretq_s64_u64): Likewise.
6530 (vreinterpretq_s64_u8): Likewise.
6531 (vreinterpretq_s8_s16): Likewise.
6532 (vreinterpretq_s8_s32): Likewise.
6533 (vreinterpretq_s8_s64): Likewise.
6534 (vreinterpretq_s8_u16): Likewise.
6535 (vreinterpretq_s8_u32): Likewise.
6536 (vreinterpretq_s8_u64): Likewise.
6537 (vreinterpretq_s8_u8): Likewise.
6538 (vreinterpretq_u16_s16): Likewise.
6539 (vreinterpretq_u16_s32): Likewise.
6540 (vreinterpretq_u16_s64): Likewise.
6541 (vreinterpretq_u16_s8): Likewise.
6542 (vreinterpretq_u16_u32): Likewise.
6543 (vreinterpretq_u16_u64): Likewise.
6544 (vreinterpretq_u16_u8): Likewise.
6545 (vreinterpretq_u32_s16): Likewise.
6546 (vreinterpretq_u32_s32): Likewise.
6547 (vreinterpretq_u32_s64): Likewise.
6548 (vreinterpretq_u32_s8): Likewise.
6549 (vreinterpretq_u32_u16): Likewise.
6550 (vreinterpretq_u32_u64): Likewise.
6551 (vreinterpretq_u32_u8): Likewise.
6552 (vreinterpretq_u64_s16): Likewise.
6553 (vreinterpretq_u64_s32): Likewise.
6554 (vreinterpretq_u64_s64): Likewise.
6555 (vreinterpretq_u64_s8): Likewise.
6556 (vreinterpretq_u64_u16): Likewise.
6557 (vreinterpretq_u64_u32): Likewise.
6558 (vreinterpretq_u64_u8): Likewise.
6559 (vreinterpretq_u8_s16): Likewise.
6560 (vreinterpretq_u8_s32): Likewise.
6561 (vreinterpretq_u8_s64): Likewise.
6562 (vreinterpretq_u8_s8): Likewise.
6563 (vreinterpretq_u8_u16): Likewise.
6564 (vreinterpretq_u8_u32): Likewise.
6565 (vreinterpretq_u8_u64): Likewise.
6566 (vreinterpretq_s32_f16): Likewise.
6567 (vreinterpretq_s32_f32): Likewise.
6568 (vreinterpretq_u16_f16): Likewise.
6569 (vreinterpretq_u16_f32): Likewise.
6570 (vreinterpretq_u32_f16): Likewise.
6571 (vreinterpretq_u32_f32): Likewise.
6572 (vreinterpretq_u64_f16): Likewise.
6573 (vreinterpretq_u64_f32): Likewise.
6574 (vreinterpretq_u8_f16): Likewise.
6575 (vreinterpretq_u8_f32): Likewise.
6576 (vreinterpretq_f16_f32): Likewise.
6577 (vreinterpretq_f16_s16): Likewise.
6578 (vreinterpretq_f16_s32): Likewise.
6579 (vreinterpretq_f16_s64): Likewise.
6580 (vreinterpretq_f16_s8): Likewise.
6581 (vreinterpretq_f16_u16): Likewise.
6582 (vreinterpretq_f16_u32): Likewise.
6583 (vreinterpretq_f16_u64): Likewise.
6584 (vreinterpretq_f16_u8): Likewise.
6585 (vreinterpretq_f32_f16): Likewise.
6586 (vreinterpretq_f32_s16): Likewise.
6587 (vreinterpretq_f32_s32): Likewise.
6588 (vreinterpretq_f32_s64): Likewise.
6589 (vreinterpretq_f32_s8): Likewise.
6590 (vreinterpretq_f32_u16): Likewise.
6591 (vreinterpretq_f32_u32): Likewise.
6592 (vreinterpretq_f32_u64): Likewise.
6593 (vreinterpretq_f32_u8): Likewise.
6594 (vreinterpretq_s16_f16): Likewise.
6595 (vreinterpretq_s16_f32): Likewise.
6596 (vreinterpretq_s64_f16): Likewise.
6597 (vreinterpretq_s64_f32): Likewise.
6598 (vreinterpretq_s8_f16): Likewise.
6599 (vreinterpretq_s8_f32): Likewise.
6600 (vuninitializedq_u8): Likewise.
6601 (vuninitializedq_u16): Likewise.
6602 (vuninitializedq_u32): Likewise.
6603 (vuninitializedq_u64): Likewise.
6604 (vuninitializedq_s8): Likewise.
6605 (vuninitializedq_s16): Likewise.
6606 (vuninitializedq_s32): Likewise.
6607 (vuninitializedq_s64): Likewise.
6608 (vuninitializedq_f16): Likewise.
6609 (vuninitializedq_f32): Likewise.
6610 (__arm_vuninitializedq_u8): Define intrinsic.
6611 (__arm_vuninitializedq_u16): Likewise.
6612 (__arm_vuninitializedq_u32): Likewise.
6613 (__arm_vuninitializedq_u64): Likewise.
6614 (__arm_vuninitializedq_s8): Likewise.
6615 (__arm_vuninitializedq_s16): Likewise.
6616 (__arm_vuninitializedq_s32): Likewise.
6617 (__arm_vuninitializedq_s64): Likewise.
6618 (__arm_vreinterpretq_s16_s32): Likewise.
6619 (__arm_vreinterpretq_s16_s64): Likewise.
6620 (__arm_vreinterpretq_s16_s8): Likewise.
6621 (__arm_vreinterpretq_s16_u16): Likewise.
6622 (__arm_vreinterpretq_s16_u32): Likewise.
6623 (__arm_vreinterpretq_s16_u64): Likewise.
6624 (__arm_vreinterpretq_s16_u8): Likewise.
6625 (__arm_vreinterpretq_s32_s16): Likewise.
6626 (__arm_vreinterpretq_s32_s64): Likewise.
6627 (__arm_vreinterpretq_s32_s8): Likewise.
6628 (__arm_vreinterpretq_s32_u16): Likewise.
6629 (__arm_vreinterpretq_s32_u32): Likewise.
6630 (__arm_vreinterpretq_s32_u64): Likewise.
6631 (__arm_vreinterpretq_s32_u8): Likewise.
6632 (__arm_vreinterpretq_s64_s16): Likewise.
6633 (__arm_vreinterpretq_s64_s32): Likewise.
6634 (__arm_vreinterpretq_s64_s8): Likewise.
6635 (__arm_vreinterpretq_s64_u16): Likewise.
6636 (__arm_vreinterpretq_s64_u32): Likewise.
6637 (__arm_vreinterpretq_s64_u64): Likewise.
6638 (__arm_vreinterpretq_s64_u8): Likewise.
6639 (__arm_vreinterpretq_s8_s16): Likewise.
6640 (__arm_vreinterpretq_s8_s32): Likewise.
6641 (__arm_vreinterpretq_s8_s64): Likewise.
6642 (__arm_vreinterpretq_s8_u16): Likewise.
6643 (__arm_vreinterpretq_s8_u32): Likewise.
6644 (__arm_vreinterpretq_s8_u64): Likewise.
6645 (__arm_vreinterpretq_s8_u8): Likewise.
6646 (__arm_vreinterpretq_u16_s16): Likewise.
6647 (__arm_vreinterpretq_u16_s32): Likewise.
6648 (__arm_vreinterpretq_u16_s64): Likewise.
6649 (__arm_vreinterpretq_u16_s8): Likewise.
6650 (__arm_vreinterpretq_u16_u32): Likewise.
6651 (__arm_vreinterpretq_u16_u64): Likewise.
6652 (__arm_vreinterpretq_u16_u8): Likewise.
6653 (__arm_vreinterpretq_u32_s16): Likewise.
6654 (__arm_vreinterpretq_u32_s32): Likewise.
6655 (__arm_vreinterpretq_u32_s64): Likewise.
6656 (__arm_vreinterpretq_u32_s8): Likewise.
6657 (__arm_vreinterpretq_u32_u16): Likewise.
6658 (__arm_vreinterpretq_u32_u64): Likewise.
6659 (__arm_vreinterpretq_u32_u8): Likewise.
6660 (__arm_vreinterpretq_u64_s16): Likewise.
6661 (__arm_vreinterpretq_u64_s32): Likewise.
6662 (__arm_vreinterpretq_u64_s64): Likewise.
6663 (__arm_vreinterpretq_u64_s8): Likewise.
6664 (__arm_vreinterpretq_u64_u16): Likewise.
6665 (__arm_vreinterpretq_u64_u32): Likewise.
6666 (__arm_vreinterpretq_u64_u8): Likewise.
6667 (__arm_vreinterpretq_u8_s16): Likewise.
6668 (__arm_vreinterpretq_u8_s32): Likewise.
6669 (__arm_vreinterpretq_u8_s64): Likewise.
6670 (__arm_vreinterpretq_u8_s8): Likewise.
6671 (__arm_vreinterpretq_u8_u16): Likewise.
6672 (__arm_vreinterpretq_u8_u32): Likewise.
6673 (__arm_vreinterpretq_u8_u64): Likewise.
6674 (__arm_vuninitializedq_f16): Likewise.
6675 (__arm_vuninitializedq_f32): Likewise.
6676 (__arm_vreinterpretq_s32_f16): Likewise.
6677 (__arm_vreinterpretq_s32_f32): Likewise.
6678 (__arm_vreinterpretq_s16_f16): Likewise.
6679 (__arm_vreinterpretq_s16_f32): Likewise.
6680 (__arm_vreinterpretq_s64_f16): Likewise.
6681 (__arm_vreinterpretq_s64_f32): Likewise.
6682 (__arm_vreinterpretq_s8_f16): Likewise.
6683 (__arm_vreinterpretq_s8_f32): Likewise.
6684 (__arm_vreinterpretq_u16_f16): Likewise.
6685 (__arm_vreinterpretq_u16_f32): Likewise.
6686 (__arm_vreinterpretq_u32_f16): Likewise.
6687 (__arm_vreinterpretq_u32_f32): Likewise.
6688 (__arm_vreinterpretq_u64_f16): Likewise.
6689 (__arm_vreinterpretq_u64_f32): Likewise.
6690 (__arm_vreinterpretq_u8_f16): Likewise.
6691 (__arm_vreinterpretq_u8_f32): Likewise.
6692 (__arm_vreinterpretq_f16_f32): Likewise.
6693 (__arm_vreinterpretq_f16_s16): Likewise.
6694 (__arm_vreinterpretq_f16_s32): Likewise.
6695 (__arm_vreinterpretq_f16_s64): Likewise.
6696 (__arm_vreinterpretq_f16_s8): Likewise.
6697 (__arm_vreinterpretq_f16_u16): Likewise.
6698 (__arm_vreinterpretq_f16_u32): Likewise.
6699 (__arm_vreinterpretq_f16_u64): Likewise.
6700 (__arm_vreinterpretq_f16_u8): Likewise.
6701 (__arm_vreinterpretq_f32_f16): Likewise.
6702 (__arm_vreinterpretq_f32_s16): Likewise.
6703 (__arm_vreinterpretq_f32_s32): Likewise.
6704 (__arm_vreinterpretq_f32_s64): Likewise.
6705 (__arm_vreinterpretq_f32_s8): Likewise.
6706 (__arm_vreinterpretq_f32_u16): Likewise.
6707 (__arm_vreinterpretq_f32_u32): Likewise.
6708 (__arm_vreinterpretq_f32_u64): Likewise.
6709 (__arm_vreinterpretq_f32_u8): Likewise.
6710 (vuninitializedq): Define polymorphic variant.
6711 (vreinterpretq_f16): Likewise.
6712 (vreinterpretq_f32): Likewise.
6713 (vreinterpretq_s16): Likewise.
6714 (vreinterpretq_s32): Likewise.
6715 (vreinterpretq_s64): Likewise.
6716 (vreinterpretq_s8): Likewise.
6717 (vreinterpretq_u16): Likewise.
6718 (vreinterpretq_u32): Likewise.
6719 (vreinterpretq_u64): Likewise.
6720 (vreinterpretq_u8): Likewise.
6722 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6723 Andre Vieira <andre.simoesdiasvieira@arm.com>
6724 Mihail Ionescu <mihail.ionescu@arm.com>
6726 * config/arm/arm_mve.h (vaddq_s8): Define macro.
6727 (vaddq_s16): Likewise.
6728 (vaddq_s32): Likewise.
6729 (vaddq_u8): Likewise.
6730 (vaddq_u16): Likewise.
6731 (vaddq_u32): Likewise.
6732 (vaddq_f16): Likewise.
6733 (vaddq_f32): Likewise.
6734 (__arm_vaddq_s8): Define intrinsic.
6735 (__arm_vaddq_s16): Likewise.
6736 (__arm_vaddq_s32): Likewise.
6737 (__arm_vaddq_u8): Likewise.
6738 (__arm_vaddq_u16): Likewise.
6739 (__arm_vaddq_u32): Likewise.
6740 (__arm_vaddq_f16): Likewise.
6741 (__arm_vaddq_f32): Likewise.
6742 (vaddq): Define polymorphic variant.
6743 * config/arm/iterators.md (VNIM): Define mode iterator for common types
6744 Neon, IWMMXT and MVE.
6745 (VNINOTM): Likewise.
6746 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
6747 (mve_vaddq_f<mode>): Define RTL pattern.
6748 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
6749 (addv8hf3_neon): Define RTL pattern.
6750 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
6752 (addv8hf3): Define standard RTL pattern for MVE and Neon.
6753 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
6755 2020-03-20 Martin Liska <mliska@suse.cz>
6758 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
6759 build_ref_for_offset function was used and it transforms off to bytes
6762 2020-03-20 Richard Biener <rguenther@suse.de>
6764 PR tree-optimization/94266
6765 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
6766 type of the underlying object to adjust for the containing
6769 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6771 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
6772 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
6773 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
6775 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6777 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
6779 2020-03-20 Jakub Jelinek <jakub@redhat.com>
6781 PR tree-optimization/94224
6782 * gimple-ssa-store-merging.c
6783 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
6784 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
6787 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6789 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
6791 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6794 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
6795 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
6797 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6800 * cgraphunit.c (process_function_and_variable_attributes): warn
6801 for flatten attribute on alias.
6802 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
6804 2020-03-19 Martin Liska <mliska@suse.cz>
6806 * lto-section-in.c: Add ext_symtab.
6807 * lto-streamer-out.c (write_symbol_extension_info): New.
6808 (produce_symtab_extension): New.
6809 (produce_asm_for_decls): Stream also produce_symtab_extension.
6810 * lto-streamer.h (enum lto_section_type): New section.
6812 2020-03-19 Jakub Jelinek <jakub@redhat.com>
6814 PR tree-optimization/94211
6815 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
6816 instead of estimate_num_insns for bb_seq (middle_bb). Rename
6817 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
6820 2020-03-19 Richard Biener <rguenther@suse.de>
6823 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
6824 and build_ref_for_offset.
6826 2020-03-19 Richard Biener <rguenther@suse.de>
6829 * fold-const.c (fold_binary_loc): Avoid using
6830 build_fold_addr_expr when we really want an ADDR_EXPR.
6832 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
6834 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
6837 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
6839 PR rtl-optimization/90275
6840 * cse.c (cse_insn): Delete no-op register moves too.
6842 2020-03-18 Martin Sebor <msebor@redhat.com>
6845 * cgraphunit.c (process_function_and_variable_attributes): Also
6846 complain about weakref function definitions and drop all effects
6849 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6850 Mihail Ionescu <mihail.ionescu@arm.com>
6851 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6853 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
6854 (vstrdq_scatter_base_p_u64): Likewise.
6855 (vstrdq_scatter_base_s64): Likewise.
6856 (vstrdq_scatter_base_u64): Likewise.
6857 (vstrdq_scatter_offset_p_s64): Likewise.
6858 (vstrdq_scatter_offset_p_u64): Likewise.
6859 (vstrdq_scatter_offset_s64): Likewise.
6860 (vstrdq_scatter_offset_u64): Likewise.
6861 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
6862 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
6863 (vstrdq_scatter_shifted_offset_s64): Likewise.
6864 (vstrdq_scatter_shifted_offset_u64): Likewise.
6865 (vstrhq_scatter_offset_f16): Likewise.
6866 (vstrhq_scatter_offset_p_f16): Likewise.
6867 (vstrhq_scatter_shifted_offset_f16): Likewise.
6868 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
6869 (vstrwq_scatter_base_f32): Likewise.
6870 (vstrwq_scatter_base_p_f32): Likewise.
6871 (vstrwq_scatter_offset_f32): Likewise.
6872 (vstrwq_scatter_offset_p_f32): Likewise.
6873 (vstrwq_scatter_offset_p_s32): Likewise.
6874 (vstrwq_scatter_offset_p_u32): Likewise.
6875 (vstrwq_scatter_offset_s32): Likewise.
6876 (vstrwq_scatter_offset_u32): Likewise.
6877 (vstrwq_scatter_shifted_offset_f32): Likewise.
6878 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
6879 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
6880 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
6881 (vstrwq_scatter_shifted_offset_s32): Likewise.
6882 (vstrwq_scatter_shifted_offset_u32): Likewise.
6883 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
6884 (__arm_vstrdq_scatter_base_p_u64): Likewise.
6885 (__arm_vstrdq_scatter_base_s64): Likewise.
6886 (__arm_vstrdq_scatter_base_u64): Likewise.
6887 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
6888 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
6889 (__arm_vstrdq_scatter_offset_s64): Likewise.
6890 (__arm_vstrdq_scatter_offset_u64): Likewise.
6891 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
6892 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
6893 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
6894 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
6895 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
6896 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
6897 (__arm_vstrwq_scatter_offset_s32): Likewise.
6898 (__arm_vstrwq_scatter_offset_u32): Likewise.
6899 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
6900 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
6901 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
6902 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
6903 (__arm_vstrhq_scatter_offset_f16): Likewise.
6904 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
6905 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
6906 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
6907 (__arm_vstrwq_scatter_base_f32): Likewise.
6908 (__arm_vstrwq_scatter_base_p_f32): Likewise.
6909 (__arm_vstrwq_scatter_offset_f32): Likewise.
6910 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
6911 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
6912 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
6913 (vstrhq_scatter_offset): Define polymorphic variant.
6914 (vstrhq_scatter_offset_p): Likewise.
6915 (vstrhq_scatter_shifted_offset): Likewise.
6916 (vstrhq_scatter_shifted_offset_p): Likewise.
6917 (vstrwq_scatter_base): Likewise.
6918 (vstrwq_scatter_base_p): Likewise.
6919 (vstrwq_scatter_offset): Likewise.
6920 (vstrwq_scatter_offset_p): Likewise.
6921 (vstrwq_scatter_shifted_offset): Likewise.
6922 (vstrwq_scatter_shifted_offset_p): Likewise.
6923 (vstrdq_scatter_base_p): Likewise.
6924 (vstrdq_scatter_base): Likewise.
6925 (vstrdq_scatter_offset_p): Likewise.
6926 (vstrdq_scatter_offset): Likewise.
6927 (vstrdq_scatter_shifted_offset_p): Likewise.
6928 (vstrdq_scatter_shifted_offset): Likewise.
6929 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
6930 (STRSBS_P): Likewise.
6932 (STRSBU_P): Likewise.
6934 (STRSS_P): Likewise.
6936 (STRSU_P): Likewise.
6937 * config/arm/constraints.md (Ri): Define.
6938 * config/arm/mve.md (VSTRDSBQ): Define iterator.
6939 (VSTRDSOQ): Likewise.
6940 (VSTRDSSOQ): Likewise.
6941 (VSTRWSOQ): Likewise.
6942 (VSTRWSSOQ): Likewise.
6943 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
6944 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
6945 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6946 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6947 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6948 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6949 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6950 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6951 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6952 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6953 (mve_vstrwq_scatter_base_fv4sf): Likewise.
6954 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
6955 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6956 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6957 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6958 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6959 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6960 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6961 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6962 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6963 * config/arm/predicates.md (Ri): Define predicate to check immediate
6964 is the range +/-1016 and multiple of 8.
6966 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6967 Mihail Ionescu <mihail.ionescu@arm.com>
6968 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6970 * config/arm/arm_mve.h (vst1q_f32): Define macro.
6971 (vst1q_f16): Likewise.
6972 (vst1q_s8): Likewise.
6973 (vst1q_s32): Likewise.
6974 (vst1q_s16): Likewise.
6975 (vst1q_u8): Likewise.
6976 (vst1q_u32): Likewise.
6977 (vst1q_u16): Likewise.
6978 (vstrhq_f16): Likewise.
6979 (vstrhq_scatter_offset_s32): Likewise.
6980 (vstrhq_scatter_offset_s16): Likewise.
6981 (vstrhq_scatter_offset_u32): Likewise.
6982 (vstrhq_scatter_offset_u16): Likewise.
6983 (vstrhq_scatter_offset_p_s32): Likewise.
6984 (vstrhq_scatter_offset_p_s16): Likewise.
6985 (vstrhq_scatter_offset_p_u32): Likewise.
6986 (vstrhq_scatter_offset_p_u16): Likewise.
6987 (vstrhq_scatter_shifted_offset_s32): Likewise.
6988 (vstrhq_scatter_shifted_offset_s16): Likewise.
6989 (vstrhq_scatter_shifted_offset_u32): Likewise.
6990 (vstrhq_scatter_shifted_offset_u16): Likewise.
6991 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
6992 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
6993 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
6994 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
6995 (vstrhq_s32): Likewise.
6996 (vstrhq_s16): Likewise.
6997 (vstrhq_u32): Likewise.
6998 (vstrhq_u16): Likewise.
6999 (vstrhq_p_f16): Likewise.
7000 (vstrhq_p_s32): Likewise.
7001 (vstrhq_p_s16): Likewise.
7002 (vstrhq_p_u32): Likewise.
7003 (vstrhq_p_u16): Likewise.
7004 (vstrwq_f32): Likewise.
7005 (vstrwq_s32): Likewise.
7006 (vstrwq_u32): Likewise.
7007 (vstrwq_p_f32): Likewise.
7008 (vstrwq_p_s32): Likewise.
7009 (vstrwq_p_u32): Likewise.
7010 (__arm_vst1q_s8): Define intrinsic.
7011 (__arm_vst1q_s32): Likewise.
7012 (__arm_vst1q_s16): Likewise.
7013 (__arm_vst1q_u8): Likewise.
7014 (__arm_vst1q_u32): Likewise.
7015 (__arm_vst1q_u16): Likewise.
7016 (__arm_vstrhq_scatter_offset_s32): Likewise.
7017 (__arm_vstrhq_scatter_offset_s16): Likewise.
7018 (__arm_vstrhq_scatter_offset_u32): Likewise.
7019 (__arm_vstrhq_scatter_offset_u16): Likewise.
7020 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
7021 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
7022 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
7023 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
7024 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
7025 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
7026 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
7027 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
7028 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
7029 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
7030 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
7031 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
7032 (__arm_vstrhq_s32): Likewise.
7033 (__arm_vstrhq_s16): Likewise.
7034 (__arm_vstrhq_u32): Likewise.
7035 (__arm_vstrhq_u16): Likewise.
7036 (__arm_vstrhq_p_s32): Likewise.
7037 (__arm_vstrhq_p_s16): Likewise.
7038 (__arm_vstrhq_p_u32): Likewise.
7039 (__arm_vstrhq_p_u16): Likewise.
7040 (__arm_vstrwq_s32): Likewise.
7041 (__arm_vstrwq_u32): Likewise.
7042 (__arm_vstrwq_p_s32): Likewise.
7043 (__arm_vstrwq_p_u32): Likewise.
7044 (__arm_vstrwq_p_f32): Likewise.
7045 (__arm_vstrwq_f32): Likewise.
7046 (__arm_vst1q_f32): Likewise.
7047 (__arm_vst1q_f16): Likewise.
7048 (__arm_vstrhq_f16): Likewise.
7049 (__arm_vstrhq_p_f16): Likewise.
7050 (vst1q): Define polymorphic variant.
7052 (vstrhq_p): Likewise.
7053 (vstrhq_scatter_offset_p): Likewise.
7054 (vstrhq_scatter_offset): Likewise.
7055 (vstrhq_scatter_shifted_offset_p): Likewise.
7056 (vstrhq_scatter_shifted_offset): Likewise.
7057 (vstrwq_p): Likewise.
7059 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
7062 (STRSS_P): Likewise.
7064 (STRSU_P): Likewise.
7067 * config/arm/mve.md (VST1Q): Define iterator.
7068 (VSTRHSOQ): Likewise.
7069 (VSTRHSSOQ): Likewise.
7072 (mve_vstrhq_fv8hf): Define RTL pattern.
7073 (mve_vstrhq_p_fv8hf): Likewise.
7074 (mve_vstrhq_p_<supf><mode>): Likewise.
7075 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
7076 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
7077 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
7078 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
7079 (mve_vstrhq_<supf><mode>): Likewise.
7080 (mve_vstrwq_fv4sf): Likewise.
7081 (mve_vstrwq_p_fv4sf): Likewise.
7082 (mve_vstrwq_p_<supf>v4si): Likewise.
7083 (mve_vstrwq_<supf>v4si): Likewise.
7084 (mve_vst1q_f<mode>): Define expand.
7085 (mve_vst1q_<supf><mode>): Likewise.
7087 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7088 Mihail Ionescu <mihail.ionescu@arm.com>
7089 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7091 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7092 (vld1q_s32): Likewise.
7093 (vld1q_s16): Likewise.
7094 (vld1q_u8): Likewise.
7095 (vld1q_u32): Likewise.
7096 (vld1q_u16): Likewise.
7097 (vldrhq_gather_offset_s32): Likewise.
7098 (vldrhq_gather_offset_s16): Likewise.
7099 (vldrhq_gather_offset_u32): Likewise.
7100 (vldrhq_gather_offset_u16): Likewise.
7101 (vldrhq_gather_offset_z_s32): Likewise.
7102 (vldrhq_gather_offset_z_s16): Likewise.
7103 (vldrhq_gather_offset_z_u32): Likewise.
7104 (vldrhq_gather_offset_z_u16): Likewise.
7105 (vldrhq_gather_shifted_offset_s32): Likewise.
7106 (vldrhq_gather_shifted_offset_s16): Likewise.
7107 (vldrhq_gather_shifted_offset_u32): Likewise.
7108 (vldrhq_gather_shifted_offset_u16): Likewise.
7109 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7110 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7111 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7112 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7113 (vldrhq_s32): Likewise.
7114 (vldrhq_s16): Likewise.
7115 (vldrhq_u32): Likewise.
7116 (vldrhq_u16): Likewise.
7117 (vldrhq_z_s32): Likewise.
7118 (vldrhq_z_s16): Likewise.
7119 (vldrhq_z_u32): Likewise.
7120 (vldrhq_z_u16): Likewise.
7121 (vldrwq_s32): Likewise.
7122 (vldrwq_u32): Likewise.
7123 (vldrwq_z_s32): Likewise.
7124 (vldrwq_z_u32): Likewise.
7125 (vld1q_f32): Likewise.
7126 (vld1q_f16): Likewise.
7127 (vldrhq_f16): Likewise.
7128 (vldrhq_z_f16): Likewise.
7129 (vldrwq_f32): Likewise.
7130 (vldrwq_z_f32): Likewise.
7131 (__arm_vld1q_s8): Define intrinsic.
7132 (__arm_vld1q_s32): Likewise.
7133 (__arm_vld1q_s16): Likewise.
7134 (__arm_vld1q_u8): Likewise.
7135 (__arm_vld1q_u32): Likewise.
7136 (__arm_vld1q_u16): Likewise.
7137 (__arm_vldrhq_gather_offset_s32): Likewise.
7138 (__arm_vldrhq_gather_offset_s16): Likewise.
7139 (__arm_vldrhq_gather_offset_u32): Likewise.
7140 (__arm_vldrhq_gather_offset_u16): Likewise.
7141 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7142 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7143 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7144 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7145 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7146 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7147 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7148 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7149 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7150 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7151 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7152 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7153 (__arm_vldrhq_s32): Likewise.
7154 (__arm_vldrhq_s16): Likewise.
7155 (__arm_vldrhq_u32): Likewise.
7156 (__arm_vldrhq_u16): Likewise.
7157 (__arm_vldrhq_z_s32): Likewise.
7158 (__arm_vldrhq_z_s16): Likewise.
7159 (__arm_vldrhq_z_u32): Likewise.
7160 (__arm_vldrhq_z_u16): Likewise.
7161 (__arm_vldrwq_s32): Likewise.
7162 (__arm_vldrwq_u32): Likewise.
7163 (__arm_vldrwq_z_s32): Likewise.
7164 (__arm_vldrwq_z_u32): Likewise.
7165 (__arm_vld1q_f32): Likewise.
7166 (__arm_vld1q_f16): Likewise.
7167 (__arm_vldrwq_f32): Likewise.
7168 (__arm_vldrwq_z_f32): Likewise.
7169 (__arm_vldrhq_z_f16): Likewise.
7170 (__arm_vldrhq_f16): Likewise.
7171 (vld1q): Define polymorphic variant.
7172 (vldrhq_gather_offset): Likewise.
7173 (vldrhq_gather_offset_z): Likewise.
7174 (vldrhq_gather_shifted_offset): Likewise.
7175 (vldrhq_gather_shifted_offset_z): Likewise.
7176 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7180 (LDRGU_Z): Likewise.
7182 (LDRGS_Z): Likewise.
7184 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7185 (V_sz_elem1): Likewise.
7186 (VLD1Q): Define iterator.
7187 (VLDRHGOQ): Likewise.
7188 (VLDRHGSOQ): Likewise.
7191 (mve_vldrhq_fv8hf): Define RTL pattern.
7192 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7193 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7194 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7195 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7196 (mve_vldrhq_<supf><mode>): Likewise.
7197 (mve_vldrhq_z_fv8hf): Likewise.
7198 (mve_vldrhq_z_<supf><mode>): Likewise.
7199 (mve_vldrwq_fv4sf): Likewise.
7200 (mve_vldrwq_<supf>v4si): Likewise.
7201 (mve_vldrwq_z_fv4sf): Likewise.
7202 (mve_vldrwq_z_<supf>v4si): Likewise.
7203 (mve_vld1q_f<mode>): Define RTL expand pattern.
7204 (mve_vld1q_<supf><mode>): Likewise.
7206 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7207 Mihail Ionescu <mihail.ionescu@arm.com>
7208 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7210 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7211 (vld1q_s32): Likewise.
7212 (vld1q_s16): Likewise.
7213 (vld1q_u8): Likewise.
7214 (vld1q_u32): Likewise.
7215 (vld1q_u16): Likewise.
7216 (vldrhq_gather_offset_s32): Likewise.
7217 (vldrhq_gather_offset_s16): Likewise.
7218 (vldrhq_gather_offset_u32): Likewise.
7219 (vldrhq_gather_offset_u16): Likewise.
7220 (vldrhq_gather_offset_z_s32): Likewise.
7221 (vldrhq_gather_offset_z_s16): Likewise.
7222 (vldrhq_gather_offset_z_u32): Likewise.
7223 (vldrhq_gather_offset_z_u16): Likewise.
7224 (vldrhq_gather_shifted_offset_s32): Likewise.
7225 (vldrhq_gather_shifted_offset_s16): Likewise.
7226 (vldrhq_gather_shifted_offset_u32): Likewise.
7227 (vldrhq_gather_shifted_offset_u16): Likewise.
7228 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7229 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7230 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7231 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7232 (vldrhq_s32): Likewise.
7233 (vldrhq_s16): Likewise.
7234 (vldrhq_u32): Likewise.
7235 (vldrhq_u16): Likewise.
7236 (vldrhq_z_s32): Likewise.
7237 (vldrhq_z_s16): Likewise.
7238 (vldrhq_z_u32): Likewise.
7239 (vldrhq_z_u16): Likewise.
7240 (vldrwq_s32): Likewise.
7241 (vldrwq_u32): Likewise.
7242 (vldrwq_z_s32): Likewise.
7243 (vldrwq_z_u32): Likewise.
7244 (vld1q_f32): Likewise.
7245 (vld1q_f16): Likewise.
7246 (vldrhq_f16): Likewise.
7247 (vldrhq_z_f16): Likewise.
7248 (vldrwq_f32): Likewise.
7249 (vldrwq_z_f32): Likewise.
7250 (__arm_vld1q_s8): Define intrinsic.
7251 (__arm_vld1q_s32): Likewise.
7252 (__arm_vld1q_s16): Likewise.
7253 (__arm_vld1q_u8): Likewise.
7254 (__arm_vld1q_u32): Likewise.
7255 (__arm_vld1q_u16): Likewise.
7256 (__arm_vldrhq_gather_offset_s32): Likewise.
7257 (__arm_vldrhq_gather_offset_s16): Likewise.
7258 (__arm_vldrhq_gather_offset_u32): Likewise.
7259 (__arm_vldrhq_gather_offset_u16): Likewise.
7260 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7261 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7262 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7263 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7264 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7265 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7266 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7267 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7268 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7269 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7270 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7271 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7272 (__arm_vldrhq_s32): Likewise.
7273 (__arm_vldrhq_s16): Likewise.
7274 (__arm_vldrhq_u32): Likewise.
7275 (__arm_vldrhq_u16): Likewise.
7276 (__arm_vldrhq_z_s32): Likewise.
7277 (__arm_vldrhq_z_s16): Likewise.
7278 (__arm_vldrhq_z_u32): Likewise.
7279 (__arm_vldrhq_z_u16): Likewise.
7280 (__arm_vldrwq_s32): Likewise.
7281 (__arm_vldrwq_u32): Likewise.
7282 (__arm_vldrwq_z_s32): Likewise.
7283 (__arm_vldrwq_z_u32): Likewise.
7284 (__arm_vld1q_f32): Likewise.
7285 (__arm_vld1q_f16): Likewise.
7286 (__arm_vldrwq_f32): Likewise.
7287 (__arm_vldrwq_z_f32): Likewise.
7288 (__arm_vldrhq_z_f16): Likewise.
7289 (__arm_vldrhq_f16): Likewise.
7290 (vld1q): Define polymorphic variant.
7291 (vldrhq_gather_offset): Likewise.
7292 (vldrhq_gather_offset_z): Likewise.
7293 (vldrhq_gather_shifted_offset): Likewise.
7294 (vldrhq_gather_shifted_offset_z): Likewise.
7295 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7299 (LDRGU_Z): Likewise.
7301 (LDRGS_Z): Likewise.
7303 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7304 (V_sz_elem1): Likewise.
7305 (VLD1Q): Define iterator.
7306 (VLDRHGOQ): Likewise.
7307 (VLDRHGSOQ): Likewise.
7310 (mve_vldrhq_fv8hf): Define RTL pattern.
7311 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7312 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7313 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7314 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7315 (mve_vldrhq_<supf><mode>): Likewise.
7316 (mve_vldrhq_z_fv8hf): Likewise.
7317 (mve_vldrhq_z_<supf><mode>): Likewise.
7318 (mve_vldrwq_fv4sf): Likewise.
7319 (mve_vldrwq_<supf>v4si): Likewise.
7320 (mve_vldrwq_z_fv4sf): Likewise.
7321 (mve_vldrwq_z_<supf>v4si): Likewise.
7322 (mve_vld1q_f<mode>): Define RTL expand pattern.
7323 (mve_vld1q_<supf><mode>): Likewise.
7325 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7326 Mihail Ionescu <mihail.ionescu@arm.com>
7327 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7329 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
7331 (LDRGBU_Z_QUALIFIERS): Likewise.
7332 (LDRGS_Z_QUALIFIERS): Likewise.
7333 (LDRGU_Z_QUALIFIERS): Likewise.
7334 (LDRS_Z_QUALIFIERS): Likewise.
7335 (LDRU_Z_QUALIFIERS): Likewise.
7336 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
7337 (vldrbq_gather_offset_z_u8): Likewise.
7338 (vldrbq_gather_offset_z_s32): Likewise.
7339 (vldrbq_gather_offset_z_u16): Likewise.
7340 (vldrbq_gather_offset_z_u32): Likewise.
7341 (vldrbq_gather_offset_z_s8): Likewise.
7342 (vldrbq_z_s16): Likewise.
7343 (vldrbq_z_u8): Likewise.
7344 (vldrbq_z_s8): Likewise.
7345 (vldrbq_z_s32): Likewise.
7346 (vldrbq_z_u16): Likewise.
7347 (vldrbq_z_u32): Likewise.
7348 (vldrwq_gather_base_z_u32): Likewise.
7349 (vldrwq_gather_base_z_s32): Likewise.
7350 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
7351 (__arm_vldrbq_gather_offset_z_s32): Likewise.
7352 (__arm_vldrbq_gather_offset_z_s16): Likewise.
7353 (__arm_vldrbq_gather_offset_z_u8): Likewise.
7354 (__arm_vldrbq_gather_offset_z_u32): Likewise.
7355 (__arm_vldrbq_gather_offset_z_u16): Likewise.
7356 (__arm_vldrbq_z_s8): Likewise.
7357 (__arm_vldrbq_z_s32): Likewise.
7358 (__arm_vldrbq_z_s16): Likewise.
7359 (__arm_vldrbq_z_u8): Likewise.
7360 (__arm_vldrbq_z_u32): Likewise.
7361 (__arm_vldrbq_z_u16): Likewise.
7362 (__arm_vldrwq_gather_base_z_s32): Likewise.
7363 (__arm_vldrwq_gather_base_z_u32): Likewise.
7364 (vldrbq_gather_offset_z): Define polymorphic variant.
7365 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
7367 (LDRGBU_Z_QUALIFIERS): Likewise.
7368 (LDRGS_Z_QUALIFIERS): Likewise.
7369 (LDRGU_Z_QUALIFIERS): Likewise.
7370 (LDRS_Z_QUALIFIERS): Likewise.
7371 (LDRU_Z_QUALIFIERS): Likewise.
7372 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
7374 (mve_vldrbq_z_<supf><mode>): Likewise.
7375 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
7377 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7378 Mihail Ionescu <mihail.ionescu@arm.com>
7379 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7381 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
7383 (STRU_P_QUALIFIERS): Likewise.
7384 (STRSU_P_QUALIFIERS): Likewise.
7385 (STRSS_P_QUALIFIERS): Likewise.
7386 (STRSBS_P_QUALIFIERS): Likewise.
7387 (STRSBU_P_QUALIFIERS): Likewise.
7388 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
7389 (vstrbq_p_s32): Likewise.
7390 (vstrbq_p_s16): Likewise.
7391 (vstrbq_p_u8): Likewise.
7392 (vstrbq_p_u32): Likewise.
7393 (vstrbq_p_u16): Likewise.
7394 (vstrbq_scatter_offset_p_s8): Likewise.
7395 (vstrbq_scatter_offset_p_s32): Likewise.
7396 (vstrbq_scatter_offset_p_s16): Likewise.
7397 (vstrbq_scatter_offset_p_u8): Likewise.
7398 (vstrbq_scatter_offset_p_u32): Likewise.
7399 (vstrbq_scatter_offset_p_u16): Likewise.
7400 (vstrwq_scatter_base_p_s32): Likewise.
7401 (vstrwq_scatter_base_p_u32): Likewise.
7402 (__arm_vstrbq_p_s8): Define intrinsic.
7403 (__arm_vstrbq_p_s32): Likewise.
7404 (__arm_vstrbq_p_s16): Likewise.
7405 (__arm_vstrbq_p_u8): Likewise.
7406 (__arm_vstrbq_p_u32): Likewise.
7407 (__arm_vstrbq_p_u16): Likewise.
7408 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
7409 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
7410 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
7411 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
7412 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
7413 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
7414 (__arm_vstrwq_scatter_base_p_s32): Likewise.
7415 (__arm_vstrwq_scatter_base_p_u32): Likewise.
7416 (vstrbq_p): Define polymorphic variant.
7417 (vstrbq_scatter_offset_p): Likewise.
7418 (vstrwq_scatter_base_p): Likewise.
7419 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
7421 (STRU_P_QUALIFIERS): Likewise.
7422 (STRSU_P_QUALIFIERS): Likewise.
7423 (STRSS_P_QUALIFIERS): Likewise.
7424 (STRSBS_P_QUALIFIERS): Likewise.
7425 (STRSBU_P_QUALIFIERS): Likewise.
7426 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
7428 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
7429 (mve_vstrbq_p_<supf><mode>): Likewise.
7431 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7432 Mihail Ionescu <mihail.ionescu@arm.com>
7433 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7435 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
7437 (LDRGS_QUALIFIERS): Likewise.
7438 (LDRS_QUALIFIERS): Likewise.
7439 (LDRU_QUALIFIERS): Likewise.
7440 (LDRGBS_QUALIFIERS): Likewise.
7441 (LDRGBU_QUALIFIERS): Likewise.
7442 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
7443 (vldrbq_gather_offset_s8): Likewise.
7444 (vldrbq_s8): Likewise.
7445 (vldrbq_u8): Likewise.
7446 (vldrbq_gather_offset_u16): Likewise.
7447 (vldrbq_gather_offset_s16): Likewise.
7448 (vldrbq_s16): Likewise.
7449 (vldrbq_u16): Likewise.
7450 (vldrbq_gather_offset_u32): Likewise.
7451 (vldrbq_gather_offset_s32): Likewise.
7452 (vldrbq_s32): Likewise.
7453 (vldrbq_u32): Likewise.
7454 (vldrwq_gather_base_s32): Likewise.
7455 (vldrwq_gather_base_u32): Likewise.
7456 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
7457 (__arm_vldrbq_gather_offset_s8): Likewise.
7458 (__arm_vldrbq_s8): Likewise.
7459 (__arm_vldrbq_u8): Likewise.
7460 (__arm_vldrbq_gather_offset_u16): Likewise.
7461 (__arm_vldrbq_gather_offset_s16): Likewise.
7462 (__arm_vldrbq_s16): Likewise.
7463 (__arm_vldrbq_u16): Likewise.
7464 (__arm_vldrbq_gather_offset_u32): Likewise.
7465 (__arm_vldrbq_gather_offset_s32): Likewise.
7466 (__arm_vldrbq_s32): Likewise.
7467 (__arm_vldrbq_u32): Likewise.
7468 (__arm_vldrwq_gather_base_s32): Likewise.
7469 (__arm_vldrwq_gather_base_u32): Likewise.
7470 (vldrbq_gather_offset): Define polymorphic variant.
7471 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
7473 (LDRGS_QUALIFIERS): Likewise.
7474 (LDRS_QUALIFIERS): Likewise.
7475 (LDRU_QUALIFIERS): Likewise.
7476 (LDRGBS_QUALIFIERS): Likewise.
7477 (LDRGBU_QUALIFIERS): Likewise.
7478 * config/arm/mve.md (VLDRBGOQ): Define iterator.
7480 (VLDRWGBQ): Likewise.
7481 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
7482 (mve_vldrbq_<supf><mode>): Likewise.
7483 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
7485 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7486 Mihail Ionescu <mihail.ionescu@arm.com>
7487 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7489 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
7490 (STRU_QUALIFIERS): Likewise.
7491 (STRSS_QUALIFIERS): Likewise.
7492 (STRSU_QUALIFIERS): Likewise.
7493 (STRSBS_QUALIFIERS): Likewise.
7494 (STRSBU_QUALIFIERS): Likewise.
7495 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
7496 (vstrbq_u8): Likewise.
7497 (vstrbq_u16): Likewise.
7498 (vstrbq_scatter_offset_s8): Likewise.
7499 (vstrbq_scatter_offset_u8): Likewise.
7500 (vstrbq_scatter_offset_u16): Likewise.
7501 (vstrbq_s16): Likewise.
7502 (vstrbq_u32): Likewise.
7503 (vstrbq_scatter_offset_s16): Likewise.
7504 (vstrbq_scatter_offset_u32): Likewise.
7505 (vstrbq_s32): Likewise.
7506 (vstrbq_scatter_offset_s32): Likewise.
7507 (vstrwq_scatter_base_s32): Likewise.
7508 (vstrwq_scatter_base_u32): Likewise.
7509 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
7510 (__arm_vstrbq_scatter_offset_s32): Likewise.
7511 (__arm_vstrbq_scatter_offset_s16): Likewise.
7512 (__arm_vstrbq_scatter_offset_u8): Likewise.
7513 (__arm_vstrbq_scatter_offset_u32): Likewise.
7514 (__arm_vstrbq_scatter_offset_u16): Likewise.
7515 (__arm_vstrbq_s8): Likewise.
7516 (__arm_vstrbq_s32): Likewise.
7517 (__arm_vstrbq_s16): Likewise.
7518 (__arm_vstrbq_u8): Likewise.
7519 (__arm_vstrbq_u32): Likewise.
7520 (__arm_vstrbq_u16): Likewise.
7521 (__arm_vstrwq_scatter_base_s32): Likewise.
7522 (__arm_vstrwq_scatter_base_u32): Likewise.
7523 (vstrbq): Define polymorphic variant.
7524 (vstrbq_scatter_offset): Likewise.
7525 (vstrwq_scatter_base): Likewise.
7526 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
7528 (STRU_QUALIFIERS): Likewise.
7529 (STRSS_QUALIFIERS): Likewise.
7530 (STRSU_QUALIFIERS): Likewise.
7531 (STRSBS_QUALIFIERS): Likewise.
7532 (STRSBU_QUALIFIERS): Likewise.
7533 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
7534 (VSTRWSBQ): Define iterators.
7535 (VSTRBSOQ): Likewise.
7537 (mve_vstrbq_<supf><mode>): Define RTL pattern.
7538 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
7539 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
7541 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7542 Mihail Ionescu <mihail.ionescu@arm.com>
7543 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7545 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
7546 (vabdq_m_f16): Likewise.
7547 (vaddq_m_f32): Likewise.
7548 (vaddq_m_f16): Likewise.
7549 (vaddq_m_n_f32): Likewise.
7550 (vaddq_m_n_f16): Likewise.
7551 (vandq_m_f32): Likewise.
7552 (vandq_m_f16): Likewise.
7553 (vbicq_m_f32): Likewise.
7554 (vbicq_m_f16): Likewise.
7555 (vbrsrq_m_n_f32): Likewise.
7556 (vbrsrq_m_n_f16): Likewise.
7557 (vcaddq_rot270_m_f32): Likewise.
7558 (vcaddq_rot270_m_f16): Likewise.
7559 (vcaddq_rot90_m_f32): Likewise.
7560 (vcaddq_rot90_m_f16): Likewise.
7561 (vcmlaq_m_f32): Likewise.
7562 (vcmlaq_m_f16): Likewise.
7563 (vcmlaq_rot180_m_f32): Likewise.
7564 (vcmlaq_rot180_m_f16): Likewise.
7565 (vcmlaq_rot270_m_f32): Likewise.
7566 (vcmlaq_rot270_m_f16): Likewise.
7567 (vcmlaq_rot90_m_f32): Likewise.
7568 (vcmlaq_rot90_m_f16): Likewise.
7569 (vcmulq_m_f32): Likewise.
7570 (vcmulq_m_f16): Likewise.
7571 (vcmulq_rot180_m_f32): Likewise.
7572 (vcmulq_rot180_m_f16): Likewise.
7573 (vcmulq_rot270_m_f32): Likewise.
7574 (vcmulq_rot270_m_f16): Likewise.
7575 (vcmulq_rot90_m_f32): Likewise.
7576 (vcmulq_rot90_m_f16): Likewise.
7577 (vcvtq_m_n_s32_f32): Likewise.
7578 (vcvtq_m_n_s16_f16): Likewise.
7579 (vcvtq_m_n_u32_f32): Likewise.
7580 (vcvtq_m_n_u16_f16): Likewise.
7581 (veorq_m_f32): Likewise.
7582 (veorq_m_f16): Likewise.
7583 (vfmaq_m_f32): Likewise.
7584 (vfmaq_m_f16): Likewise.
7585 (vfmaq_m_n_f32): Likewise.
7586 (vfmaq_m_n_f16): Likewise.
7587 (vfmasq_m_n_f32): Likewise.
7588 (vfmasq_m_n_f16): Likewise.
7589 (vfmsq_m_f32): Likewise.
7590 (vfmsq_m_f16): Likewise.
7591 (vmaxnmq_m_f32): Likewise.
7592 (vmaxnmq_m_f16): Likewise.
7593 (vminnmq_m_f32): Likewise.
7594 (vminnmq_m_f16): Likewise.
7595 (vmulq_m_f32): Likewise.
7596 (vmulq_m_f16): Likewise.
7597 (vmulq_m_n_f32): Likewise.
7598 (vmulq_m_n_f16): Likewise.
7599 (vornq_m_f32): Likewise.
7600 (vornq_m_f16): Likewise.
7601 (vorrq_m_f32): Likewise.
7602 (vorrq_m_f16): Likewise.
7603 (vsubq_m_f32): Likewise.
7604 (vsubq_m_f16): Likewise.
7605 (vsubq_m_n_f32): Likewise.
7606 (vsubq_m_n_f16): Likewise.
7607 (__attribute__): Likewise.
7608 (__arm_vabdq_m_f32): Likewise.
7609 (__arm_vabdq_m_f16): Likewise.
7610 (__arm_vaddq_m_f32): Likewise.
7611 (__arm_vaddq_m_f16): Likewise.
7612 (__arm_vaddq_m_n_f32): Likewise.
7613 (__arm_vaddq_m_n_f16): Likewise.
7614 (__arm_vandq_m_f32): Likewise.
7615 (__arm_vandq_m_f16): Likewise.
7616 (__arm_vbicq_m_f32): Likewise.
7617 (__arm_vbicq_m_f16): Likewise.
7618 (__arm_vbrsrq_m_n_f32): Likewise.
7619 (__arm_vbrsrq_m_n_f16): Likewise.
7620 (__arm_vcaddq_rot270_m_f32): Likewise.
7621 (__arm_vcaddq_rot270_m_f16): Likewise.
7622 (__arm_vcaddq_rot90_m_f32): Likewise.
7623 (__arm_vcaddq_rot90_m_f16): Likewise.
7624 (__arm_vcmlaq_m_f32): Likewise.
7625 (__arm_vcmlaq_m_f16): Likewise.
7626 (__arm_vcmlaq_rot180_m_f32): Likewise.
7627 (__arm_vcmlaq_rot180_m_f16): Likewise.
7628 (__arm_vcmlaq_rot270_m_f32): Likewise.
7629 (__arm_vcmlaq_rot270_m_f16): Likewise.
7630 (__arm_vcmlaq_rot90_m_f32): Likewise.
7631 (__arm_vcmlaq_rot90_m_f16): Likewise.
7632 (__arm_vcmulq_m_f32): Likewise.
7633 (__arm_vcmulq_m_f16): Likewise.
7634 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
7635 (__arm_vcmulq_rot180_m_f16): Likewise.
7636 (__arm_vcmulq_rot270_m_f32): Likewise.
7637 (__arm_vcmulq_rot270_m_f16): Likewise.
7638 (__arm_vcmulq_rot90_m_f32): Likewise.
7639 (__arm_vcmulq_rot90_m_f16): Likewise.
7640 (__arm_vcvtq_m_n_s32_f32): Likewise.
7641 (__arm_vcvtq_m_n_s16_f16): Likewise.
7642 (__arm_vcvtq_m_n_u32_f32): Likewise.
7643 (__arm_vcvtq_m_n_u16_f16): Likewise.
7644 (__arm_veorq_m_f32): Likewise.
7645 (__arm_veorq_m_f16): Likewise.
7646 (__arm_vfmaq_m_f32): Likewise.
7647 (__arm_vfmaq_m_f16): Likewise.
7648 (__arm_vfmaq_m_n_f32): Likewise.
7649 (__arm_vfmaq_m_n_f16): Likewise.
7650 (__arm_vfmasq_m_n_f32): Likewise.
7651 (__arm_vfmasq_m_n_f16): Likewise.
7652 (__arm_vfmsq_m_f32): Likewise.
7653 (__arm_vfmsq_m_f16): Likewise.
7654 (__arm_vmaxnmq_m_f32): Likewise.
7655 (__arm_vmaxnmq_m_f16): Likewise.
7656 (__arm_vminnmq_m_f32): Likewise.
7657 (__arm_vminnmq_m_f16): Likewise.
7658 (__arm_vmulq_m_f32): Likewise.
7659 (__arm_vmulq_m_f16): Likewise.
7660 (__arm_vmulq_m_n_f32): Likewise.
7661 (__arm_vmulq_m_n_f16): Likewise.
7662 (__arm_vornq_m_f32): Likewise.
7663 (__arm_vornq_m_f16): Likewise.
7664 (__arm_vorrq_m_f32): Likewise.
7665 (__arm_vorrq_m_f16): Likewise.
7666 (__arm_vsubq_m_f32): Likewise.
7667 (__arm_vsubq_m_f16): Likewise.
7668 (__arm_vsubq_m_n_f32): Likewise.
7669 (__arm_vsubq_m_n_f16): Likewise.
7670 (vabdq_m): Define polymorphic variant.
7671 (vaddq_m): Likewise.
7672 (vaddq_m_n): Likewise.
7673 (vandq_m): Likewise.
7674 (vbicq_m): Likewise.
7675 (vbrsrq_m_n): Likewise.
7676 (vcaddq_rot270_m): Likewise.
7677 (vcaddq_rot90_m): Likewise.
7678 (vcmlaq_m): Likewise.
7679 (vcmlaq_rot180_m): Likewise.
7680 (vcmlaq_rot270_m): Likewise.
7681 (vcmlaq_rot90_m): Likewise.
7682 (vcmulq_m): Likewise.
7683 (vcmulq_rot180_m): Likewise.
7684 (vcmulq_rot270_m): Likewise.
7685 (vcmulq_rot90_m): Likewise.
7686 (veorq_m): Likewise.
7687 (vfmaq_m): Likewise.
7688 (vfmaq_m_n): Likewise.
7689 (vfmasq_m_n): Likewise.
7690 (vfmsq_m): Likewise.
7691 (vmaxnmq_m): Likewise.
7692 (vminnmq_m): Likewise.
7693 (vmulq_m): Likewise.
7694 (vmulq_m_n): Likewise.
7695 (vornq_m): Likewise.
7696 (vsubq_m): Likewise.
7697 (vsubq_m_n): Likewise.
7698 (vorrq_m): Likewise.
7699 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7701 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7702 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7703 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
7704 (mve_vaddq_m_f<mode>): Likewise.
7705 (mve_vaddq_m_n_f<mode>): Likewise.
7706 (mve_vandq_m_f<mode>): Likewise.
7707 (mve_vbicq_m_f<mode>): Likewise.
7708 (mve_vbrsrq_m_n_f<mode>): Likewise.
7709 (mve_vcaddq_rot270_m_f<mode>): Likewise.
7710 (mve_vcaddq_rot90_m_f<mode>): Likewise.
7711 (mve_vcmlaq_m_f<mode>): Likewise.
7712 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
7713 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
7714 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
7715 (mve_vcmulq_m_f<mode>): Likewise.
7716 (mve_vcmulq_rot180_m_f<mode>): Likewise.
7717 (mve_vcmulq_rot270_m_f<mode>): Likewise.
7718 (mve_vcmulq_rot90_m_f<mode>): Likewise.
7719 (mve_veorq_m_f<mode>): Likewise.
7720 (mve_vfmaq_m_f<mode>): Likewise.
7721 (mve_vfmaq_m_n_f<mode>): Likewise.
7722 (mve_vfmasq_m_n_f<mode>): Likewise.
7723 (mve_vfmsq_m_f<mode>): Likewise.
7724 (mve_vmaxnmq_m_f<mode>): Likewise.
7725 (mve_vminnmq_m_f<mode>): Likewise.
7726 (mve_vmulq_m_f<mode>): Likewise.
7727 (mve_vmulq_m_n_f<mode>): Likewise.
7728 (mve_vornq_m_f<mode>): Likewise.
7729 (mve_vorrq_m_f<mode>): Likewise.
7730 (mve_vsubq_m_f<mode>): Likewise.
7731 (mve_vsubq_m_n_f<mode>): Likewise.
7733 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7734 Mihail Ionescu <mihail.ionescu@arm.com>
7735 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7737 * config/arm/arm-protos.h (arm_mve_immediate_check):
7738 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
7739 mode and interger value.
7740 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
7741 (vmlaldavaq_p_s16): Likewise.
7742 (vmlaldavaq_p_u32): Likewise.
7743 (vmlaldavaq_p_u16): Likewise.
7744 (vmlaldavaxq_p_s32): Likewise.
7745 (vmlaldavaxq_p_s16): Likewise.
7746 (vmlaldavaxq_p_u32): Likewise.
7747 (vmlaldavaxq_p_u16): Likewise.
7748 (vmlsldavaq_p_s32): Likewise.
7749 (vmlsldavaq_p_s16): Likewise.
7750 (vmlsldavaxq_p_s32): Likewise.
7751 (vmlsldavaxq_p_s16): Likewise.
7752 (vmullbq_poly_m_p8): Likewise.
7753 (vmullbq_poly_m_p16): Likewise.
7754 (vmulltq_poly_m_p8): Likewise.
7755 (vmulltq_poly_m_p16): Likewise.
7756 (vqdmullbq_m_n_s32): Likewise.
7757 (vqdmullbq_m_n_s16): Likewise.
7758 (vqdmullbq_m_s32): Likewise.
7759 (vqdmullbq_m_s16): Likewise.
7760 (vqdmulltq_m_n_s32): Likewise.
7761 (vqdmulltq_m_n_s16): Likewise.
7762 (vqdmulltq_m_s32): Likewise.
7763 (vqdmulltq_m_s16): Likewise.
7764 (vqrshrnbq_m_n_s32): Likewise.
7765 (vqrshrnbq_m_n_s16): Likewise.
7766 (vqrshrnbq_m_n_u32): Likewise.
7767 (vqrshrnbq_m_n_u16): Likewise.
7768 (vqrshrntq_m_n_s32): Likewise.
7769 (vqrshrntq_m_n_s16): Likewise.
7770 (vqrshrntq_m_n_u32): Likewise.
7771 (vqrshrntq_m_n_u16): Likewise.
7772 (vqrshrunbq_m_n_s32): Likewise.
7773 (vqrshrunbq_m_n_s16): Likewise.
7774 (vqrshruntq_m_n_s32): Likewise.
7775 (vqrshruntq_m_n_s16): Likewise.
7776 (vqshrnbq_m_n_s32): Likewise.
7777 (vqshrnbq_m_n_s16): Likewise.
7778 (vqshrnbq_m_n_u32): Likewise.
7779 (vqshrnbq_m_n_u16): Likewise.
7780 (vqshrntq_m_n_s32): Likewise.
7781 (vqshrntq_m_n_s16): Likewise.
7782 (vqshrntq_m_n_u32): Likewise.
7783 (vqshrntq_m_n_u16): Likewise.
7784 (vqshrunbq_m_n_s32): Likewise.
7785 (vqshrunbq_m_n_s16): Likewise.
7786 (vqshruntq_m_n_s32): Likewise.
7787 (vqshruntq_m_n_s16): Likewise.
7788 (vrmlaldavhaq_p_s32): Likewise.
7789 (vrmlaldavhaq_p_u32): Likewise.
7790 (vrmlaldavhaxq_p_s32): Likewise.
7791 (vrmlsldavhaq_p_s32): Likewise.
7792 (vrmlsldavhaxq_p_s32): Likewise.
7793 (vrshrnbq_m_n_s32): Likewise.
7794 (vrshrnbq_m_n_s16): Likewise.
7795 (vrshrnbq_m_n_u32): Likewise.
7796 (vrshrnbq_m_n_u16): Likewise.
7797 (vrshrntq_m_n_s32): Likewise.
7798 (vrshrntq_m_n_s16): Likewise.
7799 (vrshrntq_m_n_u32): Likewise.
7800 (vrshrntq_m_n_u16): Likewise.
7801 (vshllbq_m_n_s8): Likewise.
7802 (vshllbq_m_n_s16): Likewise.
7803 (vshllbq_m_n_u8): Likewise.
7804 (vshllbq_m_n_u16): Likewise.
7805 (vshlltq_m_n_s8): Likewise.
7806 (vshlltq_m_n_s16): Likewise.
7807 (vshlltq_m_n_u8): Likewise.
7808 (vshlltq_m_n_u16): Likewise.
7809 (vshrnbq_m_n_s32): Likewise.
7810 (vshrnbq_m_n_s16): Likewise.
7811 (vshrnbq_m_n_u32): Likewise.
7812 (vshrnbq_m_n_u16): Likewise.
7813 (vshrntq_m_n_s32): Likewise.
7814 (vshrntq_m_n_s16): Likewise.
7815 (vshrntq_m_n_u32): Likewise.
7816 (vshrntq_m_n_u16): Likewise.
7817 (__arm_vmlaldavaq_p_s32): Define intrinsic.
7818 (__arm_vmlaldavaq_p_s16): Likewise.
7819 (__arm_vmlaldavaq_p_u32): Likewise.
7820 (__arm_vmlaldavaq_p_u16): Likewise.
7821 (__arm_vmlaldavaxq_p_s32): Likewise.
7822 (__arm_vmlaldavaxq_p_s16): Likewise.
7823 (__arm_vmlaldavaxq_p_u32): Likewise.
7824 (__arm_vmlaldavaxq_p_u16): Likewise.
7825 (__arm_vmlsldavaq_p_s32): Likewise.
7826 (__arm_vmlsldavaq_p_s16): Likewise.
7827 (__arm_vmlsldavaxq_p_s32): Likewise.
7828 (__arm_vmlsldavaxq_p_s16): Likewise.
7829 (__arm_vmullbq_poly_m_p8): Likewise.
7830 (__arm_vmullbq_poly_m_p16): Likewise.
7831 (__arm_vmulltq_poly_m_p8): Likewise.
7832 (__arm_vmulltq_poly_m_p16): Likewise.
7833 (__arm_vqdmullbq_m_n_s32): Likewise.
7834 (__arm_vqdmullbq_m_n_s16): Likewise.
7835 (__arm_vqdmullbq_m_s32): Likewise.
7836 (__arm_vqdmullbq_m_s16): Likewise.
7837 (__arm_vqdmulltq_m_n_s32): Likewise.
7838 (__arm_vqdmulltq_m_n_s16): Likewise.
7839 (__arm_vqdmulltq_m_s32): Likewise.
7840 (__arm_vqdmulltq_m_s16): Likewise.
7841 (__arm_vqrshrnbq_m_n_s32): Likewise.
7842 (__arm_vqrshrnbq_m_n_s16): Likewise.
7843 (__arm_vqrshrnbq_m_n_u32): Likewise.
7844 (__arm_vqrshrnbq_m_n_u16): Likewise.
7845 (__arm_vqrshrntq_m_n_s32): Likewise.
7846 (__arm_vqrshrntq_m_n_s16): Likewise.
7847 (__arm_vqrshrntq_m_n_u32): Likewise.
7848 (__arm_vqrshrntq_m_n_u16): Likewise.
7849 (__arm_vqrshrunbq_m_n_s32): Likewise.
7850 (__arm_vqrshrunbq_m_n_s16): Likewise.
7851 (__arm_vqrshruntq_m_n_s32): Likewise.
7852 (__arm_vqrshruntq_m_n_s16): Likewise.
7853 (__arm_vqshrnbq_m_n_s32): Likewise.
7854 (__arm_vqshrnbq_m_n_s16): Likewise.
7855 (__arm_vqshrnbq_m_n_u32): Likewise.
7856 (__arm_vqshrnbq_m_n_u16): Likewise.
7857 (__arm_vqshrntq_m_n_s32): Likewise.
7858 (__arm_vqshrntq_m_n_s16): Likewise.
7859 (__arm_vqshrntq_m_n_u32): Likewise.
7860 (__arm_vqshrntq_m_n_u16): Likewise.
7861 (__arm_vqshrunbq_m_n_s32): Likewise.
7862 (__arm_vqshrunbq_m_n_s16): Likewise.
7863 (__arm_vqshruntq_m_n_s32): Likewise.
7864 (__arm_vqshruntq_m_n_s16): Likewise.
7865 (__arm_vrmlaldavhaq_p_s32): Likewise.
7866 (__arm_vrmlaldavhaq_p_u32): Likewise.
7867 (__arm_vrmlaldavhaxq_p_s32): Likewise.
7868 (__arm_vrmlsldavhaq_p_s32): Likewise.
7869 (__arm_vrmlsldavhaxq_p_s32): Likewise.
7870 (__arm_vrshrnbq_m_n_s32): Likewise.
7871 (__arm_vrshrnbq_m_n_s16): Likewise.
7872 (__arm_vrshrnbq_m_n_u32): Likewise.
7873 (__arm_vrshrnbq_m_n_u16): Likewise.
7874 (__arm_vrshrntq_m_n_s32): Likewise.
7875 (__arm_vrshrntq_m_n_s16): Likewise.
7876 (__arm_vrshrntq_m_n_u32): Likewise.
7877 (__arm_vrshrntq_m_n_u16): Likewise.
7878 (__arm_vshllbq_m_n_s8): Likewise.
7879 (__arm_vshllbq_m_n_s16): Likewise.
7880 (__arm_vshllbq_m_n_u8): Likewise.
7881 (__arm_vshllbq_m_n_u16): Likewise.
7882 (__arm_vshlltq_m_n_s8): Likewise.
7883 (__arm_vshlltq_m_n_s16): Likewise.
7884 (__arm_vshlltq_m_n_u8): Likewise.
7885 (__arm_vshlltq_m_n_u16): Likewise.
7886 (__arm_vshrnbq_m_n_s32): Likewise.
7887 (__arm_vshrnbq_m_n_s16): Likewise.
7888 (__arm_vshrnbq_m_n_u32): Likewise.
7889 (__arm_vshrnbq_m_n_u16): Likewise.
7890 (__arm_vshrntq_m_n_s32): Likewise.
7891 (__arm_vshrntq_m_n_s16): Likewise.
7892 (__arm_vshrntq_m_n_u32): Likewise.
7893 (__arm_vshrntq_m_n_u16): Likewise.
7894 (vmullbq_poly_m): Define polymorphic variant.
7895 (vmulltq_poly_m): Likewise.
7896 (vshllbq_m): Likewise.
7897 (vshrntq_m_n): Likewise.
7898 (vshrnbq_m_n): Likewise.
7899 (vshlltq_m_n): Likewise.
7900 (vshllbq_m_n): Likewise.
7901 (vrshrntq_m_n): Likewise.
7902 (vrshrnbq_m_n): Likewise.
7903 (vqshruntq_m_n): Likewise.
7904 (vqshrunbq_m_n): Likewise.
7905 (vqdmullbq_m_n): Likewise.
7906 (vqdmullbq_m): Likewise.
7907 (vqdmulltq_m_n): Likewise.
7908 (vqdmulltq_m): Likewise.
7909 (vqrshrnbq_m_n): Likewise.
7910 (vqrshrntq_m_n): Likewise.
7911 (vqrshrunbq_m_n): Likewise.
7912 (vqrshruntq_m_n): Likewise.
7913 (vqshrnbq_m_n): Likewise.
7914 (vqshrntq_m_n): Likewise.
7915 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7917 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7918 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7919 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
7920 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7921 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
7922 (VMLALDAVAXQ_P): Likewise.
7923 (VQRSHRNBQ_M_N): Likewise.
7924 (VQRSHRNTQ_M_N): Likewise.
7925 (VQSHRNBQ_M_N): Likewise.
7926 (VQSHRNTQ_M_N): Likewise.
7927 (VRSHRNBQ_M_N): Likewise.
7928 (VRSHRNTQ_M_N): Likewise.
7929 (VSHLLBQ_M_N): Likewise.
7930 (VSHLLTQ_M_N): Likewise.
7931 (VSHRNBQ_M_N): Likewise.
7932 (VSHRNTQ_M_N): Likewise.
7933 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
7934 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
7935 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
7936 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
7937 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
7938 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
7939 (mve_vrmlaldavhaq_p_sv4si): Likewise.
7940 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
7941 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
7942 (mve_vshllbq_m_n_<supf><mode>): Likewise.
7943 (mve_vshlltq_m_n_<supf><mode>): Likewise.
7944 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
7945 (mve_vshrntq_m_n_<supf><mode>): Likewise.
7946 (mve_vmlsldavaq_p_s<mode>): Likewise.
7947 (mve_vmlsldavaxq_p_s<mode>): Likewise.
7948 (mve_vmullbq_poly_m_p<mode>): Likewise.
7949 (mve_vmulltq_poly_m_p<mode>): Likewise.
7950 (mve_vqdmullbq_m_n_s<mode>): Likewise.
7951 (mve_vqdmullbq_m_s<mode>): Likewise.
7952 (mve_vqdmulltq_m_n_s<mode>): Likewise.
7953 (mve_vqdmulltq_m_s<mode>): Likewise.
7954 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
7955 (mve_vqrshruntq_m_n_s<mode>): Likewise.
7956 (mve_vqshrunbq_m_n_s<mode>): Likewise.
7957 (mve_vqshruntq_m_n_s<mode>): Likewise.
7958 (mve_vrmlaldavhaq_p_uv4si): Likewise.
7959 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
7960 (mve_vrmlsldavhaq_p_sv4si): Likewise.
7961 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
7963 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7964 Mihail Ionescu <mihail.ionescu@arm.com>
7965 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7967 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
7968 (vabdq_m_s32): Likewise.
7969 (vabdq_m_s16): Likewise.
7970 (vabdq_m_u8): Likewise.
7971 (vabdq_m_u32): Likewise.
7972 (vabdq_m_u16): Likewise.
7973 (vaddq_m_n_s8): Likewise.
7974 (vaddq_m_n_s32): Likewise.
7975 (vaddq_m_n_s16): Likewise.
7976 (vaddq_m_n_u8): Likewise.
7977 (vaddq_m_n_u32): Likewise.
7978 (vaddq_m_n_u16): Likewise.
7979 (vaddq_m_s8): Likewise.
7980 (vaddq_m_s32): Likewise.
7981 (vaddq_m_s16): Likewise.
7982 (vaddq_m_u8): Likewise.
7983 (vaddq_m_u32): Likewise.
7984 (vaddq_m_u16): Likewise.
7985 (vandq_m_s8): Likewise.
7986 (vandq_m_s32): Likewise.
7987 (vandq_m_s16): Likewise.
7988 (vandq_m_u8): Likewise.
7989 (vandq_m_u32): Likewise.
7990 (vandq_m_u16): Likewise.
7991 (vbicq_m_s8): Likewise.
7992 (vbicq_m_s32): Likewise.
7993 (vbicq_m_s16): Likewise.
7994 (vbicq_m_u8): Likewise.
7995 (vbicq_m_u32): Likewise.
7996 (vbicq_m_u16): Likewise.
7997 (vbrsrq_m_n_s8): Likewise.
7998 (vbrsrq_m_n_s32): Likewise.
7999 (vbrsrq_m_n_s16): Likewise.
8000 (vbrsrq_m_n_u8): Likewise.
8001 (vbrsrq_m_n_u32): Likewise.
8002 (vbrsrq_m_n_u16): Likewise.
8003 (vcaddq_rot270_m_s8): Likewise.
8004 (vcaddq_rot270_m_s32): Likewise.
8005 (vcaddq_rot270_m_s16): Likewise.
8006 (vcaddq_rot270_m_u8): Likewise.
8007 (vcaddq_rot270_m_u32): Likewise.
8008 (vcaddq_rot270_m_u16): Likewise.
8009 (vcaddq_rot90_m_s8): Likewise.
8010 (vcaddq_rot90_m_s32): Likewise.
8011 (vcaddq_rot90_m_s16): Likewise.
8012 (vcaddq_rot90_m_u8): Likewise.
8013 (vcaddq_rot90_m_u32): Likewise.
8014 (vcaddq_rot90_m_u16): Likewise.
8015 (veorq_m_s8): Likewise.
8016 (veorq_m_s32): Likewise.
8017 (veorq_m_s16): Likewise.
8018 (veorq_m_u8): Likewise.
8019 (veorq_m_u32): Likewise.
8020 (veorq_m_u16): Likewise.
8021 (vhaddq_m_n_s8): Likewise.
8022 (vhaddq_m_n_s32): Likewise.
8023 (vhaddq_m_n_s16): Likewise.
8024 (vhaddq_m_n_u8): Likewise.
8025 (vhaddq_m_n_u32): Likewise.
8026 (vhaddq_m_n_u16): Likewise.
8027 (vhaddq_m_s8): Likewise.
8028 (vhaddq_m_s32): Likewise.
8029 (vhaddq_m_s16): Likewise.
8030 (vhaddq_m_u8): Likewise.
8031 (vhaddq_m_u32): Likewise.
8032 (vhaddq_m_u16): Likewise.
8033 (vhcaddq_rot270_m_s8): Likewise.
8034 (vhcaddq_rot270_m_s32): Likewise.
8035 (vhcaddq_rot270_m_s16): Likewise.
8036 (vhcaddq_rot90_m_s8): Likewise.
8037 (vhcaddq_rot90_m_s32): Likewise.
8038 (vhcaddq_rot90_m_s16): Likewise.
8039 (vhsubq_m_n_s8): Likewise.
8040 (vhsubq_m_n_s32): Likewise.
8041 (vhsubq_m_n_s16): Likewise.
8042 (vhsubq_m_n_u8): Likewise.
8043 (vhsubq_m_n_u32): Likewise.
8044 (vhsubq_m_n_u16): Likewise.
8045 (vhsubq_m_s8): Likewise.
8046 (vhsubq_m_s32): Likewise.
8047 (vhsubq_m_s16): Likewise.
8048 (vhsubq_m_u8): Likewise.
8049 (vhsubq_m_u32): Likewise.
8050 (vhsubq_m_u16): Likewise.
8051 (vmaxq_m_s8): Likewise.
8052 (vmaxq_m_s32): Likewise.
8053 (vmaxq_m_s16): Likewise.
8054 (vmaxq_m_u8): Likewise.
8055 (vmaxq_m_u32): Likewise.
8056 (vmaxq_m_u16): Likewise.
8057 (vminq_m_s8): Likewise.
8058 (vminq_m_s32): Likewise.
8059 (vminq_m_s16): Likewise.
8060 (vminq_m_u8): Likewise.
8061 (vminq_m_u32): Likewise.
8062 (vminq_m_u16): Likewise.
8063 (vmladavaq_p_s8): Likewise.
8064 (vmladavaq_p_s32): Likewise.
8065 (vmladavaq_p_s16): Likewise.
8066 (vmladavaq_p_u8): Likewise.
8067 (vmladavaq_p_u32): Likewise.
8068 (vmladavaq_p_u16): Likewise.
8069 (vmladavaxq_p_s8): Likewise.
8070 (vmladavaxq_p_s32): Likewise.
8071 (vmladavaxq_p_s16): Likewise.
8072 (vmlaq_m_n_s8): Likewise.
8073 (vmlaq_m_n_s32): Likewise.
8074 (vmlaq_m_n_s16): Likewise.
8075 (vmlaq_m_n_u8): Likewise.
8076 (vmlaq_m_n_u32): Likewise.
8077 (vmlaq_m_n_u16): Likewise.
8078 (vmlasq_m_n_s8): Likewise.
8079 (vmlasq_m_n_s32): Likewise.
8080 (vmlasq_m_n_s16): Likewise.
8081 (vmlasq_m_n_u8): Likewise.
8082 (vmlasq_m_n_u32): Likewise.
8083 (vmlasq_m_n_u16): Likewise.
8084 (vmlsdavaq_p_s8): Likewise.
8085 (vmlsdavaq_p_s32): Likewise.
8086 (vmlsdavaq_p_s16): Likewise.
8087 (vmlsdavaxq_p_s8): Likewise.
8088 (vmlsdavaxq_p_s32): Likewise.
8089 (vmlsdavaxq_p_s16): Likewise.
8090 (vmulhq_m_s8): Likewise.
8091 (vmulhq_m_s32): Likewise.
8092 (vmulhq_m_s16): Likewise.
8093 (vmulhq_m_u8): Likewise.
8094 (vmulhq_m_u32): Likewise.
8095 (vmulhq_m_u16): Likewise.
8096 (vmullbq_int_m_s8): Likewise.
8097 (vmullbq_int_m_s32): Likewise.
8098 (vmullbq_int_m_s16): Likewise.
8099 (vmullbq_int_m_u8): Likewise.
8100 (vmullbq_int_m_u32): Likewise.
8101 (vmullbq_int_m_u16): Likewise.
8102 (vmulltq_int_m_s8): Likewise.
8103 (vmulltq_int_m_s32): Likewise.
8104 (vmulltq_int_m_s16): Likewise.
8105 (vmulltq_int_m_u8): Likewise.
8106 (vmulltq_int_m_u32): Likewise.
8107 (vmulltq_int_m_u16): Likewise.
8108 (vmulq_m_n_s8): Likewise.
8109 (vmulq_m_n_s32): Likewise.
8110 (vmulq_m_n_s16): Likewise.
8111 (vmulq_m_n_u8): Likewise.
8112 (vmulq_m_n_u32): Likewise.
8113 (vmulq_m_n_u16): Likewise.
8114 (vmulq_m_s8): Likewise.
8115 (vmulq_m_s32): Likewise.
8116 (vmulq_m_s16): Likewise.
8117 (vmulq_m_u8): Likewise.
8118 (vmulq_m_u32): Likewise.
8119 (vmulq_m_u16): Likewise.
8120 (vornq_m_s8): Likewise.
8121 (vornq_m_s32): Likewise.
8122 (vornq_m_s16): Likewise.
8123 (vornq_m_u8): Likewise.
8124 (vornq_m_u32): Likewise.
8125 (vornq_m_u16): Likewise.
8126 (vorrq_m_s8): Likewise.
8127 (vorrq_m_s32): Likewise.
8128 (vorrq_m_s16): Likewise.
8129 (vorrq_m_u8): Likewise.
8130 (vorrq_m_u32): Likewise.
8131 (vorrq_m_u16): Likewise.
8132 (vqaddq_m_n_s8): Likewise.
8133 (vqaddq_m_n_s32): Likewise.
8134 (vqaddq_m_n_s16): Likewise.
8135 (vqaddq_m_n_u8): Likewise.
8136 (vqaddq_m_n_u32): Likewise.
8137 (vqaddq_m_n_u16): Likewise.
8138 (vqaddq_m_s8): Likewise.
8139 (vqaddq_m_s32): Likewise.
8140 (vqaddq_m_s16): Likewise.
8141 (vqaddq_m_u8): Likewise.
8142 (vqaddq_m_u32): Likewise.
8143 (vqaddq_m_u16): Likewise.
8144 (vqdmladhq_m_s8): Likewise.
8145 (vqdmladhq_m_s32): Likewise.
8146 (vqdmladhq_m_s16): Likewise.
8147 (vqdmladhxq_m_s8): Likewise.
8148 (vqdmladhxq_m_s32): Likewise.
8149 (vqdmladhxq_m_s16): Likewise.
8150 (vqdmlahq_m_n_s8): Likewise.
8151 (vqdmlahq_m_n_s32): Likewise.
8152 (vqdmlahq_m_n_s16): Likewise.
8153 (vqdmlahq_m_n_u8): Likewise.
8154 (vqdmlahq_m_n_u32): Likewise.
8155 (vqdmlahq_m_n_u16): Likewise.
8156 (vqdmlsdhq_m_s8): Likewise.
8157 (vqdmlsdhq_m_s32): Likewise.
8158 (vqdmlsdhq_m_s16): Likewise.
8159 (vqdmlsdhxq_m_s8): Likewise.
8160 (vqdmlsdhxq_m_s32): Likewise.
8161 (vqdmlsdhxq_m_s16): Likewise.
8162 (vqdmulhq_m_n_s8): Likewise.
8163 (vqdmulhq_m_n_s32): Likewise.
8164 (vqdmulhq_m_n_s16): Likewise.
8165 (vqdmulhq_m_s8): Likewise.
8166 (vqdmulhq_m_s32): Likewise.
8167 (vqdmulhq_m_s16): Likewise.
8168 (vqrdmladhq_m_s8): Likewise.
8169 (vqrdmladhq_m_s32): Likewise.
8170 (vqrdmladhq_m_s16): Likewise.
8171 (vqrdmladhxq_m_s8): Likewise.
8172 (vqrdmladhxq_m_s32): Likewise.
8173 (vqrdmladhxq_m_s16): Likewise.
8174 (vqrdmlahq_m_n_s8): Likewise.
8175 (vqrdmlahq_m_n_s32): Likewise.
8176 (vqrdmlahq_m_n_s16): Likewise.
8177 (vqrdmlahq_m_n_u8): Likewise.
8178 (vqrdmlahq_m_n_u32): Likewise.
8179 (vqrdmlahq_m_n_u16): Likewise.
8180 (vqrdmlashq_m_n_s8): Likewise.
8181 (vqrdmlashq_m_n_s32): Likewise.
8182 (vqrdmlashq_m_n_s16): Likewise.
8183 (vqrdmlashq_m_n_u8): Likewise.
8184 (vqrdmlashq_m_n_u32): Likewise.
8185 (vqrdmlashq_m_n_u16): Likewise.
8186 (vqrdmlsdhq_m_s8): Likewise.
8187 (vqrdmlsdhq_m_s32): Likewise.
8188 (vqrdmlsdhq_m_s16): Likewise.
8189 (vqrdmlsdhxq_m_s8): Likewise.
8190 (vqrdmlsdhxq_m_s32): Likewise.
8191 (vqrdmlsdhxq_m_s16): Likewise.
8192 (vqrdmulhq_m_n_s8): Likewise.
8193 (vqrdmulhq_m_n_s32): Likewise.
8194 (vqrdmulhq_m_n_s16): Likewise.
8195 (vqrdmulhq_m_s8): Likewise.
8196 (vqrdmulhq_m_s32): Likewise.
8197 (vqrdmulhq_m_s16): Likewise.
8198 (vqrshlq_m_s8): Likewise.
8199 (vqrshlq_m_s32): Likewise.
8200 (vqrshlq_m_s16): Likewise.
8201 (vqrshlq_m_u8): Likewise.
8202 (vqrshlq_m_u32): Likewise.
8203 (vqrshlq_m_u16): Likewise.
8204 (vqshlq_m_n_s8): Likewise.
8205 (vqshlq_m_n_s32): Likewise.
8206 (vqshlq_m_n_s16): Likewise.
8207 (vqshlq_m_n_u8): Likewise.
8208 (vqshlq_m_n_u32): Likewise.
8209 (vqshlq_m_n_u16): Likewise.
8210 (vqshlq_m_s8): Likewise.
8211 (vqshlq_m_s32): Likewise.
8212 (vqshlq_m_s16): Likewise.
8213 (vqshlq_m_u8): Likewise.
8214 (vqshlq_m_u32): Likewise.
8215 (vqshlq_m_u16): Likewise.
8216 (vqsubq_m_n_s8): Likewise.
8217 (vqsubq_m_n_s32): Likewise.
8218 (vqsubq_m_n_s16): Likewise.
8219 (vqsubq_m_n_u8): Likewise.
8220 (vqsubq_m_n_u32): Likewise.
8221 (vqsubq_m_n_u16): Likewise.
8222 (vqsubq_m_s8): Likewise.
8223 (vqsubq_m_s32): Likewise.
8224 (vqsubq_m_s16): Likewise.
8225 (vqsubq_m_u8): Likewise.
8226 (vqsubq_m_u32): Likewise.
8227 (vqsubq_m_u16): Likewise.
8228 (vrhaddq_m_s8): Likewise.
8229 (vrhaddq_m_s32): Likewise.
8230 (vrhaddq_m_s16): Likewise.
8231 (vrhaddq_m_u8): Likewise.
8232 (vrhaddq_m_u32): Likewise.
8233 (vrhaddq_m_u16): Likewise.
8234 (vrmulhq_m_s8): Likewise.
8235 (vrmulhq_m_s32): Likewise.
8236 (vrmulhq_m_s16): Likewise.
8237 (vrmulhq_m_u8): Likewise.
8238 (vrmulhq_m_u32): Likewise.
8239 (vrmulhq_m_u16): Likewise.
8240 (vrshlq_m_s8): Likewise.
8241 (vrshlq_m_s32): Likewise.
8242 (vrshlq_m_s16): Likewise.
8243 (vrshlq_m_u8): Likewise.
8244 (vrshlq_m_u32): Likewise.
8245 (vrshlq_m_u16): Likewise.
8246 (vrshrq_m_n_s8): Likewise.
8247 (vrshrq_m_n_s32): Likewise.
8248 (vrshrq_m_n_s16): Likewise.
8249 (vrshrq_m_n_u8): Likewise.
8250 (vrshrq_m_n_u32): Likewise.
8251 (vrshrq_m_n_u16): Likewise.
8252 (vshlq_m_n_s8): Likewise.
8253 (vshlq_m_n_s32): Likewise.
8254 (vshlq_m_n_s16): Likewise.
8255 (vshlq_m_n_u8): Likewise.
8256 (vshlq_m_n_u32): Likewise.
8257 (vshlq_m_n_u16): Likewise.
8258 (vshrq_m_n_s8): Likewise.
8259 (vshrq_m_n_s32): Likewise.
8260 (vshrq_m_n_s16): Likewise.
8261 (vshrq_m_n_u8): Likewise.
8262 (vshrq_m_n_u32): Likewise.
8263 (vshrq_m_n_u16): Likewise.
8264 (vsliq_m_n_s8): Likewise.
8265 (vsliq_m_n_s32): Likewise.
8266 (vsliq_m_n_s16): Likewise.
8267 (vsliq_m_n_u8): Likewise.
8268 (vsliq_m_n_u32): Likewise.
8269 (vsliq_m_n_u16): Likewise.
8270 (vsubq_m_n_s8): Likewise.
8271 (vsubq_m_n_s32): Likewise.
8272 (vsubq_m_n_s16): Likewise.
8273 (vsubq_m_n_u8): Likewise.
8274 (vsubq_m_n_u32): Likewise.
8275 (vsubq_m_n_u16): Likewise.
8276 (__arm_vabdq_m_s8): Define intrinsic.
8277 (__arm_vabdq_m_s32): Likewise.
8278 (__arm_vabdq_m_s16): Likewise.
8279 (__arm_vabdq_m_u8): Likewise.
8280 (__arm_vabdq_m_u32): Likewise.
8281 (__arm_vabdq_m_u16): Likewise.
8282 (__arm_vaddq_m_n_s8): Likewise.
8283 (__arm_vaddq_m_n_s32): Likewise.
8284 (__arm_vaddq_m_n_s16): Likewise.
8285 (__arm_vaddq_m_n_u8): Likewise.
8286 (__arm_vaddq_m_n_u32): Likewise.
8287 (__arm_vaddq_m_n_u16): Likewise.
8288 (__arm_vaddq_m_s8): Likewise.
8289 (__arm_vaddq_m_s32): Likewise.
8290 (__arm_vaddq_m_s16): Likewise.
8291 (__arm_vaddq_m_u8): Likewise.
8292 (__arm_vaddq_m_u32): Likewise.
8293 (__arm_vaddq_m_u16): Likewise.
8294 (__arm_vandq_m_s8): Likewise.
8295 (__arm_vandq_m_s32): Likewise.
8296 (__arm_vandq_m_s16): Likewise.
8297 (__arm_vandq_m_u8): Likewise.
8298 (__arm_vandq_m_u32): Likewise.
8299 (__arm_vandq_m_u16): Likewise.
8300 (__arm_vbicq_m_s8): Likewise.
8301 (__arm_vbicq_m_s32): Likewise.
8302 (__arm_vbicq_m_s16): Likewise.
8303 (__arm_vbicq_m_u8): Likewise.
8304 (__arm_vbicq_m_u32): Likewise.
8305 (__arm_vbicq_m_u16): Likewise.
8306 (__arm_vbrsrq_m_n_s8): Likewise.
8307 (__arm_vbrsrq_m_n_s32): Likewise.
8308 (__arm_vbrsrq_m_n_s16): Likewise.
8309 (__arm_vbrsrq_m_n_u8): Likewise.
8310 (__arm_vbrsrq_m_n_u32): Likewise.
8311 (__arm_vbrsrq_m_n_u16): Likewise.
8312 (__arm_vcaddq_rot270_m_s8): Likewise.
8313 (__arm_vcaddq_rot270_m_s32): Likewise.
8314 (__arm_vcaddq_rot270_m_s16): Likewise.
8315 (__arm_vcaddq_rot270_m_u8): Likewise.
8316 (__arm_vcaddq_rot270_m_u32): Likewise.
8317 (__arm_vcaddq_rot270_m_u16): Likewise.
8318 (__arm_vcaddq_rot90_m_s8): Likewise.
8319 (__arm_vcaddq_rot90_m_s32): Likewise.
8320 (__arm_vcaddq_rot90_m_s16): Likewise.
8321 (__arm_vcaddq_rot90_m_u8): Likewise.
8322 (__arm_vcaddq_rot90_m_u32): Likewise.
8323 (__arm_vcaddq_rot90_m_u16): Likewise.
8324 (__arm_veorq_m_s8): Likewise.
8325 (__arm_veorq_m_s32): Likewise.
8326 (__arm_veorq_m_s16): Likewise.
8327 (__arm_veorq_m_u8): Likewise.
8328 (__arm_veorq_m_u32): Likewise.
8329 (__arm_veorq_m_u16): Likewise.
8330 (__arm_vhaddq_m_n_s8): Likewise.
8331 (__arm_vhaddq_m_n_s32): Likewise.
8332 (__arm_vhaddq_m_n_s16): Likewise.
8333 (__arm_vhaddq_m_n_u8): Likewise.
8334 (__arm_vhaddq_m_n_u32): Likewise.
8335 (__arm_vhaddq_m_n_u16): Likewise.
8336 (__arm_vhaddq_m_s8): Likewise.
8337 (__arm_vhaddq_m_s32): Likewise.
8338 (__arm_vhaddq_m_s16): Likewise.
8339 (__arm_vhaddq_m_u8): Likewise.
8340 (__arm_vhaddq_m_u32): Likewise.
8341 (__arm_vhaddq_m_u16): Likewise.
8342 (__arm_vhcaddq_rot270_m_s8): Likewise.
8343 (__arm_vhcaddq_rot270_m_s32): Likewise.
8344 (__arm_vhcaddq_rot270_m_s16): Likewise.
8345 (__arm_vhcaddq_rot90_m_s8): Likewise.
8346 (__arm_vhcaddq_rot90_m_s32): Likewise.
8347 (__arm_vhcaddq_rot90_m_s16): Likewise.
8348 (__arm_vhsubq_m_n_s8): Likewise.
8349 (__arm_vhsubq_m_n_s32): Likewise.
8350 (__arm_vhsubq_m_n_s16): Likewise.
8351 (__arm_vhsubq_m_n_u8): Likewise.
8352 (__arm_vhsubq_m_n_u32): Likewise.
8353 (__arm_vhsubq_m_n_u16): Likewise.
8354 (__arm_vhsubq_m_s8): Likewise.
8355 (__arm_vhsubq_m_s32): Likewise.
8356 (__arm_vhsubq_m_s16): Likewise.
8357 (__arm_vhsubq_m_u8): Likewise.
8358 (__arm_vhsubq_m_u32): Likewise.
8359 (__arm_vhsubq_m_u16): Likewise.
8360 (__arm_vmaxq_m_s8): Likewise.
8361 (__arm_vmaxq_m_s32): Likewise.
8362 (__arm_vmaxq_m_s16): Likewise.
8363 (__arm_vmaxq_m_u8): Likewise.
8364 (__arm_vmaxq_m_u32): Likewise.
8365 (__arm_vmaxq_m_u16): Likewise.
8366 (__arm_vminq_m_s8): Likewise.
8367 (__arm_vminq_m_s32): Likewise.
8368 (__arm_vminq_m_s16): Likewise.
8369 (__arm_vminq_m_u8): Likewise.
8370 (__arm_vminq_m_u32): Likewise.
8371 (__arm_vminq_m_u16): Likewise.
8372 (__arm_vmladavaq_p_s8): Likewise.
8373 (__arm_vmladavaq_p_s32): Likewise.
8374 (__arm_vmladavaq_p_s16): Likewise.
8375 (__arm_vmladavaq_p_u8): Likewise.
8376 (__arm_vmladavaq_p_u32): Likewise.
8377 (__arm_vmladavaq_p_u16): Likewise.
8378 (__arm_vmladavaxq_p_s8): Likewise.
8379 (__arm_vmladavaxq_p_s32): Likewise.
8380 (__arm_vmladavaxq_p_s16): Likewise.
8381 (__arm_vmlaq_m_n_s8): Likewise.
8382 (__arm_vmlaq_m_n_s32): Likewise.
8383 (__arm_vmlaq_m_n_s16): Likewise.
8384 (__arm_vmlaq_m_n_u8): Likewise.
8385 (__arm_vmlaq_m_n_u32): Likewise.
8386 (__arm_vmlaq_m_n_u16): Likewise.
8387 (__arm_vmlasq_m_n_s8): Likewise.
8388 (__arm_vmlasq_m_n_s32): Likewise.
8389 (__arm_vmlasq_m_n_s16): Likewise.
8390 (__arm_vmlasq_m_n_u8): Likewise.
8391 (__arm_vmlasq_m_n_u32): Likewise.
8392 (__arm_vmlasq_m_n_u16): Likewise.
8393 (__arm_vmlsdavaq_p_s8): Likewise.
8394 (__arm_vmlsdavaq_p_s32): Likewise.
8395 (__arm_vmlsdavaq_p_s16): Likewise.
8396 (__arm_vmlsdavaxq_p_s8): Likewise.
8397 (__arm_vmlsdavaxq_p_s32): Likewise.
8398 (__arm_vmlsdavaxq_p_s16): Likewise.
8399 (__arm_vmulhq_m_s8): Likewise.
8400 (__arm_vmulhq_m_s32): Likewise.
8401 (__arm_vmulhq_m_s16): Likewise.
8402 (__arm_vmulhq_m_u8): Likewise.
8403 (__arm_vmulhq_m_u32): Likewise.
8404 (__arm_vmulhq_m_u16): Likewise.
8405 (__arm_vmullbq_int_m_s8): Likewise.
8406 (__arm_vmullbq_int_m_s32): Likewise.
8407 (__arm_vmullbq_int_m_s16): Likewise.
8408 (__arm_vmullbq_int_m_u8): Likewise.
8409 (__arm_vmullbq_int_m_u32): Likewise.
8410 (__arm_vmullbq_int_m_u16): Likewise.
8411 (__arm_vmulltq_int_m_s8): Likewise.
8412 (__arm_vmulltq_int_m_s32): Likewise.
8413 (__arm_vmulltq_int_m_s16): Likewise.
8414 (__arm_vmulltq_int_m_u8): Likewise.
8415 (__arm_vmulltq_int_m_u32): Likewise.
8416 (__arm_vmulltq_int_m_u16): Likewise.
8417 (__arm_vmulq_m_n_s8): Likewise.
8418 (__arm_vmulq_m_n_s32): Likewise.
8419 (__arm_vmulq_m_n_s16): Likewise.
8420 (__arm_vmulq_m_n_u8): Likewise.
8421 (__arm_vmulq_m_n_u32): Likewise.
8422 (__arm_vmulq_m_n_u16): Likewise.
8423 (__arm_vmulq_m_s8): Likewise.
8424 (__arm_vmulq_m_s32): Likewise.
8425 (__arm_vmulq_m_s16): Likewise.
8426 (__arm_vmulq_m_u8): Likewise.
8427 (__arm_vmulq_m_u32): Likewise.
8428 (__arm_vmulq_m_u16): Likewise.
8429 (__arm_vornq_m_s8): Likewise.
8430 (__arm_vornq_m_s32): Likewise.
8431 (__arm_vornq_m_s16): Likewise.
8432 (__arm_vornq_m_u8): Likewise.
8433 (__arm_vornq_m_u32): Likewise.
8434 (__arm_vornq_m_u16): Likewise.
8435 (__arm_vorrq_m_s8): Likewise.
8436 (__arm_vorrq_m_s32): Likewise.
8437 (__arm_vorrq_m_s16): Likewise.
8438 (__arm_vorrq_m_u8): Likewise.
8439 (__arm_vorrq_m_u32): Likewise.
8440 (__arm_vorrq_m_u16): Likewise.
8441 (__arm_vqaddq_m_n_s8): Likewise.
8442 (__arm_vqaddq_m_n_s32): Likewise.
8443 (__arm_vqaddq_m_n_s16): Likewise.
8444 (__arm_vqaddq_m_n_u8): Likewise.
8445 (__arm_vqaddq_m_n_u32): Likewise.
8446 (__arm_vqaddq_m_n_u16): Likewise.
8447 (__arm_vqaddq_m_s8): Likewise.
8448 (__arm_vqaddq_m_s32): Likewise.
8449 (__arm_vqaddq_m_s16): Likewise.
8450 (__arm_vqaddq_m_u8): Likewise.
8451 (__arm_vqaddq_m_u32): Likewise.
8452 (__arm_vqaddq_m_u16): Likewise.
8453 (__arm_vqdmladhq_m_s8): Likewise.
8454 (__arm_vqdmladhq_m_s32): Likewise.
8455 (__arm_vqdmladhq_m_s16): Likewise.
8456 (__arm_vqdmladhxq_m_s8): Likewise.
8457 (__arm_vqdmladhxq_m_s32): Likewise.
8458 (__arm_vqdmladhxq_m_s16): Likewise.
8459 (__arm_vqdmlahq_m_n_s8): Likewise.
8460 (__arm_vqdmlahq_m_n_s32): Likewise.
8461 (__arm_vqdmlahq_m_n_s16): Likewise.
8462 (__arm_vqdmlahq_m_n_u8): Likewise.
8463 (__arm_vqdmlahq_m_n_u32): Likewise.
8464 (__arm_vqdmlahq_m_n_u16): Likewise.
8465 (__arm_vqdmlsdhq_m_s8): Likewise.
8466 (__arm_vqdmlsdhq_m_s32): Likewise.
8467 (__arm_vqdmlsdhq_m_s16): Likewise.
8468 (__arm_vqdmlsdhxq_m_s8): Likewise.
8469 (__arm_vqdmlsdhxq_m_s32): Likewise.
8470 (__arm_vqdmlsdhxq_m_s16): Likewise.
8471 (__arm_vqdmulhq_m_n_s8): Likewise.
8472 (__arm_vqdmulhq_m_n_s32): Likewise.
8473 (__arm_vqdmulhq_m_n_s16): Likewise.
8474 (__arm_vqdmulhq_m_s8): Likewise.
8475 (__arm_vqdmulhq_m_s32): Likewise.
8476 (__arm_vqdmulhq_m_s16): Likewise.
8477 (__arm_vqrdmladhq_m_s8): Likewise.
8478 (__arm_vqrdmladhq_m_s32): Likewise.
8479 (__arm_vqrdmladhq_m_s16): Likewise.
8480 (__arm_vqrdmladhxq_m_s8): Likewise.
8481 (__arm_vqrdmladhxq_m_s32): Likewise.
8482 (__arm_vqrdmladhxq_m_s16): Likewise.
8483 (__arm_vqrdmlahq_m_n_s8): Likewise.
8484 (__arm_vqrdmlahq_m_n_s32): Likewise.
8485 (__arm_vqrdmlahq_m_n_s16): Likewise.
8486 (__arm_vqrdmlahq_m_n_u8): Likewise.
8487 (__arm_vqrdmlahq_m_n_u32): Likewise.
8488 (__arm_vqrdmlahq_m_n_u16): Likewise.
8489 (__arm_vqrdmlashq_m_n_s8): Likewise.
8490 (__arm_vqrdmlashq_m_n_s32): Likewise.
8491 (__arm_vqrdmlashq_m_n_s16): Likewise.
8492 (__arm_vqrdmlashq_m_n_u8): Likewise.
8493 (__arm_vqrdmlashq_m_n_u32): Likewise.
8494 (__arm_vqrdmlashq_m_n_u16): Likewise.
8495 (__arm_vqrdmlsdhq_m_s8): Likewise.
8496 (__arm_vqrdmlsdhq_m_s32): Likewise.
8497 (__arm_vqrdmlsdhq_m_s16): Likewise.
8498 (__arm_vqrdmlsdhxq_m_s8): Likewise.
8499 (__arm_vqrdmlsdhxq_m_s32): Likewise.
8500 (__arm_vqrdmlsdhxq_m_s16): Likewise.
8501 (__arm_vqrdmulhq_m_n_s8): Likewise.
8502 (__arm_vqrdmulhq_m_n_s32): Likewise.
8503 (__arm_vqrdmulhq_m_n_s16): Likewise.
8504 (__arm_vqrdmulhq_m_s8): Likewise.
8505 (__arm_vqrdmulhq_m_s32): Likewise.
8506 (__arm_vqrdmulhq_m_s16): Likewise.
8507 (__arm_vqrshlq_m_s8): Likewise.
8508 (__arm_vqrshlq_m_s32): Likewise.
8509 (__arm_vqrshlq_m_s16): Likewise.
8510 (__arm_vqrshlq_m_u8): Likewise.
8511 (__arm_vqrshlq_m_u32): Likewise.
8512 (__arm_vqrshlq_m_u16): Likewise.
8513 (__arm_vqshlq_m_n_s8): Likewise.
8514 (__arm_vqshlq_m_n_s32): Likewise.
8515 (__arm_vqshlq_m_n_s16): Likewise.
8516 (__arm_vqshlq_m_n_u8): Likewise.
8517 (__arm_vqshlq_m_n_u32): Likewise.
8518 (__arm_vqshlq_m_n_u16): Likewise.
8519 (__arm_vqshlq_m_s8): Likewise.
8520 (__arm_vqshlq_m_s32): Likewise.
8521 (__arm_vqshlq_m_s16): Likewise.
8522 (__arm_vqshlq_m_u8): Likewise.
8523 (__arm_vqshlq_m_u32): Likewise.
8524 (__arm_vqshlq_m_u16): Likewise.
8525 (__arm_vqsubq_m_n_s8): Likewise.
8526 (__arm_vqsubq_m_n_s32): Likewise.
8527 (__arm_vqsubq_m_n_s16): Likewise.
8528 (__arm_vqsubq_m_n_u8): Likewise.
8529 (__arm_vqsubq_m_n_u32): Likewise.
8530 (__arm_vqsubq_m_n_u16): Likewise.
8531 (__arm_vqsubq_m_s8): Likewise.
8532 (__arm_vqsubq_m_s32): Likewise.
8533 (__arm_vqsubq_m_s16): Likewise.
8534 (__arm_vqsubq_m_u8): Likewise.
8535 (__arm_vqsubq_m_u32): Likewise.
8536 (__arm_vqsubq_m_u16): Likewise.
8537 (__arm_vrhaddq_m_s8): Likewise.
8538 (__arm_vrhaddq_m_s32): Likewise.
8539 (__arm_vrhaddq_m_s16): Likewise.
8540 (__arm_vrhaddq_m_u8): Likewise.
8541 (__arm_vrhaddq_m_u32): Likewise.
8542 (__arm_vrhaddq_m_u16): Likewise.
8543 (__arm_vrmulhq_m_s8): Likewise.
8544 (__arm_vrmulhq_m_s32): Likewise.
8545 (__arm_vrmulhq_m_s16): Likewise.
8546 (__arm_vrmulhq_m_u8): Likewise.
8547 (__arm_vrmulhq_m_u32): Likewise.
8548 (__arm_vrmulhq_m_u16): Likewise.
8549 (__arm_vrshlq_m_s8): Likewise.
8550 (__arm_vrshlq_m_s32): Likewise.
8551 (__arm_vrshlq_m_s16): Likewise.
8552 (__arm_vrshlq_m_u8): Likewise.
8553 (__arm_vrshlq_m_u32): Likewise.
8554 (__arm_vrshlq_m_u16): Likewise.
8555 (__arm_vrshrq_m_n_s8): Likewise.
8556 (__arm_vrshrq_m_n_s32): Likewise.
8557 (__arm_vrshrq_m_n_s16): Likewise.
8558 (__arm_vrshrq_m_n_u8): Likewise.
8559 (__arm_vrshrq_m_n_u32): Likewise.
8560 (__arm_vrshrq_m_n_u16): Likewise.
8561 (__arm_vshlq_m_n_s8): Likewise.
8562 (__arm_vshlq_m_n_s32): Likewise.
8563 (__arm_vshlq_m_n_s16): Likewise.
8564 (__arm_vshlq_m_n_u8): Likewise.
8565 (__arm_vshlq_m_n_u32): Likewise.
8566 (__arm_vshlq_m_n_u16): Likewise.
8567 (__arm_vshrq_m_n_s8): Likewise.
8568 (__arm_vshrq_m_n_s32): Likewise.
8569 (__arm_vshrq_m_n_s16): Likewise.
8570 (__arm_vshrq_m_n_u8): Likewise.
8571 (__arm_vshrq_m_n_u32): Likewise.
8572 (__arm_vshrq_m_n_u16): Likewise.
8573 (__arm_vsliq_m_n_s8): Likewise.
8574 (__arm_vsliq_m_n_s32): Likewise.
8575 (__arm_vsliq_m_n_s16): Likewise.
8576 (__arm_vsliq_m_n_u8): Likewise.
8577 (__arm_vsliq_m_n_u32): Likewise.
8578 (__arm_vsliq_m_n_u16): Likewise.
8579 (__arm_vsubq_m_n_s8): Likewise.
8580 (__arm_vsubq_m_n_s32): Likewise.
8581 (__arm_vsubq_m_n_s16): Likewise.
8582 (__arm_vsubq_m_n_u8): Likewise.
8583 (__arm_vsubq_m_n_u32): Likewise.
8584 (__arm_vsubq_m_n_u16): Likewise.
8585 (vqdmladhq_m): Define polymorphic variant.
8586 (vqdmladhxq_m): Likewise.
8587 (vqdmlsdhq_m): Likewise.
8588 (vqdmlsdhxq_m): Likewise.
8589 (vabdq_m): Likewise.
8590 (vandq_m): Likewise.
8591 (vbicq_m): Likewise.
8592 (vbrsrq_m_n): Likewise.
8593 (vcaddq_rot270_m): Likewise.
8594 (vcaddq_rot90_m): Likewise.
8595 (veorq_m): Likewise.
8596 (vmaxq_m): Likewise.
8597 (vminq_m): Likewise.
8598 (vmladavaq_p): Likewise.
8599 (vmlaq_m_n): Likewise.
8600 (vmlasq_m_n): Likewise.
8601 (vmulhq_m): Likewise.
8602 (vmullbq_int_m): Likewise.
8603 (vmulltq_int_m): Likewise.
8604 (vornq_m): Likewise.
8605 (vorrq_m): Likewise.
8606 (vqdmlahq_m_n): Likewise.
8607 (vqrdmlahq_m_n): Likewise.
8608 (vqrdmlashq_m_n): Likewise.
8609 (vqrshlq_m): Likewise.
8610 (vqshlq_m_n): Likewise.
8611 (vqshlq_m): Likewise.
8612 (vrhaddq_m): Likewise.
8613 (vrmulhq_m): Likewise.
8614 (vrshlq_m): Likewise.
8615 (vrshrq_m_n): Likewise.
8616 (vshlq_m_n): Likewise.
8617 (vshrq_m_n): Likewise.
8618 (vsliq_m): Likewise.
8619 (vaddq_m_n): Likewise.
8620 (vaddq_m): Likewise.
8621 (vhaddq_m_n): Likewise.
8622 (vhaddq_m): Likewise.
8623 (vhcaddq_rot270_m): Likewise.
8624 (vhcaddq_rot90_m): Likewise.
8625 (vhsubq_m): Likewise.
8626 (vhsubq_m_n): Likewise.
8627 (vmulq_m_n): Likewise.
8628 (vmulq_m): Likewise.
8629 (vqaddq_m_n): Likewise.
8630 (vqaddq_m): Likewise.
8631 (vqdmulhq_m_n): Likewise.
8632 (vqdmulhq_m): Likewise.
8633 (vsubq_m_n): Likewise.
8634 (vsliq_m_n): Likewise.
8635 (vqsubq_m_n): Likewise.
8636 (vqsubq_m): Likewise.
8637 (vqrdmulhq_m): Likewise.
8638 (vqrdmulhq_m_n): Likewise.
8639 (vqrdmlsdhxq_m): Likewise.
8640 (vqrdmlsdhq_m): Likewise.
8641 (vqrdmladhq_m): Likewise.
8642 (vqrdmladhxq_m): Likewise.
8643 (vmlsdavaxq_p): Likewise.
8644 (vmlsdavaq_p): Likewise.
8645 (vmladavaxq_p): Likewise.
8646 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
8648 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
8649 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8650 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
8651 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
8652 * config/arm/mve.md (VHSUBQ_M): Define iterators.
8653 (VSLIQ_M_N): Likewise.
8654 (VQRDMLAHQ_M_N): Likewise.
8655 (VRSHLQ_M): Likewise.
8656 (VMINQ_M): Likewise.
8657 (VMULLBQ_INT_M): Likewise.
8658 (VMULHQ_M): Likewise.
8659 (VMULQ_M): Likewise.
8660 (VHSUBQ_M_N): Likewise.
8661 (VHADDQ_M_N): Likewise.
8662 (VORRQ_M): Likewise.
8663 (VRMULHQ_M): Likewise.
8664 (VQADDQ_M): Likewise.
8665 (VRSHRQ_M_N): Likewise.
8666 (VQSUBQ_M_N): Likewise.
8667 (VADDQ_M): Likewise.
8668 (VORNQ_M): Likewise.
8669 (VQDMLAHQ_M_N): Likewise.
8670 (VRHADDQ_M): Likewise.
8671 (VQSHLQ_M): Likewise.
8672 (VANDQ_M): Likewise.
8673 (VBICQ_M): Likewise.
8674 (VSHLQ_M_N): Likewise.
8675 (VCADDQ_ROT270_M): Likewise.
8676 (VQRSHLQ_M): Likewise.
8677 (VQADDQ_M_N): Likewise.
8678 (VADDQ_M_N): Likewise.
8679 (VMAXQ_M): Likewise.
8680 (VQSUBQ_M): Likewise.
8681 (VMLASQ_M_N): Likewise.
8682 (VMLADAVAQ_P): Likewise.
8683 (VBRSRQ_M_N): Likewise.
8684 (VMULQ_M_N): Likewise.
8685 (VCADDQ_ROT90_M): Likewise.
8686 (VMULLTQ_INT_M): Likewise.
8687 (VEORQ_M): Likewise.
8688 (VSHRQ_M_N): Likewise.
8689 (VSUBQ_M_N): Likewise.
8690 (VHADDQ_M): Likewise.
8691 (VABDQ_M): Likewise.
8692 (VQRDMLASHQ_M_N): Likewise.
8693 (VMLAQ_M_N): Likewise.
8694 (VQSHLQ_M_N): Likewise.
8695 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
8696 (mve_vaddq_m_n_<supf><mode>): Likewise.
8697 (mve_vaddq_m_<supf><mode>): Likewise.
8698 (mve_vandq_m_<supf><mode>): Likewise.
8699 (mve_vbicq_m_<supf><mode>): Likewise.
8700 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
8701 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
8702 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
8703 (mve_veorq_m_<supf><mode>): Likewise.
8704 (mve_vhaddq_m_n_<supf><mode>): Likewise.
8705 (mve_vhaddq_m_<supf><mode>): Likewise.
8706 (mve_vhsubq_m_n_<supf><mode>): Likewise.
8707 (mve_vhsubq_m_<supf><mode>): Likewise.
8708 (mve_vmaxq_m_<supf><mode>): Likewise.
8709 (mve_vminq_m_<supf><mode>): Likewise.
8710 (mve_vmladavaq_p_<supf><mode>): Likewise.
8711 (mve_vmlaq_m_n_<supf><mode>): Likewise.
8712 (mve_vmlasq_m_n_<supf><mode>): Likewise.
8713 (mve_vmulhq_m_<supf><mode>): Likewise.
8714 (mve_vmullbq_int_m_<supf><mode>): Likewise.
8715 (mve_vmulltq_int_m_<supf><mode>): Likewise.
8716 (mve_vmulq_m_n_<supf><mode>): Likewise.
8717 (mve_vmulq_m_<supf><mode>): Likewise.
8718 (mve_vornq_m_<supf><mode>): Likewise.
8719 (mve_vorrq_m_<supf><mode>): Likewise.
8720 (mve_vqaddq_m_n_<supf><mode>): Likewise.
8721 (mve_vqaddq_m_<supf><mode>): Likewise.
8722 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
8723 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
8724 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
8725 (mve_vqrshlq_m_<supf><mode>): Likewise.
8726 (mve_vqshlq_m_n_<supf><mode>): Likewise.
8727 (mve_vqshlq_m_<supf><mode>): Likewise.
8728 (mve_vqsubq_m_n_<supf><mode>): Likewise.
8729 (mve_vqsubq_m_<supf><mode>): Likewise.
8730 (mve_vrhaddq_m_<supf><mode>): Likewise.
8731 (mve_vrmulhq_m_<supf><mode>): Likewise.
8732 (mve_vrshlq_m_<supf><mode>): Likewise.
8733 (mve_vrshrq_m_n_<supf><mode>): Likewise.
8734 (mve_vshlq_m_n_<supf><mode>): Likewise.
8735 (mve_vshrq_m_n_<supf><mode>): Likewise.
8736 (mve_vsliq_m_n_<supf><mode>): Likewise.
8737 (mve_vsubq_m_n_<supf><mode>): Likewise.
8738 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
8739 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
8740 (mve_vmladavaxq_p_s<mode>): Likewise.
8741 (mve_vmlsdavaq_p_s<mode>): Likewise.
8742 (mve_vmlsdavaxq_p_s<mode>): Likewise.
8743 (mve_vqdmladhq_m_s<mode>): Likewise.
8744 (mve_vqdmladhxq_m_s<mode>): Likewise.
8745 (mve_vqdmlsdhq_m_s<mode>): Likewise.
8746 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
8747 (mve_vqdmulhq_m_n_s<mode>): Likewise.
8748 (mve_vqdmulhq_m_s<mode>): Likewise.
8749 (mve_vqrdmladhq_m_s<mode>): Likewise.
8750 (mve_vqrdmladhxq_m_s<mode>): Likewise.
8751 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
8752 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
8753 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
8754 (mve_vqrdmulhq_m_s<mode>): Likewise.
8756 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8757 Mihail Ionescu <mihail.ionescu@arm.com>
8758 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8760 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
8761 Define builtin qualifier.
8762 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8763 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8764 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8765 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8766 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8767 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8768 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8769 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
8770 (vsubq_m_s8): Likewise.
8771 (vcvtq_m_n_f16_u16): Likewise.
8772 (vqshluq_m_n_s8): Likewise.
8773 (vabavq_p_s8): Likewise.
8774 (vsriq_m_n_u8): Likewise.
8775 (vshlq_m_u8): Likewise.
8776 (vsubq_m_u8): Likewise.
8777 (vabavq_p_u8): Likewise.
8778 (vshlq_m_s8): Likewise.
8779 (vcvtq_m_n_f16_s16): Likewise.
8780 (vsriq_m_n_s16): Likewise.
8781 (vsubq_m_s16): Likewise.
8782 (vcvtq_m_n_f32_u32): Likewise.
8783 (vqshluq_m_n_s16): Likewise.
8784 (vabavq_p_s16): Likewise.
8785 (vsriq_m_n_u16): Likewise.
8786 (vshlq_m_u16): Likewise.
8787 (vsubq_m_u16): Likewise.
8788 (vabavq_p_u16): Likewise.
8789 (vshlq_m_s16): Likewise.
8790 (vcvtq_m_n_f32_s32): Likewise.
8791 (vsriq_m_n_s32): Likewise.
8792 (vsubq_m_s32): Likewise.
8793 (vqshluq_m_n_s32): Likewise.
8794 (vabavq_p_s32): Likewise.
8795 (vsriq_m_n_u32): Likewise.
8796 (vshlq_m_u32): Likewise.
8797 (vsubq_m_u32): Likewise.
8798 (vabavq_p_u32): Likewise.
8799 (vshlq_m_s32): Likewise.
8800 (__arm_vsriq_m_n_s8): Define intrinsic.
8801 (__arm_vsubq_m_s8): Likewise.
8802 (__arm_vqshluq_m_n_s8): Likewise.
8803 (__arm_vabavq_p_s8): Likewise.
8804 (__arm_vsriq_m_n_u8): Likewise.
8805 (__arm_vshlq_m_u8): Likewise.
8806 (__arm_vsubq_m_u8): Likewise.
8807 (__arm_vabavq_p_u8): Likewise.
8808 (__arm_vshlq_m_s8): Likewise.
8809 (__arm_vsriq_m_n_s16): Likewise.
8810 (__arm_vsubq_m_s16): Likewise.
8811 (__arm_vqshluq_m_n_s16): Likewise.
8812 (__arm_vabavq_p_s16): Likewise.
8813 (__arm_vsriq_m_n_u16): Likewise.
8814 (__arm_vshlq_m_u16): Likewise.
8815 (__arm_vsubq_m_u16): Likewise.
8816 (__arm_vabavq_p_u16): Likewise.
8817 (__arm_vshlq_m_s16): Likewise.
8818 (__arm_vsriq_m_n_s32): Likewise.
8819 (__arm_vsubq_m_s32): Likewise.
8820 (__arm_vqshluq_m_n_s32): Likewise.
8821 (__arm_vabavq_p_s32): Likewise.
8822 (__arm_vsriq_m_n_u32): Likewise.
8823 (__arm_vshlq_m_u32): Likewise.
8824 (__arm_vsubq_m_u32): Likewise.
8825 (__arm_vabavq_p_u32): Likewise.
8826 (__arm_vshlq_m_s32): Likewise.
8827 (__arm_vcvtq_m_n_f16_u16): Likewise.
8828 (__arm_vcvtq_m_n_f16_s16): Likewise.
8829 (__arm_vcvtq_m_n_f32_u32): Likewise.
8830 (__arm_vcvtq_m_n_f32_s32): Likewise.
8831 (vcvtq_m_n): Define polymorphic variant.
8832 (vqshluq_m_n): Likewise.
8833 (vshlq_m): Likewise.
8834 (vsriq_m_n): Likewise.
8835 (vsubq_m): Likewise.
8836 (vabavq_p): Likewise.
8837 * config/arm/arm_mve_builtins.def
8838 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
8839 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8840 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8841 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8842 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8843 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8844 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8845 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8846 * config/arm/mve.md (VABAVQ_P): Define iterator.
8847 (VSHLQ_M): Likewise.
8848 (VSRIQ_M_N): Likewise.
8849 (VSUBQ_M): Likewise.
8850 (VCVTQ_M_N_TO_F): Likewise.
8851 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
8852 (mve_vqshluq_m_n_s<mode>): Likewise.
8853 (mve_vshlq_m_<supf><mode>): Likewise.
8854 (mve_vsriq_m_n_<supf><mode>): Likewise.
8855 (mve_vsubq_m_<supf><mode>): Likewise.
8856 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
8858 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8859 Mihail Ionescu <mihail.ionescu@arm.com>
8860 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8862 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
8863 (vrmlsldavhaq_s32): Likewise.
8864 (vrmlsldavhaxq_s32): Likewise.
8865 (vaddlvaq_p_s32): Likewise.
8866 (vcvtbq_m_f16_f32): Likewise.
8867 (vcvtbq_m_f32_f16): Likewise.
8868 (vcvttq_m_f16_f32): Likewise.
8869 (vcvttq_m_f32_f16): Likewise.
8870 (vrev16q_m_s8): Likewise.
8871 (vrev32q_m_f16): Likewise.
8872 (vrmlaldavhq_p_s32): Likewise.
8873 (vrmlaldavhxq_p_s32): Likewise.
8874 (vrmlsldavhq_p_s32): Likewise.
8875 (vrmlsldavhxq_p_s32): Likewise.
8876 (vaddlvaq_p_u32): Likewise.
8877 (vrev16q_m_u8): Likewise.
8878 (vrmlaldavhq_p_u32): Likewise.
8879 (vmvnq_m_n_s16): Likewise.
8880 (vorrq_m_n_s16): Likewise.
8881 (vqrshrntq_n_s16): Likewise.
8882 (vqshrnbq_n_s16): Likewise.
8883 (vqshrntq_n_s16): Likewise.
8884 (vrshrnbq_n_s16): Likewise.
8885 (vrshrntq_n_s16): Likewise.
8886 (vshrnbq_n_s16): Likewise.
8887 (vshrntq_n_s16): Likewise.
8888 (vcmlaq_f16): Likewise.
8889 (vcmlaq_rot180_f16): Likewise.
8890 (vcmlaq_rot270_f16): Likewise.
8891 (vcmlaq_rot90_f16): Likewise.
8892 (vfmaq_f16): Likewise.
8893 (vfmaq_n_f16): Likewise.
8894 (vfmasq_n_f16): Likewise.
8895 (vfmsq_f16): Likewise.
8896 (vmlaldavaq_s16): Likewise.
8897 (vmlaldavaxq_s16): Likewise.
8898 (vmlsldavaq_s16): Likewise.
8899 (vmlsldavaxq_s16): Likewise.
8900 (vabsq_m_f16): Likewise.
8901 (vcvtmq_m_s16_f16): Likewise.
8902 (vcvtnq_m_s16_f16): Likewise.
8903 (vcvtpq_m_s16_f16): Likewise.
8904 (vcvtq_m_s16_f16): Likewise.
8905 (vdupq_m_n_f16): Likewise.
8906 (vmaxnmaq_m_f16): Likewise.
8907 (vmaxnmavq_p_f16): Likewise.
8908 (vmaxnmvq_p_f16): Likewise.
8909 (vminnmaq_m_f16): Likewise.
8910 (vminnmavq_p_f16): Likewise.
8911 (vminnmvq_p_f16): Likewise.
8912 (vmlaldavq_p_s16): Likewise.
8913 (vmlaldavxq_p_s16): Likewise.
8914 (vmlsldavq_p_s16): Likewise.
8915 (vmlsldavxq_p_s16): Likewise.
8916 (vmovlbq_m_s8): Likewise.
8917 (vmovltq_m_s8): Likewise.
8918 (vmovnbq_m_s16): Likewise.
8919 (vmovntq_m_s16): Likewise.
8920 (vnegq_m_f16): Likewise.
8921 (vpselq_f16): Likewise.
8922 (vqmovnbq_m_s16): Likewise.
8923 (vqmovntq_m_s16): Likewise.
8924 (vrev32q_m_s8): Likewise.
8925 (vrev64q_m_f16): Likewise.
8926 (vrndaq_m_f16): Likewise.
8927 (vrndmq_m_f16): Likewise.
8928 (vrndnq_m_f16): Likewise.
8929 (vrndpq_m_f16): Likewise.
8930 (vrndq_m_f16): Likewise.
8931 (vrndxq_m_f16): Likewise.
8932 (vcmpeqq_m_n_f16): Likewise.
8933 (vcmpgeq_m_f16): Likewise.
8934 (vcmpgeq_m_n_f16): Likewise.
8935 (vcmpgtq_m_f16): Likewise.
8936 (vcmpgtq_m_n_f16): Likewise.
8937 (vcmpleq_m_f16): Likewise.
8938 (vcmpleq_m_n_f16): Likewise.
8939 (vcmpltq_m_f16): Likewise.
8940 (vcmpltq_m_n_f16): Likewise.
8941 (vcmpneq_m_f16): Likewise.
8942 (vcmpneq_m_n_f16): Likewise.
8943 (vmvnq_m_n_u16): Likewise.
8944 (vorrq_m_n_u16): Likewise.
8945 (vqrshruntq_n_s16): Likewise.
8946 (vqshrunbq_n_s16): Likewise.
8947 (vqshruntq_n_s16): Likewise.
8948 (vcvtmq_m_u16_f16): Likewise.
8949 (vcvtnq_m_u16_f16): Likewise.
8950 (vcvtpq_m_u16_f16): Likewise.
8951 (vcvtq_m_u16_f16): Likewise.
8952 (vqmovunbq_m_s16): Likewise.
8953 (vqmovuntq_m_s16): Likewise.
8954 (vqrshrntq_n_u16): Likewise.
8955 (vqshrnbq_n_u16): Likewise.
8956 (vqshrntq_n_u16): Likewise.
8957 (vrshrnbq_n_u16): Likewise.
8958 (vrshrntq_n_u16): Likewise.
8959 (vshrnbq_n_u16): Likewise.
8960 (vshrntq_n_u16): Likewise.
8961 (vmlaldavaq_u16): Likewise.
8962 (vmlaldavaxq_u16): Likewise.
8963 (vmlaldavq_p_u16): Likewise.
8964 (vmlaldavxq_p_u16): Likewise.
8965 (vmovlbq_m_u8): Likewise.
8966 (vmovltq_m_u8): Likewise.
8967 (vmovnbq_m_u16): Likewise.
8968 (vmovntq_m_u16): Likewise.
8969 (vqmovnbq_m_u16): Likewise.
8970 (vqmovntq_m_u16): Likewise.
8971 (vrev32q_m_u8): Likewise.
8972 (vmvnq_m_n_s32): Likewise.
8973 (vorrq_m_n_s32): Likewise.
8974 (vqrshrntq_n_s32): Likewise.
8975 (vqshrnbq_n_s32): Likewise.
8976 (vqshrntq_n_s32): Likewise.
8977 (vrshrnbq_n_s32): Likewise.
8978 (vrshrntq_n_s32): Likewise.
8979 (vshrnbq_n_s32): Likewise.
8980 (vshrntq_n_s32): Likewise.
8981 (vcmlaq_f32): Likewise.
8982 (vcmlaq_rot180_f32): Likewise.
8983 (vcmlaq_rot270_f32): Likewise.
8984 (vcmlaq_rot90_f32): Likewise.
8985 (vfmaq_f32): Likewise.
8986 (vfmaq_n_f32): Likewise.
8987 (vfmasq_n_f32): Likewise.
8988 (vfmsq_f32): Likewise.
8989 (vmlaldavaq_s32): Likewise.
8990 (vmlaldavaxq_s32): Likewise.
8991 (vmlsldavaq_s32): Likewise.
8992 (vmlsldavaxq_s32): Likewise.
8993 (vabsq_m_f32): Likewise.
8994 (vcvtmq_m_s32_f32): Likewise.
8995 (vcvtnq_m_s32_f32): Likewise.
8996 (vcvtpq_m_s32_f32): Likewise.
8997 (vcvtq_m_s32_f32): Likewise.
8998 (vdupq_m_n_f32): Likewise.
8999 (vmaxnmaq_m_f32): Likewise.
9000 (vmaxnmavq_p_f32): Likewise.
9001 (vmaxnmvq_p_f32): Likewise.
9002 (vminnmaq_m_f32): Likewise.
9003 (vminnmavq_p_f32): Likewise.
9004 (vminnmvq_p_f32): Likewise.
9005 (vmlaldavq_p_s32): Likewise.
9006 (vmlaldavxq_p_s32): Likewise.
9007 (vmlsldavq_p_s32): Likewise.
9008 (vmlsldavxq_p_s32): Likewise.
9009 (vmovlbq_m_s16): Likewise.
9010 (vmovltq_m_s16): Likewise.
9011 (vmovnbq_m_s32): Likewise.
9012 (vmovntq_m_s32): Likewise.
9013 (vnegq_m_f32): Likewise.
9014 (vpselq_f32): Likewise.
9015 (vqmovnbq_m_s32): Likewise.
9016 (vqmovntq_m_s32): Likewise.
9017 (vrev32q_m_s16): Likewise.
9018 (vrev64q_m_f32): Likewise.
9019 (vrndaq_m_f32): Likewise.
9020 (vrndmq_m_f32): Likewise.
9021 (vrndnq_m_f32): Likewise.
9022 (vrndpq_m_f32): Likewise.
9023 (vrndq_m_f32): Likewise.
9024 (vrndxq_m_f32): Likewise.
9025 (vcmpeqq_m_n_f32): Likewise.
9026 (vcmpgeq_m_f32): Likewise.
9027 (vcmpgeq_m_n_f32): Likewise.
9028 (vcmpgtq_m_f32): Likewise.
9029 (vcmpgtq_m_n_f32): Likewise.
9030 (vcmpleq_m_f32): Likewise.
9031 (vcmpleq_m_n_f32): Likewise.
9032 (vcmpltq_m_f32): Likewise.
9033 (vcmpltq_m_n_f32): Likewise.
9034 (vcmpneq_m_f32): Likewise.
9035 (vcmpneq_m_n_f32): Likewise.
9036 (vmvnq_m_n_u32): Likewise.
9037 (vorrq_m_n_u32): Likewise.
9038 (vqrshruntq_n_s32): Likewise.
9039 (vqshrunbq_n_s32): Likewise.
9040 (vqshruntq_n_s32): Likewise.
9041 (vcvtmq_m_u32_f32): Likewise.
9042 (vcvtnq_m_u32_f32): Likewise.
9043 (vcvtpq_m_u32_f32): Likewise.
9044 (vcvtq_m_u32_f32): Likewise.
9045 (vqmovunbq_m_s32): Likewise.
9046 (vqmovuntq_m_s32): Likewise.
9047 (vqrshrntq_n_u32): Likewise.
9048 (vqshrnbq_n_u32): Likewise.
9049 (vqshrntq_n_u32): Likewise.
9050 (vrshrnbq_n_u32): Likewise.
9051 (vrshrntq_n_u32): Likewise.
9052 (vshrnbq_n_u32): Likewise.
9053 (vshrntq_n_u32): Likewise.
9054 (vmlaldavaq_u32): Likewise.
9055 (vmlaldavaxq_u32): Likewise.
9056 (vmlaldavq_p_u32): Likewise.
9057 (vmlaldavxq_p_u32): Likewise.
9058 (vmovlbq_m_u16): Likewise.
9059 (vmovltq_m_u16): Likewise.
9060 (vmovnbq_m_u32): Likewise.
9061 (vmovntq_m_u32): Likewise.
9062 (vqmovnbq_m_u32): Likewise.
9063 (vqmovntq_m_u32): Likewise.
9064 (vrev32q_m_u16): Likewise.
9065 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
9066 (__arm_vrmlsldavhaq_s32): Likewise.
9067 (__arm_vrmlsldavhaxq_s32): Likewise.
9068 (__arm_vaddlvaq_p_s32): Likewise.
9069 (__arm_vrev16q_m_s8): Likewise.
9070 (__arm_vrmlaldavhq_p_s32): Likewise.
9071 (__arm_vrmlaldavhxq_p_s32): Likewise.
9072 (__arm_vrmlsldavhq_p_s32): Likewise.
9073 (__arm_vrmlsldavhxq_p_s32): Likewise.
9074 (__arm_vaddlvaq_p_u32): Likewise.
9075 (__arm_vrev16q_m_u8): Likewise.
9076 (__arm_vrmlaldavhq_p_u32): Likewise.
9077 (__arm_vmvnq_m_n_s16): Likewise.
9078 (__arm_vorrq_m_n_s16): Likewise.
9079 (__arm_vqrshrntq_n_s16): Likewise.
9080 (__arm_vqshrnbq_n_s16): Likewise.
9081 (__arm_vqshrntq_n_s16): Likewise.
9082 (__arm_vrshrnbq_n_s16): Likewise.
9083 (__arm_vrshrntq_n_s16): Likewise.
9084 (__arm_vshrnbq_n_s16): Likewise.
9085 (__arm_vshrntq_n_s16): Likewise.
9086 (__arm_vmlaldavaq_s16): Likewise.
9087 (__arm_vmlaldavaxq_s16): Likewise.
9088 (__arm_vmlsldavaq_s16): Likewise.
9089 (__arm_vmlsldavaxq_s16): Likewise.
9090 (__arm_vmlaldavq_p_s16): Likewise.
9091 (__arm_vmlaldavxq_p_s16): Likewise.
9092 (__arm_vmlsldavq_p_s16): Likewise.
9093 (__arm_vmlsldavxq_p_s16): Likewise.
9094 (__arm_vmovlbq_m_s8): Likewise.
9095 (__arm_vmovltq_m_s8): Likewise.
9096 (__arm_vmovnbq_m_s16): Likewise.
9097 (__arm_vmovntq_m_s16): Likewise.
9098 (__arm_vqmovnbq_m_s16): Likewise.
9099 (__arm_vqmovntq_m_s16): Likewise.
9100 (__arm_vrev32q_m_s8): Likewise.
9101 (__arm_vmvnq_m_n_u16): Likewise.
9102 (__arm_vorrq_m_n_u16): Likewise.
9103 (__arm_vqrshruntq_n_s16): Likewise.
9104 (__arm_vqshrunbq_n_s16): Likewise.
9105 (__arm_vqshruntq_n_s16): Likewise.
9106 (__arm_vqmovunbq_m_s16): Likewise.
9107 (__arm_vqmovuntq_m_s16): Likewise.
9108 (__arm_vqrshrntq_n_u16): Likewise.
9109 (__arm_vqshrnbq_n_u16): Likewise.
9110 (__arm_vqshrntq_n_u16): Likewise.
9111 (__arm_vrshrnbq_n_u16): Likewise.
9112 (__arm_vrshrntq_n_u16): Likewise.
9113 (__arm_vshrnbq_n_u16): Likewise.
9114 (__arm_vshrntq_n_u16): Likewise.
9115 (__arm_vmlaldavaq_u16): Likewise.
9116 (__arm_vmlaldavaxq_u16): Likewise.
9117 (__arm_vmlaldavq_p_u16): Likewise.
9118 (__arm_vmlaldavxq_p_u16): Likewise.
9119 (__arm_vmovlbq_m_u8): Likewise.
9120 (__arm_vmovltq_m_u8): Likewise.
9121 (__arm_vmovnbq_m_u16): Likewise.
9122 (__arm_vmovntq_m_u16): Likewise.
9123 (__arm_vqmovnbq_m_u16): Likewise.
9124 (__arm_vqmovntq_m_u16): Likewise.
9125 (__arm_vrev32q_m_u8): Likewise.
9126 (__arm_vmvnq_m_n_s32): Likewise.
9127 (__arm_vorrq_m_n_s32): Likewise.
9128 (__arm_vqrshrntq_n_s32): Likewise.
9129 (__arm_vqshrnbq_n_s32): Likewise.
9130 (__arm_vqshrntq_n_s32): Likewise.
9131 (__arm_vrshrnbq_n_s32): Likewise.
9132 (__arm_vrshrntq_n_s32): Likewise.
9133 (__arm_vshrnbq_n_s32): Likewise.
9134 (__arm_vshrntq_n_s32): Likewise.
9135 (__arm_vmlaldavaq_s32): Likewise.
9136 (__arm_vmlaldavaxq_s32): Likewise.
9137 (__arm_vmlsldavaq_s32): Likewise.
9138 (__arm_vmlsldavaxq_s32): Likewise.
9139 (__arm_vmlaldavq_p_s32): Likewise.
9140 (__arm_vmlaldavxq_p_s32): Likewise.
9141 (__arm_vmlsldavq_p_s32): Likewise.
9142 (__arm_vmlsldavxq_p_s32): Likewise.
9143 (__arm_vmovlbq_m_s16): Likewise.
9144 (__arm_vmovltq_m_s16): Likewise.
9145 (__arm_vmovnbq_m_s32): Likewise.
9146 (__arm_vmovntq_m_s32): Likewise.
9147 (__arm_vqmovnbq_m_s32): Likewise.
9148 (__arm_vqmovntq_m_s32): Likewise.
9149 (__arm_vrev32q_m_s16): Likewise.
9150 (__arm_vmvnq_m_n_u32): Likewise.
9151 (__arm_vorrq_m_n_u32): Likewise.
9152 (__arm_vqrshruntq_n_s32): Likewise.
9153 (__arm_vqshrunbq_n_s32): Likewise.
9154 (__arm_vqshruntq_n_s32): Likewise.
9155 (__arm_vqmovunbq_m_s32): Likewise.
9156 (__arm_vqmovuntq_m_s32): Likewise.
9157 (__arm_vqrshrntq_n_u32): Likewise.
9158 (__arm_vqshrnbq_n_u32): Likewise.
9159 (__arm_vqshrntq_n_u32): Likewise.
9160 (__arm_vrshrnbq_n_u32): Likewise.
9161 (__arm_vrshrntq_n_u32): Likewise.
9162 (__arm_vshrnbq_n_u32): Likewise.
9163 (__arm_vshrntq_n_u32): Likewise.
9164 (__arm_vmlaldavaq_u32): Likewise.
9165 (__arm_vmlaldavaxq_u32): Likewise.
9166 (__arm_vmlaldavq_p_u32): Likewise.
9167 (__arm_vmlaldavxq_p_u32): Likewise.
9168 (__arm_vmovlbq_m_u16): Likewise.
9169 (__arm_vmovltq_m_u16): Likewise.
9170 (__arm_vmovnbq_m_u32): Likewise.
9171 (__arm_vmovntq_m_u32): Likewise.
9172 (__arm_vqmovnbq_m_u32): Likewise.
9173 (__arm_vqmovntq_m_u32): Likewise.
9174 (__arm_vrev32q_m_u16): Likewise.
9175 (__arm_vcvtbq_m_f16_f32): Likewise.
9176 (__arm_vcvtbq_m_f32_f16): Likewise.
9177 (__arm_vcvttq_m_f16_f32): Likewise.
9178 (__arm_vcvttq_m_f32_f16): Likewise.
9179 (__arm_vrev32q_m_f16): Likewise.
9180 (__arm_vcmlaq_f16): Likewise.
9181 (__arm_vcmlaq_rot180_f16): Likewise.
9182 (__arm_vcmlaq_rot270_f16): Likewise.
9183 (__arm_vcmlaq_rot90_f16): Likewise.
9184 (__arm_vfmaq_f16): Likewise.
9185 (__arm_vfmaq_n_f16): Likewise.
9186 (__arm_vfmasq_n_f16): Likewise.
9187 (__arm_vfmsq_f16): Likewise.
9188 (__arm_vabsq_m_f16): Likewise.
9189 (__arm_vcvtmq_m_s16_f16): Likewise.
9190 (__arm_vcvtnq_m_s16_f16): Likewise.
9191 (__arm_vcvtpq_m_s16_f16): Likewise.
9192 (__arm_vcvtq_m_s16_f16): Likewise.
9193 (__arm_vdupq_m_n_f16): Likewise.
9194 (__arm_vmaxnmaq_m_f16): Likewise.
9195 (__arm_vmaxnmavq_p_f16): Likewise.
9196 (__arm_vmaxnmvq_p_f16): Likewise.
9197 (__arm_vminnmaq_m_f16): Likewise.
9198 (__arm_vminnmavq_p_f16): Likewise.
9199 (__arm_vminnmvq_p_f16): Likewise.
9200 (__arm_vnegq_m_f16): Likewise.
9201 (__arm_vpselq_f16): Likewise.
9202 (__arm_vrev64q_m_f16): Likewise.
9203 (__arm_vrndaq_m_f16): Likewise.
9204 (__arm_vrndmq_m_f16): Likewise.
9205 (__arm_vrndnq_m_f16): Likewise.
9206 (__arm_vrndpq_m_f16): Likewise.
9207 (__arm_vrndq_m_f16): Likewise.
9208 (__arm_vrndxq_m_f16): Likewise.
9209 (__arm_vcmpeqq_m_n_f16): Likewise.
9210 (__arm_vcmpgeq_m_f16): Likewise.
9211 (__arm_vcmpgeq_m_n_f16): Likewise.
9212 (__arm_vcmpgtq_m_f16): Likewise.
9213 (__arm_vcmpgtq_m_n_f16): Likewise.
9214 (__arm_vcmpleq_m_f16): Likewise.
9215 (__arm_vcmpleq_m_n_f16): Likewise.
9216 (__arm_vcmpltq_m_f16): Likewise.
9217 (__arm_vcmpltq_m_n_f16): Likewise.
9218 (__arm_vcmpneq_m_f16): Likewise.
9219 (__arm_vcmpneq_m_n_f16): Likewise.
9220 (__arm_vcvtmq_m_u16_f16): Likewise.
9221 (__arm_vcvtnq_m_u16_f16): Likewise.
9222 (__arm_vcvtpq_m_u16_f16): Likewise.
9223 (__arm_vcvtq_m_u16_f16): Likewise.
9224 (__arm_vcmlaq_f32): Likewise.
9225 (__arm_vcmlaq_rot180_f32): Likewise.
9226 (__arm_vcmlaq_rot270_f32): Likewise.
9227 (__arm_vcmlaq_rot90_f32): Likewise.
9228 (__arm_vfmaq_f32): Likewise.
9229 (__arm_vfmaq_n_f32): Likewise.
9230 (__arm_vfmasq_n_f32): Likewise.
9231 (__arm_vfmsq_f32): Likewise.
9232 (__arm_vabsq_m_f32): Likewise.
9233 (__arm_vcvtmq_m_s32_f32): Likewise.
9234 (__arm_vcvtnq_m_s32_f32): Likewise.
9235 (__arm_vcvtpq_m_s32_f32): Likewise.
9236 (__arm_vcvtq_m_s32_f32): Likewise.
9237 (__arm_vdupq_m_n_f32): Likewise.
9238 (__arm_vmaxnmaq_m_f32): Likewise.
9239 (__arm_vmaxnmavq_p_f32): Likewise.
9240 (__arm_vmaxnmvq_p_f32): Likewise.
9241 (__arm_vminnmaq_m_f32): Likewise.
9242 (__arm_vminnmavq_p_f32): Likewise.
9243 (__arm_vminnmvq_p_f32): Likewise.
9244 (__arm_vnegq_m_f32): Likewise.
9245 (__arm_vpselq_f32): Likewise.
9246 (__arm_vrev64q_m_f32): Likewise.
9247 (__arm_vrndaq_m_f32): Likewise.
9248 (__arm_vrndmq_m_f32): Likewise.
9249 (__arm_vrndnq_m_f32): Likewise.
9250 (__arm_vrndpq_m_f32): Likewise.
9251 (__arm_vrndq_m_f32): Likewise.
9252 (__arm_vrndxq_m_f32): Likewise.
9253 (__arm_vcmpeqq_m_n_f32): Likewise.
9254 (__arm_vcmpgeq_m_f32): Likewise.
9255 (__arm_vcmpgeq_m_n_f32): Likewise.
9256 (__arm_vcmpgtq_m_f32): Likewise.
9257 (__arm_vcmpgtq_m_n_f32): Likewise.
9258 (__arm_vcmpleq_m_f32): Likewise.
9259 (__arm_vcmpleq_m_n_f32): Likewise.
9260 (__arm_vcmpltq_m_f32): Likewise.
9261 (__arm_vcmpltq_m_n_f32): Likewise.
9262 (__arm_vcmpneq_m_f32): Likewise.
9263 (__arm_vcmpneq_m_n_f32): Likewise.
9264 (__arm_vcvtmq_m_u32_f32): Likewise.
9265 (__arm_vcvtnq_m_u32_f32): Likewise.
9266 (__arm_vcvtpq_m_u32_f32): Likewise.
9267 (__arm_vcvtq_m_u32_f32): Likewise.
9268 (vcvtq_m): Define polymorphic variant.
9269 (vabsq_m): Likewise.
9271 (vcmlaq_rot180): Likewise.
9272 (vcmlaq_rot270): Likewise.
9273 (vcmlaq_rot90): Likewise.
9274 (vcmpeqq_m_n): Likewise.
9275 (vcmpgeq_m_n): Likewise.
9276 (vrndxq_m): Likewise.
9277 (vrndq_m): Likewise.
9278 (vrndpq_m): Likewise.
9279 (vcmpgtq_m_n): Likewise.
9280 (vcmpgtq_m): Likewise.
9281 (vcmpleq_m): Likewise.
9282 (vcmpleq_m_n): Likewise.
9283 (vcmpltq_m_n): Likewise.
9284 (vcmpltq_m): Likewise.
9285 (vcmpneq_m): Likewise.
9286 (vcmpneq_m_n): Likewise.
9287 (vcvtbq_m): Likewise.
9288 (vcvttq_m): Likewise.
9289 (vcvtmq_m): Likewise.
9290 (vcvtnq_m): Likewise.
9291 (vcvtpq_m): Likewise.
9292 (vdupq_m_n): Likewise.
9293 (vfmaq_n): Likewise.
9295 (vfmasq_n): Likewise.
9297 (vmaxnmaq_m): Likewise.
9298 (vmaxnmavq_m): Likewise.
9299 (vmaxnmvq_m): Likewise.
9300 (vmaxnmavq_p): Likewise.
9301 (vmaxnmvq_p): Likewise.
9302 (vminnmaq_m): Likewise.
9303 (vminnmavq_p): Likewise.
9304 (vminnmvq_p): Likewise.
9305 (vrndnq_m): Likewise.
9306 (vrndaq_m): Likewise.
9307 (vrndmq_m): Likewise.
9308 (vrev64q_m): Likewise.
9309 (vrev32q_m): Likewise.
9311 (vnegq_m): Likewise.
9312 (vcmpgeq_m): Likewise.
9313 (vshrntq_n): Likewise.
9314 (vrshrntq_n): Likewise.
9315 (vmovlbq_m): Likewise.
9316 (vmovnbq_m): Likewise.
9317 (vmovntq_m): Likewise.
9318 (vmvnq_m_n): Likewise.
9319 (vmvnq_m): Likewise.
9320 (vshrnbq_n): Likewise.
9321 (vrshrnbq_n): Likewise.
9322 (vqshruntq_n): Likewise.
9323 (vrev16q_m): Likewise.
9324 (vqshrunbq_n): Likewise.
9325 (vqshrntq_n): Likewise.
9326 (vqrshruntq_n): Likewise.
9327 (vqrshrntq_n): Likewise.
9328 (vqshrnbq_n): Likewise.
9329 (vqmovuntq_m): Likewise.
9330 (vqmovntq_m): Likewise.
9331 (vqmovnbq_m): Likewise.
9332 (vorrq_m_n): Likewise.
9333 (vmovltq_m): Likewise.
9334 (vqmovunbq_m): Likewise.
9335 (vaddlvaq_p): Likewise.
9336 (vmlaldavaq): Likewise.
9337 (vmlaldavaxq): Likewise.
9338 (vmlaldavq_p): Likewise.
9339 (vmlaldavxq_p): Likewise.
9340 (vmlsldavaq): Likewise.
9341 (vmlsldavaxq): Likewise.
9342 (vmlsldavq_p): Likewise.
9343 (vmlsldavxq_p): Likewise.
9344 (vrmlaldavhaxq): Likewise.
9345 (vrmlaldavhq_p): Likewise.
9346 (vrmlaldavhxq_p): Likewise.
9347 (vrmlsldavhaq): Likewise.
9348 (vrmlsldavhaxq): Likewise.
9349 (vrmlsldavhq_p): Likewise.
9350 (vrmlsldavhxq_p): Likewise.
9351 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
9353 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
9354 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
9355 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
9356 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
9357 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
9358 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
9359 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
9360 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
9361 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
9362 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
9363 (MVE_pred3): Likewise.
9364 (MVE_constraint1): Likewise.
9365 (MVE_pred1): Likewise.
9366 (VMLALDAVQ_P): Define iterator.
9367 (VQMOVNBQ_M): Likewise.
9368 (VMOVLTQ_M): Likewise.
9369 (VMOVNBQ_M): Likewise.
9370 (VRSHRNTQ_N): Likewise.
9371 (VORRQ_M_N): Likewise.
9372 (VREV32Q_M): Likewise.
9373 (VREV16Q_M): Likewise.
9374 (VQRSHRNTQ_N): Likewise.
9375 (VMOVNTQ_M): Likewise.
9376 (VMOVLBQ_M): Likewise.
9377 (VMLALDAVAQ): Likewise.
9378 (VQSHRNBQ_N): Likewise.
9379 (VSHRNBQ_N): Likewise.
9380 (VRSHRNBQ_N): Likewise.
9381 (VMLALDAVXQ_P): Likewise.
9382 (VQMOVNTQ_M): Likewise.
9383 (VMVNQ_M_N): Likewise.
9384 (VQSHRNTQ_N): Likewise.
9385 (VMLALDAVAXQ): Likewise.
9386 (VSHRNTQ_N): Likewise.
9387 (VCVTMQ_M): Likewise.
9388 (VCVTNQ_M): Likewise.
9389 (VCVTPQ_M): Likewise.
9390 (VCVTQ_M_N_FROM_F): Likewise.
9391 (VCVTQ_M_FROM_F): Likewise.
9392 (VRMLALDAVHQ_P): Likewise.
9393 (VADDLVAQ_P): Likewise.
9394 (mve_vrndq_m_f<mode>): Define RTL pattern.
9395 (mve_vabsq_m_f<mode>): Likewise.
9396 (mve_vaddlvaq_p_<supf>v4si): Likewise.
9397 (mve_vcmlaq_f<mode>): Likewise.
9398 (mve_vcmlaq_rot180_f<mode>): Likewise.
9399 (mve_vcmlaq_rot270_f<mode>): Likewise.
9400 (mve_vcmlaq_rot90_f<mode>): Likewise.
9401 (mve_vcmpeqq_m_n_f<mode>): Likewise.
9402 (mve_vcmpgeq_m_f<mode>): Likewise.
9403 (mve_vcmpgeq_m_n_f<mode>): Likewise.
9404 (mve_vcmpgtq_m_f<mode>): Likewise.
9405 (mve_vcmpgtq_m_n_f<mode>): Likewise.
9406 (mve_vcmpleq_m_f<mode>): Likewise.
9407 (mve_vcmpleq_m_n_f<mode>): Likewise.
9408 (mve_vcmpltq_m_f<mode>): Likewise.
9409 (mve_vcmpltq_m_n_f<mode>): Likewise.
9410 (mve_vcmpneq_m_f<mode>): Likewise.
9411 (mve_vcmpneq_m_n_f<mode>): Likewise.
9412 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
9413 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
9414 (mve_vcvttq_m_f16_f32v8hf): Likewise.
9415 (mve_vcvttq_m_f32_f16v4sf): Likewise.
9416 (mve_vdupq_m_n_f<mode>): Likewise.
9417 (mve_vfmaq_f<mode>): Likewise.
9418 (mve_vfmaq_n_f<mode>): Likewise.
9419 (mve_vfmasq_n_f<mode>): Likewise.
9420 (mve_vfmsq_f<mode>): Likewise.
9421 (mve_vmaxnmaq_m_f<mode>): Likewise.
9422 (mve_vmaxnmavq_p_f<mode>): Likewise.
9423 (mve_vmaxnmvq_p_f<mode>): Likewise.
9424 (mve_vminnmaq_m_f<mode>): Likewise.
9425 (mve_vminnmavq_p_f<mode>): Likewise.
9426 (mve_vminnmvq_p_f<mode>): Likewise.
9427 (mve_vmlaldavaq_<supf><mode>): Likewise.
9428 (mve_vmlaldavaxq_<supf><mode>): Likewise.
9429 (mve_vmlaldavq_p_<supf><mode>): Likewise.
9430 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
9431 (mve_vmlsldavaq_s<mode>): Likewise.
9432 (mve_vmlsldavaxq_s<mode>): Likewise.
9433 (mve_vmlsldavq_p_s<mode>): Likewise.
9434 (mve_vmlsldavxq_p_s<mode>): Likewise.
9435 (mve_vmovlbq_m_<supf><mode>): Likewise.
9436 (mve_vmovltq_m_<supf><mode>): Likewise.
9437 (mve_vmovnbq_m_<supf><mode>): Likewise.
9438 (mve_vmovntq_m_<supf><mode>): Likewise.
9439 (mve_vmvnq_m_n_<supf><mode>): Likewise.
9440 (mve_vnegq_m_f<mode>): Likewise.
9441 (mve_vorrq_m_n_<supf><mode>): Likewise.
9442 (mve_vpselq_f<mode>): Likewise.
9443 (mve_vqmovnbq_m_<supf><mode>): Likewise.
9444 (mve_vqmovntq_m_<supf><mode>): Likewise.
9445 (mve_vqmovunbq_m_s<mode>): Likewise.
9446 (mve_vqmovuntq_m_s<mode>): Likewise.
9447 (mve_vqrshrntq_n_<supf><mode>): Likewise.
9448 (mve_vqrshruntq_n_s<mode>): Likewise.
9449 (mve_vqshrnbq_n_<supf><mode>): Likewise.
9450 (mve_vqshrntq_n_<supf><mode>): Likewise.
9451 (mve_vqshrunbq_n_s<mode>): Likewise.
9452 (mve_vqshruntq_n_s<mode>): Likewise.
9453 (mve_vrev32q_m_fv8hf): Likewise.
9454 (mve_vrev32q_m_<supf><mode>): Likewise.
9455 (mve_vrev64q_m_f<mode>): Likewise.
9456 (mve_vrmlaldavhaxq_sv4si): Likewise.
9457 (mve_vrmlaldavhxq_p_sv4si): Likewise.
9458 (mve_vrmlsldavhaxq_sv4si): Likewise.
9459 (mve_vrmlsldavhq_p_sv4si): Likewise.
9460 (mve_vrmlsldavhxq_p_sv4si): Likewise.
9461 (mve_vrndaq_m_f<mode>): Likewise.
9462 (mve_vrndmq_m_f<mode>): Likewise.
9463 (mve_vrndnq_m_f<mode>): Likewise.
9464 (mve_vrndpq_m_f<mode>): Likewise.
9465 (mve_vrndxq_m_f<mode>): Likewise.
9466 (mve_vrshrnbq_n_<supf><mode>): Likewise.
9467 (mve_vrshrntq_n_<supf><mode>): Likewise.
9468 (mve_vshrnbq_n_<supf><mode>): Likewise.
9469 (mve_vshrntq_n_<supf><mode>): Likewise.
9470 (mve_vcvtmq_m_<supf><mode>): Likewise.
9471 (mve_vcvtpq_m_<supf><mode>): Likewise.
9472 (mve_vcvtnq_m_<supf><mode>): Likewise.
9473 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
9474 (mve_vrev16q_m_<supf>v16qi): Likewise.
9475 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
9476 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
9477 (mve_vrmlsldavhaq_sv4si): Likewise.
9479 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9480 Mihail Ionescu <mihail.ionescu@arm.com>
9481 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9483 * config/arm/arm_mve.h (vpselq_u8): Define macro.
9484 (vpselq_s8): Likewise.
9485 (vrev64q_m_u8): Likewise.
9486 (vqrdmlashq_n_u8): Likewise.
9487 (vqrdmlahq_n_u8): Likewise.
9488 (vqdmlahq_n_u8): Likewise.
9489 (vmvnq_m_u8): Likewise.
9490 (vmlasq_n_u8): Likewise.
9491 (vmlaq_n_u8): Likewise.
9492 (vmladavq_p_u8): Likewise.
9493 (vmladavaq_u8): Likewise.
9494 (vminvq_p_u8): Likewise.
9495 (vmaxvq_p_u8): Likewise.
9496 (vdupq_m_n_u8): Likewise.
9497 (vcmpneq_m_u8): Likewise.
9498 (vcmpneq_m_n_u8): Likewise.
9499 (vcmphiq_m_u8): Likewise.
9500 (vcmphiq_m_n_u8): Likewise.
9501 (vcmpeqq_m_u8): Likewise.
9502 (vcmpeqq_m_n_u8): Likewise.
9503 (vcmpcsq_m_u8): Likewise.
9504 (vcmpcsq_m_n_u8): Likewise.
9505 (vclzq_m_u8): Likewise.
9506 (vaddvaq_p_u8): Likewise.
9507 (vsriq_n_u8): Likewise.
9508 (vsliq_n_u8): Likewise.
9509 (vshlq_m_r_u8): Likewise.
9510 (vrshlq_m_n_u8): Likewise.
9511 (vqshlq_m_r_u8): Likewise.
9512 (vqrshlq_m_n_u8): Likewise.
9513 (vminavq_p_s8): Likewise.
9514 (vminaq_m_s8): Likewise.
9515 (vmaxavq_p_s8): Likewise.
9516 (vmaxaq_m_s8): Likewise.
9517 (vcmpneq_m_s8): Likewise.
9518 (vcmpneq_m_n_s8): Likewise.
9519 (vcmpltq_m_s8): Likewise.
9520 (vcmpltq_m_n_s8): Likewise.
9521 (vcmpleq_m_s8): Likewise.
9522 (vcmpleq_m_n_s8): Likewise.
9523 (vcmpgtq_m_s8): Likewise.
9524 (vcmpgtq_m_n_s8): Likewise.
9525 (vcmpgeq_m_s8): Likewise.
9526 (vcmpgeq_m_n_s8): Likewise.
9527 (vcmpeqq_m_s8): Likewise.
9528 (vcmpeqq_m_n_s8): Likewise.
9529 (vshlq_m_r_s8): Likewise.
9530 (vrshlq_m_n_s8): Likewise.
9531 (vrev64q_m_s8): Likewise.
9532 (vqshlq_m_r_s8): Likewise.
9533 (vqrshlq_m_n_s8): Likewise.
9534 (vqnegq_m_s8): Likewise.
9535 (vqabsq_m_s8): Likewise.
9536 (vnegq_m_s8): Likewise.
9537 (vmvnq_m_s8): Likewise.
9538 (vmlsdavxq_p_s8): Likewise.
9539 (vmlsdavq_p_s8): Likewise.
9540 (vmladavxq_p_s8): Likewise.
9541 (vmladavq_p_s8): Likewise.
9542 (vminvq_p_s8): Likewise.
9543 (vmaxvq_p_s8): Likewise.
9544 (vdupq_m_n_s8): Likewise.
9545 (vclzq_m_s8): Likewise.
9546 (vclsq_m_s8): Likewise.
9547 (vaddvaq_p_s8): Likewise.
9548 (vabsq_m_s8): Likewise.
9549 (vqrdmlsdhxq_s8): Likewise.
9550 (vqrdmlsdhq_s8): Likewise.
9551 (vqrdmlashq_n_s8): Likewise.
9552 (vqrdmlahq_n_s8): Likewise.
9553 (vqrdmladhxq_s8): Likewise.
9554 (vqrdmladhq_s8): Likewise.
9555 (vqdmlsdhxq_s8): Likewise.
9556 (vqdmlsdhq_s8): Likewise.
9557 (vqdmlahq_n_s8): Likewise.
9558 (vqdmladhxq_s8): Likewise.
9559 (vqdmladhq_s8): Likewise.
9560 (vmlsdavaxq_s8): Likewise.
9561 (vmlsdavaq_s8): Likewise.
9562 (vmlasq_n_s8): Likewise.
9563 (vmlaq_n_s8): Likewise.
9564 (vmladavaxq_s8): Likewise.
9565 (vmladavaq_s8): Likewise.
9566 (vsriq_n_s8): Likewise.
9567 (vsliq_n_s8): Likewise.
9568 (vpselq_u16): Likewise.
9569 (vpselq_s16): Likewise.
9570 (vrev64q_m_u16): Likewise.
9571 (vqrdmlashq_n_u16): Likewise.
9572 (vqrdmlahq_n_u16): Likewise.
9573 (vqdmlahq_n_u16): Likewise.
9574 (vmvnq_m_u16): Likewise.
9575 (vmlasq_n_u16): Likewise.
9576 (vmlaq_n_u16): Likewise.
9577 (vmladavq_p_u16): Likewise.
9578 (vmladavaq_u16): Likewise.
9579 (vminvq_p_u16): Likewise.
9580 (vmaxvq_p_u16): Likewise.
9581 (vdupq_m_n_u16): Likewise.
9582 (vcmpneq_m_u16): Likewise.
9583 (vcmpneq_m_n_u16): Likewise.
9584 (vcmphiq_m_u16): Likewise.
9585 (vcmphiq_m_n_u16): Likewise.
9586 (vcmpeqq_m_u16): Likewise.
9587 (vcmpeqq_m_n_u16): Likewise.
9588 (vcmpcsq_m_u16): Likewise.
9589 (vcmpcsq_m_n_u16): Likewise.
9590 (vclzq_m_u16): Likewise.
9591 (vaddvaq_p_u16): Likewise.
9592 (vsriq_n_u16): Likewise.
9593 (vsliq_n_u16): Likewise.
9594 (vshlq_m_r_u16): Likewise.
9595 (vrshlq_m_n_u16): Likewise.
9596 (vqshlq_m_r_u16): Likewise.
9597 (vqrshlq_m_n_u16): Likewise.
9598 (vminavq_p_s16): Likewise.
9599 (vminaq_m_s16): Likewise.
9600 (vmaxavq_p_s16): Likewise.
9601 (vmaxaq_m_s16): Likewise.
9602 (vcmpneq_m_s16): Likewise.
9603 (vcmpneq_m_n_s16): Likewise.
9604 (vcmpltq_m_s16): Likewise.
9605 (vcmpltq_m_n_s16): Likewise.
9606 (vcmpleq_m_s16): Likewise.
9607 (vcmpleq_m_n_s16): Likewise.
9608 (vcmpgtq_m_s16): Likewise.
9609 (vcmpgtq_m_n_s16): Likewise.
9610 (vcmpgeq_m_s16): Likewise.
9611 (vcmpgeq_m_n_s16): Likewise.
9612 (vcmpeqq_m_s16): Likewise.
9613 (vcmpeqq_m_n_s16): Likewise.
9614 (vshlq_m_r_s16): Likewise.
9615 (vrshlq_m_n_s16): Likewise.
9616 (vrev64q_m_s16): Likewise.
9617 (vqshlq_m_r_s16): Likewise.
9618 (vqrshlq_m_n_s16): Likewise.
9619 (vqnegq_m_s16): Likewise.
9620 (vqabsq_m_s16): Likewise.
9621 (vnegq_m_s16): Likewise.
9622 (vmvnq_m_s16): Likewise.
9623 (vmlsdavxq_p_s16): Likewise.
9624 (vmlsdavq_p_s16): Likewise.
9625 (vmladavxq_p_s16): Likewise.
9626 (vmladavq_p_s16): Likewise.
9627 (vminvq_p_s16): Likewise.
9628 (vmaxvq_p_s16): Likewise.
9629 (vdupq_m_n_s16): Likewise.
9630 (vclzq_m_s16): Likewise.
9631 (vclsq_m_s16): Likewise.
9632 (vaddvaq_p_s16): Likewise.
9633 (vabsq_m_s16): Likewise.
9634 (vqrdmlsdhxq_s16): Likewise.
9635 (vqrdmlsdhq_s16): Likewise.
9636 (vqrdmlashq_n_s16): Likewise.
9637 (vqrdmlahq_n_s16): Likewise.
9638 (vqrdmladhxq_s16): Likewise.
9639 (vqrdmladhq_s16): Likewise.
9640 (vqdmlsdhxq_s16): Likewise.
9641 (vqdmlsdhq_s16): Likewise.
9642 (vqdmlahq_n_s16): Likewise.
9643 (vqdmladhxq_s16): Likewise.
9644 (vqdmladhq_s16): Likewise.
9645 (vmlsdavaxq_s16): Likewise.
9646 (vmlsdavaq_s16): Likewise.
9647 (vmlasq_n_s16): Likewise.
9648 (vmlaq_n_s16): Likewise.
9649 (vmladavaxq_s16): Likewise.
9650 (vmladavaq_s16): Likewise.
9651 (vsriq_n_s16): Likewise.
9652 (vsliq_n_s16): Likewise.
9653 (vpselq_u32): Likewise.
9654 (vpselq_s32): Likewise.
9655 (vrev64q_m_u32): Likewise.
9656 (vqrdmlashq_n_u32): Likewise.
9657 (vqrdmlahq_n_u32): Likewise.
9658 (vqdmlahq_n_u32): Likewise.
9659 (vmvnq_m_u32): Likewise.
9660 (vmlasq_n_u32): Likewise.
9661 (vmlaq_n_u32): Likewise.
9662 (vmladavq_p_u32): Likewise.
9663 (vmladavaq_u32): Likewise.
9664 (vminvq_p_u32): Likewise.
9665 (vmaxvq_p_u32): Likewise.
9666 (vdupq_m_n_u32): Likewise.
9667 (vcmpneq_m_u32): Likewise.
9668 (vcmpneq_m_n_u32): Likewise.
9669 (vcmphiq_m_u32): Likewise.
9670 (vcmphiq_m_n_u32): Likewise.
9671 (vcmpeqq_m_u32): Likewise.
9672 (vcmpeqq_m_n_u32): Likewise.
9673 (vcmpcsq_m_u32): Likewise.
9674 (vcmpcsq_m_n_u32): Likewise.
9675 (vclzq_m_u32): Likewise.
9676 (vaddvaq_p_u32): Likewise.
9677 (vsriq_n_u32): Likewise.
9678 (vsliq_n_u32): Likewise.
9679 (vshlq_m_r_u32): Likewise.
9680 (vrshlq_m_n_u32): Likewise.
9681 (vqshlq_m_r_u32): Likewise.
9682 (vqrshlq_m_n_u32): Likewise.
9683 (vminavq_p_s32): Likewise.
9684 (vminaq_m_s32): Likewise.
9685 (vmaxavq_p_s32): Likewise.
9686 (vmaxaq_m_s32): Likewise.
9687 (vcmpneq_m_s32): Likewise.
9688 (vcmpneq_m_n_s32): Likewise.
9689 (vcmpltq_m_s32): Likewise.
9690 (vcmpltq_m_n_s32): Likewise.
9691 (vcmpleq_m_s32): Likewise.
9692 (vcmpleq_m_n_s32): Likewise.
9693 (vcmpgtq_m_s32): Likewise.
9694 (vcmpgtq_m_n_s32): Likewise.
9695 (vcmpgeq_m_s32): Likewise.
9696 (vcmpgeq_m_n_s32): Likewise.
9697 (vcmpeqq_m_s32): Likewise.
9698 (vcmpeqq_m_n_s32): Likewise.
9699 (vshlq_m_r_s32): Likewise.
9700 (vrshlq_m_n_s32): Likewise.
9701 (vrev64q_m_s32): Likewise.
9702 (vqshlq_m_r_s32): Likewise.
9703 (vqrshlq_m_n_s32): Likewise.
9704 (vqnegq_m_s32): Likewise.
9705 (vqabsq_m_s32): Likewise.
9706 (vnegq_m_s32): Likewise.
9707 (vmvnq_m_s32): Likewise.
9708 (vmlsdavxq_p_s32): Likewise.
9709 (vmlsdavq_p_s32): Likewise.
9710 (vmladavxq_p_s32): Likewise.
9711 (vmladavq_p_s32): Likewise.
9712 (vminvq_p_s32): Likewise.
9713 (vmaxvq_p_s32): Likewise.
9714 (vdupq_m_n_s32): Likewise.
9715 (vclzq_m_s32): Likewise.
9716 (vclsq_m_s32): Likewise.
9717 (vaddvaq_p_s32): Likewise.
9718 (vabsq_m_s32): Likewise.
9719 (vqrdmlsdhxq_s32): Likewise.
9720 (vqrdmlsdhq_s32): Likewise.
9721 (vqrdmlashq_n_s32): Likewise.
9722 (vqrdmlahq_n_s32): Likewise.
9723 (vqrdmladhxq_s32): Likewise.
9724 (vqrdmladhq_s32): Likewise.
9725 (vqdmlsdhxq_s32): Likewise.
9726 (vqdmlsdhq_s32): Likewise.
9727 (vqdmlahq_n_s32): Likewise.
9728 (vqdmladhxq_s32): Likewise.
9729 (vqdmladhq_s32): Likewise.
9730 (vmlsdavaxq_s32): Likewise.
9731 (vmlsdavaq_s32): Likewise.
9732 (vmlasq_n_s32): Likewise.
9733 (vmlaq_n_s32): Likewise.
9734 (vmladavaxq_s32): Likewise.
9735 (vmladavaq_s32): Likewise.
9736 (vsriq_n_s32): Likewise.
9737 (vsliq_n_s32): Likewise.
9738 (vpselq_u64): Likewise.
9739 (vpselq_s64): Likewise.
9740 (__arm_vpselq_u8): Define intrinsic.
9741 (__arm_vpselq_s8): Likewise.
9742 (__arm_vrev64q_m_u8): Likewise.
9743 (__arm_vqrdmlashq_n_u8): Likewise.
9744 (__arm_vqrdmlahq_n_u8): Likewise.
9745 (__arm_vqdmlahq_n_u8): Likewise.
9746 (__arm_vmvnq_m_u8): Likewise.
9747 (__arm_vmlasq_n_u8): Likewise.
9748 (__arm_vmlaq_n_u8): Likewise.
9749 (__arm_vmladavq_p_u8): Likewise.
9750 (__arm_vmladavaq_u8): Likewise.
9751 (__arm_vminvq_p_u8): Likewise.
9752 (__arm_vmaxvq_p_u8): Likewise.
9753 (__arm_vdupq_m_n_u8): Likewise.
9754 (__arm_vcmpneq_m_u8): Likewise.
9755 (__arm_vcmpneq_m_n_u8): Likewise.
9756 (__arm_vcmphiq_m_u8): Likewise.
9757 (__arm_vcmphiq_m_n_u8): Likewise.
9758 (__arm_vcmpeqq_m_u8): Likewise.
9759 (__arm_vcmpeqq_m_n_u8): Likewise.
9760 (__arm_vcmpcsq_m_u8): Likewise.
9761 (__arm_vcmpcsq_m_n_u8): Likewise.
9762 (__arm_vclzq_m_u8): Likewise.
9763 (__arm_vaddvaq_p_u8): Likewise.
9764 (__arm_vsriq_n_u8): Likewise.
9765 (__arm_vsliq_n_u8): Likewise.
9766 (__arm_vshlq_m_r_u8): Likewise.
9767 (__arm_vrshlq_m_n_u8): Likewise.
9768 (__arm_vqshlq_m_r_u8): Likewise.
9769 (__arm_vqrshlq_m_n_u8): Likewise.
9770 (__arm_vminavq_p_s8): Likewise.
9771 (__arm_vminaq_m_s8): Likewise.
9772 (__arm_vmaxavq_p_s8): Likewise.
9773 (__arm_vmaxaq_m_s8): Likewise.
9774 (__arm_vcmpneq_m_s8): Likewise.
9775 (__arm_vcmpneq_m_n_s8): Likewise.
9776 (__arm_vcmpltq_m_s8): Likewise.
9777 (__arm_vcmpltq_m_n_s8): Likewise.
9778 (__arm_vcmpleq_m_s8): Likewise.
9779 (__arm_vcmpleq_m_n_s8): Likewise.
9780 (__arm_vcmpgtq_m_s8): Likewise.
9781 (__arm_vcmpgtq_m_n_s8): Likewise.
9782 (__arm_vcmpgeq_m_s8): Likewise.
9783 (__arm_vcmpgeq_m_n_s8): Likewise.
9784 (__arm_vcmpeqq_m_s8): Likewise.
9785 (__arm_vcmpeqq_m_n_s8): Likewise.
9786 (__arm_vshlq_m_r_s8): Likewise.
9787 (__arm_vrshlq_m_n_s8): Likewise.
9788 (__arm_vrev64q_m_s8): Likewise.
9789 (__arm_vqshlq_m_r_s8): Likewise.
9790 (__arm_vqrshlq_m_n_s8): Likewise.
9791 (__arm_vqnegq_m_s8): Likewise.
9792 (__arm_vqabsq_m_s8): Likewise.
9793 (__arm_vnegq_m_s8): Likewise.
9794 (__arm_vmvnq_m_s8): Likewise.
9795 (__arm_vmlsdavxq_p_s8): Likewise.
9796 (__arm_vmlsdavq_p_s8): Likewise.
9797 (__arm_vmladavxq_p_s8): Likewise.
9798 (__arm_vmladavq_p_s8): Likewise.
9799 (__arm_vminvq_p_s8): Likewise.
9800 (__arm_vmaxvq_p_s8): Likewise.
9801 (__arm_vdupq_m_n_s8): Likewise.
9802 (__arm_vclzq_m_s8): Likewise.
9803 (__arm_vclsq_m_s8): Likewise.
9804 (__arm_vaddvaq_p_s8): Likewise.
9805 (__arm_vabsq_m_s8): Likewise.
9806 (__arm_vqrdmlsdhxq_s8): Likewise.
9807 (__arm_vqrdmlsdhq_s8): Likewise.
9808 (__arm_vqrdmlashq_n_s8): Likewise.
9809 (__arm_vqrdmlahq_n_s8): Likewise.
9810 (__arm_vqrdmladhxq_s8): Likewise.
9811 (__arm_vqrdmladhq_s8): Likewise.
9812 (__arm_vqdmlsdhxq_s8): Likewise.
9813 (__arm_vqdmlsdhq_s8): Likewise.
9814 (__arm_vqdmlahq_n_s8): Likewise.
9815 (__arm_vqdmladhxq_s8): Likewise.
9816 (__arm_vqdmladhq_s8): Likewise.
9817 (__arm_vmlsdavaxq_s8): Likewise.
9818 (__arm_vmlsdavaq_s8): Likewise.
9819 (__arm_vmlasq_n_s8): Likewise.
9820 (__arm_vmlaq_n_s8): Likewise.
9821 (__arm_vmladavaxq_s8): Likewise.
9822 (__arm_vmladavaq_s8): Likewise.
9823 (__arm_vsriq_n_s8): Likewise.
9824 (__arm_vsliq_n_s8): Likewise.
9825 (__arm_vpselq_u16): Likewise.
9826 (__arm_vpselq_s16): Likewise.
9827 (__arm_vrev64q_m_u16): Likewise.
9828 (__arm_vqrdmlashq_n_u16): Likewise.
9829 (__arm_vqrdmlahq_n_u16): Likewise.
9830 (__arm_vqdmlahq_n_u16): Likewise.
9831 (__arm_vmvnq_m_u16): Likewise.
9832 (__arm_vmlasq_n_u16): Likewise.
9833 (__arm_vmlaq_n_u16): Likewise.
9834 (__arm_vmladavq_p_u16): Likewise.
9835 (__arm_vmladavaq_u16): Likewise.
9836 (__arm_vminvq_p_u16): Likewise.
9837 (__arm_vmaxvq_p_u16): Likewise.
9838 (__arm_vdupq_m_n_u16): Likewise.
9839 (__arm_vcmpneq_m_u16): Likewise.
9840 (__arm_vcmpneq_m_n_u16): Likewise.
9841 (__arm_vcmphiq_m_u16): Likewise.
9842 (__arm_vcmphiq_m_n_u16): Likewise.
9843 (__arm_vcmpeqq_m_u16): Likewise.
9844 (__arm_vcmpeqq_m_n_u16): Likewise.
9845 (__arm_vcmpcsq_m_u16): Likewise.
9846 (__arm_vcmpcsq_m_n_u16): Likewise.
9847 (__arm_vclzq_m_u16): Likewise.
9848 (__arm_vaddvaq_p_u16): Likewise.
9849 (__arm_vsriq_n_u16): Likewise.
9850 (__arm_vsliq_n_u16): Likewise.
9851 (__arm_vshlq_m_r_u16): Likewise.
9852 (__arm_vrshlq_m_n_u16): Likewise.
9853 (__arm_vqshlq_m_r_u16): Likewise.
9854 (__arm_vqrshlq_m_n_u16): Likewise.
9855 (__arm_vminavq_p_s16): Likewise.
9856 (__arm_vminaq_m_s16): Likewise.
9857 (__arm_vmaxavq_p_s16): Likewise.
9858 (__arm_vmaxaq_m_s16): Likewise.
9859 (__arm_vcmpneq_m_s16): Likewise.
9860 (__arm_vcmpneq_m_n_s16): Likewise.
9861 (__arm_vcmpltq_m_s16): Likewise.
9862 (__arm_vcmpltq_m_n_s16): Likewise.
9863 (__arm_vcmpleq_m_s16): Likewise.
9864 (__arm_vcmpleq_m_n_s16): Likewise.
9865 (__arm_vcmpgtq_m_s16): Likewise.
9866 (__arm_vcmpgtq_m_n_s16): Likewise.
9867 (__arm_vcmpgeq_m_s16): Likewise.
9868 (__arm_vcmpgeq_m_n_s16): Likewise.
9869 (__arm_vcmpeqq_m_s16): Likewise.
9870 (__arm_vcmpeqq_m_n_s16): Likewise.
9871 (__arm_vshlq_m_r_s16): Likewise.
9872 (__arm_vrshlq_m_n_s16): Likewise.
9873 (__arm_vrev64q_m_s16): Likewise.
9874 (__arm_vqshlq_m_r_s16): Likewise.
9875 (__arm_vqrshlq_m_n_s16): Likewise.
9876 (__arm_vqnegq_m_s16): Likewise.
9877 (__arm_vqabsq_m_s16): Likewise.
9878 (__arm_vnegq_m_s16): Likewise.
9879 (__arm_vmvnq_m_s16): Likewise.
9880 (__arm_vmlsdavxq_p_s16): Likewise.
9881 (__arm_vmlsdavq_p_s16): Likewise.
9882 (__arm_vmladavxq_p_s16): Likewise.
9883 (__arm_vmladavq_p_s16): Likewise.
9884 (__arm_vminvq_p_s16): Likewise.
9885 (__arm_vmaxvq_p_s16): Likewise.
9886 (__arm_vdupq_m_n_s16): Likewise.
9887 (__arm_vclzq_m_s16): Likewise.
9888 (__arm_vclsq_m_s16): Likewise.
9889 (__arm_vaddvaq_p_s16): Likewise.
9890 (__arm_vabsq_m_s16): Likewise.
9891 (__arm_vqrdmlsdhxq_s16): Likewise.
9892 (__arm_vqrdmlsdhq_s16): Likewise.
9893 (__arm_vqrdmlashq_n_s16): Likewise.
9894 (__arm_vqrdmlahq_n_s16): Likewise.
9895 (__arm_vqrdmladhxq_s16): Likewise.
9896 (__arm_vqrdmladhq_s16): Likewise.
9897 (__arm_vqdmlsdhxq_s16): Likewise.
9898 (__arm_vqdmlsdhq_s16): Likewise.
9899 (__arm_vqdmlahq_n_s16): Likewise.
9900 (__arm_vqdmladhxq_s16): Likewise.
9901 (__arm_vqdmladhq_s16): Likewise.
9902 (__arm_vmlsdavaxq_s16): Likewise.
9903 (__arm_vmlsdavaq_s16): Likewise.
9904 (__arm_vmlasq_n_s16): Likewise.
9905 (__arm_vmlaq_n_s16): Likewise.
9906 (__arm_vmladavaxq_s16): Likewise.
9907 (__arm_vmladavaq_s16): Likewise.
9908 (__arm_vsriq_n_s16): Likewise.
9909 (__arm_vsliq_n_s16): Likewise.
9910 (__arm_vpselq_u32): Likewise.
9911 (__arm_vpselq_s32): Likewise.
9912 (__arm_vrev64q_m_u32): Likewise.
9913 (__arm_vqrdmlashq_n_u32): Likewise.
9914 (__arm_vqrdmlahq_n_u32): Likewise.
9915 (__arm_vqdmlahq_n_u32): Likewise.
9916 (__arm_vmvnq_m_u32): Likewise.
9917 (__arm_vmlasq_n_u32): Likewise.
9918 (__arm_vmlaq_n_u32): Likewise.
9919 (__arm_vmladavq_p_u32): Likewise.
9920 (__arm_vmladavaq_u32): Likewise.
9921 (__arm_vminvq_p_u32): Likewise.
9922 (__arm_vmaxvq_p_u32): Likewise.
9923 (__arm_vdupq_m_n_u32): Likewise.
9924 (__arm_vcmpneq_m_u32): Likewise.
9925 (__arm_vcmpneq_m_n_u32): Likewise.
9926 (__arm_vcmphiq_m_u32): Likewise.
9927 (__arm_vcmphiq_m_n_u32): Likewise.
9928 (__arm_vcmpeqq_m_u32): Likewise.
9929 (__arm_vcmpeqq_m_n_u32): Likewise.
9930 (__arm_vcmpcsq_m_u32): Likewise.
9931 (__arm_vcmpcsq_m_n_u32): Likewise.
9932 (__arm_vclzq_m_u32): Likewise.
9933 (__arm_vaddvaq_p_u32): Likewise.
9934 (__arm_vsriq_n_u32): Likewise.
9935 (__arm_vsliq_n_u32): Likewise.
9936 (__arm_vshlq_m_r_u32): Likewise.
9937 (__arm_vrshlq_m_n_u32): Likewise.
9938 (__arm_vqshlq_m_r_u32): Likewise.
9939 (__arm_vqrshlq_m_n_u32): Likewise.
9940 (__arm_vminavq_p_s32): Likewise.
9941 (__arm_vminaq_m_s32): Likewise.
9942 (__arm_vmaxavq_p_s32): Likewise.
9943 (__arm_vmaxaq_m_s32): Likewise.
9944 (__arm_vcmpneq_m_s32): Likewise.
9945 (__arm_vcmpneq_m_n_s32): Likewise.
9946 (__arm_vcmpltq_m_s32): Likewise.
9947 (__arm_vcmpltq_m_n_s32): Likewise.
9948 (__arm_vcmpleq_m_s32): Likewise.
9949 (__arm_vcmpleq_m_n_s32): Likewise.
9950 (__arm_vcmpgtq_m_s32): Likewise.
9951 (__arm_vcmpgtq_m_n_s32): Likewise.
9952 (__arm_vcmpgeq_m_s32): Likewise.
9953 (__arm_vcmpgeq_m_n_s32): Likewise.
9954 (__arm_vcmpeqq_m_s32): Likewise.
9955 (__arm_vcmpeqq_m_n_s32): Likewise.
9956 (__arm_vshlq_m_r_s32): Likewise.
9957 (__arm_vrshlq_m_n_s32): Likewise.
9958 (__arm_vrev64q_m_s32): Likewise.
9959 (__arm_vqshlq_m_r_s32): Likewise.
9960 (__arm_vqrshlq_m_n_s32): Likewise.
9961 (__arm_vqnegq_m_s32): Likewise.
9962 (__arm_vqabsq_m_s32): Likewise.
9963 (__arm_vnegq_m_s32): Likewise.
9964 (__arm_vmvnq_m_s32): Likewise.
9965 (__arm_vmlsdavxq_p_s32): Likewise.
9966 (__arm_vmlsdavq_p_s32): Likewise.
9967 (__arm_vmladavxq_p_s32): Likewise.
9968 (__arm_vmladavq_p_s32): Likewise.
9969 (__arm_vminvq_p_s32): Likewise.
9970 (__arm_vmaxvq_p_s32): Likewise.
9971 (__arm_vdupq_m_n_s32): Likewise.
9972 (__arm_vclzq_m_s32): Likewise.
9973 (__arm_vclsq_m_s32): Likewise.
9974 (__arm_vaddvaq_p_s32): Likewise.
9975 (__arm_vabsq_m_s32): Likewise.
9976 (__arm_vqrdmlsdhxq_s32): Likewise.
9977 (__arm_vqrdmlsdhq_s32): Likewise.
9978 (__arm_vqrdmlashq_n_s32): Likewise.
9979 (__arm_vqrdmlahq_n_s32): Likewise.
9980 (__arm_vqrdmladhxq_s32): Likewise.
9981 (__arm_vqrdmladhq_s32): Likewise.
9982 (__arm_vqdmlsdhxq_s32): Likewise.
9983 (__arm_vqdmlsdhq_s32): Likewise.
9984 (__arm_vqdmlahq_n_s32): Likewise.
9985 (__arm_vqdmladhxq_s32): Likewise.
9986 (__arm_vqdmladhq_s32): Likewise.
9987 (__arm_vmlsdavaxq_s32): Likewise.
9988 (__arm_vmlsdavaq_s32): Likewise.
9989 (__arm_vmlasq_n_s32): Likewise.
9990 (__arm_vmlaq_n_s32): Likewise.
9991 (__arm_vmladavaxq_s32): Likewise.
9992 (__arm_vmladavaq_s32): Likewise.
9993 (__arm_vsriq_n_s32): Likewise.
9994 (__arm_vsliq_n_s32): Likewise.
9995 (__arm_vpselq_u64): Likewise.
9996 (__arm_vpselq_s64): Likewise.
9997 (vcmpneq_m_n): Define polymorphic variant.
9998 (vcmpneq_m): Likewise.
9999 (vqrdmlsdhq): Likewise.
10000 (vqrdmlsdhxq): Likewise.
10001 (vqrshlq_m_n): Likewise.
10002 (vqshlq_m_r): Likewise.
10003 (vrev64q_m): Likewise.
10004 (vrshlq_m_n): Likewise.
10005 (vshlq_m_r): Likewise.
10006 (vsliq_n): Likewise.
10007 (vsriq_n): Likewise.
10008 (vqrdmlashq_n): Likewise.
10009 (vqrdmlahq): Likewise.
10010 (vqrdmladhxq): Likewise.
10011 (vqrdmladhq): Likewise.
10012 (vqnegq_m): Likewise.
10013 (vqdmlsdhxq): Likewise.
10014 (vabsq_m): Likewise.
10015 (vclsq_m): Likewise.
10016 (vclzq_m): Likewise.
10017 (vcmpgeq_m): Likewise.
10018 (vcmpgeq_m_n): Likewise.
10019 (vdupq_m_n): Likewise.
10020 (vmaxaq_m): Likewise.
10021 (vmlaq_n): Likewise.
10022 (vmlasq_n): Likewise.
10023 (vmvnq_m): Likewise.
10024 (vnegq_m): Likewise.
10025 (vpselq): Likewise.
10026 (vqdmlahq_n): Likewise.
10027 (vqrdmlahq_n): Likewise.
10028 (vqdmlsdhq): Likewise.
10029 (vqdmladhq): Likewise.
10030 (vqabsq_m): Likewise.
10031 (vminaq_m): Likewise.
10032 (vrmlaldavhaq): Likewise.
10033 (vmlsdavxq_p): Likewise.
10034 (vmlsdavq_p): Likewise.
10035 (vmlsdavaxq): Likewise.
10036 (vmlsdavaq): Likewise.
10037 (vaddvaq_p): Likewise.
10038 (vcmpcsq_m_n): Likewise.
10039 (vcmpcsq_m): Likewise.
10040 (vcmpeqq_m_n): Likewise.
10041 (vcmpeqq_m): Likewise.
10042 (vmladavxq_p): Likewise.
10043 (vmladavq_p): Likewise.
10044 (vmladavaxq): Likewise.
10045 (vmladavaq): Likewise.
10046 (vminvq_p): Likewise.
10047 (vminavq_p): Likewise.
10048 (vmaxvq_p): Likewise.
10049 (vmaxavq_p): Likewise.
10050 (vcmpltq_m_n): Likewise.
10051 (vcmpltq_m): Likewise.
10052 (vcmpleq_m): Likewise.
10053 (vcmpleq_m_n): Likewise.
10054 (vcmphiq_m_n): Likewise.
10055 (vcmphiq_m): Likewise.
10056 (vcmpgtq_m_n): Likewise.
10057 (vcmpgtq_m): Likewise.
10058 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
10060 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
10061 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
10062 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
10063 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
10064 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
10065 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
10066 * config/arm/constraints.md (Rc): Define constraint to check constant is
10067 in the range of 0 to 15.
10068 (Re): Define constraint to check constant is in the range of 0 to 31.
10069 * config/arm/mve.md (VADDVAQ_P): Define iterator.
10070 (VCLZQ_M): Likewise.
10071 (VCMPEQQ_M_N): Likewise.
10072 (VCMPEQQ_M): Likewise.
10073 (VCMPNEQ_M_N): Likewise.
10074 (VCMPNEQ_M): Likewise.
10075 (VDUPQ_M_N): Likewise.
10076 (VMAXVQ_P): Likewise.
10077 (VMINVQ_P): Likewise.
10078 (VMLADAVAQ): Likewise.
10079 (VMLADAVQ_P): Likewise.
10080 (VMLAQ_N): Likewise.
10081 (VMLASQ_N): Likewise.
10082 (VMVNQ_M): Likewise.
10083 (VPSELQ): Likewise.
10084 (VQDMLAHQ_N): Likewise.
10085 (VQRDMLAHQ_N): Likewise.
10086 (VQRDMLASHQ_N): Likewise.
10087 (VQRSHLQ_M_N): Likewise.
10088 (VQSHLQ_M_R): Likewise.
10089 (VREV64Q_M): Likewise.
10090 (VRSHLQ_M_N): Likewise.
10091 (VSHLQ_M_R): Likewise.
10092 (VSLIQ_N): Likewise.
10093 (VSRIQ_N): Likewise.
10094 (mve_vabsq_m_s<mode>): Define RTL pattern.
10095 (mve_vaddvaq_p_<supf><mode>): Likewise.
10096 (mve_vclsq_m_s<mode>): Likewise.
10097 (mve_vclzq_m_<supf><mode>): Likewise.
10098 (mve_vcmpcsq_m_n_u<mode>): Likewise.
10099 (mve_vcmpcsq_m_u<mode>): Likewise.
10100 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
10101 (mve_vcmpeqq_m_<supf><mode>): Likewise.
10102 (mve_vcmpgeq_m_n_s<mode>): Likewise.
10103 (mve_vcmpgeq_m_s<mode>): Likewise.
10104 (mve_vcmpgtq_m_n_s<mode>): Likewise.
10105 (mve_vcmpgtq_m_s<mode>): Likewise.
10106 (mve_vcmphiq_m_n_u<mode>): Likewise.
10107 (mve_vcmphiq_m_u<mode>): Likewise.
10108 (mve_vcmpleq_m_n_s<mode>): Likewise.
10109 (mve_vcmpleq_m_s<mode>): Likewise.
10110 (mve_vcmpltq_m_n_s<mode>): Likewise.
10111 (mve_vcmpltq_m_s<mode>): Likewise.
10112 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
10113 (mve_vcmpneq_m_<supf><mode>): Likewise.
10114 (mve_vdupq_m_n_<supf><mode>): Likewise.
10115 (mve_vmaxaq_m_s<mode>): Likewise.
10116 (mve_vmaxavq_p_s<mode>): Likewise.
10117 (mve_vmaxvq_p_<supf><mode>): Likewise.
10118 (mve_vminaq_m_s<mode>): Likewise.
10119 (mve_vminavq_p_s<mode>): Likewise.
10120 (mve_vminvq_p_<supf><mode>): Likewise.
10121 (mve_vmladavaq_<supf><mode>): Likewise.
10122 (mve_vmladavq_p_<supf><mode>): Likewise.
10123 (mve_vmladavxq_p_s<mode>): Likewise.
10124 (mve_vmlaq_n_<supf><mode>): Likewise.
10125 (mve_vmlasq_n_<supf><mode>): Likewise.
10126 (mve_vmlsdavq_p_s<mode>): Likewise.
10127 (mve_vmlsdavxq_p_s<mode>): Likewise.
10128 (mve_vmvnq_m_<supf><mode>): Likewise.
10129 (mve_vnegq_m_s<mode>): Likewise.
10130 (mve_vpselq_<supf><mode>): Likewise.
10131 (mve_vqabsq_m_s<mode>): Likewise.
10132 (mve_vqdmlahq_n_<supf><mode>): Likewise.
10133 (mve_vqnegq_m_s<mode>): Likewise.
10134 (mve_vqrdmladhq_s<mode>): Likewise.
10135 (mve_vqrdmladhxq_s<mode>): Likewise.
10136 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
10137 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
10138 (mve_vqrdmlsdhq_s<mode>): Likewise.
10139 (mve_vqrdmlsdhxq_s<mode>): Likewise.
10140 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
10141 (mve_vqshlq_m_r_<supf><mode>): Likewise.
10142 (mve_vrev64q_m_<supf><mode>): Likewise.
10143 (mve_vrshlq_m_n_<supf><mode>): Likewise.
10144 (mve_vshlq_m_r_<supf><mode>): Likewise.
10145 (mve_vsliq_n_<supf><mode>): Likewise.
10146 (mve_vsriq_n_<supf><mode>): Likewise.
10147 (mve_vqdmlsdhxq_s<mode>): Likewise.
10148 (mve_vqdmlsdhq_s<mode>): Likewise.
10149 (mve_vqdmladhxq_s<mode>): Likewise.
10150 (mve_vqdmladhq_s<mode>): Likewise.
10151 (mve_vmlsdavaxq_s<mode>): Likewise.
10152 (mve_vmlsdavaq_s<mode>): Likewise.
10153 (mve_vmladavaxq_s<mode>): Likewise.
10154 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
10155 matching constraint Rc.
10156 (mve_imm_31): Define predicate to check the matching constraint Re.
10158 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10160 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
10161 (vec_cmp<mode>di_dup): Likewise.
10162 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
10164 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10166 * config/gcn/gcn-valu.md (COND_MODE): Delete.
10167 (COND_INT_MODE): Delete.
10168 (cond_op): Add "mult".
10169 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
10170 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
10172 2020-03-18 Richard Biener <rguenther@suse.de>
10174 PR middle-end/94206
10175 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
10176 partial int modes or not mode-precision integer types for
10179 2020-03-18 Jakub Jelinek <jakub@redhat.com>
10181 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
10183 * config/arc/arc.c (frame_stack_add): Likewise.
10184 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
10186 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
10187 * tree-ssa-strlen.h (handle_printf_call): Likewise.
10188 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
10189 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
10191 2020-03-18 Duan bo <duanbo3@huawei.com>
10194 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
10195 (@ldr_got_tiny_<mode>): New pattern.
10196 (ldr_got_tiny_sidi): Likewise.
10197 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
10198 them to handle SYMBOL_TINY_GOT for ILP32.
10200 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
10202 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
10203 call-preserved for SVE PCS functions.
10204 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
10205 Optimize the case in which there are no following vector save slots.
10207 2020-03-18 Richard Biener <rguenther@suse.de>
10209 PR middle-end/94188
10210 * fold-const.c (build_fold_addr_expr): Convert address to
10212 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
10213 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
10214 to build the ADDR_EXPR which we don't really want to simplify.
10215 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
10216 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
10217 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
10218 (simplify_builtin_call): Strip useless type conversions.
10219 * tree-ssa-strlen.c (new_strinfo): Likewise.
10221 2020-03-17 Alexey Neyman <stilor@att.net>
10224 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
10225 the debug level is terse and the declaration is public. Do not
10226 generate type info.
10227 (dwarf2out_decl): Same.
10228 (add_type_attribute): Return immediately if debug level is
10231 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
10233 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
10235 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10236 Mihail Ionescu <mihail.ionescu@arm.com>
10237 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10239 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
10240 Define qualifier for ternary operands.
10241 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10242 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10243 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10244 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10245 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10246 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10247 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10248 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10249 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10250 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10251 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10252 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10253 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10254 * config/arm/arm_mve.h (vabavq_s8): Define macro.
10255 (vabavq_s16): Likewise.
10256 (vabavq_s32): Likewise.
10257 (vbicq_m_n_s16): Likewise.
10258 (vbicq_m_n_s32): Likewise.
10259 (vbicq_m_n_u16): Likewise.
10260 (vbicq_m_n_u32): Likewise.
10261 (vcmpeqq_m_f16): Likewise.
10262 (vcmpeqq_m_f32): Likewise.
10263 (vcvtaq_m_s16_f16): Likewise.
10264 (vcvtaq_m_u16_f16): Likewise.
10265 (vcvtaq_m_s32_f32): Likewise.
10266 (vcvtaq_m_u32_f32): Likewise.
10267 (vcvtq_m_f16_s16): Likewise.
10268 (vcvtq_m_f16_u16): Likewise.
10269 (vcvtq_m_f32_s32): Likewise.
10270 (vcvtq_m_f32_u32): Likewise.
10271 (vqrshrnbq_n_s16): Likewise.
10272 (vqrshrnbq_n_u16): Likewise.
10273 (vqrshrnbq_n_s32): Likewise.
10274 (vqrshrnbq_n_u32): Likewise.
10275 (vqrshrunbq_n_s16): Likewise.
10276 (vqrshrunbq_n_s32): Likewise.
10277 (vrmlaldavhaq_s32): Likewise.
10278 (vrmlaldavhaq_u32): Likewise.
10279 (vshlcq_s8): Likewise.
10280 (vshlcq_u8): Likewise.
10281 (vshlcq_s16): Likewise.
10282 (vshlcq_u16): Likewise.
10283 (vshlcq_s32): Likewise.
10284 (vshlcq_u32): Likewise.
10285 (vabavq_u8): Likewise.
10286 (vabavq_u16): Likewise.
10287 (vabavq_u32): Likewise.
10288 (__arm_vabavq_s8): Define intrinsic.
10289 (__arm_vabavq_s16): Likewise.
10290 (__arm_vabavq_s32): Likewise.
10291 (__arm_vabavq_u8): Likewise.
10292 (__arm_vabavq_u16): Likewise.
10293 (__arm_vabavq_u32): Likewise.
10294 (__arm_vbicq_m_n_s16): Likewise.
10295 (__arm_vbicq_m_n_s32): Likewise.
10296 (__arm_vbicq_m_n_u16): Likewise.
10297 (__arm_vbicq_m_n_u32): Likewise.
10298 (__arm_vqrshrnbq_n_s16): Likewise.
10299 (__arm_vqrshrnbq_n_u16): Likewise.
10300 (__arm_vqrshrnbq_n_s32): Likewise.
10301 (__arm_vqrshrnbq_n_u32): Likewise.
10302 (__arm_vqrshrunbq_n_s16): Likewise.
10303 (__arm_vqrshrunbq_n_s32): Likewise.
10304 (__arm_vrmlaldavhaq_s32): Likewise.
10305 (__arm_vrmlaldavhaq_u32): Likewise.
10306 (__arm_vshlcq_s8): Likewise.
10307 (__arm_vshlcq_u8): Likewise.
10308 (__arm_vshlcq_s16): Likewise.
10309 (__arm_vshlcq_u16): Likewise.
10310 (__arm_vshlcq_s32): Likewise.
10311 (__arm_vshlcq_u32): Likewise.
10312 (__arm_vcmpeqq_m_f16): Likewise.
10313 (__arm_vcmpeqq_m_f32): Likewise.
10314 (__arm_vcvtaq_m_s16_f16): Likewise.
10315 (__arm_vcvtaq_m_u16_f16): Likewise.
10316 (__arm_vcvtaq_m_s32_f32): Likewise.
10317 (__arm_vcvtaq_m_u32_f32): Likewise.
10318 (__arm_vcvtq_m_f16_s16): Likewise.
10319 (__arm_vcvtq_m_f16_u16): Likewise.
10320 (__arm_vcvtq_m_f32_s32): Likewise.
10321 (__arm_vcvtq_m_f32_u32): Likewise.
10322 (vcvtaq_m): Define polymorphic variant.
10323 (vcvtq_m): Likewise.
10324 (vabavq): Likewise.
10325 (vshlcq): Likewise.
10326 (vbicq_m_n): Likewise.
10327 (vqrshrnbq_n): Likewise.
10328 (vqrshrunbq_n): Likewise.
10329 * config/arm/arm_mve_builtins.def
10330 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
10331 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10332 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10333 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10334 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10335 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10336 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10337 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10338 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10339 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10340 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10341 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10342 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10343 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10344 * config/arm/mve.md (VBICQ_M_N): Define iterator.
10345 (VCVTAQ_M): Likewise.
10346 (VCVTQ_M_TO_F): Likewise.
10347 (VQRSHRNBQ_N): Likewise.
10348 (VABAVQ): Likewise.
10349 (VSHLCQ): Likewise.
10350 (VRMLALDAVHAQ): Likewise.
10351 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
10352 (mve_vcmpeqq_m_f<mode>): Likewise.
10353 (mve_vcvtaq_m_<supf><mode>): Likewise.
10354 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
10355 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
10356 (mve_vqrshrunbq_n_s<mode>): Likewise.
10357 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
10358 (mve_vabavq_<supf><mode>): Likewise.
10359 (mve_vshlcq_<supf><mode>): Likewise.
10360 (mve_vshlcq_<supf><mode>): Likewise.
10361 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
10362 (mve_vshlcq_carry_<supf><mode>): Likewise.
10364 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10365 Mihail Ionescu <mihail.ionescu@arm.com>
10366 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10368 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
10369 (vqmovnbq_u16): Likewise.
10370 (vmulltq_poly_p8): Likewise.
10371 (vmullbq_poly_p8): Likewise.
10372 (vmovntq_u16): Likewise.
10373 (vmovnbq_u16): Likewise.
10374 (vmlaldavxq_u16): Likewise.
10375 (vmlaldavq_u16): Likewise.
10376 (vqmovuntq_s16): Likewise.
10377 (vqmovunbq_s16): Likewise.
10378 (vshlltq_n_u8): Likewise.
10379 (vshllbq_n_u8): Likewise.
10380 (vorrq_n_u16): Likewise.
10381 (vbicq_n_u16): Likewise.
10382 (vcmpneq_n_f16): Likewise.
10383 (vcmpneq_f16): Likewise.
10384 (vcmpltq_n_f16): Likewise.
10385 (vcmpltq_f16): Likewise.
10386 (vcmpleq_n_f16): Likewise.
10387 (vcmpleq_f16): Likewise.
10388 (vcmpgtq_n_f16): Likewise.
10389 (vcmpgtq_f16): Likewise.
10390 (vcmpgeq_n_f16): Likewise.
10391 (vcmpgeq_f16): Likewise.
10392 (vcmpeqq_n_f16): Likewise.
10393 (vcmpeqq_f16): Likewise.
10394 (vsubq_f16): Likewise.
10395 (vqmovntq_s16): Likewise.
10396 (vqmovnbq_s16): Likewise.
10397 (vqdmulltq_s16): Likewise.
10398 (vqdmulltq_n_s16): Likewise.
10399 (vqdmullbq_s16): Likewise.
10400 (vqdmullbq_n_s16): Likewise.
10401 (vorrq_f16): Likewise.
10402 (vornq_f16): Likewise.
10403 (vmulq_n_f16): Likewise.
10404 (vmulq_f16): Likewise.
10405 (vmovntq_s16): Likewise.
10406 (vmovnbq_s16): Likewise.
10407 (vmlsldavxq_s16): Likewise.
10408 (vmlsldavq_s16): Likewise.
10409 (vmlaldavxq_s16): Likewise.
10410 (vmlaldavq_s16): Likewise.
10411 (vminnmvq_f16): Likewise.
10412 (vminnmq_f16): Likewise.
10413 (vminnmavq_f16): Likewise.
10414 (vminnmaq_f16): Likewise.
10415 (vmaxnmvq_f16): Likewise.
10416 (vmaxnmq_f16): Likewise.
10417 (vmaxnmavq_f16): Likewise.
10418 (vmaxnmaq_f16): Likewise.
10419 (veorq_f16): Likewise.
10420 (vcmulq_rot90_f16): Likewise.
10421 (vcmulq_rot270_f16): Likewise.
10422 (vcmulq_rot180_f16): Likewise.
10423 (vcmulq_f16): Likewise.
10424 (vcaddq_rot90_f16): Likewise.
10425 (vcaddq_rot270_f16): Likewise.
10426 (vbicq_f16): Likewise.
10427 (vandq_f16): Likewise.
10428 (vaddq_n_f16): Likewise.
10429 (vabdq_f16): Likewise.
10430 (vshlltq_n_s8): Likewise.
10431 (vshllbq_n_s8): Likewise.
10432 (vorrq_n_s16): Likewise.
10433 (vbicq_n_s16): Likewise.
10434 (vqmovntq_u32): Likewise.
10435 (vqmovnbq_u32): Likewise.
10436 (vmulltq_poly_p16): Likewise.
10437 (vmullbq_poly_p16): Likewise.
10438 (vmovntq_u32): Likewise.
10439 (vmovnbq_u32): Likewise.
10440 (vmlaldavxq_u32): Likewise.
10441 (vmlaldavq_u32): Likewise.
10442 (vqmovuntq_s32): Likewise.
10443 (vqmovunbq_s32): Likewise.
10444 (vshlltq_n_u16): Likewise.
10445 (vshllbq_n_u16): Likewise.
10446 (vorrq_n_u32): Likewise.
10447 (vbicq_n_u32): Likewise.
10448 (vcmpneq_n_f32): Likewise.
10449 (vcmpneq_f32): Likewise.
10450 (vcmpltq_n_f32): Likewise.
10451 (vcmpltq_f32): Likewise.
10452 (vcmpleq_n_f32): Likewise.
10453 (vcmpleq_f32): Likewise.
10454 (vcmpgtq_n_f32): Likewise.
10455 (vcmpgtq_f32): Likewise.
10456 (vcmpgeq_n_f32): Likewise.
10457 (vcmpgeq_f32): Likewise.
10458 (vcmpeqq_n_f32): Likewise.
10459 (vcmpeqq_f32): Likewise.
10460 (vsubq_f32): Likewise.
10461 (vqmovntq_s32): Likewise.
10462 (vqmovnbq_s32): Likewise.
10463 (vqdmulltq_s32): Likewise.
10464 (vqdmulltq_n_s32): Likewise.
10465 (vqdmullbq_s32): Likewise.
10466 (vqdmullbq_n_s32): Likewise.
10467 (vorrq_f32): Likewise.
10468 (vornq_f32): Likewise.
10469 (vmulq_n_f32): Likewise.
10470 (vmulq_f32): Likewise.
10471 (vmovntq_s32): Likewise.
10472 (vmovnbq_s32): Likewise.
10473 (vmlsldavxq_s32): Likewise.
10474 (vmlsldavq_s32): Likewise.
10475 (vmlaldavxq_s32): Likewise.
10476 (vmlaldavq_s32): Likewise.
10477 (vminnmvq_f32): Likewise.
10478 (vminnmq_f32): Likewise.
10479 (vminnmavq_f32): Likewise.
10480 (vminnmaq_f32): Likewise.
10481 (vmaxnmvq_f32): Likewise.
10482 (vmaxnmq_f32): Likewise.
10483 (vmaxnmavq_f32): Likewise.
10484 (vmaxnmaq_f32): Likewise.
10485 (veorq_f32): Likewise.
10486 (vcmulq_rot90_f32): Likewise.
10487 (vcmulq_rot270_f32): Likewise.
10488 (vcmulq_rot180_f32): Likewise.
10489 (vcmulq_f32): Likewise.
10490 (vcaddq_rot90_f32): Likewise.
10491 (vcaddq_rot270_f32): Likewise.
10492 (vbicq_f32): Likewise.
10493 (vandq_f32): Likewise.
10494 (vaddq_n_f32): Likewise.
10495 (vabdq_f32): Likewise.
10496 (vshlltq_n_s16): Likewise.
10497 (vshllbq_n_s16): Likewise.
10498 (vorrq_n_s32): Likewise.
10499 (vbicq_n_s32): Likewise.
10500 (vrmlaldavhq_u32): Likewise.
10501 (vctp8q_m): Likewise.
10502 (vctp64q_m): Likewise.
10503 (vctp32q_m): Likewise.
10504 (vctp16q_m): Likewise.
10505 (vaddlvaq_u32): Likewise.
10506 (vrmlsldavhxq_s32): Likewise.
10507 (vrmlsldavhq_s32): Likewise.
10508 (vrmlaldavhxq_s32): Likewise.
10509 (vrmlaldavhq_s32): Likewise.
10510 (vcvttq_f16_f32): Likewise.
10511 (vcvtbq_f16_f32): Likewise.
10512 (vaddlvaq_s32): Likewise.
10513 (__arm_vqmovntq_u16): Define intrinsic.
10514 (__arm_vqmovnbq_u16): Likewise.
10515 (__arm_vmulltq_poly_p8): Likewise.
10516 (__arm_vmullbq_poly_p8): Likewise.
10517 (__arm_vmovntq_u16): Likewise.
10518 (__arm_vmovnbq_u16): Likewise.
10519 (__arm_vmlaldavxq_u16): Likewise.
10520 (__arm_vmlaldavq_u16): Likewise.
10521 (__arm_vqmovuntq_s16): Likewise.
10522 (__arm_vqmovunbq_s16): Likewise.
10523 (__arm_vshlltq_n_u8): Likewise.
10524 (__arm_vshllbq_n_u8): Likewise.
10525 (__arm_vorrq_n_u16): Likewise.
10526 (__arm_vbicq_n_u16): Likewise.
10527 (__arm_vcmpneq_n_f16): Likewise.
10528 (__arm_vcmpneq_f16): Likewise.
10529 (__arm_vcmpltq_n_f16): Likewise.
10530 (__arm_vcmpltq_f16): Likewise.
10531 (__arm_vcmpleq_n_f16): Likewise.
10532 (__arm_vcmpleq_f16): Likewise.
10533 (__arm_vcmpgtq_n_f16): Likewise.
10534 (__arm_vcmpgtq_f16): Likewise.
10535 (__arm_vcmpgeq_n_f16): Likewise.
10536 (__arm_vcmpgeq_f16): Likewise.
10537 (__arm_vcmpeqq_n_f16): Likewise.
10538 (__arm_vcmpeqq_f16): Likewise.
10539 (__arm_vsubq_f16): Likewise.
10540 (__arm_vqmovntq_s16): Likewise.
10541 (__arm_vqmovnbq_s16): Likewise.
10542 (__arm_vqdmulltq_s16): Likewise.
10543 (__arm_vqdmulltq_n_s16): Likewise.
10544 (__arm_vqdmullbq_s16): Likewise.
10545 (__arm_vqdmullbq_n_s16): Likewise.
10546 (__arm_vorrq_f16): Likewise.
10547 (__arm_vornq_f16): Likewise.
10548 (__arm_vmulq_n_f16): Likewise.
10549 (__arm_vmulq_f16): Likewise.
10550 (__arm_vmovntq_s16): Likewise.
10551 (__arm_vmovnbq_s16): Likewise.
10552 (__arm_vmlsldavxq_s16): Likewise.
10553 (__arm_vmlsldavq_s16): Likewise.
10554 (__arm_vmlaldavxq_s16): Likewise.
10555 (__arm_vmlaldavq_s16): Likewise.
10556 (__arm_vminnmvq_f16): Likewise.
10557 (__arm_vminnmq_f16): Likewise.
10558 (__arm_vminnmavq_f16): Likewise.
10559 (__arm_vminnmaq_f16): Likewise.
10560 (__arm_vmaxnmvq_f16): Likewise.
10561 (__arm_vmaxnmq_f16): Likewise.
10562 (__arm_vmaxnmavq_f16): Likewise.
10563 (__arm_vmaxnmaq_f16): Likewise.
10564 (__arm_veorq_f16): Likewise.
10565 (__arm_vcmulq_rot90_f16): Likewise.
10566 (__arm_vcmulq_rot270_f16): Likewise.
10567 (__arm_vcmulq_rot180_f16): Likewise.
10568 (__arm_vcmulq_f16): Likewise.
10569 (__arm_vcaddq_rot90_f16): Likewise.
10570 (__arm_vcaddq_rot270_f16): Likewise.
10571 (__arm_vbicq_f16): Likewise.
10572 (__arm_vandq_f16): Likewise.
10573 (__arm_vaddq_n_f16): Likewise.
10574 (__arm_vabdq_f16): Likewise.
10575 (__arm_vshlltq_n_s8): Likewise.
10576 (__arm_vshllbq_n_s8): Likewise.
10577 (__arm_vorrq_n_s16): Likewise.
10578 (__arm_vbicq_n_s16): Likewise.
10579 (__arm_vqmovntq_u32): Likewise.
10580 (__arm_vqmovnbq_u32): Likewise.
10581 (__arm_vmulltq_poly_p16): Likewise.
10582 (__arm_vmullbq_poly_p16): Likewise.
10583 (__arm_vmovntq_u32): Likewise.
10584 (__arm_vmovnbq_u32): Likewise.
10585 (__arm_vmlaldavxq_u32): Likewise.
10586 (__arm_vmlaldavq_u32): Likewise.
10587 (__arm_vqmovuntq_s32): Likewise.
10588 (__arm_vqmovunbq_s32): Likewise.
10589 (__arm_vshlltq_n_u16): Likewise.
10590 (__arm_vshllbq_n_u16): Likewise.
10591 (__arm_vorrq_n_u32): Likewise.
10592 (__arm_vbicq_n_u32): Likewise.
10593 (__arm_vcmpneq_n_f32): Likewise.
10594 (__arm_vcmpneq_f32): Likewise.
10595 (__arm_vcmpltq_n_f32): Likewise.
10596 (__arm_vcmpltq_f32): Likewise.
10597 (__arm_vcmpleq_n_f32): Likewise.
10598 (__arm_vcmpleq_f32): Likewise.
10599 (__arm_vcmpgtq_n_f32): Likewise.
10600 (__arm_vcmpgtq_f32): Likewise.
10601 (__arm_vcmpgeq_n_f32): Likewise.
10602 (__arm_vcmpgeq_f32): Likewise.
10603 (__arm_vcmpeqq_n_f32): Likewise.
10604 (__arm_vcmpeqq_f32): Likewise.
10605 (__arm_vsubq_f32): Likewise.
10606 (__arm_vqmovntq_s32): Likewise.
10607 (__arm_vqmovnbq_s32): Likewise.
10608 (__arm_vqdmulltq_s32): Likewise.
10609 (__arm_vqdmulltq_n_s32): Likewise.
10610 (__arm_vqdmullbq_s32): Likewise.
10611 (__arm_vqdmullbq_n_s32): Likewise.
10612 (__arm_vorrq_f32): Likewise.
10613 (__arm_vornq_f32): Likewise.
10614 (__arm_vmulq_n_f32): Likewise.
10615 (__arm_vmulq_f32): Likewise.
10616 (__arm_vmovntq_s32): Likewise.
10617 (__arm_vmovnbq_s32): Likewise.
10618 (__arm_vmlsldavxq_s32): Likewise.
10619 (__arm_vmlsldavq_s32): Likewise.
10620 (__arm_vmlaldavxq_s32): Likewise.
10621 (__arm_vmlaldavq_s32): Likewise.
10622 (__arm_vminnmvq_f32): Likewise.
10623 (__arm_vminnmq_f32): Likewise.
10624 (__arm_vminnmavq_f32): Likewise.
10625 (__arm_vminnmaq_f32): Likewise.
10626 (__arm_vmaxnmvq_f32): Likewise.
10627 (__arm_vmaxnmq_f32): Likewise.
10628 (__arm_vmaxnmavq_f32): Likewise.
10629 (__arm_vmaxnmaq_f32): Likewise.
10630 (__arm_veorq_f32): Likewise.
10631 (__arm_vcmulq_rot90_f32): Likewise.
10632 (__arm_vcmulq_rot270_f32): Likewise.
10633 (__arm_vcmulq_rot180_f32): Likewise.
10634 (__arm_vcmulq_f32): Likewise.
10635 (__arm_vcaddq_rot90_f32): Likewise.
10636 (__arm_vcaddq_rot270_f32): Likewise.
10637 (__arm_vbicq_f32): Likewise.
10638 (__arm_vandq_f32): Likewise.
10639 (__arm_vaddq_n_f32): Likewise.
10640 (__arm_vabdq_f32): Likewise.
10641 (__arm_vshlltq_n_s16): Likewise.
10642 (__arm_vshllbq_n_s16): Likewise.
10643 (__arm_vorrq_n_s32): Likewise.
10644 (__arm_vbicq_n_s32): Likewise.
10645 (__arm_vrmlaldavhq_u32): Likewise.
10646 (__arm_vctp8q_m): Likewise.
10647 (__arm_vctp64q_m): Likewise.
10648 (__arm_vctp32q_m): Likewise.
10649 (__arm_vctp16q_m): Likewise.
10650 (__arm_vaddlvaq_u32): Likewise.
10651 (__arm_vrmlsldavhxq_s32): Likewise.
10652 (__arm_vrmlsldavhq_s32): Likewise.
10653 (__arm_vrmlaldavhxq_s32): Likewise.
10654 (__arm_vrmlaldavhq_s32): Likewise.
10655 (__arm_vcvttq_f16_f32): Likewise.
10656 (__arm_vcvtbq_f16_f32): Likewise.
10657 (__arm_vaddlvaq_s32): Likewise.
10658 (vst4q): Define polymorphic variant.
10659 (vrndxq): Likewise.
10661 (vrndpq): Likewise.
10662 (vrndnq): Likewise.
10663 (vrndmq): Likewise.
10664 (vrndaq): Likewise.
10665 (vrev64q): Likewise.
10667 (vdupq_n): Likewise.
10669 (vrev32q): Likewise.
10670 (vcvtbq_f32): Likewise.
10671 (vcvttq_f32): Likewise.
10673 (vsubq_n): Likewise.
10674 (vbrsrq_n): Likewise.
10675 (vcvtq_n): Likewise.
10679 (vaddq_n): Likewise.
10683 (vmulq_n): Likewise.
10685 (vcaddq_rot270): Likewise.
10686 (vcmpeqq_n): Likewise.
10687 (vcmpeqq): Likewise.
10688 (vcaddq_rot90): Likewise.
10689 (vcmpgeq_n): Likewise.
10690 (vcmpgeq): Likewise.
10691 (vcmpgtq_n): Likewise.
10692 (vcmpgtq): Likewise.
10693 (vcmpgtq): Likewise.
10694 (vcmpleq_n): Likewise.
10695 (vcmpleq_n): Likewise.
10696 (vcmpleq): Likewise.
10697 (vcmpleq): Likewise.
10698 (vcmpltq_n): Likewise.
10699 (vcmpltq_n): Likewise.
10700 (vcmpltq): Likewise.
10701 (vcmpltq): Likewise.
10702 (vcmpneq_n): Likewise.
10703 (vcmpneq_n): Likewise.
10704 (vcmpneq): Likewise.
10705 (vcmpneq): Likewise.
10706 (vcmulq): Likewise.
10707 (vcmulq): Likewise.
10708 (vcmulq_rot180): Likewise.
10709 (vcmulq_rot180): Likewise.
10710 (vcmulq_rot270): Likewise.
10711 (vcmulq_rot270): Likewise.
10712 (vcmulq_rot90): Likewise.
10713 (vcmulq_rot90): Likewise.
10716 (vmaxnmaq): Likewise.
10717 (vmaxnmaq): Likewise.
10718 (vmaxnmavq): Likewise.
10719 (vmaxnmavq): Likewise.
10720 (vmaxnmq): Likewise.
10721 (vmaxnmq): Likewise.
10722 (vmaxnmvq): Likewise.
10723 (vmaxnmvq): Likewise.
10724 (vminnmaq): Likewise.
10725 (vminnmaq): Likewise.
10726 (vminnmavq): Likewise.
10727 (vminnmavq): Likewise.
10728 (vminnmq): Likewise.
10729 (vminnmq): Likewise.
10730 (vminnmvq): Likewise.
10731 (vminnmvq): Likewise.
10732 (vbicq_n): Likewise.
10733 (vqmovntq): Likewise.
10734 (vqmovntq): Likewise.
10735 (vqmovnbq): Likewise.
10736 (vqmovnbq): Likewise.
10737 (vmulltq_poly): Likewise.
10738 (vmulltq_poly): Likewise.
10739 (vmullbq_poly): Likewise.
10740 (vmullbq_poly): Likewise.
10741 (vmovntq): Likewise.
10742 (vmovntq): Likewise.
10743 (vmovnbq): Likewise.
10744 (vmovnbq): Likewise.
10745 (vmlaldavxq): Likewise.
10746 (vmlaldavxq): Likewise.
10747 (vqmovuntq): Likewise.
10748 (vqmovuntq): Likewise.
10749 (vshlltq_n): Likewise.
10750 (vshlltq_n): Likewise.
10751 (vshllbq_n): Likewise.
10752 (vshllbq_n): Likewise.
10753 (vorrq_n): Likewise.
10754 (vorrq_n): Likewise.
10755 (vmlaldavq): Likewise.
10756 (vmlaldavq): Likewise.
10757 (vqmovunbq): Likewise.
10758 (vqmovunbq): Likewise.
10759 (vqdmulltq_n): Likewise.
10760 (vqdmulltq_n): Likewise.
10761 (vqdmulltq): Likewise.
10762 (vqdmulltq): Likewise.
10763 (vqdmullbq_n): Likewise.
10764 (vqdmullbq_n): Likewise.
10765 (vqdmullbq): Likewise.
10766 (vqdmullbq): Likewise.
10767 (vaddlvaq): Likewise.
10768 (vaddlvaq): Likewise.
10769 (vrmlaldavhq): Likewise.
10770 (vrmlaldavhq): Likewise.
10771 (vrmlaldavhxq): Likewise.
10772 (vrmlaldavhxq): Likewise.
10773 (vrmlsldavhq): Likewise.
10774 (vrmlsldavhq): Likewise.
10775 (vrmlsldavhxq): Likewise.
10776 (vrmlsldavhxq): Likewise.
10777 (vmlsldavxq): Likewise.
10778 (vmlsldavxq): Likewise.
10779 (vmlsldavq): Likewise.
10780 (vmlsldavq): Likewise.
10781 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
10782 (BINOP_NONE_NONE_NONE): Likewise.
10783 (BINOP_UNONE_NONE_NONE): Likewise.
10784 (BINOP_UNONE_UNONE_IMM): Likewise.
10785 (BINOP_UNONE_UNONE_NONE): Likewise.
10786 (BINOP_UNONE_UNONE_UNONE): Likewise.
10787 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
10788 (mve_vaddlvaq_<supf>v4si): Likewise.
10789 (mve_vaddq_n_f<mode>): Likewise.
10790 (mve_vandq_f<mode>): Likewise.
10791 (mve_vbicq_f<mode>): Likewise.
10792 (mve_vbicq_n_<supf><mode>): Likewise.
10793 (mve_vcaddq_rot270_f<mode>): Likewise.
10794 (mve_vcaddq_rot90_f<mode>): Likewise.
10795 (mve_vcmpeqq_f<mode>): Likewise.
10796 (mve_vcmpeqq_n_f<mode>): Likewise.
10797 (mve_vcmpgeq_f<mode>): Likewise.
10798 (mve_vcmpgeq_n_f<mode>): Likewise.
10799 (mve_vcmpgtq_f<mode>): Likewise.
10800 (mve_vcmpgtq_n_f<mode>): Likewise.
10801 (mve_vcmpleq_f<mode>): Likewise.
10802 (mve_vcmpleq_n_f<mode>): Likewise.
10803 (mve_vcmpltq_f<mode>): Likewise.
10804 (mve_vcmpltq_n_f<mode>): Likewise.
10805 (mve_vcmpneq_f<mode>): Likewise.
10806 (mve_vcmpneq_n_f<mode>): Likewise.
10807 (mve_vcmulq_f<mode>): Likewise.
10808 (mve_vcmulq_rot180_f<mode>): Likewise.
10809 (mve_vcmulq_rot270_f<mode>): Likewise.
10810 (mve_vcmulq_rot90_f<mode>): Likewise.
10811 (mve_vctp<mode1>q_mhi): Likewise.
10812 (mve_vcvtbq_f16_f32v8hf): Likewise.
10813 (mve_vcvttq_f16_f32v8hf): Likewise.
10814 (mve_veorq_f<mode>): Likewise.
10815 (mve_vmaxnmaq_f<mode>): Likewise.
10816 (mve_vmaxnmavq_f<mode>): Likewise.
10817 (mve_vmaxnmq_f<mode>): Likewise.
10818 (mve_vmaxnmvq_f<mode>): Likewise.
10819 (mve_vminnmaq_f<mode>): Likewise.
10820 (mve_vminnmavq_f<mode>): Likewise.
10821 (mve_vminnmq_f<mode>): Likewise.
10822 (mve_vminnmvq_f<mode>): Likewise.
10823 (mve_vmlaldavq_<supf><mode>): Likewise.
10824 (mve_vmlaldavxq_<supf><mode>): Likewise.
10825 (mve_vmlsldavq_s<mode>): Likewise.
10826 (mve_vmlsldavxq_s<mode>): Likewise.
10827 (mve_vmovnbq_<supf><mode>): Likewise.
10828 (mve_vmovntq_<supf><mode>): Likewise.
10829 (mve_vmulq_f<mode>): Likewise.
10830 (mve_vmulq_n_f<mode>): Likewise.
10831 (mve_vornq_f<mode>): Likewise.
10832 (mve_vorrq_f<mode>): Likewise.
10833 (mve_vorrq_n_<supf><mode>): Likewise.
10834 (mve_vqdmullbq_n_s<mode>): Likewise.
10835 (mve_vqdmullbq_s<mode>): Likewise.
10836 (mve_vqdmulltq_n_s<mode>): Likewise.
10837 (mve_vqdmulltq_s<mode>): Likewise.
10838 (mve_vqmovnbq_<supf><mode>): Likewise.
10839 (mve_vqmovntq_<supf><mode>): Likewise.
10840 (mve_vqmovunbq_s<mode>): Likewise.
10841 (mve_vqmovuntq_s<mode>): Likewise.
10842 (mve_vrmlaldavhxq_sv4si): Likewise.
10843 (mve_vrmlsldavhq_sv4si): Likewise.
10844 (mve_vrmlsldavhxq_sv4si): Likewise.
10845 (mve_vshllbq_n_<supf><mode>): Likewise.
10846 (mve_vshlltq_n_<supf><mode>): Likewise.
10847 (mve_vsubq_f<mode>): Likewise.
10848 (mve_vmulltq_poly_p<mode>): Likewise.
10849 (mve_vmullbq_poly_p<mode>): Likewise.
10850 (mve_vrmlaldavhq_<supf>v4si): Likewise.
10852 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10853 Mihail Ionescu <mihail.ionescu@arm.com>
10854 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10856 * config/arm/arm_mve.h (vsubq_u8): Define macro.
10857 (vsubq_n_u8): Likewise.
10858 (vrmulhq_u8): Likewise.
10859 (vrhaddq_u8): Likewise.
10860 (vqsubq_u8): Likewise.
10861 (vqsubq_n_u8): Likewise.
10862 (vqaddq_u8): Likewise.
10863 (vqaddq_n_u8): Likewise.
10864 (vorrq_u8): Likewise.
10865 (vornq_u8): Likewise.
10866 (vmulq_u8): Likewise.
10867 (vmulq_n_u8): Likewise.
10868 (vmulltq_int_u8): Likewise.
10869 (vmullbq_int_u8): Likewise.
10870 (vmulhq_u8): Likewise.
10871 (vmladavq_u8): Likewise.
10872 (vminvq_u8): Likewise.
10873 (vminq_u8): Likewise.
10874 (vmaxvq_u8): Likewise.
10875 (vmaxq_u8): Likewise.
10876 (vhsubq_u8): Likewise.
10877 (vhsubq_n_u8): Likewise.
10878 (vhaddq_u8): Likewise.
10879 (vhaddq_n_u8): Likewise.
10880 (veorq_u8): Likewise.
10881 (vcmpneq_n_u8): Likewise.
10882 (vcmphiq_u8): Likewise.
10883 (vcmphiq_n_u8): Likewise.
10884 (vcmpeqq_u8): Likewise.
10885 (vcmpeqq_n_u8): Likewise.
10886 (vcmpcsq_u8): Likewise.
10887 (vcmpcsq_n_u8): Likewise.
10888 (vcaddq_rot90_u8): Likewise.
10889 (vcaddq_rot270_u8): Likewise.
10890 (vbicq_u8): Likewise.
10891 (vandq_u8): Likewise.
10892 (vaddvq_p_u8): Likewise.
10893 (vaddvaq_u8): Likewise.
10894 (vaddq_n_u8): Likewise.
10895 (vabdq_u8): Likewise.
10896 (vshlq_r_u8): Likewise.
10897 (vrshlq_u8): Likewise.
10898 (vrshlq_n_u8): Likewise.
10899 (vqshlq_u8): Likewise.
10900 (vqshlq_r_u8): Likewise.
10901 (vqrshlq_u8): Likewise.
10902 (vqrshlq_n_u8): Likewise.
10903 (vminavq_s8): Likewise.
10904 (vminaq_s8): Likewise.
10905 (vmaxavq_s8): Likewise.
10906 (vmaxaq_s8): Likewise.
10907 (vbrsrq_n_u8): Likewise.
10908 (vshlq_n_u8): Likewise.
10909 (vrshrq_n_u8): Likewise.
10910 (vqshlq_n_u8): Likewise.
10911 (vcmpneq_n_s8): Likewise.
10912 (vcmpltq_s8): Likewise.
10913 (vcmpltq_n_s8): Likewise.
10914 (vcmpleq_s8): Likewise.
10915 (vcmpleq_n_s8): Likewise.
10916 (vcmpgtq_s8): Likewise.
10917 (vcmpgtq_n_s8): Likewise.
10918 (vcmpgeq_s8): Likewise.
10919 (vcmpgeq_n_s8): Likewise.
10920 (vcmpeqq_s8): Likewise.
10921 (vcmpeqq_n_s8): Likewise.
10922 (vqshluq_n_s8): Likewise.
10923 (vaddvq_p_s8): Likewise.
10924 (vsubq_s8): Likewise.
10925 (vsubq_n_s8): Likewise.
10926 (vshlq_r_s8): Likewise.
10927 (vrshlq_s8): Likewise.
10928 (vrshlq_n_s8): Likewise.
10929 (vrmulhq_s8): Likewise.
10930 (vrhaddq_s8): Likewise.
10931 (vqsubq_s8): Likewise.
10932 (vqsubq_n_s8): Likewise.
10933 (vqshlq_s8): Likewise.
10934 (vqshlq_r_s8): Likewise.
10935 (vqrshlq_s8): Likewise.
10936 (vqrshlq_n_s8): Likewise.
10937 (vqrdmulhq_s8): Likewise.
10938 (vqrdmulhq_n_s8): Likewise.
10939 (vqdmulhq_s8): Likewise.
10940 (vqdmulhq_n_s8): Likewise.
10941 (vqaddq_s8): Likewise.
10942 (vqaddq_n_s8): Likewise.
10943 (vorrq_s8): Likewise.
10944 (vornq_s8): Likewise.
10945 (vmulq_s8): Likewise.
10946 (vmulq_n_s8): Likewise.
10947 (vmulltq_int_s8): Likewise.
10948 (vmullbq_int_s8): Likewise.
10949 (vmulhq_s8): Likewise.
10950 (vmlsdavxq_s8): Likewise.
10951 (vmlsdavq_s8): Likewise.
10952 (vmladavxq_s8): Likewise.
10953 (vmladavq_s8): Likewise.
10954 (vminvq_s8): Likewise.
10955 (vminq_s8): Likewise.
10956 (vmaxvq_s8): Likewise.
10957 (vmaxq_s8): Likewise.
10958 (vhsubq_s8): Likewise.
10959 (vhsubq_n_s8): Likewise.
10960 (vhcaddq_rot90_s8): Likewise.
10961 (vhcaddq_rot270_s8): Likewise.
10962 (vhaddq_s8): Likewise.
10963 (vhaddq_n_s8): Likewise.
10964 (veorq_s8): Likewise.
10965 (vcaddq_rot90_s8): Likewise.
10966 (vcaddq_rot270_s8): Likewise.
10967 (vbrsrq_n_s8): Likewise.
10968 (vbicq_s8): Likewise.
10969 (vandq_s8): Likewise.
10970 (vaddvaq_s8): Likewise.
10971 (vaddq_n_s8): Likewise.
10972 (vabdq_s8): Likewise.
10973 (vshlq_n_s8): Likewise.
10974 (vrshrq_n_s8): Likewise.
10975 (vqshlq_n_s8): Likewise.
10976 (vsubq_u16): Likewise.
10977 (vsubq_n_u16): Likewise.
10978 (vrmulhq_u16): Likewise.
10979 (vrhaddq_u16): Likewise.
10980 (vqsubq_u16): Likewise.
10981 (vqsubq_n_u16): Likewise.
10982 (vqaddq_u16): Likewise.
10983 (vqaddq_n_u16): Likewise.
10984 (vorrq_u16): Likewise.
10985 (vornq_u16): Likewise.
10986 (vmulq_u16): Likewise.
10987 (vmulq_n_u16): Likewise.
10988 (vmulltq_int_u16): Likewise.
10989 (vmullbq_int_u16): Likewise.
10990 (vmulhq_u16): Likewise.
10991 (vmladavq_u16): Likewise.
10992 (vminvq_u16): Likewise.
10993 (vminq_u16): Likewise.
10994 (vmaxvq_u16): Likewise.
10995 (vmaxq_u16): Likewise.
10996 (vhsubq_u16): Likewise.
10997 (vhsubq_n_u16): Likewise.
10998 (vhaddq_u16): Likewise.
10999 (vhaddq_n_u16): Likewise.
11000 (veorq_u16): Likewise.
11001 (vcmpneq_n_u16): Likewise.
11002 (vcmphiq_u16): Likewise.
11003 (vcmphiq_n_u16): Likewise.
11004 (vcmpeqq_u16): Likewise.
11005 (vcmpeqq_n_u16): Likewise.
11006 (vcmpcsq_u16): Likewise.
11007 (vcmpcsq_n_u16): Likewise.
11008 (vcaddq_rot90_u16): Likewise.
11009 (vcaddq_rot270_u16): Likewise.
11010 (vbicq_u16): Likewise.
11011 (vandq_u16): Likewise.
11012 (vaddvq_p_u16): Likewise.
11013 (vaddvaq_u16): Likewise.
11014 (vaddq_n_u16): Likewise.
11015 (vabdq_u16): Likewise.
11016 (vshlq_r_u16): Likewise.
11017 (vrshlq_u16): Likewise.
11018 (vrshlq_n_u16): Likewise.
11019 (vqshlq_u16): Likewise.
11020 (vqshlq_r_u16): Likewise.
11021 (vqrshlq_u16): Likewise.
11022 (vqrshlq_n_u16): Likewise.
11023 (vminavq_s16): Likewise.
11024 (vminaq_s16): Likewise.
11025 (vmaxavq_s16): Likewise.
11026 (vmaxaq_s16): Likewise.
11027 (vbrsrq_n_u16): Likewise.
11028 (vshlq_n_u16): Likewise.
11029 (vrshrq_n_u16): Likewise.
11030 (vqshlq_n_u16): Likewise.
11031 (vcmpneq_n_s16): Likewise.
11032 (vcmpltq_s16): Likewise.
11033 (vcmpltq_n_s16): Likewise.
11034 (vcmpleq_s16): Likewise.
11035 (vcmpleq_n_s16): Likewise.
11036 (vcmpgtq_s16): Likewise.
11037 (vcmpgtq_n_s16): Likewise.
11038 (vcmpgeq_s16): Likewise.
11039 (vcmpgeq_n_s16): Likewise.
11040 (vcmpeqq_s16): Likewise.
11041 (vcmpeqq_n_s16): Likewise.
11042 (vqshluq_n_s16): Likewise.
11043 (vaddvq_p_s16): Likewise.
11044 (vsubq_s16): Likewise.
11045 (vsubq_n_s16): Likewise.
11046 (vshlq_r_s16): Likewise.
11047 (vrshlq_s16): Likewise.
11048 (vrshlq_n_s16): Likewise.
11049 (vrmulhq_s16): Likewise.
11050 (vrhaddq_s16): Likewise.
11051 (vqsubq_s16): Likewise.
11052 (vqsubq_n_s16): Likewise.
11053 (vqshlq_s16): Likewise.
11054 (vqshlq_r_s16): Likewise.
11055 (vqrshlq_s16): Likewise.
11056 (vqrshlq_n_s16): Likewise.
11057 (vqrdmulhq_s16): Likewise.
11058 (vqrdmulhq_n_s16): Likewise.
11059 (vqdmulhq_s16): Likewise.
11060 (vqdmulhq_n_s16): Likewise.
11061 (vqaddq_s16): Likewise.
11062 (vqaddq_n_s16): Likewise.
11063 (vorrq_s16): Likewise.
11064 (vornq_s16): Likewise.
11065 (vmulq_s16): Likewise.
11066 (vmulq_n_s16): Likewise.
11067 (vmulltq_int_s16): Likewise.
11068 (vmullbq_int_s16): Likewise.
11069 (vmulhq_s16): Likewise.
11070 (vmlsdavxq_s16): Likewise.
11071 (vmlsdavq_s16): Likewise.
11072 (vmladavxq_s16): Likewise.
11073 (vmladavq_s16): Likewise.
11074 (vminvq_s16): Likewise.
11075 (vminq_s16): Likewise.
11076 (vmaxvq_s16): Likewise.
11077 (vmaxq_s16): Likewise.
11078 (vhsubq_s16): Likewise.
11079 (vhsubq_n_s16): Likewise.
11080 (vhcaddq_rot90_s16): Likewise.
11081 (vhcaddq_rot270_s16): Likewise.
11082 (vhaddq_s16): Likewise.
11083 (vhaddq_n_s16): Likewise.
11084 (veorq_s16): Likewise.
11085 (vcaddq_rot90_s16): Likewise.
11086 (vcaddq_rot270_s16): Likewise.
11087 (vbrsrq_n_s16): Likewise.
11088 (vbicq_s16): Likewise.
11089 (vandq_s16): Likewise.
11090 (vaddvaq_s16): Likewise.
11091 (vaddq_n_s16): Likewise.
11092 (vabdq_s16): Likewise.
11093 (vshlq_n_s16): Likewise.
11094 (vrshrq_n_s16): Likewise.
11095 (vqshlq_n_s16): Likewise.
11096 (vsubq_u32): Likewise.
11097 (vsubq_n_u32): Likewise.
11098 (vrmulhq_u32): Likewise.
11099 (vrhaddq_u32): Likewise.
11100 (vqsubq_u32): Likewise.
11101 (vqsubq_n_u32): Likewise.
11102 (vqaddq_u32): Likewise.
11103 (vqaddq_n_u32): Likewise.
11104 (vorrq_u32): Likewise.
11105 (vornq_u32): Likewise.
11106 (vmulq_u32): Likewise.
11107 (vmulq_n_u32): Likewise.
11108 (vmulltq_int_u32): Likewise.
11109 (vmullbq_int_u32): Likewise.
11110 (vmulhq_u32): Likewise.
11111 (vmladavq_u32): Likewise.
11112 (vminvq_u32): Likewise.
11113 (vminq_u32): Likewise.
11114 (vmaxvq_u32): Likewise.
11115 (vmaxq_u32): Likewise.
11116 (vhsubq_u32): Likewise.
11117 (vhsubq_n_u32): Likewise.
11118 (vhaddq_u32): Likewise.
11119 (vhaddq_n_u32): Likewise.
11120 (veorq_u32): Likewise.
11121 (vcmpneq_n_u32): Likewise.
11122 (vcmphiq_u32): Likewise.
11123 (vcmphiq_n_u32): Likewise.
11124 (vcmpeqq_u32): Likewise.
11125 (vcmpeqq_n_u32): Likewise.
11126 (vcmpcsq_u32): Likewise.
11127 (vcmpcsq_n_u32): Likewise.
11128 (vcaddq_rot90_u32): Likewise.
11129 (vcaddq_rot270_u32): Likewise.
11130 (vbicq_u32): Likewise.
11131 (vandq_u32): Likewise.
11132 (vaddvq_p_u32): Likewise.
11133 (vaddvaq_u32): Likewise.
11134 (vaddq_n_u32): Likewise.
11135 (vabdq_u32): Likewise.
11136 (vshlq_r_u32): Likewise.
11137 (vrshlq_u32): Likewise.
11138 (vrshlq_n_u32): Likewise.
11139 (vqshlq_u32): Likewise.
11140 (vqshlq_r_u32): Likewise.
11141 (vqrshlq_u32): Likewise.
11142 (vqrshlq_n_u32): Likewise.
11143 (vminavq_s32): Likewise.
11144 (vminaq_s32): Likewise.
11145 (vmaxavq_s32): Likewise.
11146 (vmaxaq_s32): Likewise.
11147 (vbrsrq_n_u32): Likewise.
11148 (vshlq_n_u32): Likewise.
11149 (vrshrq_n_u32): Likewise.
11150 (vqshlq_n_u32): Likewise.
11151 (vcmpneq_n_s32): Likewise.
11152 (vcmpltq_s32): Likewise.
11153 (vcmpltq_n_s32): Likewise.
11154 (vcmpleq_s32): Likewise.
11155 (vcmpleq_n_s32): Likewise.
11156 (vcmpgtq_s32): Likewise.
11157 (vcmpgtq_n_s32): Likewise.
11158 (vcmpgeq_s32): Likewise.
11159 (vcmpgeq_n_s32): Likewise.
11160 (vcmpeqq_s32): Likewise.
11161 (vcmpeqq_n_s32): Likewise.
11162 (vqshluq_n_s32): Likewise.
11163 (vaddvq_p_s32): Likewise.
11164 (vsubq_s32): Likewise.
11165 (vsubq_n_s32): Likewise.
11166 (vshlq_r_s32): Likewise.
11167 (vrshlq_s32): Likewise.
11168 (vrshlq_n_s32): Likewise.
11169 (vrmulhq_s32): Likewise.
11170 (vrhaddq_s32): Likewise.
11171 (vqsubq_s32): Likewise.
11172 (vqsubq_n_s32): Likewise.
11173 (vqshlq_s32): Likewise.
11174 (vqshlq_r_s32): Likewise.
11175 (vqrshlq_s32): Likewise.
11176 (vqrshlq_n_s32): Likewise.
11177 (vqrdmulhq_s32): Likewise.
11178 (vqrdmulhq_n_s32): Likewise.
11179 (vqdmulhq_s32): Likewise.
11180 (vqdmulhq_n_s32): Likewise.
11181 (vqaddq_s32): Likewise.
11182 (vqaddq_n_s32): Likewise.
11183 (vorrq_s32): Likewise.
11184 (vornq_s32): Likewise.
11185 (vmulq_s32): Likewise.
11186 (vmulq_n_s32): Likewise.
11187 (vmulltq_int_s32): Likewise.
11188 (vmullbq_int_s32): Likewise.
11189 (vmulhq_s32): Likewise.
11190 (vmlsdavxq_s32): Likewise.
11191 (vmlsdavq_s32): Likewise.
11192 (vmladavxq_s32): Likewise.
11193 (vmladavq_s32): Likewise.
11194 (vminvq_s32): Likewise.
11195 (vminq_s32): Likewise.
11196 (vmaxvq_s32): Likewise.
11197 (vmaxq_s32): Likewise.
11198 (vhsubq_s32): Likewise.
11199 (vhsubq_n_s32): Likewise.
11200 (vhcaddq_rot90_s32): Likewise.
11201 (vhcaddq_rot270_s32): Likewise.
11202 (vhaddq_s32): Likewise.
11203 (vhaddq_n_s32): Likewise.
11204 (veorq_s32): Likewise.
11205 (vcaddq_rot90_s32): Likewise.
11206 (vcaddq_rot270_s32): Likewise.
11207 (vbrsrq_n_s32): Likewise.
11208 (vbicq_s32): Likewise.
11209 (vandq_s32): Likewise.
11210 (vaddvaq_s32): Likewise.
11211 (vaddq_n_s32): Likewise.
11212 (vabdq_s32): Likewise.
11213 (vshlq_n_s32): Likewise.
11214 (vrshrq_n_s32): Likewise.
11215 (vqshlq_n_s32): Likewise.
11216 (__arm_vsubq_u8): Define intrinsic.
11217 (__arm_vsubq_n_u8): Likewise.
11218 (__arm_vrmulhq_u8): Likewise.
11219 (__arm_vrhaddq_u8): Likewise.
11220 (__arm_vqsubq_u8): Likewise.
11221 (__arm_vqsubq_n_u8): Likewise.
11222 (__arm_vqaddq_u8): Likewise.
11223 (__arm_vqaddq_n_u8): Likewise.
11224 (__arm_vorrq_u8): Likewise.
11225 (__arm_vornq_u8): Likewise.
11226 (__arm_vmulq_u8): Likewise.
11227 (__arm_vmulq_n_u8): Likewise.
11228 (__arm_vmulltq_int_u8): Likewise.
11229 (__arm_vmullbq_int_u8): Likewise.
11230 (__arm_vmulhq_u8): Likewise.
11231 (__arm_vmladavq_u8): Likewise.
11232 (__arm_vminvq_u8): Likewise.
11233 (__arm_vminq_u8): Likewise.
11234 (__arm_vmaxvq_u8): Likewise.
11235 (__arm_vmaxq_u8): Likewise.
11236 (__arm_vhsubq_u8): Likewise.
11237 (__arm_vhsubq_n_u8): Likewise.
11238 (__arm_vhaddq_u8): Likewise.
11239 (__arm_vhaddq_n_u8): Likewise.
11240 (__arm_veorq_u8): Likewise.
11241 (__arm_vcmpneq_n_u8): Likewise.
11242 (__arm_vcmphiq_u8): Likewise.
11243 (__arm_vcmphiq_n_u8): Likewise.
11244 (__arm_vcmpeqq_u8): Likewise.
11245 (__arm_vcmpeqq_n_u8): Likewise.
11246 (__arm_vcmpcsq_u8): Likewise.
11247 (__arm_vcmpcsq_n_u8): Likewise.
11248 (__arm_vcaddq_rot90_u8): Likewise.
11249 (__arm_vcaddq_rot270_u8): Likewise.
11250 (__arm_vbicq_u8): Likewise.
11251 (__arm_vandq_u8): Likewise.
11252 (__arm_vaddvq_p_u8): Likewise.
11253 (__arm_vaddvaq_u8): Likewise.
11254 (__arm_vaddq_n_u8): Likewise.
11255 (__arm_vabdq_u8): Likewise.
11256 (__arm_vshlq_r_u8): Likewise.
11257 (__arm_vrshlq_u8): Likewise.
11258 (__arm_vrshlq_n_u8): Likewise.
11259 (__arm_vqshlq_u8): Likewise.
11260 (__arm_vqshlq_r_u8): Likewise.
11261 (__arm_vqrshlq_u8): Likewise.
11262 (__arm_vqrshlq_n_u8): Likewise.
11263 (__arm_vminavq_s8): Likewise.
11264 (__arm_vminaq_s8): Likewise.
11265 (__arm_vmaxavq_s8): Likewise.
11266 (__arm_vmaxaq_s8): Likewise.
11267 (__arm_vbrsrq_n_u8): Likewise.
11268 (__arm_vshlq_n_u8): Likewise.
11269 (__arm_vrshrq_n_u8): Likewise.
11270 (__arm_vqshlq_n_u8): Likewise.
11271 (__arm_vcmpneq_n_s8): Likewise.
11272 (__arm_vcmpltq_s8): Likewise.
11273 (__arm_vcmpltq_n_s8): Likewise.
11274 (__arm_vcmpleq_s8): Likewise.
11275 (__arm_vcmpleq_n_s8): Likewise.
11276 (__arm_vcmpgtq_s8): Likewise.
11277 (__arm_vcmpgtq_n_s8): Likewise.
11278 (__arm_vcmpgeq_s8): Likewise.
11279 (__arm_vcmpgeq_n_s8): Likewise.
11280 (__arm_vcmpeqq_s8): Likewise.
11281 (__arm_vcmpeqq_n_s8): Likewise.
11282 (__arm_vqshluq_n_s8): Likewise.
11283 (__arm_vaddvq_p_s8): Likewise.
11284 (__arm_vsubq_s8): Likewise.
11285 (__arm_vsubq_n_s8): Likewise.
11286 (__arm_vshlq_r_s8): Likewise.
11287 (__arm_vrshlq_s8): Likewise.
11288 (__arm_vrshlq_n_s8): Likewise.
11289 (__arm_vrmulhq_s8): Likewise.
11290 (__arm_vrhaddq_s8): Likewise.
11291 (__arm_vqsubq_s8): Likewise.
11292 (__arm_vqsubq_n_s8): Likewise.
11293 (__arm_vqshlq_s8): Likewise.
11294 (__arm_vqshlq_r_s8): Likewise.
11295 (__arm_vqrshlq_s8): Likewise.
11296 (__arm_vqrshlq_n_s8): Likewise.
11297 (__arm_vqrdmulhq_s8): Likewise.
11298 (__arm_vqrdmulhq_n_s8): Likewise.
11299 (__arm_vqdmulhq_s8): Likewise.
11300 (__arm_vqdmulhq_n_s8): Likewise.
11301 (__arm_vqaddq_s8): Likewise.
11302 (__arm_vqaddq_n_s8): Likewise.
11303 (__arm_vorrq_s8): Likewise.
11304 (__arm_vornq_s8): Likewise.
11305 (__arm_vmulq_s8): Likewise.
11306 (__arm_vmulq_n_s8): Likewise.
11307 (__arm_vmulltq_int_s8): Likewise.
11308 (__arm_vmullbq_int_s8): Likewise.
11309 (__arm_vmulhq_s8): Likewise.
11310 (__arm_vmlsdavxq_s8): Likewise.
11311 (__arm_vmlsdavq_s8): Likewise.
11312 (__arm_vmladavxq_s8): Likewise.
11313 (__arm_vmladavq_s8): Likewise.
11314 (__arm_vminvq_s8): Likewise.
11315 (__arm_vminq_s8): Likewise.
11316 (__arm_vmaxvq_s8): Likewise.
11317 (__arm_vmaxq_s8): Likewise.
11318 (__arm_vhsubq_s8): Likewise.
11319 (__arm_vhsubq_n_s8): Likewise.
11320 (__arm_vhcaddq_rot90_s8): Likewise.
11321 (__arm_vhcaddq_rot270_s8): Likewise.
11322 (__arm_vhaddq_s8): Likewise.
11323 (__arm_vhaddq_n_s8): Likewise.
11324 (__arm_veorq_s8): Likewise.
11325 (__arm_vcaddq_rot90_s8): Likewise.
11326 (__arm_vcaddq_rot270_s8): Likewise.
11327 (__arm_vbrsrq_n_s8): Likewise.
11328 (__arm_vbicq_s8): Likewise.
11329 (__arm_vandq_s8): Likewise.
11330 (__arm_vaddvaq_s8): Likewise.
11331 (__arm_vaddq_n_s8): Likewise.
11332 (__arm_vabdq_s8): Likewise.
11333 (__arm_vshlq_n_s8): Likewise.
11334 (__arm_vrshrq_n_s8): Likewise.
11335 (__arm_vqshlq_n_s8): Likewise.
11336 (__arm_vsubq_u16): Likewise.
11337 (__arm_vsubq_n_u16): Likewise.
11338 (__arm_vrmulhq_u16): Likewise.
11339 (__arm_vrhaddq_u16): Likewise.
11340 (__arm_vqsubq_u16): Likewise.
11341 (__arm_vqsubq_n_u16): Likewise.
11342 (__arm_vqaddq_u16): Likewise.
11343 (__arm_vqaddq_n_u16): Likewise.
11344 (__arm_vorrq_u16): Likewise.
11345 (__arm_vornq_u16): Likewise.
11346 (__arm_vmulq_u16): Likewise.
11347 (__arm_vmulq_n_u16): Likewise.
11348 (__arm_vmulltq_int_u16): Likewise.
11349 (__arm_vmullbq_int_u16): Likewise.
11350 (__arm_vmulhq_u16): Likewise.
11351 (__arm_vmladavq_u16): Likewise.
11352 (__arm_vminvq_u16): Likewise.
11353 (__arm_vminq_u16): Likewise.
11354 (__arm_vmaxvq_u16): Likewise.
11355 (__arm_vmaxq_u16): Likewise.
11356 (__arm_vhsubq_u16): Likewise.
11357 (__arm_vhsubq_n_u16): Likewise.
11358 (__arm_vhaddq_u16): Likewise.
11359 (__arm_vhaddq_n_u16): Likewise.
11360 (__arm_veorq_u16): Likewise.
11361 (__arm_vcmpneq_n_u16): Likewise.
11362 (__arm_vcmphiq_u16): Likewise.
11363 (__arm_vcmphiq_n_u16): Likewise.
11364 (__arm_vcmpeqq_u16): Likewise.
11365 (__arm_vcmpeqq_n_u16): Likewise.
11366 (__arm_vcmpcsq_u16): Likewise.
11367 (__arm_vcmpcsq_n_u16): Likewise.
11368 (__arm_vcaddq_rot90_u16): Likewise.
11369 (__arm_vcaddq_rot270_u16): Likewise.
11370 (__arm_vbicq_u16): Likewise.
11371 (__arm_vandq_u16): Likewise.
11372 (__arm_vaddvq_p_u16): Likewise.
11373 (__arm_vaddvaq_u16): Likewise.
11374 (__arm_vaddq_n_u16): Likewise.
11375 (__arm_vabdq_u16): Likewise.
11376 (__arm_vshlq_r_u16): Likewise.
11377 (__arm_vrshlq_u16): Likewise.
11378 (__arm_vrshlq_n_u16): Likewise.
11379 (__arm_vqshlq_u16): Likewise.
11380 (__arm_vqshlq_r_u16): Likewise.
11381 (__arm_vqrshlq_u16): Likewise.
11382 (__arm_vqrshlq_n_u16): Likewise.
11383 (__arm_vminavq_s16): Likewise.
11384 (__arm_vminaq_s16): Likewise.
11385 (__arm_vmaxavq_s16): Likewise.
11386 (__arm_vmaxaq_s16): Likewise.
11387 (__arm_vbrsrq_n_u16): Likewise.
11388 (__arm_vshlq_n_u16): Likewise.
11389 (__arm_vrshrq_n_u16): Likewise.
11390 (__arm_vqshlq_n_u16): Likewise.
11391 (__arm_vcmpneq_n_s16): Likewise.
11392 (__arm_vcmpltq_s16): Likewise.
11393 (__arm_vcmpltq_n_s16): Likewise.
11394 (__arm_vcmpleq_s16): Likewise.
11395 (__arm_vcmpleq_n_s16): Likewise.
11396 (__arm_vcmpgtq_s16): Likewise.
11397 (__arm_vcmpgtq_n_s16): Likewise.
11398 (__arm_vcmpgeq_s16): Likewise.
11399 (__arm_vcmpgeq_n_s16): Likewise.
11400 (__arm_vcmpeqq_s16): Likewise.
11401 (__arm_vcmpeqq_n_s16): Likewise.
11402 (__arm_vqshluq_n_s16): Likewise.
11403 (__arm_vaddvq_p_s16): Likewise.
11404 (__arm_vsubq_s16): Likewise.
11405 (__arm_vsubq_n_s16): Likewise.
11406 (__arm_vshlq_r_s16): Likewise.
11407 (__arm_vrshlq_s16): Likewise.
11408 (__arm_vrshlq_n_s16): Likewise.
11409 (__arm_vrmulhq_s16): Likewise.
11410 (__arm_vrhaddq_s16): Likewise.
11411 (__arm_vqsubq_s16): Likewise.
11412 (__arm_vqsubq_n_s16): Likewise.
11413 (__arm_vqshlq_s16): Likewise.
11414 (__arm_vqshlq_r_s16): Likewise.
11415 (__arm_vqrshlq_s16): Likewise.
11416 (__arm_vqrshlq_n_s16): Likewise.
11417 (__arm_vqrdmulhq_s16): Likewise.
11418 (__arm_vqrdmulhq_n_s16): Likewise.
11419 (__arm_vqdmulhq_s16): Likewise.
11420 (__arm_vqdmulhq_n_s16): Likewise.
11421 (__arm_vqaddq_s16): Likewise.
11422 (__arm_vqaddq_n_s16): Likewise.
11423 (__arm_vorrq_s16): Likewise.
11424 (__arm_vornq_s16): Likewise.
11425 (__arm_vmulq_s16): Likewise.
11426 (__arm_vmulq_n_s16): Likewise.
11427 (__arm_vmulltq_int_s16): Likewise.
11428 (__arm_vmullbq_int_s16): Likewise.
11429 (__arm_vmulhq_s16): Likewise.
11430 (__arm_vmlsdavxq_s16): Likewise.
11431 (__arm_vmlsdavq_s16): Likewise.
11432 (__arm_vmladavxq_s16): Likewise.
11433 (__arm_vmladavq_s16): Likewise.
11434 (__arm_vminvq_s16): Likewise.
11435 (__arm_vminq_s16): Likewise.
11436 (__arm_vmaxvq_s16): Likewise.
11437 (__arm_vmaxq_s16): Likewise.
11438 (__arm_vhsubq_s16): Likewise.
11439 (__arm_vhsubq_n_s16): Likewise.
11440 (__arm_vhcaddq_rot90_s16): Likewise.
11441 (__arm_vhcaddq_rot270_s16): Likewise.
11442 (__arm_vhaddq_s16): Likewise.
11443 (__arm_vhaddq_n_s16): Likewise.
11444 (__arm_veorq_s16): Likewise.
11445 (__arm_vcaddq_rot90_s16): Likewise.
11446 (__arm_vcaddq_rot270_s16): Likewise.
11447 (__arm_vbrsrq_n_s16): Likewise.
11448 (__arm_vbicq_s16): Likewise.
11449 (__arm_vandq_s16): Likewise.
11450 (__arm_vaddvaq_s16): Likewise.
11451 (__arm_vaddq_n_s16): Likewise.
11452 (__arm_vabdq_s16): Likewise.
11453 (__arm_vshlq_n_s16): Likewise.
11454 (__arm_vrshrq_n_s16): Likewise.
11455 (__arm_vqshlq_n_s16): Likewise.
11456 (__arm_vsubq_u32): Likewise.
11457 (__arm_vsubq_n_u32): Likewise.
11458 (__arm_vrmulhq_u32): Likewise.
11459 (__arm_vrhaddq_u32): Likewise.
11460 (__arm_vqsubq_u32): Likewise.
11461 (__arm_vqsubq_n_u32): Likewise.
11462 (__arm_vqaddq_u32): Likewise.
11463 (__arm_vqaddq_n_u32): Likewise.
11464 (__arm_vorrq_u32): Likewise.
11465 (__arm_vornq_u32): Likewise.
11466 (__arm_vmulq_u32): Likewise.
11467 (__arm_vmulq_n_u32): Likewise.
11468 (__arm_vmulltq_int_u32): Likewise.
11469 (__arm_vmullbq_int_u32): Likewise.
11470 (__arm_vmulhq_u32): Likewise.
11471 (__arm_vmladavq_u32): Likewise.
11472 (__arm_vminvq_u32): Likewise.
11473 (__arm_vminq_u32): Likewise.
11474 (__arm_vmaxvq_u32): Likewise.
11475 (__arm_vmaxq_u32): Likewise.
11476 (__arm_vhsubq_u32): Likewise.
11477 (__arm_vhsubq_n_u32): Likewise.
11478 (__arm_vhaddq_u32): Likewise.
11479 (__arm_vhaddq_n_u32): Likewise.
11480 (__arm_veorq_u32): Likewise.
11481 (__arm_vcmpneq_n_u32): Likewise.
11482 (__arm_vcmphiq_u32): Likewise.
11483 (__arm_vcmphiq_n_u32): Likewise.
11484 (__arm_vcmpeqq_u32): Likewise.
11485 (__arm_vcmpeqq_n_u32): Likewise.
11486 (__arm_vcmpcsq_u32): Likewise.
11487 (__arm_vcmpcsq_n_u32): Likewise.
11488 (__arm_vcaddq_rot90_u32): Likewise.
11489 (__arm_vcaddq_rot270_u32): Likewise.
11490 (__arm_vbicq_u32): Likewise.
11491 (__arm_vandq_u32): Likewise.
11492 (__arm_vaddvq_p_u32): Likewise.
11493 (__arm_vaddvaq_u32): Likewise.
11494 (__arm_vaddq_n_u32): Likewise.
11495 (__arm_vabdq_u32): Likewise.
11496 (__arm_vshlq_r_u32): Likewise.
11497 (__arm_vrshlq_u32): Likewise.
11498 (__arm_vrshlq_n_u32): Likewise.
11499 (__arm_vqshlq_u32): Likewise.
11500 (__arm_vqshlq_r_u32): Likewise.
11501 (__arm_vqrshlq_u32): Likewise.
11502 (__arm_vqrshlq_n_u32): Likewise.
11503 (__arm_vminavq_s32): Likewise.
11504 (__arm_vminaq_s32): Likewise.
11505 (__arm_vmaxavq_s32): Likewise.
11506 (__arm_vmaxaq_s32): Likewise.
11507 (__arm_vbrsrq_n_u32): Likewise.
11508 (__arm_vshlq_n_u32): Likewise.
11509 (__arm_vrshrq_n_u32): Likewise.
11510 (__arm_vqshlq_n_u32): Likewise.
11511 (__arm_vcmpneq_n_s32): Likewise.
11512 (__arm_vcmpltq_s32): Likewise.
11513 (__arm_vcmpltq_n_s32): Likewise.
11514 (__arm_vcmpleq_s32): Likewise.
11515 (__arm_vcmpleq_n_s32): Likewise.
11516 (__arm_vcmpgtq_s32): Likewise.
11517 (__arm_vcmpgtq_n_s32): Likewise.
11518 (__arm_vcmpgeq_s32): Likewise.
11519 (__arm_vcmpgeq_n_s32): Likewise.
11520 (__arm_vcmpeqq_s32): Likewise.
11521 (__arm_vcmpeqq_n_s32): Likewise.
11522 (__arm_vqshluq_n_s32): Likewise.
11523 (__arm_vaddvq_p_s32): Likewise.
11524 (__arm_vsubq_s32): Likewise.
11525 (__arm_vsubq_n_s32): Likewise.
11526 (__arm_vshlq_r_s32): Likewise.
11527 (__arm_vrshlq_s32): Likewise.
11528 (__arm_vrshlq_n_s32): Likewise.
11529 (__arm_vrmulhq_s32): Likewise.
11530 (__arm_vrhaddq_s32): Likewise.
11531 (__arm_vqsubq_s32): Likewise.
11532 (__arm_vqsubq_n_s32): Likewise.
11533 (__arm_vqshlq_s32): Likewise.
11534 (__arm_vqshlq_r_s32): Likewise.
11535 (__arm_vqrshlq_s32): Likewise.
11536 (__arm_vqrshlq_n_s32): Likewise.
11537 (__arm_vqrdmulhq_s32): Likewise.
11538 (__arm_vqrdmulhq_n_s32): Likewise.
11539 (__arm_vqdmulhq_s32): Likewise.
11540 (__arm_vqdmulhq_n_s32): Likewise.
11541 (__arm_vqaddq_s32): Likewise.
11542 (__arm_vqaddq_n_s32): Likewise.
11543 (__arm_vorrq_s32): Likewise.
11544 (__arm_vornq_s32): Likewise.
11545 (__arm_vmulq_s32): Likewise.
11546 (__arm_vmulq_n_s32): Likewise.
11547 (__arm_vmulltq_int_s32): Likewise.
11548 (__arm_vmullbq_int_s32): Likewise.
11549 (__arm_vmulhq_s32): Likewise.
11550 (__arm_vmlsdavxq_s32): Likewise.
11551 (__arm_vmlsdavq_s32): Likewise.
11552 (__arm_vmladavxq_s32): Likewise.
11553 (__arm_vmladavq_s32): Likewise.
11554 (__arm_vminvq_s32): Likewise.
11555 (__arm_vminq_s32): Likewise.
11556 (__arm_vmaxvq_s32): Likewise.
11557 (__arm_vmaxq_s32): Likewise.
11558 (__arm_vhsubq_s32): Likewise.
11559 (__arm_vhsubq_n_s32): Likewise.
11560 (__arm_vhcaddq_rot90_s32): Likewise.
11561 (__arm_vhcaddq_rot270_s32): Likewise.
11562 (__arm_vhaddq_s32): Likewise.
11563 (__arm_vhaddq_n_s32): Likewise.
11564 (__arm_veorq_s32): Likewise.
11565 (__arm_vcaddq_rot90_s32): Likewise.
11566 (__arm_vcaddq_rot270_s32): Likewise.
11567 (__arm_vbrsrq_n_s32): Likewise.
11568 (__arm_vbicq_s32): Likewise.
11569 (__arm_vandq_s32): Likewise.
11570 (__arm_vaddvaq_s32): Likewise.
11571 (__arm_vaddq_n_s32): Likewise.
11572 (__arm_vabdq_s32): Likewise.
11573 (__arm_vshlq_n_s32): Likewise.
11574 (__arm_vrshrq_n_s32): Likewise.
11575 (__arm_vqshlq_n_s32): Likewise.
11576 (vsubq): Define polymorphic variant.
11577 (vsubq_n): Likewise.
11578 (vshlq_r): Likewise.
11579 (vrshlq_n): Likewise.
11580 (vrshlq): Likewise.
11581 (vrmulhq): Likewise.
11582 (vrhaddq): Likewise.
11583 (vqsubq_n): Likewise.
11584 (vqsubq): Likewise.
11585 (vqshlq): Likewise.
11586 (vqshlq_r): Likewise.
11587 (vqshluq): Likewise.
11588 (vrshrq_n): Likewise.
11589 (vshlq_n): Likewise.
11590 (vqshluq_n): Likewise.
11591 (vqshlq_n): Likewise.
11592 (vqrshlq_n): Likewise.
11593 (vqrshlq): Likewise.
11594 (vqrdmulhq_n): Likewise.
11595 (vqrdmulhq): Likewise.
11596 (vqdmulhq_n): Likewise.
11597 (vqdmulhq): Likewise.
11598 (vqaddq_n): Likewise.
11599 (vqaddq): Likewise.
11600 (vorrq_n): Likewise.
11603 (vmulq_n): Likewise.
11605 (vmulltq_int): Likewise.
11606 (vmullbq_int): Likewise.
11607 (vmulhq): Likewise.
11609 (vminaq): Likewise.
11611 (vmaxaq): Likewise.
11612 (vhsubq_n): Likewise.
11613 (vhsubq): Likewise.
11614 (vhcaddq_rot90): Likewise.
11615 (vhcaddq_rot270): Likewise.
11616 (vhaddq_n): Likewise.
11617 (vhaddq): Likewise.
11619 (vcaddq_rot90): Likewise.
11620 (vcaddq_rot270): Likewise.
11621 (vbrsrq_n): Likewise.
11622 (vbicq_n): Likewise.
11625 (vaddq_n): Likewise.
11628 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
11629 (BINOP_NONE_NONE_NONE): Likewise.
11630 (BINOP_NONE_NONE_UNONE): Likewise.
11631 (BINOP_UNONE_NONE_IMM): Likewise.
11632 (BINOP_UNONE_NONE_NONE): Likewise.
11633 (BINOP_UNONE_UNONE_IMM): Likewise.
11634 (BINOP_UNONE_UNONE_NONE): Likewise.
11635 (BINOP_UNONE_UNONE_UNONE): Likewise.
11636 * config/arm/constraints.md (Ra): Define constraint to check constant is
11637 in the range of 0 to 7.
11638 (Rg): Define constriant to check the constant is one among 1, 2, 4
11640 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
11641 (mve_vaddq_n_<supf>): Likewise.
11642 (mve_vaddvaq_<supf>): Likewise.
11643 (mve_vaddvq_p_<supf>): Likewise.
11644 (mve_vandq_<supf>): Likewise.
11645 (mve_vbicq_<supf>): Likewise.
11646 (mve_vbrsrq_n_<supf>): Likewise.
11647 (mve_vcaddq_rot270_<supf>): Likewise.
11648 (mve_vcaddq_rot90_<supf>): Likewise.
11649 (mve_vcmpcsq_n_u): Likewise.
11650 (mve_vcmpcsq_u): Likewise.
11651 (mve_vcmpeqq_n_<supf>): Likewise.
11652 (mve_vcmpeqq_<supf>): Likewise.
11653 (mve_vcmpgeq_n_s): Likewise.
11654 (mve_vcmpgeq_s): Likewise.
11655 (mve_vcmpgtq_n_s): Likewise.
11656 (mve_vcmpgtq_s): Likewise.
11657 (mve_vcmphiq_n_u): Likewise.
11658 (mve_vcmphiq_u): Likewise.
11659 (mve_vcmpleq_n_s): Likewise.
11660 (mve_vcmpleq_s): Likewise.
11661 (mve_vcmpltq_n_s): Likewise.
11662 (mve_vcmpltq_s): Likewise.
11663 (mve_vcmpneq_n_<supf>): Likewise.
11664 (mve_vddupq_n_u): Likewise.
11665 (mve_veorq_<supf>): Likewise.
11666 (mve_vhaddq_n_<supf>): Likewise.
11667 (mve_vhaddq_<supf>): Likewise.
11668 (mve_vhcaddq_rot270_s): Likewise.
11669 (mve_vhcaddq_rot90_s): Likewise.
11670 (mve_vhsubq_n_<supf>): Likewise.
11671 (mve_vhsubq_<supf>): Likewise.
11672 (mve_vidupq_n_u): Likewise.
11673 (mve_vmaxaq_s): Likewise.
11674 (mve_vmaxavq_s): Likewise.
11675 (mve_vmaxq_<supf>): Likewise.
11676 (mve_vmaxvq_<supf>): Likewise.
11677 (mve_vminaq_s): Likewise.
11678 (mve_vminavq_s): Likewise.
11679 (mve_vminq_<supf>): Likewise.
11680 (mve_vminvq_<supf>): Likewise.
11681 (mve_vmladavq_<supf>): Likewise.
11682 (mve_vmladavxq_s): Likewise.
11683 (mve_vmlsdavq_s): Likewise.
11684 (mve_vmlsdavxq_s): Likewise.
11685 (mve_vmulhq_<supf>): Likewise.
11686 (mve_vmullbq_int_<supf>): Likewise.
11687 (mve_vmulltq_int_<supf>): Likewise.
11688 (mve_vmulq_n_<supf>): Likewise.
11689 (mve_vmulq_<supf>): Likewise.
11690 (mve_vornq_<supf>): Likewise.
11691 (mve_vorrq_<supf>): Likewise.
11692 (mve_vqaddq_n_<supf>): Likewise.
11693 (mve_vqaddq_<supf>): Likewise.
11694 (mve_vqdmulhq_n_s): Likewise.
11695 (mve_vqdmulhq_s): Likewise.
11696 (mve_vqrdmulhq_n_s): Likewise.
11697 (mve_vqrdmulhq_s): Likewise.
11698 (mve_vqrshlq_n_<supf>): Likewise.
11699 (mve_vqrshlq_<supf>): Likewise.
11700 (mve_vqshlq_n_<supf>): Likewise.
11701 (mve_vqshlq_r_<supf>): Likewise.
11702 (mve_vqshlq_<supf>): Likewise.
11703 (mve_vqshluq_n_s): Likewise.
11704 (mve_vqsubq_n_<supf>): Likewise.
11705 (mve_vqsubq_<supf>): Likewise.
11706 (mve_vrhaddq_<supf>): Likewise.
11707 (mve_vrmulhq_<supf>): Likewise.
11708 (mve_vrshlq_n_<supf>): Likewise.
11709 (mve_vrshlq_<supf>): Likewise.
11710 (mve_vrshrq_n_<supf>): Likewise.
11711 (mve_vshlq_n_<supf>): Likewise.
11712 (mve_vshlq_r_<supf>): Likewise.
11713 (mve_vsubq_n_<supf>): Likewise.
11714 (mve_vsubq_<supf>): Likewise.
11715 * config/arm/predicates.md (mve_imm_7): Define predicate to check
11716 the matching constraint Ra.
11717 (mve_imm_selective_upto_8): Define predicate to check the matching
11720 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11721 Mihail Ionescu <mihail.ionescu@arm.com>
11722 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11724 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
11725 qualifier for binary operands.
11726 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11727 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11728 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
11729 (vaddlvq_p_u32): Likewise.
11730 (vcmpneq_s8): Likewise.
11731 (vcmpneq_s16): Likewise.
11732 (vcmpneq_s32): Likewise.
11733 (vcmpneq_u8): Likewise.
11734 (vcmpneq_u16): Likewise.
11735 (vcmpneq_u32): Likewise.
11736 (vshlq_s8): Likewise.
11737 (vshlq_s16): Likewise.
11738 (vshlq_s32): Likewise.
11739 (vshlq_u8): Likewise.
11740 (vshlq_u16): Likewise.
11741 (vshlq_u32): Likewise.
11742 (__arm_vaddlvq_p_s32): Define intrinsic.
11743 (__arm_vaddlvq_p_u32): Likewise.
11744 (__arm_vcmpneq_s8): Likewise.
11745 (__arm_vcmpneq_s16): Likewise.
11746 (__arm_vcmpneq_s32): Likewise.
11747 (__arm_vcmpneq_u8): Likewise.
11748 (__arm_vcmpneq_u16): Likewise.
11749 (__arm_vcmpneq_u32): Likewise.
11750 (__arm_vshlq_s8): Likewise.
11751 (__arm_vshlq_s16): Likewise.
11752 (__arm_vshlq_s32): Likewise.
11753 (__arm_vshlq_u8): Likewise.
11754 (__arm_vshlq_u16): Likewise.
11755 (__arm_vshlq_u32): Likewise.
11756 (vaddlvq_p): Define polymorphic variant.
11757 (vcmpneq): Likewise.
11759 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
11761 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11762 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11763 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
11764 (mve_vcmpneq_<supf><mode>): Likewise.
11765 (mve_vshlq_<supf><mode>): Likewise.
11767 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11768 Mihail Ionescu <mihail.ionescu@arm.com>
11769 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11771 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
11772 qualifier for binary operands.
11773 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11774 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11775 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
11776 (vcvtq_n_s32_f32): Likewise.
11777 (vcvtq_n_u16_f16): Likewise.
11778 (vcvtq_n_u32_f32): Likewise.
11779 (vcreateq_u8): Likewise.
11780 (vcreateq_u16): Likewise.
11781 (vcreateq_u32): Likewise.
11782 (vcreateq_u64): Likewise.
11783 (vcreateq_s8): Likewise.
11784 (vcreateq_s16): Likewise.
11785 (vcreateq_s32): Likewise.
11786 (vcreateq_s64): Likewise.
11787 (vshrq_n_s8): Likewise.
11788 (vshrq_n_s16): Likewise.
11789 (vshrq_n_s32): Likewise.
11790 (vshrq_n_u8): Likewise.
11791 (vshrq_n_u16): Likewise.
11792 (vshrq_n_u32): Likewise.
11793 (__arm_vcreateq_u8): Define intrinsic.
11794 (__arm_vcreateq_u16): Likewise.
11795 (__arm_vcreateq_u32): Likewise.
11796 (__arm_vcreateq_u64): Likewise.
11797 (__arm_vcreateq_s8): Likewise.
11798 (__arm_vcreateq_s16): Likewise.
11799 (__arm_vcreateq_s32): Likewise.
11800 (__arm_vcreateq_s64): Likewise.
11801 (__arm_vshrq_n_s8): Likewise.
11802 (__arm_vshrq_n_s16): Likewise.
11803 (__arm_vshrq_n_s32): Likewise.
11804 (__arm_vshrq_n_u8): Likewise.
11805 (__arm_vshrq_n_u16): Likewise.
11806 (__arm_vshrq_n_u32): Likewise.
11807 (__arm_vcvtq_n_s16_f16): Likewise.
11808 (__arm_vcvtq_n_s32_f32): Likewise.
11809 (__arm_vcvtq_n_u16_f16): Likewise.
11810 (__arm_vcvtq_n_u32_f32): Likewise.
11811 (vshrq_n): Define polymorphic variant.
11812 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
11814 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11815 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11816 * config/arm/constraints.md (Rb): Define constraint to check constant is
11817 in the range of 1 to 8.
11818 (Rf): Define constraint to check constant is in the range of 1 to 32.
11819 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
11820 (mve_vshrq_n_<supf><mode>): Likewise.
11821 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
11822 * config/arm/predicates.md (mve_imm_8): Define predicate to check
11823 the matching constraint Rb.
11824 (mve_imm_32): Define predicate to check the matching constraint Rf.
11826 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11827 Mihail Ionescu <mihail.ionescu@arm.com>
11828 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11830 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
11831 qualifier for binary operands.
11832 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11833 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11834 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11835 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
11836 (vsubq_n_f32): Likewise.
11837 (vbrsrq_n_f16): Likewise.
11838 (vbrsrq_n_f32): Likewise.
11839 (vcvtq_n_f16_s16): Likewise.
11840 (vcvtq_n_f32_s32): Likewise.
11841 (vcvtq_n_f16_u16): Likewise.
11842 (vcvtq_n_f32_u32): Likewise.
11843 (vcreateq_f16): Likewise.
11844 (vcreateq_f32): Likewise.
11845 (__arm_vsubq_n_f16): Define intrinsic.
11846 (__arm_vsubq_n_f32): Likewise.
11847 (__arm_vbrsrq_n_f16): Likewise.
11848 (__arm_vbrsrq_n_f32): Likewise.
11849 (__arm_vcvtq_n_f16_s16): Likewise.
11850 (__arm_vcvtq_n_f32_s32): Likewise.
11851 (__arm_vcvtq_n_f16_u16): Likewise.
11852 (__arm_vcvtq_n_f32_u32): Likewise.
11853 (__arm_vcreateq_f16): Likewise.
11854 (__arm_vcreateq_f32): Likewise.
11855 (vsubq): Define polymorphic variant.
11856 (vbrsrq): Likewise.
11857 (vcvtq_n): Likewise.
11858 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
11860 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11861 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11862 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11863 * config/arm/constraints.md (Rd): Define constraint to check constant is
11864 in the range of 1 to 16.
11865 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
11866 mve_vbrsrq_n_f<mode>: Likewise.
11867 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
11868 mve_vcreateq_f<mode>: Likewise.
11869 * config/arm/predicates.md (mve_imm_16): Define predicate to check
11870 the matching constraint Rd.
11872 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11873 Mihail Ionescu <mihail.ionescu@arm.com>
11874 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11876 * config/arm/arm-builtins.c (hi_UP): Define mode.
11877 * config/arm/arm.h (IS_VPR_REGNUM): Move.
11878 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
11879 (APSRQ_REGNUM): Modify.
11880 (APSRGE_REGNUM): Modify.
11881 * config/arm/arm_mve.h (vctp16q): Define macro.
11882 (vctp32q): Likewise.
11883 (vctp64q): Likewise.
11884 (vctp8q): Likewise.
11886 (__arm_vctp16q): Define intrinsic.
11887 (__arm_vctp32q): Likewise.
11888 (__arm_vctp64q): Likewise.
11889 (__arm_vctp8q): Likewise.
11890 (__arm_vpnot): Likewise.
11891 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
11893 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
11894 (mve_vpnothi): Likewise.
11896 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11897 Mihail Ionescu <mihail.ionescu@arm.com>
11898 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11900 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
11901 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
11902 (vdupq_n_s16): Likewise.
11903 (vdupq_n_s32): Likewise.
11904 (vabsq_s8): Likewise.
11905 (vabsq_s16): Likewise.
11906 (vabsq_s32): Likewise.
11907 (vclsq_s8): Likewise.
11908 (vclsq_s16): Likewise.
11909 (vclsq_s32): Likewise.
11910 (vclzq_s8): Likewise.
11911 (vclzq_s16): Likewise.
11912 (vclzq_s32): Likewise.
11913 (vnegq_s8): Likewise.
11914 (vnegq_s16): Likewise.
11915 (vnegq_s32): Likewise.
11916 (vaddlvq_s32): Likewise.
11917 (vaddvq_s8): Likewise.
11918 (vaddvq_s16): Likewise.
11919 (vaddvq_s32): Likewise.
11920 (vmovlbq_s8): Likewise.
11921 (vmovlbq_s16): Likewise.
11922 (vmovltq_s8): Likewise.
11923 (vmovltq_s16): Likewise.
11924 (vmvnq_s8): Likewise.
11925 (vmvnq_s16): Likewise.
11926 (vmvnq_s32): Likewise.
11927 (vrev16q_s8): Likewise.
11928 (vrev32q_s8): Likewise.
11929 (vrev32q_s16): Likewise.
11930 (vqabsq_s8): Likewise.
11931 (vqabsq_s16): Likewise.
11932 (vqabsq_s32): Likewise.
11933 (vqnegq_s8): Likewise.
11934 (vqnegq_s16): Likewise.
11935 (vqnegq_s32): Likewise.
11936 (vcvtaq_s16_f16): Likewise.
11937 (vcvtaq_s32_f32): Likewise.
11938 (vcvtnq_s16_f16): Likewise.
11939 (vcvtnq_s32_f32): Likewise.
11940 (vcvtpq_s16_f16): Likewise.
11941 (vcvtpq_s32_f32): Likewise.
11942 (vcvtmq_s16_f16): Likewise.
11943 (vcvtmq_s32_f32): Likewise.
11944 (vmvnq_u8): Likewise.
11945 (vmvnq_u16): Likewise.
11946 (vmvnq_u32): Likewise.
11947 (vdupq_n_u8): Likewise.
11948 (vdupq_n_u16): Likewise.
11949 (vdupq_n_u32): Likewise.
11950 (vclzq_u8): Likewise.
11951 (vclzq_u16): Likewise.
11952 (vclzq_u32): Likewise.
11953 (vaddvq_u8): Likewise.
11954 (vaddvq_u16): Likewise.
11955 (vaddvq_u32): Likewise.
11956 (vrev32q_u8): Likewise.
11957 (vrev32q_u16): Likewise.
11958 (vmovltq_u8): Likewise.
11959 (vmovltq_u16): Likewise.
11960 (vmovlbq_u8): Likewise.
11961 (vmovlbq_u16): Likewise.
11962 (vrev16q_u8): Likewise.
11963 (vaddlvq_u32): Likewise.
11964 (vcvtpq_u16_f16): Likewise.
11965 (vcvtpq_u32_f32): Likewise.
11966 (vcvtnq_u16_f16): Likewise.
11967 (vcvtmq_u16_f16): Likewise.
11968 (vcvtmq_u32_f32): Likewise.
11969 (vcvtaq_u16_f16): Likewise.
11970 (vcvtaq_u32_f32): Likewise.
11971 (__arm_vdupq_n_s8): Define intrinsic.
11972 (__arm_vdupq_n_s16): Likewise.
11973 (__arm_vdupq_n_s32): Likewise.
11974 (__arm_vabsq_s8): Likewise.
11975 (__arm_vabsq_s16): Likewise.
11976 (__arm_vabsq_s32): Likewise.
11977 (__arm_vclsq_s8): Likewise.
11978 (__arm_vclsq_s16): Likewise.
11979 (__arm_vclsq_s32): Likewise.
11980 (__arm_vclzq_s8): Likewise.
11981 (__arm_vclzq_s16): Likewise.
11982 (__arm_vclzq_s32): Likewise.
11983 (__arm_vnegq_s8): Likewise.
11984 (__arm_vnegq_s16): Likewise.
11985 (__arm_vnegq_s32): Likewise.
11986 (__arm_vaddlvq_s32): Likewise.
11987 (__arm_vaddvq_s8): Likewise.
11988 (__arm_vaddvq_s16): Likewise.
11989 (__arm_vaddvq_s32): Likewise.
11990 (__arm_vmovlbq_s8): Likewise.
11991 (__arm_vmovlbq_s16): Likewise.
11992 (__arm_vmovltq_s8): Likewise.
11993 (__arm_vmovltq_s16): Likewise.
11994 (__arm_vmvnq_s8): Likewise.
11995 (__arm_vmvnq_s16): Likewise.
11996 (__arm_vmvnq_s32): Likewise.
11997 (__arm_vrev16q_s8): Likewise.
11998 (__arm_vrev32q_s8): Likewise.
11999 (__arm_vrev32q_s16): Likewise.
12000 (__arm_vqabsq_s8): Likewise.
12001 (__arm_vqabsq_s16): Likewise.
12002 (__arm_vqabsq_s32): Likewise.
12003 (__arm_vqnegq_s8): Likewise.
12004 (__arm_vqnegq_s16): Likewise.
12005 (__arm_vqnegq_s32): Likewise.
12006 (__arm_vmvnq_u8): Likewise.
12007 (__arm_vmvnq_u16): Likewise.
12008 (__arm_vmvnq_u32): Likewise.
12009 (__arm_vdupq_n_u8): Likewise.
12010 (__arm_vdupq_n_u16): Likewise.
12011 (__arm_vdupq_n_u32): Likewise.
12012 (__arm_vclzq_u8): Likewise.
12013 (__arm_vclzq_u16): Likewise.
12014 (__arm_vclzq_u32): Likewise.
12015 (__arm_vaddvq_u8): Likewise.
12016 (__arm_vaddvq_u16): Likewise.
12017 (__arm_vaddvq_u32): Likewise.
12018 (__arm_vrev32q_u8): Likewise.
12019 (__arm_vrev32q_u16): Likewise.
12020 (__arm_vmovltq_u8): Likewise.
12021 (__arm_vmovltq_u16): Likewise.
12022 (__arm_vmovlbq_u8): Likewise.
12023 (__arm_vmovlbq_u16): Likewise.
12024 (__arm_vrev16q_u8): Likewise.
12025 (__arm_vaddlvq_u32): Likewise.
12026 (__arm_vcvtpq_u16_f16): Likewise.
12027 (__arm_vcvtpq_u32_f32): Likewise.
12028 (__arm_vcvtnq_u16_f16): Likewise.
12029 (__arm_vcvtmq_u16_f16): Likewise.
12030 (__arm_vcvtmq_u32_f32): Likewise.
12031 (__arm_vcvtaq_u16_f16): Likewise.
12032 (__arm_vcvtaq_u32_f32): Likewise.
12033 (__arm_vcvtaq_s16_f16): Likewise.
12034 (__arm_vcvtaq_s32_f32): Likewise.
12035 (__arm_vcvtnq_s16_f16): Likewise.
12036 (__arm_vcvtnq_s32_f32): Likewise.
12037 (__arm_vcvtpq_s16_f16): Likewise.
12038 (__arm_vcvtpq_s32_f32): Likewise.
12039 (__arm_vcvtmq_s16_f16): Likewise.
12040 (__arm_vcvtmq_s32_f32): Likewise.
12041 (vdupq_n): Define polymorphic variant.
12046 (vaddlvq): Likewise.
12047 (vaddvq): Likewise.
12048 (vmovlbq): Likewise.
12049 (vmovltq): Likewise.
12051 (vrev16q): Likewise.
12052 (vrev32q): Likewise.
12053 (vqabsq): Likewise.
12054 (vqnegq): Likewise.
12055 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12056 (UNOP_SNONE_NONE): Likewise.
12057 (UNOP_UNONE_UNONE): Likewise.
12058 (UNOP_UNONE_NONE): Likewise.
12059 * config/arm/constraints.md (e): Define new constriant to allow only
12061 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
12062 (mve_vnegq_s<mode>): Likewise.
12063 (mve_vmvnq_<supf><mode>): Likewise.
12064 (mve_vdupq_n_<supf><mode>): Likewise.
12065 (mve_vclzq_<supf><mode>): Likewise.
12066 (mve_vclsq_s<mode>): Likewise.
12067 (mve_vaddvq_<supf><mode>): Likewise.
12068 (mve_vabsq_s<mode>): Likewise.
12069 (mve_vrev32q_<supf><mode>): Likewise.
12070 (mve_vmovltq_<supf><mode>): Likewise.
12071 (mve_vmovlbq_<supf><mode>): Likewise.
12072 (mve_vcvtpq_<supf><mode>): Likewise.
12073 (mve_vcvtnq_<supf><mode>): Likewise.
12074 (mve_vcvtmq_<supf><mode>): Likewise.
12075 (mve_vcvtaq_<supf><mode>): Likewise.
12076 (mve_vrev16q_<supf>v16qi): Likewise.
12077 (mve_vaddlvq_<supf>v4si): Likewise.
12079 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12081 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
12083 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
12085 * read-rtl-function.c (find_param_by_name,
12086 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
12088 * spellcheck.c (get_edit_distance_cutoff): Likewise.
12089 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
12090 * tree.def (SWITCH_EXPR): Likewise.
12091 * selftest.c (assert_str_contains): Likewise.
12092 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
12094 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
12095 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
12096 * langhooks.h (struct lang_hooks_for_decls): Likewise.
12097 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
12098 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
12100 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
12101 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
12102 * tree.c (component_ref_size): Likewise.
12103 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
12104 * gimple-ssa-sprintf.c (get_string_length, format_string,
12105 format_directive): Likewise.
12106 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
12107 * input.c (string_concat_db::get_string_concatenation,
12108 test_lexer_string_locations_ucn4): Likewise.
12109 * cfgexpand.c (pass_expand::execute): Likewise.
12110 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
12111 maybe_diag_overlap): Likewise.
12112 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
12113 * shrink-wrap.c (spread_components): Likewise.
12114 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
12116 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
12118 * dwarf2out.c (dwarf2out_early_finish): Likewise.
12119 * gimple-ssa-store-merging.c: Likewise.
12120 * ira-costs.c (record_operand_costs): Likewise.
12121 * tree-vect-loop.c (vectorizable_reduction): Likewise.
12122 * target.def (dispatch): Likewise.
12123 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
12124 in documentation text.
12125 * doc/tm.texi: Regenerated.
12126 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
12127 duplicated word issue in a comment.
12128 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
12129 * config/i386/i386-features.c (remove_partial_avx_dependency):
12131 * config/msp430/msp430.c (msp430_select_section): Likewise.
12132 * config/gcn/gcn-run.c (load_image): Likewise.
12133 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
12134 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
12135 * config/aarch64/falkor-tag-collision-avoidance.c
12136 (single_dest_per_chain): Likewise.
12137 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
12138 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
12139 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
12140 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
12142 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
12143 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
12144 * config/rs6000/rs6000-logue.c
12145 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
12146 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
12147 Fix various other issues in the comment.
12149 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
12151 * config/arm/t-rmprofile: create new multilib for
12152 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
12155 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12157 PR tree-optimization/94015
12158 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
12159 function where EXP is address of the bytes being stored rather than
12160 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
12161 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
12162 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
12163 calling native_encode_expr if host or target doesn't have 8-bit
12164 chars. Formatting fixes.
12165 (count_nonzero_bytes_addr): New function.
12167 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12168 Mihail Ionescu <mihail.ionescu@arm.com>
12169 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12171 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
12172 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
12173 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
12174 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
12175 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
12176 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
12177 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
12178 (vmvnq_n_s32): Likewise.
12179 (vrev64q_s8): Likewise.
12180 (vrev64q_s16): Likewise.
12181 (vrev64q_s32): Likewise.
12182 (vcvtq_s16_f16): Likewise.
12183 (vcvtq_s32_f32): Likewise.
12184 (vrev64q_u8): Likewise.
12185 (vrev64q_u16): Likewise.
12186 (vrev64q_u32): Likewise.
12187 (vmvnq_n_u16): Likewise.
12188 (vmvnq_n_u32): Likewise.
12189 (vcvtq_u16_f16): Likewise.
12190 (vcvtq_u32_f32): Likewise.
12191 (__arm_vmvnq_n_s16): Define intrinsic.
12192 (__arm_vmvnq_n_s32): Likewise.
12193 (__arm_vrev64q_s8): Likewise.
12194 (__arm_vrev64q_s16): Likewise.
12195 (__arm_vrev64q_s32): Likewise.
12196 (__arm_vrev64q_u8): Likewise.
12197 (__arm_vrev64q_u16): Likewise.
12198 (__arm_vrev64q_u32): Likewise.
12199 (__arm_vmvnq_n_u16): Likewise.
12200 (__arm_vmvnq_n_u32): Likewise.
12201 (__arm_vcvtq_s16_f16): Likewise.
12202 (__arm_vcvtq_s32_f32): Likewise.
12203 (__arm_vcvtq_u16_f16): Likewise.
12204 (__arm_vcvtq_u32_f32): Likewise.
12205 (vrev64q): Define polymorphic variant.
12206 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12207 (UNOP_SNONE_NONE): Likewise.
12208 (UNOP_SNONE_IMM): Likewise.
12209 (UNOP_UNONE_UNONE): Likewise.
12210 (UNOP_UNONE_NONE): Likewise.
12211 (UNOP_UNONE_IMM): Likewise.
12212 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
12213 (mve_vcvtq_from_f_<supf><mode>): Likewise.
12214 (mve_vmvnq_n_<supf><mode>): Likewise.
12216 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12217 Mihail Ionescu <mihail.ionescu@arm.com>
12218 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12220 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
12221 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
12222 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
12223 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
12224 (vrndxq_f32): Likewise.
12225 (vrndq_f16) Likewise.
12226 (vrndq_f32): Likewise.
12227 (vrndpq_f16): Likewise.
12228 (vrndpq_f32): Likewise.
12229 (vrndnq_f16): Likewise.
12230 (vrndnq_f32): Likewise.
12231 (vrndmq_f16): Likewise.
12232 (vrndmq_f32): Likewise.
12233 (vrndaq_f16): Likewise.
12234 (vrndaq_f32): Likewise.
12235 (vrev64q_f16): Likewise.
12236 (vrev64q_f32): Likewise.
12237 (vnegq_f16): Likewise.
12238 (vnegq_f32): Likewise.
12239 (vdupq_n_f16): Likewise.
12240 (vdupq_n_f32): Likewise.
12241 (vabsq_f16): Likewise.
12242 (vabsq_f32): Likewise.
12243 (vrev32q_f16): Likewise.
12244 (vcvttq_f32_f16): Likewise.
12245 (vcvtbq_f32_f16): Likewise.
12246 (vcvtq_f16_s16): Likewise.
12247 (vcvtq_f32_s32): Likewise.
12248 (vcvtq_f16_u16): Likewise.
12249 (vcvtq_f32_u32): Likewise.
12250 (__arm_vrndxq_f16): Define intrinsic.
12251 (__arm_vrndxq_f32): Likewise.
12252 (__arm_vrndq_f16): Likewise.
12253 (__arm_vrndq_f32): Likewise.
12254 (__arm_vrndpq_f16): Likewise.
12255 (__arm_vrndpq_f32): Likewise.
12256 (__arm_vrndnq_f16): Likewise.
12257 (__arm_vrndnq_f32): Likewise.
12258 (__arm_vrndmq_f16): Likewise.
12259 (__arm_vrndmq_f32): Likewise.
12260 (__arm_vrndaq_f16): Likewise.
12261 (__arm_vrndaq_f32): Likewise.
12262 (__arm_vrev64q_f16): Likewise.
12263 (__arm_vrev64q_f32): Likewise.
12264 (__arm_vnegq_f16): Likewise.
12265 (__arm_vnegq_f32): Likewise.
12266 (__arm_vdupq_n_f16): Likewise.
12267 (__arm_vdupq_n_f32): Likewise.
12268 (__arm_vabsq_f16): Likewise.
12269 (__arm_vabsq_f32): Likewise.
12270 (__arm_vrev32q_f16): Likewise.
12271 (__arm_vcvttq_f32_f16): Likewise.
12272 (__arm_vcvtbq_f32_f16): Likewise.
12273 (__arm_vcvtq_f16_s16): Likewise.
12274 (__arm_vcvtq_f32_s32): Likewise.
12275 (__arm_vcvtq_f16_u16): Likewise.
12276 (__arm_vcvtq_f32_u32): Likewise.
12277 (vrndxq): Define polymorphic variants.
12279 (vrndpq): Likewise.
12280 (vrndnq): Likewise.
12281 (vrndmq): Likewise.
12282 (vrndaq): Likewise.
12283 (vrev64q): Likewise.
12286 (vrev32q): Likewise.
12287 (vcvtbq_f32): Likewise.
12288 (vcvttq_f32): Likewise.
12290 * config/arm/arm_mve_builtins.def (VAR2): Define.
12292 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
12293 (mve_vrndq_f<mode>): Likewise.
12294 (mve_vrndpq_f<mode>): Likewise.
12295 (mve_vrndnq_f<mode>): Likewise.
12296 (mve_vrndmq_f<mode>): Likewise.
12297 (mve_vrndaq_f<mode>): Likewise.
12298 (mve_vrev64q_f<mode>): Likewise.
12299 (mve_vnegq_f<mode>): Likewise.
12300 (mve_vdupq_n_f<mode>): Likewise.
12301 (mve_vabsq_f<mode>): Likewise.
12302 (mve_vrev32q_fv8hf): Likewise.
12303 (mve_vcvttq_f32_f16v4sf): Likewise.
12304 (mve_vcvtbq_f32_f16v4sf): Likewise.
12305 (mve_vcvtq_to_f_<supf><mode>): Likewise.
12307 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12308 Mihail Ionescu <mihail.ionescu@arm.com>
12309 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12311 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
12313 (ARM_BUILTIN_MVE_PATTERN_START): Define.
12314 (arm_init_mve_builtins): Define function.
12315 (arm_init_builtins): Add TARGET_HAVE_MVE check.
12316 (arm_expand_builtin_1): Check the range of fcode.
12317 (arm_expand_mve_builtin): Define function to expand MVE builtins.
12318 (arm_expand_builtin): Check the range of fcode.
12319 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
12321 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
12322 (vst4q_s8): Define macro.
12323 (vst4q_s16): Likewise.
12324 (vst4q_s32): Likewise.
12325 (vst4q_u8): Likewise.
12326 (vst4q_u16): Likewise.
12327 (vst4q_u32): Likewise.
12328 (vst4q_f16): Likewise.
12329 (vst4q_f32): Likewise.
12330 (__arm_vst4q_s8): Define inline builtin.
12331 (__arm_vst4q_s16): Likewise.
12332 (__arm_vst4q_s32): Likewise.
12333 (__arm_vst4q_u8): Likewise.
12334 (__arm_vst4q_u16): Likewise.
12335 (__arm_vst4q_u32): Likewise.
12336 (__arm_vst4q_f16): Likewise.
12337 (__arm_vst4q_f32): Likewise.
12338 (__ARM_mve_typeid): Define macro with MVE types.
12339 (__ARM_mve_coerce): Define macro with _Generic feature.
12340 (vst4q): Define polymorphic variant for different vst4q builtins.
12341 * config/arm/arm_mve_builtins.def: New file.
12342 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
12344 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
12345 (unspec): Define unspec.
12346 (mve_vst4q<mode>): Define RTL pattern.
12347 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
12349 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
12351 (define_split): Allow OI mode split for MVE after reload.
12352 (define_split): Allow XI mode split for MVE after reload.
12353 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
12354 (arm-builtins.o): Likewise.
12356 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
12358 * c-typeck.c (process_init_element): Handle constructor_type with
12359 type size represented by POLY_INT_CST.
12361 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12363 PR tree-optimization/94187
12364 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
12365 nchars - offset < nbytes.
12367 PR middle-end/94189
12368 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
12369 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
12370 for code-generation.
12372 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
12375 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
12376 after changing memory subreg.
12378 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12379 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12381 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
12382 emulator calls for dobule precision arithmetic operations for MVE.
12384 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12385 Mihail Ionescu <mihail.ionescu@arm.com>
12386 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12388 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
12389 feature bit is on and -mfpu=auto is passed as compiler option, do not
12390 generate error on not finding any matching fpu. Because in this case
12391 fpu is not required.
12392 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
12393 enabled for MVE and also for all VFP extensions.
12394 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
12396 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
12397 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
12398 along with feature bits mve_float.
12399 (mve): Modify add options in armv8.1-m.main arch for MVE.
12400 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
12402 * config/arm/arm.c (use_return_insn): Replace the
12403 check with TARGET_VFP_BASE.
12404 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
12406 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12407 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
12409 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
12410 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
12412 (arm_compute_frame_layout): Likewise.
12413 (arm_save_coproc_regs): Likewise.
12414 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
12416 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12417 with equivalent macro TARGET_VFP_BASE.
12418 (arm_expand_epilogue_apcs_frame): Likewise.
12419 (arm_expand_epilogue): Likewise.
12420 (arm_conditional_register_usage): Likewise.
12421 (arm_declare_function_name): Add check to skip printing .fpu directive
12422 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
12424 * config/arm/arm.h (TARGET_VFP_BASE): Define.
12425 * config/arm/arm.md (arch): Add "mve" to arch.
12426 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
12427 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
12428 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
12429 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
12431 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
12432 to not allow for MVE.
12433 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
12435 (VUNSPEC_GET_FPSCR): Define.
12436 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
12437 instructions which move to general-purpose Register from Floating-point
12438 Special register and vice-versa.
12439 (thumb2_movhi_fp16): Likewise.
12440 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
12441 with MCR and MRC instructions which set and get Floating-point Status
12442 and Control Register (FPSCR).
12443 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
12445 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
12446 float move patterns in MVE.
12447 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
12448 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12449 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
12450 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12451 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
12452 TARGET_VFP_BASE check.
12453 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
12454 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12456 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
12457 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12461 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12462 Mihail Ionescu <mihail.ionescu@arm.com>
12463 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12465 * config.gcc (arm_mve.h): Include mve intrinsics header file.
12466 * config/arm/aout.h (p0): Add new register name for MVE predicated
12468 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
12469 common to Neon and MVE.
12470 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
12471 (arm_init_simd_builtin_types): Disable poly types for MVE.
12472 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
12473 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
12474 ARM_BUILTIN_NEON_LANE_CHECK.
12475 (mve_dereference_pointer): Add function.
12476 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
12478 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
12479 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
12480 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
12481 with floating point enabled.
12482 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
12483 simd_immediate_valid_for_move.
12484 (simd_immediate_valid_for_move): Renamed from
12485 neon_immediate_valid_for_move function.
12486 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
12487 error if vfpv2 feature bit is disabled and mve feature bit is also
12488 disabled for HARD_FLOAT_ABI.
12489 (use_return_insn): Check to not push VFP regs for MVE.
12490 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
12492 (aapcs_vfp_allocate_return_reg): Likewise.
12493 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
12494 address operand for MVE.
12495 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
12496 (neon_valid_immediate): Rename to simd_valid_immediate.
12497 (simd_valid_immediate): Rename from neon_valid_immediate.
12498 (simd_valid_immediate): MVE check on size of vector is 128 bits.
12499 (neon_immediate_valid_for_move): Rename to
12500 simd_immediate_valid_for_move.
12501 (simd_immediate_valid_for_move): Rename from
12502 neon_immediate_valid_for_move.
12503 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
12505 (neon_make_constant): Modify call to neon_valid_immediate function.
12506 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
12508 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
12509 (arm_compute_frame_layout): Calculate space for saved VFP registers for
12511 (arm_save_coproc_regs): Save coproc registers for MVE.
12512 (arm_print_operand): Add case 'E' to print memory operands for MVE.
12513 (arm_print_operand_address): Check to print register number for MVE.
12514 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
12515 (arm_modes_tieable_p): Check to allow structure mode for MVE.
12516 (arm_regno_class): Add VPR_REGNUM check.
12517 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
12519 (arm_expand_epilogue): MVE check for enabling pop instructions in
12521 (arm_print_asm_arch_directives): Modify function to disable print of
12522 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12524 (arm_vector_mode_supported_p): Check for modes available in MVE interger
12525 and MVE floating point.
12526 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
12528 (arm_conditional_register_usage): Enable usage of conditional regsiter
12530 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
12531 (arm_declare_function_name): Modify function to disable print of
12532 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12534 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
12535 when target general registers are required.
12536 (TARGET_HAVE_MVE_FLOAT): Likewise.
12537 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
12539 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
12540 which indicate this is not available for across function calls.
12541 (FIRST_PSEUDO_REGISTER): Modify.
12542 (VALID_MVE_MODE): Define valid MVE mode.
12543 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
12544 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
12545 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
12546 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
12548 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
12549 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
12550 (enum reg_class): Add VPR_REG entry.
12551 (REG_CLASS_NAMES): Add VPR_REG entry.
12552 * config/arm/arm.md (VPR_REGNUM): Define.
12553 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
12554 "unconditional" instructions.
12555 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
12556 (movdf_soft_insn): Modify RTL to not allow for MVE.
12557 (vfp_pop_multiple_with_writeback): Enable for MVE.
12558 (include "mve.md"): Include mve.md file.
12559 * config/arm/arm_mve.h: Add MVE intrinsics head file.
12560 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
12561 for vector predicated operands.
12562 * config/arm/iterators.md (VNIM1): Define.
12563 (VNINOTM1): Define.
12564 (VHFBF_split): Define
12565 * config/arm/mve.md: New file.
12566 (mve_mov<mode>): Define RTL for move, store and load in MVE.
12567 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
12569 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
12570 simd_immediate_valid_for_move.
12571 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
12572 is common to MVE and NEON to vec-common.md file.
12573 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
12574 * config/arm/predicates.md (vpr_register_operand): Define.
12575 * config/arm/t-arm: Add mve.md file.
12576 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
12578 (mve_store): Add MVE instructions mve_store to attribute "type".
12579 (mve_load): Add MVE instructions mve_load to attribute "type".
12580 (is_mve_type): Define attribute.
12581 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
12582 standard move patterns in MVE along with NEON and IWMMXT with mode
12584 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
12585 and IWMMXT with mode iterator V8HF.
12586 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
12588 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
12589 simd_immediate_valid_for_move.
12592 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
12595 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
12596 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12598 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
12600 2020-03-16 Jakub Jelinek <jakub@redhat.com>
12603 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
12606 PR tree-optimization/94166
12607 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
12608 as secondary comparison key.
12610 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
12612 PR tree-optimization/94125
12613 * tree-loop-distribution.c
12614 (loop_distribution::break_alias_scc_partitions): Update post order
12615 number for merged scc.
12617 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
12620 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
12622 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
12623 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
12624 and ext_sse_reg_operand check.
12626 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
12628 * common.opt: Avoid redundancy in the help text.
12629 * config/arc/arc.opt: Likewise.
12630 * config/cr16/cr16.opt: Likewise.
12632 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12634 PR middle-end/93566
12635 * tree-nested.c (convert_nonlocal_omp_clauses,
12636 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
12637 with C/C++ array sections.
12639 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
12642 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
12643 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12646 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12648 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
12649 "a an" to "an" in a comment.
12650 * hsa-common.h (is_a_helper): Likewise.
12651 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
12652 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
12653 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
12655 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
12658 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
12659 64-bit value by 64 bits (UB).
12661 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
12663 PR rtl-optimization/92303
12664 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
12666 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
12668 PR rtl-optimization/94148
12669 PR rtl-optimization/94042
12670 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
12671 (df_worklist_propagate_forward): New parameter last_change_age, use
12672 that instead of bb->aux.
12673 (df_worklist_propagate_backward): Ditto.
12674 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
12676 2020-03-13 Richard Biener <rguenther@suse.de>
12678 PR tree-optimization/94163
12679 * tree-ssa-pre.c (create_expression_by_pieces): Check
12680 whether alignment would be zero.
12682 2020-03-13 Martin Liska <mliska@suse.cz>
12685 * lto-wrapper.c (run_gcc): Use concat for appending
12686 to collect_gcc_options.
12688 2020-03-13 Jakub Jelinek <jakub@redhat.com>
12691 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
12692 instead of GEN_INT.
12694 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
12697 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
12698 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
12699 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
12700 TARGET_AVX512VL and ext_sse_reg_operand check.
12702 2020-03-13 Bu Le <bule1@huawei.com>
12705 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
12706 (-param=aarch64-double-recp-precision=): New options.
12707 * doc/invoke.texi: Document them.
12708 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
12709 instead of hard-coding the choice of 1 for float and 2 for double.
12711 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12713 PR rtl-optimization/94119
12714 * resource.h (clear_hashed_info_until_next_barrier): Declare.
12715 * resource.c (clear_hashed_info_until_next_barrier): New function.
12716 * reorg.c (add_to_delay_list): Fix formatting.
12717 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
12718 the next instruction after removing a BARRIER.
12720 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12722 PR middle-end/92071
12723 * expmed.c (store_integral_bit_field): For fields larger than a word,
12724 call extract_bit_field on the value if the mode is BLKmode. Remove
12725 specific path for big-endian targets and tidy things up a little bit.
12727 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
12729 PR rtl-optimization/90275
12730 * cse.c (cse_insn): Delete no-op register moves too.
12732 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
12734 * config/rx/rx.md (CTRLREG_CPEN): Remove.
12735 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
12737 2020-03-12 Richard Biener <rguenther@suse.de>
12739 PR tree-optimization/94103
12740 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
12741 punning when the mode precision is not sufficient.
12743 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
12746 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
12747 MODE_V1DF and MODE_V2SF.
12748 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
12749 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
12752 2020-03-12 Jakub Jelinek <jakub@redhat.com>
12754 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
12755 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
12756 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
12757 * doc/tm.texi: Regenerated.
12759 PR tree-optimization/94130
12760 * tree-ssa-dse.c: Include gimplify.h.
12761 (increment_start_addr): If stmt has lhs, drop the lhs from call and
12762 set it after the call to the original value of the first argument.
12764 (decrement_count): Formatting fix.
12766 2020-03-11 Delia Burduv <delia.burduv@arm.com>
12768 * config/arm/arm-builtins.c
12769 (arm_init_simd_builtin_scalar_types): New.
12770 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
12771 (vld2q_bf16): Used new builtin type.
12772 (vld3_bf16): Used new builtin type.
12773 (vld3q_bf16): Used new builtin type.
12774 (vld4_bf16): Used new builtin type.
12775 (vld4q_bf16): Used new builtin type.
12776 (vld2_dup_bf16): Used new builtin type.
12777 (vld2q_dup_bf16): Used new builtin type.
12778 (vld3_dup_bf16): Used new builtin type.
12779 (vld3q_dup_bf16): Used new builtin type.
12780 (vld4_dup_bf16): Used new builtin type.
12781 (vld4q_dup_bf16): Used new builtin type.
12783 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12786 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
12787 at the start to switch to data section. Don't print extra newline if
12788 .globl directive has not been emitted.
12790 2020-03-11 Richard Biener <rguenther@suse.de>
12792 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
12795 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
12797 PR middle-end/93961
12798 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
12799 whose type is a qualified union.
12801 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12804 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
12805 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
12808 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
12810 (get_nth_most_common_value): Use abs_hwi instead of abs.
12812 PR middle-end/94111
12813 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
12814 is rvc_normal, otherwise use real_to_decimal to print the number to
12817 PR tree-optimization/94114
12818 * tree-loop-distribution.c (generate_memset_builtin): Call
12819 rewrite_to_non_trapping_overflow even on mem.
12820 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
12823 2020-03-10 Jeff Law <law@redhat.com>
12825 * config/bfin/bfin.md (movsi_insv): Add length attribute.
12827 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
12830 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
12831 NAN and SIGNED_ZEROR for smax/smin.
12833 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
12836 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
12837 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
12839 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12841 * loop-iv.c (find_simple_exit): Make it static.
12842 * cfgloop.h: Remove the corresponding prototype.
12844 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12846 * ddg.c (create_ddg): Fix intendation.
12847 (set_recurrence_length): Likewise.
12848 (create_ddg_all_sccs): Likewise.
12850 2020-03-10 Jakub Jelinek <jakub@redhat.com>
12853 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
12854 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
12857 2020-03-09 Jason Merrill <jason@redhat.com>
12859 * gdbinit.in (pgs): Fix typo in documentation.
12861 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
12865 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
12867 PR rtl-optimization/93564
12868 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
12869 do not honor reg alloc order.
12871 2020-03-09 Andrew Pinski <apinski@marvell.com>
12873 PR inline-asm/94095
12874 * doc/extend.texi (x86 Operand Modifiers): Fix column
12877 2020-03-09 Martin Liska <mliska@suse.cz>
12880 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12881 Remove set of str_align_loops and str_align_jumps as these
12882 should be set in previous 2 conditions in the function.
12884 2020-03-09 Jakub Jelinek <jakub@redhat.com>
12886 PR rtl-optimization/94045
12887 * params.opt (-param=max-find-base-term-values=): New option.
12888 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
12889 in a single toplevel find_base_term call.
12891 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12894 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
12895 * config/aarch64/aarch64-simd.md
12896 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
12897 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
12898 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
12899 * config/aarch64/arm_neon.h:
12900 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
12901 (vmlal_lane_u16): Likewise.
12902 (vmlal_lane_s32): Likewise.
12903 (vmlal_lane_u32): Likewise.
12904 (vmlal_laneq_s16): Likewise.
12905 (vmlal_laneq_u16): Likewise.
12906 (vmlal_laneq_s32): Likewise.
12907 (vmlal_laneq_u32): Likewise.
12908 (vmull_lane_s16): Likewise.
12909 (vmull_lane_u16): Likewise.
12910 (vmull_lane_s32): Likewise.
12911 (vmull_lane_u32): Likewise.
12912 (vmull_laneq_s16): Likewise.
12913 (vmull_laneq_u16): Likewise.
12914 (vmull_laneq_s32): Likewise.
12915 (vmull_laneq_u32): Likewise.
12916 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
12919 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12921 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
12922 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
12923 (aarch64_mls_elt<mode>): Likewise.
12924 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
12925 (aarch64_fma4_elt<mode>): Likewise.
12926 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
12927 (aarch64_fma4_elt_to_64v2df): Likewise.
12928 (aarch64_fnma4_elt<mode>): Likewise.
12929 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
12930 (aarch64_fnma4_elt_to_64v2df): Likewise.
12932 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12934 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
12935 Specify movprfx attribute.
12936 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
12938 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
12941 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
12943 (TARGET_NO_FP_IN_TOC): Same.
12944 * config/rs6000/aix71.h: Same.
12945 * config/rs6000/aix72.h: Same.
12947 2020-03-06 Andrew Pinski <apinski@marvell.com>
12948 Jeff Law <law@redhat.com>
12950 PR rtl-optimization/93996
12951 * haifa-sched.c (remove_notes): Be more careful when adding
12954 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12956 * config/arm/arm_neon.h (vld2_bf16): New.
12962 (vld2_dup_bf16): New.
12963 (vld2q_dup_bf16): New.
12964 (vld3_dup_bf16): New.
12965 (vld3q_dup_bf16): New.
12966 (vld4_dup_bf16): New.
12967 (vld4q_dup_bf16): New.
12968 * config/arm/arm_neon_builtins.def
12969 (vld2): Changed to VAR13 and added v4bf, v8bf
12970 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
12971 (vld3): Changed to VAR13 and added v4bf, v8bf
12972 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
12973 (vld4): Changed to VAR13 and added v4bf, v8bf
12974 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
12975 * config/arm/iterators.md (VDXBF2): New iterator.
12976 *config/arm/neon.md (neon_vld2): Use new iterators.
12977 (neon_vld2_dup<mode): Use new iterators.
12978 (neon_vld3<mode>): Likewise.
12979 (neon_vld3qa<mode>): Likewise.
12980 (neon_vld3qb<mode>): Likewise.
12981 (neon_vld3_dup<mode>): Likewise.
12982 (neon_vld4<mode>): Likewise.
12983 (neon_vld4qa<mode>): Likewise.
12984 (neon_vld4qb<mode>): Likewise.
12985 (neon_vld4_dup<mode>): Likewise.
12986 (neon_vld2_dupv8bf): New.
12987 (neon_vld3_dupv8bf): Likewise.
12988 (neon_vld4_dupv8bf): Likewise.
12990 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12992 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
12993 (bfloat16x8x2_t): New typedef.
12994 (bfloat16x4x3_t): New typedef.
12995 (bfloat16x8x3_t): New typedef.
12996 (bfloat16x4x4_t): New typedef.
12997 (bfloat16x8x4_t): New typedef.
13004 * config/arm/arm-builtins.c (v2bf_UP): Define.
13006 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
13007 * config/arm/arm-modes.def (V2BF): New mode.
13008 * config/arm/arm-simd-builtin-types.def
13009 (Bfloat16x2_t): New entry.
13010 * config/arm/arm_neon_builtins.def
13011 (vst2): Changed to VAR13 and added v4bf, v8bf
13012 (vst3): Changed to VAR13 and added v4bf, v8bf
13013 (vst4): Changed to VAR13 and added v4bf, v8bf
13014 * config/arm/iterators.md (VDXBF): New iterator.
13015 (VQ2BF): New iterator.
13016 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
13017 (neon_vst2<mode>): Used new iterators.
13018 (neon_vst3<mode>): Used new iterators.
13019 (neon_vst3<mode>): Used new iterators.
13020 (neon_vst3qa<mode>): Used new iterators.
13021 (neon_vst3qb<mode>): Used new iterators.
13022 (neon_vst4<mode>): Used new iterators.
13023 (neon_vst4<mode>): Used new iterators.
13024 (neon_vst4qa<mode>): Used new iterators.
13025 (neon_vst4qb<mode>): Used new iterators.
13027 2020-03-06 Delia Burduv <delia.burduv@arm.com>
13029 * config/aarch64/aarch64-simd-builtins.def
13030 (bfcvtn): New built-in function.
13031 (bfcvtn_q): New built-in function.
13032 (bfcvtn2): New built-in function.
13033 (bfcvt): New built-in function.
13034 * config/aarch64/aarch64-simd.md
13035 (aarch64_bfcvtn<q><mode>): New pattern.
13036 (aarch64_bfcvtn2v8bf): New pattern.
13037 (aarch64_bfcvtbf): New pattern.
13038 * config/aarch64/arm_bf16.h (float32_t): New typedef.
13039 (vcvth_bf16_f32): New intrinsic.
13040 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
13041 (vcvtq_low_bf16_f32): New intrinsic.
13042 (vcvtq_high_bf16_f32): New intrinsic.
13043 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
13044 (UNSPEC_BFCVTN): New UNSPEC.
13045 (UNSPEC_BFCVTN2): New UNSPEC.
13046 (UNSPEC_BFCVT): New UNSPEC.
13047 * config/arm/types.md (bf_cvt): New type.
13049 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
13051 * config/s390/s390.md ("tabort"): Get rid of two consecutive
13052 blanks in format string.
13054 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
13058 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
13059 * config/i386/i386.c (ix86_get_ssemov): New function.
13060 (ix86_output_ssemov): Likewise.
13061 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
13062 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
13064 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
13065 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
13066 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
13067 (*movti_internal): Likewise.
13068 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
13070 2020-03-05 Jeff Law <law@redhat.com>
13072 PR tree-optimization/91890
13073 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
13074 Use gimple_or_expr_nonartificial_location.
13075 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
13076 Use gimple_or_expr_nonartificial_location.
13077 * gimple.c (gimple_or_expr_nonartificial_location): New function.
13078 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
13079 * tree-ssa-strlen.c (maybe_warn_overflow): Use
13080 gimple_or_expr_nonartificial_location.
13081 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
13082 (maybe_warn_pointless_strcmp): Likewise.
13084 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13087 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
13088 SRC and MASK arguments to __m128 from __m128d.
13089 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
13091 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
13093 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
13094 argument to __m128i from __m128d.
13095 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
13097 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
13098 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
13101 2020-03-05 Delia Burduv <delia.burduv@arm.com>
13103 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
13104 (vbfmlalbq_f32): New.
13105 (vbfmlaltq_f32): New.
13106 (vbfmlalbq_lane_f32): New.
13107 (vbfmlaltq_lane_f32): New.
13108 (vbfmlalbq_laneq_f32): New.
13109 (vbfmlaltq_laneq_f32): New.
13110 * config/arm/arm_neon_builtins.def (vmmla): New.
13115 (vfmab_laneq): New.
13116 (vfmat_laneq): New.
13117 * config/arm/iterators.md (BF_MA): New int iterator.
13118 (bt): New int attribute.
13119 (VQXBF): Copy of VQX with V8BF.
13120 * config/arm/neon.md (neon_vmmlav8bf): New insn.
13121 (neon_vfma<bt>v8bf): New insn.
13122 (neon_vfma<bt>_lanev8bf): New insn.
13123 (neon_vfma<bt>_laneqv8bf): New expand.
13124 (neon_vget_high<mode>): Changed iterator to VQXBF.
13125 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
13126 (UNSPEC_BFMAB): New UNSPEC.
13127 (UNSPEC_BFMAT): New UNSPEC.
13129 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13131 PR middle-end/93399
13132 * tree-pretty-print.h (pretty_print_string): Declare.
13133 * tree-pretty-print.c (pretty_print_string): Remove forward
13134 declaration, no longer static. Change nbytes parameter type
13135 from unsigned to size_t.
13136 * print-rtl.c (print_value) <case CONST_STRING>: Use
13137 pretty_print_string and for shrink way too long strings.
13139 2020-03-05 Richard Biener <rguenther@suse.de>
13140 Jakub Jelinek <jakub@redhat.com>
13142 PR tree-optimization/93582
13143 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
13144 last operand as signed when looking for memset offset. Formatting
13147 2020-03-04 Andrew Pinski <apinski@marvell.com>
13150 * value-prof.c (dump_histogram_value): Use std::abs.
13152 2020-03-04 Martin Sebor <msebor@redhat.com>
13154 PR tree-optimization/93986
13155 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
13156 operands to the same precision widest_int to avoid ICEs.
13158 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
13161 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
13162 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
13163 for OPTION_MASK_ALTIVEC.
13165 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13167 * config.gcc: Include the glibc-stdint.h header for zTPF.
13169 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13171 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
13172 direct FPR-GPR copies.
13173 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
13176 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13178 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
13179 operands to the prologue_tpf expander.
13180 (s390_emit_epilogue): Likewise.
13181 (s390_option_override_internal): Do error checking and setup for
13183 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
13184 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
13185 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
13186 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
13187 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
13188 operands for the check flag and the branch target.
13189 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
13190 ("mtpf-trace-hook-prologue-target")
13191 ("mtpf-trace-hook-epilogue-check")
13192 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
13194 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
13195 options are for debugging purposes and will not be documented
13198 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13201 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
13203 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
13204 argument. Change pd argument so that it can be modified. Turn
13205 constant non-CONSTRUCTOR store into non-constant if it is too large.
13206 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
13208 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
13211 2020-02-04 Richard Biener <rguenther@suse.de>
13213 PR tree-optimization/93964
13214 * graphite-isl-ast-to-gimple.c
13215 (gcc_expression_from_isl_ast_expr_id): Add intermediate
13216 conversion for pointer to integer converts.
13217 * graphite-scop-detection.c (assign_parameter_index_in_region):
13220 2020-03-04 Martin Liska <mliska@suse.cz>
13224 * doc/invoke.texi: Clarify --help=language and --help=common
13227 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13229 PR tree-optimization/94001
13230 * tree-tailcall.c (process_assignment): Before comparing op1 to
13231 *ass_var, verify *ass_var is non-NULL.
13233 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
13236 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
13239 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
13241 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
13242 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
13243 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
13244 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
13245 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
13246 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
13247 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
13248 (V_bf_low, V_bf_cvt_m): New mode attributes.
13249 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
13250 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
13251 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
13252 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
13253 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
13255 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13257 PR tree-optimization/93582
13258 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
13259 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
13260 members, initialize them in the constructor and if mask is non-NULL,
13261 artificially push_partial_def {} for the portions of the mask that
13263 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
13264 val and return (void *)-1. Formatting fix.
13265 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
13267 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
13268 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
13270 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
13272 (visit_stmt): Formatting fix.
13274 2020-03-03 Richard Biener <rguenther@suse.de>
13276 PR tree-optimization/93946
13277 * alias.h (refs_same_for_tbaa_p): Declare.
13278 * alias.c (refs_same_for_tbaa_p): New function.
13279 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
13281 * tree-ssa-scopedtables.h
13282 (avail_exprs_stack::lookup_avail_expr): Add output argument
13283 giving access to the hashtable entry.
13284 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
13286 * tree-ssa-dom.c: Include alias.h.
13287 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
13288 removing redundant store.
13289 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
13290 (ao_ref_init_from_vn_reference): Adjust prototype.
13291 (vn_reference_lookup_pieces): Likewise.
13292 (vn_reference_insert_pieces): Likewise.
13293 * tree-ssa-sccvn.c: Track base alias set in addition to alias
13295 (eliminate_dom_walker::eliminate_stmt): Also check base alias
13296 set when removing redundant stores.
13297 (visit_reference_op_store): Likewise.
13298 * dse.c (record_store): Adjust valdity check for redundant
13301 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13304 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
13306 PR rtl-optimization/94002
13307 * explow.c (plus_constant): Punt if cst has VOIDmode and
13308 get_pool_mode is different from mode.
13310 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13312 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
13313 address has an offset which fits the scalling constraint for a
13314 load/store operation.
13315 (legitimate_scaled_address_p): Update use
13316 leigitimate_small_data_address_p.
13317 (arc_print_operand): Likewise.
13318 (arc_legitimate_address_p): Likewise.
13319 (legitimate_small_data_address_p): Likewise.
13321 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13323 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
13324 (fnmasf4_fpu): Likewise.
13326 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13328 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
13330 (subdi3): Likewise.
13331 (adddi3_i): Remove pattern.
13332 (subdi3_i): Likewise.
13334 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13336 * config/arc/arc.md (eh_return): Add length info.
13338 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13340 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
13342 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13344 * doc/invoke.texi (Static Analyzer Options): Add
13345 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
13348 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
13351 * config/i386/i386.md (movstrict<mode>): Allow only
13352 registers with VALID_INT_MODE_P modes.
13354 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
13356 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
13357 (reduc_insn): Use 'U' and 'B' operand codes.
13358 (reduc_<reduc_op>_scal_<mode>): Allow all types.
13359 (reduc_<reduc_op>_scal_v64di): Delete.
13360 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
13361 (*plus_carry_dpp_shr_v64si): Change to ...
13362 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
13363 (mov_from_lane63_v64di): Change to ...
13364 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
13365 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
13366 Support UNSPEC_MOV_DPP_SHR output formats.
13367 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
13368 Add "use_extends" reductions.
13369 (print_operand_address): Add 'I' and 'U' codes.
13370 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
13372 2020-03-02 Martin Liska <mliska@suse.cz>
13374 * lto-wrapper.c: Fix typo in comment about
13375 C++ standard version.
13377 2020-03-01 Martin Sebor <msebor@redhat.com>
13380 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
13382 2020-03-01 Martin Sebor <msebor@redhat.com>
13384 PR middle-end/93829
13385 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
13386 of a pointer in the outermost ADDR_EXPRs.
13388 2020-02-28 Jeff Law <law@redhat.com>
13390 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
13391 * config/v850/v850.c (v850_asm_trampoline_template): Update
13394 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
13397 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
13400 2020-02-28 Martin Liska <mliska@suse.cz>
13403 * configure.ac: Improve detection of ld_date by requiring
13404 either two dashes or none.
13405 * configure: Regenerate.
13407 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
13409 PR rtl-optimization/93564
13410 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
13411 do not honor reg alloc order.
13413 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
13416 * config/aarch64/aarch64.c (aarch64_override_options): Fix
13417 misleading warning string.
13419 2020-02-27 Martin Sebor <msebor@redhat.com>
13421 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
13423 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
13426 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
13427 Split the insn into two parts. This insn only does variable
13428 extract from a register.
13429 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
13430 variable extract from memory.
13431 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
13432 only does variable extract from a register.
13433 (vsx_extract_v4sf_var_load): New insn, do variable extract from
13435 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
13436 into two parts. This insn only does variable extract from a
13438 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
13439 do variable extract from memory.
13441 2020-02-27 Martin Jambor <mjambor@suse.cz>
13442 Feng Xue <fxue@os.amperecomputing.com>
13445 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
13446 new function calls_same_node_or_its_all_contexts_clone_p.
13447 (cgraph_edge_brings_value_p): Use it.
13448 (cgraph_edge_brings_value_p): Likewise.
13449 (self_recursive_pass_through_p): Return false if caller is a clone.
13450 (self_recursive_agg_pass_through_p): Likewise.
13452 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
13454 PR middle-end/92152
13455 * alias.c (ends_tbaa_access_path_p): Break out from ...
13456 (component_uses_parent_alias_set_from): ... here.
13457 * alias.h (ends_tbaa_access_path_p): Declare.
13458 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
13459 handle trailing arrays past end of tbaa access path.
13460 (aliasing_component_refs_p): ... here; likewise.
13461 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
13462 path; disambiguate also past end of it.
13463 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
13466 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
13468 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
13469 beginning of the file.
13470 (vcreate_bf16, vcombine_bf16): New.
13471 (vdup_n_bf16, vdupq_n_bf16): New.
13472 (vdup_lane_bf16, vdup_laneq_bf16): New.
13473 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13474 (vduph_lane_bf16, vduph_laneq_bf16): New.
13475 (vset_lane_bf16, vsetq_lane_bf16): New.
13476 (vget_lane_bf16, vgetq_lane_bf16): New.
13477 (vget_high_bf16, vget_low_bf16): New.
13478 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13479 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13480 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13481 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13482 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13483 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13484 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13485 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13486 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13487 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13488 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
13489 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13490 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13491 (vreinterpretq_bf16_p128): New.
13492 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13493 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13494 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13495 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13496 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13497 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13498 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13499 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13500 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13501 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13502 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13503 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13504 (vreinterpretq_p128_bf16): New.
13505 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
13506 (V_elem): Likewise.
13507 (V_elem_l): Likewise.
13508 (VD_LANE): Likewise.
13510 (V_DOUBLE): Likewise.
13511 (VDQX): Add V4BF and V8BF.
13512 (V_two_elem, V_three_elem, V_four_elem): Likewise.
13514 (V_HALF): Likewise.
13515 (V_double_vector_mode): Likewise.
13516 (V_cmp_result): Likewise.
13517 (V_uf_sclr): Likewise.
13518 (V_sz_elem): Likewise.
13519 (Is_d_reg): Likewise.
13520 (V_mode_nunits): Likewise.
13521 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
13523 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13525 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
13526 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
13527 (<expander><mode>3<exec>): Likewise.
13528 (<expander><mode>3): New.
13529 (v<expander><mode>3): New.
13530 (<expander><mode>3): New.
13531 (<expander><mode>3<exec>): Rename to ...
13532 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
13533 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
13535 2020-02-27 Alexandre Oliva <oliva@adacore.com>
13537 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
13540 2020-02-27 Richard Biener <rguenther@suse.de>
13542 PR tree-optimization/93508
13543 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
13544 non-_CHK variants. Valueize their length arguments.
13546 2020-02-27 Richard Biener <rguenther@suse.de>
13548 PR tree-optimization/93953
13549 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
13550 to the hash-map entry.
13552 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13554 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
13556 2020-02-27 Mark Williams <mwilliams@fb.com>
13558 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
13559 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
13560 -ffile-prefix-map and -fmacro-prefix-map.
13561 * lto-streamer-out.c: Include file-prefix-map.h.
13562 (lto_output_location): Remap the file part of locations.
13564 2020-02-27 Jakub Jelinek <jakub@redhat.com>
13567 * gimplify.c (gimplify_init_constructor): Don't promote readonly
13568 DECL_REGISTER variables to TREE_STATIC.
13570 PR tree-optimization/93582
13571 PR tree-optimization/93945
13572 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
13573 non-zero INTEGER_CST second argument and ref->offset or ref->size
13574 not a multiple of BITS_PER_UNIT.
13576 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
13578 * doc/install.texi (Binaries): Update description of BullFreeware.
13580 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
13584 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
13585 C++ Language Options, Warning Options, and Static Analyzer
13586 Options lists. Document negative form of options enabled by
13587 default. Move some things around to more accurately sort
13588 warnings by category.
13589 (C++ Dialect Options, Warning Options, Static Analyzer
13590 Options): Document negative form of options when enabled by
13591 default. Move some things around to more accurately sort
13592 warnings by category. Add some missing index entries.
13593 Light copy-editing.
13595 2020-02-26 Carl Love <cel@us.ibm.com>
13598 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
13599 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
13600 for the vector unsigned short arguments. It is also listed as the
13601 name of the built-in for arguments vector unsigned short,
13602 vector unsigned int and vector unsigned long long built-ins. The
13603 name of the builtins for these arguments should be:
13604 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
13605 __builtin_crypto_vpmsumd respectively.
13607 2020-02-26 Richard Biener <rguenther@suse.de>
13609 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
13610 and load permutation.
13612 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
13614 PR middle-end/93843
13615 * optabs-tree.c (supportable_convert_operation): Reject types with
13618 2020-02-26 David Malcolm <dmalcolm@redhat.com>
13620 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
13622 2020-02-26 Jakub Jelinek <jakub@redhat.com>
13624 PR tree-optimization/93820
13625 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
13626 argument to ALL_INTEGER_CST_P boolean.
13627 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
13628 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
13629 adjacent INTEGER_CST store into merged_store->only_constants like
13632 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13635 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
13637 * cfghooks.c (verify_flow_info): Likewise.
13638 * predict.c (combine_predictions_for_bb): Likewise.
13639 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
13640 sucessor -> successor.
13641 (find_traces_1_round): Fix comment typo, destinarion -> destination.
13642 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
13644 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
13645 message typo, sucessors -> successors.
13647 2020-02-25 Martin Sebor <msebor@redhat.com>
13649 * doc/extend.texi (attribute access): Correct an example.
13651 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13653 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
13655 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
13656 (VAR15, VAR16): New.
13657 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
13658 (VD): Enable for V4BF.
13660 (VQ): Enable for V8BF.
13662 (VQ_NO2E): Likewise.
13663 (VDBL, Vdbl): Add V4BF.
13664 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
13665 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
13666 (bfloat16x8x2_t): Likewise.
13667 (bfloat16x4x3_t): Likewise.
13668 (bfloat16x8x3_t): Likewise.
13669 (bfloat16x4x4_t): Likewise.
13670 (bfloat16x8x4_t): Likewise.
13671 (vcombine_bf16): New.
13672 (vld1_bf16, vld1_bf16_x2): New.
13673 (vld1_bf16_x3, vld1_bf16_x4): New.
13674 (vld1q_bf16, vld1q_bf16_x2): New.
13675 (vld1q_bf16_x3, vld1q_bf16_x4): New.
13676 (vld1_lane_bf16): New.
13677 (vld1q_lane_bf16): New.
13678 (vld1_dup_bf16): New.
13679 (vld1q_dup_bf16): New.
13682 (vld2_dup_bf16): New.
13683 (vld2q_dup_bf16): New.
13686 (vld3_dup_bf16): New.
13687 (vld3q_dup_bf16): New.
13690 (vld4_dup_bf16): New.
13691 (vld4q_dup_bf16): New.
13692 (vst1_bf16, vst1_bf16_x2): New.
13693 (vst1_bf16_x3, vst1_bf16_x4): New.
13694 (vst1q_bf16, vst1q_bf16_x2): New.
13695 (vst1q_bf16_x3, vst1q_bf16_x4): New.
13696 (vst1_lane_bf16): New.
13697 (vst1q_lane_bf16): New.
13705 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13707 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
13708 (VALL_F16): Likewise.
13709 (VALLDI_F16): Likewise.
13711 (Vetype): Likewise.
13712 (vswap_width_name): Likewise.
13713 (VSWAP_WIDTH): Likewise.
13717 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
13718 (vget_lane_bf16, vgetq_lane_bf16): New.
13719 (vcreate_bf16): New.
13720 (vdup_n_bf16, vdupq_n_bf16): New.
13721 (vdup_lane_bf16, vdup_laneq_bf16): New.
13722 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13723 (vduph_lane_bf16, vduph_laneq_bf16): New.
13724 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13725 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13726 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13727 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13728 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13729 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13730 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13731 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13732 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13733 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13734 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
13735 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
13736 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13737 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13738 (vreinterpretq_bf16_p128): New.
13739 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13740 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13741 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13742 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13743 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13744 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13745 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13746 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13747 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13748 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13749 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13750 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13751 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
13752 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
13753 (vreinterpretq_p128_bf16): New.
13755 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
13757 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
13758 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
13759 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
13760 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
13761 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
13762 * config/arm/iterators.md (VSF2BF): New attribute.
13763 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
13764 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
13765 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
13767 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
13769 * config/arm/arm.md (required_for_purecode): New attribute.
13770 (enabled): Handle required_for_purecode.
13771 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
13772 work with -mpure-code.
13774 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13776 PR rtl-optimization/93908
13777 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
13780 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
13782 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
13784 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
13786 * doc/install.texi (--enable-checking): Adjust wording.
13788 2020-02-25 Richard Biener <rguenther@suse.de>
13790 PR tree-optimization/93868
13791 * tree-vect-slp.c (slp_copy_subtree): New function.
13792 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
13793 re-arranging stmts in it.
13795 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13797 PR middle-end/93874
13798 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
13799 dummy function and remove it at the end.
13801 PR translation/93864
13802 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
13803 paramter -> parameter.
13804 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
13805 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
13807 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
13809 * doc/install.texi (--enable-checking): Properly document current
13811 (--enable-stage1-checking): Minor clarification about bootstrap.
13813 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13816 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
13817 -fanalyzer-checker=taint is also required.
13818 (-fanalyzer-checker=): Note that providing this option enables the
13819 given checker, and doing so may be required for checkers that are
13820 disabled by default.
13822 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13824 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
13825 significant control flow events; add a "3" which shows all
13826 control flow events; the old "3" becomes "4".
13828 2020-02-24 Jakub Jelinek <jakub@redhat.com>
13830 PR tree-optimization/93582
13831 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
13832 pd.offset and pd.size to be counted in bits rather than bytes, add
13833 support for maxsizei that is not a multiple of BITS_PER_UNIT and
13834 handle bitfield stores and loads.
13835 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
13836 uncomparable quantities - bytes vs. bits. Allow push_partial_def
13837 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
13838 pd.offset/pd.size to be counted in bits rather than bytes.
13839 Formatting fix. Rename shadowed len variable to buflen.
13841 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13842 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
13845 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
13846 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
13847 * opts-common.c (parse_options_from_collect_gcc_options): New function.
13848 (prepend_xassembler_to_collect_as_options): Likewise.
13849 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
13850 (prepend_xassembler_to_collect_as_options): Likewise.
13851 * lto-opts.c (lto_write_options): Stream assembler options
13852 in COLLECT_AS_OPTIONS.
13853 * lto-wrapper.c (xassembler_options_error): New static variable.
13854 (get_options_from_collect_gcc_options): Move parsing options code to
13855 parse_options_from_collect_gcc_options and call it.
13856 (merge_and_complain): Validate -Xassembler options.
13857 (append_compiler_options): Handle OPT_Xassembler.
13858 (run_gcc): Append command line -Xassembler options to
13859 collect_gcc_options.
13860 * doc/invoke.texi: Add documentation about using Xassembler
13863 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
13865 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
13867 (riscv_rtx_costs): Update cost model for LTGT.
13869 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
13871 PR rtl-optimization/93564
13872 * ira-color.c (struct update_cost_queue_elem): New member start.
13873 (queue_update_cost, get_next_update_cost): Add new arg start.
13874 (allocnos_conflict_p): New function.
13875 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
13876 Add checking conflicts with allocnos_conflict_p.
13877 (update_costs_from_prefs, restore_costs_from_copies): Adjust
13878 update_costs_from_allocno calls.
13879 (update_conflict_hard_regno_costs): Add checking conflicts with
13880 allocnos_conflict_p. Adjust calls of queue_update_cost and
13881 get_next_update_cost.
13882 (assign_hard_reg): Adjust calls of queue_update_cost. Add
13884 (bucket_allocno_compare_func): Restore previous version.
13886 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
13888 * config/pa/pa.c (pa_function_value): Fix check for word and
13889 double-word size when handling aggregate return values.
13890 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
13891 that homogeneous SFmode and DFmode aggregates are passed and returned
13892 in general registers.
13894 2020-02-21 Jakub Jelinek <jakub@redhat.com>
13896 PR translation/93759
13897 * opts.c (print_filtered_help): Translate help before appending
13898 messages to it rather than after that.
13900 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
13902 PR rtl-optimization/PR92989
13903 * lra-lives.c (process_bb_lives): Restore the original order
13904 of the bb liveness update. Call make_hard_regno_dead for each
13905 register clobbered at the start of an EH receiver.
13907 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
13910 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
13911 self-recursively generated.
13913 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
13916 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
13919 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
13921 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
13922 Document new target supports option.
13924 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
13926 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
13927 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
13928 * config/arm/iterators.md (MATMUL): New iterator.
13929 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
13930 (mmla_sfx): New attribute.
13931 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
13932 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
13933 (UNSPEC_MATMUL_US): New.
13935 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13937 * config/arm/arm.md: Prevent scalar shifts from being used when big
13940 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
13941 Richard Biener <rguenther@suse.de>
13943 PR tree-optimization/93586
13944 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
13945 after mismatched array refs; do not sure type size information to
13946 recover from unmatched referneces with !flag_strict_aliasing_p.
13948 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13950 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
13951 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
13952 (scatter_store<mode>): Rename to ...
13953 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
13954 (scatter<mode>_exec): Delete. Move contents ...
13955 (mask_scatter_store<mode>): ... here, and rename that to ...
13956 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
13957 Remove mode conversion.
13958 (mask_gather_load<mode>): Rename to ...
13959 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
13960 Remove mode conversion.
13961 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
13963 2020-02-21 Martin Jambor <mjambor@suse.cz>
13965 PR tree-optimization/93845
13966 * tree-sra.c (verify_sra_access_forest): Only test access size of
13969 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13971 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
13972 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
13973 (addv64di3_exec): Likewise.
13974 (subv64di3): Likewise.
13975 (subv64di3_exec): Likewise.
13976 (addv64di3_zext): Likewise.
13977 (addv64di3_zext_exec): Likewise.
13978 (addv64di3_zext_dup): Likewise.
13979 (addv64di3_zext_dup_exec): Likewise.
13980 (addv64di3_zext_dup2): Likewise.
13981 (addv64di3_zext_dup2_exec): Likewise.
13982 (addv64di3_sext_dup2): Likewise.
13983 (addv64di3_sext_dup2_exec): Likewise.
13984 (<expander>v64di3): Likewise.
13985 (<expander>v64di3_exec): Likewise.
13986 (*<reduc_op>_dpp_shr_v64di): Likewise.
13987 (*plus_carry_dpp_shr_v64di): Likewise.
13988 * config/gcn/gcn.md (adddi3): Likewise.
13989 (addptrdi3): Likewise.
13990 (<expander>di3): Likewise.
13992 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13994 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
13996 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13998 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
13999 support. Use aarch64_emit_mult instead of emitting multiplication
14000 instructions directly.
14001 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
14002 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
14004 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14006 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
14007 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
14008 instead of emitting multiplication instructions directly.
14009 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
14010 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
14011 (@aarch64_frecps<mode>): New expanders.
14013 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14015 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
14016 on and produce uint64_ts rather than ints.
14017 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
14018 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
14020 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14022 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
14023 an unused xmsk register when handling approximate rsqrt.
14025 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
14027 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
14028 flag_finite_math_only condition.
14030 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
14033 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
14034 to destination operand for shufps alternative.
14035 (*vec_extractv2si_1): Ditto.
14037 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
14040 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
14043 2020-02-20 Martin Liska <mliska@suse.cz>
14045 PR translation/93831
14046 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
14048 2020-02-20 Martin Liska <mliska@suse.cz>
14050 PR translation/93830
14051 * common/config/avr/avr-common.c: Remote trailing "|".
14053 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14055 * collect2.c (maybe_run_lto_and_relink): Fix typo in
14058 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
14060 PR tree-optimization/93767
14061 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
14062 access-size bias from the offset calculations for negative strides.
14064 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14066 * collect2.c (c_file, o_file): Make const again.
14067 (ldout,lderrout, dump_ld_file): Remove.
14068 (tool_cleanup): Avoid calling not signal-safe functions.
14069 (maybe_run_lto_and_relink): Avoid possible signal handler
14070 access to unintialzed memory (lto_o_files).
14071 (main): Avoid leaking temp files in $TMPDIR.
14072 Initialize c_file/o_file with concat, which avoids exposing
14073 uninitialized memory to signal handler, which calls unlink(!).
14074 Avoid calling maybe_unlink when the main function returns,
14075 since the atexit handler is already doing this.
14076 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
14078 2020-02-19 Martin Jambor <mjambor@suse.cz>
14080 PR tree-optimization/93776
14081 * tree-sra.c (create_access): Do not create zero size accesses.
14082 (get_access_for_expr): Do not search for zero sized accesses.
14084 2020-02-19 Martin Jambor <mjambor@suse.cz>
14086 PR tree-optimization/93667
14087 * tree-sra.c (scalarizable_type_p): Return false if record fields
14088 do not follow wach other.
14090 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
14092 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
14093 rather than fmv.x.s/fmv.s.x.
14095 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
14097 * config/aarch64/aarch64-simd-builtins.def
14098 (intrinsic_vec_smult_lo_): New.
14099 (intrinsic_vec_umult_lo_): Likewise.
14100 (vec_widen_smult_hi_): Likewise.
14101 (vec_widen_umult_hi_): Likewise.
14102 * config/aarch64/aarch64-simd.md
14103 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
14104 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
14105 (vmull_high_s16): Likewise.
14106 (vmull_high_s32): Likewise.
14107 (vmull_high_u8): Likewise.
14108 (vmull_high_u16): Likewise.
14109 (vmull_high_u32): Likewise.
14110 (vmull_s8): Likewise.
14111 (vmull_s16): Likewise.
14112 (vmull_s32): Likewise.
14113 (vmull_u8): Likewise.
14114 (vmull_u16): Likewise.
14115 (vmull_u32): Likewise.
14117 2020-02-18 Martin Liska <mliska@suse.cz>
14119 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
14120 bootstrap by missing removal of invalid sanity check.
14122 2020-02-18 Martin Liska <mliska@suse.cz>
14125 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
14126 Always compare LHS of gimple_assign.
14128 2020-02-18 Martin Liska <mliska@suse.cz>
14131 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
14132 and return type of functions.
14133 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
14134 Drop MALLOC attribute for void functions.
14135 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
14136 malloc_state for a new VOID clone.
14138 2020-02-18 Martin Liska <mliska@suse.cz>
14141 * common.opt: Add -fprofile-reproducibility.
14142 * doc/invoke.texi: Document it.
14143 * value-prof.c (dump_histogram_value):
14144 Document and support behavior for counters[0]
14145 being a negative value.
14146 (get_nth_most_common_value): Handle negative
14147 counters[0] in respect to flag_profile_reproducible.
14149 2020-02-18 Jakub Jelinek <jakub@redhat.com>
14152 * cgraph.c (verify_speculative_call): Use speculative_id instead of
14153 speculative_uid in messages. Remove trailing whitespace from error
14154 message. Use num_speculative_call_targets instead of
14155 num_speculative_targets in a message.
14156 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
14157 edge messages and stmt instead of cal_stmt in reference message.
14159 PR tree-optimization/93780
14160 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
14161 before calling build_vector_type.
14162 (execute_update_addresses_taken): Likewise.
14165 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
14166 typo, functoin -> function.
14167 * tree.c (free_lang_data_in_decl): Fix comment typo,
14168 functoin -> function.
14169 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
14171 2020-02-17 David Malcolm <dmalcolm@redhat.com>
14173 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
14175 (print_option_information): Don't call get_option_url if URLs
14178 2020-02-17 Alexandre Oliva <oliva@adacore.com>
14180 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
14181 handling of register_common-less targets.
14183 2020-02-17 Martin Liska <mliska@suse.cz>
14186 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
14188 2020-02-17 Martin Liska <mliska@suse.cz>
14190 PR translation/93755
14191 * config/rs6000/rs6000.c (rs6000_option_override_internal):
14194 2020-02-17 Martin Liska <mliska@suse.cz>
14197 * config/rx/elf.opt: Fix typo.
14199 2020-02-17 Richard Biener <rguenther@suse.de>
14202 * opts-global.c (print_ignored_options): Use inform and
14205 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
14208 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
14210 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
14213 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
14214 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
14216 2020-02-15 Jason Merrill <jason@redhat.com>
14218 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
14220 2020-02-15 Jakub Jelinek <jakub@redhat.com>
14222 PR tree-optimization/93744
14223 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
14224 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
14225 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
14226 sure @2 in the first and @1 in the other patterns has no side-effects.
14228 2020-02-15 David Malcolm <dmalcolm@redhat.com>
14229 Bernd Edlinger <bernd.edlinger@hotmail.de>
14233 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
14234 * configure.ac (--with-diagnostics-urls): New configuration
14235 option, based on --with-diagnostics-color.
14236 (DIAGNOSTICS_URLS_DEFAULT): New define.
14237 * config.h: Regenerate.
14238 * configure: Regenerate.
14239 * diagnostic.c (diagnostic_urls_init): Handle -1 for
14240 DIAGNOSTICS_URLS_DEFAULT from configure-time
14241 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
14242 and TERM_URLS environment variable.
14243 * diagnostic-url.h (diagnostic_url_format): New enum type.
14244 (diagnostic_urls_enabled_p): rename to...
14245 (determine_url_format): ... this, and change return type.
14246 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
14247 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
14248 the linux console, and mingw.
14249 (diagnostic_urls_enabled_p): rename to...
14250 (determine_url_format): ... this, and adjust.
14251 * pretty-print.h (pretty_printer::show_urls): rename to...
14252 (pretty_printer::url_format): ... this, and change to enum.
14253 * pretty-print.c (pretty_printer::pretty_printer,
14254 pp_begin_url, pp_end_url, test_urls): Adjust.
14255 * doc/install.texi (--with-diagnostics-urls): Document the new
14256 configuration option.
14257 (--with-diagnostics-color): Document the existing interaction
14258 with GCC_COLORS better.
14259 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
14260 vindex reference. Update description of defaults based on the above.
14261 (-fdiagnostics-color): Update description of how -fdiagnostics-color
14262 interacts with GCC_COLORS.
14264 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
14267 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
14268 conjunction with TARGET_GNU_TLS in early return.
14270 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
14272 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
14273 the mode is not wider than UNITS_PER_WORD.
14275 2020-02-14 Martin Jambor <mjambor@suse.cz>
14277 PR tree-optimization/93516
14278 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
14279 access of the same type as the parent.
14280 (propagate_subaccesses_from_lhs): Likewise.
14282 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
14285 * config/i386/avx512vbmi2intrin.h
14286 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
14287 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
14288 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
14289 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
14290 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
14291 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
14292 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
14293 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
14294 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
14295 of lacking a closing parenthesis.
14296 * config/i386/avx512vbmi2vlintrin.h
14297 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
14298 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
14299 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
14300 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
14301 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
14302 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
14303 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
14304 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
14305 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
14306 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
14307 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
14308 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
14309 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
14310 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
14311 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
14312 _mm_shldi_epi32, _mm_mask_shldi_epi32,
14313 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
14314 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
14316 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
14319 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
14320 the target function entry.
14322 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14324 * common/config/arc/arc-common.c (arc_option_optimization_table):
14325 Disable if-conversion step when optimized for size.
14327 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14329 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
14330 R12-R15 are always in ARCOMPACT16_REGS register class.
14331 * config/arc/arc.opt (mq-class): Deprecate.
14332 * config/arc/constraint.md ("q"): Remove dependency on mq-class
14334 * doc/invoke.texi (mq-class): Update text.
14335 * common/config/arc/arc-common.c (arc_option_optimization_table):
14338 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14340 * config/arc/arc.c (arc_insn_cost): New function.
14341 (TARGET_INSN_COST): Define.
14342 * config/arc/arc.md (cost): New attribute.
14343 (add_n): Use arc_nonmemory_operand.
14344 (ashlsi3_insn): Likewise, also update constraints.
14345 (ashrsi3_insn): Likewise.
14346 (rotrsi3): Likewise.
14347 (add_shift): Likewise.
14348 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
14350 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14352 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
14354 (umulsidi_600): Likewise.
14356 2020-02-13 Jakub Jelinek <jakub@redhat.com>
14359 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
14360 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
14361 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
14362 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
14363 pass __A to the builtin followed by __W instead of __A followed by
14365 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
14366 _mm512_mask_popcnt_epi64): Likewise.
14367 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
14368 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
14369 _mm256_mask_popcnt_epi64): Likewise.
14371 PR tree-optimization/93582
14372 * fold-const.h (shift_bytes_in_array_left,
14373 shift_bytes_in_array_right): Declare.
14374 * fold-const.c (shift_bytes_in_array_left,
14375 shift_bytes_in_array_right): New function, moved from
14376 gimple-ssa-store-merging.c, no longer static.
14377 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
14378 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
14379 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
14380 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
14381 shift_bytes_in_array.
14382 (verify_shift_bytes_in_array): Rename to ...
14383 (verify_shift_bytes_in_array_left): ... this. Use
14384 shift_bytes_in_array_left instead of shift_bytes_in_array.
14385 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
14386 instead of verify_shift_bytes_in_array.
14387 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
14388 / native_interpret_expr where the store covers all needed bits,
14389 punt on PDP-endian, otherwise allow all involved offsets and sizes
14390 not to be byte-aligned.
14393 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
14394 use const_0_to_255_operand predicate instead of immediate_operand.
14395 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
14396 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
14397 vgf2p8affineinvqb_<mode><mask_name>,
14398 vgf2p8affineqb_<mode><mask_name>): Drop mode from
14399 const_0_to_255_operand predicated operands.
14401 2020-02-12 Jeff Law <law@redhat.com>
14403 * config/h8300/h8300.md (comparison shortening peepholes): Use
14404 a mode iterator to merge the HImode and SImode peepholes.
14406 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14408 PR middle-end/93663
14409 * real.c (is_even): Make static. Function comment fix.
14410 (is_halfway_below): Make static, don't assert R is not inf/nan,
14411 instead return false for those. Small formatting fixes.
14413 2020-02-12 Martin Sebor <msebor@redhat.com>
14415 PR middle-end/93646
14416 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
14417 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
14418 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
14419 (strlen_check_and_optimize_call): Adjust callee name.
14421 2020-02-12 Jeff Law <law@redhat.com>
14423 * config/h8300/h8300.md (comparison shortening peepholes): Drop
14424 (and (xor)) variant. Combine other two into single peephole.
14426 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14428 PR rtl-optimization/93565
14429 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
14431 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14433 * config/aarch64/aarch64-simd.md
14434 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
14435 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
14436 generating separate ADDV and zero_extend patterns.
14437 * config/aarch64/iterators.md (VDQV_E): New iterator.
14439 2020-02-12 Jeff Law <law@redhat.com>
14441 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
14442 expanders, splits, etc.
14443 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
14444 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
14445 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
14446 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
14447 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
14448 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
14449 function prototype.
14450 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
14452 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14455 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
14456 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
14457 TARGET_AVX512DQ from condition.
14458 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
14459 instead of <mask_mode512bit_condition> in condition. If
14460 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
14462 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
14465 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
14468 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
14470 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
14472 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
14473 where strlen is more legible.
14474 (rs6000_builtin_vectorized_libmass): Ditto.
14475 (rs6000_print_options_internal): Ditto.
14477 2020-02-11 Martin Sebor <msebor@redhat.com>
14479 PR tree-optimization/93683
14480 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
14482 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
14484 * config/rs6000/predicates.md (cint34_operand): Rename the
14485 -mprefixed-addr option to be -mprefixed.
14486 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
14487 the -mprefixed-addr option to be -mprefixed.
14488 (OTHER_FUTURE_MASKS): Likewise.
14489 (POWERPC_MASKS): Likewise.
14490 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
14491 the -mprefixed-addr option to be -mprefixed. Change error
14492 messages to refer to -mprefixed.
14493 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
14495 (rs6000_legitimate_offset_address_p): Likewise.
14496 (rs6000_mode_dependent_address): Likewise.
14497 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
14498 "-mprefixed" for target attributes and pragmas.
14499 (address_to_insn_form): Rename the -mprefixed-addr option to be
14501 (rs6000_adjust_insn_length): Likewise.
14502 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
14503 -mprefixed-addr option to be -mprefixed.
14504 (ASM_OUTPUT_OPCODE): Likewise.
14505 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
14506 -mprefixed-addr option to be -mprefixed.
14507 * config/rs6000/rs6000.opt (-mprefixed): Rename the
14508 -mprefixed-addr option to be prefixed. Change the option from
14509 being undocumented to being documented.
14510 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
14511 -mprefixed option. Update the -mpcrel documentation to mention
14514 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
14516 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
14517 including FIRST_PSEUDO_REGISTER - 1.
14518 * ira-color.c (print_hard_reg_set): Ditto.
14520 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14522 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
14523 (USTERNOP_QUALIFIERS): New define.
14524 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
14525 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
14526 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
14527 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
14528 * config/arm/arm_neon.h (vusdot_s32): New.
14529 (vusdot_lane_s32): New.
14530 (vusdotq_lane_s32): New.
14531 (vsudot_lane_s32): New.
14532 (vsudotq_lane_s32): New.
14533 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
14534 * config/arm/iterators.md (DOTPROD_I8MM): New.
14535 (sup, opsuffix): Add <us/su>.
14536 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
14537 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
14539 2020-02-11 Richard Biener <rguenther@suse.de>
14541 PR tree-optimization/93661
14542 PR tree-optimization/93662
14543 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
14544 tree_to_poly_int64.
14545 * tree-sra.c (get_access_for_expr): Likewise.
14547 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14550 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
14551 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
14552 Change condition from TARGET_AVX2 to TARGET_AVX.
14554 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
14557 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
14558 argument of strncmp.
14560 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14562 Try to generate zero-based comparisons.
14563 * config/cris/cris.c (cris_reduce_compare): New function.
14564 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
14565 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
14566 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
14568 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
14571 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
14572 in Thumb state and also as a destination in Arm state. Add T16
14575 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14577 * md.texi (Define Subst): Match closing paren in example.
14579 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14583 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
14584 arguments of strncmp.
14586 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
14589 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
14590 but different source value.
14591 (adjust_callers_for_value_intersection): New function.
14592 (gather_edges_for_value): Adjust order of callers to let a
14593 non-self-recursive caller be the first element.
14594 (self_recursive_pass_through_p): Add a new parameter "simple", and
14595 check generalized self-recursive pass-through jump function.
14596 (self_recursive_agg_pass_through_p): Likewise.
14597 (find_more_scalar_values_for_callers_subset): Compute value from
14598 pass-through jump function for self-recursive.
14599 (intersect_with_plats): Cleanup previous implementation code for value
14600 itersection with self-recursive call edge.
14601 (intersect_with_agg_replacements): Likewise.
14602 (intersect_aggregates_with_edge): Deduce value from pass-through jump
14603 function for self-recursive call edge. Cleanup previous implementation
14604 code for value intersection with self-recursive call edge.
14605 (decide_whether_version_node): Remove dead callers and adjust order
14606 to let a non-self-recursive caller be the first element.
14608 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
14610 * recog.c: Move pass_split_before_sched2 code in front of
14611 pass_split_before_regstack.
14612 (pass_data_split_before_sched2): Rename pass to split3 from split4.
14613 (pass_data_split_before_regstack): Rename pass to split4 from split3.
14614 (rest_of_handle_split_before_sched2): Remove.
14615 (pass_split_before_sched2::execute): Unconditionally call
14617 (enable_split_before_sched2): New function.
14618 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
14619 (pass_split_before_regstack::gate): Ditto.
14620 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
14621 Update name check for renamed split4 pass.
14622 * config/sh/sh.c (register_sh_passes): Update pass insertion
14623 point for renamed split4 pass.
14625 2020-02-09 Jakub Jelinek <jakub@redhat.com>
14627 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
14628 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
14629 copying them around between host and target.
14631 2020-02-08 Andrew Pinski <apinski@marvell.com>
14634 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
14635 STRICT_ALIGNMENT also.
14637 2020-02-08 Jim Wilson <jimw@sifive.com>
14640 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
14642 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
14643 Jakub Jelinek <jakub@redhat.com>
14646 * config/i386/i386.h (CALL_USED_REGISTERS): Make
14647 xmm16-xmm31 call-used even in 64-bit ms-abi.
14649 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
14651 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
14652 (simd_ummla, simd_usmmla): Likewise.
14653 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
14654 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
14655 (vusmmlaq_s32): New.
14657 2020-02-07 Richard Biener <rguenther@suse.de>
14659 PR middle-end/93519
14660 * tree-inline.c (fold_marked_statements): Do a PRE walk,
14661 skipping unreachable regions.
14662 (optimize_inline_calls): Skip folding stmts when we didn't
14665 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
14668 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
14669 Don't return aggregates with only SFmode and DFmode in SSE
14671 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
14673 2020-02-07 Jakub Jelinek <jakub@redhat.com>
14676 * config/rs6000/rs6000-logue.c
14677 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
14678 if it fails, move rs into end_addr and retry. Add
14679 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
14680 the insn pattern doesn't describe well what exactly happens to
14684 * config/i386/predicates.md (avx_identity_operand): Remove.
14685 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
14686 (avx_<castmode><avxsizesuffix>_<castmode>,
14687 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
14688 a VEC_CONCAT of the operand and UNSPEC_CAST.
14689 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
14690 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
14694 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
14695 recog_data.insn if distance_non_agu_define changed it.
14697 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
14700 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
14701 we only had X-FORM (reg+reg) addressing for vectors. Also before
14702 ISA 3.0, we only had X-FORM addressing for scalars in the
14703 traditional Altivec registers.
14705 2020-02-06 <zhongyunde@huawei.com>
14706 Vladimir Makarov <vmakarov@redhat.com>
14708 PR rtl-optimization/93561
14709 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
14710 hard register range.
14712 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14714 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
14717 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
14719 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
14720 where the low and the high 32 bits are equal to each other specially,
14721 with an rldimi instruction.
14723 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14725 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
14727 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14729 * config/arm/arm-tables.opt: Regenerate.
14731 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14734 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
14735 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
14736 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
14738 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14740 PR rtl-optimization/87763
14741 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
14743 2020-02-06 Delia Burduv <delia.burduv@arm.com>
14745 * config/aarch64/aarch64-simd-builtins.def
14746 (bfmlaq): New built-in function.
14747 (bfmlalb): New built-in function.
14748 (bfmlalt): New built-in function.
14749 (bfmlalb_lane): New built-in function.
14750 (bfmlalt_lane): New built-in function.
14751 * config/aarch64/aarch64-simd.md
14752 (aarch64_bfmmlaqv4sf): New pattern.
14753 (aarch64_bfmlal<bt>v4sf): New pattern.
14754 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
14755 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
14756 (vbfmlalbq_f32): New intrinsic.
14757 (vbfmlaltq_f32): New intrinsic.
14758 (vbfmlalbq_lane_f32): New intrinsic.
14759 (vbfmlaltq_lane_f32): New intrinsic.
14760 (vbfmlalbq_laneq_f32): New intrinsic.
14761 (vbfmlaltq_laneq_f32): New intrinsic.
14762 * config/aarch64/iterators.md (BF_MLA): New int iterator.
14763 (bt): New int attribute.
14765 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
14767 * config/i386/i386.md (*pushtf): Emit "#" instead of
14768 calling gcc_unreachable in insn output.
14771 (*pushsf_rex64): Ditto for alternatives other than 1.
14772 (*pushsf): Ditto for alternatives other than 1.
14774 2020-02-06 Martin Liska <mliska@suse.cz>
14776 PR gcov-profile/91971
14777 PR gcov-profile/93466
14778 * coverage.c (coverage_init): Revert mangling of
14779 path into filename. It can lead to huge filename length.
14780 Creation of subfolders seem more natural.
14782 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14785 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
14786 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
14787 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
14789 2020-02-06 Jakub Jelinek <jakub@redhat.com>
14792 * config/i386/predicates.md (avx_identity_operand): New predicate.
14793 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
14794 define_insn_and_split.
14797 * omp-low.c (use_pointer_for_field): For nested constructs, also
14798 look for map clauses on target construct.
14799 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
14800 taskreg_nesting_level.
14803 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
14804 shared clause, call omp_notice_variable on outer context if any.
14806 2020-02-05 Jason Merrill <jason@redhat.com>
14809 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
14810 non-zero address even if weak and not yet defined.
14812 2020-02-05 Martin Sebor <msebor@redhat.com>
14814 PR tree-optimization/92765
14815 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
14816 * tree-ssa-strlen.c (compute_string_length): Remove.
14817 (determine_min_objsize): Remove.
14818 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
14819 Avoid using type size as the upper bound on string length.
14820 (handle_builtin_string_cmp): Add an argument. Adjust.
14821 (strlen_check_and_optimize_call): Pass additional argument to
14822 handle_builtin_string_cmp.
14824 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
14826 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
14827 (*pushdi2_rex64 peephole2): Unconditionally split after
14828 epilogue_completed.
14829 (*ashl<mode>3_doubleword): Ditto.
14830 (*<shift_insn><mode>3_doubleword): Ditto.
14832 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
14835 * config/rs6000/rs6000.c (get_vector_offset): Fix
14837 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
14839 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
14841 2020-02-05 David Malcolm <dmalcolm@redhat.com>
14843 * doc/analyzer.texi
14844 (Special Functions for Debugging the Analyzer): Update description
14845 of __analyzer_dump_exploded_nodes.
14847 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14850 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
14851 include sets and not clobbers in the vzeroupper pattern.
14852 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
14853 the parallel has 17 (64-bit) or 9 (32-bit) elts.
14854 (*avx_vzeroupper_1): New define_insn_and_split.
14857 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
14858 don't run when !optimize.
14859 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
14862 2020-02-05 Richard Biener <rguenther@suse.de>
14864 PR middle-end/90648
14865 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
14866 checks before matching calls.
14868 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14870 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
14871 function comment typo.
14873 PR middle-end/93555
14874 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
14875 simd_clone_create failed when i == 0, adjust clone->nargs by
14878 2020-02-05 Martin Liska <mliska@suse.cz>
14881 * doc/invoke.texi: Document that one should
14882 not combine ASLR and -fpch.
14884 2020-02-04 Richard Biener <rguenther@suse.de>
14886 PR tree-optimization/93538
14887 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
14889 2020-02-04 Richard Biener <rguenther@suse.de>
14891 PR tree-optimization/91123
14892 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
14893 (vn_walk_cb_data::last_vuse): New member.
14894 (vn_walk_cb_data::saved_operands): Likewsie.
14895 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
14896 (vn_walk_cb_data::push_partial_def): Use finish.
14897 (vn_reference_lookup_2): Update last_vuse and use finish if
14898 we've saved operands.
14899 (vn_reference_lookup_3): Use finish and update calls to
14900 push_partial_defs everywhere. When translating through
14901 memcpy or aggregate copies save off operands and alias-set.
14902 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
14903 operation for redundant store removal.
14905 2020-02-04 Richard Biener <rguenther@suse.de>
14907 PR tree-optimization/92819
14908 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
14909 generating more stmts than before.
14911 2020-02-04 Martin Liska <mliska@suse.cz>
14913 * config/arm/arm.c (arm_gen_far_branch): Move the function
14914 outside of selftests.
14916 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14918 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
14919 function to adjust PC-relative vector addresses.
14920 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
14921 handle vectors with PC-relative addresses.
14923 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14925 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
14927 (hard_reg_and_mode_to_addr_mask): Delete.
14928 (rs6000_adjust_vec_address): If the original vector address
14929 was REG+REG or REG+OFFSET and the element is not zero, do the add
14930 of the elements in the original address before adding the offset
14931 for the vector element. Use address_to_insn_form to validate the
14932 address using the register being loaded, rather than guessing
14933 whether the address is a DS-FORM or DQ-FORM address.
14935 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14937 * config/rs6000/rs6000.c (get_vector_offset): New helper function
14938 to calculate the offset in memory from the start of a vector of a
14939 particular element. Add code to keep the element number in
14940 bounds if the element number is variable.
14941 (rs6000_adjust_vec_address): Move calculation of offset of the
14942 vector element to get_vector_offset.
14943 (rs6000_split_vec_extract_var): Do not do the initial AND of
14944 element here, move the code to get_vector_offset.
14946 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14948 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
14951 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
14953 * config/rs6000/constraints.md: Improve documentation.
14955 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
14958 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
14959 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
14961 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
14963 * config.gcc: Remove "carrizo" support.
14964 * config/gcn/gcn-opts.h (processor_type): Likewise.
14965 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
14966 * config/gcn/gcn.opt (gpu_type): Likewise.
14967 * config/gcn/t-omp-device: Likewise.
14969 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14972 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
14973 * config/arm/arm.c (arm_gen_far_branch): New function
14974 arm_gen_far_branch.
14975 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
14977 2020-02-03 Julian Brown <julian@codesourcery.com>
14978 Tobias Burnus <tobias@codesourcery.com>
14980 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
14982 2020-02-03 Jakub Jelinek <jakub@redhat.com>
14985 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
14986 valid RTL to sum up the lowest and second lowest bytes of the popcnt
14989 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
14991 PR rtl-optimization/91333
14992 * ira-color.c (struct allocno_color_data): Add member
14994 (init_allocno_threads): Set the member up.
14995 (bucket_allocno_compare_func): Add compare hard reg
14998 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
15000 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
15002 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
15003 * config.in: Regenerated.
15004 * configure: Regenerated.
15005 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
15006 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
15007 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
15009 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
15011 * configure: Regenerate.
15013 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
15015 PR rtl-optimization/91333
15016 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
15017 reg preferences comparison up.
15019 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
15021 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
15022 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
15023 aarch64-sve-builtins-base.h.
15024 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
15025 aarch64-sve-builtins-base.cc.
15026 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
15027 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15028 (svcvtnt): Declare.
15029 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
15030 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15031 (svcvtnt): New functions.
15032 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
15033 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
15034 (svcvtnt): New functions.
15035 (svcvt): Add a form that converts f32 to bf16.
15036 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
15037 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
15039 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
15040 Treat B as bfloat16_t.
15041 (ternary_bfloat_lane_base): New class.
15042 (ternary_bfloat_def): Likewise.
15043 (ternary_bfloat): New shape.
15044 (ternary_bfloat_lane_def): New class.
15045 (ternary_bfloat_lane): New shape.
15046 (ternary_bfloat_lanex2_def): New class.
15047 (ternary_bfloat_lanex2): New shape.
15048 (ternary_bfloat_opt_n_def): New class.
15049 (ternary_bfloat_opt_n): New shape.
15050 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
15051 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
15052 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
15053 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
15054 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15055 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15056 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
15057 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
15058 the pattern off the narrow mode instead of the wider one.
15059 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
15060 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
15061 (sve_fp_op): Handle them.
15062 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
15063 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
15065 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
15067 * config/aarch64/arm_sve.h: Include arm_bf16.h.
15068 * config/aarch64/aarch64-modes.def (BF): Move definition before
15069 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
15070 (SVE_MODES): Handle BF modes.
15071 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
15073 (aarch64_full_sve_mode): Likewise.
15074 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
15076 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
15077 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
15078 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
15079 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
15081 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
15083 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
15084 (TYPES_all_data): Add bf16.
15085 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
15086 (register_tuple_type): Increase buffer size.
15087 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
15088 (bf16): New type suffix.
15089 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
15090 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
15091 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
15092 Change type from all_data to all_arith.
15093 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
15094 (svminp): Likewise.
15096 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
15097 Matthew Malcomson <matthew.malcomson@arm.com>
15098 Richard Sandiford <richard.sandiford@arm.com>
15100 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
15101 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
15102 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
15103 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
15104 __ARM_FEATURE_MATMUL_FP64.
15105 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
15106 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
15107 be disabled at the same time.
15108 (f32mm): New extension.
15109 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
15110 (AARCH64_FL_F64MM): Bump to the next bit up.
15111 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
15112 (TARGET_SVE_F64MM): New macros.
15113 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
15114 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
15115 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
15116 (UNSPEC_ZIP2Q): New unspeccs.
15117 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
15118 (optab, sur, perm_insn): Handle the new unspecs.
15119 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
15120 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
15121 TARGET_SVE_F64MM instead of separate tests.
15122 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
15123 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
15124 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
15125 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
15126 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
15127 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
15128 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
15129 (TYPES_s_signed): New macro.
15130 (TYPES_s_integer): Use it.
15131 (TYPES_d_float): New macro.
15132 (TYPES_d_data): Use it.
15133 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
15134 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
15135 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
15136 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
15137 (svmmla): New shape.
15138 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
15139 template parameters.
15140 (ternary_resize2_lane_base): Likewise.
15141 (ternary_resize2_base): New class.
15142 (ternary_qq_lane_base): Likewise.
15143 (ternary_intq_uintq_lane_def): Likewise.
15144 (ternary_intq_uintq_lane): New shape.
15145 (ternary_intq_uintq_opt_n_def): New class
15146 (ternary_intq_uintq_opt_n): New shape.
15147 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
15148 (ternary_uintq_intq_def): New class.
15149 (ternary_uintq_intq): New shape.
15150 (ternary_uintq_intq_lane_def): New class.
15151 (ternary_uintq_intq_lane): New shape.
15152 (ternary_uintq_intq_opt_n_def): New class.
15153 (ternary_uintq_intq_opt_n): New shape.
15154 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
15155 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
15156 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
15157 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
15159 (svdotprod_lane_impl): ...this new class.
15160 (svmmla_impl, svusdot_impl): New classes.
15161 (svdot_lane): Update to use svdotprod_lane_impl.
15162 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
15163 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
15165 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
15166 function, with no types defined.
15167 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
15168 AARCH64_FL_I8MM functions.
15169 (svmmla): New AARCH64_FL_F32MM function.
15170 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
15171 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
15172 AARCH64_FL_F64MM function.
15173 (REQUIRED_EXTENSIONS):
15175 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15177 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
15180 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
15182 * config/i386/i386.md (*movoi_internal_avx): Do not check for
15183 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
15184 (*movti_internal): Do not check for
15185 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15186 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
15187 just after check for TARGET_AVX.
15188 (*movdf_internal): Ditto.
15189 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
15190 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15191 * config/i386/sse.md (mov<mode>_internal): Only check
15192 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
15193 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
15194 (<sse>_andnot<mode>3<mask_name>): Move check for
15195 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
15196 (<code><mode>3<mask_name>): Ditto.
15197 (*andnot<mode>3): Ditto.
15198 (*andnottf3): Ditto.
15199 (*<code><mode>3): Ditto.
15200 (*<code>tf3): Ditto.
15201 (*andnot<VI:mode>3): Remove
15202 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
15203 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
15204 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
15205 (sse4_1_blendv<ssemodesuffix>): Ditto.
15206 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
15207 Explain that tune applies to 128bit instructions only.
15209 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
15211 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
15212 to definition of hsa_kernel_description. Parse assembly to find SGPR
15213 and VGPR count of kernel and store in hsa_kernel_description.
15215 2020-01-31 Tamar Christina <tamar.christina@arm.com>
15217 PR rtl-optimization/91838
15218 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
15219 to truncate if allowed or reject combination.
15221 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15223 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
15224 (find_inv_vars_cb): Likewise.
15226 2020-01-31 David Malcolm <dmalcolm@redhat.com>
15228 * calls.c (special_function_p): Split out the check for DECL_NAME
15229 being non-NULL and fndecl being extern at file scope into a
15230 new maybe_special_function_p and call it. Drop check for fndecl
15231 being non-NULL that was after a usage of DECL_NAME (fndecl).
15232 * tree.h (maybe_special_function_p): New inline function.
15234 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15236 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
15237 (mask_gather_load<mode>): ... here, and zero-initialize the
15239 (maskload<mode>di): Zero-initialize the destination.
15240 * config/gcn/gcn.c:
15242 2020-01-30 David Malcolm <dmalcolm@redhat.com>
15245 * doc/analyzer.texi (Limitations): Note that constraints on
15246 floating-point values are currently ignored.
15248 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15251 * symtab.c (symtab_node::noninterposable_alias): If localalias
15252 already exists, but is not usable, append numbers after it until
15253 a unique name is found. Formatting fix.
15255 PR middle-end/93505
15256 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
15259 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15261 * config/gcn/gcn.c (print_operand): Handle LTGT.
15262 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
15264 2020-01-30 Richard Biener <rguenther@suse.de>
15266 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
15267 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
15269 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
15271 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
15272 without a DECL in .data.rel.ro.local.
15274 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15277 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
15281 * config/i386/sse.md
15282 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
15283 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
15284 any_extend code iterator instead of always zero_extend.
15285 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
15286 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
15287 Use any_extend code iterator instead of always zero_extend.
15288 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
15289 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
15290 Use any_extend code iterator instead of always zero_extend.
15291 (*sse2_pmovmskb_ext): New define_insn.
15292 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
15295 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
15296 (*popcountsi2_zext_falsedep): New define_insn.
15298 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15300 * config.in: Regenerated.
15301 * configure: Regenerated.
15303 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
15306 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
15307 LLVM's assembler changed the default in version 9.
15309 2020-01-24 Jeff Law <law@redhat.com>
15311 PR tree-optimization/89689
15312 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
15314 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
15318 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15320 PR rtl-optimization/87763
15321 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15322 simplification to handle subregs as well as bare regs.
15323 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15325 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
15328 * ira.c (ira): Revert use of simplified LRA algorithm.
15330 2020-01-29 Martin Jambor <mjambor@suse.cz>
15332 PR tree-optimization/92706
15333 * tree-sra.c (struct access): Fields first_link, last_link,
15334 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
15335 next_rhs_queued and grp_rhs_queued respectively, new fields
15336 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
15337 (struct assign_link): Field next renamed to next_rhs, new field
15338 next_lhs. Updated comment.
15339 (work_queue_head): Renamed to rhs_work_queue_head.
15340 (lhs_work_queue_head): New variable.
15341 (add_link_to_lhs): New function.
15342 (relink_to_new_repr): Also relink LHS lists.
15343 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
15344 (add_access_to_lhs_work_queue): New function.
15345 (pop_access_from_work_queue): Renamed to
15346 pop_access_from_rhs_work_queue.
15347 (pop_access_from_lhs_work_queue): New function.
15348 (build_accesses_from_assign): Also add links to LHS lists and to LHS
15350 (child_would_conflict_in_lacc): Renamed to
15351 child_would_conflict_in_acc. Adjusted parameter names.
15352 (create_artificial_child_access): New parameter set_grp_read, use it.
15353 (subtree_mark_written_and_enqueue): Renamed to
15354 subtree_mark_written_and_rhs_enqueue.
15355 (propagate_subaccesses_across_link): Renamed to
15356 propagate_subaccesses_from_rhs.
15357 (propagate_subaccesses_from_lhs): New function.
15358 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
15361 2020-01-29 Martin Jambor <mjambor@suse.cz>
15363 PR tree-optimization/92706
15364 * tree-sra.c (struct access): Adjust comment of
15365 grp_total_scalarization.
15366 (find_access_in_subtree): Look for single children spanning an entire
15368 (scalarizable_type_p): Allow register accesses, adjust callers.
15369 (completely_scalarize): Remove function.
15370 (scalarize_elem): Likewise.
15371 (create_total_scalarization_access): Likewise.
15372 (sort_and_splice_var_accesses): Do not track total scalarization
15374 (analyze_access_subtree): New parameter totally, adjust to new meaning
15375 of grp_total_scalarization.
15376 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
15377 (can_totally_scalarize_forest_p): New function.
15378 (create_total_scalarization_access): Likewise.
15379 (create_total_access_and_reshape): Likewise.
15380 (total_should_skip_creating_access): Likewise.
15381 (totally_scalarize_subtree): Likewise.
15382 (analyze_all_variable_accesses): Perform total scalarization after
15383 subaccess propagation using the new functions above.
15384 (initialize_constant_pool_replacements): Output initializers by
15385 traversing the access tree.
15387 2020-01-29 Martin Jambor <mjambor@suse.cz>
15389 * tree-sra.c (verify_sra_access_forest): New function.
15390 (verify_all_sra_access_forests): Likewise.
15391 (create_artificial_child_access): Set parent.
15392 (analyze_all_variable_accesses): Call the verifier.
15394 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15396 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
15397 if called on indirect edge.
15398 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
15399 speculative call if needed.
15401 2020-01-29 Richard Biener <rguenther@suse.de>
15403 PR tree-optimization/93428
15404 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
15405 permutation when the load node is created.
15406 (vect_analyze_slp_instance): Re-use it here.
15408 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15410 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
15412 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
15414 PR rtl-optimization/93272
15415 * ira-lives.c (process_out_of_region_eh_regs): New function.
15416 (process_bb_node_lives): Call it.
15418 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15420 * coverage.c (read_counts_file): Make error message lowercase.
15422 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15424 * profile-count.c (profile_quality_display_names): Fix ordering.
15426 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15429 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
15430 hash only when edge is first within the sequence.
15431 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
15432 (symbol_table::create_edge): Do not set target_prob.
15433 (cgraph_edge::remove_caller): Watch for speculative calls when updating
15434 the call site hash.
15435 (cgraph_edge::make_speculative): Drop target_prob parameter.
15436 (cgraph_edge::speculative_call_info): Remove.
15437 (cgraph_edge::first_speculative_call_target): New member function.
15438 (update_call_stmt_hash_for_removing_direct_edge): New function.
15439 (cgraph_edge::resolve_speculation): Rewrite to new API.
15440 (cgraph_edge::speculative_call_for_target): New member function.
15441 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
15442 multiple speculation targets.
15443 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
15445 (verify_speculative_call): Verify that targets form an interval.
15446 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
15447 (cgraph_edge::first_speculative_call_target): New member function.
15448 (cgraph_edge::next_speculative_call_target): New member function.
15449 (cgraph_edge::speculative_call_target_ref): New member function.
15450 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
15451 (cgraph_edge): Remove target_prob.
15452 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15453 Fix handling of speculative calls.
15454 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
15455 * ipa-fnsummary.c (analyze_function_body): Likewise.
15456 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
15457 * ipa-profile.c (dump_histogram): Fix formating.
15458 (ipa_profile_generate_summary): Watch for overflows.
15459 (ipa_profile): Do not require probablity to be 1/2; update to new API.
15460 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
15461 (update_indirect_edges_after_inlining): Update to new API.
15462 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
15464 * profile-count.h: (profile_probability::adjusted): New.
15465 * tree-inline.c (copy_bb): Update to new speculative call API; fix
15466 updating of profile.
15467 * value-prof.c (gimple_ic_transform): Rename to ...
15468 (dump_ic_profile): ... this one; update dumping.
15469 (stream_in_histogram_value): Fix formating.
15470 (gimple_value_profile_transformations): Update.
15472 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15475 * config/i386/i386.md (*movoi_internal_avx): Remove
15476 TARGET_SSE_TYPELESS_STORES check.
15477 (*movti_internal): Prefer TARGET_AVX over
15478 TARGET_SSE_TYPELESS_STORES.
15479 (*movtf_internal): Likewise.
15480 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
15481 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
15482 from TARGET_SSE_TYPELESS_STORES.
15484 2020-01-28 David Malcolm <dmalcolm@redhat.com>
15486 * diagnostic-core.h (warning_at): Rename overload to...
15487 (warning_meta): ...this.
15488 (emit_diagnostic_valist): Delete decl of overload taking
15489 diagnostic_metadata.
15490 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
15491 (warning_at): Rename overload taking diagnostic_metadata to...
15492 (warning_meta): ...this.
15494 2020-01-28 Richard Biener <rguenther@suse.de>
15496 PR tree-optimization/93439
15497 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
15498 * tree-cfg.c (move_sese_region_to_fn): ... here.
15499 (verify_types_in_gimple_reference): Verify used cliques are
15502 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15505 * config/i386/i386-options.c (set_ix86_tune_features): Add an
15506 argument of a pointer to struct gcc_options and pass it to
15507 parse_mtune_ctrl_str.
15508 (ix86_function_specific_restore): Pass opts to
15509 set_ix86_tune_features.
15510 (ix86_option_override_internal): Likewise.
15511 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
15512 gcc_options and use it for x_ix86_tune_ctrl_string.
15514 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15516 PR rtl-optimization/87763
15517 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15518 simplification to handle subregs as well as bare regs.
15519 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15521 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15523 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
15524 for reduction chains that (now) include a call.
15526 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15528 PR tree-optimization/92822
15529 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
15530 out the don't-care elements of a vector whose significant elements
15531 are duplicates, make the don't-care elements duplicates too.
15533 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15535 PR tree-optimization/93434
15536 * tree-predcom.c (split_data_refs_to_components): Record which
15537 components have had aliasing loads removed. Prevent store-store
15538 commoning for all such components.
15540 2020-01-28 Jakub Jelinek <jakub@redhat.com>
15543 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
15544 -1 or is_vshift is true, use new_vector with number of elts npatterns
15545 rather than new_unary_operation.
15547 PR tree-optimization/93454
15548 * gimple-fold.c (fold_array_ctor_reference): Perform
15549 elt_size.to_uhwi () just once, instead of calling it in every
15550 iteration. Punt if that value is above size of the temporary
15551 buffer. Decrease third native_encode_expr argument when
15552 bufoff + elt_sz is above size of buf.
15554 2020-01-27 Joseph Myers <joseph@codesourcery.com>
15556 * config/mips/mips.c (mips_declare_object_name)
15557 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
15559 2020-01-27 Martin Liska <mliska@suse.cz>
15561 PR gcov-profile/93403
15562 * tree-profile.c (gimple_init_gcov_profiler): Generate
15563 both __gcov_indirect_call_profiler_v4 and
15564 __gcov_indirect_call_profiler_v4_atomic.
15566 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15569 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
15571 (@aarch64_split_simd_mov<mode>): Use it.
15572 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
15573 Leave the vec_extract patterns to handle 2-element vectors.
15574 (aarch64_simd_mov_from_<mode>high): Likewise.
15575 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
15576 (vec_extractv2dfv1df): Likewise.
15578 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15580 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
15581 jump conditions for *compare_condjump<GPI:mode>.
15583 2020-01-27 David Malcolm <dmalcolm@redhat.com>
15586 * digraph.cc (test_edge::test_edge): Specify template for base
15589 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15591 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
15593 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15595 * config/arc/arc-protos.h (gen_mlo): Remove.
15596 (gen_mhi): Likewise.
15597 * config/arc/arc.c (AUX_MULHI): Define.
15598 (arc_must_save_reister): Special handling for r58/59.
15599 (arc_compute_frame_size): Consider mlo/mhi registers.
15600 (arc_save_callee_saves): Emit fp/sp move only when emit_move
15602 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
15603 mlo/mhi name selection.
15604 (arc_restore_callee_saves): Don't early restore blink when ISR.
15605 (arc_expand_prologue): Add mlo/mhi saving.
15606 (arc_expand_epilogue): Add mlo/mhi restoring.
15609 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
15610 numbering when MUL64 option is used.
15611 (DWARF2_FRAME_REG_OUT): Define.
15612 * config/arc/arc.md (arc600_stall): New pattern.
15613 (VUNSPEC_ARC_ARC600_STALL): Define.
15614 (mulsi64): Use correct mlo/mhi registers.
15615 (mulsi_600): Clean it up.
15616 * config/arc/predicates.md (mlo_operand): Remove any dependency on
15618 (mhi_operand): Likewise.
15620 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15621 Petro Karashchenko <petro.karashchenko@ring.com>
15623 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
15624 attributes if needed.
15625 (prepare_move_operands): Generate special unspec instruction for
15627 (arc_isuncached_mem_p): Propagate uncached attribute to each
15629 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
15630 (VUNSPEC_ARC_STDI): Likewise.
15631 (ALLI): New mode iterator.
15632 (mALLI): New mode attribute.
15633 (lddi): New instruction pattern.
15635 (stdidi_split): Split instruction for architectures which are not
15636 supporting ll64 option.
15637 (lddidi_split): Likewise.
15639 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15641 PR rtl-optimization/92989
15642 * lra-lives.c (process_bb_lives): Update the live-in set before
15643 processing additional clobbers.
15645 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15647 PR rtl-optimization/93170
15648 * cselib.c (cselib_invalidate_regno_val): New function, split out
15650 (cselib_invalidate_regno): ...here.
15651 (cselib_invalidated_by_call_p): New function.
15652 (cselib_process_insn): Iterate over all the hard-register entries in
15653 REG_VALUES and invalidate any that cross call-clobbered registers.
15655 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15657 * dojump.c (split_comparison): Use HONOR_NANS rather than
15658 HONOR_SNANS when splitting LTGT.
15660 2020-01-27 Martin Liska <mliska@suse.cz>
15663 * opts.c (print_filtered_help): Exclude language-specific
15664 options from --help=common unless enabled in all FEs.
15666 2020-01-27 Martin Liska <mliska@suse.cz>
15668 * opts.c (print_help): Exclude params from
15669 all except --help=param.
15671 2020-01-27 Martin Liska <mliska@suse.cz>
15674 * config/i386/i386-features.c (make_resolver_func):
15675 Align the code with ppc64 target implementation.
15676 Do not generate a unique name for resolver function.
15678 2020-01-27 Richard Biener <rguenther@suse.de>
15680 PR tree-optimization/93397
15681 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
15682 converted reduction chain SLP graph adjustment.
15684 2020-01-26 Marek Polacek <polacek@redhat.com>
15687 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
15690 2020-01-26 Jason Merrill <jason@redhat.com>
15693 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
15696 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
15698 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
15699 (rx_setmem): Likewise.
15701 2020-01-26 Jakub Jelinek <jakub@redhat.com>
15704 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
15705 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
15706 drop <di> from constraint of last operand.
15709 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
15710 TARGET_AVX2 and V4DFmode not in the split condition, but in the
15711 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
15713 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
15716 * ipa-cp.c (get_info_about_necessary_edges): Remove value
15719 2020-01-24 Jeff Law <law@redhat.com>
15721 PR tree-optimization/92788
15722 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
15725 2020-01-24 Jakub Jelinek <jakub@redhat.com>
15728 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
15729 *avx_vperm_broadcast_<mode>,
15730 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
15731 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
15732 Move before avx2_perm<mode>/avx512f_perm<mode>.
15735 * simplify-rtx.c (simplify_const_unary_operation,
15736 simplify_const_binary_operation): Punt for mode precision above
15737 MAX_BITSIZE_MODE_ANY_INT.
15739 2020-01-24 Andrew Pinski <apinski@marvell.com>
15741 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
15742 alu.shift_reg to 0.
15744 2020-01-24 Jeff Law <law@redhat.com>
15747 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
15748 for REGs. Call output_operand_lossage to get more reasonable
15751 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
15753 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
15754 gcn_fp_compare_operator.
15755 (vec_cmpu<mode>di): Use gcn_compare_operator.
15756 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
15757 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
15758 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
15759 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
15760 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
15761 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
15762 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
15763 gcn_fp_compare_operator.
15764 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
15765 gcn_fp_compare_operator.
15766 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
15767 gcn_fp_compare_operator.
15768 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
15769 gcn_fp_compare_operator.
15771 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
15773 * doc/install.texi (Cross-Compiler-Specific Options): Document
15774 `--with-toolexeclibdir' option.
15776 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
15778 * target.def (flags_regnum): Also mention effect on delay slot filling.
15779 * doc/tm.texi: Regenerate.
15781 2020-01-23 Jeff Law <law@redhat.com>
15783 PR translation/90162
15784 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
15786 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
15789 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
15792 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15794 PR rtl-optimization/93402
15795 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
15798 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15800 * config.in: Regenerated.
15801 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
15802 for TARGET_LIBC_GNUSTACK.
15803 * configure: Regenerated.
15804 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
15805 found to be 2.31 or greater.
15807 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15809 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
15811 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
15812 (mips_asm_file_end): New function. Delegate to
15813 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
15814 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
15816 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15819 * config/i386/i386-modes.def (POImode): New mode.
15820 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
15821 * config/i386/i386.md (DPWI): New mode attribute.
15822 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
15823 (QWI): Rename to...
15824 (QPWI): ... this. Use POI instead of OI for TImode.
15825 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
15826 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
15829 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15832 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
15834 (speculation_tracker_rev): New pattern.
15835 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
15836 Use speculation_tracker_rev to track the inverse condition.
15838 2020-01-23 Richard Biener <rguenther@suse.de>
15840 PR tree-optimization/93381
15841 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
15842 alias-set of the def as argument and record the first one.
15843 (vn_walk_cb_data::first_set): New member.
15844 (vn_reference_lookup_3): Pass the alias-set of the current def
15845 to push_partial_def. Fix alias-set used in the aggregate copy
15847 (vn_reference_lookup): Consistently set *last_vuse_ptr.
15848 * real.c (clear_significand_below): Fix out-of-bound access.
15850 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15853 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
15854 New define_insn patterns.
15856 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15858 * doc/sourcebuild.texi (check-function-bodies): Add an
15859 optional target/xfail selector.
15861 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15863 PR rtl-optimization/93124
15864 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
15865 bare USE and CLOBBER insns.
15867 2020-01-22 Andrew Pinski <apinski@marvell.com>
15869 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
15871 2020-01-22 David Malcolm <dmalcolm@redhat.com>
15874 * gdbinit.in (break-on-saved-diagnostic): Update for move of
15875 diagnostic_manager into "ana" namespace.
15876 * selftest-run-tests.c (selftest::run_tests): Update for move of
15877 selftest::run_analyzer_selftests to
15878 ana::selftest::run_analyzer_selftests.
15880 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
15882 * cfgexpand.c (union_stack_vars): Update the size.
15884 2020-01-22 Richard Biener <rguenther@suse.de>
15886 PR tree-optimization/93381
15887 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
15888 throughout, handle all conversions the same.
15890 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15893 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
15894 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
15895 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
15896 Call force_reg on high_in2 unconditionally.
15898 2020-01-22 Martin Liska <mliska@suse.cz>
15900 PR tree-optimization/92924
15901 * profile.c (compute_value_histograms): Divide
15902 all counter values.
15904 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15907 * output.h (assemble_name_resolve): Declare.
15908 * varasm.c (assemble_name_resolve): New function.
15909 (assemble_name): Use it.
15910 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
15912 2020-01-22 Joseph Myers <joseph@codesourcery.com>
15914 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
15915 update_web_docs_git instead of update_web_docs_svn.
15917 2020-01-21 Andrew Pinski <apinski@marvell.com>
15920 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
15921 as PTR mode. Have operand 1 as being modeless, it can be P mode.
15922 (*tlsgd_small_<mode>): Likewise.
15923 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
15924 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
15925 register. Convert that register back to dest using convert_mode.
15927 2020-01-21 Jim Wilson <jimw@sifive.com>
15929 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
15932 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
15933 Uros Bizjak <ubizjak@gmail.com>
15936 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
15938 (legitimize_tls_address): Do GNU2 TLS address computation in
15939 ptr_mode and zero-extend result to Pmode.
15940 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
15941 :P with :PTR and Pmode with ptr_mode.
15942 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
15943 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
15944 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
15946 2020-01-21 Jakub Jelinek <jakub@redhat.com>
15949 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
15950 the last two operands are CONST_INT_P before using them as such.
15952 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15954 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
15955 to get the integer element types.
15957 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15959 * config/aarch64/aarch64-sve-builtins.h
15960 (function_expander::convert_to_pmode): Declare.
15961 * config/aarch64/aarch64-sve-builtins.cc
15962 (function_expander::convert_to_pmode): New function.
15963 (function_expander::get_contiguous_base): Use it.
15964 (function_expander::prepare_gather_address_operands): Likewise.
15965 * config/aarch64/aarch64-sve-builtins-sve2.cc
15966 (svwhilerw_svwhilewr_impl::expand): Likewise.
15968 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
15971 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
15972 cfun->machine->label_is_assembled.
15973 (aarch64_print_patchable_function_entry): New.
15974 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
15975 * config/aarch64/aarch64.h (struct machine_function): New field,
15976 label_is_assembled.
15978 2020-01-21 David Malcolm <dmalcolm@redhat.com>
15981 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
15984 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
15987 * cgraph.c (cgraph_edge::resolve_speculation,
15988 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
15989 call_stmt_site_hash.
15991 2020-01-21 Martin Liska <mliska@suse.cz>
15993 * config/rs6000/rs6000.c (common_mode_defined): Remove
15996 2020-01-21 Richard Biener <rguenther@suse.de>
15998 PR tree-optimization/92328
15999 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
16000 type when value-numbering same-sized store by inserting a
16002 (eliminate_dom_walker::eliminate_stmt): When eliminating
16003 a redundant store handle bit-reinterpretation of the same value.
16005 2020-01-21 Andrew Pinski <apinski@marvel.com>
16008 * tree-into-ssa.c (prepare_block_for_update_1): Split out
16010 (prepare_block_for_update): This. Use a worklist instead of
16013 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16015 * config/arm/arm.c (clear_operation_p):
16016 Initialise last_regno, skip first iteration
16017 based on the first_set value and use ints instead
16018 of the unnecessary HOST_WIDE_INTs.
16020 2020-01-21 Jakub Jelinek <jakub@redhat.com>
16023 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
16024 compare_mode other than SFmode or DFmode.
16026 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
16029 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
16030 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
16031 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
16033 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
16035 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
16037 2020-01-20 Andrew Pinski <apinski@marvell.com>
16039 PR middle-end/93242
16040 * targhooks.c (default_print_patchable_function_entry): Use
16041 output_asm_insn to emit the nop instruction.
16043 2020-01-20 Fangrui Song <maskray@google.com>
16045 PR middle-end/93194
16046 * targhooks.c (default_print_patchable_function_entry): Align to
16049 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
16052 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
16053 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
16054 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
16055 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
16056 (*tls_dynamic_gnu2_lea_64): Renamed to ...
16057 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
16058 Remove the {q} suffix from lea.
16059 (*tls_dynamic_gnu2_call_64): Renamed to ...
16060 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
16061 (*tls_dynamic_gnu2_combine_64): Renamed to ...
16062 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
16063 Pass Pmode to gen_tls_dynamic_gnu2_64.
16065 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
16067 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
16069 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
16071 * config/aarch64/aarch64-sve-builtins-base.cc
16072 (svld1ro_impl::memory_vector_mode): Remove parameter name.
16074 2020-01-20 Richard Biener <rguenther@suse.de>
16077 * dwarf2out.c (prune_unused_types): Unconditionally mark
16078 called function DIEs.
16080 2020-01-20 Martin Liska <mliska@suse.cz>
16082 PR tree-optimization/93199
16083 * tree-eh.c (struct leh_state): Add
16084 new field outer_non_cleanup.
16085 (cleanup_is_dead_in): Pass leh_state instead
16086 of eh_region. Add a checking that state->outer_non_cleanup
16087 points to outer non-clean up region.
16088 (lower_try_finally): Record outer_non_cleanup
16090 (lower_catch): Likewise.
16091 (lower_eh_filter): Likewise.
16092 (lower_eh_must_not_throw): Likewise.
16093 (lower_cleanup): Likewise.
16095 2020-01-20 Richard Biener <rguenther@suse.de>
16097 PR tree-optimization/93094
16098 * tree-vectorizer.h (vect_loop_versioning): Adjust.
16099 (vect_transform_loop): Likewise.
16100 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
16101 loop_vectorized_call to vect_transform_loop.
16102 * tree-vect-loop.c (vect_transform_loop): Pass down
16103 loop_vectorized_call to vect_loop_versioning.
16104 * tree-vect-loop-manip.c (vect_loop_versioning): Use
16105 the earlier discovered loop_vectorized_call.
16107 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
16109 * doc/contribute.texi: Update for SVN -> Git transition.
16110 * doc/install.texi: Likewise.
16112 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16115 * cgraph.c (cgraph_edge::make_speculative): Increase number of
16116 speculative targets.
16117 (verify_speculative_call): New function
16118 (cgraph_node::verify_node): Use it.
16119 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
16122 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16125 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
16126 (cgraph_edge::make_direct): Remove all indirect targets.
16127 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
16128 (cgraph_node::verify_node): Verify that only one call_stmt or
16129 lto_stmt_uid is set.
16130 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
16132 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
16133 (lto_output_ref): Simplify streaming of stmt.
16134 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
16136 2020-01-18 Tamar Christina <tamar.christina@arm.com>
16138 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
16139 Mark parameter unused.
16141 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
16143 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
16145 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
16147 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
16149 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
16151 * Makefile.in: Add coroutine-passes.o.
16152 * builtin-types.def (BT_CONST_SIZE): New.
16153 (BT_FN_BOOL_PTR): New.
16154 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
16155 * builtins.def (DEF_COROUTINE_BUILTIN): New.
16156 * coroutine-builtins.def: New file.
16157 * coroutine-passes.cc: New file.
16158 * function.h (struct GTY function): Add a bit to indicate that the
16159 function is a coroutine component.
16160 * internal-fn.c (expand_CO_FRAME): New.
16161 (expand_CO_YIELD): New.
16162 (expand_CO_SUSPN): New.
16163 (expand_CO_ACTOR): New.
16164 * internal-fn.def (CO_ACTOR): New.
16168 * passes.def: Add pass_coroutine_lower_builtins,
16169 pass_coroutine_early_expand_ifns.
16170 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
16171 (make_pass_coroutine_early_expand_ifns): New.
16172 * doc/invoke.texi: Document the fcoroutines command line
16175 2020-01-18 Jakub Jelinek <jakub@redhat.com>
16177 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
16180 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
16181 after checking the argument is a REG. Don't use REGNO (reg)
16182 again to set last_regno, reuse regno variable instead.
16184 2020-01-17 David Malcolm <dmalcolm@redhat.com>
16186 * doc/analyzer.texi (Limitations): Add note about NaN.
16188 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16189 Sudakshina Das <sudi.das@arm.com>
16191 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
16192 and valid immediate.
16193 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
16194 (lshrdi3): Generate thumb2_lsrl for valid immediates.
16195 * config/arm/constraints.md (Pg): New.
16196 * config/arm/predicates.md (long_shift_imm): New.
16197 (arm_reg_or_long_shift_imm): Likewise.
16198 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
16199 (thumb2_lsll): Likewise.
16200 (thumb2_lsrl): New.
16202 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16203 Sudakshina Das <sudi.das@arm.com>
16205 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
16206 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
16207 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
16208 register pairs for doubleword quantities for ARMv8.1M-Mainline.
16209 * config/arm/thumb2.md (thumb2_asrl): New.
16210 (thumb2_lsll): Likewise.
16212 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16214 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
16217 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
16219 * gdbinit.in (help-gcc-hooks): New command.
16220 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
16221 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
16224 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16226 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
16227 correct target macro.
16229 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16231 * config/aarch64/aarch64-protos.h
16232 (aarch64_sve_ld1ro_operand_p): New.
16233 * config/aarch64/aarch64-sve-builtins-base.cc
16234 (class load_replicate): New.
16235 (class svld1ro_impl): New.
16236 (class svld1rq_impl): Change to inherit from load_replicate.
16237 (svld1ro): New sve intrinsic function base.
16238 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
16239 New DEF_SVE_FUNCTION.
16240 * config/aarch64/aarch64-sve-builtins-base.h
16241 (svld1ro): New decl.
16242 * config/aarch64/aarch64-sve-builtins.cc
16243 (function_expander::add_mem_operand): Modify assert to allow
16245 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
16247 * config/aarch64/aarch64.c
16248 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
16249 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
16250 (aarch64_sve_ld1ro_operand_p): New.
16251 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
16252 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
16253 * config/aarch64/predicates.md
16254 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
16256 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16258 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
16259 Introduce this ACLE specified predefined macro.
16260 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
16261 (fp): Disabling this disables f64mm.
16262 (simd): Disabling this disables f64mm.
16263 (fp16): Disabling this disables f64mm.
16264 (sve): Disabling this disables f64mm.
16265 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
16266 (AARCH64_ISA_F64MM): New.
16267 (TARGET_F64MM): New.
16268 * doc/invoke.texi (f64mm): Document new option.
16270 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16272 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
16273 (neoversen1_tunings): Likewise.
16275 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16278 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
16279 Add assert to ensure prolog has been emitted.
16280 (aarch64_split_atomic_op): Likewise.
16281 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
16282 Use epilogue_completed rather than reload_completed.
16283 (aarch64_atomic_exchange<mode>): Likewise.
16284 (aarch64_atomic_<atomic_optab><mode>): Likewise.
16285 (atomic_nand<mode>): Likewise.
16286 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
16287 (atomic_fetch_nand<mode>): Likewise.
16288 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
16289 (atomic_nand_fetch<mode>): Likewise.
16291 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16294 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
16296 (REVERSE_CONDITION): Delete.
16297 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
16298 (CCFP_CCFPE): Likewise.
16299 (e): New mode attribute.
16300 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
16301 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
16302 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
16303 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
16304 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
16305 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
16306 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
16307 name of generator from gen_ccmpdi to gen_ccmpccdi.
16308 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
16309 the previous comparison but aren't able to, use the new ccmp_rev
16312 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16314 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
16315 than testing directly for INTEGER_CST.
16316 (gimplify_target_expr, gimplify_omp_depend): Likewise.
16318 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16320 PR tree-optimization/93292
16321 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
16322 get_vectype_for_scalar_type returns NULL.
16324 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16326 * params.opt (-param=max-predicted-iterations): Increase range from 0.
16327 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
16329 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16331 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
16333 * params.opt: (max-predicted-iterations): Set bounds.
16334 * predict.c (real_almost_one, real_br_prob_base,
16335 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
16336 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
16337 probabilities; do not truncate to reg_br_prob_bases.
16338 (estimate_loops_at_level): Pass max_cyclic_prob.
16339 (estimate_loops): Compute max_cyclic_prob.
16340 (estimate_bb_frequencies): Do not initialize real_*; update calculation
16342 * profile-count.c (profile_probability::to_sreal): New.
16343 * profile-count.h (class sreal): Move up in file.
16344 (profile_probability::to_sreal): Declare.
16346 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16349 (arm_invalid_conversion): New function for target hook.
16350 (arm_invalid_unary_op): New function for target hook.
16351 (arm_invalid_binary_op): New function for target hook.
16353 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16355 * config.gcc: Add arm_bf16.h.
16356 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
16357 (arm_simd_builtin_std_type): Add BFmode.
16358 (arm_init_simd_builtin_types): Define element types for vector types.
16359 (arm_init_bf16_types): New function.
16360 (arm_init_builtins): Add arm_init_bf16_types function call.
16361 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
16362 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
16363 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
16364 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
16365 (arm_vector_mode_supported_p): Add V4BF, V8BF.
16366 (arm_mangle_type): Add __bf16.
16367 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
16368 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
16369 arm_bf16_ptr_type_node.
16370 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
16371 define_split between ARM registers.
16372 * config/arm/arm_bf16.h: New file.
16373 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
16374 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
16375 (VQXMOV): Add V8BF.
16376 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
16377 * config/arm/vfp.md: Add BFmode to movhf patterns.
16379 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
16380 Andre Vieira <andre.simoesdiasvieira@arm.com>
16382 * config/arm/arm-cpus.in (mve, mve_float): New features.
16383 (dsp, mve, mve.fp): New options.
16384 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
16385 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
16386 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
16388 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16389 Thomas Preud'homme <thomas.preudhomme@arm.com>
16391 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
16393 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
16394 error for using -mcmse when targeting Armv8.1-M Mainline.
16396 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16397 Thomas Preud'homme <thomas.preudhomme@arm.com>
16399 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
16400 address in r4 when targeting Armv8.1-M Mainline.
16401 (nonsecure_call_value_internal): Likewise.
16402 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
16403 a register match_operand again. Emit BLXNS when targeting
16404 Armv8.1-M Mainline.
16405 (nonsecure_call_value_reg_thumb2): Likewise.
16407 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16408 Thomas Preud'homme <thomas.preudhomme@arm.com>
16410 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
16411 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
16412 variable as true when floating-point ABI is not hard. Replace
16413 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
16414 Generate VLSTM and VLLDM instruction respectively before and
16415 after a function call to cmse_nonsecure_call function.
16416 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
16417 (VUNSPEC_VLLDM): Likewise.
16418 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
16419 (lazy_load_multiple_insn): Likewise.
16421 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16422 Thomas Preud'homme <thomas.preudhomme@arm.com>
16424 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
16425 (arm_emit_vfp_multi_reg_pop): Likewise.
16426 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
16427 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
16428 restore callee-saved VFP registers.
16430 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16431 Thomas Preud'homme <thomas.preudhomme@arm.com>
16433 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
16434 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
16435 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
16436 callee-saved GPRs as well as clear ip register before doing a nonsecure
16437 call then restore callee-saved GPRs after it when targeting
16438 Armv8.1-M Mainline.
16439 (arm_reorg): Adapt to function rename.
16441 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16442 Thomas Preud'homme <thomas.preudhomme@arm.com>
16444 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
16445 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
16446 clear_vfp_multiple pattern based on a new vfp parameter.
16447 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
16448 targeting Armv8.1-M Mainline.
16449 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
16450 unconditionally when targeting Armv8.1-M Mainline architecture. Check
16451 whether VFP registers are available before looking call_used_regs for a
16453 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
16454 of prototype of clear_operation_p.
16455 (clear_vfp_multiple_operation): New predicate.
16456 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
16457 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
16459 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16460 Thomas Preud'homme <thomas.preudhomme@arm.com>
16462 * config/arm/arm-protos.h (clear_operation_p): Declare.
16463 * config/arm/arm.c (clear_operation_p): New function.
16464 (cmse_clear_registers): Generate clear_multiple instruction pattern if
16465 targeting Armv8.1-M Mainline or successor.
16466 (output_return_instruction): Only output APSR register clearing if
16467 Armv8.1-M Mainline instructions not available.
16468 (thumb_exit): Likewise.
16469 * config/arm/predicates.md (clear_multiple_operation): New predicate.
16470 * config/arm/thumb2.md (clear_apsr): New define_insn.
16471 (clear_multiple): Likewise.
16472 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
16474 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16475 Thomas Preud'homme <thomas.preudhomme@arm.com>
16477 * config/arm/arm.c (fp_sysreg_names): Declare and define.
16478 (use_return_insn): Also return false for Armv8.1-M Mainline.
16479 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
16480 Mainline instructions are available.
16481 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
16482 when targeting Armv8.1-M Mainline Security Extensions.
16483 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
16484 Mainline entry function.
16485 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
16486 targeting Armv8.1-M Mainline or successor.
16487 (arm_expand_epilogue): Fix indentation of caller-saved register
16488 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
16490 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
16491 (FP_SYSREGS): Likewise.
16492 (enum vfp_sysregs_encoding): Define enum.
16493 (fp_sysreg_names): Declare.
16494 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
16495 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
16496 (pop_fpsysreg_insn): Likewise.
16498 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16499 Thomas Preud'homme <thomas.preudhomme@arm.com>
16501 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
16502 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
16503 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
16504 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
16505 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
16506 (ARMv8_1m_main): New feature group.
16507 (armv8.1-m.main): New architecture.
16508 * config/arm/arm-tables.opt: Regenerate.
16509 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
16510 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
16511 (arm_options_perform_arch_sanity_checks): Error out when targeting
16512 Armv8.1-M Mainline Security Extensions.
16513 * config/arm/arm.h (arm_arch8_1m_main): Declare.
16515 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16517 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
16518 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
16519 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
16520 aarch64_bfdot_laneq): New.
16521 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
16522 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
16523 vbfdotq_laneq_f32): New.
16524 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
16525 VBFMLA_W, VBF): New.
16526 (isquadop): Add V4BF, V8BF.
16528 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16530 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
16531 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
16532 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
16533 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
16534 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
16535 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
16536 usdot_laneq, sudot_lane,sudot_laneq): New.
16537 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
16538 (aarch64_<sur>dot_lane): New.
16539 * config/aarch64/arm_neon.h (vusdot_s32): New.
16540 (vusdotq_s32): New.
16541 (vusdot_lane_s32): New.
16542 (vsudot_lane_s32): New.
16543 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
16544 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
16546 2020-01-16 Martin Liska <mliska@suse.cz>
16548 * value-prof.c (dump_histogram_value): Fix
16549 obvious spacing issue.
16551 2020-01-16 Andrew Pinski <apinski@marvell.com>
16553 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
16554 !storage_order_barrier_p.
16556 2020-01-16 Andrew Pinski <apinski@marvell.com>
16558 * sched-int.h (_dep): Add unused bit-field field for the padding.
16559 * sched-deps.c (init_dep_1): Init unused field.
16561 2020-01-16 Andrew Pinski <apinski@marvell.com>
16563 * optabs.h (create_expand_operand): Initialize target field also.
16565 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16567 PR tree-optimization/92429
16568 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
16569 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
16571 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
16574 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
16576 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
16577 aarch64_sve_int_mode to each mode.
16579 2020-01-15 David Malcolm <dmalcolm@redhat.com>
16581 * doc/analyzer.texi (Overview): Add note about
16582 -fdump-ipa-analyzer.
16584 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
16586 PR tree-optimization/93231
16587 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
16588 input_type is unsigned. Use tree_to_shwi for shift constant.
16589 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
16590 (simplify_count_trailing_zeroes): Add test to handle known non-zero
16591 inputs more efficiently.
16593 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
16595 * config/i386/i386.md (*movsf_internal): Do not require
16596 SSE2 ISA for alternatives 14 and 15.
16598 2020-01-15 Richard Biener <rguenther@suse.de>
16600 PR middle-end/93273
16601 * tree-eh.c (sink_clobbers): If we already visited the destination
16602 block do not defer insertion.
16603 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
16604 the purpose of defered insertion.
16606 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16608 * BASE-VER: Bump to 10.0.1.
16610 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16612 PR tree-optimization/93247
16613 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
16614 type of the stmt that we're going to vectorize.
16616 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16618 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
16619 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
16622 2020-01-15 Martin Liska <mliska@suse.cz>
16624 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
16625 2 calls of streamer_read_hwi in a function call.
16627 2020-01-15 Richard Biener <rguenther@suse.de>
16629 * alias.c (record_alias_subset): Avoid redundant work when
16630 subset is already recorded.
16632 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16634 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
16635 the analyzer options provide CWE identifiers.
16637 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16639 * tree-diagnostic-path.cc (path_summary::event_range::print):
16640 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
16641 using get_pure_location.
16643 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16645 PR tree-optimization/93262
16646 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
16647 perform head trimming only if the last argument is constant,
16648 either all ones, or larger or equal to head trim, in the latter
16649 case decrease the last argument by head_trim.
16651 PR tree-optimization/93249
16652 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
16653 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
16654 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
16655 perform head trim unless we can prove there are no '\0' chars
16656 from the source among the first head_trim chars.
16658 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16660 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
16662 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16665 * config/i386/sse.md
16666 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
16667 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
16668 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
16669 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
16670 just a single alternative instead of two, make operands 1 and 2
16673 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
16676 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
16679 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16681 * Makefile.in (lang_opt_files): Add analyzer.opt.
16682 (ANALYZER_OBJS): New.
16683 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
16684 tristate.o and ANALYZER_OBJS.
16685 (TEXI_GCCINT_FILES): Add analyzer.texi.
16686 * common.opt (-fanalyzer): New driver option.
16687 * config.in: Regenerate.
16688 * configure: Regenerate.
16689 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
16690 (gccdepdir): Also create depdir for "analyzer" subdir.
16691 * digraph.cc: New file.
16692 * digraph.h: New file.
16693 * doc/analyzer.texi: New file.
16694 * doc/gccint.texi ("Static Analyzer") New menu item.
16695 (analyzer.texi): Include it.
16696 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
16697 ("Warning Options"): Add static analysis warnings to the list.
16698 (-Wno-analyzer-double-fclose): New option.
16699 (-Wno-analyzer-double-free): New option.
16700 (-Wno-analyzer-exposure-through-output-file): New option.
16701 (-Wno-analyzer-file-leak): New option.
16702 (-Wno-analyzer-free-of-non-heap): New option.
16703 (-Wno-analyzer-malloc-leak): New option.
16704 (-Wno-analyzer-possible-null-argument): New option.
16705 (-Wno-analyzer-possible-null-dereference): New option.
16706 (-Wno-analyzer-null-argument): New option.
16707 (-Wno-analyzer-null-dereference): New option.
16708 (-Wno-analyzer-stale-setjmp-buffer): New option.
16709 (-Wno-analyzer-tainted-array-index): New option.
16710 (-Wno-analyzer-use-after-free): New option.
16711 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
16712 (-Wno-analyzer-use-of-uninitialized-value): New option.
16713 (-Wanalyzer-too-complex): New option.
16714 (-fanalyzer-call-summaries): New warning.
16715 (-fanalyzer-checker=): New warning.
16716 (-fanalyzer-fine-grained): New warning.
16717 (-fno-analyzer-state-merge): New warning.
16718 (-fno-analyzer-state-purge): New warning.
16719 (-fanalyzer-transitivity): New warning.
16720 (-fanalyzer-verbose-edges): New warning.
16721 (-fanalyzer-verbose-state-changes): New warning.
16722 (-fanalyzer-verbosity=): New warning.
16723 (-fdump-analyzer): New warning.
16724 (-fdump-analyzer-callgraph): New warning.
16725 (-fdump-analyzer-exploded-graph): New warning.
16726 (-fdump-analyzer-exploded-nodes): New warning.
16727 (-fdump-analyzer-exploded-nodes-2): New warning.
16728 (-fdump-analyzer-exploded-nodes-3): New warning.
16729 (-fdump-analyzer-supergraph): New warning.
16730 * doc/sourcebuild.texi (dg-require-dot): New.
16731 (dg-check-dot): New.
16732 * gdbinit.in (break-on-saved-diagnostic): New command.
16733 * graphviz.cc: New file.
16734 * graphviz.h: New file.
16735 * ordered-hash-map-tests.cc: New file.
16736 * ordered-hash-map.h: New file.
16737 * passes.def (pass_analyzer): Add before
16738 pass_ipa_whole_program_visibility.
16739 * selftest-run-tests.c (selftest::run_tests): Call
16740 selftest::ordered_hash_map_tests_cc_tests.
16741 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
16743 * shortest-paths.h: New file.
16744 * timevar.def (TV_ANALYZER): New timevar.
16745 (TV_ANALYZER_SUPERGRAPH): Likewise.
16746 (TV_ANALYZER_STATE_PURGE): Likewise.
16747 (TV_ANALYZER_PLAN): Likewise.
16748 (TV_ANALYZER_SCC): Likewise.
16749 (TV_ANALYZER_WORKLIST): Likewise.
16750 (TV_ANALYZER_DUMP): Likewise.
16751 (TV_ANALYZER_DIAGNOSTICS): Likewise.
16752 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
16753 * tree-pass.h (make_pass_analyzer): New decl.
16754 * tristate.cc: New file.
16755 * tristate.h: New file.
16757 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
16760 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
16761 alternatives 9 and 10.
16763 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16765 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
16766 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
16767 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
16768 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
16769 (selftest::hash_map_tests_c_tests): Call it.
16770 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
16771 New static constant, using the value of = H::empty_zero_p.
16772 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
16773 from default_hash_traits <Value>.
16774 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
16776 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
16777 * hash-table.h (hash_table::alloc_entries): Guard the loop of
16778 calls to mark_empty with !Descriptor::empty_zero_p.
16779 (hash_table::empty_slow): Conditionalize the memset call with a
16780 check that Descriptor::empty_zero_p; otherwise, loop through the
16781 entries calling mark_empty on them.
16782 * hash-traits.h (int_hash::empty_zero_p): New static constant.
16783 (pointer_hash::empty_zero_p): Likewise.
16784 (pair_hash::empty_zero_p): Likewise.
16785 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
16787 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
16788 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
16789 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
16790 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
16791 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
16792 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
16793 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
16794 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
16795 * tree-vectorizer.h
16796 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
16799 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
16801 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
16802 fix typo on return value.
16804 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
16807 * cgraph.c (symbol_table::create_edge): Init speculative_id and
16809 (cgraph_edge::make_speculative): Add param for setting speculative_id
16811 (cgraph_edge::speculative_call_info): Update comments and find reference
16812 by speculative_id for multiple indirect targets.
16813 (cgraph_edge::resolve_speculation): Decrease the speculations
16814 for indirect edge, drop it's speculative if not direct target
16815 left. Update comments.
16816 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
16817 (cgraph_node::dump): Print num_speculative_call_targets.
16818 (cgraph_node::verify_node): Don't report error if speculative
16819 edge not include statement.
16820 (cgraph_edge::num_speculative_call_targets_p): New function.
16821 * cgraph.h (int common_target_id): Remove.
16822 (int common_target_probability): Remove.
16823 (num_speculative_call_targets): New variable.
16824 (make_speculative): Add param for setting speculative_id.
16825 (cgraph_edge::num_speculative_call_targets_p): New declare.
16826 (target_prob): New variable.
16827 (speculative_id): New variable.
16828 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
16829 call summaries for multiple speculative call targets.
16830 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
16831 * ipa-profile.c (struct speculative_call_target): New struct.
16832 (class speculative_call_summary): New class.
16833 (class speculative_call_summaries): New class.
16834 (call_sums): New variable.
16835 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
16836 (ipa_profile_write_edge_summary): New function.
16837 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
16838 (ipa_profile_dump_all_summaries): New function.
16839 (ipa_profile_read_edge_summary): New function.
16840 (ipa_profile_read_summary_section): New function.
16841 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
16842 (ipa_profile): Generate num_speculative_call_targets from
16844 * ipa-ref.h (speculative_id): New variable.
16845 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
16846 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
16847 common_target_probability. Stream out speculative_id and
16848 num_speculative_call_targets.
16849 (input_edge): Likewise.
16850 * predict.c (dump_prediction): Remove edges count assert to be
16852 * symtab.c (symtab_node::create_reference): Init speculative_id.
16853 (symtab_node::clone_references): Clone speculative_id.
16854 (symtab_node::clone_referring): Clone speculative_id.
16855 (symtab_node::clone_reference): Clone speculative_id.
16856 (symtab_node::clear_stmts_in_references): Clear speculative_id.
16857 * tree-inline.c (copy_bb): Duplicate all the speculative edges
16858 if indirect call contains multiple speculative targets.
16859 * value-prof.h (check_ic_target): Remove.
16860 * value-prof.c (gimple_value_profile_transformations):
16861 Use void function gimple_ic_transform.
16862 * value-prof.c (gimple_ic_transform): Handle topn case.
16863 Fix comment typos. Change it to a void function.
16865 2020-01-13 Andrew Pinski <apinski@marvell.com>
16867 * config/aarch64/aarch64-cores.def (octeontx2): New define.
16868 (octeontx2t98): New define.
16869 (octeontx2t96): New define.
16870 (octeontx2t93): New define.
16871 (octeontx2f95): New define.
16872 (octeontx2f95n): New define.
16873 (octeontx2f95mm): New define.
16874 * config/aarch64/aarch64-tune.md: Regenerate.
16875 * doc/invoke.texi (-mcpu=): Document the new cpu types.
16877 2020-01-13 Jason Merrill <jason@redhat.com>
16879 PR c++/33799 - destroy return value if local cleanup throws.
16880 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
16882 2020-01-13 Martin Liska <mliska@suse.cz>
16884 * ipa-cp.c (get_max_overall_size): Use newly
16885 renamed param param_ipa_cp_unit_growth.
16886 * params.opt: Remove legacy param name.
16888 2020-01-13 Martin Sebor <msebor@redhat.com>
16890 PR tree-optimization/93213
16891 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
16892 stores to be eliminated.
16894 2020-01-13 Martin Liska <mliska@suse.cz>
16896 * opts.c (print_help): Do not print CL_PARAM
16897 and CL_WARNING for CL_OPTIMIZATION.
16899 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
16902 * doc/invoke.texi (Warning Options): Add caveat about some warnings
16903 depending on optimization settings.
16905 2020-01-13 Jakub Jelinek <jakub@redhat.com>
16907 PR tree-optimization/90838
16908 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
16909 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
16910 argument rather than to initialize temporary for targets that
16911 don't use the mode argument at all. Initialize ctzval to avoid
16914 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
16916 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
16917 * tree-core.h: Document it.
16918 * gimplify.c (gimplify_omp_workshare): Set it.
16919 * omp-low.c (lower_omp_target): Use it.
16920 * tree-pretty-print.c (dump_omp_clause): Print it.
16922 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
16923 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
16925 2020-01-10 David Malcolm <dmalcolm@redhat.com>
16927 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
16928 * common.opt (fdiagnostics-path-format=): New option.
16929 (diagnostic_path_format): New enum.
16930 (fdiagnostics-show-path-depths): New option.
16931 * coretypes.h (diagnostic_event_id_t): New forward decl.
16932 * diagnostic-color.c (color_dict): Add "path".
16933 * diagnostic-event-id.h: New file.
16934 * diagnostic-format-json.cc (json_from_expanded_location): Make
16936 (json_end_diagnostic): Call context->make_json_for_path if it
16937 exists and the diagnostic has a path.
16938 (diagnostic_output_format_init): Clear context->print_path.
16939 * diagnostic-path.h: New file.
16940 * diagnostic-show-locus.c (colorizer::set_range): Special-case
16941 when printing a run of events in a diagnostic_path so that they
16942 all get the same color.
16943 (layout::m_diagnostic_path_p): New field.
16944 (layout::layout): Initialize it.
16945 (layout::print_any_labels): Don't colorize the label text for an
16946 event in a diagnostic_path.
16947 (gcc_rich_location::add_location_if_nearby): Add
16948 "restrict_to_current_line_spans" and "label" params. Pass the
16949 former to layout.maybe_add_location_range; pass the latter
16950 when calling add_range.
16951 * diagnostic.c: Include "diagnostic-path.h".
16952 (diagnostic_initialize): Initialize context->path_format and
16953 context->show_path_depths.
16954 (diagnostic_show_any_path): New function.
16955 (diagnostic_path::interprocedural_p): New function.
16956 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
16957 (simple_diagnostic_path::num_events): New function.
16958 (simple_diagnostic_path::get_event): New function.
16959 (simple_diagnostic_path::add_event): New function.
16960 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
16961 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
16962 (debug): New overload taking a diagnostic_path *.
16963 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
16964 * diagnostic.h (enum diagnostic_path_format): New enum.
16965 (json::value): New forward decl.
16966 (diagnostic_context::path_format): New field.
16967 (diagnostic_context::show_path_depths): New field.
16968 (diagnostic_context::print_path): New callback field.
16969 (diagnostic_context::make_json_for_path): New callback field.
16970 (diagnostic_show_any_path): New decl.
16971 (json_from_expanded_location): New decl.
16972 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
16973 (-fdiagnostics-show-path-depths): New option.
16974 (-fdiagnostics-color): Add "path" to description of default
16975 GCC_COLORS; describe it.
16976 (-fdiagnostics-format=json): Document how diagnostic paths are
16977 represented in the JSON output format.
16978 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
16979 Add optional params "restrict_to_current_line_spans" and "label".
16980 * opts.c (common_handle_option): Handle
16981 OPT_fdiagnostics_path_format_ and
16982 OPT_fdiagnostics_show_path_depths.
16983 * pretty-print.c: Include "diagnostic-event-id.h".
16984 (pp_format): Implement "%@" format code for printing
16985 diagnostic_event_id_t *.
16986 (selftest::test_pp_format): Add tests for "%@".
16987 * selftest-run-tests.c (selftest::run_tests): Call
16988 selftest::tree_diagnostic_path_cc_tests.
16989 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
16990 * toplev.c (general_init): Initialize global_dc->path_format and
16991 global_dc->show_path_depths.
16992 * tree-diagnostic-path.cc: New file.
16993 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
16994 non-static. Drop "diagnostic" param in favor of storing the
16995 original value of "where" and re-using it.
16996 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
16997 maybe_unwind_expanded_macro_loc.
16998 (tree_diagnostics_defaults): Initialize context->print_path and
16999 context->make_json_for_path.
17000 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
17002 (default_tree_make_json_for_path): New decl.
17003 (maybe_unwind_expanded_macro_loc): New decl.
17005 2020-01-10 Jakub Jelinek <jakub@redhat.com>
17007 PR tree-optimization/93210
17008 * fold-const.h (native_encode_initializer,
17009 can_native_interpret_type_p): Declare.
17010 * fold-const.c (native_encode_string): Fix up handling with off != -1,
17012 (native_encode_initializer): New function, moved from dwarf2out.c.
17013 Adjust to native_encode_expr compatible arguments, including dry-run
17014 and partial extraction modes. Don't handle STRING_CST.
17015 (can_native_interpret_type_p): No longer static.
17016 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
17017 offset / BITS_PER_UNIT fits into int and don't call it if
17018 can_native_interpret_type_p fails. If suboff is NULL and for
17019 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
17020 native_encode_initializer.
17021 (fold_const_aggregate_ref_1): Formatting fix.
17022 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
17023 (tree_add_const_value_attribute): Adjust caller.
17025 PR tree-optimization/90838
17026 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
17027 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
17028 CTZ_DEFINED_VALUE_AT_ZERO.
17030 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
17032 PR inline-asm/93027
17033 * lra-constraints.c (match_reload): Permit input operands have the
17034 same mode as output while other input operands have a different
17037 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
17039 PR tree-optimization/90838
17040 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
17041 (check_ctz_string): Likewise.
17042 (optimize_count_trailing_zeroes): Likewise.
17043 (simplify_count_trailing_zeroes): Likewise.
17044 (pass_forwprop::execute): Try ctz simplification.
17045 * match.pd: Add matching for ctz idioms.
17047 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17049 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
17051 (aarch64_invalid_unary_op): New function for target hook.
17052 (aarch64_invalid_binary_op): New function for target hook.
17054 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17056 * config.gcc: Add arm_bf16.h.
17057 * config/aarch64/aarch64-builtins.c
17058 (aarch64_simd_builtin_std_type): Add BFmode.
17059 (aarch64_init_simd_builtin_types): Define element types for vector
17061 (aarch64_init_bf16_types): New function.
17062 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
17063 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
17065 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
17066 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
17068 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
17069 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
17070 * config/aarch64/aarch64.c
17071 (aarch64_classify_vector_mode): Add support for BF types.
17072 (aarch64_gimplify_va_arg_expr): Add support for BF types.
17073 (aarch64_vq_mode): Add support for BF types.
17074 (aarch64_simd_container_mode): Add support for BF types.
17075 (aarch64_mangle_type): Add support for BF scalar type.
17076 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
17077 * config/aarch64/arm_bf16.h: New file.
17078 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
17079 * config/aarch64/iterators.md: Add BF types to mode attributes.
17080 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
17082 2020-01-10 Jason Merrill <jason@redhat.com>
17084 PR c++/93173 - incorrect tree sharing.
17085 * gimplify.c (copy_if_shared): No longer static.
17086 * gimplify.h: Declare it.
17088 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17090 * doc/invoke.texi (-msve-vector-bits=): Document that
17091 -msve-vector-bits=128 now generates VL-specific code for
17092 little-endian targets.
17093 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
17094 build_vector_type_for_mode to construct the data vector types.
17095 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
17096 VL-specific code for -msve-vector-bits=128 on little-endian targets.
17097 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
17098 for 128-bit vectors.
17100 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17102 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
17105 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17107 * config/aarch64/aarch64-builtins.c
17108 (aarch64_builtin_vectorized_function): Check for specific vector modes,
17109 rather than checking the number of elements and the element mode.
17111 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17113 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
17114 get_related_vectype_for_scalar_type rather than build_vector_type
17115 to create the index type for a conditional reduction.
17117 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17119 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
17120 for any type of gather or scatter, including strided accesses.
17122 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17124 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
17127 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17129 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
17130 get_dr_vinfo_offset
17131 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
17132 parameter and its use to reset DR_OFFSET's.
17133 (vect_transform_loop): Remove orig_drs_init argument.
17134 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
17135 member of dr_vec_info rather than the offset of the associated
17136 data_reference's innermost_loop_behavior.
17137 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
17138 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
17139 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
17140 get_dr_vinfo_offset.
17141 (vectorizable_store): Likewise.
17142 (vectorizable_load): Likewise.
17144 2020-01-10 Richard Biener <rguenther@suse.de>
17146 * gimple-ssa-store-merging
17147 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
17149 2020-01-10 Martin Liska <mliska@suse.cz>
17152 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
17153 encapsulation that was there before r280040.
17155 2020-01-10 Richard Biener <rguenther@suse.de>
17157 PR middle-end/93199
17158 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
17159 sequences to avoid walking them again for secondary opportunities.
17160 (pass_lower_eh_dispatch::execute): Instead actually insert
17163 2020-01-10 Richard Biener <rguenther@suse.de>
17165 PR middle-end/93199
17166 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
17167 (cleanup_all_empty_eh): Walk landing pads in reverse order to
17168 avoid quadraticness.
17170 2020-01-10 Martin Jambor <mjambor@suse.cz>
17172 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
17173 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
17174 to get param_ipa_sra_max_replacements.
17175 (param_splitting_across_edge): Pass the caller to
17176 pull_accesses_from_callee.
17178 2020-01-10 Martin Jambor <mjambor@suse.cz>
17180 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
17181 * ipa-cp.c (max_new_size): Removed.
17182 (orig_overall_size): New variable.
17183 (get_max_overall_size): New function.
17184 (estimate_local_effects): Use it. Adjust dump.
17185 (decide_about_value): Likewise.
17186 (ipcp_propagate_stage): Do not calculate max_new_size, just store
17187 orig_overall_size. Adjust dump.
17188 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
17190 2020-01-10 Martin Jambor <mjambor@suse.cz>
17192 * params.opt (param_ipa_max_agg_items): Mark as Optimization
17193 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
17194 instead of param_ipa_max_agg_items.
17195 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
17196 optimization info for the callee.
17198 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
17200 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
17201 markers if debug_inline_points is false.
17203 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17205 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
17207 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
17208 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
17209 aarch64-sve-builtins-sve2.h.
17210 (aarch64-sve-builtins-sve2.o): New rule.
17211 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
17212 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
17213 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
17214 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
17215 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
17216 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
17218 * config/aarch64/aarch64-sve.md: Update comments with SVE2
17219 instructions that are handled here.
17220 (@cond_asrd<mode>): Generalize to...
17221 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
17222 (*cond_asrd<mode>_2): Generalize to...
17223 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
17224 (*cond_asrd<mode>_z): Generalize to...
17225 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
17226 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
17227 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
17228 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
17229 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
17231 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17232 (@aarch64_scatter_stnt<mode>): Likewise.
17233 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17234 (@aarch64_mul_lane_<mode>): Likewise.
17235 (@aarch64_sve_suqadd<mode>_const): Likewise.
17236 (*<sur>h<addsub><mode>): Generalize to...
17237 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
17239 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
17240 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
17241 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
17242 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
17243 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
17244 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
17245 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
17246 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
17247 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
17248 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
17249 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
17250 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
17251 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
17252 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
17253 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
17254 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
17255 (@aarch64_sve2_xar<mode>): Likewise.
17256 (@aarch64_sve2_bcax<mode>): Likewise.
17257 (*aarch64_sve2_eor3<mode>): Rename to...
17258 (@aarch64_sve2_eor3<mode>): ...this.
17259 (@aarch64_sve2_bsl<mode>): New expander.
17260 (@aarch64_sve2_nbsl<mode>): Likewise.
17261 (@aarch64_sve2_bsl1n<mode>): Likewise.
17262 (@aarch64_sve2_bsl2n<mode>): Likewise.
17263 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
17264 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
17265 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
17266 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
17267 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
17268 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
17269 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
17270 (<su>mull<bt><Vwide>): Generalize to...
17271 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
17273 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
17274 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
17275 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
17276 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17277 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
17278 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17279 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
17280 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17281 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
17282 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17283 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
17284 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
17285 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
17286 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
17287 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
17288 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
17289 (<SHRNB:r>shrnb<mode>): Generalize to...
17290 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
17292 (<SHRNT:r>shrnt<mode>): Generalize to...
17293 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
17295 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
17296 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
17297 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
17298 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
17299 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
17300 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
17301 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
17302 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
17303 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
17304 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
17305 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
17306 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
17307 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
17308 (@aarch64_sve2_cvtnt<mode>): Likewise.
17309 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
17310 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
17311 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
17312 (@aarch64_sve2_cvtxnt<mode>): Likewise.
17313 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
17314 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
17315 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
17316 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
17317 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
17318 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
17319 (@aarch64_sve2_pmul<mode>): Likewise.
17320 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
17321 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
17322 (@aarch64_sve2_tbl2<mode>): Likewise.
17323 (@aarch64_sve2_tbx<mode>): Likewise.
17324 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
17325 (@aarch64_sve2_histcnt<mode>): Likewise.
17326 (@aarch64_sve2_histseg<mode>): Likewise.
17327 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
17328 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
17329 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
17330 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
17331 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
17332 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
17333 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
17334 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
17335 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
17336 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
17337 (SVE2_PMULL_PAIR_I): New mode iterators.
17338 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
17339 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
17340 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
17341 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
17342 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
17343 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
17344 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
17345 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
17346 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
17347 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
17348 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
17349 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
17350 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
17351 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
17352 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
17353 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
17354 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
17355 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
17356 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
17357 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
17358 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
17359 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
17360 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
17361 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
17362 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
17363 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
17364 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
17365 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
17366 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
17367 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
17368 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
17370 (VNARROW, Ventype): New mode attributes.
17371 (Vewtype): Handle VNx2DI. Fix typo in comment.
17372 (VDOUBLE): New mode attribute.
17373 (sve_lane_con): Handle VNx8HI.
17374 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
17375 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
17376 (sve_int_op, sve_int_op_rev): Handle the above codes.
17377 (sve_pred_int_rhs2_operand): Likewise.
17378 (MULLBT, SHRNB, SHRNT): Delete.
17379 (SVE_INT_SHIFT_IMM): New int iterator.
17380 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
17381 and UNSPEC_WHILEHS for TARGET_SVE2.
17382 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
17383 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
17384 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
17385 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
17386 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
17387 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
17388 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
17389 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
17390 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
17391 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
17392 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
17393 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
17394 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
17395 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
17396 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
17397 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
17398 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
17399 (optab): Handle the new unspecs.
17400 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
17402 (lr): Handle the new unspecs.
17404 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
17405 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
17406 (sve_int_qsub_op): New int attributes.
17407 (sve_fp_op, rot): Handle the new unspecs.
17408 * config/aarch64/aarch64-sve-builtins.h
17409 (function_resolver::require_matching_pointer_type): Declare.
17410 (function_resolver::resolve_unary): Add an optional boolean argument.
17411 (function_resolver::finish_opt_n_resolution): Add an optional
17412 type_suffix_index argument.
17413 (gimple_folder::redirect_call): Declare.
17414 (gimple_expander::prepare_gather_address_operands): Add an optional
17416 * config/aarch64/aarch64-sve-builtins.cc: Include
17417 aarch64-sve-builtins-sve2.h.
17418 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
17419 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
17420 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
17421 (TYPES_hsd_integer): Use TYPES_hsd_signed.
17422 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
17423 (TYPES_s_unsigned): Likewise.
17424 (TYPES_s_integer): Use TYPES_s_unsigned.
17425 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
17426 (TYPES_sd_integer): Use them.
17427 (TYPES_d_unsigned): New macro.
17428 (TYPES_d_integer): Use it.
17429 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
17430 (TYPES_cvt_narrow): Likewise.
17431 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
17432 (preds_mx): New variable.
17433 (function_builder::add_overloaded_function): Allow the new feature
17434 set to be more restrictive than the original one.
17435 (function_resolver::infer_pointer_type): Remove qualifiers from
17436 the pointer type before printing it.
17437 (function_resolver::require_matching_pointer_type): New function.
17438 (function_resolver::resolve_sv_displacement): Handle functions
17439 that don't support 32-bit vector indices or svint32_t vector offsets.
17440 (function_resolver::finish_opt_n_resolution): Take the inferred type
17441 as a separate argument.
17442 (function_resolver::resolve_unary): Optionally treat all forms in
17443 the same way as normal merging functions.
17444 (gimple_folder::redirect_call): New function.
17445 (function_expander::prepare_gather_address_operands): Add an argument
17446 that says whether scaled forms are available. If they aren't,
17447 handle scaling of vector indices and don't add the extension and
17449 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
17450 fall back to using cond_* instead.
17451 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
17452 Split out the member variables into...
17453 (rtx_code_function_base): ...this new base class.
17454 (rtx_code_function_rotated): Inherit rtx_code_function_base.
17455 (unspec_based_function): Split out the member variables into...
17456 (unspec_based_function_base): ...this new base class.
17457 (unspec_based_function_rotated): Inherit unspec_based_function_base.
17458 (unspec_based_function_exact_insn): New class.
17459 (unspec_based_add_function, unspec_based_add_lane_function)
17460 (unspec_based_lane_function, unspec_based_pred_function)
17461 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
17462 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
17463 (unspec_based_sub_function, unspec_based_sub_lane_function): New
17465 (unspec_based_fused_function): New class.
17466 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
17467 (unspec_based_fused_lane_function): New class.
17468 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
17470 (CODE_FOR_MODE1): New macro.
17471 (fixed_insn_function): New class.
17472 (while_comparison): Likewise.
17473 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
17474 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
17475 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
17476 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
17477 (load_gather_sv_restricted, shift_left_imm_long): Declare.
17478 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
17479 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
17480 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
17481 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
17482 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
17483 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
17484 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
17485 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
17486 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
17487 Also add an initial argument for unary_convert_narrowt, regardless
17488 of the predication type.
17489 (build_32_64): Allow loads and stores to specify MODE_none.
17490 (build_sv_index64, build_sv_uint_offset): New functions.
17491 (long_type_suffix): New function.
17492 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
17493 (binary_imm_long_base, load_gather_sv_base): Likewise.
17494 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
17495 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
17496 (unary_narrowb_base, unary_narrowt_base): Likewise.
17497 (binary_long_lane_def, binary_long_lane): New shape.
17498 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
17499 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
17500 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
17501 (binary_to_uint_def, binary_to_uint): Likewise.
17502 (binary_wide_def, binary_wide): Likewise.
17503 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
17504 (compare_def, compare): Likewise.
17505 (compare_ptr_def, compare_ptr): Likewise.
17506 (load_ext_gather_index_restricted_def,
17507 load_ext_gather_index_restricted): Likewise.
17508 (load_ext_gather_offset_restricted_def,
17509 load_ext_gather_offset_restricted): Likewise.
17510 (load_gather_sv_def): Inherit from load_gather_sv_base.
17511 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
17512 (shift_left_imm_def, shift_left_imm): Likewise.
17513 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
17514 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
17515 (store_scatter_index_restricted_def,
17516 store_scatter_index_restricted): Likewise.
17517 (store_scatter_offset_restricted_def,
17518 store_scatter_offset_restricted): Likewise.
17519 (tbl_tuple_def, tbl_tuple): Likewise.
17520 (ternary_long_lane_def, ternary_long_lane): Likewise.
17521 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
17522 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
17523 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
17524 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
17525 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
17526 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
17527 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
17528 (ternary_uint_def, ternary_uint): Likewise.
17529 (unary_convert): Fix typo in comment.
17530 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
17531 (unary_long_def, unary_long): Likewise.
17532 (unary_narrowb_def, unary_narrowb): Likewise.
17533 (unary_narrowt_def, unary_narrowt): Likewise.
17534 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
17535 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
17536 (unary_to_int_def, unary_to_int): Likewise.
17537 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
17538 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
17539 (svasrd_impl): Delete.
17540 (svcadd_impl::expand): Handle integer operations too.
17541 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
17542 new functions to derive the unspec numbers.
17543 (svmla_svmls_lane_impl): Replace with...
17544 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
17545 integer operations too.
17546 (svwhile_impl): Rename to...
17547 (svwhilelx_impl): ...this and inherit from while_comparison.
17548 (svasrd): Use unspec_based_function.
17549 (svmla_lane): Use svmla_lane_impl.
17550 (svmls_lane): Use svmls_lane_impl.
17551 (svrecpe, svrsqrte): Handle unsigned integer operations too.
17552 (svwhilele, svwhilelt): Use svwhilelx_impl.
17553 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
17554 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
17555 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
17556 * config/aarch64/aarch64-sve-builtins.def: Include
17557 aarch64-sve-builtins-sve2.def.
17559 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17561 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
17562 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
17563 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
17564 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
17565 immediates as well as vector ones.
17566 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
17567 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
17568 (aarch64_sve_qsub_immediate): Update calls accordingly.
17570 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17572 * config/aarch64/aarch64-sve2.md: Add banner comments.
17573 (<su>mulh<r>s<mode>3): Move further up file.
17574 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
17575 (*aarch64_sve2_sra<mode>): Move further down file.
17576 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
17578 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17580 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
17581 and UNSPEC_WHILEWR.
17582 (while_optab_cmp): Handle them.
17583 * config/aarch64/aarch64-sve.md
17584 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
17585 and add a "@" marker.
17586 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
17587 instead of gen_aarch64_sve2_while_ptest.
17588 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
17590 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17592 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
17593 (UNSPEC_WHILELE): ...this.
17594 (UNSPEC_WHILE_LO): Rename to...
17595 (UNSPEC_WHILELO): ...this.
17596 (UNSPEC_WHILE_LS): Rename to...
17597 (UNSPEC_WHILELS): ...this.
17598 (UNSPEC_WHILE_LT): Rename to...
17599 (UNSPEC_WHILELT): ...this.
17600 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
17601 (cmp_op, while_optab_cmp): Likewise.
17602 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
17603 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
17604 (svwhilelt): Likewise.
17606 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17608 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
17609 (unary_to_uint): Define.
17610 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
17611 (unary_count): Rename to...
17612 (unary_to_uint_def, unary_to_uint): ...this.
17613 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
17615 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17617 * config/aarch64/aarch64-sve-builtins-functions.h
17618 (code_for_mode_function): New class.
17619 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
17620 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
17621 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
17622 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
17623 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
17625 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17627 * config/aarch64/iterators.md (addsub): New code attribute.
17628 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
17630 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
17631 in the asm string and attributes. Fix indentation.
17632 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
17634 (@aarch64_sve_<optab><mode>): ...this.
17635 * config/aarch64/aarch64-sve-builtins.h
17636 (function_expander::expand_signed_unpred_op): Delete.
17637 * config/aarch64/aarch64-sve-builtins.cc
17638 (function_expander::expand_signed_unpred_op): Likewise.
17639 (function_expander::map_to_rtx_codes): If the optab isn't defined,
17640 try using code_for_aarch64_sve instead.
17641 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
17642 (svqsub_impl): Likewise.
17643 (svqadd, svqsub): Use rtx_code_function instead.
17645 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17647 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
17648 (HADDSUB, sur, addsub): Remove them.
17650 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17652 * tree-nrv.c (pass_return_slot::execute): Handle all internal
17653 functions the same way, rather than singling out those that
17654 aren't mapped directly to optabs.
17656 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17658 * target.def (compatible_vector_types_p): New target hook.
17659 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
17660 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
17661 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
17662 * doc/tm.texi: Regenerate.
17663 * gimple-expr.c: Include target.h.
17664 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
17665 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
17667 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
17668 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
17669 Use the original predicate if it already has a suitable type.
17671 2020-01-09 Martin Jambor <mjambor@suse.cz>
17673 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
17674 resolve_speculation and redirect_call_stmt_to_callee static. Change
17675 return type of set_call_stmt to cgraph_edge *.
17676 * auto-profile.c (afdo_indirect_call): Adjust call to
17677 redirect_call_stmt_to_callee.
17678 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
17679 make the this pointer explicit, adjust self-recursive calls and the
17680 call top make_direct. Return the resulting edge.
17681 (cgraph_edge::remove): Make this pointer explicit.
17682 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
17683 (cgraph_edge::make_direct): Likewise, adjust call to
17684 resolve_speculation.
17685 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
17686 call to set_call_stmt.
17687 (cgraph_update_edges_for_call_stmt_node): Update call to
17688 set_call_stmt and remove.
17689 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17690 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
17691 (cgraph_node::create_edge_including_clones): Moved "first" definition
17692 of edge to the block where it was used. Adjusted calls to
17694 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
17695 cgraph_edge::remove.
17696 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
17697 make_direct and redirect_call_stmt_to_callee.
17698 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
17699 resolve_speculation and make_direct.
17700 * ipa-inline-transform.c (inline_transform): Adjust call to
17701 redirect_call_stmt_to_callee.
17702 (check_speculations_1):: Adjust call to resolve_speculation.
17703 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
17704 resolve-speculation.
17705 (inline_small_functions): Adjust call to resolve_speculation.
17706 (ipa_inline): Likewise.
17707 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
17709 * ipa-visibility.c (function_and_variable_visibility): Make iteration
17710 safe with regards to edge removal, adjust calls to
17711 redirect_call_stmt_to_callee.
17712 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
17713 and redirect_call_stmt_to_callee.
17714 * multiple_target.c (create_dispatcher_calls): Adjust call to
17715 redirect_call_stmt_to_callee
17716 (redirect_to_specific_clone): Likewise.
17717 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
17718 Adjust calls to cgraph_edge::remove.
17719 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
17720 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
17721 (expand_call_inline): Adjust call to cgraph_edge::remove.
17723 2020-01-09 Martin Liska <mliska@suse.cz>
17725 * params.opt: Set Optimization for
17726 param_max_speculative_devirt_maydefs.
17728 2020-01-09 Martin Sebor <msebor@redhat.com>
17730 PR middle-end/93200
17732 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
17734 2020-01-09 Martin Liska <mliska@suse.cz>
17736 * auto-profile.c (auto_profile): Use opt_for_fn
17738 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
17739 (propagate_vals_across_arith_jfunc): Likewise.
17740 (hint_time_bonus): Likewise.
17741 (incorporate_penalties): Likewise.
17742 (good_cloning_opportunity_p): Likewise.
17743 (perform_estimation_of_a_value): Likewise.
17744 (estimate_local_effects): Likewise.
17745 (ipcp_propagate_stage): Likewise.
17746 * ipa-fnsummary.c (decompose_param_expr): Likewise.
17747 (set_switch_stmt_execution_predicate): Likewise.
17748 (analyze_function_body): Likewise.
17749 * ipa-inline-analysis.c (offline_size): Likewise.
17750 * ipa-inline.c (early_inliner): Likewise.
17751 * ipa-prop.c (ipa_analyze_node): Likewise.
17752 (ipcp_transform_function): Likewise.
17753 * ipa-sra.c (process_scan_results): Likewise.
17754 (ipa_sra_summarize_function): Likewise.
17755 * params.opt: Rename ipcp-unit-growth to
17756 ipa-cp-unit-growth. Add Optimization for various
17757 IPA-related parameters.
17759 2020-01-09 Richard Biener <rguenther@suse.de>
17761 PR middle-end/93054
17762 * gimplify.c (gimplify_expr): Deal with NOP definitions.
17764 2020-01-09 Richard Biener <rguenther@suse.de>
17766 PR tree-optimization/93040
17767 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
17769 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
17771 * common/config/avr/avr-common.c (avr_option_optimization_table)
17772 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
17774 2020-01-09 Martin Liska <mliska@suse.cz>
17776 * cgraphclones.c (symbol_table::materialize_all_clones):
17777 Use cgraph_node::dump_name.
17779 2020-01-09 Jakub Jelinek <jakub@redhat.com>
17781 PR inline-asm/93202
17782 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
17783 output_operand_lossage instead of gcc_unreachable.
17784 * doc/md.texi (riscv f constraint): Fix typo.
17787 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
17788 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
17789 CONST_SCALAR_INT_P instead of CONST_INT_P.
17790 (*subv<mode>4_1): Rename to ...
17791 (subv<mode>4_1): ... this.
17792 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
17793 define_insn_and_split patterns.
17794 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
17797 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17799 * vec.c (class selftest::count_dtor): New class.
17800 (selftest::test_auto_delete_vec): New test.
17801 (selftest::vec_c_tests): Call it.
17802 * vec.h (class auto_delete_vec): New class template.
17803 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
17805 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17807 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
17809 2020-01-08 Jim Wilson <jimw@sifive.com>
17811 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
17812 use of TLS_MODEL_LOCAL_EXEC when not pic.
17814 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17816 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
17819 2020-01-08 Jakub Jelinek <jakub@redhat.com>
17822 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
17823 *stack_protect_set_3 peephole2): Also check that the second
17824 insns source is general_operand.
17827 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
17828 predicate for output operand instead of register_operand.
17829 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
17830 memory destination and non-memory operands[2].
17832 2020-01-08 Martin Liska <mliska@suse.cz>
17834 * cgraph.c (cgraph_node::dump): Use ::dump_name or
17835 ::dump_asm_name instead of (::name or ::asm_name).
17836 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
17837 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
17838 (analyze_functions): Likewise.
17839 (expand_all_functions): Likewise.
17840 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
17841 (propagate_bits_across_jump_function): Likewise.
17842 (dump_profile_updates): Likewise.
17843 (ipcp_store_bits_results): Likewise.
17844 (ipcp_store_vr_results): Likewise.
17845 * ipa-devirt.c (dump_targets): Likewise.
17846 * ipa-fnsummary.c (analyze_function_body): Likewise.
17847 * ipa-hsa.c (check_warn_node_versionable): Likewise.
17848 (process_hsa_functions): Likewise.
17849 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
17850 (set_alias_uids): Likewise.
17851 * ipa-inline-transform.c (save_inline_function_body): Likewise.
17852 * ipa-inline.c (recursive_inlining): Likewise.
17853 (inline_to_all_callers_1): Likewise.
17854 (ipa_inline): Likewise.
17855 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
17856 (ipa_propagate_frequency): Likewise.
17857 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
17858 (remove_described_reference): Likewise.
17859 * ipa-pure-const.c (worse_state): Likewise.
17860 (check_retval_uses): Likewise.
17861 (analyze_function): Likewise.
17862 (propagate_pure_const): Likewise.
17863 (propagate_nothrow): Likewise.
17864 (dump_malloc_lattice): Likewise.
17865 (propagate_malloc): Likewise.
17866 (pass_local_pure_const::execute): Likewise.
17867 * ipa-visibility.c (optimize_weakref): Likewise.
17868 (function_and_variable_visibility): Likewise.
17869 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
17870 (ipa_discover_variable_flags): Likewise.
17871 * lto-streamer-out.c (output_function): Likewise.
17872 (output_constructor): Likewise.
17873 * tree-inline.c (copy_bb): Likewise.
17874 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
17875 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
17877 2020-01-08 Richard Biener <rguenther@suse.de>
17879 PR middle-end/93199
17880 * tree-eh.c (sink_clobbers): Update virtual operands for
17881 the first and last stmt only. Add a dry-run capability.
17882 (pass_lower_eh_dispatch::execute): Perform clobber sinking
17883 after CFG manipulations and in RPO order to catch all
17884 secondary opportunities reliably.
17886 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17889 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17891 2019-01-08 Richard Biener <rguenther@suse.de>
17893 PR middle-end/93199
17894 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
17895 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
17896 virtual operand, also updating SSA use.
17897 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
17898 Update stmt after resetting virtual operand.
17899 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
17900 * gimple-iterator.c (gsi_remove): When not removing the stmt
17901 permanently do not delink immediate uses or mark the stmt modified.
17903 2020-01-08 Martin Liska <mliska@suse.cz>
17905 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
17906 (ipa_call_context::estimate_size_and_time): Likewise.
17907 (inline_analyze_function): Likewise.
17909 2020-01-08 Martin Liska <mliska@suse.cz>
17911 * cgraph.c (cgraph_node::dump): Use systematically
17914 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17916 Add -nodevicespecs option for avr.
17919 * config/avr/avr.opt (-nodevicespecs): New driver option.
17920 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
17921 "-specs=device-specs/..." if that option is not set.
17922 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17924 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17926 Implement 64-bit double functions for avr.
17929 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
17930 --with-double-comparison.
17931 * doc/install.texi: Document them.
17932 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
17933 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
17934 <WITH_DOUBLE_COMPARISON>: New built-in defines.
17935 * doc/invoke.texi (AVR Built-in Macros): Document them.
17936 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
17937 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
17938 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
17940 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
17943 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
17944 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
17945 when only building rm-profile multilibs.
17947 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
17950 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
17951 lattice for a value to check.
17952 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
17953 finite propagation in self-recursive scc.
17955 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
17957 * ipa-inline.c (caller_growth_limits): Restore the AND.
17959 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
17961 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
17962 (VEC_ALLREG_ALT): New iterator.
17963 (VEC_ALLREG_INT_MODE): New iterator.
17964 (VCMP_MODE): New iterator.
17965 (VCMP_MODE_INT): New iterator.
17966 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
17967 (vec_cmp<u>v64qidi): New define_expand.
17968 (vec_cmp<mode>di_exec): Use VCMP_MODE.
17969 (vec_cmpu<mode>di_exec): New define_expand.
17970 (vec_cmp<u>v64qidi_exec): New define_expand.
17971 (vec_cmp<mode>di_dup): Use VCMP_MODE.
17972 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
17973 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
17974 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
17975 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
17976 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
17977 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
17978 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
17979 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
17980 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
17982 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
17983 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
17985 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
17987 * config/gcn/constraints.md (DA): Update description and match.
17989 (Db): New constraint.
17990 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
17992 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
17993 Implement 'Db' mixed immediate type.
17994 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
17995 (addcv64si3_dup<exec_vcc>): Delete.
17996 (subcv64si3<exec_vcc>): Rework constraints.
17997 (addv64di3): Rework constraints.
17998 (addv64di3_exec): Rework constraints.
17999 (subv64di3): Rework constraints.
18000 (addv64di3_dup): Delete.
18001 (addv64di3_dup_exec): Delete.
18002 (addv64di3_zext): Rework constraints.
18003 (addv64di3_zext_exec): Rework constraints.
18004 (addv64di3_zext_dup): Rework constraints.
18005 (addv64di3_zext_dup_exec): Rework constraints.
18006 (addv64di3_zext_dup2): Rework constraints.
18007 (addv64di3_zext_dup2_exec): Rework constraints.
18008 (addv64di3_sext_dup2): Rework constraints.
18009 (addv64di3_sext_dup2_exec): Rework constraints.
18011 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
18013 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
18014 existing target checks.
18016 2020-01-07 Richard Biener <rguenther@suse.de>
18018 * doc/install.texi: Bump minimal supported MPC version.
18020 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
18022 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
18023 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
18024 * langhooks.c: Include stor-layout.h.
18025 (lhd_simulate_enum_decl): New function.
18026 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
18027 handle_arm_sve_h for the LTO frontend.
18028 (register_vector_type): Cope with null returns from pushdecl.
18030 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
18032 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
18033 (aarch64_sve::nvectors_if_data_type): Replace with...
18034 (aarch64_sve::builtin_type_p): ...this.
18035 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
18036 (find_vector_type): Delete.
18037 (add_sve_type_attribute): New function.
18038 (lookup_sve_type_attribute): Likewise.
18039 (register_builtin_types): Add an "SVE type" attribute to each type.
18040 (register_tuple_type): Likewise.
18041 (svbool_type_p, nvectors_if_data_type): Delete.
18042 (mangle_builtin_type): Use lookup_sve_type_attribute.
18043 (builtin_type_p): Likewise. Add an overload that returns the
18044 number of constituent vector and predicate registers.
18045 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
18046 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
18047 instead of aarch64_sve_argument_p.
18048 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
18049 (aarch64_pass_by_reference): Likewise.
18050 (aarch64_function_value_1): Likewise.
18051 (aarch64_return_in_memory): Likewise.
18052 (aarch64_layout_arg): Likewise.
18054 2020-01-07 Jakub Jelinek <jakub@redhat.com>
18056 PR tree-optimization/93156
18057 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
18058 least significant bit is always clear.
18060 PR tree-optimization/93118
18061 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
18062 simplifier with two intermediate conversions.
18064 2020-01-07 Martin Liska <mliska@suse.cz>
18066 * params.opt: Add Optimization for various parameters.
18068 2020-01-07 Martin Liska <mliska@suse.cz>
18071 * doc/extend.texi: Explain cloning for target_clone
18074 2020-01-07 Martin Liska <mliska@suse.cz>
18076 PR tree-optimization/92860
18077 * common.opt: Make in Optimization option
18078 as it is affected by -O0, which is an Optimization
18080 * tree-inline.c (tree_inlinable_function_p):
18081 Use opt_for_fn for warn_inline.
18082 (expand_call_inline): Likewise.
18084 2020-01-07 Martin Liska <mliska@suse.cz>
18086 PR tree-optimization/92860
18087 * common.opt: Make flag_ree as optimization
18090 2020-01-07 Martin Liska <mliska@suse.cz>
18092 PR optimization/92860
18093 * params.opt: Mark param_min_crossjump_insns with Optimization
18096 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
18098 * ipa-inline-analysis.c (estimate_growth): Fix typo.
18099 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
18101 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
18103 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
18104 helper function to return the valid addressing formats for a given
18105 hard register and mode.
18106 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
18108 * config/rs6000/constraints.md (Q constraint): Update
18110 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
18113 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
18114 Use 'Q' for doing vector extract from memory.
18115 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
18117 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
18118 doing vector extract from memory.
18119 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
18120 extract from memory.
18122 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
18123 for the offset being 34-bits when -mcpu=future is used.
18125 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
18127 * config/pa/pa.md: Revert change to use ordered_comparison_operator
18128 instead of cmpib_comparison_operator in cmpib patterns.
18129 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
18130 of cmpib_comparison_operator. Revise comment.
18132 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18134 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
18135 in an IFN_DIV_POW2 node to be equal.
18137 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18139 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
18140 (vect_check_scalar_mask): ...this.
18141 (vectorizable_store, vectorizable_load): Update call accordingly.
18142 (vectorizable_call): Use vect_check_scalar_mask to check the mask
18143 argument in calls to conditional internal functions.
18145 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18147 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
18148 '0' matching inputs.
18149 (subv64di3_exec): Likewise.
18151 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
18153 * config/mips/mips.c (vr4130_align_insns): Fix typo.
18154 * doc/md.texi (movstr): Likewise.
18156 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18158 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
18161 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18163 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
18165 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
18166 to a temporary file and use move-if-change to update the real
18167 file where necessary.
18169 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18171 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
18172 rather than Upa for CPY /M.
18174 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18176 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
18179 2020-01-06 Martin Liska <mliska@suse.cz>
18181 PR tree-optimization/92860
18182 * params.opt: Mark param_max_combine_insns with Optimization
18185 2020-01-05 Jakub Jelinek <jakub@redhat.com>
18188 * config/i386/i386.md (SWIDWI): New mode iterator.
18189 (DWI, dwi): Add TImode variants.
18190 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
18191 <general_hilo_operand> instead of <general_operand>. Use
18192 CONST_SCALAR_INT_P instead of CONST_INT_P.
18193 (*addv<mode>4_1): Rename to ...
18194 (addv<mode>4_1): ... this.
18195 (QWI): New mode attribute.
18196 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
18197 define_insn_and_split patterns.
18198 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
18200 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
18201 <general_hilo_operand> instead of <general_operand>.
18202 (*addcarry<mode>_1): New define_insn.
18203 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
18205 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
18207 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
18208 Use "call" instead of "set".
18210 2020-01-03 Martin Jambor <mjambor@suse.cz>
18213 * ipa-cp.c (print_all_lattices): Skip functions without info.
18215 2020-01-03 Jakub Jelinek <jakub@redhat.com>
18218 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
18219 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
18220 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
18221 for 'e' simd clones.
18224 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
18226 (mprefer-vector-width=): Add Save.
18227 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
18228 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
18229 (ix86_debug_options, ix86_function_specific_print): Adjust
18230 ix86_target_string callers.
18231 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
18232 (ix86_valid_target_attribute_tree): Likewise.
18233 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
18234 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
18235 ix86_target_string caller.
18238 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
18239 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
18240 instead of gen_int_shift_amount + convert_modes.
18242 PR rtl-optimization/93088
18243 * loop-iv.c (find_single_def_src): Punt after looking through
18244 128 reg copies for regs with single definitions. Move definitions
18247 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
18249 * config/arm/arm-c.c (arm_cpu_builtins): Define
18250 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
18251 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
18252 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
18253 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
18254 * config/arm/arm-tables.opt: Regenerated.
18255 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
18256 arm_arch_i8mm and arm_arch_bf16 when enabled.
18257 * config/arm/arm.h (TARGET_I8MM): New macro.
18258 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
18259 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
18260 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
18261 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
18262 (v8_6_a_simd_variants): New.
18263 (v8_*_a_simd_variants): Add i8mm and bf16.
18264 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
18266 2020-01-02 Jakub Jelinek <jakub@redhat.com>
18269 * predict.c (compute_function_frequency): Don't call
18270 warn_function_cold on functions that already have cold attribute.
18272 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
18275 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
18276 COMDAT group function labels in .data.rel.ro.local section.
18277 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
18280 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
18281 comparison_operator in B and S integer comparisons. Likewise, use
18282 ordered_comparison_operator instead of cmpib_comparison_operator in
18284 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
18286 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18288 Update copyright years.
18290 * gcc.c (process_command): Update copyright notice dates.
18291 * gcov-dump.c (print_version): Ditto.
18292 * gcov.c (print_version): Ditto.
18293 * gcov-tool.c (print_version): Ditto.
18294 * gengtype.c (create_file): Ditto.
18295 * doc/cpp.texi: Bump @copying's copyright year.
18296 * doc/cppinternals.texi: Ditto.
18297 * doc/gcc.texi: Ditto.
18298 * doc/gccint.texi: Ditto.
18299 * doc/gcov.texi: Ditto.
18300 * doc/install.texi: Ditto.
18301 * doc/invoke.texi: Ditto.
18303 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
18305 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
18308 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18310 PR tree-optimization/93098
18311 * match.pd (popcount): For shift amounts, use integer_onep
18312 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
18313 tests. Make sure that precision is power of two larger than or equal
18314 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
18315 instead of ULL suffixed constants. Formatting fixes.
18317 Copyright (C) 2020 Free Software Foundation, Inc.
18319 Copying and distribution of this file, with or without modification,
18320 are permitted in any medium without royalty provided the copyright
18321 notice and this notice are preserved.