1 2020-05-22 Richard Biener <rguenther@suse.de>
3 PR tree-optimization/95268
4 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
7 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
9 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
12 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
14 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
15 (lto_input_scc): Optimize streaming of entry lengths.
16 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
17 (DFS::DFS): Optimize stremaing of entry lengths
19 2020-05-22 Richard Biener <rguenther@suse.de>
22 * doc/invoke.texi (flto): Document behavior of diagnostic
25 2020-05-22 Richard Biener <rguenther@suse.de>
27 * tree-vectorizer.h (vect_is_simple_use): New overload.
28 (vect_maybe_update_slp_op_vectype): New.
29 * tree-vect-stmts.c (vect_is_simple_use): New overload
30 accessing operands of SLP vs. non-SLP operation transparently.
31 (vect_maybe_update_slp_op_vectype): New function updating
32 the possibly shared SLP operands vector type.
33 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
34 using the new vect_is_simple_use overload; update SLP invariant
35 operand nodes vector type.
36 (vectorizable_comparison): Likewise.
37 (vectorizable_call): Likewise.
38 (vectorizable_conversion): Likewise.
39 (vectorizable_shift): Likewise.
40 (vectorizable_store): Likewise.
41 (vectorizable_condition): Likewise.
42 (vectorizable_assignment): Likewise.
43 * tree-vect-loop.c (vectorizable_reduction): Likewise.
44 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
45 present SLP_TREE_VECTYPE and check it matches previous
48 2020-05-22 Richard Biener <rguenther@suse.de>
50 PR tree-optimization/95248
51 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
53 2020-05-22 Richard Biener <rguenther@suse.de>
55 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
56 (_slp_tree::~_slp_tree): Likewise.
57 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
59 (_slp_tree::~_slp_tree): Implement.
60 (vect_free_slp_tree): Simplify.
61 (vect_create_new_slp_node): Likewise. Add nops parameter.
62 (vect_build_slp_tree_2): Adjust.
63 (vect_analyze_slp_instance): Likewise.
65 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
67 * adjust-alignment.c: Include memmodel.h.
69 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
72 * config/i386/cpuid.h: Use hexadecimal in comments.
74 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
77 * config/i386/i386-builtins.c (processor_features): Move
78 F_AVX512VP2INTERSECT after F_AVX512BF16.
79 (isa_names_table): Likewise.
81 2020-05-21 Martin Liska <mliska@suse.cz>
83 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
84 Handle OPT_moutline_atomics.
85 * config/aarch64/aarch64.c: Add outline-atomics to
87 * doc/extend.texi: Document the newly added target attribute.
89 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
93 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
94 operands 1 and 2 commutative. Manually swap operands.
95 (*mmx_nabsv2sf2): Ditto.
98 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
100 * config/i386/i386.md (*<code>tf2_1):
101 Mark operands 1 and 2 commutative.
103 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
104 commutative. Do not swap operands.
105 (*nabs<mode>2): Ditto.
107 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
110 * config/i386/sse.md (<code>v8qiv8hi2): Use
111 simplify_gen_subreg instead of simplify_subreg.
112 (<code>v8qiv8si2): Ditto.
113 (<code>v4qiv4si2): Ditto.
114 (<code>v4hiv4si2): Ditto.
115 (<code>v8qiv8di2): Ditto.
116 (<code>v4qiv4di2): Ditto.
117 (<code>v2qiv2di2): Ditto.
118 (<code>v4hiv4di2): Ditto.
119 (<code>v2hiv2di2): Ditto.
120 (<code>v2siv2di2): Ditto.
122 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
125 * config/i386/i386.md (*pushsi2_rex64):
126 Use "e" constraint instead of "i".
128 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
130 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
131 (lto_input_tree_1): Strenghten sanity check.
132 (lto_input_tree): Update call of lto_input_scc.
133 * lto-streamer-out.c: Include ipa-utils.h
134 (create_output_block): Initialize local_trees if merigng is going
136 (destroy_output_block): Destroy local_trees.
137 (DFS): Add max_local_entry.
138 (local_tree_p): New function.
139 (DFS::DFS): Initialize and maintain it.
140 (DFS::DFS_write_tree): Decide on streaming format.
141 (lto_output_tree): Stream inline singleton SCCs
142 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
143 (struct output_block): Add local_trees.
144 (lto_input_scc): Update prototype.
146 2020-05-20 Patrick Palka <ppalka@redhat.com>
149 * hash-table.h (hash_table::find_with_hash): Move up the call to
152 2020-05-20 Martin Liska <mliska@suse.cz>
154 * lto-compress.c (lto_compression_zstd): Fill up
155 num_compressed_il_bytes.
156 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
158 2020-05-20 Richard Biener <rguenther@suse.de>
160 PR tree-optimization/95219
161 * tree-vect-loop.c (vectorizable_induction): Reduce
162 group_size before computing the number of required IVs.
164 2020-05-20 Richard Biener <rguenther@suse.de>
167 * tree-inline.c (remap_gimple_stmt): Revert adjusting
168 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
170 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
171 Andre Vieira <andre.simoesdiasvieira@arm.com>
174 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
176 (mve_vector_mem_operand): Likewise.
177 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
178 the load from memory to a core register is legitimate for give mode.
179 (mve_vector_mem_operand): Define function.
180 (arm_print_operand): Modify comment.
181 (arm_mode_base_reg_class): Define.
182 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
183 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
184 * config/arm/constraints.md (Ux): Likewise.
186 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
187 add support for missing Vector Store Register and Vector Load Register.
188 Add a new alternative to support load from memory to PC (or label) in
190 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
191 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
192 mve_memory_operand and also modify the MVE instructions to emit.
193 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
194 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
195 mve_memory_operand and also modify the MVE instructions to emit.
196 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
197 mve_memory_operand and also modify the MVE instructions to emit.
198 (mve_vldrhq_z_fv8hf): Likewise.
199 (mve_vldrhq_z_<supf><mode>): Likewise.
200 (mve_vldrwq_fv4sf): Likewise.
201 (mve_vldrwq_<supf>v4si): Likewise.
202 (mve_vldrwq_z_fv4sf): Likewise.
203 (mve_vldrwq_z_<supf>v4si): Likewise.
204 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
205 (mve_vld1q_<supf><mode>): Likewise.
206 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
208 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
209 mve_memory_operand and also modify the MVE instructions to emit.
210 (mve_vstrhq_p_<supf><mode>): Likewise.
211 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
213 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
214 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
215 instructions to emit.
216 (mve_vstrwq_p_<supf>v4si): Likewise.
217 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
218 * config/arm/predicates.md (mve_memory_operand): Define.
220 2020-05-30 Richard Biener <rguenther@suse.de>
223 * c-fold.c (c_fully_fold_internal): Enhance guard on
226 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
229 * Makefile.in (OBJS): Add adjust-alignment.o.
230 * adjust-alignment.c (pass_data_adjust_alignment): New.
231 (pass_adjust_alignment): New.
232 (pass_adjust_alignment::execute): New.
233 (make_pass_adjust_alignment): New.
234 * tree-pass.h (make_pass_adjust_alignment): New.
235 * passes.def: Add pass_adjust_alignment.
237 2020-05-19 Alex Coplan <alex.coplan@arm.com>
240 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
241 identity permutation.
243 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
245 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
246 msp430_small, msp430_large and size24plus DejaGNU effective
248 Improve grammar in descriptions for size20plus and size32plus effective
251 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
253 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
254 callee saved registers only in xBPF.
255 (bpf_expand_prologue): Save callee saved registers only in xBPF.
256 (bpf_expand_epilogue): Likewise for restoring.
257 * doc/invoke.texi (eBPF Options): Document this is activated by
260 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
262 * config/bpf/bpf.opt (mxbpf): New option.
263 * doc/invoke.texi (Option Summary): Add -mxbpf.
264 (eBPF Options): Document -mxbbpf.
266 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
269 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
270 (<code>v32qiv32hi2): Ditto.
271 (<code>v8qiv8hi2): Ditto.
272 (<code>v16qiv16si2): Ditto.
273 (<code>v8qiv8si2): Ditto.
274 (<code>v4qiv4si2): Ditto.
275 (<code>v16hiv16si2): Ditto.
276 (<code>v8hiv8si2): Ditto.
277 (<code>v4hiv4si2): Ditto.
278 (<code>v8qiv8di2): Ditto.
279 (<code>v4qiv4di2): Ditto.
280 (<code>v2qiv2di2): Ditto.
281 (<code>v8hiv8di2): Ditto.
282 (<code>v4hiv4di2): Ditto.
283 (<code>v2hiv2di2): Ditto.
284 (<code>v8siv8di2): Ditto.
285 (<code>v4siv4di2): Ditto.
286 (<code>v2siv2di2): Ditto.
288 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
290 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
291 (riscv_implied_info): New.
292 (riscv_subset_list): Add handle_implied_ext.
293 (riscv_subset_list::to_string): New parameter version_p to
294 control output format.
295 (riscv_subset_list::handle_implied_ext): New.
296 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
297 (riscv_arch_str): New parameter version_p to control output format.
298 (riscv_expand_arch): New.
299 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
301 * config/riscv/riscv.h (riscv_expand_arch): New,
302 (EXTRA_SPEC_FUNCTIONS): Define.
303 (ASM_SPEC): Transform -march= via riscv_expand_arch.
305 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
307 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
308 parse_multiletter_ext.
309 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
310 adjust parsing order for 's' and 'x'.
312 2020-05-19 Richard Biener <rguenther@suse.de>
314 * tree-vectorizer.h (_slp_tree::vectype): Add field.
315 (SLP_TREE_VECTYPE): New.
316 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
318 (vect_create_new_slp_node): Likewise.
319 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
321 (vect_slp_analyze_node_operations): Walk nodes children for
323 (vect_get_constant_vectors): Use local scope op variable.
324 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
325 (vect_model_simple_cost): Adjust.
326 (vect_model_store_cost): Likewise.
327 (vectorizable_store): Likewise.
329 2020-05-18 Martin Sebor <msebor@redhat.com>
332 * tree-object-size.c (decl_init_size): New function.
333 (addr_object_size): Call it.
334 * tree.h (last_field): Declare.
335 (first_field): Add attribute nonnull.
337 2020-05-18 Martin Sebor <msebor@redhat.com>
340 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
341 * tree.c (component_ref_size): Correct the handling or array members
343 Drop a pointless test.
344 Rename a local variable.
346 2020-05-18 Jason Merrill <jason@redhat.com>
348 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
349 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
351 2020-05-14 Jason Merrill <jason@redhat.com>
353 * doc/install.texi (Prerequisites): Update boostrap compiler
354 requirement to C++11/GCC 4.8.
356 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
358 PR tree-optimization/94952
359 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
360 Initialize variables bitpos, bitregion_start, and bitregion_end in
361 order to silence warnings about use of uninitialized variables.
363 2020-05-18 Carl Love <cel@us.ibm.com>
366 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
367 first_match_index_<mode>.
368 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
369 additional test cases with zero vector elements.
371 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
374 * config/i386/i386-expand.c (ix86_expand_int_movcc):
375 Avoid reversing a non-trapping comparison to a trapping one.
377 2020-05-18 Alex Coplan <alex.coplan@arm.com>
379 * config/arm/arm.c (output_move_double): Fix codegen when loading into
380 a register pair with an odd base register.
382 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
384 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
385 Do not emit FLAGS_REG clobber for TFmode.
386 * config/i386/i386.md (*<code>tf2_1): Rewrite as
387 define_insn_and_split. Mark operands 1 and 2 commutative.
389 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
390 Do not swap memory operands. Simplify RTX generation.
391 (neg abs SSE splitter): Ditto.
392 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
393 commutative. Do not swap operands. Simplify RTX generation.
394 (*nabs<mode>2): Ditto.
396 2020-05-18 Richard Biener <rguenther@suse.de>
398 * tree-vect-slp.c (vect_slp_bb): Start after labels.
399 (vect_get_constant_vectors): Really place init stmt after scalar defs.
400 * tree-vect-stmts.c (vect_init_vector_1): Insert before
403 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
405 * config/i386/driver-i386.c (host_detect_local_cpu): Support
406 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
409 2020-05-18 Richard Biener <rguenther@suse.de>
412 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
413 when inlining into a non-call EH function.
415 2020-05-18 Richard Biener <rguenther@suse.de>
417 PR tree-optimization/95172
418 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
419 eventually need the conditional processing.
420 (execute_sm_exit): When processing an orderd sequence
421 avoid doing any conditional processing.
422 (hoist_memory_references): Pass down whether all edges
423 have ordered processing for a ref to execute_sm.
425 2020-05-17 Jeff Law <law@redhat.com>
427 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
428 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
429 into a single pattern using pc_or_label_operand.
430 * config/h8300/combiner.md (bit branch patterns): Likewise.
431 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
433 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
436 * config/i386/i386-features.c (has_non_address_hard_reg):
438 (pseudo_reg_set): This. Return the SET expression. Ignore
439 pseudo register push.
440 (general_scalar_to_vector_candidate_p): Combine single_set and
441 has_non_address_hard_reg calls to pseudo_reg_set.
442 (timode_scalar_to_vector_candidate_p): Likewise.
443 * config/i386/i386.md (*pushv1ti2): New pattern.
445 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
448 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
450 * tree-vrp.c (operand_less_p): Move to...
451 * vr-values.c (operand_less_p): ...here.
452 * tree-vrp.h (operand_less_p): Remove.
454 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
456 * tree-vrp.c (operand_less_p): Move to...
457 * vr-values.c (operand_less_p): ...here.
458 * tree-vrp.h (operand_less_p): Remove.
460 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
462 * tree-vrp.c (class vrp_insert): Remove prototype for
465 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
467 * tree-vrp.c (class live_names): New.
468 (live_on_edge): Move into live_names.
469 (build_assert_expr_for): Move into vrp_insert.
470 (find_assert_locations_in_bb): Rename from
471 find_assert_locations_1.
472 (process_assert_insertions_for): Move into vrp_insert.
473 (compare_assert_loc): Same.
474 (remove_range_assertions): Same.
475 (dump_asserts_for): Rename to vrp_insert::dump.
476 (debug_asserts_for): Rename to vrp_insert::debug.
477 (dump_all_asserts): Rename to vrp_insert::dump.
478 (debug_all_asserts): Rename to vrp_insert::debug.
480 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
482 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
483 check_array_ref, check_mem_ref, and search_for_addr_array
485 (class array_bounds_checker): ...here.
486 (class check_array_bounds_dom_walker): Adjust to use
487 array_bounds_checker.
488 (check_all_array_refs): Move into array_bounds_checker and rename
490 (class vrp_folder): Make fold_predicate_in private.
492 2020-05-15 Jeff Law <law@redhat.com>
494 * config/h8300/h8300.md (SFI iterator): New iterator for
496 * config/h8300/peepholes.md (memory comparison): Use mode
497 iterator to consolidate 3 patterns into one.
498 (stack allocation and stack store): Handle SFmode. Handle
501 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
503 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
504 RS6000_BTM_POWERPC64.
506 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
508 * config/i386/i386.md (SWI48DWI): New mode iterator.
509 (*push<mode>2): Allow XMM registers.
510 (*pushdi2_rex64): Ditto.
511 (*pushsi2_rex64): Ditto.
513 (push XMM reg splitter): New splitter
515 (*pushdf) Change "x" operand constraint to "v".
516 (*pushsf_rex64): Ditto.
519 2020-05-15 Richard Biener <rguenther@suse.de>
521 PR tree-optimization/92260
522 * tree-vect-slp.c (vect_get_constant_vectors): Compute
523 the number of vector stmts in a canonical way.
525 2020-05-15 Martin Liska <mliska@suse.cz>
527 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
530 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
532 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
534 2020-05-15 Richard Biener <rguenther@suse.de>
536 PR tree-optimization/95133
537 * gimple-ssa-split-paths.c
538 (find_block_to_duplicate_for_splitting_paths): Check for
541 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
543 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
545 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
547 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
550 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
551 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
554 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
557 * config/i386/i386.md (isa): Add sse3_noavx.
558 (enabled): Handle sse3_noavx.
560 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
561 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
562 alternatives. Match commutative vec_select selector operands.
563 (*mmx_haddv2sf3_low): New insn pattern.
565 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
566 (*mmx_hsubv2sf3_low): New insn pattern.
568 2020-05-15 Richard Biener <rguenther@suse.de>
570 PR tree-optimization/33315
571 * tree-ssa-sink.c: Include tree-eh.h.
572 (sink_stats): Add commoned member.
573 (sink_common_stores_to_bb): New function implementing store
574 commoning by sinking to the successor.
575 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
576 (pass_sink_code::execute): Likewise. Record commoned stores
579 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
581 PR rtl-optimization/37451, part of PR target/61837
582 * loop-doloop.c (doloop_simplify_count): New function. Simplify
583 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
584 (doloop_modify): Call doloop_simplify_count.
586 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
589 * doc/sourcebuild.texi: Document effective target lgccjit.
591 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
593 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
594 define_expand, and rename the original to ...
595 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
596 (add<mode>3_zext_dup_exec): Likewise, with ...
597 (add<mode>3_vcc_zext_dup_exec): ... this.
598 (add<mode>3_zext_dup2): Likewise, with ...
599 (add<mode>3_zext_dup_exec): ... this.
600 (add<mode>3_zext_dup2_exec): Likewise, with ...
601 (add<mode>3_zext_dup2): ... this.
602 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
603 addv64di3_zext* calls to use addv64di3_vcc_zext*.
605 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
608 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
609 (extendv2sfv2df2): Ditto.
611 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
613 * configure: Regenerated.
615 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
617 * config/arm/arm.c (reg_needs_saving_p): New function.
618 (use_return_insn): Use reg_needs_saving_p.
619 (arm_get_vfp_saved_size): Likewise.
620 (arm_compute_frame_layout): Likewise.
621 (arm_save_coproc_regs): Likewise.
622 (thumb1_expand_epilogue): Likewise.
623 (arm_expand_epilogue_apcs_frame): Likewise.
624 (arm_expand_epilogue): Likewise.
626 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
628 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
630 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
633 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
635 (floatv2siv2df2): New expander.
636 (floatunsv2siv2df2): New insn pattern.
638 (fix_truncv2dfv2si2): New expander.
639 (fixuns_truncv2dfv2si2): New insn pattern.
641 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
644 * config/aarch64/aarch64-sve-builtins.cc
645 (handle_arm_sve_vector_bits_attribute): Create a copy of the
646 original type's TYPE_MAIN_VARIANT, then reapply all the differences
647 between the original type and its main variant.
649 2020-05-14 Richard Biener <rguenther@suse.de>
652 * real.c (real_to_decimal_for_mode): Make sure we handle
653 a zero with nonzero exponent.
655 2020-05-14 Jakub Jelinek <jakub@redhat.com>
657 * Makefile.in (GTFILES): Add omp-general.c.
658 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
659 calls_declare_variant_alt members and initialize them in the
661 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
662 calls to declare_variant_alt nodes.
663 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
664 and calls_declare_variant_alt.
665 (input_overwrite_node): Read them back.
666 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
668 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
670 (tree_function_versioning): Copy calls_declare_variant_alt bit.
671 * omp-offload.c (execute_omp_device_lower): Call
672 omp_resolve_declare_variant on direct function calls.
673 (pass_omp_device_lower::gate): Also enable for
674 calls_declare_variant_alt functions.
675 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
676 (omp_context_selector_matches): Handle the case when
677 cfun->curr_properties has PROP_gimple_any bit set.
678 (struct omp_declare_variant_entry): New type.
679 (struct omp_declare_variant_base_entry): New type.
680 (struct omp_declare_variant_hasher): New type.
681 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
683 (omp_declare_variants): New variable.
684 (struct omp_declare_variant_alt_hasher): New type.
685 (omp_declare_variant_alt_hasher::hash,
686 omp_declare_variant_alt_hasher::equal): New methods.
687 (omp_declare_variant_alt): New variables.
688 (omp_resolve_late_declare_variant): New function.
689 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
690 when called late. Create a magic declare_variant_alt fndecl and
691 cgraph node and return that if decision needs to be deferred until
692 after gimplification.
693 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
697 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
698 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
699 entry block if info->after_stmt is NULL, otherwise add after that stmt
700 and update it after adding each stmt.
701 (ipa_simd_modify_function_body): Initialize info.after_stmt.
703 * function.h (struct function): Add has_omp_target bit.
704 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
706 (omp_discover_declare_target_tgt_fn_r): ... this.
707 (omp_discover_declare_target_var_r): Call
708 omp_discover_declare_target_tgt_fn_r instead of
709 omp_discover_declare_target_fn_r.
710 (omp_discover_implicit_declare_target): Also queue functions with
711 has_omp_target bit set, for those walk with
712 omp_discover_declare_target_fn_r, for declare target to functions
713 walk with omp_discover_declare_target_tgt_fn_r.
715 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
718 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
719 Add SSE/AVX alternative. Change operand predicates from
720 nonimmediate_operand to register_mmxmem_operand.
721 Enable instruction pattern for TARGET_MMX_WITH_SSE.
722 (fix_truncv2sfv2si2): New expander.
723 (fixuns_truncv2sfv2si2): New insn pattern.
725 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
726 Add SSE/AVX alternative. Change operand predicates from
727 nonimmediate_operand to register_mmxmem_operand.
728 Enable instruction pattern for TARGET_MMX_WITH_SSE.
729 (floatv2siv2sf2): New expander.
730 (floatunsv2siv2sf2): New insn pattern.
732 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
734 (IX86_BUILTIN_PI2FD): Ditto.
736 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
738 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
740 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
743 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
745 * config/s390/s390.c (allocate_stack_space): Add missing updates
746 of last_probe_offset.
748 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
750 * config/s390/s390.md ("allocate_stack"): Call
751 anti_adjust_stack_and_probe_stack_clash when stack clash
752 protection is enabled.
753 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
754 prototype. Remove static.
755 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
758 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
760 * config/rs6000/altivec.h (vec_extractl): New #define.
761 (vec_extracth): Likewise.
762 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
763 (UNSPEC_EXTRACTR): Likewise.
764 (vextractl<mode>): New expansion.
765 (vextractl<mode>_internal): New insn.
766 (vextractr<mode>): New expansion.
767 (vextractr<mode>_internal): New insn.
768 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
769 New built-in function.
770 (__builtin_altivec_vextduhvlx): Likewise.
771 (__builtin_altivec_vextduwvlx): Likewise.
772 (__builtin_altivec_vextddvlx): Likewise.
773 (__builtin_altivec_vextdubvhx): Likewise.
774 (__builtin_altivec_vextduhvhx): Likewise.
775 (__builtin_altivec_vextduwvhx): Likewise.
776 (__builtin_altivec_vextddvhx): Likewise.
777 (__builtin_vec_extractl): New overloaded built-in function.
778 (__builtin_vec_extracth): Likewise.
779 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
780 Define overloaded forms of __builtin_vec_extractl and
781 __builtin_vec_extracth.
782 (builtin_function_type): Add cases to mark arguments of new
783 built-in functions as unsigned.
784 (rs6000_common_init_builtins): Add
785 opaque_ftype_opaque_opaque_opaque_opaque.
786 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
787 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
788 for a Future Architecture): Add description of vec_extractl and
789 vec_extractr built-in functions.
791 2020-05-13 Richard Biener <rguenther@suse.de>
793 * target.def (add_stmt_cost): Add new vectype parameter.
794 * targhooks.c (default_add_stmt_cost): Adjust.
795 * targhooks.h (default_add_stmt_cost): Likewise.
796 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
798 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
799 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
800 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
802 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
803 (dump_stmt_cost): Add new vectype parameter.
804 (add_stmt_cost): Likewise.
805 (record_stmt_cost): Likewise.
806 (record_stmt_cost): Add overload with old signature.
807 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
809 (vect_get_known_peeling_cost): Likewise.
810 (vect_estimate_min_profitable_iters): Likewise.
811 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
812 * tree-vect-stmts.c (record_stmt_cost): Likewise.
813 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
814 and pass down correct vectype and NULL stmt_info.
815 (vect_model_simple_cost): Adjust.
816 (vect_model_store_cost): Likewise.
818 2020-05-13 Richard Biener <rguenther@suse.de>
820 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
821 (_slp_instance::group_size): Likewise.
822 * tree-vect-loop.c (vectorizable_reduction): The group size
823 is the number of lanes in the node.
824 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
825 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
826 verify it matches the instance trees number of lanes.
827 (vect_slp_analyze_node_operations_1): Use the numer of lanes
828 in the node as group size.
829 (vect_bb_vectorization_profitable_p): Use the instance root
830 number of lanes for the size of life.
831 (vect_schedule_slp_instance): Use the number of lanes as
833 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
834 parameter. Use the number of lanes of the load for the group
835 size in the gap adjustment code.
836 (vect_analyze_stmt): Adjust.
837 (vect_transform_stmt): Likewise.
839 2020-05-13 Jakub Jelinek <jakub@redhat.com>
842 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
843 if the last insn is a note.
845 PR tree-optimization/95060
846 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
847 if it is the single use of the FMA internal builtin.
849 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
851 PR tree-optimization/94969
852 * tree-data-dependence.c (constant_access_functions): Rename to...
853 (invariant_access_functions): ...this. Add parameter. Check for
854 invariant access function, rather than constant.
855 (build_classic_dist_vector): Call above function.
856 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
858 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
861 * doc/extend.texi (x86Operandmodifiers): Document more x86
863 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
865 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
867 * tree-vrp.c (class vrp_insert): New.
868 (insert_range_assertions): Move to class vrp_insert.
869 (dump_all_asserts): Same as above.
870 (dump_asserts_for): Same as above.
871 (live): Same as above.
872 (need_assert_for): Same as above.
873 (live_on_edge): Same as above.
874 (finish_register_edge_assert_for): Same as above.
875 (find_switch_asserts): Same as above.
876 (find_assert_locations): Same as above.
877 (find_assert_locations_1): Same as above.
878 (find_conditional_asserts): Same as above.
879 (process_assert_insertions): Same as above.
880 (register_new_assert_for): Same as above.
881 (vrp_prop): New variable fun.
882 (vrp_initialize): New parameter.
883 (identify_jump_threads): Same as above.
884 (execute_vrp): Same as above.
887 2020-05-12 Keith Packard <keith.packard@sifive.com>
889 * config/riscv/riscv.c (riscv_unique_section): New.
890 (TARGET_ASM_UNIQUE_SECTION): New.
892 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
894 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
895 * config/riscv/riscv-passes.def: New file.
896 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
897 * config/riscv/riscv-shorten-memrefs.c: New file.
898 * config/riscv/riscv.c (tree-pass.h): New include.
899 (riscv_compressed_reg_p): New Function
900 (riscv_compressed_lw_offset_p): Likewise.
901 (riscv_compressed_lw_address_p): Likewise.
902 (riscv_shorten_lw_offset): Likewise.
903 (riscv_legitimize_address): Attempt to convert base + large_offset
904 to compressible new_base + small_offset.
905 (riscv_address_cost): Make anticipated compressed load/stores
906 cheaper for code size than uncompressed load/stores.
907 (riscv_register_priority): Move compressed register check to
908 riscv_compressed_reg_p.
909 * config/riscv/riscv.h (C_S_BITS): Define.
910 (CSW_MAX_OFFSET): Define.
911 * config/riscv/riscv.opt (mshorten-memefs): New option.
912 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
913 (PASSES_EXTRA): Add riscv-passes.def.
914 * doc/invoke.texi: Document -mshorten-memrefs.
916 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
917 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
918 * doc/tm.texi: Regenerate.
919 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
920 * sched-deps.c (attempt_change): Use old address if it is cheaper than
922 * target.def (new_address_profitable_p): New hook.
923 * targhooks.c (default_new_address_profitable_p): New function.
924 * targhooks.h (default_new_address_profitable_p): Declare.
926 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
929 * config/i386/mmx.md (copysignv2sf3): New expander.
930 (xorsignv2sf3): Ditto.
931 (signbitv2sf3): Ditto.
933 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
936 * config/i386/mmx.md (fmav2sf4): New insn pattern.
941 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
943 * Makefile.in (CET_HOST_FLAGS): New.
944 (COMPILER): Add $(CET_HOST_FLAGS).
945 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
946 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
948 * aclocal.m4: Regenerated.
949 * configure: Likewise.
951 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
954 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
955 (*mmx_<code>v2sf2): New insn_and_split pattern.
956 (*mmx_nabsv2sf2): Ditto.
957 (*mmx_andnotv2sf3): New insn pattern.
958 (*mmx_<code>v2sf3): Ditto.
959 * config/i386/i386.md (absneg_op): New code attribute.
960 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
961 (ix86_build_signbit_mask): Ditto.
963 2020-05-12 Richard Biener <rguenther@suse.de>
965 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
968 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
970 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
971 Update prototype to include "local" argument.
972 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
973 "local" argument. Handle local common decls.
974 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
975 msp430_output_aligned_decl_common call with 0 for "local" argument.
976 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
978 2020-05-12 Richard Biener <rguenther@suse.de>
980 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
982 2020-05-12 Martin Liska <mliska@suse.cz>
986 * sanopt.c (sanitize_rewrite_addressable_params):
987 Clear DECL_NOT_GIMPLE_REG_P for argument.
989 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
991 PR tree-optimization/94980
992 * tree-vect-generic.c (expand_vector_comparison): Use
993 vector_element_bits_tree to get the element size in bits,
994 rather than using TYPE_SIZE.
995 (expand_vector_condition, vector_element): Likewise.
997 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
999 PR tree-optimization/94980
1000 * tree-vect-generic.c (build_replicated_const): Take the number
1001 of bits as a parameter, instead of the type of the elements.
1002 (do_plus_minus): Update accordingly, using vector_element_bits
1003 to calculate the correct number of bits.
1004 (do_negate): Likewise.
1006 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
1008 PR tree-optimization/94980
1009 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
1010 * tree.c (vector_element_bits, vector_element_bits_tree): New.
1011 * match.pd: Use the new functions instead of determining the
1012 vector element size directly from TYPE_SIZE(_UNIT).
1013 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
1014 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
1015 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
1016 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
1017 (expand_vector_conversion): Likewise.
1018 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
1019 a divisor. Convert the dividend to bits to compensate.
1020 * tree-vect-loop.c (vectorizable_live_operation): Call
1021 vector_element_bits instead of open-coding it.
1023 2020-05-12 Jakub Jelinek <jakub@redhat.com>
1025 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
1026 * omp-offload.c: Include context.h.
1027 (omp_declare_target_fn_p, omp_declare_target_var_p,
1028 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
1029 omp_discover_implicit_declare_target): New functions.
1030 * cgraphunit.c (analyze_functions): Call
1031 omp_discover_implicit_declare_target.
1033 2020-05-12 Richard Biener <rguenther@suse.de>
1035 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
1036 literal constant &MEM[..] to a constant literal.
1038 2020-05-12 Richard Biener <rguenther@suse.de>
1040 PR tree-optimization/95045
1041 * dbgcnt.def (lim): Add debug-counter.
1042 * tree-ssa-loop-im.c: Include dbgcnt.h.
1043 (find_refs_for_sm): Use lim debug counter for store motion
1045 (do_store_motion): Rename form store_motion. Commit edge
1047 (store_motion_loop): ... here.
1048 (tree_ssa_lim): Adjust.
1050 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1052 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
1053 (vec_ctzm): Rename to vec_cnttzm.
1054 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
1055 Change fourth operand for vec_ternarylogic to require
1056 compatibility with unsigned SImode rather than unsigned QImode.
1057 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1058 Remove overloaded forms of vec_gnb that are no longer needed.
1059 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1060 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
1061 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
1062 vec_gnb; move vec_ternarylogic documentation into this section
1063 and replace const unsigned char with const unsigned int as its
1066 2020-05-11 Carl Love <cel@us.ibm.com>
1068 * config/rs6000/altivec.h (vec_genpcvm): New #define.
1069 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
1071 (XXGENPCVM_V8HI): Likewise.
1072 (XXGENPCVM_V4SI): Likewise.
1073 (XXGENPCVM_V2DI): Likewise.
1074 (XXGENPCVM): New overloaded built-in instantiation.
1075 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
1076 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
1077 (altivec_expand_builtin): Add special handling for
1078 FUTURE_BUILTIN_VEC_XXGENPCVM.
1079 (builtin_function_type): Add handling for
1080 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
1081 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
1082 (UNSPEC_XXGENPCV): New constant.
1083 (xxgenpcvm_<mode>_internal): New insn.
1084 (xxgenpcvm_<mode>): New expansion.
1085 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
1087 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1089 * config/rs6000/altivec.h (vec_strir): New #define.
1090 (vec_stril): Likewise.
1091 (vec_strir_p): Likewise.
1092 (vec_stril_p): Likewise.
1093 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
1094 (UNSPEC_VSTRIL): Likewise.
1095 (vstrir_<mode>): New expansion.
1096 (vstrir_code_<mode>): New insn.
1097 (vstrir_p_<mode>): New expansion.
1098 (vstrir_p_code_<mode>): New insn.
1099 (vstril_<mode>): New expansion.
1100 (vstril_code_<mode>): New insn.
1101 (vstril_p_<mode>): New expansion.
1102 (vstril_p_code_<mode>): New insn.
1103 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
1104 New built-in function.
1105 (__builtin_altivec_vstrihr): Likewise.
1106 (__builtin_altivec_vstribl): Likewise.
1107 (__builtin_altivec_vstrihl): Likewise.
1108 (__builtin_altivec_vstribr_p): Likewise.
1109 (__builtin_altivec_vstrihr_p): Likewise.
1110 (__builtin_altivec_vstribl_p): Likewise.
1111 (__builtin_altivec_vstrihl_p): Likewise.
1112 (__builtin_vec_strir): New overloaded built-in function.
1113 (__builtin_vec_stril): Likewise.
1114 (__builtin_vec_strir_p): Likewise.
1115 (__builtin_vec_stril_p): Likewise.
1116 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1117 Define overloaded forms of __builtin_vec_strir,
1118 __builtin_vec_stril, __builtin_vec_strir_p, and
1119 __builtin_vec_stril_p.
1120 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1121 for a Future Architecture): Add description of vec_stril,
1122 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
1124 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
1126 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
1127 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
1129 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
1130 * config/rs6000/rs6000-builtin.def: Add handling of new macro
1132 (BU_FUTURE_V_4): New macro. Use it.
1133 (BU_FUTURE_OVERLOAD_4): Likewise.
1134 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
1135 handling for quaternary built-in functions.
1136 (altivec_resolve_overloaded_builtin): Add special-case handling
1137 for __builtin_vec_xxeval.
1138 * config/rs6000/rs6000-call.c: Add handling of new macro
1139 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
1140 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
1141 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
1142 (altivec_overloaded_builtins): Add definitions for
1143 FUTURE_BUILTIN_VEC_XXEVAL.
1144 (bdesc_4arg): New array.
1145 (htm_expand_builtin): Add handling for quaternary built-in
1147 (rs6000_expand_quaternop_builtin): New function.
1148 (rs6000_expand_builtin): Add handling for quaternary built-in
1150 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
1151 for unsigned QImode and unsigned HImode.
1152 (builtin_quaternary_function_type): New function.
1153 (rs6000_common_init_builtins): Add handling of quaternary
1155 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
1157 (RS6000_BTC_PREDICATE): Change value of constant.
1158 (RS6000_BTC_ABS): Likewise.
1159 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
1160 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
1161 for a Future Architecture): Add description of vec_ternarylogic
1164 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1166 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
1168 (__builtin_pextd): Likewise.
1169 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
1170 (UNSPEC_PEXTD): Likewise.
1173 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1174 a Future Architecture): Add descriptions of __builtin_pdepd and
1175 __builtin_pextd functions.
1177 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1179 * config/rs6000/altivec.h (vec_clrl): New #define.
1180 (vec_clrr): Likewise.
1181 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
1182 (UNSPEC_VCLRRB): Likewise.
1185 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
1187 (__builtin_altivec_vclrrb): Likewise.
1188 (__builtin_vec_clrl): New overloaded built-in function.
1189 (__builtin_vec_clrr): Likewise.
1190 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1191 Define overloaded forms of __builtin_vec_clrl and
1193 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1194 for a Future Architecture): Add descriptions of vec_clrl and
1197 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1199 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
1200 built-in function definition.
1201 (__builtin_cnttzdm): Likewise.
1202 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
1203 (UNSPEC_CNTTZDM): Likewise.
1204 (cntlzdm): New insn.
1205 (cnttzdm): Likewise.
1206 * doc/extend.texi (Basic PowerPC Built-in Functions available for
1207 a Future Architecture): Add descriptions of __builtin_cntlzdm and
1208 __builtin_cnttzdm functions.
1210 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1213 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
1215 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1217 * config/rs6000/altivec.h (vec_cfuge): New #define.
1218 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
1219 (vcfuged): New insn.
1220 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
1221 New built-in function.
1222 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1223 handling for FUTURE_BUILTIN_VCFUGED case.
1224 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1225 for a Future Architecture): Add description of vec_cfuge built-in
1228 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1230 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
1232 (BU_FUTURE_MISC_1): Likewise.
1233 (BU_FUTURE_MISC_2): Likewise.
1234 (BU_FUTURE_MISC_3): Likewise.
1235 (__builtin_cfuged): New built-in function definition.
1236 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
1238 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
1239 a Future Architecture): New subsubsection.
1241 2020-05-11 Richard Biener <rguenther@suse.de>
1243 PR tree-optimization/95049
1244 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
1245 between different constants.
1247 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
1249 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
1251 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1252 Bill Schmidt <wschmidt@linux.ibm.com>
1254 * config/rs6000/altivec.h (vec_gnb): New #define.
1255 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
1257 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
1259 (BU_FUTURE_OVERLOAD_2): Likewise.
1260 (BU_FUTURE_OVERLOAD_3): Likewise.
1261 (__builtin_altivec_gnb): New built-in function.
1262 (__buiiltin_vec_gnb): New overloaded built-in function.
1263 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
1264 Define overloaded forms of __builtin_vec_gnb.
1265 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
1266 of __builtin_vec_gnb.
1267 (builtin_function_type): Mark return value and arguments unsigned
1268 for FUTURE_BUILTIN_VGNB.
1269 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
1270 for a Future Architecture): Add description of vec_gnb built-in
1273 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1274 Bill Schmidt <wschmidt@linux.ibm.com>
1276 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
1278 (vec_pext): Likewise.
1279 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
1280 (UNSPEC_VPEXTD): Likewise.
1283 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
1285 (__builtin_altivec_vpextd): Likewise.
1286 * config/rs6000/rs6000-call.c (builtin_function_type): Add
1287 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
1289 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1290 for a Future Architecture): Add description of vec_pdep and
1291 vec_pext built-in functions.
1293 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
1294 Bill Schmidt <wschmidt@linux.ibm.com>
1296 * config/rs6000/altivec.h (vec_clzm): New macro.
1297 (vec_ctzm): Likewise.
1298 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
1299 (UNSPEC_VCTZDM): Likewise.
1302 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
1303 (BU_FUTURE_V_1): Likewise.
1304 (BU_FUTURE_V_2): Likewise.
1305 (BU_FUTURE_V_3): Likewise.
1306 (__builtin_altivec_vclzdm): New builtin definition.
1307 (__builtin_altivec_vctzdm): Likewise.
1308 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
1309 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
1311 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
1312 value and parameter types to be unsigned for VCLZDM and VCTZDM.
1313 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
1314 support for TARGET_FUTURE flag.
1315 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
1316 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
1317 for a Future Architecture): New subsubsection.
1319 2020-05-11 Richard Biener <rguenther@suse.de>
1321 PR tree-optimization/94988
1322 PR tree-optimization/95025
1323 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
1324 (sm_seq_push_down): Take extra parameter denoting where we
1326 (execute_sm_exit): Re-issue sm_other stores in the correct
1328 (sm_seq_valid_bb): When always executed, allow sm_other to
1329 prevail inbetween sm_ord and record their stored value.
1330 (hoist_memory_references): Adjust refs_not_supported propagation
1331 and prune sm_other from the end of the ordered sequences.
1333 2020-05-11 Felix Yang <felix.yang@huawei.com>
1336 * config/aarch64/aarch64.md (mov<mode>):
1337 Bitcasts to the equivalent integer mode using gen_lowpart
1338 instead of doing FAIL for scalar floating point move.
1340 2020-05-11 Alex Coplan <alex.coplan@arm.com>
1342 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
1343 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
1344 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
1345 (*csinv3_uxtw_insn2): New.
1346 (*csinv3_uxtw_insn3): New.
1347 * config/aarch64/iterators.md (neg_not_cs): New.
1349 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1352 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
1353 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
1354 (*mmx_addv2sf3): Ditto.
1355 (*mmx_subv2sf3): Ditto.
1356 (*mmx_mulv2sf3): Ditto.
1357 (*mmx_<code>v2sf3): Ditto.
1358 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1360 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
1363 * config/i386/i386.c (ix86_vector_mode_supported_p):
1364 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
1365 * config/i386/mmx.md (*mov<mode>_internal): Do not set
1366 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
1368 (mmx_addv2sf3): Change operand predicates from
1369 nonimmediate_operand to register_mmxmem_operand.
1370 (addv2sf3): New expander.
1371 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
1372 predicates from nonimmediate_operand to register_mmxmem_operand.
1373 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1375 (mmx_subv2sf3): Change operand predicate from
1376 nonimmediate_operand to register_mmxmem_operand.
1377 (mmx_subrv2sf3): Ditto.
1378 (subv2sf3): New expander.
1379 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
1380 predicates from nonimmediate_operand to register_mmxmem_operand.
1381 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1383 (mmx_mulv2sf3): Change operand predicates from
1384 nonimmediate_operand to register_mmxmem_operand.
1385 (mulv2sf3): New expander.
1386 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
1387 predicates from nonimmediate_operand to register_mmxmem_operand.
1388 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1390 (mmx_<code>v2sf3): Change operand predicates from
1391 nonimmediate_operand to register_mmxmem_operand.
1392 (<code>v2sf3): New expander.
1393 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
1394 predicates from nonimmediate_operand to register_mmxmem_operand.
1395 Enable instruction pattern for TARGET_MMX_WITH_SSE.
1396 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
1398 2020-05-11 Martin Liska <mliska@suse.cz>
1401 * common.opt: Fix typo in option description.
1403 2020-05-11 Martin Liska <mliska@suse.cz>
1405 PR gcov-profile/94928
1406 * gcov-io.h: Add caveat about coverage format parsing and
1407 possible outdated documentation.
1409 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
1411 PR tree-optimization/83403
1412 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
1413 determine_value_range, Add fold conversion of MULT_EXPR, fix the
1416 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
1418 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
1419 __ILP32__ for 32-bit targets.
1421 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
1423 * tree.h (expr_align): Delete.
1424 * tree.c (expr_align): Likewise.
1426 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
1428 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
1429 from end_of_function_needs.
1431 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
1432 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
1434 * config/cris/t-elfmulti: Remove crisv32 multilib.
1435 * config/cris: Remove shared-library and CRIS v32 support.
1437 Move trivially from cc0 to reg:CC model, removing most optimizations.
1438 * config/cris/cris.md: Remove all side-effect patterns and their
1439 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
1440 to all but post-reload control-flow and movem insns. Remove
1441 constraints on all modified expanders. Remove obsoleted cc0-related
1443 (attr "cc"): Remove alternative "rev".
1444 (mode_iterator BWDD, DI_, SI_): New.
1445 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
1446 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
1447 ("mstep_shift", "mstep_mul"): Remove patterns.
1448 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
1449 * config/cris/cris.c: Change all non-condition-code,
1450 non-control-flow emitted insns to add a parallel with clobber of
1451 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
1452 emit_insn to use of emit_move_insn, gen_add2_insn or
1453 cris_emit_insn, as convenient.
1454 (cris_reg_overlap_mentioned_p)
1455 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
1456 (cris_movem_load_rest_p): Don't assume all elements in a
1458 (cris_store_multiple_op_p): Ditto.
1459 (cris_emit_insn): New function.
1460 * cris/cris-protos.h (cris_emit_insn): Declare.
1463 * config/cris/cris.md (zcond): New code_iterator.
1464 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
1466 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
1468 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
1470 * config/cris/cris.md ("movsi"): For memory destination
1471 post-reload, generate clobberless variant. Similarly for a
1472 zero-source post-reload.
1473 ("*mov_tomem<mode>_split"): New split.
1474 ("*mov_tomem<mode>"): New insn.
1475 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
1476 "Q>m" for less-than-SImode.
1477 ("*mov_fromzero<mode>_split"): New split.
1478 ("*mov_fromzero<mode>"): New insn.
1480 Prepare for cmpelim pass to eliminate redundant compare insns.
1481 * config/cris/cris-modes.def: New file.
1482 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
1483 (cris_notice_update_cc): Remove left-over declaration.
1484 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
1485 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
1486 * config/cris/cris.h (SELECT_CC_MODE): Define.
1487 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
1489 (cond): New code_iterator.
1490 (nzcond): Replacement for incorrect ncond. All callers changed.
1491 (nzvccond): Replacement for ocond. All callers changed.
1492 (rnzcond): Replacement for rcond. All callers changed.
1493 (xCC): New code_attr.
1494 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
1496 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
1497 CCmode with iteration over NZVCSET.
1498 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
1500 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
1501 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
1502 ("*btst<mode>"): Similarly, from "*btst".
1503 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
1504 iterating over cond instead of matching the comparison with
1505 ordered_comparison_operator.
1506 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
1507 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
1509 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
1510 NZVCUSE. Remove FIXME.
1511 ("*b<nzcond:code>_reversed<mode>"): Similarly from
1512 "*b<ncond:code>_reversed", over NZUSE.
1513 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
1514 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
1515 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
1516 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1517 depending on CC_NZmode vs. CCmode. Remove FIXME.
1518 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
1519 "*b<rcond:code>_reversed", over NZUSE.
1520 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
1521 iterating over cond instead of matching the comparison with
1522 ordered_comparison_operator.
1523 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
1524 iterating over NZUSE.
1525 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
1526 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
1527 depending on CC_NZmode vs. CCmode.
1528 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
1529 NZVCUSE. Remove FIXME.
1530 ("cc"): Comment on new use.
1531 ("cc_enabled"): New attribute.
1532 ("enabled"): Make default fall back to cc_enabled.
1533 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
1534 default_subst_attrs.
1535 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
1536 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
1537 "*movsi_internal". Correct contents of, and rename attribute
1538 "cc" to "cc<cccc><ccnz><ccnzvc>".
1539 ("anz", "anzvc", "acc"): New define_subst_attrs.
1540 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
1541 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
1542 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
1543 "movqi". Correct contents of, and rename "cc" attribute to
1544 "cc<cccc><ccnz><ccnzvc>".
1545 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
1546 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
1547 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
1548 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
1549 Rename from "extend<mode>si2".
1550 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
1551 Similar, from "zero_extend<mode>si2".
1552 ("*adddi3<setnz>"): Rename from "*adddi3".
1553 ("*subdi3<setnz>"): Similarly from "*subdi3".
1554 ("*addsi3<setnz>"): Similarly from "*addsi3".
1555 ("*subsi3<setnz>"): Similarly from "*subsi3".
1556 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
1557 "cc" attribute to "cc<ccnz>".
1558 ("*addqi3<setnz>"): Similarly from "*addqi3".
1559 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
1560 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
1562 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
1563 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
1564 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
1565 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
1566 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
1567 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
1568 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
1569 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
1571 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
1573 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
1575 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
1577 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
1579 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
1581 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
1582 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
1583 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
1584 (znnCC, rznnCC): New code_attrs.
1585 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
1586 obseolete comment. Add belt-and-suspenders mode-test to condition.
1587 Add fixme regarding remaining matched-but-not-generated case.
1588 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
1589 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
1590 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
1591 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
1592 Handle output of CC_ZnNmode.
1593 ("*b<nzcond:code>_reversed<mode>"): Ditto.
1595 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
1596 NEG too. Correct comment.
1597 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
1600 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
1602 * ira-color.c (update_costs_from_allocno): Remove
1603 conflict_cost_update_p argument. Propagate costs only along
1604 threads. Always do conflict cost update. Add printing debugging
1606 (update_costs_from_copies): Add printing debugging info.
1607 (restore_costs_from_copies): Ditto.
1608 (assign_hard_reg): Improve debug info.
1609 (push_only_colorable): Ditto. Call update_costs_from_prefs.
1610 (color_allocnos): Remove update_costs_from_prefs.
1612 2020-05-08 Richard Biener <rguenther@suse.de>
1614 * tree-vectorizer.h (vec_info::slp_loads): New.
1615 (vect_optimize_slp): Declare.
1616 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
1617 nothing when there are no loads.
1618 (vect_gather_slp_loads): Gather loads into a vector.
1619 (vect_supported_load_permutation_p): Remove.
1620 (vect_analyze_slp_instance): Do not verify permutation
1622 (vect_analyze_slp): Optimize permutations of reductions
1623 after all SLP instances have been gathered and gather
1625 (vect_optimize_slp): New function split out from
1626 vect_supported_load_permutation_p. Elide some permutations.
1627 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
1628 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
1629 * tree-vect-stmts.c (vectorizable_load): Check whether
1630 the load can be permuted. When generating code assert we can.
1632 2020-05-08 Richard Biener <rguenther@suse.de>
1634 * tree-ssa-sccvn.c (rpo_avail): Change type to
1635 eliminate_dom_walker *.
1636 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
1637 use the DOM walker availability.
1638 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
1639 with vn_valueize as valueization callback.
1640 (vn_reference_maybe_forwprop_address): Likewise.
1641 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
1642 array_ref_low_bound.
1644 2020-05-08 Jakub Jelinek <jakub@redhat.com>
1646 PR tree-optimization/94786
1647 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
1651 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
1655 * tree.c (get_narrower): Reuse the op temporary instead of
1658 PR tree-optimization/94783
1659 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
1662 PR tree-optimization/94956
1663 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
1664 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
1666 PR tree-optimization/94913
1667 * match.pd (A - B + -1 >= A to B >= A): New simplification.
1668 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
1669 true for TYPE_UNSIGNED integral types.
1672 PR rtl-optimization/94516
1673 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
1675 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
1676 Call df_notes_rescan if that argument is not true and returning true.
1677 * combine.c (adjust_for_new_dest): Pass true as second argument to
1678 remove_reg_equal_equiv_notes.
1679 * postreload.c (reload_combine_recognize_pattern): Don't call
1682 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1684 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
1686 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
1687 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
1688 (*neg_ne_<mode>): Likewise.
1690 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
1692 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
1694 (*setbcr_<un>signed_<GPR:mode>): Likewise.
1695 (cstore<mode>4): Use setbc[r] if available.
1696 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
1697 (eq<mode>3): Use setbc for TARGET_FUTURE.
1698 (*eq<mode>3): Avoid for TARGET_FUTURE.
1699 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
1700 else for non-Pmode, use gen_eq and gen_xor.
1701 (*ne<mode>3): Avoid for TARGET_FUTURE.
1702 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
1704 2020-05-07 Jeff Law <law@redhat.com>
1706 * config/h8300/h8300.md: Move expanders and patterns into
1707 files based on functionality.
1708 * config/h8300/addsub.md: New file.
1709 * config/h8300/bitfield.md: New file
1710 * config/h8300/combiner.md: New file
1711 * config/h8300/divmod.md: New file
1712 * config/h8300/extensions.md: New file
1713 * config/h8300/jumpcall.md: New file
1714 * config/h8300/logical.md: New file
1715 * config/h8300/movepush.md: New file
1716 * config/h8300/multiply.md: New file
1717 * config/h8300/other.md: New file
1718 * config/h8300/proepi.md: New file
1719 * config/h8300/shiftrotate.md: New file
1720 * config/h8300/testcompare.md: New file
1722 * config/h8300/h8300.md (adds/subs splitters): Merge into single
1724 (negation expanders and patterns): Simplify and combine using
1726 (one_cmpl expanders and patterns): Likewise.
1727 (tablejump, indirect_jump patterns ): Likewise.
1728 (shift and rotate expanders and patterns): Likewise.
1729 (absolute value expander and pattern): Drop expander, rename pattern
1731 (peephole2 patterns): Move into...
1732 * config/h8300/peepholes.md: New file.
1734 * config/h8300/constraints.md (L and N): Simplify now that we're not
1735 longer supporting the original H8/300 chip.
1736 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
1737 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
1738 (shift_alg_hi, shift_alg_si): Similarly.
1739 (h8300_option_overrides): Similarly. Default to H8/300H. If
1740 compiling for H8/S, then turn off H8/300H. Do not update the
1741 shift_alg tables for H8/300 port.
1742 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
1744 (push, split_adds_subs, h8300_rtx_costs): Likewise.
1745 (h8300_print_operand, compute_mov_length): Likewise.
1746 (output_plussi, compute_plussi_length): Likewise.
1747 (compute_plussi_cc, output_logical_op): Likewise.
1748 (compute_logical_op_length, compute_logical_op_cc): Likewise.
1749 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
1750 (output_a_shift, compute_a_shift_length): Likewise.
1751 (output_a_rotate, compute_a_rotate_length): Likewise.
1752 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
1753 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
1754 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
1755 (attr_cpu, TARGET_H8300): Remove.
1756 (TARGET_DEFAULT): Update.
1757 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
1758 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
1759 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
1760 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
1761 * config/h8300/h8300.md: Simplify patterns throughout.
1762 * config/h8300/t-h8300: Update multilib configuration.
1764 * config/h8300/h8300.h (LINK_SPEC): Remove.
1765 (USER_LABEL_PREFIX): Likewise.
1767 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
1768 (h8300_option_override): Remove remnants of COFF support.
1770 2020-05-07 Alan Modra <amodra@gmail.com>
1772 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
1773 set_rtx_cost with set_src_cost.
1774 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
1776 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
1778 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
1779 redundant half vector handlings for no peeling gaps.
1781 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
1783 * tree-ssa-operands.c (operands_scanner): New class.
1784 (operands_bitmap_obstack): Remove.
1785 (n_initialized): Remove.
1786 (build_uses): Move to operands_scanner class.
1787 (build_vuse): Same as above.
1788 (build_vdef): Same as above.
1789 (verify_ssa_operands): Same as above.
1790 (finalize_ssa_uses): Same as above.
1791 (cleanup_build_arrays): Same as above.
1792 (finalize_ssa_stmt_operands): Same as above.
1793 (start_ssa_stmt_operands): Same as above.
1794 (append_use): Same as above.
1795 (append_vdef): Same as above.
1796 (add_virtual_operand): Same as above.
1797 (add_stmt_operand): Same as above.
1798 (get_mem_ref_operands): Same as above.
1799 (get_tmr_operands): Same as above.
1800 (maybe_add_call_vops): Same as above.
1801 (get_asm_stmt_operands): Same as above.
1802 (get_expr_operands): Same as above.
1803 (parse_ssa_operands): Same as above.
1804 (finalize_ssa_defs): Same as above.
1805 (build_ssa_operands): Same as above, plus create a C-like wrapper.
1806 (update_stmt_operands): Create an instance of operands_scanner.
1808 2020-05-07 Richard Biener <rguenther@suse.de>
1811 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
1812 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
1813 (refered_from_nonlocal_var): Likewise.
1814 (ipa_pta_execute): Likewise.
1816 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
1818 * gcc/tree-ssa-struct-alias.c: Fix comments
1820 2020-05-07 Martin Liska <mliska@suse.cz>
1822 * doc/invoke.texi: Fix 2 optindex entries.
1824 2020-05-07 Richard Biener <rguenther@suse.de>
1827 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
1828 (tree_decl_common::not_gimple_reg_flag): ... to this.
1829 * tree.h (DECL_GIMPLE_REG_P): Rename ...
1830 (DECL_NOT_GIMPLE_REG_P): ... to this.
1831 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
1832 (create_tmp_reg): Simplify.
1833 (create_tmp_reg_fn): Likewise.
1834 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
1835 * gimplify.c (create_tmp_from_val): Simplify.
1836 (gimplify_bind_expr): Likewise.
1837 (gimplify_compound_literal_expr): Likewise.
1838 (gimplify_function_tree): Likewise.
1839 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
1840 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
1841 (asan_add_global): Copy it.
1842 * cgraphunit.c (cgraph_node::expand_thunk): Force args
1844 * function.c (gimplify_parameters): Copy
1845 DECL_NOT_GIMPLE_REG_P.
1846 * ipa-param-manipulation.c
1847 (ipa_param_body_adjustments::common_initialization): Simplify.
1848 (ipa_param_body_adjustments::reset_debug_stmts): Copy
1849 DECL_NOT_GIMPLE_REG_P.
1850 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
1851 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
1852 * tree-cfg.c (make_blocks_1): Simplify.
1853 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
1854 * tree-eh.c (lower_eh_constructs_2): Simplify.
1855 * tree-inline.c (declare_return_variable): Adjust and
1857 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
1858 (copy_result_decl_to_var): Likewise.
1859 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
1860 * tree-nested.c (create_tmp_var_for): Simplify.
1861 * tree-parloops.c (separate_decls_in_region_name): Copy
1862 DECL_NOT_GIMPLE_REG_P.
1863 * tree-sra.c (create_access_replacement): Adjust and
1864 generalize partial def support.
1865 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
1866 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
1867 * tree-ssa.c (maybe_optimize_var): Handle clearing of
1868 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
1870 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
1871 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
1872 DECL_NOT_GIMPLE_REG_P.
1873 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
1874 * cfgexpand.c (avoid_type_punning_on_regs): New.
1875 (discover_nonconstant_array_refs): Call
1876 avoid_type_punning_on_regs to avoid unsupported mode punning.
1878 2020-05-07 Alex Coplan <alex.coplan@arm.com>
1880 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
1883 2020-05-07 Richard Biener <rguenther@suse.de>
1885 PR tree-optimization/57359
1886 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
1887 (in_mem_ref::dep_loop): Repurpose.
1888 (LOOP_DEP_BIT): Remove.
1889 (enum dep_kind): New.
1890 (enum dep_state): Likewise.
1891 (record_loop_dependence): New function to populate the
1893 (query_loop_dependence): New function to query the dependence
1895 (memory_accesses::refs_in_loop): Rename to ...
1896 (memory_accesses::refs_loaded_in_loop): ... this and change to
1898 (outermost_indep_loop): Adjust.
1899 (mem_ref_alloc): Likewise.
1900 (gather_mem_refs_stmt): Likewise.
1901 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
1902 (struct sm_aux): New.
1903 (execute_sm): Split code generation on exits, record state
1905 (enum sm_kind): New.
1906 (execute_sm_exit): Exit code generation part.
1907 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
1908 dependence checking on stores reached from exits.
1909 (sm_seq_valid_bb): New function gathering SM stores on exits.
1910 (hoist_memory_references): Re-implement.
1911 (refs_independent_p): Add tbaa_p parameter and pass it down.
1912 (record_dep_loop): Remove.
1913 (ref_indep_loop_p_1): Fold into ...
1914 (ref_indep_loop_p): ... this and generalize for three kinds
1915 of dependence queries.
1916 (can_sm_ref_p): Adjust according to hoist_memory_references
1918 (store_motion_loop): Don't do anything if the set of SM
1919 candidates is empty.
1920 (tree_ssa_lim_initialize): Adjust.
1921 (tree_ssa_lim_finalize): Likewise.
1923 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
1924 Pierre-Marie de Rodat <derodat@adacore.com>
1926 * dwarf2out.c (add_data_member_location_attribute): Take into account
1927 the variant part offset in the computation of the data bit offset.
1928 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
1929 in the call to field_byte_offset.
1930 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
1931 confusing assertion.
1932 (analyze_variant_discr): Deal with boolean subtypes.
1934 2020-05-07 Martin Liska <mliska@suse.cz>
1936 * lto-wrapper.c: Split arguments of MAKE environment
1939 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
1941 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
1942 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
1943 fenv_var and new_fenv_var.
1945 2020-05-06 Jakub Jelinek <jakub@redhat.com>
1948 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
1950 (avx512dq_vextract<shuffletype>64x2_1_maskm,
1951 avx512f_vextract<shuffletype>32x4_1_maskm,
1952 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
1953 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
1955 (*avx512dq_vextract<shuffletype>64x2_1,
1956 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
1957 define_insns. Even in the masked variant allow memory output but in
1958 that case use 0 rather than 0C constraint on the source of masked-out
1960 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
1962 (*avx512f_vextract<shuffletype>32x4_1,
1963 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
1964 Even in the masked variant allow memory output but in that case use
1965 0 rather than 0C constraint on the source of masked-out elts.
1966 (vec_extract_lo_<mode><mask_name>): Split into ...
1967 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
1968 define_insns. Even in the masked variant allow memory output but in
1969 that case use 0 rather than 0C constraint on the source of masked-out
1971 (vec_extract_hi_<mode><mask_name>): Split into ...
1972 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
1973 define_insns. Even in the masked variant allow memory output but in
1974 that case use 0 rather than 0C constraint on the source of masked-out
1977 2020-05-06 qing zhao <qing.zhao@oracle.com>
1980 * common.opt: Add -flarge-source-files.
1981 * doc/invoke.texi: Document it.
1982 * toplev.c (process_options): set line_table->default_range_bits
1983 to 0 when flag_large_source_files is true.
1985 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
1988 * config/i386/predicates.md (add_comparison_operator): New predicate.
1989 * config/i386/i386.md (compare->add splitter): New splitters.
1991 2020-05-06 Richard Biener <rguenther@suse.de>
1993 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
1994 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
1995 Remove slp_instance parameter, just iterate over all scalar stmts.
1996 (vect_slp_analyze_instance_dependence): Adjust and likewise.
1997 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
1999 (vect_schedule_slp): Just iterate over all scalar stmts.
2000 (vect_supported_load_permutation_p): Adjust.
2001 (vect_transform_slp_perm_load): Remove slp_instance parameter,
2002 instead use the number of lanes in the node as group size.
2003 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
2004 factor instead of slp_instance as parameter.
2005 (vectorizable_load): Adjust.
2007 2020-05-06 Andreas Schwab <schwab@suse.de>
2009 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
2010 (aarch64_get_extension_string_for_isa_flags): Don't declare.
2012 2020-05-06 Richard Biener <rguenther@suse.de>
2015 * cfgloopmanip.c (create_preheader): Require non-complex
2016 preheader edge for CP_SIMPLE_PREHEADERS.
2018 2020-05-06 Richard Biener <rguenther@suse.de>
2020 PR tree-optimization/94963
2021 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
2022 no-warning marking of the conditional store.
2023 (execute_sm): Instead mark the uninitialized state
2024 on loop entry to be not warned about.
2026 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2028 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
2029 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
2030 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
2031 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2033 * config/i386/i386-builtin.def: Add new builtins.
2034 * config/i386/i386-c.c (ix86_target_macros_internal): Define
2036 * config/i386/i386-options.c (ix86_target_string): Add
2038 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
2039 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
2041 * config/i386/i386.md (define_c_enum "unspec"): Add
2042 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
2043 (TSXLDTRK): New define_int_iterator.
2044 ("<tsxldtrk>"): New define_insn.
2045 * config/i386/i386.opt: Add -mtsxldtrk.
2046 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
2047 * config/i386/tsxldtrkintrin.h: New.
2048 * doc/invoke.texi: Document -mtsxldtrk.
2050 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2052 PR tree-optimization/94921
2053 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
2056 2020-05-06 Richard Biener <rguenther@suse.de>
2058 PR tree-optimization/94965
2059 * tree-vect-stmts.c (vectorizable_load): Fix typo.
2061 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2063 * doc/install.texi: Replace Sun with Solaris as appropriate.
2064 (Tools/packages necessary for building GCC, Perl version between
2065 5.6.1 and 5.6.24): Remove Solaris 8 reference.
2066 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
2068 (Specific, i?86-*-solaris2*): Update version references for
2069 Solaris 11.3 and later. Remove gas 2.26 caveat.
2070 (Specific, *-*-solaris2*): Update version references for
2071 Solaris 11.3 and later. Remove boehm-gc reference.
2072 Document GMP, MPFR caveats on Solaris 11.3.
2073 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
2074 (Specific, sparc64-*-solaris2*): Likewise.
2075 Document --build requirement.
2077 2020-05-06 Jakub Jelinek <jakub@redhat.com>
2080 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
2081 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
2083 PR rtl-optimization/94873
2084 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
2085 note if SET_SRC (set) has side-effects.
2087 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
2088 Wei Xiao <wei3.xiao@intel.com>
2090 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
2091 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
2092 (ix86_handle_option): Handle -mserialize.
2093 * config.gcc (serializeintrin.h): New header file.
2094 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
2095 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2097 * config/i386/i386-builtin.def: Add new builtin.
2098 * config/i386/i386-c.c (__SERIALIZE__): New macro.
2099 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
2101 * (ix86_valid_target_attribute_inner_p): Add target attribute
2103 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
2105 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
2106 (serialize): New define_insn.
2107 * config/i386/i386.opt (mserialize): New option
2108 * config/i386/immintrin.h: Include serailizeintrin.h.
2109 * config/i386/serializeintrin.h: New header file.
2110 * doc/invoke.texi: Add documents for -mserialize.
2112 2020-05-06 Richard Biener <rguenther@suse.de>
2114 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
2115 to/from pointer conversion checking.
2117 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
2119 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
2121 * config/rs6000/rs6000-c.c: Likewise.
2122 * config/rs6000/rs6000-call.c: Likewise.
2123 * config/rs6000/rs6000.c: Likewise.
2125 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2127 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
2128 (RTEMS_ENDFILE_SPEC): Likewise.
2129 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
2130 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
2131 (LIB_SPECS): Support -nodefaultlibs option.
2132 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
2133 (RTEMS_ENDFILE_SPEC): Likewise.
2134 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2135 (RTEMS_ENDFILE_SPEC): Likewise.
2136 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
2137 (RTEMS_ENDFILE_SPEC): Likewise.
2139 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2141 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
2142 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
2144 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2146 * config/pru/pru.h: Mark R3.w0 as caller saved.
2148 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2150 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
2151 and gen_doloop_begin_internal.
2152 (pru_reorg_loop): Use gen_pruloop with mode.
2153 * config/pru/pru.md: Use new @insn syntax.
2155 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
2157 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
2159 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2161 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
2162 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
2163 (addqi3_cconly_overflow): Ditto.
2164 (umulv<mode>4): Ditto.
2165 (<s>mul<mode>3_highpart): Ditto.
2166 (tls_global_dynamic_32): Ditto.
2167 (tls_local_dynamic_base_32): Ditto.
2174 (*adddi_4): Remove "m" constraint from scratch operand.
2175 (*add<mode>_4): Ditto.
2177 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2179 PR rtl-optimization/94516
2180 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
2181 with sp = reg, add REG_EQUAL note with sp + const.
2182 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
2183 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
2184 postreload sp = sp + const to sp = reg optimization if needed and
2186 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
2187 reg = sp insn with sp + const REG_EQUAL note. Adjust
2188 try_apply_stack_adjustment caller, call
2189 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
2190 (combine_stack_adjustments): Allocate and free LIVE bitmap,
2191 adjust combine_stack_adjustments_for_block caller.
2193 2020-05-05 Martin Liska <mliska@suse.cz>
2195 PR gcov-profile/93623
2196 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
2199 2020-05-05 Martin Liska <mliska@suse.cz>
2201 * opt-functions.awk (opt_args_non_empty): New function.
2202 * opt-read.awk: Use the function for various option arguments.
2204 2020-05-05 Martin Liska <mliska@suse.cz>
2207 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
2208 report warning when the jobserver is not detected.
2210 2020-05-05 Martin Liska <mliska@suse.cz>
2212 PR gcov-profile/94636
2213 * gcov.c (main): Print total lines summary at the end.
2214 (generate_results): Expect file_name always being non-null.
2215 Print newline after intermediate file is printed in order to align with
2216 what we do for normal files.
2218 2020-05-05 Martin Liska <mliska@suse.cz>
2220 * dumpfile.c (dump_switch_p): Change return type
2221 and print option suggestion.
2222 * dumpfile.h: Change return type.
2223 * opts-global.c (handle_common_deferred_options):
2224 Move error into dump_switch_p function.
2226 2020-05-05 Martin Liska <mliska@suse.cz>
2229 * alloc-pool.h: Use const for some arguments.
2230 * bitmap.h: Likewise.
2231 * mem-stats.h: Likewise.
2232 * sese.h (get_entry_bb): Likewise.
2233 (get_exit_bb): Likewise.
2235 2020-05-05 Richard Biener <rguenther@suse.de>
2237 * tree-vect-slp.c (struct vdhs_data): New.
2238 (vect_detect_hybrid_slp): New walker.
2239 (vect_detect_hybrid_slp): Rewrite.
2241 2020-05-05 Richard Biener <rguenther@suse.de>
2244 * tree-ssa-structalias.c (ipa_pta_execute): Use
2245 varpool_node::externally_visible_p ().
2246 (refered_from_nonlocal_var): Likewise.
2248 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2250 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
2251 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
2252 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
2254 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
2256 * gimplify.c (gimplify_init_constructor): Do not put the constructor
2257 into static memory if it is not complete.
2259 2020-05-05 Richard Biener <rguenther@suse.de>
2261 PR tree-optimization/94949
2262 * tree-ssa-loop-im.c (execute_sm): Check whether we use
2263 the multithreaded model or always compute the stored value
2264 before eliding a load.
2266 2020-05-05 Alex Coplan <alex.coplan@arm.com>
2268 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
2270 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2272 PR tree-optimization/94800
2273 * match.pd (X + (X << C) to X * (1 + (1 << C)),
2274 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
2278 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
2280 PR tree-optimization/94914
2281 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
2284 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
2286 * config/i386/i386.md (*testqi_ext_3): Use
2287 int_nonimmediate_operand instead of manual mode checks.
2288 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
2289 Use int_nonimmediate_operand predicate. Rewrite
2290 define_insn_and_split pattern to a combine pass splitter.
2292 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2294 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
2295 * configure: Regenerate.
2297 2020-05-05 Jakub Jelinek <jakub@redhat.com>
2300 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
2301 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
2302 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
2303 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
2305 2020-05-04 Clement Chigot <clement.chigot@atos.net>
2306 David Edelsohn <dje.gcc@gmail.com>
2308 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
2309 for fmodl, frexpl, ldexpl and modfl builtins.
2311 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
2314 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
2315 chosen lhs is different from the gcall lhs.
2316 (expand_mask_load_optab_fn): Likewise.
2317 (expand_gather_load_optab_fn): Likewise.
2319 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2322 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
2323 (EQ compare->LTU compare splitter): New splitter.
2324 (NE compare->NEG splitter): Ditto.
2326 2020-05-04 Marek Polacek <polacek@redhat.com>
2329 2020-04-30 Marek Polacek <polacek@redhat.com>
2332 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2333 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2335 2020-05-04 Richard Biener <rguenther@suse.de>
2337 PR tree-optimization/93891
2338 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
2339 the original reference tree for assessing access alignment.
2341 2020-05-04 Richard Biener <rguenther@suse.de>
2343 PR tree-optimization/39612
2344 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
2345 (set_ref_loaded_in_loop): New.
2346 (mark_ref_loaded): Likewise.
2347 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
2348 (execute_sm): Avoid issueing a load when it was not there.
2349 (execute_sm_if_changed): Avoid issueing warnings for the
2352 2020-05-04 Martin Jambor <mjambor@suse.cz>
2355 * tree-inline.c (tree_function_versioning): Leave any type conversion
2356 of replacements to setup_one_parameter and its friend
2357 force_value_to_type.
2359 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
2362 * config/i386/predicates.md (shr_comparison_operator): New predicate.
2363 * config/i386/i386.md (compare->shr splitter): New splitters.
2365 2020-05-04 Jakub Jelinek <jakub@redhat.com>
2367 PR tree-optimization/94718
2368 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
2370 PR tree-optimization/94718
2371 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
2372 replace two nop conversions on bit_{and,ior,xor} argument
2373 and result with just one conversion on the result or another argument.
2375 PR tree-optimization/94718
2376 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
2377 -> (X ^ Y) & C eqne 0 optimization to ...
2378 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
2380 * opts.c (get_option_html_page): Instead of hardcoding a list of
2381 options common between C/C++ and Fortran only use gfortran/
2382 documentation for warnings that have CL_Fortran set but not
2385 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
2387 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2388 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
2389 (emit_memmov): Ditto.
2390 (emit_memset): Ditto.
2391 (ix86_expand_strlensi_unroll_1): Ditto.
2392 (release_scratch_register_on_entry): Ditto.
2393 (gen_frame_set): Ditto.
2394 (ix86_emit_restore_reg_using_pop): Ditto.
2395 (ix86_emit_outlined_ms2sysv_restore): Ditto.
2396 (ix86_expand_epilogue): Ditto.
2397 (ix86_expand_split_stack_prologue): Ditto.
2398 * config/i386/i386.md (push immediate splitter): Ditto.
2402 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
2404 PR translation/93861
2405 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
2408 2020-05-02 Jakub Jelinek <jakub@redhat.com>
2410 * config/tilegx/tilegx.md
2411 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
2412 rather than just <n>.
2414 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
2417 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
2418 and crtl->patch_area_entry.
2419 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
2420 * opts.c (common_handle_option): Limit
2421 function_entry_patch_area_size and function_entry_patch_area_start
2422 to USHRT_MAX. Fix a typo in error message.
2423 * varasm.c (assemble_start_function): Use crtl->patch_area_size
2424 and crtl->patch_area_entry.
2425 * doc/invoke.texi: Document the maximum value for
2426 -fpatchable-function-entry.
2428 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
2430 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
2431 Override SUBTARGET_SHADOW_OFFSET macro.
2433 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
2435 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
2436 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
2437 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
2438 * config/i386/freebsd.h: Likewise.
2439 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
2440 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
2442 2020-04-30 Alexandre Oliva <oliva@adacore.com>
2444 * doc/sourcebuild.texi (Effective-Target Keywords): Document
2445 the newly-introduced fileio effective target.
2447 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
2449 PR rtl-optimization/94740
2450 * cse.c (cse_process_notes_1): Replace with...
2451 (cse_process_note_1): ...this new function, acting as a
2452 simplify_replace_fn_rtx callback to process_note. Handle only
2453 REGs and MEMs directly. Validate the MEM if cse_process_note
2454 changes its address.
2455 (cse_process_notes): Replace with...
2456 (cse_process_note): ...this new function.
2457 (cse_extended_basic_block): Update accordingly, iterating over
2458 the register notes and passing individual notes to cse_process_note.
2460 2020-04-30 Carl Love <cel@us.ibm.com>
2462 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
2464 2020-04-30 Martin Jambor <mjambor@suse.cz>
2467 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
2468 saved by the inliner and thunks which had their call inlined.
2469 * ipa-inline-transform.c (save_inline_function_body): Fill in
2470 former_clone_of of new body holders.
2472 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2474 * BASE-VER: Set to 11.0.0.
2476 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
2478 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
2480 2020-04-30 Marek Polacek <polacek@redhat.com>
2483 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
2484 (check_aligned_type): Check if TYPE_USER_ALIGN match.
2486 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2488 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
2489 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
2490 * doc/invoke.texi (moutline-atomics): Document as on by default.
2492 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
2495 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
2496 the check for NOTE_INSN_DELETED_LABEL.
2498 2020-04-30 Jakub Jelinek <jakub@redhat.com>
2500 * configure.ac (--with-documentation-root-url,
2501 --with-changes-root-url): Diagnose URL not ending with /,
2502 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
2503 * opts.h (get_changes_url): Remove.
2504 * opts.c (get_changes_url): Remove.
2505 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
2506 or -DCHANGES_ROOT_URL.
2507 * doc/install.texi (--with-documentation-root-url,
2508 --with-changes-root-url): Document.
2509 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
2510 get_changes_url and free, change url variable type to const char * and
2511 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
2512 * config/s390/s390.c (s390_function_arg_vector,
2513 s390_function_arg_float): Likewise.
2514 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2516 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
2518 * config.in: Regenerate.
2519 * configure: Regenerate.
2521 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
2524 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
2526 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
2528 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
2529 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
2531 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
2533 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
2534 Change constraint for vlrl/vstrl to jb4.
2536 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2538 * var-tracking.c (vt_initialize): Move variables pre and post
2539 into inner block and initialize both in order to fix warning
2540 about uninitialized use. Remove unnecessary checks for
2541 frame_pointer_needed.
2543 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2545 * toplev.c (output_stack_usage_1): Ensure that first
2546 argument to fprintf is not null.
2548 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2550 * configure.ac (-with-changes-root-url): New configure option,
2551 defaulting to https://gcc.gnu.org/.
2552 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
2554 * pretty-print.c (get_end_url_string): New function.
2555 (pp_format): Handle %{ and %} for URLs.
2556 (pp_begin_url): Use pp_string instead of pp_printf.
2557 (pp_end_url): Use get_end_url_string.
2558 * opts.h (get_changes_url): Declare.
2559 * opts.c (get_changes_url): New function.
2560 * config/rs6000/rs6000-call.c: Include opts.h.
2561 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
2562 of just in GCC 10.1 in diagnostics and add URL.
2563 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
2564 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
2566 * config/s390/s390.c (s390_function_arg_vector,
2567 s390_function_arg_float): Likewise.
2568 * configure: Regenerated.
2571 * config/s390/s390.c (s390_function_arg_vector,
2572 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
2573 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
2574 passed to the function rather than the type of the single element.
2575 Rename cxx17_empty_base_seen variable to empty_base_seen, change
2576 type to int, and adjust diagnostics depending on if the field
2577 has [[no_unique_attribute]] or not.
2580 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
2581 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
2582 used in casts into parens.
2583 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
2584 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
2585 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
2586 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
2587 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
2588 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
2589 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
2590 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
2591 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
2592 _mm256_mask_cmp_epu8_mask): Likewise.
2593 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
2594 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
2595 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
2596 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
2599 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
2600 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
2601 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
2602 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
2603 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
2604 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
2605 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
2606 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
2607 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
2608 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
2609 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
2610 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
2611 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
2613 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
2614 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
2615 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
2616 as mask vector containing -1.0 or -1.0f elts, but instead vector
2617 with all bits set using _mm*_cmpeq_p? with zero operands.
2618 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
2619 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
2620 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
2621 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
2622 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
2623 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
2624 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
2625 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
2626 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
2627 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
2628 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
2629 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
2630 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
2631 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
2632 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
2633 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
2634 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
2636 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
2637 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
2638 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
2639 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
2640 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
2641 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
2642 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
2643 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
2644 _mm512_mask_prefetch_i64scatter_ps): Likewise.
2645 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
2646 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
2647 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
2648 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
2649 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
2650 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
2651 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
2652 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
2653 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
2654 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
2655 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
2656 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
2657 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
2658 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
2659 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
2660 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
2661 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
2662 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
2663 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
2664 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
2665 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
2666 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
2667 _mm_mask_i64scatter_epi64): Likewise.
2669 2020-04-29 Jeff Law <law@redhat.com>
2671 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
2672 division instructions are 4 bytes long.
2674 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2677 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
2678 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2679 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
2680 take address of TARGET_EXPR of fenv_var with void_node initializer.
2683 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2685 PR tree-optimization/94774
2686 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
2689 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2691 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
2692 * calls.c (cxx17_empty_base_field_p): New function. Check
2693 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
2696 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
2699 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
2700 Allow -fcf-protection with -mindirect-branch=thunk-extern and
2701 -mfunction-return=thunk-extern.
2702 * doc/invoke.texi: Update notes for -fcf-protection=branch with
2703 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
2705 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2707 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
2709 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2711 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
2712 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
2713 fenv_var and new_fenv_var.
2715 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2717 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
2718 effective-target keyword.
2719 (arm_arch_v8a_hard_multilib): Likewise.
2720 (arm_arch_v8a_hard): Document new dg-add-options keyword.
2721 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
2722 code is deprecated and has not been updated to handle
2723 DECL_FIELD_ABI_IGNORED.
2724 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2725 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2726 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2727 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2728 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2729 something actually is a HFA or HVA. Record whether we see a
2730 [[no_unique_address]] field that previous GCCs would not have
2731 ignored in this way.
2732 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
2733 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2734 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
2735 diagnostic messages.
2736 (arm_needs_doubleword_align): Add a comment explaining why we
2737 consider even zero-sized fields.
2739 2020-04-29 Richard Biener <rguenther@suse.de>
2740 Li Zekun <lizekun1@huawei.com>
2743 * tree.c (component_ref_size): Guard against error_mark_node
2744 DECL_INITIAL as it happens with LTO.
2746 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
2748 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
2749 comment explaining why we consider even zero-sized fields.
2750 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
2751 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
2752 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
2753 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
2754 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
2755 something actually is a HFA or HVA. Record whether we see a
2756 [[no_unique_address]] field that previous GCCs would not have
2757 ignored in this way.
2758 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
2759 whether diagnostics should be suppressed. Update the calls to
2760 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
2761 [[no_unique_address]] case.
2762 (aarch64_return_in_msb): Update call accordingly, never silencing
2764 (aarch64_function_value): Likewise.
2765 (aarch64_return_in_memory_1): Likewise.
2766 (aarch64_init_cumulative_args): Likewise.
2767 (aarch64_gimplify_va_arg_expr): Likewise.
2768 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
2769 use it to decide whether arch64_vfp_is_call_or_return_candidate
2771 (aarch64_pass_by_reference): Update calls accordingly.
2772 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
2773 to decide whether arch64_vfp_is_call_or_return_candidate should be
2776 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
2779 * config/aarch64/aarch64-builtins.c
2780 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
2781 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
2784 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
2786 * configure.ac <$enable_offload_targets>: Do parsing as done
2788 * configure: Regenerate.
2790 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
2791 * configure: Regenerate.
2794 * rtlanal.c (set_noop_p): Handle non-constant selectors.
2797 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
2799 (TARGET_EXCEPT_UNWIND_INFO): Define.
2801 2020-04-29 Jakub Jelinek <jakub@redhat.com>
2804 * config/gcn/gcn.md (*mov<mode>_insn): Use
2805 'reg_overlap_mentioned_p' to check for overlap.
2808 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
2809 instead of cxx17_empty_base_field_p.
2812 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
2813 DECL_FIELD_ABI_IGNORED.
2814 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
2815 * calls.h (cxx17_empty_base_field_p): Change into a temporary
2816 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
2818 * calls.c (cxx17_empty_base_field_p): Remove.
2819 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
2820 DECL_FIELD_ABI_IGNORED.
2821 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
2822 * lto-streamer-out.c (hash_tree): Likewise.
2823 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
2824 cxx17_empty_base_seen to empty_base_seen, change type to int *,
2825 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
2826 cxx17_empty_base_field_p, if "no_unique_address" attribute is
2827 present, propagate that to the caller too.
2828 (rs6000_discover_homogeneous_aggregate): Adjust
2829 rs6000_aggregate_candidate caller, emit different diagnostics
2830 when c++17 empty base fields are present and when empty
2831 [[no_unique_address]] fields are present.
2832 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
2833 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
2836 2020-04-29 Richard Biener <rguenther@suse.de>
2838 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
2839 Just check whether the stmt stores.
2841 2020-04-28 Alexandre Oliva <oliva@adacore.com>
2844 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
2845 output operand in emulation. Don't overwrite pseudos.
2847 2020-04-28 Jeff Law <law@redhat.com>
2849 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
2850 multiply patterns are 4 bytes long.
2852 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2854 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
2855 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
2857 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
2858 Jakub Jelinek <jakub@redhat.com>
2861 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
2862 base class artificial fields.
2863 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
2864 decision is different after this fix.
2866 2020-04-28 David Malcolm <dmalcolm@redhat.com>
2872 * doc/invoke.texi (Static Analyzer Options): Remove
2873 -Wanalyzer-use-of-uninitialized-value.
2874 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
2876 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2878 PR tree-optimization/94809
2879 * tree.c (build_call_expr_internal_loc_array): Call
2880 process_call_operands.
2882 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
2884 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
2885 * config/aarch64/aarch64-tune.md: Regenerate.
2886 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
2887 (thunderx3t110_regmove_cost): Likewise.
2888 (thunderx3t110_vector_cost): Likewise.
2889 (thunderx3t110_prefetch_tune): Likewise.
2890 (thunderx3t110_tunings): Likewise.
2891 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
2893 * config/aarch64/thunderx3t110.md: New file.
2894 * config/aarch64/aarch64.md: Include thunderx3t110.md.
2895 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
2897 2020-04-28 Jakub Jelinek <jakub@redhat.com>
2900 * config/s390/s390.c (s390_function_arg_vector,
2901 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
2903 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
2905 PR tree-optimization/94727
2906 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
2907 operands are invariant booleans, use the mask type associated with the
2908 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
2909 (vectorizable_condition): Pass vectype unconditionally to
2910 vect_is_simple_cond.
2912 2020-04-27 Jakub Jelinek <jakub@redhat.com>
2915 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
2916 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
2917 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
2919 2020-04-27 David Malcolm <dmalcolm@redhat.com>
2922 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
2923 default value, so that it can by supplied by get_option_html_page.
2924 * configure: Regenerate.
2925 * opts.c: Include "selftest.h".
2926 (get_option_html_page): New function.
2927 (get_option_url): Use it. Reformat to place comments next to the
2928 expressions they refer to.
2929 (selftest::test_get_option_html_page): New.
2930 (selftest::opts_c_tests): New.
2931 * selftest-run-tests.c (selftest::run_tests): Call
2932 selftest::opts_c_tests.
2933 * selftest.h (selftest::opts_c_tests): New decl.
2935 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
2937 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
2938 UINTVAL to CONST_INTs.
2940 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2942 * config/arm/constraints.md (e): Remove constraint.
2943 (Te): Define constraint.
2944 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
2945 operand 0 from "e" to "Te".
2946 (vaddvaq_<supf><mode>): Likewise.
2947 (vaddvq_p_<supf><mode>): Likewise.
2948 (vmladavq_<supf><mode>): Likewise.
2949 (vmladavxq_s<mode>): Likewise.
2950 (vmlsdavq_s<mode>): Likewise.
2951 (vmlsdavxq_s<mode>): Likewise.
2952 (vaddvaq_p_<supf><mode>): Likewise.
2953 (vmladavaq_<supf><mode>): Likewise.
2954 (vmladavq_p_<supf><mode>): Likewise.
2955 (vmladavxq_p_s<mode>): Likewise.
2956 (vmlsdavq_p_s<mode>): Likewise.
2957 (vmlsdavxq_p_s<mode>): Likewise.
2958 (vmlsdavaxq_s<mode>): Likewise.
2959 (vmlsdavaq_s<mode>): Likewise.
2960 (vmladavaxq_s<mode>): Likewise.
2961 (vmladavaq_p_<supf><mode>): Likewise.
2962 (vmladavaxq_p_s<mode>): Likewise.
2963 (vmlsdavaq_p_s<mode>): Likewise.
2964 (vmlsdavaxq_p_s<mode>): Likewise.
2966 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
2968 * config/arm/arm.c (output_move_neon): Only get the first operand if
2971 2020-04-27 Felix Yang <felix.yang@huawei.com>
2973 PR tree-optimization/94784
2974 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
2975 assert around so that it checks that the two vectors have equal
2976 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
2977 types is a useless_type_conversion_p.
2979 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
2982 * dwarf2cfi.c (struct GTY): Add ra_mangled.
2983 (cfi_row_equal_p): Check ra_mangled.
2984 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
2985 this only handles the sparc logic now.
2986 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
2987 the aarch64 specific logic.
2988 (dwarf2out_frame_debug): Update to use the new subroutines.
2989 (change_cfi_row): Check ra_mangled.
2991 2020-04-27 Jakub Jelinek <jakub@redhat.com>
2994 * config/s390/s390.c (s390_function_arg_vector,
2995 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
2997 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
2999 * common/config/rs6000/rs6000-common.c
3000 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
3002 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
3005 2020-04-27 Martin Liska <mliska@suse.cz>
3008 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
3009 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
3011 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
3014 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
3016 (rs6000_emit_prologue_components):
3017 Check with frame_pointer_needed_indeed.
3018 (rs6000_emit_epilogue_components): Likewise.
3019 (rs6000_emit_prologue): Likewise.
3020 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
3022 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
3024 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
3025 stack frame when debugging and flag_compare_debug is enabled.
3027 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
3029 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
3030 enable PC-relative addressing for -mcpu=future.
3031 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
3032 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
3033 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
3034 suppress PC-relative addressing.
3035 (rs6000_option_override_internal): Split up error messages
3036 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
3039 2020-04-25 Jakub Jelinek <jakub@redhat.com>
3040 Richard Biener <rguenther@suse.de>
3042 PR tree-optimization/94734
3043 PR tree-optimization/89430
3044 * tree-ssa-phiopt.c: Include tree-eh.h.
3045 (cond_store_replacement): Return false if an automatic variable
3046 access could trap. If -fstore-data-races, don't return false
3047 just because an automatic variable is addressable.
3049 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3051 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
3053 (add<mode>_sext_dup2_exec): Likewise.
3055 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
3058 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
3059 endian byteshift_val calculation.
3061 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
3063 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
3065 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
3067 * config/aarch64/arm_sve.h: Add a comment.
3069 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
3071 PR rtl-optimization/94708
3072 * combine.c (simplify_if_then_else): Add check for
3073 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
3075 2020-04-23 Martin Sebor <msebor@redhat.com>
3078 * common.opt (-Wno-frame-larger-than): New option.
3079 (-Wno-larger-than, -Wno-stack-usage): Same.
3081 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3083 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
3085 (mov<mode>_exec): Likewise.
3086 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
3087 (<convop><mode><vndi>2_exec): Likewise.
3089 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
3091 PR tree-optimization/94717
3092 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
3093 of the stores doesn't have the same landing pad number as the first.
3094 (coalesce_immediate_stores): Do not try to coalesce the store using
3095 bswap if it doesn't have the same landing pad number as the first.
3097 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
3099 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
3100 Replace outdated link to ELFv2 ABI.
3102 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3105 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
3109 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
3110 temporarily with non-final second operand and updating it later,
3111 push COMPOUND_EXPRs into a vector and process it in reverse,
3112 creating COMPOUND_EXPRs with the final operands.
3114 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
3117 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
3118 bti c and bti j handling.
3120 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
3121 Thomas Schwinge <thomas@codesourcery.com>
3125 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
3126 t_async and the wait arguments.
3128 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
3130 PR tree-optimization/94727
3131 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
3132 comparing invariant scalar booleans.
3134 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
3135 Jakub Jelinek <jakub@redhat.com>
3138 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
3139 empty base class artificial fields.
3140 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
3141 different after this fix.
3143 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3146 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
3147 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
3148 if the same type has been diagnosed most recently already.
3150 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
3152 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
3154 (__arm_vbicq_n_s16): Likewise.
3155 (__arm_vbicq_n_u32): Likewise.
3156 (__arm_vbicq_n_s32): Likewise.
3157 (__arm_vbicq): Likewise.
3158 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
3159 (__arm_vbicq_n_s32): Likewise.
3160 (__arm_vbicq_n_u16): Likewise.
3161 (__arm_vbicq_n_u32): Likewise.
3162 (__arm_vdupq_m_n_s8): Likewise.
3163 (__arm_vdupq_m_n_s16): Likewise.
3164 (__arm_vdupq_m_n_s32): Likewise.
3165 (__arm_vdupq_m_n_u8): Likewise.
3166 (__arm_vdupq_m_n_u16): Likewise.
3167 (__arm_vdupq_m_n_u32): Likewise.
3168 (__arm_vdupq_m_n_f16): Likewise.
3169 (__arm_vdupq_m_n_f32): Likewise.
3170 (__arm_vldrhq_gather_offset_s16): Likewise.
3171 (__arm_vldrhq_gather_offset_s32): Likewise.
3172 (__arm_vldrhq_gather_offset_u16): Likewise.
3173 (__arm_vldrhq_gather_offset_u32): Likewise.
3174 (__arm_vldrhq_gather_offset_f16): Likewise.
3175 (__arm_vldrhq_gather_offset_z_s16): Likewise.
3176 (__arm_vldrhq_gather_offset_z_s32): Likewise.
3177 (__arm_vldrhq_gather_offset_z_u16): Likewise.
3178 (__arm_vldrhq_gather_offset_z_u32): Likewise.
3179 (__arm_vldrhq_gather_offset_z_f16): Likewise.
3180 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
3181 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
3182 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
3183 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
3184 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
3185 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
3186 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
3187 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
3188 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
3189 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
3190 (__arm_vldrwq_gather_offset_s32): Likewise.
3191 (__arm_vldrwq_gather_offset_u32): Likewise.
3192 (__arm_vldrwq_gather_offset_f32): Likewise.
3193 (__arm_vldrwq_gather_offset_z_s32): Likewise.
3194 (__arm_vldrwq_gather_offset_z_u32): Likewise.
3195 (__arm_vldrwq_gather_offset_z_f32): Likewise.
3196 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
3197 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
3198 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
3199 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
3200 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
3201 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
3202 (__arm_vdwdupq_x_n_u8): Likewise.
3203 (__arm_vdwdupq_x_n_u16): Likewise.
3204 (__arm_vdwdupq_x_n_u32): Likewise.
3205 (__arm_viwdupq_x_n_u8): Likewise.
3206 (__arm_viwdupq_x_n_u16): Likewise.
3207 (__arm_viwdupq_x_n_u32): Likewise.
3208 (__arm_vidupq_x_n_u8): Likewise.
3209 (__arm_vddupq_x_n_u8): Likewise.
3210 (__arm_vidupq_x_n_u16): Likewise.
3211 (__arm_vddupq_x_n_u16): Likewise.
3212 (__arm_vidupq_x_n_u32): Likewise.
3213 (__arm_vddupq_x_n_u32): Likewise.
3214 (__arm_vldrdq_gather_offset_s64): Likewise.
3215 (__arm_vldrdq_gather_offset_u64): Likewise.
3216 (__arm_vldrdq_gather_offset_z_s64): Likewise.
3217 (__arm_vldrdq_gather_offset_z_u64): Likewise.
3218 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
3219 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
3220 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
3221 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
3222 (__arm_vidupq_m_n_u8): Likewise.
3223 (__arm_vidupq_m_n_u16): Likewise.
3224 (__arm_vidupq_m_n_u32): Likewise.
3225 (__arm_vddupq_m_n_u8): Likewise.
3226 (__arm_vddupq_m_n_u16): Likewise.
3227 (__arm_vddupq_m_n_u32): Likewise.
3228 (__arm_vidupq_n_u16): Likewise.
3229 (__arm_vidupq_n_u32): Likewise.
3230 (__arm_vidupq_n_u8): Likewise.
3231 (__arm_vddupq_n_u16): Likewise.
3232 (__arm_vddupq_n_u32): Likewise.
3233 (__arm_vddupq_n_u8): Likewise.
3235 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
3237 * doc/install.texi (D-Specific Options): Document
3238 --enable-libphobos-checking and --with-libphobos-druntime-only.
3240 2020-04-23 Jakub Jelinek <jakub@redhat.com>
3243 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
3244 cxx17_empty_base_seen argument. Pass it to recursive calls.
3245 Ignore cxx17_empty_base_field_p fields after setting
3246 *cxx17_empty_base_seen to true.
3247 (rs6000_discover_homogeneous_aggregate): Adjust
3248 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
3249 aggregates with C++17 empty base fields.
3252 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3253 if last_decl is error_mark_node or has such a TREE_TYPE.
3256 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
3257 if last_decl is error_mark_node or has such a TREE_TYPE.
3259 2020-04-22 Felix Yang <felix.yang@huawei.com>
3262 * config/aarch64/aarch64.h (TARGET_SVE):
3263 Add && !TARGET_GENERAL_REGS_ONLY.
3264 (TARGET_SVE2): Add && TARGET_SVE.
3265 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
3266 TARGET_SVE2_SM4): Add && TARGET_SVE2.
3267 * config/aarch64/aarch64-sve-builtins.h
3268 (sve_switcher::m_old_general_regs_only): New member.
3269 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
3271 (reported_missing_registers_p): New variable.
3272 (check_required_extensions): Call check_required_registers before
3273 return if all required extenstions are present.
3274 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
3275 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
3276 global_options.x_target_flags.
3277 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
3278 global_options.x_target_flags if m_old_general_regs_only is true.
3280 2020-04-22 Zackery Spytz <zspytz@gmail.com>
3282 * doc/extend.exi: Add "free" to list of other builtin functions
3285 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
3288 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
3290 (store_quadpti): Ditto.
3291 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
3292 plq will be used and doesn't need it.
3293 (atomic_store<mode>): Ditto, for pstq.
3295 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
3297 * doc/invoke.texi: Update flags turned on by -O3.
3299 2020-04-22 Jakub Jelinek <jakub@redhat.com>
3302 * config/ia64/ia64.c (hfa_element_mode): Ignore
3303 cxx17_empty_base_field_p fields.
3306 * calls.h (cxx17_empty_base_field_p): Declare.
3307 * calls.c (cxx17_empty_base_field_p): Define.
3309 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
3311 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
3313 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3314 Andre Vieira <andre.simoesdiasvieira@arm.com>
3315 Mihail Ionescu <mihail.ionescu@arm.com>
3317 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
3318 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
3319 (ALL_QUIRKS): Add quirk_no_asmcpu.
3320 (cortex-m55): Define new cpu.
3321 * config/arm/arm-tables.opt: Regenerate.
3322 * config/arm/arm-tune.md: Likewise.
3323 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
3325 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
3327 PR tree-optimization/94700
3328 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
3329 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
3330 of similarly-structured but distinct vector types.
3332 2020-04-21 Martin Sebor <msebor@redhat.com>
3335 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
3336 the computation of the lower bound of the source access size.
3337 (builtin_access::generic_overlap): Remove a hack for setting ranges
3340 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
3342 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
3343 (ASM_WEAKEN_DECL): New define.
3344 (HAVE_GAS_WEAKREF): Undefine.
3346 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
3348 PR tree-optimization/94683
3349 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
3350 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
3351 but distinct vector types.
3353 2020-04-21 Jakub Jelinek <jakub@redhat.com>
3356 * stor-layout.c (place_field, finalize_record_size): Don't emit
3357 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
3358 * ubsan.c (ubsan_get_type_descriptor_type,
3359 ubsan_get_source_location_type, ubsan_create_data): Set
3361 * asan.c (asan_global_struct): Likewise.
3363 2020-04-21 Duan bo <duanbo3@huawei.com>
3366 * config/aarch64/aarch64.c: Add an error message for option conflict.
3367 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
3368 incompatible with -fpic, -fPIC and -mabi=ilp32.
3370 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
3373 * omp-low.c (new_omp_context): Remove assignments to
3374 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
3376 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3378 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
3379 ("popcountv2di2_vx"): Use simplify_gen_subreg.
3381 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
3384 * config/s390/s390-builtin-types.def: Add 3 new function modes.
3385 * config/s390/s390-builtins.def: Add mode dependent low-level
3386 builtin and map the overloaded builtins to these.
3387 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
3388 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
3390 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3392 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
3393 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
3394 estimated VF and is no worse at double the estimated VF.
3396 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
3399 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
3400 order of arguments to rtx_vector_builder.
3401 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
3402 When extending the trailing constants to a full vector, replace any
3403 variables with zeros.
3405 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
3408 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
3411 2020-04-20 Martin Liska <mliska@suse.cz>
3413 * symtab.c (symtab_node::dump_references): Add space after
3415 (symtab_node::dump_referring): Likewise.
3417 2020-04-18 Jeff Law <law@redhat.com>
3420 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
3423 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
3425 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
3426 attributes): Document d_runtime_has_std_library.
3428 2020-04-17 Jeff Law <law@redhat.com>
3430 PR rtl-optimization/90275
3431 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
3432 when the destination has a REG_UNUSED note.
3434 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
3437 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
3440 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
3442 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
3443 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
3444 cost of load and store insns if one loop iteration has enough scalar
3445 elements to use an Advanced SIMD LDP or STP.
3446 (aarch64_add_stmt_cost): Update call accordingly.
3448 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3449 Jeff Law <law@redhat.com>
3452 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
3453 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
3454 or pos + len >= 32, or pos + len is equal to operands[2] precision
3455 and operands[2] is not a register operand. During splitting perform
3456 SImode AND if operands[0] doesn't have CCZmode and pos + len is
3457 equal to mode precision.
3459 2020-04-17 Richard Biener <rguenther@suse.de>
3462 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
3464 * dwarf2out.c (dw_val_equal_p): Fix pasto in
3465 dw_val_class_vms_delta comparison.
3466 * optabs.c (expand_binop_directly): Fix pasto in commutation
3468 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
3471 2020-04-17 Jakub Jelinek <jakub@redhat.com>
3473 PR rtl-optimization/94618
3474 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
3475 insn is the BB_END of its block, but also when it is only followed
3476 by DEBUG_INSNs in its block.
3478 PR tree-optimization/94621
3479 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
3480 Move id->adjust_array_error_bounds check first in the condition.
3482 2020-04-17 Martin Liska <mliska@suse.cz>
3483 Jonathan Yong <10walls@gmail.com>
3485 PR gcov-profile/94570
3486 * coverage.c (coverage_init): Use separator properly.
3488 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
3490 PR rtl-optimization/93974
3491 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
3492 (rs6000_cannot_substitute_mem_equiv_p): New function.
3494 2020-04-16 Martin Jambor <mjambor@suse.cz>
3497 * ipa-inline.h (ipa_saved_clone_sources): Declare.
3498 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
3499 (save_inline_function_body): Link the new body holder with the
3501 * cgraph.c: Include ipa-inline.h.
3502 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
3503 the statement in ipa_saved_clone_sources.
3504 * cgraphunit.c: Include ipa-inline.h.
3505 (expand_all_functions): Free ipa_saved_clone_sources.
3507 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3510 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
3511 the VNx16BI lowpart of the recursively-generated constant.
3513 2020-04-16 Martin Liska <mliska@suse.cz>
3514 Jakub Jelinek <jakub@redhat.com>
3517 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
3518 DECL_IS_REPLACEABLE_OPERATOR during cloning.
3519 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
3520 (propagate_necessity): Check operator names.
3522 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
3524 PR rtl-optimization/94605
3525 * early-remat.c (early_remat::process_block): Handle insns that
3526 set multiple candidate registers.
3527 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
3529 PR gcov-profile/93401
3530 * common.opt (profile-prefix-path): New option.
3531 * coverae.c: Include diagnostics.h.
3532 (coverage_init): Strip profile prefix path.
3533 * doc/invoke.texi (-fprofile-prefix-path): Document.
3535 2020-04-16 Richard Biener <rguenther@suse.de>
3538 * expr.c (emit_move_multi_word): Do not generate code when
3539 the destination part is undefined_operand_subword_p.
3540 * lower-subreg.c (resolve_clobber): Look through a paradoxica
3543 2020-04-16 Martin Jambor <mjambor@suse.cz>
3545 PR tree-optimization/94598
3546 * tree-sra.c (verify_sra_access_forest): Fix verification of total
3547 scalarization accesses under access to one-element arrays.
3549 2020-04-16 Jakub Jelinek <jakub@redhat.com>
3552 * function.c (assign_parm_find_data_types): Add workaround for
3553 BROKEN_VALUE_INITIALIZATION compilers.
3555 2020-04-16 Richard Biener <rguenther@suse.de>
3557 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
3560 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
3563 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
3564 Require OPTION_MASK_ISA_SSE2.
3566 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
3569 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
3570 Don't construct a dump_context temporary to call static method.
3572 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
3574 * config/aarch64/falkor-tag-collision-avoidance.c
3575 (valid_src_p): Check for aarch64_address_info type before
3576 accessing base field.
3578 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
3580 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
3581 (V_sz_elem2): Remove unused mode attribute.
3583 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
3585 * config/arm/arm.md (arm_movdi): Disallow for MVE.
3587 2020-04-15 Richard Biener <rguenther@suse.de>
3590 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
3591 alias_sets_conflict_p for pointers.
3593 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
3596 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
3597 (extendhisi2_internal): Add %v1 before the load instructions.
3599 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
3602 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
3603 use PC-relative addressing for TLS references.
3605 2020-04-14 Martin Jambor <mjambor@suse.cz>
3608 * ipa-sra.c: Include internal-fn.h.
3609 (enum isra_scan_context): Update comment.
3610 (scan_function): Treat calls to internal_functions like loads or stores.
3612 2020-04-14 Yang Yang <yangyang305@huawei.com>
3614 PR tree-optimization/94574
3615 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
3616 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
3618 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
3621 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
3623 2020-04-13 Martin Sebor <msebor@redhat.com>
3625 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
3626 -Wformat-truncation. Move -Wzero-length-bounds last.
3627 (-Wrestrict): Document positive form of option enabled by -Wall.
3629 2020-04-13 Zachary Spytz <zspytz@gmail.com>
3631 * doc/extend.texi: Add realloc to list of built-in functions
3632 are recognized by the compiler.
3634 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
3637 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
3638 pointer in word_mode for eh_return epilogues.
3640 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3642 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
3643 memory references in %B, %C and %D operand selectors when the inner
3644 operand is a post increment address.
3646 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3648 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
3649 reference by 4 bytes, and %D memory reference by 6 bytes.
3651 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
3654 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
3655 condition for V4SI, V8HI and V16QI modes.
3657 2020-04-11 Jakub Jelinek <jakub@redhat.com>
3661 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
3664 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
3668 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
3669 "#pragma omp declare target" has also been applied.
3671 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3673 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
3674 when to emit the epilogue_helper insn.
3675 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
3678 2020-04-09 Jakub Jelinek <jakub@redhat.com>
3681 * cselib.h (cselib_record_sp_cfa_base_equiv,
3682 cselib_sp_derived_value_p): Declare.
3683 * cselib.c (cselib_record_sp_cfa_base_equiv,
3684 cselib_sp_derived_value_p): New functions.
3685 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
3686 cselib_sp_derived_value_p values.
3687 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
3688 start of extended basic blocks other than the first one
3689 for !frame_pointer_needed functions.
3691 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3693 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
3694 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
3695 (aarch64_sve2048_hw): Document.
3696 * config/aarch64/aarch64-protos.h
3697 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
3698 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
3699 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
3700 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
3702 (find_type_suffix_for_scalar_type): Use it instead of comparing
3704 (function_resolver::infer_vector_or_tuple_type): Likewise.
3705 (function_resolver::require_vector_type): Likewise.
3706 (handle_arm_sve_vector_bits_attribute): New function.
3707 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
3708 (aarch64_attribute_table): Add arm_sve_vector_bits.
3709 (aarch64_return_in_memory_1):
3710 (pure_scalable_type_info::piece::get_rtx): New function.
3711 (pure_scalable_type_info::num_zr): Likewise.
3712 (pure_scalable_type_info::num_pr): Likewise.
3713 (pure_scalable_type_info::get_rtx): Likewise.
3714 (pure_scalable_type_info::analyze): Likewise.
3715 (pure_scalable_type_info::analyze_registers): Likewise.
3716 (pure_scalable_type_info::analyze_array): Likewise.
3717 (pure_scalable_type_info::analyze_record): Likewise.
3718 (pure_scalable_type_info::add_piece): Likewise.
3719 (aarch64_some_values_include_pst_objects_p): Likewise.
3720 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
3721 to analyze whether the type is returned in SVE registers.
3722 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
3723 is passed in SVE registers.
3724 (aarch64_pass_by_reference_1): New function, extracted from...
3725 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
3726 to analyze whether the type is a pure scalable type and, if so,
3727 whether it should be passed by reference.
3728 (aarch64_return_in_msb): Return false for pure scalable types.
3729 (aarch64_function_value_1): Fold back into...
3730 (aarch64_function_value): ...this function. Use
3731 pure_scalable_type_info to analyze whether the type is a pure
3732 scalable type and, if so, which registers it should use. Handle
3733 types that include pure scalable types but are not themselves
3734 pure scalable types.
3735 (aarch64_return_in_memory_1): New function, split out from...
3736 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
3737 to analyze whether the type is a pure scalable type and, if so,
3738 whether it should be returned by reference.
3739 (aarch64_layout_arg): Remove orig_mode argument. Use
3740 pure_scalable_type_info to analyze whether the type is a pure
3741 scalable type and, if so, which registers it should use. Handle
3742 types that include pure scalable types but are not themselves
3743 pure scalable types.
3744 (aarch64_function_arg): Update call accordingly.
3745 (aarch64_function_arg_advance): Likewise.
3746 (aarch64_pad_reg_upward): On big-endian targets, return false for
3747 pure scalable types that are smaller than 16 bytes.
3748 (aarch64_member_type_forces_blk): New function.
3749 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
3750 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
3751 correspond to built-in SVE types. Do not rely on a vector mode
3752 if the type includes an pure scalable type. When returning true,
3753 assert that the mode is not an SVE mode.
3754 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
3755 built-in types here. When returning true, assert that the type
3756 does not have an SVE mode.
3757 (aarch64_can_change_mode_class): Don't allow anything to change
3758 between a predicate mode and a non-predicate mode. Also don't
3759 allow changes between SVE vector modes and other modes that
3760 might be bigger than 128 bits.
3761 (aarch64_invalid_binary_op): Reject binary operations that mix
3762 SVE and GNU vector types.
3763 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
3765 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3767 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
3768 "SVE sizeless type".
3769 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
3770 (sizeless_type_p): New functions.
3771 (register_builtin_types): Apply make_type_sizeless to the type.
3772 (register_tuple_type): Likewise.
3773 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
3775 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
3777 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
3780 2020-04-09 Martin Jambor <mjambor@suse.cz>
3781 Richard Biener <rguenther@suse.de>
3783 PR tree-optimization/94482
3784 * tree-sra.c (create_access_replacement): Dump new replacement with
3786 (sra_modify_expr): Fix handling of cases when the original EXPR writes
3787 to only part of the replacement.
3788 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
3789 the first operand of combinations into REAL/IMAGPART_EXPR and
3792 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
3794 * doc/sourcebuild.texi (check-function-bodies): Treat the third
3795 parameter as a list of option regexps and require each regexp
3798 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
3801 * config/aarch64/falkor-tag-collision-avoidance.c
3802 (valid_src_p): Fix missing rtx type check.
3804 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
3805 Richard Biener <rguenther@suse.de>
3807 PR tree-optimization/93674
3808 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
3809 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
3810 or non-mode precision type, add candidate in unsigned type with the
3813 2020-04-08 Clement Chigot <clement.chigot@atos.net>
3815 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
3816 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
3817 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
3819 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3822 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
3824 * reload1.c (eliminate_regs_1): Avoid creating
3825 (plus (reg) (const_int 0)) in DEBUG_INSNs.
3827 PR tree-optimization/94524
3828 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
3829 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
3830 op1 rather than op1 itself at the end. Punt for signed modulo by
3831 most negative constant.
3832 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
3833 modulo by most negative constant.
3835 2020-04-08 Richard Biener <rguenther@suse.de>
3837 PR rtl-optimization/93946
3838 * cse.c (cse_insn): Record the tabled expression in
3839 src_related. Verify a redundant store removal is valid.
3841 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
3844 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
3845 ENDBR at function entry if function will be called indirectly.
3847 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3850 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
3853 2020-04-08 Martin Liska <mliska@suse.cz>
3856 * gimple.c (gimple_call_operator_delete_p): Rename to...
3857 (gimple_call_replaceable_operator_delete_p): ... this.
3858 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3859 * gimple.h (gimple_call_operator_delete_p): Rename to ...
3860 (gimple_call_replaceable_operator_delete_p): ... this.
3861 * tree-core.h (tree_function_decl): Add replaceable_operator
3863 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
3864 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
3865 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
3866 (eliminate_unnecessary_stmts): Likewise.
3867 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
3868 Pack DECL_IS_REPLACEABLE_OPERATOR.
3869 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
3870 Unpack the field here.
3871 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
3872 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
3873 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
3874 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
3875 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
3876 replaceable operator flags.
3878 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3879 Matthew Malcomson <matthew.malcomson@arm.com>
3881 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
3882 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
3883 (CX_TERNARY_QUALIFIERS): Likewise.
3884 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
3885 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
3886 (arm_init_acle_builtins): Initialize CDE builtins.
3887 (arm_expand_acle_builtin): Check CDE constant operands.
3888 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
3889 of CDE constant operand.
3890 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
3892 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
3893 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
3894 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
3895 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
3896 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
3897 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
3898 * config/arm/arm_cde_builtins.def: New file.
3899 * config/arm/iterators.md (V_reg): New attribute of SI.
3900 * config/arm/predicates.md (const_int_coproc_operand): New.
3901 (const_int_vcde1_operand, const_int_vcde2_operand): New.
3902 (const_int_vcde3_operand): New.
3903 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
3904 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
3905 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
3906 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
3908 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
3910 * config.gcc: Add arm_cde.h.
3911 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
3912 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
3913 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
3914 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
3915 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
3916 * config/arm/arm.h (TARGET_CDE): New macro.
3917 * config/arm/arm_cde.h: New file.
3918 * doc/invoke.texi: Document CDE options +cdecp[0-7].
3919 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
3921 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
3923 2020-04-08 Jakub Jelinek <jakub@redhat.com>
3925 PR rtl-optimization/94516
3926 * postreload.c: Include rtl-iter.h.
3927 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
3928 looking for all MEMs with RTX_AUTOINC operand.
3929 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
3931 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
3933 * omp-grid.c (grid_eliminate_combined_simd_part): Use
3934 OMP_CLAUSE_CODE to access the omp clause code.
3936 2020-04-07 Jeff Law <law@redhat.com>
3938 PR rtl-optimization/92264
3939 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
3940 the destination is the stack pointer.
3942 2020-04-07 Jakub Jelinek <jakub@redhat.com>
3944 PR rtl-optimization/94291
3945 PR rtl-optimization/84169
3946 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
3947 must be a REG or SUBREG of REG; if it is not one of these, don't
3950 2020-04-07 Richard Biener <rguenther@suse.de>
3953 * gimplify.c (gimplify_addr_expr): Also consider generated
3956 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3958 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
3960 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3962 * config/arm/arm_mve.h: Cast some pointers to expected types.
3964 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3966 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
3967 same with '__arm_' prefix.
3969 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3971 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
3973 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3975 * config/arm/arm.c (arm_mve_immediate_check): Removed.
3976 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
3977 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
3978 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
3979 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
3980 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
3981 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
3983 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3985 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
3987 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3989 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
3990 * config/arm/mve/md: Fix v[id]wdup patterns.
3992 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3994 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
3995 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
3997 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
3999 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
4000 and remove const_ptr enums.
4002 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
4004 * config/arm/arm_mve.h (vsubq_n): Merge with...
4006 (vmulq_n): Merge with...
4008 (__ARM_mve_typeid): Simplify scalar and constant detection.
4010 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4013 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
4014 for inter-lane permutation for 64-byte modes.
4017 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
4018 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
4019 Assume it is a REG after that instead of testing it and doing FAIL
4020 otherwise. Formatting fix.
4022 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
4024 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
4026 2020-04-07 Jakub Jelinek <jakub@redhat.com>
4029 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
4030 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
4032 2020-04-06 Jakub Jelinek <jakub@redhat.com>
4034 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
4035 + const0_rtx return the SP_DERIVED_VALUE_P.
4037 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
4039 PR rtl-optimization/92989
4040 * lra-lives.c (process_bb_lives): Do not treat eh_return data
4041 registers as being live at the beginning of the EH receiver.
4043 2020-04-05 Zachary Spytz <zspytz@gmail.com>
4045 * extend.texi: Add free to list of ISO C90 functions that
4046 are recognized by the compiler.
4048 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
4050 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
4053 * config/microblaze/microblaze.md (trap): Update output pattern.
4055 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
4056 Jakub Jelinek <jakub@redhat.com>
4059 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
4060 arrays, pointer-to-members, function types and qualifiers when
4061 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
4062 to emit type again on definition.
4064 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
4067 * ipa-fnsummary.c (vrp_will_run_p): New function.
4068 (fre_will_run_p): New function.
4069 (evaluate_properties_for_edge): Use it.
4070 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
4071 !optimize_debug to optimize_debug.
4073 2020-04-04 Jakub Jelinek <jakub@redhat.com>
4075 PR rtl-optimization/94468
4076 * cselib.c (references_value_p): Formatting fix.
4077 (cselib_useless_value_p): New function.
4078 (discard_useless_locs, discard_useless_values,
4079 cselib_invalidate_regno_val, cselib_invalidate_mem,
4080 cselib_record_set): Use it instead of
4081 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
4084 * tree-iterator.h (expr_single): Declare.
4085 * tree-iterator.c (expr_single): New function.
4086 * tree.h (protected_set_expr_location_if_unset): Declare.
4087 * tree.c (protected_set_expr_location): Use expr_single.
4088 (protected_set_expr_location_if_unset): New function.
4090 2020-04-03 Jeff Law <law@redhat.com>
4092 PR rtl-optimization/92264
4093 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
4094 reloading of auto-increment addressing modes.
4096 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
4099 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
4102 2020-04-03 Jeff Law <law@redhat.com>
4104 PR rtl-optimization/92264
4105 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
4106 post-increment addressing of source operands as well as residuals
4107 when computing any adjustments to the input pointer.
4109 2020-04-03 Jakub Jelinek <jakub@redhat.com>
4112 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4113 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
4114 second half of first lane from first lane of second operand and
4115 first half of second lane from second lane of first operand.
4117 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
4119 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
4121 2020-04-03 Tamar Christina <tamar.christina@arm.com>
4124 * common/config/aarch64/aarch64-common.c
4125 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
4127 2020-04-03 Richard Biener <rguenther@suse.de>
4130 * tree.c (array_ref_low_bound): Deal with released SSA names
4133 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
4135 * config/gcn/gcn.c (print_operand): Handle unordered comparison
4137 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
4138 comparison operators.
4140 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
4142 PR tree-optimization/94443
4143 * tree-vect-loop.c (vectorizable_live_operation): Use
4144 gsi_insert_seq_before to replace gsi_insert_before.
4146 2020-04-03 Martin Liska <mliska@suse.cz>
4149 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
4150 Compare type attributes for gimple_call_fntypes.
4152 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
4154 * alias.c (get_alias_set): Fix comment typos.
4156 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
4159 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
4160 attribute checking used by TYPE.
4162 2020-04-02 Martin Jambor <mjambor@suse.cz>
4165 * ipa-sra.c (struct caller_issues): New fields candidate and
4166 call_from_outside_comdat.
4167 (check_for_caller_issues): Check for calls from outsied of
4168 candidate's same_comdat_group.
4169 (check_all_callers_for_issues): Set up issues.candidate, check result
4171 (mark_callers_calls_comdat_local): New function.
4172 (process_isra_node_results): Set calls_comdat_local of callers if
4175 2020-04-02 Richard Biener <rguenther@suse.de>
4178 * common.opt (ffinite-loops): Initialize to zero.
4179 * opts.c (default_options_table): Remove OPT_ffinite_loops
4181 * cfgloop.h (loop::finite_p): New member.
4182 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
4183 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
4185 * lto-streamer-in.c (input_cfg): Stream finite_p.
4186 * lto-streamer-out.c (output_cfg): Likewise.
4187 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
4188 from flag_finite_loops at CFG build time.
4189 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
4190 finite_p flag instead of flag_finite_loops.
4191 * doc/invoke.texi (ffinite-loops): Adjust documentation of
4194 2020-04-02 Richard Biener <rguenther@suse.de>
4197 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
4198 DW_TAG_imported_unit.
4200 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
4202 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
4203 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
4206 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
4208 PR tree-optimization/94401
4209 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
4210 access type when loading halves of vector to avoid peeling for gaps.
4212 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4214 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
4215 between a string literal and MIPS_SYSVERSION_SPEC macro.
4217 2020-04-02 Martin Jambor <mjambor@suse.cz>
4219 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
4221 2020-04-02 Jakub Jelinek <jakub@redhat.com>
4223 PR rtl-optimization/92264
4224 * params.opt (-param=max-find-base-term-values=): Decrease default
4227 PR rtl-optimization/92264
4228 * rtl.h (struct rtx_def): Mention that call bit is used as
4229 SP_DERIVED_VALUE_P in cselib.c.
4230 * cselib.c (SP_DERIVED_VALUE_P): Define.
4231 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
4232 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
4233 val_rtx and sp based expression where offsets cancel each other.
4234 (preserve_constants_and_equivs): Formatting fix.
4235 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
4236 locs list for cfa_base_preserved_val if needed. Formatting fix.
4237 (autoinc_split): If the to be returned value is a REG, MEM or
4238 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
4239 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
4240 (rtx_equal_for_cselib_1): Call autoinc_split even if both
4241 expressions are PLUS in Pmode with CONST_INT second operands.
4242 Handle SP_DERIVED_VALUE_P cases.
4243 (cselib_hash_plus_const_int): New function.
4244 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
4245 second operand, as well as for PRE_DEC etc. that ought to be
4246 hashed the same way.
4247 (cselib_subst_to_values): Substitute PLUS with Pmode and
4248 CONST_INT operand if the first operand is a VALUE which has
4249 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
4250 SP_DERIVED_VALUE_P + adjusted offset.
4251 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
4252 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
4253 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
4254 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
4255 on the sp value before calling cselib_add_permanent_equiv on the
4257 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
4258 in the insn without REG_INC note.
4259 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
4260 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
4263 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
4264 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
4266 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4269 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
4270 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
4271 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
4272 intrinsic defintion by adding a new builtin call to writeback into base
4274 (__arm_vldrdq_gather_base_wb_u64): Likewise.
4275 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
4276 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
4277 (__arm_vldrwq_gather_base_wb_s32): Likewise.
4278 (__arm_vldrwq_gather_base_wb_u32): Likewise.
4279 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
4280 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
4281 (__arm_vldrwq_gather_base_wb_f32): Likewise.
4282 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
4283 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
4284 builtin's qualifier.
4285 (vldrdq_gather_base_wb_z_u): Likewise.
4286 (vldrwq_gather_base_wb_u): Likewise.
4287 (vldrdq_gather_base_wb_u): Likewise.
4288 (vldrwq_gather_base_wb_z_s): Likewise.
4289 (vldrwq_gather_base_wb_z_f): Likewise.
4290 (vldrdq_gather_base_wb_z_s): Likewise.
4291 (vldrwq_gather_base_wb_s): Likewise.
4292 (vldrwq_gather_base_wb_f): Likewise.
4293 (vldrdq_gather_base_wb_s): Likewise.
4294 (vldrwq_gather_base_nowb_z_u): Define builtin.
4295 (vldrdq_gather_base_nowb_z_u): Likewise.
4296 (vldrwq_gather_base_nowb_u): Likewise.
4297 (vldrdq_gather_base_nowb_u): Likewise.
4298 (vldrwq_gather_base_nowb_z_s): Likewise.
4299 (vldrwq_gather_base_nowb_z_f): Likewise.
4300 (vldrdq_gather_base_nowb_z_s): Likewise.
4301 (vldrwq_gather_base_nowb_s): Likewise.
4302 (vldrwq_gather_base_nowb_f): Likewise.
4303 (vldrdq_gather_base_nowb_s): Likewise.
4304 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
4306 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
4307 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
4308 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
4309 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
4310 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
4311 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
4312 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
4313 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
4314 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
4315 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
4316 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
4318 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
4320 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
4321 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
4322 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
4323 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
4324 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
4325 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
4326 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
4327 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
4328 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
4330 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
4331 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
4332 Remove constraints from expander.
4333 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
4334 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
4335 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
4336 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
4337 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
4338 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
4340 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
4342 PR rtl-optimization/94123
4343 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
4344 flag_split_wide_types_early.
4346 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
4348 * doc/extend.texi (Common Function Attributes): Fix typo.
4350 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
4353 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
4356 2020-04-01 Zackery Spytz <zspytz@gmail.com>
4358 * doc/extend.texi: Fix a typo in the documentation of the
4359 copy function attribute.
4361 2020-04-01 Jakub Jelinek <jakub@redhat.com>
4364 * tree-object-size.c (pass_object_sizes::execute): Don't call
4365 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
4366 call replace_call_with_value.
4368 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
4370 PR tree-optimization/94043
4371 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
4372 phi for vec_lhs and use it for lane extraction.
4374 2020-03-31 Felix Yang <felix.yang@huawei.com>
4376 PR tree-optimization/94398
4377 * tree-vect-stmts.c (vectorizable_store): Instead of calling
4378 vect_supportable_dr_alignment, set alignment_support_scheme to
4379 dr_unaligned_supported for gather-scatter accesses.
4380 (vectorizable_load): Likewise.
4382 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
4384 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
4386 (vnsi, VnSI, vndi, VnDI): New mode attributes.
4387 (mov<mode>): Use <VnDI> in place of V64DI.
4388 (mov<mode>_exec): Likewise.
4389 (mov<mode>_sgprbase): Likewise.
4390 (reload_out<mode>): Likewise.
4391 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
4392 (gather_load<mode>v64si): Rename to ...
4393 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
4394 and <VnDI> in place of V64DI.
4395 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
4396 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
4397 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
4398 (scatter_store<mode>v64si): Rename to ...
4399 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4400 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
4401 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
4402 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
4403 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
4404 (ds_bpermute<mode>): Use <VnSI>.
4405 (addv64si3_vcc<exec_vcc>): Rename to ...
4406 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4407 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
4408 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
4409 (addcv64si3<exec_vcc>): Rename to ...
4410 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
4411 (subv64si3_vcc<exec_vcc>): Rename to ...
4412 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
4413 (subcv64si3<exec_vcc>): Rename to ...
4414 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
4415 (addv64di3): Rename to ...
4416 (add<mode>3): ... this, and use V_DI.
4417 (addv64di3_exec): Rename to ...
4418 (add<mode>3_exec): ... this, and use V_DI.
4419 (subv64di3): Rename to ...
4420 (sub<mode>3): ... this, and use V_DI.
4421 (subv64di3_exec): Rename to ...
4422 (sub<mode>3_exec): ... this, and use V_DI.
4423 (addv64di3_zext): Rename to ...
4424 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
4425 (addv64di3_zext_exec): Rename to ...
4426 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4427 (addv64di3_zext_dup): Rename to ...
4428 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
4429 (addv64di3_zext_dup_exec): Rename to ...
4430 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
4431 (addv64di3_zext_dup2): Rename to ...
4432 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4433 (addv64di3_zext_dup2_exec): Rename to ...
4434 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4435 (addv64di3_sext_dup2): Rename to ...
4436 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
4437 (addv64di3_sext_dup2_exec): Rename to ...
4438 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
4439 (<su>mulv64si3_highpart<exec>): Rename to ...
4440 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
4441 (mulv64di3): Rename to ...
4442 (mul<mode>3): ... this, and use V_DI and <VnSI>.
4443 (mulv64di3_exec): Rename to ...
4444 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
4445 (mulv64di3_zext): Rename to ...
4446 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
4447 (mulv64di3_zext_exec): Rename to ...
4448 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
4449 (mulv64di3_zext_dup2): Rename to ...
4450 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
4451 (mulv64di3_zext_dup2_exec): Rename to ...
4452 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
4453 (<expander>v64di3): Rename to ...
4454 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
4455 (<expander>v64di3_exec): Rename to ...
4456 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
4457 (<expander>v64si3<exec>): Rename to ...
4458 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4459 (v<expander>v64si3<exec>): Rename to ...
4460 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
4461 (<expander>v64si3<exec>): Rename to ...
4462 (<expander><vnsi>3<exec>): ... this, and use V_SI.
4463 (subv64df3<exec>): Rename to ...
4464 (sub<mode>3<exec>): ... this, and use V_DF.
4465 (truncv64di<mode>2): Rename to ...
4466 (trunc<vndi><mode>2): ... this, and use <VnDI>.
4467 (truncv64di<mode>2_exec): Rename to ...
4468 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
4469 (<convop><mode>v64di2): Rename to ...
4470 (<convop><mode><vndi>2): ... this, and use <VnDI>.
4471 (<convop><mode>v64di2_exec): Rename to ...
4472 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
4473 (vec_cmp<u>v64qidi): Rename to ...
4474 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
4475 (vec_cmp<u>v64qidi_exec): Rename to ...
4476 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
4477 (vcond_mask_<mode>di): Use <VnDI>.
4478 (maskload<mode>di): Likewise.
4479 (maskstore<mode>di): Likewise.
4480 (mask_gather_load<mode>v64si): Rename to ...
4481 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4482 (mask_scatter_store<mode>v64si): Rename to ...
4483 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
4484 (*<reduc_op>_dpp_shr_v64di): Rename to ...
4485 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4486 (*plus_carry_in_dpp_shr_v64si): Rename to ...
4487 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
4488 (*plus_carry_dpp_shr_v64di): Rename to ...
4489 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
4490 (vec_seriesv64si): Rename to ...
4491 (vec_series<mode>): ... this, and use V_SI.
4492 (vec_seriesv64di): Rename to ...
4493 (vec_series<mode>): ... this, and use V_DI.
4495 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4497 * config/arc/arc.c (arc_print_operand): Use
4498 HOST_WIDE_INT_PRINT_DEC macro.
4500 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
4502 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
4504 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4506 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
4508 (__arm_vbicq): Likewise.
4510 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
4512 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
4514 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4516 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
4517 common section of both MVE Integer and MVE Floating Point.
4519 (vaddlvq_p): Likewise.
4520 (vaddvaq): Likewise.
4521 (vaddvq_p): Likewise.
4522 (vcmpcsq): Likewise.
4523 (vmlsdavxq): Likewise.
4524 (vmlsdavq): Likewise.
4525 (vmladavxq): Likewise.
4526 (vmladavq): Likewise.
4528 (vminavq): Likewise.
4530 (vmaxavq): Likewise.
4531 (vmlaldavq): Likewise.
4532 (vcmphiq): Likewise.
4533 (vaddlvaq): Likewise.
4534 (vrmlaldavhq): Likewise.
4535 (vrmlaldavhxq): Likewise.
4536 (vrmlsldavhq): Likewise.
4537 (vrmlsldavhxq): Likewise.
4538 (vmlsldavxq): Likewise.
4539 (vmlsldavq): Likewise.
4541 (vrmlaldavhaq): Likewise.
4542 (vcmpgeq_m_n): Likewise.
4543 (vmlsdavxq_p): Likewise.
4544 (vmlsdavq_p): Likewise.
4545 (vmlsdavaxq): Likewise.
4546 (vmlsdavaq): Likewise.
4547 (vaddvaq_p): Likewise.
4548 (vcmpcsq_m_n): Likewise.
4549 (vcmpcsq_m): Likewise.
4550 (vmladavxq_p): Likewise.
4551 (vmladavq_p): Likewise.
4552 (vmladavaxq): Likewise.
4553 (vmladavaq): Likewise.
4554 (vminvq_p): Likewise.
4555 (vminavq_p): Likewise.
4556 (vmaxvq_p): Likewise.
4557 (vmaxavq_p): Likewise.
4558 (vcmphiq_m): Likewise.
4559 (vaddlvaq_p): Likewise.
4560 (vmlaldavaq): Likewise.
4561 (vmlaldavaxq): Likewise.
4562 (vmlaldavq_p): Likewise.
4563 (vmlaldavxq_p): Likewise.
4564 (vmlsldavaq): Likewise.
4565 (vmlsldavaxq): Likewise.
4566 (vmlsldavq_p): Likewise.
4567 (vmlsldavxq_p): Likewise.
4568 (vrmlaldavhaxq): Likewise.
4569 (vrmlaldavhq_p): Likewise.
4570 (vrmlaldavhxq_p): Likewise.
4571 (vrmlsldavhaq): Likewise.
4572 (vrmlsldavhaxq): Likewise.
4573 (vrmlsldavhq_p): Likewise.
4574 (vrmlsldavhxq_p): Likewise.
4575 (vabavq_p): Likewise.
4576 (vmladavaq_p): Likewise.
4577 (vstrbq_scatter_offset): Likewise.
4578 (vstrbq_p): Likewise.
4579 (vstrbq_scatter_offset_p): Likewise.
4580 (vstrdq_scatter_base_p): Likewise.
4581 (vstrdq_scatter_base): Likewise.
4582 (vstrdq_scatter_offset_p): Likewise.
4583 (vstrdq_scatter_offset): Likewise.
4584 (vstrdq_scatter_shifted_offset_p): Likewise.
4585 (vstrdq_scatter_shifted_offset): Likewise.
4586 (vmaxq_x): Likewise.
4587 (vminq_x): Likewise.
4588 (vmovlbq_x): Likewise.
4589 (vmovltq_x): Likewise.
4590 (vmulhq_x): Likewise.
4591 (vmullbq_int_x): Likewise.
4592 (vmullbq_poly_x): Likewise.
4593 (vmulltq_int_x): Likewise.
4594 (vmulltq_poly_x): Likewise.
4597 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4600 * config/aarch64/constraints.md (Uph): New constraint.
4601 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
4602 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
4605 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
4606 Jakub Jelinek <jakub@redhat.com>
4609 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
4610 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
4612 2020-03-31 Jakub Jelinek <jakub@redhat.com>
4614 PR tree-optimization/94403
4615 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
4616 ENUMERAL_TYPE lhs_type.
4618 PR rtl-optimization/94344
4619 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
4620 conversions, either on both operands of |^+ or just one. Handle
4621 also extra same precision conversion on RSHIFT_EXPR first operand
4622 provided RSHIFT_EXPR is performed in unsigned type.
4624 2020-03-30 David Malcolm <dmalcolm@redhat.com>
4626 * lra.c (finish_insn_code_data_once): Set the array elements
4627 to NULL after freeing them.
4629 2020-03-30 Andreas Schwab <schwab@suse.de>
4631 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
4634 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
4636 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
4637 to skip defining builtins based on builtin_mask.
4639 2020-03-30 Jakub Jelinek <jakub@redhat.com>
4642 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
4643 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
4644 operand is a register. Don't enable masked variants for V*[QH]Imode.
4647 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
4648 <store_mask_constraint> instead of m in output operand constraint.
4649 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
4652 2020-03-30 Alan Modra <amodra@gmail.com>
4654 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
4655 (rs6000_indirect_call_template_1): Adjust to suit.
4656 * config/rs6000/rs6000.md (call_local): Merge call_local32,
4657 call_local64, and call_local_aix.
4658 (call_value_local): Simlarly.
4659 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
4660 and disable pattern when CALL_LONG.
4661 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
4662 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
4663 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
4665 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
4668 * doc/invoke.texi: Update -falign-functions, -falign-loops and
4669 -falign-jumps documentation.
4671 2020-03-29 Martin Liska <mliska@suse.cz>
4674 * cgraphunit.c (process_function_and_variable_attributes): Remove
4675 double 'attribute' words.
4677 2020-03-29 John David Anglin <dave.anglin@bell.net>
4679 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
4682 2020-03-28 Jakub Jelinek <jakub@redhat.com>
4685 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
4686 to true after setting size to integer_one_node.
4688 PR tree-optimization/94329
4689 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
4690 on the last stmt in a bb, make sure gsi_prev isn't done immediately
4693 2020-03-27 Alan Modra <amodra@gmail.com>
4696 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
4697 for PLT16_LO and PLT_PCREL.
4698 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
4699 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
4700 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
4702 2020-03-27 Martin Sebor <msebor@redhat.com>
4705 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
4707 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
4709 * config/gcn/gcn-valu.md:
4710 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
4711 (VEC_1REG_MODE): Delete.
4712 (VEC_1REG_ALT): Delete.
4713 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
4714 (VEC_1REG_INT_MODE): Delete.
4715 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
4716 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
4717 (VEC_2REG_MODE): Rename to V_2REG throughout.
4718 (VEC_REG_MODE): Rename to V_noHI throughout.
4719 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
4720 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
4721 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
4722 (VEC_INT_MODE): Delete.
4723 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
4724 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
4725 (FP_MODE): Delete and replace with FP throughout.
4726 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
4727 (VCMP_MODE): Rename to V_noQI throughout and move to top.
4728 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
4729 * config/gcn/gcn.md (FP): New mode iterator.
4730 (FP_1REG): New mode iterator.
4732 2020-03-27 David Malcolm <dmalcolm@redhat.com>
4734 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
4735 now emits two .dot files.
4736 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
4737 (graphviz_out::end_tr): Only close a TR, not a TD.
4738 (graphviz_out::begin_td): New.
4739 (graphviz_out::end_td): New.
4740 (graphviz_out::begin_trtd): New, replacing the old implementation
4741 of graphviz_out::begin_tr.
4742 (graphviz_out::end_tdtr): New, replacing the old implementation
4743 of graphviz_out::end_tr.
4744 * graphviz.h (graphviz_out::begin_td): New decl.
4745 (graphviz_out::end_td): New decl.
4746 (graphviz_out::begin_trtd): New decl.
4747 (graphviz_out::end_tdtr): New decl.
4749 2020-03-27 Richard Biener <rguenther@suse.de>
4752 * dwarf2out.c (should_emit_struct_debug): Return false for
4755 2020-03-27 Richard Biener <rguenther@suse.de>
4757 PR tree-optimization/94352
4758 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
4760 (ssa_propagation_engine::ssa_propagate): ... here after
4761 initializing curr_order.
4763 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
4765 PR tree-optimization/90332
4766 * tree-vect-stmts.c (vector_vector_composition_type): New function.
4767 (get_group_load_store_type): Adjust to call
4768 vector_vector_composition_type, extend it to construct with scalar
4770 (vectorizable_load): Likewise.
4772 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
4774 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
4775 (create_ddg_dep_no_link): Likewise.
4776 (add_cross_iteration_register_deps): Move debug instruction check.
4777 Other minor refactoring.
4778 (add_intra_loop_mem_dep): Do not check for debug instructions.
4779 (add_inter_loop_mem_dep): Likewise.
4780 (build_intra_loop_deps): Likewise.
4781 (create_ddg): Do not include debug insns into the graph.
4782 * ddg.h (struct ddg): Remove num_debug field.
4783 * modulo-sched.c (doloop_register_get): Adjust condition.
4784 (res_MII): Remove DDG num_debug field usage.
4785 (sms_schedule_by_order): Use assertion against debug insns.
4786 (ps_has_conflicts): Drop debug insn check.
4788 2020-03-26 Jakub Jelinek <jakub@redhat.com>
4791 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
4792 that contains exactly one non-DEBUG_BEGIN_STMT statement.
4795 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
4796 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
4797 a single non-debug stmt followed by one or more debug stmts.
4798 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
4799 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
4800 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
4801 gimple_seq_last to check if outer_stmt gbind could be reused and
4802 if yes and it is surrounded by any debug stmts, move them into the
4805 PR rtl-optimization/92264
4806 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
4807 for sp based values in !frame_pointer_needed
4808 && !ACCUMULATE_OUTGOING_ARGS functions.
4810 2020-03-26 Felix Yang <felix.yang@huawei.com>
4812 PR tree-optimization/94269
4813 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
4815 operation to single basic block.
4817 2020-03-25 Jeff Law <law@redhat.com>
4819 PR rtl-optimization/90275
4820 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
4823 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4826 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
4827 mode rather than VOIDmode.
4829 2020-03-25 Martin Sebor <msebor@redhat.com>
4832 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
4833 even for alloca calls resulting from system macro expansion.
4834 Include inlining context in all warnings.
4836 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
4839 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
4840 FPRs to change between SDmode and DDmode.
4842 2020-03-25 Martin Sebor <msebor@redhat.com>
4844 PR tree-optimization/94131
4845 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
4847 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
4848 types have constant sizes.
4850 2020-03-25 Martin Liska <mliska@suse.cz>
4853 * configure.ac: Report error only when --with-zstd
4855 * configure: Regenerate.
4857 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4860 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
4861 INSN_CODE (insn) to -1 when changing the pattern.
4863 2020-03-25 Martin Liska <mliska@suse.cz>
4867 * config/i386/i386-features.c (make_resolver_func): Drop
4868 public flag for resolver.
4869 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
4870 group for resolver and drop public flag if possible.
4871 * multiple_target.c (create_dispatcher_calls): Drop unique_name
4872 and resolution as we want to enable LTO privatization of the default
4875 2020-03-25 Martin Liska <mliska@suse.cz>
4878 * configure.ac: Respect --without-zstd and report
4879 error when we can't find header file with --with-zstd.
4880 * configure: Regenerate.
4882 2020-03-25 Jakub Jelinek <jakub@redhat.com>
4885 * varasm.c (output_constructor_array_range): If local->index
4886 RANGE_EXPR doesn't start at the current location in the constructor,
4887 skip needed number of bytes using assemble_zeros or assert we don't
4891 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
4892 counter instead of DECL_UID.
4894 PR tree-optimization/94300
4895 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
4896 is positive, make sure that off + size isn't larger than needed_len.
4898 2020-03-25 Richard Biener <rguenther@suse.de>
4899 Jakub Jelinek <jakub@redhat.com>
4902 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
4904 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
4906 * doc/sourcebuild.texi (ARM-specific attributes): Add
4908 (Features for dg-add-options): Add arm_fp_dp.
4910 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
4913 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
4915 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
4918 * omp-offload.c (omp_finish_file): Fix target-link handling if
4919 targetm_common.have_named_sections is false.
4921 2020-03-24 Jakub Jelinek <jakub@redhat.com>
4924 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
4928 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
4929 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
4930 If not after and at *incr_pos is a debug stmt, set stmt location to
4931 location of next non-debug stmt after it if any.
4934 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
4935 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
4936 worklist or set GF_PLF_2 just because it is used in a debug stmt in
4937 another bb. Formatting improvements.
4940 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
4941 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
4942 regardless of whether TREE_NO_WARNING is set on it or whether
4943 warn_unused_function is true or not.
4945 2020-03-23 Jeff Law <law@redhat.com>
4947 PR rtl-optimization/90275
4950 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
4951 (simplify_logical_relational_operation): Use it.
4953 2020-03-23 Jakub Jelinek <jakub@redhat.com>
4956 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
4957 ultimate rhs and if returned something different, reconstructing
4960 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
4962 * opts.c (print_filtered_help): Improve the help text for alias options.
4964 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4965 Andre Vieira <andre.simoesdiasvieira@arm.com>
4966 Mihail Ionescu <mihail.ionescu@arm.com>
4968 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
4969 (vshlcq_m_u8): Likewise.
4970 (vshlcq_m_s16): Likewise.
4971 (vshlcq_m_u16): Likewise.
4972 (vshlcq_m_s32): Likewise.
4973 (vshlcq_m_u32): Likewise.
4974 (__arm_vshlcq_m_s8): Define intrinsic.
4975 (__arm_vshlcq_m_u8): Likewise.
4976 (__arm_vshlcq_m_s16): Likewise.
4977 (__arm_vshlcq_m_u16): Likewise.
4978 (__arm_vshlcq_m_s32): Likewise.
4979 (__arm_vshlcq_m_u32): Likewise.
4980 (vshlcq_m): Define polymorphic variant.
4981 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
4982 Use builtin qualifier.
4983 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
4984 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
4985 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
4986 (mve_vshlcq_m_<supf><mode>): Likewise.
4988 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
4990 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
4991 (UQSHL_QUALIFIERS): Likewise.
4992 (ASRL_QUALIFIERS): Likewise.
4993 (SQSHL_QUALIFIERS): Likewise.
4994 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
4996 (sqrshr): Define macro.
4997 (sqrshrl): Likewise.
4998 (sqrshrl_sat48): Likewise.
5004 (uqrshll): Likewise.
5005 (uqrshll_sat48): Likewise.
5012 (__arm_lsll): Define intrinsic.
5013 (__arm_asrl): Likewise.
5014 (__arm_uqrshll): Likewise.
5015 (__arm_uqrshll_sat48): Likewise.
5016 (__arm_sqrshrl): Likewise.
5017 (__arm_sqrshrl_sat48): Likewise.
5018 (__arm_uqshll): Likewise.
5019 (__arm_urshrl): Likewise.
5020 (__arm_srshrl): Likewise.
5021 (__arm_sqshll): Likewise.
5022 (__arm_uqrshl): Likewise.
5023 (__arm_sqrshr): Likewise.
5024 (__arm_uqshl): Likewise.
5025 (__arm_urshr): Likewise.
5026 (__arm_sqshl): Likewise.
5027 (__arm_srshr): Likewise.
5028 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
5030 (UQSHL_QUALIFIERS): Likewise.
5031 (ASRL_QUALIFIERS): Likewise.
5032 (SQSHL_QUALIFIERS): Likewise.
5033 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
5034 (mve_sqrshrl_sat<supf>_di): Likewise.
5035 (mve_uqrshl_si): Likewise.
5036 (mve_sqrshr_si): Likewise.
5037 (mve_uqshll_di): Likewise.
5038 (mve_urshrl_di): Likewise.
5039 (mve_uqshl_si): Likewise.
5040 (mve_urshr_si): Likewise.
5041 (mve_sqshl_si): Likewise.
5042 (mve_srshr_si): Likewise.
5043 (mve_srshrl_di): Likewise.
5044 (mve_sqshll_di): Likewise.
5046 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5047 Andre Vieira <andre.simoesdiasvieira@arm.com>
5048 Mihail Ionescu <mihail.ionescu@arm.com>
5050 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
5051 (vsetq_lane_f32): Likewise.
5052 (vsetq_lane_s16): Likewise.
5053 (vsetq_lane_s32): Likewise.
5054 (vsetq_lane_s8): Likewise.
5055 (vsetq_lane_s64): Likewise.
5056 (vsetq_lane_u8): Likewise.
5057 (vsetq_lane_u16): Likewise.
5058 (vsetq_lane_u32): Likewise.
5059 (vsetq_lane_u64): Likewise.
5060 (vgetq_lane_f16): Likewise.
5061 (vgetq_lane_f32): Likewise.
5062 (vgetq_lane_s16): Likewise.
5063 (vgetq_lane_s32): Likewise.
5064 (vgetq_lane_s8): Likewise.
5065 (vgetq_lane_s64): Likewise.
5066 (vgetq_lane_u8): Likewise.
5067 (vgetq_lane_u16): Likewise.
5068 (vgetq_lane_u32): Likewise.
5069 (vgetq_lane_u64): Likewise.
5070 (__ARM_NUM_LANES): Likewise.
5071 (__ARM_LANEQ): Likewise.
5072 (__ARM_CHECK_LANEQ): Likewise.
5073 (__arm_vsetq_lane_s16): Define intrinsic.
5074 (__arm_vsetq_lane_s32): Likewise.
5075 (__arm_vsetq_lane_s8): Likewise.
5076 (__arm_vsetq_lane_s64): Likewise.
5077 (__arm_vsetq_lane_u8): Likewise.
5078 (__arm_vsetq_lane_u16): Likewise.
5079 (__arm_vsetq_lane_u32): Likewise.
5080 (__arm_vsetq_lane_u64): Likewise.
5081 (__arm_vgetq_lane_s16): Likewise.
5082 (__arm_vgetq_lane_s32): Likewise.
5083 (__arm_vgetq_lane_s8): Likewise.
5084 (__arm_vgetq_lane_s64): Likewise.
5085 (__arm_vgetq_lane_u8): Likewise.
5086 (__arm_vgetq_lane_u16): Likewise.
5087 (__arm_vgetq_lane_u32): Likewise.
5088 (__arm_vgetq_lane_u64): Likewise.
5089 (__arm_vsetq_lane_f16): Likewise.
5090 (__arm_vsetq_lane_f32): Likewise.
5091 (__arm_vgetq_lane_f16): Likewise.
5092 (__arm_vgetq_lane_f32): Likewise.
5093 (vgetq_lane): Define polymorphic variant.
5094 (vsetq_lane): Likewise.
5095 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
5097 (mve_vec_extractv2didi): Likewise.
5098 (mve_vec_extract_sext_internal<mode>): Likewise.
5099 (mve_vec_extract_zext_internal<mode>): Likewise.
5100 (mve_vec_set<mode>_internal): Likewise.
5101 (mve_vec_setv2di_internal): Likewise.
5102 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
5104 (vec_extract<mode><V_elem_l>): Rename to
5105 "neon_vec_extract<mode><V_elem_l>".
5106 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
5107 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
5108 pattern common for MVE and NEON.
5109 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
5112 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
5114 * config/arm/mve.md (earlyclobber_32): New mode attribute.
5115 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
5116 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
5118 2020-03-23 Richard Biener <rguenther@suse.de>
5120 PR tree-optimization/94261
5121 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
5122 IL operand swapping code.
5123 (vect_slp_rearrange_stmts): Do not arrange isomorphic
5124 nodes that would need operation code adjustments.
5126 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
5128 * doc/install.texi (amdgcn-*-amdhsa): Renamed
5129 from amdgcn-unknown-amdhsa; change
5130 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
5132 2020-03-23 Richard Biener <rguenther@suse.de>
5135 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
5136 directly rather than also folding it via build_fold_addr_expr.
5138 2020-03-23 Richard Biener <rguenther@suse.de>
5140 PR tree-optimization/94266
5141 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
5142 addresses of TARGET_MEM_REFs.
5144 2020-03-23 Martin Liska <mliska@suse.cz>
5147 * symtab.c (symtab_node::clone_references): Save speculative_id
5148 as ref may be overwritten by create_reference.
5149 (symtab_node::clone_referring): Likewise.
5150 (symtab_node::clone_reference): Likewise.
5152 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
5154 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
5155 references to Darwin.
5156 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
5157 unconditionally and comment on why.
5159 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5161 * config/darwin.c (darwin_mergeable_constant_section): Collect
5162 section anchor checks into the caller.
5163 (machopic_select_section): Collect section anchor checks into
5164 the determination of 'effective zero-size' objects. When the
5165 size is unknown, assume it is non-zero, and thus return the
5166 'generic' section for the DECL.
5168 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
5171 * config/darwin.opt: Amend options descriptions.
5173 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
5175 PR rtl-optimization/94052
5176 * lra-constraints.c (simplify_operand_subreg): Reload the inner
5177 register of a paradoxical subreg if simplify_subreg_regno fails
5178 to give a valid hard register for the outer mode.
5180 2020-03-20 Martin Jambor <mjambor@suse.cz>
5182 PR tree-optimization/93435
5183 * params.opt (sra-max-propagations): New parameter.
5184 * tree-sra.c (propagation_budget): New variable.
5185 (budget_for_propagation_access): New function.
5186 (propagate_subaccesses_from_rhs): Use it.
5187 (propagate_subaccesses_from_lhs): Likewise.
5188 (propagate_all_subaccesses): Set up and destroy propagation_budget.
5190 2020-03-20 Carl Love <cel@us.ibm.com>
5193 * config/rs6000/rs6000.c (rs6000_option_override_internal):
5194 Add check for TARGET_FPRND for Power 7 or newer.
5196 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
5199 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
5200 (cgraph_edge::redirect_callee): Move here; likewise.
5201 (cgraph_node::remove_callees): Update calls_comdat_local flag.
5202 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
5204 (cgraph_node::check_calls_comdat_local_p): New member function.
5205 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
5206 (cgraph_edge::redirect_callee): Move offline.
5207 * ipa-fnsummary.c (compute_fn_summary): Do not compute
5208 calls_comdat_local flag here.
5209 * ipa-inline-transform.c (inline_call): Fix updating of
5210 calls_comdat_local flag.
5211 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
5212 * symtab.c (symtab_node::add_to_same_comdat_group): Update
5213 calls_comdat_local flag.
5215 2020-03-20 Richard Biener <rguenther@suse.de>
5217 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
5218 from the possibly modified root.
5220 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5221 Andre Vieira <andre.simoesdiasvieira@arm.com>
5222 Mihail Ionescu <mihail.ionescu@arm.com>
5224 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
5225 (vst1q_p_s8): Likewise.
5226 (vst2q_s8): Likewise.
5227 (vst2q_u8): Likewise.
5228 (vld1q_z_u8): Likewise.
5229 (vld1q_z_s8): Likewise.
5230 (vld2q_s8): Likewise.
5231 (vld2q_u8): Likewise.
5232 (vld4q_s8): Likewise.
5233 (vld4q_u8): Likewise.
5234 (vst1q_p_u16): Likewise.
5235 (vst1q_p_s16): Likewise.
5236 (vst2q_s16): Likewise.
5237 (vst2q_u16): Likewise.
5238 (vld1q_z_u16): Likewise.
5239 (vld1q_z_s16): Likewise.
5240 (vld2q_s16): Likewise.
5241 (vld2q_u16): Likewise.
5242 (vld4q_s16): Likewise.
5243 (vld4q_u16): Likewise.
5244 (vst1q_p_u32): Likewise.
5245 (vst1q_p_s32): Likewise.
5246 (vst2q_s32): Likewise.
5247 (vst2q_u32): Likewise.
5248 (vld1q_z_u32): Likewise.
5249 (vld1q_z_s32): Likewise.
5250 (vld2q_s32): Likewise.
5251 (vld2q_u32): Likewise.
5252 (vld4q_s32): Likewise.
5253 (vld4q_u32): Likewise.
5254 (vld4q_f16): Likewise.
5255 (vld2q_f16): Likewise.
5256 (vld1q_z_f16): Likewise.
5257 (vst2q_f16): Likewise.
5258 (vst1q_p_f16): Likewise.
5259 (vld4q_f32): Likewise.
5260 (vld2q_f32): Likewise.
5261 (vld1q_z_f32): Likewise.
5262 (vst2q_f32): Likewise.
5263 (vst1q_p_f32): Likewise.
5264 (__arm_vst1q_p_u8): Define intrinsic.
5265 (__arm_vst1q_p_s8): Likewise.
5266 (__arm_vst2q_s8): Likewise.
5267 (__arm_vst2q_u8): Likewise.
5268 (__arm_vld1q_z_u8): Likewise.
5269 (__arm_vld1q_z_s8): Likewise.
5270 (__arm_vld2q_s8): Likewise.
5271 (__arm_vld2q_u8): Likewise.
5272 (__arm_vld4q_s8): Likewise.
5273 (__arm_vld4q_u8): Likewise.
5274 (__arm_vst1q_p_u16): Likewise.
5275 (__arm_vst1q_p_s16): Likewise.
5276 (__arm_vst2q_s16): Likewise.
5277 (__arm_vst2q_u16): Likewise.
5278 (__arm_vld1q_z_u16): Likewise.
5279 (__arm_vld1q_z_s16): Likewise.
5280 (__arm_vld2q_s16): Likewise.
5281 (__arm_vld2q_u16): Likewise.
5282 (__arm_vld4q_s16): Likewise.
5283 (__arm_vld4q_u16): Likewise.
5284 (__arm_vst1q_p_u32): Likewise.
5285 (__arm_vst1q_p_s32): Likewise.
5286 (__arm_vst2q_s32): Likewise.
5287 (__arm_vst2q_u32): Likewise.
5288 (__arm_vld1q_z_u32): Likewise.
5289 (__arm_vld1q_z_s32): Likewise.
5290 (__arm_vld2q_s32): Likewise.
5291 (__arm_vld2q_u32): Likewise.
5292 (__arm_vld4q_s32): Likewise.
5293 (__arm_vld4q_u32): Likewise.
5294 (__arm_vld4q_f16): Likewise.
5295 (__arm_vld2q_f16): Likewise.
5296 (__arm_vld1q_z_f16): Likewise.
5297 (__arm_vst2q_f16): Likewise.
5298 (__arm_vst1q_p_f16): Likewise.
5299 (__arm_vld4q_f32): Likewise.
5300 (__arm_vld2q_f32): Likewise.
5301 (__arm_vld1q_z_f32): Likewise.
5302 (__arm_vst2q_f32): Likewise.
5303 (__arm_vst1q_p_f32): Likewise.
5304 (vld1q_z): Define polymorphic variant.
5307 (vst1q_p): Likewise.
5309 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
5311 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
5312 (mve_vld2q<mode>): Likewise.
5313 (mve_vld4q<mode>): Likewise.
5315 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5316 Andre Vieira <andre.simoesdiasvieira@arm.com>
5317 Mihail Ionescu <mihail.ionescu@arm.com>
5319 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
5320 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
5321 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
5322 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
5323 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
5324 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
5325 * config/arm/arm_mve.h (vadciq_s32): Define macro.
5326 (vadciq_u32): Likewise.
5327 (vadciq_m_s32): Likewise.
5328 (vadciq_m_u32): Likewise.
5329 (vadcq_s32): Likewise.
5330 (vadcq_u32): Likewise.
5331 (vadcq_m_s32): Likewise.
5332 (vadcq_m_u32): Likewise.
5333 (vsbciq_s32): Likewise.
5334 (vsbciq_u32): Likewise.
5335 (vsbciq_m_s32): Likewise.
5336 (vsbciq_m_u32): Likewise.
5337 (vsbcq_s32): Likewise.
5338 (vsbcq_u32): Likewise.
5339 (vsbcq_m_s32): Likewise.
5340 (vsbcq_m_u32): Likewise.
5341 (__arm_vadciq_s32): Define intrinsic.
5342 (__arm_vadciq_u32): Likewise.
5343 (__arm_vadciq_m_s32): Likewise.
5344 (__arm_vadciq_m_u32): Likewise.
5345 (__arm_vadcq_s32): Likewise.
5346 (__arm_vadcq_u32): Likewise.
5347 (__arm_vadcq_m_s32): Likewise.
5348 (__arm_vadcq_m_u32): Likewise.
5349 (__arm_vsbciq_s32): Likewise.
5350 (__arm_vsbciq_u32): Likewise.
5351 (__arm_vsbciq_m_s32): Likewise.
5352 (__arm_vsbciq_m_u32): Likewise.
5353 (__arm_vsbcq_s32): Likewise.
5354 (__arm_vsbcq_u32): Likewise.
5355 (__arm_vsbcq_m_s32): Likewise.
5356 (__arm_vsbcq_m_u32): Likewise.
5357 (vadciq_m): Define polymorphic variant.
5359 (vadcq_m): Likewise.
5361 (vsbciq_m): Likewise.
5363 (vsbcq_m): Likewise.
5365 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
5367 (BINOP_UNONE_UNONE_UNONE): Likewise.
5368 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
5369 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
5370 * config/arm/mve.md (VADCIQ): Define iterator.
5371 (VADCIQ_M): Likewise.
5373 (VSBCQ_M): Likewise.
5375 (VSBCIQ_M): Likewise.
5377 (VADCQ_M): Likewise.
5378 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
5379 (mve_vadciq_<supf>v4si): Likewise.
5380 (mve_vadcq_m_<supf>v4si): Likewise.
5381 (mve_vadcq_<supf>v4si): Likewise.
5382 (mve_vsbciq_m_<supf>v4si): Likewise.
5383 (mve_vsbciq_<supf>v4si): Likewise.
5384 (mve_vsbcq_m_<supf>v4si): Likewise.
5385 (mve_vsbcq_<supf>v4si): Likewise.
5386 (get_fpscr_nzcvqc): Define isns.
5387 (set_fpscr_nzcvqc): Define isns.
5388 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
5389 (UNSPEC_SET_FPSCR_NZCVQC): Define.
5391 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5393 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
5394 (vddupq_x_n_u16): Likewise.
5395 (vddupq_x_n_u32): Likewise.
5396 (vddupq_x_wb_u8): Likewise.
5397 (vddupq_x_wb_u16): Likewise.
5398 (vddupq_x_wb_u32): Likewise.
5399 (vdwdupq_x_n_u8): Likewise.
5400 (vdwdupq_x_n_u16): Likewise.
5401 (vdwdupq_x_n_u32): Likewise.
5402 (vdwdupq_x_wb_u8): Likewise.
5403 (vdwdupq_x_wb_u16): Likewise.
5404 (vdwdupq_x_wb_u32): Likewise.
5405 (vidupq_x_n_u8): Likewise.
5406 (vidupq_x_n_u16): Likewise.
5407 (vidupq_x_n_u32): Likewise.
5408 (vidupq_x_wb_u8): Likewise.
5409 (vidupq_x_wb_u16): Likewise.
5410 (vidupq_x_wb_u32): Likewise.
5411 (viwdupq_x_n_u8): Likewise.
5412 (viwdupq_x_n_u16): Likewise.
5413 (viwdupq_x_n_u32): Likewise.
5414 (viwdupq_x_wb_u8): Likewise.
5415 (viwdupq_x_wb_u16): Likewise.
5416 (viwdupq_x_wb_u32): Likewise.
5417 (vdupq_x_n_s8): Likewise.
5418 (vdupq_x_n_s16): Likewise.
5419 (vdupq_x_n_s32): Likewise.
5420 (vdupq_x_n_u8): Likewise.
5421 (vdupq_x_n_u16): Likewise.
5422 (vdupq_x_n_u32): Likewise.
5423 (vminq_x_s8): Likewise.
5424 (vminq_x_s16): Likewise.
5425 (vminq_x_s32): Likewise.
5426 (vminq_x_u8): Likewise.
5427 (vminq_x_u16): Likewise.
5428 (vminq_x_u32): Likewise.
5429 (vmaxq_x_s8): Likewise.
5430 (vmaxq_x_s16): Likewise.
5431 (vmaxq_x_s32): Likewise.
5432 (vmaxq_x_u8): Likewise.
5433 (vmaxq_x_u16): Likewise.
5434 (vmaxq_x_u32): Likewise.
5435 (vabdq_x_s8): Likewise.
5436 (vabdq_x_s16): Likewise.
5437 (vabdq_x_s32): Likewise.
5438 (vabdq_x_u8): Likewise.
5439 (vabdq_x_u16): Likewise.
5440 (vabdq_x_u32): Likewise.
5441 (vabsq_x_s8): Likewise.
5442 (vabsq_x_s16): Likewise.
5443 (vabsq_x_s32): Likewise.
5444 (vaddq_x_s8): Likewise.
5445 (vaddq_x_s16): Likewise.
5446 (vaddq_x_s32): Likewise.
5447 (vaddq_x_n_s8): Likewise.
5448 (vaddq_x_n_s16): Likewise.
5449 (vaddq_x_n_s32): Likewise.
5450 (vaddq_x_u8): Likewise.
5451 (vaddq_x_u16): Likewise.
5452 (vaddq_x_u32): Likewise.
5453 (vaddq_x_n_u8): Likewise.
5454 (vaddq_x_n_u16): Likewise.
5455 (vaddq_x_n_u32): Likewise.
5456 (vclsq_x_s8): Likewise.
5457 (vclsq_x_s16): Likewise.
5458 (vclsq_x_s32): Likewise.
5459 (vclzq_x_s8): Likewise.
5460 (vclzq_x_s16): Likewise.
5461 (vclzq_x_s32): Likewise.
5462 (vclzq_x_u8): Likewise.
5463 (vclzq_x_u16): Likewise.
5464 (vclzq_x_u32): Likewise.
5465 (vnegq_x_s8): Likewise.
5466 (vnegq_x_s16): Likewise.
5467 (vnegq_x_s32): Likewise.
5468 (vmulhq_x_s8): Likewise.
5469 (vmulhq_x_s16): Likewise.
5470 (vmulhq_x_s32): Likewise.
5471 (vmulhq_x_u8): Likewise.
5472 (vmulhq_x_u16): Likewise.
5473 (vmulhq_x_u32): Likewise.
5474 (vmullbq_poly_x_p8): Likewise.
5475 (vmullbq_poly_x_p16): Likewise.
5476 (vmullbq_int_x_s8): Likewise.
5477 (vmullbq_int_x_s16): Likewise.
5478 (vmullbq_int_x_s32): Likewise.
5479 (vmullbq_int_x_u8): Likewise.
5480 (vmullbq_int_x_u16): Likewise.
5481 (vmullbq_int_x_u32): Likewise.
5482 (vmulltq_poly_x_p8): Likewise.
5483 (vmulltq_poly_x_p16): Likewise.
5484 (vmulltq_int_x_s8): Likewise.
5485 (vmulltq_int_x_s16): Likewise.
5486 (vmulltq_int_x_s32): Likewise.
5487 (vmulltq_int_x_u8): Likewise.
5488 (vmulltq_int_x_u16): Likewise.
5489 (vmulltq_int_x_u32): Likewise.
5490 (vmulq_x_s8): Likewise.
5491 (vmulq_x_s16): Likewise.
5492 (vmulq_x_s32): Likewise.
5493 (vmulq_x_n_s8): Likewise.
5494 (vmulq_x_n_s16): Likewise.
5495 (vmulq_x_n_s32): Likewise.
5496 (vmulq_x_u8): Likewise.
5497 (vmulq_x_u16): Likewise.
5498 (vmulq_x_u32): Likewise.
5499 (vmulq_x_n_u8): Likewise.
5500 (vmulq_x_n_u16): Likewise.
5501 (vmulq_x_n_u32): Likewise.
5502 (vsubq_x_s8): Likewise.
5503 (vsubq_x_s16): Likewise.
5504 (vsubq_x_s32): Likewise.
5505 (vsubq_x_n_s8): Likewise.
5506 (vsubq_x_n_s16): Likewise.
5507 (vsubq_x_n_s32): Likewise.
5508 (vsubq_x_u8): Likewise.
5509 (vsubq_x_u16): Likewise.
5510 (vsubq_x_u32): Likewise.
5511 (vsubq_x_n_u8): Likewise.
5512 (vsubq_x_n_u16): Likewise.
5513 (vsubq_x_n_u32): Likewise.
5514 (vcaddq_rot90_x_s8): Likewise.
5515 (vcaddq_rot90_x_s16): Likewise.
5516 (vcaddq_rot90_x_s32): Likewise.
5517 (vcaddq_rot90_x_u8): Likewise.
5518 (vcaddq_rot90_x_u16): Likewise.
5519 (vcaddq_rot90_x_u32): Likewise.
5520 (vcaddq_rot270_x_s8): Likewise.
5521 (vcaddq_rot270_x_s16): Likewise.
5522 (vcaddq_rot270_x_s32): Likewise.
5523 (vcaddq_rot270_x_u8): Likewise.
5524 (vcaddq_rot270_x_u16): Likewise.
5525 (vcaddq_rot270_x_u32): Likewise.
5526 (vhaddq_x_n_s8): Likewise.
5527 (vhaddq_x_n_s16): Likewise.
5528 (vhaddq_x_n_s32): Likewise.
5529 (vhaddq_x_n_u8): Likewise.
5530 (vhaddq_x_n_u16): Likewise.
5531 (vhaddq_x_n_u32): Likewise.
5532 (vhaddq_x_s8): Likewise.
5533 (vhaddq_x_s16): Likewise.
5534 (vhaddq_x_s32): Likewise.
5535 (vhaddq_x_u8): Likewise.
5536 (vhaddq_x_u16): Likewise.
5537 (vhaddq_x_u32): Likewise.
5538 (vhcaddq_rot90_x_s8): Likewise.
5539 (vhcaddq_rot90_x_s16): Likewise.
5540 (vhcaddq_rot90_x_s32): Likewise.
5541 (vhcaddq_rot270_x_s8): Likewise.
5542 (vhcaddq_rot270_x_s16): Likewise.
5543 (vhcaddq_rot270_x_s32): Likewise.
5544 (vhsubq_x_n_s8): Likewise.
5545 (vhsubq_x_n_s16): Likewise.
5546 (vhsubq_x_n_s32): Likewise.
5547 (vhsubq_x_n_u8): Likewise.
5548 (vhsubq_x_n_u16): Likewise.
5549 (vhsubq_x_n_u32): Likewise.
5550 (vhsubq_x_s8): Likewise.
5551 (vhsubq_x_s16): Likewise.
5552 (vhsubq_x_s32): Likewise.
5553 (vhsubq_x_u8): Likewise.
5554 (vhsubq_x_u16): Likewise.
5555 (vhsubq_x_u32): Likewise.
5556 (vrhaddq_x_s8): Likewise.
5557 (vrhaddq_x_s16): Likewise.
5558 (vrhaddq_x_s32): Likewise.
5559 (vrhaddq_x_u8): Likewise.
5560 (vrhaddq_x_u16): Likewise.
5561 (vrhaddq_x_u32): Likewise.
5562 (vrmulhq_x_s8): Likewise.
5563 (vrmulhq_x_s16): Likewise.
5564 (vrmulhq_x_s32): Likewise.
5565 (vrmulhq_x_u8): Likewise.
5566 (vrmulhq_x_u16): Likewise.
5567 (vrmulhq_x_u32): Likewise.
5568 (vandq_x_s8): Likewise.
5569 (vandq_x_s16): Likewise.
5570 (vandq_x_s32): Likewise.
5571 (vandq_x_u8): Likewise.
5572 (vandq_x_u16): Likewise.
5573 (vandq_x_u32): Likewise.
5574 (vbicq_x_s8): Likewise.
5575 (vbicq_x_s16): Likewise.
5576 (vbicq_x_s32): Likewise.
5577 (vbicq_x_u8): Likewise.
5578 (vbicq_x_u16): Likewise.
5579 (vbicq_x_u32): Likewise.
5580 (vbrsrq_x_n_s8): Likewise.
5581 (vbrsrq_x_n_s16): Likewise.
5582 (vbrsrq_x_n_s32): Likewise.
5583 (vbrsrq_x_n_u8): Likewise.
5584 (vbrsrq_x_n_u16): Likewise.
5585 (vbrsrq_x_n_u32): Likewise.
5586 (veorq_x_s8): Likewise.
5587 (veorq_x_s16): Likewise.
5588 (veorq_x_s32): Likewise.
5589 (veorq_x_u8): Likewise.
5590 (veorq_x_u16): Likewise.
5591 (veorq_x_u32): Likewise.
5592 (vmovlbq_x_s8): Likewise.
5593 (vmovlbq_x_s16): Likewise.
5594 (vmovlbq_x_u8): Likewise.
5595 (vmovlbq_x_u16): Likewise.
5596 (vmovltq_x_s8): Likewise.
5597 (vmovltq_x_s16): Likewise.
5598 (vmovltq_x_u8): Likewise.
5599 (vmovltq_x_u16): Likewise.
5600 (vmvnq_x_s8): Likewise.
5601 (vmvnq_x_s16): Likewise.
5602 (vmvnq_x_s32): Likewise.
5603 (vmvnq_x_u8): Likewise.
5604 (vmvnq_x_u16): Likewise.
5605 (vmvnq_x_u32): Likewise.
5606 (vmvnq_x_n_s16): Likewise.
5607 (vmvnq_x_n_s32): Likewise.
5608 (vmvnq_x_n_u16): Likewise.
5609 (vmvnq_x_n_u32): Likewise.
5610 (vornq_x_s8): Likewise.
5611 (vornq_x_s16): Likewise.
5612 (vornq_x_s32): Likewise.
5613 (vornq_x_u8): Likewise.
5614 (vornq_x_u16): Likewise.
5615 (vornq_x_u32): Likewise.
5616 (vorrq_x_s8): Likewise.
5617 (vorrq_x_s16): Likewise.
5618 (vorrq_x_s32): Likewise.
5619 (vorrq_x_u8): Likewise.
5620 (vorrq_x_u16): Likewise.
5621 (vorrq_x_u32): Likewise.
5622 (vrev16q_x_s8): Likewise.
5623 (vrev16q_x_u8): Likewise.
5624 (vrev32q_x_s8): Likewise.
5625 (vrev32q_x_s16): Likewise.
5626 (vrev32q_x_u8): Likewise.
5627 (vrev32q_x_u16): Likewise.
5628 (vrev64q_x_s8): Likewise.
5629 (vrev64q_x_s16): Likewise.
5630 (vrev64q_x_s32): Likewise.
5631 (vrev64q_x_u8): Likewise.
5632 (vrev64q_x_u16): Likewise.
5633 (vrev64q_x_u32): Likewise.
5634 (vrshlq_x_s8): Likewise.
5635 (vrshlq_x_s16): Likewise.
5636 (vrshlq_x_s32): Likewise.
5637 (vrshlq_x_u8): Likewise.
5638 (vrshlq_x_u16): Likewise.
5639 (vrshlq_x_u32): Likewise.
5640 (vshllbq_x_n_s8): Likewise.
5641 (vshllbq_x_n_s16): Likewise.
5642 (vshllbq_x_n_u8): Likewise.
5643 (vshllbq_x_n_u16): Likewise.
5644 (vshlltq_x_n_s8): Likewise.
5645 (vshlltq_x_n_s16): Likewise.
5646 (vshlltq_x_n_u8): Likewise.
5647 (vshlltq_x_n_u16): Likewise.
5648 (vshlq_x_s8): Likewise.
5649 (vshlq_x_s16): Likewise.
5650 (vshlq_x_s32): Likewise.
5651 (vshlq_x_u8): Likewise.
5652 (vshlq_x_u16): Likewise.
5653 (vshlq_x_u32): Likewise.
5654 (vshlq_x_n_s8): Likewise.
5655 (vshlq_x_n_s16): Likewise.
5656 (vshlq_x_n_s32): Likewise.
5657 (vshlq_x_n_u8): Likewise.
5658 (vshlq_x_n_u16): Likewise.
5659 (vshlq_x_n_u32): Likewise.
5660 (vrshrq_x_n_s8): Likewise.
5661 (vrshrq_x_n_s16): Likewise.
5662 (vrshrq_x_n_s32): Likewise.
5663 (vrshrq_x_n_u8): Likewise.
5664 (vrshrq_x_n_u16): Likewise.
5665 (vrshrq_x_n_u32): Likewise.
5666 (vshrq_x_n_s8): Likewise.
5667 (vshrq_x_n_s16): Likewise.
5668 (vshrq_x_n_s32): Likewise.
5669 (vshrq_x_n_u8): Likewise.
5670 (vshrq_x_n_u16): Likewise.
5671 (vshrq_x_n_u32): Likewise.
5672 (vdupq_x_n_f16): Likewise.
5673 (vdupq_x_n_f32): Likewise.
5674 (vminnmq_x_f16): Likewise.
5675 (vminnmq_x_f32): Likewise.
5676 (vmaxnmq_x_f16): Likewise.
5677 (vmaxnmq_x_f32): Likewise.
5678 (vabdq_x_f16): Likewise.
5679 (vabdq_x_f32): Likewise.
5680 (vabsq_x_f16): Likewise.
5681 (vabsq_x_f32): Likewise.
5682 (vaddq_x_f16): Likewise.
5683 (vaddq_x_f32): Likewise.
5684 (vaddq_x_n_f16): Likewise.
5685 (vaddq_x_n_f32): Likewise.
5686 (vnegq_x_f16): Likewise.
5687 (vnegq_x_f32): Likewise.
5688 (vmulq_x_f16): Likewise.
5689 (vmulq_x_f32): Likewise.
5690 (vmulq_x_n_f16): Likewise.
5691 (vmulq_x_n_f32): Likewise.
5692 (vsubq_x_f16): Likewise.
5693 (vsubq_x_f32): Likewise.
5694 (vsubq_x_n_f16): Likewise.
5695 (vsubq_x_n_f32): Likewise.
5696 (vcaddq_rot90_x_f16): Likewise.
5697 (vcaddq_rot90_x_f32): Likewise.
5698 (vcaddq_rot270_x_f16): Likewise.
5699 (vcaddq_rot270_x_f32): Likewise.
5700 (vcmulq_x_f16): Likewise.
5701 (vcmulq_x_f32): Likewise.
5702 (vcmulq_rot90_x_f16): Likewise.
5703 (vcmulq_rot90_x_f32): Likewise.
5704 (vcmulq_rot180_x_f16): Likewise.
5705 (vcmulq_rot180_x_f32): Likewise.
5706 (vcmulq_rot270_x_f16): Likewise.
5707 (vcmulq_rot270_x_f32): Likewise.
5708 (vcvtaq_x_s16_f16): Likewise.
5709 (vcvtaq_x_s32_f32): Likewise.
5710 (vcvtaq_x_u16_f16): Likewise.
5711 (vcvtaq_x_u32_f32): Likewise.
5712 (vcvtnq_x_s16_f16): Likewise.
5713 (vcvtnq_x_s32_f32): Likewise.
5714 (vcvtnq_x_u16_f16): Likewise.
5715 (vcvtnq_x_u32_f32): Likewise.
5716 (vcvtpq_x_s16_f16): Likewise.
5717 (vcvtpq_x_s32_f32): Likewise.
5718 (vcvtpq_x_u16_f16): Likewise.
5719 (vcvtpq_x_u32_f32): Likewise.
5720 (vcvtmq_x_s16_f16): Likewise.
5721 (vcvtmq_x_s32_f32): Likewise.
5722 (vcvtmq_x_u16_f16): Likewise.
5723 (vcvtmq_x_u32_f32): Likewise.
5724 (vcvtbq_x_f32_f16): Likewise.
5725 (vcvttq_x_f32_f16): Likewise.
5726 (vcvtq_x_f16_u16): Likewise.
5727 (vcvtq_x_f16_s16): Likewise.
5728 (vcvtq_x_f32_s32): Likewise.
5729 (vcvtq_x_f32_u32): Likewise.
5730 (vcvtq_x_n_f16_s16): Likewise.
5731 (vcvtq_x_n_f16_u16): Likewise.
5732 (vcvtq_x_n_f32_s32): Likewise.
5733 (vcvtq_x_n_f32_u32): Likewise.
5734 (vcvtq_x_s16_f16): Likewise.
5735 (vcvtq_x_s32_f32): Likewise.
5736 (vcvtq_x_u16_f16): Likewise.
5737 (vcvtq_x_u32_f32): Likewise.
5738 (vcvtq_x_n_s16_f16): Likewise.
5739 (vcvtq_x_n_s32_f32): Likewise.
5740 (vcvtq_x_n_u16_f16): Likewise.
5741 (vcvtq_x_n_u32_f32): Likewise.
5742 (vrndq_x_f16): Likewise.
5743 (vrndq_x_f32): Likewise.
5744 (vrndnq_x_f16): Likewise.
5745 (vrndnq_x_f32): Likewise.
5746 (vrndmq_x_f16): Likewise.
5747 (vrndmq_x_f32): Likewise.
5748 (vrndpq_x_f16): Likewise.
5749 (vrndpq_x_f32): Likewise.
5750 (vrndaq_x_f16): Likewise.
5751 (vrndaq_x_f32): Likewise.
5752 (vrndxq_x_f16): Likewise.
5753 (vrndxq_x_f32): Likewise.
5754 (vandq_x_f16): Likewise.
5755 (vandq_x_f32): Likewise.
5756 (vbicq_x_f16): Likewise.
5757 (vbicq_x_f32): Likewise.
5758 (vbrsrq_x_n_f16): Likewise.
5759 (vbrsrq_x_n_f32): Likewise.
5760 (veorq_x_f16): Likewise.
5761 (veorq_x_f32): Likewise.
5762 (vornq_x_f16): Likewise.
5763 (vornq_x_f32): Likewise.
5764 (vorrq_x_f16): Likewise.
5765 (vorrq_x_f32): Likewise.
5766 (vrev32q_x_f16): Likewise.
5767 (vrev64q_x_f16): Likewise.
5768 (vrev64q_x_f32): Likewise.
5769 (__arm_vddupq_x_n_u8): Define intrinsic.
5770 (__arm_vddupq_x_n_u16): Likewise.
5771 (__arm_vddupq_x_n_u32): Likewise.
5772 (__arm_vddupq_x_wb_u8): Likewise.
5773 (__arm_vddupq_x_wb_u16): Likewise.
5774 (__arm_vddupq_x_wb_u32): Likewise.
5775 (__arm_vdwdupq_x_n_u8): Likewise.
5776 (__arm_vdwdupq_x_n_u16): Likewise.
5777 (__arm_vdwdupq_x_n_u32): Likewise.
5778 (__arm_vdwdupq_x_wb_u8): Likewise.
5779 (__arm_vdwdupq_x_wb_u16): Likewise.
5780 (__arm_vdwdupq_x_wb_u32): Likewise.
5781 (__arm_vidupq_x_n_u8): Likewise.
5782 (__arm_vidupq_x_n_u16): Likewise.
5783 (__arm_vidupq_x_n_u32): Likewise.
5784 (__arm_vidupq_x_wb_u8): Likewise.
5785 (__arm_vidupq_x_wb_u16): Likewise.
5786 (__arm_vidupq_x_wb_u32): Likewise.
5787 (__arm_viwdupq_x_n_u8): Likewise.
5788 (__arm_viwdupq_x_n_u16): Likewise.
5789 (__arm_viwdupq_x_n_u32): Likewise.
5790 (__arm_viwdupq_x_wb_u8): Likewise.
5791 (__arm_viwdupq_x_wb_u16): Likewise.
5792 (__arm_viwdupq_x_wb_u32): Likewise.
5793 (__arm_vdupq_x_n_s8): Likewise.
5794 (__arm_vdupq_x_n_s16): Likewise.
5795 (__arm_vdupq_x_n_s32): Likewise.
5796 (__arm_vdupq_x_n_u8): Likewise.
5797 (__arm_vdupq_x_n_u16): Likewise.
5798 (__arm_vdupq_x_n_u32): Likewise.
5799 (__arm_vminq_x_s8): Likewise.
5800 (__arm_vminq_x_s16): Likewise.
5801 (__arm_vminq_x_s32): Likewise.
5802 (__arm_vminq_x_u8): Likewise.
5803 (__arm_vminq_x_u16): Likewise.
5804 (__arm_vminq_x_u32): Likewise.
5805 (__arm_vmaxq_x_s8): Likewise.
5806 (__arm_vmaxq_x_s16): Likewise.
5807 (__arm_vmaxq_x_s32): Likewise.
5808 (__arm_vmaxq_x_u8): Likewise.
5809 (__arm_vmaxq_x_u16): Likewise.
5810 (__arm_vmaxq_x_u32): Likewise.
5811 (__arm_vabdq_x_s8): Likewise.
5812 (__arm_vabdq_x_s16): Likewise.
5813 (__arm_vabdq_x_s32): Likewise.
5814 (__arm_vabdq_x_u8): Likewise.
5815 (__arm_vabdq_x_u16): Likewise.
5816 (__arm_vabdq_x_u32): Likewise.
5817 (__arm_vabsq_x_s8): Likewise.
5818 (__arm_vabsq_x_s16): Likewise.
5819 (__arm_vabsq_x_s32): Likewise.
5820 (__arm_vaddq_x_s8): Likewise.
5821 (__arm_vaddq_x_s16): Likewise.
5822 (__arm_vaddq_x_s32): Likewise.
5823 (__arm_vaddq_x_n_s8): Likewise.
5824 (__arm_vaddq_x_n_s16): Likewise.
5825 (__arm_vaddq_x_n_s32): Likewise.
5826 (__arm_vaddq_x_u8): Likewise.
5827 (__arm_vaddq_x_u16): Likewise.
5828 (__arm_vaddq_x_u32): Likewise.
5829 (__arm_vaddq_x_n_u8): Likewise.
5830 (__arm_vaddq_x_n_u16): Likewise.
5831 (__arm_vaddq_x_n_u32): Likewise.
5832 (__arm_vclsq_x_s8): Likewise.
5833 (__arm_vclsq_x_s16): Likewise.
5834 (__arm_vclsq_x_s32): Likewise.
5835 (__arm_vclzq_x_s8): Likewise.
5836 (__arm_vclzq_x_s16): Likewise.
5837 (__arm_vclzq_x_s32): Likewise.
5838 (__arm_vclzq_x_u8): Likewise.
5839 (__arm_vclzq_x_u16): Likewise.
5840 (__arm_vclzq_x_u32): Likewise.
5841 (__arm_vnegq_x_s8): Likewise.
5842 (__arm_vnegq_x_s16): Likewise.
5843 (__arm_vnegq_x_s32): Likewise.
5844 (__arm_vmulhq_x_s8): Likewise.
5845 (__arm_vmulhq_x_s16): Likewise.
5846 (__arm_vmulhq_x_s32): Likewise.
5847 (__arm_vmulhq_x_u8): Likewise.
5848 (__arm_vmulhq_x_u16): Likewise.
5849 (__arm_vmulhq_x_u32): Likewise.
5850 (__arm_vmullbq_poly_x_p8): Likewise.
5851 (__arm_vmullbq_poly_x_p16): Likewise.
5852 (__arm_vmullbq_int_x_s8): Likewise.
5853 (__arm_vmullbq_int_x_s16): Likewise.
5854 (__arm_vmullbq_int_x_s32): Likewise.
5855 (__arm_vmullbq_int_x_u8): Likewise.
5856 (__arm_vmullbq_int_x_u16): Likewise.
5857 (__arm_vmullbq_int_x_u32): Likewise.
5858 (__arm_vmulltq_poly_x_p8): Likewise.
5859 (__arm_vmulltq_poly_x_p16): Likewise.
5860 (__arm_vmulltq_int_x_s8): Likewise.
5861 (__arm_vmulltq_int_x_s16): Likewise.
5862 (__arm_vmulltq_int_x_s32): Likewise.
5863 (__arm_vmulltq_int_x_u8): Likewise.
5864 (__arm_vmulltq_int_x_u16): Likewise.
5865 (__arm_vmulltq_int_x_u32): Likewise.
5866 (__arm_vmulq_x_s8): Likewise.
5867 (__arm_vmulq_x_s16): Likewise.
5868 (__arm_vmulq_x_s32): Likewise.
5869 (__arm_vmulq_x_n_s8): Likewise.
5870 (__arm_vmulq_x_n_s16): Likewise.
5871 (__arm_vmulq_x_n_s32): Likewise.
5872 (__arm_vmulq_x_u8): Likewise.
5873 (__arm_vmulq_x_u16): Likewise.
5874 (__arm_vmulq_x_u32): Likewise.
5875 (__arm_vmulq_x_n_u8): Likewise.
5876 (__arm_vmulq_x_n_u16): Likewise.
5877 (__arm_vmulq_x_n_u32): Likewise.
5878 (__arm_vsubq_x_s8): Likewise.
5879 (__arm_vsubq_x_s16): Likewise.
5880 (__arm_vsubq_x_s32): Likewise.
5881 (__arm_vsubq_x_n_s8): Likewise.
5882 (__arm_vsubq_x_n_s16): Likewise.
5883 (__arm_vsubq_x_n_s32): Likewise.
5884 (__arm_vsubq_x_u8): Likewise.
5885 (__arm_vsubq_x_u16): Likewise.
5886 (__arm_vsubq_x_u32): Likewise.
5887 (__arm_vsubq_x_n_u8): Likewise.
5888 (__arm_vsubq_x_n_u16): Likewise.
5889 (__arm_vsubq_x_n_u32): Likewise.
5890 (__arm_vcaddq_rot90_x_s8): Likewise.
5891 (__arm_vcaddq_rot90_x_s16): Likewise.
5892 (__arm_vcaddq_rot90_x_s32): Likewise.
5893 (__arm_vcaddq_rot90_x_u8): Likewise.
5894 (__arm_vcaddq_rot90_x_u16): Likewise.
5895 (__arm_vcaddq_rot90_x_u32): Likewise.
5896 (__arm_vcaddq_rot270_x_s8): Likewise.
5897 (__arm_vcaddq_rot270_x_s16): Likewise.
5898 (__arm_vcaddq_rot270_x_s32): Likewise.
5899 (__arm_vcaddq_rot270_x_u8): Likewise.
5900 (__arm_vcaddq_rot270_x_u16): Likewise.
5901 (__arm_vcaddq_rot270_x_u32): Likewise.
5902 (__arm_vhaddq_x_n_s8): Likewise.
5903 (__arm_vhaddq_x_n_s16): Likewise.
5904 (__arm_vhaddq_x_n_s32): Likewise.
5905 (__arm_vhaddq_x_n_u8): Likewise.
5906 (__arm_vhaddq_x_n_u16): Likewise.
5907 (__arm_vhaddq_x_n_u32): Likewise.
5908 (__arm_vhaddq_x_s8): Likewise.
5909 (__arm_vhaddq_x_s16): Likewise.
5910 (__arm_vhaddq_x_s32): Likewise.
5911 (__arm_vhaddq_x_u8): Likewise.
5912 (__arm_vhaddq_x_u16): Likewise.
5913 (__arm_vhaddq_x_u32): Likewise.
5914 (__arm_vhcaddq_rot90_x_s8): Likewise.
5915 (__arm_vhcaddq_rot90_x_s16): Likewise.
5916 (__arm_vhcaddq_rot90_x_s32): Likewise.
5917 (__arm_vhcaddq_rot270_x_s8): Likewise.
5918 (__arm_vhcaddq_rot270_x_s16): Likewise.
5919 (__arm_vhcaddq_rot270_x_s32): Likewise.
5920 (__arm_vhsubq_x_n_s8): Likewise.
5921 (__arm_vhsubq_x_n_s16): Likewise.
5922 (__arm_vhsubq_x_n_s32): Likewise.
5923 (__arm_vhsubq_x_n_u8): Likewise.
5924 (__arm_vhsubq_x_n_u16): Likewise.
5925 (__arm_vhsubq_x_n_u32): Likewise.
5926 (__arm_vhsubq_x_s8): Likewise.
5927 (__arm_vhsubq_x_s16): Likewise.
5928 (__arm_vhsubq_x_s32): Likewise.
5929 (__arm_vhsubq_x_u8): Likewise.
5930 (__arm_vhsubq_x_u16): Likewise.
5931 (__arm_vhsubq_x_u32): Likewise.
5932 (__arm_vrhaddq_x_s8): Likewise.
5933 (__arm_vrhaddq_x_s16): Likewise.
5934 (__arm_vrhaddq_x_s32): Likewise.
5935 (__arm_vrhaddq_x_u8): Likewise.
5936 (__arm_vrhaddq_x_u16): Likewise.
5937 (__arm_vrhaddq_x_u32): Likewise.
5938 (__arm_vrmulhq_x_s8): Likewise.
5939 (__arm_vrmulhq_x_s16): Likewise.
5940 (__arm_vrmulhq_x_s32): Likewise.
5941 (__arm_vrmulhq_x_u8): Likewise.
5942 (__arm_vrmulhq_x_u16): Likewise.
5943 (__arm_vrmulhq_x_u32): Likewise.
5944 (__arm_vandq_x_s8): Likewise.
5945 (__arm_vandq_x_s16): Likewise.
5946 (__arm_vandq_x_s32): Likewise.
5947 (__arm_vandq_x_u8): Likewise.
5948 (__arm_vandq_x_u16): Likewise.
5949 (__arm_vandq_x_u32): Likewise.
5950 (__arm_vbicq_x_s8): Likewise.
5951 (__arm_vbicq_x_s16): Likewise.
5952 (__arm_vbicq_x_s32): Likewise.
5953 (__arm_vbicq_x_u8): Likewise.
5954 (__arm_vbicq_x_u16): Likewise.
5955 (__arm_vbicq_x_u32): Likewise.
5956 (__arm_vbrsrq_x_n_s8): Likewise.
5957 (__arm_vbrsrq_x_n_s16): Likewise.
5958 (__arm_vbrsrq_x_n_s32): Likewise.
5959 (__arm_vbrsrq_x_n_u8): Likewise.
5960 (__arm_vbrsrq_x_n_u16): Likewise.
5961 (__arm_vbrsrq_x_n_u32): Likewise.
5962 (__arm_veorq_x_s8): Likewise.
5963 (__arm_veorq_x_s16): Likewise.
5964 (__arm_veorq_x_s32): Likewise.
5965 (__arm_veorq_x_u8): Likewise.
5966 (__arm_veorq_x_u16): Likewise.
5967 (__arm_veorq_x_u32): Likewise.
5968 (__arm_vmovlbq_x_s8): Likewise.
5969 (__arm_vmovlbq_x_s16): Likewise.
5970 (__arm_vmovlbq_x_u8): Likewise.
5971 (__arm_vmovlbq_x_u16): Likewise.
5972 (__arm_vmovltq_x_s8): Likewise.
5973 (__arm_vmovltq_x_s16): Likewise.
5974 (__arm_vmovltq_x_u8): Likewise.
5975 (__arm_vmovltq_x_u16): Likewise.
5976 (__arm_vmvnq_x_s8): Likewise.
5977 (__arm_vmvnq_x_s16): Likewise.
5978 (__arm_vmvnq_x_s32): Likewise.
5979 (__arm_vmvnq_x_u8): Likewise.
5980 (__arm_vmvnq_x_u16): Likewise.
5981 (__arm_vmvnq_x_u32): Likewise.
5982 (__arm_vmvnq_x_n_s16): Likewise.
5983 (__arm_vmvnq_x_n_s32): Likewise.
5984 (__arm_vmvnq_x_n_u16): Likewise.
5985 (__arm_vmvnq_x_n_u32): Likewise.
5986 (__arm_vornq_x_s8): Likewise.
5987 (__arm_vornq_x_s16): Likewise.
5988 (__arm_vornq_x_s32): Likewise.
5989 (__arm_vornq_x_u8): Likewise.
5990 (__arm_vornq_x_u16): Likewise.
5991 (__arm_vornq_x_u32): Likewise.
5992 (__arm_vorrq_x_s8): Likewise.
5993 (__arm_vorrq_x_s16): Likewise.
5994 (__arm_vorrq_x_s32): Likewise.
5995 (__arm_vorrq_x_u8): Likewise.
5996 (__arm_vorrq_x_u16): Likewise.
5997 (__arm_vorrq_x_u32): Likewise.
5998 (__arm_vrev16q_x_s8): Likewise.
5999 (__arm_vrev16q_x_u8): Likewise.
6000 (__arm_vrev32q_x_s8): Likewise.
6001 (__arm_vrev32q_x_s16): Likewise.
6002 (__arm_vrev32q_x_u8): Likewise.
6003 (__arm_vrev32q_x_u16): Likewise.
6004 (__arm_vrev64q_x_s8): Likewise.
6005 (__arm_vrev64q_x_s16): Likewise.
6006 (__arm_vrev64q_x_s32): Likewise.
6007 (__arm_vrev64q_x_u8): Likewise.
6008 (__arm_vrev64q_x_u16): Likewise.
6009 (__arm_vrev64q_x_u32): Likewise.
6010 (__arm_vrshlq_x_s8): Likewise.
6011 (__arm_vrshlq_x_s16): Likewise.
6012 (__arm_vrshlq_x_s32): Likewise.
6013 (__arm_vrshlq_x_u8): Likewise.
6014 (__arm_vrshlq_x_u16): Likewise.
6015 (__arm_vrshlq_x_u32): Likewise.
6016 (__arm_vshllbq_x_n_s8): Likewise.
6017 (__arm_vshllbq_x_n_s16): Likewise.
6018 (__arm_vshllbq_x_n_u8): Likewise.
6019 (__arm_vshllbq_x_n_u16): Likewise.
6020 (__arm_vshlltq_x_n_s8): Likewise.
6021 (__arm_vshlltq_x_n_s16): Likewise.
6022 (__arm_vshlltq_x_n_u8): Likewise.
6023 (__arm_vshlltq_x_n_u16): Likewise.
6024 (__arm_vshlq_x_s8): Likewise.
6025 (__arm_vshlq_x_s16): Likewise.
6026 (__arm_vshlq_x_s32): Likewise.
6027 (__arm_vshlq_x_u8): Likewise.
6028 (__arm_vshlq_x_u16): Likewise.
6029 (__arm_vshlq_x_u32): Likewise.
6030 (__arm_vshlq_x_n_s8): Likewise.
6031 (__arm_vshlq_x_n_s16): Likewise.
6032 (__arm_vshlq_x_n_s32): Likewise.
6033 (__arm_vshlq_x_n_u8): Likewise.
6034 (__arm_vshlq_x_n_u16): Likewise.
6035 (__arm_vshlq_x_n_u32): Likewise.
6036 (__arm_vrshrq_x_n_s8): Likewise.
6037 (__arm_vrshrq_x_n_s16): Likewise.
6038 (__arm_vrshrq_x_n_s32): Likewise.
6039 (__arm_vrshrq_x_n_u8): Likewise.
6040 (__arm_vrshrq_x_n_u16): Likewise.
6041 (__arm_vrshrq_x_n_u32): Likewise.
6042 (__arm_vshrq_x_n_s8): Likewise.
6043 (__arm_vshrq_x_n_s16): Likewise.
6044 (__arm_vshrq_x_n_s32): Likewise.
6045 (__arm_vshrq_x_n_u8): Likewise.
6046 (__arm_vshrq_x_n_u16): Likewise.
6047 (__arm_vshrq_x_n_u32): Likewise.
6048 (__arm_vdupq_x_n_f16): Likewise.
6049 (__arm_vdupq_x_n_f32): Likewise.
6050 (__arm_vminnmq_x_f16): Likewise.
6051 (__arm_vminnmq_x_f32): Likewise.
6052 (__arm_vmaxnmq_x_f16): Likewise.
6053 (__arm_vmaxnmq_x_f32): Likewise.
6054 (__arm_vabdq_x_f16): Likewise.
6055 (__arm_vabdq_x_f32): Likewise.
6056 (__arm_vabsq_x_f16): Likewise.
6057 (__arm_vabsq_x_f32): Likewise.
6058 (__arm_vaddq_x_f16): Likewise.
6059 (__arm_vaddq_x_f32): Likewise.
6060 (__arm_vaddq_x_n_f16): Likewise.
6061 (__arm_vaddq_x_n_f32): Likewise.
6062 (__arm_vnegq_x_f16): Likewise.
6063 (__arm_vnegq_x_f32): Likewise.
6064 (__arm_vmulq_x_f16): Likewise.
6065 (__arm_vmulq_x_f32): Likewise.
6066 (__arm_vmulq_x_n_f16): Likewise.
6067 (__arm_vmulq_x_n_f32): Likewise.
6068 (__arm_vsubq_x_f16): Likewise.
6069 (__arm_vsubq_x_f32): Likewise.
6070 (__arm_vsubq_x_n_f16): Likewise.
6071 (__arm_vsubq_x_n_f32): Likewise.
6072 (__arm_vcaddq_rot90_x_f16): Likewise.
6073 (__arm_vcaddq_rot90_x_f32): Likewise.
6074 (__arm_vcaddq_rot270_x_f16): Likewise.
6075 (__arm_vcaddq_rot270_x_f32): Likewise.
6076 (__arm_vcmulq_x_f16): Likewise.
6077 (__arm_vcmulq_x_f32): Likewise.
6078 (__arm_vcmulq_rot90_x_f16): Likewise.
6079 (__arm_vcmulq_rot90_x_f32): Likewise.
6080 (__arm_vcmulq_rot180_x_f16): Likewise.
6081 (__arm_vcmulq_rot180_x_f32): Likewise.
6082 (__arm_vcmulq_rot270_x_f16): Likewise.
6083 (__arm_vcmulq_rot270_x_f32): Likewise.
6084 (__arm_vcvtaq_x_s16_f16): Likewise.
6085 (__arm_vcvtaq_x_s32_f32): Likewise.
6086 (__arm_vcvtaq_x_u16_f16): Likewise.
6087 (__arm_vcvtaq_x_u32_f32): Likewise.
6088 (__arm_vcvtnq_x_s16_f16): Likewise.
6089 (__arm_vcvtnq_x_s32_f32): Likewise.
6090 (__arm_vcvtnq_x_u16_f16): Likewise.
6091 (__arm_vcvtnq_x_u32_f32): Likewise.
6092 (__arm_vcvtpq_x_s16_f16): Likewise.
6093 (__arm_vcvtpq_x_s32_f32): Likewise.
6094 (__arm_vcvtpq_x_u16_f16): Likewise.
6095 (__arm_vcvtpq_x_u32_f32): Likewise.
6096 (__arm_vcvtmq_x_s16_f16): Likewise.
6097 (__arm_vcvtmq_x_s32_f32): Likewise.
6098 (__arm_vcvtmq_x_u16_f16): Likewise.
6099 (__arm_vcvtmq_x_u32_f32): Likewise.
6100 (__arm_vcvtbq_x_f32_f16): Likewise.
6101 (__arm_vcvttq_x_f32_f16): Likewise.
6102 (__arm_vcvtq_x_f16_u16): Likewise.
6103 (__arm_vcvtq_x_f16_s16): Likewise.
6104 (__arm_vcvtq_x_f32_s32): Likewise.
6105 (__arm_vcvtq_x_f32_u32): Likewise.
6106 (__arm_vcvtq_x_n_f16_s16): Likewise.
6107 (__arm_vcvtq_x_n_f16_u16): Likewise.
6108 (__arm_vcvtq_x_n_f32_s32): Likewise.
6109 (__arm_vcvtq_x_n_f32_u32): Likewise.
6110 (__arm_vcvtq_x_s16_f16): Likewise.
6111 (__arm_vcvtq_x_s32_f32): Likewise.
6112 (__arm_vcvtq_x_u16_f16): Likewise.
6113 (__arm_vcvtq_x_u32_f32): Likewise.
6114 (__arm_vcvtq_x_n_s16_f16): Likewise.
6115 (__arm_vcvtq_x_n_s32_f32): Likewise.
6116 (__arm_vcvtq_x_n_u16_f16): Likewise.
6117 (__arm_vcvtq_x_n_u32_f32): Likewise.
6118 (__arm_vrndq_x_f16): Likewise.
6119 (__arm_vrndq_x_f32): Likewise.
6120 (__arm_vrndnq_x_f16): Likewise.
6121 (__arm_vrndnq_x_f32): Likewise.
6122 (__arm_vrndmq_x_f16): Likewise.
6123 (__arm_vrndmq_x_f32): Likewise.
6124 (__arm_vrndpq_x_f16): Likewise.
6125 (__arm_vrndpq_x_f32): Likewise.
6126 (__arm_vrndaq_x_f16): Likewise.
6127 (__arm_vrndaq_x_f32): Likewise.
6128 (__arm_vrndxq_x_f16): Likewise.
6129 (__arm_vrndxq_x_f32): Likewise.
6130 (__arm_vandq_x_f16): Likewise.
6131 (__arm_vandq_x_f32): Likewise.
6132 (__arm_vbicq_x_f16): Likewise.
6133 (__arm_vbicq_x_f32): Likewise.
6134 (__arm_vbrsrq_x_n_f16): Likewise.
6135 (__arm_vbrsrq_x_n_f32): Likewise.
6136 (__arm_veorq_x_f16): Likewise.
6137 (__arm_veorq_x_f32): Likewise.
6138 (__arm_vornq_x_f16): Likewise.
6139 (__arm_vornq_x_f32): Likewise.
6140 (__arm_vorrq_x_f16): Likewise.
6141 (__arm_vorrq_x_f32): Likewise.
6142 (__arm_vrev32q_x_f16): Likewise.
6143 (__arm_vrev64q_x_f16): Likewise.
6144 (__arm_vrev64q_x_f32): Likewise.
6145 (vabdq_x): Define polymorphic variant.
6146 (vabsq_x): Likewise.
6147 (vaddq_x): Likewise.
6148 (vandq_x): Likewise.
6149 (vbicq_x): Likewise.
6150 (vbrsrq_x): Likewise.
6151 (vcaddq_rot270_x): Likewise.
6152 (vcaddq_rot90_x): Likewise.
6153 (vcmulq_rot180_x): Likewise.
6154 (vcmulq_rot270_x): Likewise.
6155 (vcmulq_x): Likewise.
6156 (vcvtq_x): Likewise.
6157 (vcvtq_x_n): Likewise.
6158 (vcvtnq_m): Likewise.
6159 (veorq_x): Likewise.
6160 (vmaxnmq_x): Likewise.
6161 (vminnmq_x): Likewise.
6162 (vmulq_x): Likewise.
6163 (vnegq_x): Likewise.
6164 (vornq_x): Likewise.
6165 (vorrq_x): Likewise.
6166 (vrev32q_x): Likewise.
6167 (vrev64q_x): Likewise.
6168 (vrndaq_x): Likewise.
6169 (vrndmq_x): Likewise.
6170 (vrndnq_x): Likewise.
6171 (vrndpq_x): Likewise.
6172 (vrndq_x): Likewise.
6173 (vrndxq_x): Likewise.
6174 (vsubq_x): Likewise.
6175 (vcmulq_rot90_x): Likewise.
6177 (vclsq_x): Likewise.
6178 (vclzq_x): Likewise.
6179 (vhaddq_x): Likewise.
6180 (vhcaddq_rot270_x): Likewise.
6181 (vhcaddq_rot90_x): Likewise.
6182 (vhsubq_x): Likewise.
6183 (vmaxq_x): Likewise.
6184 (vminq_x): Likewise.
6185 (vmovlbq_x): Likewise.
6186 (vmovltq_x): Likewise.
6187 (vmulhq_x): Likewise.
6188 (vmullbq_int_x): Likewise.
6189 (vmullbq_poly_x): Likewise.
6190 (vmulltq_int_x): Likewise.
6191 (vmulltq_poly_x): Likewise.
6192 (vmvnq_x): Likewise.
6193 (vrev16q_x): Likewise.
6194 (vrhaddq_x): Likewise.
6195 (vrmulhq_x): Likewise.
6196 (vrshlq_x): Likewise.
6197 (vrshrq_x): Likewise.
6198 (vshllbq_x): Likewise.
6199 (vshlltq_x): Likewise.
6200 (vshlq_x_n): Likewise.
6201 (vshlq_x): Likewise.
6202 (vdwdupq_x_u8): Likewise.
6203 (vdwdupq_x_u16): Likewise.
6204 (vdwdupq_x_u32): Likewise.
6205 (viwdupq_x_u8): Likewise.
6206 (viwdupq_x_u16): Likewise.
6207 (viwdupq_x_u32): Likewise.
6208 (vidupq_x_u8): Likewise.
6209 (vddupq_x_u8): Likewise.
6210 (vidupq_x_u16): Likewise.
6211 (vddupq_x_u16): Likewise.
6212 (vidupq_x_u32): Likewise.
6213 (vddupq_x_u32): Likewise.
6214 (vshrq_x): Likewise.
6216 2020-03-20 Richard Biener <rguenther@suse.de>
6218 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
6219 to vectorize for CTOR defs.
6221 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6222 Andre Vieira <andre.simoesdiasvieira@arm.com>
6223 Mihail Ionescu <mihail.ionescu@arm.com>
6225 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
6227 (LDRGBWBU_QUALIFIERS): Likewise.
6228 (LDRGBWBS_Z_QUALIFIERS): Likewise.
6229 (LDRGBWBU_Z_QUALIFIERS): Likewise.
6230 (STRSBWBS_QUALIFIERS): Likewise.
6231 (STRSBWBU_QUALIFIERS): Likewise.
6232 (STRSBWBS_P_QUALIFIERS): Likewise.
6233 (STRSBWBU_P_QUALIFIERS): Likewise.
6234 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
6235 (vldrdq_gather_base_wb_u64): Likewise.
6236 (vldrdq_gather_base_wb_z_s64): Likewise.
6237 (vldrdq_gather_base_wb_z_u64): Likewise.
6238 (vldrwq_gather_base_wb_f32): Likewise.
6239 (vldrwq_gather_base_wb_s32): Likewise.
6240 (vldrwq_gather_base_wb_u32): Likewise.
6241 (vldrwq_gather_base_wb_z_f32): Likewise.
6242 (vldrwq_gather_base_wb_z_s32): Likewise.
6243 (vldrwq_gather_base_wb_z_u32): Likewise.
6244 (vstrdq_scatter_base_wb_p_s64): Likewise.
6245 (vstrdq_scatter_base_wb_p_u64): Likewise.
6246 (vstrdq_scatter_base_wb_s64): Likewise.
6247 (vstrdq_scatter_base_wb_u64): Likewise.
6248 (vstrwq_scatter_base_wb_p_s32): Likewise.
6249 (vstrwq_scatter_base_wb_p_f32): Likewise.
6250 (vstrwq_scatter_base_wb_p_u32): Likewise.
6251 (vstrwq_scatter_base_wb_s32): Likewise.
6252 (vstrwq_scatter_base_wb_u32): Likewise.
6253 (vstrwq_scatter_base_wb_f32): Likewise.
6254 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
6255 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6256 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6257 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6258 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6259 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6260 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6261 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6262 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
6263 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
6264 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
6265 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
6266 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
6267 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
6268 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
6269 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
6270 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6271 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6272 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
6273 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
6274 (vstrwq_scatter_base_wb): Define polymorphic variant.
6275 (vstrwq_scatter_base_wb_p): Likewise.
6276 (vstrdq_scatter_base_wb_p): Likewise.
6277 (vstrdq_scatter_base_wb): Likewise.
6278 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
6280 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
6282 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
6283 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
6284 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
6285 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
6286 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
6287 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
6288 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
6289 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
6290 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
6291 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
6292 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
6293 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
6294 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
6295 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
6296 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
6297 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
6298 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
6299 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
6300 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
6301 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
6302 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
6303 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
6304 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
6305 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
6306 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
6307 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
6308 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
6309 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
6310 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
6312 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6313 Andre Vieira <andre.simoesdiasvieira@arm.com>
6314 Mihail Ionescu <mihail.ionescu@arm.com>
6316 * config/arm/arm-builtins.c
6317 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
6319 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
6320 (vddupq_m_n_u32): Likewise.
6321 (vddupq_m_n_u16): Likewise.
6322 (vddupq_m_wb_u8): Likewise.
6323 (vddupq_m_wb_u16): Likewise.
6324 (vddupq_m_wb_u32): Likewise.
6325 (vddupq_n_u8): Likewise.
6326 (vddupq_n_u32): Likewise.
6327 (vddupq_n_u16): Likewise.
6328 (vddupq_wb_u8): Likewise.
6329 (vddupq_wb_u16): Likewise.
6330 (vddupq_wb_u32): Likewise.
6331 (vdwdupq_m_n_u8): Likewise.
6332 (vdwdupq_m_n_u32): Likewise.
6333 (vdwdupq_m_n_u16): Likewise.
6334 (vdwdupq_m_wb_u8): Likewise.
6335 (vdwdupq_m_wb_u32): Likewise.
6336 (vdwdupq_m_wb_u16): Likewise.
6337 (vdwdupq_n_u8): Likewise.
6338 (vdwdupq_n_u32): Likewise.
6339 (vdwdupq_n_u16): Likewise.
6340 (vdwdupq_wb_u8): Likewise.
6341 (vdwdupq_wb_u32): Likewise.
6342 (vdwdupq_wb_u16): Likewise.
6343 (vidupq_m_n_u8): Likewise.
6344 (vidupq_m_n_u32): Likewise.
6345 (vidupq_m_n_u16): Likewise.
6346 (vidupq_m_wb_u8): Likewise.
6347 (vidupq_m_wb_u16): Likewise.
6348 (vidupq_m_wb_u32): Likewise.
6349 (vidupq_n_u8): Likewise.
6350 (vidupq_n_u32): Likewise.
6351 (vidupq_n_u16): Likewise.
6352 (vidupq_wb_u8): Likewise.
6353 (vidupq_wb_u16): Likewise.
6354 (vidupq_wb_u32): Likewise.
6355 (viwdupq_m_n_u8): Likewise.
6356 (viwdupq_m_n_u32): Likewise.
6357 (viwdupq_m_n_u16): Likewise.
6358 (viwdupq_m_wb_u8): Likewise.
6359 (viwdupq_m_wb_u32): Likewise.
6360 (viwdupq_m_wb_u16): Likewise.
6361 (viwdupq_n_u8): Likewise.
6362 (viwdupq_n_u32): Likewise.
6363 (viwdupq_n_u16): Likewise.
6364 (viwdupq_wb_u8): Likewise.
6365 (viwdupq_wb_u32): Likewise.
6366 (viwdupq_wb_u16): Likewise.
6367 (__arm_vddupq_m_n_u8): Define intrinsic.
6368 (__arm_vddupq_m_n_u32): Likewise.
6369 (__arm_vddupq_m_n_u16): Likewise.
6370 (__arm_vddupq_m_wb_u8): Likewise.
6371 (__arm_vddupq_m_wb_u16): Likewise.
6372 (__arm_vddupq_m_wb_u32): Likewise.
6373 (__arm_vddupq_n_u8): Likewise.
6374 (__arm_vddupq_n_u32): Likewise.
6375 (__arm_vddupq_n_u16): Likewise.
6376 (__arm_vdwdupq_m_n_u8): Likewise.
6377 (__arm_vdwdupq_m_n_u32): Likewise.
6378 (__arm_vdwdupq_m_n_u16): Likewise.
6379 (__arm_vdwdupq_m_wb_u8): Likewise.
6380 (__arm_vdwdupq_m_wb_u32): Likewise.
6381 (__arm_vdwdupq_m_wb_u16): Likewise.
6382 (__arm_vdwdupq_n_u8): Likewise.
6383 (__arm_vdwdupq_n_u32): Likewise.
6384 (__arm_vdwdupq_n_u16): Likewise.
6385 (__arm_vdwdupq_wb_u8): Likewise.
6386 (__arm_vdwdupq_wb_u32): Likewise.
6387 (__arm_vdwdupq_wb_u16): Likewise.
6388 (__arm_vidupq_m_n_u8): Likewise.
6389 (__arm_vidupq_m_n_u32): Likewise.
6390 (__arm_vidupq_m_n_u16): Likewise.
6391 (__arm_vidupq_n_u8): Likewise.
6392 (__arm_vidupq_m_wb_u8): Likewise.
6393 (__arm_vidupq_m_wb_u16): Likewise.
6394 (__arm_vidupq_m_wb_u32): Likewise.
6395 (__arm_vidupq_n_u32): Likewise.
6396 (__arm_vidupq_n_u16): Likewise.
6397 (__arm_vidupq_wb_u8): Likewise.
6398 (__arm_vidupq_wb_u16): Likewise.
6399 (__arm_vidupq_wb_u32): Likewise.
6400 (__arm_vddupq_wb_u8): Likewise.
6401 (__arm_vddupq_wb_u16): Likewise.
6402 (__arm_vddupq_wb_u32): Likewise.
6403 (__arm_viwdupq_m_n_u8): Likewise.
6404 (__arm_viwdupq_m_n_u32): Likewise.
6405 (__arm_viwdupq_m_n_u16): Likewise.
6406 (__arm_viwdupq_m_wb_u8): Likewise.
6407 (__arm_viwdupq_m_wb_u32): Likewise.
6408 (__arm_viwdupq_m_wb_u16): Likewise.
6409 (__arm_viwdupq_n_u8): Likewise.
6410 (__arm_viwdupq_n_u32): Likewise.
6411 (__arm_viwdupq_n_u16): Likewise.
6412 (__arm_viwdupq_wb_u8): Likewise.
6413 (__arm_viwdupq_wb_u32): Likewise.
6414 (__arm_viwdupq_wb_u16): Likewise.
6415 (vidupq_m): Define polymorphic variant.
6416 (vddupq_m): Likewise.
6417 (vidupq_u16): Likewise.
6418 (vidupq_u32): Likewise.
6419 (vidupq_u8): Likewise.
6420 (vddupq_u16): Likewise.
6421 (vddupq_u32): Likewise.
6422 (vddupq_u8): Likewise.
6423 (viwdupq_m): Likewise.
6424 (viwdupq_u16): Likewise.
6425 (viwdupq_u32): Likewise.
6426 (viwdupq_u8): Likewise.
6427 (vdwdupq_m): Likewise.
6428 (vdwdupq_u16): Likewise.
6429 (vdwdupq_u32): Likewise.
6430 (vdwdupq_u8): Likewise.
6431 * config/arm/arm_mve_builtins.def
6432 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
6434 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
6435 (mve_vidupq_u<mode>_insn): Likewise.
6436 (mve_vidupq_m_n_u<mode>): Likewise.
6437 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
6438 (mve_vddupq_n_u<mode>): Likewise.
6439 (mve_vddupq_u<mode>_insn): Likewise.
6440 (mve_vddupq_m_n_u<mode>): Likewise.
6441 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
6442 (mve_vdwdupq_n_u<mode>): Likewise.
6443 (mve_vdwdupq_wb_u<mode>): Likewise.
6444 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
6445 (mve_vdwdupq_m_n_u<mode>): Likewise.
6446 (mve_vdwdupq_m_wb_u<mode>): Likewise.
6447 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
6448 (mve_viwdupq_n_u<mode>): Likewise.
6449 (mve_viwdupq_wb_u<mode>): Likewise.
6450 (mve_viwdupq_wb_u<mode>_insn): Likewise.
6451 (mve_viwdupq_m_n_u<mode>): Likewise.
6452 (mve_viwdupq_m_wb_u<mode>): Likewise.
6453 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
6455 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6457 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
6458 (vreinterpretq_s16_s64): Likewise.
6459 (vreinterpretq_s16_s8): Likewise.
6460 (vreinterpretq_s16_u16): Likewise.
6461 (vreinterpretq_s16_u32): Likewise.
6462 (vreinterpretq_s16_u64): Likewise.
6463 (vreinterpretq_s16_u8): Likewise.
6464 (vreinterpretq_s32_s16): Likewise.
6465 (vreinterpretq_s32_s64): Likewise.
6466 (vreinterpretq_s32_s8): Likewise.
6467 (vreinterpretq_s32_u16): Likewise.
6468 (vreinterpretq_s32_u32): Likewise.
6469 (vreinterpretq_s32_u64): Likewise.
6470 (vreinterpretq_s32_u8): Likewise.
6471 (vreinterpretq_s64_s16): Likewise.
6472 (vreinterpretq_s64_s32): Likewise.
6473 (vreinterpretq_s64_s8): Likewise.
6474 (vreinterpretq_s64_u16): Likewise.
6475 (vreinterpretq_s64_u32): Likewise.
6476 (vreinterpretq_s64_u64): Likewise.
6477 (vreinterpretq_s64_u8): Likewise.
6478 (vreinterpretq_s8_s16): Likewise.
6479 (vreinterpretq_s8_s32): Likewise.
6480 (vreinterpretq_s8_s64): Likewise.
6481 (vreinterpretq_s8_u16): Likewise.
6482 (vreinterpretq_s8_u32): Likewise.
6483 (vreinterpretq_s8_u64): Likewise.
6484 (vreinterpretq_s8_u8): Likewise.
6485 (vreinterpretq_u16_s16): Likewise.
6486 (vreinterpretq_u16_s32): Likewise.
6487 (vreinterpretq_u16_s64): Likewise.
6488 (vreinterpretq_u16_s8): Likewise.
6489 (vreinterpretq_u16_u32): Likewise.
6490 (vreinterpretq_u16_u64): Likewise.
6491 (vreinterpretq_u16_u8): Likewise.
6492 (vreinterpretq_u32_s16): Likewise.
6493 (vreinterpretq_u32_s32): Likewise.
6494 (vreinterpretq_u32_s64): Likewise.
6495 (vreinterpretq_u32_s8): Likewise.
6496 (vreinterpretq_u32_u16): Likewise.
6497 (vreinterpretq_u32_u64): Likewise.
6498 (vreinterpretq_u32_u8): Likewise.
6499 (vreinterpretq_u64_s16): Likewise.
6500 (vreinterpretq_u64_s32): Likewise.
6501 (vreinterpretq_u64_s64): Likewise.
6502 (vreinterpretq_u64_s8): Likewise.
6503 (vreinterpretq_u64_u16): Likewise.
6504 (vreinterpretq_u64_u32): Likewise.
6505 (vreinterpretq_u64_u8): Likewise.
6506 (vreinterpretq_u8_s16): Likewise.
6507 (vreinterpretq_u8_s32): Likewise.
6508 (vreinterpretq_u8_s64): Likewise.
6509 (vreinterpretq_u8_s8): Likewise.
6510 (vreinterpretq_u8_u16): Likewise.
6511 (vreinterpretq_u8_u32): Likewise.
6512 (vreinterpretq_u8_u64): Likewise.
6513 (vreinterpretq_s32_f16): Likewise.
6514 (vreinterpretq_s32_f32): Likewise.
6515 (vreinterpretq_u16_f16): Likewise.
6516 (vreinterpretq_u16_f32): Likewise.
6517 (vreinterpretq_u32_f16): Likewise.
6518 (vreinterpretq_u32_f32): Likewise.
6519 (vreinterpretq_u64_f16): Likewise.
6520 (vreinterpretq_u64_f32): Likewise.
6521 (vreinterpretq_u8_f16): Likewise.
6522 (vreinterpretq_u8_f32): Likewise.
6523 (vreinterpretq_f16_f32): Likewise.
6524 (vreinterpretq_f16_s16): Likewise.
6525 (vreinterpretq_f16_s32): Likewise.
6526 (vreinterpretq_f16_s64): Likewise.
6527 (vreinterpretq_f16_s8): Likewise.
6528 (vreinterpretq_f16_u16): Likewise.
6529 (vreinterpretq_f16_u32): Likewise.
6530 (vreinterpretq_f16_u64): Likewise.
6531 (vreinterpretq_f16_u8): Likewise.
6532 (vreinterpretq_f32_f16): Likewise.
6533 (vreinterpretq_f32_s16): Likewise.
6534 (vreinterpretq_f32_s32): Likewise.
6535 (vreinterpretq_f32_s64): Likewise.
6536 (vreinterpretq_f32_s8): Likewise.
6537 (vreinterpretq_f32_u16): Likewise.
6538 (vreinterpretq_f32_u32): Likewise.
6539 (vreinterpretq_f32_u64): Likewise.
6540 (vreinterpretq_f32_u8): Likewise.
6541 (vreinterpretq_s16_f16): Likewise.
6542 (vreinterpretq_s16_f32): Likewise.
6543 (vreinterpretq_s64_f16): Likewise.
6544 (vreinterpretq_s64_f32): Likewise.
6545 (vreinterpretq_s8_f16): Likewise.
6546 (vreinterpretq_s8_f32): Likewise.
6547 (vuninitializedq_u8): Likewise.
6548 (vuninitializedq_u16): Likewise.
6549 (vuninitializedq_u32): Likewise.
6550 (vuninitializedq_u64): Likewise.
6551 (vuninitializedq_s8): Likewise.
6552 (vuninitializedq_s16): Likewise.
6553 (vuninitializedq_s32): Likewise.
6554 (vuninitializedq_s64): Likewise.
6555 (vuninitializedq_f16): Likewise.
6556 (vuninitializedq_f32): Likewise.
6557 (__arm_vuninitializedq_u8): Define intrinsic.
6558 (__arm_vuninitializedq_u16): Likewise.
6559 (__arm_vuninitializedq_u32): Likewise.
6560 (__arm_vuninitializedq_u64): Likewise.
6561 (__arm_vuninitializedq_s8): Likewise.
6562 (__arm_vuninitializedq_s16): Likewise.
6563 (__arm_vuninitializedq_s32): Likewise.
6564 (__arm_vuninitializedq_s64): Likewise.
6565 (__arm_vreinterpretq_s16_s32): Likewise.
6566 (__arm_vreinterpretq_s16_s64): Likewise.
6567 (__arm_vreinterpretq_s16_s8): Likewise.
6568 (__arm_vreinterpretq_s16_u16): Likewise.
6569 (__arm_vreinterpretq_s16_u32): Likewise.
6570 (__arm_vreinterpretq_s16_u64): Likewise.
6571 (__arm_vreinterpretq_s16_u8): Likewise.
6572 (__arm_vreinterpretq_s32_s16): Likewise.
6573 (__arm_vreinterpretq_s32_s64): Likewise.
6574 (__arm_vreinterpretq_s32_s8): Likewise.
6575 (__arm_vreinterpretq_s32_u16): Likewise.
6576 (__arm_vreinterpretq_s32_u32): Likewise.
6577 (__arm_vreinterpretq_s32_u64): Likewise.
6578 (__arm_vreinterpretq_s32_u8): Likewise.
6579 (__arm_vreinterpretq_s64_s16): Likewise.
6580 (__arm_vreinterpretq_s64_s32): Likewise.
6581 (__arm_vreinterpretq_s64_s8): Likewise.
6582 (__arm_vreinterpretq_s64_u16): Likewise.
6583 (__arm_vreinterpretq_s64_u32): Likewise.
6584 (__arm_vreinterpretq_s64_u64): Likewise.
6585 (__arm_vreinterpretq_s64_u8): Likewise.
6586 (__arm_vreinterpretq_s8_s16): Likewise.
6587 (__arm_vreinterpretq_s8_s32): Likewise.
6588 (__arm_vreinterpretq_s8_s64): Likewise.
6589 (__arm_vreinterpretq_s8_u16): Likewise.
6590 (__arm_vreinterpretq_s8_u32): Likewise.
6591 (__arm_vreinterpretq_s8_u64): Likewise.
6592 (__arm_vreinterpretq_s8_u8): Likewise.
6593 (__arm_vreinterpretq_u16_s16): Likewise.
6594 (__arm_vreinterpretq_u16_s32): Likewise.
6595 (__arm_vreinterpretq_u16_s64): Likewise.
6596 (__arm_vreinterpretq_u16_s8): Likewise.
6597 (__arm_vreinterpretq_u16_u32): Likewise.
6598 (__arm_vreinterpretq_u16_u64): Likewise.
6599 (__arm_vreinterpretq_u16_u8): Likewise.
6600 (__arm_vreinterpretq_u32_s16): Likewise.
6601 (__arm_vreinterpretq_u32_s32): Likewise.
6602 (__arm_vreinterpretq_u32_s64): Likewise.
6603 (__arm_vreinterpretq_u32_s8): Likewise.
6604 (__arm_vreinterpretq_u32_u16): Likewise.
6605 (__arm_vreinterpretq_u32_u64): Likewise.
6606 (__arm_vreinterpretq_u32_u8): Likewise.
6607 (__arm_vreinterpretq_u64_s16): Likewise.
6608 (__arm_vreinterpretq_u64_s32): Likewise.
6609 (__arm_vreinterpretq_u64_s64): Likewise.
6610 (__arm_vreinterpretq_u64_s8): Likewise.
6611 (__arm_vreinterpretq_u64_u16): Likewise.
6612 (__arm_vreinterpretq_u64_u32): Likewise.
6613 (__arm_vreinterpretq_u64_u8): Likewise.
6614 (__arm_vreinterpretq_u8_s16): Likewise.
6615 (__arm_vreinterpretq_u8_s32): Likewise.
6616 (__arm_vreinterpretq_u8_s64): Likewise.
6617 (__arm_vreinterpretq_u8_s8): Likewise.
6618 (__arm_vreinterpretq_u8_u16): Likewise.
6619 (__arm_vreinterpretq_u8_u32): Likewise.
6620 (__arm_vreinterpretq_u8_u64): Likewise.
6621 (__arm_vuninitializedq_f16): Likewise.
6622 (__arm_vuninitializedq_f32): Likewise.
6623 (__arm_vreinterpretq_s32_f16): Likewise.
6624 (__arm_vreinterpretq_s32_f32): Likewise.
6625 (__arm_vreinterpretq_s16_f16): Likewise.
6626 (__arm_vreinterpretq_s16_f32): Likewise.
6627 (__arm_vreinterpretq_s64_f16): Likewise.
6628 (__arm_vreinterpretq_s64_f32): Likewise.
6629 (__arm_vreinterpretq_s8_f16): Likewise.
6630 (__arm_vreinterpretq_s8_f32): Likewise.
6631 (__arm_vreinterpretq_u16_f16): Likewise.
6632 (__arm_vreinterpretq_u16_f32): Likewise.
6633 (__arm_vreinterpretq_u32_f16): Likewise.
6634 (__arm_vreinterpretq_u32_f32): Likewise.
6635 (__arm_vreinterpretq_u64_f16): Likewise.
6636 (__arm_vreinterpretq_u64_f32): Likewise.
6637 (__arm_vreinterpretq_u8_f16): Likewise.
6638 (__arm_vreinterpretq_u8_f32): Likewise.
6639 (__arm_vreinterpretq_f16_f32): Likewise.
6640 (__arm_vreinterpretq_f16_s16): Likewise.
6641 (__arm_vreinterpretq_f16_s32): Likewise.
6642 (__arm_vreinterpretq_f16_s64): Likewise.
6643 (__arm_vreinterpretq_f16_s8): Likewise.
6644 (__arm_vreinterpretq_f16_u16): Likewise.
6645 (__arm_vreinterpretq_f16_u32): Likewise.
6646 (__arm_vreinterpretq_f16_u64): Likewise.
6647 (__arm_vreinterpretq_f16_u8): Likewise.
6648 (__arm_vreinterpretq_f32_f16): Likewise.
6649 (__arm_vreinterpretq_f32_s16): Likewise.
6650 (__arm_vreinterpretq_f32_s32): Likewise.
6651 (__arm_vreinterpretq_f32_s64): Likewise.
6652 (__arm_vreinterpretq_f32_s8): Likewise.
6653 (__arm_vreinterpretq_f32_u16): Likewise.
6654 (__arm_vreinterpretq_f32_u32): Likewise.
6655 (__arm_vreinterpretq_f32_u64): Likewise.
6656 (__arm_vreinterpretq_f32_u8): Likewise.
6657 (vuninitializedq): Define polymorphic variant.
6658 (vreinterpretq_f16): Likewise.
6659 (vreinterpretq_f32): Likewise.
6660 (vreinterpretq_s16): Likewise.
6661 (vreinterpretq_s32): Likewise.
6662 (vreinterpretq_s64): Likewise.
6663 (vreinterpretq_s8): Likewise.
6664 (vreinterpretq_u16): Likewise.
6665 (vreinterpretq_u32): Likewise.
6666 (vreinterpretq_u64): Likewise.
6667 (vreinterpretq_u8): Likewise.
6669 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6670 Andre Vieira <andre.simoesdiasvieira@arm.com>
6671 Mihail Ionescu <mihail.ionescu@arm.com>
6673 * config/arm/arm_mve.h (vaddq_s8): Define macro.
6674 (vaddq_s16): Likewise.
6675 (vaddq_s32): Likewise.
6676 (vaddq_u8): Likewise.
6677 (vaddq_u16): Likewise.
6678 (vaddq_u32): Likewise.
6679 (vaddq_f16): Likewise.
6680 (vaddq_f32): Likewise.
6681 (__arm_vaddq_s8): Define intrinsic.
6682 (__arm_vaddq_s16): Likewise.
6683 (__arm_vaddq_s32): Likewise.
6684 (__arm_vaddq_u8): Likewise.
6685 (__arm_vaddq_u16): Likewise.
6686 (__arm_vaddq_u32): Likewise.
6687 (__arm_vaddq_f16): Likewise.
6688 (__arm_vaddq_f32): Likewise.
6689 (vaddq): Define polymorphic variant.
6690 * config/arm/iterators.md (VNIM): Define mode iterator for common types
6691 Neon, IWMMXT and MVE.
6692 (VNINOTM): Likewise.
6693 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
6694 (mve_vaddq_f<mode>): Define RTL pattern.
6695 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
6696 (addv8hf3_neon): Define RTL pattern.
6697 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
6699 (addv8hf3): Define standard RTL pattern for MVE and Neon.
6700 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
6702 2020-03-20 Martin Liska <mliska@suse.cz>
6705 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
6706 build_ref_for_offset function was used and it transforms off to bytes
6709 2020-03-20 Richard Biener <rguenther@suse.de>
6711 PR tree-optimization/94266
6712 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
6713 type of the underlying object to adjust for the containing
6716 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6718 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
6719 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
6720 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
6722 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6724 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
6726 2020-03-20 Jakub Jelinek <jakub@redhat.com>
6728 PR tree-optimization/94224
6729 * gimple-ssa-store-merging.c
6730 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
6731 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
6734 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
6736 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
6738 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6741 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
6742 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
6744 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
6747 * cgraphunit.c (process_function_and_variable_attributes): warn
6748 for flatten attribute on alias.
6749 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
6751 2020-03-19 Martin Liska <mliska@suse.cz>
6753 * lto-section-in.c: Add ext_symtab.
6754 * lto-streamer-out.c (write_symbol_extension_info): New.
6755 (produce_symtab_extension): New.
6756 (produce_asm_for_decls): Stream also produce_symtab_extension.
6757 * lto-streamer.h (enum lto_section_type): New section.
6759 2020-03-19 Jakub Jelinek <jakub@redhat.com>
6761 PR tree-optimization/94211
6762 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
6763 instead of estimate_num_insns for bb_seq (middle_bb). Rename
6764 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
6767 2020-03-19 Richard Biener <rguenther@suse.de>
6770 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
6771 and build_ref_for_offset.
6773 2020-03-19 Richard Biener <rguenther@suse.de>
6776 * fold-const.c (fold_binary_loc): Avoid using
6777 build_fold_addr_expr when we really want an ADDR_EXPR.
6779 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
6781 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
6784 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
6786 PR rtl-optimization/90275
6787 * cse.c (cse_insn): Delete no-op register moves too.
6789 2020-03-18 Martin Sebor <msebor@redhat.com>
6792 * cgraphunit.c (process_function_and_variable_attributes): Also
6793 complain about weakref function definitions and drop all effects
6796 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6797 Mihail Ionescu <mihail.ionescu@arm.com>
6798 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6800 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
6801 (vstrdq_scatter_base_p_u64): Likewise.
6802 (vstrdq_scatter_base_s64): Likewise.
6803 (vstrdq_scatter_base_u64): Likewise.
6804 (vstrdq_scatter_offset_p_s64): Likewise.
6805 (vstrdq_scatter_offset_p_u64): Likewise.
6806 (vstrdq_scatter_offset_s64): Likewise.
6807 (vstrdq_scatter_offset_u64): Likewise.
6808 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
6809 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
6810 (vstrdq_scatter_shifted_offset_s64): Likewise.
6811 (vstrdq_scatter_shifted_offset_u64): Likewise.
6812 (vstrhq_scatter_offset_f16): Likewise.
6813 (vstrhq_scatter_offset_p_f16): Likewise.
6814 (vstrhq_scatter_shifted_offset_f16): Likewise.
6815 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
6816 (vstrwq_scatter_base_f32): Likewise.
6817 (vstrwq_scatter_base_p_f32): Likewise.
6818 (vstrwq_scatter_offset_f32): Likewise.
6819 (vstrwq_scatter_offset_p_f32): Likewise.
6820 (vstrwq_scatter_offset_p_s32): Likewise.
6821 (vstrwq_scatter_offset_p_u32): Likewise.
6822 (vstrwq_scatter_offset_s32): Likewise.
6823 (vstrwq_scatter_offset_u32): Likewise.
6824 (vstrwq_scatter_shifted_offset_f32): Likewise.
6825 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
6826 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
6827 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
6828 (vstrwq_scatter_shifted_offset_s32): Likewise.
6829 (vstrwq_scatter_shifted_offset_u32): Likewise.
6830 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
6831 (__arm_vstrdq_scatter_base_p_u64): Likewise.
6832 (__arm_vstrdq_scatter_base_s64): Likewise.
6833 (__arm_vstrdq_scatter_base_u64): Likewise.
6834 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
6835 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
6836 (__arm_vstrdq_scatter_offset_s64): Likewise.
6837 (__arm_vstrdq_scatter_offset_u64): Likewise.
6838 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
6839 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
6840 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
6841 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
6842 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
6843 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
6844 (__arm_vstrwq_scatter_offset_s32): Likewise.
6845 (__arm_vstrwq_scatter_offset_u32): Likewise.
6846 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
6847 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
6848 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
6849 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
6850 (__arm_vstrhq_scatter_offset_f16): Likewise.
6851 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
6852 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
6853 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
6854 (__arm_vstrwq_scatter_base_f32): Likewise.
6855 (__arm_vstrwq_scatter_base_p_f32): Likewise.
6856 (__arm_vstrwq_scatter_offset_f32): Likewise.
6857 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
6858 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
6859 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
6860 (vstrhq_scatter_offset): Define polymorphic variant.
6861 (vstrhq_scatter_offset_p): Likewise.
6862 (vstrhq_scatter_shifted_offset): Likewise.
6863 (vstrhq_scatter_shifted_offset_p): Likewise.
6864 (vstrwq_scatter_base): Likewise.
6865 (vstrwq_scatter_base_p): Likewise.
6866 (vstrwq_scatter_offset): Likewise.
6867 (vstrwq_scatter_offset_p): Likewise.
6868 (vstrwq_scatter_shifted_offset): Likewise.
6869 (vstrwq_scatter_shifted_offset_p): Likewise.
6870 (vstrdq_scatter_base_p): Likewise.
6871 (vstrdq_scatter_base): Likewise.
6872 (vstrdq_scatter_offset_p): Likewise.
6873 (vstrdq_scatter_offset): Likewise.
6874 (vstrdq_scatter_shifted_offset_p): Likewise.
6875 (vstrdq_scatter_shifted_offset): Likewise.
6876 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
6877 (STRSBS_P): Likewise.
6879 (STRSBU_P): Likewise.
6881 (STRSS_P): Likewise.
6883 (STRSU_P): Likewise.
6884 * config/arm/constraints.md (Ri): Define.
6885 * config/arm/mve.md (VSTRDSBQ): Define iterator.
6886 (VSTRDSOQ): Likewise.
6887 (VSTRDSSOQ): Likewise.
6888 (VSTRWSOQ): Likewise.
6889 (VSTRWSSOQ): Likewise.
6890 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
6891 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
6892 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
6893 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
6894 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
6895 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
6896 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
6897 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
6898 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
6899 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
6900 (mve_vstrwq_scatter_base_fv4sf): Likewise.
6901 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
6902 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
6903 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
6904 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
6905 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
6906 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
6907 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
6908 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
6909 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
6910 * config/arm/predicates.md (Ri): Define predicate to check immediate
6911 is the range +/-1016 and multiple of 8.
6913 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
6914 Mihail Ionescu <mihail.ionescu@arm.com>
6915 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6917 * config/arm/arm_mve.h (vst1q_f32): Define macro.
6918 (vst1q_f16): Likewise.
6919 (vst1q_s8): Likewise.
6920 (vst1q_s32): Likewise.
6921 (vst1q_s16): Likewise.
6922 (vst1q_u8): Likewise.
6923 (vst1q_u32): Likewise.
6924 (vst1q_u16): Likewise.
6925 (vstrhq_f16): Likewise.
6926 (vstrhq_scatter_offset_s32): Likewise.
6927 (vstrhq_scatter_offset_s16): Likewise.
6928 (vstrhq_scatter_offset_u32): Likewise.
6929 (vstrhq_scatter_offset_u16): Likewise.
6930 (vstrhq_scatter_offset_p_s32): Likewise.
6931 (vstrhq_scatter_offset_p_s16): Likewise.
6932 (vstrhq_scatter_offset_p_u32): Likewise.
6933 (vstrhq_scatter_offset_p_u16): Likewise.
6934 (vstrhq_scatter_shifted_offset_s32): Likewise.
6935 (vstrhq_scatter_shifted_offset_s16): Likewise.
6936 (vstrhq_scatter_shifted_offset_u32): Likewise.
6937 (vstrhq_scatter_shifted_offset_u16): Likewise.
6938 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
6939 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
6940 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
6941 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
6942 (vstrhq_s32): Likewise.
6943 (vstrhq_s16): Likewise.
6944 (vstrhq_u32): Likewise.
6945 (vstrhq_u16): Likewise.
6946 (vstrhq_p_f16): Likewise.
6947 (vstrhq_p_s32): Likewise.
6948 (vstrhq_p_s16): Likewise.
6949 (vstrhq_p_u32): Likewise.
6950 (vstrhq_p_u16): Likewise.
6951 (vstrwq_f32): Likewise.
6952 (vstrwq_s32): Likewise.
6953 (vstrwq_u32): Likewise.
6954 (vstrwq_p_f32): Likewise.
6955 (vstrwq_p_s32): Likewise.
6956 (vstrwq_p_u32): Likewise.
6957 (__arm_vst1q_s8): Define intrinsic.
6958 (__arm_vst1q_s32): Likewise.
6959 (__arm_vst1q_s16): Likewise.
6960 (__arm_vst1q_u8): Likewise.
6961 (__arm_vst1q_u32): Likewise.
6962 (__arm_vst1q_u16): Likewise.
6963 (__arm_vstrhq_scatter_offset_s32): Likewise.
6964 (__arm_vstrhq_scatter_offset_s16): Likewise.
6965 (__arm_vstrhq_scatter_offset_u32): Likewise.
6966 (__arm_vstrhq_scatter_offset_u16): Likewise.
6967 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
6968 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
6969 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
6970 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
6971 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
6972 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
6973 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
6974 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
6975 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
6976 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
6977 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
6978 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
6979 (__arm_vstrhq_s32): Likewise.
6980 (__arm_vstrhq_s16): Likewise.
6981 (__arm_vstrhq_u32): Likewise.
6982 (__arm_vstrhq_u16): Likewise.
6983 (__arm_vstrhq_p_s32): Likewise.
6984 (__arm_vstrhq_p_s16): Likewise.
6985 (__arm_vstrhq_p_u32): Likewise.
6986 (__arm_vstrhq_p_u16): Likewise.
6987 (__arm_vstrwq_s32): Likewise.
6988 (__arm_vstrwq_u32): Likewise.
6989 (__arm_vstrwq_p_s32): Likewise.
6990 (__arm_vstrwq_p_u32): Likewise.
6991 (__arm_vstrwq_p_f32): Likewise.
6992 (__arm_vstrwq_f32): Likewise.
6993 (__arm_vst1q_f32): Likewise.
6994 (__arm_vst1q_f16): Likewise.
6995 (__arm_vstrhq_f16): Likewise.
6996 (__arm_vstrhq_p_f16): Likewise.
6997 (vst1q): Define polymorphic variant.
6999 (vstrhq_p): Likewise.
7000 (vstrhq_scatter_offset_p): Likewise.
7001 (vstrhq_scatter_offset): Likewise.
7002 (vstrhq_scatter_shifted_offset_p): Likewise.
7003 (vstrhq_scatter_shifted_offset): Likewise.
7004 (vstrwq_p): Likewise.
7006 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
7009 (STRSS_P): Likewise.
7011 (STRSU_P): Likewise.
7014 * config/arm/mve.md (VST1Q): Define iterator.
7015 (VSTRHSOQ): Likewise.
7016 (VSTRHSSOQ): Likewise.
7019 (mve_vstrhq_fv8hf): Define RTL pattern.
7020 (mve_vstrhq_p_fv8hf): Likewise.
7021 (mve_vstrhq_p_<supf><mode>): Likewise.
7022 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
7023 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
7024 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
7025 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
7026 (mve_vstrhq_<supf><mode>): Likewise.
7027 (mve_vstrwq_fv4sf): Likewise.
7028 (mve_vstrwq_p_fv4sf): Likewise.
7029 (mve_vstrwq_p_<supf>v4si): Likewise.
7030 (mve_vstrwq_<supf>v4si): Likewise.
7031 (mve_vst1q_f<mode>): Define expand.
7032 (mve_vst1q_<supf><mode>): Likewise.
7034 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7035 Mihail Ionescu <mihail.ionescu@arm.com>
7036 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7038 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7039 (vld1q_s32): Likewise.
7040 (vld1q_s16): Likewise.
7041 (vld1q_u8): Likewise.
7042 (vld1q_u32): Likewise.
7043 (vld1q_u16): Likewise.
7044 (vldrhq_gather_offset_s32): Likewise.
7045 (vldrhq_gather_offset_s16): Likewise.
7046 (vldrhq_gather_offset_u32): Likewise.
7047 (vldrhq_gather_offset_u16): Likewise.
7048 (vldrhq_gather_offset_z_s32): Likewise.
7049 (vldrhq_gather_offset_z_s16): Likewise.
7050 (vldrhq_gather_offset_z_u32): Likewise.
7051 (vldrhq_gather_offset_z_u16): Likewise.
7052 (vldrhq_gather_shifted_offset_s32): Likewise.
7053 (vldrhq_gather_shifted_offset_s16): Likewise.
7054 (vldrhq_gather_shifted_offset_u32): Likewise.
7055 (vldrhq_gather_shifted_offset_u16): Likewise.
7056 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7057 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7058 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7059 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7060 (vldrhq_s32): Likewise.
7061 (vldrhq_s16): Likewise.
7062 (vldrhq_u32): Likewise.
7063 (vldrhq_u16): Likewise.
7064 (vldrhq_z_s32): Likewise.
7065 (vldrhq_z_s16): Likewise.
7066 (vldrhq_z_u32): Likewise.
7067 (vldrhq_z_u16): Likewise.
7068 (vldrwq_s32): Likewise.
7069 (vldrwq_u32): Likewise.
7070 (vldrwq_z_s32): Likewise.
7071 (vldrwq_z_u32): Likewise.
7072 (vld1q_f32): Likewise.
7073 (vld1q_f16): Likewise.
7074 (vldrhq_f16): Likewise.
7075 (vldrhq_z_f16): Likewise.
7076 (vldrwq_f32): Likewise.
7077 (vldrwq_z_f32): Likewise.
7078 (__arm_vld1q_s8): Define intrinsic.
7079 (__arm_vld1q_s32): Likewise.
7080 (__arm_vld1q_s16): Likewise.
7081 (__arm_vld1q_u8): Likewise.
7082 (__arm_vld1q_u32): Likewise.
7083 (__arm_vld1q_u16): Likewise.
7084 (__arm_vldrhq_gather_offset_s32): Likewise.
7085 (__arm_vldrhq_gather_offset_s16): Likewise.
7086 (__arm_vldrhq_gather_offset_u32): Likewise.
7087 (__arm_vldrhq_gather_offset_u16): Likewise.
7088 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7089 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7090 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7091 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7092 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7093 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7094 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7095 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7096 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7097 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7098 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7099 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7100 (__arm_vldrhq_s32): Likewise.
7101 (__arm_vldrhq_s16): Likewise.
7102 (__arm_vldrhq_u32): Likewise.
7103 (__arm_vldrhq_u16): Likewise.
7104 (__arm_vldrhq_z_s32): Likewise.
7105 (__arm_vldrhq_z_s16): Likewise.
7106 (__arm_vldrhq_z_u32): Likewise.
7107 (__arm_vldrhq_z_u16): Likewise.
7108 (__arm_vldrwq_s32): Likewise.
7109 (__arm_vldrwq_u32): Likewise.
7110 (__arm_vldrwq_z_s32): Likewise.
7111 (__arm_vldrwq_z_u32): Likewise.
7112 (__arm_vld1q_f32): Likewise.
7113 (__arm_vld1q_f16): Likewise.
7114 (__arm_vldrwq_f32): Likewise.
7115 (__arm_vldrwq_z_f32): Likewise.
7116 (__arm_vldrhq_z_f16): Likewise.
7117 (__arm_vldrhq_f16): Likewise.
7118 (vld1q): Define polymorphic variant.
7119 (vldrhq_gather_offset): Likewise.
7120 (vldrhq_gather_offset_z): Likewise.
7121 (vldrhq_gather_shifted_offset): Likewise.
7122 (vldrhq_gather_shifted_offset_z): Likewise.
7123 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7127 (LDRGU_Z): Likewise.
7129 (LDRGS_Z): Likewise.
7131 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7132 (V_sz_elem1): Likewise.
7133 (VLD1Q): Define iterator.
7134 (VLDRHGOQ): Likewise.
7135 (VLDRHGSOQ): Likewise.
7138 (mve_vldrhq_fv8hf): Define RTL pattern.
7139 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7140 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7141 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7142 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7143 (mve_vldrhq_<supf><mode>): Likewise.
7144 (mve_vldrhq_z_fv8hf): Likewise.
7145 (mve_vldrhq_z_<supf><mode>): Likewise.
7146 (mve_vldrwq_fv4sf): Likewise.
7147 (mve_vldrwq_<supf>v4si): Likewise.
7148 (mve_vldrwq_z_fv4sf): Likewise.
7149 (mve_vldrwq_z_<supf>v4si): Likewise.
7150 (mve_vld1q_f<mode>): Define RTL expand pattern.
7151 (mve_vld1q_<supf><mode>): Likewise.
7153 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7154 Mihail Ionescu <mihail.ionescu@arm.com>
7155 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7157 * config/arm/arm_mve.h (vld1q_s8): Define macro.
7158 (vld1q_s32): Likewise.
7159 (vld1q_s16): Likewise.
7160 (vld1q_u8): Likewise.
7161 (vld1q_u32): Likewise.
7162 (vld1q_u16): Likewise.
7163 (vldrhq_gather_offset_s32): Likewise.
7164 (vldrhq_gather_offset_s16): Likewise.
7165 (vldrhq_gather_offset_u32): Likewise.
7166 (vldrhq_gather_offset_u16): Likewise.
7167 (vldrhq_gather_offset_z_s32): Likewise.
7168 (vldrhq_gather_offset_z_s16): Likewise.
7169 (vldrhq_gather_offset_z_u32): Likewise.
7170 (vldrhq_gather_offset_z_u16): Likewise.
7171 (vldrhq_gather_shifted_offset_s32): Likewise.
7172 (vldrhq_gather_shifted_offset_s16): Likewise.
7173 (vldrhq_gather_shifted_offset_u32): Likewise.
7174 (vldrhq_gather_shifted_offset_u16): Likewise.
7175 (vldrhq_gather_shifted_offset_z_s32): Likewise.
7176 (vldrhq_gather_shifted_offset_z_s16): Likewise.
7177 (vldrhq_gather_shifted_offset_z_u32): Likewise.
7178 (vldrhq_gather_shifted_offset_z_u16): Likewise.
7179 (vldrhq_s32): Likewise.
7180 (vldrhq_s16): Likewise.
7181 (vldrhq_u32): Likewise.
7182 (vldrhq_u16): Likewise.
7183 (vldrhq_z_s32): Likewise.
7184 (vldrhq_z_s16): Likewise.
7185 (vldrhq_z_u32): Likewise.
7186 (vldrhq_z_u16): Likewise.
7187 (vldrwq_s32): Likewise.
7188 (vldrwq_u32): Likewise.
7189 (vldrwq_z_s32): Likewise.
7190 (vldrwq_z_u32): Likewise.
7191 (vld1q_f32): Likewise.
7192 (vld1q_f16): Likewise.
7193 (vldrhq_f16): Likewise.
7194 (vldrhq_z_f16): Likewise.
7195 (vldrwq_f32): Likewise.
7196 (vldrwq_z_f32): Likewise.
7197 (__arm_vld1q_s8): Define intrinsic.
7198 (__arm_vld1q_s32): Likewise.
7199 (__arm_vld1q_s16): Likewise.
7200 (__arm_vld1q_u8): Likewise.
7201 (__arm_vld1q_u32): Likewise.
7202 (__arm_vld1q_u16): Likewise.
7203 (__arm_vldrhq_gather_offset_s32): Likewise.
7204 (__arm_vldrhq_gather_offset_s16): Likewise.
7205 (__arm_vldrhq_gather_offset_u32): Likewise.
7206 (__arm_vldrhq_gather_offset_u16): Likewise.
7207 (__arm_vldrhq_gather_offset_z_s32): Likewise.
7208 (__arm_vldrhq_gather_offset_z_s16): Likewise.
7209 (__arm_vldrhq_gather_offset_z_u32): Likewise.
7210 (__arm_vldrhq_gather_offset_z_u16): Likewise.
7211 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
7212 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
7213 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
7214 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
7215 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
7216 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
7217 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
7218 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
7219 (__arm_vldrhq_s32): Likewise.
7220 (__arm_vldrhq_s16): Likewise.
7221 (__arm_vldrhq_u32): Likewise.
7222 (__arm_vldrhq_u16): Likewise.
7223 (__arm_vldrhq_z_s32): Likewise.
7224 (__arm_vldrhq_z_s16): Likewise.
7225 (__arm_vldrhq_z_u32): Likewise.
7226 (__arm_vldrhq_z_u16): Likewise.
7227 (__arm_vldrwq_s32): Likewise.
7228 (__arm_vldrwq_u32): Likewise.
7229 (__arm_vldrwq_z_s32): Likewise.
7230 (__arm_vldrwq_z_u32): Likewise.
7231 (__arm_vld1q_f32): Likewise.
7232 (__arm_vld1q_f16): Likewise.
7233 (__arm_vldrwq_f32): Likewise.
7234 (__arm_vldrwq_z_f32): Likewise.
7235 (__arm_vldrhq_z_f16): Likewise.
7236 (__arm_vldrhq_f16): Likewise.
7237 (vld1q): Define polymorphic variant.
7238 (vldrhq_gather_offset): Likewise.
7239 (vldrhq_gather_offset_z): Likewise.
7240 (vldrhq_gather_shifted_offset): Likewise.
7241 (vldrhq_gather_shifted_offset_z): Likewise.
7242 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
7246 (LDRGU_Z): Likewise.
7248 (LDRGS_Z): Likewise.
7250 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
7251 (V_sz_elem1): Likewise.
7252 (VLD1Q): Define iterator.
7253 (VLDRHGOQ): Likewise.
7254 (VLDRHGSOQ): Likewise.
7257 (mve_vldrhq_fv8hf): Define RTL pattern.
7258 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
7259 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
7260 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
7261 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
7262 (mve_vldrhq_<supf><mode>): Likewise.
7263 (mve_vldrhq_z_fv8hf): Likewise.
7264 (mve_vldrhq_z_<supf><mode>): Likewise.
7265 (mve_vldrwq_fv4sf): Likewise.
7266 (mve_vldrwq_<supf>v4si): Likewise.
7267 (mve_vldrwq_z_fv4sf): Likewise.
7268 (mve_vldrwq_z_<supf>v4si): Likewise.
7269 (mve_vld1q_f<mode>): Define RTL expand pattern.
7270 (mve_vld1q_<supf><mode>): Likewise.
7272 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7273 Mihail Ionescu <mihail.ionescu@arm.com>
7274 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7276 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
7278 (LDRGBU_Z_QUALIFIERS): Likewise.
7279 (LDRGS_Z_QUALIFIERS): Likewise.
7280 (LDRGU_Z_QUALIFIERS): Likewise.
7281 (LDRS_Z_QUALIFIERS): Likewise.
7282 (LDRU_Z_QUALIFIERS): Likewise.
7283 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
7284 (vldrbq_gather_offset_z_u8): Likewise.
7285 (vldrbq_gather_offset_z_s32): Likewise.
7286 (vldrbq_gather_offset_z_u16): Likewise.
7287 (vldrbq_gather_offset_z_u32): Likewise.
7288 (vldrbq_gather_offset_z_s8): Likewise.
7289 (vldrbq_z_s16): Likewise.
7290 (vldrbq_z_u8): Likewise.
7291 (vldrbq_z_s8): Likewise.
7292 (vldrbq_z_s32): Likewise.
7293 (vldrbq_z_u16): Likewise.
7294 (vldrbq_z_u32): Likewise.
7295 (vldrwq_gather_base_z_u32): Likewise.
7296 (vldrwq_gather_base_z_s32): Likewise.
7297 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
7298 (__arm_vldrbq_gather_offset_z_s32): Likewise.
7299 (__arm_vldrbq_gather_offset_z_s16): Likewise.
7300 (__arm_vldrbq_gather_offset_z_u8): Likewise.
7301 (__arm_vldrbq_gather_offset_z_u32): Likewise.
7302 (__arm_vldrbq_gather_offset_z_u16): Likewise.
7303 (__arm_vldrbq_z_s8): Likewise.
7304 (__arm_vldrbq_z_s32): Likewise.
7305 (__arm_vldrbq_z_s16): Likewise.
7306 (__arm_vldrbq_z_u8): Likewise.
7307 (__arm_vldrbq_z_u32): Likewise.
7308 (__arm_vldrbq_z_u16): Likewise.
7309 (__arm_vldrwq_gather_base_z_s32): Likewise.
7310 (__arm_vldrwq_gather_base_z_u32): Likewise.
7311 (vldrbq_gather_offset_z): Define polymorphic variant.
7312 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
7314 (LDRGBU_Z_QUALIFIERS): Likewise.
7315 (LDRGS_Z_QUALIFIERS): Likewise.
7316 (LDRGU_Z_QUALIFIERS): Likewise.
7317 (LDRS_Z_QUALIFIERS): Likewise.
7318 (LDRU_Z_QUALIFIERS): Likewise.
7319 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
7321 (mve_vldrbq_z_<supf><mode>): Likewise.
7322 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
7324 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7325 Mihail Ionescu <mihail.ionescu@arm.com>
7326 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7328 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
7330 (STRU_P_QUALIFIERS): Likewise.
7331 (STRSU_P_QUALIFIERS): Likewise.
7332 (STRSS_P_QUALIFIERS): Likewise.
7333 (STRSBS_P_QUALIFIERS): Likewise.
7334 (STRSBU_P_QUALIFIERS): Likewise.
7335 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
7336 (vstrbq_p_s32): Likewise.
7337 (vstrbq_p_s16): Likewise.
7338 (vstrbq_p_u8): Likewise.
7339 (vstrbq_p_u32): Likewise.
7340 (vstrbq_p_u16): Likewise.
7341 (vstrbq_scatter_offset_p_s8): Likewise.
7342 (vstrbq_scatter_offset_p_s32): Likewise.
7343 (vstrbq_scatter_offset_p_s16): Likewise.
7344 (vstrbq_scatter_offset_p_u8): Likewise.
7345 (vstrbq_scatter_offset_p_u32): Likewise.
7346 (vstrbq_scatter_offset_p_u16): Likewise.
7347 (vstrwq_scatter_base_p_s32): Likewise.
7348 (vstrwq_scatter_base_p_u32): Likewise.
7349 (__arm_vstrbq_p_s8): Define intrinsic.
7350 (__arm_vstrbq_p_s32): Likewise.
7351 (__arm_vstrbq_p_s16): Likewise.
7352 (__arm_vstrbq_p_u8): Likewise.
7353 (__arm_vstrbq_p_u32): Likewise.
7354 (__arm_vstrbq_p_u16): Likewise.
7355 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
7356 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
7357 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
7358 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
7359 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
7360 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
7361 (__arm_vstrwq_scatter_base_p_s32): Likewise.
7362 (__arm_vstrwq_scatter_base_p_u32): Likewise.
7363 (vstrbq_p): Define polymorphic variant.
7364 (vstrbq_scatter_offset_p): Likewise.
7365 (vstrwq_scatter_base_p): Likewise.
7366 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
7368 (STRU_P_QUALIFIERS): Likewise.
7369 (STRSU_P_QUALIFIERS): Likewise.
7370 (STRSS_P_QUALIFIERS): Likewise.
7371 (STRSBS_P_QUALIFIERS): Likewise.
7372 (STRSBU_P_QUALIFIERS): Likewise.
7373 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
7375 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
7376 (mve_vstrbq_p_<supf><mode>): Likewise.
7378 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7379 Mihail Ionescu <mihail.ionescu@arm.com>
7380 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7382 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
7384 (LDRGS_QUALIFIERS): Likewise.
7385 (LDRS_QUALIFIERS): Likewise.
7386 (LDRU_QUALIFIERS): Likewise.
7387 (LDRGBS_QUALIFIERS): Likewise.
7388 (LDRGBU_QUALIFIERS): Likewise.
7389 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
7390 (vldrbq_gather_offset_s8): Likewise.
7391 (vldrbq_s8): Likewise.
7392 (vldrbq_u8): Likewise.
7393 (vldrbq_gather_offset_u16): Likewise.
7394 (vldrbq_gather_offset_s16): Likewise.
7395 (vldrbq_s16): Likewise.
7396 (vldrbq_u16): Likewise.
7397 (vldrbq_gather_offset_u32): Likewise.
7398 (vldrbq_gather_offset_s32): Likewise.
7399 (vldrbq_s32): Likewise.
7400 (vldrbq_u32): Likewise.
7401 (vldrwq_gather_base_s32): Likewise.
7402 (vldrwq_gather_base_u32): Likewise.
7403 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
7404 (__arm_vldrbq_gather_offset_s8): Likewise.
7405 (__arm_vldrbq_s8): Likewise.
7406 (__arm_vldrbq_u8): Likewise.
7407 (__arm_vldrbq_gather_offset_u16): Likewise.
7408 (__arm_vldrbq_gather_offset_s16): Likewise.
7409 (__arm_vldrbq_s16): Likewise.
7410 (__arm_vldrbq_u16): Likewise.
7411 (__arm_vldrbq_gather_offset_u32): Likewise.
7412 (__arm_vldrbq_gather_offset_s32): Likewise.
7413 (__arm_vldrbq_s32): Likewise.
7414 (__arm_vldrbq_u32): Likewise.
7415 (__arm_vldrwq_gather_base_s32): Likewise.
7416 (__arm_vldrwq_gather_base_u32): Likewise.
7417 (vldrbq_gather_offset): Define polymorphic variant.
7418 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
7420 (LDRGS_QUALIFIERS): Likewise.
7421 (LDRS_QUALIFIERS): Likewise.
7422 (LDRU_QUALIFIERS): Likewise.
7423 (LDRGBS_QUALIFIERS): Likewise.
7424 (LDRGBU_QUALIFIERS): Likewise.
7425 * config/arm/mve.md (VLDRBGOQ): Define iterator.
7427 (VLDRWGBQ): Likewise.
7428 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
7429 (mve_vldrbq_<supf><mode>): Likewise.
7430 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
7432 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7433 Mihail Ionescu <mihail.ionescu@arm.com>
7434 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7436 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
7437 (STRU_QUALIFIERS): Likewise.
7438 (STRSS_QUALIFIERS): Likewise.
7439 (STRSU_QUALIFIERS): Likewise.
7440 (STRSBS_QUALIFIERS): Likewise.
7441 (STRSBU_QUALIFIERS): Likewise.
7442 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
7443 (vstrbq_u8): Likewise.
7444 (vstrbq_u16): Likewise.
7445 (vstrbq_scatter_offset_s8): Likewise.
7446 (vstrbq_scatter_offset_u8): Likewise.
7447 (vstrbq_scatter_offset_u16): Likewise.
7448 (vstrbq_s16): Likewise.
7449 (vstrbq_u32): Likewise.
7450 (vstrbq_scatter_offset_s16): Likewise.
7451 (vstrbq_scatter_offset_u32): Likewise.
7452 (vstrbq_s32): Likewise.
7453 (vstrbq_scatter_offset_s32): Likewise.
7454 (vstrwq_scatter_base_s32): Likewise.
7455 (vstrwq_scatter_base_u32): Likewise.
7456 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
7457 (__arm_vstrbq_scatter_offset_s32): Likewise.
7458 (__arm_vstrbq_scatter_offset_s16): Likewise.
7459 (__arm_vstrbq_scatter_offset_u8): Likewise.
7460 (__arm_vstrbq_scatter_offset_u32): Likewise.
7461 (__arm_vstrbq_scatter_offset_u16): Likewise.
7462 (__arm_vstrbq_s8): Likewise.
7463 (__arm_vstrbq_s32): Likewise.
7464 (__arm_vstrbq_s16): Likewise.
7465 (__arm_vstrbq_u8): Likewise.
7466 (__arm_vstrbq_u32): Likewise.
7467 (__arm_vstrbq_u16): Likewise.
7468 (__arm_vstrwq_scatter_base_s32): Likewise.
7469 (__arm_vstrwq_scatter_base_u32): Likewise.
7470 (vstrbq): Define polymorphic variant.
7471 (vstrbq_scatter_offset): Likewise.
7472 (vstrwq_scatter_base): Likewise.
7473 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
7475 (STRU_QUALIFIERS): Likewise.
7476 (STRSS_QUALIFIERS): Likewise.
7477 (STRSU_QUALIFIERS): Likewise.
7478 (STRSBS_QUALIFIERS): Likewise.
7479 (STRSBU_QUALIFIERS): Likewise.
7480 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
7481 (VSTRWSBQ): Define iterators.
7482 (VSTRBSOQ): Likewise.
7484 (mve_vstrbq_<supf><mode>): Define RTL pattern.
7485 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
7486 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
7488 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7489 Mihail Ionescu <mihail.ionescu@arm.com>
7490 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7492 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
7493 (vabdq_m_f16): Likewise.
7494 (vaddq_m_f32): Likewise.
7495 (vaddq_m_f16): Likewise.
7496 (vaddq_m_n_f32): Likewise.
7497 (vaddq_m_n_f16): Likewise.
7498 (vandq_m_f32): Likewise.
7499 (vandq_m_f16): Likewise.
7500 (vbicq_m_f32): Likewise.
7501 (vbicq_m_f16): Likewise.
7502 (vbrsrq_m_n_f32): Likewise.
7503 (vbrsrq_m_n_f16): Likewise.
7504 (vcaddq_rot270_m_f32): Likewise.
7505 (vcaddq_rot270_m_f16): Likewise.
7506 (vcaddq_rot90_m_f32): Likewise.
7507 (vcaddq_rot90_m_f16): Likewise.
7508 (vcmlaq_m_f32): Likewise.
7509 (vcmlaq_m_f16): Likewise.
7510 (vcmlaq_rot180_m_f32): Likewise.
7511 (vcmlaq_rot180_m_f16): Likewise.
7512 (vcmlaq_rot270_m_f32): Likewise.
7513 (vcmlaq_rot270_m_f16): Likewise.
7514 (vcmlaq_rot90_m_f32): Likewise.
7515 (vcmlaq_rot90_m_f16): Likewise.
7516 (vcmulq_m_f32): Likewise.
7517 (vcmulq_m_f16): Likewise.
7518 (vcmulq_rot180_m_f32): Likewise.
7519 (vcmulq_rot180_m_f16): Likewise.
7520 (vcmulq_rot270_m_f32): Likewise.
7521 (vcmulq_rot270_m_f16): Likewise.
7522 (vcmulq_rot90_m_f32): Likewise.
7523 (vcmulq_rot90_m_f16): Likewise.
7524 (vcvtq_m_n_s32_f32): Likewise.
7525 (vcvtq_m_n_s16_f16): Likewise.
7526 (vcvtq_m_n_u32_f32): Likewise.
7527 (vcvtq_m_n_u16_f16): Likewise.
7528 (veorq_m_f32): Likewise.
7529 (veorq_m_f16): Likewise.
7530 (vfmaq_m_f32): Likewise.
7531 (vfmaq_m_f16): Likewise.
7532 (vfmaq_m_n_f32): Likewise.
7533 (vfmaq_m_n_f16): Likewise.
7534 (vfmasq_m_n_f32): Likewise.
7535 (vfmasq_m_n_f16): Likewise.
7536 (vfmsq_m_f32): Likewise.
7537 (vfmsq_m_f16): Likewise.
7538 (vmaxnmq_m_f32): Likewise.
7539 (vmaxnmq_m_f16): Likewise.
7540 (vminnmq_m_f32): Likewise.
7541 (vminnmq_m_f16): Likewise.
7542 (vmulq_m_f32): Likewise.
7543 (vmulq_m_f16): Likewise.
7544 (vmulq_m_n_f32): Likewise.
7545 (vmulq_m_n_f16): Likewise.
7546 (vornq_m_f32): Likewise.
7547 (vornq_m_f16): Likewise.
7548 (vorrq_m_f32): Likewise.
7549 (vorrq_m_f16): Likewise.
7550 (vsubq_m_f32): Likewise.
7551 (vsubq_m_f16): Likewise.
7552 (vsubq_m_n_f32): Likewise.
7553 (vsubq_m_n_f16): Likewise.
7554 (__attribute__): Likewise.
7555 (__arm_vabdq_m_f32): Likewise.
7556 (__arm_vabdq_m_f16): Likewise.
7557 (__arm_vaddq_m_f32): Likewise.
7558 (__arm_vaddq_m_f16): Likewise.
7559 (__arm_vaddq_m_n_f32): Likewise.
7560 (__arm_vaddq_m_n_f16): Likewise.
7561 (__arm_vandq_m_f32): Likewise.
7562 (__arm_vandq_m_f16): Likewise.
7563 (__arm_vbicq_m_f32): Likewise.
7564 (__arm_vbicq_m_f16): Likewise.
7565 (__arm_vbrsrq_m_n_f32): Likewise.
7566 (__arm_vbrsrq_m_n_f16): Likewise.
7567 (__arm_vcaddq_rot270_m_f32): Likewise.
7568 (__arm_vcaddq_rot270_m_f16): Likewise.
7569 (__arm_vcaddq_rot90_m_f32): Likewise.
7570 (__arm_vcaddq_rot90_m_f16): Likewise.
7571 (__arm_vcmlaq_m_f32): Likewise.
7572 (__arm_vcmlaq_m_f16): Likewise.
7573 (__arm_vcmlaq_rot180_m_f32): Likewise.
7574 (__arm_vcmlaq_rot180_m_f16): Likewise.
7575 (__arm_vcmlaq_rot270_m_f32): Likewise.
7576 (__arm_vcmlaq_rot270_m_f16): Likewise.
7577 (__arm_vcmlaq_rot90_m_f32): Likewise.
7578 (__arm_vcmlaq_rot90_m_f16): Likewise.
7579 (__arm_vcmulq_m_f32): Likewise.
7580 (__arm_vcmulq_m_f16): Likewise.
7581 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
7582 (__arm_vcmulq_rot180_m_f16): Likewise.
7583 (__arm_vcmulq_rot270_m_f32): Likewise.
7584 (__arm_vcmulq_rot270_m_f16): Likewise.
7585 (__arm_vcmulq_rot90_m_f32): Likewise.
7586 (__arm_vcmulq_rot90_m_f16): Likewise.
7587 (__arm_vcvtq_m_n_s32_f32): Likewise.
7588 (__arm_vcvtq_m_n_s16_f16): Likewise.
7589 (__arm_vcvtq_m_n_u32_f32): Likewise.
7590 (__arm_vcvtq_m_n_u16_f16): Likewise.
7591 (__arm_veorq_m_f32): Likewise.
7592 (__arm_veorq_m_f16): Likewise.
7593 (__arm_vfmaq_m_f32): Likewise.
7594 (__arm_vfmaq_m_f16): Likewise.
7595 (__arm_vfmaq_m_n_f32): Likewise.
7596 (__arm_vfmaq_m_n_f16): Likewise.
7597 (__arm_vfmasq_m_n_f32): Likewise.
7598 (__arm_vfmasq_m_n_f16): Likewise.
7599 (__arm_vfmsq_m_f32): Likewise.
7600 (__arm_vfmsq_m_f16): Likewise.
7601 (__arm_vmaxnmq_m_f32): Likewise.
7602 (__arm_vmaxnmq_m_f16): Likewise.
7603 (__arm_vminnmq_m_f32): Likewise.
7604 (__arm_vminnmq_m_f16): Likewise.
7605 (__arm_vmulq_m_f32): Likewise.
7606 (__arm_vmulq_m_f16): Likewise.
7607 (__arm_vmulq_m_n_f32): Likewise.
7608 (__arm_vmulq_m_n_f16): Likewise.
7609 (__arm_vornq_m_f32): Likewise.
7610 (__arm_vornq_m_f16): Likewise.
7611 (__arm_vorrq_m_f32): Likewise.
7612 (__arm_vorrq_m_f16): Likewise.
7613 (__arm_vsubq_m_f32): Likewise.
7614 (__arm_vsubq_m_f16): Likewise.
7615 (__arm_vsubq_m_n_f32): Likewise.
7616 (__arm_vsubq_m_n_f16): Likewise.
7617 (vabdq_m): Define polymorphic variant.
7618 (vaddq_m): Likewise.
7619 (vaddq_m_n): Likewise.
7620 (vandq_m): Likewise.
7621 (vbicq_m): Likewise.
7622 (vbrsrq_m_n): Likewise.
7623 (vcaddq_rot270_m): Likewise.
7624 (vcaddq_rot90_m): Likewise.
7625 (vcmlaq_m): Likewise.
7626 (vcmlaq_rot180_m): Likewise.
7627 (vcmlaq_rot270_m): Likewise.
7628 (vcmlaq_rot90_m): Likewise.
7629 (vcmulq_m): Likewise.
7630 (vcmulq_rot180_m): Likewise.
7631 (vcmulq_rot270_m): Likewise.
7632 (vcmulq_rot90_m): Likewise.
7633 (veorq_m): Likewise.
7634 (vfmaq_m): Likewise.
7635 (vfmaq_m_n): Likewise.
7636 (vfmasq_m_n): Likewise.
7637 (vfmsq_m): Likewise.
7638 (vmaxnmq_m): Likewise.
7639 (vminnmq_m): Likewise.
7640 (vmulq_m): Likewise.
7641 (vmulq_m_n): Likewise.
7642 (vornq_m): Likewise.
7643 (vsubq_m): Likewise.
7644 (vsubq_m_n): Likewise.
7645 (vorrq_m): Likewise.
7646 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7648 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7649 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7650 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
7651 (mve_vaddq_m_f<mode>): Likewise.
7652 (mve_vaddq_m_n_f<mode>): Likewise.
7653 (mve_vandq_m_f<mode>): Likewise.
7654 (mve_vbicq_m_f<mode>): Likewise.
7655 (mve_vbrsrq_m_n_f<mode>): Likewise.
7656 (mve_vcaddq_rot270_m_f<mode>): Likewise.
7657 (mve_vcaddq_rot90_m_f<mode>): Likewise.
7658 (mve_vcmlaq_m_f<mode>): Likewise.
7659 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
7660 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
7661 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
7662 (mve_vcmulq_m_f<mode>): Likewise.
7663 (mve_vcmulq_rot180_m_f<mode>): Likewise.
7664 (mve_vcmulq_rot270_m_f<mode>): Likewise.
7665 (mve_vcmulq_rot90_m_f<mode>): Likewise.
7666 (mve_veorq_m_f<mode>): Likewise.
7667 (mve_vfmaq_m_f<mode>): Likewise.
7668 (mve_vfmaq_m_n_f<mode>): Likewise.
7669 (mve_vfmasq_m_n_f<mode>): Likewise.
7670 (mve_vfmsq_m_f<mode>): Likewise.
7671 (mve_vmaxnmq_m_f<mode>): Likewise.
7672 (mve_vminnmq_m_f<mode>): Likewise.
7673 (mve_vmulq_m_f<mode>): Likewise.
7674 (mve_vmulq_m_n_f<mode>): Likewise.
7675 (mve_vornq_m_f<mode>): Likewise.
7676 (mve_vorrq_m_f<mode>): Likewise.
7677 (mve_vsubq_m_f<mode>): Likewise.
7678 (mve_vsubq_m_n_f<mode>): Likewise.
7680 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7681 Mihail Ionescu <mihail.ionescu@arm.com>
7682 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7684 * config/arm/arm-protos.h (arm_mve_immediate_check):
7685 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
7686 mode and interger value.
7687 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
7688 (vmlaldavaq_p_s16): Likewise.
7689 (vmlaldavaq_p_u32): Likewise.
7690 (vmlaldavaq_p_u16): Likewise.
7691 (vmlaldavaxq_p_s32): Likewise.
7692 (vmlaldavaxq_p_s16): Likewise.
7693 (vmlaldavaxq_p_u32): Likewise.
7694 (vmlaldavaxq_p_u16): Likewise.
7695 (vmlsldavaq_p_s32): Likewise.
7696 (vmlsldavaq_p_s16): Likewise.
7697 (vmlsldavaxq_p_s32): Likewise.
7698 (vmlsldavaxq_p_s16): Likewise.
7699 (vmullbq_poly_m_p8): Likewise.
7700 (vmullbq_poly_m_p16): Likewise.
7701 (vmulltq_poly_m_p8): Likewise.
7702 (vmulltq_poly_m_p16): Likewise.
7703 (vqdmullbq_m_n_s32): Likewise.
7704 (vqdmullbq_m_n_s16): Likewise.
7705 (vqdmullbq_m_s32): Likewise.
7706 (vqdmullbq_m_s16): Likewise.
7707 (vqdmulltq_m_n_s32): Likewise.
7708 (vqdmulltq_m_n_s16): Likewise.
7709 (vqdmulltq_m_s32): Likewise.
7710 (vqdmulltq_m_s16): Likewise.
7711 (vqrshrnbq_m_n_s32): Likewise.
7712 (vqrshrnbq_m_n_s16): Likewise.
7713 (vqrshrnbq_m_n_u32): Likewise.
7714 (vqrshrnbq_m_n_u16): Likewise.
7715 (vqrshrntq_m_n_s32): Likewise.
7716 (vqrshrntq_m_n_s16): Likewise.
7717 (vqrshrntq_m_n_u32): Likewise.
7718 (vqrshrntq_m_n_u16): Likewise.
7719 (vqrshrunbq_m_n_s32): Likewise.
7720 (vqrshrunbq_m_n_s16): Likewise.
7721 (vqrshruntq_m_n_s32): Likewise.
7722 (vqrshruntq_m_n_s16): Likewise.
7723 (vqshrnbq_m_n_s32): Likewise.
7724 (vqshrnbq_m_n_s16): Likewise.
7725 (vqshrnbq_m_n_u32): Likewise.
7726 (vqshrnbq_m_n_u16): Likewise.
7727 (vqshrntq_m_n_s32): Likewise.
7728 (vqshrntq_m_n_s16): Likewise.
7729 (vqshrntq_m_n_u32): Likewise.
7730 (vqshrntq_m_n_u16): Likewise.
7731 (vqshrunbq_m_n_s32): Likewise.
7732 (vqshrunbq_m_n_s16): Likewise.
7733 (vqshruntq_m_n_s32): Likewise.
7734 (vqshruntq_m_n_s16): Likewise.
7735 (vrmlaldavhaq_p_s32): Likewise.
7736 (vrmlaldavhaq_p_u32): Likewise.
7737 (vrmlaldavhaxq_p_s32): Likewise.
7738 (vrmlsldavhaq_p_s32): Likewise.
7739 (vrmlsldavhaxq_p_s32): Likewise.
7740 (vrshrnbq_m_n_s32): Likewise.
7741 (vrshrnbq_m_n_s16): Likewise.
7742 (vrshrnbq_m_n_u32): Likewise.
7743 (vrshrnbq_m_n_u16): Likewise.
7744 (vrshrntq_m_n_s32): Likewise.
7745 (vrshrntq_m_n_s16): Likewise.
7746 (vrshrntq_m_n_u32): Likewise.
7747 (vrshrntq_m_n_u16): Likewise.
7748 (vshllbq_m_n_s8): Likewise.
7749 (vshllbq_m_n_s16): Likewise.
7750 (vshllbq_m_n_u8): Likewise.
7751 (vshllbq_m_n_u16): Likewise.
7752 (vshlltq_m_n_s8): Likewise.
7753 (vshlltq_m_n_s16): Likewise.
7754 (vshlltq_m_n_u8): Likewise.
7755 (vshlltq_m_n_u16): Likewise.
7756 (vshrnbq_m_n_s32): Likewise.
7757 (vshrnbq_m_n_s16): Likewise.
7758 (vshrnbq_m_n_u32): Likewise.
7759 (vshrnbq_m_n_u16): Likewise.
7760 (vshrntq_m_n_s32): Likewise.
7761 (vshrntq_m_n_s16): Likewise.
7762 (vshrntq_m_n_u32): Likewise.
7763 (vshrntq_m_n_u16): Likewise.
7764 (__arm_vmlaldavaq_p_s32): Define intrinsic.
7765 (__arm_vmlaldavaq_p_s16): Likewise.
7766 (__arm_vmlaldavaq_p_u32): Likewise.
7767 (__arm_vmlaldavaq_p_u16): Likewise.
7768 (__arm_vmlaldavaxq_p_s32): Likewise.
7769 (__arm_vmlaldavaxq_p_s16): Likewise.
7770 (__arm_vmlaldavaxq_p_u32): Likewise.
7771 (__arm_vmlaldavaxq_p_u16): Likewise.
7772 (__arm_vmlsldavaq_p_s32): Likewise.
7773 (__arm_vmlsldavaq_p_s16): Likewise.
7774 (__arm_vmlsldavaxq_p_s32): Likewise.
7775 (__arm_vmlsldavaxq_p_s16): Likewise.
7776 (__arm_vmullbq_poly_m_p8): Likewise.
7777 (__arm_vmullbq_poly_m_p16): Likewise.
7778 (__arm_vmulltq_poly_m_p8): Likewise.
7779 (__arm_vmulltq_poly_m_p16): Likewise.
7780 (__arm_vqdmullbq_m_n_s32): Likewise.
7781 (__arm_vqdmullbq_m_n_s16): Likewise.
7782 (__arm_vqdmullbq_m_s32): Likewise.
7783 (__arm_vqdmullbq_m_s16): Likewise.
7784 (__arm_vqdmulltq_m_n_s32): Likewise.
7785 (__arm_vqdmulltq_m_n_s16): Likewise.
7786 (__arm_vqdmulltq_m_s32): Likewise.
7787 (__arm_vqdmulltq_m_s16): Likewise.
7788 (__arm_vqrshrnbq_m_n_s32): Likewise.
7789 (__arm_vqrshrnbq_m_n_s16): Likewise.
7790 (__arm_vqrshrnbq_m_n_u32): Likewise.
7791 (__arm_vqrshrnbq_m_n_u16): Likewise.
7792 (__arm_vqrshrntq_m_n_s32): Likewise.
7793 (__arm_vqrshrntq_m_n_s16): Likewise.
7794 (__arm_vqrshrntq_m_n_u32): Likewise.
7795 (__arm_vqrshrntq_m_n_u16): Likewise.
7796 (__arm_vqrshrunbq_m_n_s32): Likewise.
7797 (__arm_vqrshrunbq_m_n_s16): Likewise.
7798 (__arm_vqrshruntq_m_n_s32): Likewise.
7799 (__arm_vqrshruntq_m_n_s16): Likewise.
7800 (__arm_vqshrnbq_m_n_s32): Likewise.
7801 (__arm_vqshrnbq_m_n_s16): Likewise.
7802 (__arm_vqshrnbq_m_n_u32): Likewise.
7803 (__arm_vqshrnbq_m_n_u16): Likewise.
7804 (__arm_vqshrntq_m_n_s32): Likewise.
7805 (__arm_vqshrntq_m_n_s16): Likewise.
7806 (__arm_vqshrntq_m_n_u32): Likewise.
7807 (__arm_vqshrntq_m_n_u16): Likewise.
7808 (__arm_vqshrunbq_m_n_s32): Likewise.
7809 (__arm_vqshrunbq_m_n_s16): Likewise.
7810 (__arm_vqshruntq_m_n_s32): Likewise.
7811 (__arm_vqshruntq_m_n_s16): Likewise.
7812 (__arm_vrmlaldavhaq_p_s32): Likewise.
7813 (__arm_vrmlaldavhaq_p_u32): Likewise.
7814 (__arm_vrmlaldavhaxq_p_s32): Likewise.
7815 (__arm_vrmlsldavhaq_p_s32): Likewise.
7816 (__arm_vrmlsldavhaxq_p_s32): Likewise.
7817 (__arm_vrshrnbq_m_n_s32): Likewise.
7818 (__arm_vrshrnbq_m_n_s16): Likewise.
7819 (__arm_vrshrnbq_m_n_u32): Likewise.
7820 (__arm_vrshrnbq_m_n_u16): Likewise.
7821 (__arm_vrshrntq_m_n_s32): Likewise.
7822 (__arm_vrshrntq_m_n_s16): Likewise.
7823 (__arm_vrshrntq_m_n_u32): Likewise.
7824 (__arm_vrshrntq_m_n_u16): Likewise.
7825 (__arm_vshllbq_m_n_s8): Likewise.
7826 (__arm_vshllbq_m_n_s16): Likewise.
7827 (__arm_vshllbq_m_n_u8): Likewise.
7828 (__arm_vshllbq_m_n_u16): Likewise.
7829 (__arm_vshlltq_m_n_s8): Likewise.
7830 (__arm_vshlltq_m_n_s16): Likewise.
7831 (__arm_vshlltq_m_n_u8): Likewise.
7832 (__arm_vshlltq_m_n_u16): Likewise.
7833 (__arm_vshrnbq_m_n_s32): Likewise.
7834 (__arm_vshrnbq_m_n_s16): Likewise.
7835 (__arm_vshrnbq_m_n_u32): Likewise.
7836 (__arm_vshrnbq_m_n_u16): Likewise.
7837 (__arm_vshrntq_m_n_s32): Likewise.
7838 (__arm_vshrntq_m_n_s16): Likewise.
7839 (__arm_vshrntq_m_n_u32): Likewise.
7840 (__arm_vshrntq_m_n_u16): Likewise.
7841 (vmullbq_poly_m): Define polymorphic variant.
7842 (vmulltq_poly_m): Likewise.
7843 (vshllbq_m): Likewise.
7844 (vshrntq_m_n): Likewise.
7845 (vshrnbq_m_n): Likewise.
7846 (vshlltq_m_n): Likewise.
7847 (vshllbq_m_n): Likewise.
7848 (vrshrntq_m_n): Likewise.
7849 (vrshrnbq_m_n): Likewise.
7850 (vqshruntq_m_n): Likewise.
7851 (vqshrunbq_m_n): Likewise.
7852 (vqdmullbq_m_n): Likewise.
7853 (vqdmullbq_m): Likewise.
7854 (vqdmulltq_m_n): Likewise.
7855 (vqdmulltq_m): Likewise.
7856 (vqrshrnbq_m_n): Likewise.
7857 (vqrshrntq_m_n): Likewise.
7858 (vqrshrunbq_m_n): Likewise.
7859 (vqrshruntq_m_n): Likewise.
7860 (vqshrnbq_m_n): Likewise.
7861 (vqshrntq_m_n): Likewise.
7862 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
7864 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7865 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
7866 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
7867 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7868 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
7869 (VMLALDAVAXQ_P): Likewise.
7870 (VQRSHRNBQ_M_N): Likewise.
7871 (VQRSHRNTQ_M_N): Likewise.
7872 (VQSHRNBQ_M_N): Likewise.
7873 (VQSHRNTQ_M_N): Likewise.
7874 (VRSHRNBQ_M_N): Likewise.
7875 (VRSHRNTQ_M_N): Likewise.
7876 (VSHLLBQ_M_N): Likewise.
7877 (VSHLLTQ_M_N): Likewise.
7878 (VSHRNBQ_M_N): Likewise.
7879 (VSHRNTQ_M_N): Likewise.
7880 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
7881 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
7882 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
7883 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
7884 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
7885 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
7886 (mve_vrmlaldavhaq_p_sv4si): Likewise.
7887 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
7888 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
7889 (mve_vshllbq_m_n_<supf><mode>): Likewise.
7890 (mve_vshlltq_m_n_<supf><mode>): Likewise.
7891 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
7892 (mve_vshrntq_m_n_<supf><mode>): Likewise.
7893 (mve_vmlsldavaq_p_s<mode>): Likewise.
7894 (mve_vmlsldavaxq_p_s<mode>): Likewise.
7895 (mve_vmullbq_poly_m_p<mode>): Likewise.
7896 (mve_vmulltq_poly_m_p<mode>): Likewise.
7897 (mve_vqdmullbq_m_n_s<mode>): Likewise.
7898 (mve_vqdmullbq_m_s<mode>): Likewise.
7899 (mve_vqdmulltq_m_n_s<mode>): Likewise.
7900 (mve_vqdmulltq_m_s<mode>): Likewise.
7901 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
7902 (mve_vqrshruntq_m_n_s<mode>): Likewise.
7903 (mve_vqshrunbq_m_n_s<mode>): Likewise.
7904 (mve_vqshruntq_m_n_s<mode>): Likewise.
7905 (mve_vrmlaldavhaq_p_uv4si): Likewise.
7906 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
7907 (mve_vrmlsldavhaq_p_sv4si): Likewise.
7908 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
7910 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
7911 Mihail Ionescu <mihail.ionescu@arm.com>
7912 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7914 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
7915 (vabdq_m_s32): Likewise.
7916 (vabdq_m_s16): Likewise.
7917 (vabdq_m_u8): Likewise.
7918 (vabdq_m_u32): Likewise.
7919 (vabdq_m_u16): Likewise.
7920 (vaddq_m_n_s8): Likewise.
7921 (vaddq_m_n_s32): Likewise.
7922 (vaddq_m_n_s16): Likewise.
7923 (vaddq_m_n_u8): Likewise.
7924 (vaddq_m_n_u32): Likewise.
7925 (vaddq_m_n_u16): Likewise.
7926 (vaddq_m_s8): Likewise.
7927 (vaddq_m_s32): Likewise.
7928 (vaddq_m_s16): Likewise.
7929 (vaddq_m_u8): Likewise.
7930 (vaddq_m_u32): Likewise.
7931 (vaddq_m_u16): Likewise.
7932 (vandq_m_s8): Likewise.
7933 (vandq_m_s32): Likewise.
7934 (vandq_m_s16): Likewise.
7935 (vandq_m_u8): Likewise.
7936 (vandq_m_u32): Likewise.
7937 (vandq_m_u16): Likewise.
7938 (vbicq_m_s8): Likewise.
7939 (vbicq_m_s32): Likewise.
7940 (vbicq_m_s16): Likewise.
7941 (vbicq_m_u8): Likewise.
7942 (vbicq_m_u32): Likewise.
7943 (vbicq_m_u16): Likewise.
7944 (vbrsrq_m_n_s8): Likewise.
7945 (vbrsrq_m_n_s32): Likewise.
7946 (vbrsrq_m_n_s16): Likewise.
7947 (vbrsrq_m_n_u8): Likewise.
7948 (vbrsrq_m_n_u32): Likewise.
7949 (vbrsrq_m_n_u16): Likewise.
7950 (vcaddq_rot270_m_s8): Likewise.
7951 (vcaddq_rot270_m_s32): Likewise.
7952 (vcaddq_rot270_m_s16): Likewise.
7953 (vcaddq_rot270_m_u8): Likewise.
7954 (vcaddq_rot270_m_u32): Likewise.
7955 (vcaddq_rot270_m_u16): Likewise.
7956 (vcaddq_rot90_m_s8): Likewise.
7957 (vcaddq_rot90_m_s32): Likewise.
7958 (vcaddq_rot90_m_s16): Likewise.
7959 (vcaddq_rot90_m_u8): Likewise.
7960 (vcaddq_rot90_m_u32): Likewise.
7961 (vcaddq_rot90_m_u16): Likewise.
7962 (veorq_m_s8): Likewise.
7963 (veorq_m_s32): Likewise.
7964 (veorq_m_s16): Likewise.
7965 (veorq_m_u8): Likewise.
7966 (veorq_m_u32): Likewise.
7967 (veorq_m_u16): Likewise.
7968 (vhaddq_m_n_s8): Likewise.
7969 (vhaddq_m_n_s32): Likewise.
7970 (vhaddq_m_n_s16): Likewise.
7971 (vhaddq_m_n_u8): Likewise.
7972 (vhaddq_m_n_u32): Likewise.
7973 (vhaddq_m_n_u16): Likewise.
7974 (vhaddq_m_s8): Likewise.
7975 (vhaddq_m_s32): Likewise.
7976 (vhaddq_m_s16): Likewise.
7977 (vhaddq_m_u8): Likewise.
7978 (vhaddq_m_u32): Likewise.
7979 (vhaddq_m_u16): Likewise.
7980 (vhcaddq_rot270_m_s8): Likewise.
7981 (vhcaddq_rot270_m_s32): Likewise.
7982 (vhcaddq_rot270_m_s16): Likewise.
7983 (vhcaddq_rot90_m_s8): Likewise.
7984 (vhcaddq_rot90_m_s32): Likewise.
7985 (vhcaddq_rot90_m_s16): Likewise.
7986 (vhsubq_m_n_s8): Likewise.
7987 (vhsubq_m_n_s32): Likewise.
7988 (vhsubq_m_n_s16): Likewise.
7989 (vhsubq_m_n_u8): Likewise.
7990 (vhsubq_m_n_u32): Likewise.
7991 (vhsubq_m_n_u16): Likewise.
7992 (vhsubq_m_s8): Likewise.
7993 (vhsubq_m_s32): Likewise.
7994 (vhsubq_m_s16): Likewise.
7995 (vhsubq_m_u8): Likewise.
7996 (vhsubq_m_u32): Likewise.
7997 (vhsubq_m_u16): Likewise.
7998 (vmaxq_m_s8): Likewise.
7999 (vmaxq_m_s32): Likewise.
8000 (vmaxq_m_s16): Likewise.
8001 (vmaxq_m_u8): Likewise.
8002 (vmaxq_m_u32): Likewise.
8003 (vmaxq_m_u16): Likewise.
8004 (vminq_m_s8): Likewise.
8005 (vminq_m_s32): Likewise.
8006 (vminq_m_s16): Likewise.
8007 (vminq_m_u8): Likewise.
8008 (vminq_m_u32): Likewise.
8009 (vminq_m_u16): Likewise.
8010 (vmladavaq_p_s8): Likewise.
8011 (vmladavaq_p_s32): Likewise.
8012 (vmladavaq_p_s16): Likewise.
8013 (vmladavaq_p_u8): Likewise.
8014 (vmladavaq_p_u32): Likewise.
8015 (vmladavaq_p_u16): Likewise.
8016 (vmladavaxq_p_s8): Likewise.
8017 (vmladavaxq_p_s32): Likewise.
8018 (vmladavaxq_p_s16): Likewise.
8019 (vmlaq_m_n_s8): Likewise.
8020 (vmlaq_m_n_s32): Likewise.
8021 (vmlaq_m_n_s16): Likewise.
8022 (vmlaq_m_n_u8): Likewise.
8023 (vmlaq_m_n_u32): Likewise.
8024 (vmlaq_m_n_u16): Likewise.
8025 (vmlasq_m_n_s8): Likewise.
8026 (vmlasq_m_n_s32): Likewise.
8027 (vmlasq_m_n_s16): Likewise.
8028 (vmlasq_m_n_u8): Likewise.
8029 (vmlasq_m_n_u32): Likewise.
8030 (vmlasq_m_n_u16): Likewise.
8031 (vmlsdavaq_p_s8): Likewise.
8032 (vmlsdavaq_p_s32): Likewise.
8033 (vmlsdavaq_p_s16): Likewise.
8034 (vmlsdavaxq_p_s8): Likewise.
8035 (vmlsdavaxq_p_s32): Likewise.
8036 (vmlsdavaxq_p_s16): Likewise.
8037 (vmulhq_m_s8): Likewise.
8038 (vmulhq_m_s32): Likewise.
8039 (vmulhq_m_s16): Likewise.
8040 (vmulhq_m_u8): Likewise.
8041 (vmulhq_m_u32): Likewise.
8042 (vmulhq_m_u16): Likewise.
8043 (vmullbq_int_m_s8): Likewise.
8044 (vmullbq_int_m_s32): Likewise.
8045 (vmullbq_int_m_s16): Likewise.
8046 (vmullbq_int_m_u8): Likewise.
8047 (vmullbq_int_m_u32): Likewise.
8048 (vmullbq_int_m_u16): Likewise.
8049 (vmulltq_int_m_s8): Likewise.
8050 (vmulltq_int_m_s32): Likewise.
8051 (vmulltq_int_m_s16): Likewise.
8052 (vmulltq_int_m_u8): Likewise.
8053 (vmulltq_int_m_u32): Likewise.
8054 (vmulltq_int_m_u16): Likewise.
8055 (vmulq_m_n_s8): Likewise.
8056 (vmulq_m_n_s32): Likewise.
8057 (vmulq_m_n_s16): Likewise.
8058 (vmulq_m_n_u8): Likewise.
8059 (vmulq_m_n_u32): Likewise.
8060 (vmulq_m_n_u16): Likewise.
8061 (vmulq_m_s8): Likewise.
8062 (vmulq_m_s32): Likewise.
8063 (vmulq_m_s16): Likewise.
8064 (vmulq_m_u8): Likewise.
8065 (vmulq_m_u32): Likewise.
8066 (vmulq_m_u16): Likewise.
8067 (vornq_m_s8): Likewise.
8068 (vornq_m_s32): Likewise.
8069 (vornq_m_s16): Likewise.
8070 (vornq_m_u8): Likewise.
8071 (vornq_m_u32): Likewise.
8072 (vornq_m_u16): Likewise.
8073 (vorrq_m_s8): Likewise.
8074 (vorrq_m_s32): Likewise.
8075 (vorrq_m_s16): Likewise.
8076 (vorrq_m_u8): Likewise.
8077 (vorrq_m_u32): Likewise.
8078 (vorrq_m_u16): Likewise.
8079 (vqaddq_m_n_s8): Likewise.
8080 (vqaddq_m_n_s32): Likewise.
8081 (vqaddq_m_n_s16): Likewise.
8082 (vqaddq_m_n_u8): Likewise.
8083 (vqaddq_m_n_u32): Likewise.
8084 (vqaddq_m_n_u16): Likewise.
8085 (vqaddq_m_s8): Likewise.
8086 (vqaddq_m_s32): Likewise.
8087 (vqaddq_m_s16): Likewise.
8088 (vqaddq_m_u8): Likewise.
8089 (vqaddq_m_u32): Likewise.
8090 (vqaddq_m_u16): Likewise.
8091 (vqdmladhq_m_s8): Likewise.
8092 (vqdmladhq_m_s32): Likewise.
8093 (vqdmladhq_m_s16): Likewise.
8094 (vqdmladhxq_m_s8): Likewise.
8095 (vqdmladhxq_m_s32): Likewise.
8096 (vqdmladhxq_m_s16): Likewise.
8097 (vqdmlahq_m_n_s8): Likewise.
8098 (vqdmlahq_m_n_s32): Likewise.
8099 (vqdmlahq_m_n_s16): Likewise.
8100 (vqdmlahq_m_n_u8): Likewise.
8101 (vqdmlahq_m_n_u32): Likewise.
8102 (vqdmlahq_m_n_u16): Likewise.
8103 (vqdmlsdhq_m_s8): Likewise.
8104 (vqdmlsdhq_m_s32): Likewise.
8105 (vqdmlsdhq_m_s16): Likewise.
8106 (vqdmlsdhxq_m_s8): Likewise.
8107 (vqdmlsdhxq_m_s32): Likewise.
8108 (vqdmlsdhxq_m_s16): Likewise.
8109 (vqdmulhq_m_n_s8): Likewise.
8110 (vqdmulhq_m_n_s32): Likewise.
8111 (vqdmulhq_m_n_s16): Likewise.
8112 (vqdmulhq_m_s8): Likewise.
8113 (vqdmulhq_m_s32): Likewise.
8114 (vqdmulhq_m_s16): Likewise.
8115 (vqrdmladhq_m_s8): Likewise.
8116 (vqrdmladhq_m_s32): Likewise.
8117 (vqrdmladhq_m_s16): Likewise.
8118 (vqrdmladhxq_m_s8): Likewise.
8119 (vqrdmladhxq_m_s32): Likewise.
8120 (vqrdmladhxq_m_s16): Likewise.
8121 (vqrdmlahq_m_n_s8): Likewise.
8122 (vqrdmlahq_m_n_s32): Likewise.
8123 (vqrdmlahq_m_n_s16): Likewise.
8124 (vqrdmlahq_m_n_u8): Likewise.
8125 (vqrdmlahq_m_n_u32): Likewise.
8126 (vqrdmlahq_m_n_u16): Likewise.
8127 (vqrdmlashq_m_n_s8): Likewise.
8128 (vqrdmlashq_m_n_s32): Likewise.
8129 (vqrdmlashq_m_n_s16): Likewise.
8130 (vqrdmlashq_m_n_u8): Likewise.
8131 (vqrdmlashq_m_n_u32): Likewise.
8132 (vqrdmlashq_m_n_u16): Likewise.
8133 (vqrdmlsdhq_m_s8): Likewise.
8134 (vqrdmlsdhq_m_s32): Likewise.
8135 (vqrdmlsdhq_m_s16): Likewise.
8136 (vqrdmlsdhxq_m_s8): Likewise.
8137 (vqrdmlsdhxq_m_s32): Likewise.
8138 (vqrdmlsdhxq_m_s16): Likewise.
8139 (vqrdmulhq_m_n_s8): Likewise.
8140 (vqrdmulhq_m_n_s32): Likewise.
8141 (vqrdmulhq_m_n_s16): Likewise.
8142 (vqrdmulhq_m_s8): Likewise.
8143 (vqrdmulhq_m_s32): Likewise.
8144 (vqrdmulhq_m_s16): Likewise.
8145 (vqrshlq_m_s8): Likewise.
8146 (vqrshlq_m_s32): Likewise.
8147 (vqrshlq_m_s16): Likewise.
8148 (vqrshlq_m_u8): Likewise.
8149 (vqrshlq_m_u32): Likewise.
8150 (vqrshlq_m_u16): Likewise.
8151 (vqshlq_m_n_s8): Likewise.
8152 (vqshlq_m_n_s32): Likewise.
8153 (vqshlq_m_n_s16): Likewise.
8154 (vqshlq_m_n_u8): Likewise.
8155 (vqshlq_m_n_u32): Likewise.
8156 (vqshlq_m_n_u16): Likewise.
8157 (vqshlq_m_s8): Likewise.
8158 (vqshlq_m_s32): Likewise.
8159 (vqshlq_m_s16): Likewise.
8160 (vqshlq_m_u8): Likewise.
8161 (vqshlq_m_u32): Likewise.
8162 (vqshlq_m_u16): Likewise.
8163 (vqsubq_m_n_s8): Likewise.
8164 (vqsubq_m_n_s32): Likewise.
8165 (vqsubq_m_n_s16): Likewise.
8166 (vqsubq_m_n_u8): Likewise.
8167 (vqsubq_m_n_u32): Likewise.
8168 (vqsubq_m_n_u16): Likewise.
8169 (vqsubq_m_s8): Likewise.
8170 (vqsubq_m_s32): Likewise.
8171 (vqsubq_m_s16): Likewise.
8172 (vqsubq_m_u8): Likewise.
8173 (vqsubq_m_u32): Likewise.
8174 (vqsubq_m_u16): Likewise.
8175 (vrhaddq_m_s8): Likewise.
8176 (vrhaddq_m_s32): Likewise.
8177 (vrhaddq_m_s16): Likewise.
8178 (vrhaddq_m_u8): Likewise.
8179 (vrhaddq_m_u32): Likewise.
8180 (vrhaddq_m_u16): Likewise.
8181 (vrmulhq_m_s8): Likewise.
8182 (vrmulhq_m_s32): Likewise.
8183 (vrmulhq_m_s16): Likewise.
8184 (vrmulhq_m_u8): Likewise.
8185 (vrmulhq_m_u32): Likewise.
8186 (vrmulhq_m_u16): Likewise.
8187 (vrshlq_m_s8): Likewise.
8188 (vrshlq_m_s32): Likewise.
8189 (vrshlq_m_s16): Likewise.
8190 (vrshlq_m_u8): Likewise.
8191 (vrshlq_m_u32): Likewise.
8192 (vrshlq_m_u16): Likewise.
8193 (vrshrq_m_n_s8): Likewise.
8194 (vrshrq_m_n_s32): Likewise.
8195 (vrshrq_m_n_s16): Likewise.
8196 (vrshrq_m_n_u8): Likewise.
8197 (vrshrq_m_n_u32): Likewise.
8198 (vrshrq_m_n_u16): Likewise.
8199 (vshlq_m_n_s8): Likewise.
8200 (vshlq_m_n_s32): Likewise.
8201 (vshlq_m_n_s16): Likewise.
8202 (vshlq_m_n_u8): Likewise.
8203 (vshlq_m_n_u32): Likewise.
8204 (vshlq_m_n_u16): Likewise.
8205 (vshrq_m_n_s8): Likewise.
8206 (vshrq_m_n_s32): Likewise.
8207 (vshrq_m_n_s16): Likewise.
8208 (vshrq_m_n_u8): Likewise.
8209 (vshrq_m_n_u32): Likewise.
8210 (vshrq_m_n_u16): Likewise.
8211 (vsliq_m_n_s8): Likewise.
8212 (vsliq_m_n_s32): Likewise.
8213 (vsliq_m_n_s16): Likewise.
8214 (vsliq_m_n_u8): Likewise.
8215 (vsliq_m_n_u32): Likewise.
8216 (vsliq_m_n_u16): Likewise.
8217 (vsubq_m_n_s8): Likewise.
8218 (vsubq_m_n_s32): Likewise.
8219 (vsubq_m_n_s16): Likewise.
8220 (vsubq_m_n_u8): Likewise.
8221 (vsubq_m_n_u32): Likewise.
8222 (vsubq_m_n_u16): Likewise.
8223 (__arm_vabdq_m_s8): Define intrinsic.
8224 (__arm_vabdq_m_s32): Likewise.
8225 (__arm_vabdq_m_s16): Likewise.
8226 (__arm_vabdq_m_u8): Likewise.
8227 (__arm_vabdq_m_u32): Likewise.
8228 (__arm_vabdq_m_u16): Likewise.
8229 (__arm_vaddq_m_n_s8): Likewise.
8230 (__arm_vaddq_m_n_s32): Likewise.
8231 (__arm_vaddq_m_n_s16): Likewise.
8232 (__arm_vaddq_m_n_u8): Likewise.
8233 (__arm_vaddq_m_n_u32): Likewise.
8234 (__arm_vaddq_m_n_u16): Likewise.
8235 (__arm_vaddq_m_s8): Likewise.
8236 (__arm_vaddq_m_s32): Likewise.
8237 (__arm_vaddq_m_s16): Likewise.
8238 (__arm_vaddq_m_u8): Likewise.
8239 (__arm_vaddq_m_u32): Likewise.
8240 (__arm_vaddq_m_u16): Likewise.
8241 (__arm_vandq_m_s8): Likewise.
8242 (__arm_vandq_m_s32): Likewise.
8243 (__arm_vandq_m_s16): Likewise.
8244 (__arm_vandq_m_u8): Likewise.
8245 (__arm_vandq_m_u32): Likewise.
8246 (__arm_vandq_m_u16): Likewise.
8247 (__arm_vbicq_m_s8): Likewise.
8248 (__arm_vbicq_m_s32): Likewise.
8249 (__arm_vbicq_m_s16): Likewise.
8250 (__arm_vbicq_m_u8): Likewise.
8251 (__arm_vbicq_m_u32): Likewise.
8252 (__arm_vbicq_m_u16): Likewise.
8253 (__arm_vbrsrq_m_n_s8): Likewise.
8254 (__arm_vbrsrq_m_n_s32): Likewise.
8255 (__arm_vbrsrq_m_n_s16): Likewise.
8256 (__arm_vbrsrq_m_n_u8): Likewise.
8257 (__arm_vbrsrq_m_n_u32): Likewise.
8258 (__arm_vbrsrq_m_n_u16): Likewise.
8259 (__arm_vcaddq_rot270_m_s8): Likewise.
8260 (__arm_vcaddq_rot270_m_s32): Likewise.
8261 (__arm_vcaddq_rot270_m_s16): Likewise.
8262 (__arm_vcaddq_rot270_m_u8): Likewise.
8263 (__arm_vcaddq_rot270_m_u32): Likewise.
8264 (__arm_vcaddq_rot270_m_u16): Likewise.
8265 (__arm_vcaddq_rot90_m_s8): Likewise.
8266 (__arm_vcaddq_rot90_m_s32): Likewise.
8267 (__arm_vcaddq_rot90_m_s16): Likewise.
8268 (__arm_vcaddq_rot90_m_u8): Likewise.
8269 (__arm_vcaddq_rot90_m_u32): Likewise.
8270 (__arm_vcaddq_rot90_m_u16): Likewise.
8271 (__arm_veorq_m_s8): Likewise.
8272 (__arm_veorq_m_s32): Likewise.
8273 (__arm_veorq_m_s16): Likewise.
8274 (__arm_veorq_m_u8): Likewise.
8275 (__arm_veorq_m_u32): Likewise.
8276 (__arm_veorq_m_u16): Likewise.
8277 (__arm_vhaddq_m_n_s8): Likewise.
8278 (__arm_vhaddq_m_n_s32): Likewise.
8279 (__arm_vhaddq_m_n_s16): Likewise.
8280 (__arm_vhaddq_m_n_u8): Likewise.
8281 (__arm_vhaddq_m_n_u32): Likewise.
8282 (__arm_vhaddq_m_n_u16): Likewise.
8283 (__arm_vhaddq_m_s8): Likewise.
8284 (__arm_vhaddq_m_s32): Likewise.
8285 (__arm_vhaddq_m_s16): Likewise.
8286 (__arm_vhaddq_m_u8): Likewise.
8287 (__arm_vhaddq_m_u32): Likewise.
8288 (__arm_vhaddq_m_u16): Likewise.
8289 (__arm_vhcaddq_rot270_m_s8): Likewise.
8290 (__arm_vhcaddq_rot270_m_s32): Likewise.
8291 (__arm_vhcaddq_rot270_m_s16): Likewise.
8292 (__arm_vhcaddq_rot90_m_s8): Likewise.
8293 (__arm_vhcaddq_rot90_m_s32): Likewise.
8294 (__arm_vhcaddq_rot90_m_s16): Likewise.
8295 (__arm_vhsubq_m_n_s8): Likewise.
8296 (__arm_vhsubq_m_n_s32): Likewise.
8297 (__arm_vhsubq_m_n_s16): Likewise.
8298 (__arm_vhsubq_m_n_u8): Likewise.
8299 (__arm_vhsubq_m_n_u32): Likewise.
8300 (__arm_vhsubq_m_n_u16): Likewise.
8301 (__arm_vhsubq_m_s8): Likewise.
8302 (__arm_vhsubq_m_s32): Likewise.
8303 (__arm_vhsubq_m_s16): Likewise.
8304 (__arm_vhsubq_m_u8): Likewise.
8305 (__arm_vhsubq_m_u32): Likewise.
8306 (__arm_vhsubq_m_u16): Likewise.
8307 (__arm_vmaxq_m_s8): Likewise.
8308 (__arm_vmaxq_m_s32): Likewise.
8309 (__arm_vmaxq_m_s16): Likewise.
8310 (__arm_vmaxq_m_u8): Likewise.
8311 (__arm_vmaxq_m_u32): Likewise.
8312 (__arm_vmaxq_m_u16): Likewise.
8313 (__arm_vminq_m_s8): Likewise.
8314 (__arm_vminq_m_s32): Likewise.
8315 (__arm_vminq_m_s16): Likewise.
8316 (__arm_vminq_m_u8): Likewise.
8317 (__arm_vminq_m_u32): Likewise.
8318 (__arm_vminq_m_u16): Likewise.
8319 (__arm_vmladavaq_p_s8): Likewise.
8320 (__arm_vmladavaq_p_s32): Likewise.
8321 (__arm_vmladavaq_p_s16): Likewise.
8322 (__arm_vmladavaq_p_u8): Likewise.
8323 (__arm_vmladavaq_p_u32): Likewise.
8324 (__arm_vmladavaq_p_u16): Likewise.
8325 (__arm_vmladavaxq_p_s8): Likewise.
8326 (__arm_vmladavaxq_p_s32): Likewise.
8327 (__arm_vmladavaxq_p_s16): Likewise.
8328 (__arm_vmlaq_m_n_s8): Likewise.
8329 (__arm_vmlaq_m_n_s32): Likewise.
8330 (__arm_vmlaq_m_n_s16): Likewise.
8331 (__arm_vmlaq_m_n_u8): Likewise.
8332 (__arm_vmlaq_m_n_u32): Likewise.
8333 (__arm_vmlaq_m_n_u16): Likewise.
8334 (__arm_vmlasq_m_n_s8): Likewise.
8335 (__arm_vmlasq_m_n_s32): Likewise.
8336 (__arm_vmlasq_m_n_s16): Likewise.
8337 (__arm_vmlasq_m_n_u8): Likewise.
8338 (__arm_vmlasq_m_n_u32): Likewise.
8339 (__arm_vmlasq_m_n_u16): Likewise.
8340 (__arm_vmlsdavaq_p_s8): Likewise.
8341 (__arm_vmlsdavaq_p_s32): Likewise.
8342 (__arm_vmlsdavaq_p_s16): Likewise.
8343 (__arm_vmlsdavaxq_p_s8): Likewise.
8344 (__arm_vmlsdavaxq_p_s32): Likewise.
8345 (__arm_vmlsdavaxq_p_s16): Likewise.
8346 (__arm_vmulhq_m_s8): Likewise.
8347 (__arm_vmulhq_m_s32): Likewise.
8348 (__arm_vmulhq_m_s16): Likewise.
8349 (__arm_vmulhq_m_u8): Likewise.
8350 (__arm_vmulhq_m_u32): Likewise.
8351 (__arm_vmulhq_m_u16): Likewise.
8352 (__arm_vmullbq_int_m_s8): Likewise.
8353 (__arm_vmullbq_int_m_s32): Likewise.
8354 (__arm_vmullbq_int_m_s16): Likewise.
8355 (__arm_vmullbq_int_m_u8): Likewise.
8356 (__arm_vmullbq_int_m_u32): Likewise.
8357 (__arm_vmullbq_int_m_u16): Likewise.
8358 (__arm_vmulltq_int_m_s8): Likewise.
8359 (__arm_vmulltq_int_m_s32): Likewise.
8360 (__arm_vmulltq_int_m_s16): Likewise.
8361 (__arm_vmulltq_int_m_u8): Likewise.
8362 (__arm_vmulltq_int_m_u32): Likewise.
8363 (__arm_vmulltq_int_m_u16): Likewise.
8364 (__arm_vmulq_m_n_s8): Likewise.
8365 (__arm_vmulq_m_n_s32): Likewise.
8366 (__arm_vmulq_m_n_s16): Likewise.
8367 (__arm_vmulq_m_n_u8): Likewise.
8368 (__arm_vmulq_m_n_u32): Likewise.
8369 (__arm_vmulq_m_n_u16): Likewise.
8370 (__arm_vmulq_m_s8): Likewise.
8371 (__arm_vmulq_m_s32): Likewise.
8372 (__arm_vmulq_m_s16): Likewise.
8373 (__arm_vmulq_m_u8): Likewise.
8374 (__arm_vmulq_m_u32): Likewise.
8375 (__arm_vmulq_m_u16): Likewise.
8376 (__arm_vornq_m_s8): Likewise.
8377 (__arm_vornq_m_s32): Likewise.
8378 (__arm_vornq_m_s16): Likewise.
8379 (__arm_vornq_m_u8): Likewise.
8380 (__arm_vornq_m_u32): Likewise.
8381 (__arm_vornq_m_u16): Likewise.
8382 (__arm_vorrq_m_s8): Likewise.
8383 (__arm_vorrq_m_s32): Likewise.
8384 (__arm_vorrq_m_s16): Likewise.
8385 (__arm_vorrq_m_u8): Likewise.
8386 (__arm_vorrq_m_u32): Likewise.
8387 (__arm_vorrq_m_u16): Likewise.
8388 (__arm_vqaddq_m_n_s8): Likewise.
8389 (__arm_vqaddq_m_n_s32): Likewise.
8390 (__arm_vqaddq_m_n_s16): Likewise.
8391 (__arm_vqaddq_m_n_u8): Likewise.
8392 (__arm_vqaddq_m_n_u32): Likewise.
8393 (__arm_vqaddq_m_n_u16): Likewise.
8394 (__arm_vqaddq_m_s8): Likewise.
8395 (__arm_vqaddq_m_s32): Likewise.
8396 (__arm_vqaddq_m_s16): Likewise.
8397 (__arm_vqaddq_m_u8): Likewise.
8398 (__arm_vqaddq_m_u32): Likewise.
8399 (__arm_vqaddq_m_u16): Likewise.
8400 (__arm_vqdmladhq_m_s8): Likewise.
8401 (__arm_vqdmladhq_m_s32): Likewise.
8402 (__arm_vqdmladhq_m_s16): Likewise.
8403 (__arm_vqdmladhxq_m_s8): Likewise.
8404 (__arm_vqdmladhxq_m_s32): Likewise.
8405 (__arm_vqdmladhxq_m_s16): Likewise.
8406 (__arm_vqdmlahq_m_n_s8): Likewise.
8407 (__arm_vqdmlahq_m_n_s32): Likewise.
8408 (__arm_vqdmlahq_m_n_s16): Likewise.
8409 (__arm_vqdmlahq_m_n_u8): Likewise.
8410 (__arm_vqdmlahq_m_n_u32): Likewise.
8411 (__arm_vqdmlahq_m_n_u16): Likewise.
8412 (__arm_vqdmlsdhq_m_s8): Likewise.
8413 (__arm_vqdmlsdhq_m_s32): Likewise.
8414 (__arm_vqdmlsdhq_m_s16): Likewise.
8415 (__arm_vqdmlsdhxq_m_s8): Likewise.
8416 (__arm_vqdmlsdhxq_m_s32): Likewise.
8417 (__arm_vqdmlsdhxq_m_s16): Likewise.
8418 (__arm_vqdmulhq_m_n_s8): Likewise.
8419 (__arm_vqdmulhq_m_n_s32): Likewise.
8420 (__arm_vqdmulhq_m_n_s16): Likewise.
8421 (__arm_vqdmulhq_m_s8): Likewise.
8422 (__arm_vqdmulhq_m_s32): Likewise.
8423 (__arm_vqdmulhq_m_s16): Likewise.
8424 (__arm_vqrdmladhq_m_s8): Likewise.
8425 (__arm_vqrdmladhq_m_s32): Likewise.
8426 (__arm_vqrdmladhq_m_s16): Likewise.
8427 (__arm_vqrdmladhxq_m_s8): Likewise.
8428 (__arm_vqrdmladhxq_m_s32): Likewise.
8429 (__arm_vqrdmladhxq_m_s16): Likewise.
8430 (__arm_vqrdmlahq_m_n_s8): Likewise.
8431 (__arm_vqrdmlahq_m_n_s32): Likewise.
8432 (__arm_vqrdmlahq_m_n_s16): Likewise.
8433 (__arm_vqrdmlahq_m_n_u8): Likewise.
8434 (__arm_vqrdmlahq_m_n_u32): Likewise.
8435 (__arm_vqrdmlahq_m_n_u16): Likewise.
8436 (__arm_vqrdmlashq_m_n_s8): Likewise.
8437 (__arm_vqrdmlashq_m_n_s32): Likewise.
8438 (__arm_vqrdmlashq_m_n_s16): Likewise.
8439 (__arm_vqrdmlashq_m_n_u8): Likewise.
8440 (__arm_vqrdmlashq_m_n_u32): Likewise.
8441 (__arm_vqrdmlashq_m_n_u16): Likewise.
8442 (__arm_vqrdmlsdhq_m_s8): Likewise.
8443 (__arm_vqrdmlsdhq_m_s32): Likewise.
8444 (__arm_vqrdmlsdhq_m_s16): Likewise.
8445 (__arm_vqrdmlsdhxq_m_s8): Likewise.
8446 (__arm_vqrdmlsdhxq_m_s32): Likewise.
8447 (__arm_vqrdmlsdhxq_m_s16): Likewise.
8448 (__arm_vqrdmulhq_m_n_s8): Likewise.
8449 (__arm_vqrdmulhq_m_n_s32): Likewise.
8450 (__arm_vqrdmulhq_m_n_s16): Likewise.
8451 (__arm_vqrdmulhq_m_s8): Likewise.
8452 (__arm_vqrdmulhq_m_s32): Likewise.
8453 (__arm_vqrdmulhq_m_s16): Likewise.
8454 (__arm_vqrshlq_m_s8): Likewise.
8455 (__arm_vqrshlq_m_s32): Likewise.
8456 (__arm_vqrshlq_m_s16): Likewise.
8457 (__arm_vqrshlq_m_u8): Likewise.
8458 (__arm_vqrshlq_m_u32): Likewise.
8459 (__arm_vqrshlq_m_u16): Likewise.
8460 (__arm_vqshlq_m_n_s8): Likewise.
8461 (__arm_vqshlq_m_n_s32): Likewise.
8462 (__arm_vqshlq_m_n_s16): Likewise.
8463 (__arm_vqshlq_m_n_u8): Likewise.
8464 (__arm_vqshlq_m_n_u32): Likewise.
8465 (__arm_vqshlq_m_n_u16): Likewise.
8466 (__arm_vqshlq_m_s8): Likewise.
8467 (__arm_vqshlq_m_s32): Likewise.
8468 (__arm_vqshlq_m_s16): Likewise.
8469 (__arm_vqshlq_m_u8): Likewise.
8470 (__arm_vqshlq_m_u32): Likewise.
8471 (__arm_vqshlq_m_u16): Likewise.
8472 (__arm_vqsubq_m_n_s8): Likewise.
8473 (__arm_vqsubq_m_n_s32): Likewise.
8474 (__arm_vqsubq_m_n_s16): Likewise.
8475 (__arm_vqsubq_m_n_u8): Likewise.
8476 (__arm_vqsubq_m_n_u32): Likewise.
8477 (__arm_vqsubq_m_n_u16): Likewise.
8478 (__arm_vqsubq_m_s8): Likewise.
8479 (__arm_vqsubq_m_s32): Likewise.
8480 (__arm_vqsubq_m_s16): Likewise.
8481 (__arm_vqsubq_m_u8): Likewise.
8482 (__arm_vqsubq_m_u32): Likewise.
8483 (__arm_vqsubq_m_u16): Likewise.
8484 (__arm_vrhaddq_m_s8): Likewise.
8485 (__arm_vrhaddq_m_s32): Likewise.
8486 (__arm_vrhaddq_m_s16): Likewise.
8487 (__arm_vrhaddq_m_u8): Likewise.
8488 (__arm_vrhaddq_m_u32): Likewise.
8489 (__arm_vrhaddq_m_u16): Likewise.
8490 (__arm_vrmulhq_m_s8): Likewise.
8491 (__arm_vrmulhq_m_s32): Likewise.
8492 (__arm_vrmulhq_m_s16): Likewise.
8493 (__arm_vrmulhq_m_u8): Likewise.
8494 (__arm_vrmulhq_m_u32): Likewise.
8495 (__arm_vrmulhq_m_u16): Likewise.
8496 (__arm_vrshlq_m_s8): Likewise.
8497 (__arm_vrshlq_m_s32): Likewise.
8498 (__arm_vrshlq_m_s16): Likewise.
8499 (__arm_vrshlq_m_u8): Likewise.
8500 (__arm_vrshlq_m_u32): Likewise.
8501 (__arm_vrshlq_m_u16): Likewise.
8502 (__arm_vrshrq_m_n_s8): Likewise.
8503 (__arm_vrshrq_m_n_s32): Likewise.
8504 (__arm_vrshrq_m_n_s16): Likewise.
8505 (__arm_vrshrq_m_n_u8): Likewise.
8506 (__arm_vrshrq_m_n_u32): Likewise.
8507 (__arm_vrshrq_m_n_u16): Likewise.
8508 (__arm_vshlq_m_n_s8): Likewise.
8509 (__arm_vshlq_m_n_s32): Likewise.
8510 (__arm_vshlq_m_n_s16): Likewise.
8511 (__arm_vshlq_m_n_u8): Likewise.
8512 (__arm_vshlq_m_n_u32): Likewise.
8513 (__arm_vshlq_m_n_u16): Likewise.
8514 (__arm_vshrq_m_n_s8): Likewise.
8515 (__arm_vshrq_m_n_s32): Likewise.
8516 (__arm_vshrq_m_n_s16): Likewise.
8517 (__arm_vshrq_m_n_u8): Likewise.
8518 (__arm_vshrq_m_n_u32): Likewise.
8519 (__arm_vshrq_m_n_u16): Likewise.
8520 (__arm_vsliq_m_n_s8): Likewise.
8521 (__arm_vsliq_m_n_s32): Likewise.
8522 (__arm_vsliq_m_n_s16): Likewise.
8523 (__arm_vsliq_m_n_u8): Likewise.
8524 (__arm_vsliq_m_n_u32): Likewise.
8525 (__arm_vsliq_m_n_u16): Likewise.
8526 (__arm_vsubq_m_n_s8): Likewise.
8527 (__arm_vsubq_m_n_s32): Likewise.
8528 (__arm_vsubq_m_n_s16): Likewise.
8529 (__arm_vsubq_m_n_u8): Likewise.
8530 (__arm_vsubq_m_n_u32): Likewise.
8531 (__arm_vsubq_m_n_u16): Likewise.
8532 (vqdmladhq_m): Define polymorphic variant.
8533 (vqdmladhxq_m): Likewise.
8534 (vqdmlsdhq_m): Likewise.
8535 (vqdmlsdhxq_m): Likewise.
8536 (vabdq_m): Likewise.
8537 (vandq_m): Likewise.
8538 (vbicq_m): Likewise.
8539 (vbrsrq_m_n): Likewise.
8540 (vcaddq_rot270_m): Likewise.
8541 (vcaddq_rot90_m): Likewise.
8542 (veorq_m): Likewise.
8543 (vmaxq_m): Likewise.
8544 (vminq_m): Likewise.
8545 (vmladavaq_p): Likewise.
8546 (vmlaq_m_n): Likewise.
8547 (vmlasq_m_n): Likewise.
8548 (vmulhq_m): Likewise.
8549 (vmullbq_int_m): Likewise.
8550 (vmulltq_int_m): Likewise.
8551 (vornq_m): Likewise.
8552 (vorrq_m): Likewise.
8553 (vqdmlahq_m_n): Likewise.
8554 (vqrdmlahq_m_n): Likewise.
8555 (vqrdmlashq_m_n): Likewise.
8556 (vqrshlq_m): Likewise.
8557 (vqshlq_m_n): Likewise.
8558 (vqshlq_m): Likewise.
8559 (vrhaddq_m): Likewise.
8560 (vrmulhq_m): Likewise.
8561 (vrshlq_m): Likewise.
8562 (vrshrq_m_n): Likewise.
8563 (vshlq_m_n): Likewise.
8564 (vshrq_m_n): Likewise.
8565 (vsliq_m): Likewise.
8566 (vaddq_m_n): Likewise.
8567 (vaddq_m): Likewise.
8568 (vhaddq_m_n): Likewise.
8569 (vhaddq_m): Likewise.
8570 (vhcaddq_rot270_m): Likewise.
8571 (vhcaddq_rot90_m): Likewise.
8572 (vhsubq_m): Likewise.
8573 (vhsubq_m_n): Likewise.
8574 (vmulq_m_n): Likewise.
8575 (vmulq_m): Likewise.
8576 (vqaddq_m_n): Likewise.
8577 (vqaddq_m): Likewise.
8578 (vqdmulhq_m_n): Likewise.
8579 (vqdmulhq_m): Likewise.
8580 (vsubq_m_n): Likewise.
8581 (vsliq_m_n): Likewise.
8582 (vqsubq_m_n): Likewise.
8583 (vqsubq_m): Likewise.
8584 (vqrdmulhq_m): Likewise.
8585 (vqrdmulhq_m_n): Likewise.
8586 (vqrdmlsdhxq_m): Likewise.
8587 (vqrdmlsdhq_m): Likewise.
8588 (vqrdmladhq_m): Likewise.
8589 (vqrdmladhxq_m): Likewise.
8590 (vmlsdavaxq_p): Likewise.
8591 (vmlsdavaq_p): Likewise.
8592 (vmladavaxq_p): Likewise.
8593 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
8595 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
8596 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
8597 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
8598 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
8599 * config/arm/mve.md (VHSUBQ_M): Define iterators.
8600 (VSLIQ_M_N): Likewise.
8601 (VQRDMLAHQ_M_N): Likewise.
8602 (VRSHLQ_M): Likewise.
8603 (VMINQ_M): Likewise.
8604 (VMULLBQ_INT_M): Likewise.
8605 (VMULHQ_M): Likewise.
8606 (VMULQ_M): Likewise.
8607 (VHSUBQ_M_N): Likewise.
8608 (VHADDQ_M_N): Likewise.
8609 (VORRQ_M): Likewise.
8610 (VRMULHQ_M): Likewise.
8611 (VQADDQ_M): Likewise.
8612 (VRSHRQ_M_N): Likewise.
8613 (VQSUBQ_M_N): Likewise.
8614 (VADDQ_M): Likewise.
8615 (VORNQ_M): Likewise.
8616 (VQDMLAHQ_M_N): Likewise.
8617 (VRHADDQ_M): Likewise.
8618 (VQSHLQ_M): Likewise.
8619 (VANDQ_M): Likewise.
8620 (VBICQ_M): Likewise.
8621 (VSHLQ_M_N): Likewise.
8622 (VCADDQ_ROT270_M): Likewise.
8623 (VQRSHLQ_M): Likewise.
8624 (VQADDQ_M_N): Likewise.
8625 (VADDQ_M_N): Likewise.
8626 (VMAXQ_M): Likewise.
8627 (VQSUBQ_M): Likewise.
8628 (VMLASQ_M_N): Likewise.
8629 (VMLADAVAQ_P): Likewise.
8630 (VBRSRQ_M_N): Likewise.
8631 (VMULQ_M_N): Likewise.
8632 (VCADDQ_ROT90_M): Likewise.
8633 (VMULLTQ_INT_M): Likewise.
8634 (VEORQ_M): Likewise.
8635 (VSHRQ_M_N): Likewise.
8636 (VSUBQ_M_N): Likewise.
8637 (VHADDQ_M): Likewise.
8638 (VABDQ_M): Likewise.
8639 (VQRDMLASHQ_M_N): Likewise.
8640 (VMLAQ_M_N): Likewise.
8641 (VQSHLQ_M_N): Likewise.
8642 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
8643 (mve_vaddq_m_n_<supf><mode>): Likewise.
8644 (mve_vaddq_m_<supf><mode>): Likewise.
8645 (mve_vandq_m_<supf><mode>): Likewise.
8646 (mve_vbicq_m_<supf><mode>): Likewise.
8647 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
8648 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
8649 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
8650 (mve_veorq_m_<supf><mode>): Likewise.
8651 (mve_vhaddq_m_n_<supf><mode>): Likewise.
8652 (mve_vhaddq_m_<supf><mode>): Likewise.
8653 (mve_vhsubq_m_n_<supf><mode>): Likewise.
8654 (mve_vhsubq_m_<supf><mode>): Likewise.
8655 (mve_vmaxq_m_<supf><mode>): Likewise.
8656 (mve_vminq_m_<supf><mode>): Likewise.
8657 (mve_vmladavaq_p_<supf><mode>): Likewise.
8658 (mve_vmlaq_m_n_<supf><mode>): Likewise.
8659 (mve_vmlasq_m_n_<supf><mode>): Likewise.
8660 (mve_vmulhq_m_<supf><mode>): Likewise.
8661 (mve_vmullbq_int_m_<supf><mode>): Likewise.
8662 (mve_vmulltq_int_m_<supf><mode>): Likewise.
8663 (mve_vmulq_m_n_<supf><mode>): Likewise.
8664 (mve_vmulq_m_<supf><mode>): Likewise.
8665 (mve_vornq_m_<supf><mode>): Likewise.
8666 (mve_vorrq_m_<supf><mode>): Likewise.
8667 (mve_vqaddq_m_n_<supf><mode>): Likewise.
8668 (mve_vqaddq_m_<supf><mode>): Likewise.
8669 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
8670 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
8671 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
8672 (mve_vqrshlq_m_<supf><mode>): Likewise.
8673 (mve_vqshlq_m_n_<supf><mode>): Likewise.
8674 (mve_vqshlq_m_<supf><mode>): Likewise.
8675 (mve_vqsubq_m_n_<supf><mode>): Likewise.
8676 (mve_vqsubq_m_<supf><mode>): Likewise.
8677 (mve_vrhaddq_m_<supf><mode>): Likewise.
8678 (mve_vrmulhq_m_<supf><mode>): Likewise.
8679 (mve_vrshlq_m_<supf><mode>): Likewise.
8680 (mve_vrshrq_m_n_<supf><mode>): Likewise.
8681 (mve_vshlq_m_n_<supf><mode>): Likewise.
8682 (mve_vshrq_m_n_<supf><mode>): Likewise.
8683 (mve_vsliq_m_n_<supf><mode>): Likewise.
8684 (mve_vsubq_m_n_<supf><mode>): Likewise.
8685 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
8686 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
8687 (mve_vmladavaxq_p_s<mode>): Likewise.
8688 (mve_vmlsdavaq_p_s<mode>): Likewise.
8689 (mve_vmlsdavaxq_p_s<mode>): Likewise.
8690 (mve_vqdmladhq_m_s<mode>): Likewise.
8691 (mve_vqdmladhxq_m_s<mode>): Likewise.
8692 (mve_vqdmlsdhq_m_s<mode>): Likewise.
8693 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
8694 (mve_vqdmulhq_m_n_s<mode>): Likewise.
8695 (mve_vqdmulhq_m_s<mode>): Likewise.
8696 (mve_vqrdmladhq_m_s<mode>): Likewise.
8697 (mve_vqrdmladhxq_m_s<mode>): Likewise.
8698 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
8699 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
8700 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
8701 (mve_vqrdmulhq_m_s<mode>): Likewise.
8703 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8704 Mihail Ionescu <mihail.ionescu@arm.com>
8705 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8707 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
8708 Define builtin qualifier.
8709 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8710 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8711 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8712 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8713 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8714 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8715 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8716 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
8717 (vsubq_m_s8): Likewise.
8718 (vcvtq_m_n_f16_u16): Likewise.
8719 (vqshluq_m_n_s8): Likewise.
8720 (vabavq_p_s8): Likewise.
8721 (vsriq_m_n_u8): Likewise.
8722 (vshlq_m_u8): Likewise.
8723 (vsubq_m_u8): Likewise.
8724 (vabavq_p_u8): Likewise.
8725 (vshlq_m_s8): Likewise.
8726 (vcvtq_m_n_f16_s16): Likewise.
8727 (vsriq_m_n_s16): Likewise.
8728 (vsubq_m_s16): Likewise.
8729 (vcvtq_m_n_f32_u32): Likewise.
8730 (vqshluq_m_n_s16): Likewise.
8731 (vabavq_p_s16): Likewise.
8732 (vsriq_m_n_u16): Likewise.
8733 (vshlq_m_u16): Likewise.
8734 (vsubq_m_u16): Likewise.
8735 (vabavq_p_u16): Likewise.
8736 (vshlq_m_s16): Likewise.
8737 (vcvtq_m_n_f32_s32): Likewise.
8738 (vsriq_m_n_s32): Likewise.
8739 (vsubq_m_s32): Likewise.
8740 (vqshluq_m_n_s32): Likewise.
8741 (vabavq_p_s32): Likewise.
8742 (vsriq_m_n_u32): Likewise.
8743 (vshlq_m_u32): Likewise.
8744 (vsubq_m_u32): Likewise.
8745 (vabavq_p_u32): Likewise.
8746 (vshlq_m_s32): Likewise.
8747 (__arm_vsriq_m_n_s8): Define intrinsic.
8748 (__arm_vsubq_m_s8): Likewise.
8749 (__arm_vqshluq_m_n_s8): Likewise.
8750 (__arm_vabavq_p_s8): Likewise.
8751 (__arm_vsriq_m_n_u8): Likewise.
8752 (__arm_vshlq_m_u8): Likewise.
8753 (__arm_vsubq_m_u8): Likewise.
8754 (__arm_vabavq_p_u8): Likewise.
8755 (__arm_vshlq_m_s8): Likewise.
8756 (__arm_vsriq_m_n_s16): Likewise.
8757 (__arm_vsubq_m_s16): Likewise.
8758 (__arm_vqshluq_m_n_s16): Likewise.
8759 (__arm_vabavq_p_s16): Likewise.
8760 (__arm_vsriq_m_n_u16): Likewise.
8761 (__arm_vshlq_m_u16): Likewise.
8762 (__arm_vsubq_m_u16): Likewise.
8763 (__arm_vabavq_p_u16): Likewise.
8764 (__arm_vshlq_m_s16): Likewise.
8765 (__arm_vsriq_m_n_s32): Likewise.
8766 (__arm_vsubq_m_s32): Likewise.
8767 (__arm_vqshluq_m_n_s32): Likewise.
8768 (__arm_vabavq_p_s32): Likewise.
8769 (__arm_vsriq_m_n_u32): Likewise.
8770 (__arm_vshlq_m_u32): Likewise.
8771 (__arm_vsubq_m_u32): Likewise.
8772 (__arm_vabavq_p_u32): Likewise.
8773 (__arm_vshlq_m_s32): Likewise.
8774 (__arm_vcvtq_m_n_f16_u16): Likewise.
8775 (__arm_vcvtq_m_n_f16_s16): Likewise.
8776 (__arm_vcvtq_m_n_f32_u32): Likewise.
8777 (__arm_vcvtq_m_n_f32_s32): Likewise.
8778 (vcvtq_m_n): Define polymorphic variant.
8779 (vqshluq_m_n): Likewise.
8780 (vshlq_m): Likewise.
8781 (vsriq_m_n): Likewise.
8782 (vsubq_m): Likewise.
8783 (vabavq_p): Likewise.
8784 * config/arm/arm_mve_builtins.def
8785 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
8786 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
8787 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8788 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
8789 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
8790 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8791 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
8792 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
8793 * config/arm/mve.md (VABAVQ_P): Define iterator.
8794 (VSHLQ_M): Likewise.
8795 (VSRIQ_M_N): Likewise.
8796 (VSUBQ_M): Likewise.
8797 (VCVTQ_M_N_TO_F): Likewise.
8798 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
8799 (mve_vqshluq_m_n_s<mode>): Likewise.
8800 (mve_vshlq_m_<supf><mode>): Likewise.
8801 (mve_vsriq_m_n_<supf><mode>): Likewise.
8802 (mve_vsubq_m_<supf><mode>): Likewise.
8803 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
8805 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
8806 Mihail Ionescu <mihail.ionescu@arm.com>
8807 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8809 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
8810 (vrmlsldavhaq_s32): Likewise.
8811 (vrmlsldavhaxq_s32): Likewise.
8812 (vaddlvaq_p_s32): Likewise.
8813 (vcvtbq_m_f16_f32): Likewise.
8814 (vcvtbq_m_f32_f16): Likewise.
8815 (vcvttq_m_f16_f32): Likewise.
8816 (vcvttq_m_f32_f16): Likewise.
8817 (vrev16q_m_s8): Likewise.
8818 (vrev32q_m_f16): Likewise.
8819 (vrmlaldavhq_p_s32): Likewise.
8820 (vrmlaldavhxq_p_s32): Likewise.
8821 (vrmlsldavhq_p_s32): Likewise.
8822 (vrmlsldavhxq_p_s32): Likewise.
8823 (vaddlvaq_p_u32): Likewise.
8824 (vrev16q_m_u8): Likewise.
8825 (vrmlaldavhq_p_u32): Likewise.
8826 (vmvnq_m_n_s16): Likewise.
8827 (vorrq_m_n_s16): Likewise.
8828 (vqrshrntq_n_s16): Likewise.
8829 (vqshrnbq_n_s16): Likewise.
8830 (vqshrntq_n_s16): Likewise.
8831 (vrshrnbq_n_s16): Likewise.
8832 (vrshrntq_n_s16): Likewise.
8833 (vshrnbq_n_s16): Likewise.
8834 (vshrntq_n_s16): Likewise.
8835 (vcmlaq_f16): Likewise.
8836 (vcmlaq_rot180_f16): Likewise.
8837 (vcmlaq_rot270_f16): Likewise.
8838 (vcmlaq_rot90_f16): Likewise.
8839 (vfmaq_f16): Likewise.
8840 (vfmaq_n_f16): Likewise.
8841 (vfmasq_n_f16): Likewise.
8842 (vfmsq_f16): Likewise.
8843 (vmlaldavaq_s16): Likewise.
8844 (vmlaldavaxq_s16): Likewise.
8845 (vmlsldavaq_s16): Likewise.
8846 (vmlsldavaxq_s16): Likewise.
8847 (vabsq_m_f16): Likewise.
8848 (vcvtmq_m_s16_f16): Likewise.
8849 (vcvtnq_m_s16_f16): Likewise.
8850 (vcvtpq_m_s16_f16): Likewise.
8851 (vcvtq_m_s16_f16): Likewise.
8852 (vdupq_m_n_f16): Likewise.
8853 (vmaxnmaq_m_f16): Likewise.
8854 (vmaxnmavq_p_f16): Likewise.
8855 (vmaxnmvq_p_f16): Likewise.
8856 (vminnmaq_m_f16): Likewise.
8857 (vminnmavq_p_f16): Likewise.
8858 (vminnmvq_p_f16): Likewise.
8859 (vmlaldavq_p_s16): Likewise.
8860 (vmlaldavxq_p_s16): Likewise.
8861 (vmlsldavq_p_s16): Likewise.
8862 (vmlsldavxq_p_s16): Likewise.
8863 (vmovlbq_m_s8): Likewise.
8864 (vmovltq_m_s8): Likewise.
8865 (vmovnbq_m_s16): Likewise.
8866 (vmovntq_m_s16): Likewise.
8867 (vnegq_m_f16): Likewise.
8868 (vpselq_f16): Likewise.
8869 (vqmovnbq_m_s16): Likewise.
8870 (vqmovntq_m_s16): Likewise.
8871 (vrev32q_m_s8): Likewise.
8872 (vrev64q_m_f16): Likewise.
8873 (vrndaq_m_f16): Likewise.
8874 (vrndmq_m_f16): Likewise.
8875 (vrndnq_m_f16): Likewise.
8876 (vrndpq_m_f16): Likewise.
8877 (vrndq_m_f16): Likewise.
8878 (vrndxq_m_f16): Likewise.
8879 (vcmpeqq_m_n_f16): Likewise.
8880 (vcmpgeq_m_f16): Likewise.
8881 (vcmpgeq_m_n_f16): Likewise.
8882 (vcmpgtq_m_f16): Likewise.
8883 (vcmpgtq_m_n_f16): Likewise.
8884 (vcmpleq_m_f16): Likewise.
8885 (vcmpleq_m_n_f16): Likewise.
8886 (vcmpltq_m_f16): Likewise.
8887 (vcmpltq_m_n_f16): Likewise.
8888 (vcmpneq_m_f16): Likewise.
8889 (vcmpneq_m_n_f16): Likewise.
8890 (vmvnq_m_n_u16): Likewise.
8891 (vorrq_m_n_u16): Likewise.
8892 (vqrshruntq_n_s16): Likewise.
8893 (vqshrunbq_n_s16): Likewise.
8894 (vqshruntq_n_s16): Likewise.
8895 (vcvtmq_m_u16_f16): Likewise.
8896 (vcvtnq_m_u16_f16): Likewise.
8897 (vcvtpq_m_u16_f16): Likewise.
8898 (vcvtq_m_u16_f16): Likewise.
8899 (vqmovunbq_m_s16): Likewise.
8900 (vqmovuntq_m_s16): Likewise.
8901 (vqrshrntq_n_u16): Likewise.
8902 (vqshrnbq_n_u16): Likewise.
8903 (vqshrntq_n_u16): Likewise.
8904 (vrshrnbq_n_u16): Likewise.
8905 (vrshrntq_n_u16): Likewise.
8906 (vshrnbq_n_u16): Likewise.
8907 (vshrntq_n_u16): Likewise.
8908 (vmlaldavaq_u16): Likewise.
8909 (vmlaldavaxq_u16): Likewise.
8910 (vmlaldavq_p_u16): Likewise.
8911 (vmlaldavxq_p_u16): Likewise.
8912 (vmovlbq_m_u8): Likewise.
8913 (vmovltq_m_u8): Likewise.
8914 (vmovnbq_m_u16): Likewise.
8915 (vmovntq_m_u16): Likewise.
8916 (vqmovnbq_m_u16): Likewise.
8917 (vqmovntq_m_u16): Likewise.
8918 (vrev32q_m_u8): Likewise.
8919 (vmvnq_m_n_s32): Likewise.
8920 (vorrq_m_n_s32): Likewise.
8921 (vqrshrntq_n_s32): Likewise.
8922 (vqshrnbq_n_s32): Likewise.
8923 (vqshrntq_n_s32): Likewise.
8924 (vrshrnbq_n_s32): Likewise.
8925 (vrshrntq_n_s32): Likewise.
8926 (vshrnbq_n_s32): Likewise.
8927 (vshrntq_n_s32): Likewise.
8928 (vcmlaq_f32): Likewise.
8929 (vcmlaq_rot180_f32): Likewise.
8930 (vcmlaq_rot270_f32): Likewise.
8931 (vcmlaq_rot90_f32): Likewise.
8932 (vfmaq_f32): Likewise.
8933 (vfmaq_n_f32): Likewise.
8934 (vfmasq_n_f32): Likewise.
8935 (vfmsq_f32): Likewise.
8936 (vmlaldavaq_s32): Likewise.
8937 (vmlaldavaxq_s32): Likewise.
8938 (vmlsldavaq_s32): Likewise.
8939 (vmlsldavaxq_s32): Likewise.
8940 (vabsq_m_f32): Likewise.
8941 (vcvtmq_m_s32_f32): Likewise.
8942 (vcvtnq_m_s32_f32): Likewise.
8943 (vcvtpq_m_s32_f32): Likewise.
8944 (vcvtq_m_s32_f32): Likewise.
8945 (vdupq_m_n_f32): Likewise.
8946 (vmaxnmaq_m_f32): Likewise.
8947 (vmaxnmavq_p_f32): Likewise.
8948 (vmaxnmvq_p_f32): Likewise.
8949 (vminnmaq_m_f32): Likewise.
8950 (vminnmavq_p_f32): Likewise.
8951 (vminnmvq_p_f32): Likewise.
8952 (vmlaldavq_p_s32): Likewise.
8953 (vmlaldavxq_p_s32): Likewise.
8954 (vmlsldavq_p_s32): Likewise.
8955 (vmlsldavxq_p_s32): Likewise.
8956 (vmovlbq_m_s16): Likewise.
8957 (vmovltq_m_s16): Likewise.
8958 (vmovnbq_m_s32): Likewise.
8959 (vmovntq_m_s32): Likewise.
8960 (vnegq_m_f32): Likewise.
8961 (vpselq_f32): Likewise.
8962 (vqmovnbq_m_s32): Likewise.
8963 (vqmovntq_m_s32): Likewise.
8964 (vrev32q_m_s16): Likewise.
8965 (vrev64q_m_f32): Likewise.
8966 (vrndaq_m_f32): Likewise.
8967 (vrndmq_m_f32): Likewise.
8968 (vrndnq_m_f32): Likewise.
8969 (vrndpq_m_f32): Likewise.
8970 (vrndq_m_f32): Likewise.
8971 (vrndxq_m_f32): Likewise.
8972 (vcmpeqq_m_n_f32): Likewise.
8973 (vcmpgeq_m_f32): Likewise.
8974 (vcmpgeq_m_n_f32): Likewise.
8975 (vcmpgtq_m_f32): Likewise.
8976 (vcmpgtq_m_n_f32): Likewise.
8977 (vcmpleq_m_f32): Likewise.
8978 (vcmpleq_m_n_f32): Likewise.
8979 (vcmpltq_m_f32): Likewise.
8980 (vcmpltq_m_n_f32): Likewise.
8981 (vcmpneq_m_f32): Likewise.
8982 (vcmpneq_m_n_f32): Likewise.
8983 (vmvnq_m_n_u32): Likewise.
8984 (vorrq_m_n_u32): Likewise.
8985 (vqrshruntq_n_s32): Likewise.
8986 (vqshrunbq_n_s32): Likewise.
8987 (vqshruntq_n_s32): Likewise.
8988 (vcvtmq_m_u32_f32): Likewise.
8989 (vcvtnq_m_u32_f32): Likewise.
8990 (vcvtpq_m_u32_f32): Likewise.
8991 (vcvtq_m_u32_f32): Likewise.
8992 (vqmovunbq_m_s32): Likewise.
8993 (vqmovuntq_m_s32): Likewise.
8994 (vqrshrntq_n_u32): Likewise.
8995 (vqshrnbq_n_u32): Likewise.
8996 (vqshrntq_n_u32): Likewise.
8997 (vrshrnbq_n_u32): Likewise.
8998 (vrshrntq_n_u32): Likewise.
8999 (vshrnbq_n_u32): Likewise.
9000 (vshrntq_n_u32): Likewise.
9001 (vmlaldavaq_u32): Likewise.
9002 (vmlaldavaxq_u32): Likewise.
9003 (vmlaldavq_p_u32): Likewise.
9004 (vmlaldavxq_p_u32): Likewise.
9005 (vmovlbq_m_u16): Likewise.
9006 (vmovltq_m_u16): Likewise.
9007 (vmovnbq_m_u32): Likewise.
9008 (vmovntq_m_u32): Likewise.
9009 (vqmovnbq_m_u32): Likewise.
9010 (vqmovntq_m_u32): Likewise.
9011 (vrev32q_m_u16): Likewise.
9012 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
9013 (__arm_vrmlsldavhaq_s32): Likewise.
9014 (__arm_vrmlsldavhaxq_s32): Likewise.
9015 (__arm_vaddlvaq_p_s32): Likewise.
9016 (__arm_vrev16q_m_s8): Likewise.
9017 (__arm_vrmlaldavhq_p_s32): Likewise.
9018 (__arm_vrmlaldavhxq_p_s32): Likewise.
9019 (__arm_vrmlsldavhq_p_s32): Likewise.
9020 (__arm_vrmlsldavhxq_p_s32): Likewise.
9021 (__arm_vaddlvaq_p_u32): Likewise.
9022 (__arm_vrev16q_m_u8): Likewise.
9023 (__arm_vrmlaldavhq_p_u32): Likewise.
9024 (__arm_vmvnq_m_n_s16): Likewise.
9025 (__arm_vorrq_m_n_s16): Likewise.
9026 (__arm_vqrshrntq_n_s16): Likewise.
9027 (__arm_vqshrnbq_n_s16): Likewise.
9028 (__arm_vqshrntq_n_s16): Likewise.
9029 (__arm_vrshrnbq_n_s16): Likewise.
9030 (__arm_vrshrntq_n_s16): Likewise.
9031 (__arm_vshrnbq_n_s16): Likewise.
9032 (__arm_vshrntq_n_s16): Likewise.
9033 (__arm_vmlaldavaq_s16): Likewise.
9034 (__arm_vmlaldavaxq_s16): Likewise.
9035 (__arm_vmlsldavaq_s16): Likewise.
9036 (__arm_vmlsldavaxq_s16): Likewise.
9037 (__arm_vmlaldavq_p_s16): Likewise.
9038 (__arm_vmlaldavxq_p_s16): Likewise.
9039 (__arm_vmlsldavq_p_s16): Likewise.
9040 (__arm_vmlsldavxq_p_s16): Likewise.
9041 (__arm_vmovlbq_m_s8): Likewise.
9042 (__arm_vmovltq_m_s8): Likewise.
9043 (__arm_vmovnbq_m_s16): Likewise.
9044 (__arm_vmovntq_m_s16): Likewise.
9045 (__arm_vqmovnbq_m_s16): Likewise.
9046 (__arm_vqmovntq_m_s16): Likewise.
9047 (__arm_vrev32q_m_s8): Likewise.
9048 (__arm_vmvnq_m_n_u16): Likewise.
9049 (__arm_vorrq_m_n_u16): Likewise.
9050 (__arm_vqrshruntq_n_s16): Likewise.
9051 (__arm_vqshrunbq_n_s16): Likewise.
9052 (__arm_vqshruntq_n_s16): Likewise.
9053 (__arm_vqmovunbq_m_s16): Likewise.
9054 (__arm_vqmovuntq_m_s16): Likewise.
9055 (__arm_vqrshrntq_n_u16): Likewise.
9056 (__arm_vqshrnbq_n_u16): Likewise.
9057 (__arm_vqshrntq_n_u16): Likewise.
9058 (__arm_vrshrnbq_n_u16): Likewise.
9059 (__arm_vrshrntq_n_u16): Likewise.
9060 (__arm_vshrnbq_n_u16): Likewise.
9061 (__arm_vshrntq_n_u16): Likewise.
9062 (__arm_vmlaldavaq_u16): Likewise.
9063 (__arm_vmlaldavaxq_u16): Likewise.
9064 (__arm_vmlaldavq_p_u16): Likewise.
9065 (__arm_vmlaldavxq_p_u16): Likewise.
9066 (__arm_vmovlbq_m_u8): Likewise.
9067 (__arm_vmovltq_m_u8): Likewise.
9068 (__arm_vmovnbq_m_u16): Likewise.
9069 (__arm_vmovntq_m_u16): Likewise.
9070 (__arm_vqmovnbq_m_u16): Likewise.
9071 (__arm_vqmovntq_m_u16): Likewise.
9072 (__arm_vrev32q_m_u8): Likewise.
9073 (__arm_vmvnq_m_n_s32): Likewise.
9074 (__arm_vorrq_m_n_s32): Likewise.
9075 (__arm_vqrshrntq_n_s32): Likewise.
9076 (__arm_vqshrnbq_n_s32): Likewise.
9077 (__arm_vqshrntq_n_s32): Likewise.
9078 (__arm_vrshrnbq_n_s32): Likewise.
9079 (__arm_vrshrntq_n_s32): Likewise.
9080 (__arm_vshrnbq_n_s32): Likewise.
9081 (__arm_vshrntq_n_s32): Likewise.
9082 (__arm_vmlaldavaq_s32): Likewise.
9083 (__arm_vmlaldavaxq_s32): Likewise.
9084 (__arm_vmlsldavaq_s32): Likewise.
9085 (__arm_vmlsldavaxq_s32): Likewise.
9086 (__arm_vmlaldavq_p_s32): Likewise.
9087 (__arm_vmlaldavxq_p_s32): Likewise.
9088 (__arm_vmlsldavq_p_s32): Likewise.
9089 (__arm_vmlsldavxq_p_s32): Likewise.
9090 (__arm_vmovlbq_m_s16): Likewise.
9091 (__arm_vmovltq_m_s16): Likewise.
9092 (__arm_vmovnbq_m_s32): Likewise.
9093 (__arm_vmovntq_m_s32): Likewise.
9094 (__arm_vqmovnbq_m_s32): Likewise.
9095 (__arm_vqmovntq_m_s32): Likewise.
9096 (__arm_vrev32q_m_s16): Likewise.
9097 (__arm_vmvnq_m_n_u32): Likewise.
9098 (__arm_vorrq_m_n_u32): Likewise.
9099 (__arm_vqrshruntq_n_s32): Likewise.
9100 (__arm_vqshrunbq_n_s32): Likewise.
9101 (__arm_vqshruntq_n_s32): Likewise.
9102 (__arm_vqmovunbq_m_s32): Likewise.
9103 (__arm_vqmovuntq_m_s32): Likewise.
9104 (__arm_vqrshrntq_n_u32): Likewise.
9105 (__arm_vqshrnbq_n_u32): Likewise.
9106 (__arm_vqshrntq_n_u32): Likewise.
9107 (__arm_vrshrnbq_n_u32): Likewise.
9108 (__arm_vrshrntq_n_u32): Likewise.
9109 (__arm_vshrnbq_n_u32): Likewise.
9110 (__arm_vshrntq_n_u32): Likewise.
9111 (__arm_vmlaldavaq_u32): Likewise.
9112 (__arm_vmlaldavaxq_u32): Likewise.
9113 (__arm_vmlaldavq_p_u32): Likewise.
9114 (__arm_vmlaldavxq_p_u32): Likewise.
9115 (__arm_vmovlbq_m_u16): Likewise.
9116 (__arm_vmovltq_m_u16): Likewise.
9117 (__arm_vmovnbq_m_u32): Likewise.
9118 (__arm_vmovntq_m_u32): Likewise.
9119 (__arm_vqmovnbq_m_u32): Likewise.
9120 (__arm_vqmovntq_m_u32): Likewise.
9121 (__arm_vrev32q_m_u16): Likewise.
9122 (__arm_vcvtbq_m_f16_f32): Likewise.
9123 (__arm_vcvtbq_m_f32_f16): Likewise.
9124 (__arm_vcvttq_m_f16_f32): Likewise.
9125 (__arm_vcvttq_m_f32_f16): Likewise.
9126 (__arm_vrev32q_m_f16): Likewise.
9127 (__arm_vcmlaq_f16): Likewise.
9128 (__arm_vcmlaq_rot180_f16): Likewise.
9129 (__arm_vcmlaq_rot270_f16): Likewise.
9130 (__arm_vcmlaq_rot90_f16): Likewise.
9131 (__arm_vfmaq_f16): Likewise.
9132 (__arm_vfmaq_n_f16): Likewise.
9133 (__arm_vfmasq_n_f16): Likewise.
9134 (__arm_vfmsq_f16): Likewise.
9135 (__arm_vabsq_m_f16): Likewise.
9136 (__arm_vcvtmq_m_s16_f16): Likewise.
9137 (__arm_vcvtnq_m_s16_f16): Likewise.
9138 (__arm_vcvtpq_m_s16_f16): Likewise.
9139 (__arm_vcvtq_m_s16_f16): Likewise.
9140 (__arm_vdupq_m_n_f16): Likewise.
9141 (__arm_vmaxnmaq_m_f16): Likewise.
9142 (__arm_vmaxnmavq_p_f16): Likewise.
9143 (__arm_vmaxnmvq_p_f16): Likewise.
9144 (__arm_vminnmaq_m_f16): Likewise.
9145 (__arm_vminnmavq_p_f16): Likewise.
9146 (__arm_vminnmvq_p_f16): Likewise.
9147 (__arm_vnegq_m_f16): Likewise.
9148 (__arm_vpselq_f16): Likewise.
9149 (__arm_vrev64q_m_f16): Likewise.
9150 (__arm_vrndaq_m_f16): Likewise.
9151 (__arm_vrndmq_m_f16): Likewise.
9152 (__arm_vrndnq_m_f16): Likewise.
9153 (__arm_vrndpq_m_f16): Likewise.
9154 (__arm_vrndq_m_f16): Likewise.
9155 (__arm_vrndxq_m_f16): Likewise.
9156 (__arm_vcmpeqq_m_n_f16): Likewise.
9157 (__arm_vcmpgeq_m_f16): Likewise.
9158 (__arm_vcmpgeq_m_n_f16): Likewise.
9159 (__arm_vcmpgtq_m_f16): Likewise.
9160 (__arm_vcmpgtq_m_n_f16): Likewise.
9161 (__arm_vcmpleq_m_f16): Likewise.
9162 (__arm_vcmpleq_m_n_f16): Likewise.
9163 (__arm_vcmpltq_m_f16): Likewise.
9164 (__arm_vcmpltq_m_n_f16): Likewise.
9165 (__arm_vcmpneq_m_f16): Likewise.
9166 (__arm_vcmpneq_m_n_f16): Likewise.
9167 (__arm_vcvtmq_m_u16_f16): Likewise.
9168 (__arm_vcvtnq_m_u16_f16): Likewise.
9169 (__arm_vcvtpq_m_u16_f16): Likewise.
9170 (__arm_vcvtq_m_u16_f16): Likewise.
9171 (__arm_vcmlaq_f32): Likewise.
9172 (__arm_vcmlaq_rot180_f32): Likewise.
9173 (__arm_vcmlaq_rot270_f32): Likewise.
9174 (__arm_vcmlaq_rot90_f32): Likewise.
9175 (__arm_vfmaq_f32): Likewise.
9176 (__arm_vfmaq_n_f32): Likewise.
9177 (__arm_vfmasq_n_f32): Likewise.
9178 (__arm_vfmsq_f32): Likewise.
9179 (__arm_vabsq_m_f32): Likewise.
9180 (__arm_vcvtmq_m_s32_f32): Likewise.
9181 (__arm_vcvtnq_m_s32_f32): Likewise.
9182 (__arm_vcvtpq_m_s32_f32): Likewise.
9183 (__arm_vcvtq_m_s32_f32): Likewise.
9184 (__arm_vdupq_m_n_f32): Likewise.
9185 (__arm_vmaxnmaq_m_f32): Likewise.
9186 (__arm_vmaxnmavq_p_f32): Likewise.
9187 (__arm_vmaxnmvq_p_f32): Likewise.
9188 (__arm_vminnmaq_m_f32): Likewise.
9189 (__arm_vminnmavq_p_f32): Likewise.
9190 (__arm_vminnmvq_p_f32): Likewise.
9191 (__arm_vnegq_m_f32): Likewise.
9192 (__arm_vpselq_f32): Likewise.
9193 (__arm_vrev64q_m_f32): Likewise.
9194 (__arm_vrndaq_m_f32): Likewise.
9195 (__arm_vrndmq_m_f32): Likewise.
9196 (__arm_vrndnq_m_f32): Likewise.
9197 (__arm_vrndpq_m_f32): Likewise.
9198 (__arm_vrndq_m_f32): Likewise.
9199 (__arm_vrndxq_m_f32): Likewise.
9200 (__arm_vcmpeqq_m_n_f32): Likewise.
9201 (__arm_vcmpgeq_m_f32): Likewise.
9202 (__arm_vcmpgeq_m_n_f32): Likewise.
9203 (__arm_vcmpgtq_m_f32): Likewise.
9204 (__arm_vcmpgtq_m_n_f32): Likewise.
9205 (__arm_vcmpleq_m_f32): Likewise.
9206 (__arm_vcmpleq_m_n_f32): Likewise.
9207 (__arm_vcmpltq_m_f32): Likewise.
9208 (__arm_vcmpltq_m_n_f32): Likewise.
9209 (__arm_vcmpneq_m_f32): Likewise.
9210 (__arm_vcmpneq_m_n_f32): Likewise.
9211 (__arm_vcvtmq_m_u32_f32): Likewise.
9212 (__arm_vcvtnq_m_u32_f32): Likewise.
9213 (__arm_vcvtpq_m_u32_f32): Likewise.
9214 (__arm_vcvtq_m_u32_f32): Likewise.
9215 (vcvtq_m): Define polymorphic variant.
9216 (vabsq_m): Likewise.
9218 (vcmlaq_rot180): Likewise.
9219 (vcmlaq_rot270): Likewise.
9220 (vcmlaq_rot90): Likewise.
9221 (vcmpeqq_m_n): Likewise.
9222 (vcmpgeq_m_n): Likewise.
9223 (vrndxq_m): Likewise.
9224 (vrndq_m): Likewise.
9225 (vrndpq_m): Likewise.
9226 (vcmpgtq_m_n): Likewise.
9227 (vcmpgtq_m): Likewise.
9228 (vcmpleq_m): Likewise.
9229 (vcmpleq_m_n): Likewise.
9230 (vcmpltq_m_n): Likewise.
9231 (vcmpltq_m): Likewise.
9232 (vcmpneq_m): Likewise.
9233 (vcmpneq_m_n): Likewise.
9234 (vcvtbq_m): Likewise.
9235 (vcvttq_m): Likewise.
9236 (vcvtmq_m): Likewise.
9237 (vcvtnq_m): Likewise.
9238 (vcvtpq_m): Likewise.
9239 (vdupq_m_n): Likewise.
9240 (vfmaq_n): Likewise.
9242 (vfmasq_n): Likewise.
9244 (vmaxnmaq_m): Likewise.
9245 (vmaxnmavq_m): Likewise.
9246 (vmaxnmvq_m): Likewise.
9247 (vmaxnmavq_p): Likewise.
9248 (vmaxnmvq_p): Likewise.
9249 (vminnmaq_m): Likewise.
9250 (vminnmavq_p): Likewise.
9251 (vminnmvq_p): Likewise.
9252 (vrndnq_m): Likewise.
9253 (vrndaq_m): Likewise.
9254 (vrndmq_m): Likewise.
9255 (vrev64q_m): Likewise.
9256 (vrev32q_m): Likewise.
9258 (vnegq_m): Likewise.
9259 (vcmpgeq_m): Likewise.
9260 (vshrntq_n): Likewise.
9261 (vrshrntq_n): Likewise.
9262 (vmovlbq_m): Likewise.
9263 (vmovnbq_m): Likewise.
9264 (vmovntq_m): Likewise.
9265 (vmvnq_m_n): Likewise.
9266 (vmvnq_m): Likewise.
9267 (vshrnbq_n): Likewise.
9268 (vrshrnbq_n): Likewise.
9269 (vqshruntq_n): Likewise.
9270 (vrev16q_m): Likewise.
9271 (vqshrunbq_n): Likewise.
9272 (vqshrntq_n): Likewise.
9273 (vqrshruntq_n): Likewise.
9274 (vqrshrntq_n): Likewise.
9275 (vqshrnbq_n): Likewise.
9276 (vqmovuntq_m): Likewise.
9277 (vqmovntq_m): Likewise.
9278 (vqmovnbq_m): Likewise.
9279 (vorrq_m_n): Likewise.
9280 (vmovltq_m): Likewise.
9281 (vqmovunbq_m): Likewise.
9282 (vaddlvaq_p): Likewise.
9283 (vmlaldavaq): Likewise.
9284 (vmlaldavaxq): Likewise.
9285 (vmlaldavq_p): Likewise.
9286 (vmlaldavxq_p): Likewise.
9287 (vmlsldavaq): Likewise.
9288 (vmlsldavaxq): Likewise.
9289 (vmlsldavq_p): Likewise.
9290 (vmlsldavxq_p): Likewise.
9291 (vrmlaldavhaxq): Likewise.
9292 (vrmlaldavhq_p): Likewise.
9293 (vrmlaldavhxq_p): Likewise.
9294 (vrmlsldavhaq): Likewise.
9295 (vrmlsldavhaxq): Likewise.
9296 (vrmlsldavhq_p): Likewise.
9297 (vrmlsldavhxq_p): Likewise.
9298 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
9300 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
9301 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
9302 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
9303 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
9304 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
9305 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
9306 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
9307 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
9308 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
9309 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
9310 (MVE_pred3): Likewise.
9311 (MVE_constraint1): Likewise.
9312 (MVE_pred1): Likewise.
9313 (VMLALDAVQ_P): Define iterator.
9314 (VQMOVNBQ_M): Likewise.
9315 (VMOVLTQ_M): Likewise.
9316 (VMOVNBQ_M): Likewise.
9317 (VRSHRNTQ_N): Likewise.
9318 (VORRQ_M_N): Likewise.
9319 (VREV32Q_M): Likewise.
9320 (VREV16Q_M): Likewise.
9321 (VQRSHRNTQ_N): Likewise.
9322 (VMOVNTQ_M): Likewise.
9323 (VMOVLBQ_M): Likewise.
9324 (VMLALDAVAQ): Likewise.
9325 (VQSHRNBQ_N): Likewise.
9326 (VSHRNBQ_N): Likewise.
9327 (VRSHRNBQ_N): Likewise.
9328 (VMLALDAVXQ_P): Likewise.
9329 (VQMOVNTQ_M): Likewise.
9330 (VMVNQ_M_N): Likewise.
9331 (VQSHRNTQ_N): Likewise.
9332 (VMLALDAVAXQ): Likewise.
9333 (VSHRNTQ_N): Likewise.
9334 (VCVTMQ_M): Likewise.
9335 (VCVTNQ_M): Likewise.
9336 (VCVTPQ_M): Likewise.
9337 (VCVTQ_M_N_FROM_F): Likewise.
9338 (VCVTQ_M_FROM_F): Likewise.
9339 (VRMLALDAVHQ_P): Likewise.
9340 (VADDLVAQ_P): Likewise.
9341 (mve_vrndq_m_f<mode>): Define RTL pattern.
9342 (mve_vabsq_m_f<mode>): Likewise.
9343 (mve_vaddlvaq_p_<supf>v4si): Likewise.
9344 (mve_vcmlaq_f<mode>): Likewise.
9345 (mve_vcmlaq_rot180_f<mode>): Likewise.
9346 (mve_vcmlaq_rot270_f<mode>): Likewise.
9347 (mve_vcmlaq_rot90_f<mode>): Likewise.
9348 (mve_vcmpeqq_m_n_f<mode>): Likewise.
9349 (mve_vcmpgeq_m_f<mode>): Likewise.
9350 (mve_vcmpgeq_m_n_f<mode>): Likewise.
9351 (mve_vcmpgtq_m_f<mode>): Likewise.
9352 (mve_vcmpgtq_m_n_f<mode>): Likewise.
9353 (mve_vcmpleq_m_f<mode>): Likewise.
9354 (mve_vcmpleq_m_n_f<mode>): Likewise.
9355 (mve_vcmpltq_m_f<mode>): Likewise.
9356 (mve_vcmpltq_m_n_f<mode>): Likewise.
9357 (mve_vcmpneq_m_f<mode>): Likewise.
9358 (mve_vcmpneq_m_n_f<mode>): Likewise.
9359 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
9360 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
9361 (mve_vcvttq_m_f16_f32v8hf): Likewise.
9362 (mve_vcvttq_m_f32_f16v4sf): Likewise.
9363 (mve_vdupq_m_n_f<mode>): Likewise.
9364 (mve_vfmaq_f<mode>): Likewise.
9365 (mve_vfmaq_n_f<mode>): Likewise.
9366 (mve_vfmasq_n_f<mode>): Likewise.
9367 (mve_vfmsq_f<mode>): Likewise.
9368 (mve_vmaxnmaq_m_f<mode>): Likewise.
9369 (mve_vmaxnmavq_p_f<mode>): Likewise.
9370 (mve_vmaxnmvq_p_f<mode>): Likewise.
9371 (mve_vminnmaq_m_f<mode>): Likewise.
9372 (mve_vminnmavq_p_f<mode>): Likewise.
9373 (mve_vminnmvq_p_f<mode>): Likewise.
9374 (mve_vmlaldavaq_<supf><mode>): Likewise.
9375 (mve_vmlaldavaxq_<supf><mode>): Likewise.
9376 (mve_vmlaldavq_p_<supf><mode>): Likewise.
9377 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
9378 (mve_vmlsldavaq_s<mode>): Likewise.
9379 (mve_vmlsldavaxq_s<mode>): Likewise.
9380 (mve_vmlsldavq_p_s<mode>): Likewise.
9381 (mve_vmlsldavxq_p_s<mode>): Likewise.
9382 (mve_vmovlbq_m_<supf><mode>): Likewise.
9383 (mve_vmovltq_m_<supf><mode>): Likewise.
9384 (mve_vmovnbq_m_<supf><mode>): Likewise.
9385 (mve_vmovntq_m_<supf><mode>): Likewise.
9386 (mve_vmvnq_m_n_<supf><mode>): Likewise.
9387 (mve_vnegq_m_f<mode>): Likewise.
9388 (mve_vorrq_m_n_<supf><mode>): Likewise.
9389 (mve_vpselq_f<mode>): Likewise.
9390 (mve_vqmovnbq_m_<supf><mode>): Likewise.
9391 (mve_vqmovntq_m_<supf><mode>): Likewise.
9392 (mve_vqmovunbq_m_s<mode>): Likewise.
9393 (mve_vqmovuntq_m_s<mode>): Likewise.
9394 (mve_vqrshrntq_n_<supf><mode>): Likewise.
9395 (mve_vqrshruntq_n_s<mode>): Likewise.
9396 (mve_vqshrnbq_n_<supf><mode>): Likewise.
9397 (mve_vqshrntq_n_<supf><mode>): Likewise.
9398 (mve_vqshrunbq_n_s<mode>): Likewise.
9399 (mve_vqshruntq_n_s<mode>): Likewise.
9400 (mve_vrev32q_m_fv8hf): Likewise.
9401 (mve_vrev32q_m_<supf><mode>): Likewise.
9402 (mve_vrev64q_m_f<mode>): Likewise.
9403 (mve_vrmlaldavhaxq_sv4si): Likewise.
9404 (mve_vrmlaldavhxq_p_sv4si): Likewise.
9405 (mve_vrmlsldavhaxq_sv4si): Likewise.
9406 (mve_vrmlsldavhq_p_sv4si): Likewise.
9407 (mve_vrmlsldavhxq_p_sv4si): Likewise.
9408 (mve_vrndaq_m_f<mode>): Likewise.
9409 (mve_vrndmq_m_f<mode>): Likewise.
9410 (mve_vrndnq_m_f<mode>): Likewise.
9411 (mve_vrndpq_m_f<mode>): Likewise.
9412 (mve_vrndxq_m_f<mode>): Likewise.
9413 (mve_vrshrnbq_n_<supf><mode>): Likewise.
9414 (mve_vrshrntq_n_<supf><mode>): Likewise.
9415 (mve_vshrnbq_n_<supf><mode>): Likewise.
9416 (mve_vshrntq_n_<supf><mode>): Likewise.
9417 (mve_vcvtmq_m_<supf><mode>): Likewise.
9418 (mve_vcvtpq_m_<supf><mode>): Likewise.
9419 (mve_vcvtnq_m_<supf><mode>): Likewise.
9420 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
9421 (mve_vrev16q_m_<supf>v16qi): Likewise.
9422 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
9423 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
9424 (mve_vrmlsldavhaq_sv4si): Likewise.
9426 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9427 Mihail Ionescu <mihail.ionescu@arm.com>
9428 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9430 * config/arm/arm_mve.h (vpselq_u8): Define macro.
9431 (vpselq_s8): Likewise.
9432 (vrev64q_m_u8): Likewise.
9433 (vqrdmlashq_n_u8): Likewise.
9434 (vqrdmlahq_n_u8): Likewise.
9435 (vqdmlahq_n_u8): Likewise.
9436 (vmvnq_m_u8): Likewise.
9437 (vmlasq_n_u8): Likewise.
9438 (vmlaq_n_u8): Likewise.
9439 (vmladavq_p_u8): Likewise.
9440 (vmladavaq_u8): Likewise.
9441 (vminvq_p_u8): Likewise.
9442 (vmaxvq_p_u8): Likewise.
9443 (vdupq_m_n_u8): Likewise.
9444 (vcmpneq_m_u8): Likewise.
9445 (vcmpneq_m_n_u8): Likewise.
9446 (vcmphiq_m_u8): Likewise.
9447 (vcmphiq_m_n_u8): Likewise.
9448 (vcmpeqq_m_u8): Likewise.
9449 (vcmpeqq_m_n_u8): Likewise.
9450 (vcmpcsq_m_u8): Likewise.
9451 (vcmpcsq_m_n_u8): Likewise.
9452 (vclzq_m_u8): Likewise.
9453 (vaddvaq_p_u8): Likewise.
9454 (vsriq_n_u8): Likewise.
9455 (vsliq_n_u8): Likewise.
9456 (vshlq_m_r_u8): Likewise.
9457 (vrshlq_m_n_u8): Likewise.
9458 (vqshlq_m_r_u8): Likewise.
9459 (vqrshlq_m_n_u8): Likewise.
9460 (vminavq_p_s8): Likewise.
9461 (vminaq_m_s8): Likewise.
9462 (vmaxavq_p_s8): Likewise.
9463 (vmaxaq_m_s8): Likewise.
9464 (vcmpneq_m_s8): Likewise.
9465 (vcmpneq_m_n_s8): Likewise.
9466 (vcmpltq_m_s8): Likewise.
9467 (vcmpltq_m_n_s8): Likewise.
9468 (vcmpleq_m_s8): Likewise.
9469 (vcmpleq_m_n_s8): Likewise.
9470 (vcmpgtq_m_s8): Likewise.
9471 (vcmpgtq_m_n_s8): Likewise.
9472 (vcmpgeq_m_s8): Likewise.
9473 (vcmpgeq_m_n_s8): Likewise.
9474 (vcmpeqq_m_s8): Likewise.
9475 (vcmpeqq_m_n_s8): Likewise.
9476 (vshlq_m_r_s8): Likewise.
9477 (vrshlq_m_n_s8): Likewise.
9478 (vrev64q_m_s8): Likewise.
9479 (vqshlq_m_r_s8): Likewise.
9480 (vqrshlq_m_n_s8): Likewise.
9481 (vqnegq_m_s8): Likewise.
9482 (vqabsq_m_s8): Likewise.
9483 (vnegq_m_s8): Likewise.
9484 (vmvnq_m_s8): Likewise.
9485 (vmlsdavxq_p_s8): Likewise.
9486 (vmlsdavq_p_s8): Likewise.
9487 (vmladavxq_p_s8): Likewise.
9488 (vmladavq_p_s8): Likewise.
9489 (vminvq_p_s8): Likewise.
9490 (vmaxvq_p_s8): Likewise.
9491 (vdupq_m_n_s8): Likewise.
9492 (vclzq_m_s8): Likewise.
9493 (vclsq_m_s8): Likewise.
9494 (vaddvaq_p_s8): Likewise.
9495 (vabsq_m_s8): Likewise.
9496 (vqrdmlsdhxq_s8): Likewise.
9497 (vqrdmlsdhq_s8): Likewise.
9498 (vqrdmlashq_n_s8): Likewise.
9499 (vqrdmlahq_n_s8): Likewise.
9500 (vqrdmladhxq_s8): Likewise.
9501 (vqrdmladhq_s8): Likewise.
9502 (vqdmlsdhxq_s8): Likewise.
9503 (vqdmlsdhq_s8): Likewise.
9504 (vqdmlahq_n_s8): Likewise.
9505 (vqdmladhxq_s8): Likewise.
9506 (vqdmladhq_s8): Likewise.
9507 (vmlsdavaxq_s8): Likewise.
9508 (vmlsdavaq_s8): Likewise.
9509 (vmlasq_n_s8): Likewise.
9510 (vmlaq_n_s8): Likewise.
9511 (vmladavaxq_s8): Likewise.
9512 (vmladavaq_s8): Likewise.
9513 (vsriq_n_s8): Likewise.
9514 (vsliq_n_s8): Likewise.
9515 (vpselq_u16): Likewise.
9516 (vpselq_s16): Likewise.
9517 (vrev64q_m_u16): Likewise.
9518 (vqrdmlashq_n_u16): Likewise.
9519 (vqrdmlahq_n_u16): Likewise.
9520 (vqdmlahq_n_u16): Likewise.
9521 (vmvnq_m_u16): Likewise.
9522 (vmlasq_n_u16): Likewise.
9523 (vmlaq_n_u16): Likewise.
9524 (vmladavq_p_u16): Likewise.
9525 (vmladavaq_u16): Likewise.
9526 (vminvq_p_u16): Likewise.
9527 (vmaxvq_p_u16): Likewise.
9528 (vdupq_m_n_u16): Likewise.
9529 (vcmpneq_m_u16): Likewise.
9530 (vcmpneq_m_n_u16): Likewise.
9531 (vcmphiq_m_u16): Likewise.
9532 (vcmphiq_m_n_u16): Likewise.
9533 (vcmpeqq_m_u16): Likewise.
9534 (vcmpeqq_m_n_u16): Likewise.
9535 (vcmpcsq_m_u16): Likewise.
9536 (vcmpcsq_m_n_u16): Likewise.
9537 (vclzq_m_u16): Likewise.
9538 (vaddvaq_p_u16): Likewise.
9539 (vsriq_n_u16): Likewise.
9540 (vsliq_n_u16): Likewise.
9541 (vshlq_m_r_u16): Likewise.
9542 (vrshlq_m_n_u16): Likewise.
9543 (vqshlq_m_r_u16): Likewise.
9544 (vqrshlq_m_n_u16): Likewise.
9545 (vminavq_p_s16): Likewise.
9546 (vminaq_m_s16): Likewise.
9547 (vmaxavq_p_s16): Likewise.
9548 (vmaxaq_m_s16): Likewise.
9549 (vcmpneq_m_s16): Likewise.
9550 (vcmpneq_m_n_s16): Likewise.
9551 (vcmpltq_m_s16): Likewise.
9552 (vcmpltq_m_n_s16): Likewise.
9553 (vcmpleq_m_s16): Likewise.
9554 (vcmpleq_m_n_s16): Likewise.
9555 (vcmpgtq_m_s16): Likewise.
9556 (vcmpgtq_m_n_s16): Likewise.
9557 (vcmpgeq_m_s16): Likewise.
9558 (vcmpgeq_m_n_s16): Likewise.
9559 (vcmpeqq_m_s16): Likewise.
9560 (vcmpeqq_m_n_s16): Likewise.
9561 (vshlq_m_r_s16): Likewise.
9562 (vrshlq_m_n_s16): Likewise.
9563 (vrev64q_m_s16): Likewise.
9564 (vqshlq_m_r_s16): Likewise.
9565 (vqrshlq_m_n_s16): Likewise.
9566 (vqnegq_m_s16): Likewise.
9567 (vqabsq_m_s16): Likewise.
9568 (vnegq_m_s16): Likewise.
9569 (vmvnq_m_s16): Likewise.
9570 (vmlsdavxq_p_s16): Likewise.
9571 (vmlsdavq_p_s16): Likewise.
9572 (vmladavxq_p_s16): Likewise.
9573 (vmladavq_p_s16): Likewise.
9574 (vminvq_p_s16): Likewise.
9575 (vmaxvq_p_s16): Likewise.
9576 (vdupq_m_n_s16): Likewise.
9577 (vclzq_m_s16): Likewise.
9578 (vclsq_m_s16): Likewise.
9579 (vaddvaq_p_s16): Likewise.
9580 (vabsq_m_s16): Likewise.
9581 (vqrdmlsdhxq_s16): Likewise.
9582 (vqrdmlsdhq_s16): Likewise.
9583 (vqrdmlashq_n_s16): Likewise.
9584 (vqrdmlahq_n_s16): Likewise.
9585 (vqrdmladhxq_s16): Likewise.
9586 (vqrdmladhq_s16): Likewise.
9587 (vqdmlsdhxq_s16): Likewise.
9588 (vqdmlsdhq_s16): Likewise.
9589 (vqdmlahq_n_s16): Likewise.
9590 (vqdmladhxq_s16): Likewise.
9591 (vqdmladhq_s16): Likewise.
9592 (vmlsdavaxq_s16): Likewise.
9593 (vmlsdavaq_s16): Likewise.
9594 (vmlasq_n_s16): Likewise.
9595 (vmlaq_n_s16): Likewise.
9596 (vmladavaxq_s16): Likewise.
9597 (vmladavaq_s16): Likewise.
9598 (vsriq_n_s16): Likewise.
9599 (vsliq_n_s16): Likewise.
9600 (vpselq_u32): Likewise.
9601 (vpselq_s32): Likewise.
9602 (vrev64q_m_u32): Likewise.
9603 (vqrdmlashq_n_u32): Likewise.
9604 (vqrdmlahq_n_u32): Likewise.
9605 (vqdmlahq_n_u32): Likewise.
9606 (vmvnq_m_u32): Likewise.
9607 (vmlasq_n_u32): Likewise.
9608 (vmlaq_n_u32): Likewise.
9609 (vmladavq_p_u32): Likewise.
9610 (vmladavaq_u32): Likewise.
9611 (vminvq_p_u32): Likewise.
9612 (vmaxvq_p_u32): Likewise.
9613 (vdupq_m_n_u32): Likewise.
9614 (vcmpneq_m_u32): Likewise.
9615 (vcmpneq_m_n_u32): Likewise.
9616 (vcmphiq_m_u32): Likewise.
9617 (vcmphiq_m_n_u32): Likewise.
9618 (vcmpeqq_m_u32): Likewise.
9619 (vcmpeqq_m_n_u32): Likewise.
9620 (vcmpcsq_m_u32): Likewise.
9621 (vcmpcsq_m_n_u32): Likewise.
9622 (vclzq_m_u32): Likewise.
9623 (vaddvaq_p_u32): Likewise.
9624 (vsriq_n_u32): Likewise.
9625 (vsliq_n_u32): Likewise.
9626 (vshlq_m_r_u32): Likewise.
9627 (vrshlq_m_n_u32): Likewise.
9628 (vqshlq_m_r_u32): Likewise.
9629 (vqrshlq_m_n_u32): Likewise.
9630 (vminavq_p_s32): Likewise.
9631 (vminaq_m_s32): Likewise.
9632 (vmaxavq_p_s32): Likewise.
9633 (vmaxaq_m_s32): Likewise.
9634 (vcmpneq_m_s32): Likewise.
9635 (vcmpneq_m_n_s32): Likewise.
9636 (vcmpltq_m_s32): Likewise.
9637 (vcmpltq_m_n_s32): Likewise.
9638 (vcmpleq_m_s32): Likewise.
9639 (vcmpleq_m_n_s32): Likewise.
9640 (vcmpgtq_m_s32): Likewise.
9641 (vcmpgtq_m_n_s32): Likewise.
9642 (vcmpgeq_m_s32): Likewise.
9643 (vcmpgeq_m_n_s32): Likewise.
9644 (vcmpeqq_m_s32): Likewise.
9645 (vcmpeqq_m_n_s32): Likewise.
9646 (vshlq_m_r_s32): Likewise.
9647 (vrshlq_m_n_s32): Likewise.
9648 (vrev64q_m_s32): Likewise.
9649 (vqshlq_m_r_s32): Likewise.
9650 (vqrshlq_m_n_s32): Likewise.
9651 (vqnegq_m_s32): Likewise.
9652 (vqabsq_m_s32): Likewise.
9653 (vnegq_m_s32): Likewise.
9654 (vmvnq_m_s32): Likewise.
9655 (vmlsdavxq_p_s32): Likewise.
9656 (vmlsdavq_p_s32): Likewise.
9657 (vmladavxq_p_s32): Likewise.
9658 (vmladavq_p_s32): Likewise.
9659 (vminvq_p_s32): Likewise.
9660 (vmaxvq_p_s32): Likewise.
9661 (vdupq_m_n_s32): Likewise.
9662 (vclzq_m_s32): Likewise.
9663 (vclsq_m_s32): Likewise.
9664 (vaddvaq_p_s32): Likewise.
9665 (vabsq_m_s32): Likewise.
9666 (vqrdmlsdhxq_s32): Likewise.
9667 (vqrdmlsdhq_s32): Likewise.
9668 (vqrdmlashq_n_s32): Likewise.
9669 (vqrdmlahq_n_s32): Likewise.
9670 (vqrdmladhxq_s32): Likewise.
9671 (vqrdmladhq_s32): Likewise.
9672 (vqdmlsdhxq_s32): Likewise.
9673 (vqdmlsdhq_s32): Likewise.
9674 (vqdmlahq_n_s32): Likewise.
9675 (vqdmladhxq_s32): Likewise.
9676 (vqdmladhq_s32): Likewise.
9677 (vmlsdavaxq_s32): Likewise.
9678 (vmlsdavaq_s32): Likewise.
9679 (vmlasq_n_s32): Likewise.
9680 (vmlaq_n_s32): Likewise.
9681 (vmladavaxq_s32): Likewise.
9682 (vmladavaq_s32): Likewise.
9683 (vsriq_n_s32): Likewise.
9684 (vsliq_n_s32): Likewise.
9685 (vpselq_u64): Likewise.
9686 (vpselq_s64): Likewise.
9687 (__arm_vpselq_u8): Define intrinsic.
9688 (__arm_vpselq_s8): Likewise.
9689 (__arm_vrev64q_m_u8): Likewise.
9690 (__arm_vqrdmlashq_n_u8): Likewise.
9691 (__arm_vqrdmlahq_n_u8): Likewise.
9692 (__arm_vqdmlahq_n_u8): Likewise.
9693 (__arm_vmvnq_m_u8): Likewise.
9694 (__arm_vmlasq_n_u8): Likewise.
9695 (__arm_vmlaq_n_u8): Likewise.
9696 (__arm_vmladavq_p_u8): Likewise.
9697 (__arm_vmladavaq_u8): Likewise.
9698 (__arm_vminvq_p_u8): Likewise.
9699 (__arm_vmaxvq_p_u8): Likewise.
9700 (__arm_vdupq_m_n_u8): Likewise.
9701 (__arm_vcmpneq_m_u8): Likewise.
9702 (__arm_vcmpneq_m_n_u8): Likewise.
9703 (__arm_vcmphiq_m_u8): Likewise.
9704 (__arm_vcmphiq_m_n_u8): Likewise.
9705 (__arm_vcmpeqq_m_u8): Likewise.
9706 (__arm_vcmpeqq_m_n_u8): Likewise.
9707 (__arm_vcmpcsq_m_u8): Likewise.
9708 (__arm_vcmpcsq_m_n_u8): Likewise.
9709 (__arm_vclzq_m_u8): Likewise.
9710 (__arm_vaddvaq_p_u8): Likewise.
9711 (__arm_vsriq_n_u8): Likewise.
9712 (__arm_vsliq_n_u8): Likewise.
9713 (__arm_vshlq_m_r_u8): Likewise.
9714 (__arm_vrshlq_m_n_u8): Likewise.
9715 (__arm_vqshlq_m_r_u8): Likewise.
9716 (__arm_vqrshlq_m_n_u8): Likewise.
9717 (__arm_vminavq_p_s8): Likewise.
9718 (__arm_vminaq_m_s8): Likewise.
9719 (__arm_vmaxavq_p_s8): Likewise.
9720 (__arm_vmaxaq_m_s8): Likewise.
9721 (__arm_vcmpneq_m_s8): Likewise.
9722 (__arm_vcmpneq_m_n_s8): Likewise.
9723 (__arm_vcmpltq_m_s8): Likewise.
9724 (__arm_vcmpltq_m_n_s8): Likewise.
9725 (__arm_vcmpleq_m_s8): Likewise.
9726 (__arm_vcmpleq_m_n_s8): Likewise.
9727 (__arm_vcmpgtq_m_s8): Likewise.
9728 (__arm_vcmpgtq_m_n_s8): Likewise.
9729 (__arm_vcmpgeq_m_s8): Likewise.
9730 (__arm_vcmpgeq_m_n_s8): Likewise.
9731 (__arm_vcmpeqq_m_s8): Likewise.
9732 (__arm_vcmpeqq_m_n_s8): Likewise.
9733 (__arm_vshlq_m_r_s8): Likewise.
9734 (__arm_vrshlq_m_n_s8): Likewise.
9735 (__arm_vrev64q_m_s8): Likewise.
9736 (__arm_vqshlq_m_r_s8): Likewise.
9737 (__arm_vqrshlq_m_n_s8): Likewise.
9738 (__arm_vqnegq_m_s8): Likewise.
9739 (__arm_vqabsq_m_s8): Likewise.
9740 (__arm_vnegq_m_s8): Likewise.
9741 (__arm_vmvnq_m_s8): Likewise.
9742 (__arm_vmlsdavxq_p_s8): Likewise.
9743 (__arm_vmlsdavq_p_s8): Likewise.
9744 (__arm_vmladavxq_p_s8): Likewise.
9745 (__arm_vmladavq_p_s8): Likewise.
9746 (__arm_vminvq_p_s8): Likewise.
9747 (__arm_vmaxvq_p_s8): Likewise.
9748 (__arm_vdupq_m_n_s8): Likewise.
9749 (__arm_vclzq_m_s8): Likewise.
9750 (__arm_vclsq_m_s8): Likewise.
9751 (__arm_vaddvaq_p_s8): Likewise.
9752 (__arm_vabsq_m_s8): Likewise.
9753 (__arm_vqrdmlsdhxq_s8): Likewise.
9754 (__arm_vqrdmlsdhq_s8): Likewise.
9755 (__arm_vqrdmlashq_n_s8): Likewise.
9756 (__arm_vqrdmlahq_n_s8): Likewise.
9757 (__arm_vqrdmladhxq_s8): Likewise.
9758 (__arm_vqrdmladhq_s8): Likewise.
9759 (__arm_vqdmlsdhxq_s8): Likewise.
9760 (__arm_vqdmlsdhq_s8): Likewise.
9761 (__arm_vqdmlahq_n_s8): Likewise.
9762 (__arm_vqdmladhxq_s8): Likewise.
9763 (__arm_vqdmladhq_s8): Likewise.
9764 (__arm_vmlsdavaxq_s8): Likewise.
9765 (__arm_vmlsdavaq_s8): Likewise.
9766 (__arm_vmlasq_n_s8): Likewise.
9767 (__arm_vmlaq_n_s8): Likewise.
9768 (__arm_vmladavaxq_s8): Likewise.
9769 (__arm_vmladavaq_s8): Likewise.
9770 (__arm_vsriq_n_s8): Likewise.
9771 (__arm_vsliq_n_s8): Likewise.
9772 (__arm_vpselq_u16): Likewise.
9773 (__arm_vpselq_s16): Likewise.
9774 (__arm_vrev64q_m_u16): Likewise.
9775 (__arm_vqrdmlashq_n_u16): Likewise.
9776 (__arm_vqrdmlahq_n_u16): Likewise.
9777 (__arm_vqdmlahq_n_u16): Likewise.
9778 (__arm_vmvnq_m_u16): Likewise.
9779 (__arm_vmlasq_n_u16): Likewise.
9780 (__arm_vmlaq_n_u16): Likewise.
9781 (__arm_vmladavq_p_u16): Likewise.
9782 (__arm_vmladavaq_u16): Likewise.
9783 (__arm_vminvq_p_u16): Likewise.
9784 (__arm_vmaxvq_p_u16): Likewise.
9785 (__arm_vdupq_m_n_u16): Likewise.
9786 (__arm_vcmpneq_m_u16): Likewise.
9787 (__arm_vcmpneq_m_n_u16): Likewise.
9788 (__arm_vcmphiq_m_u16): Likewise.
9789 (__arm_vcmphiq_m_n_u16): Likewise.
9790 (__arm_vcmpeqq_m_u16): Likewise.
9791 (__arm_vcmpeqq_m_n_u16): Likewise.
9792 (__arm_vcmpcsq_m_u16): Likewise.
9793 (__arm_vcmpcsq_m_n_u16): Likewise.
9794 (__arm_vclzq_m_u16): Likewise.
9795 (__arm_vaddvaq_p_u16): Likewise.
9796 (__arm_vsriq_n_u16): Likewise.
9797 (__arm_vsliq_n_u16): Likewise.
9798 (__arm_vshlq_m_r_u16): Likewise.
9799 (__arm_vrshlq_m_n_u16): Likewise.
9800 (__arm_vqshlq_m_r_u16): Likewise.
9801 (__arm_vqrshlq_m_n_u16): Likewise.
9802 (__arm_vminavq_p_s16): Likewise.
9803 (__arm_vminaq_m_s16): Likewise.
9804 (__arm_vmaxavq_p_s16): Likewise.
9805 (__arm_vmaxaq_m_s16): Likewise.
9806 (__arm_vcmpneq_m_s16): Likewise.
9807 (__arm_vcmpneq_m_n_s16): Likewise.
9808 (__arm_vcmpltq_m_s16): Likewise.
9809 (__arm_vcmpltq_m_n_s16): Likewise.
9810 (__arm_vcmpleq_m_s16): Likewise.
9811 (__arm_vcmpleq_m_n_s16): Likewise.
9812 (__arm_vcmpgtq_m_s16): Likewise.
9813 (__arm_vcmpgtq_m_n_s16): Likewise.
9814 (__arm_vcmpgeq_m_s16): Likewise.
9815 (__arm_vcmpgeq_m_n_s16): Likewise.
9816 (__arm_vcmpeqq_m_s16): Likewise.
9817 (__arm_vcmpeqq_m_n_s16): Likewise.
9818 (__arm_vshlq_m_r_s16): Likewise.
9819 (__arm_vrshlq_m_n_s16): Likewise.
9820 (__arm_vrev64q_m_s16): Likewise.
9821 (__arm_vqshlq_m_r_s16): Likewise.
9822 (__arm_vqrshlq_m_n_s16): Likewise.
9823 (__arm_vqnegq_m_s16): Likewise.
9824 (__arm_vqabsq_m_s16): Likewise.
9825 (__arm_vnegq_m_s16): Likewise.
9826 (__arm_vmvnq_m_s16): Likewise.
9827 (__arm_vmlsdavxq_p_s16): Likewise.
9828 (__arm_vmlsdavq_p_s16): Likewise.
9829 (__arm_vmladavxq_p_s16): Likewise.
9830 (__arm_vmladavq_p_s16): Likewise.
9831 (__arm_vminvq_p_s16): Likewise.
9832 (__arm_vmaxvq_p_s16): Likewise.
9833 (__arm_vdupq_m_n_s16): Likewise.
9834 (__arm_vclzq_m_s16): Likewise.
9835 (__arm_vclsq_m_s16): Likewise.
9836 (__arm_vaddvaq_p_s16): Likewise.
9837 (__arm_vabsq_m_s16): Likewise.
9838 (__arm_vqrdmlsdhxq_s16): Likewise.
9839 (__arm_vqrdmlsdhq_s16): Likewise.
9840 (__arm_vqrdmlashq_n_s16): Likewise.
9841 (__arm_vqrdmlahq_n_s16): Likewise.
9842 (__arm_vqrdmladhxq_s16): Likewise.
9843 (__arm_vqrdmladhq_s16): Likewise.
9844 (__arm_vqdmlsdhxq_s16): Likewise.
9845 (__arm_vqdmlsdhq_s16): Likewise.
9846 (__arm_vqdmlahq_n_s16): Likewise.
9847 (__arm_vqdmladhxq_s16): Likewise.
9848 (__arm_vqdmladhq_s16): Likewise.
9849 (__arm_vmlsdavaxq_s16): Likewise.
9850 (__arm_vmlsdavaq_s16): Likewise.
9851 (__arm_vmlasq_n_s16): Likewise.
9852 (__arm_vmlaq_n_s16): Likewise.
9853 (__arm_vmladavaxq_s16): Likewise.
9854 (__arm_vmladavaq_s16): Likewise.
9855 (__arm_vsriq_n_s16): Likewise.
9856 (__arm_vsliq_n_s16): Likewise.
9857 (__arm_vpselq_u32): Likewise.
9858 (__arm_vpselq_s32): Likewise.
9859 (__arm_vrev64q_m_u32): Likewise.
9860 (__arm_vqrdmlashq_n_u32): Likewise.
9861 (__arm_vqrdmlahq_n_u32): Likewise.
9862 (__arm_vqdmlahq_n_u32): Likewise.
9863 (__arm_vmvnq_m_u32): Likewise.
9864 (__arm_vmlasq_n_u32): Likewise.
9865 (__arm_vmlaq_n_u32): Likewise.
9866 (__arm_vmladavq_p_u32): Likewise.
9867 (__arm_vmladavaq_u32): Likewise.
9868 (__arm_vminvq_p_u32): Likewise.
9869 (__arm_vmaxvq_p_u32): Likewise.
9870 (__arm_vdupq_m_n_u32): Likewise.
9871 (__arm_vcmpneq_m_u32): Likewise.
9872 (__arm_vcmpneq_m_n_u32): Likewise.
9873 (__arm_vcmphiq_m_u32): Likewise.
9874 (__arm_vcmphiq_m_n_u32): Likewise.
9875 (__arm_vcmpeqq_m_u32): Likewise.
9876 (__arm_vcmpeqq_m_n_u32): Likewise.
9877 (__arm_vcmpcsq_m_u32): Likewise.
9878 (__arm_vcmpcsq_m_n_u32): Likewise.
9879 (__arm_vclzq_m_u32): Likewise.
9880 (__arm_vaddvaq_p_u32): Likewise.
9881 (__arm_vsriq_n_u32): Likewise.
9882 (__arm_vsliq_n_u32): Likewise.
9883 (__arm_vshlq_m_r_u32): Likewise.
9884 (__arm_vrshlq_m_n_u32): Likewise.
9885 (__arm_vqshlq_m_r_u32): Likewise.
9886 (__arm_vqrshlq_m_n_u32): Likewise.
9887 (__arm_vminavq_p_s32): Likewise.
9888 (__arm_vminaq_m_s32): Likewise.
9889 (__arm_vmaxavq_p_s32): Likewise.
9890 (__arm_vmaxaq_m_s32): Likewise.
9891 (__arm_vcmpneq_m_s32): Likewise.
9892 (__arm_vcmpneq_m_n_s32): Likewise.
9893 (__arm_vcmpltq_m_s32): Likewise.
9894 (__arm_vcmpltq_m_n_s32): Likewise.
9895 (__arm_vcmpleq_m_s32): Likewise.
9896 (__arm_vcmpleq_m_n_s32): Likewise.
9897 (__arm_vcmpgtq_m_s32): Likewise.
9898 (__arm_vcmpgtq_m_n_s32): Likewise.
9899 (__arm_vcmpgeq_m_s32): Likewise.
9900 (__arm_vcmpgeq_m_n_s32): Likewise.
9901 (__arm_vcmpeqq_m_s32): Likewise.
9902 (__arm_vcmpeqq_m_n_s32): Likewise.
9903 (__arm_vshlq_m_r_s32): Likewise.
9904 (__arm_vrshlq_m_n_s32): Likewise.
9905 (__arm_vrev64q_m_s32): Likewise.
9906 (__arm_vqshlq_m_r_s32): Likewise.
9907 (__arm_vqrshlq_m_n_s32): Likewise.
9908 (__arm_vqnegq_m_s32): Likewise.
9909 (__arm_vqabsq_m_s32): Likewise.
9910 (__arm_vnegq_m_s32): Likewise.
9911 (__arm_vmvnq_m_s32): Likewise.
9912 (__arm_vmlsdavxq_p_s32): Likewise.
9913 (__arm_vmlsdavq_p_s32): Likewise.
9914 (__arm_vmladavxq_p_s32): Likewise.
9915 (__arm_vmladavq_p_s32): Likewise.
9916 (__arm_vminvq_p_s32): Likewise.
9917 (__arm_vmaxvq_p_s32): Likewise.
9918 (__arm_vdupq_m_n_s32): Likewise.
9919 (__arm_vclzq_m_s32): Likewise.
9920 (__arm_vclsq_m_s32): Likewise.
9921 (__arm_vaddvaq_p_s32): Likewise.
9922 (__arm_vabsq_m_s32): Likewise.
9923 (__arm_vqrdmlsdhxq_s32): Likewise.
9924 (__arm_vqrdmlsdhq_s32): Likewise.
9925 (__arm_vqrdmlashq_n_s32): Likewise.
9926 (__arm_vqrdmlahq_n_s32): Likewise.
9927 (__arm_vqrdmladhxq_s32): Likewise.
9928 (__arm_vqrdmladhq_s32): Likewise.
9929 (__arm_vqdmlsdhxq_s32): Likewise.
9930 (__arm_vqdmlsdhq_s32): Likewise.
9931 (__arm_vqdmlahq_n_s32): Likewise.
9932 (__arm_vqdmladhxq_s32): Likewise.
9933 (__arm_vqdmladhq_s32): Likewise.
9934 (__arm_vmlsdavaxq_s32): Likewise.
9935 (__arm_vmlsdavaq_s32): Likewise.
9936 (__arm_vmlasq_n_s32): Likewise.
9937 (__arm_vmlaq_n_s32): Likewise.
9938 (__arm_vmladavaxq_s32): Likewise.
9939 (__arm_vmladavaq_s32): Likewise.
9940 (__arm_vsriq_n_s32): Likewise.
9941 (__arm_vsliq_n_s32): Likewise.
9942 (__arm_vpselq_u64): Likewise.
9943 (__arm_vpselq_s64): Likewise.
9944 (vcmpneq_m_n): Define polymorphic variant.
9945 (vcmpneq_m): Likewise.
9946 (vqrdmlsdhq): Likewise.
9947 (vqrdmlsdhxq): Likewise.
9948 (vqrshlq_m_n): Likewise.
9949 (vqshlq_m_r): Likewise.
9950 (vrev64q_m): Likewise.
9951 (vrshlq_m_n): Likewise.
9952 (vshlq_m_r): Likewise.
9953 (vsliq_n): Likewise.
9954 (vsriq_n): Likewise.
9955 (vqrdmlashq_n): Likewise.
9956 (vqrdmlahq): Likewise.
9957 (vqrdmladhxq): Likewise.
9958 (vqrdmladhq): Likewise.
9959 (vqnegq_m): Likewise.
9960 (vqdmlsdhxq): Likewise.
9961 (vabsq_m): Likewise.
9962 (vclsq_m): Likewise.
9963 (vclzq_m): Likewise.
9964 (vcmpgeq_m): Likewise.
9965 (vcmpgeq_m_n): Likewise.
9966 (vdupq_m_n): Likewise.
9967 (vmaxaq_m): Likewise.
9968 (vmlaq_n): Likewise.
9969 (vmlasq_n): Likewise.
9970 (vmvnq_m): Likewise.
9971 (vnegq_m): Likewise.
9973 (vqdmlahq_n): Likewise.
9974 (vqrdmlahq_n): Likewise.
9975 (vqdmlsdhq): Likewise.
9976 (vqdmladhq): Likewise.
9977 (vqabsq_m): Likewise.
9978 (vminaq_m): Likewise.
9979 (vrmlaldavhaq): Likewise.
9980 (vmlsdavxq_p): Likewise.
9981 (vmlsdavq_p): Likewise.
9982 (vmlsdavaxq): Likewise.
9983 (vmlsdavaq): Likewise.
9984 (vaddvaq_p): Likewise.
9985 (vcmpcsq_m_n): Likewise.
9986 (vcmpcsq_m): Likewise.
9987 (vcmpeqq_m_n): Likewise.
9988 (vcmpeqq_m): Likewise.
9989 (vmladavxq_p): Likewise.
9990 (vmladavq_p): Likewise.
9991 (vmladavaxq): Likewise.
9992 (vmladavaq): Likewise.
9993 (vminvq_p): Likewise.
9994 (vminavq_p): Likewise.
9995 (vmaxvq_p): Likewise.
9996 (vmaxavq_p): Likewise.
9997 (vcmpltq_m_n): Likewise.
9998 (vcmpltq_m): Likewise.
9999 (vcmpleq_m): Likewise.
10000 (vcmpleq_m_n): Likewise.
10001 (vcmphiq_m_n): Likewise.
10002 (vcmphiq_m): Likewise.
10003 (vcmpgtq_m_n): Likewise.
10004 (vcmpgtq_m): Likewise.
10005 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
10007 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
10008 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
10009 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
10010 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
10011 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
10012 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
10013 * config/arm/constraints.md (Rc): Define constraint to check constant is
10014 in the range of 0 to 15.
10015 (Re): Define constraint to check constant is in the range of 0 to 31.
10016 * config/arm/mve.md (VADDVAQ_P): Define iterator.
10017 (VCLZQ_M): Likewise.
10018 (VCMPEQQ_M_N): Likewise.
10019 (VCMPEQQ_M): Likewise.
10020 (VCMPNEQ_M_N): Likewise.
10021 (VCMPNEQ_M): Likewise.
10022 (VDUPQ_M_N): Likewise.
10023 (VMAXVQ_P): Likewise.
10024 (VMINVQ_P): Likewise.
10025 (VMLADAVAQ): Likewise.
10026 (VMLADAVQ_P): Likewise.
10027 (VMLAQ_N): Likewise.
10028 (VMLASQ_N): Likewise.
10029 (VMVNQ_M): Likewise.
10030 (VPSELQ): Likewise.
10031 (VQDMLAHQ_N): Likewise.
10032 (VQRDMLAHQ_N): Likewise.
10033 (VQRDMLASHQ_N): Likewise.
10034 (VQRSHLQ_M_N): Likewise.
10035 (VQSHLQ_M_R): Likewise.
10036 (VREV64Q_M): Likewise.
10037 (VRSHLQ_M_N): Likewise.
10038 (VSHLQ_M_R): Likewise.
10039 (VSLIQ_N): Likewise.
10040 (VSRIQ_N): Likewise.
10041 (mve_vabsq_m_s<mode>): Define RTL pattern.
10042 (mve_vaddvaq_p_<supf><mode>): Likewise.
10043 (mve_vclsq_m_s<mode>): Likewise.
10044 (mve_vclzq_m_<supf><mode>): Likewise.
10045 (mve_vcmpcsq_m_n_u<mode>): Likewise.
10046 (mve_vcmpcsq_m_u<mode>): Likewise.
10047 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
10048 (mve_vcmpeqq_m_<supf><mode>): Likewise.
10049 (mve_vcmpgeq_m_n_s<mode>): Likewise.
10050 (mve_vcmpgeq_m_s<mode>): Likewise.
10051 (mve_vcmpgtq_m_n_s<mode>): Likewise.
10052 (mve_vcmpgtq_m_s<mode>): Likewise.
10053 (mve_vcmphiq_m_n_u<mode>): Likewise.
10054 (mve_vcmphiq_m_u<mode>): Likewise.
10055 (mve_vcmpleq_m_n_s<mode>): Likewise.
10056 (mve_vcmpleq_m_s<mode>): Likewise.
10057 (mve_vcmpltq_m_n_s<mode>): Likewise.
10058 (mve_vcmpltq_m_s<mode>): Likewise.
10059 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
10060 (mve_vcmpneq_m_<supf><mode>): Likewise.
10061 (mve_vdupq_m_n_<supf><mode>): Likewise.
10062 (mve_vmaxaq_m_s<mode>): Likewise.
10063 (mve_vmaxavq_p_s<mode>): Likewise.
10064 (mve_vmaxvq_p_<supf><mode>): Likewise.
10065 (mve_vminaq_m_s<mode>): Likewise.
10066 (mve_vminavq_p_s<mode>): Likewise.
10067 (mve_vminvq_p_<supf><mode>): Likewise.
10068 (mve_vmladavaq_<supf><mode>): Likewise.
10069 (mve_vmladavq_p_<supf><mode>): Likewise.
10070 (mve_vmladavxq_p_s<mode>): Likewise.
10071 (mve_vmlaq_n_<supf><mode>): Likewise.
10072 (mve_vmlasq_n_<supf><mode>): Likewise.
10073 (mve_vmlsdavq_p_s<mode>): Likewise.
10074 (mve_vmlsdavxq_p_s<mode>): Likewise.
10075 (mve_vmvnq_m_<supf><mode>): Likewise.
10076 (mve_vnegq_m_s<mode>): Likewise.
10077 (mve_vpselq_<supf><mode>): Likewise.
10078 (mve_vqabsq_m_s<mode>): Likewise.
10079 (mve_vqdmlahq_n_<supf><mode>): Likewise.
10080 (mve_vqnegq_m_s<mode>): Likewise.
10081 (mve_vqrdmladhq_s<mode>): Likewise.
10082 (mve_vqrdmladhxq_s<mode>): Likewise.
10083 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
10084 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
10085 (mve_vqrdmlsdhq_s<mode>): Likewise.
10086 (mve_vqrdmlsdhxq_s<mode>): Likewise.
10087 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
10088 (mve_vqshlq_m_r_<supf><mode>): Likewise.
10089 (mve_vrev64q_m_<supf><mode>): Likewise.
10090 (mve_vrshlq_m_n_<supf><mode>): Likewise.
10091 (mve_vshlq_m_r_<supf><mode>): Likewise.
10092 (mve_vsliq_n_<supf><mode>): Likewise.
10093 (mve_vsriq_n_<supf><mode>): Likewise.
10094 (mve_vqdmlsdhxq_s<mode>): Likewise.
10095 (mve_vqdmlsdhq_s<mode>): Likewise.
10096 (mve_vqdmladhxq_s<mode>): Likewise.
10097 (mve_vqdmladhq_s<mode>): Likewise.
10098 (mve_vmlsdavaxq_s<mode>): Likewise.
10099 (mve_vmlsdavaq_s<mode>): Likewise.
10100 (mve_vmladavaxq_s<mode>): Likewise.
10101 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
10102 matching constraint Rc.
10103 (mve_imm_31): Define predicate to check the matching constraint Re.
10105 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10107 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
10108 (vec_cmp<mode>di_dup): Likewise.
10109 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
10111 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
10113 * config/gcn/gcn-valu.md (COND_MODE): Delete.
10114 (COND_INT_MODE): Delete.
10115 (cond_op): Add "mult".
10116 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
10117 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
10119 2020-03-18 Richard Biener <rguenther@suse.de>
10121 PR middle-end/94206
10122 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
10123 partial int modes or not mode-precision integer types for
10126 2020-03-18 Jakub Jelinek <jakub@redhat.com>
10128 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
10130 * config/arc/arc.c (frame_stack_add): Likewise.
10131 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
10133 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
10134 * tree-ssa-strlen.h (handle_printf_call): Likewise.
10135 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
10136 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
10138 2020-03-18 Duan bo <duanbo3@huawei.com>
10141 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
10142 (@ldr_got_tiny_<mode>): New pattern.
10143 (ldr_got_tiny_sidi): Likewise.
10144 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
10145 them to handle SYMBOL_TINY_GOT for ILP32.
10147 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
10149 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
10150 call-preserved for SVE PCS functions.
10151 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
10152 Optimize the case in which there are no following vector save slots.
10154 2020-03-18 Richard Biener <rguenther@suse.de>
10156 PR middle-end/94188
10157 * fold-const.c (build_fold_addr_expr): Convert address to
10159 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
10160 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
10161 to build the ADDR_EXPR which we don't really want to simplify.
10162 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
10163 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
10164 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
10165 (simplify_builtin_call): Strip useless type conversions.
10166 * tree-ssa-strlen.c (new_strinfo): Likewise.
10168 2020-03-17 Alexey Neyman <stilor@att.net>
10171 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
10172 the debug level is terse and the declaration is public. Do not
10173 generate type info.
10174 (dwarf2out_decl): Same.
10175 (add_type_attribute): Return immediately if debug level is
10178 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
10180 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
10182 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10183 Mihail Ionescu <mihail.ionescu@arm.com>
10184 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10186 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
10187 Define qualifier for ternary operands.
10188 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10189 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10190 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10191 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10192 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10193 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10194 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10195 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10196 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10197 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10198 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10199 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10200 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10201 * config/arm/arm_mve.h (vabavq_s8): Define macro.
10202 (vabavq_s16): Likewise.
10203 (vabavq_s32): Likewise.
10204 (vbicq_m_n_s16): Likewise.
10205 (vbicq_m_n_s32): Likewise.
10206 (vbicq_m_n_u16): Likewise.
10207 (vbicq_m_n_u32): Likewise.
10208 (vcmpeqq_m_f16): Likewise.
10209 (vcmpeqq_m_f32): Likewise.
10210 (vcvtaq_m_s16_f16): Likewise.
10211 (vcvtaq_m_u16_f16): Likewise.
10212 (vcvtaq_m_s32_f32): Likewise.
10213 (vcvtaq_m_u32_f32): Likewise.
10214 (vcvtq_m_f16_s16): Likewise.
10215 (vcvtq_m_f16_u16): Likewise.
10216 (vcvtq_m_f32_s32): Likewise.
10217 (vcvtq_m_f32_u32): Likewise.
10218 (vqrshrnbq_n_s16): Likewise.
10219 (vqrshrnbq_n_u16): Likewise.
10220 (vqrshrnbq_n_s32): Likewise.
10221 (vqrshrnbq_n_u32): Likewise.
10222 (vqrshrunbq_n_s16): Likewise.
10223 (vqrshrunbq_n_s32): Likewise.
10224 (vrmlaldavhaq_s32): Likewise.
10225 (vrmlaldavhaq_u32): Likewise.
10226 (vshlcq_s8): Likewise.
10227 (vshlcq_u8): Likewise.
10228 (vshlcq_s16): Likewise.
10229 (vshlcq_u16): Likewise.
10230 (vshlcq_s32): Likewise.
10231 (vshlcq_u32): Likewise.
10232 (vabavq_u8): Likewise.
10233 (vabavq_u16): Likewise.
10234 (vabavq_u32): Likewise.
10235 (__arm_vabavq_s8): Define intrinsic.
10236 (__arm_vabavq_s16): Likewise.
10237 (__arm_vabavq_s32): Likewise.
10238 (__arm_vabavq_u8): Likewise.
10239 (__arm_vabavq_u16): Likewise.
10240 (__arm_vabavq_u32): Likewise.
10241 (__arm_vbicq_m_n_s16): Likewise.
10242 (__arm_vbicq_m_n_s32): Likewise.
10243 (__arm_vbicq_m_n_u16): Likewise.
10244 (__arm_vbicq_m_n_u32): Likewise.
10245 (__arm_vqrshrnbq_n_s16): Likewise.
10246 (__arm_vqrshrnbq_n_u16): Likewise.
10247 (__arm_vqrshrnbq_n_s32): Likewise.
10248 (__arm_vqrshrnbq_n_u32): Likewise.
10249 (__arm_vqrshrunbq_n_s16): Likewise.
10250 (__arm_vqrshrunbq_n_s32): Likewise.
10251 (__arm_vrmlaldavhaq_s32): Likewise.
10252 (__arm_vrmlaldavhaq_u32): Likewise.
10253 (__arm_vshlcq_s8): Likewise.
10254 (__arm_vshlcq_u8): Likewise.
10255 (__arm_vshlcq_s16): Likewise.
10256 (__arm_vshlcq_u16): Likewise.
10257 (__arm_vshlcq_s32): Likewise.
10258 (__arm_vshlcq_u32): Likewise.
10259 (__arm_vcmpeqq_m_f16): Likewise.
10260 (__arm_vcmpeqq_m_f32): Likewise.
10261 (__arm_vcvtaq_m_s16_f16): Likewise.
10262 (__arm_vcvtaq_m_u16_f16): Likewise.
10263 (__arm_vcvtaq_m_s32_f32): Likewise.
10264 (__arm_vcvtaq_m_u32_f32): Likewise.
10265 (__arm_vcvtq_m_f16_s16): Likewise.
10266 (__arm_vcvtq_m_f16_u16): Likewise.
10267 (__arm_vcvtq_m_f32_s32): Likewise.
10268 (__arm_vcvtq_m_f32_u32): Likewise.
10269 (vcvtaq_m): Define polymorphic variant.
10270 (vcvtq_m): Likewise.
10271 (vabavq): Likewise.
10272 (vshlcq): Likewise.
10273 (vbicq_m_n): Likewise.
10274 (vqrshrnbq_n): Likewise.
10275 (vqrshrunbq_n): Likewise.
10276 * config/arm/arm_mve_builtins.def
10277 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
10278 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
10279 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10280 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
10281 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
10282 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
10283 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
10284 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10285 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
10286 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
10287 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
10288 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
10289 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
10290 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
10291 * config/arm/mve.md (VBICQ_M_N): Define iterator.
10292 (VCVTAQ_M): Likewise.
10293 (VCVTQ_M_TO_F): Likewise.
10294 (VQRSHRNBQ_N): Likewise.
10295 (VABAVQ): Likewise.
10296 (VSHLCQ): Likewise.
10297 (VRMLALDAVHAQ): Likewise.
10298 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
10299 (mve_vcmpeqq_m_f<mode>): Likewise.
10300 (mve_vcvtaq_m_<supf><mode>): Likewise.
10301 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
10302 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
10303 (mve_vqrshrunbq_n_s<mode>): Likewise.
10304 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
10305 (mve_vabavq_<supf><mode>): Likewise.
10306 (mve_vshlcq_<supf><mode>): Likewise.
10307 (mve_vshlcq_<supf><mode>): Likewise.
10308 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
10309 (mve_vshlcq_carry_<supf><mode>): Likewise.
10311 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10312 Mihail Ionescu <mihail.ionescu@arm.com>
10313 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10315 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
10316 (vqmovnbq_u16): Likewise.
10317 (vmulltq_poly_p8): Likewise.
10318 (vmullbq_poly_p8): Likewise.
10319 (vmovntq_u16): Likewise.
10320 (vmovnbq_u16): Likewise.
10321 (vmlaldavxq_u16): Likewise.
10322 (vmlaldavq_u16): Likewise.
10323 (vqmovuntq_s16): Likewise.
10324 (vqmovunbq_s16): Likewise.
10325 (vshlltq_n_u8): Likewise.
10326 (vshllbq_n_u8): Likewise.
10327 (vorrq_n_u16): Likewise.
10328 (vbicq_n_u16): Likewise.
10329 (vcmpneq_n_f16): Likewise.
10330 (vcmpneq_f16): Likewise.
10331 (vcmpltq_n_f16): Likewise.
10332 (vcmpltq_f16): Likewise.
10333 (vcmpleq_n_f16): Likewise.
10334 (vcmpleq_f16): Likewise.
10335 (vcmpgtq_n_f16): Likewise.
10336 (vcmpgtq_f16): Likewise.
10337 (vcmpgeq_n_f16): Likewise.
10338 (vcmpgeq_f16): Likewise.
10339 (vcmpeqq_n_f16): Likewise.
10340 (vcmpeqq_f16): Likewise.
10341 (vsubq_f16): Likewise.
10342 (vqmovntq_s16): Likewise.
10343 (vqmovnbq_s16): Likewise.
10344 (vqdmulltq_s16): Likewise.
10345 (vqdmulltq_n_s16): Likewise.
10346 (vqdmullbq_s16): Likewise.
10347 (vqdmullbq_n_s16): Likewise.
10348 (vorrq_f16): Likewise.
10349 (vornq_f16): Likewise.
10350 (vmulq_n_f16): Likewise.
10351 (vmulq_f16): Likewise.
10352 (vmovntq_s16): Likewise.
10353 (vmovnbq_s16): Likewise.
10354 (vmlsldavxq_s16): Likewise.
10355 (vmlsldavq_s16): Likewise.
10356 (vmlaldavxq_s16): Likewise.
10357 (vmlaldavq_s16): Likewise.
10358 (vminnmvq_f16): Likewise.
10359 (vminnmq_f16): Likewise.
10360 (vminnmavq_f16): Likewise.
10361 (vminnmaq_f16): Likewise.
10362 (vmaxnmvq_f16): Likewise.
10363 (vmaxnmq_f16): Likewise.
10364 (vmaxnmavq_f16): Likewise.
10365 (vmaxnmaq_f16): Likewise.
10366 (veorq_f16): Likewise.
10367 (vcmulq_rot90_f16): Likewise.
10368 (vcmulq_rot270_f16): Likewise.
10369 (vcmulq_rot180_f16): Likewise.
10370 (vcmulq_f16): Likewise.
10371 (vcaddq_rot90_f16): Likewise.
10372 (vcaddq_rot270_f16): Likewise.
10373 (vbicq_f16): Likewise.
10374 (vandq_f16): Likewise.
10375 (vaddq_n_f16): Likewise.
10376 (vabdq_f16): Likewise.
10377 (vshlltq_n_s8): Likewise.
10378 (vshllbq_n_s8): Likewise.
10379 (vorrq_n_s16): Likewise.
10380 (vbicq_n_s16): Likewise.
10381 (vqmovntq_u32): Likewise.
10382 (vqmovnbq_u32): Likewise.
10383 (vmulltq_poly_p16): Likewise.
10384 (vmullbq_poly_p16): Likewise.
10385 (vmovntq_u32): Likewise.
10386 (vmovnbq_u32): Likewise.
10387 (vmlaldavxq_u32): Likewise.
10388 (vmlaldavq_u32): Likewise.
10389 (vqmovuntq_s32): Likewise.
10390 (vqmovunbq_s32): Likewise.
10391 (vshlltq_n_u16): Likewise.
10392 (vshllbq_n_u16): Likewise.
10393 (vorrq_n_u32): Likewise.
10394 (vbicq_n_u32): Likewise.
10395 (vcmpneq_n_f32): Likewise.
10396 (vcmpneq_f32): Likewise.
10397 (vcmpltq_n_f32): Likewise.
10398 (vcmpltq_f32): Likewise.
10399 (vcmpleq_n_f32): Likewise.
10400 (vcmpleq_f32): Likewise.
10401 (vcmpgtq_n_f32): Likewise.
10402 (vcmpgtq_f32): Likewise.
10403 (vcmpgeq_n_f32): Likewise.
10404 (vcmpgeq_f32): Likewise.
10405 (vcmpeqq_n_f32): Likewise.
10406 (vcmpeqq_f32): Likewise.
10407 (vsubq_f32): Likewise.
10408 (vqmovntq_s32): Likewise.
10409 (vqmovnbq_s32): Likewise.
10410 (vqdmulltq_s32): Likewise.
10411 (vqdmulltq_n_s32): Likewise.
10412 (vqdmullbq_s32): Likewise.
10413 (vqdmullbq_n_s32): Likewise.
10414 (vorrq_f32): Likewise.
10415 (vornq_f32): Likewise.
10416 (vmulq_n_f32): Likewise.
10417 (vmulq_f32): Likewise.
10418 (vmovntq_s32): Likewise.
10419 (vmovnbq_s32): Likewise.
10420 (vmlsldavxq_s32): Likewise.
10421 (vmlsldavq_s32): Likewise.
10422 (vmlaldavxq_s32): Likewise.
10423 (vmlaldavq_s32): Likewise.
10424 (vminnmvq_f32): Likewise.
10425 (vminnmq_f32): Likewise.
10426 (vminnmavq_f32): Likewise.
10427 (vminnmaq_f32): Likewise.
10428 (vmaxnmvq_f32): Likewise.
10429 (vmaxnmq_f32): Likewise.
10430 (vmaxnmavq_f32): Likewise.
10431 (vmaxnmaq_f32): Likewise.
10432 (veorq_f32): Likewise.
10433 (vcmulq_rot90_f32): Likewise.
10434 (vcmulq_rot270_f32): Likewise.
10435 (vcmulq_rot180_f32): Likewise.
10436 (vcmulq_f32): Likewise.
10437 (vcaddq_rot90_f32): Likewise.
10438 (vcaddq_rot270_f32): Likewise.
10439 (vbicq_f32): Likewise.
10440 (vandq_f32): Likewise.
10441 (vaddq_n_f32): Likewise.
10442 (vabdq_f32): Likewise.
10443 (vshlltq_n_s16): Likewise.
10444 (vshllbq_n_s16): Likewise.
10445 (vorrq_n_s32): Likewise.
10446 (vbicq_n_s32): Likewise.
10447 (vrmlaldavhq_u32): Likewise.
10448 (vctp8q_m): Likewise.
10449 (vctp64q_m): Likewise.
10450 (vctp32q_m): Likewise.
10451 (vctp16q_m): Likewise.
10452 (vaddlvaq_u32): Likewise.
10453 (vrmlsldavhxq_s32): Likewise.
10454 (vrmlsldavhq_s32): Likewise.
10455 (vrmlaldavhxq_s32): Likewise.
10456 (vrmlaldavhq_s32): Likewise.
10457 (vcvttq_f16_f32): Likewise.
10458 (vcvtbq_f16_f32): Likewise.
10459 (vaddlvaq_s32): Likewise.
10460 (__arm_vqmovntq_u16): Define intrinsic.
10461 (__arm_vqmovnbq_u16): Likewise.
10462 (__arm_vmulltq_poly_p8): Likewise.
10463 (__arm_vmullbq_poly_p8): Likewise.
10464 (__arm_vmovntq_u16): Likewise.
10465 (__arm_vmovnbq_u16): Likewise.
10466 (__arm_vmlaldavxq_u16): Likewise.
10467 (__arm_vmlaldavq_u16): Likewise.
10468 (__arm_vqmovuntq_s16): Likewise.
10469 (__arm_vqmovunbq_s16): Likewise.
10470 (__arm_vshlltq_n_u8): Likewise.
10471 (__arm_vshllbq_n_u8): Likewise.
10472 (__arm_vorrq_n_u16): Likewise.
10473 (__arm_vbicq_n_u16): Likewise.
10474 (__arm_vcmpneq_n_f16): Likewise.
10475 (__arm_vcmpneq_f16): Likewise.
10476 (__arm_vcmpltq_n_f16): Likewise.
10477 (__arm_vcmpltq_f16): Likewise.
10478 (__arm_vcmpleq_n_f16): Likewise.
10479 (__arm_vcmpleq_f16): Likewise.
10480 (__arm_vcmpgtq_n_f16): Likewise.
10481 (__arm_vcmpgtq_f16): Likewise.
10482 (__arm_vcmpgeq_n_f16): Likewise.
10483 (__arm_vcmpgeq_f16): Likewise.
10484 (__arm_vcmpeqq_n_f16): Likewise.
10485 (__arm_vcmpeqq_f16): Likewise.
10486 (__arm_vsubq_f16): Likewise.
10487 (__arm_vqmovntq_s16): Likewise.
10488 (__arm_vqmovnbq_s16): Likewise.
10489 (__arm_vqdmulltq_s16): Likewise.
10490 (__arm_vqdmulltq_n_s16): Likewise.
10491 (__arm_vqdmullbq_s16): Likewise.
10492 (__arm_vqdmullbq_n_s16): Likewise.
10493 (__arm_vorrq_f16): Likewise.
10494 (__arm_vornq_f16): Likewise.
10495 (__arm_vmulq_n_f16): Likewise.
10496 (__arm_vmulq_f16): Likewise.
10497 (__arm_vmovntq_s16): Likewise.
10498 (__arm_vmovnbq_s16): Likewise.
10499 (__arm_vmlsldavxq_s16): Likewise.
10500 (__arm_vmlsldavq_s16): Likewise.
10501 (__arm_vmlaldavxq_s16): Likewise.
10502 (__arm_vmlaldavq_s16): Likewise.
10503 (__arm_vminnmvq_f16): Likewise.
10504 (__arm_vminnmq_f16): Likewise.
10505 (__arm_vminnmavq_f16): Likewise.
10506 (__arm_vminnmaq_f16): Likewise.
10507 (__arm_vmaxnmvq_f16): Likewise.
10508 (__arm_vmaxnmq_f16): Likewise.
10509 (__arm_vmaxnmavq_f16): Likewise.
10510 (__arm_vmaxnmaq_f16): Likewise.
10511 (__arm_veorq_f16): Likewise.
10512 (__arm_vcmulq_rot90_f16): Likewise.
10513 (__arm_vcmulq_rot270_f16): Likewise.
10514 (__arm_vcmulq_rot180_f16): Likewise.
10515 (__arm_vcmulq_f16): Likewise.
10516 (__arm_vcaddq_rot90_f16): Likewise.
10517 (__arm_vcaddq_rot270_f16): Likewise.
10518 (__arm_vbicq_f16): Likewise.
10519 (__arm_vandq_f16): Likewise.
10520 (__arm_vaddq_n_f16): Likewise.
10521 (__arm_vabdq_f16): Likewise.
10522 (__arm_vshlltq_n_s8): Likewise.
10523 (__arm_vshllbq_n_s8): Likewise.
10524 (__arm_vorrq_n_s16): Likewise.
10525 (__arm_vbicq_n_s16): Likewise.
10526 (__arm_vqmovntq_u32): Likewise.
10527 (__arm_vqmovnbq_u32): Likewise.
10528 (__arm_vmulltq_poly_p16): Likewise.
10529 (__arm_vmullbq_poly_p16): Likewise.
10530 (__arm_vmovntq_u32): Likewise.
10531 (__arm_vmovnbq_u32): Likewise.
10532 (__arm_vmlaldavxq_u32): Likewise.
10533 (__arm_vmlaldavq_u32): Likewise.
10534 (__arm_vqmovuntq_s32): Likewise.
10535 (__arm_vqmovunbq_s32): Likewise.
10536 (__arm_vshlltq_n_u16): Likewise.
10537 (__arm_vshllbq_n_u16): Likewise.
10538 (__arm_vorrq_n_u32): Likewise.
10539 (__arm_vbicq_n_u32): Likewise.
10540 (__arm_vcmpneq_n_f32): Likewise.
10541 (__arm_vcmpneq_f32): Likewise.
10542 (__arm_vcmpltq_n_f32): Likewise.
10543 (__arm_vcmpltq_f32): Likewise.
10544 (__arm_vcmpleq_n_f32): Likewise.
10545 (__arm_vcmpleq_f32): Likewise.
10546 (__arm_vcmpgtq_n_f32): Likewise.
10547 (__arm_vcmpgtq_f32): Likewise.
10548 (__arm_vcmpgeq_n_f32): Likewise.
10549 (__arm_vcmpgeq_f32): Likewise.
10550 (__arm_vcmpeqq_n_f32): Likewise.
10551 (__arm_vcmpeqq_f32): Likewise.
10552 (__arm_vsubq_f32): Likewise.
10553 (__arm_vqmovntq_s32): Likewise.
10554 (__arm_vqmovnbq_s32): Likewise.
10555 (__arm_vqdmulltq_s32): Likewise.
10556 (__arm_vqdmulltq_n_s32): Likewise.
10557 (__arm_vqdmullbq_s32): Likewise.
10558 (__arm_vqdmullbq_n_s32): Likewise.
10559 (__arm_vorrq_f32): Likewise.
10560 (__arm_vornq_f32): Likewise.
10561 (__arm_vmulq_n_f32): Likewise.
10562 (__arm_vmulq_f32): Likewise.
10563 (__arm_vmovntq_s32): Likewise.
10564 (__arm_vmovnbq_s32): Likewise.
10565 (__arm_vmlsldavxq_s32): Likewise.
10566 (__arm_vmlsldavq_s32): Likewise.
10567 (__arm_vmlaldavxq_s32): Likewise.
10568 (__arm_vmlaldavq_s32): Likewise.
10569 (__arm_vminnmvq_f32): Likewise.
10570 (__arm_vminnmq_f32): Likewise.
10571 (__arm_vminnmavq_f32): Likewise.
10572 (__arm_vminnmaq_f32): Likewise.
10573 (__arm_vmaxnmvq_f32): Likewise.
10574 (__arm_vmaxnmq_f32): Likewise.
10575 (__arm_vmaxnmavq_f32): Likewise.
10576 (__arm_vmaxnmaq_f32): Likewise.
10577 (__arm_veorq_f32): Likewise.
10578 (__arm_vcmulq_rot90_f32): Likewise.
10579 (__arm_vcmulq_rot270_f32): Likewise.
10580 (__arm_vcmulq_rot180_f32): Likewise.
10581 (__arm_vcmulq_f32): Likewise.
10582 (__arm_vcaddq_rot90_f32): Likewise.
10583 (__arm_vcaddq_rot270_f32): Likewise.
10584 (__arm_vbicq_f32): Likewise.
10585 (__arm_vandq_f32): Likewise.
10586 (__arm_vaddq_n_f32): Likewise.
10587 (__arm_vabdq_f32): Likewise.
10588 (__arm_vshlltq_n_s16): Likewise.
10589 (__arm_vshllbq_n_s16): Likewise.
10590 (__arm_vorrq_n_s32): Likewise.
10591 (__arm_vbicq_n_s32): Likewise.
10592 (__arm_vrmlaldavhq_u32): Likewise.
10593 (__arm_vctp8q_m): Likewise.
10594 (__arm_vctp64q_m): Likewise.
10595 (__arm_vctp32q_m): Likewise.
10596 (__arm_vctp16q_m): Likewise.
10597 (__arm_vaddlvaq_u32): Likewise.
10598 (__arm_vrmlsldavhxq_s32): Likewise.
10599 (__arm_vrmlsldavhq_s32): Likewise.
10600 (__arm_vrmlaldavhxq_s32): Likewise.
10601 (__arm_vrmlaldavhq_s32): Likewise.
10602 (__arm_vcvttq_f16_f32): Likewise.
10603 (__arm_vcvtbq_f16_f32): Likewise.
10604 (__arm_vaddlvaq_s32): Likewise.
10605 (vst4q): Define polymorphic variant.
10606 (vrndxq): Likewise.
10608 (vrndpq): Likewise.
10609 (vrndnq): Likewise.
10610 (vrndmq): Likewise.
10611 (vrndaq): Likewise.
10612 (vrev64q): Likewise.
10614 (vdupq_n): Likewise.
10616 (vrev32q): Likewise.
10617 (vcvtbq_f32): Likewise.
10618 (vcvttq_f32): Likewise.
10620 (vsubq_n): Likewise.
10621 (vbrsrq_n): Likewise.
10622 (vcvtq_n): Likewise.
10626 (vaddq_n): Likewise.
10630 (vmulq_n): Likewise.
10632 (vcaddq_rot270): Likewise.
10633 (vcmpeqq_n): Likewise.
10634 (vcmpeqq): Likewise.
10635 (vcaddq_rot90): Likewise.
10636 (vcmpgeq_n): Likewise.
10637 (vcmpgeq): Likewise.
10638 (vcmpgtq_n): Likewise.
10639 (vcmpgtq): Likewise.
10640 (vcmpgtq): Likewise.
10641 (vcmpleq_n): Likewise.
10642 (vcmpleq_n): Likewise.
10643 (vcmpleq): Likewise.
10644 (vcmpleq): Likewise.
10645 (vcmpltq_n): Likewise.
10646 (vcmpltq_n): Likewise.
10647 (vcmpltq): Likewise.
10648 (vcmpltq): Likewise.
10649 (vcmpneq_n): Likewise.
10650 (vcmpneq_n): Likewise.
10651 (vcmpneq): Likewise.
10652 (vcmpneq): Likewise.
10653 (vcmulq): Likewise.
10654 (vcmulq): Likewise.
10655 (vcmulq_rot180): Likewise.
10656 (vcmulq_rot180): Likewise.
10657 (vcmulq_rot270): Likewise.
10658 (vcmulq_rot270): Likewise.
10659 (vcmulq_rot90): Likewise.
10660 (vcmulq_rot90): Likewise.
10663 (vmaxnmaq): Likewise.
10664 (vmaxnmaq): Likewise.
10665 (vmaxnmavq): Likewise.
10666 (vmaxnmavq): Likewise.
10667 (vmaxnmq): Likewise.
10668 (vmaxnmq): Likewise.
10669 (vmaxnmvq): Likewise.
10670 (vmaxnmvq): Likewise.
10671 (vminnmaq): Likewise.
10672 (vminnmaq): Likewise.
10673 (vminnmavq): Likewise.
10674 (vminnmavq): Likewise.
10675 (vminnmq): Likewise.
10676 (vminnmq): Likewise.
10677 (vminnmvq): Likewise.
10678 (vminnmvq): Likewise.
10679 (vbicq_n): Likewise.
10680 (vqmovntq): Likewise.
10681 (vqmovntq): Likewise.
10682 (vqmovnbq): Likewise.
10683 (vqmovnbq): Likewise.
10684 (vmulltq_poly): Likewise.
10685 (vmulltq_poly): Likewise.
10686 (vmullbq_poly): Likewise.
10687 (vmullbq_poly): Likewise.
10688 (vmovntq): Likewise.
10689 (vmovntq): Likewise.
10690 (vmovnbq): Likewise.
10691 (vmovnbq): Likewise.
10692 (vmlaldavxq): Likewise.
10693 (vmlaldavxq): Likewise.
10694 (vqmovuntq): Likewise.
10695 (vqmovuntq): Likewise.
10696 (vshlltq_n): Likewise.
10697 (vshlltq_n): Likewise.
10698 (vshllbq_n): Likewise.
10699 (vshllbq_n): Likewise.
10700 (vorrq_n): Likewise.
10701 (vorrq_n): Likewise.
10702 (vmlaldavq): Likewise.
10703 (vmlaldavq): Likewise.
10704 (vqmovunbq): Likewise.
10705 (vqmovunbq): Likewise.
10706 (vqdmulltq_n): Likewise.
10707 (vqdmulltq_n): Likewise.
10708 (vqdmulltq): Likewise.
10709 (vqdmulltq): Likewise.
10710 (vqdmullbq_n): Likewise.
10711 (vqdmullbq_n): Likewise.
10712 (vqdmullbq): Likewise.
10713 (vqdmullbq): Likewise.
10714 (vaddlvaq): Likewise.
10715 (vaddlvaq): Likewise.
10716 (vrmlaldavhq): Likewise.
10717 (vrmlaldavhq): Likewise.
10718 (vrmlaldavhxq): Likewise.
10719 (vrmlaldavhxq): Likewise.
10720 (vrmlsldavhq): Likewise.
10721 (vrmlsldavhq): Likewise.
10722 (vrmlsldavhxq): Likewise.
10723 (vrmlsldavhxq): Likewise.
10724 (vmlsldavxq): Likewise.
10725 (vmlsldavxq): Likewise.
10726 (vmlsldavq): Likewise.
10727 (vmlsldavq): Likewise.
10728 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
10729 (BINOP_NONE_NONE_NONE): Likewise.
10730 (BINOP_UNONE_NONE_NONE): Likewise.
10731 (BINOP_UNONE_UNONE_IMM): Likewise.
10732 (BINOP_UNONE_UNONE_NONE): Likewise.
10733 (BINOP_UNONE_UNONE_UNONE): Likewise.
10734 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
10735 (mve_vaddlvaq_<supf>v4si): Likewise.
10736 (mve_vaddq_n_f<mode>): Likewise.
10737 (mve_vandq_f<mode>): Likewise.
10738 (mve_vbicq_f<mode>): Likewise.
10739 (mve_vbicq_n_<supf><mode>): Likewise.
10740 (mve_vcaddq_rot270_f<mode>): Likewise.
10741 (mve_vcaddq_rot90_f<mode>): Likewise.
10742 (mve_vcmpeqq_f<mode>): Likewise.
10743 (mve_vcmpeqq_n_f<mode>): Likewise.
10744 (mve_vcmpgeq_f<mode>): Likewise.
10745 (mve_vcmpgeq_n_f<mode>): Likewise.
10746 (mve_vcmpgtq_f<mode>): Likewise.
10747 (mve_vcmpgtq_n_f<mode>): Likewise.
10748 (mve_vcmpleq_f<mode>): Likewise.
10749 (mve_vcmpleq_n_f<mode>): Likewise.
10750 (mve_vcmpltq_f<mode>): Likewise.
10751 (mve_vcmpltq_n_f<mode>): Likewise.
10752 (mve_vcmpneq_f<mode>): Likewise.
10753 (mve_vcmpneq_n_f<mode>): Likewise.
10754 (mve_vcmulq_f<mode>): Likewise.
10755 (mve_vcmulq_rot180_f<mode>): Likewise.
10756 (mve_vcmulq_rot270_f<mode>): Likewise.
10757 (mve_vcmulq_rot90_f<mode>): Likewise.
10758 (mve_vctp<mode1>q_mhi): Likewise.
10759 (mve_vcvtbq_f16_f32v8hf): Likewise.
10760 (mve_vcvttq_f16_f32v8hf): Likewise.
10761 (mve_veorq_f<mode>): Likewise.
10762 (mve_vmaxnmaq_f<mode>): Likewise.
10763 (mve_vmaxnmavq_f<mode>): Likewise.
10764 (mve_vmaxnmq_f<mode>): Likewise.
10765 (mve_vmaxnmvq_f<mode>): Likewise.
10766 (mve_vminnmaq_f<mode>): Likewise.
10767 (mve_vminnmavq_f<mode>): Likewise.
10768 (mve_vminnmq_f<mode>): Likewise.
10769 (mve_vminnmvq_f<mode>): Likewise.
10770 (mve_vmlaldavq_<supf><mode>): Likewise.
10771 (mve_vmlaldavxq_<supf><mode>): Likewise.
10772 (mve_vmlsldavq_s<mode>): Likewise.
10773 (mve_vmlsldavxq_s<mode>): Likewise.
10774 (mve_vmovnbq_<supf><mode>): Likewise.
10775 (mve_vmovntq_<supf><mode>): Likewise.
10776 (mve_vmulq_f<mode>): Likewise.
10777 (mve_vmulq_n_f<mode>): Likewise.
10778 (mve_vornq_f<mode>): Likewise.
10779 (mve_vorrq_f<mode>): Likewise.
10780 (mve_vorrq_n_<supf><mode>): Likewise.
10781 (mve_vqdmullbq_n_s<mode>): Likewise.
10782 (mve_vqdmullbq_s<mode>): Likewise.
10783 (mve_vqdmulltq_n_s<mode>): Likewise.
10784 (mve_vqdmulltq_s<mode>): Likewise.
10785 (mve_vqmovnbq_<supf><mode>): Likewise.
10786 (mve_vqmovntq_<supf><mode>): Likewise.
10787 (mve_vqmovunbq_s<mode>): Likewise.
10788 (mve_vqmovuntq_s<mode>): Likewise.
10789 (mve_vrmlaldavhxq_sv4si): Likewise.
10790 (mve_vrmlsldavhq_sv4si): Likewise.
10791 (mve_vrmlsldavhxq_sv4si): Likewise.
10792 (mve_vshllbq_n_<supf><mode>): Likewise.
10793 (mve_vshlltq_n_<supf><mode>): Likewise.
10794 (mve_vsubq_f<mode>): Likewise.
10795 (mve_vmulltq_poly_p<mode>): Likewise.
10796 (mve_vmullbq_poly_p<mode>): Likewise.
10797 (mve_vrmlaldavhq_<supf>v4si): Likewise.
10799 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
10800 Mihail Ionescu <mihail.ionescu@arm.com>
10801 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10803 * config/arm/arm_mve.h (vsubq_u8): Define macro.
10804 (vsubq_n_u8): Likewise.
10805 (vrmulhq_u8): Likewise.
10806 (vrhaddq_u8): Likewise.
10807 (vqsubq_u8): Likewise.
10808 (vqsubq_n_u8): Likewise.
10809 (vqaddq_u8): Likewise.
10810 (vqaddq_n_u8): Likewise.
10811 (vorrq_u8): Likewise.
10812 (vornq_u8): Likewise.
10813 (vmulq_u8): Likewise.
10814 (vmulq_n_u8): Likewise.
10815 (vmulltq_int_u8): Likewise.
10816 (vmullbq_int_u8): Likewise.
10817 (vmulhq_u8): Likewise.
10818 (vmladavq_u8): Likewise.
10819 (vminvq_u8): Likewise.
10820 (vminq_u8): Likewise.
10821 (vmaxvq_u8): Likewise.
10822 (vmaxq_u8): Likewise.
10823 (vhsubq_u8): Likewise.
10824 (vhsubq_n_u8): Likewise.
10825 (vhaddq_u8): Likewise.
10826 (vhaddq_n_u8): Likewise.
10827 (veorq_u8): Likewise.
10828 (vcmpneq_n_u8): Likewise.
10829 (vcmphiq_u8): Likewise.
10830 (vcmphiq_n_u8): Likewise.
10831 (vcmpeqq_u8): Likewise.
10832 (vcmpeqq_n_u8): Likewise.
10833 (vcmpcsq_u8): Likewise.
10834 (vcmpcsq_n_u8): Likewise.
10835 (vcaddq_rot90_u8): Likewise.
10836 (vcaddq_rot270_u8): Likewise.
10837 (vbicq_u8): Likewise.
10838 (vandq_u8): Likewise.
10839 (vaddvq_p_u8): Likewise.
10840 (vaddvaq_u8): Likewise.
10841 (vaddq_n_u8): Likewise.
10842 (vabdq_u8): Likewise.
10843 (vshlq_r_u8): Likewise.
10844 (vrshlq_u8): Likewise.
10845 (vrshlq_n_u8): Likewise.
10846 (vqshlq_u8): Likewise.
10847 (vqshlq_r_u8): Likewise.
10848 (vqrshlq_u8): Likewise.
10849 (vqrshlq_n_u8): Likewise.
10850 (vminavq_s8): Likewise.
10851 (vminaq_s8): Likewise.
10852 (vmaxavq_s8): Likewise.
10853 (vmaxaq_s8): Likewise.
10854 (vbrsrq_n_u8): Likewise.
10855 (vshlq_n_u8): Likewise.
10856 (vrshrq_n_u8): Likewise.
10857 (vqshlq_n_u8): Likewise.
10858 (vcmpneq_n_s8): Likewise.
10859 (vcmpltq_s8): Likewise.
10860 (vcmpltq_n_s8): Likewise.
10861 (vcmpleq_s8): Likewise.
10862 (vcmpleq_n_s8): Likewise.
10863 (vcmpgtq_s8): Likewise.
10864 (vcmpgtq_n_s8): Likewise.
10865 (vcmpgeq_s8): Likewise.
10866 (vcmpgeq_n_s8): Likewise.
10867 (vcmpeqq_s8): Likewise.
10868 (vcmpeqq_n_s8): Likewise.
10869 (vqshluq_n_s8): Likewise.
10870 (vaddvq_p_s8): Likewise.
10871 (vsubq_s8): Likewise.
10872 (vsubq_n_s8): Likewise.
10873 (vshlq_r_s8): Likewise.
10874 (vrshlq_s8): Likewise.
10875 (vrshlq_n_s8): Likewise.
10876 (vrmulhq_s8): Likewise.
10877 (vrhaddq_s8): Likewise.
10878 (vqsubq_s8): Likewise.
10879 (vqsubq_n_s8): Likewise.
10880 (vqshlq_s8): Likewise.
10881 (vqshlq_r_s8): Likewise.
10882 (vqrshlq_s8): Likewise.
10883 (vqrshlq_n_s8): Likewise.
10884 (vqrdmulhq_s8): Likewise.
10885 (vqrdmulhq_n_s8): Likewise.
10886 (vqdmulhq_s8): Likewise.
10887 (vqdmulhq_n_s8): Likewise.
10888 (vqaddq_s8): Likewise.
10889 (vqaddq_n_s8): Likewise.
10890 (vorrq_s8): Likewise.
10891 (vornq_s8): Likewise.
10892 (vmulq_s8): Likewise.
10893 (vmulq_n_s8): Likewise.
10894 (vmulltq_int_s8): Likewise.
10895 (vmullbq_int_s8): Likewise.
10896 (vmulhq_s8): Likewise.
10897 (vmlsdavxq_s8): Likewise.
10898 (vmlsdavq_s8): Likewise.
10899 (vmladavxq_s8): Likewise.
10900 (vmladavq_s8): Likewise.
10901 (vminvq_s8): Likewise.
10902 (vminq_s8): Likewise.
10903 (vmaxvq_s8): Likewise.
10904 (vmaxq_s8): Likewise.
10905 (vhsubq_s8): Likewise.
10906 (vhsubq_n_s8): Likewise.
10907 (vhcaddq_rot90_s8): Likewise.
10908 (vhcaddq_rot270_s8): Likewise.
10909 (vhaddq_s8): Likewise.
10910 (vhaddq_n_s8): Likewise.
10911 (veorq_s8): Likewise.
10912 (vcaddq_rot90_s8): Likewise.
10913 (vcaddq_rot270_s8): Likewise.
10914 (vbrsrq_n_s8): Likewise.
10915 (vbicq_s8): Likewise.
10916 (vandq_s8): Likewise.
10917 (vaddvaq_s8): Likewise.
10918 (vaddq_n_s8): Likewise.
10919 (vabdq_s8): Likewise.
10920 (vshlq_n_s8): Likewise.
10921 (vrshrq_n_s8): Likewise.
10922 (vqshlq_n_s8): Likewise.
10923 (vsubq_u16): Likewise.
10924 (vsubq_n_u16): Likewise.
10925 (vrmulhq_u16): Likewise.
10926 (vrhaddq_u16): Likewise.
10927 (vqsubq_u16): Likewise.
10928 (vqsubq_n_u16): Likewise.
10929 (vqaddq_u16): Likewise.
10930 (vqaddq_n_u16): Likewise.
10931 (vorrq_u16): Likewise.
10932 (vornq_u16): Likewise.
10933 (vmulq_u16): Likewise.
10934 (vmulq_n_u16): Likewise.
10935 (vmulltq_int_u16): Likewise.
10936 (vmullbq_int_u16): Likewise.
10937 (vmulhq_u16): Likewise.
10938 (vmladavq_u16): Likewise.
10939 (vminvq_u16): Likewise.
10940 (vminq_u16): Likewise.
10941 (vmaxvq_u16): Likewise.
10942 (vmaxq_u16): Likewise.
10943 (vhsubq_u16): Likewise.
10944 (vhsubq_n_u16): Likewise.
10945 (vhaddq_u16): Likewise.
10946 (vhaddq_n_u16): Likewise.
10947 (veorq_u16): Likewise.
10948 (vcmpneq_n_u16): Likewise.
10949 (vcmphiq_u16): Likewise.
10950 (vcmphiq_n_u16): Likewise.
10951 (vcmpeqq_u16): Likewise.
10952 (vcmpeqq_n_u16): Likewise.
10953 (vcmpcsq_u16): Likewise.
10954 (vcmpcsq_n_u16): Likewise.
10955 (vcaddq_rot90_u16): Likewise.
10956 (vcaddq_rot270_u16): Likewise.
10957 (vbicq_u16): Likewise.
10958 (vandq_u16): Likewise.
10959 (vaddvq_p_u16): Likewise.
10960 (vaddvaq_u16): Likewise.
10961 (vaddq_n_u16): Likewise.
10962 (vabdq_u16): Likewise.
10963 (vshlq_r_u16): Likewise.
10964 (vrshlq_u16): Likewise.
10965 (vrshlq_n_u16): Likewise.
10966 (vqshlq_u16): Likewise.
10967 (vqshlq_r_u16): Likewise.
10968 (vqrshlq_u16): Likewise.
10969 (vqrshlq_n_u16): Likewise.
10970 (vminavq_s16): Likewise.
10971 (vminaq_s16): Likewise.
10972 (vmaxavq_s16): Likewise.
10973 (vmaxaq_s16): Likewise.
10974 (vbrsrq_n_u16): Likewise.
10975 (vshlq_n_u16): Likewise.
10976 (vrshrq_n_u16): Likewise.
10977 (vqshlq_n_u16): Likewise.
10978 (vcmpneq_n_s16): Likewise.
10979 (vcmpltq_s16): Likewise.
10980 (vcmpltq_n_s16): Likewise.
10981 (vcmpleq_s16): Likewise.
10982 (vcmpleq_n_s16): Likewise.
10983 (vcmpgtq_s16): Likewise.
10984 (vcmpgtq_n_s16): Likewise.
10985 (vcmpgeq_s16): Likewise.
10986 (vcmpgeq_n_s16): Likewise.
10987 (vcmpeqq_s16): Likewise.
10988 (vcmpeqq_n_s16): Likewise.
10989 (vqshluq_n_s16): Likewise.
10990 (vaddvq_p_s16): Likewise.
10991 (vsubq_s16): Likewise.
10992 (vsubq_n_s16): Likewise.
10993 (vshlq_r_s16): Likewise.
10994 (vrshlq_s16): Likewise.
10995 (vrshlq_n_s16): Likewise.
10996 (vrmulhq_s16): Likewise.
10997 (vrhaddq_s16): Likewise.
10998 (vqsubq_s16): Likewise.
10999 (vqsubq_n_s16): Likewise.
11000 (vqshlq_s16): Likewise.
11001 (vqshlq_r_s16): Likewise.
11002 (vqrshlq_s16): Likewise.
11003 (vqrshlq_n_s16): Likewise.
11004 (vqrdmulhq_s16): Likewise.
11005 (vqrdmulhq_n_s16): Likewise.
11006 (vqdmulhq_s16): Likewise.
11007 (vqdmulhq_n_s16): Likewise.
11008 (vqaddq_s16): Likewise.
11009 (vqaddq_n_s16): Likewise.
11010 (vorrq_s16): Likewise.
11011 (vornq_s16): Likewise.
11012 (vmulq_s16): Likewise.
11013 (vmulq_n_s16): Likewise.
11014 (vmulltq_int_s16): Likewise.
11015 (vmullbq_int_s16): Likewise.
11016 (vmulhq_s16): Likewise.
11017 (vmlsdavxq_s16): Likewise.
11018 (vmlsdavq_s16): Likewise.
11019 (vmladavxq_s16): Likewise.
11020 (vmladavq_s16): Likewise.
11021 (vminvq_s16): Likewise.
11022 (vminq_s16): Likewise.
11023 (vmaxvq_s16): Likewise.
11024 (vmaxq_s16): Likewise.
11025 (vhsubq_s16): Likewise.
11026 (vhsubq_n_s16): Likewise.
11027 (vhcaddq_rot90_s16): Likewise.
11028 (vhcaddq_rot270_s16): Likewise.
11029 (vhaddq_s16): Likewise.
11030 (vhaddq_n_s16): Likewise.
11031 (veorq_s16): Likewise.
11032 (vcaddq_rot90_s16): Likewise.
11033 (vcaddq_rot270_s16): Likewise.
11034 (vbrsrq_n_s16): Likewise.
11035 (vbicq_s16): Likewise.
11036 (vandq_s16): Likewise.
11037 (vaddvaq_s16): Likewise.
11038 (vaddq_n_s16): Likewise.
11039 (vabdq_s16): Likewise.
11040 (vshlq_n_s16): Likewise.
11041 (vrshrq_n_s16): Likewise.
11042 (vqshlq_n_s16): Likewise.
11043 (vsubq_u32): Likewise.
11044 (vsubq_n_u32): Likewise.
11045 (vrmulhq_u32): Likewise.
11046 (vrhaddq_u32): Likewise.
11047 (vqsubq_u32): Likewise.
11048 (vqsubq_n_u32): Likewise.
11049 (vqaddq_u32): Likewise.
11050 (vqaddq_n_u32): Likewise.
11051 (vorrq_u32): Likewise.
11052 (vornq_u32): Likewise.
11053 (vmulq_u32): Likewise.
11054 (vmulq_n_u32): Likewise.
11055 (vmulltq_int_u32): Likewise.
11056 (vmullbq_int_u32): Likewise.
11057 (vmulhq_u32): Likewise.
11058 (vmladavq_u32): Likewise.
11059 (vminvq_u32): Likewise.
11060 (vminq_u32): Likewise.
11061 (vmaxvq_u32): Likewise.
11062 (vmaxq_u32): Likewise.
11063 (vhsubq_u32): Likewise.
11064 (vhsubq_n_u32): Likewise.
11065 (vhaddq_u32): Likewise.
11066 (vhaddq_n_u32): Likewise.
11067 (veorq_u32): Likewise.
11068 (vcmpneq_n_u32): Likewise.
11069 (vcmphiq_u32): Likewise.
11070 (vcmphiq_n_u32): Likewise.
11071 (vcmpeqq_u32): Likewise.
11072 (vcmpeqq_n_u32): Likewise.
11073 (vcmpcsq_u32): Likewise.
11074 (vcmpcsq_n_u32): Likewise.
11075 (vcaddq_rot90_u32): Likewise.
11076 (vcaddq_rot270_u32): Likewise.
11077 (vbicq_u32): Likewise.
11078 (vandq_u32): Likewise.
11079 (vaddvq_p_u32): Likewise.
11080 (vaddvaq_u32): Likewise.
11081 (vaddq_n_u32): Likewise.
11082 (vabdq_u32): Likewise.
11083 (vshlq_r_u32): Likewise.
11084 (vrshlq_u32): Likewise.
11085 (vrshlq_n_u32): Likewise.
11086 (vqshlq_u32): Likewise.
11087 (vqshlq_r_u32): Likewise.
11088 (vqrshlq_u32): Likewise.
11089 (vqrshlq_n_u32): Likewise.
11090 (vminavq_s32): Likewise.
11091 (vminaq_s32): Likewise.
11092 (vmaxavq_s32): Likewise.
11093 (vmaxaq_s32): Likewise.
11094 (vbrsrq_n_u32): Likewise.
11095 (vshlq_n_u32): Likewise.
11096 (vrshrq_n_u32): Likewise.
11097 (vqshlq_n_u32): Likewise.
11098 (vcmpneq_n_s32): Likewise.
11099 (vcmpltq_s32): Likewise.
11100 (vcmpltq_n_s32): Likewise.
11101 (vcmpleq_s32): Likewise.
11102 (vcmpleq_n_s32): Likewise.
11103 (vcmpgtq_s32): Likewise.
11104 (vcmpgtq_n_s32): Likewise.
11105 (vcmpgeq_s32): Likewise.
11106 (vcmpgeq_n_s32): Likewise.
11107 (vcmpeqq_s32): Likewise.
11108 (vcmpeqq_n_s32): Likewise.
11109 (vqshluq_n_s32): Likewise.
11110 (vaddvq_p_s32): Likewise.
11111 (vsubq_s32): Likewise.
11112 (vsubq_n_s32): Likewise.
11113 (vshlq_r_s32): Likewise.
11114 (vrshlq_s32): Likewise.
11115 (vrshlq_n_s32): Likewise.
11116 (vrmulhq_s32): Likewise.
11117 (vrhaddq_s32): Likewise.
11118 (vqsubq_s32): Likewise.
11119 (vqsubq_n_s32): Likewise.
11120 (vqshlq_s32): Likewise.
11121 (vqshlq_r_s32): Likewise.
11122 (vqrshlq_s32): Likewise.
11123 (vqrshlq_n_s32): Likewise.
11124 (vqrdmulhq_s32): Likewise.
11125 (vqrdmulhq_n_s32): Likewise.
11126 (vqdmulhq_s32): Likewise.
11127 (vqdmulhq_n_s32): Likewise.
11128 (vqaddq_s32): Likewise.
11129 (vqaddq_n_s32): Likewise.
11130 (vorrq_s32): Likewise.
11131 (vornq_s32): Likewise.
11132 (vmulq_s32): Likewise.
11133 (vmulq_n_s32): Likewise.
11134 (vmulltq_int_s32): Likewise.
11135 (vmullbq_int_s32): Likewise.
11136 (vmulhq_s32): Likewise.
11137 (vmlsdavxq_s32): Likewise.
11138 (vmlsdavq_s32): Likewise.
11139 (vmladavxq_s32): Likewise.
11140 (vmladavq_s32): Likewise.
11141 (vminvq_s32): Likewise.
11142 (vminq_s32): Likewise.
11143 (vmaxvq_s32): Likewise.
11144 (vmaxq_s32): Likewise.
11145 (vhsubq_s32): Likewise.
11146 (vhsubq_n_s32): Likewise.
11147 (vhcaddq_rot90_s32): Likewise.
11148 (vhcaddq_rot270_s32): Likewise.
11149 (vhaddq_s32): Likewise.
11150 (vhaddq_n_s32): Likewise.
11151 (veorq_s32): Likewise.
11152 (vcaddq_rot90_s32): Likewise.
11153 (vcaddq_rot270_s32): Likewise.
11154 (vbrsrq_n_s32): Likewise.
11155 (vbicq_s32): Likewise.
11156 (vandq_s32): Likewise.
11157 (vaddvaq_s32): Likewise.
11158 (vaddq_n_s32): Likewise.
11159 (vabdq_s32): Likewise.
11160 (vshlq_n_s32): Likewise.
11161 (vrshrq_n_s32): Likewise.
11162 (vqshlq_n_s32): Likewise.
11163 (__arm_vsubq_u8): Define intrinsic.
11164 (__arm_vsubq_n_u8): Likewise.
11165 (__arm_vrmulhq_u8): Likewise.
11166 (__arm_vrhaddq_u8): Likewise.
11167 (__arm_vqsubq_u8): Likewise.
11168 (__arm_vqsubq_n_u8): Likewise.
11169 (__arm_vqaddq_u8): Likewise.
11170 (__arm_vqaddq_n_u8): Likewise.
11171 (__arm_vorrq_u8): Likewise.
11172 (__arm_vornq_u8): Likewise.
11173 (__arm_vmulq_u8): Likewise.
11174 (__arm_vmulq_n_u8): Likewise.
11175 (__arm_vmulltq_int_u8): Likewise.
11176 (__arm_vmullbq_int_u8): Likewise.
11177 (__arm_vmulhq_u8): Likewise.
11178 (__arm_vmladavq_u8): Likewise.
11179 (__arm_vminvq_u8): Likewise.
11180 (__arm_vminq_u8): Likewise.
11181 (__arm_vmaxvq_u8): Likewise.
11182 (__arm_vmaxq_u8): Likewise.
11183 (__arm_vhsubq_u8): Likewise.
11184 (__arm_vhsubq_n_u8): Likewise.
11185 (__arm_vhaddq_u8): Likewise.
11186 (__arm_vhaddq_n_u8): Likewise.
11187 (__arm_veorq_u8): Likewise.
11188 (__arm_vcmpneq_n_u8): Likewise.
11189 (__arm_vcmphiq_u8): Likewise.
11190 (__arm_vcmphiq_n_u8): Likewise.
11191 (__arm_vcmpeqq_u8): Likewise.
11192 (__arm_vcmpeqq_n_u8): Likewise.
11193 (__arm_vcmpcsq_u8): Likewise.
11194 (__arm_vcmpcsq_n_u8): Likewise.
11195 (__arm_vcaddq_rot90_u8): Likewise.
11196 (__arm_vcaddq_rot270_u8): Likewise.
11197 (__arm_vbicq_u8): Likewise.
11198 (__arm_vandq_u8): Likewise.
11199 (__arm_vaddvq_p_u8): Likewise.
11200 (__arm_vaddvaq_u8): Likewise.
11201 (__arm_vaddq_n_u8): Likewise.
11202 (__arm_vabdq_u8): Likewise.
11203 (__arm_vshlq_r_u8): Likewise.
11204 (__arm_vrshlq_u8): Likewise.
11205 (__arm_vrshlq_n_u8): Likewise.
11206 (__arm_vqshlq_u8): Likewise.
11207 (__arm_vqshlq_r_u8): Likewise.
11208 (__arm_vqrshlq_u8): Likewise.
11209 (__arm_vqrshlq_n_u8): Likewise.
11210 (__arm_vminavq_s8): Likewise.
11211 (__arm_vminaq_s8): Likewise.
11212 (__arm_vmaxavq_s8): Likewise.
11213 (__arm_vmaxaq_s8): Likewise.
11214 (__arm_vbrsrq_n_u8): Likewise.
11215 (__arm_vshlq_n_u8): Likewise.
11216 (__arm_vrshrq_n_u8): Likewise.
11217 (__arm_vqshlq_n_u8): Likewise.
11218 (__arm_vcmpneq_n_s8): Likewise.
11219 (__arm_vcmpltq_s8): Likewise.
11220 (__arm_vcmpltq_n_s8): Likewise.
11221 (__arm_vcmpleq_s8): Likewise.
11222 (__arm_vcmpleq_n_s8): Likewise.
11223 (__arm_vcmpgtq_s8): Likewise.
11224 (__arm_vcmpgtq_n_s8): Likewise.
11225 (__arm_vcmpgeq_s8): Likewise.
11226 (__arm_vcmpgeq_n_s8): Likewise.
11227 (__arm_vcmpeqq_s8): Likewise.
11228 (__arm_vcmpeqq_n_s8): Likewise.
11229 (__arm_vqshluq_n_s8): Likewise.
11230 (__arm_vaddvq_p_s8): Likewise.
11231 (__arm_vsubq_s8): Likewise.
11232 (__arm_vsubq_n_s8): Likewise.
11233 (__arm_vshlq_r_s8): Likewise.
11234 (__arm_vrshlq_s8): Likewise.
11235 (__arm_vrshlq_n_s8): Likewise.
11236 (__arm_vrmulhq_s8): Likewise.
11237 (__arm_vrhaddq_s8): Likewise.
11238 (__arm_vqsubq_s8): Likewise.
11239 (__arm_vqsubq_n_s8): Likewise.
11240 (__arm_vqshlq_s8): Likewise.
11241 (__arm_vqshlq_r_s8): Likewise.
11242 (__arm_vqrshlq_s8): Likewise.
11243 (__arm_vqrshlq_n_s8): Likewise.
11244 (__arm_vqrdmulhq_s8): Likewise.
11245 (__arm_vqrdmulhq_n_s8): Likewise.
11246 (__arm_vqdmulhq_s8): Likewise.
11247 (__arm_vqdmulhq_n_s8): Likewise.
11248 (__arm_vqaddq_s8): Likewise.
11249 (__arm_vqaddq_n_s8): Likewise.
11250 (__arm_vorrq_s8): Likewise.
11251 (__arm_vornq_s8): Likewise.
11252 (__arm_vmulq_s8): Likewise.
11253 (__arm_vmulq_n_s8): Likewise.
11254 (__arm_vmulltq_int_s8): Likewise.
11255 (__arm_vmullbq_int_s8): Likewise.
11256 (__arm_vmulhq_s8): Likewise.
11257 (__arm_vmlsdavxq_s8): Likewise.
11258 (__arm_vmlsdavq_s8): Likewise.
11259 (__arm_vmladavxq_s8): Likewise.
11260 (__arm_vmladavq_s8): Likewise.
11261 (__arm_vminvq_s8): Likewise.
11262 (__arm_vminq_s8): Likewise.
11263 (__arm_vmaxvq_s8): Likewise.
11264 (__arm_vmaxq_s8): Likewise.
11265 (__arm_vhsubq_s8): Likewise.
11266 (__arm_vhsubq_n_s8): Likewise.
11267 (__arm_vhcaddq_rot90_s8): Likewise.
11268 (__arm_vhcaddq_rot270_s8): Likewise.
11269 (__arm_vhaddq_s8): Likewise.
11270 (__arm_vhaddq_n_s8): Likewise.
11271 (__arm_veorq_s8): Likewise.
11272 (__arm_vcaddq_rot90_s8): Likewise.
11273 (__arm_vcaddq_rot270_s8): Likewise.
11274 (__arm_vbrsrq_n_s8): Likewise.
11275 (__arm_vbicq_s8): Likewise.
11276 (__arm_vandq_s8): Likewise.
11277 (__arm_vaddvaq_s8): Likewise.
11278 (__arm_vaddq_n_s8): Likewise.
11279 (__arm_vabdq_s8): Likewise.
11280 (__arm_vshlq_n_s8): Likewise.
11281 (__arm_vrshrq_n_s8): Likewise.
11282 (__arm_vqshlq_n_s8): Likewise.
11283 (__arm_vsubq_u16): Likewise.
11284 (__arm_vsubq_n_u16): Likewise.
11285 (__arm_vrmulhq_u16): Likewise.
11286 (__arm_vrhaddq_u16): Likewise.
11287 (__arm_vqsubq_u16): Likewise.
11288 (__arm_vqsubq_n_u16): Likewise.
11289 (__arm_vqaddq_u16): Likewise.
11290 (__arm_vqaddq_n_u16): Likewise.
11291 (__arm_vorrq_u16): Likewise.
11292 (__arm_vornq_u16): Likewise.
11293 (__arm_vmulq_u16): Likewise.
11294 (__arm_vmulq_n_u16): Likewise.
11295 (__arm_vmulltq_int_u16): Likewise.
11296 (__arm_vmullbq_int_u16): Likewise.
11297 (__arm_vmulhq_u16): Likewise.
11298 (__arm_vmladavq_u16): Likewise.
11299 (__arm_vminvq_u16): Likewise.
11300 (__arm_vminq_u16): Likewise.
11301 (__arm_vmaxvq_u16): Likewise.
11302 (__arm_vmaxq_u16): Likewise.
11303 (__arm_vhsubq_u16): Likewise.
11304 (__arm_vhsubq_n_u16): Likewise.
11305 (__arm_vhaddq_u16): Likewise.
11306 (__arm_vhaddq_n_u16): Likewise.
11307 (__arm_veorq_u16): Likewise.
11308 (__arm_vcmpneq_n_u16): Likewise.
11309 (__arm_vcmphiq_u16): Likewise.
11310 (__arm_vcmphiq_n_u16): Likewise.
11311 (__arm_vcmpeqq_u16): Likewise.
11312 (__arm_vcmpeqq_n_u16): Likewise.
11313 (__arm_vcmpcsq_u16): Likewise.
11314 (__arm_vcmpcsq_n_u16): Likewise.
11315 (__arm_vcaddq_rot90_u16): Likewise.
11316 (__arm_vcaddq_rot270_u16): Likewise.
11317 (__arm_vbicq_u16): Likewise.
11318 (__arm_vandq_u16): Likewise.
11319 (__arm_vaddvq_p_u16): Likewise.
11320 (__arm_vaddvaq_u16): Likewise.
11321 (__arm_vaddq_n_u16): Likewise.
11322 (__arm_vabdq_u16): Likewise.
11323 (__arm_vshlq_r_u16): Likewise.
11324 (__arm_vrshlq_u16): Likewise.
11325 (__arm_vrshlq_n_u16): Likewise.
11326 (__arm_vqshlq_u16): Likewise.
11327 (__arm_vqshlq_r_u16): Likewise.
11328 (__arm_vqrshlq_u16): Likewise.
11329 (__arm_vqrshlq_n_u16): Likewise.
11330 (__arm_vminavq_s16): Likewise.
11331 (__arm_vminaq_s16): Likewise.
11332 (__arm_vmaxavq_s16): Likewise.
11333 (__arm_vmaxaq_s16): Likewise.
11334 (__arm_vbrsrq_n_u16): Likewise.
11335 (__arm_vshlq_n_u16): Likewise.
11336 (__arm_vrshrq_n_u16): Likewise.
11337 (__arm_vqshlq_n_u16): Likewise.
11338 (__arm_vcmpneq_n_s16): Likewise.
11339 (__arm_vcmpltq_s16): Likewise.
11340 (__arm_vcmpltq_n_s16): Likewise.
11341 (__arm_vcmpleq_s16): Likewise.
11342 (__arm_vcmpleq_n_s16): Likewise.
11343 (__arm_vcmpgtq_s16): Likewise.
11344 (__arm_vcmpgtq_n_s16): Likewise.
11345 (__arm_vcmpgeq_s16): Likewise.
11346 (__arm_vcmpgeq_n_s16): Likewise.
11347 (__arm_vcmpeqq_s16): Likewise.
11348 (__arm_vcmpeqq_n_s16): Likewise.
11349 (__arm_vqshluq_n_s16): Likewise.
11350 (__arm_vaddvq_p_s16): Likewise.
11351 (__arm_vsubq_s16): Likewise.
11352 (__arm_vsubq_n_s16): Likewise.
11353 (__arm_vshlq_r_s16): Likewise.
11354 (__arm_vrshlq_s16): Likewise.
11355 (__arm_vrshlq_n_s16): Likewise.
11356 (__arm_vrmulhq_s16): Likewise.
11357 (__arm_vrhaddq_s16): Likewise.
11358 (__arm_vqsubq_s16): Likewise.
11359 (__arm_vqsubq_n_s16): Likewise.
11360 (__arm_vqshlq_s16): Likewise.
11361 (__arm_vqshlq_r_s16): Likewise.
11362 (__arm_vqrshlq_s16): Likewise.
11363 (__arm_vqrshlq_n_s16): Likewise.
11364 (__arm_vqrdmulhq_s16): Likewise.
11365 (__arm_vqrdmulhq_n_s16): Likewise.
11366 (__arm_vqdmulhq_s16): Likewise.
11367 (__arm_vqdmulhq_n_s16): Likewise.
11368 (__arm_vqaddq_s16): Likewise.
11369 (__arm_vqaddq_n_s16): Likewise.
11370 (__arm_vorrq_s16): Likewise.
11371 (__arm_vornq_s16): Likewise.
11372 (__arm_vmulq_s16): Likewise.
11373 (__arm_vmulq_n_s16): Likewise.
11374 (__arm_vmulltq_int_s16): Likewise.
11375 (__arm_vmullbq_int_s16): Likewise.
11376 (__arm_vmulhq_s16): Likewise.
11377 (__arm_vmlsdavxq_s16): Likewise.
11378 (__arm_vmlsdavq_s16): Likewise.
11379 (__arm_vmladavxq_s16): Likewise.
11380 (__arm_vmladavq_s16): Likewise.
11381 (__arm_vminvq_s16): Likewise.
11382 (__arm_vminq_s16): Likewise.
11383 (__arm_vmaxvq_s16): Likewise.
11384 (__arm_vmaxq_s16): Likewise.
11385 (__arm_vhsubq_s16): Likewise.
11386 (__arm_vhsubq_n_s16): Likewise.
11387 (__arm_vhcaddq_rot90_s16): Likewise.
11388 (__arm_vhcaddq_rot270_s16): Likewise.
11389 (__arm_vhaddq_s16): Likewise.
11390 (__arm_vhaddq_n_s16): Likewise.
11391 (__arm_veorq_s16): Likewise.
11392 (__arm_vcaddq_rot90_s16): Likewise.
11393 (__arm_vcaddq_rot270_s16): Likewise.
11394 (__arm_vbrsrq_n_s16): Likewise.
11395 (__arm_vbicq_s16): Likewise.
11396 (__arm_vandq_s16): Likewise.
11397 (__arm_vaddvaq_s16): Likewise.
11398 (__arm_vaddq_n_s16): Likewise.
11399 (__arm_vabdq_s16): Likewise.
11400 (__arm_vshlq_n_s16): Likewise.
11401 (__arm_vrshrq_n_s16): Likewise.
11402 (__arm_vqshlq_n_s16): Likewise.
11403 (__arm_vsubq_u32): Likewise.
11404 (__arm_vsubq_n_u32): Likewise.
11405 (__arm_vrmulhq_u32): Likewise.
11406 (__arm_vrhaddq_u32): Likewise.
11407 (__arm_vqsubq_u32): Likewise.
11408 (__arm_vqsubq_n_u32): Likewise.
11409 (__arm_vqaddq_u32): Likewise.
11410 (__arm_vqaddq_n_u32): Likewise.
11411 (__arm_vorrq_u32): Likewise.
11412 (__arm_vornq_u32): Likewise.
11413 (__arm_vmulq_u32): Likewise.
11414 (__arm_vmulq_n_u32): Likewise.
11415 (__arm_vmulltq_int_u32): Likewise.
11416 (__arm_vmullbq_int_u32): Likewise.
11417 (__arm_vmulhq_u32): Likewise.
11418 (__arm_vmladavq_u32): Likewise.
11419 (__arm_vminvq_u32): Likewise.
11420 (__arm_vminq_u32): Likewise.
11421 (__arm_vmaxvq_u32): Likewise.
11422 (__arm_vmaxq_u32): Likewise.
11423 (__arm_vhsubq_u32): Likewise.
11424 (__arm_vhsubq_n_u32): Likewise.
11425 (__arm_vhaddq_u32): Likewise.
11426 (__arm_vhaddq_n_u32): Likewise.
11427 (__arm_veorq_u32): Likewise.
11428 (__arm_vcmpneq_n_u32): Likewise.
11429 (__arm_vcmphiq_u32): Likewise.
11430 (__arm_vcmphiq_n_u32): Likewise.
11431 (__arm_vcmpeqq_u32): Likewise.
11432 (__arm_vcmpeqq_n_u32): Likewise.
11433 (__arm_vcmpcsq_u32): Likewise.
11434 (__arm_vcmpcsq_n_u32): Likewise.
11435 (__arm_vcaddq_rot90_u32): Likewise.
11436 (__arm_vcaddq_rot270_u32): Likewise.
11437 (__arm_vbicq_u32): Likewise.
11438 (__arm_vandq_u32): Likewise.
11439 (__arm_vaddvq_p_u32): Likewise.
11440 (__arm_vaddvaq_u32): Likewise.
11441 (__arm_vaddq_n_u32): Likewise.
11442 (__arm_vabdq_u32): Likewise.
11443 (__arm_vshlq_r_u32): Likewise.
11444 (__arm_vrshlq_u32): Likewise.
11445 (__arm_vrshlq_n_u32): Likewise.
11446 (__arm_vqshlq_u32): Likewise.
11447 (__arm_vqshlq_r_u32): Likewise.
11448 (__arm_vqrshlq_u32): Likewise.
11449 (__arm_vqrshlq_n_u32): Likewise.
11450 (__arm_vminavq_s32): Likewise.
11451 (__arm_vminaq_s32): Likewise.
11452 (__arm_vmaxavq_s32): Likewise.
11453 (__arm_vmaxaq_s32): Likewise.
11454 (__arm_vbrsrq_n_u32): Likewise.
11455 (__arm_vshlq_n_u32): Likewise.
11456 (__arm_vrshrq_n_u32): Likewise.
11457 (__arm_vqshlq_n_u32): Likewise.
11458 (__arm_vcmpneq_n_s32): Likewise.
11459 (__arm_vcmpltq_s32): Likewise.
11460 (__arm_vcmpltq_n_s32): Likewise.
11461 (__arm_vcmpleq_s32): Likewise.
11462 (__arm_vcmpleq_n_s32): Likewise.
11463 (__arm_vcmpgtq_s32): Likewise.
11464 (__arm_vcmpgtq_n_s32): Likewise.
11465 (__arm_vcmpgeq_s32): Likewise.
11466 (__arm_vcmpgeq_n_s32): Likewise.
11467 (__arm_vcmpeqq_s32): Likewise.
11468 (__arm_vcmpeqq_n_s32): Likewise.
11469 (__arm_vqshluq_n_s32): Likewise.
11470 (__arm_vaddvq_p_s32): Likewise.
11471 (__arm_vsubq_s32): Likewise.
11472 (__arm_vsubq_n_s32): Likewise.
11473 (__arm_vshlq_r_s32): Likewise.
11474 (__arm_vrshlq_s32): Likewise.
11475 (__arm_vrshlq_n_s32): Likewise.
11476 (__arm_vrmulhq_s32): Likewise.
11477 (__arm_vrhaddq_s32): Likewise.
11478 (__arm_vqsubq_s32): Likewise.
11479 (__arm_vqsubq_n_s32): Likewise.
11480 (__arm_vqshlq_s32): Likewise.
11481 (__arm_vqshlq_r_s32): Likewise.
11482 (__arm_vqrshlq_s32): Likewise.
11483 (__arm_vqrshlq_n_s32): Likewise.
11484 (__arm_vqrdmulhq_s32): Likewise.
11485 (__arm_vqrdmulhq_n_s32): Likewise.
11486 (__arm_vqdmulhq_s32): Likewise.
11487 (__arm_vqdmulhq_n_s32): Likewise.
11488 (__arm_vqaddq_s32): Likewise.
11489 (__arm_vqaddq_n_s32): Likewise.
11490 (__arm_vorrq_s32): Likewise.
11491 (__arm_vornq_s32): Likewise.
11492 (__arm_vmulq_s32): Likewise.
11493 (__arm_vmulq_n_s32): Likewise.
11494 (__arm_vmulltq_int_s32): Likewise.
11495 (__arm_vmullbq_int_s32): Likewise.
11496 (__arm_vmulhq_s32): Likewise.
11497 (__arm_vmlsdavxq_s32): Likewise.
11498 (__arm_vmlsdavq_s32): Likewise.
11499 (__arm_vmladavxq_s32): Likewise.
11500 (__arm_vmladavq_s32): Likewise.
11501 (__arm_vminvq_s32): Likewise.
11502 (__arm_vminq_s32): Likewise.
11503 (__arm_vmaxvq_s32): Likewise.
11504 (__arm_vmaxq_s32): Likewise.
11505 (__arm_vhsubq_s32): Likewise.
11506 (__arm_vhsubq_n_s32): Likewise.
11507 (__arm_vhcaddq_rot90_s32): Likewise.
11508 (__arm_vhcaddq_rot270_s32): Likewise.
11509 (__arm_vhaddq_s32): Likewise.
11510 (__arm_vhaddq_n_s32): Likewise.
11511 (__arm_veorq_s32): Likewise.
11512 (__arm_vcaddq_rot90_s32): Likewise.
11513 (__arm_vcaddq_rot270_s32): Likewise.
11514 (__arm_vbrsrq_n_s32): Likewise.
11515 (__arm_vbicq_s32): Likewise.
11516 (__arm_vandq_s32): Likewise.
11517 (__arm_vaddvaq_s32): Likewise.
11518 (__arm_vaddq_n_s32): Likewise.
11519 (__arm_vabdq_s32): Likewise.
11520 (__arm_vshlq_n_s32): Likewise.
11521 (__arm_vrshrq_n_s32): Likewise.
11522 (__arm_vqshlq_n_s32): Likewise.
11523 (vsubq): Define polymorphic variant.
11524 (vsubq_n): Likewise.
11525 (vshlq_r): Likewise.
11526 (vrshlq_n): Likewise.
11527 (vrshlq): Likewise.
11528 (vrmulhq): Likewise.
11529 (vrhaddq): Likewise.
11530 (vqsubq_n): Likewise.
11531 (vqsubq): Likewise.
11532 (vqshlq): Likewise.
11533 (vqshlq_r): Likewise.
11534 (vqshluq): Likewise.
11535 (vrshrq_n): Likewise.
11536 (vshlq_n): Likewise.
11537 (vqshluq_n): Likewise.
11538 (vqshlq_n): Likewise.
11539 (vqrshlq_n): Likewise.
11540 (vqrshlq): Likewise.
11541 (vqrdmulhq_n): Likewise.
11542 (vqrdmulhq): Likewise.
11543 (vqdmulhq_n): Likewise.
11544 (vqdmulhq): Likewise.
11545 (vqaddq_n): Likewise.
11546 (vqaddq): Likewise.
11547 (vorrq_n): Likewise.
11550 (vmulq_n): Likewise.
11552 (vmulltq_int): Likewise.
11553 (vmullbq_int): Likewise.
11554 (vmulhq): Likewise.
11556 (vminaq): Likewise.
11558 (vmaxaq): Likewise.
11559 (vhsubq_n): Likewise.
11560 (vhsubq): Likewise.
11561 (vhcaddq_rot90): Likewise.
11562 (vhcaddq_rot270): Likewise.
11563 (vhaddq_n): Likewise.
11564 (vhaddq): Likewise.
11566 (vcaddq_rot90): Likewise.
11567 (vcaddq_rot270): Likewise.
11568 (vbrsrq_n): Likewise.
11569 (vbicq_n): Likewise.
11572 (vaddq_n): Likewise.
11575 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
11576 (BINOP_NONE_NONE_NONE): Likewise.
11577 (BINOP_NONE_NONE_UNONE): Likewise.
11578 (BINOP_UNONE_NONE_IMM): Likewise.
11579 (BINOP_UNONE_NONE_NONE): Likewise.
11580 (BINOP_UNONE_UNONE_IMM): Likewise.
11581 (BINOP_UNONE_UNONE_NONE): Likewise.
11582 (BINOP_UNONE_UNONE_UNONE): Likewise.
11583 * config/arm/constraints.md (Ra): Define constraint to check constant is
11584 in the range of 0 to 7.
11585 (Rg): Define constriant to check the constant is one among 1, 2, 4
11587 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
11588 (mve_vaddq_n_<supf>): Likewise.
11589 (mve_vaddvaq_<supf>): Likewise.
11590 (mve_vaddvq_p_<supf>): Likewise.
11591 (mve_vandq_<supf>): Likewise.
11592 (mve_vbicq_<supf>): Likewise.
11593 (mve_vbrsrq_n_<supf>): Likewise.
11594 (mve_vcaddq_rot270_<supf>): Likewise.
11595 (mve_vcaddq_rot90_<supf>): Likewise.
11596 (mve_vcmpcsq_n_u): Likewise.
11597 (mve_vcmpcsq_u): Likewise.
11598 (mve_vcmpeqq_n_<supf>): Likewise.
11599 (mve_vcmpeqq_<supf>): Likewise.
11600 (mve_vcmpgeq_n_s): Likewise.
11601 (mve_vcmpgeq_s): Likewise.
11602 (mve_vcmpgtq_n_s): Likewise.
11603 (mve_vcmpgtq_s): Likewise.
11604 (mve_vcmphiq_n_u): Likewise.
11605 (mve_vcmphiq_u): Likewise.
11606 (mve_vcmpleq_n_s): Likewise.
11607 (mve_vcmpleq_s): Likewise.
11608 (mve_vcmpltq_n_s): Likewise.
11609 (mve_vcmpltq_s): Likewise.
11610 (mve_vcmpneq_n_<supf>): Likewise.
11611 (mve_vddupq_n_u): Likewise.
11612 (mve_veorq_<supf>): Likewise.
11613 (mve_vhaddq_n_<supf>): Likewise.
11614 (mve_vhaddq_<supf>): Likewise.
11615 (mve_vhcaddq_rot270_s): Likewise.
11616 (mve_vhcaddq_rot90_s): Likewise.
11617 (mve_vhsubq_n_<supf>): Likewise.
11618 (mve_vhsubq_<supf>): Likewise.
11619 (mve_vidupq_n_u): Likewise.
11620 (mve_vmaxaq_s): Likewise.
11621 (mve_vmaxavq_s): Likewise.
11622 (mve_vmaxq_<supf>): Likewise.
11623 (mve_vmaxvq_<supf>): Likewise.
11624 (mve_vminaq_s): Likewise.
11625 (mve_vminavq_s): Likewise.
11626 (mve_vminq_<supf>): Likewise.
11627 (mve_vminvq_<supf>): Likewise.
11628 (mve_vmladavq_<supf>): Likewise.
11629 (mve_vmladavxq_s): Likewise.
11630 (mve_vmlsdavq_s): Likewise.
11631 (mve_vmlsdavxq_s): Likewise.
11632 (mve_vmulhq_<supf>): Likewise.
11633 (mve_vmullbq_int_<supf>): Likewise.
11634 (mve_vmulltq_int_<supf>): Likewise.
11635 (mve_vmulq_n_<supf>): Likewise.
11636 (mve_vmulq_<supf>): Likewise.
11637 (mve_vornq_<supf>): Likewise.
11638 (mve_vorrq_<supf>): Likewise.
11639 (mve_vqaddq_n_<supf>): Likewise.
11640 (mve_vqaddq_<supf>): Likewise.
11641 (mve_vqdmulhq_n_s): Likewise.
11642 (mve_vqdmulhq_s): Likewise.
11643 (mve_vqrdmulhq_n_s): Likewise.
11644 (mve_vqrdmulhq_s): Likewise.
11645 (mve_vqrshlq_n_<supf>): Likewise.
11646 (mve_vqrshlq_<supf>): Likewise.
11647 (mve_vqshlq_n_<supf>): Likewise.
11648 (mve_vqshlq_r_<supf>): Likewise.
11649 (mve_vqshlq_<supf>): Likewise.
11650 (mve_vqshluq_n_s): Likewise.
11651 (mve_vqsubq_n_<supf>): Likewise.
11652 (mve_vqsubq_<supf>): Likewise.
11653 (mve_vrhaddq_<supf>): Likewise.
11654 (mve_vrmulhq_<supf>): Likewise.
11655 (mve_vrshlq_n_<supf>): Likewise.
11656 (mve_vrshlq_<supf>): Likewise.
11657 (mve_vrshrq_n_<supf>): Likewise.
11658 (mve_vshlq_n_<supf>): Likewise.
11659 (mve_vshlq_r_<supf>): Likewise.
11660 (mve_vsubq_n_<supf>): Likewise.
11661 (mve_vsubq_<supf>): Likewise.
11662 * config/arm/predicates.md (mve_imm_7): Define predicate to check
11663 the matching constraint Ra.
11664 (mve_imm_selective_upto_8): Define predicate to check the matching
11667 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11668 Mihail Ionescu <mihail.ionescu@arm.com>
11669 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11671 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
11672 qualifier for binary operands.
11673 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11674 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11675 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
11676 (vaddlvq_p_u32): Likewise.
11677 (vcmpneq_s8): Likewise.
11678 (vcmpneq_s16): Likewise.
11679 (vcmpneq_s32): Likewise.
11680 (vcmpneq_u8): Likewise.
11681 (vcmpneq_u16): Likewise.
11682 (vcmpneq_u32): Likewise.
11683 (vshlq_s8): Likewise.
11684 (vshlq_s16): Likewise.
11685 (vshlq_s32): Likewise.
11686 (vshlq_u8): Likewise.
11687 (vshlq_u16): Likewise.
11688 (vshlq_u32): Likewise.
11689 (__arm_vaddlvq_p_s32): Define intrinsic.
11690 (__arm_vaddlvq_p_u32): Likewise.
11691 (__arm_vcmpneq_s8): Likewise.
11692 (__arm_vcmpneq_s16): Likewise.
11693 (__arm_vcmpneq_s32): Likewise.
11694 (__arm_vcmpneq_u8): Likewise.
11695 (__arm_vcmpneq_u16): Likewise.
11696 (__arm_vcmpneq_u32): Likewise.
11697 (__arm_vshlq_s8): Likewise.
11698 (__arm_vshlq_s16): Likewise.
11699 (__arm_vshlq_s32): Likewise.
11700 (__arm_vshlq_u8): Likewise.
11701 (__arm_vshlq_u16): Likewise.
11702 (__arm_vshlq_u32): Likewise.
11703 (vaddlvq_p): Define polymorphic variant.
11704 (vcmpneq): Likewise.
11706 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
11708 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
11709 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
11710 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
11711 (mve_vcmpneq_<supf><mode>): Likewise.
11712 (mve_vshlq_<supf><mode>): Likewise.
11714 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11715 Mihail Ionescu <mihail.ionescu@arm.com>
11716 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11718 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
11719 qualifier for binary operands.
11720 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11721 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11722 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
11723 (vcvtq_n_s32_f32): Likewise.
11724 (vcvtq_n_u16_f16): Likewise.
11725 (vcvtq_n_u32_f32): Likewise.
11726 (vcreateq_u8): Likewise.
11727 (vcreateq_u16): Likewise.
11728 (vcreateq_u32): Likewise.
11729 (vcreateq_u64): Likewise.
11730 (vcreateq_s8): Likewise.
11731 (vcreateq_s16): Likewise.
11732 (vcreateq_s32): Likewise.
11733 (vcreateq_s64): Likewise.
11734 (vshrq_n_s8): Likewise.
11735 (vshrq_n_s16): Likewise.
11736 (vshrq_n_s32): Likewise.
11737 (vshrq_n_u8): Likewise.
11738 (vshrq_n_u16): Likewise.
11739 (vshrq_n_u32): Likewise.
11740 (__arm_vcreateq_u8): Define intrinsic.
11741 (__arm_vcreateq_u16): Likewise.
11742 (__arm_vcreateq_u32): Likewise.
11743 (__arm_vcreateq_u64): Likewise.
11744 (__arm_vcreateq_s8): Likewise.
11745 (__arm_vcreateq_s16): Likewise.
11746 (__arm_vcreateq_s32): Likewise.
11747 (__arm_vcreateq_s64): Likewise.
11748 (__arm_vshrq_n_s8): Likewise.
11749 (__arm_vshrq_n_s16): Likewise.
11750 (__arm_vshrq_n_s32): Likewise.
11751 (__arm_vshrq_n_u8): Likewise.
11752 (__arm_vshrq_n_u16): Likewise.
11753 (__arm_vshrq_n_u32): Likewise.
11754 (__arm_vcvtq_n_s16_f16): Likewise.
11755 (__arm_vcvtq_n_s32_f32): Likewise.
11756 (__arm_vcvtq_n_u16_f16): Likewise.
11757 (__arm_vcvtq_n_u32_f32): Likewise.
11758 (vshrq_n): Define polymorphic variant.
11759 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
11761 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11762 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
11763 * config/arm/constraints.md (Rb): Define constraint to check constant is
11764 in the range of 1 to 8.
11765 (Rf): Define constraint to check constant is in the range of 1 to 32.
11766 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
11767 (mve_vshrq_n_<supf><mode>): Likewise.
11768 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
11769 * config/arm/predicates.md (mve_imm_8): Define predicate to check
11770 the matching constraint Rb.
11771 (mve_imm_32): Define predicate to check the matching constraint Rf.
11773 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11774 Mihail Ionescu <mihail.ionescu@arm.com>
11775 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11777 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
11778 qualifier for binary operands.
11779 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11780 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11781 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11782 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
11783 (vsubq_n_f32): Likewise.
11784 (vbrsrq_n_f16): Likewise.
11785 (vbrsrq_n_f32): Likewise.
11786 (vcvtq_n_f16_s16): Likewise.
11787 (vcvtq_n_f32_s32): Likewise.
11788 (vcvtq_n_f16_u16): Likewise.
11789 (vcvtq_n_f32_u32): Likewise.
11790 (vcreateq_f16): Likewise.
11791 (vcreateq_f32): Likewise.
11792 (__arm_vsubq_n_f16): Define intrinsic.
11793 (__arm_vsubq_n_f32): Likewise.
11794 (__arm_vbrsrq_n_f16): Likewise.
11795 (__arm_vbrsrq_n_f32): Likewise.
11796 (__arm_vcvtq_n_f16_s16): Likewise.
11797 (__arm_vcvtq_n_f32_s32): Likewise.
11798 (__arm_vcvtq_n_f16_u16): Likewise.
11799 (__arm_vcvtq_n_f32_u32): Likewise.
11800 (__arm_vcreateq_f16): Likewise.
11801 (__arm_vcreateq_f32): Likewise.
11802 (vsubq): Define polymorphic variant.
11803 (vbrsrq): Likewise.
11804 (vcvtq_n): Likewise.
11805 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
11807 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
11808 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
11809 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
11810 * config/arm/constraints.md (Rd): Define constraint to check constant is
11811 in the range of 1 to 16.
11812 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
11813 mve_vbrsrq_n_f<mode>: Likewise.
11814 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
11815 mve_vcreateq_f<mode>: Likewise.
11816 * config/arm/predicates.md (mve_imm_16): Define predicate to check
11817 the matching constraint Rd.
11819 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11820 Mihail Ionescu <mihail.ionescu@arm.com>
11821 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11823 * config/arm/arm-builtins.c (hi_UP): Define mode.
11824 * config/arm/arm.h (IS_VPR_REGNUM): Move.
11825 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
11826 (APSRQ_REGNUM): Modify.
11827 (APSRGE_REGNUM): Modify.
11828 * config/arm/arm_mve.h (vctp16q): Define macro.
11829 (vctp32q): Likewise.
11830 (vctp64q): Likewise.
11831 (vctp8q): Likewise.
11833 (__arm_vctp16q): Define intrinsic.
11834 (__arm_vctp32q): Likewise.
11835 (__arm_vctp64q): Likewise.
11836 (__arm_vctp8q): Likewise.
11837 (__arm_vpnot): Likewise.
11838 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
11840 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
11841 (mve_vpnothi): Likewise.
11843 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
11844 Mihail Ionescu <mihail.ionescu@arm.com>
11845 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11847 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
11848 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
11849 (vdupq_n_s16): Likewise.
11850 (vdupq_n_s32): Likewise.
11851 (vabsq_s8): Likewise.
11852 (vabsq_s16): Likewise.
11853 (vabsq_s32): Likewise.
11854 (vclsq_s8): Likewise.
11855 (vclsq_s16): Likewise.
11856 (vclsq_s32): Likewise.
11857 (vclzq_s8): Likewise.
11858 (vclzq_s16): Likewise.
11859 (vclzq_s32): Likewise.
11860 (vnegq_s8): Likewise.
11861 (vnegq_s16): Likewise.
11862 (vnegq_s32): Likewise.
11863 (vaddlvq_s32): Likewise.
11864 (vaddvq_s8): Likewise.
11865 (vaddvq_s16): Likewise.
11866 (vaddvq_s32): Likewise.
11867 (vmovlbq_s8): Likewise.
11868 (vmovlbq_s16): Likewise.
11869 (vmovltq_s8): Likewise.
11870 (vmovltq_s16): Likewise.
11871 (vmvnq_s8): Likewise.
11872 (vmvnq_s16): Likewise.
11873 (vmvnq_s32): Likewise.
11874 (vrev16q_s8): Likewise.
11875 (vrev32q_s8): Likewise.
11876 (vrev32q_s16): Likewise.
11877 (vqabsq_s8): Likewise.
11878 (vqabsq_s16): Likewise.
11879 (vqabsq_s32): Likewise.
11880 (vqnegq_s8): Likewise.
11881 (vqnegq_s16): Likewise.
11882 (vqnegq_s32): Likewise.
11883 (vcvtaq_s16_f16): Likewise.
11884 (vcvtaq_s32_f32): Likewise.
11885 (vcvtnq_s16_f16): Likewise.
11886 (vcvtnq_s32_f32): Likewise.
11887 (vcvtpq_s16_f16): Likewise.
11888 (vcvtpq_s32_f32): Likewise.
11889 (vcvtmq_s16_f16): Likewise.
11890 (vcvtmq_s32_f32): Likewise.
11891 (vmvnq_u8): Likewise.
11892 (vmvnq_u16): Likewise.
11893 (vmvnq_u32): Likewise.
11894 (vdupq_n_u8): Likewise.
11895 (vdupq_n_u16): Likewise.
11896 (vdupq_n_u32): Likewise.
11897 (vclzq_u8): Likewise.
11898 (vclzq_u16): Likewise.
11899 (vclzq_u32): Likewise.
11900 (vaddvq_u8): Likewise.
11901 (vaddvq_u16): Likewise.
11902 (vaddvq_u32): Likewise.
11903 (vrev32q_u8): Likewise.
11904 (vrev32q_u16): Likewise.
11905 (vmovltq_u8): Likewise.
11906 (vmovltq_u16): Likewise.
11907 (vmovlbq_u8): Likewise.
11908 (vmovlbq_u16): Likewise.
11909 (vrev16q_u8): Likewise.
11910 (vaddlvq_u32): Likewise.
11911 (vcvtpq_u16_f16): Likewise.
11912 (vcvtpq_u32_f32): Likewise.
11913 (vcvtnq_u16_f16): Likewise.
11914 (vcvtmq_u16_f16): Likewise.
11915 (vcvtmq_u32_f32): Likewise.
11916 (vcvtaq_u16_f16): Likewise.
11917 (vcvtaq_u32_f32): Likewise.
11918 (__arm_vdupq_n_s8): Define intrinsic.
11919 (__arm_vdupq_n_s16): Likewise.
11920 (__arm_vdupq_n_s32): Likewise.
11921 (__arm_vabsq_s8): Likewise.
11922 (__arm_vabsq_s16): Likewise.
11923 (__arm_vabsq_s32): Likewise.
11924 (__arm_vclsq_s8): Likewise.
11925 (__arm_vclsq_s16): Likewise.
11926 (__arm_vclsq_s32): Likewise.
11927 (__arm_vclzq_s8): Likewise.
11928 (__arm_vclzq_s16): Likewise.
11929 (__arm_vclzq_s32): Likewise.
11930 (__arm_vnegq_s8): Likewise.
11931 (__arm_vnegq_s16): Likewise.
11932 (__arm_vnegq_s32): Likewise.
11933 (__arm_vaddlvq_s32): Likewise.
11934 (__arm_vaddvq_s8): Likewise.
11935 (__arm_vaddvq_s16): Likewise.
11936 (__arm_vaddvq_s32): Likewise.
11937 (__arm_vmovlbq_s8): Likewise.
11938 (__arm_vmovlbq_s16): Likewise.
11939 (__arm_vmovltq_s8): Likewise.
11940 (__arm_vmovltq_s16): Likewise.
11941 (__arm_vmvnq_s8): Likewise.
11942 (__arm_vmvnq_s16): Likewise.
11943 (__arm_vmvnq_s32): Likewise.
11944 (__arm_vrev16q_s8): Likewise.
11945 (__arm_vrev32q_s8): Likewise.
11946 (__arm_vrev32q_s16): Likewise.
11947 (__arm_vqabsq_s8): Likewise.
11948 (__arm_vqabsq_s16): Likewise.
11949 (__arm_vqabsq_s32): Likewise.
11950 (__arm_vqnegq_s8): Likewise.
11951 (__arm_vqnegq_s16): Likewise.
11952 (__arm_vqnegq_s32): Likewise.
11953 (__arm_vmvnq_u8): Likewise.
11954 (__arm_vmvnq_u16): Likewise.
11955 (__arm_vmvnq_u32): Likewise.
11956 (__arm_vdupq_n_u8): Likewise.
11957 (__arm_vdupq_n_u16): Likewise.
11958 (__arm_vdupq_n_u32): Likewise.
11959 (__arm_vclzq_u8): Likewise.
11960 (__arm_vclzq_u16): Likewise.
11961 (__arm_vclzq_u32): Likewise.
11962 (__arm_vaddvq_u8): Likewise.
11963 (__arm_vaddvq_u16): Likewise.
11964 (__arm_vaddvq_u32): Likewise.
11965 (__arm_vrev32q_u8): Likewise.
11966 (__arm_vrev32q_u16): Likewise.
11967 (__arm_vmovltq_u8): Likewise.
11968 (__arm_vmovltq_u16): Likewise.
11969 (__arm_vmovlbq_u8): Likewise.
11970 (__arm_vmovlbq_u16): Likewise.
11971 (__arm_vrev16q_u8): Likewise.
11972 (__arm_vaddlvq_u32): Likewise.
11973 (__arm_vcvtpq_u16_f16): Likewise.
11974 (__arm_vcvtpq_u32_f32): Likewise.
11975 (__arm_vcvtnq_u16_f16): Likewise.
11976 (__arm_vcvtmq_u16_f16): Likewise.
11977 (__arm_vcvtmq_u32_f32): Likewise.
11978 (__arm_vcvtaq_u16_f16): Likewise.
11979 (__arm_vcvtaq_u32_f32): Likewise.
11980 (__arm_vcvtaq_s16_f16): Likewise.
11981 (__arm_vcvtaq_s32_f32): Likewise.
11982 (__arm_vcvtnq_s16_f16): Likewise.
11983 (__arm_vcvtnq_s32_f32): Likewise.
11984 (__arm_vcvtpq_s16_f16): Likewise.
11985 (__arm_vcvtpq_s32_f32): Likewise.
11986 (__arm_vcvtmq_s16_f16): Likewise.
11987 (__arm_vcvtmq_s32_f32): Likewise.
11988 (vdupq_n): Define polymorphic variant.
11993 (vaddlvq): Likewise.
11994 (vaddvq): Likewise.
11995 (vmovlbq): Likewise.
11996 (vmovltq): Likewise.
11998 (vrev16q): Likewise.
11999 (vrev32q): Likewise.
12000 (vqabsq): Likewise.
12001 (vqnegq): Likewise.
12002 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12003 (UNOP_SNONE_NONE): Likewise.
12004 (UNOP_UNONE_UNONE): Likewise.
12005 (UNOP_UNONE_NONE): Likewise.
12006 * config/arm/constraints.md (e): Define new constriant to allow only
12008 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
12009 (mve_vnegq_s<mode>): Likewise.
12010 (mve_vmvnq_<supf><mode>): Likewise.
12011 (mve_vdupq_n_<supf><mode>): Likewise.
12012 (mve_vclzq_<supf><mode>): Likewise.
12013 (mve_vclsq_s<mode>): Likewise.
12014 (mve_vaddvq_<supf><mode>): Likewise.
12015 (mve_vabsq_s<mode>): Likewise.
12016 (mve_vrev32q_<supf><mode>): Likewise.
12017 (mve_vmovltq_<supf><mode>): Likewise.
12018 (mve_vmovlbq_<supf><mode>): Likewise.
12019 (mve_vcvtpq_<supf><mode>): Likewise.
12020 (mve_vcvtnq_<supf><mode>): Likewise.
12021 (mve_vcvtmq_<supf><mode>): Likewise.
12022 (mve_vcvtaq_<supf><mode>): Likewise.
12023 (mve_vrev16q_<supf>v16qi): Likewise.
12024 (mve_vaddlvq_<supf>v4si): Likewise.
12026 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12028 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
12030 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
12032 * read-rtl-function.c (find_param_by_name,
12033 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
12035 * spellcheck.c (get_edit_distance_cutoff): Likewise.
12036 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
12037 * tree.def (SWITCH_EXPR): Likewise.
12038 * selftest.c (assert_str_contains): Likewise.
12039 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
12041 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
12042 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
12043 * langhooks.h (struct lang_hooks_for_decls): Likewise.
12044 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
12045 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
12047 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
12048 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
12049 * tree.c (component_ref_size): Likewise.
12050 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
12051 * gimple-ssa-sprintf.c (get_string_length, format_string,
12052 format_directive): Likewise.
12053 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
12054 * input.c (string_concat_db::get_string_concatenation,
12055 test_lexer_string_locations_ucn4): Likewise.
12056 * cfgexpand.c (pass_expand::execute): Likewise.
12057 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
12058 maybe_diag_overlap): Likewise.
12059 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
12060 * shrink-wrap.c (spread_components): Likewise.
12061 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
12063 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
12065 * dwarf2out.c (dwarf2out_early_finish): Likewise.
12066 * gimple-ssa-store-merging.c: Likewise.
12067 * ira-costs.c (record_operand_costs): Likewise.
12068 * tree-vect-loop.c (vectorizable_reduction): Likewise.
12069 * target.def (dispatch): Likewise.
12070 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
12071 in documentation text.
12072 * doc/tm.texi: Regenerated.
12073 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
12074 duplicated word issue in a comment.
12075 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
12076 * config/i386/i386-features.c (remove_partial_avx_dependency):
12078 * config/msp430/msp430.c (msp430_select_section): Likewise.
12079 * config/gcn/gcn-run.c (load_image): Likewise.
12080 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
12081 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
12082 * config/aarch64/falkor-tag-collision-avoidance.c
12083 (single_dest_per_chain): Likewise.
12084 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
12085 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
12086 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
12087 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
12089 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
12090 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
12091 * config/rs6000/rs6000-logue.c
12092 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
12093 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
12094 Fix various other issues in the comment.
12096 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
12098 * config/arm/t-rmprofile: create new multilib for
12099 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
12102 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12104 PR tree-optimization/94015
12105 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
12106 function where EXP is address of the bytes being stored rather than
12107 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
12108 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
12109 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
12110 calling native_encode_expr if host or target doesn't have 8-bit
12111 chars. Formatting fixes.
12112 (count_nonzero_bytes_addr): New function.
12114 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12115 Mihail Ionescu <mihail.ionescu@arm.com>
12116 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12118 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
12119 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
12120 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
12121 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
12122 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
12123 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
12124 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
12125 (vmvnq_n_s32): Likewise.
12126 (vrev64q_s8): Likewise.
12127 (vrev64q_s16): Likewise.
12128 (vrev64q_s32): Likewise.
12129 (vcvtq_s16_f16): Likewise.
12130 (vcvtq_s32_f32): Likewise.
12131 (vrev64q_u8): Likewise.
12132 (vrev64q_u16): Likewise.
12133 (vrev64q_u32): Likewise.
12134 (vmvnq_n_u16): Likewise.
12135 (vmvnq_n_u32): Likewise.
12136 (vcvtq_u16_f16): Likewise.
12137 (vcvtq_u32_f32): Likewise.
12138 (__arm_vmvnq_n_s16): Define intrinsic.
12139 (__arm_vmvnq_n_s32): Likewise.
12140 (__arm_vrev64q_s8): Likewise.
12141 (__arm_vrev64q_s16): Likewise.
12142 (__arm_vrev64q_s32): Likewise.
12143 (__arm_vrev64q_u8): Likewise.
12144 (__arm_vrev64q_u16): Likewise.
12145 (__arm_vrev64q_u32): Likewise.
12146 (__arm_vmvnq_n_u16): Likewise.
12147 (__arm_vmvnq_n_u32): Likewise.
12148 (__arm_vcvtq_s16_f16): Likewise.
12149 (__arm_vcvtq_s32_f32): Likewise.
12150 (__arm_vcvtq_u16_f16): Likewise.
12151 (__arm_vcvtq_u32_f32): Likewise.
12152 (vrev64q): Define polymorphic variant.
12153 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
12154 (UNOP_SNONE_NONE): Likewise.
12155 (UNOP_SNONE_IMM): Likewise.
12156 (UNOP_UNONE_UNONE): Likewise.
12157 (UNOP_UNONE_NONE): Likewise.
12158 (UNOP_UNONE_IMM): Likewise.
12159 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
12160 (mve_vcvtq_from_f_<supf><mode>): Likewise.
12161 (mve_vmvnq_n_<supf><mode>): Likewise.
12163 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12164 Mihail Ionescu <mihail.ionescu@arm.com>
12165 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12167 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
12168 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
12169 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
12170 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
12171 (vrndxq_f32): Likewise.
12172 (vrndq_f16) Likewise.
12173 (vrndq_f32): Likewise.
12174 (vrndpq_f16): Likewise.
12175 (vrndpq_f32): Likewise.
12176 (vrndnq_f16): Likewise.
12177 (vrndnq_f32): Likewise.
12178 (vrndmq_f16): Likewise.
12179 (vrndmq_f32): Likewise.
12180 (vrndaq_f16): Likewise.
12181 (vrndaq_f32): Likewise.
12182 (vrev64q_f16): Likewise.
12183 (vrev64q_f32): Likewise.
12184 (vnegq_f16): Likewise.
12185 (vnegq_f32): Likewise.
12186 (vdupq_n_f16): Likewise.
12187 (vdupq_n_f32): Likewise.
12188 (vabsq_f16): Likewise.
12189 (vabsq_f32): Likewise.
12190 (vrev32q_f16): Likewise.
12191 (vcvttq_f32_f16): Likewise.
12192 (vcvtbq_f32_f16): Likewise.
12193 (vcvtq_f16_s16): Likewise.
12194 (vcvtq_f32_s32): Likewise.
12195 (vcvtq_f16_u16): Likewise.
12196 (vcvtq_f32_u32): Likewise.
12197 (__arm_vrndxq_f16): Define intrinsic.
12198 (__arm_vrndxq_f32): Likewise.
12199 (__arm_vrndq_f16): Likewise.
12200 (__arm_vrndq_f32): Likewise.
12201 (__arm_vrndpq_f16): Likewise.
12202 (__arm_vrndpq_f32): Likewise.
12203 (__arm_vrndnq_f16): Likewise.
12204 (__arm_vrndnq_f32): Likewise.
12205 (__arm_vrndmq_f16): Likewise.
12206 (__arm_vrndmq_f32): Likewise.
12207 (__arm_vrndaq_f16): Likewise.
12208 (__arm_vrndaq_f32): Likewise.
12209 (__arm_vrev64q_f16): Likewise.
12210 (__arm_vrev64q_f32): Likewise.
12211 (__arm_vnegq_f16): Likewise.
12212 (__arm_vnegq_f32): Likewise.
12213 (__arm_vdupq_n_f16): Likewise.
12214 (__arm_vdupq_n_f32): Likewise.
12215 (__arm_vabsq_f16): Likewise.
12216 (__arm_vabsq_f32): Likewise.
12217 (__arm_vrev32q_f16): Likewise.
12218 (__arm_vcvttq_f32_f16): Likewise.
12219 (__arm_vcvtbq_f32_f16): Likewise.
12220 (__arm_vcvtq_f16_s16): Likewise.
12221 (__arm_vcvtq_f32_s32): Likewise.
12222 (__arm_vcvtq_f16_u16): Likewise.
12223 (__arm_vcvtq_f32_u32): Likewise.
12224 (vrndxq): Define polymorphic variants.
12226 (vrndpq): Likewise.
12227 (vrndnq): Likewise.
12228 (vrndmq): Likewise.
12229 (vrndaq): Likewise.
12230 (vrev64q): Likewise.
12233 (vrev32q): Likewise.
12234 (vcvtbq_f32): Likewise.
12235 (vcvttq_f32): Likewise.
12237 * config/arm/arm_mve_builtins.def (VAR2): Define.
12239 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
12240 (mve_vrndq_f<mode>): Likewise.
12241 (mve_vrndpq_f<mode>): Likewise.
12242 (mve_vrndnq_f<mode>): Likewise.
12243 (mve_vrndmq_f<mode>): Likewise.
12244 (mve_vrndaq_f<mode>): Likewise.
12245 (mve_vrev64q_f<mode>): Likewise.
12246 (mve_vnegq_f<mode>): Likewise.
12247 (mve_vdupq_n_f<mode>): Likewise.
12248 (mve_vabsq_f<mode>): Likewise.
12249 (mve_vrev32q_fv8hf): Likewise.
12250 (mve_vcvttq_f32_f16v4sf): Likewise.
12251 (mve_vcvtbq_f32_f16v4sf): Likewise.
12252 (mve_vcvtq_to_f_<supf><mode>): Likewise.
12254 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12255 Mihail Ionescu <mihail.ionescu@arm.com>
12256 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12258 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
12260 (ARM_BUILTIN_MVE_PATTERN_START): Define.
12261 (arm_init_mve_builtins): Define function.
12262 (arm_init_builtins): Add TARGET_HAVE_MVE check.
12263 (arm_expand_builtin_1): Check the range of fcode.
12264 (arm_expand_mve_builtin): Define function to expand MVE builtins.
12265 (arm_expand_builtin): Check the range of fcode.
12266 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
12268 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
12269 (vst4q_s8): Define macro.
12270 (vst4q_s16): Likewise.
12271 (vst4q_s32): Likewise.
12272 (vst4q_u8): Likewise.
12273 (vst4q_u16): Likewise.
12274 (vst4q_u32): Likewise.
12275 (vst4q_f16): Likewise.
12276 (vst4q_f32): Likewise.
12277 (__arm_vst4q_s8): Define inline builtin.
12278 (__arm_vst4q_s16): Likewise.
12279 (__arm_vst4q_s32): Likewise.
12280 (__arm_vst4q_u8): Likewise.
12281 (__arm_vst4q_u16): Likewise.
12282 (__arm_vst4q_u32): Likewise.
12283 (__arm_vst4q_f16): Likewise.
12284 (__arm_vst4q_f32): Likewise.
12285 (__ARM_mve_typeid): Define macro with MVE types.
12286 (__ARM_mve_coerce): Define macro with _Generic feature.
12287 (vst4q): Define polymorphic variant for different vst4q builtins.
12288 * config/arm/arm_mve_builtins.def: New file.
12289 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
12291 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
12292 (unspec): Define unspec.
12293 (mve_vst4q<mode>): Define RTL pattern.
12294 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
12296 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
12298 (define_split): Allow OI mode split for MVE after reload.
12299 (define_split): Allow XI mode split for MVE after reload.
12300 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
12301 (arm-builtins.o): Likewise.
12303 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
12305 * c-typeck.c (process_init_element): Handle constructor_type with
12306 type size represented by POLY_INT_CST.
12308 2020-03-17 Jakub Jelinek <jakub@redhat.com>
12310 PR tree-optimization/94187
12311 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
12312 nchars - offset < nbytes.
12314 PR middle-end/94189
12315 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
12316 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
12317 for code-generation.
12319 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
12322 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
12323 after changing memory subreg.
12325 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12326 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12328 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
12329 emulator calls for dobule precision arithmetic operations for MVE.
12331 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12332 Mihail Ionescu <mihail.ionescu@arm.com>
12333 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12335 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
12336 feature bit is on and -mfpu=auto is passed as compiler option, do not
12337 generate error on not finding any matching fpu. Because in this case
12338 fpu is not required.
12339 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
12340 enabled for MVE and also for all VFP extensions.
12341 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
12343 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
12344 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
12345 along with feature bits mve_float.
12346 (mve): Modify add options in armv8.1-m.main arch for MVE.
12347 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
12349 * config/arm/arm.c (use_return_insn): Replace the
12350 check with TARGET_VFP_BASE.
12351 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
12353 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12354 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
12356 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
12357 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
12359 (arm_compute_frame_layout): Likewise.
12360 (arm_save_coproc_regs): Likewise.
12361 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
12363 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
12364 with equivalent macro TARGET_VFP_BASE.
12365 (arm_expand_epilogue_apcs_frame): Likewise.
12366 (arm_expand_epilogue): Likewise.
12367 (arm_conditional_register_usage): Likewise.
12368 (arm_declare_function_name): Add check to skip printing .fpu directive
12369 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
12371 * config/arm/arm.h (TARGET_VFP_BASE): Define.
12372 * config/arm/arm.md (arch): Add "mve" to arch.
12373 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
12374 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
12375 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
12376 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
12378 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
12379 to not allow for MVE.
12380 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
12382 (VUNSPEC_GET_FPSCR): Define.
12383 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
12384 instructions which move to general-purpose Register from Floating-point
12385 Special register and vice-versa.
12386 (thumb2_movhi_fp16): Likewise.
12387 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
12388 with MCR and MRC instructions which set and get Floating-point Status
12389 and Control Register (FPSCR).
12390 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
12392 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
12393 float move patterns in MVE.
12394 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
12395 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12396 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
12397 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
12398 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
12399 TARGET_VFP_BASE check.
12400 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
12401 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12403 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
12404 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
12408 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
12409 Mihail Ionescu <mihail.ionescu@arm.com>
12410 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12412 * config.gcc (arm_mve.h): Include mve intrinsics header file.
12413 * config/arm/aout.h (p0): Add new register name for MVE predicated
12415 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
12416 common to Neon and MVE.
12417 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
12418 (arm_init_simd_builtin_types): Disable poly types for MVE.
12419 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
12420 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
12421 ARM_BUILTIN_NEON_LANE_CHECK.
12422 (mve_dereference_pointer): Add function.
12423 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
12425 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
12426 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
12427 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
12428 with floating point enabled.
12429 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
12430 simd_immediate_valid_for_move.
12431 (simd_immediate_valid_for_move): Renamed from
12432 neon_immediate_valid_for_move function.
12433 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
12434 error if vfpv2 feature bit is disabled and mve feature bit is also
12435 disabled for HARD_FLOAT_ABI.
12436 (use_return_insn): Check to not push VFP regs for MVE.
12437 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
12439 (aapcs_vfp_allocate_return_reg): Likewise.
12440 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
12441 address operand for MVE.
12442 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
12443 (neon_valid_immediate): Rename to simd_valid_immediate.
12444 (simd_valid_immediate): Rename from neon_valid_immediate.
12445 (simd_valid_immediate): MVE check on size of vector is 128 bits.
12446 (neon_immediate_valid_for_move): Rename to
12447 simd_immediate_valid_for_move.
12448 (simd_immediate_valid_for_move): Rename from
12449 neon_immediate_valid_for_move.
12450 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
12452 (neon_make_constant): Modify call to neon_valid_immediate function.
12453 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
12455 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
12456 (arm_compute_frame_layout): Calculate space for saved VFP registers for
12458 (arm_save_coproc_regs): Save coproc registers for MVE.
12459 (arm_print_operand): Add case 'E' to print memory operands for MVE.
12460 (arm_print_operand_address): Check to print register number for MVE.
12461 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
12462 (arm_modes_tieable_p): Check to allow structure mode for MVE.
12463 (arm_regno_class): Add VPR_REGNUM check.
12464 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
12466 (arm_expand_epilogue): MVE check for enabling pop instructions in
12468 (arm_print_asm_arch_directives): Modify function to disable print of
12469 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12471 (arm_vector_mode_supported_p): Check for modes available in MVE interger
12472 and MVE floating point.
12473 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
12475 (arm_conditional_register_usage): Enable usage of conditional regsiter
12477 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
12478 (arm_declare_function_name): Modify function to disable print of
12479 .arch_extension "mve" and "fp" for cases where MVE is enabled with
12481 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
12482 when target general registers are required.
12483 (TARGET_HAVE_MVE_FLOAT): Likewise.
12484 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
12486 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
12487 which indicate this is not available for across function calls.
12488 (FIRST_PSEUDO_REGISTER): Modify.
12489 (VALID_MVE_MODE): Define valid MVE mode.
12490 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
12491 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
12492 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
12493 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
12495 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
12496 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
12497 (enum reg_class): Add VPR_REG entry.
12498 (REG_CLASS_NAMES): Add VPR_REG entry.
12499 * config/arm/arm.md (VPR_REGNUM): Define.
12500 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
12501 "unconditional" instructions.
12502 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
12503 (movdf_soft_insn): Modify RTL to not allow for MVE.
12504 (vfp_pop_multiple_with_writeback): Enable for MVE.
12505 (include "mve.md"): Include mve.md file.
12506 * config/arm/arm_mve.h: Add MVE intrinsics head file.
12507 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
12508 for vector predicated operands.
12509 * config/arm/iterators.md (VNIM1): Define.
12510 (VNINOTM1): Define.
12511 (VHFBF_split): Define
12512 * config/arm/mve.md: New file.
12513 (mve_mov<mode>): Define RTL for move, store and load in MVE.
12514 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
12516 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
12517 simd_immediate_valid_for_move.
12518 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
12519 is common to MVE and NEON to vec-common.md file.
12520 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
12521 * config/arm/predicates.md (vpr_register_operand): Define.
12522 * config/arm/t-arm: Add mve.md file.
12523 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
12525 (mve_store): Add MVE instructions mve_store to attribute "type".
12526 (mve_load): Add MVE instructions mve_load to attribute "type".
12527 (is_mve_type): Define attribute.
12528 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
12529 standard move patterns in MVE along with NEON and IWMMXT with mode
12531 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
12532 and IWMMXT with mode iterator V8HF.
12533 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
12535 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
12536 simd_immediate_valid_for_move.
12539 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
12542 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
12543 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12545 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
12547 2020-03-16 Jakub Jelinek <jakub@redhat.com>
12550 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
12553 PR tree-optimization/94166
12554 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
12555 as secondary comparison key.
12557 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
12559 PR tree-optimization/94125
12560 * tree-loop-distribution.c
12561 (loop_distribution::break_alias_scc_partitions): Update post order
12562 number for merged scc.
12564 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
12567 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
12569 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
12570 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
12571 and ext_sse_reg_operand check.
12573 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
12575 * common.opt: Avoid redundancy in the help text.
12576 * config/arc/arc.opt: Likewise.
12577 * config/cr16/cr16.opt: Likewise.
12579 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12581 PR middle-end/93566
12582 * tree-nested.c (convert_nonlocal_omp_clauses,
12583 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
12584 with C/C++ array sections.
12586 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
12589 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
12590 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
12593 2020-03-14 Jakub Jelinek <jakub@redhat.com>
12595 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
12596 "a an" to "an" in a comment.
12597 * hsa-common.h (is_a_helper): Likewise.
12598 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
12599 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
12600 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
12602 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
12605 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
12606 64-bit value by 64 bits (UB).
12608 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
12610 PR rtl-optimization/92303
12611 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
12613 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
12615 PR rtl-optimization/94148
12616 PR rtl-optimization/94042
12617 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
12618 (df_worklist_propagate_forward): New parameter last_change_age, use
12619 that instead of bb->aux.
12620 (df_worklist_propagate_backward): Ditto.
12621 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
12623 2020-03-13 Richard Biener <rguenther@suse.de>
12625 PR tree-optimization/94163
12626 * tree-ssa-pre.c (create_expression_by_pieces): Check
12627 whether alignment would be zero.
12629 2020-03-13 Martin Liska <mliska@suse.cz>
12632 * lto-wrapper.c (run_gcc): Use concat for appending
12633 to collect_gcc_options.
12635 2020-03-13 Jakub Jelinek <jakub@redhat.com>
12638 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
12639 instead of GEN_INT.
12641 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
12644 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
12645 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
12646 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
12647 TARGET_AVX512VL and ext_sse_reg_operand check.
12649 2020-03-13 Bu Le <bule1@huawei.com>
12652 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
12653 (-param=aarch64-double-recp-precision=): New options.
12654 * doc/invoke.texi: Document them.
12655 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
12656 instead of hard-coding the choice of 1 for float and 2 for double.
12658 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12660 PR rtl-optimization/94119
12661 * resource.h (clear_hashed_info_until_next_barrier): Declare.
12662 * resource.c (clear_hashed_info_until_next_barrier): New function.
12663 * reorg.c (add_to_delay_list): Fix formatting.
12664 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
12665 the next instruction after removing a BARRIER.
12667 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
12669 PR middle-end/92071
12670 * expmed.c (store_integral_bit_field): For fields larger than a word,
12671 call extract_bit_field on the value if the mode is BLKmode. Remove
12672 specific path for big-endian targets and tidy things up a little bit.
12674 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
12676 PR rtl-optimization/90275
12677 * cse.c (cse_insn): Delete no-op register moves too.
12679 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
12681 * config/rx/rx.md (CTRLREG_CPEN): Remove.
12682 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
12684 2020-03-12 Richard Biener <rguenther@suse.de>
12686 PR tree-optimization/94103
12687 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
12688 punning when the mode precision is not sufficient.
12690 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
12693 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
12694 MODE_V1DF and MODE_V2SF.
12695 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
12696 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
12699 2020-03-12 Jakub Jelinek <jakub@redhat.com>
12701 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
12702 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
12703 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
12704 * doc/tm.texi: Regenerated.
12706 PR tree-optimization/94130
12707 * tree-ssa-dse.c: Include gimplify.h.
12708 (increment_start_addr): If stmt has lhs, drop the lhs from call and
12709 set it after the call to the original value of the first argument.
12711 (decrement_count): Formatting fix.
12713 2020-03-11 Delia Burduv <delia.burduv@arm.com>
12715 * config/arm/arm-builtins.c
12716 (arm_init_simd_builtin_scalar_types): New.
12717 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
12718 (vld2q_bf16): Used new builtin type.
12719 (vld3_bf16): Used new builtin type.
12720 (vld3q_bf16): Used new builtin type.
12721 (vld4_bf16): Used new builtin type.
12722 (vld4q_bf16): Used new builtin type.
12723 (vld2_dup_bf16): Used new builtin type.
12724 (vld2q_dup_bf16): Used new builtin type.
12725 (vld3_dup_bf16): Used new builtin type.
12726 (vld3q_dup_bf16): Used new builtin type.
12727 (vld4_dup_bf16): Used new builtin type.
12728 (vld4q_dup_bf16): Used new builtin type.
12730 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12733 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
12734 at the start to switch to data section. Don't print extra newline if
12735 .globl directive has not been emitted.
12737 2020-03-11 Richard Biener <rguenther@suse.de>
12739 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
12742 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
12744 PR middle-end/93961
12745 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
12746 whose type is a qualified union.
12748 2020-03-11 Jakub Jelinek <jakub@redhat.com>
12751 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
12752 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
12755 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
12757 (get_nth_most_common_value): Use abs_hwi instead of abs.
12759 PR middle-end/94111
12760 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
12761 is rvc_normal, otherwise use real_to_decimal to print the number to
12764 PR tree-optimization/94114
12765 * tree-loop-distribution.c (generate_memset_builtin): Call
12766 rewrite_to_non_trapping_overflow even on mem.
12767 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
12770 2020-03-10 Jeff Law <law@redhat.com>
12772 * config/bfin/bfin.md (movsi_insv): Add length attribute.
12774 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
12777 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
12778 NAN and SIGNED_ZEROR for smax/smin.
12780 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
12783 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
12784 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
12786 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12788 * loop-iv.c (find_simple_exit): Make it static.
12789 * cfgloop.h: Remove the corresponding prototype.
12791 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
12793 * ddg.c (create_ddg): Fix intendation.
12794 (set_recurrence_length): Likewise.
12795 (create_ddg_all_sccs): Likewise.
12797 2020-03-10 Jakub Jelinek <jakub@redhat.com>
12800 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
12801 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
12804 2020-03-09 Jason Merrill <jason@redhat.com>
12806 * gdbinit.in (pgs): Fix typo in documentation.
12808 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
12812 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
12814 PR rtl-optimization/93564
12815 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
12816 do not honor reg alloc order.
12818 2020-03-09 Andrew Pinski <apinski@marvell.com>
12820 PR inline-asm/94095
12821 * doc/extend.texi (x86 Operand Modifiers): Fix column
12824 2020-03-09 Martin Liska <mliska@suse.cz>
12827 * config/rs6000/rs6000.c (rs6000_option_override_internal):
12828 Remove set of str_align_loops and str_align_jumps as these
12829 should be set in previous 2 conditions in the function.
12831 2020-03-09 Jakub Jelinek <jakub@redhat.com>
12833 PR rtl-optimization/94045
12834 * params.opt (-param=max-find-base-term-values=): New option.
12835 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
12836 in a single toplevel find_base_term call.
12838 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12841 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
12842 * config/aarch64/aarch64-simd.md
12843 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
12844 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
12845 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
12846 * config/aarch64/arm_neon.h:
12847 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
12848 (vmlal_lane_u16): Likewise.
12849 (vmlal_lane_s32): Likewise.
12850 (vmlal_lane_u32): Likewise.
12851 (vmlal_laneq_s16): Likewise.
12852 (vmlal_laneq_u16): Likewise.
12853 (vmlal_laneq_s32): Likewise.
12854 (vmlal_laneq_u32): Likewise.
12855 (vmull_lane_s16): Likewise.
12856 (vmull_lane_u16): Likewise.
12857 (vmull_lane_s32): Likewise.
12858 (vmull_lane_u32): Likewise.
12859 (vmull_laneq_s16): Likewise.
12860 (vmull_laneq_u16): Likewise.
12861 (vmull_laneq_s32): Likewise.
12862 (vmull_laneq_u32): Likewise.
12863 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
12866 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
12868 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
12869 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
12870 (aarch64_mls_elt<mode>): Likewise.
12871 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
12872 (aarch64_fma4_elt<mode>): Likewise.
12873 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
12874 (aarch64_fma4_elt_to_64v2df): Likewise.
12875 (aarch64_fnma4_elt<mode>): Likewise.
12876 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
12877 (aarch64_fnma4_elt_to_64v2df): Likewise.
12879 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
12881 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
12882 Specify movprfx attribute.
12883 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
12885 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
12888 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
12890 (TARGET_NO_FP_IN_TOC): Same.
12891 * config/rs6000/aix71.h: Same.
12892 * config/rs6000/aix72.h: Same.
12894 2020-03-06 Andrew Pinski <apinski@marvell.com>
12895 Jeff Law <law@redhat.com>
12897 PR rtl-optimization/93996
12898 * haifa-sched.c (remove_notes): Be more careful when adding
12901 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12903 * config/arm/arm_neon.h (vld2_bf16): New.
12909 (vld2_dup_bf16): New.
12910 (vld2q_dup_bf16): New.
12911 (vld3_dup_bf16): New.
12912 (vld3q_dup_bf16): New.
12913 (vld4_dup_bf16): New.
12914 (vld4q_dup_bf16): New.
12915 * config/arm/arm_neon_builtins.def
12916 (vld2): Changed to VAR13 and added v4bf, v8bf
12917 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
12918 (vld3): Changed to VAR13 and added v4bf, v8bf
12919 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
12920 (vld4): Changed to VAR13 and added v4bf, v8bf
12921 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
12922 * config/arm/iterators.md (VDXBF2): New iterator.
12923 *config/arm/neon.md (neon_vld2): Use new iterators.
12924 (neon_vld2_dup<mode): Use new iterators.
12925 (neon_vld3<mode>): Likewise.
12926 (neon_vld3qa<mode>): Likewise.
12927 (neon_vld3qb<mode>): Likewise.
12928 (neon_vld3_dup<mode>): Likewise.
12929 (neon_vld4<mode>): Likewise.
12930 (neon_vld4qa<mode>): Likewise.
12931 (neon_vld4qb<mode>): Likewise.
12932 (neon_vld4_dup<mode>): Likewise.
12933 (neon_vld2_dupv8bf): New.
12934 (neon_vld3_dupv8bf): Likewise.
12935 (neon_vld4_dupv8bf): Likewise.
12937 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12939 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
12940 (bfloat16x8x2_t): New typedef.
12941 (bfloat16x4x3_t): New typedef.
12942 (bfloat16x8x3_t): New typedef.
12943 (bfloat16x4x4_t): New typedef.
12944 (bfloat16x8x4_t): New typedef.
12951 * config/arm/arm-builtins.c (v2bf_UP): Define.
12953 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
12954 * config/arm/arm-modes.def (V2BF): New mode.
12955 * config/arm/arm-simd-builtin-types.def
12956 (Bfloat16x2_t): New entry.
12957 * config/arm/arm_neon_builtins.def
12958 (vst2): Changed to VAR13 and added v4bf, v8bf
12959 (vst3): Changed to VAR13 and added v4bf, v8bf
12960 (vst4): Changed to VAR13 and added v4bf, v8bf
12961 * config/arm/iterators.md (VDXBF): New iterator.
12962 (VQ2BF): New iterator.
12963 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
12964 (neon_vst2<mode>): Used new iterators.
12965 (neon_vst3<mode>): Used new iterators.
12966 (neon_vst3<mode>): Used new iterators.
12967 (neon_vst3qa<mode>): Used new iterators.
12968 (neon_vst3qb<mode>): Used new iterators.
12969 (neon_vst4<mode>): Used new iterators.
12970 (neon_vst4<mode>): Used new iterators.
12971 (neon_vst4qa<mode>): Used new iterators.
12972 (neon_vst4qb<mode>): Used new iterators.
12974 2020-03-06 Delia Burduv <delia.burduv@arm.com>
12976 * config/aarch64/aarch64-simd-builtins.def
12977 (bfcvtn): New built-in function.
12978 (bfcvtn_q): New built-in function.
12979 (bfcvtn2): New built-in function.
12980 (bfcvt): New built-in function.
12981 * config/aarch64/aarch64-simd.md
12982 (aarch64_bfcvtn<q><mode>): New pattern.
12983 (aarch64_bfcvtn2v8bf): New pattern.
12984 (aarch64_bfcvtbf): New pattern.
12985 * config/aarch64/arm_bf16.h (float32_t): New typedef.
12986 (vcvth_bf16_f32): New intrinsic.
12987 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
12988 (vcvtq_low_bf16_f32): New intrinsic.
12989 (vcvtq_high_bf16_f32): New intrinsic.
12990 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
12991 (UNSPEC_BFCVTN): New UNSPEC.
12992 (UNSPEC_BFCVTN2): New UNSPEC.
12993 (UNSPEC_BFCVT): New UNSPEC.
12994 * config/arm/types.md (bf_cvt): New type.
12996 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
12998 * config/s390/s390.md ("tabort"): Get rid of two consecutive
12999 blanks in format string.
13001 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
13005 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
13006 * config/i386/i386.c (ix86_get_ssemov): New function.
13007 (ix86_output_ssemov): Likewise.
13008 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
13009 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
13011 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
13012 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
13013 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
13014 (*movti_internal): Likewise.
13015 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
13017 2020-03-05 Jeff Law <law@redhat.com>
13019 PR tree-optimization/91890
13020 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
13021 Use gimple_or_expr_nonartificial_location.
13022 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
13023 Use gimple_or_expr_nonartificial_location.
13024 * gimple.c (gimple_or_expr_nonartificial_location): New function.
13025 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
13026 * tree-ssa-strlen.c (maybe_warn_overflow): Use
13027 gimple_or_expr_nonartificial_location.
13028 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
13029 (maybe_warn_pointless_strcmp): Likewise.
13031 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13034 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
13035 SRC and MASK arguments to __m128 from __m128d.
13036 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
13038 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
13040 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
13041 argument to __m128i from __m128d.
13042 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
13044 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
13045 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
13048 2020-03-05 Delia Burduv <delia.burduv@arm.com>
13050 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
13051 (vbfmlalbq_f32): New.
13052 (vbfmlaltq_f32): New.
13053 (vbfmlalbq_lane_f32): New.
13054 (vbfmlaltq_lane_f32): New.
13055 (vbfmlalbq_laneq_f32): New.
13056 (vbfmlaltq_laneq_f32): New.
13057 * config/arm/arm_neon_builtins.def (vmmla): New.
13062 (vfmab_laneq): New.
13063 (vfmat_laneq): New.
13064 * config/arm/iterators.md (BF_MA): New int iterator.
13065 (bt): New int attribute.
13066 (VQXBF): Copy of VQX with V8BF.
13067 * config/arm/neon.md (neon_vmmlav8bf): New insn.
13068 (neon_vfma<bt>v8bf): New insn.
13069 (neon_vfma<bt>_lanev8bf): New insn.
13070 (neon_vfma<bt>_laneqv8bf): New expand.
13071 (neon_vget_high<mode>): Changed iterator to VQXBF.
13072 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
13073 (UNSPEC_BFMAB): New UNSPEC.
13074 (UNSPEC_BFMAT): New UNSPEC.
13076 2020-03-05 Jakub Jelinek <jakub@redhat.com>
13078 PR middle-end/93399
13079 * tree-pretty-print.h (pretty_print_string): Declare.
13080 * tree-pretty-print.c (pretty_print_string): Remove forward
13081 declaration, no longer static. Change nbytes parameter type
13082 from unsigned to size_t.
13083 * print-rtl.c (print_value) <case CONST_STRING>: Use
13084 pretty_print_string and for shrink way too long strings.
13086 2020-03-05 Richard Biener <rguenther@suse.de>
13087 Jakub Jelinek <jakub@redhat.com>
13089 PR tree-optimization/93582
13090 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
13091 last operand as signed when looking for memset offset. Formatting
13094 2020-03-04 Andrew Pinski <apinski@marvell.com>
13097 * value-prof.c (dump_histogram_value): Use std::abs.
13099 2020-03-04 Martin Sebor <msebor@redhat.com>
13101 PR tree-optimization/93986
13102 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
13103 operands to the same precision widest_int to avoid ICEs.
13105 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
13108 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
13109 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
13110 for OPTION_MASK_ALTIVEC.
13112 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13114 * config.gcc: Include the glibc-stdint.h header for zTPF.
13116 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13118 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
13119 direct FPR-GPR copies.
13120 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
13123 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
13125 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
13126 operands to the prologue_tpf expander.
13127 (s390_emit_epilogue): Likewise.
13128 (s390_option_override_internal): Do error checking and setup for
13130 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
13131 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
13132 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
13133 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
13134 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
13135 operands for the check flag and the branch target.
13136 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
13137 ("mtpf-trace-hook-prologue-target")
13138 ("mtpf-trace-hook-epilogue-check")
13139 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
13141 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
13142 options are for debugging purposes and will not be documented
13145 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13148 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
13150 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
13151 argument. Change pd argument so that it can be modified. Turn
13152 constant non-CONSTRUCTOR store into non-constant if it is too large.
13153 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
13155 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
13158 2020-02-04 Richard Biener <rguenther@suse.de>
13160 PR tree-optimization/93964
13161 * graphite-isl-ast-to-gimple.c
13162 (gcc_expression_from_isl_ast_expr_id): Add intermediate
13163 conversion for pointer to integer converts.
13164 * graphite-scop-detection.c (assign_parameter_index_in_region):
13167 2020-03-04 Martin Liska <mliska@suse.cz>
13171 * doc/invoke.texi: Clarify --help=language and --help=common
13174 2020-03-04 Jakub Jelinek <jakub@redhat.com>
13176 PR tree-optimization/94001
13177 * tree-tailcall.c (process_assignment): Before comparing op1 to
13178 *ass_var, verify *ass_var is non-NULL.
13180 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
13183 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
13186 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
13188 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
13189 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
13190 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
13191 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
13192 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
13193 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
13194 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
13195 (V_bf_low, V_bf_cvt_m): New mode attributes.
13196 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
13197 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
13198 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
13199 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
13200 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
13202 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13204 PR tree-optimization/93582
13205 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
13206 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
13207 members, initialize them in the constructor and if mask is non-NULL,
13208 artificially push_partial_def {} for the portions of the mask that
13210 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
13211 val and return (void *)-1. Formatting fix.
13212 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
13214 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
13215 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
13217 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
13219 (visit_stmt): Formatting fix.
13221 2020-03-03 Richard Biener <rguenther@suse.de>
13223 PR tree-optimization/93946
13224 * alias.h (refs_same_for_tbaa_p): Declare.
13225 * alias.c (refs_same_for_tbaa_p): New function.
13226 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
13228 * tree-ssa-scopedtables.h
13229 (avail_exprs_stack::lookup_avail_expr): Add output argument
13230 giving access to the hashtable entry.
13231 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
13233 * tree-ssa-dom.c: Include alias.h.
13234 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
13235 removing redundant store.
13236 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
13237 (ao_ref_init_from_vn_reference): Adjust prototype.
13238 (vn_reference_lookup_pieces): Likewise.
13239 (vn_reference_insert_pieces): Likewise.
13240 * tree-ssa-sccvn.c: Track base alias set in addition to alias
13242 (eliminate_dom_walker::eliminate_stmt): Also check base alias
13243 set when removing redundant stores.
13244 (visit_reference_op_store): Likewise.
13245 * dse.c (record_store): Adjust valdity check for redundant
13248 2020-03-03 Jakub Jelinek <jakub@redhat.com>
13251 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
13253 PR rtl-optimization/94002
13254 * explow.c (plus_constant): Punt if cst has VOIDmode and
13255 get_pool_mode is different from mode.
13257 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13259 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
13260 address has an offset which fits the scalling constraint for a
13261 load/store operation.
13262 (legitimate_scaled_address_p): Update use
13263 leigitimate_small_data_address_p.
13264 (arc_print_operand): Likewise.
13265 (arc_legitimate_address_p): Likewise.
13266 (legitimate_small_data_address_p): Likewise.
13268 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13270 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
13271 (fnmasf4_fpu): Likewise.
13273 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13275 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
13277 (subdi3): Likewise.
13278 (adddi3_i): Remove pattern.
13279 (subdi3_i): Likewise.
13281 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
13283 * config/arc/arc.md (eh_return): Add length info.
13285 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13287 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
13289 2020-03-02 David Malcolm <dmalcolm@redhat.com>
13291 * doc/invoke.texi (Static Analyzer Options): Add
13292 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
13295 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
13298 * config/i386/i386.md (movstrict<mode>): Allow only
13299 registers with VALID_INT_MODE_P modes.
13301 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
13303 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
13304 (reduc_insn): Use 'U' and 'B' operand codes.
13305 (reduc_<reduc_op>_scal_<mode>): Allow all types.
13306 (reduc_<reduc_op>_scal_v64di): Delete.
13307 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
13308 (*plus_carry_dpp_shr_v64si): Change to ...
13309 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
13310 (mov_from_lane63_v64di): Change to ...
13311 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
13312 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
13313 Support UNSPEC_MOV_DPP_SHR output formats.
13314 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
13315 Add "use_extends" reductions.
13316 (print_operand_address): Add 'I' and 'U' codes.
13317 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
13319 2020-03-02 Martin Liska <mliska@suse.cz>
13321 * lto-wrapper.c: Fix typo in comment about
13322 C++ standard version.
13324 2020-03-01 Martin Sebor <msebor@redhat.com>
13327 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
13329 2020-03-01 Martin Sebor <msebor@redhat.com>
13331 PR middle-end/93829
13332 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
13333 of a pointer in the outermost ADDR_EXPRs.
13335 2020-02-28 Jeff Law <law@redhat.com>
13337 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
13338 * config/v850/v850.c (v850_asm_trampoline_template): Update
13341 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
13344 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
13347 2020-02-28 Martin Liska <mliska@suse.cz>
13350 * configure.ac: Improve detection of ld_date by requiring
13351 either two dashes or none.
13352 * configure: Regenerate.
13354 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
13356 PR rtl-optimization/93564
13357 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
13358 do not honor reg alloc order.
13360 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
13363 * config/aarch64/aarch64.c (aarch64_override_options): Fix
13364 misleading warning string.
13366 2020-02-27 Martin Sebor <msebor@redhat.com>
13368 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
13370 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
13373 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
13374 Split the insn into two parts. This insn only does variable
13375 extract from a register.
13376 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
13377 variable extract from memory.
13378 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
13379 only does variable extract from a register.
13380 (vsx_extract_v4sf_var_load): New insn, do variable extract from
13382 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
13383 into two parts. This insn only does variable extract from a
13385 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
13386 do variable extract from memory.
13388 2020-02-27 Martin Jambor <mjambor@suse.cz>
13389 Feng Xue <fxue@os.amperecomputing.com>
13392 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
13393 new function calls_same_node_or_its_all_contexts_clone_p.
13394 (cgraph_edge_brings_value_p): Use it.
13395 (cgraph_edge_brings_value_p): Likewise.
13396 (self_recursive_pass_through_p): Return false if caller is a clone.
13397 (self_recursive_agg_pass_through_p): Likewise.
13399 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
13401 PR middle-end/92152
13402 * alias.c (ends_tbaa_access_path_p): Break out from ...
13403 (component_uses_parent_alias_set_from): ... here.
13404 * alias.h (ends_tbaa_access_path_p): Declare.
13405 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
13406 handle trailing arrays past end of tbaa access path.
13407 (aliasing_component_refs_p): ... here; likewise.
13408 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
13409 path; disambiguate also past end of it.
13410 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
13413 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
13415 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
13416 beginning of the file.
13417 (vcreate_bf16, vcombine_bf16): New.
13418 (vdup_n_bf16, vdupq_n_bf16): New.
13419 (vdup_lane_bf16, vdup_laneq_bf16): New.
13420 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13421 (vduph_lane_bf16, vduph_laneq_bf16): New.
13422 (vset_lane_bf16, vsetq_lane_bf16): New.
13423 (vget_lane_bf16, vgetq_lane_bf16): New.
13424 (vget_high_bf16, vget_low_bf16): New.
13425 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13426 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13427 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13428 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13429 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13430 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13431 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13432 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13433 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13434 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13435 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
13436 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13437 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13438 (vreinterpretq_bf16_p128): New.
13439 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13440 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13441 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13442 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13443 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13444 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13445 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13446 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13447 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13448 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13449 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13450 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13451 (vreinterpretq_p128_bf16): New.
13452 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
13453 (V_elem): Likewise.
13454 (V_elem_l): Likewise.
13455 (VD_LANE): Likewise.
13457 (V_DOUBLE): Likewise.
13458 (VDQX): Add V4BF and V8BF.
13459 (V_two_elem, V_three_elem, V_four_elem): Likewise.
13461 (V_HALF): Likewise.
13462 (V_double_vector_mode): Likewise.
13463 (V_cmp_result): Likewise.
13464 (V_uf_sclr): Likewise.
13465 (V_sz_elem): Likewise.
13466 (Is_d_reg): Likewise.
13467 (V_mode_nunits): Likewise.
13468 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
13470 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13472 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
13473 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
13474 (<expander><mode>3<exec>): Likewise.
13475 (<expander><mode>3): New.
13476 (v<expander><mode>3): New.
13477 (<expander><mode>3): New.
13478 (<expander><mode>3<exec>): Rename to ...
13479 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
13480 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
13482 2020-02-27 Alexandre Oliva <oliva@adacore.com>
13484 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
13487 2020-02-27 Richard Biener <rguenther@suse.de>
13489 PR tree-optimization/93508
13490 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
13491 non-_CHK variants. Valueize their length arguments.
13493 2020-02-27 Richard Biener <rguenther@suse.de>
13495 PR tree-optimization/93953
13496 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
13497 to the hash-map entry.
13499 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
13501 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
13503 2020-02-27 Mark Williams <mwilliams@fb.com>
13505 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
13506 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
13507 -ffile-prefix-map and -fmacro-prefix-map.
13508 * lto-streamer-out.c: Include file-prefix-map.h.
13509 (lto_output_location): Remap the file part of locations.
13511 2020-02-27 Jakub Jelinek <jakub@redhat.com>
13514 * gimplify.c (gimplify_init_constructor): Don't promote readonly
13515 DECL_REGISTER variables to TREE_STATIC.
13517 PR tree-optimization/93582
13518 PR tree-optimization/93945
13519 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
13520 non-zero INTEGER_CST second argument and ref->offset or ref->size
13521 not a multiple of BITS_PER_UNIT.
13523 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
13525 * doc/install.texi (Binaries): Update description of BullFreeware.
13527 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
13531 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
13532 C++ Language Options, Warning Options, and Static Analyzer
13533 Options lists. Document negative form of options enabled by
13534 default. Move some things around to more accurately sort
13535 warnings by category.
13536 (C++ Dialect Options, Warning Options, Static Analyzer
13537 Options): Document negative form of options when enabled by
13538 default. Move some things around to more accurately sort
13539 warnings by category. Add some missing index entries.
13540 Light copy-editing.
13542 2020-02-26 Carl Love <cel@us.ibm.com>
13545 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
13546 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
13547 for the vector unsigned short arguments. It is also listed as the
13548 name of the built-in for arguments vector unsigned short,
13549 vector unsigned int and vector unsigned long long built-ins. The
13550 name of the builtins for these arguments should be:
13551 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
13552 __builtin_crypto_vpmsumd respectively.
13554 2020-02-26 Richard Biener <rguenther@suse.de>
13556 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
13557 and load permutation.
13559 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
13561 PR middle-end/93843
13562 * optabs-tree.c (supportable_convert_operation): Reject types with
13565 2020-02-26 David Malcolm <dmalcolm@redhat.com>
13567 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
13569 2020-02-26 Jakub Jelinek <jakub@redhat.com>
13571 PR tree-optimization/93820
13572 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
13573 argument to ALL_INTEGER_CST_P boolean.
13574 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
13575 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
13576 adjacent INTEGER_CST store into merged_store->only_constants like
13579 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13582 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
13584 * cfghooks.c (verify_flow_info): Likewise.
13585 * predict.c (combine_predictions_for_bb): Likewise.
13586 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
13587 sucessor -> successor.
13588 (find_traces_1_round): Fix comment typo, destinarion -> destination.
13589 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
13591 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
13592 message typo, sucessors -> successors.
13594 2020-02-25 Martin Sebor <msebor@redhat.com>
13596 * doc/extend.texi (attribute access): Correct an example.
13598 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13600 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
13602 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
13603 (VAR15, VAR16): New.
13604 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
13605 (VD): Enable for V4BF.
13607 (VQ): Enable for V8BF.
13609 (VQ_NO2E): Likewise.
13610 (VDBL, Vdbl): Add V4BF.
13611 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
13612 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
13613 (bfloat16x8x2_t): Likewise.
13614 (bfloat16x4x3_t): Likewise.
13615 (bfloat16x8x3_t): Likewise.
13616 (bfloat16x4x4_t): Likewise.
13617 (bfloat16x8x4_t): Likewise.
13618 (vcombine_bf16): New.
13619 (vld1_bf16, vld1_bf16_x2): New.
13620 (vld1_bf16_x3, vld1_bf16_x4): New.
13621 (vld1q_bf16, vld1q_bf16_x2): New.
13622 (vld1q_bf16_x3, vld1q_bf16_x4): New.
13623 (vld1_lane_bf16): New.
13624 (vld1q_lane_bf16): New.
13625 (vld1_dup_bf16): New.
13626 (vld1q_dup_bf16): New.
13629 (vld2_dup_bf16): New.
13630 (vld2q_dup_bf16): New.
13633 (vld3_dup_bf16): New.
13634 (vld3q_dup_bf16): New.
13637 (vld4_dup_bf16): New.
13638 (vld4q_dup_bf16): New.
13639 (vst1_bf16, vst1_bf16_x2): New.
13640 (vst1_bf16_x3, vst1_bf16_x4): New.
13641 (vst1q_bf16, vst1q_bf16_x2): New.
13642 (vst1q_bf16_x3, vst1q_bf16_x4): New.
13643 (vst1_lane_bf16): New.
13644 (vst1q_lane_bf16): New.
13652 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
13654 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
13655 (VALL_F16): Likewise.
13656 (VALLDI_F16): Likewise.
13658 (Vetype): Likewise.
13659 (vswap_width_name): Likewise.
13660 (VSWAP_WIDTH): Likewise.
13664 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
13665 (vget_lane_bf16, vgetq_lane_bf16): New.
13666 (vcreate_bf16): New.
13667 (vdup_n_bf16, vdupq_n_bf16): New.
13668 (vdup_lane_bf16, vdup_laneq_bf16): New.
13669 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
13670 (vduph_lane_bf16, vduph_laneq_bf16): New.
13671 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
13672 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
13673 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
13674 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
13675 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
13676 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
13677 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
13678 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
13679 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
13680 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
13681 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
13682 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
13683 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
13684 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
13685 (vreinterpretq_bf16_p128): New.
13686 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
13687 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
13688 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
13689 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
13690 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
13691 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
13692 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
13693 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
13694 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
13695 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
13696 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
13697 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
13698 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
13699 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
13700 (vreinterpretq_p128_bf16): New.
13702 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
13704 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
13705 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
13706 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
13707 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
13708 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
13709 * config/arm/iterators.md (VSF2BF): New attribute.
13710 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
13711 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
13712 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
13714 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
13716 * config/arm/arm.md (required_for_purecode): New attribute.
13717 (enabled): Handle required_for_purecode.
13718 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
13719 work with -mpure-code.
13721 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13723 PR rtl-optimization/93908
13724 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
13727 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
13729 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
13731 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
13733 * doc/install.texi (--enable-checking): Adjust wording.
13735 2020-02-25 Richard Biener <rguenther@suse.de>
13737 PR tree-optimization/93868
13738 * tree-vect-slp.c (slp_copy_subtree): New function.
13739 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
13740 re-arranging stmts in it.
13742 2020-02-25 Jakub Jelinek <jakub@redhat.com>
13744 PR middle-end/93874
13745 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
13746 dummy function and remove it at the end.
13748 PR translation/93864
13749 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
13750 paramter -> parameter.
13751 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
13752 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
13754 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
13756 * doc/install.texi (--enable-checking): Properly document current
13758 (--enable-stage1-checking): Minor clarification about bootstrap.
13760 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13763 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
13764 -fanalyzer-checker=taint is also required.
13765 (-fanalyzer-checker=): Note that providing this option enables the
13766 given checker, and doing so may be required for checkers that are
13767 disabled by default.
13769 2020-02-24 David Malcolm <dmalcolm@redhat.com>
13771 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
13772 significant control flow events; add a "3" which shows all
13773 control flow events; the old "3" becomes "4".
13775 2020-02-24 Jakub Jelinek <jakub@redhat.com>
13777 PR tree-optimization/93582
13778 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
13779 pd.offset and pd.size to be counted in bits rather than bytes, add
13780 support for maxsizei that is not a multiple of BITS_PER_UNIT and
13781 handle bitfield stores and loads.
13782 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
13783 uncomparable quantities - bytes vs. bits. Allow push_partial_def
13784 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
13785 pd.offset/pd.size to be counted in bits rather than bytes.
13786 Formatting fix. Rename shadowed len variable to buflen.
13788 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
13789 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
13792 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
13793 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
13794 * opts-common.c (parse_options_from_collect_gcc_options): New function.
13795 (prepend_xassembler_to_collect_as_options): Likewise.
13796 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
13797 (prepend_xassembler_to_collect_as_options): Likewise.
13798 * lto-opts.c (lto_write_options): Stream assembler options
13799 in COLLECT_AS_OPTIONS.
13800 * lto-wrapper.c (xassembler_options_error): New static variable.
13801 (get_options_from_collect_gcc_options): Move parsing options code to
13802 parse_options_from_collect_gcc_options and call it.
13803 (merge_and_complain): Validate -Xassembler options.
13804 (append_compiler_options): Handle OPT_Xassembler.
13805 (run_gcc): Append command line -Xassembler options to
13806 collect_gcc_options.
13807 * doc/invoke.texi: Add documentation about using Xassembler
13810 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
13812 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
13814 (riscv_rtx_costs): Update cost model for LTGT.
13816 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
13818 PR rtl-optimization/93564
13819 * ira-color.c (struct update_cost_queue_elem): New member start.
13820 (queue_update_cost, get_next_update_cost): Add new arg start.
13821 (allocnos_conflict_p): New function.
13822 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
13823 Add checking conflicts with allocnos_conflict_p.
13824 (update_costs_from_prefs, restore_costs_from_copies): Adjust
13825 update_costs_from_allocno calls.
13826 (update_conflict_hard_regno_costs): Add checking conflicts with
13827 allocnos_conflict_p. Adjust calls of queue_update_cost and
13828 get_next_update_cost.
13829 (assign_hard_reg): Adjust calls of queue_update_cost. Add
13831 (bucket_allocno_compare_func): Restore previous version.
13833 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
13835 * config/pa/pa.c (pa_function_value): Fix check for word and
13836 double-word size when handling aggregate return values.
13837 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
13838 that homogeneous SFmode and DFmode aggregates are passed and returned
13839 in general registers.
13841 2020-02-21 Jakub Jelinek <jakub@redhat.com>
13843 PR translation/93759
13844 * opts.c (print_filtered_help): Translate help before appending
13845 messages to it rather than after that.
13847 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
13849 PR rtl-optimization/PR92989
13850 * lra-lives.c (process_bb_lives): Restore the original order
13851 of the bb liveness update. Call make_hard_regno_dead for each
13852 register clobbered at the start of an EH receiver.
13854 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
13857 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
13858 self-recursively generated.
13860 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
13863 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
13866 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
13868 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
13869 Document new target supports option.
13871 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
13873 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
13874 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
13875 * config/arm/iterators.md (MATMUL): New iterator.
13876 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
13877 (mmla_sfx): New attribute.
13878 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
13879 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
13880 (UNSPEC_MATMUL_US): New.
13882 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
13884 * config/arm/arm.md: Prevent scalar shifts from being used when big
13887 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
13888 Richard Biener <rguenther@suse.de>
13890 PR tree-optimization/93586
13891 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
13892 after mismatched array refs; do not sure type size information to
13893 recover from unmatched referneces with !flag_strict_aliasing_p.
13895 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13897 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
13898 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
13899 (scatter_store<mode>): Rename to ...
13900 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
13901 (scatter<mode>_exec): Delete. Move contents ...
13902 (mask_scatter_store<mode>): ... here, and rename that to ...
13903 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
13904 Remove mode conversion.
13905 (mask_gather_load<mode>): Rename to ...
13906 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
13907 Remove mode conversion.
13908 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
13910 2020-02-21 Martin Jambor <mjambor@suse.cz>
13912 PR tree-optimization/93845
13913 * tree-sra.c (verify_sra_access_forest): Only test access size of
13916 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13918 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
13919 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
13920 (addv64di3_exec): Likewise.
13921 (subv64di3): Likewise.
13922 (subv64di3_exec): Likewise.
13923 (addv64di3_zext): Likewise.
13924 (addv64di3_zext_exec): Likewise.
13925 (addv64di3_zext_dup): Likewise.
13926 (addv64di3_zext_dup_exec): Likewise.
13927 (addv64di3_zext_dup2): Likewise.
13928 (addv64di3_zext_dup2_exec): Likewise.
13929 (addv64di3_sext_dup2): Likewise.
13930 (addv64di3_sext_dup2_exec): Likewise.
13931 (<expander>v64di3): Likewise.
13932 (<expander>v64di3_exec): Likewise.
13933 (*<reduc_op>_dpp_shr_v64di): Likewise.
13934 (*plus_carry_dpp_shr_v64di): Likewise.
13935 * config/gcn/gcn.md (adddi3): Likewise.
13936 (addptrdi3): Likewise.
13937 (<expander>di3): Likewise.
13939 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
13941 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
13943 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13945 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
13946 support. Use aarch64_emit_mult instead of emitting multiplication
13947 instructions directly.
13948 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
13949 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
13951 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13953 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
13954 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
13955 instead of emitting multiplication instructions directly.
13956 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
13957 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
13958 (@aarch64_frecps<mode>): New expanders.
13960 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13962 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
13963 on and produce uint64_ts rather than ints.
13964 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
13965 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
13967 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13969 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
13970 an unused xmsk register when handling approximate rsqrt.
13972 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
13974 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
13975 flag_finite_math_only condition.
13977 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
13980 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
13981 to destination operand for shufps alternative.
13982 (*vec_extractv2si_1): Ditto.
13984 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
13987 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
13990 2020-02-20 Martin Liska <mliska@suse.cz>
13992 PR translation/93831
13993 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
13995 2020-02-20 Martin Liska <mliska@suse.cz>
13997 PR translation/93830
13998 * common/config/avr/avr-common.c: Remote trailing "|".
14000 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14002 * collect2.c (maybe_run_lto_and_relink): Fix typo in
14005 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
14007 PR tree-optimization/93767
14008 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
14009 access-size bias from the offset calculations for negative strides.
14011 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
14013 * collect2.c (c_file, o_file): Make const again.
14014 (ldout,lderrout, dump_ld_file): Remove.
14015 (tool_cleanup): Avoid calling not signal-safe functions.
14016 (maybe_run_lto_and_relink): Avoid possible signal handler
14017 access to unintialzed memory (lto_o_files).
14018 (main): Avoid leaking temp files in $TMPDIR.
14019 Initialize c_file/o_file with concat, which avoids exposing
14020 uninitialized memory to signal handler, which calls unlink(!).
14021 Avoid calling maybe_unlink when the main function returns,
14022 since the atexit handler is already doing this.
14023 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
14025 2020-02-19 Martin Jambor <mjambor@suse.cz>
14027 PR tree-optimization/93776
14028 * tree-sra.c (create_access): Do not create zero size accesses.
14029 (get_access_for_expr): Do not search for zero sized accesses.
14031 2020-02-19 Martin Jambor <mjambor@suse.cz>
14033 PR tree-optimization/93667
14034 * tree-sra.c (scalarizable_type_p): Return false if record fields
14035 do not follow wach other.
14037 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
14039 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
14040 rather than fmv.x.s/fmv.s.x.
14042 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
14044 * config/aarch64/aarch64-simd-builtins.def
14045 (intrinsic_vec_smult_lo_): New.
14046 (intrinsic_vec_umult_lo_): Likewise.
14047 (vec_widen_smult_hi_): Likewise.
14048 (vec_widen_umult_hi_): Likewise.
14049 * config/aarch64/aarch64-simd.md
14050 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
14051 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
14052 (vmull_high_s16): Likewise.
14053 (vmull_high_s32): Likewise.
14054 (vmull_high_u8): Likewise.
14055 (vmull_high_u16): Likewise.
14056 (vmull_high_u32): Likewise.
14057 (vmull_s8): Likewise.
14058 (vmull_s16): Likewise.
14059 (vmull_s32): Likewise.
14060 (vmull_u8): Likewise.
14061 (vmull_u16): Likewise.
14062 (vmull_u32): Likewise.
14064 2020-02-18 Martin Liska <mliska@suse.cz>
14066 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
14067 bootstrap by missing removal of invalid sanity check.
14069 2020-02-18 Martin Liska <mliska@suse.cz>
14072 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
14073 Always compare LHS of gimple_assign.
14075 2020-02-18 Martin Liska <mliska@suse.cz>
14078 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
14079 and return type of functions.
14080 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
14081 Drop MALLOC attribute for void functions.
14082 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
14083 malloc_state for a new VOID clone.
14085 2020-02-18 Martin Liska <mliska@suse.cz>
14088 * common.opt: Add -fprofile-reproducibility.
14089 * doc/invoke.texi: Document it.
14090 * value-prof.c (dump_histogram_value):
14091 Document and support behavior for counters[0]
14092 being a negative value.
14093 (get_nth_most_common_value): Handle negative
14094 counters[0] in respect to flag_profile_reproducible.
14096 2020-02-18 Jakub Jelinek <jakub@redhat.com>
14099 * cgraph.c (verify_speculative_call): Use speculative_id instead of
14100 speculative_uid in messages. Remove trailing whitespace from error
14101 message. Use num_speculative_call_targets instead of
14102 num_speculative_targets in a message.
14103 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
14104 edge messages and stmt instead of cal_stmt in reference message.
14106 PR tree-optimization/93780
14107 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
14108 before calling build_vector_type.
14109 (execute_update_addresses_taken): Likewise.
14112 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
14113 typo, functoin -> function.
14114 * tree.c (free_lang_data_in_decl): Fix comment typo,
14115 functoin -> function.
14116 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
14118 2020-02-17 David Malcolm <dmalcolm@redhat.com>
14120 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
14122 (print_option_information): Don't call get_option_url if URLs
14125 2020-02-17 Alexandre Oliva <oliva@adacore.com>
14127 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
14128 handling of register_common-less targets.
14130 2020-02-17 Martin Liska <mliska@suse.cz>
14133 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
14135 2020-02-17 Martin Liska <mliska@suse.cz>
14137 PR translation/93755
14138 * config/rs6000/rs6000.c (rs6000_option_override_internal):
14141 2020-02-17 Martin Liska <mliska@suse.cz>
14144 * config/rx/elf.opt: Fix typo.
14146 2020-02-17 Richard Biener <rguenther@suse.de>
14149 * opts-global.c (print_ignored_options): Use inform and
14152 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
14155 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
14157 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
14160 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
14161 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
14163 2020-02-15 Jason Merrill <jason@redhat.com>
14165 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
14167 2020-02-15 Jakub Jelinek <jakub@redhat.com>
14169 PR tree-optimization/93744
14170 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
14171 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
14172 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
14173 sure @2 in the first and @1 in the other patterns has no side-effects.
14175 2020-02-15 David Malcolm <dmalcolm@redhat.com>
14176 Bernd Edlinger <bernd.edlinger@hotmail.de>
14180 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
14181 * configure.ac (--with-diagnostics-urls): New configuration
14182 option, based on --with-diagnostics-color.
14183 (DIAGNOSTICS_URLS_DEFAULT): New define.
14184 * config.h: Regenerate.
14185 * configure: Regenerate.
14186 * diagnostic.c (diagnostic_urls_init): Handle -1 for
14187 DIAGNOSTICS_URLS_DEFAULT from configure-time
14188 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
14189 and TERM_URLS environment variable.
14190 * diagnostic-url.h (diagnostic_url_format): New enum type.
14191 (diagnostic_urls_enabled_p): rename to...
14192 (determine_url_format): ... this, and change return type.
14193 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
14194 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
14195 the linux console, and mingw.
14196 (diagnostic_urls_enabled_p): rename to...
14197 (determine_url_format): ... this, and adjust.
14198 * pretty-print.h (pretty_printer::show_urls): rename to...
14199 (pretty_printer::url_format): ... this, and change to enum.
14200 * pretty-print.c (pretty_printer::pretty_printer,
14201 pp_begin_url, pp_end_url, test_urls): Adjust.
14202 * doc/install.texi (--with-diagnostics-urls): Document the new
14203 configuration option.
14204 (--with-diagnostics-color): Document the existing interaction
14205 with GCC_COLORS better.
14206 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
14207 vindex reference. Update description of defaults based on the above.
14208 (-fdiagnostics-color): Update description of how -fdiagnostics-color
14209 interacts with GCC_COLORS.
14211 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
14214 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
14215 conjunction with TARGET_GNU_TLS in early return.
14217 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
14219 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
14220 the mode is not wider than UNITS_PER_WORD.
14222 2020-02-14 Martin Jambor <mjambor@suse.cz>
14224 PR tree-optimization/93516
14225 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
14226 access of the same type as the parent.
14227 (propagate_subaccesses_from_lhs): Likewise.
14229 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
14232 * config/i386/avx512vbmi2intrin.h
14233 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
14234 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
14235 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
14236 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
14237 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
14238 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
14239 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
14240 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
14241 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
14242 of lacking a closing parenthesis.
14243 * config/i386/avx512vbmi2vlintrin.h
14244 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
14245 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
14246 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
14247 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
14248 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
14249 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
14250 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
14251 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
14252 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
14253 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
14254 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
14255 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
14256 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
14257 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
14258 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
14259 _mm_shldi_epi32, _mm_mask_shldi_epi32,
14260 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
14261 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
14263 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
14266 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
14267 the target function entry.
14269 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14271 * common/config/arc/arc-common.c (arc_option_optimization_table):
14272 Disable if-conversion step when optimized for size.
14274 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14276 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
14277 R12-R15 are always in ARCOMPACT16_REGS register class.
14278 * config/arc/arc.opt (mq-class): Deprecate.
14279 * config/arc/constraint.md ("q"): Remove dependency on mq-class
14281 * doc/invoke.texi (mq-class): Update text.
14282 * common/config/arc/arc-common.c (arc_option_optimization_table):
14285 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14287 * config/arc/arc.c (arc_insn_cost): New function.
14288 (TARGET_INSN_COST): Define.
14289 * config/arc/arc.md (cost): New attribute.
14290 (add_n): Use arc_nonmemory_operand.
14291 (ashlsi3_insn): Likewise, also update constraints.
14292 (ashrsi3_insn): Likewise.
14293 (rotrsi3): Likewise.
14294 (add_shift): Likewise.
14295 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
14297 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
14299 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
14301 (umulsidi_600): Likewise.
14303 2020-02-13 Jakub Jelinek <jakub@redhat.com>
14306 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
14307 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
14308 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
14309 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
14310 pass __A to the builtin followed by __W instead of __A followed by
14312 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
14313 _mm512_mask_popcnt_epi64): Likewise.
14314 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
14315 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
14316 _mm256_mask_popcnt_epi64): Likewise.
14318 PR tree-optimization/93582
14319 * fold-const.h (shift_bytes_in_array_left,
14320 shift_bytes_in_array_right): Declare.
14321 * fold-const.c (shift_bytes_in_array_left,
14322 shift_bytes_in_array_right): New function, moved from
14323 gimple-ssa-store-merging.c, no longer static.
14324 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
14325 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
14326 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
14327 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
14328 shift_bytes_in_array.
14329 (verify_shift_bytes_in_array): Rename to ...
14330 (verify_shift_bytes_in_array_left): ... this. Use
14331 shift_bytes_in_array_left instead of shift_bytes_in_array.
14332 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
14333 instead of verify_shift_bytes_in_array.
14334 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
14335 / native_interpret_expr where the store covers all needed bits,
14336 punt on PDP-endian, otherwise allow all involved offsets and sizes
14337 not to be byte-aligned.
14340 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
14341 use const_0_to_255_operand predicate instead of immediate_operand.
14342 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
14343 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
14344 vgf2p8affineinvqb_<mode><mask_name>,
14345 vgf2p8affineqb_<mode><mask_name>): Drop mode from
14346 const_0_to_255_operand predicated operands.
14348 2020-02-12 Jeff Law <law@redhat.com>
14350 * config/h8300/h8300.md (comparison shortening peepholes): Use
14351 a mode iterator to merge the HImode and SImode peepholes.
14353 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14355 PR middle-end/93663
14356 * real.c (is_even): Make static. Function comment fix.
14357 (is_halfway_below): Make static, don't assert R is not inf/nan,
14358 instead return false for those. Small formatting fixes.
14360 2020-02-12 Martin Sebor <msebor@redhat.com>
14362 PR middle-end/93646
14363 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
14364 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
14365 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
14366 (strlen_check_and_optimize_call): Adjust callee name.
14368 2020-02-12 Jeff Law <law@redhat.com>
14370 * config/h8300/h8300.md (comparison shortening peepholes): Drop
14371 (and (xor)) variant. Combine other two into single peephole.
14373 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14375 PR rtl-optimization/93565
14376 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
14378 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
14380 * config/aarch64/aarch64-simd.md
14381 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
14382 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
14383 generating separate ADDV and zero_extend patterns.
14384 * config/aarch64/iterators.md (VDQV_E): New iterator.
14386 2020-02-12 Jeff Law <law@redhat.com>
14388 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
14389 expanders, splits, etc.
14390 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
14391 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
14392 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
14393 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
14394 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
14395 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
14396 function prototype.
14397 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
14399 2020-02-12 Jakub Jelinek <jakub@redhat.com>
14402 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
14403 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
14404 TARGET_AVX512DQ from condition.
14405 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
14406 instead of <mask_mode512bit_condition> in condition. If
14407 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
14409 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
14412 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
14415 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
14417 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
14419 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
14420 where strlen is more legible.
14421 (rs6000_builtin_vectorized_libmass): Ditto.
14422 (rs6000_print_options_internal): Ditto.
14424 2020-02-11 Martin Sebor <msebor@redhat.com>
14426 PR tree-optimization/93683
14427 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
14429 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
14431 * config/rs6000/predicates.md (cint34_operand): Rename the
14432 -mprefixed-addr option to be -mprefixed.
14433 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
14434 the -mprefixed-addr option to be -mprefixed.
14435 (OTHER_FUTURE_MASKS): Likewise.
14436 (POWERPC_MASKS): Likewise.
14437 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
14438 the -mprefixed-addr option to be -mprefixed. Change error
14439 messages to refer to -mprefixed.
14440 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
14442 (rs6000_legitimate_offset_address_p): Likewise.
14443 (rs6000_mode_dependent_address): Likewise.
14444 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
14445 "-mprefixed" for target attributes and pragmas.
14446 (address_to_insn_form): Rename the -mprefixed-addr option to be
14448 (rs6000_adjust_insn_length): Likewise.
14449 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
14450 -mprefixed-addr option to be -mprefixed.
14451 (ASM_OUTPUT_OPCODE): Likewise.
14452 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
14453 -mprefixed-addr option to be -mprefixed.
14454 * config/rs6000/rs6000.opt (-mprefixed): Rename the
14455 -mprefixed-addr option to be prefixed. Change the option from
14456 being undocumented to being documented.
14457 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
14458 -mprefixed option. Update the -mpcrel documentation to mention
14461 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
14463 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
14464 including FIRST_PSEUDO_REGISTER - 1.
14465 * ira-color.c (print_hard_reg_set): Ditto.
14467 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14469 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
14470 (USTERNOP_QUALIFIERS): New define.
14471 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
14472 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
14473 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
14474 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
14475 * config/arm/arm_neon.h (vusdot_s32): New.
14476 (vusdot_lane_s32): New.
14477 (vusdotq_lane_s32): New.
14478 (vsudot_lane_s32): New.
14479 (vsudotq_lane_s32): New.
14480 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
14481 * config/arm/iterators.md (DOTPROD_I8MM): New.
14482 (sup, opsuffix): Add <us/su>.
14483 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
14484 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
14486 2020-02-11 Richard Biener <rguenther@suse.de>
14488 PR tree-optimization/93661
14489 PR tree-optimization/93662
14490 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
14491 tree_to_poly_int64.
14492 * tree-sra.c (get_access_for_expr): Likewise.
14494 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14497 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
14498 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
14499 Change condition from TARGET_AVX2 to TARGET_AVX.
14501 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
14504 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
14505 argument of strncmp.
14507 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14509 Try to generate zero-based comparisons.
14510 * config/cris/cris.c (cris_reduce_compare): New function.
14511 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
14512 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
14513 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
14515 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
14518 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
14519 in Thumb state and also as a destination in Arm state. Add T16
14522 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
14524 * md.texi (Define Subst): Match closing paren in example.
14526 2020-02-10 Jakub Jelinek <jakub@redhat.com>
14530 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
14531 arguments of strncmp.
14533 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
14536 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
14537 but different source value.
14538 (adjust_callers_for_value_intersection): New function.
14539 (gather_edges_for_value): Adjust order of callers to let a
14540 non-self-recursive caller be the first element.
14541 (self_recursive_pass_through_p): Add a new parameter "simple", and
14542 check generalized self-recursive pass-through jump function.
14543 (self_recursive_agg_pass_through_p): Likewise.
14544 (find_more_scalar_values_for_callers_subset): Compute value from
14545 pass-through jump function for self-recursive.
14546 (intersect_with_plats): Cleanup previous implementation code for value
14547 itersection with self-recursive call edge.
14548 (intersect_with_agg_replacements): Likewise.
14549 (intersect_aggregates_with_edge): Deduce value from pass-through jump
14550 function for self-recursive call edge. Cleanup previous implementation
14551 code for value intersection with self-recursive call edge.
14552 (decide_whether_version_node): Remove dead callers and adjust order
14553 to let a non-self-recursive caller be the first element.
14555 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
14557 * recog.c: Move pass_split_before_sched2 code in front of
14558 pass_split_before_regstack.
14559 (pass_data_split_before_sched2): Rename pass to split3 from split4.
14560 (pass_data_split_before_regstack): Rename pass to split4 from split3.
14561 (rest_of_handle_split_before_sched2): Remove.
14562 (pass_split_before_sched2::execute): Unconditionally call
14564 (enable_split_before_sched2): New function.
14565 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
14566 (pass_split_before_regstack::gate): Ditto.
14567 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
14568 Update name check for renamed split4 pass.
14569 * config/sh/sh.c (register_sh_passes): Update pass insertion
14570 point for renamed split4 pass.
14572 2020-02-09 Jakub Jelinek <jakub@redhat.com>
14574 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
14575 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
14576 copying them around between host and target.
14578 2020-02-08 Andrew Pinski <apinski@marvell.com>
14581 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
14582 STRICT_ALIGNMENT also.
14584 2020-02-08 Jim Wilson <jimw@sifive.com>
14587 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
14589 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
14590 Jakub Jelinek <jakub@redhat.com>
14593 * config/i386/i386.h (CALL_USED_REGISTERS): Make
14594 xmm16-xmm31 call-used even in 64-bit ms-abi.
14596 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
14598 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
14599 (simd_ummla, simd_usmmla): Likewise.
14600 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
14601 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
14602 (vusmmlaq_s32): New.
14604 2020-02-07 Richard Biener <rguenther@suse.de>
14606 PR middle-end/93519
14607 * tree-inline.c (fold_marked_statements): Do a PRE walk,
14608 skipping unreachable regions.
14609 (optimize_inline_calls): Skip folding stmts when we didn't
14612 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
14615 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
14616 Don't return aggregates with only SFmode and DFmode in SSE
14618 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
14620 2020-02-07 Jakub Jelinek <jakub@redhat.com>
14623 * config/rs6000/rs6000-logue.c
14624 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
14625 if it fails, move rs into end_addr and retry. Add
14626 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
14627 the insn pattern doesn't describe well what exactly happens to
14631 * config/i386/predicates.md (avx_identity_operand): Remove.
14632 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
14633 (avx_<castmode><avxsizesuffix>_<castmode>,
14634 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
14635 a VEC_CONCAT of the operand and UNSPEC_CAST.
14636 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
14637 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
14641 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
14642 recog_data.insn if distance_non_agu_define changed it.
14644 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
14647 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
14648 we only had X-FORM (reg+reg) addressing for vectors. Also before
14649 ISA 3.0, we only had X-FORM addressing for scalars in the
14650 traditional Altivec registers.
14652 2020-02-06 <zhongyunde@huawei.com>
14653 Vladimir Makarov <vmakarov@redhat.com>
14655 PR rtl-optimization/93561
14656 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
14657 hard register range.
14659 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14661 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
14664 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
14666 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
14667 where the low and the high 32 bits are equal to each other specially,
14668 with an rldimi instruction.
14670 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14672 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
14674 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
14676 * config/arm/arm-tables.opt: Regenerate.
14678 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14681 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
14682 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
14683 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
14685 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
14687 PR rtl-optimization/87763
14688 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
14690 2020-02-06 Delia Burduv <delia.burduv@arm.com>
14692 * config/aarch64/aarch64-simd-builtins.def
14693 (bfmlaq): New built-in function.
14694 (bfmlalb): New built-in function.
14695 (bfmlalt): New built-in function.
14696 (bfmlalb_lane): New built-in function.
14697 (bfmlalt_lane): New built-in function.
14698 * config/aarch64/aarch64-simd.md
14699 (aarch64_bfmmlaqv4sf): New pattern.
14700 (aarch64_bfmlal<bt>v4sf): New pattern.
14701 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
14702 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
14703 (vbfmlalbq_f32): New intrinsic.
14704 (vbfmlaltq_f32): New intrinsic.
14705 (vbfmlalbq_lane_f32): New intrinsic.
14706 (vbfmlaltq_lane_f32): New intrinsic.
14707 (vbfmlalbq_laneq_f32): New intrinsic.
14708 (vbfmlaltq_laneq_f32): New intrinsic.
14709 * config/aarch64/iterators.md (BF_MLA): New int iterator.
14710 (bt): New int attribute.
14712 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
14714 * config/i386/i386.md (*pushtf): Emit "#" instead of
14715 calling gcc_unreachable in insn output.
14718 (*pushsf_rex64): Ditto for alternatives other than 1.
14719 (*pushsf): Ditto for alternatives other than 1.
14721 2020-02-06 Martin Liska <mliska@suse.cz>
14723 PR gcov-profile/91971
14724 PR gcov-profile/93466
14725 * coverage.c (coverage_init): Revert mangling of
14726 path into filename. It can lead to huge filename length.
14727 Creation of subfolders seem more natural.
14729 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14732 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
14733 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
14734 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
14736 2020-02-06 Jakub Jelinek <jakub@redhat.com>
14739 * config/i386/predicates.md (avx_identity_operand): New predicate.
14740 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
14741 define_insn_and_split.
14744 * omp-low.c (use_pointer_for_field): For nested constructs, also
14745 look for map clauses on target construct.
14746 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
14747 taskreg_nesting_level.
14750 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
14751 shared clause, call omp_notice_variable on outer context if any.
14753 2020-02-05 Jason Merrill <jason@redhat.com>
14756 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
14757 non-zero address even if weak and not yet defined.
14759 2020-02-05 Martin Sebor <msebor@redhat.com>
14761 PR tree-optimization/92765
14762 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
14763 * tree-ssa-strlen.c (compute_string_length): Remove.
14764 (determine_min_objsize): Remove.
14765 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
14766 Avoid using type size as the upper bound on string length.
14767 (handle_builtin_string_cmp): Add an argument. Adjust.
14768 (strlen_check_and_optimize_call): Pass additional argument to
14769 handle_builtin_string_cmp.
14771 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
14773 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
14774 (*pushdi2_rex64 peephole2): Unconditionally split after
14775 epilogue_completed.
14776 (*ashl<mode>3_doubleword): Ditto.
14777 (*<shift_insn><mode>3_doubleword): Ditto.
14779 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
14782 * config/rs6000/rs6000.c (get_vector_offset): Fix
14784 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
14786 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
14788 2020-02-05 David Malcolm <dmalcolm@redhat.com>
14790 * doc/analyzer.texi
14791 (Special Functions for Debugging the Analyzer): Update description
14792 of __analyzer_dump_exploded_nodes.
14794 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14797 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
14798 include sets and not clobbers in the vzeroupper pattern.
14799 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
14800 the parallel has 17 (64-bit) or 9 (32-bit) elts.
14801 (*avx_vzeroupper_1): New define_insn_and_split.
14804 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
14805 don't run when !optimize.
14806 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
14809 2020-02-05 Richard Biener <rguenther@suse.de>
14811 PR middle-end/90648
14812 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
14813 checks before matching calls.
14815 2020-02-05 Jakub Jelinek <jakub@redhat.com>
14817 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
14818 function comment typo.
14820 PR middle-end/93555
14821 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
14822 simd_clone_create failed when i == 0, adjust clone->nargs by
14825 2020-02-05 Martin Liska <mliska@suse.cz>
14828 * doc/invoke.texi: Document that one should
14829 not combine ASLR and -fpch.
14831 2020-02-04 Richard Biener <rguenther@suse.de>
14833 PR tree-optimization/93538
14834 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
14836 2020-02-04 Richard Biener <rguenther@suse.de>
14838 PR tree-optimization/91123
14839 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
14840 (vn_walk_cb_data::last_vuse): New member.
14841 (vn_walk_cb_data::saved_operands): Likewsie.
14842 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
14843 (vn_walk_cb_data::push_partial_def): Use finish.
14844 (vn_reference_lookup_2): Update last_vuse and use finish if
14845 we've saved operands.
14846 (vn_reference_lookup_3): Use finish and update calls to
14847 push_partial_defs everywhere. When translating through
14848 memcpy or aggregate copies save off operands and alias-set.
14849 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
14850 operation for redundant store removal.
14852 2020-02-04 Richard Biener <rguenther@suse.de>
14854 PR tree-optimization/92819
14855 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
14856 generating more stmts than before.
14858 2020-02-04 Martin Liska <mliska@suse.cz>
14860 * config/arm/arm.c (arm_gen_far_branch): Move the function
14861 outside of selftests.
14863 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14865 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
14866 function to adjust PC-relative vector addresses.
14867 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
14868 handle vectors with PC-relative addresses.
14870 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14872 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
14874 (hard_reg_and_mode_to_addr_mask): Delete.
14875 (rs6000_adjust_vec_address): If the original vector address
14876 was REG+REG or REG+OFFSET and the element is not zero, do the add
14877 of the elements in the original address before adding the offset
14878 for the vector element. Use address_to_insn_form to validate the
14879 address using the register being loaded, rather than guessing
14880 whether the address is a DS-FORM or DQ-FORM address.
14882 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14884 * config/rs6000/rs6000.c (get_vector_offset): New helper function
14885 to calculate the offset in memory from the start of a vector of a
14886 particular element. Add code to keep the element number in
14887 bounds if the element number is variable.
14888 (rs6000_adjust_vec_address): Move calculation of offset of the
14889 vector element to get_vector_offset.
14890 (rs6000_split_vec_extract_var): Do not do the initial AND of
14891 element here, move the code to get_vector_offset.
14893 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
14895 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
14898 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
14900 * config/rs6000/constraints.md: Improve documentation.
14902 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
14905 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
14906 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
14908 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
14910 * config.gcc: Remove "carrizo" support.
14911 * config/gcn/gcn-opts.h (processor_type): Likewise.
14912 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
14913 * config/gcn/gcn.opt (gpu_type): Likewise.
14914 * config/gcn/t-omp-device: Likewise.
14916 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14919 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
14920 * config/arm/arm.c (arm_gen_far_branch): New function
14921 arm_gen_far_branch.
14922 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
14924 2020-02-03 Julian Brown <julian@codesourcery.com>
14925 Tobias Burnus <tobias@codesourcery.com>
14927 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
14929 2020-02-03 Jakub Jelinek <jakub@redhat.com>
14932 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
14933 valid RTL to sum up the lowest and second lowest bytes of the popcnt
14936 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
14938 PR rtl-optimization/91333
14939 * ira-color.c (struct allocno_color_data): Add member
14941 (init_allocno_threads): Set the member up.
14942 (bucket_allocno_compare_func): Add compare hard reg
14945 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
14947 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
14949 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
14950 * config.in: Regenerated.
14951 * configure: Regenerated.
14952 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
14953 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
14954 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
14956 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
14958 * configure: Regenerate.
14960 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
14962 PR rtl-optimization/91333
14963 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
14964 reg preferences comparison up.
14966 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
14968 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
14969 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
14970 aarch64-sve-builtins-base.h.
14971 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
14972 aarch64-sve-builtins-base.cc.
14973 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
14974 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
14975 (svcvtnt): Declare.
14976 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
14977 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
14978 (svcvtnt): New functions.
14979 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
14980 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
14981 (svcvtnt): New functions.
14982 (svcvt): Add a form that converts f32 to bf16.
14983 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
14984 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
14986 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
14987 Treat B as bfloat16_t.
14988 (ternary_bfloat_lane_base): New class.
14989 (ternary_bfloat_def): Likewise.
14990 (ternary_bfloat): New shape.
14991 (ternary_bfloat_lane_def): New class.
14992 (ternary_bfloat_lane): New shape.
14993 (ternary_bfloat_lanex2_def): New class.
14994 (ternary_bfloat_lanex2): New shape.
14995 (ternary_bfloat_opt_n_def): New class.
14996 (ternary_bfloat_opt_n): New shape.
14997 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
14998 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
14999 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
15000 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
15001 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15002 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
15003 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
15004 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
15005 the pattern off the narrow mode instead of the wider one.
15006 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
15007 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
15008 (sve_fp_op): Handle them.
15009 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
15010 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
15012 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
15014 * config/aarch64/arm_sve.h: Include arm_bf16.h.
15015 * config/aarch64/aarch64-modes.def (BF): Move definition before
15016 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
15017 (SVE_MODES): Handle BF modes.
15018 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
15020 (aarch64_full_sve_mode): Likewise.
15021 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
15023 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
15024 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
15025 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
15026 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
15028 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
15030 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
15031 (TYPES_all_data): Add bf16.
15032 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
15033 (register_tuple_type): Increase buffer size.
15034 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
15035 (bf16): New type suffix.
15036 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
15037 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
15038 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
15039 Change type from all_data to all_arith.
15040 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
15041 (svminp): Likewise.
15043 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
15044 Matthew Malcomson <matthew.malcomson@arm.com>
15045 Richard Sandiford <richard.sandiford@arm.com>
15047 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
15048 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
15049 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
15050 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
15051 __ARM_FEATURE_MATMUL_FP64.
15052 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
15053 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
15054 be disabled at the same time.
15055 (f32mm): New extension.
15056 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
15057 (AARCH64_FL_F64MM): Bump to the next bit up.
15058 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
15059 (TARGET_SVE_F64MM): New macros.
15060 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
15061 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
15062 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
15063 (UNSPEC_ZIP2Q): New unspeccs.
15064 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
15065 (optab, sur, perm_insn): Handle the new unspecs.
15066 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
15067 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
15068 TARGET_SVE_F64MM instead of separate tests.
15069 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
15070 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
15071 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
15072 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
15073 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
15074 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
15075 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
15076 (TYPES_s_signed): New macro.
15077 (TYPES_s_integer): Use it.
15078 (TYPES_d_float): New macro.
15079 (TYPES_d_data): Use it.
15080 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
15081 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
15082 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
15083 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
15084 (svmmla): New shape.
15085 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
15086 template parameters.
15087 (ternary_resize2_lane_base): Likewise.
15088 (ternary_resize2_base): New class.
15089 (ternary_qq_lane_base): Likewise.
15090 (ternary_intq_uintq_lane_def): Likewise.
15091 (ternary_intq_uintq_lane): New shape.
15092 (ternary_intq_uintq_opt_n_def): New class
15093 (ternary_intq_uintq_opt_n): New shape.
15094 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
15095 (ternary_uintq_intq_def): New class.
15096 (ternary_uintq_intq): New shape.
15097 (ternary_uintq_intq_lane_def): New class.
15098 (ternary_uintq_intq_lane): New shape.
15099 (ternary_uintq_intq_opt_n_def): New class.
15100 (ternary_uintq_intq_opt_n): New shape.
15101 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
15102 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
15103 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
15104 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
15106 (svdotprod_lane_impl): ...this new class.
15107 (svmmla_impl, svusdot_impl): New classes.
15108 (svdot_lane): Update to use svdotprod_lane_impl.
15109 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
15110 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
15112 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
15113 function, with no types defined.
15114 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
15115 AARCH64_FL_I8MM functions.
15116 (svmmla): New AARCH64_FL_F32MM function.
15117 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
15118 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
15119 AARCH64_FL_F64MM function.
15120 (REQUIRED_EXTENSIONS):
15122 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15124 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
15127 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
15129 * config/i386/i386.md (*movoi_internal_avx): Do not check for
15130 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
15131 (*movti_internal): Do not check for
15132 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15133 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
15134 just after check for TARGET_AVX.
15135 (*movdf_internal): Ditto.
15136 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
15137 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
15138 * config/i386/sse.md (mov<mode>_internal): Only check
15139 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
15140 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
15141 (<sse>_andnot<mode>3<mask_name>): Move check for
15142 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
15143 (<code><mode>3<mask_name>): Ditto.
15144 (*andnot<mode>3): Ditto.
15145 (*andnottf3): Ditto.
15146 (*<code><mode>3): Ditto.
15147 (*<code>tf3): Ditto.
15148 (*andnot<VI:mode>3): Remove
15149 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
15150 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
15151 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
15152 (sse4_1_blendv<ssemodesuffix>): Ditto.
15153 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
15154 Explain that tune applies to 128bit instructions only.
15156 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
15158 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
15159 to definition of hsa_kernel_description. Parse assembly to find SGPR
15160 and VGPR count of kernel and store in hsa_kernel_description.
15162 2020-01-31 Tamar Christina <tamar.christina@arm.com>
15164 PR rtl-optimization/91838
15165 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
15166 to truncate if allowed or reject combination.
15168 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
15170 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
15171 (find_inv_vars_cb): Likewise.
15173 2020-01-31 David Malcolm <dmalcolm@redhat.com>
15175 * calls.c (special_function_p): Split out the check for DECL_NAME
15176 being non-NULL and fndecl being extern at file scope into a
15177 new maybe_special_function_p and call it. Drop check for fndecl
15178 being non-NULL that was after a usage of DECL_NAME (fndecl).
15179 * tree.h (maybe_special_function_p): New inline function.
15181 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15183 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
15184 (mask_gather_load<mode>): ... here, and zero-initialize the
15186 (maskload<mode>di): Zero-initialize the destination.
15187 * config/gcn/gcn.c:
15189 2020-01-30 David Malcolm <dmalcolm@redhat.com>
15192 * doc/analyzer.texi (Limitations): Note that constraints on
15193 floating-point values are currently ignored.
15195 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15198 * symtab.c (symtab_node::noninterposable_alias): If localalias
15199 already exists, but is not usable, append numbers after it until
15200 a unique name is found. Formatting fix.
15202 PR middle-end/93505
15203 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
15206 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
15208 * config/gcn/gcn.c (print_operand): Handle LTGT.
15209 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
15211 2020-01-30 Richard Biener <rguenther@suse.de>
15213 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
15214 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
15216 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
15218 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
15219 without a DECL in .data.rel.ro.local.
15221 2020-01-30 Jakub Jelinek <jakub@redhat.com>
15224 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
15228 * config/i386/sse.md
15229 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
15230 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
15231 any_extend code iterator instead of always zero_extend.
15232 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
15233 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
15234 Use any_extend code iterator instead of always zero_extend.
15235 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
15236 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
15237 Use any_extend code iterator instead of always zero_extend.
15238 (*sse2_pmovmskb_ext): New define_insn.
15239 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
15242 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
15243 (*popcountsi2_zext_falsedep): New define_insn.
15245 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15247 * config.in: Regenerated.
15248 * configure: Regenerated.
15250 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
15253 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
15254 LLVM's assembler changed the default in version 9.
15256 2020-01-24 Jeff Law <law@redhat.com>
15258 PR tree-optimization/89689
15259 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
15261 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
15265 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15267 PR rtl-optimization/87763
15268 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15269 simplification to handle subregs as well as bare regs.
15270 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15272 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
15275 * ira.c (ira): Revert use of simplified LRA algorithm.
15277 2020-01-29 Martin Jambor <mjambor@suse.cz>
15279 PR tree-optimization/92706
15280 * tree-sra.c (struct access): Fields first_link, last_link,
15281 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
15282 next_rhs_queued and grp_rhs_queued respectively, new fields
15283 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
15284 (struct assign_link): Field next renamed to next_rhs, new field
15285 next_lhs. Updated comment.
15286 (work_queue_head): Renamed to rhs_work_queue_head.
15287 (lhs_work_queue_head): New variable.
15288 (add_link_to_lhs): New function.
15289 (relink_to_new_repr): Also relink LHS lists.
15290 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
15291 (add_access_to_lhs_work_queue): New function.
15292 (pop_access_from_work_queue): Renamed to
15293 pop_access_from_rhs_work_queue.
15294 (pop_access_from_lhs_work_queue): New function.
15295 (build_accesses_from_assign): Also add links to LHS lists and to LHS
15297 (child_would_conflict_in_lacc): Renamed to
15298 child_would_conflict_in_acc. Adjusted parameter names.
15299 (create_artificial_child_access): New parameter set_grp_read, use it.
15300 (subtree_mark_written_and_enqueue): Renamed to
15301 subtree_mark_written_and_rhs_enqueue.
15302 (propagate_subaccesses_across_link): Renamed to
15303 propagate_subaccesses_from_rhs.
15304 (propagate_subaccesses_from_lhs): New function.
15305 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
15308 2020-01-29 Martin Jambor <mjambor@suse.cz>
15310 PR tree-optimization/92706
15311 * tree-sra.c (struct access): Adjust comment of
15312 grp_total_scalarization.
15313 (find_access_in_subtree): Look for single children spanning an entire
15315 (scalarizable_type_p): Allow register accesses, adjust callers.
15316 (completely_scalarize): Remove function.
15317 (scalarize_elem): Likewise.
15318 (create_total_scalarization_access): Likewise.
15319 (sort_and_splice_var_accesses): Do not track total scalarization
15321 (analyze_access_subtree): New parameter totally, adjust to new meaning
15322 of grp_total_scalarization.
15323 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
15324 (can_totally_scalarize_forest_p): New function.
15325 (create_total_scalarization_access): Likewise.
15326 (create_total_access_and_reshape): Likewise.
15327 (total_should_skip_creating_access): Likewise.
15328 (totally_scalarize_subtree): Likewise.
15329 (analyze_all_variable_accesses): Perform total scalarization after
15330 subaccess propagation using the new functions above.
15331 (initialize_constant_pool_replacements): Output initializers by
15332 traversing the access tree.
15334 2020-01-29 Martin Jambor <mjambor@suse.cz>
15336 * tree-sra.c (verify_sra_access_forest): New function.
15337 (verify_all_sra_access_forests): Likewise.
15338 (create_artificial_child_access): Set parent.
15339 (analyze_all_variable_accesses): Call the verifier.
15341 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15343 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
15344 if called on indirect edge.
15345 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
15346 speculative call if needed.
15348 2020-01-29 Richard Biener <rguenther@suse.de>
15350 PR tree-optimization/93428
15351 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
15352 permutation when the load node is created.
15353 (vect_analyze_slp_instance): Re-use it here.
15355 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15357 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
15359 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
15361 PR rtl-optimization/93272
15362 * ira-lives.c (process_out_of_region_eh_regs): New function.
15363 (process_bb_node_lives): Call it.
15365 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15367 * coverage.c (read_counts_file): Make error message lowercase.
15369 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15371 * profile-count.c (profile_quality_display_names): Fix ordering.
15373 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
15376 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
15377 hash only when edge is first within the sequence.
15378 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
15379 (symbol_table::create_edge): Do not set target_prob.
15380 (cgraph_edge::remove_caller): Watch for speculative calls when updating
15381 the call site hash.
15382 (cgraph_edge::make_speculative): Drop target_prob parameter.
15383 (cgraph_edge::speculative_call_info): Remove.
15384 (cgraph_edge::first_speculative_call_target): New member function.
15385 (update_call_stmt_hash_for_removing_direct_edge): New function.
15386 (cgraph_edge::resolve_speculation): Rewrite to new API.
15387 (cgraph_edge::speculative_call_for_target): New member function.
15388 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
15389 multiple speculation targets.
15390 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
15392 (verify_speculative_call): Verify that targets form an interval.
15393 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
15394 (cgraph_edge::first_speculative_call_target): New member function.
15395 (cgraph_edge::next_speculative_call_target): New member function.
15396 (cgraph_edge::speculative_call_target_ref): New member function.
15397 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
15398 (cgraph_edge): Remove target_prob.
15399 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
15400 Fix handling of speculative calls.
15401 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
15402 * ipa-fnsummary.c (analyze_function_body): Likewise.
15403 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
15404 * ipa-profile.c (dump_histogram): Fix formating.
15405 (ipa_profile_generate_summary): Watch for overflows.
15406 (ipa_profile): Do not require probablity to be 1/2; update to new API.
15407 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
15408 (update_indirect_edges_after_inlining): Update to new API.
15409 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
15411 * profile-count.h: (profile_probability::adjusted): New.
15412 * tree-inline.c (copy_bb): Update to new speculative call API; fix
15413 updating of profile.
15414 * value-prof.c (gimple_ic_transform): Rename to ...
15415 (dump_ic_profile): ... this one; update dumping.
15416 (stream_in_histogram_value): Fix formating.
15417 (gimple_value_profile_transformations): Update.
15419 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15422 * config/i386/i386.md (*movoi_internal_avx): Remove
15423 TARGET_SSE_TYPELESS_STORES check.
15424 (*movti_internal): Prefer TARGET_AVX over
15425 TARGET_SSE_TYPELESS_STORES.
15426 (*movtf_internal): Likewise.
15427 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
15428 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
15429 from TARGET_SSE_TYPELESS_STORES.
15431 2020-01-28 David Malcolm <dmalcolm@redhat.com>
15433 * diagnostic-core.h (warning_at): Rename overload to...
15434 (warning_meta): ...this.
15435 (emit_diagnostic_valist): Delete decl of overload taking
15436 diagnostic_metadata.
15437 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
15438 (warning_at): Rename overload taking diagnostic_metadata to...
15439 (warning_meta): ...this.
15441 2020-01-28 Richard Biener <rguenther@suse.de>
15443 PR tree-optimization/93439
15444 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
15445 * tree-cfg.c (move_sese_region_to_fn): ... here.
15446 (verify_types_in_gimple_reference): Verify used cliques are
15449 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
15452 * config/i386/i386-options.c (set_ix86_tune_features): Add an
15453 argument of a pointer to struct gcc_options and pass it to
15454 parse_mtune_ctrl_str.
15455 (ix86_function_specific_restore): Pass opts to
15456 set_ix86_tune_features.
15457 (ix86_option_override_internal): Likewise.
15458 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
15459 gcc_options and use it for x_ix86_tune_ctrl_string.
15461 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15463 PR rtl-optimization/87763
15464 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
15465 simplification to handle subregs as well as bare regs.
15466 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
15468 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15470 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
15471 for reduction chains that (now) include a call.
15473 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15475 PR tree-optimization/92822
15476 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
15477 out the don't-care elements of a vector whose significant elements
15478 are duplicates, make the don't-care elements duplicates too.
15480 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
15482 PR tree-optimization/93434
15483 * tree-predcom.c (split_data_refs_to_components): Record which
15484 components have had aliasing loads removed. Prevent store-store
15485 commoning for all such components.
15487 2020-01-28 Jakub Jelinek <jakub@redhat.com>
15490 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
15491 -1 or is_vshift is true, use new_vector with number of elts npatterns
15492 rather than new_unary_operation.
15494 PR tree-optimization/93454
15495 * gimple-fold.c (fold_array_ctor_reference): Perform
15496 elt_size.to_uhwi () just once, instead of calling it in every
15497 iteration. Punt if that value is above size of the temporary
15498 buffer. Decrease third native_encode_expr argument when
15499 bufoff + elt_sz is above size of buf.
15501 2020-01-27 Joseph Myers <joseph@codesourcery.com>
15503 * config/mips/mips.c (mips_declare_object_name)
15504 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
15506 2020-01-27 Martin Liska <mliska@suse.cz>
15508 PR gcov-profile/93403
15509 * tree-profile.c (gimple_init_gcov_profiler): Generate
15510 both __gcov_indirect_call_profiler_v4 and
15511 __gcov_indirect_call_profiler_v4_atomic.
15513 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15516 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
15518 (@aarch64_split_simd_mov<mode>): Use it.
15519 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
15520 Leave the vec_extract patterns to handle 2-element vectors.
15521 (aarch64_simd_mov_from_<mode>high): Likewise.
15522 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
15523 (vec_extractv2dfv1df): Likewise.
15525 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15527 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
15528 jump conditions for *compare_condjump<GPI:mode>.
15530 2020-01-27 David Malcolm <dmalcolm@redhat.com>
15533 * digraph.cc (test_edge::test_edge): Specify template for base
15536 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15538 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
15540 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15542 * config/arc/arc-protos.h (gen_mlo): Remove.
15543 (gen_mhi): Likewise.
15544 * config/arc/arc.c (AUX_MULHI): Define.
15545 (arc_must_save_reister): Special handling for r58/59.
15546 (arc_compute_frame_size): Consider mlo/mhi registers.
15547 (arc_save_callee_saves): Emit fp/sp move only when emit_move
15549 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
15550 mlo/mhi name selection.
15551 (arc_restore_callee_saves): Don't early restore blink when ISR.
15552 (arc_expand_prologue): Add mlo/mhi saving.
15553 (arc_expand_epilogue): Add mlo/mhi restoring.
15556 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
15557 numbering when MUL64 option is used.
15558 (DWARF2_FRAME_REG_OUT): Define.
15559 * config/arc/arc.md (arc600_stall): New pattern.
15560 (VUNSPEC_ARC_ARC600_STALL): Define.
15561 (mulsi64): Use correct mlo/mhi registers.
15562 (mulsi_600): Clean it up.
15563 * config/arc/predicates.md (mlo_operand): Remove any dependency on
15565 (mhi_operand): Likewise.
15567 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
15568 Petro Karashchenko <petro.karashchenko@ring.com>
15570 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
15571 attributes if needed.
15572 (prepare_move_operands): Generate special unspec instruction for
15574 (arc_isuncached_mem_p): Propagate uncached attribute to each
15576 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
15577 (VUNSPEC_ARC_STDI): Likewise.
15578 (ALLI): New mode iterator.
15579 (mALLI): New mode attribute.
15580 (lddi): New instruction pattern.
15582 (stdidi_split): Split instruction for architectures which are not
15583 supporting ll64 option.
15584 (lddidi_split): Likewise.
15586 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15588 PR rtl-optimization/92989
15589 * lra-lives.c (process_bb_lives): Update the live-in set before
15590 processing additional clobbers.
15592 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15594 PR rtl-optimization/93170
15595 * cselib.c (cselib_invalidate_regno_val): New function, split out
15597 (cselib_invalidate_regno): ...here.
15598 (cselib_invalidated_by_call_p): New function.
15599 (cselib_process_insn): Iterate over all the hard-register entries in
15600 REG_VALUES and invalidate any that cross call-clobbered registers.
15602 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
15604 * dojump.c (split_comparison): Use HONOR_NANS rather than
15605 HONOR_SNANS when splitting LTGT.
15607 2020-01-27 Martin Liska <mliska@suse.cz>
15610 * opts.c (print_filtered_help): Exclude language-specific
15611 options from --help=common unless enabled in all FEs.
15613 2020-01-27 Martin Liska <mliska@suse.cz>
15615 * opts.c (print_help): Exclude params from
15616 all except --help=param.
15618 2020-01-27 Martin Liska <mliska@suse.cz>
15621 * config/i386/i386-features.c (make_resolver_func):
15622 Align the code with ppc64 target implementation.
15623 Do not generate a unique name for resolver function.
15625 2020-01-27 Richard Biener <rguenther@suse.de>
15627 PR tree-optimization/93397
15628 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
15629 converted reduction chain SLP graph adjustment.
15631 2020-01-26 Marek Polacek <polacek@redhat.com>
15634 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
15637 2020-01-26 Jason Merrill <jason@redhat.com>
15640 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
15643 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
15645 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
15646 (rx_setmem): Likewise.
15648 2020-01-26 Jakub Jelinek <jakub@redhat.com>
15651 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
15652 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
15653 drop <di> from constraint of last operand.
15656 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
15657 TARGET_AVX2 and V4DFmode not in the split condition, but in the
15658 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
15660 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
15663 * ipa-cp.c (get_info_about_necessary_edges): Remove value
15666 2020-01-24 Jeff Law <law@redhat.com>
15668 PR tree-optimization/92788
15669 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
15672 2020-01-24 Jakub Jelinek <jakub@redhat.com>
15675 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
15676 *avx_vperm_broadcast_<mode>,
15677 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
15678 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
15679 Move before avx2_perm<mode>/avx512f_perm<mode>.
15682 * simplify-rtx.c (simplify_const_unary_operation,
15683 simplify_const_binary_operation): Punt for mode precision above
15684 MAX_BITSIZE_MODE_ANY_INT.
15686 2020-01-24 Andrew Pinski <apinski@marvell.com>
15688 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
15689 alu.shift_reg to 0.
15691 2020-01-24 Jeff Law <law@redhat.com>
15694 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
15695 for REGs. Call output_operand_lossage to get more reasonable
15698 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
15700 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
15701 gcn_fp_compare_operator.
15702 (vec_cmpu<mode>di): Use gcn_compare_operator.
15703 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
15704 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
15705 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
15706 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
15707 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
15708 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
15709 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
15710 gcn_fp_compare_operator.
15711 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
15712 gcn_fp_compare_operator.
15713 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
15714 gcn_fp_compare_operator.
15715 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
15716 gcn_fp_compare_operator.
15718 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
15720 * doc/install.texi (Cross-Compiler-Specific Options): Document
15721 `--with-toolexeclibdir' option.
15723 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
15725 * target.def (flags_regnum): Also mention effect on delay slot filling.
15726 * doc/tm.texi: Regenerate.
15728 2020-01-23 Jeff Law <law@redhat.com>
15730 PR translation/90162
15731 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
15733 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
15736 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
15739 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15741 PR rtl-optimization/93402
15742 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
15745 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15747 * config.in: Regenerated.
15748 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
15749 for TARGET_LIBC_GNUSTACK.
15750 * configure: Regenerated.
15751 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
15752 found to be 2.31 or greater.
15754 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
15756 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
15758 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
15759 (mips_asm_file_end): New function. Delegate to
15760 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
15761 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
15763 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15766 * config/i386/i386-modes.def (POImode): New mode.
15767 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
15768 * config/i386/i386.md (DPWI): New mode attribute.
15769 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
15770 (QWI): Rename to...
15771 (QPWI): ... this. Use POI instead of OI for TImode.
15772 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
15773 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
15776 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15779 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
15781 (speculation_tracker_rev): New pattern.
15782 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
15783 Use speculation_tracker_rev to track the inverse condition.
15785 2020-01-23 Richard Biener <rguenther@suse.de>
15787 PR tree-optimization/93381
15788 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
15789 alias-set of the def as argument and record the first one.
15790 (vn_walk_cb_data::first_set): New member.
15791 (vn_reference_lookup_3): Pass the alias-set of the current def
15792 to push_partial_def. Fix alias-set used in the aggregate copy
15794 (vn_reference_lookup): Consistently set *last_vuse_ptr.
15795 * real.c (clear_significand_below): Fix out-of-bound access.
15797 2020-01-23 Jakub Jelinek <jakub@redhat.com>
15800 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
15801 New define_insn patterns.
15803 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15805 * doc/sourcebuild.texi (check-function-bodies): Add an
15806 optional target/xfail selector.
15808 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
15810 PR rtl-optimization/93124
15811 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
15812 bare USE and CLOBBER insns.
15814 2020-01-22 Andrew Pinski <apinski@marvell.com>
15816 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
15818 2020-01-22 David Malcolm <dmalcolm@redhat.com>
15821 * gdbinit.in (break-on-saved-diagnostic): Update for move of
15822 diagnostic_manager into "ana" namespace.
15823 * selftest-run-tests.c (selftest::run_tests): Update for move of
15824 selftest::run_analyzer_selftests to
15825 ana::selftest::run_analyzer_selftests.
15827 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
15829 * cfgexpand.c (union_stack_vars): Update the size.
15831 2020-01-22 Richard Biener <rguenther@suse.de>
15833 PR tree-optimization/93381
15834 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
15835 throughout, handle all conversions the same.
15837 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15840 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
15841 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
15842 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
15843 Call force_reg on high_in2 unconditionally.
15845 2020-01-22 Martin Liska <mliska@suse.cz>
15847 PR tree-optimization/92924
15848 * profile.c (compute_value_histograms): Divide
15849 all counter values.
15851 2020-01-22 Jakub Jelinek <jakub@redhat.com>
15854 * output.h (assemble_name_resolve): Declare.
15855 * varasm.c (assemble_name_resolve): New function.
15856 (assemble_name): Use it.
15857 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
15859 2020-01-22 Joseph Myers <joseph@codesourcery.com>
15861 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
15862 update_web_docs_git instead of update_web_docs_svn.
15864 2020-01-21 Andrew Pinski <apinski@marvell.com>
15867 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
15868 as PTR mode. Have operand 1 as being modeless, it can be P mode.
15869 (*tlsgd_small_<mode>): Likewise.
15870 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
15871 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
15872 register. Convert that register back to dest using convert_mode.
15874 2020-01-21 Jim Wilson <jimw@sifive.com>
15876 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
15879 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
15880 Uros Bizjak <ubizjak@gmail.com>
15883 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
15885 (legitimize_tls_address): Do GNU2 TLS address computation in
15886 ptr_mode and zero-extend result to Pmode.
15887 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
15888 :P with :PTR and Pmode with ptr_mode.
15889 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
15890 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
15891 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
15893 2020-01-21 Jakub Jelinek <jakub@redhat.com>
15896 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
15897 the last two operands are CONST_INT_P before using them as such.
15899 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15901 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
15902 to get the integer element types.
15904 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
15906 * config/aarch64/aarch64-sve-builtins.h
15907 (function_expander::convert_to_pmode): Declare.
15908 * config/aarch64/aarch64-sve-builtins.cc
15909 (function_expander::convert_to_pmode): New function.
15910 (function_expander::get_contiguous_base): Use it.
15911 (function_expander::prepare_gather_address_operands): Likewise.
15912 * config/aarch64/aarch64-sve-builtins-sve2.cc
15913 (svwhilerw_svwhilewr_impl::expand): Likewise.
15915 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
15918 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
15919 cfun->machine->label_is_assembled.
15920 (aarch64_print_patchable_function_entry): New.
15921 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
15922 * config/aarch64/aarch64.h (struct machine_function): New field,
15923 label_is_assembled.
15925 2020-01-21 David Malcolm <dmalcolm@redhat.com>
15928 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
15931 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
15934 * cgraph.c (cgraph_edge::resolve_speculation,
15935 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
15936 call_stmt_site_hash.
15938 2020-01-21 Martin Liska <mliska@suse.cz>
15940 * config/rs6000/rs6000.c (common_mode_defined): Remove
15943 2020-01-21 Richard Biener <rguenther@suse.de>
15945 PR tree-optimization/92328
15946 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
15947 type when value-numbering same-sized store by inserting a
15949 (eliminate_dom_walker::eliminate_stmt): When eliminating
15950 a redundant store handle bit-reinterpretation of the same value.
15952 2020-01-21 Andrew Pinski <apinski@marvel.com>
15955 * tree-into-ssa.c (prepare_block_for_update_1): Split out
15957 (prepare_block_for_update): This. Use a worklist instead of
15960 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
15962 * config/arm/arm.c (clear_operation_p):
15963 Initialise last_regno, skip first iteration
15964 based on the first_set value and use ints instead
15965 of the unnecessary HOST_WIDE_INTs.
15967 2020-01-21 Jakub Jelinek <jakub@redhat.com>
15970 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
15971 compare_mode other than SFmode or DFmode.
15973 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
15976 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
15977 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
15978 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
15980 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
15982 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
15984 2020-01-20 Andrew Pinski <apinski@marvell.com>
15986 PR middle-end/93242
15987 * targhooks.c (default_print_patchable_function_entry): Use
15988 output_asm_insn to emit the nop instruction.
15990 2020-01-20 Fangrui Song <maskray@google.com>
15992 PR middle-end/93194
15993 * targhooks.c (default_print_patchable_function_entry): Align to
15996 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
15999 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
16000 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
16001 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
16002 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
16003 (*tls_dynamic_gnu2_lea_64): Renamed to ...
16004 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
16005 Remove the {q} suffix from lea.
16006 (*tls_dynamic_gnu2_call_64): Renamed to ...
16007 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
16008 (*tls_dynamic_gnu2_combine_64): Renamed to ...
16009 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
16010 Pass Pmode to gen_tls_dynamic_gnu2_64.
16012 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
16014 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
16016 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
16018 * config/aarch64/aarch64-sve-builtins-base.cc
16019 (svld1ro_impl::memory_vector_mode): Remove parameter name.
16021 2020-01-20 Richard Biener <rguenther@suse.de>
16024 * dwarf2out.c (prune_unused_types): Unconditionally mark
16025 called function DIEs.
16027 2020-01-20 Martin Liska <mliska@suse.cz>
16029 PR tree-optimization/93199
16030 * tree-eh.c (struct leh_state): Add
16031 new field outer_non_cleanup.
16032 (cleanup_is_dead_in): Pass leh_state instead
16033 of eh_region. Add a checking that state->outer_non_cleanup
16034 points to outer non-clean up region.
16035 (lower_try_finally): Record outer_non_cleanup
16037 (lower_catch): Likewise.
16038 (lower_eh_filter): Likewise.
16039 (lower_eh_must_not_throw): Likewise.
16040 (lower_cleanup): Likewise.
16042 2020-01-20 Richard Biener <rguenther@suse.de>
16044 PR tree-optimization/93094
16045 * tree-vectorizer.h (vect_loop_versioning): Adjust.
16046 (vect_transform_loop): Likewise.
16047 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
16048 loop_vectorized_call to vect_transform_loop.
16049 * tree-vect-loop.c (vect_transform_loop): Pass down
16050 loop_vectorized_call to vect_loop_versioning.
16051 * tree-vect-loop-manip.c (vect_loop_versioning): Use
16052 the earlier discovered loop_vectorized_call.
16054 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
16056 * doc/contribute.texi: Update for SVN -> Git transition.
16057 * doc/install.texi: Likewise.
16059 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16062 * cgraph.c (cgraph_edge::make_speculative): Increase number of
16063 speculative targets.
16064 (verify_speculative_call): New function
16065 (cgraph_node::verify_node): Use it.
16066 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
16069 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
16072 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
16073 (cgraph_edge::make_direct): Remove all indirect targets.
16074 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
16075 (cgraph_node::verify_node): Verify that only one call_stmt or
16076 lto_stmt_uid is set.
16077 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
16079 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
16080 (lto_output_ref): Simplify streaming of stmt.
16081 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
16083 2020-01-18 Tamar Christina <tamar.christina@arm.com>
16085 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
16086 Mark parameter unused.
16088 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
16090 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
16092 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
16094 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
16096 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
16098 * Makefile.in: Add coroutine-passes.o.
16099 * builtin-types.def (BT_CONST_SIZE): New.
16100 (BT_FN_BOOL_PTR): New.
16101 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
16102 * builtins.def (DEF_COROUTINE_BUILTIN): New.
16103 * coroutine-builtins.def: New file.
16104 * coroutine-passes.cc: New file.
16105 * function.h (struct GTY function): Add a bit to indicate that the
16106 function is a coroutine component.
16107 * internal-fn.c (expand_CO_FRAME): New.
16108 (expand_CO_YIELD): New.
16109 (expand_CO_SUSPN): New.
16110 (expand_CO_ACTOR): New.
16111 * internal-fn.def (CO_ACTOR): New.
16115 * passes.def: Add pass_coroutine_lower_builtins,
16116 pass_coroutine_early_expand_ifns.
16117 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
16118 (make_pass_coroutine_early_expand_ifns): New.
16119 * doc/invoke.texi: Document the fcoroutines command line
16122 2020-01-18 Jakub Jelinek <jakub@redhat.com>
16124 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
16127 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
16128 after checking the argument is a REG. Don't use REGNO (reg)
16129 again to set last_regno, reuse regno variable instead.
16131 2020-01-17 David Malcolm <dmalcolm@redhat.com>
16133 * doc/analyzer.texi (Limitations): Add note about NaN.
16135 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16136 Sudakshina Das <sudi.das@arm.com>
16138 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
16139 and valid immediate.
16140 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
16141 (lshrdi3): Generate thumb2_lsrl for valid immediates.
16142 * config/arm/constraints.md (Pg): New.
16143 * config/arm/predicates.md (long_shift_imm): New.
16144 (arm_reg_or_long_shift_imm): Likewise.
16145 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
16146 (thumb2_lsll): Likewise.
16147 (thumb2_lsrl): New.
16149 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16150 Sudakshina Das <sudi.das@arm.com>
16152 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
16153 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
16154 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
16155 register pairs for doubleword quantities for ARMv8.1M-Mainline.
16156 * config/arm/thumb2.md (thumb2_asrl): New.
16157 (thumb2_lsll): Likewise.
16159 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16161 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
16164 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
16166 * gdbinit.in (help-gcc-hooks): New command.
16167 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
16168 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
16171 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16173 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
16174 correct target macro.
16176 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16178 * config/aarch64/aarch64-protos.h
16179 (aarch64_sve_ld1ro_operand_p): New.
16180 * config/aarch64/aarch64-sve-builtins-base.cc
16181 (class load_replicate): New.
16182 (class svld1ro_impl): New.
16183 (class svld1rq_impl): Change to inherit from load_replicate.
16184 (svld1ro): New sve intrinsic function base.
16185 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
16186 New DEF_SVE_FUNCTION.
16187 * config/aarch64/aarch64-sve-builtins-base.h
16188 (svld1ro): New decl.
16189 * config/aarch64/aarch64-sve-builtins.cc
16190 (function_expander::add_mem_operand): Modify assert to allow
16192 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
16194 * config/aarch64/aarch64.c
16195 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
16196 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
16197 (aarch64_sve_ld1ro_operand_p): New.
16198 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
16199 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
16200 * config/aarch64/predicates.md
16201 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
16203 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
16205 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
16206 Introduce this ACLE specified predefined macro.
16207 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
16208 (fp): Disabling this disables f64mm.
16209 (simd): Disabling this disables f64mm.
16210 (fp16): Disabling this disables f64mm.
16211 (sve): Disabling this disables f64mm.
16212 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
16213 (AARCH64_ISA_F64MM): New.
16214 (TARGET_F64MM): New.
16215 * doc/invoke.texi (f64mm): Document new option.
16217 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16219 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
16220 (neoversen1_tunings): Likewise.
16222 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
16225 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
16226 Add assert to ensure prolog has been emitted.
16227 (aarch64_split_atomic_op): Likewise.
16228 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
16229 Use epilogue_completed rather than reload_completed.
16230 (aarch64_atomic_exchange<mode>): Likewise.
16231 (aarch64_atomic_<atomic_optab><mode>): Likewise.
16232 (atomic_nand<mode>): Likewise.
16233 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
16234 (atomic_fetch_nand<mode>): Likewise.
16235 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
16236 (atomic_nand_fetch<mode>): Likewise.
16238 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16241 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
16243 (REVERSE_CONDITION): Delete.
16244 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
16245 (CCFP_CCFPE): Likewise.
16246 (e): New mode attribute.
16247 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
16248 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
16249 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
16250 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
16251 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
16252 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
16253 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
16254 name of generator from gen_ccmpdi to gen_ccmpccdi.
16255 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
16256 the previous comparison but aren't able to, use the new ccmp_rev
16259 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
16261 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
16262 than testing directly for INTEGER_CST.
16263 (gimplify_target_expr, gimplify_omp_depend): Likewise.
16265 2020-01-17 Jakub Jelinek <jakub@redhat.com>
16267 PR tree-optimization/93292
16268 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
16269 get_vectype_for_scalar_type returns NULL.
16271 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16273 * params.opt (-param=max-predicted-iterations): Increase range from 0.
16274 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
16276 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
16278 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
16280 * params.opt: (max-predicted-iterations): Set bounds.
16281 * predict.c (real_almost_one, real_br_prob_base,
16282 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
16283 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
16284 probabilities; do not truncate to reg_br_prob_bases.
16285 (estimate_loops_at_level): Pass max_cyclic_prob.
16286 (estimate_loops): Compute max_cyclic_prob.
16287 (estimate_bb_frequencies): Do not initialize real_*; update calculation
16289 * profile-count.c (profile_probability::to_sreal): New.
16290 * profile-count.h (class sreal): Move up in file.
16291 (profile_probability::to_sreal): Declare.
16293 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16296 (arm_invalid_conversion): New function for target hook.
16297 (arm_invalid_unary_op): New function for target hook.
16298 (arm_invalid_binary_op): New function for target hook.
16300 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16302 * config.gcc: Add arm_bf16.h.
16303 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
16304 (arm_simd_builtin_std_type): Add BFmode.
16305 (arm_init_simd_builtin_types): Define element types for vector types.
16306 (arm_init_bf16_types): New function.
16307 (arm_init_builtins): Add arm_init_bf16_types function call.
16308 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
16309 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
16310 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
16311 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
16312 (arm_vector_mode_supported_p): Add V4BF, V8BF.
16313 (arm_mangle_type): Add __bf16.
16314 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
16315 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
16316 arm_bf16_ptr_type_node.
16317 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
16318 define_split between ARM registers.
16319 * config/arm/arm_bf16.h: New file.
16320 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
16321 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
16322 (VQXMOV): Add V8BF.
16323 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
16324 * config/arm/vfp.md: Add BFmode to movhf patterns.
16326 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
16327 Andre Vieira <andre.simoesdiasvieira@arm.com>
16329 * config/arm/arm-cpus.in (mve, mve_float): New features.
16330 (dsp, mve, mve.fp): New options.
16331 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
16332 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
16333 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
16335 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16336 Thomas Preud'homme <thomas.preudhomme@arm.com>
16338 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
16340 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
16341 error for using -mcmse when targeting Armv8.1-M Mainline.
16343 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16344 Thomas Preud'homme <thomas.preudhomme@arm.com>
16346 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
16347 address in r4 when targeting Armv8.1-M Mainline.
16348 (nonsecure_call_value_internal): Likewise.
16349 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
16350 a register match_operand again. Emit BLXNS when targeting
16351 Armv8.1-M Mainline.
16352 (nonsecure_call_value_reg_thumb2): Likewise.
16354 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16355 Thomas Preud'homme <thomas.preudhomme@arm.com>
16357 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
16358 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
16359 variable as true when floating-point ABI is not hard. Replace
16360 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
16361 Generate VLSTM and VLLDM instruction respectively before and
16362 after a function call to cmse_nonsecure_call function.
16363 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
16364 (VUNSPEC_VLLDM): Likewise.
16365 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
16366 (lazy_load_multiple_insn): Likewise.
16368 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16369 Thomas Preud'homme <thomas.preudhomme@arm.com>
16371 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
16372 (arm_emit_vfp_multi_reg_pop): Likewise.
16373 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
16374 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
16375 restore callee-saved VFP registers.
16377 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16378 Thomas Preud'homme <thomas.preudhomme@arm.com>
16380 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
16381 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
16382 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
16383 callee-saved GPRs as well as clear ip register before doing a nonsecure
16384 call then restore callee-saved GPRs after it when targeting
16385 Armv8.1-M Mainline.
16386 (arm_reorg): Adapt to function rename.
16388 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16389 Thomas Preud'homme <thomas.preudhomme@arm.com>
16391 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
16392 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
16393 clear_vfp_multiple pattern based on a new vfp parameter.
16394 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
16395 targeting Armv8.1-M Mainline.
16396 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
16397 unconditionally when targeting Armv8.1-M Mainline architecture. Check
16398 whether VFP registers are available before looking call_used_regs for a
16400 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
16401 of prototype of clear_operation_p.
16402 (clear_vfp_multiple_operation): New predicate.
16403 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
16404 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
16406 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16407 Thomas Preud'homme <thomas.preudhomme@arm.com>
16409 * config/arm/arm-protos.h (clear_operation_p): Declare.
16410 * config/arm/arm.c (clear_operation_p): New function.
16411 (cmse_clear_registers): Generate clear_multiple instruction pattern if
16412 targeting Armv8.1-M Mainline or successor.
16413 (output_return_instruction): Only output APSR register clearing if
16414 Armv8.1-M Mainline instructions not available.
16415 (thumb_exit): Likewise.
16416 * config/arm/predicates.md (clear_multiple_operation): New predicate.
16417 * config/arm/thumb2.md (clear_apsr): New define_insn.
16418 (clear_multiple): Likewise.
16419 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
16421 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16422 Thomas Preud'homme <thomas.preudhomme@arm.com>
16424 * config/arm/arm.c (fp_sysreg_names): Declare and define.
16425 (use_return_insn): Also return false for Armv8.1-M Mainline.
16426 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
16427 Mainline instructions are available.
16428 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
16429 when targeting Armv8.1-M Mainline Security Extensions.
16430 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
16431 Mainline entry function.
16432 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
16433 targeting Armv8.1-M Mainline or successor.
16434 (arm_expand_epilogue): Fix indentation of caller-saved register
16435 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
16437 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
16438 (FP_SYSREGS): Likewise.
16439 (enum vfp_sysregs_encoding): Define enum.
16440 (fp_sysreg_names): Declare.
16441 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
16442 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
16443 (pop_fpsysreg_insn): Likewise.
16445 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16446 Thomas Preud'homme <thomas.preudhomme@arm.com>
16448 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
16449 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
16450 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
16451 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
16452 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
16453 (ARMv8_1m_main): New feature group.
16454 (armv8.1-m.main): New architecture.
16455 * config/arm/arm-tables.opt: Regenerate.
16456 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
16457 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
16458 (arm_options_perform_arch_sanity_checks): Error out when targeting
16459 Armv8.1-M Mainline Security Extensions.
16460 * config/arm/arm.h (arm_arch8_1m_main): Declare.
16462 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16464 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
16465 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
16466 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
16467 aarch64_bfdot_laneq): New.
16468 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
16469 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
16470 vbfdotq_laneq_f32): New.
16471 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
16472 VBFMLA_W, VBF): New.
16473 (isquadop): Add V4BF, V8BF.
16475 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16477 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
16478 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
16479 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
16480 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
16481 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
16482 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
16483 usdot_laneq, sudot_lane,sudot_laneq): New.
16484 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
16485 (aarch64_<sur>dot_lane): New.
16486 * config/aarch64/arm_neon.h (vusdot_s32): New.
16487 (vusdotq_s32): New.
16488 (vusdot_lane_s32): New.
16489 (vsudot_lane_s32): New.
16490 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
16491 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
16493 2020-01-16 Martin Liska <mliska@suse.cz>
16495 * value-prof.c (dump_histogram_value): Fix
16496 obvious spacing issue.
16498 2020-01-16 Andrew Pinski <apinski@marvell.com>
16500 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
16501 !storage_order_barrier_p.
16503 2020-01-16 Andrew Pinski <apinski@marvell.com>
16505 * sched-int.h (_dep): Add unused bit-field field for the padding.
16506 * sched-deps.c (init_dep_1): Init unused field.
16508 2020-01-16 Andrew Pinski <apinski@marvell.com>
16510 * optabs.h (create_expand_operand): Initialize target field also.
16512 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
16514 PR tree-optimization/92429
16515 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
16516 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
16518 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
16521 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
16523 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
16524 aarch64_sve_int_mode to each mode.
16526 2020-01-15 David Malcolm <dmalcolm@redhat.com>
16528 * doc/analyzer.texi (Overview): Add note about
16529 -fdump-ipa-analyzer.
16531 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
16533 PR tree-optimization/93231
16534 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
16535 input_type is unsigned. Use tree_to_shwi for shift constant.
16536 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
16537 (simplify_count_trailing_zeroes): Add test to handle known non-zero
16538 inputs more efficiently.
16540 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
16542 * config/i386/i386.md (*movsf_internal): Do not require
16543 SSE2 ISA for alternatives 14 and 15.
16545 2020-01-15 Richard Biener <rguenther@suse.de>
16547 PR middle-end/93273
16548 * tree-eh.c (sink_clobbers): If we already visited the destination
16549 block do not defer insertion.
16550 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
16551 the purpose of defered insertion.
16553 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16555 * BASE-VER: Bump to 10.0.1.
16557 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16559 PR tree-optimization/93247
16560 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
16561 type of the stmt that we're going to vectorize.
16563 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
16565 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
16566 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
16569 2020-01-15 Martin Liska <mliska@suse.cz>
16571 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
16572 2 calls of streamer_read_hwi in a function call.
16574 2020-01-15 Richard Biener <rguenther@suse.de>
16576 * alias.c (record_alias_subset): Avoid redundant work when
16577 subset is already recorded.
16579 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16581 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
16582 the analyzer options provide CWE identifiers.
16584 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16586 * tree-diagnostic-path.cc (path_summary::event_range::print):
16587 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
16588 using get_pure_location.
16590 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16592 PR tree-optimization/93262
16593 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
16594 perform head trimming only if the last argument is constant,
16595 either all ones, or larger or equal to head trim, in the latter
16596 case decrease the last argument by head_trim.
16598 PR tree-optimization/93249
16599 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
16600 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
16601 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
16602 perform head trim unless we can prove there are no '\0' chars
16603 from the source among the first head_trim chars.
16605 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16607 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
16609 2020-01-15 Jakub Jelinek <jakub@redhat.com>
16612 * config/i386/sse.md
16613 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
16614 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
16615 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
16616 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
16617 just a single alternative instead of two, make operands 1 and 2
16620 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
16623 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
16626 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16628 * Makefile.in (lang_opt_files): Add analyzer.opt.
16629 (ANALYZER_OBJS): New.
16630 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
16631 tristate.o and ANALYZER_OBJS.
16632 (TEXI_GCCINT_FILES): Add analyzer.texi.
16633 * common.opt (-fanalyzer): New driver option.
16634 * config.in: Regenerate.
16635 * configure: Regenerate.
16636 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
16637 (gccdepdir): Also create depdir for "analyzer" subdir.
16638 * digraph.cc: New file.
16639 * digraph.h: New file.
16640 * doc/analyzer.texi: New file.
16641 * doc/gccint.texi ("Static Analyzer") New menu item.
16642 (analyzer.texi): Include it.
16643 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
16644 ("Warning Options"): Add static analysis warnings to the list.
16645 (-Wno-analyzer-double-fclose): New option.
16646 (-Wno-analyzer-double-free): New option.
16647 (-Wno-analyzer-exposure-through-output-file): New option.
16648 (-Wno-analyzer-file-leak): New option.
16649 (-Wno-analyzer-free-of-non-heap): New option.
16650 (-Wno-analyzer-malloc-leak): New option.
16651 (-Wno-analyzer-possible-null-argument): New option.
16652 (-Wno-analyzer-possible-null-dereference): New option.
16653 (-Wno-analyzer-null-argument): New option.
16654 (-Wno-analyzer-null-dereference): New option.
16655 (-Wno-analyzer-stale-setjmp-buffer): New option.
16656 (-Wno-analyzer-tainted-array-index): New option.
16657 (-Wno-analyzer-use-after-free): New option.
16658 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
16659 (-Wno-analyzer-use-of-uninitialized-value): New option.
16660 (-Wanalyzer-too-complex): New option.
16661 (-fanalyzer-call-summaries): New warning.
16662 (-fanalyzer-checker=): New warning.
16663 (-fanalyzer-fine-grained): New warning.
16664 (-fno-analyzer-state-merge): New warning.
16665 (-fno-analyzer-state-purge): New warning.
16666 (-fanalyzer-transitivity): New warning.
16667 (-fanalyzer-verbose-edges): New warning.
16668 (-fanalyzer-verbose-state-changes): New warning.
16669 (-fanalyzer-verbosity=): New warning.
16670 (-fdump-analyzer): New warning.
16671 (-fdump-analyzer-callgraph): New warning.
16672 (-fdump-analyzer-exploded-graph): New warning.
16673 (-fdump-analyzer-exploded-nodes): New warning.
16674 (-fdump-analyzer-exploded-nodes-2): New warning.
16675 (-fdump-analyzer-exploded-nodes-3): New warning.
16676 (-fdump-analyzer-supergraph): New warning.
16677 * doc/sourcebuild.texi (dg-require-dot): New.
16678 (dg-check-dot): New.
16679 * gdbinit.in (break-on-saved-diagnostic): New command.
16680 * graphviz.cc: New file.
16681 * graphviz.h: New file.
16682 * ordered-hash-map-tests.cc: New file.
16683 * ordered-hash-map.h: New file.
16684 * passes.def (pass_analyzer): Add before
16685 pass_ipa_whole_program_visibility.
16686 * selftest-run-tests.c (selftest::run_tests): Call
16687 selftest::ordered_hash_map_tests_cc_tests.
16688 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
16690 * shortest-paths.h: New file.
16691 * timevar.def (TV_ANALYZER): New timevar.
16692 (TV_ANALYZER_SUPERGRAPH): Likewise.
16693 (TV_ANALYZER_STATE_PURGE): Likewise.
16694 (TV_ANALYZER_PLAN): Likewise.
16695 (TV_ANALYZER_SCC): Likewise.
16696 (TV_ANALYZER_WORKLIST): Likewise.
16697 (TV_ANALYZER_DUMP): Likewise.
16698 (TV_ANALYZER_DIAGNOSTICS): Likewise.
16699 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
16700 * tree-pass.h (make_pass_analyzer): New decl.
16701 * tristate.cc: New file.
16702 * tristate.h: New file.
16704 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
16707 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
16708 alternatives 9 and 10.
16710 2020-01-14 David Malcolm <dmalcolm@redhat.com>
16712 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
16713 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
16714 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
16715 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
16716 (selftest::hash_map_tests_c_tests): Call it.
16717 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
16718 New static constant, using the value of = H::empty_zero_p.
16719 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
16720 from default_hash_traits <Value>.
16721 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
16723 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
16724 * hash-table.h (hash_table::alloc_entries): Guard the loop of
16725 calls to mark_empty with !Descriptor::empty_zero_p.
16726 (hash_table::empty_slow): Conditionalize the memset call with a
16727 check that Descriptor::empty_zero_p; otherwise, loop through the
16728 entries calling mark_empty on them.
16729 * hash-traits.h (int_hash::empty_zero_p): New static constant.
16730 (pointer_hash::empty_zero_p): Likewise.
16731 (pair_hash::empty_zero_p): Likewise.
16732 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
16734 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
16735 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
16736 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
16737 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
16738 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
16739 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
16740 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
16741 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
16742 * tree-vectorizer.h
16743 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
16746 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
16748 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
16749 fix typo on return value.
16751 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
16754 * cgraph.c (symbol_table::create_edge): Init speculative_id and
16756 (cgraph_edge::make_speculative): Add param for setting speculative_id
16758 (cgraph_edge::speculative_call_info): Update comments and find reference
16759 by speculative_id for multiple indirect targets.
16760 (cgraph_edge::resolve_speculation): Decrease the speculations
16761 for indirect edge, drop it's speculative if not direct target
16762 left. Update comments.
16763 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
16764 (cgraph_node::dump): Print num_speculative_call_targets.
16765 (cgraph_node::verify_node): Don't report error if speculative
16766 edge not include statement.
16767 (cgraph_edge::num_speculative_call_targets_p): New function.
16768 * cgraph.h (int common_target_id): Remove.
16769 (int common_target_probability): Remove.
16770 (num_speculative_call_targets): New variable.
16771 (make_speculative): Add param for setting speculative_id.
16772 (cgraph_edge::num_speculative_call_targets_p): New declare.
16773 (target_prob): New variable.
16774 (speculative_id): New variable.
16775 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
16776 call summaries for multiple speculative call targets.
16777 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
16778 * ipa-profile.c (struct speculative_call_target): New struct.
16779 (class speculative_call_summary): New class.
16780 (class speculative_call_summaries): New class.
16781 (call_sums): New variable.
16782 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
16783 (ipa_profile_write_edge_summary): New function.
16784 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
16785 (ipa_profile_dump_all_summaries): New function.
16786 (ipa_profile_read_edge_summary): New function.
16787 (ipa_profile_read_summary_section): New function.
16788 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
16789 (ipa_profile): Generate num_speculative_call_targets from
16791 * ipa-ref.h (speculative_id): New variable.
16792 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
16793 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
16794 common_target_probability. Stream out speculative_id and
16795 num_speculative_call_targets.
16796 (input_edge): Likewise.
16797 * predict.c (dump_prediction): Remove edges count assert to be
16799 * symtab.c (symtab_node::create_reference): Init speculative_id.
16800 (symtab_node::clone_references): Clone speculative_id.
16801 (symtab_node::clone_referring): Clone speculative_id.
16802 (symtab_node::clone_reference): Clone speculative_id.
16803 (symtab_node::clear_stmts_in_references): Clear speculative_id.
16804 * tree-inline.c (copy_bb): Duplicate all the speculative edges
16805 if indirect call contains multiple speculative targets.
16806 * value-prof.h (check_ic_target): Remove.
16807 * value-prof.c (gimple_value_profile_transformations):
16808 Use void function gimple_ic_transform.
16809 * value-prof.c (gimple_ic_transform): Handle topn case.
16810 Fix comment typos. Change it to a void function.
16812 2020-01-13 Andrew Pinski <apinski@marvell.com>
16814 * config/aarch64/aarch64-cores.def (octeontx2): New define.
16815 (octeontx2t98): New define.
16816 (octeontx2t96): New define.
16817 (octeontx2t93): New define.
16818 (octeontx2f95): New define.
16819 (octeontx2f95n): New define.
16820 (octeontx2f95mm): New define.
16821 * config/aarch64/aarch64-tune.md: Regenerate.
16822 * doc/invoke.texi (-mcpu=): Document the new cpu types.
16824 2020-01-13 Jason Merrill <jason@redhat.com>
16826 PR c++/33799 - destroy return value if local cleanup throws.
16827 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
16829 2020-01-13 Martin Liska <mliska@suse.cz>
16831 * ipa-cp.c (get_max_overall_size): Use newly
16832 renamed param param_ipa_cp_unit_growth.
16833 * params.opt: Remove legacy param name.
16835 2020-01-13 Martin Sebor <msebor@redhat.com>
16837 PR tree-optimization/93213
16838 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
16839 stores to be eliminated.
16841 2020-01-13 Martin Liska <mliska@suse.cz>
16843 * opts.c (print_help): Do not print CL_PARAM
16844 and CL_WARNING for CL_OPTIMIZATION.
16846 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
16849 * doc/invoke.texi (Warning Options): Add caveat about some warnings
16850 depending on optimization settings.
16852 2020-01-13 Jakub Jelinek <jakub@redhat.com>
16854 PR tree-optimization/90838
16855 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
16856 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
16857 argument rather than to initialize temporary for targets that
16858 don't use the mode argument at all. Initialize ctzval to avoid
16861 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
16863 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
16864 * tree-core.h: Document it.
16865 * gimplify.c (gimplify_omp_workshare): Set it.
16866 * omp-low.c (lower_omp_target): Use it.
16867 * tree-pretty-print.c (dump_omp_clause): Print it.
16869 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
16870 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
16872 2020-01-10 David Malcolm <dmalcolm@redhat.com>
16874 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
16875 * common.opt (fdiagnostics-path-format=): New option.
16876 (diagnostic_path_format): New enum.
16877 (fdiagnostics-show-path-depths): New option.
16878 * coretypes.h (diagnostic_event_id_t): New forward decl.
16879 * diagnostic-color.c (color_dict): Add "path".
16880 * diagnostic-event-id.h: New file.
16881 * diagnostic-format-json.cc (json_from_expanded_location): Make
16883 (json_end_diagnostic): Call context->make_json_for_path if it
16884 exists and the diagnostic has a path.
16885 (diagnostic_output_format_init): Clear context->print_path.
16886 * diagnostic-path.h: New file.
16887 * diagnostic-show-locus.c (colorizer::set_range): Special-case
16888 when printing a run of events in a diagnostic_path so that they
16889 all get the same color.
16890 (layout::m_diagnostic_path_p): New field.
16891 (layout::layout): Initialize it.
16892 (layout::print_any_labels): Don't colorize the label text for an
16893 event in a diagnostic_path.
16894 (gcc_rich_location::add_location_if_nearby): Add
16895 "restrict_to_current_line_spans" and "label" params. Pass the
16896 former to layout.maybe_add_location_range; pass the latter
16897 when calling add_range.
16898 * diagnostic.c: Include "diagnostic-path.h".
16899 (diagnostic_initialize): Initialize context->path_format and
16900 context->show_path_depths.
16901 (diagnostic_show_any_path): New function.
16902 (diagnostic_path::interprocedural_p): New function.
16903 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
16904 (simple_diagnostic_path::num_events): New function.
16905 (simple_diagnostic_path::get_event): New function.
16906 (simple_diagnostic_path::add_event): New function.
16907 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
16908 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
16909 (debug): New overload taking a diagnostic_path *.
16910 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
16911 * diagnostic.h (enum diagnostic_path_format): New enum.
16912 (json::value): New forward decl.
16913 (diagnostic_context::path_format): New field.
16914 (diagnostic_context::show_path_depths): New field.
16915 (diagnostic_context::print_path): New callback field.
16916 (diagnostic_context::make_json_for_path): New callback field.
16917 (diagnostic_show_any_path): New decl.
16918 (json_from_expanded_location): New decl.
16919 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
16920 (-fdiagnostics-show-path-depths): New option.
16921 (-fdiagnostics-color): Add "path" to description of default
16922 GCC_COLORS; describe it.
16923 (-fdiagnostics-format=json): Document how diagnostic paths are
16924 represented in the JSON output format.
16925 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
16926 Add optional params "restrict_to_current_line_spans" and "label".
16927 * opts.c (common_handle_option): Handle
16928 OPT_fdiagnostics_path_format_ and
16929 OPT_fdiagnostics_show_path_depths.
16930 * pretty-print.c: Include "diagnostic-event-id.h".
16931 (pp_format): Implement "%@" format code for printing
16932 diagnostic_event_id_t *.
16933 (selftest::test_pp_format): Add tests for "%@".
16934 * selftest-run-tests.c (selftest::run_tests): Call
16935 selftest::tree_diagnostic_path_cc_tests.
16936 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
16937 * toplev.c (general_init): Initialize global_dc->path_format and
16938 global_dc->show_path_depths.
16939 * tree-diagnostic-path.cc: New file.
16940 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
16941 non-static. Drop "diagnostic" param in favor of storing the
16942 original value of "where" and re-using it.
16943 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
16944 maybe_unwind_expanded_macro_loc.
16945 (tree_diagnostics_defaults): Initialize context->print_path and
16946 context->make_json_for_path.
16947 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
16949 (default_tree_make_json_for_path): New decl.
16950 (maybe_unwind_expanded_macro_loc): New decl.
16952 2020-01-10 Jakub Jelinek <jakub@redhat.com>
16954 PR tree-optimization/93210
16955 * fold-const.h (native_encode_initializer,
16956 can_native_interpret_type_p): Declare.
16957 * fold-const.c (native_encode_string): Fix up handling with off != -1,
16959 (native_encode_initializer): New function, moved from dwarf2out.c.
16960 Adjust to native_encode_expr compatible arguments, including dry-run
16961 and partial extraction modes. Don't handle STRING_CST.
16962 (can_native_interpret_type_p): No longer static.
16963 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
16964 offset / BITS_PER_UNIT fits into int and don't call it if
16965 can_native_interpret_type_p fails. If suboff is NULL and for
16966 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
16967 native_encode_initializer.
16968 (fold_const_aggregate_ref_1): Formatting fix.
16969 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
16970 (tree_add_const_value_attribute): Adjust caller.
16972 PR tree-optimization/90838
16973 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
16974 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
16975 CTZ_DEFINED_VALUE_AT_ZERO.
16977 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
16979 PR inline-asm/93027
16980 * lra-constraints.c (match_reload): Permit input operands have the
16981 same mode as output while other input operands have a different
16984 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
16986 PR tree-optimization/90838
16987 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
16988 (check_ctz_string): Likewise.
16989 (optimize_count_trailing_zeroes): Likewise.
16990 (simplify_count_trailing_zeroes): Likewise.
16991 (pass_forwprop::execute): Try ctz simplification.
16992 * match.pd: Add matching for ctz idioms.
16994 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16996 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
16998 (aarch64_invalid_unary_op): New function for target hook.
16999 (aarch64_invalid_binary_op): New function for target hook.
17001 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17003 * config.gcc: Add arm_bf16.h.
17004 * config/aarch64/aarch64-builtins.c
17005 (aarch64_simd_builtin_std_type): Add BFmode.
17006 (aarch64_init_simd_builtin_types): Define element types for vector
17008 (aarch64_init_bf16_types): New function.
17009 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
17010 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
17012 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
17013 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
17015 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
17016 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
17017 * config/aarch64/aarch64.c
17018 (aarch64_classify_vector_mode): Add support for BF types.
17019 (aarch64_gimplify_va_arg_expr): Add support for BF types.
17020 (aarch64_vq_mode): Add support for BF types.
17021 (aarch64_simd_container_mode): Add support for BF types.
17022 (aarch64_mangle_type): Add support for BF scalar type.
17023 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
17024 * config/aarch64/arm_bf16.h: New file.
17025 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
17026 * config/aarch64/iterators.md: Add BF types to mode attributes.
17027 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
17029 2020-01-10 Jason Merrill <jason@redhat.com>
17031 PR c++/93173 - incorrect tree sharing.
17032 * gimplify.c (copy_if_shared): No longer static.
17033 * gimplify.h: Declare it.
17035 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17037 * doc/invoke.texi (-msve-vector-bits=): Document that
17038 -msve-vector-bits=128 now generates VL-specific code for
17039 little-endian targets.
17040 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
17041 build_vector_type_for_mode to construct the data vector types.
17042 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
17043 VL-specific code for -msve-vector-bits=128 on little-endian targets.
17044 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
17045 for 128-bit vectors.
17047 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17049 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
17052 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17054 * config/aarch64/aarch64-builtins.c
17055 (aarch64_builtin_vectorized_function): Check for specific vector modes,
17056 rather than checking the number of elements and the element mode.
17058 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17060 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
17061 get_related_vectype_for_scalar_type rather than build_vector_type
17062 to create the index type for a conditional reduction.
17064 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
17066 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
17067 for any type of gather or scatter, including strided accesses.
17069 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17071 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
17074 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
17076 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
17077 get_dr_vinfo_offset
17078 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
17079 parameter and its use to reset DR_OFFSET's.
17080 (vect_transform_loop): Remove orig_drs_init argument.
17081 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
17082 member of dr_vec_info rather than the offset of the associated
17083 data_reference's innermost_loop_behavior.
17084 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
17085 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
17086 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
17087 get_dr_vinfo_offset.
17088 (vectorizable_store): Likewise.
17089 (vectorizable_load): Likewise.
17091 2020-01-10 Richard Biener <rguenther@suse.de>
17093 * gimple-ssa-store-merging
17094 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
17096 2020-01-10 Martin Liska <mliska@suse.cz>
17099 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
17100 encapsulation that was there before r280040.
17102 2020-01-10 Richard Biener <rguenther@suse.de>
17104 PR middle-end/93199
17105 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
17106 sequences to avoid walking them again for secondary opportunities.
17107 (pass_lower_eh_dispatch::execute): Instead actually insert
17110 2020-01-10 Richard Biener <rguenther@suse.de>
17112 PR middle-end/93199
17113 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
17114 (cleanup_all_empty_eh): Walk landing pads in reverse order to
17115 avoid quadraticness.
17117 2020-01-10 Martin Jambor <mjambor@suse.cz>
17119 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
17120 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
17121 to get param_ipa_sra_max_replacements.
17122 (param_splitting_across_edge): Pass the caller to
17123 pull_accesses_from_callee.
17125 2020-01-10 Martin Jambor <mjambor@suse.cz>
17127 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
17128 * ipa-cp.c (max_new_size): Removed.
17129 (orig_overall_size): New variable.
17130 (get_max_overall_size): New function.
17131 (estimate_local_effects): Use it. Adjust dump.
17132 (decide_about_value): Likewise.
17133 (ipcp_propagate_stage): Do not calculate max_new_size, just store
17134 orig_overall_size. Adjust dump.
17135 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
17137 2020-01-10 Martin Jambor <mjambor@suse.cz>
17139 * params.opt (param_ipa_max_agg_items): Mark as Optimization
17140 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
17141 instead of param_ipa_max_agg_items.
17142 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
17143 optimization info for the callee.
17145 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
17147 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
17148 markers if debug_inline_points is false.
17150 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17152 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
17154 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
17155 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
17156 aarch64-sve-builtins-sve2.h.
17157 (aarch64-sve-builtins-sve2.o): New rule.
17158 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
17159 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
17160 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
17161 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
17162 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
17163 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
17165 * config/aarch64/aarch64-sve.md: Update comments with SVE2
17166 instructions that are handled here.
17167 (@cond_asrd<mode>): Generalize to...
17168 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
17169 (*cond_asrd<mode>_2): Generalize to...
17170 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
17171 (*cond_asrd<mode>_z): Generalize to...
17172 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
17173 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
17174 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
17175 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
17176 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
17178 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17179 (@aarch64_scatter_stnt<mode>): Likewise.
17180 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
17181 (@aarch64_mul_lane_<mode>): Likewise.
17182 (@aarch64_sve_suqadd<mode>_const): Likewise.
17183 (*<sur>h<addsub><mode>): Generalize to...
17184 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
17186 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
17187 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
17188 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
17189 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
17190 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
17191 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
17192 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
17193 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
17194 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
17195 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
17196 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
17197 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
17198 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
17199 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
17200 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
17201 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
17202 (@aarch64_sve2_xar<mode>): Likewise.
17203 (@aarch64_sve2_bcax<mode>): Likewise.
17204 (*aarch64_sve2_eor3<mode>): Rename to...
17205 (@aarch64_sve2_eor3<mode>): ...this.
17206 (@aarch64_sve2_bsl<mode>): New expander.
17207 (@aarch64_sve2_nbsl<mode>): Likewise.
17208 (@aarch64_sve2_bsl1n<mode>): Likewise.
17209 (@aarch64_sve2_bsl2n<mode>): Likewise.
17210 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
17211 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
17212 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
17213 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
17214 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
17215 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
17216 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
17217 (<su>mull<bt><Vwide>): Generalize to...
17218 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
17220 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
17221 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
17222 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
17223 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17224 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
17225 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17226 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
17227 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17228 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
17229 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
17230 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
17231 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
17232 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
17233 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
17234 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
17235 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
17236 (<SHRNB:r>shrnb<mode>): Generalize to...
17237 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
17239 (<SHRNT:r>shrnt<mode>): Generalize to...
17240 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
17242 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
17243 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
17244 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
17245 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
17246 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
17247 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
17248 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
17249 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
17250 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
17251 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
17252 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
17253 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
17254 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
17255 (@aarch64_sve2_cvtnt<mode>): Likewise.
17256 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
17257 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
17258 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
17259 (@aarch64_sve2_cvtxnt<mode>): Likewise.
17260 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
17261 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
17262 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
17263 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
17264 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
17265 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
17266 (@aarch64_sve2_pmul<mode>): Likewise.
17267 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
17268 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
17269 (@aarch64_sve2_tbl2<mode>): Likewise.
17270 (@aarch64_sve2_tbx<mode>): Likewise.
17271 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
17272 (@aarch64_sve2_histcnt<mode>): Likewise.
17273 (@aarch64_sve2_histseg<mode>): Likewise.
17274 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
17275 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
17276 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
17277 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
17278 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
17279 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
17280 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
17281 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
17282 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
17283 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
17284 (SVE2_PMULL_PAIR_I): New mode iterators.
17285 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
17286 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
17287 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
17288 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
17289 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
17290 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
17291 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
17292 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
17293 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
17294 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
17295 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
17296 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
17297 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
17298 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
17299 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
17300 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
17301 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
17302 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
17303 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
17304 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
17305 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
17306 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
17307 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
17308 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
17309 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
17310 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
17311 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
17312 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
17313 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
17314 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
17315 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
17317 (VNARROW, Ventype): New mode attributes.
17318 (Vewtype): Handle VNx2DI. Fix typo in comment.
17319 (VDOUBLE): New mode attribute.
17320 (sve_lane_con): Handle VNx8HI.
17321 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
17322 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
17323 (sve_int_op, sve_int_op_rev): Handle the above codes.
17324 (sve_pred_int_rhs2_operand): Likewise.
17325 (MULLBT, SHRNB, SHRNT): Delete.
17326 (SVE_INT_SHIFT_IMM): New int iterator.
17327 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
17328 and UNSPEC_WHILEHS for TARGET_SVE2.
17329 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
17330 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
17331 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
17332 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
17333 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
17334 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
17335 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
17336 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
17337 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
17338 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
17339 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
17340 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
17341 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
17342 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
17343 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
17344 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
17345 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
17346 (optab): Handle the new unspecs.
17347 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
17349 (lr): Handle the new unspecs.
17351 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
17352 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
17353 (sve_int_qsub_op): New int attributes.
17354 (sve_fp_op, rot): Handle the new unspecs.
17355 * config/aarch64/aarch64-sve-builtins.h
17356 (function_resolver::require_matching_pointer_type): Declare.
17357 (function_resolver::resolve_unary): Add an optional boolean argument.
17358 (function_resolver::finish_opt_n_resolution): Add an optional
17359 type_suffix_index argument.
17360 (gimple_folder::redirect_call): Declare.
17361 (gimple_expander::prepare_gather_address_operands): Add an optional
17363 * config/aarch64/aarch64-sve-builtins.cc: Include
17364 aarch64-sve-builtins-sve2.h.
17365 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
17366 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
17367 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
17368 (TYPES_hsd_integer): Use TYPES_hsd_signed.
17369 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
17370 (TYPES_s_unsigned): Likewise.
17371 (TYPES_s_integer): Use TYPES_s_unsigned.
17372 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
17373 (TYPES_sd_integer): Use them.
17374 (TYPES_d_unsigned): New macro.
17375 (TYPES_d_integer): Use it.
17376 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
17377 (TYPES_cvt_narrow): Likewise.
17378 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
17379 (preds_mx): New variable.
17380 (function_builder::add_overloaded_function): Allow the new feature
17381 set to be more restrictive than the original one.
17382 (function_resolver::infer_pointer_type): Remove qualifiers from
17383 the pointer type before printing it.
17384 (function_resolver::require_matching_pointer_type): New function.
17385 (function_resolver::resolve_sv_displacement): Handle functions
17386 that don't support 32-bit vector indices or svint32_t vector offsets.
17387 (function_resolver::finish_opt_n_resolution): Take the inferred type
17388 as a separate argument.
17389 (function_resolver::resolve_unary): Optionally treat all forms in
17390 the same way as normal merging functions.
17391 (gimple_folder::redirect_call): New function.
17392 (function_expander::prepare_gather_address_operands): Add an argument
17393 that says whether scaled forms are available. If they aren't,
17394 handle scaling of vector indices and don't add the extension and
17396 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
17397 fall back to using cond_* instead.
17398 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
17399 Split out the member variables into...
17400 (rtx_code_function_base): ...this new base class.
17401 (rtx_code_function_rotated): Inherit rtx_code_function_base.
17402 (unspec_based_function): Split out the member variables into...
17403 (unspec_based_function_base): ...this new base class.
17404 (unspec_based_function_rotated): Inherit unspec_based_function_base.
17405 (unspec_based_function_exact_insn): New class.
17406 (unspec_based_add_function, unspec_based_add_lane_function)
17407 (unspec_based_lane_function, unspec_based_pred_function)
17408 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
17409 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
17410 (unspec_based_sub_function, unspec_based_sub_lane_function): New
17412 (unspec_based_fused_function): New class.
17413 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
17414 (unspec_based_fused_lane_function): New class.
17415 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
17417 (CODE_FOR_MODE1): New macro.
17418 (fixed_insn_function): New class.
17419 (while_comparison): Likewise.
17420 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
17421 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
17422 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
17423 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
17424 (load_gather_sv_restricted, shift_left_imm_long): Declare.
17425 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
17426 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
17427 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
17428 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
17429 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
17430 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
17431 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
17432 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
17433 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
17434 Also add an initial argument for unary_convert_narrowt, regardless
17435 of the predication type.
17436 (build_32_64): Allow loads and stores to specify MODE_none.
17437 (build_sv_index64, build_sv_uint_offset): New functions.
17438 (long_type_suffix): New function.
17439 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
17440 (binary_imm_long_base, load_gather_sv_base): Likewise.
17441 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
17442 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
17443 (unary_narrowb_base, unary_narrowt_base): Likewise.
17444 (binary_long_lane_def, binary_long_lane): New shape.
17445 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
17446 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
17447 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
17448 (binary_to_uint_def, binary_to_uint): Likewise.
17449 (binary_wide_def, binary_wide): Likewise.
17450 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
17451 (compare_def, compare): Likewise.
17452 (compare_ptr_def, compare_ptr): Likewise.
17453 (load_ext_gather_index_restricted_def,
17454 load_ext_gather_index_restricted): Likewise.
17455 (load_ext_gather_offset_restricted_def,
17456 load_ext_gather_offset_restricted): Likewise.
17457 (load_gather_sv_def): Inherit from load_gather_sv_base.
17458 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
17459 (shift_left_imm_def, shift_left_imm): Likewise.
17460 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
17461 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
17462 (store_scatter_index_restricted_def,
17463 store_scatter_index_restricted): Likewise.
17464 (store_scatter_offset_restricted_def,
17465 store_scatter_offset_restricted): Likewise.
17466 (tbl_tuple_def, tbl_tuple): Likewise.
17467 (ternary_long_lane_def, ternary_long_lane): Likewise.
17468 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
17469 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
17470 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
17471 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
17472 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
17473 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
17474 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
17475 (ternary_uint_def, ternary_uint): Likewise.
17476 (unary_convert): Fix typo in comment.
17477 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
17478 (unary_long_def, unary_long): Likewise.
17479 (unary_narrowb_def, unary_narrowb): Likewise.
17480 (unary_narrowt_def, unary_narrowt): Likewise.
17481 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
17482 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
17483 (unary_to_int_def, unary_to_int): Likewise.
17484 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
17485 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
17486 (svasrd_impl): Delete.
17487 (svcadd_impl::expand): Handle integer operations too.
17488 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
17489 new functions to derive the unspec numbers.
17490 (svmla_svmls_lane_impl): Replace with...
17491 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
17492 integer operations too.
17493 (svwhile_impl): Rename to...
17494 (svwhilelx_impl): ...this and inherit from while_comparison.
17495 (svasrd): Use unspec_based_function.
17496 (svmla_lane): Use svmla_lane_impl.
17497 (svmls_lane): Use svmls_lane_impl.
17498 (svrecpe, svrsqrte): Handle unsigned integer operations too.
17499 (svwhilele, svwhilelt): Use svwhilelx_impl.
17500 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
17501 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
17502 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
17503 * config/aarch64/aarch64-sve-builtins.def: Include
17504 aarch64-sve-builtins-sve2.def.
17506 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17508 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
17509 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
17510 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
17511 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
17512 immediates as well as vector ones.
17513 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
17514 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
17515 (aarch64_sve_qsub_immediate): Update calls accordingly.
17517 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17519 * config/aarch64/aarch64-sve2.md: Add banner comments.
17520 (<su>mulh<r>s<mode>3): Move further up file.
17521 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
17522 (*aarch64_sve2_sra<mode>): Move further down file.
17523 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
17525 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17527 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
17528 and UNSPEC_WHILEWR.
17529 (while_optab_cmp): Handle them.
17530 * config/aarch64/aarch64-sve.md
17531 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
17532 and add a "@" marker.
17533 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
17534 instead of gen_aarch64_sve2_while_ptest.
17535 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
17537 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17539 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
17540 (UNSPEC_WHILELE): ...this.
17541 (UNSPEC_WHILE_LO): Rename to...
17542 (UNSPEC_WHILELO): ...this.
17543 (UNSPEC_WHILE_LS): Rename to...
17544 (UNSPEC_WHILELS): ...this.
17545 (UNSPEC_WHILE_LT): Rename to...
17546 (UNSPEC_WHILELT): ...this.
17547 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
17548 (cmp_op, while_optab_cmp): Likewise.
17549 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
17550 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
17551 (svwhilelt): Likewise.
17553 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17555 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
17556 (unary_to_uint): Define.
17557 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
17558 (unary_count): Rename to...
17559 (unary_to_uint_def, unary_to_uint): ...this.
17560 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
17562 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17564 * config/aarch64/aarch64-sve-builtins-functions.h
17565 (code_for_mode_function): New class.
17566 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
17567 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
17568 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
17569 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
17570 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
17572 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17574 * config/aarch64/iterators.md (addsub): New code attribute.
17575 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
17577 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
17578 in the asm string and attributes. Fix indentation.
17579 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
17581 (@aarch64_sve_<optab><mode>): ...this.
17582 * config/aarch64/aarch64-sve-builtins.h
17583 (function_expander::expand_signed_unpred_op): Delete.
17584 * config/aarch64/aarch64-sve-builtins.cc
17585 (function_expander::expand_signed_unpred_op): Likewise.
17586 (function_expander::map_to_rtx_codes): If the optab isn't defined,
17587 try using code_for_aarch64_sve instead.
17588 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
17589 (svqsub_impl): Likewise.
17590 (svqadd, svqsub): Use rtx_code_function instead.
17592 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17594 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
17595 (HADDSUB, sur, addsub): Remove them.
17597 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17599 * tree-nrv.c (pass_return_slot::execute): Handle all internal
17600 functions the same way, rather than singling out those that
17601 aren't mapped directly to optabs.
17603 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
17605 * target.def (compatible_vector_types_p): New target hook.
17606 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
17607 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
17608 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
17609 * doc/tm.texi: Regenerate.
17610 * gimple-expr.c: Include target.h.
17611 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
17612 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
17614 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
17615 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
17616 Use the original predicate if it already has a suitable type.
17618 2020-01-09 Martin Jambor <mjambor@suse.cz>
17620 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
17621 resolve_speculation and redirect_call_stmt_to_callee static. Change
17622 return type of set_call_stmt to cgraph_edge *.
17623 * auto-profile.c (afdo_indirect_call): Adjust call to
17624 redirect_call_stmt_to_callee.
17625 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
17626 make the this pointer explicit, adjust self-recursive calls and the
17627 call top make_direct. Return the resulting edge.
17628 (cgraph_edge::remove): Make this pointer explicit.
17629 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
17630 (cgraph_edge::make_direct): Likewise, adjust call to
17631 resolve_speculation.
17632 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
17633 call to set_call_stmt.
17634 (cgraph_update_edges_for_call_stmt_node): Update call to
17635 set_call_stmt and remove.
17636 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17637 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
17638 (cgraph_node::create_edge_including_clones): Moved "first" definition
17639 of edge to the block where it was used. Adjusted calls to
17641 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
17642 cgraph_edge::remove.
17643 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
17644 make_direct and redirect_call_stmt_to_callee.
17645 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
17646 resolve_speculation and make_direct.
17647 * ipa-inline-transform.c (inline_transform): Adjust call to
17648 redirect_call_stmt_to_callee.
17649 (check_speculations_1):: Adjust call to resolve_speculation.
17650 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
17651 resolve-speculation.
17652 (inline_small_functions): Adjust call to resolve_speculation.
17653 (ipa_inline): Likewise.
17654 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
17656 * ipa-visibility.c (function_and_variable_visibility): Make iteration
17657 safe with regards to edge removal, adjust calls to
17658 redirect_call_stmt_to_callee.
17659 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
17660 and redirect_call_stmt_to_callee.
17661 * multiple_target.c (create_dispatcher_calls): Adjust call to
17662 redirect_call_stmt_to_callee
17663 (redirect_to_specific_clone): Likewise.
17664 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
17665 Adjust calls to cgraph_edge::remove.
17666 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
17667 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
17668 (expand_call_inline): Adjust call to cgraph_edge::remove.
17670 2020-01-09 Martin Liska <mliska@suse.cz>
17672 * params.opt: Set Optimization for
17673 param_max_speculative_devirt_maydefs.
17675 2020-01-09 Martin Sebor <msebor@redhat.com>
17677 PR middle-end/93200
17679 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
17681 2020-01-09 Martin Liska <mliska@suse.cz>
17683 * auto-profile.c (auto_profile): Use opt_for_fn
17685 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
17686 (propagate_vals_across_arith_jfunc): Likewise.
17687 (hint_time_bonus): Likewise.
17688 (incorporate_penalties): Likewise.
17689 (good_cloning_opportunity_p): Likewise.
17690 (perform_estimation_of_a_value): Likewise.
17691 (estimate_local_effects): Likewise.
17692 (ipcp_propagate_stage): Likewise.
17693 * ipa-fnsummary.c (decompose_param_expr): Likewise.
17694 (set_switch_stmt_execution_predicate): Likewise.
17695 (analyze_function_body): Likewise.
17696 * ipa-inline-analysis.c (offline_size): Likewise.
17697 * ipa-inline.c (early_inliner): Likewise.
17698 * ipa-prop.c (ipa_analyze_node): Likewise.
17699 (ipcp_transform_function): Likewise.
17700 * ipa-sra.c (process_scan_results): Likewise.
17701 (ipa_sra_summarize_function): Likewise.
17702 * params.opt: Rename ipcp-unit-growth to
17703 ipa-cp-unit-growth. Add Optimization for various
17704 IPA-related parameters.
17706 2020-01-09 Richard Biener <rguenther@suse.de>
17708 PR middle-end/93054
17709 * gimplify.c (gimplify_expr): Deal with NOP definitions.
17711 2020-01-09 Richard Biener <rguenther@suse.de>
17713 PR tree-optimization/93040
17714 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
17716 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
17718 * common/config/avr/avr-common.c (avr_option_optimization_table)
17719 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
17721 2020-01-09 Martin Liska <mliska@suse.cz>
17723 * cgraphclones.c (symbol_table::materialize_all_clones):
17724 Use cgraph_node::dump_name.
17726 2020-01-09 Jakub Jelinek <jakub@redhat.com>
17728 PR inline-asm/93202
17729 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
17730 output_operand_lossage instead of gcc_unreachable.
17731 * doc/md.texi (riscv f constraint): Fix typo.
17734 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
17735 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
17736 CONST_SCALAR_INT_P instead of CONST_INT_P.
17737 (*subv<mode>4_1): Rename to ...
17738 (subv<mode>4_1): ... this.
17739 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
17740 define_insn_and_split patterns.
17741 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
17744 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17746 * vec.c (class selftest::count_dtor): New class.
17747 (selftest::test_auto_delete_vec): New test.
17748 (selftest::vec_c_tests): Call it.
17749 * vec.h (class auto_delete_vec): New class template.
17750 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
17752 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17754 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
17756 2020-01-08 Jim Wilson <jimw@sifive.com>
17758 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
17759 use of TLS_MODEL_LOCAL_EXEC when not pic.
17761 2020-01-08 David Malcolm <dmalcolm@redhat.com>
17763 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
17766 2020-01-08 Jakub Jelinek <jakub@redhat.com>
17769 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
17770 *stack_protect_set_3 peephole2): Also check that the second
17771 insns source is general_operand.
17774 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
17775 predicate for output operand instead of register_operand.
17776 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
17777 memory destination and non-memory operands[2].
17779 2020-01-08 Martin Liska <mliska@suse.cz>
17781 * cgraph.c (cgraph_node::dump): Use ::dump_name or
17782 ::dump_asm_name instead of (::name or ::asm_name).
17783 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
17784 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
17785 (analyze_functions): Likewise.
17786 (expand_all_functions): Likewise.
17787 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
17788 (propagate_bits_across_jump_function): Likewise.
17789 (dump_profile_updates): Likewise.
17790 (ipcp_store_bits_results): Likewise.
17791 (ipcp_store_vr_results): Likewise.
17792 * ipa-devirt.c (dump_targets): Likewise.
17793 * ipa-fnsummary.c (analyze_function_body): Likewise.
17794 * ipa-hsa.c (check_warn_node_versionable): Likewise.
17795 (process_hsa_functions): Likewise.
17796 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
17797 (set_alias_uids): Likewise.
17798 * ipa-inline-transform.c (save_inline_function_body): Likewise.
17799 * ipa-inline.c (recursive_inlining): Likewise.
17800 (inline_to_all_callers_1): Likewise.
17801 (ipa_inline): Likewise.
17802 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
17803 (ipa_propagate_frequency): Likewise.
17804 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
17805 (remove_described_reference): Likewise.
17806 * ipa-pure-const.c (worse_state): Likewise.
17807 (check_retval_uses): Likewise.
17808 (analyze_function): Likewise.
17809 (propagate_pure_const): Likewise.
17810 (propagate_nothrow): Likewise.
17811 (dump_malloc_lattice): Likewise.
17812 (propagate_malloc): Likewise.
17813 (pass_local_pure_const::execute): Likewise.
17814 * ipa-visibility.c (optimize_weakref): Likewise.
17815 (function_and_variable_visibility): Likewise.
17816 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
17817 (ipa_discover_variable_flags): Likewise.
17818 * lto-streamer-out.c (output_function): Likewise.
17819 (output_constructor): Likewise.
17820 * tree-inline.c (copy_bb): Likewise.
17821 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
17822 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
17824 2020-01-08 Richard Biener <rguenther@suse.de>
17826 PR middle-end/93199
17827 * tree-eh.c (sink_clobbers): Update virtual operands for
17828 the first and last stmt only. Add a dry-run capability.
17829 (pass_lower_eh_dispatch::execute): Perform clobber sinking
17830 after CFG manipulations and in RPO order to catch all
17831 secondary opportunities reliably.
17833 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17836 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17838 2019-01-08 Richard Biener <rguenther@suse.de>
17840 PR middle-end/93199
17841 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
17842 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
17843 virtual operand, also updating SSA use.
17844 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
17845 Update stmt after resetting virtual operand.
17846 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
17847 * gimple-iterator.c (gsi_remove): When not removing the stmt
17848 permanently do not delink immediate uses or mark the stmt modified.
17850 2020-01-08 Martin Liska <mliska@suse.cz>
17852 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
17853 (ipa_call_context::estimate_size_and_time): Likewise.
17854 (inline_analyze_function): Likewise.
17856 2020-01-08 Martin Liska <mliska@suse.cz>
17858 * cgraph.c (cgraph_node::dump): Use systematically
17861 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17863 Add -nodevicespecs option for avr.
17866 * config/avr/avr.opt (-nodevicespecs): New driver option.
17867 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
17868 "-specs=device-specs/..." if that option is not set.
17869 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
17871 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
17873 Implement 64-bit double functions for avr.
17876 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
17877 --with-double-comparison.
17878 * doc/install.texi: Document them.
17879 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
17880 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
17881 <WITH_DOUBLE_COMPARISON>: New built-in defines.
17882 * doc/invoke.texi (AVR Built-in Macros): Document them.
17883 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
17884 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
17885 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
17887 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
17890 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
17891 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
17892 when only building rm-profile multilibs.
17894 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
17897 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
17898 lattice for a value to check.
17899 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
17900 finite propagation in self-recursive scc.
17902 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
17904 * ipa-inline.c (caller_growth_limits): Restore the AND.
17906 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
17908 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
17909 (VEC_ALLREG_ALT): New iterator.
17910 (VEC_ALLREG_INT_MODE): New iterator.
17911 (VCMP_MODE): New iterator.
17912 (VCMP_MODE_INT): New iterator.
17913 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
17914 (vec_cmp<u>v64qidi): New define_expand.
17915 (vec_cmp<mode>di_exec): Use VCMP_MODE.
17916 (vec_cmpu<mode>di_exec): New define_expand.
17917 (vec_cmp<u>v64qidi_exec): New define_expand.
17918 (vec_cmp<mode>di_dup): Use VCMP_MODE.
17919 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
17920 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
17921 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
17922 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
17923 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
17924 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
17925 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
17926 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
17927 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
17929 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
17930 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
17932 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
17934 * config/gcn/constraints.md (DA): Update description and match.
17936 (Db): New constraint.
17937 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
17939 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
17940 Implement 'Db' mixed immediate type.
17941 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
17942 (addcv64si3_dup<exec_vcc>): Delete.
17943 (subcv64si3<exec_vcc>): Rework constraints.
17944 (addv64di3): Rework constraints.
17945 (addv64di3_exec): Rework constraints.
17946 (subv64di3): Rework constraints.
17947 (addv64di3_dup): Delete.
17948 (addv64di3_dup_exec): Delete.
17949 (addv64di3_zext): Rework constraints.
17950 (addv64di3_zext_exec): Rework constraints.
17951 (addv64di3_zext_dup): Rework constraints.
17952 (addv64di3_zext_dup_exec): Rework constraints.
17953 (addv64di3_zext_dup2): Rework constraints.
17954 (addv64di3_zext_dup2_exec): Rework constraints.
17955 (addv64di3_sext_dup2): Rework constraints.
17956 (addv64di3_sext_dup2_exec): Rework constraints.
17958 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
17960 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
17961 existing target checks.
17963 2020-01-07 Richard Biener <rguenther@suse.de>
17965 * doc/install.texi: Bump minimal supported MPC version.
17967 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
17969 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
17970 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
17971 * langhooks.c: Include stor-layout.h.
17972 (lhd_simulate_enum_decl): New function.
17973 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
17974 handle_arm_sve_h for the LTO frontend.
17975 (register_vector_type): Cope with null returns from pushdecl.
17977 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
17979 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
17980 (aarch64_sve::nvectors_if_data_type): Replace with...
17981 (aarch64_sve::builtin_type_p): ...this.
17982 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
17983 (find_vector_type): Delete.
17984 (add_sve_type_attribute): New function.
17985 (lookup_sve_type_attribute): Likewise.
17986 (register_builtin_types): Add an "SVE type" attribute to each type.
17987 (register_tuple_type): Likewise.
17988 (svbool_type_p, nvectors_if_data_type): Delete.
17989 (mangle_builtin_type): Use lookup_sve_type_attribute.
17990 (builtin_type_p): Likewise. Add an overload that returns the
17991 number of constituent vector and predicate registers.
17992 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
17993 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
17994 instead of aarch64_sve_argument_p.
17995 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
17996 (aarch64_pass_by_reference): Likewise.
17997 (aarch64_function_value_1): Likewise.
17998 (aarch64_return_in_memory): Likewise.
17999 (aarch64_layout_arg): Likewise.
18001 2020-01-07 Jakub Jelinek <jakub@redhat.com>
18003 PR tree-optimization/93156
18004 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
18005 least significant bit is always clear.
18007 PR tree-optimization/93118
18008 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
18009 simplifier with two intermediate conversions.
18011 2020-01-07 Martin Liska <mliska@suse.cz>
18013 * params.opt: Add Optimization for various parameters.
18015 2020-01-07 Martin Liska <mliska@suse.cz>
18018 * doc/extend.texi: Explain cloning for target_clone
18021 2020-01-07 Martin Liska <mliska@suse.cz>
18023 PR tree-optimization/92860
18024 * common.opt: Make in Optimization option
18025 as it is affected by -O0, which is an Optimization
18027 * tree-inline.c (tree_inlinable_function_p):
18028 Use opt_for_fn for warn_inline.
18029 (expand_call_inline): Likewise.
18031 2020-01-07 Martin Liska <mliska@suse.cz>
18033 PR tree-optimization/92860
18034 * common.opt: Make flag_ree as optimization
18037 2020-01-07 Martin Liska <mliska@suse.cz>
18039 PR optimization/92860
18040 * params.opt: Mark param_min_crossjump_insns with Optimization
18043 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
18045 * ipa-inline-analysis.c (estimate_growth): Fix typo.
18046 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
18048 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
18050 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
18051 helper function to return the valid addressing formats for a given
18052 hard register and mode.
18053 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
18055 * config/rs6000/constraints.md (Q constraint): Update
18057 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
18060 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
18061 Use 'Q' for doing vector extract from memory.
18062 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
18064 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
18065 doing vector extract from memory.
18066 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
18067 extract from memory.
18069 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
18070 for the offset being 34-bits when -mcpu=future is used.
18072 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
18074 * config/pa/pa.md: Revert change to use ordered_comparison_operator
18075 instead of cmpib_comparison_operator in cmpib patterns.
18076 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
18077 of cmpib_comparison_operator. Revise comment.
18079 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18081 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
18082 in an IFN_DIV_POW2 node to be equal.
18084 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18086 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
18087 (vect_check_scalar_mask): ...this.
18088 (vectorizable_store, vectorizable_load): Update call accordingly.
18089 (vectorizable_call): Use vect_check_scalar_mask to check the mask
18090 argument in calls to conditional internal functions.
18092 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18094 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
18095 '0' matching inputs.
18096 (subv64di3_exec): Likewise.
18098 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
18100 * config/mips/mips.c (vr4130_align_insns): Fix typo.
18101 * doc/md.texi (movstr): Likewise.
18103 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18105 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
18108 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18110 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
18112 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
18113 to a temporary file and use move-if-change to update the real
18114 file where necessary.
18116 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
18118 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
18119 rather than Upa for CPY /M.
18121 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
18123 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
18126 2020-01-06 Martin Liska <mliska@suse.cz>
18128 PR tree-optimization/92860
18129 * params.opt: Mark param_max_combine_insns with Optimization
18132 2020-01-05 Jakub Jelinek <jakub@redhat.com>
18135 * config/i386/i386.md (SWIDWI): New mode iterator.
18136 (DWI, dwi): Add TImode variants.
18137 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
18138 <general_hilo_operand> instead of <general_operand>. Use
18139 CONST_SCALAR_INT_P instead of CONST_INT_P.
18140 (*addv<mode>4_1): Rename to ...
18141 (addv<mode>4_1): ... this.
18142 (QWI): New mode attribute.
18143 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
18144 define_insn_and_split patterns.
18145 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
18147 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
18148 <general_hilo_operand> instead of <general_operand>.
18149 (*addcarry<mode>_1): New define_insn.
18150 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
18152 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
18154 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
18155 Use "call" instead of "set".
18157 2020-01-03 Martin Jambor <mjambor@suse.cz>
18160 * ipa-cp.c (print_all_lattices): Skip functions without info.
18162 2020-01-03 Jakub Jelinek <jakub@redhat.com>
18165 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
18166 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
18167 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
18168 for 'e' simd clones.
18171 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
18173 (mprefer-vector-width=): Add Save.
18174 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
18175 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
18176 (ix86_debug_options, ix86_function_specific_print): Adjust
18177 ix86_target_string callers.
18178 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
18179 (ix86_valid_target_attribute_tree): Likewise.
18180 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
18181 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
18182 ix86_target_string caller.
18185 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
18186 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
18187 instead of gen_int_shift_amount + convert_modes.
18189 PR rtl-optimization/93088
18190 * loop-iv.c (find_single_def_src): Punt after looking through
18191 128 reg copies for regs with single definitions. Move definitions
18194 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
18196 * config/arm/arm-c.c (arm_cpu_builtins): Define
18197 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
18198 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
18199 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
18200 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
18201 * config/arm/arm-tables.opt: Regenerated.
18202 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
18203 arm_arch_i8mm and arm_arch_bf16 when enabled.
18204 * config/arm/arm.h (TARGET_I8MM): New macro.
18205 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
18206 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
18207 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
18208 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
18209 (v8_6_a_simd_variants): New.
18210 (v8_*_a_simd_variants): Add i8mm and bf16.
18211 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
18213 2020-01-02 Jakub Jelinek <jakub@redhat.com>
18216 * predict.c (compute_function_frequency): Don't call
18217 warn_function_cold on functions that already have cold attribute.
18219 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
18222 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
18223 COMDAT group function labels in .data.rel.ro.local section.
18224 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
18227 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
18228 comparison_operator in B and S integer comparisons. Likewise, use
18229 ordered_comparison_operator instead of cmpib_comparison_operator in
18231 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
18233 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18235 Update copyright years.
18237 * gcc.c (process_command): Update copyright notice dates.
18238 * gcov-dump.c (print_version): Ditto.
18239 * gcov.c (print_version): Ditto.
18240 * gcov-tool.c (print_version): Ditto.
18241 * gengtype.c (create_file): Ditto.
18242 * doc/cpp.texi: Bump @copying's copyright year.
18243 * doc/cppinternals.texi: Ditto.
18244 * doc/gcc.texi: Ditto.
18245 * doc/gccint.texi: Ditto.
18246 * doc/gcov.texi: Ditto.
18247 * doc/install.texi: Ditto.
18248 * doc/invoke.texi: Ditto.
18250 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
18252 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
18255 2020-01-01 Jakub Jelinek <jakub@redhat.com>
18257 PR tree-optimization/93098
18258 * match.pd (popcount): For shift amounts, use integer_onep
18259 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
18260 tests. Make sure that precision is power of two larger than or equal
18261 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
18262 instead of ULL suffixed constants. Formatting fixes.
18264 Copyright (C) 2020 Free Software Foundation, Inc.
18266 Copying and distribution of this file, with or without modification,
18267 are permitted in any medium without royalty provided the copyright
18268 notice and this notice are preserved.