1 2020-06-20 Bin Cheng <bin.cheng@linux.alibaba.com>
3 PR tree-optimization/95638
4 * tree-loop-distribution.c (pg_edge_callback_data): New field.
5 (loop_distribution::break_alias_scc_partitions): Record and restore
6 postorder information. Fix memory leak.
8 2020-06-19 Tobias Burnus <tobias@codesourcery.com>
10 * config/gcn/gcn.c (gcn_related_vector_mode): Add ARG_UNUSED.
11 (output_file_start): Use const 'char *'.
13 2020-06-19 Przemyslaw Wirkus <Przemyslaw.Wirkus@arm.com>
15 PR tree-optimization/94880
16 * match.pd (A | B) - B -> (A & ~B): New simplification.
18 2020-06-19 Richard Biener <rguenther@suse.de>
20 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Adjust
21 for lane permutations.
23 2020-06-19 Richard Biener <rguenther@suse.de>
25 PR tree-optimization/95761
26 * tree-vect-slp.c (vect_schedule_slp_instance): Walk all
27 vectorized stmts for finding the last one.
29 2020-06-18 Felix Yang <felix.yang@huawei.com>
31 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Call
32 vect_relevant_for_alignment_p to filter out data references in
33 the loop whose alignment is irrelevant when trying loop peeling
36 2020-06-18 Uroš Bizjak <ubizjak@gmail.com>
38 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use SWI248 mode
39 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
40 mode iterator for the first operand of ZERO_EXTRACT RTX.
41 Change ext_register_operand predicate to register_operand.
42 Rename from *cmpqi_ext_1.
43 (*cmpqi_ext<mode>_2): Ditto. Rename from *cmpqi_ext_2.
44 (*cmpqi_ext<mode>_3): Ditto. Rename from *cmpqi_ext_3.
45 (*cmpqi_ext<mode>_4): Ditto. Rename from *cmpqi_ext_4.
46 (cmpi_ext_3): Use HImode instead of SImode for ZERO_EXTRACT RTX.
47 (*extv<mode>): Use SWI24 mode iterator for the first operand
48 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
50 (*extzv<mode>): Use SWI248 mode iterator for the first operand
51 of ZERO_EXTRACT RTX. Change ext_register_operand predicate
53 (*extzvqi): Use SWI248 mode iterator instead of SImode for
54 ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first operand
55 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
57 (*extzvqi_mem_rex64 and corresponding peephole2): Use SWI248 mode
58 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
59 mode iterator for the first operand of ZERO_EXTRACT RTX.
60 Change ext_register_operand predicate to register_operand.
61 (@insv<mode>_1): Use SWI248 mode iterator for the first operand
62 of ZERO_EXTRACT RTX. Change ext_register_operand predicate to
64 (*insvqi_1): Use SWI248 mode iterator instead of SImode
65 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the
66 first operand of ZERO_EXTRACT RTX. Change ext_register_operand
67 predicate to register_operand.
70 (*insvqi_1_mem_rex64 and corresponding peephole2): Use SWI248 mode
71 iterator instead of SImode for ZERO_EXTRACT RTX. Use SWI248
72 mode iterator for the first operand of ZERO_EXTRACT RTX.
73 Change ext_register_operand predicate to register_operand.
74 (addqi_ext_1): New expander.
75 (*addqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
76 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
77 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
78 to register_operand. Rename from *addqi_ext_1.
79 (*addqi_ext<mode>_2): Ditto. Rename from *addqi_ext_2.
80 (divmodqi4): Use HImode instead of SImode for ZERO_EXTRACT RTX.
82 (testqi_ext_1): Use HImode instead of SImode for ZERO_EXTRACT RTX.
83 (*testqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
84 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
85 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
86 to register_operand. Rename from *testqi_ext_1.
87 (*testqi_ext<mode>_2): Ditto. Rename from *testqi_ext_2.
88 (andqi_ext_1): New expander.
89 (*andqi_ext<mode>_1): Use SWI248 mode iterator instead of SImode
90 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
91 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
92 to register_operand. Rename from andqi_ext_1.
93 (*andqi_ext<mode>_1_cc): Ditto. Rename from *andqi_ext_1_cc.
94 (*andqi_ext<mode>_2): Ditto. Rename from *andqi_ext_2.
95 (*<code>qi_ext<mode>_1): Ditto. Rename from *<code>qi_ext_1.
96 (*<code>qi_ext<mode>_2): Ditto. Rename from *<code>qi_ext_2.
97 (xorqi_ext_1_cc): Use HImode instead of SImode for ZERO_EXTRACT RTX.
98 (*xorqi_ext<mode>_1_cc): Use SWI248 mode iterator instead of SImode
99 for ZERO_EXTRACT RTX. Use SWI248 mode iterator for the first
100 operand of ZERO_EXTRACT RTX. Change ext_register_operand predicate
101 to register_operand. Rename from *xorqi_ext_1_cc.
102 * config/i386/i386-expand.c (ix86_split_idivmod): Emit ZERO_EXTRACT
103 in mode, matching its first operand.
104 (promote_duplicated_reg): Update for renamed insv<mode>_1.
105 * config/i386/predicates.md (ext_register_operand): Remove predicate.
107 2020-06-18 Martin Sebor <msebor@redhat.com>
111 * builtins.c (compute_objsize): Remove call to
112 compute_builtin_object_size and instead compute conservative sizes
115 2020-06-18 Martin Liska <mliska@suse.cz>
117 * coretypes.h (struct iterator_range): New type.
118 * tree-vect-patterns.c (vect_determine_precisions): Use
119 range-based iterator.
120 (vect_pattern_recog): Likewise.
121 * tree-vect-slp.c (_bb_vec_info): Likewise.
122 (_bb_vec_info::~_bb_vec_info): Likewise.
123 (vect_slp_check_for_constructors): Likewise.
124 * tree-vectorizer.h:Add new iterators
125 and functions that use it.
127 2020-06-18 Martin Liska <mliska@suse.cz>
129 * config/rs6000/rs6000-call.c (fold_build_vec_cmp):
130 Since 502d63b6d6141597bb18fd23c87736a1b384cf8f, first argument
131 of a VEC_COND_EXPR cannot be tcc_comparison and so that
132 a SSA_NAME needs to be created before we use it for the first
133 argument of the VEC_COND_EXPR.
134 (fold_compare_helper): Pass gsi to fold_build_vec_cmp.
136 2020-06-18 Richard Biener <rguenther@suse.de>
139 * internal-fn.c (expand_vect_cond_optab_fn): Move the result
140 to the target if necessary.
141 (expand_vect_cond_mask_optab_fn): Likewise.
143 2020-06-18 Martin Liska <mliska@suse.cz>
145 * tree-ssa-reassoc.c (ovce_extract_ops): Replace *vcond with
146 vcond as we check for NULL pointer.
148 2020-06-18 Tobias Burnus <tobias@codesourcery.com>
150 * gimple-pretty-print.c (dump_binary_rhs): Use braces to
151 silence empty-body warning with gcc_fallthrough.
153 2020-06-18 Jakub Jelinek <jakub@redhat.com>
155 PR tree-optimization/95699
156 * tree-ssa-phiopt.c (minmax_replacement): Treat (signed int)x < 0
157 as x > INT_MAX and (signed int)x >= 0 as x <= INT_MAX. Move variable
158 declarations to the statements that set them where possible.
160 2020-06-18 Jakub Jelinek <jakub@redhat.com>
163 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't allow
164 scalar mode halfvectype other than vector boolean for
167 2020-06-18 Richard Biener <rguenther@suse.de>
169 * varasm.c (assemble_variable): Make sure to not
170 defer output when outputting addressed constants.
171 (output_constant_def_contents): Likewise.
172 (add_constant_to_table): Take and pass on whether to
174 (output_addressed_constants): Likewise.
175 (output_constant_def): Pass on whether to defer output
176 to add_constant_to_table.
177 (tree_output_constant_def): Defer output of constants.
179 2020-06-18 Richard Biener <rguenther@suse.de>
181 * tree-vectorizer.h (_slp_tree::two_operators): Remove.
182 (_slp_tree::lane_permutation): New member.
183 (_slp_tree::code): Likewise.
184 (SLP_TREE_TWO_OPERATORS): Remove.
185 (SLP_TREE_LANE_PERMUTATION): New.
186 (SLP_TREE_CODE): Likewise.
187 (vect_stmt_dominates_stmt_p): Declare.
188 * tree-vectorizer.c (vect_stmt_dominates_stmt_p): New function.
189 * tree-vect-stmts.c (vect_model_simple_cost): Remove
190 SLP_TREE_TWO_OPERATORS handling.
191 * tree-vect-slp.c (_slp_tree::_slp_tree): Amend.
192 (_slp_tree::~_slp_tree): Likewise.
193 (vect_two_operations_perm_ok_p): Remove.
194 (vect_build_slp_tree_1): Remove verification of two-operator
196 (vect_build_slp_tree_2): When we have two different operators
197 build two computation SLP nodes and a blend.
198 (vect_print_slp_tree): Print the lane permutation if it exists.
199 (slp_copy_subtree): Copy it.
200 (vect_slp_rearrange_stmts): Re-arrange it.
201 (vect_slp_analyze_node_operations_1): Handle SLP_TREE_CODE
202 VEC_PERM_EXPR explicitely.
203 (vect_schedule_slp_instance): Likewise. Remove old
204 SLP_TREE_TWO_OPERATORS code.
205 (vectorizable_slp_permutation): New function.
207 2020-06-18 Martin Liska <mliska@suse.cz>
209 * tree-vect-generic.c (expand_vector_condition): Check
210 for gassign before inspecting RHS.
212 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
214 * gimplify.c (omp_notice_threadprivate_variable)
215 (omp_default_clause, omp_notice_variable): 'inform' after 'error'
216 diagnostic. Adjust all users.
218 2020-06-17 Thomas Schwinge <thomas@codesourcery.com>
220 * hsa-gen.c (gen_hsa_insns_for_call): Move 'function_decl ==
221 NULL_TREE' check earlier.
223 2020-06-17 Forrest Timour <forrest.timour@gmail.com>
225 * doc/extend.texi (attribute access): Fix a typo.
227 2020-06-17 Bin Cheng <bin.cheng@linux.alibaba.com>
228 Kaipeng Zhou <zhoukaipeng3@huawei.com>
230 PR tree-optimization/95199
231 * tree-vect-stmts.c: Eliminate common stmts for bump and offset in
232 strided load/store operations and remove redundant code.
234 2020-06-17 Richard Sandiford <richard.sandiford@arm.com>
236 * coretypes.h (first_type): New alias template.
237 * recog.h (insn_gen_fn::operator()): Use it instead of a decltype.
238 Remove spurious “...” and split the function type out into a typedef.
240 2020-06-17 Andreas Krebbel <krebbel@linux.ibm.com>
242 * config/s390/s390.c (s390_fix_long_loop_prediction): Exit early
245 2020-06-17 Richard Biener <rguenther@suse.de>
247 * tree-vect-slp.c (vect_build_slp_tree_1): Set the passed
248 in *vectype parameter.
249 (vect_build_slp_tree_2): Set SLP_TREE_VECTYPE from what
250 vect_build_slp_tree_1 computed.
251 (vect_analyze_slp_instance): Set SLP_TREE_VECTYPE.
252 (vect_slp_analyze_node_operations_1): Use the SLP node vector type.
253 (vect_schedule_slp_instance): Likewise.
254 * tree-vect-stmts.c (vect_is_simple_use): Take the vector type
255 from SLP_TREE_VECTYPE.
257 2020-06-17 Richard Biener <rguenther@suse.de>
259 PR tree-optimization/95717
260 * tree-vect-loop-manip.c (slpeel_tree_duplicate_loop_to_edge_cfg):
261 Move BB SSA updating before exit/latch PHI current def copying.
263 2020-06-17 Martin Liska <mliska@suse.cz>
265 * Makefile.in: Add new file.
266 * expr.c (expand_expr_real_2): Add gcc_unreachable as we should
267 not meet this condition.
268 (do_store_flag): Likewise.
269 * gimplify.c (gimplify_expr): Gimplify first argument of
270 VEC_COND_EXPR to be a SSA name.
271 * internal-fn.c (vec_cond_mask_direct): New.
272 (vec_cond_direct): Likewise.
273 (vec_condu_direct): Likewise.
274 (vec_condeq_direct): Likewise.
275 (expand_vect_cond_optab_fn): New.
276 (expand_vec_cond_optab_fn): Likewise.
277 (expand_vec_condu_optab_fn): Likewise.
278 (expand_vec_condeq_optab_fn): Likewise.
279 (expand_vect_cond_mask_optab_fn): Likewise.
280 (expand_vec_cond_mask_optab_fn): Likewise.
281 (direct_vec_cond_mask_optab_supported_p): Likewise.
282 (direct_vec_cond_optab_supported_p): Likewise.
283 (direct_vec_condu_optab_supported_p): Likewise.
284 (direct_vec_condeq_optab_supported_p): Likewise.
285 * internal-fn.def (VCOND): New OPTAB.
288 (VCOND_MASK): Likewise.
289 * optabs.c (get_rtx_code): Make it global.
290 (expand_vec_cond_mask_expr): Removed.
291 (expand_vec_cond_expr): Removed.
292 * optabs.h (expand_vec_cond_expr): Likewise.
293 (vector_compare_rtx): Make it global.
294 * passes.def: Add new pass_gimple_isel pass.
295 * tree-cfg.c (verify_gimple_assign_ternary): Add check
296 for VEC_COND_EXPR about first argument.
297 * tree-pass.h (make_pass_gimple_isel): New.
298 * tree-ssa-forwprop.c (pass_forwprop::execute): Prevent
299 propagation of the first argument of a VEC_COND_EXPR.
300 * tree-ssa-reassoc.c (ovce_extract_ops): Support SSA_NAME as
301 first argument of a VEC_COND_EXPR.
302 (optimize_vec_cond_expr): Likewise.
303 * tree-vect-generic.c (expand_vector_divmod): Make SSA_NAME
304 for a first argument of created VEC_COND_EXPR.
305 (expand_vector_condition): Fix coding style.
306 * tree-vect-stmts.c (vectorizable_condition): Gimplify
308 * gimple-isel.cc: New file.
310 2020-06-17 Andrew Stubbs <ams@codesourcery.com>
312 * config/gcn/gcn-hsa.h (TEXT_SECTION_ASM_OP): Use ".text".
313 (BSS_SECTION_ASM_OP): Use ".bss".
314 (ASM_SPEC): Remove "-mattr=-code-object-v3".
315 (LINK_SPEC): Add "--export-dynamic".
316 * config/gcn/gcn-opts.h (processor_type): Replace PROCESSOR_VEGA with
317 PROCESSOR_VEGA10 and PROCESSOR_VEGA20.
318 * config/gcn/gcn-run.c (HSA_RUNTIME_LIB): Use ".so.1" variant.
319 (load_image): Remove obsolete relocation handling.
320 Add ".kd" suffix to the symbol names.
321 * config/gcn/gcn.c (MAX_NORMAL_SGPR_COUNT): Set to 62.
322 (gcn_option_override): Update gcn_isa test.
323 (gcn_kernel_arg_types): Update all the assembler directives.
324 Remove the obsolete options.
325 (gcn_conditional_register_usage): Update MAX_NORMAL_SGPR_COUNT usage.
326 (gcn_omp_device_kind_arch_isa): Handle PROCESSOR_VEGA10 and
328 (output_file_start): Rework assembler file header.
329 (gcn_hsa_declare_function_name): Rework kernel metadata.
330 * config/gcn/gcn.h (GCN_KERNEL_ARG_TYPES): Set to 16.
331 * config/gcn/gcn.opt (PROCESSOR_VEGA): Remove enum.
332 (PROCESSOR_VEGA10): New enum value.
333 (PROCESSOR_VEGA20): New enum value.
335 2020-06-17 Martin Liska <mliska@suse.cz>
337 * gcov-dump.c (print_version): Collapse lisence header to 2 lines
339 * gcov-tool.c (print_version): Likewise.
340 * gcov.c (print_version): Likewise.
342 2020-06-17 liuhongt <hongtao.liu@intel.com>
345 * config/i386/i386-expand.c
346 (ix86_expand_vec_shift_qihi_constant): New function.
347 * config/i386/i386-protos.h
348 (ix86_expand_vec_shift_qihi_constant): Declare.
349 * config/i386/sse.md (<shift_insn><mode>3): Optimize shift
350 V*QImode by constant.
352 2020-06-16 Aldy Hernandez <aldyh@redhat.com>
354 PR tree-optimization/95649
355 * tree-ssa-propagate.c (propagate_into_phi_args): Do not propagate unless
358 2020-06-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
360 * config.in: Regenerate.
361 * config/s390/s390.c (print_operand): Emit vector alignment hints
362 for target z13, if AS accepts them. For other targets the logic
364 * config/s390/s390.h (TARGET_VECTOR_LOADSTORE_ALIGNMENT_HINTS): Define
366 * configure: Regenerate.
367 * configure.ac: Check HAVE_AS_VECTOR_LOADSTORE_ALIGNMENT_HINTS_ON_Z13.
369 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
371 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Correct the intrinsic
373 (__arm_vaddq_m_n_s32): Likewise.
374 (__arm_vaddq_m_n_s16): Likewise.
375 (__arm_vaddq_m_n_u8): Likewise.
376 (__arm_vaddq_m_n_u32): Likewise.
377 (__arm_vaddq_m_n_u16): Likewise.
378 (__arm_vaddq_m): Modify polymorphic variant.
380 2020-06-16 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
382 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Correct the predicate
383 and constraint of all the operands.
384 (mve_sqrshrl_sat<supf>_di): Likewise.
385 (mve_uqrshl_si): Likewise.
386 (mve_sqrshr_si): Likewise.
387 (mve_uqshll_di): Likewise.
388 (mve_urshrl_di): Likewise.
389 (mve_uqshl_si): Likewise.
390 (mve_urshr_si): Likewise.
391 (mve_sqshl_si): Likewise.
392 (mve_srshr_si): Likewise.
393 (mve_srshrl_di): Likewise.
394 (mve_sqshll_di): Likewise.
395 * config/arm/predicates.md (arm_low_register_operand): Define.
397 2020-06-16 Jakub Jelinek <jakub@redhat.com>
399 * tree.h (OMP_FOR_NON_RECTANGULAR): Define.
400 * gimplify.c (gimplify_omp_for): Diagnose schedule, ordered
401 or dist_schedule clause on non-rectangular loops. Handle
402 gimplification of non-rectangular lb/b expressions. When changing
403 iteration variable, adjust also non-rectangular lb/b expressions
405 * omp-general.h (struct omp_for_data_loop): Add m1, m2 and outer
407 (struct omp_for_data): Add non_rect member.
408 * omp-general.c (omp_extract_for_data): Handle non-rectangular
409 loops. Fill in non_rect, m1, m2 and outer.
410 * omp-low.c (lower_omp_for): Handle non-rectangular lb/b expressions.
411 * omp-expand.c (expand_omp_for): Emit sorry_at for unsupported
412 non-rectangular loop cases and assert for cases that can't be
414 * tree-pretty-print.c (dump_mem_ref): Formatting fix.
415 (dump_omp_loop_non_rect_expr): New function.
416 (dump_generic_node): Handle non-rectangular OpenMP loops.
417 * tree-pretty-print.h (dump_omp_loop_non_rect_expr): Declare.
418 * gimple-pretty-print.c (dump_gimple_omp_for): Handle non-rectangular
421 2020-06-16 Richard Biener <rguenther@suse.de>
424 * varasm.c (build_constant_desc): Remove set_mem_attributes call.
426 2020-06-16 Kito Cheng <kito.cheng@sifive.com>
429 * config/riscv/riscv.c (riscv_gpr_save_operation_p): Remove
430 assertion and turn it into a early exit check.
432 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
434 * gimplify.c (gimplify_init_constructor) <AGGREGATE_TYPE>: Declare
435 new ENSURE_SINGLE_ACCESS constant and move variables down. If it is
436 true and all elements are zero, then always clear. Return GS_ERROR
437 if a temporary would be created for it and NOTIFY_TEMP_CREATION set.
438 (gimplify_modify_expr_rhs) <VAR_DECL>: If the target is volatile but
439 the type is aggregate non-addressable, ask gimplify_init_constructor
440 whether it can generate a single access to the target.
442 2020-06-15 Eric Botcazou <ebotcazou@gcc.gnu.org>
444 * tree-sra.c (propagate_subaccesses_from_rhs): When a non-scalar
445 access on the LHS is replaced with a scalar access, propagate the
446 TYPE_REVERSE_STORAGE_ORDER flag of the type of the original access.
448 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
450 * config/xtensa/xtensa.c (TARGET_HAVE_TLS): Remove
451 TARGET_THREADPTR reference.
452 (xtensa_tls_symbol_p, xtensa_tls_referenced_p): Use
453 targetm.have_tls instead of TARGET_HAVE_TLS.
454 (xtensa_option_override): Set targetm.have_tls to false in
455 configurations without THREADPTR.
457 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
459 * config/xtensa/elf.h (ASM_SPEC, LINK_SPEC): Pass ABI switch to
461 * config/xtensa/linux.h (ASM_SPEC, LINK_SPEC): Ditto.
462 * config/xtensa/uclinux.h (ASM_SPEC, LINK_SPEC): Ditto.
463 * config/xtensa/xtensa.c (xtensa_option_override): Initialize
464 xtensa_windowed_abi if needed.
465 * config/xtensa/xtensa.h (TARGET_WINDOWED_ABI_DEFAULT): New
467 (TARGET_WINDOWED_ABI): Redefine to xtensa_windowed_abi.
468 * config/xtensa/xtensa.opt (xtensa_windowed_abi): New target
470 (mabi=call0, mabi=windowed): New options.
471 * doc/invoke.texi: Document new -mabi= Xtensa-specific options.
473 2020-06-15 Max Filippov <jcmvbkbc@gmail.com>
475 * config/xtensa/xtensa.c (xtensa_can_eliminate): New function.
476 (TARGET_CAN_ELIMINATE): New macro.
477 * config/xtensa/xtensa.h
478 (XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM)
479 (XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM): New macros.
480 (HARD_FRAME_POINTER_REGNUM): Define using
481 XTENSA_*_HARD_FRAME_POINTER_REGNUM.
482 (ELIMINABLE_REGS): Replace lines with HARD_FRAME_POINTER_REGNUM
483 by lines with XTENSA_WINDOWED_HARD_FRAME_POINTER_REGNUM and
484 XTENSA_CALL0_HARD_FRAME_POINTER_REGNUM.
486 2020-06-15 Felix Yang <felix.yang@huawei.com>
488 * tree-vect-data-refs.c (vect_verify_datarefs_alignment): Rename
489 parameter to loop_vinfo and update uses. Use LOOP_VINFO_DATAREFS
491 (vect_analyze_data_refs_alignment): Likewise, and use LOOP_VINFO_DDRS
493 * tree-vect-loop.c (vect_dissolve_slp_only_groups): Use
494 LOOP_VINFO_DATAREFS when possible.
495 (update_epilogue_loop_vinfo): Likewise.
497 2020-06-15 Kito Cheng <kito.cheng@sifive.com>
499 * config/riscv/riscv.c (riscv_gen_gpr_save_insn): Change type to
501 (riscv_gpr_save_operation_p): Change type to unsigned for i and
504 2020-06-15 Hongtao Liu <hongtao.liu@intel.com>
507 * config/i386/i386-expand.c (ix86_expand_vecmul_qihi): New
509 * config/i386/i386-protos.h (ix86_expand_vecmul_qihi): Declare.
510 * config/i386/sse.md (mul<mode>3): Drop mask_name since
511 there's no real simd int8 multiplication instruction with
512 mask. Also optimize it under TARGET_AVX512BW.
513 (mulv8qi3): New expander.
515 2020-06-12 Marco Elver <elver@google.com>
517 * gimplify.c (gimplify_function_tree): Optimize and do not emit
518 IFN_TSAN_FUNC_EXIT in a finally block if we do not need it.
519 * params.opt: Add --param=tsan-instrument-func-entry-exit=.
520 * tsan.c (instrument_memory_accesses): Make
521 fentry_exit_instrument bool depend on new param.
523 2020-06-12 Felix Yang <felix.yang@huawei.com>
525 PR tree-optimization/95570
526 * tree-vect-data-refs.c (vect_relevant_for_alignment_p): New function.
527 (vect_verify_datarefs_alignment): Call it to filter out data references
528 in the loop whose alignment is irrelevant.
529 (vect_get_peeling_costs_all_drs): Likewise.
530 (vect_peeling_supportable): Likewise.
531 (vect_enhance_data_refs_alignment): Likewise.
533 2020-06-12 Richard Biener <rguenther@suse.de>
535 PR tree-optimization/95633
536 * tree-vect-stmts.c (vectorizable_condition): Properly
537 guard the vec_else_clause access with EXTRACT_LAST_REDUCTION.
539 2020-06-12 Martin Liška <mliska@suse.cz>
541 * cgraphunit.c (process_symver_attribute): Wrap weakref keyword.
542 * dbgcnt.c (dbg_cnt_set_limit_by_index): Do not print extra new
544 * lto-wrapper.c (merge_and_complain): Wrap option names.
546 2020-06-12 Kewen Lin <linkw@gcc.gnu.org>
548 * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Rename
549 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
550 LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
551 (vect_set_loop_condition_masked): Renamed to ...
552 (vect_set_loop_condition_partial_vectors): ... this. Rename
553 LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE. Rename
554 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
555 (vect_set_loop_condition_unmasked): Renamed to ...
556 (vect_set_loop_condition_normal): ... this.
557 (vect_set_loop_condition): Rename vect_set_loop_condition_unmasked to
558 vect_set_loop_condition_normal. Rename vect_set_loop_condition_masked
559 to vect_set_loop_condition_partial_vectors.
560 (vect_prepare_for_masked_peels): Rename LOOP_VINFO_MASK_COMPARE_TYPE
561 to LOOP_VINFO_RGROUP_COMPARE_TYPE.
562 * tree-vect-loop.c (vect_known_niters_smaller_than_vf): New, factored
564 (vect_analyze_loop_costing): ... this.
565 (_loop_vec_info::_loop_vec_info): Rename mask_compare_type to
567 (vect_min_prec_for_max_niters): New, factored out from ...
568 (vect_verify_full_masking): ... this. Rename
569 vect_iv_limit_for_full_masking to vect_iv_limit_for_partial_vectors.
570 Rename LOOP_VINFO_MASK_COMPARE_TYPE to LOOP_VINFO_RGROUP_COMPARE_TYPE.
571 Rename LOOP_VINFO_MASK_IV_TYPE to LOOP_VINFO_RGROUP_IV_TYPE.
572 (vectorizable_reduction): Update some dumpings with partial
573 vectors instead of fully-masked.
574 (vectorizable_live_operation): Likewise.
575 (vect_iv_limit_for_full_masking): Renamed to ...
576 (vect_iv_limit_for_partial_vectors): ... this.
577 * tree-vect-stmts.c (check_load_store_masking): Renamed to ...
578 (check_load_store_for_partial_vectors): ... this. Update some
579 dumpings with partial vectors instead of fully-masked.
580 (vectorizable_store): Rename check_load_store_masking to
581 check_load_store_for_partial_vectors.
582 (vectorizable_load): Likewise.
583 * tree-vectorizer.h (LOOP_VINFO_MASK_COMPARE_TYPE): Renamed to ...
584 (LOOP_VINFO_RGROUP_COMPARE_TYPE): ... this.
585 (LOOP_VINFO_MASK_IV_TYPE): Renamed to ...
586 (LOOP_VINFO_RGROUP_IV_TYPE): ... this.
587 (vect_iv_limit_for_full_masking): Renamed to ...
588 (vect_iv_limit_for_partial_vectors): this.
589 (_loop_vec_info): Rename mask_compare_type to rgroup_compare_type.
590 Rename iv_type to rgroup_iv_type.
592 2020-06-12 Richard Sandiford <richard.sandiford@arm.com>
594 * recog.h (insn_gen_fn::f0, insn_gen_fn::f1, insn_gen_fn::f2)
595 (insn_gen_fn::f3, insn_gen_fn::f4, insn_gen_fn::f5, insn_gen_fn::f6)
596 (insn_gen_fn::f7, insn_gen_fn::f8, insn_gen_fn::f9, insn_gen_fn::f10)
597 (insn_gen_fn::f11, insn_gen_fn::f12, insn_gen_fn::f13)
598 (insn_gen_fn::f14, insn_gen_fn::f15, insn_gen_fn::f16): Delete.
599 (insn_gen_fn::operator()): Replace overloaded definitions with
600 a parameter-pack version.
602 2020-06-12 H.J. Lu <hjl.tools@gmail.com>
605 * config/i386/i386-features.c (rest_of_insert_endbranch):
607 (rest_of_insert_endbr_and_patchable_area): Change return type
608 to void. Add need_endbr and patchable_area_size arguments.
609 Don't call timevar_push nor timevar_pop. Replace
610 endbr_queued_at_entrance with insn_queued_at_entrance. Insert
611 UNSPECV_PATCHABLE_AREA for patchable area.
612 (pass_data_insert_endbranch): Renamed to ...
613 (pass_data_insert_endbr_and_patchable_area): This. Change
614 pass name to endbr_and_patchable_area.
615 (pass_insert_endbranch): Renamed to ...
616 (pass_insert_endbr_and_patchable_area): This. Add need_endbr
617 and patchable_area_size;.
618 (pass_insert_endbr_and_patchable_area::gate): Set and check
619 need_endbr and patchable_area_size.
620 (pass_insert_endbr_and_patchable_area::execute): Call
621 timevar_push and timevar_pop. Pass need_endbr and
622 patchable_area_size to rest_of_insert_endbr_and_patchable_area.
623 (make_pass_insert_endbranch): Renamed to ...
624 (make_pass_insert_endbr_and_patchable_area): This.
625 * config/i386/i386-passes.def: Replace pass_insert_endbranch
626 with pass_insert_endbr_and_patchable_area.
627 * config/i386/i386-protos.h (ix86_output_patchable_area): New.
628 (make_pass_insert_endbranch): Renamed to ...
629 (make_pass_insert_endbr_and_patchable_area): This.
630 * config/i386/i386.c (ix86_asm_output_function_label): Set
631 function_label_emitted to true.
632 (ix86_print_patchable_function_entry): New function.
633 (ix86_output_patchable_area): Likewise.
634 (x86_function_profiler): Replace endbr_queued_at_entrance with
635 insn_queued_at_entrance. Generate ENDBR only for TYPE_ENDBR.
636 Call ix86_output_patchable_area to generate patchable area if
638 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): New.
639 * config/i386/i386.h (queued_insn_type): New.
640 (machine_function): Add function_label_emitted. Replace
641 endbr_queued_at_entrance with insn_queued_at_entrance.
642 * config/i386/i386.md (UNSPECV_PATCHABLE_AREA): New.
643 (patchable_area): New.
645 2020-06-11 Martin Liska <mliska@suse.cz>
647 * config/rs6000/rs6000.c (rs6000_density_test): Fix GNU coding
650 2020-06-11 Martin Liska <mliska@suse.cz>
653 * config/rs6000/rs6000.c (rs6000_density_test): Skip debug
656 2020-06-11 Martin Liska <mliska@suse.cz>
657 Jakub Jelinek <jakub@redhat.com>
660 * asan.c (asan_emit_stack_protection): Fix emission for ilp32
661 by using Pmode instead of ptr_mode.
663 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
665 * tree-vect-loop-manip.c (vect_set_loop_mask): Renamed to ...
666 (vect_set_loop_control): ... this.
667 (vect_maybe_permute_loop_masks): Rename rgroup_masks related things.
668 (vect_set_loop_masks_directly): Renamed to ...
669 (vect_set_loop_controls_directly): ... this. Also rename some
670 variables with ctrl instead of mask. Rename vect_set_loop_mask to
671 vect_set_loop_control.
672 (vect_set_loop_condition_masked): Rename rgroup_masks related things.
673 Also rename some variables with ctrl instead of mask.
674 * tree-vect-loop.c (release_vec_loop_masks): Renamed to ...
675 (release_vec_loop_controls): ... this. Rename rgroup_masks related
677 (_loop_vec_info::~_loop_vec_info): Rename release_vec_loop_masks to
678 release_vec_loop_controls.
679 (can_produce_all_loop_masks_p): Rename rgroup_masks related things.
680 (vect_get_max_nscalars_per_iter): Likewise.
681 (vect_estimate_min_profitable_iters): Likewise.
682 (vect_record_loop_mask): Likewise.
683 (vect_get_loop_mask): Likewise.
684 * tree-vectorizer.h (struct rgroup_masks): Renamed to ...
685 (struct rgroup_controls): ... this. Also rename mask_type
686 to type and rename masks to controls.
688 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
690 * tree-vect-loop-manip.c (vect_set_loop_condition): Rename
691 LOOP_VINFO_FULLY_MASKED_P to LOOP_VINFO_USING_PARTIAL_VECTORS_P.
692 (vect_gen_vector_loop_niters): Likewise.
693 (vect_do_peeling): Likewise.
694 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
695 fully_masked_p to using_partial_vectors_p.
696 (vect_analyze_loop_costing): Rename LOOP_VINFO_FULLY_MASKED_P to
697 LOOP_VINFO_USING_PARTIAL_VECTORS_P.
698 (determine_peel_for_niter): Likewise.
699 (vect_estimate_min_profitable_iters): Likewise.
700 (vect_transform_loop): Likewise.
701 * tree-vectorizer.h (LOOP_VINFO_FULLY_MASKED_P): Updated.
702 (LOOP_VINFO_USING_PARTIAL_VECTORS_P): New macro.
704 2020-06-11 Kewen Lin <linkw@gcc.gnu.org>
706 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Rename
707 can_fully_mask_p to can_use_partial_vectors_p.
708 (vect_analyze_loop_2): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
709 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. Rename saved_can_fully_mask_p
710 to saved_can_use_partial_vectors_p.
711 (vectorizable_reduction): Rename LOOP_VINFO_CAN_FULLY_MASK_P to
712 LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P.
713 (vectorizable_live_operation): Likewise.
714 * tree-vect-stmts.c (permute_vec_elements): Likewise.
715 (check_load_store_masking): Likewise.
716 (vectorizable_operation): Likewise.
717 (vectorizable_store): Likewise.
718 (vectorizable_load): Likewise.
719 (vectorizable_condition): Likewise.
720 * tree-vectorizer.h (LOOP_VINFO_CAN_FULLY_MASK_P): Renamed to ...
721 (LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P): ... this.
722 (_loop_vec_info): Rename can_fully_mask_p to can_use_partial_vectors_p.
724 2020-06-11 Martin Liska <mliska@suse.cz>
726 * optc-save-gen.awk: Quote error string.
728 2020-06-11 Alexandre Oliva <oliva@adacore.com>
730 * print-rtl.c (print_mem_expr): Enable TDF_SLIM in dump_flags.
732 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
734 * config/riscv/riscv-protos.h (riscv_output_gpr_save): Remove.
735 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Update
737 * config/riscv/riscv.c (riscv_output_gpr_save): Remove.
738 * config/riscv/riscv.md (gpr_save): Update output asm pattern.
740 2020-06-11 Kito Cheng <kito.cheng@sifive.com>
742 * config/riscv/predicates.md (gpr_save_operation): New.
743 * config/riscv/riscv-protos.h (riscv_gen_gpr_save_insn): New.
744 (riscv_gpr_save_operation_p): Ditto.
745 * config/riscv/riscv-sr.c (riscv_remove_unneeded_save_restore_calls):
746 Ignore USEs for gpr_save patter.
747 * config/riscv/riscv.c (gpr_save_reg_order): New.
748 (riscv_expand_prologue): Use riscv_gen_gpr_save_insn to gen gpr_save.
749 (riscv_gen_gpr_save_insn): New.
750 (riscv_gpr_save_operation_p): Ditto.
751 * config/riscv/riscv.md (S3_REGNUM): New.
760 (gpr_save): Model USEs correctly.
762 2020-06-10 Martin Sebor <msebor@redhat.com>
766 * builtins.c (inform_access): New function.
767 (check_access): Call it. Add argument.
768 (addr_decl_size): Remove.
769 (get_range): New function.
770 (compute_objsize): New overload. Only use compute_builtin_object_size
771 with raw memory function.
772 (check_memop_access): Pass new argument to compute_objsize and
774 (expand_builtin_memchr, expand_builtin_strcat): Same.
775 (expand_builtin_strcpy, expand_builtin_stpcpy_1): Same.
776 (expand_builtin_stpncpy, check_strncat_sizes): Same.
777 (expand_builtin_strncat, expand_builtin_strncpy): Same.
778 (expand_builtin_memcmp): Same.
779 * builtins.h (check_nul_terminated_array): Declare extern.
780 (check_access): Add argument.
781 (struct access_ref, struct access_data): New structs.
782 * gimple-ssa-warn-restrict.c (clamp_offset): New helper.
783 (builtin_access::overlap): Call it.
784 * tree-object-size.c (decl_init_size): Declare extern.
785 (addr_object_size): Correct offset computation.
786 * tree-object-size.h (decl_init_size): Declare.
787 * tree-ssa-strlen.c (handle_integral_assign): Remove a call
788 to maybe_warn_overflow when assigning to an SSA_NAME.
790 2020-06-10 Richard Biener <rguenther@suse.de>
792 * tree-vect-loop.c (vect_determine_vectorization_factor):
794 (_loop_vec_info::_loop_vec_info): Likewise.
795 (vect_update_vf_for_slp): Likewise.
796 (vect_analyze_loop_operations): Likewise.
797 (update_epilogue_loop_vinfo): Likewise.
798 * tree-vect-patterns.c (vect_determine_precisions): Likewise.
799 (vect_pattern_recog): Likewise.
800 * tree-vect-slp.c (vect_detect_hybrid_slp): Likewise.
801 (_bb_vec_info::_bb_vec_info): Likewise.
802 * tree-vect-stmts.c (vect_mark_stmts_to_be_vectorized):
805 2020-06-10 Richard Biener <rguenther@suse.de>
807 PR tree-optimization/95576
808 * tree-vect-slp.c (vect_slp_bb): Skip leading debug stmts.
810 2020-06-10 Haijian Zhang <z.zhanghaijian@huawei.com>
813 * config/aarch64/aarch64-sve-builtins.h
814 (sve_switcher::m_old_maximum_field_alignment): New member.
815 * config/aarch64/aarch64-sve-builtins.cc
816 (sve_switcher::sve_switcher): Save maximum_field_alignment in
817 m_old_maximum_field_alignment and clear maximum_field_alignment.
818 (sve_switcher::~sve_switcher): Restore maximum_field_alignment.
820 2020-06-10 Richard Biener <rguenther@suse.de>
822 * tree-vectorizer.h (_slp_tree::vec_stmts): Make it a vector
824 (_stmt_vec_info::vec_stmts): Likewise.
825 (vec_info::stmt_vec_info_ro): New flag.
826 (vect_finish_replace_stmt): Adjust declaration.
827 (vect_finish_stmt_generation): Likewise.
828 (vectorizable_induction): Likewise.
829 (vect_transform_reduction): Likewise.
830 (vectorizable_lc_phi): Likewise.
831 * tree-vect-data-refs.c (vect_create_data_ref_ptr): Do not
832 allocate stmt infos for increments.
833 (vect_record_grouped_load_vectors): Adjust.
834 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
835 (vectorize_fold_left_reduction): Likewise.
836 (vect_transform_reduction): Likewise.
837 (vect_transform_cycle_phi): Likewise.
838 (vectorizable_lc_phi): Likewise.
839 (vectorizable_induction): Likewise.
840 (vectorizable_live_operation): Likewise.
841 (vect_transform_loop): Likewise.
842 * tree-vect-patterns.c (vect_pattern_recog): Set stmt_vec_info_ro.
843 * tree-vect-slp.c (vect_get_slp_vect_def): Adjust.
844 (vect_get_slp_defs): Likewise.
845 (vect_transform_slp_perm_load): Likewise.
846 (vect_schedule_slp_instance): Likewise.
847 (vectorize_slp_instance_root_stmt): Likewise.
848 * tree-vect-stmts.c (vect_get_vec_defs_for_operand): Likewise.
849 (vect_finish_stmt_generation_1): Do not allocate a stmt info.
850 (vect_finish_replace_stmt): Do not return anything.
851 (vect_finish_stmt_generation): Likewise.
852 (vect_build_gather_load_calls): Adjust.
853 (vectorizable_bswap): Likewise.
854 (vectorizable_call): Likewise.
855 (vectorizable_simd_clone_call): Likewise.
856 (vect_create_vectorized_demotion_stmts): Likewise.
857 (vectorizable_conversion): Likewise.
858 (vectorizable_assignment): Likewise.
859 (vectorizable_shift): Likewise.
860 (vectorizable_operation): Likewise.
861 (vectorizable_scan_store): Likewise.
862 (vectorizable_store): Likewise.
863 (vectorizable_load): Likewise.
864 (vectorizable_condition): Likewise.
865 (vectorizable_comparison): Likewise.
866 (vect_transform_stmt): Likewise.
867 * tree-vectorizer.c (vec_info::vec_info): Initialize
869 (vec_info::replace_stmt): Copy over stmt UID rather than
870 unsetting/setting a stmt info allocating a new UID.
871 (vec_info::set_vinfo_for_stmt): Assert !stmt_vec_info_ro.
873 2020-06-10 Aldy Hernandez <aldyh@redhat.com>
875 * gimple-loop-versioning.cc (loop_versioning::name_prop::get_value):
877 * gimple-ssa-evrp.c (class evrp_folder): New.
878 (class evrp_dom_walker): Remove.
879 (execute_early_vrp): Use evrp_folder instead of evrp_dom_walker.
880 * tree-ssa-ccp.c (ccp_folder::get_value): Add stmt parameter.
881 * tree-ssa-copy.c (copy_folder::get_value): Same.
882 * tree-ssa-propagate.c (substitute_and_fold_engine::replace_uses_in):
883 Pass stmt to get_value.
884 (substitute_and_fold_engine::replace_phi_args_in): Same.
885 (substitute_and_fold_dom_walker::after_dom_children): Call
887 (substitute_and_fold_dom_walker::foreach_new_stmt_in_bb): New.
888 (substitute_and_fold_dom_walker::propagate_into_phi_args): New.
889 (substitute_and_fold_dom_walker::before_dom_children): Adjust to
890 call virtual functions for folding, pre_folding, and post folding.
891 Call get_value with PHI. Tweak dump.
892 * tree-ssa-propagate.h (class substitute_and_fold_engine):
893 New argument to get_value.
894 New virtual function pre_fold_bb.
895 New virtual function post_fold_bb.
896 New virtual function pre_fold_stmt.
897 New virtual function post_new_stmt.
898 New function propagate_into_phi_args.
899 * tree-vrp.c (vrp_folder::get_value): Add stmt argument.
900 * vr-values.c (vr_values::extract_range_from_stmt): Adjust dump
902 (vr_values::fold_cond): New.
903 (vr_values::simplify_cond_using_ranges_1): Call fold_cond.
904 * vr-values.h (class vr_values): Add
905 simplify_cond_using_ranges_when_edge_is_known.
907 2020-06-10 Martin Liska <mliska@suse.cz>
910 * asan.c (asan_emit_stack_protection): Emit
911 also **SavedFlagPtr(FakeStack, class_id) = 0 in order to release
914 2020-06-10 Tamar Christina <tamar.christina@arm.com>
916 * config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Adjust costs for mul.
918 2020-06-10 Richard Biener <rguenther@suse.de>
920 * tree-vect-data-refs.c (vect_vfa_access_size): Adjust.
921 (vect_record_grouped_load_vectors): Likewise.
922 * tree-vect-loop.c (vect_create_epilog_for_reduction): Likewise.
923 (vectorize_fold_left_reduction): Likewise.
924 (vect_transform_reduction): Likewise.
925 (vect_transform_cycle_phi): Likewise.
926 (vectorizable_lc_phi): Likewise.
927 (vectorizable_induction): Likewise.
928 (vectorizable_live_operation): Likewise.
929 (vect_transform_loop): Likewise.
930 * tree-vect-slp.c (vect_get_slp_defs): New function, split out
932 * tree-vect-stmts.c (vect_get_vec_def_for_operand_1): Remove.
933 (vect_get_vec_def_for_operand): Likewise.
934 (vect_get_vec_def_for_stmt_copy): Likewise.
935 (vect_get_vec_defs_for_stmt_copy): Likewise.
936 (vect_get_vec_defs_for_operand): New function.
937 (vect_get_vec_defs): Likewise.
938 (vect_build_gather_load_calls): Adjust.
939 (vect_get_gather_scatter_ops): Likewise.
940 (vectorizable_bswap): Likewise.
941 (vectorizable_call): Likewise.
942 (vectorizable_simd_clone_call): Likewise.
943 (vect_get_loop_based_defs): Remove.
944 (vect_create_vectorized_demotion_stmts): Adjust.
945 (vectorizable_conversion): Likewise.
946 (vectorizable_assignment): Likewise.
947 (vectorizable_shift): Likewise.
948 (vectorizable_operation): Likewise.
949 (vectorizable_scan_store): Likewise.
950 (vectorizable_store): Likewise.
951 (vectorizable_load): Likewise.
952 (vectorizable_condition): Likewise.
953 (vectorizable_comparison): Likewise.
954 (vect_transform_stmt): Adjust and remove no longer applicable
956 * tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize
957 STMT_VINFO_VEC_STMTS.
958 (vec_info::free_stmt_vec_info): Relase it.
959 * tree-vectorizer.h (_stmt_vec_info::vectorized_stmt): Remove.
960 (_stmt_vec_info::vec_stmts): Add.
961 (STMT_VINFO_VEC_STMT): Remove.
962 (STMT_VINFO_VEC_STMTS): New.
963 (vect_get_vec_def_for_operand_1): Remove.
964 (vect_get_vec_def_for_operand): Likewise.
965 (vect_get_vec_defs_for_stmt_copy): Likewise.
966 (vect_get_vec_def_for_stmt_copy): Likewise.
967 (vect_get_vec_defs): New overloads.
968 (vect_get_vec_defs_for_operand): New.
969 (vect_get_slp_defs): Declare.
971 2020-06-10 Qian Chao <qianchao9@huawei.com>
973 PR tree-optimization/95569
974 * trans-mem.c (expand_assign_tm): Ensure that rtmp is marked TREE_ADDRESSABLE.
976 2020-06-10 Martin Liska <mliska@suse.cz>
978 PR tree-optimization/92860
979 * optc-save-gen.awk: Generate new function cl_optimization_compare.
980 * opth-gen.awk: Generate declaration of the function.
982 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
984 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
985 'future' PowerPC platform.
986 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
987 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
988 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
990 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
991 (rs6000_clone_map): Add 'future' system target_clones support.
993 2020-06-09 Michael Kuhn <gcc@ikkoku.de>
995 * Makefile.in (ZSTD_INC): Define.
996 (ZSTD_LIB): Include ZSTD_LDFLAGS.
997 (CFLAGS-lto-compress.o): Add ZSTD_INC.
998 * configure.ac (ZSTD_CPPFLAGS, ZSTD_LDFLAGS): New variables for
1000 * configure: Rebuilt.
1002 2020-06-09 Jason Merrill <jason@redhat.com>
1005 * tree.c (walk_tree_1): Call func on the TYPE_DECL of a DECL_EXPR.
1007 2020-06-09 Marco Elver <elver@google.com>
1009 * params.opt: Define --param=tsan-distinguish-volatile=[0,1].
1010 * sanitizer.def (BUILT_IN_TSAN_VOLATILE_READ1): Define new
1011 builtin for volatile instrumentation of reads/writes.
1012 (BUILT_IN_TSAN_VOLATILE_READ2): Likewise.
1013 (BUILT_IN_TSAN_VOLATILE_READ4): Likewise.
1014 (BUILT_IN_TSAN_VOLATILE_READ8): Likewise.
1015 (BUILT_IN_TSAN_VOLATILE_READ16): Likewise.
1016 (BUILT_IN_TSAN_VOLATILE_WRITE1): Likewise.
1017 (BUILT_IN_TSAN_VOLATILE_WRITE2): Likewise.
1018 (BUILT_IN_TSAN_VOLATILE_WRITE4): Likewise.
1019 (BUILT_IN_TSAN_VOLATILE_WRITE8): Likewise.
1020 (BUILT_IN_TSAN_VOLATILE_WRITE16): Likewise.
1021 * tsan.c (get_memory_access_decl): Argument if access is
1022 volatile. If param tsan-distinguish-volatile is non-zero, and
1023 access if volatile, return volatile instrumentation decl.
1024 (instrument_expr): Check if access is volatile.
1026 2020-06-09 Richard Biener <rguenther@suse.de>
1028 * tree-vect-loop.c (vectorizable_induction): Remove dead code.
1030 2020-06-09 Tobias Burnus <tobias@codesourcery.com>
1032 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1033 omp_finish_file): With in_lto_p, stream out all offload-table
1034 items even if the symtab_node does not exist.
1036 2020-06-09 Richard Biener <rguenther@suse.de>
1038 * tree-vect-stmts.c (vect_transform_stmt): Remove dead code.
1040 2020-06-09 Martin Liska <mliska@suse.cz>
1042 * gcov-dump.c (print_usage): Fix spacing for --raw option
1045 2020-06-09 Martin Liska <mliska@suse.cz>
1047 * cif-code.def (ATTRIBUTE_MISMATCH): Rename to...
1048 (SANITIZE_ATTRIBUTE_MISMATCH): ...this.
1049 * ipa-inline.c (sanitize_attrs_match_for_inline_p):
1050 Handle all sanitizer options.
1051 (can_inline_edge_p): Use renamed CIF_* enum value.
1053 2020-06-09 Joe Ramsay <joe.ramsay@arm.com>
1055 * config/aarch64/aarch64-sve.md (<optab><mode>2): Add support for
1057 (@aarch64_pred_<optab><mode>): Add support for unpacked vectors.
1058 (@aarch64_bic<mode>): Enable unpacked BIC.
1059 (*bic<mode>3): Enable unpacked BIC.
1061 2020-06-09 Martin Liska <mliska@suse.cz>
1063 PR gcov-profile/95365
1064 * doc/gcov.texi: Compile and link one example in 2 steps.
1066 2020-06-09 Jakub Jelinek <jakub@redhat.com>
1068 PR tree-optimization/95527
1069 * match.pd (__builtin_ffs (X) cmp CST): New optimizations.
1071 2020-06-09 Michael Meissner <meissner@linux.ibm.com>
1073 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_FUTURE): Allocate
1074 'future' PowerPC platform.
1075 (PPC_FEATURE2_ARCH_3_1): New HWCAP2 bit for ISA 3.1.
1076 (PPC_FEATURE2_MMA): New HWCAP2 bit for MMA.
1077 * config/rs6000/rs6000-call.c (cpu_supports_info): Add ISA 3.1 and
1079 * config/rs6000/rs6000.c (CLONE_ISA_3_1): New clone support.
1080 (rs6000_clone_map): Add 'future' system target_clones support.
1082 2020-06-08 Tobias Burnus <tobias@codesourcery.com>
1086 * omp-offload.c (add_decls_addresses_to_decl_constructor,
1087 omp_finish_file): Skip removed items.
1088 * lto-cgraph.c (output_offload_tables): Likewise; set force_output
1089 to this node for variables and functions.
1091 2020-06-08 Jason Merrill <jason@redhat.com>
1093 * aclocal.m4: Remove ax_cxx_compile_stdcxx.m4.
1094 * configure.ac: Remove AX_CXX_COMPILE_STDCXX.
1095 * configure: Regenerate.
1097 2020-06-08 Martin Sebor <msebor@redhat.com>
1099 * postreload.c (reload_cse_simplify_operands): Clear first array element
1100 before using it. Assert a precondition.
1102 2020-06-08 Jakub Jelinek <jakub@redhat.com>
1105 * tree-ssa-forwprop.c (simplify_vector_constructor): Don't use
1106 VEC_UNPACK*_EXPR or VEC_PACK_TRUNC_EXPR with scalar modes unless the
1107 type is vector boolean.
1109 2020-06-08 Tamar Christina <tamar.christina@arm.com>
1111 * config/aarch64/aarch64.c (aarch64_layout_frame): Expand comments.
1113 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1115 * config/arm/predicates.md (vfp_register_operand): Use VFP_HI_REGS
1116 instead of VFP_REGS.
1118 2020-06-08 Martin Liska <mliska@suse.cz>
1120 * config/rs6000/vector.md: Replace FAIL with gcc_unreachable
1121 in all vcond* patterns.
1123 2020-06-08 Christophe Lyon <christophe.lyon@linaro.org>
1125 * common/config/arm/arm-common.c (INCLUDE_ALGORITHM):
1126 Define. No longer include <algorithm>.
1128 2020-06-07 Roger Sayle <roger@nextmovesoftware.com>
1130 * config/i386/i386.md (paritydi2, paritysi2): Expand reduction
1131 via shift and xor to an USPEC PARITY matching a parityhi2_cmp.
1132 (paritydi2_cmp, paritysi2_cmp): Delete these define_insn_and_split.
1133 (parityhi2, parityqi2): New expanders.
1134 (parityhi2_cmp): Implement set parity flag with xorb insn.
1135 (parityqi2_cmp): Implement set parity flag with testb insn.
1136 New peephole2s to use these insns (UNSPEC PARITY) when appropriate.
1138 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1141 * config/rs6000/rs6000.c (rs6000_option_override_internal):
1142 Override flag_cunroll_grow_size.
1144 2020-06-07 Jiufu Guo <guojiufu@linux.ibm.com>
1146 * common.opt (flag_cunroll_grow_size): New flag.
1147 * toplev.c (process_options): Set flag_cunroll_grow_size.
1148 * tree-ssa-loop-ivcanon.c (pass_complete_unroll::execute):
1149 Use flag_cunroll_grow_size.
1151 2020-06-06 Jan Hubicka <hubicka@ucw.cz>
1154 * ipa-devirt.c (struct odr_enum_val): Turn values to wide_int.
1155 (ipa_odr_summary_write): Update streaming.
1156 (ipa_odr_read_section): Update streaming.
1158 2020-06-06 Alexandre Oliva <oliva@adacore.com>
1161 * gcc.c (do_spec_1): Don't call memcpy (_, NULL, 0).
1163 2020-06-05 Thomas Schwinge <thomas@codesourcery.com>
1164 Julian Brown <julian@codesourcery.com>
1166 * gimplify.c (gimplify_adjust_omp_clauses): Remove
1167 'GOMP_MAP_STRUCT' mapping from OpenACC 'exit data' directives.
1169 2020-06-05 Richard Biener <rguenther@suse.de>
1171 PR tree-optimization/95539
1172 * tree-vect-data-refs.c
1173 (vect_slp_analyze_and_verify_instance_alignment): Use
1174 SLP_TREE_REPRESENTATIVE for the data-ref check.
1175 * tree-vect-stmts.c (vectorizable_load): Reset stmt_info
1176 back to the first scalar stmt rather than the
1177 SLP_TREE_REPRESENTATIVE to match previous behavior.
1179 2020-06-05 Felix Yang <felix.yang@huawei.com>
1182 * expr.c (emit_move_insn): Check src and dest of the copy to see
1183 if one or both of them are subregs, try to remove the subregs when
1184 innermode and outermode are equal in size and the mode change involves
1185 an implicit round trip through memory.
1187 2020-06-05 Jakub Jelinek <jakub@redhat.com>
1190 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New
1191 define_insn_and_split patterns.
1192 (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New
1193 define_insn patterns.
1195 2020-06-05 Jonathan Wakely <jwakely@redhat.com>
1197 * alloc-pool.h (object_allocator::remove_raw): New.
1198 * tree-ssa-math-opts.c (struct occurrence): Use NSMDI.
1199 (occurrence::occurrence): Add.
1200 (occurrence::~occurrence): Likewise.
1201 (occurrence::new): Likewise.
1202 (occurrence::delete): Likewise.
1204 (insert_bb): Use new occurence (...) instead of occ_new.
1205 (register_division_in): Likewise.
1206 (free_bb): Use delete occ instead of manually removing
1209 2020-06-05 Richard Biener <rguenther@suse.de>
1212 * cfgexpand.c (expand_debug_expr): Avoid calling
1213 set_mem_attributes_minus_bitpos when we were expanding
1215 * emit-rtl.c (set_mem_attributes_minus_bitpos): Remove
1216 ARRAY_REF special-casing, add CONSTRUCTOR to the set of
1217 special-cases we do not want MEM_EXPRs for. Assert
1218 we end up with reasonable MEM_EXPRs.
1220 2020-06-05 Lili Cui <lili.cui@intel.com>
1223 * config/i386/i386.h (PTA_WAITPKG): Change bitmask value.
1225 2020-06-04 Martin Sebor <msebor@redhat.com>
1229 * attribs.c (init_attr_rdwr_indices): Move function here.
1230 * attribs.h (rdwr_access_hash, rdwr_map): Define.
1231 (attr_access): Add 'none'.
1232 (init_attr_rdwr_indices): Declared function.
1233 * builtins.c (warn_for_access)): New function.
1234 (check_access): Call it.
1235 * builtins.h (checK-access): Add an optional argument.
1236 * calls.c (rdwr_access_hash, rdwr_map): Move to attribs.h.
1237 (init_attr_rdwr_indices): Declare extern.
1238 (append_attrname): Handle attr_access::none.
1239 (maybe_warn_rdwr_sizes): Same.
1240 (initialize_argument_information): Update comments.
1241 * doc/extend.texi (attribute access): Document 'none'.
1242 * tree-ssa-uninit.c (struct wlimits): New.
1243 (maybe_warn_operand): New function.
1244 (maybe_warn_pass_by_reference): Same.
1245 (warn_uninitialized_vars): Refactor code into maybe_warn_operand.
1246 Also call for function calls.
1247 (pass_late_warn_uninitialized::execute): Adjust comments.
1248 (execute_early_warn_uninitialized): Same.
1250 2020-06-04 Vladimir Makarov <vmakarov@redhat.com>
1253 * lra.c (lra_emit_move): Add processing STRICT_LOW_PART.
1254 * lra-constraints.c (match_reload): Use STRICT_LOW_PART in output
1255 reload if the original insn has it too.
1257 2020-06-04 Richard Biener <rguenther@suse.de>
1259 * config/aarch64/aarch64.c (aarch64_gimplify_va_arg_expr):
1260 Ensure that tmp_ha is marked TREE_ADDRESSABLE.
1262 2020-06-04 Martin Jambor <mjambor@suse.cz>
1265 * tree-ssa-dce.c (mark_stmt_if_obviously_necessary): Move non-call
1266 exceptions check to...
1267 * tree-eh.c (stmt_unremovable_because_of_non_call_eh_p): ...this
1269 * tree-eh.h (stmt_unremovable_because_of_non_call_eh_p): Declare it.
1270 * ipa-sra.c (isra_track_scalar_value_uses): Use it. New parameter
1273 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1276 * config/arm/predicates.md (mve_scatter_memory): Define to
1277 match (mem (reg)) for scatter store memory.
1278 * config/arm/mve.md (mve_vstrbq_scatter_offset_<supf><mode>): Modify
1279 define_insn to define_expand.
1280 (mve_vstrbq_scatter_offset_p_<supf><mode>): Likewise.
1281 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
1282 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
1283 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
1284 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
1285 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
1286 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
1287 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
1288 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
1289 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
1290 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
1291 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
1292 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
1293 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
1294 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
1295 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
1296 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
1297 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
1298 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
1299 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
1300 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Define insn for scatter
1302 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
1303 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
1304 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
1305 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
1306 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
1307 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
1308 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
1309 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
1310 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
1311 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
1312 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
1313 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
1314 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
1315 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
1316 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
1317 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
1318 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
1319 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
1320 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
1321 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
1323 2020-06-04 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1325 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Correct the intrinsic
1327 (__arm_vbicq_n_s16): Likewise.
1328 (__arm_vbicq_n_u32): Likewise.
1329 (__arm_vbicq_n_s32): Likewise.
1330 (__arm_vbicq): Modify polymorphic variant.
1332 2020-06-04 Richard Biener <rguenther@suse.de>
1334 * tree-vectorizer.h (vect_get_slp_vect_def): Declare.
1335 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
1336 * tree-vect-stmts.c (vect_transform_stmt): Likewise.
1337 (vect_is_simple_use): Use SLP_TREE_REPRESENTATIVE.
1338 * tree-vect-slp.c (vect_get_slp_vect_defs): Fold into single
1340 (vect_get_slp_defs): ... here.
1341 (vect_get_slp_vect_def): New function.
1343 2020-06-04 Richard Biener <rguenther@suse.de>
1345 * tree-vectorizer.h (_slp_tree::lanes): New.
1346 (SLP_TREE_LANES): Likewise.
1347 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use it.
1348 (vectorizable_reduction): Likewise.
1349 (vect_transform_cycle_phi): Likewise.
1350 (vectorizable_induction): Likewise.
1351 (vectorizable_live_operation): Likewise.
1352 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize lanes.
1353 (vect_create_new_slp_node): Likewise.
1354 (slp_copy_subtree): Copy it.
1355 (vect_optimize_slp): Use it.
1356 (vect_slp_analyze_node_operations_1): Likewise.
1357 (vect_slp_convert_to_external): Likewise.
1358 (vect_bb_vectorization_profitable_p): Likewise.
1359 * tree-vect-stmts.c (vectorizable_load): Likewise.
1360 (get_vectype_for_scalar_type): Likewise.
1362 2020-06-04 Richard Biener <rguenther@suse.de>
1364 * tree-vect-slp.c (vect_update_all_shared_vectypes): Remove.
1365 (vect_build_slp_tree_2): Simplify building all external op
1367 (vect_slp_analyze_node_operations): Remove push/pop of
1368 STMT_VINFO_DEF_TYPE.
1369 (vect_schedule_slp_instance): Likewise.
1370 * tree-vect-stmts.c (ect_check_store_rhs): Pass in the
1371 stmt_info, use the vect_is_simple_use overload combining
1372 SLP and stmt_info analysis.
1373 (vect_is_simple_cond): Likewise.
1374 (vectorizable_store): Adjust.
1375 (vectorizable_condition): Likewise.
1376 (vect_is_simple_use): Fully handle invariant SLP nodes
1377 here. Amend stmt_info operand extraction with COND_EXPR
1379 * tree-vect-loop.c (vectorizable_reduction): Deal with
1380 COND_EXPR representation ugliness.
1382 2020-06-04 Hongtao Liu <hongtao.liu@inte.com>
1385 * config/i386/sse.md (*vcvtps2ph_store<merge_mask_name>):
1386 Refine from *vcvtps2ph_store<mask_name>.
1387 (vcvtps2ph256<mask_name>): Refine constraint from vm to v.
1388 (<mask_codefor>avx512f_vcvtps2ph512<mask_name>): Ditto.
1389 (*vcvtps2ph256<merge_mask_name>): New define_insn.
1390 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
1391 * config/i386/subst.md (merge_mask): New define_subst.
1392 (merge_mask_name): New define_subst_attr.
1393 (merge_mask_operand3): Ditto.
1395 2020-06-04 Hao Liu <hliu@os.amperecomputing.com>
1397 PR tree-optimization/89430
1399 (struct name_to_bb): Rename to ref_to_bb; add a new field exp;
1400 remove ssa_name_ver, store, offset fields.
1401 (struct ssa_names_hasher): Rename to refs_hasher; update functions.
1402 (class nontrapping_dom_walker): Rename m_seen_ssa_names to m_seen_refs.
1403 (nontrapping_dom_walker::add_or_mark_expr): Extend to support ARRAY_REFs
1406 2020-06-04 Andreas Schwab <schwab@suse.de>
1409 * config/ia64/ia64.h (ASM_OUTPUT_FDESC): Call assemble_external.
1411 2020-06-04 Hongtao.liu <hongtao.liu@intel.com>
1413 * config/i386/sse.md (pmov_dst_3_lower): New mode attribute.
1414 (trunc<mode><pmov_dst_3_lower>2): Refine from
1415 trunc<mode><pmov_dst_3>2.
1417 2020-06-03 Vitor Guidi <vitor.guidi@usp.br>
1419 * match.pd (tanh/sinh -> 1/cosh): New simplification.
1421 2020-06-03 Aaron Sawdey <acsawdey@linux.ibm.com>
1424 * config/rs6000/rs6000.c (is_stfs_insn): Rename to
1425 is_lfs_stfs_insn and make it recognize lfs as well.
1426 (prefixed_store_p): Use is_lfs_stfs_insn().
1427 (prefixed_load_p): Use is_lfs_stfs_insn() to recognize lfs.
1429 2020-06-03 Jan Hubicka <hubicka@ucw.cz>
1431 * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and
1433 (odr_enums): New static var.
1434 (struct odr_enum_val): New struct.
1435 (class odr_enum): New struct.
1436 (odr_enum_map): New hashtable.
1437 (odr_types_equivalent_p): Drop code testing TYPE_VALUES.
1438 (add_type_duplicate): Likewise.
1439 (free_odr_warning_data): Do not free TYPE_VALUES.
1440 (register_odr_enum): New function.
1441 (ipa_odr_summary_write): New function.
1442 (ipa_odr_read_section): New function.
1443 (ipa_odr_summary_read): New function.
1444 (class pass_ipa_odr): New pass.
1445 (make_pass_ipa_odr): New function.
1446 * ipa-utils.h (register_odr_enum): Declare.
1447 * lto-section-in.c: (lto_section_name): Add odr_types section.
1448 * lto-streamer.h (enum lto_section_type): Add odr_types section.
1449 * passes.def: Add odr_types pass.
1450 * lto-streamer-out.c (DFS::DFS_write_tree_body): Do not stream
1452 (hash_tree): Likewise.
1453 * tree-streamer-in.c (lto_input_ts_type_non_common_tree_pointers):
1455 * tree-streamer-out.c (write_ts_type_non_common_tree_pointers):
1457 * timevar.def (TV_IPA_ODR): New timervar.
1458 * tree-pass.h (make_pass_ipa_odr): Declare.
1459 * tree.c (free_lang_data_in_type): Regiser ODR types.
1461 2020-06-03 Romain Naour <romain.naour@gmail.com>
1463 * Makefile.in (SELFTEST_DEPS): Move before including language makefile
1466 2020-06-03 Richard Biener <rguenther@suse.de>
1468 PR tree-optimization/95487
1469 * tree-vect-stmts.c (vectorizable_store): Use a truth type
1470 for the scatter mask.
1472 2020-06-03 Richard Biener <rguenther@suse.de>
1474 PR tree-optimization/95495
1475 * tree-vect-slp.c (vect_slp_analyze_node_operations): Use
1476 SLP_TREE_REPRESENTATIVE in the shift assertion.
1478 2020-06-03 Tom Tromey <tromey@adacore.com>
1480 * spellcheck.c (CASE_COST): New define.
1481 (BASE_COST): New define.
1482 (get_edit_distance): Recognize case changes.
1483 (get_edit_distance_cutoff): Update.
1484 (test_edit_distances): Update.
1485 (get_old_cutoff): Update.
1486 (test_find_closest_string): Add case sensitivity test.
1488 2020-06-03 Richard Biener <rguenther@suse.de>
1490 * tree-vect-slp.c (vect_bb_vectorization_profitable_p): Loop over
1491 the cost vector to unset the visited flag on stmts.
1493 2020-06-03 Tobias Burnus <tobias@codesourcery.com>
1495 * gimplify.c (omp_notice_variable): Use new hook.
1496 * langhooks-def.h (lhd_omp_predetermined_mapping): Declare.
1497 (LANG_HOOKS_OMP_PREDETERMINED_MAPPING): Define
1498 (LANG_HOOKS_DECLS): Add it.
1499 * langhooks.c (lhd_omp_predetermined_sharing): Remove bogus unused attr.
1500 (lhd_omp_predetermined_mapping): New.
1501 * langhooks.h (struct lang_hooks_for_decls): Add new hook.
1503 2020-06-03 Jan Hubicka <jh@suse.cz>
1505 * lto-streamer.h (LTO_tags): Reorder so frequent tags has small indexes;
1506 add LTO_first_tree_tag and LTO_first_gimple_tag.
1507 (lto_tag_is_tree_code_p): Update.
1508 (lto_tag_is_gimple_code_p): Update.
1509 (lto_gimple_code_to_tag): Update.
1510 (lto_tag_to_gimple_code): Update.
1511 (lto_tree_code_to_tag): Update.
1512 (lto_tag_to_tree_code): Update.
1514 2020-06-02 Felix Yang <felix.yang@huawei.com>
1517 * config/aarch64/aarch64.c (aarch64_short_vector_p):
1518 Leave later code to report an error if SVE is disabled.
1520 2020-06-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1522 * config/aarch64/aarch64-cores.def (zeus): Define.
1523 * config/aarch64/aarch64-tune.md: Regenerate.
1524 * doc/invoke.texi (AArch64 Options): Document zeus -mcpu option.
1526 2020-06-02 Aaron Sawdey <acsawdey@linux.ibm.com>
1529 * config/rs6000/rs6000.c (prefixed_store_p): Add special case
1531 (is_stfs_insn): New helper function.
1533 2020-06-02 Jan Hubicka <jh@suse.cz>
1535 * lto-streamer-in.c (stream_read_tree_ref): Simplify streaming of
1537 * lto-streamer-out.c (stream_write_tree_ref): Likewise.
1539 2020-06-02 Andrew Stubbs <ams@codesourcery.com>
1541 * config/gcn/gcn-hsa.h (CC1_SPEC): Delete.
1542 * config/gcn/gcn.opt (-mlocal-symbol-id): Delete.
1543 * config/gcn/mkoffload.c (main): Don't use -mlocal-symbol-id.
1545 2020-06-02 Eric Botcazou <ebotcazou@gcc.gnu.org>
1548 * optabs.c (expand_unop): Fix bits/bytes confusion in latest change.
1549 * tree-pretty-print.c (dump_generic_node) <ARRAY_TYPE>: Print quals.
1551 2020-06-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1553 * config/s390/s390.c (print_operand): Emit vector alignment
1556 2020-06-02 Martin Liska <mliska@suse.cz>
1558 * coverage.c (get_coverage_counts): Skip sanity check for TOP N counters
1559 as they have variable number of counters.
1560 * gcov-dump.c (main): Add new option -r.
1561 (print_usage): Likewise.
1562 (tag_counters): All new raw format.
1563 * gcov-io.h (struct gcov_kvp): New.
1564 (GCOV_TOPN_VALUES): Remove.
1565 (GCOV_TOPN_VALUES_COUNTERS): Likewise.
1566 (GCOV_TOPN_MEM_COUNTERS): New.
1567 (GCOV_TOPN_DISK_COUNTERS): Likewise.
1568 (GCOV_TOPN_MAXIMUM_TRACKED_VALUES): Likewise.
1569 * ipa-profile.c (ipa_profile_generate_summary): Use
1570 GCOV_TOPN_MAXIMUM_TRACKED_VALUES.
1571 (ipa_profile_write_edge_summary): Likewise.
1572 (ipa_profile_read_edge_summary): Likewise.
1573 (ipa_profile): Remove usage of GCOV_TOPN_VALUES.
1574 * profile.c (sort_hist_values): Sort variable number
1576 (compute_value_histograms): Special case for TOP N counters
1577 that have dynamic number of key-value pairs.
1578 * value-prof.c (dump_histogram_value): Dump variable number
1580 (stream_in_histogram_value): Stream in variable number
1581 of key-value pairs for TOP N counter.
1582 (get_nth_most_common_value): Deal with variable number
1584 (dump_ic_profile): Use GCOV_TOPN_MAXIMUM_TRACKED_VALUES
1586 (gimple_find_values_to_profile): Set GCOV_TOPN_MEM_COUNTERS
1588 * doc/gcov-dump.texi: Document new -r option.
1590 2020-06-02 Iain Buclaw <ibuclaw@gdcproject.org>
1593 * config.gcc (arm-wrs-vxworks7*): Set default cpu to generic-armv7-a.
1595 2020-06-01 Jeff Law <law@torsion.usersys.redhat.com>
1597 * lower-subreg.c (resolve_simple_move): If simplify_gen_subreg_concatn
1598 returns (const_int 0) for the destination, then emit nothing.
1600 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
1602 * lto-streamer.h (enum LTO_tags): Remove LTO_field_decl_ref,
1603 LTO_function_decl_ref, LTO_label_decl_ref, LTO_namespace_decl_ref,
1604 LTO_result_decl_ref, LTO_type_decl_ref, LTO_type_ref,
1605 LTO_const_decl_ref, LTO_imported_decl_ref,
1606 LTO_translation_unit_decl_ref, LTO_global_decl_ref and
1607 LTO_namelist_decl_ref; add LTO_global_stream_ref.
1608 * lto-streamer-in.c (lto_input_tree_ref): Simplify.
1609 (lto_input_scc): Update.
1610 (lto_input_tree_1): Update.
1611 * lto-streamer-out.c (lto_indexable_tree_ref): Simlify.
1612 * lto-streamer.c (lto_tag_name): Update.
1614 2020-06-01 Jan Hubicka <hubicka@ucw.cz>
1616 * ipa-reference.c (stream_out_bitmap): Use lto_output_var_decl_ref.
1617 (ipa_reference_read_optimization_summary): Use lto_intput_var_decl_ref.
1618 * lto-cgraph.c (lto_output_node): Likewise.
1619 (lto_output_varpool_node): Likewise.
1620 (output_offload_tables): Likewise.
1621 (input_node): Likewise.
1622 (input_varpool_node): Likewise.
1623 (input_offload_tables): Likewise.
1624 * lto-streamer-in.c (lto_input_tree_ref): Declare.
1625 (lto_input_var_decl_ref): Declare.
1626 (lto_input_fn_decl_ref): Declare.
1627 * lto-streamer-out.c (lto_indexable_tree_ref): Use only one decl stream.
1628 (lto_output_var_decl_index): Rename to ..
1629 (lto_output_var_decl_ref): ... this.
1630 (lto_output_fn_decl_index): Rename to ...
1631 (lto_output_fn_decl_ref): ... this.
1632 * lto-streamer.h (enum lto_decl_stream_e_t): Remove per-type streams.
1633 (DEFINE_DECL_STREAM_FUNCS): Remove.
1634 (lto_output_var_decl_index): Remove.
1635 (lto_output_fn_decl_index): Remove.
1636 (lto_output_var_decl_ref): Declare.
1637 (lto_output_fn_decl_ref): Declare.
1638 (lto_input_var_decl_ref): Declare.
1639 (lto_input_fn_decl_ref): Declare.
1641 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
1643 * cgraphclones.c (materialize_all_clones): Adjust replace map dump.
1644 * ipa-param-manipulation.c (ipa_dump_adjusted_parameters): Do not
1645 dump infomation if there is no adjusted parameter.
1646 * (ipa_param_adjustments::dump): Adjust prefix spaces for dump string.
1648 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1650 * Makefile.in (gimple-array-bounds.o): New.
1651 * tree-vrp.c: Move array bounds code...
1652 * gimple-array-bounds.cc: ...here...
1653 * gimple-array-bounds.h: ...and here.
1655 2020-06-01 Aldy Hernandez <aldyh@redhat.com>
1657 * Makefile.in (OBJS): Add value-range-equiv.o.
1658 * tree-vrp.c (*value_range_equiv*): Move to...
1659 * value-range-equiv.cc: ...here.
1660 * tree-vrp.h (class value_range_equiv): Move to...
1661 * value-range-equiv.h: ...here.
1662 * vr-values.h: Include value-range-equiv.h.
1664 2020-06-01 Feng Xue <fxue@os.amperecomputing.com>
1667 * ipa-cp.c (propagate_aggs_across_jump_function): Check aggregate
1668 lattice for simple pass-through by-ref argument.
1670 2020-05-31 Jeff Law <law@redhat.com>
1672 * lra.c (add_auto_inc_notes): Remove function.
1673 * reload1.c (add_auto_inc_notes): Similarly. Move into...
1674 * rtlanal.c (add_auto_inc_notes): New function.
1675 * rtl.h (add_auto_inc_notes): Add prototype.
1676 * recog.c (peep2_attempt): Scan and add REG_INC notes to new insns
1679 2020-05-31 Jan Hubicka <jh@suse.cz>
1681 * lto-section-out.c (lto_output_decl_index): Remove.
1682 (lto_output_field_decl_index): Move to lto-streamer-out.c
1683 (lto_output_fn_decl_index): Move to lto-streamer-out.c
1684 (lto_output_namespace_decl_index): Remove.
1685 (lto_output_var_decl_index): Remove.
1686 (lto_output_type_decl_index): Remove.
1687 (lto_output_type_ref_index): Remove.
1688 * lto-streamer-out.c (output_type_ref): Remove.
1689 (lto_get_index): New function.
1690 (lto_output_tree_ref): Remove.
1691 (lto_indexable_tree_ref): New function.
1692 (lto_output_var_decl_index): Move here from lto-section-out.c; simplify.
1693 (lto_output_fn_decl_index): Move here from lto-section-out.c; simplify.
1694 (stream_write_tree_ref): Update.
1695 (lto_output_tree): Update.
1696 * lto-streamer.h (lto_output_decl_index): Remove prototype.
1697 (lto_output_field_decl_index): Remove prototype.
1698 (lto_output_namespace_decl_index): Remove prototype.
1699 (lto_output_type_decl_index): Remove prototype.
1700 (lto_output_type_ref_index): Remove prototype.
1701 (lto_output_var_decl_index): Move.
1702 (lto_output_fn_decl_index): Move
1704 2020-05-31 Jakub Jelinek <jakub@redhat.com>
1707 * expr.c (store_expr): For shortedned_string_cst, ensure temp has
1710 2020-05-31 Jeff Law <law@redhat.com>
1712 * config/h8300/jumpcall.md (brabs, brabc): Disable patterns.
1714 2020-05-31 Jim Wilson <jimw@sifive.com>
1716 * config/riscv/riscv.md (zero_extendsidi2_shifted): New.
1718 2020-05-30 Jonathan Yong <10walls@gmail.com>
1720 * config/i386/mingw32.h (REAL_LIBGCC_SPEC): Insert -lkernel32
1721 after -lmsvcrt. This is necessary as libmsvcrt.a is not a pure
1722 import library, but also contains some functions that invoke
1723 others in KERNEL32.DLL.
1725 2020-05-29 Segher Boessenkool <segher@kernel.crashing.org>
1727 * config/rs6000/altivec.md (altivec_vmrghw_direct): Prefer VSX form.
1728 (altivec_vmrglw_direct): Ditto.
1729 (altivec_vperm_<mode>_direct): Ditto.
1730 (altivec_vperm_v8hiv16qi): Ditto.
1731 (*altivec_vperm_<mode>_uns_internal): Ditto.
1732 (*altivec_vpermr_<mode>_internal): Ditto.
1733 (vperm_v8hiv4si): Ditto.
1734 (vperm_v16qiv8hi): Ditto.
1736 2020-05-29 Jan Hubicka <jh@suse.cz>
1738 * lto-streamer-in.c (streamer_read_chain): Move here from
1740 (stream_read_tree_ref): New.
1741 (lto_input_tree_1): Simplify.
1742 * lto-streamer-out.c (stream_write_tree_ref): New.
1743 (lto_write_tree_1): Simplify.
1744 (lto_output_tree_1): Simplify.
1745 (DFS::DFS_write_tree): Simplify.
1746 (streamer_write_chain): Move here from tree-stremaer-out.c.
1747 * lto-streamer.h (lto_output_tree_ref): Update prototype.
1748 (stream_read_tree_ref): Declare
1749 (stream_write_tree_ref): Declare
1750 * tree-streamer-in.c (streamer_read_chain): Update to use
1751 stream_read_tree_ref.
1752 (lto_input_ts_common_tree_pointers): Likewise.
1753 (lto_input_ts_vector_tree_pointers): Likewise.
1754 (lto_input_ts_poly_tree_pointers): Likewise.
1755 (lto_input_ts_complex_tree_pointers): Likewise.
1756 (lto_input_ts_decl_minimal_tree_pointers): Likewise.
1757 (lto_input_ts_decl_common_tree_pointers): Likewise.
1758 (lto_input_ts_decl_with_vis_tree_pointers): Likewise.
1759 (lto_input_ts_field_decl_tree_pointers): Likewise.
1760 (lto_input_ts_function_decl_tree_pointers): Likewise.
1761 (lto_input_ts_type_common_tree_pointers): Likewise.
1762 (lto_input_ts_type_non_common_tree_pointers): Likewise.
1763 (lto_input_ts_list_tree_pointers): Likewise.
1764 (lto_input_ts_vec_tree_pointers): Likewise.
1765 (lto_input_ts_exp_tree_pointers): Likewise.
1766 (lto_input_ts_block_tree_pointers): Likewise.
1767 (lto_input_ts_binfo_tree_pointers): Likewise.
1768 (lto_input_ts_constructor_tree_pointers): Likewise.
1769 (lto_input_ts_omp_clause_tree_pointers): Likewise.
1770 * tree-streamer-out.c (streamer_write_chain): Update to use
1771 stream_write_tree_ref.
1772 (write_ts_common_tree_pointers): Likewise.
1773 (write_ts_vector_tree_pointers): Likewise.
1774 (write_ts_poly_tree_pointers): Likewise.
1775 (write_ts_complex_tree_pointers): Likewise.
1776 (write_ts_decl_minimal_tree_pointers): Likewise.
1777 (write_ts_decl_common_tree_pointers): Likewise.
1778 (write_ts_decl_non_common_tree_pointers): Likewise.
1779 (write_ts_decl_with_vis_tree_pointers): Likewise.
1780 (write_ts_field_decl_tree_pointers): Likewise.
1781 (write_ts_function_decl_tree_pointers): Likewise.
1782 (write_ts_type_common_tree_pointers): Likewise.
1783 (write_ts_type_non_common_tree_pointers): Likewise.
1784 (write_ts_list_tree_pointers): Likewise.
1785 (write_ts_vec_tree_pointers): Likewise.
1786 (write_ts_exp_tree_pointers): Likewise.
1787 (write_ts_block_tree_pointers): Likewise.
1788 (write_ts_binfo_tree_pointers): Likewise.
1789 (write_ts_constructor_tree_pointers): Likewise.
1790 (write_ts_omp_clause_tree_pointers): Likewise.
1791 (streamer_write_tree_body): Likewise.
1792 (streamer_write_integer_cst): Likewise.
1793 * tree-streamer.h (streamer_read_chain):Declare.
1794 (streamer_write_chain):Declare.
1795 (streamer_write_tree_body): Update prototype.
1796 (streamer_write_integer_cst): Update prototype.
1798 2020-05-29 H.J. Lu <hjl.tools@gmail.com>
1801 * configure: Regenerated.
1803 2020-05-29 Andrew Stubbs <ams@codesourcery.com>
1805 * config/gcn/gcn-valu.md (add<mode>3_vcc_zext_dup): Add early clobber.
1806 (add<mode>3_vcc_zext_dup_exec): Likewise.
1807 (add<mode>3_vcc_zext_dup2): Likewise.
1808 (add<mode>3_vcc_zext_dup2_exec): Likewise.
1810 2020-05-29 Richard Biener <rguenther@suse.de>
1812 PR tree-optimization/95272
1813 * tree-vectorizer.h (_slp_tree::representative): Add.
1814 (SLP_TREE_REPRESENTATIVE): Likewise.
1815 * tree-vect-loop.c (vectorizable_reduction): Adjust SLP
1817 (vectorizable_live_operation): Use the representative to
1818 attach the reduction info to.
1819 * tree-vect-slp.c (_slp_tree::_slp_tree): Initialize
1820 SLP_TREE_REPRESENTATIVE.
1821 (vect_create_new_slp_node): Likewise.
1822 (slp_copy_subtree): Copy it.
1823 (vect_slp_rearrange_stmts): Re-arrange even COND_EXPR stmts.
1824 (vect_slp_analyze_node_operations_1): Pass the representative
1825 to vect_analyze_stmt.
1826 (vect_schedule_slp_instance): Pass the representative to
1827 vect_transform_stmt.
1829 2020-05-29 Richard Biener <rguenther@suse.de>
1831 PR tree-optimization/95356
1832 * tree-vect-stmts.c (vectorizable_shift): Do in-place SLP
1833 node hacking during analysis.
1835 2020-05-29 Jan Hubicka <hubicka@ucw.cz>
1838 * lto-streamer-out.c (lto_output_tree): Disable redundant streaming.
1840 2020-05-29 Richard Biener <rguenther@suse.de>
1842 PR tree-optimization/95403
1843 * tree-vect-stmts.c (vect_init_vector_1): Guard against NULL
1846 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1849 * omp-general.c (omp_resolve_declare_variant): Fix up addition of
1850 declare variant cgraph node removal callback.
1852 2020-05-29 Jakub Jelinek <jakub@redhat.com>
1855 * expr.c (store_expr): If expr_size is constant and significantly
1856 larger than TREE_STRING_LENGTH, set temp to just the
1857 TREE_STRING_LENGTH portion of the STRING_CST.
1859 2020-05-29 Richard Biener <rguenther@suse.de>
1861 PR tree-optimization/95393
1862 * tree-ssa-phiopt.c (minmax_replacement): Use gimple_build
1863 to build the min/max expression so we simplify cases like
1864 MAX(0, s) immediately.
1866 2020-05-29 Joe Ramsay <joe.ramsay@arm.com>
1868 * config/aarch64/aarch64-sve.md (<LOGICAL:optab><mode>3): Add support
1869 for unpacked EOR, ORR, AND.
1871 2020-05-28 Nicolas Bértolo <nicolasbertolo@gmail.com>
1873 * Makefile.in: don't look for libiberty in the "pic" subdirectory
1874 when building for Mingw. Add dependency on xgcc with the proper
1877 2020-05-28 Jeff Law <law@redhat.com>
1879 * config/h8300/logical.md (bclrhi_msx): Remove pattern.
1881 2020-05-28 Jeff Law <law@redhat.com>
1883 * config/h8300/logical.md (HImode H8/SX bit-and splitter): Don't
1884 make a nonzero adjustment to the memory offset.
1885 (b<ior,xor>hi_msx): Turn into a splitter.
1887 2020-05-28 Eric Botcazou <ebotcazou@gcc.gnu.org>
1889 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
1890 Fix off-by-one error.
1892 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1894 * config/aarch64/aarch64.h (aarch64_frame): Add a comment above
1895 wb_candidate1 and wb_candidate2.
1896 * config/aarch64/aarch64.c (aarch64_layout_frame): Invalidate
1897 wb_candidate1 and wb_candidate2 if we decided not to use them.
1899 2020-05-28 Richard Sandiford <richard.sandiford@arm.com>
1902 * config/aarch64/aarch64.c (aarch64_expand_epilogue): Assert that
1903 we have at least some CFI operations when using a frame pointer.
1904 Only redefine the CFA if we have CFI operations.
1906 2020-05-28 Richard Biener <rguenther@suse.de>
1908 * tree-vect-slp.c (vect_prologue_cost_for_slp): Remove
1909 case for !SLP_TREE_VECTYPE.
1910 (vect_slp_analyze_node_operations): Adjust.
1912 2020-05-28 Richard Biener <rguenther@suse.de>
1914 * tree-vectorizer.h (_slp_tree::vec_defs): Add.
1915 (SLP_TREE_VEC_DEFS): Likewise.
1916 * tree-vect-slp.c (_slp_tree::_slp_tree): Adjust.
1917 (_slp_tree::~_slp_tree): Likewise.
1918 (vect_mask_constant_operand_p): Remove unused function.
1919 (vect_get_constant_vectors): Rename to...
1920 (vect_create_constant_vectors): ... this. Take the
1921 invariant node as argument and code generate it. Remove
1922 dead code, remove temporary asserts. Pass a NULL stmt_info
1923 to vect_init_vector.
1924 (vect_get_slp_defs): Simplify.
1925 (vect_schedule_slp_instance): Code-generate externals and
1926 invariants using vect_create_constant_vectors.
1928 2020-05-28 Richard Biener <rguenther@suse.de>
1930 * tree-vect-stmts.c (vect_finish_stmt_generation_1):
1931 Conditionalize stmt_info use, assert the new stmt cannot throw
1933 (vect_finish_stmt_generation): Adjust assert.
1935 2020-05-28 Richard Biener <rguenther@suse.de>
1937 PR tree-optimization/95273
1938 PR tree-optimization/95356
1939 * tree-vect-stmts.c (vectorizable_shift): Adjust when and to
1940 what we set the vector type of the shift operand SLP node
1943 2020-05-28 Andrea Corallo <andrea.corallo@arm.com>
1945 * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted
1948 2020-05-28 Martin Liska <mliska@suse.cz>
1951 * doc/invoke.texi: Add missing params, remove max-once-peeled-insns and
1952 rename ipcp-unit-growth to ipa-cp-unit-growth.
1954 2020-05-28 Hongtao Liu <hongtao.liu@intel.com>
1956 * config/i386/sse.md (*avx512vl_<code>v2div2qi2_store_1): Rename
1957 from *avx512vl_<code>v2div2qi_store and refine memory size of
1959 (*avx512vl_<code>v2div2qi2_mask_store_1): Ditto.
1960 (*avx512vl_<code><mode>v4qi2_store_1): Ditto.
1961 (*avx512vl_<code><mode>v4qi2_mask_store_1): Ditto.
1962 (*avx512vl_<code><mode>v8qi2_store_1): Ditto.
1963 (*avx512vl_<code><mode>v8qi2_mask_store_1): Ditto.
1964 (*avx512vl_<code><mode>v4hi2_store_1): Ditto.
1965 (*avx512vl_<code><mode>v4hi2_mask_store_1): Ditto.
1966 (*avx512vl_<code>v2div2hi2_store_1): Ditto.
1967 (*avx512vl_<code>v2div2hi2_mask_store_1): Ditto.
1968 (*avx512vl_<code>v2div2si2_store_1): Ditto.
1969 (*avx512vl_<code>v2div2si2_mask_store_1): Ditto.
1970 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1971 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1972 (*avx512vl_<code>v2div2qi2_store_2): New define_insn_and_split.
1973 (*avx512vl_<code>v2div2qi2_mask_store_2): Ditto.
1974 (*avx512vl_<code><mode>v4qi2_store_2): Ditto.
1975 (*avx512vl_<code><mode>v4qi2_mask_store_2): Ditto.
1976 (*avx512vl_<code><mode>v8qi2_store_2): Ditto.
1977 (*avx512vl_<code><mode>v8qi2_mask_store_2): Ditto.
1978 (*avx512vl_<code><mode>v4hi2_store_2): Ditto.
1979 (*avx512vl_<code><mode>v4hi2_mask_store_2): Ditto.
1980 (*avx512vl_<code>v2div2hi2_store_2): Ditto.
1981 (*avx512vl_<code>v2div2hi2_mask_store_2): Ditto.
1982 (*avx512vl_<code>v2div2si2_store_2): Ditto.
1983 (*avx512vl_<code>v2div2si2_mask_store_2): Ditto.
1984 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1985 (*avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1986 * config/i386/i386-builtin-types.def: Adjust builtin type.
1987 * config/i386/i386-expand.c: Ditto.
1988 * config/i386/i386-builtin.def: Adjust builtin.
1989 * config/i386/avx512fintrin.h: Ditto.
1990 * config/i386/avx512vlbwintrin.h: Ditto.
1991 * config/i386/avx512vlintrin.h: Ditto.
1993 2020-05-28 Dong JianQiang <dongjianqiang2@huawei.com>
1995 PR gcov-profile/95332
1996 * gcov-io.c (gcov_var::endian): Move field.
1997 (from_file): Add IN_GCOV_TOOL check.
1998 * gcov-io.h (gcov_magic): Ditto.
2000 2020-05-28 Max Filippov <jcmvbkbc@gmail.com>
2002 * config/xtensa/xtensa.c (xtensa_delegitimize_address): New
2004 (TARGET_DELEGITIMIZE_ADDRESS): New macro.
2006 2020-05-27 Eric Botcazou <ebotcazou@gcc.gnu.org>
2008 * builtin-types.def (BT_UINT128): New primitive type.
2009 (BT_FN_UINT128_UINT128): New function type.
2010 * builtins.def (BUILT_IN_BSWAP128): New GCC builtin.
2011 * doc/extend.texi (__builtin_bswap128): Document it.
2012 * builtins.c (expand_builtin): Deal with BUILT_IN_BSWAP128.
2013 (is_inexpensive_builtin): Likewise.
2014 * fold-const-call.c (fold_const_call_ss): Likewise.
2015 * fold-const.c (tree_call_nonnegative_warnv_p): Likewise.
2016 * tree-ssa-ccp.c (evaluate_stmt): Likewise.
2017 * tree-vect-stmts.c (vect_get_data_ptr_increment): Likewise.
2018 (vectorizable_call): Likewise.
2019 * optabs.c (expand_unop): Always use the double word path for it.
2020 * tree-core.h (enum tree_index): Add TI_UINT128_TYPE.
2021 * tree.h (uint128_type_node): New global type.
2022 * tree.c (build_common_tree_nodes): Build it if TImode is supported.
2024 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2026 * config/i386/mmx.md (*mmx_haddv2sf3): Remove SSE alternatives.
2027 (mmx_hsubv2sf3): Ditto.
2028 (mmx_haddsubv2sf3): New expander.
2029 (*mmx_haddsubv2sf3): Rename from mmx_addsubv2sf3. Correct
2030 RTL template to model horizontal subtraction and addition.
2031 * config/i386/i386-builtin.def (IX86_BUILTIN_PFPNACC):
2034 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2037 * config/i386/sse.md
2038 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>):
2039 Remove %q operand modifier from insn template.
2040 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
2042 2020-05-27 Uroš Bizjak <ubizjak@gmail.com>
2044 * config/i386/mmx.md (mmx_pswapdsf2): Add SSE alternatives.
2045 Enable insn pattern for TARGET_MMX_WITH_SSE.
2046 (*mmx_movshdup): New insn pattern.
2047 (*mmx_movsldup): Ditto.
2048 (*mmx_movss): Ditto.
2049 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2051 (expand_vec_perm_movs): Handle E_V2SFmode.
2052 (expand_vec_perm_even_odd): Ditto.
2053 (expand_vec_perm_broadcast_1): Assert that E_V2SFmode
2054 is already handled by standard shuffle patterns.
2056 2020-05-27 Richard Biener <rguenther@suse.de>
2058 PR tree-optimization/95295
2059 * tree-ssa-loop-im.c (sm_seq_valid_bb): Fix sinking after
2060 merging stores from paths.
2062 2020-05-27 Richard Biener <rguenther@suse.de>
2064 PR tree-optimization/95356
2065 * tree-vect-stmts.c (vectorizable_shift): Adjust vector
2066 type for the shift operand.
2068 2020-05-27 Richard Biener <rguenther@suse.de>
2070 PR tree-optimization/95335
2071 * tree-vect-slp.c (vect_slp_analyze_node_operations): Reset
2072 lvisited for nodes made external.
2074 2020-05-27 Richard Biener <rguenther@suse.de>
2076 * dump-context.h (debug_dump_context): New class.
2077 (dump_context): Make it friend.
2078 * dumpfile.c (debug_dump_context::debug_dump_context):
2080 (debug_dump_context::~debug_dump_context): Likewise.
2081 * tree-vect-slp.c: Include dump-context.h.
2082 (vect_print_slp_tree): Dump a single SLP node.
2083 (debug): New overload for slp_tree.
2084 (vect_print_slp_graph): Rename from vect_print_slp_tree and
2086 (vect_analyze_slp_instance): Adjust.
2088 2020-05-27 Jakub Jelinek <jakub@redhat.com>
2091 * omp-general.c (omp_declare_variant_remove_hook): New function.
2092 (omp_resolve_declare_variant): Always return base if it is already
2093 declare_variant_alt magic decl itself. Register
2094 omp_declare_variant_remove_hook as cgraph node removal hook.
2096 2020-05-27 Jeff Law <law@redhat.com>
2098 * config/h8300/testcompare.md (tst_extzv_1_n): Do not accept constants
2099 for the primary input operand.
2100 (tstsi_variable_bit_qi): Similarly.
2102 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2104 * config/i386/mmx.md (mmx_pswapdv2si2): Add SSE2 alternative.
2106 2020-05-26 Tobias Burnus <tobias@codesourcery.com>
2109 * ipa-utils.h (odr_type_p): Also permit calls with
2110 only flag_generate_offload set.
2112 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2114 * gcc.c (validate_switches): Add braced parameter. Adjust all
2115 callers. Expected and skip trailing brace only if braced.
2116 Return after handling one atom otherwise.
2117 (DUMPS_OPTIONS): New.
2118 (cpp_debug_options): Define in terms of it.
2120 2020-05-26 Richard Biener <rguenther@suse.de>
2122 PR tree-optimization/95327
2123 * tree-vect-stmts.c (vectorizable_shift): Compute op1_vectype
2124 when we are not using a scalar shift.
2126 2020-05-26 Uroš Bizjak <ubizjak@gmail.com>
2128 * config/i386/mmx.md (*mmx_pshufd_1): New insn pattern.
2129 * config/i386/i386-expand.c (ix86_vectorize_vec_perm_const):
2130 Handle E_V2SImode and E_V4HImode.
2131 (expand_vec_perm_even_odd_1): Handle E_V4HImode.
2132 Assert that E_V2SImode is already handled.
2133 (expand_vec_perm_broadcast_1): Assert that E_V2SImode
2134 is already handled by standard shuffle patterns.
2136 2020-05-26 Jan Hubicka <jh@suse.cz>
2138 * tree.c (free_lang_data_in_type): Simpify types of TYPE_VALUES in
2141 2020-05-26 Jakub Jelinek <jakub@redhat.com>
2144 * gimplify.c (find_combined_omp_for): Move to omp-general.c.
2145 * omp-general.h (find_combined_omp_for): Declare.
2146 * omp-general.c: Include tree-iterator.h.
2147 (find_combined_omp_for): New function, moved from gimplify.c.
2149 2020-05-26 Alexandre Oliva <oliva@adacore.com>
2151 * common.opt (aux_base_name): Define.
2152 (dumpbase, dumpdir): Mark as Driver options.
2153 (-dumpbase, -dumpdir): Likewise.
2154 (dumpbase-ext, -dumpbase-ext): New.
2155 (auxbase, auxbase-strip): Drop.
2156 * doc/invoke.texi (-dumpbase, -dumpbase-ext, -dumpdir):
2158 (-o): Introduce the notion of primary output, mention it
2159 influences auxiliary and dump output names as well, add
2161 (-save-temps): Adjust, move examples into -dump*.
2162 (-save-temps=cwd, -save-temps=obj): Likewise.
2163 (-fdump-final-insns): Adjust.
2164 * dwarf2out.c (gen_producer_string): Drop auxbase and
2165 auxbase_strip; add dumpbase_ext.
2166 * gcc.c (enum save_temps): Add SAVE_TEMPS_DUMP.
2167 (save_temps_prefix, save_temps_length): Drop.
2168 (save_temps_overrides_dumpdir): New.
2169 (dumpdir, dumpbase, dumpbase_ext): New.
2170 (dumpdir_length, dumpdir_trailing_dash_added): New.
2171 (outbase, outbase_length): New.
2172 (The Specs Language): Introduce %". Adjust %b and %B.
2173 (ASM_FINAL_SPEC): Use %b.dwo for an aux output name always.
2174 Precede object file with %w when it's the primary output.
2175 (cpp_debug_options): Do not pass on incoming -dumpdir,
2176 -dumpbase and -dumpbase-ext options; recompute them with
2178 (cc1_options): Drop auxbase with and without compare-debug;
2179 use cpp_debug_options instead of dumpbase. Mark asm output
2180 with %w when it's the primary output.
2181 (static_spec_functions): Drop %:compare-debug-auxbase-opt and
2182 %:replace-exception. Add %:dumps.
2183 (driver_handle_option): Implement -save-temps=*/-dumpdir
2184 mutual overriding logic. Save dumpdir, dumpbase and
2185 dumpbase-ext options. Do not save output_file in
2187 (adds_single_suffix_p): New.
2188 (single_input_file_index): New.
2189 (process_command): Combine output dir, output base name, and
2190 dumpbase into dumpdir and outbase.
2191 (set_collect_gcc_options): Pass a possibly-adjusted -dumpdir.
2192 (do_spec_1): Optionally dumpdir instead of save_temps_prefix,
2193 and outbase instead of input_basename in %b, %B and in
2194 -save-temps aux files. Handle empty argument %".
2195 (driver::maybe_run_linker): Adjust dumpdir and auxbase.
2196 (compare_debug_dump_opt_spec_function): Adjust gkd dump file
2197 naming. Spec-quote the computed -fdump-final-insns file name.
2198 (debug_auxbase_opt): Drop.
2199 (compare_debug_self_opt_spec_function): Drop auxbase-strip
2201 (compare_debug_auxbase_opt_spec_function): Drop.
2202 (not_actual_file_p): New.
2203 (replace_extension_spec_func): Drop.
2204 (dumps_spec_func): New.
2205 (convert_white_space): Split-out parts into...
2206 (quote_string, whitespace_to_convert_p): ... these. New.
2207 (quote_spec_char_p, quote_spec, quote_spec_arg): New.
2208 (driver::finalize): Release and reset new variables; drop
2210 * lto-wrapper.c (HAVE_TARGET_EXECUTABLE_SUFFIX): Define if...
2211 (TARGET_EXECUTABLE_SUFFIX): ... is defined; define this to the
2212 empty string otherwise.
2213 (DUMPBASE_SUFFIX): Drop leading period.
2214 (debug_objcopy): Use concat.
2215 (run_gcc): Recognize -save-temps=* as -save-temps too. Obey
2216 -dumpdir. Pass on empty dumpdir and dumpbase with a directory
2217 component. Simplify temp file names.
2218 * opts.c (finish_options): Drop aux base name handling.
2219 (common_handle_option): Drop auxbase-strip handling.
2220 * toplev.c (print_switch_values): Drop auxbase, add
2222 (process_options): Derive aux_base_name from dump_base_name
2224 (lang_dependent_init): Compute dump_base_ext along with
2225 dump_base_name. Disable stack usage and callgraph-info during
2226 lto generation and compare-debug recompilation.
2228 2020-05-26 Hongtao Liu <hongtao.liu@intel.com>
2229 Uroš Bizjak <ubizjak@gmail.com>
2233 * config/i386/sse.md (<floatunssuffix>v2div2sf2): New expander.
2234 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
2235 (avx512dq_float<floatunssuffix>v2div2sf2): Renaming from
2236 float<floatunssuffix>v2div2sf2.
2237 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
2238 Renaming from fix<fixunssuffix>_truncv2sfv2di2<mask_name>.
2239 (vec_pack<floatprefix>_float_<mode>): Adjust icode name.
2240 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
2241 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
2242 * config/i386/i386-builtin.def: Ditto.
2243 * emit-rtl.c (validate_subreg): Allow use of *paradoxical* vector
2244 subregs when both omode and imode are vector mode and
2245 have the same inner mode.
2247 2020-05-25 Eric Botcazou <ebotcazou@adacore.com>
2249 * gimple-ssa-store-merging.c (merged_store_group::can_be_merged_into):
2250 Only turn MEM_REFs into bit-field stores for small bit-field regions.
2251 (imm_store_chain_info::output_merged_store): Be prepared for sources
2252 with non-integral type in the bit-field insertion case.
2253 (pass_store_merging::process_store): Use MAX_BITSIZE_MODE_ANY_INT as
2254 the largest size for the bit-field case.
2256 2020-05-25 Uroš Bizjak <ubizjak@gmail.com>
2258 * config/i386/mmx.md (*vec_dupv2sf): Redefine as define_insn.
2259 (mmx_pshufw_1): Change Yv constraint to xYw. Correct type attribute.
2260 (*vec_dupv4hi): Redefine as define_insn.
2261 Remove alternative with general register input.
2262 (*vec_dupv2si): Ditto.
2264 2020-05-25 Richard Biener <rguenther@suse.de>
2266 PR tree-optimization/95309
2267 * tree-vect-slp.c (vect_get_constant_vectors): Move number
2268 of vector computation ...
2269 (vect_slp_analyze_node_operations): ... to analysis phase.
2271 2020-05-25 Jan Hubicka <hubicka@ucw.cz>
2273 * lto-streamer-out.c (lto_output_tree): Add streamer_debugging check.
2274 * lto-streamer.h (streamer_debugging): New constant
2275 * tree-streamer-in.c (streamer_read_tree_bitfields): Add
2276 streamer_debugging check.
2277 (streamer_get_pickled_tree): Likewise.
2278 * tree-streamer-out.c (pack_ts_base_value_fields): Likewise.
2280 2020-05-25 Richard Biener <rguenther@suse.de>
2282 PR tree-optimization/95308
2283 * tree-ssa-forwprop.c (pass_forwprop::execute): Generalize
2284 test for TARGET_MEM_REFs.
2286 2020-05-25 Richard Biener <rguenther@suse.de>
2288 PR tree-optimization/95295
2289 * tree-ssa-loop-im.c (sm_seq_valid_bb): Compare remat stores
2290 RHSes and drop to full sm_other if they are not equal.
2292 2020-05-25 Richard Biener <rguenther@suse.de>
2294 PR tree-optimization/95271
2295 * tree-vect-stmts.c (vectorizable_bswap): Update invariant SLP
2296 children vector type.
2297 (vectorizable_call): Pass down slp ops.
2299 2020-05-25 Richard Biener <rguenther@suse.de>
2301 PR tree-optimization/95297
2302 * tree-vect-stmts.c (vectorizable_shift): For scalar_shift_arg
2303 skip updating operand 1 vector type.
2305 2020-05-25 Richard Biener <rguenther@suse.de>
2307 PR tree-optimization/95284
2308 * tree-ssa-sink.c (sink_common_stores_to_bb): Amend previous
2311 2020-05-25 Hongtao Liu <hongtao.liu@intel.com>
2314 * config/i386/sse.md (sf2dfmode_lower): New mode attribute.
2315 (trunc<mode><sf2dfmode_lower>2) New expander.
2316 (extend<sf2dfmode_lower><mode>2): Ditto.
2318 2020-05-23 Iain Sandoe <iain@sandoe.co.uk>
2320 * config/darwin.h (ASM_GENERATE_INTERNAL_LABEL): Make
2321 ubsan_{data,type},ASAN symbols linker-visible.
2323 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
2325 * lto-streamer-out.c (DFS::DFS): Silence warning.
2327 2020-05-22 Uroš Bizjak <ubizjak@gmail.com>
2330 * config/i386/i386.md (<rounding_insn><mode>2): Do not try to
2331 expand non-sse4 ROUND_ROUNDEVEN rounding via SSE support routines.
2333 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
2335 * lto-streamer-out.c (lto_output_tree): Do not stream final ref if
2338 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
2340 * lto-section-out.c (lto_output_decl_index): Adjust dump indentation.
2341 * lto-streamer-out.c (create_output_block): Fix whitespace
2342 (lto_write_tree_1): Add (debug) dump.
2343 (DFS::DFS): Add dump.
2344 (DFS::DFS_write_tree_body): Do not dump here.
2345 (lto_output_tree): Improve dumping; do not stream ref when not needed.
2346 (produce_asm_for_decls): Fix whitespace.
2347 * tree-streamer-out.c (streamer_write_tree_header): Add dump.
2348 * tree-streamer-out.c (streamer_write_integer_cst): Add debug dump.
2350 2020-05-22 Hongtao.liu <hongtao.liu@intel.com>
2353 * config/i386/sse.md (trunc<pmov_src_lower><mode>2): New expander
2354 (truncv32hiv32qi2): Ditto.
2355 (trunc<ssedoublemodelower><mode>2): Ditto.
2356 (trunc<mode><pmov_dst_3>2): Ditto.
2357 (trunc<mode><pmov_dst_mode_4>2): Ditto.
2358 (truncv2div2si2): Ditto.
2359 (truncv8div8qi2): Ditto.
2360 (avx512f_<code>v8div16qi2): Renaming from *avx512f_<code>v8div16qi2.
2361 (avx512vl_<code>v2div2si): Renaming from *avx512vl_<code>v2div2si2.
2362 (avx512vl_<code><mode>v2<ssecakarnum>qi2): Renaming from
2363 *avx512vl_<code><mode>v<ssescalarnum>qi2.
2365 2020-05-22 H.J. Lu <hongjiu.lu@intel.com>
2368 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
2371 2020-05-22 Richard Biener <rguenther@suse.de>
2373 PR tree-optimization/95268
2374 * tree-ssa-sink.c (sink_common_stores_to_bb): Handle clobbers
2377 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
2379 * tree-streamer.c (record_common_node): Fix hash value of pre-streamed
2382 2020-05-22 Jan Hubicka <hubicka@ucw.cz>
2384 * lto-streamer-in.c (lto_read_tree): Do not stream end markers.
2385 (lto_input_scc): Optimize streaming of entry lengths.
2386 * lto-streamer-out.c (lto_write_tree): Do not stream end markers
2387 (DFS::DFS): Optimize stremaing of entry lengths
2389 2020-05-22 Richard Biener <rguenther@suse.de>
2392 * doc/invoke.texi (flto): Document behavior of diagnostic
2395 2020-05-22 Richard Biener <rguenther@suse.de>
2397 * tree-vectorizer.h (vect_is_simple_use): New overload.
2398 (vect_maybe_update_slp_op_vectype): New.
2399 * tree-vect-stmts.c (vect_is_simple_use): New overload
2400 accessing operands of SLP vs. non-SLP operation transparently.
2401 (vect_maybe_update_slp_op_vectype): New function updating
2402 the possibly shared SLP operands vector type.
2403 (vectorizable_operation): Be a bit more SLP vs non-SLP agnostic
2404 using the new vect_is_simple_use overload; update SLP invariant
2405 operand nodes vector type.
2406 (vectorizable_comparison): Likewise.
2407 (vectorizable_call): Likewise.
2408 (vectorizable_conversion): Likewise.
2409 (vectorizable_shift): Likewise.
2410 (vectorizable_store): Likewise.
2411 (vectorizable_condition): Likewise.
2412 (vectorizable_assignment): Likewise.
2413 * tree-vect-loop.c (vectorizable_reduction): Likewise.
2414 * tree-vect-slp.c (vect_get_constant_vectors): Enforce
2415 present SLP_TREE_VECTYPE and check it matches previous
2418 2020-05-22 Richard Biener <rguenther@suse.de>
2420 PR tree-optimization/95248
2421 * tree-ssa-loop-im.c (sm_seq_valid_bb): Remove bogus early out.
2423 2020-05-22 Richard Biener <rguenther@suse.de>
2425 * tree-vectorizer.h (_slp_tree::_slp_tree): New.
2426 (_slp_tree::~_slp_tree): Likewise.
2427 * tree-vect-slp.c (_slp_tree::_slp_tree): Factor out code
2429 (_slp_tree::~_slp_tree): Implement.
2430 (vect_free_slp_tree): Simplify.
2431 (vect_create_new_slp_node): Likewise. Add nops parameter.
2432 (vect_build_slp_tree_2): Adjust.
2433 (vect_analyze_slp_instance): Likewise.
2435 2020-05-21 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2437 * adjust-alignment.c: Include memmodel.h.
2439 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
2442 * config/i386/cpuid.h: Use hexadecimal in comments.
2444 2020-05-21 H.J. Lu <hongjiu.lu@intel.com>
2447 * config/i386/i386-builtins.c (processor_features): Move
2448 F_AVX512VP2INTERSECT after F_AVX512BF16.
2449 (isa_names_table): Likewise.
2451 2020-05-21 Martin Liska <mliska@suse.cz>
2453 * common/config/aarch64/aarch64-common.c (aarch64_handle_option):
2454 Handle OPT_moutline_atomics.
2455 * config/aarch64/aarch64.c: Add outline-atomics to
2457 * doc/extend.texi: Document the newly added target attribute.
2459 2020-05-21 Uroš Bizjak <ubizjak@gmail.com>
2463 * config/i386/mmx.md (*mmx_<code>v2sf): Do not mark
2464 operands 1 and 2 commutative. Manually swap operands.
2465 (*mmx_nabsv2sf2): Ditto.
2468 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2470 * config/i386/i386.md (*<code>tf2_1):
2471 Mark operands 1 and 2 commutative.
2472 (*nabstf2_1): Ditto.
2473 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
2474 commutative. Do not swap operands.
2475 (*nabs<mode>2): Ditto.
2477 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
2480 * config/i386/sse.md (<code>v8qiv8hi2): Use
2481 simplify_gen_subreg instead of simplify_subreg.
2482 (<code>v8qiv8si2): Ditto.
2483 (<code>v4qiv4si2): Ditto.
2484 (<code>v4hiv4si2): Ditto.
2485 (<code>v8qiv8di2): Ditto.
2486 (<code>v4qiv4di2): Ditto.
2487 (<code>v2qiv2di2): Ditto.
2488 (<code>v4hiv4di2): Ditto.
2489 (<code>v2hiv2di2): Ditto.
2490 (<code>v2siv2di2): Ditto.
2492 2020-05-20 Uroš Bizjak <ubizjak@gmail.com>
2495 * config/i386/i386.md (*pushsi2_rex64):
2496 Use "e" constraint instead of "i".
2498 2020-05-20 Jan Hubicka <hubicka@ucw.cz>
2500 * lto-streamer-in.c (lto_input_scc): Add SHARED_SCC parameter.
2501 (lto_input_tree_1): Strenghten sanity check.
2502 (lto_input_tree): Update call of lto_input_scc.
2503 * lto-streamer-out.c: Include ipa-utils.h
2504 (create_output_block): Initialize local_trees if merigng is going
2506 (destroy_output_block): Destroy local_trees.
2507 (DFS): Add max_local_entry.
2508 (local_tree_p): New function.
2509 (DFS::DFS): Initialize and maintain it.
2510 (DFS::DFS_write_tree): Decide on streaming format.
2511 (lto_output_tree): Stream inline singleton SCCs
2512 * lto-streamer.h (enum LTO_tags): Add LTO_trees.
2513 (struct output_block): Add local_trees.
2514 (lto_input_scc): Update prototype.
2516 2020-05-20 Patrick Palka <ppalka@redhat.com>
2519 * hash-table.h (hash_table::find_with_hash): Move up the call to
2522 2020-05-20 Martin Liska <mliska@suse.cz>
2524 * lto-compress.c (lto_compression_zstd): Fill up
2525 num_compressed_il_bytes.
2526 (lto_uncompression_zstd): Likewise for num_uncompressed_il_bytes here.
2528 2020-05-20 Richard Biener <rguenther@suse.de>
2530 PR tree-optimization/95219
2531 * tree-vect-loop.c (vectorizable_induction): Reduce
2532 group_size before computing the number of required IVs.
2534 2020-05-20 Richard Biener <rguenther@suse.de>
2537 * tree-inline.c (remap_gimple_stmt): Revert adjusting
2538 COND_EXPR and VEC_COND_EXPR for a -fnon-call-exception boundary.
2540 2020-05-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
2541 Andre Vieira <andre.simoesdiasvieira@arm.com>
2544 * config/arm/arm-protos.h (arm_mode_base_reg_class): Function
2546 (mve_vector_mem_operand): Likewise.
2547 * config/arm/arm.c (thumb2_legitimate_address_p): For MVE target check
2548 the load from memory to a core register is legitimate for give mode.
2549 (mve_vector_mem_operand): Define function.
2550 (arm_print_operand): Modify comment.
2551 (arm_mode_base_reg_class): Define.
2552 * config/arm/arm.h (MODE_BASE_REG_CLASS): Modify to add check for
2553 TARGET_HAVE_MVE and expand to arm_mode_base_reg_class on TRUE.
2554 * config/arm/constraints.md (Ux): Likewise.
2556 * config/arm/mve.md (mve_mov): Replace constraint Us with Ux and also
2557 add support for missing Vector Store Register and Vector Load Register.
2558 Add a new alternative to support load from memory to PC (or label) in
2560 (mve_vstrbq_<supf><mode>): Modify constraint Us to Ux.
2561 (mve_vldrbq_<supf><mode>): Modify constriant Us to Ux, predicate to
2562 mve_memory_operand and also modify the MVE instructions to emit.
2563 (mve_vldrbq_z_<supf><mode>): Modify constraint Us to Ux.
2564 (mve_vldrhq_fv8hf): Modify constriant Us to Ux, predicate to
2565 mve_memory_operand and also modify the MVE instructions to emit.
2566 (mve_vldrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
2567 mve_memory_operand and also modify the MVE instructions to emit.
2568 (mve_vldrhq_z_fv8hf): Likewise.
2569 (mve_vldrhq_z_<supf><mode>): Likewise.
2570 (mve_vldrwq_fv4sf): Likewise.
2571 (mve_vldrwq_<supf>v4si): Likewise.
2572 (mve_vldrwq_z_fv4sf): Likewise.
2573 (mve_vldrwq_z_<supf>v4si): Likewise.
2574 (mve_vld1q_f<mode>): Modify constriant Us to Ux.
2575 (mve_vld1q_<supf><mode>): Likewise.
2576 (mve_vstrhq_fv8hf): Modify constriant Us to Ux, predicate to
2578 (mve_vstrhq_p_fv8hf): Modify constriant Us to Ux, predicate to
2579 mve_memory_operand and also modify the MVE instructions to emit.
2580 (mve_vstrhq_p_<supf><mode>): Likewise.
2581 (mve_vstrhq_<supf><mode>): Modify constriant Us to Ux, predicate to
2583 (mve_vstrwq_fv4sf): Modify constriant Us to Ux.
2584 (mve_vstrwq_p_fv4sf): Modify constriant Us to Ux and also modify the MVE
2585 instructions to emit.
2586 (mve_vstrwq_p_<supf>v4si): Likewise.
2587 (mve_vstrwq_<supf>v4si): Likewise.Modify constriant Us to Ux.
2588 * config/arm/predicates.md (mve_memory_operand): Define.
2590 2020-05-30 Richard Biener <rguenther@suse.de>
2593 * c-fold.c (c_fully_fold_internal): Enhance guard on
2596 2020-05-20 Kito Cheng <kito.cheng@sifive.com>
2599 * Makefile.in (OBJS): Add adjust-alignment.o.
2600 * adjust-alignment.c (pass_data_adjust_alignment): New.
2601 (pass_adjust_alignment): New.
2602 (pass_adjust_alignment::execute): New.
2603 (make_pass_adjust_alignment): New.
2604 * tree-pass.h (make_pass_adjust_alignment): New.
2605 * passes.def: Add pass_adjust_alignment.
2607 2020-05-19 Alex Coplan <alex.coplan@arm.com>
2610 * config/aarch64/aarch64.c (aarch64_evpc_rev_local): Don't match
2611 identity permutation.
2613 2020-05-19 Jozef Lawrynowicz <jozef.l@mittosystems.com>
2615 * doc/sourcebuild.texi: Document new short_eq_int, ptr_eq_short,
2616 msp430_small, msp430_large and size24plus DejaGNU effective
2618 Improve grammar in descriptions for size20plus and size32plus effective
2621 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
2623 * config/bpf/bpf.c (bpf_compute_frame_layout): Include space for
2624 callee saved registers only in xBPF.
2625 (bpf_expand_prologue): Save callee saved registers only in xBPF.
2626 (bpf_expand_epilogue): Likewise for restoring.
2627 * doc/invoke.texi (eBPF Options): Document this is activated by
2630 2020-05-19 Jose E. Marchesi <jose.marchesi@oracle.com>
2632 * config/bpf/bpf.opt (mxbpf): New option.
2633 * doc/invoke.texi (Option Summary): Add -mxbpf.
2634 (eBPF Options): Document -mxbbpf.
2636 2020-05-19 Uroš Bizjak <ubizjak@gmail.com>
2639 * config/i386/sse.md (<code>v16qiv16hi2): New expander.
2640 (<code>v32qiv32hi2): Ditto.
2641 (<code>v8qiv8hi2): Ditto.
2642 (<code>v16qiv16si2): Ditto.
2643 (<code>v8qiv8si2): Ditto.
2644 (<code>v4qiv4si2): Ditto.
2645 (<code>v16hiv16si2): Ditto.
2646 (<code>v8hiv8si2): Ditto.
2647 (<code>v4hiv4si2): Ditto.
2648 (<code>v8qiv8di2): Ditto.
2649 (<code>v4qiv4di2): Ditto.
2650 (<code>v2qiv2di2): Ditto.
2651 (<code>v8hiv8di2): Ditto.
2652 (<code>v4hiv4di2): Ditto.
2653 (<code>v2hiv2di2): Ditto.
2654 (<code>v8siv8di2): Ditto.
2655 (<code>v4siv4di2): Ditto.
2656 (<code>v2siv2di2): Ditto.
2658 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2660 * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.
2661 (riscv_implied_info): New.
2662 (riscv_subset_list): Add handle_implied_ext.
2663 (riscv_subset_list::to_string): New parameter version_p to
2664 control output format.
2665 (riscv_subset_list::handle_implied_ext): New.
2666 (riscv_subset_list::parse_std_ext): Call handle_implied_ext.
2667 (riscv_arch_str): New parameter version_p to control output format.
2668 (riscv_expand_arch): New.
2669 * config/riscv/riscv-protos.h (riscv_arch_str): New parameter,
2671 * config/riscv/riscv.h (riscv_expand_arch): New,
2672 (EXTRA_SPEC_FUNCTIONS): Define.
2673 (ASM_SPEC): Transform -march= via riscv_expand_arch.
2675 2020-05-19 Kito Cheng <kito.cheng@sifive.com>
2677 * riscv-common.c (parse_sv_or_non_std_ext): Rename to
2678 parse_multiletter_ext.
2679 (parse_multiletter_ext): Add parsing `h` and `z`, drop `sx`,
2680 adjust parsing order for 's' and 'x'.
2682 2020-05-19 Richard Biener <rguenther@suse.de>
2684 * tree-vectorizer.h (_slp_tree::vectype): Add field.
2685 (SLP_TREE_VECTYPE): New.
2686 * tree-vect-slp.c (vect_create_new_slp_node): Initialize
2688 (vect_create_new_slp_node): Likewise.
2689 (vect_prologue_cost_for_slp): Move here from tree-vect-stmts.c
2691 (vect_slp_analyze_node_operations): Walk nodes children for
2693 (vect_get_constant_vectors): Use local scope op variable.
2694 * tree-vect-stmts.c (vect_prologue_cost_for_slp_op): Remove here.
2695 (vect_model_simple_cost): Adjust.
2696 (vect_model_store_cost): Likewise.
2697 (vectorizable_store): Likewise.
2699 2020-05-18 Martin Sebor <msebor@redhat.com>
2702 * tree-object-size.c (decl_init_size): New function.
2703 (addr_object_size): Call it.
2704 * tree.h (last_field): Declare.
2705 (first_field): Add attribute nonnull.
2707 2020-05-18 Martin Sebor <msebor@redhat.com>
2710 * tree-vrp.c (vrp_prop::check_mem_ref): Remove unreachable code.
2711 * tree.c (component_ref_size): Correct the handling or array members
2713 Drop a pointless test.
2714 Rename a local variable.
2716 2020-05-18 Jason Merrill <jason@redhat.com>
2718 * aclocal.m4: Add ax_cxx_compile_stdcxx.m4.
2719 * configure.ac: Use AX_CXX_COMPILE_STDCXX(11).
2721 2020-05-14 Jason Merrill <jason@redhat.com>
2723 * doc/install.texi (Prerequisites): Update boostrap compiler
2724 requirement to C++11/GCC 4.8.
2726 2020-05-18 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2728 PR tree-optimization/94952
2729 * gimple-ssa-store-merging.c (pass_store_merging::process_store):
2730 Initialize variables bitpos, bitregion_start, and bitregion_end in
2731 order to silence warnings about use of uninitialized variables.
2733 2020-05-18 Carl Love <cel@us.ibm.com>
2736 * config/rs6000/vsx.md (define_expand): Fix instruction generation for
2737 first_match_index_<mode>.
2738 * testsuite/gcc.target/powerpc/builtins-8-p9-runnable.c (main): Add
2739 additional test cases with zero vector elements.
2741 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2744 * config/i386/i386-expand.c (ix86_expand_int_movcc):
2745 Avoid reversing a non-trapping comparison to a trapping one.
2747 2020-05-18 Alex Coplan <alex.coplan@arm.com>
2749 * config/arm/arm.c (output_move_double): Fix codegen when loading into
2750 a register pair with an odd base register.
2752 2020-05-18 Uroš Bizjak <ubizjak@gmail.com>
2754 * config/i386/i386-expand.c (ix86_expand_fp_absneg_operator):
2755 Do not emit FLAGS_REG clobber for TFmode.
2756 * config/i386/i386.md (*<code>tf2_1): Rewrite as
2757 define_insn_and_split. Mark operands 1 and 2 commutative.
2758 (*nabstf2_1): Ditto.
2759 (absneg SSE splitter): Use MODEF mode iterator instead of SSEMODEF.
2760 Do not swap memory operands. Simplify RTX generation.
2761 (neg abs SSE splitter): Ditto.
2762 * config/i386/sse.md (*<code><mode>2): Mark operands 1 and 2
2763 commutative. Do not swap operands. Simplify RTX generation.
2764 (*nabs<mode>2): Ditto.
2766 2020-05-18 Richard Biener <rguenther@suse.de>
2768 * tree-vect-slp.c (vect_slp_bb): Start after labels.
2769 (vect_get_constant_vectors): Really place init stmt after scalar defs.
2770 * tree-vect-stmts.c (vect_init_vector_1): Insert before
2773 2020-05-18 H.J. Lu <hongjiu.lu@intel.com>
2775 * config/i386/driver-i386.c (host_detect_local_cpu): Support
2776 Intel Airmont, Tremont, Comet Lake, Ice Lake and Tiger Lake
2779 2020-05-18 Richard Biener <rguenther@suse.de>
2782 * tree-inline.c (remap_gimple_stmt): Split out trapping compares
2783 when inlining into a non-call EH function.
2785 2020-05-18 Richard Biener <rguenther@suse.de>
2787 PR tree-optimization/95172
2788 * tree-ssa-loop-im.c (execute_sm): Get flag whether we
2789 eventually need the conditional processing.
2790 (execute_sm_exit): When processing an orderd sequence
2791 avoid doing any conditional processing.
2792 (hoist_memory_references): Pass down whether all edges
2793 have ordered processing for a ref to execute_sm.
2795 2020-05-17 Jeff Law <law@redhat.com>
2797 * config/h8300/predicates.md (pc_or_label_operand): New predicate.
2798 * config/h8300/jumpcall.md (branch_true, branch_false): Consolidate
2799 into a single pattern using pc_or_label_operand.
2800 * config/h8300/combiner.md (bit branch patterns): Likewise.
2801 * config/h8300/peepholes.md (HImode and SImode branches): Likewise.
2803 2020-05-17 H.J. Lu <hongjiu.lu@intel.com>
2806 * config/i386/i386-features.c (has_non_address_hard_reg):
2808 (pseudo_reg_set): This. Return the SET expression. Ignore
2809 pseudo register push.
2810 (general_scalar_to_vector_candidate_p): Combine single_set and
2811 has_non_address_hard_reg calls to pseudo_reg_set.
2812 (timode_scalar_to_vector_candidate_p): Likewise.
2813 * config/i386/i386.md (*pushv1ti2): New pattern.
2815 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2818 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2820 * tree-vrp.c (operand_less_p): Move to...
2821 * vr-values.c (operand_less_p): ...here.
2822 * tree-vrp.h (operand_less_p): Remove.
2824 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2826 * tree-vrp.c (operand_less_p): Move to...
2827 * vr-values.c (operand_less_p): ...here.
2828 * tree-vrp.h (operand_less_p): Remove.
2830 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2832 * tree-vrp.c (class vrp_insert): Remove prototype for
2835 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2837 * tree-vrp.c (class live_names): New.
2838 (live_on_edge): Move into live_names.
2839 (build_assert_expr_for): Move into vrp_insert.
2840 (find_assert_locations_in_bb): Rename from
2841 find_assert_locations_1.
2842 (process_assert_insertions_for): Move into vrp_insert.
2843 (compare_assert_loc): Same.
2844 (remove_range_assertions): Same.
2845 (dump_asserts_for): Rename to vrp_insert::dump.
2846 (debug_asserts_for): Rename to vrp_insert::debug.
2847 (dump_all_asserts): Rename to vrp_insert::dump.
2848 (debug_all_asserts): Rename to vrp_insert::debug.
2850 2020-05-17 Aldy Hernandez <aldyh@redhat.com>
2852 * tree-vrp.c (class vrp_prop): Move check_all_array_refs,
2853 check_array_ref, check_mem_ref, and search_for_addr_array
2855 (class array_bounds_checker): ...here.
2856 (class check_array_bounds_dom_walker): Adjust to use
2857 array_bounds_checker.
2858 (check_all_array_refs): Move into array_bounds_checker and rename
2860 (class vrp_folder): Make fold_predicate_in private.
2862 2020-05-15 Jeff Law <law@redhat.com>
2864 * config/h8300/h8300.md (SFI iterator): New iterator for
2866 * config/h8300/peepholes.md (memory comparison): Use mode
2867 iterator to consolidate 3 patterns into one.
2868 (stack allocation and stack store): Handle SFmode. Handle
2871 2020-05-15 Segher Boessenkool <segher@kernel.crashing.org>
2873 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_2): Also require
2874 RS6000_BTM_POWERPC64.
2876 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2878 * config/i386/i386.md (SWI48DWI): New mode iterator.
2879 (*push<mode>2): Allow XMM registers.
2880 (*pushdi2_rex64): Ditto.
2881 (*pushsi2_rex64): Ditto.
2883 (push XMM reg splitter): New splitter
2885 (*pushdf) Change "x" operand constraint to "v".
2886 (*pushsf_rex64): Ditto.
2889 2020-05-15 Richard Biener <rguenther@suse.de>
2891 PR tree-optimization/92260
2892 * tree-vect-slp.c (vect_get_constant_vectors): Compute
2893 the number of vector stmts in a canonical way.
2895 2020-05-15 Martin Liska <mliska@suse.cz>
2897 * hsa-gen.c (get_symbol_for_decl): Fix misleading indentation
2900 2020-05-15 Andrew Stubbs <ams@codesourcery.com>
2902 * config/gcn/gcn-valu.md (v<expander><mode>3): Fix unsignedp.
2904 2020-05-15 Richard Biener <rguenther@suse.de>
2906 PR tree-optimization/95133
2907 * gimple-ssa-split-paths.c
2908 (find_block_to_duplicate_for_splitting_paths): Check for
2911 2020-05-15 Christophe Lyon <christophe.lyon@linaro.org>
2913 * config/arm/arm.c (reg_needs_saving_p): Add support for interrupt
2915 (arm_compute_save_reg0_reg12_mask): Use reg_needs_saving_p.
2917 2020-05-15 Tobias Burnus <tobias@codesourcery.com>
2920 * gimplify.c (gimplify_scan_omp_clauses): For MAP_TO_PSET with
2921 OMP_TARGET_EXIT_DATA, use 'release:' unless the associated
2924 2020-05-15 Uroš Bizjak <ubizjak@gmail.com>
2927 * config/i386/i386.md (isa): Add sse3_noavx.
2928 (enabled): Handle sse3_noavx.
2930 * config/i386/mmx.md (mmx_haddv2sf3): New expander.
2931 (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX
2932 alternatives. Match commutative vec_select selector operands.
2933 (*mmx_haddv2sf3_low): New insn pattern.
2935 (*mmx_hsubv2sf3): Add SSE/AVX alternatives.
2936 (*mmx_hsubv2sf3_low): New insn pattern.
2938 2020-05-15 Richard Biener <rguenther@suse.de>
2940 PR tree-optimization/33315
2941 * tree-ssa-sink.c: Include tree-eh.h.
2942 (sink_stats): Add commoned member.
2943 (sink_common_stores_to_bb): New function implementing store
2944 commoning by sinking to the successor.
2945 (sink_code_in_bb): Call it, pass down TODO_cleanup_cfg returned.
2946 (pass_sink_code::execute): Likewise. Record commoned stores
2949 2020-05-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
2951 PR rtl-optimization/37451, part of PR target/61837
2952 * loop-doloop.c (doloop_simplify_count): New function. Simplify
2953 (add -1; zero_ext; add +1) to zero_ext when not wrapping.
2954 (doloop_modify): Call doloop_simplify_count.
2956 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2959 * doc/sourcebuild.texi: Document effective target lgccjit.
2961 2020-05-14 Andrew Stubbs <ams@codesourcery.com>
2963 * config/gcn/gcn-valu.md (add<mode>3_zext_dup): Change to a
2964 define_expand, and rename the original to ...
2965 (add<mode>3_vcc_zext_dup): ... this, and add a custom VCC operand.
2966 (add<mode>3_zext_dup_exec): Likewise, with ...
2967 (add<mode>3_vcc_zext_dup_exec): ... this.
2968 (add<mode>3_zext_dup2): Likewise, with ...
2969 (add<mode>3_zext_dup_exec): ... this.
2970 (add<mode>3_zext_dup2_exec): Likewise, with ...
2971 (add<mode>3_zext_dup2): ... this.
2972 * config/gcn/gcn.c (gcn_expand_scalar_to_vector_address): Switch
2973 addv64di3_zext* calls to use addv64di3_vcc_zext*.
2975 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
2978 * config/i386/sse.md (truncv2dfv2df2): New insn pattern.
2979 (extendv2sfv2df2): Ditto.
2981 2020-05-14 H.J. Lu <hongjiu.lu@intel.com>
2983 * configure: Regenerated.
2985 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2987 * config/arm/arm.c (reg_needs_saving_p): New function.
2988 (use_return_insn): Use reg_needs_saving_p.
2989 (arm_get_vfp_saved_size): Likewise.
2990 (arm_compute_frame_layout): Likewise.
2991 (arm_save_coproc_regs): Likewise.
2992 (thumb1_expand_epilogue): Likewise.
2993 (arm_expand_epilogue_apcs_frame): Likewise.
2994 (arm_expand_epilogue): Likewise.
2996 2020-05-14 Christophe Lyon <christophe.lyon@linaro.org>
2998 * config/arm/arm.c (thumb1_expand_prologue): Update error message.
3000 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3003 * config/i386/sse.md (sse2_cvtpi2pd): Add memory to alternative 1.
3005 (floatv2siv2df2): New expander.
3006 (floatunsv2siv2df2): New insn pattern.
3008 (fix_truncv2dfv2si2): New expander.
3009 (fixuns_truncv2dfv2si2): New insn pattern.
3011 2020-05-14 Richard Sandiford <richard.sandiford@arm.com>
3014 * config/aarch64/aarch64-sve-builtins.cc
3015 (handle_arm_sve_vector_bits_attribute): Create a copy of the
3016 original type's TYPE_MAIN_VARIANT, then reapply all the differences
3017 between the original type and its main variant.
3019 2020-05-14 Richard Biener <rguenther@suse.de>
3022 * real.c (real_to_decimal_for_mode): Make sure we handle
3023 a zero with nonzero exponent.
3025 2020-05-14 Jakub Jelinek <jakub@redhat.com>
3027 * Makefile.in (GTFILES): Add omp-general.c.
3028 * cgraph.h (struct cgraph_node): Add declare_variant_alt and
3029 calls_declare_variant_alt members and initialize them in the
3031 * ipa.c (symbol_table::remove_unreachable_nodes): Handle direct
3032 calls to declare_variant_alt nodes.
3033 * lto-cgraph.c (lto_output_node): Write declare_variant_alt
3034 and calls_declare_variant_alt.
3035 (input_overwrite_node): Read them back.
3036 * omp-simd-clone.c (simd_clone_create): Copy calls_declare_variant_alt
3038 * tree-inline.c (expand_call_inline): Or in calls_declare_variant_alt
3040 (tree_function_versioning): Copy calls_declare_variant_alt bit.
3041 * omp-offload.c (execute_omp_device_lower): Call
3042 omp_resolve_declare_variant on direct function calls.
3043 (pass_omp_device_lower::gate): Also enable for
3044 calls_declare_variant_alt functions.
3045 * omp-general.c (omp_maybe_offloaded): Return false after inlining.
3046 (omp_context_selector_matches): Handle the case when
3047 cfun->curr_properties has PROP_gimple_any bit set.
3048 (struct omp_declare_variant_entry): New type.
3049 (struct omp_declare_variant_base_entry): New type.
3050 (struct omp_declare_variant_hasher): New type.
3051 (omp_declare_variant_hasher::hash, omp_declare_variant_hasher::equal):
3053 (omp_declare_variants): New variable.
3054 (struct omp_declare_variant_alt_hasher): New type.
3055 (omp_declare_variant_alt_hasher::hash,
3056 omp_declare_variant_alt_hasher::equal): New methods.
3057 (omp_declare_variant_alt): New variables.
3058 (omp_resolve_late_declare_variant): New function.
3059 (omp_resolve_declare_variant): Call omp_resolve_late_declare_variant
3060 when called late. Create a magic declare_variant_alt fndecl and
3061 cgraph node and return that if decision needs to be deferred until
3062 after gimplification.
3063 * cgraph.c (symbol_table::create_edge): Or in calls_declare_variant_alt
3067 * omp-simd-clone.c (struct modify_stmt_info): Add after_stmt member.
3068 (ipa_simd_modify_stmt_ops): For PHIs, only add before first stmt in
3069 entry block if info->after_stmt is NULL, otherwise add after that stmt
3070 and update it after adding each stmt.
3071 (ipa_simd_modify_function_body): Initialize info.after_stmt.
3073 * function.h (struct function): Add has_omp_target bit.
3074 * omp-offload.c (omp_discover_declare_target_fn_r): New function,
3076 (omp_discover_declare_target_tgt_fn_r): ... this.
3077 (omp_discover_declare_target_var_r): Call
3078 omp_discover_declare_target_tgt_fn_r instead of
3079 omp_discover_declare_target_fn_r.
3080 (omp_discover_implicit_declare_target): Also queue functions with
3081 has_omp_target bit set, for those walk with
3082 omp_discover_declare_target_fn_r, for declare target to functions
3083 walk with omp_discover_declare_target_tgt_fn_r.
3085 2020-05-14 Uroš Bizjak <ubizjak@gmail.com>
3088 * config/i386/mmx.md (mmx_fix_truncv2sfv2si2): Rename from mmx_pf2id.
3089 Add SSE/AVX alternative. Change operand predicates from
3090 nonimmediate_operand to register_mmxmem_operand.
3091 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3092 (fix_truncv2sfv2si2): New expander.
3093 (fixuns_truncv2sfv2si2): New insn pattern.
3095 (mmx_floatv2siv2sf2): rename from mmx_floatv2si2.
3096 Add SSE/AVX alternative. Change operand predicates from
3097 nonimmediate_operand to register_mmxmem_operand.
3098 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3099 (floatv2siv2sf2): New expander.
3100 (floatunsv2siv2sf2): New insn pattern.
3102 * config/i386/i386-builtin.def (IX86_BUILTIN_PF2ID):
3104 (IX86_BUILTIN_PI2FD): Ditto.
3106 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3108 * config/s390/s390.c (s390_emit_stack_probe): Call the probe_stack
3110 * config/s390/s390.md ("@probe_stack2<mode>", "probe_stack"): New
3113 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3115 * config/s390/s390.c (allocate_stack_space): Add missing updates
3116 of last_probe_offset.
3118 2020-05-14 Andreas Krebbel <krebbel@linux.ibm.com>
3120 * config/s390/s390.md ("allocate_stack"): Call
3121 anti_adjust_stack_and_probe_stack_clash when stack clash
3122 protection is enabled.
3123 * explow.c (anti_adjust_stack_and_probe_stack_clash): Remove
3124 prototype. Remove static.
3125 * explow.h (anti_adjust_stack_and_probe_stack_clash): Add
3128 2020-05-13 Kelvin Nilsen <kelvin@gcc.gnu.org>
3130 * config/rs6000/altivec.h (vec_extractl): New #define.
3131 (vec_extracth): Likewise.
3132 * config/rs6000/altivec.md (UNSPEC_EXTRACTL): New constant.
3133 (UNSPEC_EXTRACTR): Likewise.
3134 (vextractl<mode>): New expansion.
3135 (vextractl<mode>_internal): New insn.
3136 (vextractr<mode>): New expansion.
3137 (vextractr<mode>_internal): New insn.
3138 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vextdubvlx):
3139 New built-in function.
3140 (__builtin_altivec_vextduhvlx): Likewise.
3141 (__builtin_altivec_vextduwvlx): Likewise.
3142 (__builtin_altivec_vextddvlx): Likewise.
3143 (__builtin_altivec_vextdubvhx): Likewise.
3144 (__builtin_altivec_vextduhvhx): Likewise.
3145 (__builtin_altivec_vextduwvhx): Likewise.
3146 (__builtin_altivec_vextddvhx): Likewise.
3147 (__builtin_vec_extractl): New overloaded built-in function.
3148 (__builtin_vec_extracth): Likewise.
3149 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3150 Define overloaded forms of __builtin_vec_extractl and
3151 __builtin_vec_extracth.
3152 (builtin_function_type): Add cases to mark arguments of new
3153 built-in functions as unsigned.
3154 (rs6000_common_init_builtins): Add
3155 opaque_ftype_opaque_opaque_opaque_opaque.
3156 * config/rs6000/rs6000.md (du_or_d): New mode attribute.
3157 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3158 for a Future Architecture): Add description of vec_extractl and
3159 vec_extractr built-in functions.
3161 2020-05-13 Richard Biener <rguenther@suse.de>
3163 * target.def (add_stmt_cost): Add new vectype parameter.
3164 * targhooks.c (default_add_stmt_cost): Adjust.
3165 * targhooks.h (default_add_stmt_cost): Likewise.
3166 * config/aarch64/aarch64.c (aarch64_add_stmt_cost): Take new
3168 * config/arm/arm.c (arm_add_stmt_cost): Likewise.
3169 * config/i386/i386.c (ix86_add_stmt_cost): Likewise.
3170 * config/rs6000/rs6000.c (rs6000_add_stmt_cost): Likewise.
3172 * tree-vectorizer.h (stmt_info_for_cost::vectype): Add.
3173 (dump_stmt_cost): Add new vectype parameter.
3174 (add_stmt_cost): Likewise.
3175 (record_stmt_cost): Likewise.
3176 (record_stmt_cost): Add overload with old signature.
3177 * tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
3179 (vect_get_known_peeling_cost): Likewise.
3180 (vect_estimate_min_profitable_iters): Likewise.
3181 * tree-vectorizer.c (dump_stmt_cost): Add new vectype parameter.
3182 * tree-vect-stmts.c (record_stmt_cost): Likewise.
3183 (vect_prologue_cost_for_slp_op): Remove stmt_vec_info parameter
3184 and pass down correct vectype and NULL stmt_info.
3185 (vect_model_simple_cost): Adjust.
3186 (vect_model_store_cost): Likewise.
3188 2020-05-13 Richard Biener <rguenther@suse.de>
3190 * tree-vectorizer.h (SLP_INSTANCE_GROUP_SIZE): Remove.
3191 (_slp_instance::group_size): Likewise.
3192 * tree-vect-loop.c (vectorizable_reduction): The group size
3193 is the number of lanes in the node.
3194 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Likewise.
3195 (vect_analyze_slp_instance): Do not set SLP_INSTANCE_GROUP_SIZE,
3196 verify it matches the instance trees number of lanes.
3197 (vect_slp_analyze_node_operations_1): Use the numer of lanes
3198 in the node as group size.
3199 (vect_bb_vectorization_profitable_p): Use the instance root
3200 number of lanes for the size of life.
3201 (vect_schedule_slp_instance): Use the number of lanes as
3203 * tree-vect-stmts.c (vectorizable_load): Remove SLP instance
3204 parameter. Use the number of lanes of the load for the group
3205 size in the gap adjustment code.
3206 (vect_analyze_stmt): Adjust.
3207 (vect_transform_stmt): Likewise.
3209 2020-05-13 Jakub Jelinek <jakub@redhat.com>
3212 * cfgrtl.c (purge_dead_edges): Skip over debug and note insns even
3213 if the last insn is a note.
3215 PR tree-optimization/95060
3216 * tree-ssa-math-opts.c (convert_mult_to_fma_1): Fold a NEGATE_EXPR
3217 if it is the single use of the FMA internal builtin.
3219 2020-05-13 Bin Cheng <bin.cheng@linux.alibaba.com>
3221 PR tree-optimization/94969
3222 * tree-data-dependence.c (constant_access_functions): Rename to...
3223 (invariant_access_functions): ...this. Add parameter. Check for
3224 invariant access function, rather than constant.
3225 (build_classic_dist_vector): Call above function.
3226 * tree-loop-distribution.c (pg_add_dependence_edges): Add comment.
3228 2020-05-13 Hongtao Liu <hongtao.liu@intel.com>
3231 * doc/extend.texi (x86Operandmodifiers): Document more x86
3233 * gcc/config/i386/i386.c: Add comment for operand modifier N and I.
3235 2020-05-12 Giuliano Belinassi <giuliano.belinassi@usp.br>
3237 * tree-vrp.c (class vrp_insert): New.
3238 (insert_range_assertions): Move to class vrp_insert.
3239 (dump_all_asserts): Same as above.
3240 (dump_asserts_for): Same as above.
3241 (live): Same as above.
3242 (need_assert_for): Same as above.
3243 (live_on_edge): Same as above.
3244 (finish_register_edge_assert_for): Same as above.
3245 (find_switch_asserts): Same as above.
3246 (find_assert_locations): Same as above.
3247 (find_assert_locations_1): Same as above.
3248 (find_conditional_asserts): Same as above.
3249 (process_assert_insertions): Same as above.
3250 (register_new_assert_for): Same as above.
3251 (vrp_prop): New variable fun.
3252 (vrp_initialize): New parameter.
3253 (identify_jump_threads): Same as above.
3254 (execute_vrp): Same as above.
3257 2020-05-12 Keith Packard <keith.packard@sifive.com>
3259 * config/riscv/riscv.c (riscv_unique_section): New.
3260 (TARGET_ASM_UNIQUE_SECTION): New.
3262 2020-05-12 Craig Blackmore <craig.blackmore@embecosm.com>
3264 * config.gcc: Add riscv-shorten-memrefs.o to extra_objs for riscv.
3265 * config/riscv/riscv-passes.def: New file.
3266 * config/riscv/riscv-protos.h (make_pass_shorten_memrefs): Declare.
3267 * config/riscv/riscv-shorten-memrefs.c: New file.
3268 * config/riscv/riscv.c (tree-pass.h): New include.
3269 (riscv_compressed_reg_p): New Function
3270 (riscv_compressed_lw_offset_p): Likewise.
3271 (riscv_compressed_lw_address_p): Likewise.
3272 (riscv_shorten_lw_offset): Likewise.
3273 (riscv_legitimize_address): Attempt to convert base + large_offset
3274 to compressible new_base + small_offset.
3275 (riscv_address_cost): Make anticipated compressed load/stores
3276 cheaper for code size than uncompressed load/stores.
3277 (riscv_register_priority): Move compressed register check to
3278 riscv_compressed_reg_p.
3279 * config/riscv/riscv.h (C_S_BITS): Define.
3280 (CSW_MAX_OFFSET): Define.
3281 * config/riscv/riscv.opt (mshorten-memefs): New option.
3282 * config/riscv/t-riscv (riscv-shorten-memrefs.o): New rule.
3283 (PASSES_EXTRA): Add riscv-passes.def.
3284 * doc/invoke.texi: Document -mshorten-memrefs.
3286 * config/riscv/riscv.c (riscv_new_address_profitable_p): New function.
3287 (TARGET_NEW_ADDRESS_PROFITABLE_P): Define.
3288 * doc/tm.texi: Regenerate.
3289 * doc/tm.texi.in (TARGET_NEW_ADDRESS_PROFITABLE_P): New hook.
3290 * sched-deps.c (attempt_change): Use old address if it is cheaper than
3292 * target.def (new_address_profitable_p): New hook.
3293 * targhooks.c (default_new_address_profitable_p): New function.
3294 * targhooks.h (default_new_address_profitable_p): Declare.
3296 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
3299 * config/i386/mmx.md (copysignv2sf3): New expander.
3300 (xorsignv2sf3): Ditto.
3301 (signbitv2sf3): Ditto.
3303 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
3306 * config/i386/mmx.md (fmav2sf4): New insn pattern.
3311 2020-05-12 H.J. Lu <hongjiu.lu@intel.com>
3313 * Makefile.in (CET_HOST_FLAGS): New.
3314 (COMPILER): Add $(CET_HOST_FLAGS).
3315 * configure.ac: Add GCC_CET_HOST_FLAGS(CET_HOST_FLAGS) and
3316 AC_SUBST(CET_HOST_FLAGS). Clear CET_HOST_FLAGS if jit isn't
3318 * aclocal.m4: Regenerated.
3319 * configure: Likewise.
3321 2020-05-12 Uroš Bizjak <ubizjak@gmail.com>
3324 * config/i386/mmx.md (<code>v2sf2): New insn pattern.
3325 (*mmx_<code>v2sf2): New insn_and_split pattern.
3326 (*mmx_nabsv2sf2): Ditto.
3327 (*mmx_andnotv2sf3): New insn pattern.
3328 (*mmx_<code>v2sf3): Ditto.
3329 * config/i386/i386.md (absneg_op): New code attribute.
3330 * config/i386/i386.c (ix86_build_const_vector): Handle V2SFmode.
3331 (ix86_build_signbit_mask): Ditto.
3333 2020-05-12 Richard Biener <rguenther@suse.de>
3335 * tree-ssa-live.c (remove_unused_locals): Remove dead debug
3338 2020-05-12 Jozef Lawrynowicz <jozef.l@mittosystems.com>
3340 * config/msp430/msp430-protos.h (msp430_output_aligned_decl_common):
3341 Update prototype to include "local" argument.
3342 * config/msp430/msp430.c (msp430_output_aligned_decl_common): Add
3343 "local" argument. Handle local common decls.
3344 * config/msp430/msp430.h (ASM_OUTPUT_ALIGNED_DECL_COMMON): Adjust
3345 msp430_output_aligned_decl_common call with 0 for "local" argument.
3346 (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Define.
3348 2020-05-12 Richard Biener <rguenther@suse.de>
3350 * cfghooks.c (split_edge): Preserve EDGE_DFS_BACK if set.
3352 2020-05-12 Martin Liska <mliska@suse.cz>
3356 * sanopt.c (sanitize_rewrite_addressable_params):
3357 Clear DECL_NOT_GIMPLE_REG_P for argument.
3359 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
3361 PR tree-optimization/94980
3362 * tree-vect-generic.c (expand_vector_comparison): Use
3363 vector_element_bits_tree to get the element size in bits,
3364 rather than using TYPE_SIZE.
3365 (expand_vector_condition, vector_element): Likewise.
3367 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
3369 PR tree-optimization/94980
3370 * tree-vect-generic.c (build_replicated_const): Take the number
3371 of bits as a parameter, instead of the type of the elements.
3372 (do_plus_minus): Update accordingly, using vector_element_bits
3373 to calculate the correct number of bits.
3374 (do_negate): Likewise.
3376 2020-05-12 Richard Sandiford <richard.sandiford@arm.com>
3378 PR tree-optimization/94980
3379 * tree.h (vector_element_bits, vector_element_bits_tree): Declare.
3380 * tree.c (vector_element_bits, vector_element_bits_tree): New.
3381 * match.pd: Use the new functions instead of determining the
3382 vector element size directly from TYPE_SIZE(_UNIT).
3383 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Likewise.
3384 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): Likewise.
3385 * tree-vect-stmts.c (vect_is_simple_cond): Likewise.
3386 * tree-vect-generic.c (expand_vector_piecewise): Likewise.
3387 (expand_vector_conversion): Likewise.
3388 (expand_vector_addition): Likewise for a TYPE_SIZE_UNIT used as
3389 a divisor. Convert the dividend to bits to compensate.
3390 * tree-vect-loop.c (vectorizable_live_operation): Call
3391 vector_element_bits instead of open-coding it.
3393 2020-05-12 Jakub Jelinek <jakub@redhat.com>
3395 * omp-offload.h (omp_discover_implicit_declare_target): Declare.
3396 * omp-offload.c: Include context.h.
3397 (omp_declare_target_fn_p, omp_declare_target_var_p,
3398 omp_discover_declare_target_fn_r, omp_discover_declare_target_var_r,
3399 omp_discover_implicit_declare_target): New functions.
3400 * cgraphunit.c (analyze_functions): Call
3401 omp_discover_implicit_declare_target.
3403 2020-05-12 Richard Biener <rguenther@suse.de>
3405 * gimple-fold.c (maybe_canonicalize_mem_ref_addr): Canonicalize
3406 literal constant &MEM[..] to a constant literal.
3408 2020-05-12 Richard Biener <rguenther@suse.de>
3410 PR tree-optimization/95045
3411 * dbgcnt.def (lim): Add debug-counter.
3412 * tree-ssa-loop-im.c: Include dbgcnt.h.
3413 (find_refs_for_sm): Use lim debug counter for store motion
3415 (do_store_motion): Rename form store_motion. Commit edge
3417 (store_motion_loop): ... here.
3418 (tree_ssa_lim): Adjust.
3420 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3422 * config/rs6000/altivec.h (vec_clzm): Rename to vec_cntlzm.
3423 (vec_ctzm): Rename to vec_cnttzm.
3424 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
3425 Change fourth operand for vec_ternarylogic to require
3426 compatibility with unsigned SImode rather than unsigned QImode.
3427 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3428 Remove overloaded forms of vec_gnb that are no longer needed.
3429 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3430 for a Future Architecture): Replace vec_clzm with vec_cntlzm;
3431 replace vec_ctzm with vec_cntlzm; remove four unwanted forms of
3432 vec_gnb; move vec_ternarylogic documentation into this section
3433 and replace const unsigned char with const unsigned int as its
3436 2020-05-11 Carl Love <cel@us.ibm.com>
3438 * config/rs6000/altivec.h (vec_genpcvm): New #define.
3439 * config/rs6000/rs6000-builtin.def (XXGENPCVM_V16QI): New built-in
3441 (XXGENPCVM_V8HI): Likewise.
3442 (XXGENPCVM_V4SI): Likewise.
3443 (XXGENPCVM_V2DI): Likewise.
3444 (XXGENPCVM): New overloaded built-in instantiation.
3445 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins): Add
3446 entries for FUTURE_BUILTIN_VEC_XXGENPCVM.
3447 (altivec_expand_builtin): Add special handling for
3448 FUTURE_BUILTIN_VEC_XXGENPCVM.
3449 (builtin_function_type): Add handling for
3450 FUTURE_BUILTIN_XXGENPCVM_{V16QI,V8HI,V4SI,V2DI}.
3451 * config/rs6000/vsx.md (VSX_EXTRACT_I4): New mode iterator.
3452 (UNSPEC_XXGENPCV): New constant.
3453 (xxgenpcvm_<mode>_internal): New insn.
3454 (xxgenpcvm_<mode>): New expansion.
3455 * doc/extend.texi: Add documentation for vec_genpcvm built-ins.
3457 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3459 * config/rs6000/altivec.h (vec_strir): New #define.
3460 (vec_stril): Likewise.
3461 (vec_strir_p): Likewise.
3462 (vec_stril_p): Likewise.
3463 * config/rs6000/altivec.md (UNSPEC_VSTRIR): New constant.
3464 (UNSPEC_VSTRIL): Likewise.
3465 (vstrir_<mode>): New expansion.
3466 (vstrir_code_<mode>): New insn.
3467 (vstrir_p_<mode>): New expansion.
3468 (vstrir_p_code_<mode>): New insn.
3469 (vstril_<mode>): New expansion.
3470 (vstril_code_<mode>): New insn.
3471 (vstril_p_<mode>): New expansion.
3472 (vstril_p_code_<mode>): New insn.
3473 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vstribr):
3474 New built-in function.
3475 (__builtin_altivec_vstrihr): Likewise.
3476 (__builtin_altivec_vstribl): Likewise.
3477 (__builtin_altivec_vstrihl): Likewise.
3478 (__builtin_altivec_vstribr_p): Likewise.
3479 (__builtin_altivec_vstrihr_p): Likewise.
3480 (__builtin_altivec_vstribl_p): Likewise.
3481 (__builtin_altivec_vstrihl_p): Likewise.
3482 (__builtin_vec_strir): New overloaded built-in function.
3483 (__builtin_vec_stril): Likewise.
3484 (__builtin_vec_strir_p): Likewise.
3485 (__builtin_vec_stril_p): Likewise.
3486 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3487 Define overloaded forms of __builtin_vec_strir,
3488 __builtin_vec_stril, __builtin_vec_strir_p, and
3489 __builtin_vec_stril_p.
3490 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3491 for a Future Architecture): Add description of vec_stril,
3492 vec_stril_p, vec_strir, and vec_strir_p built-in functions.
3494 2020-05-11 Kelvin Nilsen <wschmidt@linux.ibm.com>
3496 * config/rs6000/altivec.h (vec_ternarylogic): New #define.
3497 * config/rs6000/altivec.md (UNSPEC_XXEVAL): New constant.
3499 * config/rs6000/predicates.md (u8bit_cint_operand): New predicate.
3500 * config/rs6000/rs6000-builtin.def: Add handling of new macro
3502 (BU_FUTURE_V_4): New macro. Use it.
3503 (BU_FUTURE_OVERLOAD_4): Likewise.
3504 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Add
3505 handling for quaternary built-in functions.
3506 (altivec_resolve_overloaded_builtin): Add special-case handling
3507 for __builtin_vec_xxeval.
3508 * config/rs6000/rs6000-call.c: Add handling of new macro
3509 RS6000_BUILTIN_4 in initialization of rs6000_builtin_info,
3510 bdesc0_arg, bdesc1_arg, bdesc2_arg, bdesc_3arg,
3511 bdesc_altivec_preds, bdesc_abs, and bdesc_htm arrays.
3512 (altivec_overloaded_builtins): Add definitions for
3513 FUTURE_BUILTIN_VEC_XXEVAL.
3514 (bdesc_4arg): New array.
3515 (htm_expand_builtin): Add handling for quaternary built-in
3517 (rs6000_expand_quaternop_builtin): New function.
3518 (rs6000_expand_builtin): Add handling for quaternary built-in
3520 (rs6000_init_builtins): Initialize builtin_mode_to_type entries
3521 for unsigned QImode and unsigned HImode.
3522 (builtin_quaternary_function_type): New function.
3523 (rs6000_common_init_builtins): Add handling of quaternary
3525 * config/rs6000/rs6000.h (RS6000_BTC_QUATERNARY): New defined
3527 (RS6000_BTC_PREDICATE): Change value of constant.
3528 (RS6000_BTC_ABS): Likewise.
3529 (rs6000_builtins): Add support for new macro RS6000_BUILTIN_4.
3530 * doc/extend.texi (PowerPC AltiVec Built-In Functions Available
3531 for a Future Architecture): Add description of vec_ternarylogic
3534 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3536 * config/rs6000/rs6000-builtin.def (__builtin_pdepd): New built-in
3538 (__builtin_pextd): Likewise.
3539 * config/rs6000/rs6000.md (UNSPEC_PDEPD): New constant.
3540 (UNSPEC_PEXTD): Likewise.
3543 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
3544 a Future Architecture): Add descriptions of __builtin_pdepd and
3545 __builtin_pextd functions.
3547 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3549 * config/rs6000/altivec.h (vec_clrl): New #define.
3550 (vec_clrr): Likewise.
3551 * config/rs6000/altivec.md (UNSPEC_VCLRLB): New constant.
3552 (UNSPEC_VCLRRB): Likewise.
3555 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vclrlb): New
3557 (__builtin_altivec_vclrrb): Likewise.
3558 (__builtin_vec_clrl): New overloaded built-in function.
3559 (__builtin_vec_clrr): Likewise.
3560 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3561 Define overloaded forms of __builtin_vec_clrl and
3563 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3564 for a Future Architecture): Add descriptions of vec_clrl and
3567 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3569 * config/rs6000/rs6000-builtin.def (__builtin_cntlzdm): New
3570 built-in function definition.
3571 (__builtin_cnttzdm): Likewise.
3572 * config/rs6000/rs6000.md (UNSPEC_CNTLZDM): New constant.
3573 (UNSPEC_CNTTZDM): Likewise.
3574 (cntlzdm): New insn.
3575 (cnttzdm): Likewise.
3576 * doc/extend.texi (Basic PowerPC Built-in Functions available for
3577 a Future Architecture): Add descriptions of __builtin_cntlzdm and
3578 __builtin_cnttzdm functions.
3580 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3583 * config/i386/mmx.md (sqrtv2sf2): New insn pattern.
3585 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3587 * config/rs6000/altivec.h (vec_cfuge): New #define.
3588 * config/rs6000/altivec.md (UNSPEC_VCFUGED): New constant.
3589 (vcfuged): New insn.
3590 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vcfuged):
3591 New built-in function.
3592 * config/rs6000/rs6000-call.c (builtin_function_type): Add
3593 handling for FUTURE_BUILTIN_VCFUGED case.
3594 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3595 for a Future Architecture): Add description of vec_cfuge built-in
3598 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3600 * config/rs6000/rs6000-builtin.def (BU_FUTURE_MISC_0): New
3602 (BU_FUTURE_MISC_1): Likewise.
3603 (BU_FUTURE_MISC_2): Likewise.
3604 (BU_FUTURE_MISC_3): Likewise.
3605 (__builtin_cfuged): New built-in function definition.
3606 * config/rs6000/rs6000.md (UNSPEC_CFUGED): New constant.
3608 * doc/extend.texi (Basic PowerPC Built-in Functions Available for
3609 a Future Architecture): New subsubsection.
3611 2020-05-11 Richard Biener <rguenther@suse.de>
3613 PR tree-optimization/95049
3614 * tree-ssa-sccvn.c (set_ssa_val_to): Reject lattice transition
3615 between different constants.
3617 2020-05-11 Richard Sandiford <richard.sandiford@arm.com>
3619 * tree-pretty-print.c (dump_generic_node): Handle BOOLEAN_TYPEs.
3621 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3622 Bill Schmidt <wschmidt@linux.ibm.com>
3624 * config/rs6000/altivec.h (vec_gnb): New #define.
3625 * config/rs6000/altivec.md (UNSPEC_VGNB): New constant.
3627 * config/rs6000/rs6000-builtin.def (BU_FUTURE_OVERLOAD_1): New
3629 (BU_FUTURE_OVERLOAD_2): Likewise.
3630 (BU_FUTURE_OVERLOAD_3): Likewise.
3631 (__builtin_altivec_gnb): New built-in function.
3632 (__buiiltin_vec_gnb): New overloaded built-in function.
3633 * config/rs6000/rs6000-call.c (altivec_overloaded_builtins):
3634 Define overloaded forms of __builtin_vec_gnb.
3635 (rs6000_expand_binop_builtin): Add error checking for 2nd argument
3636 of __builtin_vec_gnb.
3637 (builtin_function_type): Mark return value and arguments unsigned
3638 for FUTURE_BUILTIN_VGNB.
3639 * doc/extend.texi (PowerPC AltiVec Built-in Functions Available
3640 for a Future Architecture): Add description of vec_gnb built-in
3643 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3644 Bill Schmidt <wschmidt@linux.ibm.com>
3646 * config/rs6000/altivec.h (vec_pdep): New macro implementing new
3648 (vec_pext): Likewise.
3649 * config/rs6000/altivec.md (UNSPEC_VPDEPD): New constant.
3650 (UNSPEC_VPEXTD): Likewise.
3653 * config/rs6000/rs6000-builtin.def (__builtin_altivec_vpdepd): New
3655 (__builtin_altivec_vpextd): Likewise.
3656 * config/rs6000/rs6000-call.c (builtin_function_type): Add
3657 handling for FUTURE_BUILTIN_VPDEPD and FUTURE_BUILTIN_VPEXTD
3659 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3660 for a Future Architecture): Add description of vec_pdep and
3661 vec_pext built-in functions.
3663 2020-05-11 Kelvin Nilsen <kelvin@gcc.gnu.org>
3664 Bill Schmidt <wschmidt@linux.ibm.com>
3666 * config/rs6000/altivec.h (vec_clzm): New macro.
3667 (vec_ctzm): Likewise.
3668 * config/rs6000/altivec.md (UNSPEC_VCLZDM): New constant.
3669 (UNSPEC_VCTZDM): Likewise.
3672 * config/rs6000/rs6000-builtin.def (BU_FUTURE_V_0): New macro.
3673 (BU_FUTURE_V_1): Likewise.
3674 (BU_FUTURE_V_2): Likewise.
3675 (BU_FUTURE_V_3): Likewise.
3676 (__builtin_altivec_vclzdm): New builtin definition.
3677 (__builtin_altivec_vctzdm): Likewise.
3678 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Cause
3679 _ARCH_PWR_FUTURE macro to be defined if OPTION_MASK_FUTURE flag is
3681 * config/rs6000/rs6000-call.c (builtin_function_type): Set return
3682 value and parameter types to be unsigned for VCLZDM and VCTZDM.
3683 * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add
3684 support for TARGET_FUTURE flag.
3685 * config/rs6000/rs6000.h (RS6000_BTM_FUTURE): New macro constant.
3686 * doc/extend.texi (PowerPC Altivec Built-in Functions Available
3687 for a Future Architecture): New subsubsection.
3689 2020-05-11 Richard Biener <rguenther@suse.de>
3691 PR tree-optimization/94988
3692 PR tree-optimization/95025
3693 * tree-ssa-loop-im.c (seq_entry): Make a struct, add from.
3694 (sm_seq_push_down): Take extra parameter denoting where we
3696 (execute_sm_exit): Re-issue sm_other stores in the correct
3698 (sm_seq_valid_bb): When always executed, allow sm_other to
3699 prevail inbetween sm_ord and record their stored value.
3700 (hoist_memory_references): Adjust refs_not_supported propagation
3701 and prune sm_other from the end of the ordered sequences.
3703 2020-05-11 Felix Yang <felix.yang@huawei.com>
3706 * config/aarch64/aarch64.md (mov<mode>):
3707 Bitcasts to the equivalent integer mode using gen_lowpart
3708 instead of doing FAIL for scalar floating point move.
3710 2020-05-11 Alex Coplan <alex.coplan@arm.com>
3712 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Add case
3713 to correctly calculate cost for new pattern (*csinv3_uxtw_insn3).
3714 * config/aarch64/aarch64.md (*csinv3_utxw_insn1): New.
3715 (*csinv3_uxtw_insn2): New.
3716 (*csinv3_uxtw_insn3): New.
3717 * config/aarch64/iterators.md (neg_not_cs): New.
3719 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3722 * config/i386/mmx.md (mmx_addv2sf3): Use "v" constraint
3723 instead of "Yv" for AVX alternatives. Add "prefix" attribute.
3724 (*mmx_addv2sf3): Ditto.
3725 (*mmx_subv2sf3): Ditto.
3726 (*mmx_mulv2sf3): Ditto.
3727 (*mmx_<code>v2sf3): Ditto.
3728 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3730 2020-05-11 Uroš Bizjak <ubizjak@gmail.com>
3733 * config/i386/i386.c (ix86_vector_mode_supported_p):
3734 Vectorize 3dNOW! vector modes for TARGET_MMX_WITH_SSE.
3735 * config/i386/mmx.md (*mov<mode>_internal): Do not set
3736 mode of alternative 13 to V2SF for TARGET_MMX_WITH_SSE.
3738 (mmx_addv2sf3): Change operand predicates from
3739 nonimmediate_operand to register_mmxmem_operand.
3740 (addv2sf3): New expander.
3741 (*mmx_addv2sf3): Add SSE/AVX alternatives. Change operand
3742 predicates from nonimmediate_operand to register_mmxmem_operand.
3743 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3745 (mmx_subv2sf3): Change operand predicate from
3746 nonimmediate_operand to register_mmxmem_operand.
3747 (mmx_subrv2sf3): Ditto.
3748 (subv2sf3): New expander.
3749 (*mmx_subv2sf3): Add SSE/AVX alternatives. Change operand
3750 predicates from nonimmediate_operand to register_mmxmem_operand.
3751 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3753 (mmx_mulv2sf3): Change operand predicates from
3754 nonimmediate_operand to register_mmxmem_operand.
3755 (mulv2sf3): New expander.
3756 (*mmx_mulv2sf3): Add SSE/AVX alternatives. Change operand
3757 predicates from nonimmediate_operand to register_mmxmem_operand.
3758 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3760 (mmx_<code>v2sf3): Change operand predicates from
3761 nonimmediate_operand to register_mmxmem_operand.
3762 (<code>v2sf3): New expander.
3763 (*mmx_<code>v2sf3): Add SSE/AVX alternatives. Change operand
3764 predicates from nonimmediate_operand to register_mmxmem_operand.
3765 Enable instruction pattern for TARGET_MMX_WITH_SSE.
3766 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
3768 2020-05-11 Martin Liska <mliska@suse.cz>
3771 * common.opt: Fix typo in option description.
3773 2020-05-11 Martin Liska <mliska@suse.cz>
3775 PR gcov-profile/94928
3776 * gcov-io.h: Add caveat about coverage format parsing and
3777 possible outdated documentation.
3779 2020-05-11 Xiong Hu Luo <luoxhu@linux.ibm.com>
3781 PR tree-optimization/83403
3782 * tree-affine.c (expr_to_aff_combination): Replace SSA_NAME with
3783 determine_value_range, Add fold conversion of MULT_EXPR, fix the
3786 2020-05-10 Gerald Pfeifer <gerald@pfeifer.com>
3788 * config/i386/i386-c.c (ix86_target_macros): Define _ILP32 and
3789 __ILP32__ for 32-bit targets.
3791 2020-05-09 Eric Botcazou <ebotcazou@adacore.com>
3793 * tree.h (expr_align): Delete.
3794 * tree.c (expr_align): Likewise.
3796 2020-05-09 Hans-Peter Nilsson <hp@axis.com>
3798 * resource.c (init_resource_info): Filter-out TARGET_FLAGS_REGNUM
3799 from end_of_function_needs.
3801 * config.gcc: Remove support for crisv32-*-* and cris-*-linux*.
3802 * config/cris/t-linux, config/cris/linux.h, config/cris/linux.opt:
3804 * config/cris/t-elfmulti: Remove crisv32 multilib.
3805 * config/cris: Remove shared-library and CRIS v32 support.
3807 Move trivially from cc0 to reg:CC model, removing most optimizations.
3808 * config/cris/cris.md: Remove all side-effect patterns and their
3809 splitters. Remove most peepholes. Add clobbers of CRIS_CC0_REGNUM
3810 to all but post-reload control-flow and movem insns. Remove
3811 constraints on all modified expanders. Remove obsoleted cc0-related
3813 (attr "cc"): Remove alternative "rev".
3814 (mode_iterator BWDD, DI_, SI_): New.
3815 (mode_attr sCC_destc, cmp_op1c, cmp_op2c): New.
3816 ("tst<mode>"): Remove; fold as "M" alternative into compare insn.
3817 ("mstep_shift", "mstep_mul"): Remove patterns.
3818 ("s<rcond>", "s<ocond>", "s<ncond>"): Anonymize.
3819 * config/cris/cris.c: Change all non-condition-code,
3820 non-control-flow emitted insns to add a parallel with clobber of
3821 CRIS_CC0_REGNUM, mostly by changing from gen_rtx_SET with
3822 emit_insn to use of emit_move_insn, gen_add2_insn or
3823 cris_emit_insn, as convenient.
3824 (cris_reg_overlap_mentioned_p)
3825 (cris_normal_notice_update_cc, cris_notice_update_cc): Remove.
3826 (cris_movem_load_rest_p): Don't assume all elements in a
3828 (cris_store_multiple_op_p): Ditto.
3829 (cris_emit_insn): New function.
3830 * cris/cris-protos.h (cris_emit_insn): Declare.
3833 * config/cris/cris.md (zcond): New code_iterator.
3834 ("*cbranch<mode>4_btstq<CC>"): New insn_and_split.
3836 * config/cris/cris.c (TARGET_FLAGS_REGNUM): Define.
3838 * config/cris/cris.h (REVERSIBLE_CC_MODE): Define to true.
3840 * config/cris/cris.md ("movsi"): For memory destination
3841 post-reload, generate clobberless variant. Similarly for a
3842 zero-source post-reload.
3843 ("*mov_tomem<mode>_split"): New split.
3844 ("*mov_tomem<mode>"): New insn.
3845 ("enabled", mov_tomem_enabled): Define and use to exclude "x" ->
3846 "Q>m" for less-than-SImode.
3847 ("*mov_fromzero<mode>_split"): New split.
3848 ("*mov_fromzero<mode>"): New insn.
3850 Prepare for cmpelim pass to eliminate redundant compare insns.
3851 * config/cris/cris-modes.def: New file.
3852 * config/cris/cris-protos.h (cris_select_cc_mode): Declare.
3853 (cris_notice_update_cc): Remove left-over declaration.
3854 * config/cris/cris.c (TARGET_CC_MODES_COMPATIBLE): Define.
3855 (cris_select_cc_mode, cris_cc_modes_compatible): New functions.
3856 * config/cris/cris.h (SELECT_CC_MODE): Define.
3857 * config/cris/cris.md (NZSET, NZUSE, NZVCSET, NZVCUSE): New
3859 (cond): New code_iterator.
3860 (nzcond): Replacement for incorrect ncond. All callers changed.
3861 (nzvccond): Replacement for ocond. All callers changed.
3862 (rnzcond): Replacement for rcond. All callers changed.
3863 (xCC): New code_attr.
3864 (cmp_op1c, cmp_op0c): Renumber from cmp_op1c and cmp_op2c. All
3866 ("*cmpdi<NZVCSET:mode>"): Rename from "*cmpdi". Replace
3867 CCmode with iteration over NZVCSET.
3868 ("*cmp_ext<BW:mode><NZVCSET:mode>"): Similarly; rename from
3870 ("*cmpsi<NZVCSET:mode>"): Similarly, from "*cmpsi".
3871 ("*cmp<BW:mode><NZVCSET:mode>"): Similarly from "*cmp<mode>".
3872 ("*btst<mode>"): Similarly, from "*btst".
3873 ("*cbranch<mode><code>4"): Rename from "*cbranch<mode>4",
3874 iterating over cond instead of matching the comparison with
3875 ordered_comparison_operator.
3876 ("*cbranch<mode>4_btstq<CC>"): Correct label operand number.
3877 ("b<zcond:code><mode>"): Rename from "b<ncond:code>", iterating
3879 ("b<nzvccond:code><mode>"): Similarly from "b<ocond:code>", over
3880 NZVCUSE. Remove FIXME.
3881 ("*b<nzcond:code>_reversed<mode>"): Similarly from
3882 "*b<ncond:code>_reversed", over NZUSE.
3883 ("*b<nzvccond:code>_reversed<mode>"): Similarly from
3884 "*b<ocond:code>_reversed", over NZVCUSE. Remove FIXME.
3885 ("b<rnzcond:code><mode>"): Similarly from "b<rcond:code>",
3886 over NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3887 depending on CC_NZmode vs. CCmode. Remove FIXME.
3888 ("*b<rnzcond:code>_reversed<mode>"): Similarly from
3889 "*b<rcond:code>_reversed", over NZUSE.
3890 ("*cstore<mode><code>4"): Rename from "*cstore<mode>4",
3891 iterating over cond instead of matching the comparison with
3892 ordered_comparison_operator.
3893 ("*s<nzcond:code><mode>"): Rename from "*s<ncond:code>",
3894 iterating over NZUSE.
3895 ("*s<rnzcond:code><mode>"): Similar from "*s<rcond:code>", over
3896 NZUSE. Reinstate "b<oCC>" vs. "b<CC>" mnemonic choice,
3897 depending on CC_NZmode vs. CCmode.
3898 ("*s<nzvccond:code><mode>"): Simlar from "*s<ocond:code>", over
3899 NZVCUSE. Remove FIXME.
3900 ("cc"): Comment on new use.
3901 ("cc_enabled"): New attribute.
3902 ("enabled"): Make default fall back to cc_enabled.
3903 ("setnz", "ccnz", "setnzvc", "ccnzvc", "setcc", "cccc"): New
3904 default_subst_attrs.
3905 ("setnz_subst", "setnzvc_subst", "setcc_subst"): New default_subst.
3906 ("*movsi_internal<setcc><setnz><setnzvc>"): Rename from
3907 "*movsi_internal". Correct contents of, and rename attribute
3908 "cc" to "cc<cccc><ccnz><ccnzvc>".
3909 ("anz", "anzvc", "acc"): New define_subst_attrs.
3910 ("<acc><anz><anzvc>movhi<setcc><setnz><setnzvc>"): Rename from
3911 "movhi". Rename "cc" attribute to "cc<cccc><ccnz><ccnzvc>".
3912 ("<acc><anz><anzvc>movqi<setcc><setnz><setnzvc>"): Similar from
3913 "movqi". Correct contents of, and rename "cc" attribute to
3914 "cc<cccc><ccnz><ccnzvc>".
3915 ("*b<zcond:code><mode>"): Rename from "b<zcond:code><mode>".
3916 ("*b<nzvccond:code><mode>"): Rename from "b<nzvccond:code><mode>".
3917 ("*b<rnzcond:code><mode>"): Rename from "*b<rnzcond:code><mode>".
3918 ("<acc><anz><anzvc>extend<mode>si2<setcc><setnz><setnzvc>"):
3919 Rename from "extend<mode>si2".
3920 ("<acc><anz><anzvc>zero_extend<mode>si2<setcc><setnz><setnzvc>"):
3921 Similar, from "zero_extend<mode>si2".
3922 ("*adddi3<setnz>"): Rename from "*adddi3".
3923 ("*subdi3<setnz>"): Similarly from "*subdi3".
3924 ("*addsi3<setnz>"): Similarly from "*addsi3".
3925 ("*subsi3<setnz>"): Similarly from "*subsi3".
3926 ("*addhi3<setnz>"): Similarly from "*addhi3" and decorate the
3927 "cc" attribute to "cc<ccnz>".
3928 ("*addqi3<setnz>"): Similarly from "*addqi3".
3929 ("*sub<mode>3<setnz>"): Similarly from "*sub<mode>3".
3930 ("*expanded_andsi<setcc><setnz><setnzvc>"): Rename from
3932 ("*iorsi3<setcc><setnz><setnzvc>"): Similar from "*iorsi3".
3933 Decorate "cc" attribute to make "cc<cccc><ccnz><ccnzvc>".
3934 ("*iorhi3<setcc><setnz><setnzvc>"): Similar from "*iorhi3".
3935 ("*iorqi3<setcc><setnz><setnzvc>"): Similar from "*iorqi3".
3936 ("*expanded_andhi<setcc><setnz><setnzvc>"): Similar from
3937 "*expanded_andhi". Add quick cc-setting alternative for 0..31.
3938 ("*andqi3<setcc><setnz><setnzvc>"): Similar from "*andqi3".
3939 ("<acc><anz><anzvc>xorsi3<setcc><setnz><setnzvc>"): Rename
3941 ("<acc><anz><anzvc>one_cmplsi2<setcc><setnz><setnzvc>"): Rename
3943 ("<acc><anz><anzvc><shlr>si3<setcc><setnz><setnzvc>"): Rename
3945 ("<acc><anz><anzvc>clzsi2<setcc><setnz><setnzvc>"): Rename
3947 ("<acc><anz><anzvc>bswapsi2<setcc><setnz><setnzvc>"): Rename
3949 ("*uminsi3<setcc><setnz><setnzvc>"): Rename from "*uminsi3".
3951 * config/cris/cris-modes.def (CC_ZnN): New CC_MODE.
3952 * config/cris/cris.c (cris_rtx_costs): Handle pre-split bit-test
3953 * config/cris/cris.md (ZnNNZSET, ZnNNZUSE): New mode_iterators.
3954 (znnCC, rznnCC): New code_attrs.
3955 ("*btst<mode>"): Iterator over ZnNNZSET instead of NZVCSET. Remove
3956 obseolete comment. Add belt-and-suspenders mode-test to condition.
3957 Add fixme regarding remaining matched-but-not-generated case.
3958 ("*cbranch<mode>4_btstrq1_<CC>"): New insn_and_split.
3959 ("*cbranch<mode>4_btstqb0_<CC>"): Rename from
3960 "*cbranch<mode>4_btstq<CC>". Split to CC_NZ instead of CC.
3961 ("*b<zcond:code><mode>"): Iterate over ZnNNZUSE instead of NZUSE.
3962 Handle output of CC_ZnNmode.
3963 ("*b<nzcond:code>_reversed<mode>"): Ditto.
3965 * config/cris/cris.c (cris_select_cc_mode): Return CC_NZmode for
3966 NEG too. Correct comment.
3967 * config/cris/cris.md ("<anz>neg<mode>2<setnz>"): Rename from
3970 2020-05-08 Vladimir Makarov <vmakarov@redhat.com>
3972 * ira-color.c (update_costs_from_allocno): Remove
3973 conflict_cost_update_p argument. Propagate costs only along
3974 threads. Always do conflict cost update. Add printing debugging
3976 (update_costs_from_copies): Add printing debugging info.
3977 (restore_costs_from_copies): Ditto.
3978 (assign_hard_reg): Improve debug info.
3979 (push_only_colorable): Ditto. Call update_costs_from_prefs.
3980 (color_allocnos): Remove update_costs_from_prefs.
3982 2020-05-08 Richard Biener <rguenther@suse.de>
3984 * tree-vectorizer.h (vec_info::slp_loads): New.
3985 (vect_optimize_slp): Declare.
3986 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Do
3987 nothing when there are no loads.
3988 (vect_gather_slp_loads): Gather loads into a vector.
3989 (vect_supported_load_permutation_p): Remove.
3990 (vect_analyze_slp_instance): Do not verify permutation
3992 (vect_analyze_slp): Optimize permutations of reductions
3993 after all SLP instances have been gathered and gather
3995 (vect_optimize_slp): New function split out from
3996 vect_supported_load_permutation_p. Elide some permutations.
3997 (vect_slp_analyze_bb_1): Call vect_optimize_slp.
3998 * tree-vect-loop.c (vect_analyze_loop_2): Likewise.
3999 * tree-vect-stmts.c (vectorizable_load): Check whether
4000 the load can be permuted. When generating code assert we can.
4002 2020-05-08 Richard Biener <rguenther@suse.de>
4004 * tree-ssa-sccvn.c (rpo_avail): Change type to
4005 eliminate_dom_walker *.
4006 (eliminate_with_rpo_vn): Adjust rpo_avail to make vn_valueize
4007 use the DOM walker availability.
4008 (vn_reference_fold_indirect): Use get_addr_base_and_unit_offset_1
4009 with vn_valueize as valueization callback.
4010 (vn_reference_maybe_forwprop_address): Likewise.
4011 * tree-dfa.c (get_addr_base_and_unit_offset_1): Also valueize
4012 array_ref_low_bound.
4014 2020-05-08 Jakub Jelinek <jakub@redhat.com>
4016 PR tree-optimization/94786
4017 * match.pd (A ^ ((A ^ B) & -(C cmp D)) -> (C cmp D) ? B : A): New
4021 * config/i386/i386.md (peephole2 after *add<mode>3_cc_overflow_1): New
4025 * tree.c (get_narrower): Reuse the op temporary instead of
4028 PR tree-optimization/94783
4029 * match.pd ((X + (X >> (prec - 1))) ^ (X >> (prec - 1)) to abs (X)):
4032 PR tree-optimization/94956
4033 * match.pd (FFS): Optimize __builtin_ffs* of non-zero argument into
4034 __builtin_ctz* + 1 if direct IFN_CTZ is supported.
4036 PR tree-optimization/94913
4037 * match.pd (A - B + -1 >= A to B >= A): New simplification.
4038 (A - B > A to A < B): Don't test TYPE_OVERFLOW_WRAPS which is always
4039 true for TYPE_UNSIGNED integral types.
4042 PR rtl-optimization/94516
4043 * rtl.h (remove_reg_equal_equiv_notes): Add a bool argument defaulted
4045 * rtlanal.c (remove_reg_equal_equiv_notes): Add no_rescan argument.
4046 Call df_notes_rescan if that argument is not true and returning true.
4047 * combine.c (adjust_for_new_dest): Pass true as second argument to
4048 remove_reg_equal_equiv_notes.
4049 * postreload.c (reload_combine_recognize_pattern): Don't call
4052 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4054 * config/rs6000/rs6000.md (*setnbc_<un>signed_<GPR:mode>): New
4056 (*setnbcr_<un>signed_<GPR:mode>): New define_insn.
4057 (*neg_eq_<mode>): Avoid for TARGET_FUTURE; add missing && 1.
4058 (*neg_ne_<mode>): Likewise.
4060 2020-05-07 Segher Boessenkool <segher@kernel.crashing.org>
4062 * config/rs6000/rs6000.md (setbc_<un>signed_<GPR:mode>): New
4064 (*setbcr_<un>signed_<GPR:mode>): Likewise.
4065 (cstore<mode>4): Use setbc[r] if available.
4066 (<code><GPR:mode><GPR2:mode>2_isel): Avoid for TARGET_FUTURE.
4067 (eq<mode>3): Use setbc for TARGET_FUTURE.
4068 (*eq<mode>3): Avoid for TARGET_FUTURE.
4069 (ne<mode>3): Replace :P with :GPR; use setbc for TARGET_FUTURE;
4070 else for non-Pmode, use gen_eq and gen_xor.
4071 (*ne<mode>3): Avoid for TARGET_FUTURE.
4072 (*eqsi3_ext<mode>): Avoid for TARGET_FUTURE; fix missing && 1.
4074 2020-05-07 Jeff Law <law@redhat.com>
4076 * config/h8300/h8300.md: Move expanders and patterns into
4077 files based on functionality.
4078 * config/h8300/addsub.md: New file.
4079 * config/h8300/bitfield.md: New file
4080 * config/h8300/combiner.md: New file
4081 * config/h8300/divmod.md: New file
4082 * config/h8300/extensions.md: New file
4083 * config/h8300/jumpcall.md: New file
4084 * config/h8300/logical.md: New file
4085 * config/h8300/movepush.md: New file
4086 * config/h8300/multiply.md: New file
4087 * config/h8300/other.md: New file
4088 * config/h8300/proepi.md: New file
4089 * config/h8300/shiftrotate.md: New file
4090 * config/h8300/testcompare.md: New file
4092 * config/h8300/h8300.md (adds/subs splitters): Merge into single
4094 (negation expanders and patterns): Simplify and combine using
4096 (one_cmpl expanders and patterns): Likewise.
4097 (tablejump, indirect_jump patterns ): Likewise.
4098 (shift and rotate expanders and patterns): Likewise.
4099 (absolute value expander and pattern): Drop expander, rename pattern
4101 (peephole2 patterns): Move into...
4102 * config/h8300/peepholes.md: New file.
4104 * config/h8300/constraints.md (L and N): Simplify now that we're not
4105 longer supporting the original H8/300 chip.
4106 * config/h8300/elf.h (LINK_SPEC): Likewise. Default to H8/300H.
4107 * config/h8300/h8300.c (shift_alg_qi): Drop H8/300 support.
4108 (shift_alg_hi, shift_alg_si): Similarly.
4109 (h8300_option_overrides): Similarly. Default to H8/300H. If
4110 compiling for H8/S, then turn off H8/300H. Do not update the
4111 shift_alg tables for H8/300 port.
4112 (h8300_emit_stack_adjustment): Remove support for H8/300. Simplify
4114 (push, split_adds_subs, h8300_rtx_costs): Likewise.
4115 (h8300_print_operand, compute_mov_length): Likewise.
4116 (output_plussi, compute_plussi_length): Likewise.
4117 (compute_plussi_cc, output_logical_op): Likewise.
4118 (compute_logical_op_length, compute_logical_op_cc): Likewise.
4119 (get_shift_alg, h8300_shift_needs_scratch): Likewise.
4120 (output_a_shift, compute_a_shift_length): Likewise.
4121 (output_a_rotate, compute_a_rotate_length): Likewise.
4122 (output_simode_bld, h8300_hard_regno_mode_ok): Likewise.
4123 (h8300_modes_tieable_p, h8300_return_in_memory): Likewise.
4124 * config/h8300/h8300.h (TARGET_CPU_CPP_BUILTINS): Likewise.
4125 (attr_cpu, TARGET_H8300): Remove.
4126 (TARGET_DEFAULT): Update.
4127 (UNITS_PER_WORD, PARM_BOUNDARY): Simplify where possible.
4128 (BIGGEST_ALIGNMENT, STACK_BOUNDARY): Likewise.
4129 (CONSTANT_ADDRESS_P, MOVE_MAX, Pmode): Likewise.
4130 (SIZE_TYPE, POINTER_SIZE, ASM_WORD_OP): Likewise.
4131 * config/h8300/h8300.md: Simplify patterns throughout.
4132 * config/h8300/t-h8300: Update multilib configuration.
4134 * config/h8300/h8300.h (LINK_SPEC): Remove.
4135 (USER_LABEL_PREFIX): Likewise.
4137 * config/h8300/h8300.c (h8300_asm_named_section): Remove.
4138 (h8300_option_override): Remove remnants of COFF support.
4140 2020-05-07 Alan Modra <amodra@gmail.com>
4142 * tree-ssa-reassoc.c (optimize_range_tests_to_bit_test): Replace
4143 set_rtx_cost with set_src_cost.
4144 * tree-switch-conversion.c (bit_test_cluster::emit): Likewise.
4146 2020-05-07 Kewen Lin <linkw@gcc.gnu.org>
4148 * tree-vect-stmts.c (vectorizable_load): Check alignment to avoid
4149 redundant half vector handlings for no peeling gaps.
4151 2020-05-07 Giuliano Belinassi <giuliano.belinassi@usp.br>
4153 * tree-ssa-operands.c (operands_scanner): New class.
4154 (operands_bitmap_obstack): Remove.
4155 (n_initialized): Remove.
4156 (build_uses): Move to operands_scanner class.
4157 (build_vuse): Same as above.
4158 (build_vdef): Same as above.
4159 (verify_ssa_operands): Same as above.
4160 (finalize_ssa_uses): Same as above.
4161 (cleanup_build_arrays): Same as above.
4162 (finalize_ssa_stmt_operands): Same as above.
4163 (start_ssa_stmt_operands): Same as above.
4164 (append_use): Same as above.
4165 (append_vdef): Same as above.
4166 (add_virtual_operand): Same as above.
4167 (add_stmt_operand): Same as above.
4168 (get_mem_ref_operands): Same as above.
4169 (get_tmr_operands): Same as above.
4170 (maybe_add_call_vops): Same as above.
4171 (get_asm_stmt_operands): Same as above.
4172 (get_expr_operands): Same as above.
4173 (parse_ssa_operands): Same as above.
4174 (finalize_ssa_defs): Same as above.
4175 (build_ssa_operands): Same as above, plus create a C-like wrapper.
4176 (update_stmt_operands): Create an instance of operands_scanner.
4178 2020-05-07 Richard Biener <rguenther@suse.de>
4181 * tree-ssa-structalias.c (refered_from_nonlocal_fn): Use
4182 DECL_EXTERNAL || TREE_PUBLIC instead of externally_visible.
4183 (refered_from_nonlocal_var): Likewise.
4184 (ipa_pta_execute): Likewise.
4186 2020-05-07 Erick Ochoa <erick.ochoa@theobroma-systems.com>
4188 * gcc/tree-ssa-struct-alias.c: Fix comments
4190 2020-05-07 Martin Liska <mliska@suse.cz>
4192 * doc/invoke.texi: Fix 2 optindex entries.
4194 2020-05-07 Richard Biener <rguenther@suse.de>
4197 * tree-core.h (tree_decl_common::gimple_reg_flag): Rename ...
4198 (tree_decl_common::not_gimple_reg_flag): ... to this.
4199 * tree.h (DECL_GIMPLE_REG_P): Rename ...
4200 (DECL_NOT_GIMPLE_REG_P): ... to this.
4201 * gimple-expr.c (copy_var_decl): Copy DECL_NOT_GIMPLE_REG_P.
4202 (create_tmp_reg): Simplify.
4203 (create_tmp_reg_fn): Likewise.
4204 (is_gimple_reg): Check DECL_NOT_GIMPLE_REG_P for all regs.
4205 * gimplify.c (create_tmp_from_val): Simplify.
4206 (gimplify_bind_expr): Likewise.
4207 (gimplify_compound_literal_expr): Likewise.
4208 (gimplify_function_tree): Likewise.
4209 (prepare_gimple_addressable): Set DECL_NOT_GIMPLE_REG_P.
4210 * asan.c (create_odr_indicator): Do not clear DECL_GIMPLE_REG_P.
4211 (asan_add_global): Copy it.
4212 * cgraphunit.c (cgraph_node::expand_thunk): Force args
4214 * function.c (gimplify_parameters): Copy
4215 DECL_NOT_GIMPLE_REG_P.
4216 * ipa-param-manipulation.c
4217 (ipa_param_body_adjustments::common_initialization): Simplify.
4218 (ipa_param_body_adjustments::reset_debug_stmts): Copy
4219 DECL_NOT_GIMPLE_REG_P.
4220 * omp-low.c (lower_omp_for_scan): Do not set DECL_GIMPLE_REG_P.
4221 * sanopt.c (sanitize_rewrite_addressable_params): Likewise.
4222 * tree-cfg.c (make_blocks_1): Simplify.
4223 (verify_address): Do not verify DECL_GIMPLE_REG_P setting.
4224 * tree-eh.c (lower_eh_constructs_2): Simplify.
4225 * tree-inline.c (declare_return_variable): Adjust and
4227 (copy_decl_to_var): Copy DECL_NOT_GIMPLE_REG_P.
4228 (copy_result_decl_to_var): Likewise.
4229 * tree-into-ssa.c (pass_build_ssa::execute): Adjust comment.
4230 * tree-nested.c (create_tmp_var_for): Simplify.
4231 * tree-parloops.c (separate_decls_in_region_name): Copy
4232 DECL_NOT_GIMPLE_REG_P.
4233 * tree-sra.c (create_access_replacement): Adjust and
4234 generalize partial def support.
4235 * tree-ssa-forwprop.c (pass_forwprop::execute): Set
4236 DECL_NOT_GIMPLE_REG_P on decls we introduce partial defs on.
4237 * tree-ssa.c (maybe_optimize_var): Handle clearing of
4238 TREE_ADDRESSABLE and setting/clearing DECL_NOT_GIMPLE_REG_P
4240 * lto-streamer-out.c (hash_tree): Hash DECL_NOT_GIMPLE_REG_P.
4241 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Stream
4242 DECL_NOT_GIMPLE_REG_P.
4243 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
4244 * cfgexpand.c (avoid_type_punning_on_regs): New.
4245 (discover_nonconstant_array_refs): Call
4246 avoid_type_punning_on_regs to avoid unsupported mode punning.
4248 2020-05-07 Alex Coplan <alex.coplan@arm.com>
4250 * config/arm/arm.c (arm_add_stmt_cost): Fix declaration, remove class
4253 2020-05-07 Richard Biener <rguenther@suse.de>
4255 PR tree-optimization/57359
4256 * tree-ssa-loop-im.c (im_mem_ref::indep_loop): Remove.
4257 (in_mem_ref::dep_loop): Repurpose.
4258 (LOOP_DEP_BIT): Remove.
4259 (enum dep_kind): New.
4260 (enum dep_state): Likewise.
4261 (record_loop_dependence): New function to populate the
4263 (query_loop_dependence): New function to query the dependence
4265 (memory_accesses::refs_in_loop): Rename to ...
4266 (memory_accesses::refs_loaded_in_loop): ... this and change to
4268 (outermost_indep_loop): Adjust.
4269 (mem_ref_alloc): Likewise.
4270 (gather_mem_refs_stmt): Likewise.
4271 (mem_refs_may_alias_p): Add tbaa_p parameter and pass it down.
4272 (struct sm_aux): New.
4273 (execute_sm): Split code generation on exits, record state
4275 (enum sm_kind): New.
4276 (execute_sm_exit): Exit code generation part.
4277 (sm_seq_push_down): Helper for sm_seq_valid_bb performing
4278 dependence checking on stores reached from exits.
4279 (sm_seq_valid_bb): New function gathering SM stores on exits.
4280 (hoist_memory_references): Re-implement.
4281 (refs_independent_p): Add tbaa_p parameter and pass it down.
4282 (record_dep_loop): Remove.
4283 (ref_indep_loop_p_1): Fold into ...
4284 (ref_indep_loop_p): ... this and generalize for three kinds
4285 of dependence queries.
4286 (can_sm_ref_p): Adjust according to hoist_memory_references
4288 (store_motion_loop): Don't do anything if the set of SM
4289 candidates is empty.
4290 (tree_ssa_lim_initialize): Adjust.
4291 (tree_ssa_lim_finalize): Likewise.
4293 2020-05-07 Eric Botcazou <ebotcazou@adacore.com>
4294 Pierre-Marie de Rodat <derodat@adacore.com>
4296 * dwarf2out.c (add_data_member_location_attribute): Take into account
4297 the variant part offset in the computation of the data bit offset.
4298 (add_bit_offset_attribute): Remove CTX parameter. Pass a new context
4299 in the call to field_byte_offset.
4300 (gen_field_die): Adjust call to add_bit_offset_attribute and remove
4301 confusing assertion.
4302 (analyze_variant_discr): Deal with boolean subtypes.
4304 2020-05-07 Martin Liska <mliska@suse.cz>
4306 * lto-wrapper.c: Split arguments of MAKE environment
4309 2020-05-07 Uroš Bizjak <ubizjak@gmail.com>
4311 * config/alpha/alpha.c (alpha_atomic_assign_expand_fenv): Use
4312 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
4313 fenv_var and new_fenv_var.
4315 2020-05-06 Jakub Jelinek <jakub@redhat.com>
4318 * config/i386/subst.md (store_mask_constraint, store_mask_predicate):
4320 (avx512dq_vextract<shuffletype>64x2_1_maskm,
4321 avx512f_vextract<shuffletype>32x4_1_maskm,
4322 vec_extract_lo_<mode>_maskm, vec_extract_hi_<mode>_maskm): Remove.
4323 (<mask_codefor>avx512dq_vextract<shuffletype>64x2_1<mask_name>): Split
4325 (*avx512dq_vextract<shuffletype>64x2_1,
4326 avx512dq_vextract<shuffletype>64x2_1_mask): ... these new
4327 define_insns. Even in the masked variant allow memory output but in
4328 that case use 0 rather than 0C constraint on the source of masked-out
4330 (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Split
4332 (*avx512f_vextract<shuffletype>32x4_1,
4333 avx512f_vextract<shuffletype>32x4_1_mask): ... these new define_insns.
4334 Even in the masked variant allow memory output but in that case use
4335 0 rather than 0C constraint on the source of masked-out elts.
4336 (vec_extract_lo_<mode><mask_name>): Split into ...
4337 (vec_extract_lo_<mode>, vec_extract_lo_<mode>_mask): ... these new
4338 define_insns. Even in the masked variant allow memory output but in
4339 that case use 0 rather than 0C constraint on the source of masked-out
4341 (vec_extract_hi_<mode><mask_name>): Split into ...
4342 (vec_extract_hi_<mode>, vec_extract_hi_<mode>_mask): ... these new
4343 define_insns. Even in the masked variant allow memory output but in
4344 that case use 0 rather than 0C constraint on the source of masked-out
4347 2020-05-06 qing zhao <qing.zhao@oracle.com>
4350 * common.opt: Add -flarge-source-files.
4351 * doc/invoke.texi: Document it.
4352 * toplev.c (process_options): set line_table->default_range_bits
4353 to 0 when flag_large_source_files is true.
4355 2020-05-06 Uroš Bizjak <ubizjak@gmail.com>
4358 * config/i386/predicates.md (add_comparison_operator): New predicate.
4359 * config/i386/i386.md (compare->add splitter): New splitters.
4361 2020-05-06 Richard Biener <rguenther@suse.de>
4363 * tree-vectorizer.h (vect_transform_slp_perm_load): Adjust.
4364 * tree-vect-data-refs.c (vect_slp_analyze_node_dependences):
4365 Remove slp_instance parameter, just iterate over all scalar stmts.
4366 (vect_slp_analyze_instance_dependence): Adjust and likewise.
4367 * tree-vect-slp.c (vect_bb_slp_scalar_cost): Remove unused BB
4369 (vect_schedule_slp): Just iterate over all scalar stmts.
4370 (vect_supported_load_permutation_p): Adjust.
4371 (vect_transform_slp_perm_load): Remove slp_instance parameter,
4372 instead use the number of lanes in the node as group size.
4373 * tree-vect-stmts.c (vect_model_load_cost): Get vectorization
4374 factor instead of slp_instance as parameter.
4375 (vectorizable_load): Adjust.
4377 2020-05-06 Andreas Schwab <schwab@suse.de>
4379 * config/aarch64/driver-aarch64.c: Include "aarch64-protos.h".
4380 (aarch64_get_extension_string_for_isa_flags): Don't declare.
4382 2020-05-06 Richard Biener <rguenther@suse.de>
4385 * cfgloopmanip.c (create_preheader): Require non-complex
4386 preheader edge for CP_SIMPLE_PREHEADERS.
4388 2020-05-06 Richard Biener <rguenther@suse.de>
4390 PR tree-optimization/94963
4391 * tree-ssa-loop-im.c (execute_sm_if_changed): Remove
4392 no-warning marking of the conditional store.
4393 (execute_sm): Instead mark the uninitialized state
4394 on loop entry to be not warned about.
4396 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
4398 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_TSXLDTRK_SET,
4399 OPTION_MASK_ISA2_TSXLDTRK_UNSET): New macros.
4400 * config.gcc: Add tsxldtrkintrin.h to extra_headers.
4401 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
4403 * config/i386/i386-builtin.def: Add new builtins.
4404 * config/i386/i386-c.c (ix86_target_macros_internal): Define
4406 * config/i386/i386-options.c (ix86_target_string): Add
4408 (ix86_valid_target_attribute_inner_p): Add attribute tsxldtrk.
4409 * config/i386/i386.h (TARGET_TSXLDTRK, TARGET_TSXLDTRK_P):
4411 * config/i386/i386.md (define_c_enum "unspec"): Add
4412 UNSPECV_SUSLDTRK, UNSPECV_RESLDTRK.
4413 (TSXLDTRK): New define_int_iterator.
4414 ("<tsxldtrk>"): New define_insn.
4415 * config/i386/i386.opt: Add -mtsxldtrk.
4416 * config/i386/immintrin.h: Include tsxldtrkintrin.h.
4417 * config/i386/tsxldtrkintrin.h: New.
4418 * doc/invoke.texi: Document -mtsxldtrk.
4420 2020-05-06 Jakub Jelinek <jakub@redhat.com>
4422 PR tree-optimization/94921
4423 * match.pd (~(~X - Y) -> X + Y, ~(~X + Y) -> X - Y): New
4426 2020-05-06 Richard Biener <rguenther@suse.de>
4428 PR tree-optimization/94965
4429 * tree-vect-stmts.c (vectorizable_load): Fix typo.
4431 2020-05-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4433 * doc/install.texi: Replace Sun with Solaris as appropriate.
4434 (Tools/packages necessary for building GCC, Perl version between
4435 5.6.1 and 5.6.24): Remove Solaris 8 reference.
4436 (Installing GCC: Binaries, Solaris 2 (SPARC, Intel)): Remove
4438 (Specific, i?86-*-solaris2*): Update version references for
4439 Solaris 11.3 and later. Remove gas 2.26 caveat.
4440 (Specific, *-*-solaris2*): Update version references for
4441 Solaris 11.3 and later. Remove boehm-gc reference.
4442 Document GMP, MPFR caveats on Solaris 11.3.
4443 (Specific, sparc-sun-solaris2*): Update Solaris 9 references.
4444 (Specific, sparc64-*-solaris2*): Likewise.
4445 Document --build requirement.
4447 2020-05-06 Jakub Jelinek <jakub@redhat.com>
4450 * config/riscv/riscv-builtins.c (riscv_atomic_assign_expand_fenv): Use
4451 TARGET_EXPR instead of MODIFY_EXPR for first assignment to old_flags.
4453 PR rtl-optimization/94873
4454 * combine.c (combine_instructions): Don't optimize using REG_EQUAL
4455 note if SET_SRC (set) has side-effects.
4457 2020-05-06 Hongtao Liu <hongtao.liu@intel.com>
4458 Wei Xiao <wei3.xiao@intel.com>
4460 * common/config/i386/i386-common.c (OPTION_MASK_ISA2_SERIALIZE_SET,
4461 OPTION_MASK_ISA2_SERIALIZE_UNSET): New macros.
4462 (ix86_handle_option): Handle -mserialize.
4463 * config.gcc (serializeintrin.h): New header file.
4464 * config/i386/cpuid.h (bit_SERIALIZE): New bit.
4465 * config/i386/driver-i386.c (host_detect_local_cpu): Detect
4467 * config/i386/i386-builtin.def: Add new builtin.
4468 * config/i386/i386-c.c (__SERIALIZE__): New macro.
4469 * config/i386/i386-options.c (ix86_target_opts_isa2_opts):
4471 * (ix86_valid_target_attribute_inner_p): Add target attribute
4473 * config/i386/i386.h (TARGET_SERIALIZE, TARGET_SERIALIZE_P):
4475 * config/i386/i386.md (UNSPECV_SERIALIZE): New unspec.
4476 (serialize): New define_insn.
4477 * config/i386/i386.opt (mserialize): New option
4478 * config/i386/immintrin.h: Include serailizeintrin.h.
4479 * config/i386/serializeintrin.h: New header file.
4480 * doc/invoke.texi: Add documents for -mserialize.
4482 2020-05-06 Richard Biener <rguenther@suse.de>
4484 * tree-cfg.c (verify_gimple_assign_unary): Adjust integer
4485 to/from pointer conversion checking.
4487 2020-05-05 Michael Meissner <meissner@linux.ibm.com>
4489 * config/rs6000/rs6000-builtin.def: Delete changes meant for a
4491 * config/rs6000/rs6000-c.c: Likewise.
4492 * config/rs6000/rs6000-call.c: Likewise.
4493 * config/rs6000/rs6000.c: Likewise.
4495 2020-05-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
4497 * config/rtems.h (RTEMS_STARTFILE_SPEC): Define if undefined.
4498 (RTEMS_ENDFILE_SPEC): Likewise.
4499 (STARTFILE_SPEC): Update comment. Add RTEMS_STARTFILE_SPEC.
4500 (ENDFILE_SPEC): Add RTEMS_ENDFILE_SPEC.
4501 (LIB_SPECS): Support -nodefaultlibs option.
4502 * config/or1k/rtems.h (RTEMS_STARTFILE_SPEC): Define.
4503 (RTEMS_ENDFILE_SPEC): Likewise.
4504 * config/rs6000/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
4505 (RTEMS_ENDFILE_SPEC): Likewise.
4506 * config/v850/rtems.h (RTEMS_STARTFILE_SPEC): Likewise.
4507 (RTEMS_ENDFILE_SPEC): Likewise.
4509 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4511 * config/pru/pru.c (pru_hard_regno_call_part_clobbered): Remove.
4512 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Remove.
4514 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4516 * config/pru/pru.h: Mark R3.w0 as caller saved.
4518 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4520 * config/pru/pru.c (pru_emit_doloop): Use new gen_doloop_end_internal
4521 and gen_doloop_begin_internal.
4522 (pru_reorg_loop): Use gen_pruloop with mode.
4523 * config/pru/pru.md: Use new @insn syntax.
4525 2020-05-05 Dimitar Dimitrov <dimitar@dinux.eu>
4527 * config/pru/pru.c (pru_print_operand): Fix fall through comment.
4529 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
4531 * config/i386/i386.md (fixuns_trunc<mode>si2): Use
4532 "clobber (scratch:M)" instad of "clobber (match_scratch:M N)".
4533 (addqi3_cconly_overflow): Ditto.
4534 (umulv<mode>4): Ditto.
4535 (<s>mul<mode>3_highpart): Ditto.
4536 (tls_global_dynamic_32): Ditto.
4537 (tls_local_dynamic_base_32): Ditto.
4544 (*adddi_4): Remove "m" constraint from scratch operand.
4545 (*add<mode>_4): Ditto.
4547 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4549 PR rtl-optimization/94516
4550 * postreload.c (reload_cse_simplify): When replacing sp = sp + const
4551 with sp = reg, add REG_EQUAL note with sp + const.
4552 * combine-stack-adj.c (try_apply_stack_adjustment): Change return
4553 type from int to bool. Add LIVE and OTHER_INSN arguments. Undo
4554 postreload sp = sp + const to sp = reg optimization if needed and
4556 (combine_stack_adjustments_for_block): Add LIVE argument. Handle
4557 reg = sp insn with sp + const REG_EQUAL note. Adjust
4558 try_apply_stack_adjustment caller, call
4559 df_simulate_initialize_forwards and df_simulate_one_insn_forwards.
4560 (combine_stack_adjustments): Allocate and free LIVE bitmap,
4561 adjust combine_stack_adjustments_for_block caller.
4563 2020-05-05 Martin Liska <mliska@suse.cz>
4565 PR gcov-profile/93623
4566 * tree-cfg.c (stmt_can_terminate_bb_p): Update comment to reflect
4569 2020-05-05 Martin Liska <mliska@suse.cz>
4571 * opt-functions.awk (opt_args_non_empty): New function.
4572 * opt-read.awk: Use the function for various option arguments.
4574 2020-05-05 Martin Liska <mliska@suse.cz>
4577 * lto-wrapper.c (run_gcc): When using -flto=jobserver,
4578 report warning when the jobserver is not detected.
4580 2020-05-05 Martin Liska <mliska@suse.cz>
4582 PR gcov-profile/94636
4583 * gcov.c (main): Print total lines summary at the end.
4584 (generate_results): Expect file_name always being non-null.
4585 Print newline after intermediate file is printed in order to align with
4586 what we do for normal files.
4588 2020-05-05 Martin Liska <mliska@suse.cz>
4590 * dumpfile.c (dump_switch_p): Change return type
4591 and print option suggestion.
4592 * dumpfile.h: Change return type.
4593 * opts-global.c (handle_common_deferred_options):
4594 Move error into dump_switch_p function.
4596 2020-05-05 Martin Liska <mliska@suse.cz>
4599 * alloc-pool.h: Use const for some arguments.
4600 * bitmap.h: Likewise.
4601 * mem-stats.h: Likewise.
4602 * sese.h (get_entry_bb): Likewise.
4603 (get_exit_bb): Likewise.
4605 2020-05-05 Richard Biener <rguenther@suse.de>
4607 * tree-vect-slp.c (struct vdhs_data): New.
4608 (vect_detect_hybrid_slp): New walker.
4609 (vect_detect_hybrid_slp): Rewrite.
4611 2020-05-05 Richard Biener <rguenther@suse.de>
4614 * tree-ssa-structalias.c (ipa_pta_execute): Use
4615 varpool_node::externally_visible_p ().
4616 (refered_from_nonlocal_var): Likewise.
4618 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
4620 * gcc.c (LTO_PLUGIN_SPEC): Define if not already.
4621 (LINK_PLUGIN_SPEC): Execute LTO_PLUGIN_SPEC.
4622 * config/vxworks.h (LTO_PLUGIN_SPEC): Define.
4624 2020-05-05 Eric Botcazou <ebotcazou@adacore.com>
4626 * gimplify.c (gimplify_init_constructor): Do not put the constructor
4627 into static memory if it is not complete.
4629 2020-05-05 Richard Biener <rguenther@suse.de>
4631 PR tree-optimization/94949
4632 * tree-ssa-loop-im.c (execute_sm): Check whether we use
4633 the multithreaded model or always compute the stored value
4634 before eliding a load.
4636 2020-05-05 Alex Coplan <alex.coplan@arm.com>
4638 * config/aarch64/aarch64.md (*one_cmpl_zero_extend): New.
4640 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4642 PR tree-optimization/94800
4643 * match.pd (X + (X << C) to X * (1 + (1 << C)),
4644 (X << C1) + (X << C2) to X * ((1 << C1) + (1 << C2))): New
4648 * config/i386/mmx.md (*vec_dupv4hi): Use xYw constraints instead of Yv.
4650 PR tree-optimization/94914
4651 * match.pd ((((type)A * B) >> prec) != 0 to .MUL_OVERFLOW(A, B) != 0):
4654 2020-05-05 Uroš Bizjak <ubizjak@gmail.com>
4656 * config/i386/i386.md (*testqi_ext_3): Use
4657 int_nonimmediate_operand instead of manual mode checks.
4658 (*x86_mov<SWI48:mode>cc_0_m1_neg_leu<SWI:mode>):
4659 Use int_nonimmediate_operand predicate. Rewrite
4660 define_insn_and_split pattern to a combine pass splitter.
4662 2020-05-05 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
4664 * configure.ac <i[34567]86-*-*>: Add --32 to tls_as_opt on Solaris.
4665 * configure: Regenerate.
4667 2020-05-05 Jakub Jelinek <jakub@redhat.com>
4670 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
4671 ssse3_ph<plusminus_mnemonic>wv8hi3, ssse3_ph<plusminus_mnemonic>wv4hi3,
4672 avx2_ph<plusminus_mnemonic>dv8si3, ssse3_ph<plusminus_mnemonic>dv4si3,
4673 ssse3_ph<plusminus_mnemonic>dv2si3): Simplify RTL patterns.
4675 2020-05-04 Clement Chigot <clement.chigot@atos.net>
4676 David Edelsohn <dje.gcc@gmail.com>
4678 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Override explicit
4679 for fmodl, frexpl, ldexpl and modfl builtins.
4681 2020-05-04 Richard Sandiford <richard.sandiford@arm.com>
4684 * internal-fn.c (expand_load_lanes_optab_fn): Emit a move if the
4685 chosen lhs is different from the gcall lhs.
4686 (expand_mask_load_optab_fn): Likewise.
4687 (expand_gather_load_optab_fn): Likewise.
4689 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4692 * config/i386/i386.md (*neg<mode>_ccc): New insn pattern.
4693 (EQ compare->LTU compare splitter): New splitter.
4694 (NE compare->NEG splitter): Ditto.
4696 2020-05-04 Marek Polacek <polacek@redhat.com>
4699 2020-04-30 Marek Polacek <polacek@redhat.com>
4702 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4703 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4705 2020-05-04 Richard Biener <rguenther@suse.de>
4707 PR tree-optimization/93891
4708 * tree-ssa-sccvn.c (vn_reference_lookup_3): Fall back to
4709 the original reference tree for assessing access alignment.
4711 2020-05-04 Richard Biener <rguenther@suse.de>
4713 PR tree-optimization/39612
4714 * tree-ssa-loop-im.c (im_mem_ref::loaded): New member.
4715 (set_ref_loaded_in_loop): New.
4716 (mark_ref_loaded): Likewise.
4717 (gather_mem_refs_stmt): Call mark_ref_loaded for loads.
4718 (execute_sm): Avoid issueing a load when it was not there.
4719 (execute_sm_if_changed): Avoid issueing warnings for the
4722 2020-05-04 Martin Jambor <mjambor@suse.cz>
4725 * tree-inline.c (tree_function_versioning): Leave any type conversion
4726 of replacements to setup_one_parameter and its friend
4727 force_value_to_type.
4729 2020-05-04 Uroš Bizjak <ubizjak@gmail.com>
4732 * config/i386/predicates.md (shr_comparison_operator): New predicate.
4733 * config/i386/i386.md (compare->shr splitter): New splitters.
4735 2020-05-04 Jakub Jelinek <jakub@redhat.com>
4737 PR tree-optimization/94718
4738 * match.pd ((X < 0) != (Y < 0) into (X ^ Y) < 0): New simplification.
4740 PR tree-optimization/94718
4741 * match.pd (bitop (convert @0) (convert? @1)): For GIMPLE, if we can,
4742 replace two nop conversions on bit_{and,ior,xor} argument
4743 and result with just one conversion on the result or another argument.
4745 PR tree-optimization/94718
4746 * fold-const.c (fold_binary_loc): Move (X & C) eqne (Y & C)
4747 -> (X ^ Y) & C eqne 0 optimization to ...
4748 * match.pd ((X & C) op (Y & C) into (X ^ Y) & C op 0): ... here.
4750 * opts.c (get_option_html_page): Instead of hardcoding a list of
4751 options common between C/C++ and Fortran only use gfortran/
4752 documentation for warnings that have CL_Fortran set but not
4755 2020-05-03 Uroš Bizjak <ubizjak@gmail.com>
4757 * config/i386/i386-expand.c (ix86_expand_int_movcc):
4758 Use plus_constant instead of gen_rtx_PLUS with GEN_INT.
4759 (emit_memmov): Ditto.
4760 (emit_memset): Ditto.
4761 (ix86_expand_strlensi_unroll_1): Ditto.
4762 (release_scratch_register_on_entry): Ditto.
4763 (gen_frame_set): Ditto.
4764 (ix86_emit_restore_reg_using_pop): Ditto.
4765 (ix86_emit_outlined_ms2sysv_restore): Ditto.
4766 (ix86_expand_epilogue): Ditto.
4767 (ix86_expand_split_stack_prologue): Ditto.
4768 * config/i386/i386.md (push immediate splitter): Ditto.
4772 2020-05-02 Iain Sandoe <iain@sandoe.co.uk>
4774 PR translation/93861
4775 * config/darwin-driver.c (darwin_driver_init): Adjust spelling in
4778 2020-05-02 Jakub Jelinek <jakub@redhat.com>
4780 * config/tilegx/tilegx.md
4781 (insn_stnt<I124MODE:n>_add<I48MODE:bitsuffix>): Use <I124MODE:n>
4782 rather than just <n>.
4784 2020-05-01 H.J. Lu <hongjiu.lu@intel.com>
4787 * cfgexpand.c (pass_expand::execute): Set crtl->patch_area_size
4788 and crtl->patch_area_entry.
4789 * emit-rtl.h (rtl_data): Add patch_area_size and patch_area_entry.
4790 * opts.c (common_handle_option): Limit
4791 function_entry_patch_area_size and function_entry_patch_area_start
4792 to USHRT_MAX. Fix a typo in error message.
4793 * varasm.c (assemble_start_function): Use crtl->patch_area_size
4794 and crtl->patch_area_entry.
4795 * doc/invoke.texi: Document the maximum value for
4796 -fpatchable-function-entry.
4798 2020-05-01 Iain Sandoe <iain@sandoe.co.uk>
4800 * config/i386/darwin.h: Repair SUBTARGET_INIT_BUILTINS.
4801 Override SUBTARGET_SHADOW_OFFSET macro.
4803 2020-05-01 Andreas Tobler <andreast@gcc.gnu.org>
4805 * config/i386/i386.h: Define a new macro: SUBTARGET_SHADOW_OFFSET.
4806 * config/i386/i386.c (ix86_asan_shadow_offset): Use this macro.
4807 * config/i386/darwin.h: Override the SUBTARGET_SHADOW_OFFSET macro.
4808 * config/i386/freebsd.h: Likewise.
4809 * config/freebsd.h (LIBASAN_EARLY_SPEC): Define.
4810 LIBTSAN_EARLY_SPEC): Likewise. (LIBLSAN_EARLY_SPEC): Likewise.
4812 2020-04-30 Alexandre Oliva <oliva@adacore.com>
4814 * doc/sourcebuild.texi (Effective-Target Keywords): Document
4815 the newly-introduced fileio effective target.
4817 2020-04-30 Richard Sandiford <richard.sandiford@arm.com>
4819 PR rtl-optimization/94740
4820 * cse.c (cse_process_notes_1): Replace with...
4821 (cse_process_note_1): ...this new function, acting as a
4822 simplify_replace_fn_rtx callback to process_note. Handle only
4823 REGs and MEMs directly. Validate the MEM if cse_process_note
4824 changes its address.
4825 (cse_process_notes): Replace with...
4826 (cse_process_note): ...this new function.
4827 (cse_extended_basic_block): Update accordingly, iterating over
4828 the register notes and passing individual notes to cse_process_note.
4830 2020-04-30 Carl Love <cel@us.ibm.com>
4832 * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
4834 2020-04-30 Martin Jambor <mjambor@suse.cz>
4837 * cgraph.c (clone_of_p): Also consider thunks whih had their bodies
4838 saved by the inliner and thunks which had their call inlined.
4839 * ipa-inline-transform.c (save_inline_function_body): Fill in
4840 former_clone_of of new body holders.
4842 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4844 * BASE-VER: Set to 11.0.0.
4846 2020-04-30 Jonathan Wakely <jwakely@redhat.com>
4848 * pretty-print.c (pp_take_prefix): Fix spelling in comment.
4850 2020-04-30 Marek Polacek <polacek@redhat.com>
4853 * tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
4854 (check_aligned_type): Check if TYPE_USER_ALIGN match.
4856 2020-04-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
4858 * config/aarch64/aarch64.h (TARGET_OUTLINE_ATOMICS): Define.
4859 * config/aarch64/aarch64.opt (moutline-atomics): Change to Int variable.
4860 * doc/invoke.texi (moutline-atomics): Document as on by default.
4862 2020-04-30 Szabolcs Nagy <szabolcs.nagy@arm.com>
4865 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Remove
4866 the check for NOTE_INSN_DELETED_LABEL.
4868 2020-04-30 Jakub Jelinek <jakub@redhat.com>
4870 * configure.ac (--with-documentation-root-url,
4871 --with-changes-root-url): Diagnose URL not ending with /,
4872 use AC_DEFINE_UNQUOTED instead of AC_SUBST.
4873 * opts.h (get_changes_url): Remove.
4874 * opts.c (get_changes_url): Remove.
4875 * Makefile.in (CFLAGS-opts.o): Don't add -DDOCUMENTATION_ROOT_URL
4876 or -DCHANGES_ROOT_URL.
4877 * doc/install.texi (--with-documentation-root-url,
4878 --with-changes-root-url): Document.
4879 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Don't call
4880 get_changes_url and free, change url variable type to const char * and
4881 set it to CHANGES_ROOT_URL "gcc-10/changes.html#empty_base".
4882 * config/s390/s390.c (s390_function_arg_vector,
4883 s390_function_arg_float): Likewise.
4884 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4886 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
4888 * config.in: Regenerate.
4889 * configure: Regenerate.
4891 2020-04-30 Christophe Lyon <christophe.lyon@linaro.org>
4894 * config/arm/arm.c (isr_attribute_args): Remove duplicate entries.
4896 2020-04-30 Andreas Krebbel <krebbel@linux.ibm.com>
4898 * config/s390/constraints.md ("j>f", "jb4"): New constraints.
4899 * config/s390/vecintrin.h (vec_load_len_r, vec_store_len_r): Fix
4901 * config/s390/vx-builtins.md ("vlrlrv16qi", "vstrlrv16qi"): Add a
4903 ("*vlrlrv16qi", "*vstrlrv16qi"): Add alternative for vl/vst.
4904 Change constraint for vlrl/vstrl to jb4.
4906 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4908 * var-tracking.c (vt_initialize): Move variables pre and post
4909 into inner block and initialize both in order to fix warning
4910 about uninitialized use. Remove unnecessary checks for
4911 frame_pointer_needed.
4913 2020-04-30 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4915 * toplev.c (output_stack_usage_1): Ensure that first
4916 argument to fprintf is not null.
4918 2020-04-29 Jakub Jelinek <jakub@redhat.com>
4920 * configure.ac (-with-changes-root-url): New configure option,
4921 defaulting to https://gcc.gnu.org/.
4922 * Makefile.in (CFLAGS-opts.o): Define CHANGES_ROOT_URL for
4924 * pretty-print.c (get_end_url_string): New function.
4925 (pp_format): Handle %{ and %} for URLs.
4926 (pp_begin_url): Use pp_string instead of pp_printf.
4927 (pp_end_url): Use get_end_url_string.
4928 * opts.h (get_changes_url): Declare.
4929 * opts.c (get_changes_url): New function.
4930 * config/rs6000/rs6000-call.c: Include opts.h.
4931 (rs6000_discover_homogeneous_aggregate): Use %{in GCC 10.1%} instead
4932 of just in GCC 10.1 in diagnostics and add URL.
4933 * config/arm/arm.c (aapcs_vfp_is_call_or_return_candidate): Likewise.
4934 * config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
4936 * config/s390/s390.c (s390_function_arg_vector,
4937 s390_function_arg_float): Likewise.
4938 * configure: Regenerated.
4941 * config/s390/s390.c (s390_function_arg_vector,
4942 s390_function_arg_float): Use DECL_FIELD_ABI_IGNORED instead of
4943 cxx17_empty_base_field_p. In -Wpsabi diagnostics use the type
4944 passed to the function rather than the type of the single element.
4945 Rename cxx17_empty_base_seen variable to empty_base_seen, change
4946 type to int, and adjust diagnostics depending on if the field
4947 has [[no_unique_attribute]] or not.
4950 * config/i386/avx512bwintrin.h (_mm512_alignr_epi8,
4951 _mm512_mask_alignr_epi8, _mm512_maskz_alignr_epi8): Wrap macro operands
4952 used in casts into parens.
4953 * config/i386/avx512fintrin.h (_mm512_cvt_roundps_ph, _mm512_cvtps_ph,
4954 _mm512_mask_cvt_roundps_ph, _mm512_mask_cvtps_ph,
4955 _mm512_maskz_cvt_roundps_ph, _mm512_maskz_cvtps_ph,
4956 _mm512_mask_cmp_epi64_mask, _mm512_mask_cmp_epi32_mask,
4957 _mm512_mask_cmp_epu64_mask, _mm512_mask_cmp_epu32_mask,
4958 _mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
4959 _mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask): Likewise.
4960 * config/i386/avx512vlbwintrin.h (_mm256_mask_alignr_epi8,
4961 _mm256_maskz_alignr_epi8, _mm_mask_alignr_epi8, _mm_maskz_alignr_epi8,
4962 _mm256_mask_cmp_epu8_mask): Likewise.
4963 * config/i386/avx512vlintrin.h (_mm_mask_cvtps_ph, _mm_maskz_cvtps_ph,
4964 _mm256_mask_cvtps_ph, _mm256_maskz_cvtps_ph): Likewise.
4965 * config/i386/f16cintrin.h (_mm_cvtps_ph, _mm256_cvtps_ph): Likewise.
4966 * config/i386/shaintrin.h (_mm_sha1rnds4_epu32): Likewise.
4969 * config/i386/avx2intrin.h (_mm_mask_i32gather_pd,
4970 _mm256_mask_i32gather_pd, _mm_mask_i64gather_pd,
4971 _mm256_mask_i64gather_pd, _mm_mask_i32gather_ps,
4972 _mm256_mask_i32gather_ps, _mm_mask_i64gather_ps,
4973 _mm256_mask_i64gather_ps, _mm_i32gather_epi64,
4974 _mm_mask_i32gather_epi64, _mm256_i32gather_epi64,
4975 _mm256_mask_i32gather_epi64, _mm_i64gather_epi64,
4976 _mm_mask_i64gather_epi64, _mm256_i64gather_epi64,
4977 _mm256_mask_i64gather_epi64, _mm_i32gather_epi32,
4978 _mm_mask_i32gather_epi32, _mm256_i32gather_epi32,
4979 _mm256_mask_i32gather_epi32, _mm_i64gather_epi32,
4980 _mm_mask_i64gather_epi32, _mm256_i64gather_epi32,
4981 _mm256_mask_i64gather_epi32): Surround macro parameter uses with
4983 (_mm_i32gather_pd, _mm256_i32gather_pd, _mm_i64gather_pd,
4984 _mm256_i64gather_pd, _mm_i32gather_ps, _mm256_i32gather_ps,
4985 _mm_i64gather_ps, _mm256_i64gather_ps): Likewise. Don't use
4986 as mask vector containing -1.0 or -1.0f elts, but instead vector
4987 with all bits set using _mm*_cmpeq_p? with zero operands.
4988 * config/i386/avx512fintrin.h (_mm512_i32gather_ps,
4989 _mm512_mask_i32gather_ps, _mm512_i32gather_pd,
4990 _mm512_mask_i32gather_pd, _mm512_i64gather_ps,
4991 _mm512_mask_i64gather_ps, _mm512_i64gather_pd,
4992 _mm512_mask_i64gather_pd, _mm512_i32gather_epi32,
4993 _mm512_mask_i32gather_epi32, _mm512_i32gather_epi64,
4994 _mm512_mask_i32gather_epi64, _mm512_i64gather_epi32,
4995 _mm512_mask_i64gather_epi32, _mm512_i64gather_epi64,
4996 _mm512_mask_i64gather_epi64, _mm512_i32scatter_ps,
4997 _mm512_mask_i32scatter_ps, _mm512_i32scatter_pd,
4998 _mm512_mask_i32scatter_pd, _mm512_i64scatter_ps,
4999 _mm512_mask_i64scatter_ps, _mm512_i64scatter_pd,
5000 _mm512_mask_i64scatter_pd, _mm512_i32scatter_epi32,
5001 _mm512_mask_i32scatter_epi32, _mm512_i32scatter_epi64,
5002 _mm512_mask_i32scatter_epi64, _mm512_i64scatter_epi32,
5003 _mm512_mask_i64scatter_epi32, _mm512_i64scatter_epi64,
5004 _mm512_mask_i64scatter_epi64): Surround macro parameter uses with
5006 * config/i386/avx512pfintrin.h (_mm512_prefetch_i32gather_pd,
5007 _mm512_prefetch_i32gather_ps, _mm512_mask_prefetch_i32gather_pd,
5008 _mm512_mask_prefetch_i32gather_ps, _mm512_prefetch_i64gather_pd,
5009 _mm512_prefetch_i64gather_ps, _mm512_mask_prefetch_i64gather_pd,
5010 _mm512_mask_prefetch_i64gather_ps, _mm512_prefetch_i32scatter_pd,
5011 _mm512_prefetch_i32scatter_ps, _mm512_mask_prefetch_i32scatter_pd,
5012 _mm512_mask_prefetch_i32scatter_ps, _mm512_prefetch_i64scatter_pd,
5013 _mm512_prefetch_i64scatter_ps, _mm512_mask_prefetch_i64scatter_pd,
5014 _mm512_mask_prefetch_i64scatter_ps): Likewise.
5015 * config/i386/avx512vlintrin.h (_mm256_mmask_i32gather_ps,
5016 _mm_mmask_i32gather_ps, _mm256_mmask_i32gather_pd,
5017 _mm_mmask_i32gather_pd, _mm256_mmask_i64gather_ps,
5018 _mm_mmask_i64gather_ps, _mm256_mmask_i64gather_pd,
5019 _mm_mmask_i64gather_pd, _mm256_mmask_i32gather_epi32,
5020 _mm_mmask_i32gather_epi32, _mm256_mmask_i32gather_epi64,
5021 _mm_mmask_i32gather_epi64, _mm256_mmask_i64gather_epi32,
5022 _mm_mmask_i64gather_epi32, _mm256_mmask_i64gather_epi64,
5023 _mm_mmask_i64gather_epi64, _mm256_i32scatter_ps,
5024 _mm256_mask_i32scatter_ps, _mm_i32scatter_ps, _mm_mask_i32scatter_ps,
5025 _mm256_i32scatter_pd, _mm256_mask_i32scatter_pd, _mm_i32scatter_pd,
5026 _mm_mask_i32scatter_pd, _mm256_i64scatter_ps,
5027 _mm256_mask_i64scatter_ps, _mm_i64scatter_ps, _mm_mask_i64scatter_ps,
5028 _mm256_i64scatter_pd, _mm256_mask_i64scatter_pd, _mm_i64scatter_pd,
5029 _mm_mask_i64scatter_pd, _mm256_i32scatter_epi32,
5030 _mm256_mask_i32scatter_epi32, _mm_i32scatter_epi32,
5031 _mm_mask_i32scatter_epi32, _mm256_i32scatter_epi64,
5032 _mm256_mask_i32scatter_epi64, _mm_i32scatter_epi64,
5033 _mm_mask_i32scatter_epi64, _mm256_i64scatter_epi32,
5034 _mm256_mask_i64scatter_epi32, _mm_i64scatter_epi32,
5035 _mm_mask_i64scatter_epi32, _mm256_i64scatter_epi64,
5036 _mm256_mask_i64scatter_epi64, _mm_i64scatter_epi64,
5037 _mm_mask_i64scatter_epi64): Likewise.
5039 2020-04-29 Jeff Law <law@redhat.com>
5041 * config/h8300/h8300.md (H8/SX div patterns): All H8/SX specific
5042 division instructions are 4 bytes long.
5044 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5047 * config/rs6000/rs6000.c (rs6000_atomic_assign_expand_fenv): Use
5048 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
5049 fenv_var, fenv_clear and old_fenv variables. For fenv_addr
5050 take address of TARGET_EXPR of fenv_var with void_node initializer.
5053 2020-04-29 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5055 PR tree-optimization/94774
5056 * gimple-ssa-sprintf.c (try_substitute_return_value): Initialize
5059 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5061 * calls.h (cxx17_empty_base_field_p): Turn into a function declaration.
5062 * calls.c (cxx17_empty_base_field_p): New function. Check
5063 DECL_ARTIFICIAL and RECORD_OR_UNION_TYPE_P in addition to the
5066 2020-04-29 H.J. Lu <hongjiu.lu@intel.com>
5069 * config/i386/i386-options.c (ix86_set_indirect_branch_type):
5070 Allow -fcf-protection with -mindirect-branch=thunk-extern and
5071 -mfunction-return=thunk-extern.
5072 * doc/invoke.texi: Update notes for -fcf-protection=branch with
5073 -mindirect-branch=thunk-extern and -mindirect-return=thunk-extern.
5075 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5077 * doc/sourcebuild.texi: Add missing arm_arch_v8a_hard_ok anchor.
5079 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5081 * config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use
5082 TARGET_EXPR instead of MODIFY_EXPR for the first assignments to
5083 fenv_var and new_fenv_var.
5085 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5087 * doc/sourcebuild.texi (arm_arch_v8a_hard_ok): Document new
5088 effective-target keyword.
5089 (arm_arch_v8a_hard_multilib): Likewise.
5090 (arm_arch_v8a_hard): Document new dg-add-options keyword.
5091 * config/arm/arm.c (arm_return_in_memory): Note that the APCS
5092 code is deprecated and has not been updated to handle
5093 DECL_FIELD_ABI_IGNORED.
5094 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5095 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5096 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5097 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5098 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5099 something actually is a HFA or HVA. Record whether we see a
5100 [[no_unique_address]] field that previous GCCs would not have
5101 ignored in this way.
5102 (aapcs_vfp_is_call_or_return_candidate): Update the calls to
5103 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5104 [[no_unique_address]] case. Use TYPE_MAIN_VARIANT in the
5105 diagnostic messages.
5106 (arm_needs_doubleword_align): Add a comment explaining why we
5107 consider even zero-sized fields.
5109 2020-04-29 Richard Biener <rguenther@suse.de>
5110 Li Zekun <lizekun1@huawei.com>
5113 * tree.c (component_ref_size): Guard against error_mark_node
5114 DECL_INITIAL as it happens with LTO.
5116 2020-04-29 Richard Sandiford <richard.sandiford@arm.com>
5118 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Add a
5119 comment explaining why we consider even zero-sized fields.
5120 (WARN_PSABI_EMPTY_CXX17_BASE): New constant.
5121 (WARN_PSABI_NO_UNIQUE_ADDRESS): Likewise.
5122 (aapcs_vfp_sub_candidate): Replace the boolean pointer parameter
5123 avoid_cxx17_empty_base with a pointer to a bitmask. Ignore fields
5124 whose DECL_FIELD_ABI_IGNORED bit is set when determining whether
5125 something actually is a HFA or HVA. Record whether we see a
5126 [[no_unique_address]] field that previous GCCs would not have
5127 ignored in this way.
5128 (aarch64_vfp_is_call_or_return_candidate): Add a parameter to say
5129 whether diagnostics should be suppressed. Update the calls to
5130 aapcs_vfp_sub_candidate and report a -Wpsabi warning for the
5131 [[no_unique_address]] case.
5132 (aarch64_return_in_msb): Update call accordingly, never silencing
5134 (aarch64_function_value): Likewise.
5135 (aarch64_return_in_memory_1): Likewise.
5136 (aarch64_init_cumulative_args): Likewise.
5137 (aarch64_gimplify_va_arg_expr): Likewise.
5138 (aarch64_pass_by_reference_1): Take a CUMULATIVE_ARGS pointer and
5139 use it to decide whether arch64_vfp_is_call_or_return_candidate
5141 (aarch64_pass_by_reference): Update calls accordingly.
5142 (aarch64_vfp_is_call_candidate): Use the CUMULATIVE_ARGS argument
5143 to decide whether arch64_vfp_is_call_or_return_candidate should be
5146 2020-04-29 Haijian Zhang <z.zhanghaijian@huawei.com>
5149 * config/aarch64/aarch64-builtins.c
5150 (aarch64_atomic_assign_expand_fenv): Use TARGET_EXPR instead of
5151 MODIFY_EXPR for first assignment to fenv_cr, fenv_sr and
5154 2020-04-29 Thomas Schwinge <thomas@codesourcery.com>
5156 * configure.ac <$enable_offload_targets>: Do parsing as done
5158 * configure: Regenerate.
5160 * configure.ac <$enable_offload_targets>: 'amdgcn' is 'gcn'.
5161 * configure: Regenerate.
5164 * rtlanal.c (set_noop_p): Handle non-constant selectors.
5167 * common/config/gcn/gcn-common.c (gcn_except_unwind_info): New
5169 (TARGET_EXCEPT_UNWIND_INFO): Define.
5171 2020-04-29 Jakub Jelinek <jakub@redhat.com>
5174 * config/gcn/gcn.md (*mov<mode>_insn): Use
5175 'reg_overlap_mentioned_p' to check for overlap.
5178 * config/ia64/ia64.c (hfa_element_mode): Use DECL_FIELD_ABI_IGNORED
5179 instead of cxx17_empty_base_field_p.
5182 * tree-core.h (tree_decl_common): Note decl_flag_0 used for
5183 DECL_FIELD_ABI_IGNORED.
5184 * tree.h (DECL_FIELD_ABI_IGNORED): Define.
5185 * calls.h (cxx17_empty_base_field_p): Change into a temporary
5186 macro, check DECL_FIELD_ABI_IGNORED flag with no "no_unique_address"
5188 * calls.c (cxx17_empty_base_field_p): Remove.
5189 * tree-streamer-out.c (pack_ts_decl_common_value_fields): Handle
5190 DECL_FIELD_ABI_IGNORED.
5191 * tree-streamer-in.c (unpack_ts_decl_common_value_fields): Likewise.
5192 * lto-streamer-out.c (hash_tree): Likewise.
5193 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Rename
5194 cxx17_empty_base_seen to empty_base_seen, change type to int *,
5195 adjust recursive calls, use DECL_FIELD_ABI_IGNORED instead of
5196 cxx17_empty_base_field_p, if "no_unique_address" attribute is
5197 present, propagate that to the caller too.
5198 (rs6000_discover_homogeneous_aggregate): Adjust
5199 rs6000_aggregate_candidate caller, emit different diagnostics
5200 when c++17 empty base fields are present and when empty
5201 [[no_unique_address]] fields are present.
5202 * config/rs6000/rs6000.c (rs6000_special_round_type_align,
5203 darwin_rs6000_special_round_type_align): Skip DECL_FIELD_ABI_IGNORED
5206 2020-04-29 Richard Biener <rguenther@suse.de>
5208 * tree-ssa-loop-im.c (ref_always_accessed::operator ()):
5209 Just check whether the stmt stores.
5211 2020-04-28 Alexandre Oliva <oliva@adacore.com>
5214 * config/rs6000/rs6000.md (rs6000_mffsl): Copy result to
5215 output operand in emulation. Don't overwrite pseudos.
5217 2020-04-28 Jeff Law <law@redhat.com>
5219 * config/h8300/h8300.md (H8/SX mult patterns): All H8/SX specific
5220 multiply patterns are 4 bytes long.
5222 2020-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5224 * config/arm/arm-cpus.in (cortex-m55): Remove +nofp option.
5225 * doc/invoke.texi (Arm Options): Remove -mcpu=cortex-m55 from +nofp option.
5227 2020-04-28 Matthew Malcomson <matthew.malcomson@arm.com>
5228 Jakub Jelinek <jakub@redhat.com>
5231 * config/arm/arm.c (aapcs_vfp_sub_candidate): Account for C++17 empty
5232 base class artificial fields.
5233 (aapcs_vfp_is_call_or_return_candidate): Warn when PCS ABI
5234 decision is different after this fix.
5236 2020-04-28 David Malcolm <dmalcolm@redhat.com>
5242 * doc/invoke.texi (Static Analyzer Options): Remove
5243 -Wanalyzer-use-of-uninitialized-value.
5244 (-Wno-analyzer-use-of-uninitialized-value): Remove item.
5246 2020-04-28 Jakub Jelinek <jakub@redhat.com>
5248 PR tree-optimization/94809
5249 * tree.c (build_call_expr_internal_loc_array): Call
5250 process_call_operands.
5252 2020-04-27 Anton Youdkevitch <anton.youdkevitch@bell-sw.com>
5254 * config/aarch64/aarch64-cores.def (thunderx3t110): Add the chip name.
5255 * config/aarch64/aarch64-tune.md: Regenerate.
5256 * config/aarch64/aarch64.c (thunderx3t110_addrcost_table): Define.
5257 (thunderx3t110_regmove_cost): Likewise.
5258 (thunderx3t110_vector_cost): Likewise.
5259 (thunderx3t110_prefetch_tune): Likewise.
5260 (thunderx3t110_tunings): Likewise.
5261 * config/aarch64/aarch64-cost-tables.h (thunderx3t110_extra_costs):
5263 * config/aarch64/thunderx3t110.md: New file.
5264 * config/aarch64/aarch64.md: Include thunderx3t110.md.
5265 * doc/invoke.texi (AArch64 options): Add thunderx3t110.
5267 2020-04-28 Jakub Jelinek <jakub@redhat.com>
5270 * config/s390/s390.c (s390_function_arg_vector,
5271 s390_function_arg_float): Emit -Wpsabi diagnostics if the ABI changed.
5273 2020-04-28 Richard Sandiford <richard.sandiford@arm.com>
5275 PR tree-optimization/94727
5276 * tree-vect-stmts.c (vect_is_simple_cond): If both comparison
5277 operands are invariant booleans, use the mask type associated with the
5278 STMT_VINFO_VECTYPE. Use !slp_node instead of !vectype to exclude SLP.
5279 (vectorizable_condition): Pass vectype unconditionally to
5280 vect_is_simple_cond.
5282 2020-04-27 Jakub Jelinek <jakub@redhat.com>
5285 * config/i386/i386.c (ix86_atomic_assign_expand_fenv): Use
5286 TARGET_EXPR instead of MODIFY_EXPR for first assignment to
5287 sw_var, exceptions_var, mxcsr_orig_var and mxcsr_mod_var.
5289 2020-04-27 David Malcolm <dmalcolm@redhat.com>
5292 * configure.ac (DOCUMENTATION_ROOT_URL): Drop trailing "gcc/" from
5293 default value, so that it can by supplied by get_option_html_page.
5294 * configure: Regenerate.
5295 * opts.c: Include "selftest.h".
5296 (get_option_html_page): New function.
5297 (get_option_url): Use it. Reformat to place comments next to the
5298 expressions they refer to.
5299 (selftest::test_get_option_html_page): New.
5300 (selftest::opts_c_tests): New.
5301 * selftest-run-tests.c (selftest::run_tests): Call
5302 selftest::opts_c_tests.
5303 * selftest.h (selftest::opts_c_tests): New decl.
5305 2020-04-27 Richard Sandiford <richard.sandiford@arm.com>
5307 * config/arm/arm-builtins.c (arm_expand_builtin_args): Only apply
5308 UINTVAL to CONST_INTs.
5310 2020-04-27 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5312 * config/arm/constraints.md (e): Remove constraint.
5313 (Te): Define constraint.
5314 * config/arm/mve.md (vaddvq_<supf><mode>): Modify constraint in
5315 operand 0 from "e" to "Te".
5316 (vaddvaq_<supf><mode>): Likewise.
5317 (vaddvq_p_<supf><mode>): Likewise.
5318 (vmladavq_<supf><mode>): Likewise.
5319 (vmladavxq_s<mode>): Likewise.
5320 (vmlsdavq_s<mode>): Likewise.
5321 (vmlsdavxq_s<mode>): Likewise.
5322 (vaddvaq_p_<supf><mode>): Likewise.
5323 (vmladavaq_<supf><mode>): Likewise.
5324 (vmladavq_p_<supf><mode>): Likewise.
5325 (vmladavxq_p_s<mode>): Likewise.
5326 (vmlsdavq_p_s<mode>): Likewise.
5327 (vmlsdavxq_p_s<mode>): Likewise.
5328 (vmlsdavaxq_s<mode>): Likewise.
5329 (vmlsdavaq_s<mode>): Likewise.
5330 (vmladavaxq_s<mode>): Likewise.
5331 (vmladavaq_p_<supf><mode>): Likewise.
5332 (vmladavaxq_p_s<mode>): Likewise.
5333 (vmlsdavaq_p_s<mode>): Likewise.
5334 (vmlsdavaxq_p_s<mode>): Likewise.
5336 2020-04-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
5338 * config/arm/arm.c (output_move_neon): Only get the first operand if
5341 2020-04-27 Felix Yang <felix.yang@huawei.com>
5343 PR tree-optimization/94784
5344 * tree-ssa-forwprop.c (simplify_vector_constructor): Flip the
5345 assert around so that it checks that the two vectors have equal
5346 TYPE_VECTOR_SUBPARTS and that converting the corresponding element
5347 types is a useless_type_conversion_p.
5349 2020-04-27 Szabolcs Nagy <szabolcs.nagy@arm.com>
5352 * dwarf2cfi.c (struct GTY): Add ra_mangled.
5353 (cfi_row_equal_p): Check ra_mangled.
5354 (dwarf2out_frame_debug_cfa_window_save): Remove the argument,
5355 this only handles the sparc logic now.
5356 (dwarf2out_frame_debug_cfa_toggle_ra_mangle): New function for
5357 the aarch64 specific logic.
5358 (dwarf2out_frame_debug): Update to use the new subroutines.
5359 (change_cfi_row): Check ra_mangled.
5361 2020-04-27 Jakub Jelinek <jakub@redhat.com>
5364 * config/s390/s390.c (s390_function_arg_vector,
5365 s390_function_arg_float): Ignore cxx17_empty_base_field_p fields.
5367 2020-04-27 Jiufu Guo <guojiufu@cn.ibm.com>
5369 * common/config/rs6000/rs6000-common.c
5370 (rs6000_option_optimization_table) [OPT_LEVELS_ALL]: Remove turn off
5372 * config/rs6000/rs6000.c (rs6000_option_override_internal): Avoid to
5375 2020-04-27 Martin Liska <mliska@suse.cz>
5378 * cgraph.h (cgraph_node::can_remove_if_no_direct_calls_and_refs_p):
5379 Do not remove ifunc_resolvers in remove unreachable nodes in LTO.
5381 2020-04-27 Xiong Hu Luo <luoxhu@linux.ibm.com>
5384 * config/rs6000/rs6000-logue.c (frame_pointer_needed_indeed):
5386 (rs6000_emit_prologue_components):
5387 Check with frame_pointer_needed_indeed.
5388 (rs6000_emit_epilogue_components): Likewise.
5389 (rs6000_emit_prologue): Likewise.
5390 (rs6000_emit_epilogue): Set frame_pointer_needed_indeed.
5392 2020-04-25 David Edelsohn <dje.gcc@gmail.com>
5394 * config/rs6000/rs6000-logue.c (rs6000_stack_info): Don't push a
5395 stack frame when debugging and flag_compare_debug is enabled.
5397 2020-04-25 Michael Meissner <meissner@linux.ibm.com>
5399 * config/rs6000/linux64.h (PCREL_SUPPORTED_BY_OS): Define to
5400 enable PC-relative addressing for -mcpu=future.
5401 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Move
5402 after OTHER_FUTURE_MASKS. Use OTHER_FUTURE_MASKS.
5403 * config/rs6000/rs6000.c (PCREL_SUPPORTED_BY_OS): If not defined,
5404 suppress PC-relative addressing.
5405 (rs6000_option_override_internal): Split up error messages
5406 checking for -mprefixed and -mpcrel. Enable -mpcrel if the target
5409 2020-04-25 Jakub Jelinek <jakub@redhat.com>
5410 Richard Biener <rguenther@suse.de>
5412 PR tree-optimization/94734
5413 PR tree-optimization/89430
5414 * tree-ssa-phiopt.c: Include tree-eh.h.
5415 (cond_store_replacement): Return false if an automatic variable
5416 access could trap. If -fstore-data-races, don't return false
5417 just because an automatic variable is addressable.
5419 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
5421 * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
5423 (add<mode>_sext_dup2_exec): Likewise.
5425 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org>
5428 * config/rs6000/vector.md (vec_shr_<mode> for VEC_L): Correct little
5429 endian byteshift_val calculation.
5431 2020-04-24 Andrew Stubbs <ams@codesourcery.com>
5433 * config/gcn/gcn.md (*mov<mode>_insn): Only split post-reload.
5435 2020-04-24 Richard Sandiford <richard.sandiford@arm.com>
5437 * config/aarch64/arm_sve.h: Add a comment.
5439 2020-04-24 Haijian Zhang <z.zhanghaijian@huawei.com>
5441 PR rtl-optimization/94708
5442 * combine.c (simplify_if_then_else): Add check for
5443 !HONOR_NANS (mode) && !HONOR_SIGNED_ZEROS (mode).
5445 2020-04-23 Martin Sebor <msebor@redhat.com>
5448 * common.opt (-Wno-frame-larger-than): New option.
5449 (-Wno-larger-than, -Wno-stack-usage): Same.
5451 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
5453 * config/gcn/gcn-valu.md (mov<mode>_exec): Swap the numbers on operands
5455 (mov<mode>_exec): Likewise.
5456 (trunc<vndi><mode>2_exec): Swap parameters to gen_mov<mode>_exec.
5457 (<convop><mode><vndi>2_exec): Likewise.
5459 2019-04-23 Eric Botcazou <ebotcazou@adacore.com>
5461 PR tree-optimization/94717
5462 * gimple-ssa-store-merging.c (try_coalesce_bswap): Return false if one
5463 of the stores doesn't have the same landing pad number as the first.
5464 (coalesce_immediate_stores): Do not try to coalesce the store using
5465 bswap if it doesn't have the same landing pad number as the first.
5467 2020-04-23 Bill Schmidt <wschmidt@linux.ibm.com>
5469 * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions):
5470 Replace outdated link to ELFv2 ABI.
5472 2020-04-23 Jakub Jelinek <jakub@redhat.com>
5475 * optabs.c (expand_vec_perm_const): For shift_amt const0_rtx
5479 * tree.c (get_narrower): Instead of creating COMPOUND_EXPRs
5480 temporarily with non-final second operand and updating it later,
5481 push COMPOUND_EXPRs into a vector and process it in reverse,
5482 creating COMPOUND_EXPRs with the final operands.
5484 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com>
5487 * config/aarch64/aarch64-bti-insert.c (rest_of_insert_bti): Swap
5488 bti c and bti j handling.
5490 2020-04-23 Andrew Stubbs <ams@codesourcery.com>
5491 Thomas Schwinge <thomas@codesourcery.com>
5495 * omp-expand.c (expand_omp_target): Use force_gimple_operand_gsi on
5496 t_async and the wait arguments.
5498 2020-04-23 Richard Sandiford <richard.sandiford@arm.com>
5500 PR tree-optimization/94727
5501 * tree-vect-stmts.c (vectorizable_comparison): Use mask_type when
5502 comparing invariant scalar booleans.
5504 2020-04-23 Matthew Malcomson <matthew.malcomson@arm.com>
5505 Jakub Jelinek <jakub@redhat.com>
5508 * config/aarch64/aarch64.c (aapcs_vfp_sub_candidate): Account for C++17
5509 empty base class artificial fields.
5510 (aarch64_vfp_is_call_or_return_candidate): Warn when ABI PCS decision is
5511 different after this fix.
5513 2020-04-23 Jakub Jelinek <jakub@redhat.com>
5516 * config/rs6000/rs6000-call.c (rs6000_discover_homogeneous_aggregate):
5517 Use TYPE_UID (TYPE_MAIN_VARIANT (type)) instead of type to check
5518 if the same type has been diagnosed most recently already.
5520 2020-04-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
5522 * config/arm/arm_mve.h (__arm_vbicq_n_u16): Modify function parameter's
5524 (__arm_vbicq_n_s16): Likewise.
5525 (__arm_vbicq_n_u32): Likewise.
5526 (__arm_vbicq_n_s32): Likewise.
5527 (__arm_vbicq): Likewise.
5528 (__arm_vbicq_n_s16): Modify MVE polymorphic variant argument's datatype.
5529 (__arm_vbicq_n_s32): Likewise.
5530 (__arm_vbicq_n_u16): Likewise.
5531 (__arm_vbicq_n_u32): Likewise.
5532 (__arm_vdupq_m_n_s8): Likewise.
5533 (__arm_vdupq_m_n_s16): Likewise.
5534 (__arm_vdupq_m_n_s32): Likewise.
5535 (__arm_vdupq_m_n_u8): Likewise.
5536 (__arm_vdupq_m_n_u16): Likewise.
5537 (__arm_vdupq_m_n_u32): Likewise.
5538 (__arm_vdupq_m_n_f16): Likewise.
5539 (__arm_vdupq_m_n_f32): Likewise.
5540 (__arm_vldrhq_gather_offset_s16): Likewise.
5541 (__arm_vldrhq_gather_offset_s32): Likewise.
5542 (__arm_vldrhq_gather_offset_u16): Likewise.
5543 (__arm_vldrhq_gather_offset_u32): Likewise.
5544 (__arm_vldrhq_gather_offset_f16): Likewise.
5545 (__arm_vldrhq_gather_offset_z_s16): Likewise.
5546 (__arm_vldrhq_gather_offset_z_s32): Likewise.
5547 (__arm_vldrhq_gather_offset_z_u16): Likewise.
5548 (__arm_vldrhq_gather_offset_z_u32): Likewise.
5549 (__arm_vldrhq_gather_offset_z_f16): Likewise.
5550 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
5551 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
5552 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
5553 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
5554 (__arm_vldrhq_gather_shifted_offset_f16): Likewise.
5555 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
5556 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
5557 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
5558 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
5559 (__arm_vldrhq_gather_shifted_offset_z_f16): Likewise.
5560 (__arm_vldrwq_gather_offset_s32): Likewise.
5561 (__arm_vldrwq_gather_offset_u32): Likewise.
5562 (__arm_vldrwq_gather_offset_f32): Likewise.
5563 (__arm_vldrwq_gather_offset_z_s32): Likewise.
5564 (__arm_vldrwq_gather_offset_z_u32): Likewise.
5565 (__arm_vldrwq_gather_offset_z_f32): Likewise.
5566 (__arm_vldrwq_gather_shifted_offset_s32): Likewise.
5567 (__arm_vldrwq_gather_shifted_offset_u32): Likewise.
5568 (__arm_vldrwq_gather_shifted_offset_f32): Likewise.
5569 (__arm_vldrwq_gather_shifted_offset_z_s32): Likewise.
5570 (__arm_vldrwq_gather_shifted_offset_z_u32): Likewise.
5571 (__arm_vldrwq_gather_shifted_offset_z_f32): Likewise.
5572 (__arm_vdwdupq_x_n_u8): Likewise.
5573 (__arm_vdwdupq_x_n_u16): Likewise.
5574 (__arm_vdwdupq_x_n_u32): Likewise.
5575 (__arm_viwdupq_x_n_u8): Likewise.
5576 (__arm_viwdupq_x_n_u16): Likewise.
5577 (__arm_viwdupq_x_n_u32): Likewise.
5578 (__arm_vidupq_x_n_u8): Likewise.
5579 (__arm_vddupq_x_n_u8): Likewise.
5580 (__arm_vidupq_x_n_u16): Likewise.
5581 (__arm_vddupq_x_n_u16): Likewise.
5582 (__arm_vidupq_x_n_u32): Likewise.
5583 (__arm_vddupq_x_n_u32): Likewise.
5584 (__arm_vldrdq_gather_offset_s64): Likewise.
5585 (__arm_vldrdq_gather_offset_u64): Likewise.
5586 (__arm_vldrdq_gather_offset_z_s64): Likewise.
5587 (__arm_vldrdq_gather_offset_z_u64): Likewise.
5588 (__arm_vldrdq_gather_shifted_offset_s64): Likewise.
5589 (__arm_vldrdq_gather_shifted_offset_u64): Likewise.
5590 (__arm_vldrdq_gather_shifted_offset_z_s64): Likewise.
5591 (__arm_vldrdq_gather_shifted_offset_z_u64): Likewise.
5592 (__arm_vidupq_m_n_u8): Likewise.
5593 (__arm_vidupq_m_n_u16): Likewise.
5594 (__arm_vidupq_m_n_u32): Likewise.
5595 (__arm_vddupq_m_n_u8): Likewise.
5596 (__arm_vddupq_m_n_u16): Likewise.
5597 (__arm_vddupq_m_n_u32): Likewise.
5598 (__arm_vidupq_n_u16): Likewise.
5599 (__arm_vidupq_n_u32): Likewise.
5600 (__arm_vidupq_n_u8): Likewise.
5601 (__arm_vddupq_n_u16): Likewise.
5602 (__arm_vddupq_n_u32): Likewise.
5603 (__arm_vddupq_n_u8): Likewise.
5605 2020-04-23 Iain Buclaw <ibuclaw@gdcproject.org>
5607 * doc/install.texi (D-Specific Options): Document
5608 --enable-libphobos-checking and --with-libphobos-druntime-only.
5610 2020-04-23 Jakub Jelinek <jakub@redhat.com>
5613 * config/rs6000/rs6000-call.c (rs6000_aggregate_candidate): Add
5614 cxx17_empty_base_seen argument. Pass it to recursive calls.
5615 Ignore cxx17_empty_base_field_p fields after setting
5616 *cxx17_empty_base_seen to true.
5617 (rs6000_discover_homogeneous_aggregate): Adjust
5618 rs6000_aggregate_candidate caller. With -Wpsabi, diagnose homogeneous
5619 aggregates with C++17 empty base fields.
5622 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
5623 if last_decl is error_mark_node or has such a TREE_TYPE.
5626 * attribs.c (decl_attribute): Don't diagnose attribute exclusions
5627 if last_decl is error_mark_node or has such a TREE_TYPE.
5629 2020-04-22 Felix Yang <felix.yang@huawei.com>
5632 * config/aarch64/aarch64.h (TARGET_SVE):
5633 Add && !TARGET_GENERAL_REGS_ONLY.
5634 (TARGET_SVE2): Add && TARGET_SVE.
5635 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3,
5636 TARGET_SVE2_SM4): Add && TARGET_SVE2.
5637 * config/aarch64/aarch64-sve-builtins.h
5638 (sve_switcher::m_old_general_regs_only): New member.
5639 * config/aarch64/aarch64-sve-builtins.cc (check_required_registers):
5641 (reported_missing_registers_p): New variable.
5642 (check_required_extensions): Call check_required_registers before
5643 return if all required extenstions are present.
5644 (sve_switcher::sve_switcher): Save TARGET_GENERAL_REGS_ONLY in
5645 m_old_general_regs_only and clear MASK_GENERAL_REGS_ONLY in
5646 global_options.x_target_flags.
5647 (sve_switcher::~sve_switcher): Set MASK_GENERAL_REGS_ONLY in
5648 global_options.x_target_flags if m_old_general_regs_only is true.
5650 2020-04-22 Zackery Spytz <zspytz@gmail.com>
5652 * doc/extend.exi: Add "free" to list of other builtin functions
5655 2020-04-20 Aaron Sawdey <acsawdey@linux.ibm.com>
5658 * config/rs6000/sync.md (load_quadpti): Add attr "prefixed"
5660 (store_quadpti): Ditto.
5661 (atomic_load<mode>): Do not swap doublewords if TARGET_PREFIXED as
5662 plq will be used and doesn't need it.
5663 (atomic_store<mode>): Ditto, for pstq.
5665 2020-04-22 Erick Ochoa <erick.ochoa@theobroma-systems.com>
5667 * doc/invoke.texi: Update flags turned on by -O3.
5669 2020-04-22 Jakub Jelinek <jakub@redhat.com>
5672 * config/ia64/ia64.c (hfa_element_mode): Ignore
5673 cxx17_empty_base_field_p fields.
5676 * calls.h (cxx17_empty_base_field_p): Declare.
5677 * calls.c (cxx17_empty_base_field_p): Define.
5679 2020-04-22 Christophe Lyon <christophe.lyon@linaro.org>
5681 * doc/sourcebuild.texi (arm_softfp_ok, arm_hard_ok): Document.
5683 2020-04-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
5684 Andre Vieira <andre.simoesdiasvieira@arm.com>
5685 Mihail Ionescu <mihail.ionescu@arm.com>
5687 * config/arm/arm.c (arm_file_start): Handle isa_bit_quirk_no_asmcpu.
5688 * config/arm/arm-cpus.in (quirk_no_asmcpu): Define.
5689 (ALL_QUIRKS): Add quirk_no_asmcpu.
5690 (cortex-m55): Define new cpu.
5691 * config/arm/arm-tables.opt: Regenerate.
5692 * config/arm/arm-tune.md: Likewise.
5693 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m55.
5695 2020-04-22 Richard Sandiford <richard.sandiford@arm.com>
5697 PR tree-optimization/94700
5698 * tree-ssa-forwprop.c (simplify_vector_constructor): When processing
5699 an identity constructor, use a VIEW_CONVERT_EXPR to handle mixtures
5700 of similarly-structured but distinct vector types.
5702 2020-04-21 Martin Sebor <msebor@redhat.com>
5705 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Correct
5706 the computation of the lower bound of the source access size.
5707 (builtin_access::generic_overlap): Remove a hack for setting ranges
5710 2020-04-21 John David Anglin <danglin@gcc.gnu.org>
5712 * config/pa/som.h (ASM_WEAKEN_LABEL): Delete.
5713 (ASM_WEAKEN_DECL): New define.
5714 (HAVE_GAS_WEAKREF): Undefine.
5716 2020-04-21 Richard Sandiford <richard.sandiford@arm.com>
5718 PR tree-optimization/94683
5719 * tree-ssa-forwprop.c (simplify_vector_constructor): Use a
5720 VIEW_CONVERT_EXPR to handle mixtures of similarly-structured
5721 but distinct vector types.
5723 2020-04-21 Jakub Jelinek <jakub@redhat.com>
5726 * stor-layout.c (place_field, finalize_record_size): Don't emit
5727 -Wpadded warning on TYPE_ARTIFICIAL rli->t.
5728 * ubsan.c (ubsan_get_type_descriptor_type,
5729 ubsan_get_source_location_type, ubsan_create_data): Set
5731 * asan.c (asan_global_struct): Likewise.
5733 2020-04-21 Duan bo <duanbo3@huawei.com>
5736 * config/aarch64/aarch64.c: Add an error message for option conflict.
5737 * doc/invoke.texi (-mcmodel=large): Mention that -mcmodel=large is
5738 incompatible with -fpic, -fPIC and -mabi=ilp32.
5740 2020-04-21 Frederik Harwath <frederik@codesourcery.com>
5743 * omp-low.c (new_omp_context): Remove assignments to
5744 ctx->outer_reduction_clauses and ctx->local_reduction_clauses.
5746 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5748 * config/s390/vector.md ("popcountv8hi2_vx", "popcountv4si2_vx")
5749 ("popcountv2di2_vx"): Use simplify_gen_subreg.
5751 2020-04-20 Andreas Krebbel <krebbel@linux.ibm.com>
5754 * config/s390/s390-builtin-types.def: Add 3 new function modes.
5755 * config/s390/s390-builtins.def: Add mode dependent low-level
5756 builtin and map the overloaded builtins to these.
5757 * config/s390/vx-builtins.md ("vec_selV_HW"): Rename to ...
5758 ("vsel<V_HW"): ... this and rewrite the pattern with bitops.
5760 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5762 * tree-vect-loop.c (vect_better_loop_vinfo_p): If old_loop_vinfo
5763 has a variable VF, prefer new_loop_vinfo if it is cheaper for the
5764 estimated VF and is no worse at double the estimated VF.
5766 2020-04-20 Richard Sandiford <richard.sandiford@arm.com>
5769 * config/aarch64/aarch64.c (aarch64_sve_expand_vector_init): Fix
5770 order of arguments to rtx_vector_builder.
5771 (aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
5772 When extending the trailing constants to a full vector, replace any
5773 variables with zeros.
5775 2020-04-20 Jan Hubicka <hubicka@ucw.cz>
5778 * tree-inline.c (optimize_inline_calls): Recompute calls_comdat_local
5781 2020-04-20 Martin Liska <mliska@suse.cz>
5783 * symtab.c (symtab_node::dump_references): Add space after
5785 (symtab_node::dump_referring): Likewise.
5787 2020-04-18 Jeff Law <law@redhat.com>
5790 * regrename.c (check_new_reg_p): Ignore DEBUG_INSNs when walking
5793 2020-04-18 Iain Buclaw <ibuclaw@gdcproject.org>
5795 * doc/sourcebuild.texi (Effective-Target Keywords, Environment
5796 attributes): Document d_runtime_has_std_library.
5798 2020-04-17 Jeff Law <law@redhat.com>
5800 PR rtl-optimization/90275
5801 * cse.c (cse_insn): Avoid recording nop sets in multi-set parallels
5802 when the destination has a REG_UNUSED note.
5804 2020-04-17 Tobias Burnus <tobias@codesourcery.com>
5807 * gimplify.c (gimplify_scan_omp_clauses): Turn MAP_TO_PSET to
5810 2020-04-17 Richard Sandiford <richard.sandiford@arm.com>
5812 * config/aarch64/aarch64.c (aarch64_advsimd_ldp_stp_p): New function.
5813 (aarch64_sve_adjust_stmt_cost): Add a vectype parameter. Double the
5814 cost of load and store insns if one loop iteration has enough scalar
5815 elements to use an Advanced SIMD LDP or STP.
5816 (aarch64_add_stmt_cost): Update call accordingly.
5818 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5819 Jeff Law <law@redhat.com>
5822 * config/i386/i386.md (*testqi_ext_3): Use CCZmode rather than
5823 CCNOmode in ix86_match_ccmode if len is equal to <MODE>mode precision,
5824 or pos + len >= 32, or pos + len is equal to operands[2] precision
5825 and operands[2] is not a register operand. During splitting perform
5826 SImode AND if operands[0] doesn't have CCZmode and pos + len is
5827 equal to mode precision.
5829 2020-04-17 Richard Biener <rguenther@suse.de>
5832 * cgraphclones.c (cgraph_node::create_clone): Remove duplicate
5834 * dwarf2out.c (dw_val_equal_p): Fix pasto in
5835 dw_val_class_vms_delta comparison.
5836 * optabs.c (expand_binop_directly): Fix pasto in commutation
5838 * tree-ssa-sccvn.c (vn_reference_lookup_pieces): Fix pasto in
5841 2020-04-17 Jakub Jelinek <jakub@redhat.com>
5843 PR rtl-optimization/94618
5844 * cfgrtl.c (delete_insn_and_edges): Set purge not just when
5845 insn is the BB_END of its block, but also when it is only followed
5846 by DEBUG_INSNs in its block.
5848 PR tree-optimization/94621
5849 * tree-inline.c (remap_type_1): Don't dereference NULL TYPE_DOMAIN.
5850 Move id->adjust_array_error_bounds check first in the condition.
5852 2020-04-17 Martin Liska <mliska@suse.cz>
5853 Jonathan Yong <10walls@gmail.com>
5855 PR gcov-profile/94570
5856 * coverage.c (coverage_init): Use separator properly.
5858 2020-04-16 Peter Bergner <bergner@linux.ibm.com>
5860 PR rtl-optimization/93974
5861 * config/rs6000/rs6000.c (TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P): Define.
5862 (rs6000_cannot_substitute_mem_equiv_p): New function.
5864 2020-04-16 Martin Jambor <mjambor@suse.cz>
5867 * ipa-inline.h (ipa_saved_clone_sources): Declare.
5868 * ipa-inline-transform.c (ipa_saved_clone_sources): New variable.
5869 (save_inline_function_body): Link the new body holder with the
5871 * cgraph.c: Include ipa-inline.h.
5872 (cgraph_edge::redirect_call_stmt_to_callee): Try to find the decl from
5873 the statement in ipa_saved_clone_sources.
5874 * cgraphunit.c: Include ipa-inline.h.
5875 (expand_all_functions): Free ipa_saved_clone_sources.
5877 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5880 * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_eor): Take
5881 the VNx16BI lowpart of the recursively-generated constant.
5883 2020-04-16 Martin Liska <mliska@suse.cz>
5884 Jakub Jelinek <jakub@redhat.com>
5887 * cgraphclones.c (set_new_clone_decl_and_node_flags): Drop
5888 DECL_IS_REPLACEABLE_OPERATOR during cloning.
5889 * tree-ssa-dce.c (valid_new_delete_pair_p): New function.
5890 (propagate_necessity): Check operator names.
5892 2020-04-16 Richard Sandiford <richard.sandiford@arm.com>
5894 PR rtl-optimization/94605
5895 * early-remat.c (early_remat::process_block): Handle insns that
5896 set multiple candidate registers.
5897 2020-04-16 Jan Hubicka <hubicka@ucw.cz>
5899 PR gcov-profile/93401
5900 * common.opt (profile-prefix-path): New option.
5901 * coverae.c: Include diagnostics.h.
5902 (coverage_init): Strip profile prefix path.
5903 * doc/invoke.texi (-fprofile-prefix-path): Document.
5905 2020-04-16 Richard Biener <rguenther@suse.de>
5908 * expr.c (emit_move_multi_word): Do not generate code when
5909 the destination part is undefined_operand_subword_p.
5910 * lower-subreg.c (resolve_clobber): Look through a paradoxica
5913 2020-04-16 Martin Jambor <mjambor@suse.cz>
5915 PR tree-optimization/94598
5916 * tree-sra.c (verify_sra_access_forest): Fix verification of total
5917 scalarization accesses under access to one-element arrays.
5919 2020-04-16 Jakub Jelinek <jakub@redhat.com>
5922 * function.c (assign_parm_find_data_types): Add workaround for
5923 BROKEN_VALUE_INITIALIZATION compilers.
5925 2020-04-16 Richard Biener <rguenther@suse.de>
5927 * gdbhooks.py (TreePrinter): Print SSA_NAME_VERSION of SSA_NAME
5930 2020-04-15 Uroš Bizjak <ubizjak@gmail.com>
5933 * config/i386/i386-builtin.def (__builtin_ia32_movq128):
5934 Require OPTION_MASK_ISA_SSE2.
5936 2020-04-15 Gustavo Romero <gromero@linux.ibm.com>
5939 * dumpfile.c (selftest::temp_dump_context::temp_dump_context):
5940 Don't construct a dump_context temporary to call static method.
5942 2020-04-15 Andrea Corallo <andrea.corallo@arm.com>
5944 * config/aarch64/falkor-tag-collision-avoidance.c
5945 (valid_src_p): Check for aarch64_address_info type before
5946 accessing base field.
5948 2020-04-15 Andre Vieira <andre.simoesdiasvieira@arm.com>
5950 * config/arm/mve.md (mve_vec_duplicate<mode>): New pattern.
5951 (V_sz_elem2): Remove unused mode attribute.
5953 2020-04-15 Matthew Malcomson <matthew.malcomson@arm.com>
5955 * config/arm/arm.md (arm_movdi): Disallow for MVE.
5957 2020-04-15 Richard Biener <rguenther@suse.de>
5960 * tree-ssa-alias.c (same_type_for_tbaa): Defer to
5961 alias_sets_conflict_p for pointers.
5963 2020-04-14 Max Filippov <jcmvbkbc@gmail.com>
5966 * config/xtensa/xtensa.md (zero_extendhisi2, zero_extendqisi2)
5967 (extendhisi2_internal): Add %v1 before the load instructions.
5969 2020-04-14 Aaron Sawdey <acsawdey@linux.ibm.com>
5972 * config/rs6000/rs6000.c (address_to_insn_form): Do not attempt to
5973 use PC-relative addressing for TLS references.
5975 2020-04-14 Martin Jambor <mjambor@suse.cz>
5978 * ipa-sra.c: Include internal-fn.h.
5979 (enum isra_scan_context): Update comment.
5980 (scan_function): Treat calls to internal_functions like loads or stores.
5982 2020-04-14 Yang Yang <yangyang305@huawei.com>
5984 PR tree-optimization/94574
5985 * tree-ssa.c (non_rewritable_lvalue_p): Add size check when analyzing
5986 whether a vector-insert is rewritable using a BIT_INSERT_EXPR.
5988 2020-04-14 H.J. Lu <hongjiu.lu@intel.com>
5991 * config/i386/i386.c (ix86_get_ssemov): Remove mode size check.
5993 2020-04-13 Martin Sebor <msebor@redhat.com>
5995 * doc/extend.texi (-Wall): Mention -Wformat-overflow and
5996 -Wformat-truncation. Move -Wzero-length-bounds last.
5997 (-Wrestrict): Document positive form of option enabled by -Wall.
5999 2020-04-13 Zachary Spytz <zspytz@gmail.com>
6001 * doc/extend.texi: Add realloc to list of built-in functions
6002 are recognized by the compiler.
6004 2020-04-13 H.J. Lu <hongjiu.lu@intel.com>
6007 * config/i386/i386.c (ix86_expand_epilogue): Restore the frame
6008 pointer in word_mode for eh_return epilogues.
6010 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6012 * config/msp430/msp430.c (msp430_print_operand): Don't add offsets to
6013 memory references in %B, %C and %D operand selectors when the inner
6014 operand is a post increment address.
6016 2020-04-13 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6018 * config/msp430/msp430.c (msp430_print_operand): Offset a %C memory
6019 reference by 4 bytes, and %D memory reference by 6 bytes.
6021 2020-04-11 Uroš Bizjak <ubizjak@gmail.com>
6024 * config/i386/sse.md (REDUC_SSE_SMINMAX_MODE): Use TARGET_SSE2
6025 condition for V4SI, V8HI and V16QI modes.
6027 2020-04-11 Jakub Jelinek <jakub@redhat.com>
6031 * cselib.c (cselib_record_sp_cfa_base_equiv): Set PRESERVED_VALUE_P on
6034 2020-04-10 Thomas Schwinge <thomas@codesourcery.com>
6038 * omp-general.c (oacc_verify_routine_clauses): Diagnose if
6039 "#pragma omp declare target" has also been applied.
6041 2020-04-09 Jozef Lawrynowicz <jozef.l@mittosystems.com>
6043 * config/msp430/msp430.c (msp430_expand_epilogue): Use emit_jump_insn
6044 when to emit the epilogue_helper insn.
6045 * config/msp430/msp430.md (epilogue_helper): Add a return insn to the
6048 2020-04-09 Jakub Jelinek <jakub@redhat.com>
6051 * cselib.h (cselib_record_sp_cfa_base_equiv,
6052 cselib_sp_derived_value_p): Declare.
6053 * cselib.c (cselib_record_sp_cfa_base_equiv,
6054 cselib_sp_derived_value_p): New functions.
6055 * var-tracking.c (add_stores): Don't record MO_VAL_SET for
6056 cselib_sp_derived_value_p values.
6057 (vt_initialize): Call cselib_record_sp_cfa_base_equiv at the
6058 start of extended basic blocks other than the first one
6059 for !frame_pointer_needed functions.
6061 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6063 * doc/sourcebuild.texi (aarch64_sve_hw, aarch64_sve128_hw)
6064 (aarch64_sve256_hw, aarch64_sve512_hw, aarch64_sve1024_hw)
6065 (aarch64_sve2048_hw): Document.
6066 * config/aarch64/aarch64-protos.h
6067 (aarch64_sve::handle_arm_sve_vector_bits_attribute): Declare.
6068 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
6069 __ARM_FEATURE_SVE_VECTOR_OPERATIONS when SVE is enabled.
6070 * config/aarch64/aarch64-sve-builtins.cc (matches_type_p): New
6072 (find_type_suffix_for_scalar_type): Use it instead of comparing
6074 (function_resolver::infer_vector_or_tuple_type): Likewise.
6075 (function_resolver::require_vector_type): Likewise.
6076 (handle_arm_sve_vector_bits_attribute): New function.
6077 * config/aarch64/aarch64.c (pure_scalable_type_info): New class.
6078 (aarch64_attribute_table): Add arm_sve_vector_bits.
6079 (aarch64_return_in_memory_1):
6080 (pure_scalable_type_info::piece::get_rtx): New function.
6081 (pure_scalable_type_info::num_zr): Likewise.
6082 (pure_scalable_type_info::num_pr): Likewise.
6083 (pure_scalable_type_info::get_rtx): Likewise.
6084 (pure_scalable_type_info::analyze): Likewise.
6085 (pure_scalable_type_info::analyze_registers): Likewise.
6086 (pure_scalable_type_info::analyze_array): Likewise.
6087 (pure_scalable_type_info::analyze_record): Likewise.
6088 (pure_scalable_type_info::add_piece): Likewise.
6089 (aarch64_some_values_include_pst_objects_p): Likewise.
6090 (aarch64_returns_value_in_sve_regs_p): Use pure_scalable_type_info
6091 to analyze whether the type is returned in SVE registers.
6092 (aarch64_takes_arguments_in_sve_regs_p): Likwise whether the type
6093 is passed in SVE registers.
6094 (aarch64_pass_by_reference_1): New function, extracted from...
6095 (aarch64_pass_by_reference): ...here. Use pure_scalable_type_info
6096 to analyze whether the type is a pure scalable type and, if so,
6097 whether it should be passed by reference.
6098 (aarch64_return_in_msb): Return false for pure scalable types.
6099 (aarch64_function_value_1): Fold back into...
6100 (aarch64_function_value): ...this function. Use
6101 pure_scalable_type_info to analyze whether the type is a pure
6102 scalable type and, if so, which registers it should use. Handle
6103 types that include pure scalable types but are not themselves
6104 pure scalable types.
6105 (aarch64_return_in_memory_1): New function, split out from...
6106 (aarch64_return_in_memory): ...here. Use pure_scalable_type_info
6107 to analyze whether the type is a pure scalable type and, if so,
6108 whether it should be returned by reference.
6109 (aarch64_layout_arg): Remove orig_mode argument. Use
6110 pure_scalable_type_info to analyze whether the type is a pure
6111 scalable type and, if so, which registers it should use. Handle
6112 types that include pure scalable types but are not themselves
6113 pure scalable types.
6114 (aarch64_function_arg): Update call accordingly.
6115 (aarch64_function_arg_advance): Likewise.
6116 (aarch64_pad_reg_upward): On big-endian targets, return false for
6117 pure scalable types that are smaller than 16 bytes.
6118 (aarch64_member_type_forces_blk): New function.
6119 (aapcs_vfp_sub_candidate): Exit early for built-in SVE types.
6120 (aarch64_short_vector_p): Return false for VECTOR_TYPEs that
6121 correspond to built-in SVE types. Do not rely on a vector mode
6122 if the type includes an pure scalable type. When returning true,
6123 assert that the mode is not an SVE mode.
6124 (aarch64_vfp_is_call_or_return_candidate): Do not check for SVE
6125 built-in types here. When returning true, assert that the type
6126 does not have an SVE mode.
6127 (aarch64_can_change_mode_class): Don't allow anything to change
6128 between a predicate mode and a non-predicate mode. Also don't
6129 allow changes between SVE vector modes and other modes that
6130 might be bigger than 128 bits.
6131 (aarch64_invalid_binary_op): Reject binary operations that mix
6132 SVE and GNU vector types.
6133 (TARGET_MEMBER_TYPE_FORCES_BLK): Define.
6135 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6137 * config/aarch64/aarch64.c (aarch64_attribute_table): Add
6138 "SVE sizeless type".
6139 * config/aarch64/aarch64-sve-builtins.cc (make_type_sizeless)
6140 (sizeless_type_p): New functions.
6141 (register_builtin_types): Apply make_type_sizeless to the type.
6142 (register_tuple_type): Likewise.
6143 (verify_type_context): Use sizeless_type_p instead of builin_type_p.
6145 2020-04-09 Matthew Malcomson <matthew.malcomson@arm.com>
6147 * config/arm/arm_cde.h: Remove `extern "C"` when compiling for
6150 2020-04-09 Martin Jambor <mjambor@suse.cz>
6151 Richard Biener <rguenther@suse.de>
6153 PR tree-optimization/94482
6154 * tree-sra.c (create_access_replacement): Dump new replacement with
6156 (sra_modify_expr): Fix handling of cases when the original EXPR writes
6157 to only part of the replacement.
6158 * tree-ssa-forwprop.c (pass_forwprop::execute): Properly verify
6159 the first operand of combinations into REAL/IMAGPART_EXPR and
6162 2020-04-09 Richard Sandiford <richard.sandiford@arm.com>
6164 * doc/sourcebuild.texi (check-function-bodies): Treat the third
6165 parameter as a list of option regexps and require each regexp
6168 2020-04-09 Andrea Corallo <andrea.corallo@arm.com>
6171 * config/aarch64/falkor-tag-collision-avoidance.c
6172 (valid_src_p): Fix missing rtx type check.
6174 2020-04-09 Bin Cheng <bin.cheng@linux.alibaba.com>
6175 Richard Biener <rguenther@suse.de>
6177 PR tree-optimization/93674
6178 * tree-ssa-loop-ivopts.c (langhooks.h): New include.
6179 (add_iv_candidate_for_use): For iv_use of non integer or pointer type,
6180 or non-mode precision type, add candidate in unsigned type with the
6183 2020-04-08 Clement Chigot <clement.chigot@atos.net>
6185 * config/rs6000/aix61.h (LIB_SPEC): Add -lc128 with -mlong-double-128.
6186 * config/rs6000/aix71.h (LIB_SPEC): Likewise.
6187 * config/rs6000/aix72.h (LIB_SPEC): Likewise.
6189 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6192 * cselib.c (autoinc_split): Handle e->val_rtx being SP_DERIVED_VALUE_P
6194 * reload1.c (eliminate_regs_1): Avoid creating
6195 (plus (reg) (const_int 0)) in DEBUG_INSNs.
6197 PR tree-optimization/94524
6198 * tree-vect-generic.c (expand_vector_divmod): If any elt of op1 is
6199 negative for signed TRUNC_MOD_EXPR, multiply with absolute value of
6200 op1 rather than op1 itself at the end. Punt for signed modulo by
6201 most negative constant.
6202 * tree-vect-patterns.c (vect_recog_divmod_pattern): Punt for signed
6203 modulo by most negative constant.
6205 2020-04-08 Richard Biener <rguenther@suse.de>
6207 PR rtl-optimization/93946
6208 * cse.c (cse_insn): Record the tabled expression in
6209 src_related. Verify a redundant store removal is valid.
6211 2020-04-08 H.J. Lu <hongjiu.lu@intel.com>
6214 * config/i386/i386-features.c (rest_of_insert_endbranch): Insert
6215 ENDBR at function entry if function will be called indirectly.
6217 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6220 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size
6223 2020-04-08 Martin Liska <mliska@suse.cz>
6226 * gimple.c (gimple_call_operator_delete_p): Rename to...
6227 (gimple_call_replaceable_operator_delete_p): ... this.
6228 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
6229 * gimple.h (gimple_call_operator_delete_p): Rename to ...
6230 (gimple_call_replaceable_operator_delete_p): ... this.
6231 * tree-core.h (tree_function_decl): Add replaceable_operator
6233 * tree-ssa-dce.c (mark_all_reaching_defs_necessary_1):
6234 Use DECL_IS_REPLACEABLE_OPERATOR_DELETE_P.
6235 (propagate_necessity): Use gimple_call_replaceable_operator_delete_p.
6236 (eliminate_unnecessary_stmts): Likewise.
6237 * tree-streamer-in.c (unpack_ts_function_decl_value_fields):
6238 Pack DECL_IS_REPLACEABLE_OPERATOR.
6239 * tree-streamer-out.c (pack_ts_function_decl_value_fields):
6240 Unpack the field here.
6241 * tree.h (DECL_IS_REPLACEABLE_OPERATOR): New.
6242 (DECL_IS_REPLACEABLE_OPERATOR_NEW_P): New.
6243 (DECL_IS_REPLACEABLE_OPERATOR_DELETE_P): New.
6244 * cgraph.c (cgraph_node::dump): Dump if an operator is replaceable.
6245 * ipa-icf.c (sem_item::compare_referenced_symbol_properties): Compare
6246 replaceable operator flags.
6248 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
6249 Matthew Malcomson <matthew.malcomson@arm.com>
6251 * config/arm/arm-builtins.c (CX_IMM_QUALIFIERS): New macro.
6252 (CX_UNARY_QUALIFIERS, CX_BINARY_QUALIFIERS): Likewise.
6253 (CX_TERNARY_QUALIFIERS): Likewise.
6254 (ARM_BUILTIN_CDE_PATTERN_START): Likewise.
6255 (ARM_BUILTIN_CDE_PATTERN_END): Likewise.
6256 (arm_init_acle_builtins): Initialize CDE builtins.
6257 (arm_expand_acle_builtin): Check CDE constant operands.
6258 * config/arm/arm.h (ARM_CDE_CONST_COPROC): New macro to set the range
6259 of CDE constant operand.
6260 * config/arm/arm.c (arm_hard_regno_mode_ok): Support DImode for
6262 (ARM_VCDE_CONST_1, ARM_VCDE_CONST_2, ARM_VCDE_CONST_3): Likewise.
6263 * config/arm/arm_cde.h (__arm_vcx1_u32): New macro of ACLE interface.
6264 (__arm_vcx1a_u32, __arm_vcx2_u32, __arm_vcx2a_u32): Likewise.
6265 (__arm_vcx3_u32, __arm_vcx3a_u32, __arm_vcx1d_u64): Likewise.
6266 (__arm_vcx1da_u64, __arm_vcx2d_u64, __arm_vcx2da_u64): Likewise.
6267 (__arm_vcx3d_u64, __arm_vcx3da_u64): Likewise.
6268 * config/arm/arm_cde_builtins.def: New file.
6269 * config/arm/iterators.md (V_reg): New attribute of SI.
6270 * config/arm/predicates.md (const_int_coproc_operand): New.
6271 (const_int_vcde1_operand, const_int_vcde2_operand): New.
6272 (const_int_vcde3_operand): New.
6273 * config/arm/unspecs.md (UNSPEC_VCDE, UNSPEC_VCDEA): New.
6274 * config/arm/vfp.md (arm_vcx1<mode>): New entry.
6275 (arm_vcx1a<mode>, arm_vcx2<mode>, arm_vcx2a<mode>): Likewise.
6276 (arm_vcx3<mode>, arm_vcx3a<mode>): Likewise.
6278 2020-04-08 Dennis Zhang <dennis.zhang@arm.com>
6280 * config.gcc: Add arm_cde.h.
6281 * config/arm/arm-c.c (arm_cpu_builtins): Define or undefine
6282 __ARM_FEATURE_CDE and __ARM_FEATURE_CDE_COPROC.
6283 * config/arm/arm-cpus.in (cdecp0, cdecp1, ..., cdecp7): New options.
6284 * config/arm/arm.c (arm_option_reconfigure_globals): Configure
6285 arm_arch_cde and arm_arch_cde_coproc to store the feature bits.
6286 * config/arm/arm.h (TARGET_CDE): New macro.
6287 * config/arm/arm_cde.h: New file.
6288 * doc/invoke.texi: Document CDE options +cdecp[0-7].
6289 * doc/sourcebuild.texi (arm_v8m_main_cde_ok): Document new target
6291 (arm_v8m_main_cde_fp, arm_v8_1m_main_cde_mve): Likewise.
6293 2020-04-08 Jakub Jelinek <jakub@redhat.com>
6295 PR rtl-optimization/94516
6296 * postreload.c: Include rtl-iter.h.
6297 (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR
6298 looking for all MEMs with RTX_AUTOINC operand.
6299 (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling.
6301 2020-04-08 Tobias Burnus <tobias@codesourcery.com>
6303 * omp-grid.c (grid_eliminate_combined_simd_part): Use
6304 OMP_CLAUSE_CODE to access the omp clause code.
6306 2020-04-07 Jeff Law <law@redhat.com>
6308 PR rtl-optimization/92264
6309 * config/h8300/h8300.md (mov;add peephole2): Avoid applying when
6310 the destination is the stack pointer.
6312 2020-04-07 Jakub Jelinek <jakub@redhat.com>
6314 PR rtl-optimization/94291
6315 PR rtl-optimization/84169
6316 * combine.c (try_combine): For split_i2i3, don't assume SET_DEST
6317 must be a REG or SUBREG of REG; if it is not one of these, don't
6320 2020-04-07 Richard Biener <rguenther@suse.de>
6323 * gimplify.c (gimplify_addr_expr): Also consider generated
6326 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6328 * config/arm/arm_mve.h: Add C++ polymorphism and fix preserve MACROs.
6330 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6332 * config/arm/arm_mve.h: Cast some pointers to expected types.
6334 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6336 * config/arm/arm_mve.h: Replace all uses of vuninitializedq_* with the
6337 same with '__arm_' prefix.
6339 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6341 * config/arm/mve.md (mve_vec_extract*): Allow memory operands in set.
6343 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6345 * config/arm/arm.c (arm_mve_immediate_check): Removed.
6346 * config/arm/mve.md (MVE_pred2, MVE_constraint2): Added FP types.
6347 (mve_vcvtq_n_to_f_*, mve_vcvtq_n_from_f_*, mve_vqshrnbq_n_*,
6348 mve_vqshrntq_n_*, mve_vqshrunbq_n_s*, mve_vqshruntq_n_s*,
6349 mve_vcvtq_m_n_from_f_*, mve_vcvtq_m_n_to_f_*, mve_vqshrnbq_m_n_*,
6350 mve_vqrshruntq_m_n_s*, mve_vqshrunbq_m_n_s*,
6351 mve_vqshruntq_m_n_s*): Fixed immediate constraints.
6353 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6355 * config/arm/arm.d (ashldi3): Don't use lsll for constant 32-bit shifts.
6357 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6359 * config/arm/arm_mve.h: Fix v[id]wdup intrinsics.
6360 * config/arm/mve/md: Fix v[id]wdup patterns.
6362 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6364 * config/arm/arm.c (output_move_neon): Deal with label + offset cases.
6365 * config/arm/mve.md (*mve_mov<mode>): Handle const vectors.
6367 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6369 * config/arm/arm_mve.h: Remove use of typeof for addr pointer parameters
6370 and remove const_ptr enums.
6372 2020-04-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
6374 * config/arm/arm_mve.h (vsubq_n): Merge with...
6376 (vmulq_n): Merge with...
6378 (__ARM_mve_typeid): Simplify scalar and constant detection.
6380 2020-04-07 Jakub Jelinek <jakub@redhat.com>
6383 * config/i386/i386-expand.c (expand_vec_perm_pshufb): Fix the check
6384 for inter-lane permutation for 64-byte modes.
6387 * config/aarch64/aarch64-simd.md (ashl<mode>3, lshr<mode>3,
6388 ashr<mode>3): Force operands[2] into reg whenever it is not CONST_INT.
6389 Assume it is a REG after that instead of testing it and doing FAIL
6390 otherwise. Formatting fix.
6392 2020-04-07 Sebastian Huber <sebastian.huber@embedded-brains.de>
6394 * config/rs6000/t-rtems: Delete mcpu=8540 multilib.
6396 2020-04-07 Jakub Jelinek <jakub@redhat.com>
6399 * config/i386/i386-expand.c (emit_reduc_half): For V{64QI,32HI}mode
6400 handle i < 64 using avx512bw_lshrv4ti3. Formatting fixes.
6402 2020-04-06 Jakub Jelinek <jakub@redhat.com>
6404 * cselib.c (cselib_subst_to_values): For SP_DERIVED_VALUE_P
6405 + const0_rtx return the SP_DERIVED_VALUE_P.
6407 2020-04-06 Richard Sandiford <richard.sandiford@arm.com>
6409 PR rtl-optimization/92989
6410 * lra-lives.c (process_bb_lives): Do not treat eh_return data
6411 registers as being live at the beginning of the EH receiver.
6413 2020-04-05 Zachary Spytz <zspytz@gmail.com>
6415 * extend.texi: Add free to list of ISO C90 functions that
6416 are recognized by the compiler.
6418 2020-04-05 Nagaraju Mekala <nmekala@xilix.com>
6420 * config/microblaze/microblaze.c (microblaze_must_save_register): Check
6423 * config/microblaze/microblaze.md (trap): Update output pattern.
6425 2020-04-04 Hannes Domani <ssbssa@yahoo.de>
6426 Jakub Jelinek <jakub@redhat.com>
6429 * dwarf2out.c (gen_subprogram_die): Look through references, pointers,
6430 arrays, pointer-to-members, function types and qualifiers when
6431 checking if in-class DIE had an 'auto' or 'decltype(auto)' return type
6432 to emit type again on definition.
6434 2020-04-04 Jan Hubicka <hubicka@ucw.cz>
6437 * ipa-fnsummary.c (vrp_will_run_p): New function.
6438 (fre_will_run_p): New function.
6439 (evaluate_properties_for_edge): Use it.
6440 * ipa-inline.c (can_inline_edge_by_limits_p): Do not inline
6441 !optimize_debug to optimize_debug.
6443 2020-04-04 Jakub Jelinek <jakub@redhat.com>
6445 PR rtl-optimization/94468
6446 * cselib.c (references_value_p): Formatting fix.
6447 (cselib_useless_value_p): New function.
6448 (discard_useless_locs, discard_useless_values,
6449 cselib_invalidate_regno_val, cselib_invalidate_mem,
6450 cselib_record_set): Use it instead of
6451 v->locs == 0 && !PRESERVED_VALUE_P (v->val_rtx).
6454 * tree-iterator.h (expr_single): Declare.
6455 * tree-iterator.c (expr_single): New function.
6456 * tree.h (protected_set_expr_location_if_unset): Declare.
6457 * tree.c (protected_set_expr_location): Use expr_single.
6458 (protected_set_expr_location_if_unset): New function.
6460 2020-04-03 Jeff Law <law@redhat.com>
6462 PR rtl-optimization/92264
6463 * config/stormy16/stormy16.c (xstormy16_preferred_reload_class): Handle
6464 reloading of auto-increment addressing modes.
6466 2020-04-03 H.J. Lu <hongjiu.lu@intel.com>
6469 * config/i386/sse.md (ssse3_pshufbv8qi3): Mark scratch operand
6472 2020-04-03 Jeff Law <law@redhat.com>
6474 PR rtl-optimization/92264
6475 * config/m32r/m32r.c (m32r_output_block_move): Properly account for
6476 post-increment addressing of source operands as well as residuals
6477 when computing any adjustments to the input pointer.
6479 2020-04-03 Jakub Jelinek <jakub@redhat.com>
6482 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3,
6483 avx2_ph<plusminus_mnemonic>dv8si3): Fix up RTL pattern to do
6484 second half of first lane from first lane of second operand and
6485 first half of second lane from second lane of first operand.
6487 2020-04-03 Andre Vieira <andre.simoesdiasvieira@arm.com>
6489 * config/arm/arm_mve.h: Condition the header file on __ARM_FEATURE_MVE.
6491 2020-04-03 Tamar Christina <tamar.christina@arm.com>
6494 * common/config/aarch64/aarch64-common.c
6495 (aarch64_get_extension_string_for_isa_flags): Handle default flags.
6497 2020-04-03 Richard Biener <rguenther@suse.de>
6500 * tree.c (array_ref_low_bound): Deal with released SSA names
6503 2020-04-03 Kwok Cheung Yeung <kcy@codesourcery.com>
6505 * config/gcn/gcn.c (print_operand): Handle unordered comparison
6507 * config/gcn/predicates.md (gcn_fp_compare_operator): Add unordered
6508 comparison operators.
6510 2020-04-03 Kewen Lin <linkw@gcc.gnu.org>
6512 PR tree-optimization/94443
6513 * tree-vect-loop.c (vectorizable_live_operation): Use
6514 gsi_insert_seq_before to replace gsi_insert_before.
6516 2020-04-03 Martin Liska <mliska@suse.cz>
6519 * ipa-icf-gimple.c (func_checker::compare_gimple_call):
6520 Compare type attributes for gimple_call_fntypes.
6522 2020-04-02 Sandra Loosemore <sandra@codesourcery.com>
6524 * alias.c (get_alias_set): Fix comment typos.
6526 2020-04-02 Fritz Reese <foreese@gcc.gnu.org>
6529 * fortran/decl.c (match_attr_spec): Lump COMP_STRUCTURE/COMP_MAP into
6530 attribute checking used by TYPE.
6532 2020-04-02 Martin Jambor <mjambor@suse.cz>
6535 * ipa-sra.c (struct caller_issues): New fields candidate and
6536 call_from_outside_comdat.
6537 (check_for_caller_issues): Check for calls from outsied of
6538 candidate's same_comdat_group.
6539 (check_all_callers_for_issues): Set up issues.candidate, check result
6541 (mark_callers_calls_comdat_local): New function.
6542 (process_isra_node_results): Set calls_comdat_local of callers if
6545 2020-04-02 Richard Biener <rguenther@suse.de>
6548 * common.opt (ffinite-loops): Initialize to zero.
6549 * opts.c (default_options_table): Remove OPT_ffinite_loops
6551 * cfgloop.h (loop::finite_p): New member.
6552 * cfgloopmanip.c (copy_loop_info): Copy finite_p.
6553 * ipa-icf-gimple.c (func_checker::compare_loops): Compare
6555 * lto-streamer-in.c (input_cfg): Stream finite_p.
6556 * lto-streamer-out.c (output_cfg): Likewise.
6557 * tree-cfg.c (replace_loop_annotate): Initialize finite_p
6558 from flag_finite_loops at CFG build time.
6559 * tree-ssa-loop-niter.c (finite_loop_p): Check the loops
6560 finite_p flag instead of flag_finite_loops.
6561 * doc/invoke.texi (ffinite-loops): Adjust documentation of
6564 2020-04-02 Richard Biener <rguenther@suse.de>
6567 * dwarf2out.c (dwarf2out_early_finish): Remove code emitting
6568 DW_TAG_imported_unit.
6570 2020-04-02 Maciej W. Rozycki <macro@wdc.com>
6572 * doc/install.texi (Specific) <riscv32-*-elf, riscv32-*-linux>
6573 <riscv64-*-elf, riscv64-*-linux>: Update binutils requirement to
6576 2020-04-02 Kewen Lin <linkw@gcc.gnu.org>
6578 PR tree-optimization/94401
6579 * tree-vect-loop.c (vectorizable_load): Handle VMAT_CONTIGUOUS_REVERSE
6580 access type when loading halves of vector to avoid peeling for gaps.
6582 2020-04-02 Jakub Jelinek <jakub@redhat.com>
6584 * config/mips/mti-linux.h (SYSROOT_SUFFIX_SPEC): Add a space in
6585 between a string literal and MIPS_SYSVERSION_SPEC macro.
6587 2020-04-02 Martin Jambor <mjambor@suse.cz>
6589 * doc/invoke.texi (Optimize Options): Document sra-max-propagations.
6591 2020-04-02 Jakub Jelinek <jakub@redhat.com>
6593 PR rtl-optimization/92264
6594 * params.opt (-param=max-find-base-term-values=): Decrease default
6597 PR rtl-optimization/92264
6598 * rtl.h (struct rtx_def): Mention that call bit is used as
6599 SP_DERIVED_VALUE_P in cselib.c.
6600 * cselib.c (SP_DERIVED_VALUE_P): Define.
6601 (PRESERVED_VALUE_P, SP_BASED_VALUE_P): Move definitions earlier.
6602 (cselib_hasher::equal): Handle equality between SP_DERIVED_VALUE_P
6603 val_rtx and sp based expression where offsets cancel each other.
6604 (preserve_constants_and_equivs): Formatting fix.
6605 (cselib_reset_table): Add reverse op loc to SP_DERIVED_VALUE_P
6606 locs list for cfa_base_preserved_val if needed. Formatting fix.
6607 (autoinc_split): If the to be returned value is a REG, MEM or
6608 VALUE which has SP_DERIVED_VALUE_P + CONST_INT as one of its
6609 locs, return the SP_DERIVED_VALUE_P VALUE and adjust *off.
6610 (rtx_equal_for_cselib_1): Call autoinc_split even if both
6611 expressions are PLUS in Pmode with CONST_INT second operands.
6612 Handle SP_DERIVED_VALUE_P cases.
6613 (cselib_hash_plus_const_int): New function.
6614 (cselib_hash_rtx): Use it for PLUS in Pmode with CONST_INT
6615 second operand, as well as for PRE_DEC etc. that ought to be
6616 hashed the same way.
6617 (cselib_subst_to_values): Substitute PLUS with Pmode and
6618 CONST_INT operand if the first operand is a VALUE which has
6619 SP_DERIVED_VALUE_P + CONST_INT as one of its locs for the
6620 SP_DERIVED_VALUE_P + adjusted offset.
6621 (cselib_lookup_1): When creating a new VALUE for stack_pointer_rtx,
6622 set SP_DERIVED_VALUE_P on it. Set PRESERVED_VALUE_P when adding
6623 SP_DERIVED_VALUE_P PRESERVED_VALUE_P subseted VALUE location.
6624 * var-tracking.c (vt_initialize): Call cselib_add_permanent_equiv
6625 on the sp value before calling cselib_add_permanent_equiv on the
6627 * dse.c (check_for_inc_dec_1, check_for_inc_dec): Punt on RTX_AUTOINC
6628 in the insn without REG_INC note.
6629 (replace_read): Punt on RTX_AUTOINC in the *loc being replaced.
6630 Punt on invalid insns added by copy_to_mode_reg. Formatting fixes.
6633 * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
6634 y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
6636 2020-04-02 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6639 * config/arm/arm-builtins.c (LDRGBWBXU_QUALIFIERS): Define.
6640 (LDRGBWBXU_Z_QUALIFIERS): Likewise.
6641 * config/arm/arm_mve.h (__arm_vldrdq_gather_base_wb_s64): Modify
6642 intrinsic defintion by adding a new builtin call to writeback into base
6644 (__arm_vldrdq_gather_base_wb_u64): Likewise.
6645 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
6646 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
6647 (__arm_vldrwq_gather_base_wb_s32): Likewise.
6648 (__arm_vldrwq_gather_base_wb_u32): Likewise.
6649 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
6650 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
6651 (__arm_vldrwq_gather_base_wb_f32): Likewise.
6652 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
6653 * config/arm/arm_mve_builtins.def (vldrwq_gather_base_wb_z_u): Modify
6654 builtin's qualifier.
6655 (vldrdq_gather_base_wb_z_u): Likewise.
6656 (vldrwq_gather_base_wb_u): Likewise.
6657 (vldrdq_gather_base_wb_u): Likewise.
6658 (vldrwq_gather_base_wb_z_s): Likewise.
6659 (vldrwq_gather_base_wb_z_f): Likewise.
6660 (vldrdq_gather_base_wb_z_s): Likewise.
6661 (vldrwq_gather_base_wb_s): Likewise.
6662 (vldrwq_gather_base_wb_f): Likewise.
6663 (vldrdq_gather_base_wb_s): Likewise.
6664 (vldrwq_gather_base_nowb_z_u): Define builtin.
6665 (vldrdq_gather_base_nowb_z_u): Likewise.
6666 (vldrwq_gather_base_nowb_u): Likewise.
6667 (vldrdq_gather_base_nowb_u): Likewise.
6668 (vldrwq_gather_base_nowb_z_s): Likewise.
6669 (vldrwq_gather_base_nowb_z_f): Likewise.
6670 (vldrdq_gather_base_nowb_z_s): Likewise.
6671 (vldrwq_gather_base_nowb_s): Likewise.
6672 (vldrwq_gather_base_nowb_f): Likewise.
6673 (vldrdq_gather_base_nowb_s): Likewise.
6674 * config/arm/mve.md (mve_vldrwq_gather_base_nowb_<supf>v4si): Define RTL
6676 (mve_vldrwq_gather_base_wb_<supf>v4si): Modify RTL pattern.
6677 (mve_vldrwq_gather_base_nowb_z_<supf>v4si): Define RTL pattern.
6678 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Modify RTL pattern.
6679 (mve_vldrwq_gather_base_wb_fv4sf): Modify RTL pattern.
6680 (mve_vldrwq_gather_base_nowb_fv4sf): Define RTL pattern.
6681 (mve_vldrwq_gather_base_wb_z_fv4sf): Modify RTL pattern.
6682 (mve_vldrwq_gather_base_nowb_z_fv4sf): Define RTL pattern.
6683 (mve_vldrdq_gather_base_nowb_<supf>v4di): Define RTL pattern.
6684 (mve_vldrdq_gather_base_wb_<supf>v4di): Modify RTL pattern.
6685 (mve_vldrdq_gather_base_nowb_z_<supf>v4di): Define RTL pattern.
6686 (mve_vldrdq_gather_base_wb_z_<supf>v4di): Modify RTL pattern.
6688 2020-04-02 Andreas Krebbel <krebbel@linux.ibm.com>
6690 * config/s390/vector.md ("<ti*>add<mode>3", "mul<mode>3")
6691 ("and<mode>3", "notand<mode>3", "ior<mode>3", "ior_not<mode>3")
6692 ("xor<mode>3", "notxor<mode>3", "smin<mode>3", "smax<mode>3")
6693 ("umin<mode>3", "umax<mode>3", "vec_widen_smult_even_<mode>")
6694 ("vec_widen_umult_even_<mode>", "vec_widen_smult_odd_<mode>")
6695 ("vec_widen_umult_odd_<mode>", "add<mode>3", "sub<mode>3")
6696 ("mul<mode>3", "fma<mode>4", "fms<mode>4", "neg_fma<mode>4")
6697 ("neg_fms<mode>4", "*smax<mode>3_vxe", "*smaxv2df3_vx")
6698 ("*smin<mode>3_vxe", "*sminv2df3_vx"): Remove % constraint
6700 ("vec_widen_umult_lo_<mode>", "vec_widen_umult_hi_<mode>")
6701 ("vec_widen_smult_lo_<mode>", "vec_widen_smult_hi_<mode>"):
6702 Remove constraints from expander.
6703 * config/s390/vx-builtins.md ("vacc<bhfgq>_<mode>", "vacq")
6704 ("vacccq", "vec_avg<mode>", "vec_avgu<mode>", "vec_vmal<mode>")
6705 ("vec_vmah<mode>", "vec_vmalh<mode>", "vec_vmae<mode>")
6706 ("vec_vmale<mode>", "vec_vmao<mode>", "vec_vmalo<mode>")
6707 ("vec_smulh<mode>", "vec_umulh<mode>", "vec_nor<mode>3")
6708 ("vfmin<mode>", "vfmax<mode>"): Remove % constraint modifier.
6710 2020-04-01 Peter Bergner <bergner@linux.ibm.com>
6712 PR rtl-optimization/94123
6713 * lower-subreg.c (pass_lower_subreg3::gate): Remove test for
6714 flag_split_wide_types_early.
6716 2020-04-01 Joerg Sonnenberger <joerg@bec.de>
6718 * doc/extend.texi (Common Function Attributes): Fix typo.
6720 2020-04-01 Segher Boessenkool <segher@kernel.crashing.org>
6723 * config/rs6000/rs6000.md (*tocref<mode> for P): Add insn condition
6726 2020-04-01 Zackery Spytz <zspytz@gmail.com>
6728 * doc/extend.texi: Fix a typo in the documentation of the
6729 copy function attribute.
6731 2020-04-01 Jakub Jelinek <jakub@redhat.com>
6734 * tree-object-size.c (pass_object_sizes::execute): Don't call
6735 replace_uses_by for SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs, instead
6736 call replace_call_with_value.
6738 2020-04-01 Kewen Lin <linkw@gcc.gnu.org>
6740 PR tree-optimization/94043
6741 * tree-vect-loop.c (vectorizable_live_operation): Generate loop-closed
6742 phi for vec_lhs and use it for lane extraction.
6744 2020-03-31 Felix Yang <felix.yang@huawei.com>
6746 PR tree-optimization/94398
6747 * tree-vect-stmts.c (vectorizable_store): Instead of calling
6748 vect_supportable_dr_alignment, set alignment_support_scheme to
6749 dr_unaligned_supported for gather-scatter accesses.
6750 (vectorizable_load): Likewise.
6752 2020-03-31 Andrew Stubbs <ams@codesourcery.com>
6754 * config/gcn/gcn-valu.md (V_QI, V_HI, V_HF, V_SI, V_SF, V_DI, V_DF):
6756 (vnsi, VnSI, vndi, VnDI): New mode attributes.
6757 (mov<mode>): Use <VnDI> in place of V64DI.
6758 (mov<mode>_exec): Likewise.
6759 (mov<mode>_sgprbase): Likewise.
6760 (reload_out<mode>): Likewise.
6761 (*vec_set<mode>_1): Use GET_MODE_NUNITS instead of constant 64.
6762 (gather_load<mode>v64si): Rename to ...
6763 (gather_load<mode><vnsi>): ... this, and use <VnSI> in place of V64SI,
6764 and <VnDI> in place of V64DI.
6765 (gather<mode>_insn_1offset<exec>): Use <VnDI> in place of V64DI.
6766 (gather<mode>_insn_1offset_ds<exec>): Use <VnSI> in place of V64SI.
6767 (gather<mode>_insn_2offsets<exec>): Use <VnSI> and <VnDI>.
6768 (scatter_store<mode>v64si): Rename to ...
6769 (scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6770 (scatter<mode>_expr<exec_scatter>): Use <VnSI> and <VnDI>.
6771 (scatter<mode>_insn_1offset<exec_scatter>): Likewise.
6772 (scatter<mode>_insn_1offset_ds<exec_scatter>): Likewise.
6773 (scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
6774 (ds_bpermute<mode>): Use <VnSI>.
6775 (addv64si3_vcc<exec_vcc>): Rename to ...
6776 (add<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6777 (addv64si3_vcc_dup<exec_vcc>): Rename to ...
6778 (add<mode>3_vcc_dup<exec_vcc>): ... this, and use V_SI.
6779 (addcv64si3<exec_vcc>): Rename to ...
6780 (addc<mode>3<exec_vcc>): ... this, and use V_SI.
6781 (subv64si3_vcc<exec_vcc>): Rename to ...
6782 (sub<mode>3_vcc<exec_vcc>): ... this, and use V_SI.
6783 (subcv64si3<exec_vcc>): Rename to ...
6784 (subc<mode>3<exec_vcc>): ... this, and use V_SI.
6785 (addv64di3): Rename to ...
6786 (add<mode>3): ... this, and use V_DI.
6787 (addv64di3_exec): Rename to ...
6788 (add<mode>3_exec): ... this, and use V_DI.
6789 (subv64di3): Rename to ...
6790 (sub<mode>3): ... this, and use V_DI.
6791 (subv64di3_exec): Rename to ...
6792 (sub<mode>3_exec): ... this, and use V_DI.
6793 (addv64di3_zext): Rename to ...
6794 (add<mode>3_zext): ... this, and use V_DI and <VnSI>.
6795 (addv64di3_zext_exec): Rename to ...
6796 (add<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6797 (addv64di3_zext_dup): Rename to ...
6798 (add<mode>3_zext_dup): ... this, and use V_DI and <VnSI>.
6799 (addv64di3_zext_dup_exec): Rename to ...
6800 (add<mode>3_zext_dup_exec): ... this, and use V_DI and <VnSI>.
6801 (addv64di3_zext_dup2): Rename to ...
6802 (add<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6803 (addv64di3_zext_dup2_exec): Rename to ...
6804 (add<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6805 (addv64di3_sext_dup2): Rename to ...
6806 (add<mode>3_sext_dup2): ... this, and use V_DI and <VnSI>.
6807 (addv64di3_sext_dup2_exec): Rename to ...
6808 (add<mode>3_sext_dup2_exec): ... this, and use V_DI and <VnSI>.
6809 (<su>mulv64si3_highpart<exec>): Rename to ...
6810 (<su>mul<mode>3_highpart<exec>): ... this and use V_SI and <VnDI>.
6811 (mulv64di3): Rename to ...
6812 (mul<mode>3): ... this, and use V_DI and <VnSI>.
6813 (mulv64di3_exec): Rename to ...
6814 (mul<mode>3_exec): ... this, and use V_DI and <VnSI>.
6815 (mulv64di3_zext): Rename to ...
6816 (mul<mode>3_zext): ... this, and use V_DI and <VnSI>.
6817 (mulv64di3_zext_exec): Rename to ...
6818 (mul<mode>3_zext_exec): ... this, and use V_DI and <VnSI>.
6819 (mulv64di3_zext_dup2): Rename to ...
6820 (mul<mode>3_zext_dup2): ... this, and use V_DI and <VnSI>.
6821 (mulv64di3_zext_dup2_exec): Rename to ...
6822 (mul<mode>3_zext_dup2_exec): ... this, and use V_DI and <VnSI>.
6823 (<expander>v64di3): Rename to ...
6824 (<expander><mode>3): ... this, and use V_DI and <VnSI>.
6825 (<expander>v64di3_exec): Rename to ...
6826 (<expander><mode>3_exec): ... this, and use V_DI and <VnSI>.
6827 (<expander>v64si3<exec>): Rename to ...
6828 (<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6829 (v<expander>v64si3<exec>): Rename to ...
6830 (v<expander><mode>3<exec>): ... this, and use V_SI and <VnSI>.
6831 (<expander>v64si3<exec>): Rename to ...
6832 (<expander><vnsi>3<exec>): ... this, and use V_SI.
6833 (subv64df3<exec>): Rename to ...
6834 (sub<mode>3<exec>): ... this, and use V_DF.
6835 (truncv64di<mode>2): Rename to ...
6836 (trunc<vndi><mode>2): ... this, and use <VnDI>.
6837 (truncv64di<mode>2_exec): Rename to ...
6838 (trunc<vndi><mode>2_exec): ... this, and use <VnDI>.
6839 (<convop><mode>v64di2): Rename to ...
6840 (<convop><mode><vndi>2): ... this, and use <VnDI>.
6841 (<convop><mode>v64di2_exec): Rename to ...
6842 (<convop><mode><vndi>2_exec): ... this, and use <VnDI>.
6843 (vec_cmp<u>v64qidi): Rename to ...
6844 (vec_cmp<u><mode>di): ... this, and use <VnSI>.
6845 (vec_cmp<u>v64qidi_exec): Rename to ...
6846 (vec_cmp<u><mode>di_exec): ... this, and use <VnSI>.
6847 (vcond_mask_<mode>di): Use <VnDI>.
6848 (maskload<mode>di): Likewise.
6849 (maskstore<mode>di): Likewise.
6850 (mask_gather_load<mode>v64si): Rename to ...
6851 (mask_gather_load<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6852 (mask_scatter_store<mode>v64si): Rename to ...
6853 (mask_scatter_store<mode><vnsi>): ... this, and use <VnSI> and <VnDI>.
6854 (*<reduc_op>_dpp_shr_v64di): Rename to ...
6855 (*<reduc_op>_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6856 (*plus_carry_in_dpp_shr_v64si): Rename to ...
6857 (*plus_carry_in_dpp_shr_<mode>): ... this, and use V_SI.
6858 (*plus_carry_dpp_shr_v64di): Rename to ...
6859 (*plus_carry_dpp_shr_<mode>): ... this, and use V_DI and <VnSI>.
6860 (vec_seriesv64si): Rename to ...
6861 (vec_series<mode>): ... this, and use V_SI.
6862 (vec_seriesv64di): Rename to ...
6863 (vec_series<mode>): ... this, and use V_DI.
6865 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6867 * config/arc/arc.c (arc_print_operand): Use
6868 HOST_WIDE_INT_PRINT_DEC macro.
6870 2020-03-31 Claudiu Zissulescu <claziss@synopsys.com>
6872 * config/arc/arc.h (ASM_FORMAT_PRIVATE_NAME): Fix it.
6874 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6876 * config/arm/arm_mve.h (vbicq): Define MVE intrinsic polymorphic
6878 (__arm_vbicq): Likewise.
6880 2020-03-31 Vineet Gupta <vgupta@synopsys.com>
6882 * config/arc/linux.h: GLIBC_DYNAMIC_LINKER support BE/arc700.
6884 2020-03-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
6886 * config/arm/arm_mve.h (vaddlvq): Move the polymorphic variant to the
6887 common section of both MVE Integer and MVE Floating Point.
6889 (vaddlvq_p): Likewise.
6890 (vaddvaq): Likewise.
6891 (vaddvq_p): Likewise.
6892 (vcmpcsq): Likewise.
6893 (vmlsdavxq): Likewise.
6894 (vmlsdavq): Likewise.
6895 (vmladavxq): Likewise.
6896 (vmladavq): Likewise.
6898 (vminavq): Likewise.
6900 (vmaxavq): Likewise.
6901 (vmlaldavq): Likewise.
6902 (vcmphiq): Likewise.
6903 (vaddlvaq): Likewise.
6904 (vrmlaldavhq): Likewise.
6905 (vrmlaldavhxq): Likewise.
6906 (vrmlsldavhq): Likewise.
6907 (vrmlsldavhxq): Likewise.
6908 (vmlsldavxq): Likewise.
6909 (vmlsldavq): Likewise.
6911 (vrmlaldavhaq): Likewise.
6912 (vcmpgeq_m_n): Likewise.
6913 (vmlsdavxq_p): Likewise.
6914 (vmlsdavq_p): Likewise.
6915 (vmlsdavaxq): Likewise.
6916 (vmlsdavaq): Likewise.
6917 (vaddvaq_p): Likewise.
6918 (vcmpcsq_m_n): Likewise.
6919 (vcmpcsq_m): Likewise.
6920 (vmladavxq_p): Likewise.
6921 (vmladavq_p): Likewise.
6922 (vmladavaxq): Likewise.
6923 (vmladavaq): Likewise.
6924 (vminvq_p): Likewise.
6925 (vminavq_p): Likewise.
6926 (vmaxvq_p): Likewise.
6927 (vmaxavq_p): Likewise.
6928 (vcmphiq_m): Likewise.
6929 (vaddlvaq_p): Likewise.
6930 (vmlaldavaq): Likewise.
6931 (vmlaldavaxq): Likewise.
6932 (vmlaldavq_p): Likewise.
6933 (vmlaldavxq_p): Likewise.
6934 (vmlsldavaq): Likewise.
6935 (vmlsldavaxq): Likewise.
6936 (vmlsldavq_p): Likewise.
6937 (vmlsldavxq_p): Likewise.
6938 (vrmlaldavhaxq): Likewise.
6939 (vrmlaldavhq_p): Likewise.
6940 (vrmlaldavhxq_p): Likewise.
6941 (vrmlsldavhaq): Likewise.
6942 (vrmlsldavhaxq): Likewise.
6943 (vrmlsldavhq_p): Likewise.
6944 (vrmlsldavhxq_p): Likewise.
6945 (vabavq_p): Likewise.
6946 (vmladavaq_p): Likewise.
6947 (vstrbq_scatter_offset): Likewise.
6948 (vstrbq_p): Likewise.
6949 (vstrbq_scatter_offset_p): Likewise.
6950 (vstrdq_scatter_base_p): Likewise.
6951 (vstrdq_scatter_base): Likewise.
6952 (vstrdq_scatter_offset_p): Likewise.
6953 (vstrdq_scatter_offset): Likewise.
6954 (vstrdq_scatter_shifted_offset_p): Likewise.
6955 (vstrdq_scatter_shifted_offset): Likewise.
6956 (vmaxq_x): Likewise.
6957 (vminq_x): Likewise.
6958 (vmovlbq_x): Likewise.
6959 (vmovltq_x): Likewise.
6960 (vmulhq_x): Likewise.
6961 (vmullbq_int_x): Likewise.
6962 (vmullbq_poly_x): Likewise.
6963 (vmulltq_int_x): Likewise.
6964 (vmulltq_poly_x): Likewise.
6967 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6970 * config/aarch64/constraints.md (Uph): New constraint.
6971 * config/aarch64/atomics.md (cas_short_expected_imm): New mode attr.
6972 (@aarch64_compare_and_swap<mode>): Use it instead of n in operand 2's
6975 2020-03-31 Marc Glisse <marc.glisse@inria.fr>
6976 Jakub Jelinek <jakub@redhat.com>
6979 * fold-const.c (fold_binary_loc) <case TRUNC_DIV_EXPR>: Use
6980 ANY_INTEGRAL_TYPE_P instead of INTEGRAL_TYPE_P.
6982 2020-03-31 Jakub Jelinek <jakub@redhat.com>
6984 PR tree-optimization/94403
6985 * gimple-ssa-store-merging.c (verify_symbolic_number_p): Allow also
6986 ENUMERAL_TYPE lhs_type.
6988 PR rtl-optimization/94344
6989 * tree-ssa-forwprop.c (simplify_rotate): Handle also same precision
6990 conversions, either on both operands of |^+ or just one. Handle
6991 also extra same precision conversion on RSHIFT_EXPR first operand
6992 provided RSHIFT_EXPR is performed in unsigned type.
6994 2020-03-30 David Malcolm <dmalcolm@redhat.com>
6996 * lra.c (finish_insn_code_data_once): Set the array elements
6997 to NULL after freeing them.
6999 2020-03-30 Andreas Schwab <schwab@suse.de>
7001 * config/host-linux.c (TRY_EMPTY_VM_SPACE) [__riscv && __LP64__]:
7004 2020-03-30 Will Schmidt <will_schmidt@vnet.ibm.com>
7006 * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove code
7007 to skip defining builtins based on builtin_mask.
7009 2020-03-30 Jakub Jelinek <jakub@redhat.com>
7012 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>): If
7013 !TARGET_AVX512VL, use 512-bit vpternlog and make sure the input
7014 operand is a register. Don't enable masked variants for V*[QH]Imode.
7017 * config/i386/sse.md (vec_extract_lo_<mode><mask_name>): Use
7018 <store_mask_constraint> instead of m in output operand constraint.
7019 (vec_extract_hi_<mode><mask_name>): Use <mask_operand2> instead of
7022 2020-03-30 Alan Modra <amodra@gmail.com>
7024 * config/rs6000/rs6000.c (rs6000_call_aix): Emit cookie to pattern.
7025 (rs6000_indirect_call_template_1): Adjust to suit.
7026 * config/rs6000/rs6000.md (call_local): Merge call_local32,
7027 call_local64, and call_local_aix.
7028 (call_value_local): Simlarly.
7029 (call_nonlocal_aix, call_value_nonlocal_aix): Adjust rtl to suit,
7030 and disable pattern when CALL_LONG.
7031 (call_indirect_aix, call_value_indirect_aix): Adjust rtl.
7032 (call_indirect_elfv2, call_indirect_pcrel): Likewise.
7033 (call_value_indirect_elfv2, call_value_indirect_pcrel): Likewise.
7035 2020-03-29 H.J. Lu <hongjiu.lu@intel.com>
7038 * doc/invoke.texi: Update -falign-functions, -falign-loops and
7039 -falign-jumps documentation.
7041 2020-03-29 Martin Liska <mliska@suse.cz>
7044 * cgraphunit.c (process_function_and_variable_attributes): Remove
7045 double 'attribute' words.
7047 2020-03-29 John David Anglin <dave.anglin@bell.net>
7049 * config/pa/pa.c (pa_asm_output_aligned_bss): Delete duplicate
7052 2020-03-28 Jakub Jelinek <jakub@redhat.com>
7055 * c-decl.c (grokdeclarator): After issuing errors, set size_int_const
7056 to true after setting size to integer_one_node.
7058 PR tree-optimization/94329
7059 * tree-ssa-reassoc.c (reassociate_bb): When calling reassoc_remove_stmt
7060 on the last stmt in a bb, make sure gsi_prev isn't done immediately
7063 2020-03-27 Alan Modra <amodra@gmail.com>
7066 * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
7067 for PLT16_LO and PLT_PCREL.
7068 * config/rs6000/rs6000.md (UNSPEC_PLT16_LO, UNSPEC_PLT_PCREL): Remove.
7069 (UNSPECV_PLT16_LO, UNSPECV_PLT_PCREL): Define.
7070 (pltseq_plt16_lo_, pltseq_plt_pcrel): Use unspec_volatile.
7072 2020-03-27 Martin Sebor <msebor@redhat.com>
7075 * calls.c (init_attr_rdwr_indices): Iterate over all access attributes.
7077 2020-03-27 Andrew Stubbs <ams@codesourcery.com>
7079 * config/gcn/gcn-valu.md:
7080 (VEC_SUBDWORD_MODE): Rename to V_QIHI throughout.
7081 (VEC_1REG_MODE): Delete.
7082 (VEC_1REG_ALT): Delete.
7083 (VEC_ALL1REG_MODE): Rename to V_1REG throughout.
7084 (VEC_1REG_INT_MODE): Delete.
7085 (VEC_ALL1REG_INT_MODE): Rename to V_INT_1REG throughout.
7086 (VEC_ALL1REG_INT_ALT): Rename to V_INT_1REG_ALT throughout.
7087 (VEC_2REG_MODE): Rename to V_2REG throughout.
7088 (VEC_REG_MODE): Rename to V_noHI throughout.
7089 (VEC_ALLREG_MODE): Rename to V_ALL throughout.
7090 (VEC_ALLREG_ALT): Rename to V_ALL_ALT throughout.
7091 (VEC_ALLREG_INT_MODE): Rename to V_INT throughout.
7092 (VEC_INT_MODE): Delete.
7093 (VEC_FP_MODE): Rename to V_FP throughout and move to top.
7094 (VEC_FP_1REG_MODE): Rename to V_FP_1REG throughout and move to top.
7095 (FP_MODE): Delete and replace with FP throughout.
7096 (FP_1REG_MODE): Delete and replace with FP_1REG throughout.
7097 (VCMP_MODE): Rename to V_noQI throughout and move to top.
7098 (VCMP_MODE_INT): Rename to V_INT_noQI throughout and move to top.
7099 * config/gcn/gcn.md (FP): New mode iterator.
7100 (FP_1REG): New mode iterator.
7102 2020-03-27 David Malcolm <dmalcolm@redhat.com>
7104 * doc/invoke.texi (-fdump-analyzer-supergraph): Document that this
7105 now emits two .dot files.
7106 * graphviz.cc (graphviz_out::begin_tr): Only emit a TR, not a TD.
7107 (graphviz_out::end_tr): Only close a TR, not a TD.
7108 (graphviz_out::begin_td): New.
7109 (graphviz_out::end_td): New.
7110 (graphviz_out::begin_trtd): New, replacing the old implementation
7111 of graphviz_out::begin_tr.
7112 (graphviz_out::end_tdtr): New, replacing the old implementation
7113 of graphviz_out::end_tr.
7114 * graphviz.h (graphviz_out::begin_td): New decl.
7115 (graphviz_out::end_td): New decl.
7116 (graphviz_out::begin_trtd): New decl.
7117 (graphviz_out::end_tdtr): New decl.
7119 2020-03-27 Richard Biener <rguenther@suse.de>
7122 * dwarf2out.c (should_emit_struct_debug): Return false for
7125 2020-03-27 Richard Biener <rguenther@suse.de>
7127 PR tree-optimization/94352
7128 * tree-ssa-propagate.c (ssa_prop_init): Move seeding of the
7130 (ssa_propagation_engine::ssa_propagate): ... here after
7131 initializing curr_order.
7133 2020-03-27 Kewen Lin <linkw@gcc.gnu.org>
7135 PR tree-optimization/90332
7136 * tree-vect-stmts.c (vector_vector_composition_type): New function.
7137 (get_group_load_store_type): Adjust to call
7138 vector_vector_composition_type, extend it to construct with scalar
7140 (vectorizable_load): Likewise.
7142 2020-03-27 Roman Zhuykov <zhroma@ispras.ru>
7144 * ddg.c (create_ddg_dep_from_intra_loop_link): Remove assertions.
7145 (create_ddg_dep_no_link): Likewise.
7146 (add_cross_iteration_register_deps): Move debug instruction check.
7147 Other minor refactoring.
7148 (add_intra_loop_mem_dep): Do not check for debug instructions.
7149 (add_inter_loop_mem_dep): Likewise.
7150 (build_intra_loop_deps): Likewise.
7151 (create_ddg): Do not include debug insns into the graph.
7152 * ddg.h (struct ddg): Remove num_debug field.
7153 * modulo-sched.c (doloop_register_get): Adjust condition.
7154 (res_MII): Remove DDG num_debug field usage.
7155 (sms_schedule_by_order): Use assertion against debug insns.
7156 (ps_has_conflicts): Drop debug insn check.
7158 2020-03-26 Jakub Jelinek <jakub@redhat.com>
7161 * tree.c (protected_set_expr_location): Recurse on STATEMENT_LIST
7162 that contains exactly one non-DEBUG_BEGIN_STMT statement.
7165 * gimple.h (gimple_seq_first_nondebug_stmt): New function.
7166 (gimple_seq_last_nondebug_stmt): Don't return NULL if seq contains
7167 a single non-debug stmt followed by one or more debug stmts.
7168 * gimplify.c (gimplify_body): Use gimple_seq_first_nondebug_stmt
7169 instead of gimple_seq_first_stmt, use gimple_seq_first_nondebug_stmt
7170 and gimple_seq_last_nondebug_stmt instead of gimple_seq_first and
7171 gimple_seq_last to check if outer_stmt gbind could be reused and
7172 if yes and it is surrounded by any debug stmts, move them into the
7175 PR rtl-optimization/92264
7176 * var-tracking.c (add_stores): Call cselib_set_value_sp_based even
7177 for sp based values in !frame_pointer_needed
7178 && !ACCUMULATE_OUTGOING_ARGS functions.
7180 2020-03-26 Felix Yang <felix.yang@huawei.com>
7182 PR tree-optimization/94269
7183 * tree-ssa-math-opts.c (convert_plusminus_to_widen): Restrict
7185 operation to single basic block.
7187 2020-03-25 Jeff Law <law@redhat.com>
7189 PR rtl-optimization/90275
7190 * config/sh/sh.md (mov_neg_si_t): Clobber the T register in the
7193 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7196 * config/arm/arm.c (arm_gen_dicompare_reg): Set mode of COMPARE to
7197 mode rather than VOIDmode.
7199 2020-03-25 Martin Sebor <msebor@redhat.com>
7202 * gimple-ssa-warn-alloca.c (pass_walloca::execute): Issue warnings
7203 even for alloca calls resulting from system macro expansion.
7204 Include inlining context in all warnings.
7206 2020-03-25 Richard Sandiford <richard.sandiford@arm.com>
7209 * config/rs6000/rs6000.c (rs6000_can_change_mode_class): Allow
7210 FPRs to change between SDmode and DDmode.
7212 2020-03-25 Martin Sebor <msebor@redhat.com>
7214 PR tree-optimization/94131
7215 * gimple-fold.c (get_range_strlen_tree): Fail for variable-length
7217 * tree-ssa-strlen.c (get_range_strlen_dynamic): Avoid assuming
7218 types have constant sizes.
7220 2020-03-25 Martin Liska <mliska@suse.cz>
7223 * configure.ac: Report error only when --with-zstd
7225 * configure: Regenerate.
7227 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7230 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Set
7231 INSN_CODE (insn) to -1 when changing the pattern.
7233 2020-03-25 Martin Liska <mliska@suse.cz>
7237 * config/i386/i386-features.c (make_resolver_func): Drop
7238 public flag for resolver.
7239 * config/rs6000/rs6000.c (make_resolver_func): Add comdat
7240 group for resolver and drop public flag if possible.
7241 * multiple_target.c (create_dispatcher_calls): Drop unique_name
7242 and resolution as we want to enable LTO privatization of the default
7245 2020-03-25 Martin Liska <mliska@suse.cz>
7248 * configure.ac: Respect --without-zstd and report
7249 error when we can't find header file with --with-zstd.
7250 * configure: Regenerate.
7252 2020-03-25 Jakub Jelinek <jakub@redhat.com>
7255 * varasm.c (output_constructor_array_range): If local->index
7256 RANGE_EXPR doesn't start at the current location in the constructor,
7257 skip needed number of bytes using assemble_zeros or assert we don't
7261 * langhooks.c (lhd_set_decl_assembler_name): Use a static ulong
7262 counter instead of DECL_UID.
7264 PR tree-optimization/94300
7265 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): If pd.offset
7266 is positive, make sure that off + size isn't larger than needed_len.
7268 2020-03-25 Richard Biener <rguenther@suse.de>
7269 Jakub Jelinek <jakub@redhat.com>
7272 * tree-if-conv.c (ifcvt_local_dce): Delete dead statements backwards.
7274 2020-03-24 Christophe Lyon <christophe.lyon@linaro.org>
7276 * doc/sourcebuild.texi (ARM-specific attributes): Add
7278 (Features for dg-add-options): Add arm_fp_dp.
7280 2020-03-24 John David Anglin <danglin@gcc.gnu.org>
7283 * config/pa/pa.h (TARGET_CPU_CPP_BUILTINS): Define __BIG_ENDIAN__.
7285 2020-03-24 Tobias Burnus <tobias@codesourcery.com>
7288 * omp-offload.c (omp_finish_file): Fix target-link handling if
7289 targetm_common.have_named_sections is false.
7291 2020-03-24 Jakub Jelinek <jakub@redhat.com>
7294 * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use gen_int_mode
7298 * tree-ssa-loop-manip.c (create_iv): If after, set stmt location to
7299 e->goto_locus even if gsi_bb (*incr_pos) contains only debug stmts.
7300 If not after and at *incr_pos is a debug stmt, set stmt location to
7301 location of next non-debug stmt after it if any.
7304 * tree-if-conv.c (ifcvt_local_dce): For gimple debug stmts, just set
7305 GF_PLF_2, but don't add them to worklist. Don't add an assigment to
7306 worklist or set GF_PLF_2 just because it is used in a debug stmt in
7307 another bb. Formatting improvements.
7310 * cgraphunit.c (check_global_declaration): For DECL_EXTERNAL and
7311 non-TREE_PUBLIC non-DECL_ARTIFICIAL FUNCTION_DECLs, set TREE_PUBLIC
7312 regardless of whether TREE_NO_WARNING is set on it or whether
7313 warn_unused_function is true or not.
7315 2020-03-23 Jeff Law <law@redhat.com>
7317 PR rtl-optimization/90275
7320 * simplify-rtx.c (comparison_code_valid_for_mode): New function.
7321 (simplify_logical_relational_operation): Use it.
7323 2020-03-23 Jakub Jelinek <jakub@redhat.com>
7326 * tree.c (get_narrower): Handle COMPOUND_EXPR by recursing on
7327 ultimate rhs and if returned something different, reconstructing
7330 2020-03-23 Lewis Hyatt <lhyatt@gmail.com>
7332 * opts.c (print_filtered_help): Improve the help text for alias options.
7334 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7335 Andre Vieira <andre.simoesdiasvieira@arm.com>
7336 Mihail Ionescu <mihail.ionescu@arm.com>
7338 * config/arm/arm_mve.h (vshlcq_m_s8): Define macro.
7339 (vshlcq_m_u8): Likewise.
7340 (vshlcq_m_s16): Likewise.
7341 (vshlcq_m_u16): Likewise.
7342 (vshlcq_m_s32): Likewise.
7343 (vshlcq_m_u32): Likewise.
7344 (__arm_vshlcq_m_s8): Define intrinsic.
7345 (__arm_vshlcq_m_u8): Likewise.
7346 (__arm_vshlcq_m_s16): Likewise.
7347 (__arm_vshlcq_m_u16): Likewise.
7348 (__arm_vshlcq_m_s32): Likewise.
7349 (__arm_vshlcq_m_u32): Likewise.
7350 (vshlcq_m): Define polymorphic variant.
7351 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_UNONE_IMM_UNONE):
7352 Use builtin qualifier.
7353 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
7354 * config/arm/mve.md (mve_vshlcq_m_vec_<supf><mode>): Define RTL pattern.
7355 (mve_vshlcq_m_carry_<supf><mode>): Likewise.
7356 (mve_vshlcq_m_<supf><mode>): Likewise.
7358 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7360 * config/arm/arm-builtins.c (LSLL_QUALIFIERS): Define builtin qualifier.
7361 (UQSHL_QUALIFIERS): Likewise.
7362 (ASRL_QUALIFIERS): Likewise.
7363 (SQSHL_QUALIFIERS): Likewise.
7364 * config/arm/arm_mve.h (__ARM_BIG_ENDIAN): Check to not support MVE in
7366 (sqrshr): Define macro.
7367 (sqrshrl): Likewise.
7368 (sqrshrl_sat48): Likewise.
7374 (uqrshll): Likewise.
7375 (uqrshll_sat48): Likewise.
7382 (__arm_lsll): Define intrinsic.
7383 (__arm_asrl): Likewise.
7384 (__arm_uqrshll): Likewise.
7385 (__arm_uqrshll_sat48): Likewise.
7386 (__arm_sqrshrl): Likewise.
7387 (__arm_sqrshrl_sat48): Likewise.
7388 (__arm_uqshll): Likewise.
7389 (__arm_urshrl): Likewise.
7390 (__arm_srshrl): Likewise.
7391 (__arm_sqshll): Likewise.
7392 (__arm_uqrshl): Likewise.
7393 (__arm_sqrshr): Likewise.
7394 (__arm_uqshl): Likewise.
7395 (__arm_urshr): Likewise.
7396 (__arm_sqshl): Likewise.
7397 (__arm_srshr): Likewise.
7398 * config/arm/arm_mve_builtins.def (LSLL_QUALIFIERS): Use builtin
7400 (UQSHL_QUALIFIERS): Likewise.
7401 (ASRL_QUALIFIERS): Likewise.
7402 (SQSHL_QUALIFIERS): Likewise.
7403 * config/arm/mve.md (mve_uqrshll_sat<supf>_di): Define RTL pattern.
7404 (mve_sqrshrl_sat<supf>_di): Likewise.
7405 (mve_uqrshl_si): Likewise.
7406 (mve_sqrshr_si): Likewise.
7407 (mve_uqshll_di): Likewise.
7408 (mve_urshrl_di): Likewise.
7409 (mve_uqshl_si): Likewise.
7410 (mve_urshr_si): Likewise.
7411 (mve_sqshl_si): Likewise.
7412 (mve_srshr_si): Likewise.
7413 (mve_srshrl_di): Likewise.
7414 (mve_sqshll_di): Likewise.
7416 2020-03-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7417 Andre Vieira <andre.simoesdiasvieira@arm.com>
7418 Mihail Ionescu <mihail.ionescu@arm.com>
7420 * config/arm/arm_mve.h (vsetq_lane_f16): Define macro.
7421 (vsetq_lane_f32): Likewise.
7422 (vsetq_lane_s16): Likewise.
7423 (vsetq_lane_s32): Likewise.
7424 (vsetq_lane_s8): Likewise.
7425 (vsetq_lane_s64): Likewise.
7426 (vsetq_lane_u8): Likewise.
7427 (vsetq_lane_u16): Likewise.
7428 (vsetq_lane_u32): Likewise.
7429 (vsetq_lane_u64): Likewise.
7430 (vgetq_lane_f16): Likewise.
7431 (vgetq_lane_f32): Likewise.
7432 (vgetq_lane_s16): Likewise.
7433 (vgetq_lane_s32): Likewise.
7434 (vgetq_lane_s8): Likewise.
7435 (vgetq_lane_s64): Likewise.
7436 (vgetq_lane_u8): Likewise.
7437 (vgetq_lane_u16): Likewise.
7438 (vgetq_lane_u32): Likewise.
7439 (vgetq_lane_u64): Likewise.
7440 (__ARM_NUM_LANES): Likewise.
7441 (__ARM_LANEQ): Likewise.
7442 (__ARM_CHECK_LANEQ): Likewise.
7443 (__arm_vsetq_lane_s16): Define intrinsic.
7444 (__arm_vsetq_lane_s32): Likewise.
7445 (__arm_vsetq_lane_s8): Likewise.
7446 (__arm_vsetq_lane_s64): Likewise.
7447 (__arm_vsetq_lane_u8): Likewise.
7448 (__arm_vsetq_lane_u16): Likewise.
7449 (__arm_vsetq_lane_u32): Likewise.
7450 (__arm_vsetq_lane_u64): Likewise.
7451 (__arm_vgetq_lane_s16): Likewise.
7452 (__arm_vgetq_lane_s32): Likewise.
7453 (__arm_vgetq_lane_s8): Likewise.
7454 (__arm_vgetq_lane_s64): Likewise.
7455 (__arm_vgetq_lane_u8): Likewise.
7456 (__arm_vgetq_lane_u16): Likewise.
7457 (__arm_vgetq_lane_u32): Likewise.
7458 (__arm_vgetq_lane_u64): Likewise.
7459 (__arm_vsetq_lane_f16): Likewise.
7460 (__arm_vsetq_lane_f32): Likewise.
7461 (__arm_vgetq_lane_f16): Likewise.
7462 (__arm_vgetq_lane_f32): Likewise.
7463 (vgetq_lane): Define polymorphic variant.
7464 (vsetq_lane): Likewise.
7465 * config/arm/mve.md (mve_vec_extract<mode><V_elem_l>): Define RTL
7467 (mve_vec_extractv2didi): Likewise.
7468 (mve_vec_extract_sext_internal<mode>): Likewise.
7469 (mve_vec_extract_zext_internal<mode>): Likewise.
7470 (mve_vec_set<mode>_internal): Likewise.
7471 (mve_vec_setv2di_internal): Likewise.
7472 * config/arm/neon.md (vec_set<mode>): Move RTL pattern to vec-common.md
7474 (vec_extract<mode><V_elem_l>): Rename to
7475 "neon_vec_extract<mode><V_elem_l>".
7476 (vec_extractv2didi): Rename to "neon_vec_extractv2didi".
7477 * config/arm/vec-common.md (vec_extract<mode><V_elem_l>): Define RTL
7478 pattern common for MVE and NEON.
7479 (vec_set<mode>): Move RTL pattern from neon.md and modify to accept both
7482 2020-03-23 Andre Vieira <andre.simoesdiasvieira@arm.com>
7484 * config/arm/mve.md (earlyclobber_32): New mode attribute.
7485 (mve_vrev64q_*, mve_vcaddq*, mve_vhcaddq_*, mve_vcmulq_*,
7486 mve_vmull[bt]q_*, mve_vqdmull[bt]q_*): Add appropriate early clobbers.
7488 2020-03-23 Richard Biener <rguenther@suse.de>
7490 PR tree-optimization/94261
7491 * tree-vect-slp.c (vect_get_and_check_slp_defs): Remove
7492 IL operand swapping code.
7493 (vect_slp_rearrange_stmts): Do not arrange isomorphic
7494 nodes that would need operation code adjustments.
7496 2020-03-23 Tobias Burnus <tobias@codesourcery.com>
7498 * doc/install.texi (amdgcn-*-amdhsa): Renamed
7499 from amdgcn-unknown-amdhsa; change
7500 amdgcn-unknown-amdhsa to amdgcn-amdhsa.
7502 2020-03-23 Richard Biener <rguenther@suse.de>
7505 * ipa-prop.c (ipa_read_jump_function): Build the ADDR_EXRP
7506 directly rather than also folding it via build_fold_addr_expr.
7508 2020-03-23 Richard Biener <rguenther@suse.de>
7510 PR tree-optimization/94266
7511 * tree-ssa-forwprop.c (pass_forwprop::execute): Do not propagate
7512 addresses of TARGET_MEM_REFs.
7514 2020-03-23 Martin Liska <mliska@suse.cz>
7517 * symtab.c (symtab_node::clone_references): Save speculative_id
7518 as ref may be overwritten by create_reference.
7519 (symtab_node::clone_referring): Likewise.
7520 (symtab_node::clone_reference): Likewise.
7522 2020-03-22 Iain Sandoe <iain@sandoe.co.uk>
7524 * config/i386/darwin.h (JUMP_TABLES_IN_TEXT_SECTION): Remove
7525 references to Darwin.
7526 * config/i386/i386.h (JUMP_TABLES_IN_TEXT_SECTION): Define this
7527 unconditionally and comment on why.
7529 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
7531 * config/darwin.c (darwin_mergeable_constant_section): Collect
7532 section anchor checks into the caller.
7533 (machopic_select_section): Collect section anchor checks into
7534 the determination of 'effective zero-size' objects. When the
7535 size is unknown, assume it is non-zero, and thus return the
7536 'generic' section for the DECL.
7538 2020-03-21 Iain Sandoe <iain@sandoe.co.uk>
7541 * config/darwin.opt: Amend options descriptions.
7543 2020-03-21 Richard Sandiford <richard.sandiford@arm.com>
7545 PR rtl-optimization/94052
7546 * lra-constraints.c (simplify_operand_subreg): Reload the inner
7547 register of a paradoxical subreg if simplify_subreg_regno fails
7548 to give a valid hard register for the outer mode.
7550 2020-03-20 Martin Jambor <mjambor@suse.cz>
7552 PR tree-optimization/93435
7553 * params.opt (sra-max-propagations): New parameter.
7554 * tree-sra.c (propagation_budget): New variable.
7555 (budget_for_propagation_access): New function.
7556 (propagate_subaccesses_from_rhs): Use it.
7557 (propagate_subaccesses_from_lhs): Likewise.
7558 (propagate_all_subaccesses): Set up and destroy propagation_budget.
7560 2020-03-20 Carl Love <cel@us.ibm.com>
7563 * config/rs6000/rs6000.c (rs6000_option_override_internal):
7564 Add check for TARGET_FPRND for Power 7 or newer.
7566 2020-03-20 Jan Hubicka <hubicka@ucw.cz>
7569 * cgraph.c (symbol_table::create_edge): Update calls_comdat_local flag.
7570 (cgraph_edge::redirect_callee): Move here; likewise.
7571 (cgraph_node::remove_callees): Update calls_comdat_local flag.
7572 (cgraph_node::verify_node): Verify that calls_comdat_local flag match
7574 (cgraph_node::check_calls_comdat_local_p): New member function.
7575 * cgraph.h (cgraph_node::check_calls_comdat_local_p): Declare.
7576 (cgraph_edge::redirect_callee): Move offline.
7577 * ipa-fnsummary.c (compute_fn_summary): Do not compute
7578 calls_comdat_local flag here.
7579 * ipa-inline-transform.c (inline_call): Fix updating of
7580 calls_comdat_local flag.
7581 * ipa-split.c (split_function): Use true instead of 1 to set the flag.
7582 * symtab.c (symtab_node::add_to_same_comdat_group): Update
7583 calls_comdat_local flag.
7585 2020-03-20 Richard Biener <rguenther@suse.de>
7587 * tree-vect-slp.c (vect_analyze_slp_instance): Dump SLP tree
7588 from the possibly modified root.
7590 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7591 Andre Vieira <andre.simoesdiasvieira@arm.com>
7592 Mihail Ionescu <mihail.ionescu@arm.com>
7594 * config/arm/arm_mve.h (vst1q_p_u8): Define macro.
7595 (vst1q_p_s8): Likewise.
7596 (vst2q_s8): Likewise.
7597 (vst2q_u8): Likewise.
7598 (vld1q_z_u8): Likewise.
7599 (vld1q_z_s8): Likewise.
7600 (vld2q_s8): Likewise.
7601 (vld2q_u8): Likewise.
7602 (vld4q_s8): Likewise.
7603 (vld4q_u8): Likewise.
7604 (vst1q_p_u16): Likewise.
7605 (vst1q_p_s16): Likewise.
7606 (vst2q_s16): Likewise.
7607 (vst2q_u16): Likewise.
7608 (vld1q_z_u16): Likewise.
7609 (vld1q_z_s16): Likewise.
7610 (vld2q_s16): Likewise.
7611 (vld2q_u16): Likewise.
7612 (vld4q_s16): Likewise.
7613 (vld4q_u16): Likewise.
7614 (vst1q_p_u32): Likewise.
7615 (vst1q_p_s32): Likewise.
7616 (vst2q_s32): Likewise.
7617 (vst2q_u32): Likewise.
7618 (vld1q_z_u32): Likewise.
7619 (vld1q_z_s32): Likewise.
7620 (vld2q_s32): Likewise.
7621 (vld2q_u32): Likewise.
7622 (vld4q_s32): Likewise.
7623 (vld4q_u32): Likewise.
7624 (vld4q_f16): Likewise.
7625 (vld2q_f16): Likewise.
7626 (vld1q_z_f16): Likewise.
7627 (vst2q_f16): Likewise.
7628 (vst1q_p_f16): Likewise.
7629 (vld4q_f32): Likewise.
7630 (vld2q_f32): Likewise.
7631 (vld1q_z_f32): Likewise.
7632 (vst2q_f32): Likewise.
7633 (vst1q_p_f32): Likewise.
7634 (__arm_vst1q_p_u8): Define intrinsic.
7635 (__arm_vst1q_p_s8): Likewise.
7636 (__arm_vst2q_s8): Likewise.
7637 (__arm_vst2q_u8): Likewise.
7638 (__arm_vld1q_z_u8): Likewise.
7639 (__arm_vld1q_z_s8): Likewise.
7640 (__arm_vld2q_s8): Likewise.
7641 (__arm_vld2q_u8): Likewise.
7642 (__arm_vld4q_s8): Likewise.
7643 (__arm_vld4q_u8): Likewise.
7644 (__arm_vst1q_p_u16): Likewise.
7645 (__arm_vst1q_p_s16): Likewise.
7646 (__arm_vst2q_s16): Likewise.
7647 (__arm_vst2q_u16): Likewise.
7648 (__arm_vld1q_z_u16): Likewise.
7649 (__arm_vld1q_z_s16): Likewise.
7650 (__arm_vld2q_s16): Likewise.
7651 (__arm_vld2q_u16): Likewise.
7652 (__arm_vld4q_s16): Likewise.
7653 (__arm_vld4q_u16): Likewise.
7654 (__arm_vst1q_p_u32): Likewise.
7655 (__arm_vst1q_p_s32): Likewise.
7656 (__arm_vst2q_s32): Likewise.
7657 (__arm_vst2q_u32): Likewise.
7658 (__arm_vld1q_z_u32): Likewise.
7659 (__arm_vld1q_z_s32): Likewise.
7660 (__arm_vld2q_s32): Likewise.
7661 (__arm_vld2q_u32): Likewise.
7662 (__arm_vld4q_s32): Likewise.
7663 (__arm_vld4q_u32): Likewise.
7664 (__arm_vld4q_f16): Likewise.
7665 (__arm_vld2q_f16): Likewise.
7666 (__arm_vld1q_z_f16): Likewise.
7667 (__arm_vst2q_f16): Likewise.
7668 (__arm_vst1q_p_f16): Likewise.
7669 (__arm_vld4q_f32): Likewise.
7670 (__arm_vld2q_f32): Likewise.
7671 (__arm_vld1q_z_f32): Likewise.
7672 (__arm_vst2q_f32): Likewise.
7673 (__arm_vst1q_p_f32): Likewise.
7674 (vld1q_z): Define polymorphic variant.
7677 (vst1q_p): Likewise.
7679 * config/arm/arm_mve_builtins.def (STORE1): Use builtin qualifier.
7681 * config/arm/mve.md (mve_vst2q<mode>): Define RTL pattern.
7682 (mve_vld2q<mode>): Likewise.
7683 (mve_vld4q<mode>): Likewise.
7685 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7686 Andre Vieira <andre.simoesdiasvieira@arm.com>
7687 Mihail Ionescu <mihail.ionescu@arm.com>
7689 * config/arm/arm-builtins.c (ARM_BUILTIN_GET_FPSCR_NZCVQC): Define.
7690 (ARM_BUILTIN_SET_FPSCR_NZCVQC): Likewise.
7691 (arm_init_mve_builtins): Add "__builtin_arm_get_fpscr_nzcvqc" and
7692 "__builtin_arm_set_fpscr_nzcvqc" to arm_builtin_decls array.
7693 (arm_expand_builtin): Define case ARM_BUILTIN_GET_FPSCR_NZCVQC
7694 and ARM_BUILTIN_SET_FPSCR_NZCVQC.
7695 * config/arm/arm_mve.h (vadciq_s32): Define macro.
7696 (vadciq_u32): Likewise.
7697 (vadciq_m_s32): Likewise.
7698 (vadciq_m_u32): Likewise.
7699 (vadcq_s32): Likewise.
7700 (vadcq_u32): Likewise.
7701 (vadcq_m_s32): Likewise.
7702 (vadcq_m_u32): Likewise.
7703 (vsbciq_s32): Likewise.
7704 (vsbciq_u32): Likewise.
7705 (vsbciq_m_s32): Likewise.
7706 (vsbciq_m_u32): Likewise.
7707 (vsbcq_s32): Likewise.
7708 (vsbcq_u32): Likewise.
7709 (vsbcq_m_s32): Likewise.
7710 (vsbcq_m_u32): Likewise.
7711 (__arm_vadciq_s32): Define intrinsic.
7712 (__arm_vadciq_u32): Likewise.
7713 (__arm_vadciq_m_s32): Likewise.
7714 (__arm_vadciq_m_u32): Likewise.
7715 (__arm_vadcq_s32): Likewise.
7716 (__arm_vadcq_u32): Likewise.
7717 (__arm_vadcq_m_s32): Likewise.
7718 (__arm_vadcq_m_u32): Likewise.
7719 (__arm_vsbciq_s32): Likewise.
7720 (__arm_vsbciq_u32): Likewise.
7721 (__arm_vsbciq_m_s32): Likewise.
7722 (__arm_vsbciq_m_u32): Likewise.
7723 (__arm_vsbcq_s32): Likewise.
7724 (__arm_vsbcq_u32): Likewise.
7725 (__arm_vsbcq_m_s32): Likewise.
7726 (__arm_vsbcq_m_u32): Likewise.
7727 (vadciq_m): Define polymorphic variant.
7729 (vadcq_m): Likewise.
7731 (vsbciq_m): Likewise.
7733 (vsbcq_m): Likewise.
7735 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE): Use builtin
7737 (BINOP_UNONE_UNONE_UNONE): Likewise.
7738 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
7739 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
7740 * config/arm/mve.md (VADCIQ): Define iterator.
7741 (VADCIQ_M): Likewise.
7743 (VSBCQ_M): Likewise.
7745 (VSBCIQ_M): Likewise.
7747 (VADCQ_M): Likewise.
7748 (mve_vadciq_m_<supf>v4si): Define RTL pattern.
7749 (mve_vadciq_<supf>v4si): Likewise.
7750 (mve_vadcq_m_<supf>v4si): Likewise.
7751 (mve_vadcq_<supf>v4si): Likewise.
7752 (mve_vsbciq_m_<supf>v4si): Likewise.
7753 (mve_vsbciq_<supf>v4si): Likewise.
7754 (mve_vsbcq_m_<supf>v4si): Likewise.
7755 (mve_vsbcq_<supf>v4si): Likewise.
7756 (get_fpscr_nzcvqc): Define isns.
7757 (set_fpscr_nzcvqc): Define isns.
7758 * config/arm/unspecs.md (UNSPEC_GET_FPSCR_NZCVQC): Define.
7759 (UNSPEC_SET_FPSCR_NZCVQC): Define.
7761 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
7763 * config/arm/arm_mve.h (vddupq_x_n_u8): Define macro.
7764 (vddupq_x_n_u16): Likewise.
7765 (vddupq_x_n_u32): Likewise.
7766 (vddupq_x_wb_u8): Likewise.
7767 (vddupq_x_wb_u16): Likewise.
7768 (vddupq_x_wb_u32): Likewise.
7769 (vdwdupq_x_n_u8): Likewise.
7770 (vdwdupq_x_n_u16): Likewise.
7771 (vdwdupq_x_n_u32): Likewise.
7772 (vdwdupq_x_wb_u8): Likewise.
7773 (vdwdupq_x_wb_u16): Likewise.
7774 (vdwdupq_x_wb_u32): Likewise.
7775 (vidupq_x_n_u8): Likewise.
7776 (vidupq_x_n_u16): Likewise.
7777 (vidupq_x_n_u32): Likewise.
7778 (vidupq_x_wb_u8): Likewise.
7779 (vidupq_x_wb_u16): Likewise.
7780 (vidupq_x_wb_u32): Likewise.
7781 (viwdupq_x_n_u8): Likewise.
7782 (viwdupq_x_n_u16): Likewise.
7783 (viwdupq_x_n_u32): Likewise.
7784 (viwdupq_x_wb_u8): Likewise.
7785 (viwdupq_x_wb_u16): Likewise.
7786 (viwdupq_x_wb_u32): Likewise.
7787 (vdupq_x_n_s8): Likewise.
7788 (vdupq_x_n_s16): Likewise.
7789 (vdupq_x_n_s32): Likewise.
7790 (vdupq_x_n_u8): Likewise.
7791 (vdupq_x_n_u16): Likewise.
7792 (vdupq_x_n_u32): Likewise.
7793 (vminq_x_s8): Likewise.
7794 (vminq_x_s16): Likewise.
7795 (vminq_x_s32): Likewise.
7796 (vminq_x_u8): Likewise.
7797 (vminq_x_u16): Likewise.
7798 (vminq_x_u32): Likewise.
7799 (vmaxq_x_s8): Likewise.
7800 (vmaxq_x_s16): Likewise.
7801 (vmaxq_x_s32): Likewise.
7802 (vmaxq_x_u8): Likewise.
7803 (vmaxq_x_u16): Likewise.
7804 (vmaxq_x_u32): Likewise.
7805 (vabdq_x_s8): Likewise.
7806 (vabdq_x_s16): Likewise.
7807 (vabdq_x_s32): Likewise.
7808 (vabdq_x_u8): Likewise.
7809 (vabdq_x_u16): Likewise.
7810 (vabdq_x_u32): Likewise.
7811 (vabsq_x_s8): Likewise.
7812 (vabsq_x_s16): Likewise.
7813 (vabsq_x_s32): Likewise.
7814 (vaddq_x_s8): Likewise.
7815 (vaddq_x_s16): Likewise.
7816 (vaddq_x_s32): Likewise.
7817 (vaddq_x_n_s8): Likewise.
7818 (vaddq_x_n_s16): Likewise.
7819 (vaddq_x_n_s32): Likewise.
7820 (vaddq_x_u8): Likewise.
7821 (vaddq_x_u16): Likewise.
7822 (vaddq_x_u32): Likewise.
7823 (vaddq_x_n_u8): Likewise.
7824 (vaddq_x_n_u16): Likewise.
7825 (vaddq_x_n_u32): Likewise.
7826 (vclsq_x_s8): Likewise.
7827 (vclsq_x_s16): Likewise.
7828 (vclsq_x_s32): Likewise.
7829 (vclzq_x_s8): Likewise.
7830 (vclzq_x_s16): Likewise.
7831 (vclzq_x_s32): Likewise.
7832 (vclzq_x_u8): Likewise.
7833 (vclzq_x_u16): Likewise.
7834 (vclzq_x_u32): Likewise.
7835 (vnegq_x_s8): Likewise.
7836 (vnegq_x_s16): Likewise.
7837 (vnegq_x_s32): Likewise.
7838 (vmulhq_x_s8): Likewise.
7839 (vmulhq_x_s16): Likewise.
7840 (vmulhq_x_s32): Likewise.
7841 (vmulhq_x_u8): Likewise.
7842 (vmulhq_x_u16): Likewise.
7843 (vmulhq_x_u32): Likewise.
7844 (vmullbq_poly_x_p8): Likewise.
7845 (vmullbq_poly_x_p16): Likewise.
7846 (vmullbq_int_x_s8): Likewise.
7847 (vmullbq_int_x_s16): Likewise.
7848 (vmullbq_int_x_s32): Likewise.
7849 (vmullbq_int_x_u8): Likewise.
7850 (vmullbq_int_x_u16): Likewise.
7851 (vmullbq_int_x_u32): Likewise.
7852 (vmulltq_poly_x_p8): Likewise.
7853 (vmulltq_poly_x_p16): Likewise.
7854 (vmulltq_int_x_s8): Likewise.
7855 (vmulltq_int_x_s16): Likewise.
7856 (vmulltq_int_x_s32): Likewise.
7857 (vmulltq_int_x_u8): Likewise.
7858 (vmulltq_int_x_u16): Likewise.
7859 (vmulltq_int_x_u32): Likewise.
7860 (vmulq_x_s8): Likewise.
7861 (vmulq_x_s16): Likewise.
7862 (vmulq_x_s32): Likewise.
7863 (vmulq_x_n_s8): Likewise.
7864 (vmulq_x_n_s16): Likewise.
7865 (vmulq_x_n_s32): Likewise.
7866 (vmulq_x_u8): Likewise.
7867 (vmulq_x_u16): Likewise.
7868 (vmulq_x_u32): Likewise.
7869 (vmulq_x_n_u8): Likewise.
7870 (vmulq_x_n_u16): Likewise.
7871 (vmulq_x_n_u32): Likewise.
7872 (vsubq_x_s8): Likewise.
7873 (vsubq_x_s16): Likewise.
7874 (vsubq_x_s32): Likewise.
7875 (vsubq_x_n_s8): Likewise.
7876 (vsubq_x_n_s16): Likewise.
7877 (vsubq_x_n_s32): Likewise.
7878 (vsubq_x_u8): Likewise.
7879 (vsubq_x_u16): Likewise.
7880 (vsubq_x_u32): Likewise.
7881 (vsubq_x_n_u8): Likewise.
7882 (vsubq_x_n_u16): Likewise.
7883 (vsubq_x_n_u32): Likewise.
7884 (vcaddq_rot90_x_s8): Likewise.
7885 (vcaddq_rot90_x_s16): Likewise.
7886 (vcaddq_rot90_x_s32): Likewise.
7887 (vcaddq_rot90_x_u8): Likewise.
7888 (vcaddq_rot90_x_u16): Likewise.
7889 (vcaddq_rot90_x_u32): Likewise.
7890 (vcaddq_rot270_x_s8): Likewise.
7891 (vcaddq_rot270_x_s16): Likewise.
7892 (vcaddq_rot270_x_s32): Likewise.
7893 (vcaddq_rot270_x_u8): Likewise.
7894 (vcaddq_rot270_x_u16): Likewise.
7895 (vcaddq_rot270_x_u32): Likewise.
7896 (vhaddq_x_n_s8): Likewise.
7897 (vhaddq_x_n_s16): Likewise.
7898 (vhaddq_x_n_s32): Likewise.
7899 (vhaddq_x_n_u8): Likewise.
7900 (vhaddq_x_n_u16): Likewise.
7901 (vhaddq_x_n_u32): Likewise.
7902 (vhaddq_x_s8): Likewise.
7903 (vhaddq_x_s16): Likewise.
7904 (vhaddq_x_s32): Likewise.
7905 (vhaddq_x_u8): Likewise.
7906 (vhaddq_x_u16): Likewise.
7907 (vhaddq_x_u32): Likewise.
7908 (vhcaddq_rot90_x_s8): Likewise.
7909 (vhcaddq_rot90_x_s16): Likewise.
7910 (vhcaddq_rot90_x_s32): Likewise.
7911 (vhcaddq_rot270_x_s8): Likewise.
7912 (vhcaddq_rot270_x_s16): Likewise.
7913 (vhcaddq_rot270_x_s32): Likewise.
7914 (vhsubq_x_n_s8): Likewise.
7915 (vhsubq_x_n_s16): Likewise.
7916 (vhsubq_x_n_s32): Likewise.
7917 (vhsubq_x_n_u8): Likewise.
7918 (vhsubq_x_n_u16): Likewise.
7919 (vhsubq_x_n_u32): Likewise.
7920 (vhsubq_x_s8): Likewise.
7921 (vhsubq_x_s16): Likewise.
7922 (vhsubq_x_s32): Likewise.
7923 (vhsubq_x_u8): Likewise.
7924 (vhsubq_x_u16): Likewise.
7925 (vhsubq_x_u32): Likewise.
7926 (vrhaddq_x_s8): Likewise.
7927 (vrhaddq_x_s16): Likewise.
7928 (vrhaddq_x_s32): Likewise.
7929 (vrhaddq_x_u8): Likewise.
7930 (vrhaddq_x_u16): Likewise.
7931 (vrhaddq_x_u32): Likewise.
7932 (vrmulhq_x_s8): Likewise.
7933 (vrmulhq_x_s16): Likewise.
7934 (vrmulhq_x_s32): Likewise.
7935 (vrmulhq_x_u8): Likewise.
7936 (vrmulhq_x_u16): Likewise.
7937 (vrmulhq_x_u32): Likewise.
7938 (vandq_x_s8): Likewise.
7939 (vandq_x_s16): Likewise.
7940 (vandq_x_s32): Likewise.
7941 (vandq_x_u8): Likewise.
7942 (vandq_x_u16): Likewise.
7943 (vandq_x_u32): Likewise.
7944 (vbicq_x_s8): Likewise.
7945 (vbicq_x_s16): Likewise.
7946 (vbicq_x_s32): Likewise.
7947 (vbicq_x_u8): Likewise.
7948 (vbicq_x_u16): Likewise.
7949 (vbicq_x_u32): Likewise.
7950 (vbrsrq_x_n_s8): Likewise.
7951 (vbrsrq_x_n_s16): Likewise.
7952 (vbrsrq_x_n_s32): Likewise.
7953 (vbrsrq_x_n_u8): Likewise.
7954 (vbrsrq_x_n_u16): Likewise.
7955 (vbrsrq_x_n_u32): Likewise.
7956 (veorq_x_s8): Likewise.
7957 (veorq_x_s16): Likewise.
7958 (veorq_x_s32): Likewise.
7959 (veorq_x_u8): Likewise.
7960 (veorq_x_u16): Likewise.
7961 (veorq_x_u32): Likewise.
7962 (vmovlbq_x_s8): Likewise.
7963 (vmovlbq_x_s16): Likewise.
7964 (vmovlbq_x_u8): Likewise.
7965 (vmovlbq_x_u16): Likewise.
7966 (vmovltq_x_s8): Likewise.
7967 (vmovltq_x_s16): Likewise.
7968 (vmovltq_x_u8): Likewise.
7969 (vmovltq_x_u16): Likewise.
7970 (vmvnq_x_s8): Likewise.
7971 (vmvnq_x_s16): Likewise.
7972 (vmvnq_x_s32): Likewise.
7973 (vmvnq_x_u8): Likewise.
7974 (vmvnq_x_u16): Likewise.
7975 (vmvnq_x_u32): Likewise.
7976 (vmvnq_x_n_s16): Likewise.
7977 (vmvnq_x_n_s32): Likewise.
7978 (vmvnq_x_n_u16): Likewise.
7979 (vmvnq_x_n_u32): Likewise.
7980 (vornq_x_s8): Likewise.
7981 (vornq_x_s16): Likewise.
7982 (vornq_x_s32): Likewise.
7983 (vornq_x_u8): Likewise.
7984 (vornq_x_u16): Likewise.
7985 (vornq_x_u32): Likewise.
7986 (vorrq_x_s8): Likewise.
7987 (vorrq_x_s16): Likewise.
7988 (vorrq_x_s32): Likewise.
7989 (vorrq_x_u8): Likewise.
7990 (vorrq_x_u16): Likewise.
7991 (vorrq_x_u32): Likewise.
7992 (vrev16q_x_s8): Likewise.
7993 (vrev16q_x_u8): Likewise.
7994 (vrev32q_x_s8): Likewise.
7995 (vrev32q_x_s16): Likewise.
7996 (vrev32q_x_u8): Likewise.
7997 (vrev32q_x_u16): Likewise.
7998 (vrev64q_x_s8): Likewise.
7999 (vrev64q_x_s16): Likewise.
8000 (vrev64q_x_s32): Likewise.
8001 (vrev64q_x_u8): Likewise.
8002 (vrev64q_x_u16): Likewise.
8003 (vrev64q_x_u32): Likewise.
8004 (vrshlq_x_s8): Likewise.
8005 (vrshlq_x_s16): Likewise.
8006 (vrshlq_x_s32): Likewise.
8007 (vrshlq_x_u8): Likewise.
8008 (vrshlq_x_u16): Likewise.
8009 (vrshlq_x_u32): Likewise.
8010 (vshllbq_x_n_s8): Likewise.
8011 (vshllbq_x_n_s16): Likewise.
8012 (vshllbq_x_n_u8): Likewise.
8013 (vshllbq_x_n_u16): Likewise.
8014 (vshlltq_x_n_s8): Likewise.
8015 (vshlltq_x_n_s16): Likewise.
8016 (vshlltq_x_n_u8): Likewise.
8017 (vshlltq_x_n_u16): Likewise.
8018 (vshlq_x_s8): Likewise.
8019 (vshlq_x_s16): Likewise.
8020 (vshlq_x_s32): Likewise.
8021 (vshlq_x_u8): Likewise.
8022 (vshlq_x_u16): Likewise.
8023 (vshlq_x_u32): Likewise.
8024 (vshlq_x_n_s8): Likewise.
8025 (vshlq_x_n_s16): Likewise.
8026 (vshlq_x_n_s32): Likewise.
8027 (vshlq_x_n_u8): Likewise.
8028 (vshlq_x_n_u16): Likewise.
8029 (vshlq_x_n_u32): Likewise.
8030 (vrshrq_x_n_s8): Likewise.
8031 (vrshrq_x_n_s16): Likewise.
8032 (vrshrq_x_n_s32): Likewise.
8033 (vrshrq_x_n_u8): Likewise.
8034 (vrshrq_x_n_u16): Likewise.
8035 (vrshrq_x_n_u32): Likewise.
8036 (vshrq_x_n_s8): Likewise.
8037 (vshrq_x_n_s16): Likewise.
8038 (vshrq_x_n_s32): Likewise.
8039 (vshrq_x_n_u8): Likewise.
8040 (vshrq_x_n_u16): Likewise.
8041 (vshrq_x_n_u32): Likewise.
8042 (vdupq_x_n_f16): Likewise.
8043 (vdupq_x_n_f32): Likewise.
8044 (vminnmq_x_f16): Likewise.
8045 (vminnmq_x_f32): Likewise.
8046 (vmaxnmq_x_f16): Likewise.
8047 (vmaxnmq_x_f32): Likewise.
8048 (vabdq_x_f16): Likewise.
8049 (vabdq_x_f32): Likewise.
8050 (vabsq_x_f16): Likewise.
8051 (vabsq_x_f32): Likewise.
8052 (vaddq_x_f16): Likewise.
8053 (vaddq_x_f32): Likewise.
8054 (vaddq_x_n_f16): Likewise.
8055 (vaddq_x_n_f32): Likewise.
8056 (vnegq_x_f16): Likewise.
8057 (vnegq_x_f32): Likewise.
8058 (vmulq_x_f16): Likewise.
8059 (vmulq_x_f32): Likewise.
8060 (vmulq_x_n_f16): Likewise.
8061 (vmulq_x_n_f32): Likewise.
8062 (vsubq_x_f16): Likewise.
8063 (vsubq_x_f32): Likewise.
8064 (vsubq_x_n_f16): Likewise.
8065 (vsubq_x_n_f32): Likewise.
8066 (vcaddq_rot90_x_f16): Likewise.
8067 (vcaddq_rot90_x_f32): Likewise.
8068 (vcaddq_rot270_x_f16): Likewise.
8069 (vcaddq_rot270_x_f32): Likewise.
8070 (vcmulq_x_f16): Likewise.
8071 (vcmulq_x_f32): Likewise.
8072 (vcmulq_rot90_x_f16): Likewise.
8073 (vcmulq_rot90_x_f32): Likewise.
8074 (vcmulq_rot180_x_f16): Likewise.
8075 (vcmulq_rot180_x_f32): Likewise.
8076 (vcmulq_rot270_x_f16): Likewise.
8077 (vcmulq_rot270_x_f32): Likewise.
8078 (vcvtaq_x_s16_f16): Likewise.
8079 (vcvtaq_x_s32_f32): Likewise.
8080 (vcvtaq_x_u16_f16): Likewise.
8081 (vcvtaq_x_u32_f32): Likewise.
8082 (vcvtnq_x_s16_f16): Likewise.
8083 (vcvtnq_x_s32_f32): Likewise.
8084 (vcvtnq_x_u16_f16): Likewise.
8085 (vcvtnq_x_u32_f32): Likewise.
8086 (vcvtpq_x_s16_f16): Likewise.
8087 (vcvtpq_x_s32_f32): Likewise.
8088 (vcvtpq_x_u16_f16): Likewise.
8089 (vcvtpq_x_u32_f32): Likewise.
8090 (vcvtmq_x_s16_f16): Likewise.
8091 (vcvtmq_x_s32_f32): Likewise.
8092 (vcvtmq_x_u16_f16): Likewise.
8093 (vcvtmq_x_u32_f32): Likewise.
8094 (vcvtbq_x_f32_f16): Likewise.
8095 (vcvttq_x_f32_f16): Likewise.
8096 (vcvtq_x_f16_u16): Likewise.
8097 (vcvtq_x_f16_s16): Likewise.
8098 (vcvtq_x_f32_s32): Likewise.
8099 (vcvtq_x_f32_u32): Likewise.
8100 (vcvtq_x_n_f16_s16): Likewise.
8101 (vcvtq_x_n_f16_u16): Likewise.
8102 (vcvtq_x_n_f32_s32): Likewise.
8103 (vcvtq_x_n_f32_u32): Likewise.
8104 (vcvtq_x_s16_f16): Likewise.
8105 (vcvtq_x_s32_f32): Likewise.
8106 (vcvtq_x_u16_f16): Likewise.
8107 (vcvtq_x_u32_f32): Likewise.
8108 (vcvtq_x_n_s16_f16): Likewise.
8109 (vcvtq_x_n_s32_f32): Likewise.
8110 (vcvtq_x_n_u16_f16): Likewise.
8111 (vcvtq_x_n_u32_f32): Likewise.
8112 (vrndq_x_f16): Likewise.
8113 (vrndq_x_f32): Likewise.
8114 (vrndnq_x_f16): Likewise.
8115 (vrndnq_x_f32): Likewise.
8116 (vrndmq_x_f16): Likewise.
8117 (vrndmq_x_f32): Likewise.
8118 (vrndpq_x_f16): Likewise.
8119 (vrndpq_x_f32): Likewise.
8120 (vrndaq_x_f16): Likewise.
8121 (vrndaq_x_f32): Likewise.
8122 (vrndxq_x_f16): Likewise.
8123 (vrndxq_x_f32): Likewise.
8124 (vandq_x_f16): Likewise.
8125 (vandq_x_f32): Likewise.
8126 (vbicq_x_f16): Likewise.
8127 (vbicq_x_f32): Likewise.
8128 (vbrsrq_x_n_f16): Likewise.
8129 (vbrsrq_x_n_f32): Likewise.
8130 (veorq_x_f16): Likewise.
8131 (veorq_x_f32): Likewise.
8132 (vornq_x_f16): Likewise.
8133 (vornq_x_f32): Likewise.
8134 (vorrq_x_f16): Likewise.
8135 (vorrq_x_f32): Likewise.
8136 (vrev32q_x_f16): Likewise.
8137 (vrev64q_x_f16): Likewise.
8138 (vrev64q_x_f32): Likewise.
8139 (__arm_vddupq_x_n_u8): Define intrinsic.
8140 (__arm_vddupq_x_n_u16): Likewise.
8141 (__arm_vddupq_x_n_u32): Likewise.
8142 (__arm_vddupq_x_wb_u8): Likewise.
8143 (__arm_vddupq_x_wb_u16): Likewise.
8144 (__arm_vddupq_x_wb_u32): Likewise.
8145 (__arm_vdwdupq_x_n_u8): Likewise.
8146 (__arm_vdwdupq_x_n_u16): Likewise.
8147 (__arm_vdwdupq_x_n_u32): Likewise.
8148 (__arm_vdwdupq_x_wb_u8): Likewise.
8149 (__arm_vdwdupq_x_wb_u16): Likewise.
8150 (__arm_vdwdupq_x_wb_u32): Likewise.
8151 (__arm_vidupq_x_n_u8): Likewise.
8152 (__arm_vidupq_x_n_u16): Likewise.
8153 (__arm_vidupq_x_n_u32): Likewise.
8154 (__arm_vidupq_x_wb_u8): Likewise.
8155 (__arm_vidupq_x_wb_u16): Likewise.
8156 (__arm_vidupq_x_wb_u32): Likewise.
8157 (__arm_viwdupq_x_n_u8): Likewise.
8158 (__arm_viwdupq_x_n_u16): Likewise.
8159 (__arm_viwdupq_x_n_u32): Likewise.
8160 (__arm_viwdupq_x_wb_u8): Likewise.
8161 (__arm_viwdupq_x_wb_u16): Likewise.
8162 (__arm_viwdupq_x_wb_u32): Likewise.
8163 (__arm_vdupq_x_n_s8): Likewise.
8164 (__arm_vdupq_x_n_s16): Likewise.
8165 (__arm_vdupq_x_n_s32): Likewise.
8166 (__arm_vdupq_x_n_u8): Likewise.
8167 (__arm_vdupq_x_n_u16): Likewise.
8168 (__arm_vdupq_x_n_u32): Likewise.
8169 (__arm_vminq_x_s8): Likewise.
8170 (__arm_vminq_x_s16): Likewise.
8171 (__arm_vminq_x_s32): Likewise.
8172 (__arm_vminq_x_u8): Likewise.
8173 (__arm_vminq_x_u16): Likewise.
8174 (__arm_vminq_x_u32): Likewise.
8175 (__arm_vmaxq_x_s8): Likewise.
8176 (__arm_vmaxq_x_s16): Likewise.
8177 (__arm_vmaxq_x_s32): Likewise.
8178 (__arm_vmaxq_x_u8): Likewise.
8179 (__arm_vmaxq_x_u16): Likewise.
8180 (__arm_vmaxq_x_u32): Likewise.
8181 (__arm_vabdq_x_s8): Likewise.
8182 (__arm_vabdq_x_s16): Likewise.
8183 (__arm_vabdq_x_s32): Likewise.
8184 (__arm_vabdq_x_u8): Likewise.
8185 (__arm_vabdq_x_u16): Likewise.
8186 (__arm_vabdq_x_u32): Likewise.
8187 (__arm_vabsq_x_s8): Likewise.
8188 (__arm_vabsq_x_s16): Likewise.
8189 (__arm_vabsq_x_s32): Likewise.
8190 (__arm_vaddq_x_s8): Likewise.
8191 (__arm_vaddq_x_s16): Likewise.
8192 (__arm_vaddq_x_s32): Likewise.
8193 (__arm_vaddq_x_n_s8): Likewise.
8194 (__arm_vaddq_x_n_s16): Likewise.
8195 (__arm_vaddq_x_n_s32): Likewise.
8196 (__arm_vaddq_x_u8): Likewise.
8197 (__arm_vaddq_x_u16): Likewise.
8198 (__arm_vaddq_x_u32): Likewise.
8199 (__arm_vaddq_x_n_u8): Likewise.
8200 (__arm_vaddq_x_n_u16): Likewise.
8201 (__arm_vaddq_x_n_u32): Likewise.
8202 (__arm_vclsq_x_s8): Likewise.
8203 (__arm_vclsq_x_s16): Likewise.
8204 (__arm_vclsq_x_s32): Likewise.
8205 (__arm_vclzq_x_s8): Likewise.
8206 (__arm_vclzq_x_s16): Likewise.
8207 (__arm_vclzq_x_s32): Likewise.
8208 (__arm_vclzq_x_u8): Likewise.
8209 (__arm_vclzq_x_u16): Likewise.
8210 (__arm_vclzq_x_u32): Likewise.
8211 (__arm_vnegq_x_s8): Likewise.
8212 (__arm_vnegq_x_s16): Likewise.
8213 (__arm_vnegq_x_s32): Likewise.
8214 (__arm_vmulhq_x_s8): Likewise.
8215 (__arm_vmulhq_x_s16): Likewise.
8216 (__arm_vmulhq_x_s32): Likewise.
8217 (__arm_vmulhq_x_u8): Likewise.
8218 (__arm_vmulhq_x_u16): Likewise.
8219 (__arm_vmulhq_x_u32): Likewise.
8220 (__arm_vmullbq_poly_x_p8): Likewise.
8221 (__arm_vmullbq_poly_x_p16): Likewise.
8222 (__arm_vmullbq_int_x_s8): Likewise.
8223 (__arm_vmullbq_int_x_s16): Likewise.
8224 (__arm_vmullbq_int_x_s32): Likewise.
8225 (__arm_vmullbq_int_x_u8): Likewise.
8226 (__arm_vmullbq_int_x_u16): Likewise.
8227 (__arm_vmullbq_int_x_u32): Likewise.
8228 (__arm_vmulltq_poly_x_p8): Likewise.
8229 (__arm_vmulltq_poly_x_p16): Likewise.
8230 (__arm_vmulltq_int_x_s8): Likewise.
8231 (__arm_vmulltq_int_x_s16): Likewise.
8232 (__arm_vmulltq_int_x_s32): Likewise.
8233 (__arm_vmulltq_int_x_u8): Likewise.
8234 (__arm_vmulltq_int_x_u16): Likewise.
8235 (__arm_vmulltq_int_x_u32): Likewise.
8236 (__arm_vmulq_x_s8): Likewise.
8237 (__arm_vmulq_x_s16): Likewise.
8238 (__arm_vmulq_x_s32): Likewise.
8239 (__arm_vmulq_x_n_s8): Likewise.
8240 (__arm_vmulq_x_n_s16): Likewise.
8241 (__arm_vmulq_x_n_s32): Likewise.
8242 (__arm_vmulq_x_u8): Likewise.
8243 (__arm_vmulq_x_u16): Likewise.
8244 (__arm_vmulq_x_u32): Likewise.
8245 (__arm_vmulq_x_n_u8): Likewise.
8246 (__arm_vmulq_x_n_u16): Likewise.
8247 (__arm_vmulq_x_n_u32): Likewise.
8248 (__arm_vsubq_x_s8): Likewise.
8249 (__arm_vsubq_x_s16): Likewise.
8250 (__arm_vsubq_x_s32): Likewise.
8251 (__arm_vsubq_x_n_s8): Likewise.
8252 (__arm_vsubq_x_n_s16): Likewise.
8253 (__arm_vsubq_x_n_s32): Likewise.
8254 (__arm_vsubq_x_u8): Likewise.
8255 (__arm_vsubq_x_u16): Likewise.
8256 (__arm_vsubq_x_u32): Likewise.
8257 (__arm_vsubq_x_n_u8): Likewise.
8258 (__arm_vsubq_x_n_u16): Likewise.
8259 (__arm_vsubq_x_n_u32): Likewise.
8260 (__arm_vcaddq_rot90_x_s8): Likewise.
8261 (__arm_vcaddq_rot90_x_s16): Likewise.
8262 (__arm_vcaddq_rot90_x_s32): Likewise.
8263 (__arm_vcaddq_rot90_x_u8): Likewise.
8264 (__arm_vcaddq_rot90_x_u16): Likewise.
8265 (__arm_vcaddq_rot90_x_u32): Likewise.
8266 (__arm_vcaddq_rot270_x_s8): Likewise.
8267 (__arm_vcaddq_rot270_x_s16): Likewise.
8268 (__arm_vcaddq_rot270_x_s32): Likewise.
8269 (__arm_vcaddq_rot270_x_u8): Likewise.
8270 (__arm_vcaddq_rot270_x_u16): Likewise.
8271 (__arm_vcaddq_rot270_x_u32): Likewise.
8272 (__arm_vhaddq_x_n_s8): Likewise.
8273 (__arm_vhaddq_x_n_s16): Likewise.
8274 (__arm_vhaddq_x_n_s32): Likewise.
8275 (__arm_vhaddq_x_n_u8): Likewise.
8276 (__arm_vhaddq_x_n_u16): Likewise.
8277 (__arm_vhaddq_x_n_u32): Likewise.
8278 (__arm_vhaddq_x_s8): Likewise.
8279 (__arm_vhaddq_x_s16): Likewise.
8280 (__arm_vhaddq_x_s32): Likewise.
8281 (__arm_vhaddq_x_u8): Likewise.
8282 (__arm_vhaddq_x_u16): Likewise.
8283 (__arm_vhaddq_x_u32): Likewise.
8284 (__arm_vhcaddq_rot90_x_s8): Likewise.
8285 (__arm_vhcaddq_rot90_x_s16): Likewise.
8286 (__arm_vhcaddq_rot90_x_s32): Likewise.
8287 (__arm_vhcaddq_rot270_x_s8): Likewise.
8288 (__arm_vhcaddq_rot270_x_s16): Likewise.
8289 (__arm_vhcaddq_rot270_x_s32): Likewise.
8290 (__arm_vhsubq_x_n_s8): Likewise.
8291 (__arm_vhsubq_x_n_s16): Likewise.
8292 (__arm_vhsubq_x_n_s32): Likewise.
8293 (__arm_vhsubq_x_n_u8): Likewise.
8294 (__arm_vhsubq_x_n_u16): Likewise.
8295 (__arm_vhsubq_x_n_u32): Likewise.
8296 (__arm_vhsubq_x_s8): Likewise.
8297 (__arm_vhsubq_x_s16): Likewise.
8298 (__arm_vhsubq_x_s32): Likewise.
8299 (__arm_vhsubq_x_u8): Likewise.
8300 (__arm_vhsubq_x_u16): Likewise.
8301 (__arm_vhsubq_x_u32): Likewise.
8302 (__arm_vrhaddq_x_s8): Likewise.
8303 (__arm_vrhaddq_x_s16): Likewise.
8304 (__arm_vrhaddq_x_s32): Likewise.
8305 (__arm_vrhaddq_x_u8): Likewise.
8306 (__arm_vrhaddq_x_u16): Likewise.
8307 (__arm_vrhaddq_x_u32): Likewise.
8308 (__arm_vrmulhq_x_s8): Likewise.
8309 (__arm_vrmulhq_x_s16): Likewise.
8310 (__arm_vrmulhq_x_s32): Likewise.
8311 (__arm_vrmulhq_x_u8): Likewise.
8312 (__arm_vrmulhq_x_u16): Likewise.
8313 (__arm_vrmulhq_x_u32): Likewise.
8314 (__arm_vandq_x_s8): Likewise.
8315 (__arm_vandq_x_s16): Likewise.
8316 (__arm_vandq_x_s32): Likewise.
8317 (__arm_vandq_x_u8): Likewise.
8318 (__arm_vandq_x_u16): Likewise.
8319 (__arm_vandq_x_u32): Likewise.
8320 (__arm_vbicq_x_s8): Likewise.
8321 (__arm_vbicq_x_s16): Likewise.
8322 (__arm_vbicq_x_s32): Likewise.
8323 (__arm_vbicq_x_u8): Likewise.
8324 (__arm_vbicq_x_u16): Likewise.
8325 (__arm_vbicq_x_u32): Likewise.
8326 (__arm_vbrsrq_x_n_s8): Likewise.
8327 (__arm_vbrsrq_x_n_s16): Likewise.
8328 (__arm_vbrsrq_x_n_s32): Likewise.
8329 (__arm_vbrsrq_x_n_u8): Likewise.
8330 (__arm_vbrsrq_x_n_u16): Likewise.
8331 (__arm_vbrsrq_x_n_u32): Likewise.
8332 (__arm_veorq_x_s8): Likewise.
8333 (__arm_veorq_x_s16): Likewise.
8334 (__arm_veorq_x_s32): Likewise.
8335 (__arm_veorq_x_u8): Likewise.
8336 (__arm_veorq_x_u16): Likewise.
8337 (__arm_veorq_x_u32): Likewise.
8338 (__arm_vmovlbq_x_s8): Likewise.
8339 (__arm_vmovlbq_x_s16): Likewise.
8340 (__arm_vmovlbq_x_u8): Likewise.
8341 (__arm_vmovlbq_x_u16): Likewise.
8342 (__arm_vmovltq_x_s8): Likewise.
8343 (__arm_vmovltq_x_s16): Likewise.
8344 (__arm_vmovltq_x_u8): Likewise.
8345 (__arm_vmovltq_x_u16): Likewise.
8346 (__arm_vmvnq_x_s8): Likewise.
8347 (__arm_vmvnq_x_s16): Likewise.
8348 (__arm_vmvnq_x_s32): Likewise.
8349 (__arm_vmvnq_x_u8): Likewise.
8350 (__arm_vmvnq_x_u16): Likewise.
8351 (__arm_vmvnq_x_u32): Likewise.
8352 (__arm_vmvnq_x_n_s16): Likewise.
8353 (__arm_vmvnq_x_n_s32): Likewise.
8354 (__arm_vmvnq_x_n_u16): Likewise.
8355 (__arm_vmvnq_x_n_u32): Likewise.
8356 (__arm_vornq_x_s8): Likewise.
8357 (__arm_vornq_x_s16): Likewise.
8358 (__arm_vornq_x_s32): Likewise.
8359 (__arm_vornq_x_u8): Likewise.
8360 (__arm_vornq_x_u16): Likewise.
8361 (__arm_vornq_x_u32): Likewise.
8362 (__arm_vorrq_x_s8): Likewise.
8363 (__arm_vorrq_x_s16): Likewise.
8364 (__arm_vorrq_x_s32): Likewise.
8365 (__arm_vorrq_x_u8): Likewise.
8366 (__arm_vorrq_x_u16): Likewise.
8367 (__arm_vorrq_x_u32): Likewise.
8368 (__arm_vrev16q_x_s8): Likewise.
8369 (__arm_vrev16q_x_u8): Likewise.
8370 (__arm_vrev32q_x_s8): Likewise.
8371 (__arm_vrev32q_x_s16): Likewise.
8372 (__arm_vrev32q_x_u8): Likewise.
8373 (__arm_vrev32q_x_u16): Likewise.
8374 (__arm_vrev64q_x_s8): Likewise.
8375 (__arm_vrev64q_x_s16): Likewise.
8376 (__arm_vrev64q_x_s32): Likewise.
8377 (__arm_vrev64q_x_u8): Likewise.
8378 (__arm_vrev64q_x_u16): Likewise.
8379 (__arm_vrev64q_x_u32): Likewise.
8380 (__arm_vrshlq_x_s8): Likewise.
8381 (__arm_vrshlq_x_s16): Likewise.
8382 (__arm_vrshlq_x_s32): Likewise.
8383 (__arm_vrshlq_x_u8): Likewise.
8384 (__arm_vrshlq_x_u16): Likewise.
8385 (__arm_vrshlq_x_u32): Likewise.
8386 (__arm_vshllbq_x_n_s8): Likewise.
8387 (__arm_vshllbq_x_n_s16): Likewise.
8388 (__arm_vshllbq_x_n_u8): Likewise.
8389 (__arm_vshllbq_x_n_u16): Likewise.
8390 (__arm_vshlltq_x_n_s8): Likewise.
8391 (__arm_vshlltq_x_n_s16): Likewise.
8392 (__arm_vshlltq_x_n_u8): Likewise.
8393 (__arm_vshlltq_x_n_u16): Likewise.
8394 (__arm_vshlq_x_s8): Likewise.
8395 (__arm_vshlq_x_s16): Likewise.
8396 (__arm_vshlq_x_s32): Likewise.
8397 (__arm_vshlq_x_u8): Likewise.
8398 (__arm_vshlq_x_u16): Likewise.
8399 (__arm_vshlq_x_u32): Likewise.
8400 (__arm_vshlq_x_n_s8): Likewise.
8401 (__arm_vshlq_x_n_s16): Likewise.
8402 (__arm_vshlq_x_n_s32): Likewise.
8403 (__arm_vshlq_x_n_u8): Likewise.
8404 (__arm_vshlq_x_n_u16): Likewise.
8405 (__arm_vshlq_x_n_u32): Likewise.
8406 (__arm_vrshrq_x_n_s8): Likewise.
8407 (__arm_vrshrq_x_n_s16): Likewise.
8408 (__arm_vrshrq_x_n_s32): Likewise.
8409 (__arm_vrshrq_x_n_u8): Likewise.
8410 (__arm_vrshrq_x_n_u16): Likewise.
8411 (__arm_vrshrq_x_n_u32): Likewise.
8412 (__arm_vshrq_x_n_s8): Likewise.
8413 (__arm_vshrq_x_n_s16): Likewise.
8414 (__arm_vshrq_x_n_s32): Likewise.
8415 (__arm_vshrq_x_n_u8): Likewise.
8416 (__arm_vshrq_x_n_u16): Likewise.
8417 (__arm_vshrq_x_n_u32): Likewise.
8418 (__arm_vdupq_x_n_f16): Likewise.
8419 (__arm_vdupq_x_n_f32): Likewise.
8420 (__arm_vminnmq_x_f16): Likewise.
8421 (__arm_vminnmq_x_f32): Likewise.
8422 (__arm_vmaxnmq_x_f16): Likewise.
8423 (__arm_vmaxnmq_x_f32): Likewise.
8424 (__arm_vabdq_x_f16): Likewise.
8425 (__arm_vabdq_x_f32): Likewise.
8426 (__arm_vabsq_x_f16): Likewise.
8427 (__arm_vabsq_x_f32): Likewise.
8428 (__arm_vaddq_x_f16): Likewise.
8429 (__arm_vaddq_x_f32): Likewise.
8430 (__arm_vaddq_x_n_f16): Likewise.
8431 (__arm_vaddq_x_n_f32): Likewise.
8432 (__arm_vnegq_x_f16): Likewise.
8433 (__arm_vnegq_x_f32): Likewise.
8434 (__arm_vmulq_x_f16): Likewise.
8435 (__arm_vmulq_x_f32): Likewise.
8436 (__arm_vmulq_x_n_f16): Likewise.
8437 (__arm_vmulq_x_n_f32): Likewise.
8438 (__arm_vsubq_x_f16): Likewise.
8439 (__arm_vsubq_x_f32): Likewise.
8440 (__arm_vsubq_x_n_f16): Likewise.
8441 (__arm_vsubq_x_n_f32): Likewise.
8442 (__arm_vcaddq_rot90_x_f16): Likewise.
8443 (__arm_vcaddq_rot90_x_f32): Likewise.
8444 (__arm_vcaddq_rot270_x_f16): Likewise.
8445 (__arm_vcaddq_rot270_x_f32): Likewise.
8446 (__arm_vcmulq_x_f16): Likewise.
8447 (__arm_vcmulq_x_f32): Likewise.
8448 (__arm_vcmulq_rot90_x_f16): Likewise.
8449 (__arm_vcmulq_rot90_x_f32): Likewise.
8450 (__arm_vcmulq_rot180_x_f16): Likewise.
8451 (__arm_vcmulq_rot180_x_f32): Likewise.
8452 (__arm_vcmulq_rot270_x_f16): Likewise.
8453 (__arm_vcmulq_rot270_x_f32): Likewise.
8454 (__arm_vcvtaq_x_s16_f16): Likewise.
8455 (__arm_vcvtaq_x_s32_f32): Likewise.
8456 (__arm_vcvtaq_x_u16_f16): Likewise.
8457 (__arm_vcvtaq_x_u32_f32): Likewise.
8458 (__arm_vcvtnq_x_s16_f16): Likewise.
8459 (__arm_vcvtnq_x_s32_f32): Likewise.
8460 (__arm_vcvtnq_x_u16_f16): Likewise.
8461 (__arm_vcvtnq_x_u32_f32): Likewise.
8462 (__arm_vcvtpq_x_s16_f16): Likewise.
8463 (__arm_vcvtpq_x_s32_f32): Likewise.
8464 (__arm_vcvtpq_x_u16_f16): Likewise.
8465 (__arm_vcvtpq_x_u32_f32): Likewise.
8466 (__arm_vcvtmq_x_s16_f16): Likewise.
8467 (__arm_vcvtmq_x_s32_f32): Likewise.
8468 (__arm_vcvtmq_x_u16_f16): Likewise.
8469 (__arm_vcvtmq_x_u32_f32): Likewise.
8470 (__arm_vcvtbq_x_f32_f16): Likewise.
8471 (__arm_vcvttq_x_f32_f16): Likewise.
8472 (__arm_vcvtq_x_f16_u16): Likewise.
8473 (__arm_vcvtq_x_f16_s16): Likewise.
8474 (__arm_vcvtq_x_f32_s32): Likewise.
8475 (__arm_vcvtq_x_f32_u32): Likewise.
8476 (__arm_vcvtq_x_n_f16_s16): Likewise.
8477 (__arm_vcvtq_x_n_f16_u16): Likewise.
8478 (__arm_vcvtq_x_n_f32_s32): Likewise.
8479 (__arm_vcvtq_x_n_f32_u32): Likewise.
8480 (__arm_vcvtq_x_s16_f16): Likewise.
8481 (__arm_vcvtq_x_s32_f32): Likewise.
8482 (__arm_vcvtq_x_u16_f16): Likewise.
8483 (__arm_vcvtq_x_u32_f32): Likewise.
8484 (__arm_vcvtq_x_n_s16_f16): Likewise.
8485 (__arm_vcvtq_x_n_s32_f32): Likewise.
8486 (__arm_vcvtq_x_n_u16_f16): Likewise.
8487 (__arm_vcvtq_x_n_u32_f32): Likewise.
8488 (__arm_vrndq_x_f16): Likewise.
8489 (__arm_vrndq_x_f32): Likewise.
8490 (__arm_vrndnq_x_f16): Likewise.
8491 (__arm_vrndnq_x_f32): Likewise.
8492 (__arm_vrndmq_x_f16): Likewise.
8493 (__arm_vrndmq_x_f32): Likewise.
8494 (__arm_vrndpq_x_f16): Likewise.
8495 (__arm_vrndpq_x_f32): Likewise.
8496 (__arm_vrndaq_x_f16): Likewise.
8497 (__arm_vrndaq_x_f32): Likewise.
8498 (__arm_vrndxq_x_f16): Likewise.
8499 (__arm_vrndxq_x_f32): Likewise.
8500 (__arm_vandq_x_f16): Likewise.
8501 (__arm_vandq_x_f32): Likewise.
8502 (__arm_vbicq_x_f16): Likewise.
8503 (__arm_vbicq_x_f32): Likewise.
8504 (__arm_vbrsrq_x_n_f16): Likewise.
8505 (__arm_vbrsrq_x_n_f32): Likewise.
8506 (__arm_veorq_x_f16): Likewise.
8507 (__arm_veorq_x_f32): Likewise.
8508 (__arm_vornq_x_f16): Likewise.
8509 (__arm_vornq_x_f32): Likewise.
8510 (__arm_vorrq_x_f16): Likewise.
8511 (__arm_vorrq_x_f32): Likewise.
8512 (__arm_vrev32q_x_f16): Likewise.
8513 (__arm_vrev64q_x_f16): Likewise.
8514 (__arm_vrev64q_x_f32): Likewise.
8515 (vabdq_x): Define polymorphic variant.
8516 (vabsq_x): Likewise.
8517 (vaddq_x): Likewise.
8518 (vandq_x): Likewise.
8519 (vbicq_x): Likewise.
8520 (vbrsrq_x): Likewise.
8521 (vcaddq_rot270_x): Likewise.
8522 (vcaddq_rot90_x): Likewise.
8523 (vcmulq_rot180_x): Likewise.
8524 (vcmulq_rot270_x): Likewise.
8525 (vcmulq_x): Likewise.
8526 (vcvtq_x): Likewise.
8527 (vcvtq_x_n): Likewise.
8528 (vcvtnq_m): Likewise.
8529 (veorq_x): Likewise.
8530 (vmaxnmq_x): Likewise.
8531 (vminnmq_x): Likewise.
8532 (vmulq_x): Likewise.
8533 (vnegq_x): Likewise.
8534 (vornq_x): Likewise.
8535 (vorrq_x): Likewise.
8536 (vrev32q_x): Likewise.
8537 (vrev64q_x): Likewise.
8538 (vrndaq_x): Likewise.
8539 (vrndmq_x): Likewise.
8540 (vrndnq_x): Likewise.
8541 (vrndpq_x): Likewise.
8542 (vrndq_x): Likewise.
8543 (vrndxq_x): Likewise.
8544 (vsubq_x): Likewise.
8545 (vcmulq_rot90_x): Likewise.
8547 (vclsq_x): Likewise.
8548 (vclzq_x): Likewise.
8549 (vhaddq_x): Likewise.
8550 (vhcaddq_rot270_x): Likewise.
8551 (vhcaddq_rot90_x): Likewise.
8552 (vhsubq_x): Likewise.
8553 (vmaxq_x): Likewise.
8554 (vminq_x): Likewise.
8555 (vmovlbq_x): Likewise.
8556 (vmovltq_x): Likewise.
8557 (vmulhq_x): Likewise.
8558 (vmullbq_int_x): Likewise.
8559 (vmullbq_poly_x): Likewise.
8560 (vmulltq_int_x): Likewise.
8561 (vmulltq_poly_x): Likewise.
8562 (vmvnq_x): Likewise.
8563 (vrev16q_x): Likewise.
8564 (vrhaddq_x): Likewise.
8565 (vrmulhq_x): Likewise.
8566 (vrshlq_x): Likewise.
8567 (vrshrq_x): Likewise.
8568 (vshllbq_x): Likewise.
8569 (vshlltq_x): Likewise.
8570 (vshlq_x_n): Likewise.
8571 (vshlq_x): Likewise.
8572 (vdwdupq_x_u8): Likewise.
8573 (vdwdupq_x_u16): Likewise.
8574 (vdwdupq_x_u32): Likewise.
8575 (viwdupq_x_u8): Likewise.
8576 (viwdupq_x_u16): Likewise.
8577 (viwdupq_x_u32): Likewise.
8578 (vidupq_x_u8): Likewise.
8579 (vddupq_x_u8): Likewise.
8580 (vidupq_x_u16): Likewise.
8581 (vddupq_x_u16): Likewise.
8582 (vidupq_x_u32): Likewise.
8583 (vddupq_x_u32): Likewise.
8584 (vshrq_x): Likewise.
8586 2020-03-20 Richard Biener <rguenther@suse.de>
8588 * tree-vect-slp.c (vect_analyze_slp_instance): Push the stmts
8589 to vectorize for CTOR defs.
8591 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8592 Andre Vieira <andre.simoesdiasvieira@arm.com>
8593 Mihail Ionescu <mihail.ionescu@arm.com>
8595 * config/arm/arm-builtins.c (LDRGBWBS_QUALIFIERS): Define builtin
8597 (LDRGBWBU_QUALIFIERS): Likewise.
8598 (LDRGBWBS_Z_QUALIFIERS): Likewise.
8599 (LDRGBWBU_Z_QUALIFIERS): Likewise.
8600 (STRSBWBS_QUALIFIERS): Likewise.
8601 (STRSBWBU_QUALIFIERS): Likewise.
8602 (STRSBWBS_P_QUALIFIERS): Likewise.
8603 (STRSBWBU_P_QUALIFIERS): Likewise.
8604 * config/arm/arm_mve.h (vldrdq_gather_base_wb_s64): Define macro.
8605 (vldrdq_gather_base_wb_u64): Likewise.
8606 (vldrdq_gather_base_wb_z_s64): Likewise.
8607 (vldrdq_gather_base_wb_z_u64): Likewise.
8608 (vldrwq_gather_base_wb_f32): Likewise.
8609 (vldrwq_gather_base_wb_s32): Likewise.
8610 (vldrwq_gather_base_wb_u32): Likewise.
8611 (vldrwq_gather_base_wb_z_f32): Likewise.
8612 (vldrwq_gather_base_wb_z_s32): Likewise.
8613 (vldrwq_gather_base_wb_z_u32): Likewise.
8614 (vstrdq_scatter_base_wb_p_s64): Likewise.
8615 (vstrdq_scatter_base_wb_p_u64): Likewise.
8616 (vstrdq_scatter_base_wb_s64): Likewise.
8617 (vstrdq_scatter_base_wb_u64): Likewise.
8618 (vstrwq_scatter_base_wb_p_s32): Likewise.
8619 (vstrwq_scatter_base_wb_p_f32): Likewise.
8620 (vstrwq_scatter_base_wb_p_u32): Likewise.
8621 (vstrwq_scatter_base_wb_s32): Likewise.
8622 (vstrwq_scatter_base_wb_u32): Likewise.
8623 (vstrwq_scatter_base_wb_f32): Likewise.
8624 (__arm_vldrdq_gather_base_wb_s64): Define intrinsic.
8625 (__arm_vldrdq_gather_base_wb_u64): Likewise.
8626 (__arm_vldrdq_gather_base_wb_z_s64): Likewise.
8627 (__arm_vldrdq_gather_base_wb_z_u64): Likewise.
8628 (__arm_vldrwq_gather_base_wb_s32): Likewise.
8629 (__arm_vldrwq_gather_base_wb_u32): Likewise.
8630 (__arm_vldrwq_gather_base_wb_z_s32): Likewise.
8631 (__arm_vldrwq_gather_base_wb_z_u32): Likewise.
8632 (__arm_vstrdq_scatter_base_wb_s64): Likewise.
8633 (__arm_vstrdq_scatter_base_wb_u64): Likewise.
8634 (__arm_vstrdq_scatter_base_wb_p_s64): Likewise.
8635 (__arm_vstrdq_scatter_base_wb_p_u64): Likewise.
8636 (__arm_vstrwq_scatter_base_wb_p_s32): Likewise.
8637 (__arm_vstrwq_scatter_base_wb_p_u32): Likewise.
8638 (__arm_vstrwq_scatter_base_wb_s32): Likewise.
8639 (__arm_vstrwq_scatter_base_wb_u32): Likewise.
8640 (__arm_vldrwq_gather_base_wb_f32): Likewise.
8641 (__arm_vldrwq_gather_base_wb_z_f32): Likewise.
8642 (__arm_vstrwq_scatter_base_wb_f32): Likewise.
8643 (__arm_vstrwq_scatter_base_wb_p_f32): Likewise.
8644 (vstrwq_scatter_base_wb): Define polymorphic variant.
8645 (vstrwq_scatter_base_wb_p): Likewise.
8646 (vstrdq_scatter_base_wb_p): Likewise.
8647 (vstrdq_scatter_base_wb): Likewise.
8648 * config/arm/arm_mve_builtins.def (LDRGBWBS_QUALIFIERS): Use builtin
8650 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_<supf>v4si): Define RTL
8652 (mve_vstrwq_scatter_base_wb_add_<supf>v4si): Likewise.
8653 (mve_vstrwq_scatter_base_wb_<supf>v4si_insn): Likewise.
8654 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
8655 (mve_vstrwq_scatter_base_wb_p_add_<supf>v4si): Likewise.
8656 (mve_vstrwq_scatter_base_wb_p_<supf>v4si_insn): Likewise.
8657 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
8658 (mve_vstrwq_scatter_base_wb_add_fv4sf): Likewise.
8659 (mve_vstrwq_scatter_base_wb_fv4sf_insn): Likewise.
8660 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
8661 (mve_vstrwq_scatter_base_wb_p_add_fv4sf): Likewise.
8662 (mve_vstrwq_scatter_base_wb_p_fv4sf_insn): Likewise.
8663 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
8664 (mve_vstrdq_scatter_base_wb_add_<supf>v2di): Likewise.
8665 (mve_vstrdq_scatter_base_wb_<supf>v2di_insn): Likewise.
8666 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
8667 (mve_vstrdq_scatter_base_wb_p_add_<supf>v2di): Likewise.
8668 (mve_vstrdq_scatter_base_wb_p_<supf>v2di_insn): Likewise.
8669 (mve_vldrwq_gather_base_wb_<supf>v4si): Likewise.
8670 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
8671 (mve_vldrwq_gather_base_wb_z_<supf>v4si): Likewise.
8672 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
8673 (mve_vldrwq_gather_base_wb_fv4sf): Likewise.
8674 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
8675 (mve_vldrwq_gather_base_wb_z_fv4sf): Likewise.
8676 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
8677 (mve_vldrdq_gather_base_wb_<supf>v2di): Likewise.
8678 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
8679 (mve_vldrdq_gather_base_wb_z_<supf>v2di): Likewise.
8680 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
8682 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8683 Andre Vieira <andre.simoesdiasvieira@arm.com>
8684 Mihail Ionescu <mihail.ionescu@arm.com>
8686 * config/arm/arm-builtins.c
8687 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Define quinary
8689 * config/arm/arm_mve.h (vddupq_m_n_u8): Define macro.
8690 (vddupq_m_n_u32): Likewise.
8691 (vddupq_m_n_u16): Likewise.
8692 (vddupq_m_wb_u8): Likewise.
8693 (vddupq_m_wb_u16): Likewise.
8694 (vddupq_m_wb_u32): Likewise.
8695 (vddupq_n_u8): Likewise.
8696 (vddupq_n_u32): Likewise.
8697 (vddupq_n_u16): Likewise.
8698 (vddupq_wb_u8): Likewise.
8699 (vddupq_wb_u16): Likewise.
8700 (vddupq_wb_u32): Likewise.
8701 (vdwdupq_m_n_u8): Likewise.
8702 (vdwdupq_m_n_u32): Likewise.
8703 (vdwdupq_m_n_u16): Likewise.
8704 (vdwdupq_m_wb_u8): Likewise.
8705 (vdwdupq_m_wb_u32): Likewise.
8706 (vdwdupq_m_wb_u16): Likewise.
8707 (vdwdupq_n_u8): Likewise.
8708 (vdwdupq_n_u32): Likewise.
8709 (vdwdupq_n_u16): Likewise.
8710 (vdwdupq_wb_u8): Likewise.
8711 (vdwdupq_wb_u32): Likewise.
8712 (vdwdupq_wb_u16): Likewise.
8713 (vidupq_m_n_u8): Likewise.
8714 (vidupq_m_n_u32): Likewise.
8715 (vidupq_m_n_u16): Likewise.
8716 (vidupq_m_wb_u8): Likewise.
8717 (vidupq_m_wb_u16): Likewise.
8718 (vidupq_m_wb_u32): Likewise.
8719 (vidupq_n_u8): Likewise.
8720 (vidupq_n_u32): Likewise.
8721 (vidupq_n_u16): Likewise.
8722 (vidupq_wb_u8): Likewise.
8723 (vidupq_wb_u16): Likewise.
8724 (vidupq_wb_u32): Likewise.
8725 (viwdupq_m_n_u8): Likewise.
8726 (viwdupq_m_n_u32): Likewise.
8727 (viwdupq_m_n_u16): Likewise.
8728 (viwdupq_m_wb_u8): Likewise.
8729 (viwdupq_m_wb_u32): Likewise.
8730 (viwdupq_m_wb_u16): Likewise.
8731 (viwdupq_n_u8): Likewise.
8732 (viwdupq_n_u32): Likewise.
8733 (viwdupq_n_u16): Likewise.
8734 (viwdupq_wb_u8): Likewise.
8735 (viwdupq_wb_u32): Likewise.
8736 (viwdupq_wb_u16): Likewise.
8737 (__arm_vddupq_m_n_u8): Define intrinsic.
8738 (__arm_vddupq_m_n_u32): Likewise.
8739 (__arm_vddupq_m_n_u16): Likewise.
8740 (__arm_vddupq_m_wb_u8): Likewise.
8741 (__arm_vddupq_m_wb_u16): Likewise.
8742 (__arm_vddupq_m_wb_u32): Likewise.
8743 (__arm_vddupq_n_u8): Likewise.
8744 (__arm_vddupq_n_u32): Likewise.
8745 (__arm_vddupq_n_u16): Likewise.
8746 (__arm_vdwdupq_m_n_u8): Likewise.
8747 (__arm_vdwdupq_m_n_u32): Likewise.
8748 (__arm_vdwdupq_m_n_u16): Likewise.
8749 (__arm_vdwdupq_m_wb_u8): Likewise.
8750 (__arm_vdwdupq_m_wb_u32): Likewise.
8751 (__arm_vdwdupq_m_wb_u16): Likewise.
8752 (__arm_vdwdupq_n_u8): Likewise.
8753 (__arm_vdwdupq_n_u32): Likewise.
8754 (__arm_vdwdupq_n_u16): Likewise.
8755 (__arm_vdwdupq_wb_u8): Likewise.
8756 (__arm_vdwdupq_wb_u32): Likewise.
8757 (__arm_vdwdupq_wb_u16): Likewise.
8758 (__arm_vidupq_m_n_u8): Likewise.
8759 (__arm_vidupq_m_n_u32): Likewise.
8760 (__arm_vidupq_m_n_u16): Likewise.
8761 (__arm_vidupq_n_u8): Likewise.
8762 (__arm_vidupq_m_wb_u8): Likewise.
8763 (__arm_vidupq_m_wb_u16): Likewise.
8764 (__arm_vidupq_m_wb_u32): Likewise.
8765 (__arm_vidupq_n_u32): Likewise.
8766 (__arm_vidupq_n_u16): Likewise.
8767 (__arm_vidupq_wb_u8): Likewise.
8768 (__arm_vidupq_wb_u16): Likewise.
8769 (__arm_vidupq_wb_u32): Likewise.
8770 (__arm_vddupq_wb_u8): Likewise.
8771 (__arm_vddupq_wb_u16): Likewise.
8772 (__arm_vddupq_wb_u32): Likewise.
8773 (__arm_viwdupq_m_n_u8): Likewise.
8774 (__arm_viwdupq_m_n_u32): Likewise.
8775 (__arm_viwdupq_m_n_u16): Likewise.
8776 (__arm_viwdupq_m_wb_u8): Likewise.
8777 (__arm_viwdupq_m_wb_u32): Likewise.
8778 (__arm_viwdupq_m_wb_u16): Likewise.
8779 (__arm_viwdupq_n_u8): Likewise.
8780 (__arm_viwdupq_n_u32): Likewise.
8781 (__arm_viwdupq_n_u16): Likewise.
8782 (__arm_viwdupq_wb_u8): Likewise.
8783 (__arm_viwdupq_wb_u32): Likewise.
8784 (__arm_viwdupq_wb_u16): Likewise.
8785 (vidupq_m): Define polymorphic variant.
8786 (vddupq_m): Likewise.
8787 (vidupq_u16): Likewise.
8788 (vidupq_u32): Likewise.
8789 (vidupq_u8): Likewise.
8790 (vddupq_u16): Likewise.
8791 (vddupq_u32): Likewise.
8792 (vddupq_u8): Likewise.
8793 (viwdupq_m): Likewise.
8794 (viwdupq_u16): Likewise.
8795 (viwdupq_u32): Likewise.
8796 (viwdupq_u8): Likewise.
8797 (vdwdupq_m): Likewise.
8798 (vdwdupq_u16): Likewise.
8799 (vdwdupq_u32): Likewise.
8800 (vdwdupq_u8): Likewise.
8801 * config/arm/arm_mve_builtins.def
8802 (QUINOP_UNONE_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Use builtin
8804 * config/arm/mve.md (mve_vidupq_n_u<mode>): Define RTL pattern.
8805 (mve_vidupq_u<mode>_insn): Likewise.
8806 (mve_vidupq_m_n_u<mode>): Likewise.
8807 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
8808 (mve_vddupq_n_u<mode>): Likewise.
8809 (mve_vddupq_u<mode>_insn): Likewise.
8810 (mve_vddupq_m_n_u<mode>): Likewise.
8811 (mve_vddupq_m_wb_u<mode>_insn): Likewise.
8812 (mve_vdwdupq_n_u<mode>): Likewise.
8813 (mve_vdwdupq_wb_u<mode>): Likewise.
8814 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
8815 (mve_vdwdupq_m_n_u<mode>): Likewise.
8816 (mve_vdwdupq_m_wb_u<mode>): Likewise.
8817 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
8818 (mve_viwdupq_n_u<mode>): Likewise.
8819 (mve_viwdupq_wb_u<mode>): Likewise.
8820 (mve_viwdupq_wb_u<mode>_insn): Likewise.
8821 (mve_viwdupq_m_n_u<mode>): Likewise.
8822 (mve_viwdupq_m_wb_u<mode>): Likewise.
8823 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
8825 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
8827 * config/arm/arm_mve.h (vreinterpretq_s16_s32): Define macro.
8828 (vreinterpretq_s16_s64): Likewise.
8829 (vreinterpretq_s16_s8): Likewise.
8830 (vreinterpretq_s16_u16): Likewise.
8831 (vreinterpretq_s16_u32): Likewise.
8832 (vreinterpretq_s16_u64): Likewise.
8833 (vreinterpretq_s16_u8): Likewise.
8834 (vreinterpretq_s32_s16): Likewise.
8835 (vreinterpretq_s32_s64): Likewise.
8836 (vreinterpretq_s32_s8): Likewise.
8837 (vreinterpretq_s32_u16): Likewise.
8838 (vreinterpretq_s32_u32): Likewise.
8839 (vreinterpretq_s32_u64): Likewise.
8840 (vreinterpretq_s32_u8): Likewise.
8841 (vreinterpretq_s64_s16): Likewise.
8842 (vreinterpretq_s64_s32): Likewise.
8843 (vreinterpretq_s64_s8): Likewise.
8844 (vreinterpretq_s64_u16): Likewise.
8845 (vreinterpretq_s64_u32): Likewise.
8846 (vreinterpretq_s64_u64): Likewise.
8847 (vreinterpretq_s64_u8): Likewise.
8848 (vreinterpretq_s8_s16): Likewise.
8849 (vreinterpretq_s8_s32): Likewise.
8850 (vreinterpretq_s8_s64): Likewise.
8851 (vreinterpretq_s8_u16): Likewise.
8852 (vreinterpretq_s8_u32): Likewise.
8853 (vreinterpretq_s8_u64): Likewise.
8854 (vreinterpretq_s8_u8): Likewise.
8855 (vreinterpretq_u16_s16): Likewise.
8856 (vreinterpretq_u16_s32): Likewise.
8857 (vreinterpretq_u16_s64): Likewise.
8858 (vreinterpretq_u16_s8): Likewise.
8859 (vreinterpretq_u16_u32): Likewise.
8860 (vreinterpretq_u16_u64): Likewise.
8861 (vreinterpretq_u16_u8): Likewise.
8862 (vreinterpretq_u32_s16): Likewise.
8863 (vreinterpretq_u32_s32): Likewise.
8864 (vreinterpretq_u32_s64): Likewise.
8865 (vreinterpretq_u32_s8): Likewise.
8866 (vreinterpretq_u32_u16): Likewise.
8867 (vreinterpretq_u32_u64): Likewise.
8868 (vreinterpretq_u32_u8): Likewise.
8869 (vreinterpretq_u64_s16): Likewise.
8870 (vreinterpretq_u64_s32): Likewise.
8871 (vreinterpretq_u64_s64): Likewise.
8872 (vreinterpretq_u64_s8): Likewise.
8873 (vreinterpretq_u64_u16): Likewise.
8874 (vreinterpretq_u64_u32): Likewise.
8875 (vreinterpretq_u64_u8): Likewise.
8876 (vreinterpretq_u8_s16): Likewise.
8877 (vreinterpretq_u8_s32): Likewise.
8878 (vreinterpretq_u8_s64): Likewise.
8879 (vreinterpretq_u8_s8): Likewise.
8880 (vreinterpretq_u8_u16): Likewise.
8881 (vreinterpretq_u8_u32): Likewise.
8882 (vreinterpretq_u8_u64): Likewise.
8883 (vreinterpretq_s32_f16): Likewise.
8884 (vreinterpretq_s32_f32): Likewise.
8885 (vreinterpretq_u16_f16): Likewise.
8886 (vreinterpretq_u16_f32): Likewise.
8887 (vreinterpretq_u32_f16): Likewise.
8888 (vreinterpretq_u32_f32): Likewise.
8889 (vreinterpretq_u64_f16): Likewise.
8890 (vreinterpretq_u64_f32): Likewise.
8891 (vreinterpretq_u8_f16): Likewise.
8892 (vreinterpretq_u8_f32): Likewise.
8893 (vreinterpretq_f16_f32): Likewise.
8894 (vreinterpretq_f16_s16): Likewise.
8895 (vreinterpretq_f16_s32): Likewise.
8896 (vreinterpretq_f16_s64): Likewise.
8897 (vreinterpretq_f16_s8): Likewise.
8898 (vreinterpretq_f16_u16): Likewise.
8899 (vreinterpretq_f16_u32): Likewise.
8900 (vreinterpretq_f16_u64): Likewise.
8901 (vreinterpretq_f16_u8): Likewise.
8902 (vreinterpretq_f32_f16): Likewise.
8903 (vreinterpretq_f32_s16): Likewise.
8904 (vreinterpretq_f32_s32): Likewise.
8905 (vreinterpretq_f32_s64): Likewise.
8906 (vreinterpretq_f32_s8): Likewise.
8907 (vreinterpretq_f32_u16): Likewise.
8908 (vreinterpretq_f32_u32): Likewise.
8909 (vreinterpretq_f32_u64): Likewise.
8910 (vreinterpretq_f32_u8): Likewise.
8911 (vreinterpretq_s16_f16): Likewise.
8912 (vreinterpretq_s16_f32): Likewise.
8913 (vreinterpretq_s64_f16): Likewise.
8914 (vreinterpretq_s64_f32): Likewise.
8915 (vreinterpretq_s8_f16): Likewise.
8916 (vreinterpretq_s8_f32): Likewise.
8917 (vuninitializedq_u8): Likewise.
8918 (vuninitializedq_u16): Likewise.
8919 (vuninitializedq_u32): Likewise.
8920 (vuninitializedq_u64): Likewise.
8921 (vuninitializedq_s8): Likewise.
8922 (vuninitializedq_s16): Likewise.
8923 (vuninitializedq_s32): Likewise.
8924 (vuninitializedq_s64): Likewise.
8925 (vuninitializedq_f16): Likewise.
8926 (vuninitializedq_f32): Likewise.
8927 (__arm_vuninitializedq_u8): Define intrinsic.
8928 (__arm_vuninitializedq_u16): Likewise.
8929 (__arm_vuninitializedq_u32): Likewise.
8930 (__arm_vuninitializedq_u64): Likewise.
8931 (__arm_vuninitializedq_s8): Likewise.
8932 (__arm_vuninitializedq_s16): Likewise.
8933 (__arm_vuninitializedq_s32): Likewise.
8934 (__arm_vuninitializedq_s64): Likewise.
8935 (__arm_vreinterpretq_s16_s32): Likewise.
8936 (__arm_vreinterpretq_s16_s64): Likewise.
8937 (__arm_vreinterpretq_s16_s8): Likewise.
8938 (__arm_vreinterpretq_s16_u16): Likewise.
8939 (__arm_vreinterpretq_s16_u32): Likewise.
8940 (__arm_vreinterpretq_s16_u64): Likewise.
8941 (__arm_vreinterpretq_s16_u8): Likewise.
8942 (__arm_vreinterpretq_s32_s16): Likewise.
8943 (__arm_vreinterpretq_s32_s64): Likewise.
8944 (__arm_vreinterpretq_s32_s8): Likewise.
8945 (__arm_vreinterpretq_s32_u16): Likewise.
8946 (__arm_vreinterpretq_s32_u32): Likewise.
8947 (__arm_vreinterpretq_s32_u64): Likewise.
8948 (__arm_vreinterpretq_s32_u8): Likewise.
8949 (__arm_vreinterpretq_s64_s16): Likewise.
8950 (__arm_vreinterpretq_s64_s32): Likewise.
8951 (__arm_vreinterpretq_s64_s8): Likewise.
8952 (__arm_vreinterpretq_s64_u16): Likewise.
8953 (__arm_vreinterpretq_s64_u32): Likewise.
8954 (__arm_vreinterpretq_s64_u64): Likewise.
8955 (__arm_vreinterpretq_s64_u8): Likewise.
8956 (__arm_vreinterpretq_s8_s16): Likewise.
8957 (__arm_vreinterpretq_s8_s32): Likewise.
8958 (__arm_vreinterpretq_s8_s64): Likewise.
8959 (__arm_vreinterpretq_s8_u16): Likewise.
8960 (__arm_vreinterpretq_s8_u32): Likewise.
8961 (__arm_vreinterpretq_s8_u64): Likewise.
8962 (__arm_vreinterpretq_s8_u8): Likewise.
8963 (__arm_vreinterpretq_u16_s16): Likewise.
8964 (__arm_vreinterpretq_u16_s32): Likewise.
8965 (__arm_vreinterpretq_u16_s64): Likewise.
8966 (__arm_vreinterpretq_u16_s8): Likewise.
8967 (__arm_vreinterpretq_u16_u32): Likewise.
8968 (__arm_vreinterpretq_u16_u64): Likewise.
8969 (__arm_vreinterpretq_u16_u8): Likewise.
8970 (__arm_vreinterpretq_u32_s16): Likewise.
8971 (__arm_vreinterpretq_u32_s32): Likewise.
8972 (__arm_vreinterpretq_u32_s64): Likewise.
8973 (__arm_vreinterpretq_u32_s8): Likewise.
8974 (__arm_vreinterpretq_u32_u16): Likewise.
8975 (__arm_vreinterpretq_u32_u64): Likewise.
8976 (__arm_vreinterpretq_u32_u8): Likewise.
8977 (__arm_vreinterpretq_u64_s16): Likewise.
8978 (__arm_vreinterpretq_u64_s32): Likewise.
8979 (__arm_vreinterpretq_u64_s64): Likewise.
8980 (__arm_vreinterpretq_u64_s8): Likewise.
8981 (__arm_vreinterpretq_u64_u16): Likewise.
8982 (__arm_vreinterpretq_u64_u32): Likewise.
8983 (__arm_vreinterpretq_u64_u8): Likewise.
8984 (__arm_vreinterpretq_u8_s16): Likewise.
8985 (__arm_vreinterpretq_u8_s32): Likewise.
8986 (__arm_vreinterpretq_u8_s64): Likewise.
8987 (__arm_vreinterpretq_u8_s8): Likewise.
8988 (__arm_vreinterpretq_u8_u16): Likewise.
8989 (__arm_vreinterpretq_u8_u32): Likewise.
8990 (__arm_vreinterpretq_u8_u64): Likewise.
8991 (__arm_vuninitializedq_f16): Likewise.
8992 (__arm_vuninitializedq_f32): Likewise.
8993 (__arm_vreinterpretq_s32_f16): Likewise.
8994 (__arm_vreinterpretq_s32_f32): Likewise.
8995 (__arm_vreinterpretq_s16_f16): Likewise.
8996 (__arm_vreinterpretq_s16_f32): Likewise.
8997 (__arm_vreinterpretq_s64_f16): Likewise.
8998 (__arm_vreinterpretq_s64_f32): Likewise.
8999 (__arm_vreinterpretq_s8_f16): Likewise.
9000 (__arm_vreinterpretq_s8_f32): Likewise.
9001 (__arm_vreinterpretq_u16_f16): Likewise.
9002 (__arm_vreinterpretq_u16_f32): Likewise.
9003 (__arm_vreinterpretq_u32_f16): Likewise.
9004 (__arm_vreinterpretq_u32_f32): Likewise.
9005 (__arm_vreinterpretq_u64_f16): Likewise.
9006 (__arm_vreinterpretq_u64_f32): Likewise.
9007 (__arm_vreinterpretq_u8_f16): Likewise.
9008 (__arm_vreinterpretq_u8_f32): Likewise.
9009 (__arm_vreinterpretq_f16_f32): Likewise.
9010 (__arm_vreinterpretq_f16_s16): Likewise.
9011 (__arm_vreinterpretq_f16_s32): Likewise.
9012 (__arm_vreinterpretq_f16_s64): Likewise.
9013 (__arm_vreinterpretq_f16_s8): Likewise.
9014 (__arm_vreinterpretq_f16_u16): Likewise.
9015 (__arm_vreinterpretq_f16_u32): Likewise.
9016 (__arm_vreinterpretq_f16_u64): Likewise.
9017 (__arm_vreinterpretq_f16_u8): Likewise.
9018 (__arm_vreinterpretq_f32_f16): Likewise.
9019 (__arm_vreinterpretq_f32_s16): Likewise.
9020 (__arm_vreinterpretq_f32_s32): Likewise.
9021 (__arm_vreinterpretq_f32_s64): Likewise.
9022 (__arm_vreinterpretq_f32_s8): Likewise.
9023 (__arm_vreinterpretq_f32_u16): Likewise.
9024 (__arm_vreinterpretq_f32_u32): Likewise.
9025 (__arm_vreinterpretq_f32_u64): Likewise.
9026 (__arm_vreinterpretq_f32_u8): Likewise.
9027 (vuninitializedq): Define polymorphic variant.
9028 (vreinterpretq_f16): Likewise.
9029 (vreinterpretq_f32): Likewise.
9030 (vreinterpretq_s16): Likewise.
9031 (vreinterpretq_s32): Likewise.
9032 (vreinterpretq_s64): Likewise.
9033 (vreinterpretq_s8): Likewise.
9034 (vreinterpretq_u16): Likewise.
9035 (vreinterpretq_u32): Likewise.
9036 (vreinterpretq_u64): Likewise.
9037 (vreinterpretq_u8): Likewise.
9039 2020-03-20 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9040 Andre Vieira <andre.simoesdiasvieira@arm.com>
9041 Mihail Ionescu <mihail.ionescu@arm.com>
9043 * config/arm/arm_mve.h (vaddq_s8): Define macro.
9044 (vaddq_s16): Likewise.
9045 (vaddq_s32): Likewise.
9046 (vaddq_u8): Likewise.
9047 (vaddq_u16): Likewise.
9048 (vaddq_u32): Likewise.
9049 (vaddq_f16): Likewise.
9050 (vaddq_f32): Likewise.
9051 (__arm_vaddq_s8): Define intrinsic.
9052 (__arm_vaddq_s16): Likewise.
9053 (__arm_vaddq_s32): Likewise.
9054 (__arm_vaddq_u8): Likewise.
9055 (__arm_vaddq_u16): Likewise.
9056 (__arm_vaddq_u32): Likewise.
9057 (__arm_vaddq_f16): Likewise.
9058 (__arm_vaddq_f32): Likewise.
9059 (vaddq): Define polymorphic variant.
9060 * config/arm/iterators.md (VNIM): Define mode iterator for common types
9061 Neon, IWMMXT and MVE.
9062 (VNINOTM): Likewise.
9063 * config/arm/mve.md (mve_vaddq<mode>): Define RTL pattern.
9064 (mve_vaddq_f<mode>): Define RTL pattern.
9065 * config/arm/neon.md (add<mode>3): Rename to addv4hf3 RTL pattern.
9066 (addv8hf3_neon): Define RTL pattern.
9067 * config/arm/vec-common.md (add<mode>3): Modify standard add RTL pattern
9069 (addv8hf3): Define standard RTL pattern for MVE and Neon.
9070 (add<mode>3): Modify existing standard add RTL pattern for Neon and IWMMXT.
9072 2020-03-20 Martin Liska <mliska@suse.cz>
9075 * ipa-cp.c (ipa_get_jf_ancestor_result): Use offset in bytes. Previously
9076 build_ref_for_offset function was used and it transforms off to bytes
9079 2020-03-20 Richard Biener <rguenther@suse.de>
9081 PR tree-optimization/94266
9082 * gimple-ssa-sprintf.c (get_origin_and_offset): Use the
9083 type of the underlying object to adjust for the containing
9086 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9088 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Rename this to ...
9089 (VUNSPEC_GET_FPSCR): ... this, and move it to vunspec.
9090 * config/arm/vfp.md: (get_fpscr, set_fpscr): Revert to old patterns.
9092 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9094 * config/arm/mve.md (mve_mov<mode>): Fix R->R case.
9096 2020-03-20 Jakub Jelinek <jakub@redhat.com>
9098 PR tree-optimization/94224
9099 * gimple-ssa-store-merging.c
9100 (imm_store_chain_info::coalesce_immediate): Don't consider overlapping
9101 or adjacent INTEGER_CST rhs_code stores as mergeable if they have
9104 2020-03-20 Andre Vieira <andre.simoesdiasvieira@arm.com>
9106 * config/arm/arm.md (define_attr "conds"): Fix logic for neon and mve.
9108 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9111 * cgraph.c (cgraph_node::function_symbol): Fix availability computation.
9112 (cgraph_node::function_or_virtual_thunk_symbol): Likewise.
9114 2020-03-19 Jan Hubicka <hubicka@ucw.cz>
9117 * cgraphunit.c (process_function_and_variable_attributes): warn
9118 for flatten attribute on alias.
9119 * ipa-inline.c (ipa_inline): Do not ICE on flatten attribute on alias.
9121 2020-03-19 Martin Liska <mliska@suse.cz>
9123 * lto-section-in.c: Add ext_symtab.
9124 * lto-streamer-out.c (write_symbol_extension_info): New.
9125 (produce_symtab_extension): New.
9126 (produce_asm_for_decls): Stream also produce_symtab_extension.
9127 * lto-streamer.h (enum lto_section_type): New section.
9129 2020-03-19 Jakub Jelinek <jakub@redhat.com>
9131 PR tree-optimization/94211
9132 * tree-ssa-phiopt.c (value_replacement): Use estimate_num_insns_seq
9133 instead of estimate_num_insns for bb_seq (middle_bb). Rename
9134 emtpy_or_with_defined_p variable to empty_or_with_defined_p, adjust
9137 2020-03-19 Richard Biener <rguenther@suse.de>
9140 * ipa-cp.c (ipa_get_jf_ancestor_result): Avoid build_fold_addr_expr
9141 and build_ref_for_offset.
9143 2020-03-19 Richard Biener <rguenther@suse.de>
9146 * fold-const.c (fold_binary_loc): Avoid using
9147 build_fold_addr_expr when we really want an ADDR_EXPR.
9149 2020-03-18 Segher Boessenkool <segher@kernel.crashing.org>
9151 * config/rs6000/constraints.md (wd, wf, wi, ws, ww): New undocumented
9154 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
9156 PR rtl-optimization/90275
9157 * cse.c (cse_insn): Delete no-op register moves too.
9159 2020-03-18 Martin Sebor <msebor@redhat.com>
9162 * cgraphunit.c (process_function_and_variable_attributes): Also
9163 complain about weakref function definitions and drop all effects
9166 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9167 Mihail Ionescu <mihail.ionescu@arm.com>
9168 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9170 * config/arm/arm_mve.h (vstrdq_scatter_base_p_s64): Define macro.
9171 (vstrdq_scatter_base_p_u64): Likewise.
9172 (vstrdq_scatter_base_s64): Likewise.
9173 (vstrdq_scatter_base_u64): Likewise.
9174 (vstrdq_scatter_offset_p_s64): Likewise.
9175 (vstrdq_scatter_offset_p_u64): Likewise.
9176 (vstrdq_scatter_offset_s64): Likewise.
9177 (vstrdq_scatter_offset_u64): Likewise.
9178 (vstrdq_scatter_shifted_offset_p_s64): Likewise.
9179 (vstrdq_scatter_shifted_offset_p_u64): Likewise.
9180 (vstrdq_scatter_shifted_offset_s64): Likewise.
9181 (vstrdq_scatter_shifted_offset_u64): Likewise.
9182 (vstrhq_scatter_offset_f16): Likewise.
9183 (vstrhq_scatter_offset_p_f16): Likewise.
9184 (vstrhq_scatter_shifted_offset_f16): Likewise.
9185 (vstrhq_scatter_shifted_offset_p_f16): Likewise.
9186 (vstrwq_scatter_base_f32): Likewise.
9187 (vstrwq_scatter_base_p_f32): Likewise.
9188 (vstrwq_scatter_offset_f32): Likewise.
9189 (vstrwq_scatter_offset_p_f32): Likewise.
9190 (vstrwq_scatter_offset_p_s32): Likewise.
9191 (vstrwq_scatter_offset_p_u32): Likewise.
9192 (vstrwq_scatter_offset_s32): Likewise.
9193 (vstrwq_scatter_offset_u32): Likewise.
9194 (vstrwq_scatter_shifted_offset_f32): Likewise.
9195 (vstrwq_scatter_shifted_offset_p_f32): Likewise.
9196 (vstrwq_scatter_shifted_offset_p_s32): Likewise.
9197 (vstrwq_scatter_shifted_offset_p_u32): Likewise.
9198 (vstrwq_scatter_shifted_offset_s32): Likewise.
9199 (vstrwq_scatter_shifted_offset_u32): Likewise.
9200 (__arm_vstrdq_scatter_base_p_s64): Define intrinsic.
9201 (__arm_vstrdq_scatter_base_p_u64): Likewise.
9202 (__arm_vstrdq_scatter_base_s64): Likewise.
9203 (__arm_vstrdq_scatter_base_u64): Likewise.
9204 (__arm_vstrdq_scatter_offset_p_s64): Likewise.
9205 (__arm_vstrdq_scatter_offset_p_u64): Likewise.
9206 (__arm_vstrdq_scatter_offset_s64): Likewise.
9207 (__arm_vstrdq_scatter_offset_u64): Likewise.
9208 (__arm_vstrdq_scatter_shifted_offset_p_s64): Likewise.
9209 (__arm_vstrdq_scatter_shifted_offset_p_u64): Likewise.
9210 (__arm_vstrdq_scatter_shifted_offset_s64): Likewise.
9211 (__arm_vstrdq_scatter_shifted_offset_u64): Likewise.
9212 (__arm_vstrwq_scatter_offset_p_s32): Likewise.
9213 (__arm_vstrwq_scatter_offset_p_u32): Likewise.
9214 (__arm_vstrwq_scatter_offset_s32): Likewise.
9215 (__arm_vstrwq_scatter_offset_u32): Likewise.
9216 (__arm_vstrwq_scatter_shifted_offset_p_s32): Likewise.
9217 (__arm_vstrwq_scatter_shifted_offset_p_u32): Likewise.
9218 (__arm_vstrwq_scatter_shifted_offset_s32): Likewise.
9219 (__arm_vstrwq_scatter_shifted_offset_u32): Likewise.
9220 (__arm_vstrhq_scatter_offset_f16): Likewise.
9221 (__arm_vstrhq_scatter_offset_p_f16): Likewise.
9222 (__arm_vstrhq_scatter_shifted_offset_f16): Likewise.
9223 (__arm_vstrhq_scatter_shifted_offset_p_f16): Likewise.
9224 (__arm_vstrwq_scatter_base_f32): Likewise.
9225 (__arm_vstrwq_scatter_base_p_f32): Likewise.
9226 (__arm_vstrwq_scatter_offset_f32): Likewise.
9227 (__arm_vstrwq_scatter_offset_p_f32): Likewise.
9228 (__arm_vstrwq_scatter_shifted_offset_f32): Likewise.
9229 (__arm_vstrwq_scatter_shifted_offset_p_f32): Likewise.
9230 (vstrhq_scatter_offset): Define polymorphic variant.
9231 (vstrhq_scatter_offset_p): Likewise.
9232 (vstrhq_scatter_shifted_offset): Likewise.
9233 (vstrhq_scatter_shifted_offset_p): Likewise.
9234 (vstrwq_scatter_base): Likewise.
9235 (vstrwq_scatter_base_p): Likewise.
9236 (vstrwq_scatter_offset): Likewise.
9237 (vstrwq_scatter_offset_p): Likewise.
9238 (vstrwq_scatter_shifted_offset): Likewise.
9239 (vstrwq_scatter_shifted_offset_p): Likewise.
9240 (vstrdq_scatter_base_p): Likewise.
9241 (vstrdq_scatter_base): Likewise.
9242 (vstrdq_scatter_offset_p): Likewise.
9243 (vstrdq_scatter_offset): Likewise.
9244 (vstrdq_scatter_shifted_offset_p): Likewise.
9245 (vstrdq_scatter_shifted_offset): Likewise.
9246 * config/arm/arm_mve_builtins.def (STRSBS): Use builtin qualifier.
9247 (STRSBS_P): Likewise.
9249 (STRSBU_P): Likewise.
9251 (STRSS_P): Likewise.
9253 (STRSU_P): Likewise.
9254 * config/arm/constraints.md (Ri): Define.
9255 * config/arm/mve.md (VSTRDSBQ): Define iterator.
9256 (VSTRDSOQ): Likewise.
9257 (VSTRDSSOQ): Likewise.
9258 (VSTRWSOQ): Likewise.
9259 (VSTRWSSOQ): Likewise.
9260 (mve_vstrdq_scatter_base_p_<supf>v2di): Define RTL pattern.
9261 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
9262 (mve_vstrdq_scatter_offset_p_<supf>v2di): Likewise.
9263 (mve_vstrdq_scatter_offset_<supf>v2di): Likewise.
9264 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di): Likewise.
9265 (mve_vstrdq_scatter_shifted_offset_<supf>v2di): Likewise.
9266 (mve_vstrhq_scatter_offset_fv8hf): Likewise.
9267 (mve_vstrhq_scatter_offset_p_fv8hf): Likewise.
9268 (mve_vstrhq_scatter_shifted_offset_fv8hf): Likewise.
9269 (mve_vstrhq_scatter_shifted_offset_p_fv8hf): Likewise.
9270 (mve_vstrwq_scatter_base_fv4sf): Likewise.
9271 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
9272 (mve_vstrwq_scatter_offset_fv4sf): Likewise.
9273 (mve_vstrwq_scatter_offset_p_fv4sf): Likewise.
9274 (mve_vstrwq_scatter_offset_p_<supf>v4si): Likewise.
9275 (mve_vstrwq_scatter_offset_<supf>v4si): Likewise.
9276 (mve_vstrwq_scatter_shifted_offset_fv4sf): Likewise.
9277 (mve_vstrwq_scatter_shifted_offset_p_fv4sf): Likewise.
9278 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si): Likewise.
9279 (mve_vstrwq_scatter_shifted_offset_<supf>v4si): Likewise.
9280 * config/arm/predicates.md (Ri): Define predicate to check immediate
9281 is the range +/-1016 and multiple of 8.
9283 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9284 Mihail Ionescu <mihail.ionescu@arm.com>
9285 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9287 * config/arm/arm_mve.h (vst1q_f32): Define macro.
9288 (vst1q_f16): Likewise.
9289 (vst1q_s8): Likewise.
9290 (vst1q_s32): Likewise.
9291 (vst1q_s16): Likewise.
9292 (vst1q_u8): Likewise.
9293 (vst1q_u32): Likewise.
9294 (vst1q_u16): Likewise.
9295 (vstrhq_f16): Likewise.
9296 (vstrhq_scatter_offset_s32): Likewise.
9297 (vstrhq_scatter_offset_s16): Likewise.
9298 (vstrhq_scatter_offset_u32): Likewise.
9299 (vstrhq_scatter_offset_u16): Likewise.
9300 (vstrhq_scatter_offset_p_s32): Likewise.
9301 (vstrhq_scatter_offset_p_s16): Likewise.
9302 (vstrhq_scatter_offset_p_u32): Likewise.
9303 (vstrhq_scatter_offset_p_u16): Likewise.
9304 (vstrhq_scatter_shifted_offset_s32): Likewise.
9305 (vstrhq_scatter_shifted_offset_s16): Likewise.
9306 (vstrhq_scatter_shifted_offset_u32): Likewise.
9307 (vstrhq_scatter_shifted_offset_u16): Likewise.
9308 (vstrhq_scatter_shifted_offset_p_s32): Likewise.
9309 (vstrhq_scatter_shifted_offset_p_s16): Likewise.
9310 (vstrhq_scatter_shifted_offset_p_u32): Likewise.
9311 (vstrhq_scatter_shifted_offset_p_u16): Likewise.
9312 (vstrhq_s32): Likewise.
9313 (vstrhq_s16): Likewise.
9314 (vstrhq_u32): Likewise.
9315 (vstrhq_u16): Likewise.
9316 (vstrhq_p_f16): Likewise.
9317 (vstrhq_p_s32): Likewise.
9318 (vstrhq_p_s16): Likewise.
9319 (vstrhq_p_u32): Likewise.
9320 (vstrhq_p_u16): Likewise.
9321 (vstrwq_f32): Likewise.
9322 (vstrwq_s32): Likewise.
9323 (vstrwq_u32): Likewise.
9324 (vstrwq_p_f32): Likewise.
9325 (vstrwq_p_s32): Likewise.
9326 (vstrwq_p_u32): Likewise.
9327 (__arm_vst1q_s8): Define intrinsic.
9328 (__arm_vst1q_s32): Likewise.
9329 (__arm_vst1q_s16): Likewise.
9330 (__arm_vst1q_u8): Likewise.
9331 (__arm_vst1q_u32): Likewise.
9332 (__arm_vst1q_u16): Likewise.
9333 (__arm_vstrhq_scatter_offset_s32): Likewise.
9334 (__arm_vstrhq_scatter_offset_s16): Likewise.
9335 (__arm_vstrhq_scatter_offset_u32): Likewise.
9336 (__arm_vstrhq_scatter_offset_u16): Likewise.
9337 (__arm_vstrhq_scatter_offset_p_s32): Likewise.
9338 (__arm_vstrhq_scatter_offset_p_s16): Likewise.
9339 (__arm_vstrhq_scatter_offset_p_u32): Likewise.
9340 (__arm_vstrhq_scatter_offset_p_u16): Likewise.
9341 (__arm_vstrhq_scatter_shifted_offset_s32): Likewise.
9342 (__arm_vstrhq_scatter_shifted_offset_s16): Likewise.
9343 (__arm_vstrhq_scatter_shifted_offset_u32): Likewise.
9344 (__arm_vstrhq_scatter_shifted_offset_u16): Likewise.
9345 (__arm_vstrhq_scatter_shifted_offset_p_s32): Likewise.
9346 (__arm_vstrhq_scatter_shifted_offset_p_s16): Likewise.
9347 (__arm_vstrhq_scatter_shifted_offset_p_u32): Likewise.
9348 (__arm_vstrhq_scatter_shifted_offset_p_u16): Likewise.
9349 (__arm_vstrhq_s32): Likewise.
9350 (__arm_vstrhq_s16): Likewise.
9351 (__arm_vstrhq_u32): Likewise.
9352 (__arm_vstrhq_u16): Likewise.
9353 (__arm_vstrhq_p_s32): Likewise.
9354 (__arm_vstrhq_p_s16): Likewise.
9355 (__arm_vstrhq_p_u32): Likewise.
9356 (__arm_vstrhq_p_u16): Likewise.
9357 (__arm_vstrwq_s32): Likewise.
9358 (__arm_vstrwq_u32): Likewise.
9359 (__arm_vstrwq_p_s32): Likewise.
9360 (__arm_vstrwq_p_u32): Likewise.
9361 (__arm_vstrwq_p_f32): Likewise.
9362 (__arm_vstrwq_f32): Likewise.
9363 (__arm_vst1q_f32): Likewise.
9364 (__arm_vst1q_f16): Likewise.
9365 (__arm_vstrhq_f16): Likewise.
9366 (__arm_vstrhq_p_f16): Likewise.
9367 (vst1q): Define polymorphic variant.
9369 (vstrhq_p): Likewise.
9370 (vstrhq_scatter_offset_p): Likewise.
9371 (vstrhq_scatter_offset): Likewise.
9372 (vstrhq_scatter_shifted_offset_p): Likewise.
9373 (vstrhq_scatter_shifted_offset): Likewise.
9374 (vstrwq_p): Likewise.
9376 * config/arm/arm_mve_builtins.def (STRS): Use builtin qualifier.
9379 (STRSS_P): Likewise.
9381 (STRSU_P): Likewise.
9384 * config/arm/mve.md (VST1Q): Define iterator.
9385 (VSTRHSOQ): Likewise.
9386 (VSTRHSSOQ): Likewise.
9389 (mve_vstrhq_fv8hf): Define RTL pattern.
9390 (mve_vstrhq_p_fv8hf): Likewise.
9391 (mve_vstrhq_p_<supf><mode>): Likewise.
9392 (mve_vstrhq_scatter_offset_p_<supf><mode>): Likewise.
9393 (mve_vstrhq_scatter_offset_<supf><mode>): Likewise.
9394 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>): Likewise.
9395 (mve_vstrhq_scatter_shifted_offset_<supf><mode>): Likewise.
9396 (mve_vstrhq_<supf><mode>): Likewise.
9397 (mve_vstrwq_fv4sf): Likewise.
9398 (mve_vstrwq_p_fv4sf): Likewise.
9399 (mve_vstrwq_p_<supf>v4si): Likewise.
9400 (mve_vstrwq_<supf>v4si): Likewise.
9401 (mve_vst1q_f<mode>): Define expand.
9402 (mve_vst1q_<supf><mode>): Likewise.
9404 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9405 Mihail Ionescu <mihail.ionescu@arm.com>
9406 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9408 * config/arm/arm_mve.h (vld1q_s8): Define macro.
9409 (vld1q_s32): Likewise.
9410 (vld1q_s16): Likewise.
9411 (vld1q_u8): Likewise.
9412 (vld1q_u32): Likewise.
9413 (vld1q_u16): Likewise.
9414 (vldrhq_gather_offset_s32): Likewise.
9415 (vldrhq_gather_offset_s16): Likewise.
9416 (vldrhq_gather_offset_u32): Likewise.
9417 (vldrhq_gather_offset_u16): Likewise.
9418 (vldrhq_gather_offset_z_s32): Likewise.
9419 (vldrhq_gather_offset_z_s16): Likewise.
9420 (vldrhq_gather_offset_z_u32): Likewise.
9421 (vldrhq_gather_offset_z_u16): Likewise.
9422 (vldrhq_gather_shifted_offset_s32): Likewise.
9423 (vldrhq_gather_shifted_offset_s16): Likewise.
9424 (vldrhq_gather_shifted_offset_u32): Likewise.
9425 (vldrhq_gather_shifted_offset_u16): Likewise.
9426 (vldrhq_gather_shifted_offset_z_s32): Likewise.
9427 (vldrhq_gather_shifted_offset_z_s16): Likewise.
9428 (vldrhq_gather_shifted_offset_z_u32): Likewise.
9429 (vldrhq_gather_shifted_offset_z_u16): Likewise.
9430 (vldrhq_s32): Likewise.
9431 (vldrhq_s16): Likewise.
9432 (vldrhq_u32): Likewise.
9433 (vldrhq_u16): Likewise.
9434 (vldrhq_z_s32): Likewise.
9435 (vldrhq_z_s16): Likewise.
9436 (vldrhq_z_u32): Likewise.
9437 (vldrhq_z_u16): Likewise.
9438 (vldrwq_s32): Likewise.
9439 (vldrwq_u32): Likewise.
9440 (vldrwq_z_s32): Likewise.
9441 (vldrwq_z_u32): Likewise.
9442 (vld1q_f32): Likewise.
9443 (vld1q_f16): Likewise.
9444 (vldrhq_f16): Likewise.
9445 (vldrhq_z_f16): Likewise.
9446 (vldrwq_f32): Likewise.
9447 (vldrwq_z_f32): Likewise.
9448 (__arm_vld1q_s8): Define intrinsic.
9449 (__arm_vld1q_s32): Likewise.
9450 (__arm_vld1q_s16): Likewise.
9451 (__arm_vld1q_u8): Likewise.
9452 (__arm_vld1q_u32): Likewise.
9453 (__arm_vld1q_u16): Likewise.
9454 (__arm_vldrhq_gather_offset_s32): Likewise.
9455 (__arm_vldrhq_gather_offset_s16): Likewise.
9456 (__arm_vldrhq_gather_offset_u32): Likewise.
9457 (__arm_vldrhq_gather_offset_u16): Likewise.
9458 (__arm_vldrhq_gather_offset_z_s32): Likewise.
9459 (__arm_vldrhq_gather_offset_z_s16): Likewise.
9460 (__arm_vldrhq_gather_offset_z_u32): Likewise.
9461 (__arm_vldrhq_gather_offset_z_u16): Likewise.
9462 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
9463 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
9464 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
9465 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
9466 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
9467 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
9468 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
9469 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
9470 (__arm_vldrhq_s32): Likewise.
9471 (__arm_vldrhq_s16): Likewise.
9472 (__arm_vldrhq_u32): Likewise.
9473 (__arm_vldrhq_u16): Likewise.
9474 (__arm_vldrhq_z_s32): Likewise.
9475 (__arm_vldrhq_z_s16): Likewise.
9476 (__arm_vldrhq_z_u32): Likewise.
9477 (__arm_vldrhq_z_u16): Likewise.
9478 (__arm_vldrwq_s32): Likewise.
9479 (__arm_vldrwq_u32): Likewise.
9480 (__arm_vldrwq_z_s32): Likewise.
9481 (__arm_vldrwq_z_u32): Likewise.
9482 (__arm_vld1q_f32): Likewise.
9483 (__arm_vld1q_f16): Likewise.
9484 (__arm_vldrwq_f32): Likewise.
9485 (__arm_vldrwq_z_f32): Likewise.
9486 (__arm_vldrhq_z_f16): Likewise.
9487 (__arm_vldrhq_f16): Likewise.
9488 (vld1q): Define polymorphic variant.
9489 (vldrhq_gather_offset): Likewise.
9490 (vldrhq_gather_offset_z): Likewise.
9491 (vldrhq_gather_shifted_offset): Likewise.
9492 (vldrhq_gather_shifted_offset_z): Likewise.
9493 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
9497 (LDRGU_Z): Likewise.
9499 (LDRGS_Z): Likewise.
9501 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
9502 (V_sz_elem1): Likewise.
9503 (VLD1Q): Define iterator.
9504 (VLDRHGOQ): Likewise.
9505 (VLDRHGSOQ): Likewise.
9508 (mve_vldrhq_fv8hf): Define RTL pattern.
9509 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
9510 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
9511 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
9512 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
9513 (mve_vldrhq_<supf><mode>): Likewise.
9514 (mve_vldrhq_z_fv8hf): Likewise.
9515 (mve_vldrhq_z_<supf><mode>): Likewise.
9516 (mve_vldrwq_fv4sf): Likewise.
9517 (mve_vldrwq_<supf>v4si): Likewise.
9518 (mve_vldrwq_z_fv4sf): Likewise.
9519 (mve_vldrwq_z_<supf>v4si): Likewise.
9520 (mve_vld1q_f<mode>): Define RTL expand pattern.
9521 (mve_vld1q_<supf><mode>): Likewise.
9523 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9524 Mihail Ionescu <mihail.ionescu@arm.com>
9525 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9527 * config/arm/arm_mve.h (vld1q_s8): Define macro.
9528 (vld1q_s32): Likewise.
9529 (vld1q_s16): Likewise.
9530 (vld1q_u8): Likewise.
9531 (vld1q_u32): Likewise.
9532 (vld1q_u16): Likewise.
9533 (vldrhq_gather_offset_s32): Likewise.
9534 (vldrhq_gather_offset_s16): Likewise.
9535 (vldrhq_gather_offset_u32): Likewise.
9536 (vldrhq_gather_offset_u16): Likewise.
9537 (vldrhq_gather_offset_z_s32): Likewise.
9538 (vldrhq_gather_offset_z_s16): Likewise.
9539 (vldrhq_gather_offset_z_u32): Likewise.
9540 (vldrhq_gather_offset_z_u16): Likewise.
9541 (vldrhq_gather_shifted_offset_s32): Likewise.
9542 (vldrhq_gather_shifted_offset_s16): Likewise.
9543 (vldrhq_gather_shifted_offset_u32): Likewise.
9544 (vldrhq_gather_shifted_offset_u16): Likewise.
9545 (vldrhq_gather_shifted_offset_z_s32): Likewise.
9546 (vldrhq_gather_shifted_offset_z_s16): Likewise.
9547 (vldrhq_gather_shifted_offset_z_u32): Likewise.
9548 (vldrhq_gather_shifted_offset_z_u16): Likewise.
9549 (vldrhq_s32): Likewise.
9550 (vldrhq_s16): Likewise.
9551 (vldrhq_u32): Likewise.
9552 (vldrhq_u16): Likewise.
9553 (vldrhq_z_s32): Likewise.
9554 (vldrhq_z_s16): Likewise.
9555 (vldrhq_z_u32): Likewise.
9556 (vldrhq_z_u16): Likewise.
9557 (vldrwq_s32): Likewise.
9558 (vldrwq_u32): Likewise.
9559 (vldrwq_z_s32): Likewise.
9560 (vldrwq_z_u32): Likewise.
9561 (vld1q_f32): Likewise.
9562 (vld1q_f16): Likewise.
9563 (vldrhq_f16): Likewise.
9564 (vldrhq_z_f16): Likewise.
9565 (vldrwq_f32): Likewise.
9566 (vldrwq_z_f32): Likewise.
9567 (__arm_vld1q_s8): Define intrinsic.
9568 (__arm_vld1q_s32): Likewise.
9569 (__arm_vld1q_s16): Likewise.
9570 (__arm_vld1q_u8): Likewise.
9571 (__arm_vld1q_u32): Likewise.
9572 (__arm_vld1q_u16): Likewise.
9573 (__arm_vldrhq_gather_offset_s32): Likewise.
9574 (__arm_vldrhq_gather_offset_s16): Likewise.
9575 (__arm_vldrhq_gather_offset_u32): Likewise.
9576 (__arm_vldrhq_gather_offset_u16): Likewise.
9577 (__arm_vldrhq_gather_offset_z_s32): Likewise.
9578 (__arm_vldrhq_gather_offset_z_s16): Likewise.
9579 (__arm_vldrhq_gather_offset_z_u32): Likewise.
9580 (__arm_vldrhq_gather_offset_z_u16): Likewise.
9581 (__arm_vldrhq_gather_shifted_offset_s32): Likewise.
9582 (__arm_vldrhq_gather_shifted_offset_s16): Likewise.
9583 (__arm_vldrhq_gather_shifted_offset_u32): Likewise.
9584 (__arm_vldrhq_gather_shifted_offset_u16): Likewise.
9585 (__arm_vldrhq_gather_shifted_offset_z_s32): Likewise.
9586 (__arm_vldrhq_gather_shifted_offset_z_s16): Likewise.
9587 (__arm_vldrhq_gather_shifted_offset_z_u32): Likewise.
9588 (__arm_vldrhq_gather_shifted_offset_z_u16): Likewise.
9589 (__arm_vldrhq_s32): Likewise.
9590 (__arm_vldrhq_s16): Likewise.
9591 (__arm_vldrhq_u32): Likewise.
9592 (__arm_vldrhq_u16): Likewise.
9593 (__arm_vldrhq_z_s32): Likewise.
9594 (__arm_vldrhq_z_s16): Likewise.
9595 (__arm_vldrhq_z_u32): Likewise.
9596 (__arm_vldrhq_z_u16): Likewise.
9597 (__arm_vldrwq_s32): Likewise.
9598 (__arm_vldrwq_u32): Likewise.
9599 (__arm_vldrwq_z_s32): Likewise.
9600 (__arm_vldrwq_z_u32): Likewise.
9601 (__arm_vld1q_f32): Likewise.
9602 (__arm_vld1q_f16): Likewise.
9603 (__arm_vldrwq_f32): Likewise.
9604 (__arm_vldrwq_z_f32): Likewise.
9605 (__arm_vldrhq_z_f16): Likewise.
9606 (__arm_vldrhq_f16): Likewise.
9607 (vld1q): Define polymorphic variant.
9608 (vldrhq_gather_offset): Likewise.
9609 (vldrhq_gather_offset_z): Likewise.
9610 (vldrhq_gather_shifted_offset): Likewise.
9611 (vldrhq_gather_shifted_offset_z): Likewise.
9612 * config/arm/arm_mve_builtins.def (LDRU): Use builtin qualifier.
9616 (LDRGU_Z): Likewise.
9618 (LDRGS_Z): Likewise.
9620 * config/arm/mve.md (MVE_H_ELEM): Define mode iterator.
9621 (V_sz_elem1): Likewise.
9622 (VLD1Q): Define iterator.
9623 (VLDRHGOQ): Likewise.
9624 (VLDRHGSOQ): Likewise.
9627 (mve_vldrhq_fv8hf): Define RTL pattern.
9628 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
9629 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
9630 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
9631 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
9632 (mve_vldrhq_<supf><mode>): Likewise.
9633 (mve_vldrhq_z_fv8hf): Likewise.
9634 (mve_vldrhq_z_<supf><mode>): Likewise.
9635 (mve_vldrwq_fv4sf): Likewise.
9636 (mve_vldrwq_<supf>v4si): Likewise.
9637 (mve_vldrwq_z_fv4sf): Likewise.
9638 (mve_vldrwq_z_<supf>v4si): Likewise.
9639 (mve_vld1q_f<mode>): Define RTL expand pattern.
9640 (mve_vld1q_<supf><mode>): Likewise.
9642 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9643 Mihail Ionescu <mihail.ionescu@arm.com>
9644 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9646 * config/arm/arm-builtins.c (LDRGBS_Z_QUALIFIERS): Define builtin
9648 (LDRGBU_Z_QUALIFIERS): Likewise.
9649 (LDRGS_Z_QUALIFIERS): Likewise.
9650 (LDRGU_Z_QUALIFIERS): Likewise.
9651 (LDRS_Z_QUALIFIERS): Likewise.
9652 (LDRU_Z_QUALIFIERS): Likewise.
9653 * config/arm/arm_mve.h (vldrbq_gather_offset_z_s16): Define macro.
9654 (vldrbq_gather_offset_z_u8): Likewise.
9655 (vldrbq_gather_offset_z_s32): Likewise.
9656 (vldrbq_gather_offset_z_u16): Likewise.
9657 (vldrbq_gather_offset_z_u32): Likewise.
9658 (vldrbq_gather_offset_z_s8): Likewise.
9659 (vldrbq_z_s16): Likewise.
9660 (vldrbq_z_u8): Likewise.
9661 (vldrbq_z_s8): Likewise.
9662 (vldrbq_z_s32): Likewise.
9663 (vldrbq_z_u16): Likewise.
9664 (vldrbq_z_u32): Likewise.
9665 (vldrwq_gather_base_z_u32): Likewise.
9666 (vldrwq_gather_base_z_s32): Likewise.
9667 (__arm_vldrbq_gather_offset_z_s8): Define intrinsic.
9668 (__arm_vldrbq_gather_offset_z_s32): Likewise.
9669 (__arm_vldrbq_gather_offset_z_s16): Likewise.
9670 (__arm_vldrbq_gather_offset_z_u8): Likewise.
9671 (__arm_vldrbq_gather_offset_z_u32): Likewise.
9672 (__arm_vldrbq_gather_offset_z_u16): Likewise.
9673 (__arm_vldrbq_z_s8): Likewise.
9674 (__arm_vldrbq_z_s32): Likewise.
9675 (__arm_vldrbq_z_s16): Likewise.
9676 (__arm_vldrbq_z_u8): Likewise.
9677 (__arm_vldrbq_z_u32): Likewise.
9678 (__arm_vldrbq_z_u16): Likewise.
9679 (__arm_vldrwq_gather_base_z_s32): Likewise.
9680 (__arm_vldrwq_gather_base_z_u32): Likewise.
9681 (vldrbq_gather_offset_z): Define polymorphic variant.
9682 * config/arm/arm_mve_builtins.def (LDRGBS_Z_QUALIFIERS): Use builtin
9684 (LDRGBU_Z_QUALIFIERS): Likewise.
9685 (LDRGS_Z_QUALIFIERS): Likewise.
9686 (LDRGU_Z_QUALIFIERS): Likewise.
9687 (LDRS_Z_QUALIFIERS): Likewise.
9688 (LDRU_Z_QUALIFIERS): Likewise.
9689 * config/arm/mve.md (mve_vldrbq_gather_offset_z_<supf><mode>): Define
9691 (mve_vldrbq_z_<supf><mode>): Likewise.
9692 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
9694 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9695 Mihail Ionescu <mihail.ionescu@arm.com>
9696 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9698 * config/arm/arm-builtins.c (STRS_P_QUALIFIERS): Define builtin
9700 (STRU_P_QUALIFIERS): Likewise.
9701 (STRSU_P_QUALIFIERS): Likewise.
9702 (STRSS_P_QUALIFIERS): Likewise.
9703 (STRSBS_P_QUALIFIERS): Likewise.
9704 (STRSBU_P_QUALIFIERS): Likewise.
9705 * config/arm/arm_mve.h (vstrbq_p_s8): Define macro.
9706 (vstrbq_p_s32): Likewise.
9707 (vstrbq_p_s16): Likewise.
9708 (vstrbq_p_u8): Likewise.
9709 (vstrbq_p_u32): Likewise.
9710 (vstrbq_p_u16): Likewise.
9711 (vstrbq_scatter_offset_p_s8): Likewise.
9712 (vstrbq_scatter_offset_p_s32): Likewise.
9713 (vstrbq_scatter_offset_p_s16): Likewise.
9714 (vstrbq_scatter_offset_p_u8): Likewise.
9715 (vstrbq_scatter_offset_p_u32): Likewise.
9716 (vstrbq_scatter_offset_p_u16): Likewise.
9717 (vstrwq_scatter_base_p_s32): Likewise.
9718 (vstrwq_scatter_base_p_u32): Likewise.
9719 (__arm_vstrbq_p_s8): Define intrinsic.
9720 (__arm_vstrbq_p_s32): Likewise.
9721 (__arm_vstrbq_p_s16): Likewise.
9722 (__arm_vstrbq_p_u8): Likewise.
9723 (__arm_vstrbq_p_u32): Likewise.
9724 (__arm_vstrbq_p_u16): Likewise.
9725 (__arm_vstrbq_scatter_offset_p_s8): Likewise.
9726 (__arm_vstrbq_scatter_offset_p_s32): Likewise.
9727 (__arm_vstrbq_scatter_offset_p_s16): Likewise.
9728 (__arm_vstrbq_scatter_offset_p_u8): Likewise.
9729 (__arm_vstrbq_scatter_offset_p_u32): Likewise.
9730 (__arm_vstrbq_scatter_offset_p_u16): Likewise.
9731 (__arm_vstrwq_scatter_base_p_s32): Likewise.
9732 (__arm_vstrwq_scatter_base_p_u32): Likewise.
9733 (vstrbq_p): Define polymorphic variant.
9734 (vstrbq_scatter_offset_p): Likewise.
9735 (vstrwq_scatter_base_p): Likewise.
9736 * config/arm/arm_mve_builtins.def (STRS_P_QUALIFIERS): Use builtin
9738 (STRU_P_QUALIFIERS): Likewise.
9739 (STRSU_P_QUALIFIERS): Likewise.
9740 (STRSS_P_QUALIFIERS): Likewise.
9741 (STRSBS_P_QUALIFIERS): Likewise.
9742 (STRSBU_P_QUALIFIERS): Likewise.
9743 * config/arm/mve.md (mve_vstrbq_scatter_offset_p_<supf><mode>): Define
9745 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
9746 (mve_vstrbq_p_<supf><mode>): Likewise.
9748 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9749 Mihail Ionescu <mihail.ionescu@arm.com>
9750 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9752 * config/arm/arm-builtins.c (LDRGU_QUALIFIERS): Define builtin
9754 (LDRGS_QUALIFIERS): Likewise.
9755 (LDRS_QUALIFIERS): Likewise.
9756 (LDRU_QUALIFIERS): Likewise.
9757 (LDRGBS_QUALIFIERS): Likewise.
9758 (LDRGBU_QUALIFIERS): Likewise.
9759 * config/arm/arm_mve.h (vldrbq_gather_offset_u8): Define macro.
9760 (vldrbq_gather_offset_s8): Likewise.
9761 (vldrbq_s8): Likewise.
9762 (vldrbq_u8): Likewise.
9763 (vldrbq_gather_offset_u16): Likewise.
9764 (vldrbq_gather_offset_s16): Likewise.
9765 (vldrbq_s16): Likewise.
9766 (vldrbq_u16): Likewise.
9767 (vldrbq_gather_offset_u32): Likewise.
9768 (vldrbq_gather_offset_s32): Likewise.
9769 (vldrbq_s32): Likewise.
9770 (vldrbq_u32): Likewise.
9771 (vldrwq_gather_base_s32): Likewise.
9772 (vldrwq_gather_base_u32): Likewise.
9773 (__arm_vldrbq_gather_offset_u8): Define intrinsic.
9774 (__arm_vldrbq_gather_offset_s8): Likewise.
9775 (__arm_vldrbq_s8): Likewise.
9776 (__arm_vldrbq_u8): Likewise.
9777 (__arm_vldrbq_gather_offset_u16): Likewise.
9778 (__arm_vldrbq_gather_offset_s16): Likewise.
9779 (__arm_vldrbq_s16): Likewise.
9780 (__arm_vldrbq_u16): Likewise.
9781 (__arm_vldrbq_gather_offset_u32): Likewise.
9782 (__arm_vldrbq_gather_offset_s32): Likewise.
9783 (__arm_vldrbq_s32): Likewise.
9784 (__arm_vldrbq_u32): Likewise.
9785 (__arm_vldrwq_gather_base_s32): Likewise.
9786 (__arm_vldrwq_gather_base_u32): Likewise.
9787 (vldrbq_gather_offset): Define polymorphic variant.
9788 * config/arm/arm_mve_builtins.def (LDRGU_QUALIFIERS): Use builtin
9790 (LDRGS_QUALIFIERS): Likewise.
9791 (LDRS_QUALIFIERS): Likewise.
9792 (LDRU_QUALIFIERS): Likewise.
9793 (LDRGBS_QUALIFIERS): Likewise.
9794 (LDRGBU_QUALIFIERS): Likewise.
9795 * config/arm/mve.md (VLDRBGOQ): Define iterator.
9797 (VLDRWGBQ): Likewise.
9798 (mve_vldrbq_gather_offset_<supf><mode>): Define RTL pattern.
9799 (mve_vldrbq_<supf><mode>): Likewise.
9800 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
9802 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9803 Mihail Ionescu <mihail.ionescu@arm.com>
9804 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9806 * config/arm/arm-builtins.c (STRS_QUALIFIERS): Define builtin qualifier.
9807 (STRU_QUALIFIERS): Likewise.
9808 (STRSS_QUALIFIERS): Likewise.
9809 (STRSU_QUALIFIERS): Likewise.
9810 (STRSBS_QUALIFIERS): Likewise.
9811 (STRSBU_QUALIFIERS): Likewise.
9812 * config/arm/arm_mve.h (vstrbq_s8): Define macro.
9813 (vstrbq_u8): Likewise.
9814 (vstrbq_u16): Likewise.
9815 (vstrbq_scatter_offset_s8): Likewise.
9816 (vstrbq_scatter_offset_u8): Likewise.
9817 (vstrbq_scatter_offset_u16): Likewise.
9818 (vstrbq_s16): Likewise.
9819 (vstrbq_u32): Likewise.
9820 (vstrbq_scatter_offset_s16): Likewise.
9821 (vstrbq_scatter_offset_u32): Likewise.
9822 (vstrbq_s32): Likewise.
9823 (vstrbq_scatter_offset_s32): Likewise.
9824 (vstrwq_scatter_base_s32): Likewise.
9825 (vstrwq_scatter_base_u32): Likewise.
9826 (__arm_vstrbq_scatter_offset_s8): Define intrinsic.
9827 (__arm_vstrbq_scatter_offset_s32): Likewise.
9828 (__arm_vstrbq_scatter_offset_s16): Likewise.
9829 (__arm_vstrbq_scatter_offset_u8): Likewise.
9830 (__arm_vstrbq_scatter_offset_u32): Likewise.
9831 (__arm_vstrbq_scatter_offset_u16): Likewise.
9832 (__arm_vstrbq_s8): Likewise.
9833 (__arm_vstrbq_s32): Likewise.
9834 (__arm_vstrbq_s16): Likewise.
9835 (__arm_vstrbq_u8): Likewise.
9836 (__arm_vstrbq_u32): Likewise.
9837 (__arm_vstrbq_u16): Likewise.
9838 (__arm_vstrwq_scatter_base_s32): Likewise.
9839 (__arm_vstrwq_scatter_base_u32): Likewise.
9840 (vstrbq): Define polymorphic variant.
9841 (vstrbq_scatter_offset): Likewise.
9842 (vstrwq_scatter_base): Likewise.
9843 * config/arm/arm_mve_builtins.def (STRS_QUALIFIERS): Use builtin
9845 (STRU_QUALIFIERS): Likewise.
9846 (STRSS_QUALIFIERS): Likewise.
9847 (STRSU_QUALIFIERS): Likewise.
9848 (STRSBS_QUALIFIERS): Likewise.
9849 (STRSBU_QUALIFIERS): Likewise.
9850 * config/arm/mve.md (MVE_B_ELEM): Define mode attribute iterator.
9851 (VSTRWSBQ): Define iterators.
9852 (VSTRBSOQ): Likewise.
9854 (mve_vstrbq_<supf><mode>): Define RTL pattern.
9855 (mve_vstrbq_scatter_offset_<supf><mode>): Likewise.
9856 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
9858 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
9859 Mihail Ionescu <mihail.ionescu@arm.com>
9860 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
9862 * config/arm/arm_mve.h (vabdq_m_f32): Define macro.
9863 (vabdq_m_f16): Likewise.
9864 (vaddq_m_f32): Likewise.
9865 (vaddq_m_f16): Likewise.
9866 (vaddq_m_n_f32): Likewise.
9867 (vaddq_m_n_f16): Likewise.
9868 (vandq_m_f32): Likewise.
9869 (vandq_m_f16): Likewise.
9870 (vbicq_m_f32): Likewise.
9871 (vbicq_m_f16): Likewise.
9872 (vbrsrq_m_n_f32): Likewise.
9873 (vbrsrq_m_n_f16): Likewise.
9874 (vcaddq_rot270_m_f32): Likewise.
9875 (vcaddq_rot270_m_f16): Likewise.
9876 (vcaddq_rot90_m_f32): Likewise.
9877 (vcaddq_rot90_m_f16): Likewise.
9878 (vcmlaq_m_f32): Likewise.
9879 (vcmlaq_m_f16): Likewise.
9880 (vcmlaq_rot180_m_f32): Likewise.
9881 (vcmlaq_rot180_m_f16): Likewise.
9882 (vcmlaq_rot270_m_f32): Likewise.
9883 (vcmlaq_rot270_m_f16): Likewise.
9884 (vcmlaq_rot90_m_f32): Likewise.
9885 (vcmlaq_rot90_m_f16): Likewise.
9886 (vcmulq_m_f32): Likewise.
9887 (vcmulq_m_f16): Likewise.
9888 (vcmulq_rot180_m_f32): Likewise.
9889 (vcmulq_rot180_m_f16): Likewise.
9890 (vcmulq_rot270_m_f32): Likewise.
9891 (vcmulq_rot270_m_f16): Likewise.
9892 (vcmulq_rot90_m_f32): Likewise.
9893 (vcmulq_rot90_m_f16): Likewise.
9894 (vcvtq_m_n_s32_f32): Likewise.
9895 (vcvtq_m_n_s16_f16): Likewise.
9896 (vcvtq_m_n_u32_f32): Likewise.
9897 (vcvtq_m_n_u16_f16): Likewise.
9898 (veorq_m_f32): Likewise.
9899 (veorq_m_f16): Likewise.
9900 (vfmaq_m_f32): Likewise.
9901 (vfmaq_m_f16): Likewise.
9902 (vfmaq_m_n_f32): Likewise.
9903 (vfmaq_m_n_f16): Likewise.
9904 (vfmasq_m_n_f32): Likewise.
9905 (vfmasq_m_n_f16): Likewise.
9906 (vfmsq_m_f32): Likewise.
9907 (vfmsq_m_f16): Likewise.
9908 (vmaxnmq_m_f32): Likewise.
9909 (vmaxnmq_m_f16): Likewise.
9910 (vminnmq_m_f32): Likewise.
9911 (vminnmq_m_f16): Likewise.
9912 (vmulq_m_f32): Likewise.
9913 (vmulq_m_f16): Likewise.
9914 (vmulq_m_n_f32): Likewise.
9915 (vmulq_m_n_f16): Likewise.
9916 (vornq_m_f32): Likewise.
9917 (vornq_m_f16): Likewise.
9918 (vorrq_m_f32): Likewise.
9919 (vorrq_m_f16): Likewise.
9920 (vsubq_m_f32): Likewise.
9921 (vsubq_m_f16): Likewise.
9922 (vsubq_m_n_f32): Likewise.
9923 (vsubq_m_n_f16): Likewise.
9924 (__attribute__): Likewise.
9925 (__arm_vabdq_m_f32): Likewise.
9926 (__arm_vabdq_m_f16): Likewise.
9927 (__arm_vaddq_m_f32): Likewise.
9928 (__arm_vaddq_m_f16): Likewise.
9929 (__arm_vaddq_m_n_f32): Likewise.
9930 (__arm_vaddq_m_n_f16): Likewise.
9931 (__arm_vandq_m_f32): Likewise.
9932 (__arm_vandq_m_f16): Likewise.
9933 (__arm_vbicq_m_f32): Likewise.
9934 (__arm_vbicq_m_f16): Likewise.
9935 (__arm_vbrsrq_m_n_f32): Likewise.
9936 (__arm_vbrsrq_m_n_f16): Likewise.
9937 (__arm_vcaddq_rot270_m_f32): Likewise.
9938 (__arm_vcaddq_rot270_m_f16): Likewise.
9939 (__arm_vcaddq_rot90_m_f32): Likewise.
9940 (__arm_vcaddq_rot90_m_f16): Likewise.
9941 (__arm_vcmlaq_m_f32): Likewise.
9942 (__arm_vcmlaq_m_f16): Likewise.
9943 (__arm_vcmlaq_rot180_m_f32): Likewise.
9944 (__arm_vcmlaq_rot180_m_f16): Likewise.
9945 (__arm_vcmlaq_rot270_m_f32): Likewise.
9946 (__arm_vcmlaq_rot270_m_f16): Likewise.
9947 (__arm_vcmlaq_rot90_m_f32): Likewise.
9948 (__arm_vcmlaq_rot90_m_f16): Likewise.
9949 (__arm_vcmulq_m_f32): Likewise.
9950 (__arm_vcmulq_m_f16): Likewise.
9951 (__arm_vcmulq_rot180_m_f32): Define intrinsic.
9952 (__arm_vcmulq_rot180_m_f16): Likewise.
9953 (__arm_vcmulq_rot270_m_f32): Likewise.
9954 (__arm_vcmulq_rot270_m_f16): Likewise.
9955 (__arm_vcmulq_rot90_m_f32): Likewise.
9956 (__arm_vcmulq_rot90_m_f16): Likewise.
9957 (__arm_vcvtq_m_n_s32_f32): Likewise.
9958 (__arm_vcvtq_m_n_s16_f16): Likewise.
9959 (__arm_vcvtq_m_n_u32_f32): Likewise.
9960 (__arm_vcvtq_m_n_u16_f16): Likewise.
9961 (__arm_veorq_m_f32): Likewise.
9962 (__arm_veorq_m_f16): Likewise.
9963 (__arm_vfmaq_m_f32): Likewise.
9964 (__arm_vfmaq_m_f16): Likewise.
9965 (__arm_vfmaq_m_n_f32): Likewise.
9966 (__arm_vfmaq_m_n_f16): Likewise.
9967 (__arm_vfmasq_m_n_f32): Likewise.
9968 (__arm_vfmasq_m_n_f16): Likewise.
9969 (__arm_vfmsq_m_f32): Likewise.
9970 (__arm_vfmsq_m_f16): Likewise.
9971 (__arm_vmaxnmq_m_f32): Likewise.
9972 (__arm_vmaxnmq_m_f16): Likewise.
9973 (__arm_vminnmq_m_f32): Likewise.
9974 (__arm_vminnmq_m_f16): Likewise.
9975 (__arm_vmulq_m_f32): Likewise.
9976 (__arm_vmulq_m_f16): Likewise.
9977 (__arm_vmulq_m_n_f32): Likewise.
9978 (__arm_vmulq_m_n_f16): Likewise.
9979 (__arm_vornq_m_f32): Likewise.
9980 (__arm_vornq_m_f16): Likewise.
9981 (__arm_vorrq_m_f32): Likewise.
9982 (__arm_vorrq_m_f16): Likewise.
9983 (__arm_vsubq_m_f32): Likewise.
9984 (__arm_vsubq_m_f16): Likewise.
9985 (__arm_vsubq_m_n_f32): Likewise.
9986 (__arm_vsubq_m_n_f16): Likewise.
9987 (vabdq_m): Define polymorphic variant.
9988 (vaddq_m): Likewise.
9989 (vaddq_m_n): Likewise.
9990 (vandq_m): Likewise.
9991 (vbicq_m): Likewise.
9992 (vbrsrq_m_n): Likewise.
9993 (vcaddq_rot270_m): Likewise.
9994 (vcaddq_rot90_m): Likewise.
9995 (vcmlaq_m): Likewise.
9996 (vcmlaq_rot180_m): Likewise.
9997 (vcmlaq_rot270_m): Likewise.
9998 (vcmlaq_rot90_m): Likewise.
9999 (vcmulq_m): Likewise.
10000 (vcmulq_rot180_m): Likewise.
10001 (vcmulq_rot270_m): Likewise.
10002 (vcmulq_rot90_m): Likewise.
10003 (veorq_m): Likewise.
10004 (vfmaq_m): Likewise.
10005 (vfmaq_m_n): Likewise.
10006 (vfmasq_m_n): Likewise.
10007 (vfmsq_m): Likewise.
10008 (vmaxnmq_m): Likewise.
10009 (vminnmq_m): Likewise.
10010 (vmulq_m): Likewise.
10011 (vmulq_m_n): Likewise.
10012 (vornq_m): Likewise.
10013 (vsubq_m): Likewise.
10014 (vsubq_m_n): Likewise.
10015 (vorrq_m): Likewise.
10016 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10018 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10019 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
10020 * config/arm/mve.md (mve_vabdq_m_f<mode>): Define RTL pattern.
10021 (mve_vaddq_m_f<mode>): Likewise.
10022 (mve_vaddq_m_n_f<mode>): Likewise.
10023 (mve_vandq_m_f<mode>): Likewise.
10024 (mve_vbicq_m_f<mode>): Likewise.
10025 (mve_vbrsrq_m_n_f<mode>): Likewise.
10026 (mve_vcaddq_rot270_m_f<mode>): Likewise.
10027 (mve_vcaddq_rot90_m_f<mode>): Likewise.
10028 (mve_vcmlaq_m_f<mode>): Likewise.
10029 (mve_vcmlaq_rot180_m_f<mode>): Likewise.
10030 (mve_vcmlaq_rot270_m_f<mode>): Likewise.
10031 (mve_vcmlaq_rot90_m_f<mode>): Likewise.
10032 (mve_vcmulq_m_f<mode>): Likewise.
10033 (mve_vcmulq_rot180_m_f<mode>): Likewise.
10034 (mve_vcmulq_rot270_m_f<mode>): Likewise.
10035 (mve_vcmulq_rot90_m_f<mode>): Likewise.
10036 (mve_veorq_m_f<mode>): Likewise.
10037 (mve_vfmaq_m_f<mode>): Likewise.
10038 (mve_vfmaq_m_n_f<mode>): Likewise.
10039 (mve_vfmasq_m_n_f<mode>): Likewise.
10040 (mve_vfmsq_m_f<mode>): Likewise.
10041 (mve_vmaxnmq_m_f<mode>): Likewise.
10042 (mve_vminnmq_m_f<mode>): Likewise.
10043 (mve_vmulq_m_f<mode>): Likewise.
10044 (mve_vmulq_m_n_f<mode>): Likewise.
10045 (mve_vornq_m_f<mode>): Likewise.
10046 (mve_vorrq_m_f<mode>): Likewise.
10047 (mve_vsubq_m_f<mode>): Likewise.
10048 (mve_vsubq_m_n_f<mode>): Likewise.
10050 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10051 Mihail Ionescu <mihail.ionescu@arm.com>
10052 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10054 * config/arm/arm-protos.h (arm_mve_immediate_check):
10055 * config/arm/arm.c (arm_mve_immediate_check): Define fuction to check
10056 mode and interger value.
10057 * config/arm/arm_mve.h (vmlaldavaq_p_s32): Define macro.
10058 (vmlaldavaq_p_s16): Likewise.
10059 (vmlaldavaq_p_u32): Likewise.
10060 (vmlaldavaq_p_u16): Likewise.
10061 (vmlaldavaxq_p_s32): Likewise.
10062 (vmlaldavaxq_p_s16): Likewise.
10063 (vmlaldavaxq_p_u32): Likewise.
10064 (vmlaldavaxq_p_u16): Likewise.
10065 (vmlsldavaq_p_s32): Likewise.
10066 (vmlsldavaq_p_s16): Likewise.
10067 (vmlsldavaxq_p_s32): Likewise.
10068 (vmlsldavaxq_p_s16): Likewise.
10069 (vmullbq_poly_m_p8): Likewise.
10070 (vmullbq_poly_m_p16): Likewise.
10071 (vmulltq_poly_m_p8): Likewise.
10072 (vmulltq_poly_m_p16): Likewise.
10073 (vqdmullbq_m_n_s32): Likewise.
10074 (vqdmullbq_m_n_s16): Likewise.
10075 (vqdmullbq_m_s32): Likewise.
10076 (vqdmullbq_m_s16): Likewise.
10077 (vqdmulltq_m_n_s32): Likewise.
10078 (vqdmulltq_m_n_s16): Likewise.
10079 (vqdmulltq_m_s32): Likewise.
10080 (vqdmulltq_m_s16): Likewise.
10081 (vqrshrnbq_m_n_s32): Likewise.
10082 (vqrshrnbq_m_n_s16): Likewise.
10083 (vqrshrnbq_m_n_u32): Likewise.
10084 (vqrshrnbq_m_n_u16): Likewise.
10085 (vqrshrntq_m_n_s32): Likewise.
10086 (vqrshrntq_m_n_s16): Likewise.
10087 (vqrshrntq_m_n_u32): Likewise.
10088 (vqrshrntq_m_n_u16): Likewise.
10089 (vqrshrunbq_m_n_s32): Likewise.
10090 (vqrshrunbq_m_n_s16): Likewise.
10091 (vqrshruntq_m_n_s32): Likewise.
10092 (vqrshruntq_m_n_s16): Likewise.
10093 (vqshrnbq_m_n_s32): Likewise.
10094 (vqshrnbq_m_n_s16): Likewise.
10095 (vqshrnbq_m_n_u32): Likewise.
10096 (vqshrnbq_m_n_u16): Likewise.
10097 (vqshrntq_m_n_s32): Likewise.
10098 (vqshrntq_m_n_s16): Likewise.
10099 (vqshrntq_m_n_u32): Likewise.
10100 (vqshrntq_m_n_u16): Likewise.
10101 (vqshrunbq_m_n_s32): Likewise.
10102 (vqshrunbq_m_n_s16): Likewise.
10103 (vqshruntq_m_n_s32): Likewise.
10104 (vqshruntq_m_n_s16): Likewise.
10105 (vrmlaldavhaq_p_s32): Likewise.
10106 (vrmlaldavhaq_p_u32): Likewise.
10107 (vrmlaldavhaxq_p_s32): Likewise.
10108 (vrmlsldavhaq_p_s32): Likewise.
10109 (vrmlsldavhaxq_p_s32): Likewise.
10110 (vrshrnbq_m_n_s32): Likewise.
10111 (vrshrnbq_m_n_s16): Likewise.
10112 (vrshrnbq_m_n_u32): Likewise.
10113 (vrshrnbq_m_n_u16): Likewise.
10114 (vrshrntq_m_n_s32): Likewise.
10115 (vrshrntq_m_n_s16): Likewise.
10116 (vrshrntq_m_n_u32): Likewise.
10117 (vrshrntq_m_n_u16): Likewise.
10118 (vshllbq_m_n_s8): Likewise.
10119 (vshllbq_m_n_s16): Likewise.
10120 (vshllbq_m_n_u8): Likewise.
10121 (vshllbq_m_n_u16): Likewise.
10122 (vshlltq_m_n_s8): Likewise.
10123 (vshlltq_m_n_s16): Likewise.
10124 (vshlltq_m_n_u8): Likewise.
10125 (vshlltq_m_n_u16): Likewise.
10126 (vshrnbq_m_n_s32): Likewise.
10127 (vshrnbq_m_n_s16): Likewise.
10128 (vshrnbq_m_n_u32): Likewise.
10129 (vshrnbq_m_n_u16): Likewise.
10130 (vshrntq_m_n_s32): Likewise.
10131 (vshrntq_m_n_s16): Likewise.
10132 (vshrntq_m_n_u32): Likewise.
10133 (vshrntq_m_n_u16): Likewise.
10134 (__arm_vmlaldavaq_p_s32): Define intrinsic.
10135 (__arm_vmlaldavaq_p_s16): Likewise.
10136 (__arm_vmlaldavaq_p_u32): Likewise.
10137 (__arm_vmlaldavaq_p_u16): Likewise.
10138 (__arm_vmlaldavaxq_p_s32): Likewise.
10139 (__arm_vmlaldavaxq_p_s16): Likewise.
10140 (__arm_vmlaldavaxq_p_u32): Likewise.
10141 (__arm_vmlaldavaxq_p_u16): Likewise.
10142 (__arm_vmlsldavaq_p_s32): Likewise.
10143 (__arm_vmlsldavaq_p_s16): Likewise.
10144 (__arm_vmlsldavaxq_p_s32): Likewise.
10145 (__arm_vmlsldavaxq_p_s16): Likewise.
10146 (__arm_vmullbq_poly_m_p8): Likewise.
10147 (__arm_vmullbq_poly_m_p16): Likewise.
10148 (__arm_vmulltq_poly_m_p8): Likewise.
10149 (__arm_vmulltq_poly_m_p16): Likewise.
10150 (__arm_vqdmullbq_m_n_s32): Likewise.
10151 (__arm_vqdmullbq_m_n_s16): Likewise.
10152 (__arm_vqdmullbq_m_s32): Likewise.
10153 (__arm_vqdmullbq_m_s16): Likewise.
10154 (__arm_vqdmulltq_m_n_s32): Likewise.
10155 (__arm_vqdmulltq_m_n_s16): Likewise.
10156 (__arm_vqdmulltq_m_s32): Likewise.
10157 (__arm_vqdmulltq_m_s16): Likewise.
10158 (__arm_vqrshrnbq_m_n_s32): Likewise.
10159 (__arm_vqrshrnbq_m_n_s16): Likewise.
10160 (__arm_vqrshrnbq_m_n_u32): Likewise.
10161 (__arm_vqrshrnbq_m_n_u16): Likewise.
10162 (__arm_vqrshrntq_m_n_s32): Likewise.
10163 (__arm_vqrshrntq_m_n_s16): Likewise.
10164 (__arm_vqrshrntq_m_n_u32): Likewise.
10165 (__arm_vqrshrntq_m_n_u16): Likewise.
10166 (__arm_vqrshrunbq_m_n_s32): Likewise.
10167 (__arm_vqrshrunbq_m_n_s16): Likewise.
10168 (__arm_vqrshruntq_m_n_s32): Likewise.
10169 (__arm_vqrshruntq_m_n_s16): Likewise.
10170 (__arm_vqshrnbq_m_n_s32): Likewise.
10171 (__arm_vqshrnbq_m_n_s16): Likewise.
10172 (__arm_vqshrnbq_m_n_u32): Likewise.
10173 (__arm_vqshrnbq_m_n_u16): Likewise.
10174 (__arm_vqshrntq_m_n_s32): Likewise.
10175 (__arm_vqshrntq_m_n_s16): Likewise.
10176 (__arm_vqshrntq_m_n_u32): Likewise.
10177 (__arm_vqshrntq_m_n_u16): Likewise.
10178 (__arm_vqshrunbq_m_n_s32): Likewise.
10179 (__arm_vqshrunbq_m_n_s16): Likewise.
10180 (__arm_vqshruntq_m_n_s32): Likewise.
10181 (__arm_vqshruntq_m_n_s16): Likewise.
10182 (__arm_vrmlaldavhaq_p_s32): Likewise.
10183 (__arm_vrmlaldavhaq_p_u32): Likewise.
10184 (__arm_vrmlaldavhaxq_p_s32): Likewise.
10185 (__arm_vrmlsldavhaq_p_s32): Likewise.
10186 (__arm_vrmlsldavhaxq_p_s32): Likewise.
10187 (__arm_vrshrnbq_m_n_s32): Likewise.
10188 (__arm_vrshrnbq_m_n_s16): Likewise.
10189 (__arm_vrshrnbq_m_n_u32): Likewise.
10190 (__arm_vrshrnbq_m_n_u16): Likewise.
10191 (__arm_vrshrntq_m_n_s32): Likewise.
10192 (__arm_vrshrntq_m_n_s16): Likewise.
10193 (__arm_vrshrntq_m_n_u32): Likewise.
10194 (__arm_vrshrntq_m_n_u16): Likewise.
10195 (__arm_vshllbq_m_n_s8): Likewise.
10196 (__arm_vshllbq_m_n_s16): Likewise.
10197 (__arm_vshllbq_m_n_u8): Likewise.
10198 (__arm_vshllbq_m_n_u16): Likewise.
10199 (__arm_vshlltq_m_n_s8): Likewise.
10200 (__arm_vshlltq_m_n_s16): Likewise.
10201 (__arm_vshlltq_m_n_u8): Likewise.
10202 (__arm_vshlltq_m_n_u16): Likewise.
10203 (__arm_vshrnbq_m_n_s32): Likewise.
10204 (__arm_vshrnbq_m_n_s16): Likewise.
10205 (__arm_vshrnbq_m_n_u32): Likewise.
10206 (__arm_vshrnbq_m_n_u16): Likewise.
10207 (__arm_vshrntq_m_n_s32): Likewise.
10208 (__arm_vshrntq_m_n_s16): Likewise.
10209 (__arm_vshrntq_m_n_u32): Likewise.
10210 (__arm_vshrntq_m_n_u16): Likewise.
10211 (vmullbq_poly_m): Define polymorphic variant.
10212 (vmulltq_poly_m): Likewise.
10213 (vshllbq_m): Likewise.
10214 (vshrntq_m_n): Likewise.
10215 (vshrnbq_m_n): Likewise.
10216 (vshlltq_m_n): Likewise.
10217 (vshllbq_m_n): Likewise.
10218 (vrshrntq_m_n): Likewise.
10219 (vrshrnbq_m_n): Likewise.
10220 (vqshruntq_m_n): Likewise.
10221 (vqshrunbq_m_n): Likewise.
10222 (vqdmullbq_m_n): Likewise.
10223 (vqdmullbq_m): Likewise.
10224 (vqdmulltq_m_n): Likewise.
10225 (vqdmulltq_m): Likewise.
10226 (vqrshrnbq_m_n): Likewise.
10227 (vqrshrntq_m_n): Likewise.
10228 (vqrshrunbq_m_n): Likewise.
10229 (vqrshruntq_m_n): Likewise.
10230 (vqshrnbq_m_n): Likewise.
10231 (vqshrntq_m_n): Likewise.
10232 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10233 builtin qualifiers.
10234 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10235 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE): Likewise.
10236 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10237 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
10238 * config/arm/mve.md (VMLALDAVAQ_P): Define iterator.
10239 (VMLALDAVAXQ_P): Likewise.
10240 (VQRSHRNBQ_M_N): Likewise.
10241 (VQRSHRNTQ_M_N): Likewise.
10242 (VQSHRNBQ_M_N): Likewise.
10243 (VQSHRNTQ_M_N): Likewise.
10244 (VRSHRNBQ_M_N): Likewise.
10245 (VRSHRNTQ_M_N): Likewise.
10246 (VSHLLBQ_M_N): Likewise.
10247 (VSHLLTQ_M_N): Likewise.
10248 (VSHRNBQ_M_N): Likewise.
10249 (VSHRNTQ_M_N): Likewise.
10250 (mve_vmlaldavaq_p_<supf><mode>): Define RTL pattern.
10251 (mve_vmlaldavaxq_p_<supf><mode>): Likewise.
10252 (mve_vqrshrnbq_m_n_<supf><mode>): Likewise.
10253 (mve_vqrshrntq_m_n_<supf><mode>): Likewise.
10254 (mve_vqshrnbq_m_n_<supf><mode>): Likewise.
10255 (mve_vqshrntq_m_n_<supf><mode>): Likewise.
10256 (mve_vrmlaldavhaq_p_sv4si): Likewise.
10257 (mve_vrshrnbq_m_n_<supf><mode>): Likewise.
10258 (mve_vrshrntq_m_n_<supf><mode>): Likewise.
10259 (mve_vshllbq_m_n_<supf><mode>): Likewise.
10260 (mve_vshlltq_m_n_<supf><mode>): Likewise.
10261 (mve_vshrnbq_m_n_<supf><mode>): Likewise.
10262 (mve_vshrntq_m_n_<supf><mode>): Likewise.
10263 (mve_vmlsldavaq_p_s<mode>): Likewise.
10264 (mve_vmlsldavaxq_p_s<mode>): Likewise.
10265 (mve_vmullbq_poly_m_p<mode>): Likewise.
10266 (mve_vmulltq_poly_m_p<mode>): Likewise.
10267 (mve_vqdmullbq_m_n_s<mode>): Likewise.
10268 (mve_vqdmullbq_m_s<mode>): Likewise.
10269 (mve_vqdmulltq_m_n_s<mode>): Likewise.
10270 (mve_vqdmulltq_m_s<mode>): Likewise.
10271 (mve_vqrshrunbq_m_n_s<mode>): Likewise.
10272 (mve_vqrshruntq_m_n_s<mode>): Likewise.
10273 (mve_vqshrunbq_m_n_s<mode>): Likewise.
10274 (mve_vqshruntq_m_n_s<mode>): Likewise.
10275 (mve_vrmlaldavhaq_p_uv4si): Likewise.
10276 (mve_vrmlaldavhaxq_p_sv4si): Likewise.
10277 (mve_vrmlsldavhaq_p_sv4si): Likewise.
10278 (mve_vrmlsldavhaxq_p_sv4si): Likewise.
10280 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
10281 Mihail Ionescu <mihail.ionescu@arm.com>
10282 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
10284 * config/arm/arm_mve.h (vabdq_m_s8): Define macro.
10285 (vabdq_m_s32): Likewise.
10286 (vabdq_m_s16): Likewise.
10287 (vabdq_m_u8): Likewise.
10288 (vabdq_m_u32): Likewise.
10289 (vabdq_m_u16): Likewise.
10290 (vaddq_m_n_s8): Likewise.
10291 (vaddq_m_n_s32): Likewise.
10292 (vaddq_m_n_s16): Likewise.
10293 (vaddq_m_n_u8): Likewise.
10294 (vaddq_m_n_u32): Likewise.
10295 (vaddq_m_n_u16): Likewise.
10296 (vaddq_m_s8): Likewise.
10297 (vaddq_m_s32): Likewise.
10298 (vaddq_m_s16): Likewise.
10299 (vaddq_m_u8): Likewise.
10300 (vaddq_m_u32): Likewise.
10301 (vaddq_m_u16): Likewise.
10302 (vandq_m_s8): Likewise.
10303 (vandq_m_s32): Likewise.
10304 (vandq_m_s16): Likewise.
10305 (vandq_m_u8): Likewise.
10306 (vandq_m_u32): Likewise.
10307 (vandq_m_u16): Likewise.
10308 (vbicq_m_s8): Likewise.
10309 (vbicq_m_s32): Likewise.
10310 (vbicq_m_s16): Likewise.
10311 (vbicq_m_u8): Likewise.
10312 (vbicq_m_u32): Likewise.
10313 (vbicq_m_u16): Likewise.
10314 (vbrsrq_m_n_s8): Likewise.
10315 (vbrsrq_m_n_s32): Likewise.
10316 (vbrsrq_m_n_s16): Likewise.
10317 (vbrsrq_m_n_u8): Likewise.
10318 (vbrsrq_m_n_u32): Likewise.
10319 (vbrsrq_m_n_u16): Likewise.
10320 (vcaddq_rot270_m_s8): Likewise.
10321 (vcaddq_rot270_m_s32): Likewise.
10322 (vcaddq_rot270_m_s16): Likewise.
10323 (vcaddq_rot270_m_u8): Likewise.
10324 (vcaddq_rot270_m_u32): Likewise.
10325 (vcaddq_rot270_m_u16): Likewise.
10326 (vcaddq_rot90_m_s8): Likewise.
10327 (vcaddq_rot90_m_s32): Likewise.
10328 (vcaddq_rot90_m_s16): Likewise.
10329 (vcaddq_rot90_m_u8): Likewise.
10330 (vcaddq_rot90_m_u32): Likewise.
10331 (vcaddq_rot90_m_u16): Likewise.
10332 (veorq_m_s8): Likewise.
10333 (veorq_m_s32): Likewise.
10334 (veorq_m_s16): Likewise.
10335 (veorq_m_u8): Likewise.
10336 (veorq_m_u32): Likewise.
10337 (veorq_m_u16): Likewise.
10338 (vhaddq_m_n_s8): Likewise.
10339 (vhaddq_m_n_s32): Likewise.
10340 (vhaddq_m_n_s16): Likewise.
10341 (vhaddq_m_n_u8): Likewise.
10342 (vhaddq_m_n_u32): Likewise.
10343 (vhaddq_m_n_u16): Likewise.
10344 (vhaddq_m_s8): Likewise.
10345 (vhaddq_m_s32): Likewise.
10346 (vhaddq_m_s16): Likewise.
10347 (vhaddq_m_u8): Likewise.
10348 (vhaddq_m_u32): Likewise.
10349 (vhaddq_m_u16): Likewise.
10350 (vhcaddq_rot270_m_s8): Likewise.
10351 (vhcaddq_rot270_m_s32): Likewise.
10352 (vhcaddq_rot270_m_s16): Likewise.
10353 (vhcaddq_rot90_m_s8): Likewise.
10354 (vhcaddq_rot90_m_s32): Likewise.
10355 (vhcaddq_rot90_m_s16): Likewise.
10356 (vhsubq_m_n_s8): Likewise.
10357 (vhsubq_m_n_s32): Likewise.
10358 (vhsubq_m_n_s16): Likewise.
10359 (vhsubq_m_n_u8): Likewise.
10360 (vhsubq_m_n_u32): Likewise.
10361 (vhsubq_m_n_u16): Likewise.
10362 (vhsubq_m_s8): Likewise.
10363 (vhsubq_m_s32): Likewise.
10364 (vhsubq_m_s16): Likewise.
10365 (vhsubq_m_u8): Likewise.
10366 (vhsubq_m_u32): Likewise.
10367 (vhsubq_m_u16): Likewise.
10368 (vmaxq_m_s8): Likewise.
10369 (vmaxq_m_s32): Likewise.
10370 (vmaxq_m_s16): Likewise.
10371 (vmaxq_m_u8): Likewise.
10372 (vmaxq_m_u32): Likewise.
10373 (vmaxq_m_u16): Likewise.
10374 (vminq_m_s8): Likewise.
10375 (vminq_m_s32): Likewise.
10376 (vminq_m_s16): Likewise.
10377 (vminq_m_u8): Likewise.
10378 (vminq_m_u32): Likewise.
10379 (vminq_m_u16): Likewise.
10380 (vmladavaq_p_s8): Likewise.
10381 (vmladavaq_p_s32): Likewise.
10382 (vmladavaq_p_s16): Likewise.
10383 (vmladavaq_p_u8): Likewise.
10384 (vmladavaq_p_u32): Likewise.
10385 (vmladavaq_p_u16): Likewise.
10386 (vmladavaxq_p_s8): Likewise.
10387 (vmladavaxq_p_s32): Likewise.
10388 (vmladavaxq_p_s16): Likewise.
10389 (vmlaq_m_n_s8): Likewise.
10390 (vmlaq_m_n_s32): Likewise.
10391 (vmlaq_m_n_s16): Likewise.
10392 (vmlaq_m_n_u8): Likewise.
10393 (vmlaq_m_n_u32): Likewise.
10394 (vmlaq_m_n_u16): Likewise.
10395 (vmlasq_m_n_s8): Likewise.
10396 (vmlasq_m_n_s32): Likewise.
10397 (vmlasq_m_n_s16): Likewise.
10398 (vmlasq_m_n_u8): Likewise.
10399 (vmlasq_m_n_u32): Likewise.
10400 (vmlasq_m_n_u16): Likewise.
10401 (vmlsdavaq_p_s8): Likewise.
10402 (vmlsdavaq_p_s32): Likewise.
10403 (vmlsdavaq_p_s16): Likewise.
10404 (vmlsdavaxq_p_s8): Likewise.
10405 (vmlsdavaxq_p_s32): Likewise.
10406 (vmlsdavaxq_p_s16): Likewise.
10407 (vmulhq_m_s8): Likewise.
10408 (vmulhq_m_s32): Likewise.
10409 (vmulhq_m_s16): Likewise.
10410 (vmulhq_m_u8): Likewise.
10411 (vmulhq_m_u32): Likewise.
10412 (vmulhq_m_u16): Likewise.
10413 (vmullbq_int_m_s8): Likewise.
10414 (vmullbq_int_m_s32): Likewise.
10415 (vmullbq_int_m_s16): Likewise.
10416 (vmullbq_int_m_u8): Likewise.
10417 (vmullbq_int_m_u32): Likewise.
10418 (vmullbq_int_m_u16): Likewise.
10419 (vmulltq_int_m_s8): Likewise.
10420 (vmulltq_int_m_s32): Likewise.
10421 (vmulltq_int_m_s16): Likewise.
10422 (vmulltq_int_m_u8): Likewise.
10423 (vmulltq_int_m_u32): Likewise.
10424 (vmulltq_int_m_u16): Likewise.
10425 (vmulq_m_n_s8): Likewise.
10426 (vmulq_m_n_s32): Likewise.
10427 (vmulq_m_n_s16): Likewise.
10428 (vmulq_m_n_u8): Likewise.
10429 (vmulq_m_n_u32): Likewise.
10430 (vmulq_m_n_u16): Likewise.
10431 (vmulq_m_s8): Likewise.
10432 (vmulq_m_s32): Likewise.
10433 (vmulq_m_s16): Likewise.
10434 (vmulq_m_u8): Likewise.
10435 (vmulq_m_u32): Likewise.
10436 (vmulq_m_u16): Likewise.
10437 (vornq_m_s8): Likewise.
10438 (vornq_m_s32): Likewise.
10439 (vornq_m_s16): Likewise.
10440 (vornq_m_u8): Likewise.
10441 (vornq_m_u32): Likewise.
10442 (vornq_m_u16): Likewise.
10443 (vorrq_m_s8): Likewise.
10444 (vorrq_m_s32): Likewise.
10445 (vorrq_m_s16): Likewise.
10446 (vorrq_m_u8): Likewise.
10447 (vorrq_m_u32): Likewise.
10448 (vorrq_m_u16): Likewise.
10449 (vqaddq_m_n_s8): Likewise.
10450 (vqaddq_m_n_s32): Likewise.
10451 (vqaddq_m_n_s16): Likewise.
10452 (vqaddq_m_n_u8): Likewise.
10453 (vqaddq_m_n_u32): Likewise.
10454 (vqaddq_m_n_u16): Likewise.
10455 (vqaddq_m_s8): Likewise.
10456 (vqaddq_m_s32): Likewise.
10457 (vqaddq_m_s16): Likewise.
10458 (vqaddq_m_u8): Likewise.
10459 (vqaddq_m_u32): Likewise.
10460 (vqaddq_m_u16): Likewise.
10461 (vqdmladhq_m_s8): Likewise.
10462 (vqdmladhq_m_s32): Likewise.
10463 (vqdmladhq_m_s16): Likewise.
10464 (vqdmladhxq_m_s8): Likewise.
10465 (vqdmladhxq_m_s32): Likewise.
10466 (vqdmladhxq_m_s16): Likewise.
10467 (vqdmlahq_m_n_s8): Likewise.
10468 (vqdmlahq_m_n_s32): Likewise.
10469 (vqdmlahq_m_n_s16): Likewise.
10470 (vqdmlahq_m_n_u8): Likewise.
10471 (vqdmlahq_m_n_u32): Likewise.
10472 (vqdmlahq_m_n_u16): Likewise.
10473 (vqdmlsdhq_m_s8): Likewise.
10474 (vqdmlsdhq_m_s32): Likewise.
10475 (vqdmlsdhq_m_s16): Likewise.
10476 (vqdmlsdhxq_m_s8): Likewise.
10477 (vqdmlsdhxq_m_s32): Likewise.
10478 (vqdmlsdhxq_m_s16): Likewise.
10479 (vqdmulhq_m_n_s8): Likewise.
10480 (vqdmulhq_m_n_s32): Likewise.
10481 (vqdmulhq_m_n_s16): Likewise.
10482 (vqdmulhq_m_s8): Likewise.
10483 (vqdmulhq_m_s32): Likewise.
10484 (vqdmulhq_m_s16): Likewise.
10485 (vqrdmladhq_m_s8): Likewise.
10486 (vqrdmladhq_m_s32): Likewise.
10487 (vqrdmladhq_m_s16): Likewise.
10488 (vqrdmladhxq_m_s8): Likewise.
10489 (vqrdmladhxq_m_s32): Likewise.
10490 (vqrdmladhxq_m_s16): Likewise.
10491 (vqrdmlahq_m_n_s8): Likewise.
10492 (vqrdmlahq_m_n_s32): Likewise.
10493 (vqrdmlahq_m_n_s16): Likewise.
10494 (vqrdmlahq_m_n_u8): Likewise.
10495 (vqrdmlahq_m_n_u32): Likewise.
10496 (vqrdmlahq_m_n_u16): Likewise.
10497 (vqrdmlashq_m_n_s8): Likewise.
10498 (vqrdmlashq_m_n_s32): Likewise.
10499 (vqrdmlashq_m_n_s16): Likewise.
10500 (vqrdmlashq_m_n_u8): Likewise.
10501 (vqrdmlashq_m_n_u32): Likewise.
10502 (vqrdmlashq_m_n_u16): Likewise.
10503 (vqrdmlsdhq_m_s8): Likewise.
10504 (vqrdmlsdhq_m_s32): Likewise.
10505 (vqrdmlsdhq_m_s16): Likewise.
10506 (vqrdmlsdhxq_m_s8): Likewise.
10507 (vqrdmlsdhxq_m_s32): Likewise.
10508 (vqrdmlsdhxq_m_s16): Likewise.
10509 (vqrdmulhq_m_n_s8): Likewise.
10510 (vqrdmulhq_m_n_s32): Likewise.
10511 (vqrdmulhq_m_n_s16): Likewise.
10512 (vqrdmulhq_m_s8): Likewise.
10513 (vqrdmulhq_m_s32): Likewise.
10514 (vqrdmulhq_m_s16): Likewise.
10515 (vqrshlq_m_s8): Likewise.
10516 (vqrshlq_m_s32): Likewise.
10517 (vqrshlq_m_s16): Likewise.
10518 (vqrshlq_m_u8): Likewise.
10519 (vqrshlq_m_u32): Likewise.
10520 (vqrshlq_m_u16): Likewise.
10521 (vqshlq_m_n_s8): Likewise.
10522 (vqshlq_m_n_s32): Likewise.
10523 (vqshlq_m_n_s16): Likewise.
10524 (vqshlq_m_n_u8): Likewise.
10525 (vqshlq_m_n_u32): Likewise.
10526 (vqshlq_m_n_u16): Likewise.
10527 (vqshlq_m_s8): Likewise.
10528 (vqshlq_m_s32): Likewise.
10529 (vqshlq_m_s16): Likewise.
10530 (vqshlq_m_u8): Likewise.
10531 (vqshlq_m_u32): Likewise.
10532 (vqshlq_m_u16): Likewise.
10533 (vqsubq_m_n_s8): Likewise.
10534 (vqsubq_m_n_s32): Likewise.
10535 (vqsubq_m_n_s16): Likewise.
10536 (vqsubq_m_n_u8): Likewise.
10537 (vqsubq_m_n_u32): Likewise.
10538 (vqsubq_m_n_u16): Likewise.
10539 (vqsubq_m_s8): Likewise.
10540 (vqsubq_m_s32): Likewise.
10541 (vqsubq_m_s16): Likewise.
10542 (vqsubq_m_u8): Likewise.
10543 (vqsubq_m_u32): Likewise.
10544 (vqsubq_m_u16): Likewise.
10545 (vrhaddq_m_s8): Likewise.
10546 (vrhaddq_m_s32): Likewise.
10547 (vrhaddq_m_s16): Likewise.
10548 (vrhaddq_m_u8): Likewise.
10549 (vrhaddq_m_u32): Likewise.
10550 (vrhaddq_m_u16): Likewise.
10551 (vrmulhq_m_s8): Likewise.
10552 (vrmulhq_m_s32): Likewise.
10553 (vrmulhq_m_s16): Likewise.
10554 (vrmulhq_m_u8): Likewise.
10555 (vrmulhq_m_u32): Likewise.
10556 (vrmulhq_m_u16): Likewise.
10557 (vrshlq_m_s8): Likewise.
10558 (vrshlq_m_s32): Likewise.
10559 (vrshlq_m_s16): Likewise.
10560 (vrshlq_m_u8): Likewise.
10561 (vrshlq_m_u32): Likewise.
10562 (vrshlq_m_u16): Likewise.
10563 (vrshrq_m_n_s8): Likewise.
10564 (vrshrq_m_n_s32): Likewise.
10565 (vrshrq_m_n_s16): Likewise.
10566 (vrshrq_m_n_u8): Likewise.
10567 (vrshrq_m_n_u32): Likewise.
10568 (vrshrq_m_n_u16): Likewise.
10569 (vshlq_m_n_s8): Likewise.
10570 (vshlq_m_n_s32): Likewise.
10571 (vshlq_m_n_s16): Likewise.
10572 (vshlq_m_n_u8): Likewise.
10573 (vshlq_m_n_u32): Likewise.
10574 (vshlq_m_n_u16): Likewise.
10575 (vshrq_m_n_s8): Likewise.
10576 (vshrq_m_n_s32): Likewise.
10577 (vshrq_m_n_s16): Likewise.
10578 (vshrq_m_n_u8): Likewise.
10579 (vshrq_m_n_u32): Likewise.
10580 (vshrq_m_n_u16): Likewise.
10581 (vsliq_m_n_s8): Likewise.
10582 (vsliq_m_n_s32): Likewise.
10583 (vsliq_m_n_s16): Likewise.
10584 (vsliq_m_n_u8): Likewise.
10585 (vsliq_m_n_u32): Likewise.
10586 (vsliq_m_n_u16): Likewise.
10587 (vsubq_m_n_s8): Likewise.
10588 (vsubq_m_n_s32): Likewise.
10589 (vsubq_m_n_s16): Likewise.
10590 (vsubq_m_n_u8): Likewise.
10591 (vsubq_m_n_u32): Likewise.
10592 (vsubq_m_n_u16): Likewise.
10593 (__arm_vabdq_m_s8): Define intrinsic.
10594 (__arm_vabdq_m_s32): Likewise.
10595 (__arm_vabdq_m_s16): Likewise.
10596 (__arm_vabdq_m_u8): Likewise.
10597 (__arm_vabdq_m_u32): Likewise.
10598 (__arm_vabdq_m_u16): Likewise.
10599 (__arm_vaddq_m_n_s8): Likewise.
10600 (__arm_vaddq_m_n_s32): Likewise.
10601 (__arm_vaddq_m_n_s16): Likewise.
10602 (__arm_vaddq_m_n_u8): Likewise.
10603 (__arm_vaddq_m_n_u32): Likewise.
10604 (__arm_vaddq_m_n_u16): Likewise.
10605 (__arm_vaddq_m_s8): Likewise.
10606 (__arm_vaddq_m_s32): Likewise.
10607 (__arm_vaddq_m_s16): Likewise.
10608 (__arm_vaddq_m_u8): Likewise.
10609 (__arm_vaddq_m_u32): Likewise.
10610 (__arm_vaddq_m_u16): Likewise.
10611 (__arm_vandq_m_s8): Likewise.
10612 (__arm_vandq_m_s32): Likewise.
10613 (__arm_vandq_m_s16): Likewise.
10614 (__arm_vandq_m_u8): Likewise.
10615 (__arm_vandq_m_u32): Likewise.
10616 (__arm_vandq_m_u16): Likewise.
10617 (__arm_vbicq_m_s8): Likewise.
10618 (__arm_vbicq_m_s32): Likewise.
10619 (__arm_vbicq_m_s16): Likewise.
10620 (__arm_vbicq_m_u8): Likewise.
10621 (__arm_vbicq_m_u32): Likewise.
10622 (__arm_vbicq_m_u16): Likewise.
10623 (__arm_vbrsrq_m_n_s8): Likewise.
10624 (__arm_vbrsrq_m_n_s32): Likewise.
10625 (__arm_vbrsrq_m_n_s16): Likewise.
10626 (__arm_vbrsrq_m_n_u8): Likewise.
10627 (__arm_vbrsrq_m_n_u32): Likewise.
10628 (__arm_vbrsrq_m_n_u16): Likewise.
10629 (__arm_vcaddq_rot270_m_s8): Likewise.
10630 (__arm_vcaddq_rot270_m_s32): Likewise.
10631 (__arm_vcaddq_rot270_m_s16): Likewise.
10632 (__arm_vcaddq_rot270_m_u8): Likewise.
10633 (__arm_vcaddq_rot270_m_u32): Likewise.
10634 (__arm_vcaddq_rot270_m_u16): Likewise.
10635 (__arm_vcaddq_rot90_m_s8): Likewise.
10636 (__arm_vcaddq_rot90_m_s32): Likewise.
10637 (__arm_vcaddq_rot90_m_s16): Likewise.
10638 (__arm_vcaddq_rot90_m_u8): Likewise.
10639 (__arm_vcaddq_rot90_m_u32): Likewise.
10640 (__arm_vcaddq_rot90_m_u16): Likewise.
10641 (__arm_veorq_m_s8): Likewise.
10642 (__arm_veorq_m_s32): Likewise.
10643 (__arm_veorq_m_s16): Likewise.
10644 (__arm_veorq_m_u8): Likewise.
10645 (__arm_veorq_m_u32): Likewise.
10646 (__arm_veorq_m_u16): Likewise.
10647 (__arm_vhaddq_m_n_s8): Likewise.
10648 (__arm_vhaddq_m_n_s32): Likewise.
10649 (__arm_vhaddq_m_n_s16): Likewise.
10650 (__arm_vhaddq_m_n_u8): Likewise.
10651 (__arm_vhaddq_m_n_u32): Likewise.
10652 (__arm_vhaddq_m_n_u16): Likewise.
10653 (__arm_vhaddq_m_s8): Likewise.
10654 (__arm_vhaddq_m_s32): Likewise.
10655 (__arm_vhaddq_m_s16): Likewise.
10656 (__arm_vhaddq_m_u8): Likewise.
10657 (__arm_vhaddq_m_u32): Likewise.
10658 (__arm_vhaddq_m_u16): Likewise.
10659 (__arm_vhcaddq_rot270_m_s8): Likewise.
10660 (__arm_vhcaddq_rot270_m_s32): Likewise.
10661 (__arm_vhcaddq_rot270_m_s16): Likewise.
10662 (__arm_vhcaddq_rot90_m_s8): Likewise.
10663 (__arm_vhcaddq_rot90_m_s32): Likewise.
10664 (__arm_vhcaddq_rot90_m_s16): Likewise.
10665 (__arm_vhsubq_m_n_s8): Likewise.
10666 (__arm_vhsubq_m_n_s32): Likewise.
10667 (__arm_vhsubq_m_n_s16): Likewise.
10668 (__arm_vhsubq_m_n_u8): Likewise.
10669 (__arm_vhsubq_m_n_u32): Likewise.
10670 (__arm_vhsubq_m_n_u16): Likewise.
10671 (__arm_vhsubq_m_s8): Likewise.
10672 (__arm_vhsubq_m_s32): Likewise.
10673 (__arm_vhsubq_m_s16): Likewise.
10674 (__arm_vhsubq_m_u8): Likewise.
10675 (__arm_vhsubq_m_u32): Likewise.
10676 (__arm_vhsubq_m_u16): Likewise.
10677 (__arm_vmaxq_m_s8): Likewise.
10678 (__arm_vmaxq_m_s32): Likewise.
10679 (__arm_vmaxq_m_s16): Likewise.
10680 (__arm_vmaxq_m_u8): Likewise.
10681 (__arm_vmaxq_m_u32): Likewise.
10682 (__arm_vmaxq_m_u16): Likewise.
10683 (__arm_vminq_m_s8): Likewise.
10684 (__arm_vminq_m_s32): Likewise.
10685 (__arm_vminq_m_s16): Likewise.
10686 (__arm_vminq_m_u8): Likewise.
10687 (__arm_vminq_m_u32): Likewise.
10688 (__arm_vminq_m_u16): Likewise.
10689 (__arm_vmladavaq_p_s8): Likewise.
10690 (__arm_vmladavaq_p_s32): Likewise.
10691 (__arm_vmladavaq_p_s16): Likewise.
10692 (__arm_vmladavaq_p_u8): Likewise.
10693 (__arm_vmladavaq_p_u32): Likewise.
10694 (__arm_vmladavaq_p_u16): Likewise.
10695 (__arm_vmladavaxq_p_s8): Likewise.
10696 (__arm_vmladavaxq_p_s32): Likewise.
10697 (__arm_vmladavaxq_p_s16): Likewise.
10698 (__arm_vmlaq_m_n_s8): Likewise.
10699 (__arm_vmlaq_m_n_s32): Likewise.
10700 (__arm_vmlaq_m_n_s16): Likewise.
10701 (__arm_vmlaq_m_n_u8): Likewise.
10702 (__arm_vmlaq_m_n_u32): Likewise.
10703 (__arm_vmlaq_m_n_u16): Likewise.
10704 (__arm_vmlasq_m_n_s8): Likewise.
10705 (__arm_vmlasq_m_n_s32): Likewise.
10706 (__arm_vmlasq_m_n_s16): Likewise.
10707 (__arm_vmlasq_m_n_u8): Likewise.
10708 (__arm_vmlasq_m_n_u32): Likewise.
10709 (__arm_vmlasq_m_n_u16): Likewise.
10710 (__arm_vmlsdavaq_p_s8): Likewise.
10711 (__arm_vmlsdavaq_p_s32): Likewise.
10712 (__arm_vmlsdavaq_p_s16): Likewise.
10713 (__arm_vmlsdavaxq_p_s8): Likewise.
10714 (__arm_vmlsdavaxq_p_s32): Likewise.
10715 (__arm_vmlsdavaxq_p_s16): Likewise.
10716 (__arm_vmulhq_m_s8): Likewise.
10717 (__arm_vmulhq_m_s32): Likewise.
10718 (__arm_vmulhq_m_s16): Likewise.
10719 (__arm_vmulhq_m_u8): Likewise.
10720 (__arm_vmulhq_m_u32): Likewise.
10721 (__arm_vmulhq_m_u16): Likewise.
10722 (__arm_vmullbq_int_m_s8): Likewise.
10723 (__arm_vmullbq_int_m_s32): Likewise.
10724 (__arm_vmullbq_int_m_s16): Likewise.
10725 (__arm_vmullbq_int_m_u8): Likewise.
10726 (__arm_vmullbq_int_m_u32): Likewise.
10727 (__arm_vmullbq_int_m_u16): Likewise.
10728 (__arm_vmulltq_int_m_s8): Likewise.
10729 (__arm_vmulltq_int_m_s32): Likewise.
10730 (__arm_vmulltq_int_m_s16): Likewise.
10731 (__arm_vmulltq_int_m_u8): Likewise.
10732 (__arm_vmulltq_int_m_u32): Likewise.
10733 (__arm_vmulltq_int_m_u16): Likewise.
10734 (__arm_vmulq_m_n_s8): Likewise.
10735 (__arm_vmulq_m_n_s32): Likewise.
10736 (__arm_vmulq_m_n_s16): Likewise.
10737 (__arm_vmulq_m_n_u8): Likewise.
10738 (__arm_vmulq_m_n_u32): Likewise.
10739 (__arm_vmulq_m_n_u16): Likewise.
10740 (__arm_vmulq_m_s8): Likewise.
10741 (__arm_vmulq_m_s32): Likewise.
10742 (__arm_vmulq_m_s16): Likewise.
10743 (__arm_vmulq_m_u8): Likewise.
10744 (__arm_vmulq_m_u32): Likewise.
10745 (__arm_vmulq_m_u16): Likewise.
10746 (__arm_vornq_m_s8): Likewise.
10747 (__arm_vornq_m_s32): Likewise.
10748 (__arm_vornq_m_s16): Likewise.
10749 (__arm_vornq_m_u8): Likewise.
10750 (__arm_vornq_m_u32): Likewise.
10751 (__arm_vornq_m_u16): Likewise.
10752 (__arm_vorrq_m_s8): Likewise.
10753 (__arm_vorrq_m_s32): Likewise.
10754 (__arm_vorrq_m_s16): Likewise.
10755 (__arm_vorrq_m_u8): Likewise.
10756 (__arm_vorrq_m_u32): Likewise.
10757 (__arm_vorrq_m_u16): Likewise.
10758 (__arm_vqaddq_m_n_s8): Likewise.
10759 (__arm_vqaddq_m_n_s32): Likewise.
10760 (__arm_vqaddq_m_n_s16): Likewise.
10761 (__arm_vqaddq_m_n_u8): Likewise.
10762 (__arm_vqaddq_m_n_u32): Likewise.
10763 (__arm_vqaddq_m_n_u16): Likewise.
10764 (__arm_vqaddq_m_s8): Likewise.
10765 (__arm_vqaddq_m_s32): Likewise.
10766 (__arm_vqaddq_m_s16): Likewise.
10767 (__arm_vqaddq_m_u8): Likewise.
10768 (__arm_vqaddq_m_u32): Likewise.
10769 (__arm_vqaddq_m_u16): Likewise.
10770 (__arm_vqdmladhq_m_s8): Likewise.
10771 (__arm_vqdmladhq_m_s32): Likewise.
10772 (__arm_vqdmladhq_m_s16): Likewise.
10773 (__arm_vqdmladhxq_m_s8): Likewise.
10774 (__arm_vqdmladhxq_m_s32): Likewise.
10775 (__arm_vqdmladhxq_m_s16): Likewise.
10776 (__arm_vqdmlahq_m_n_s8): Likewise.
10777 (__arm_vqdmlahq_m_n_s32): Likewise.
10778 (__arm_vqdmlahq_m_n_s16): Likewise.
10779 (__arm_vqdmlahq_m_n_u8): Likewise.
10780 (__arm_vqdmlahq_m_n_u32): Likewise.
10781 (__arm_vqdmlahq_m_n_u16): Likewise.
10782 (__arm_vqdmlsdhq_m_s8): Likewise.
10783 (__arm_vqdmlsdhq_m_s32): Likewise.
10784 (__arm_vqdmlsdhq_m_s16): Likewise.
10785 (__arm_vqdmlsdhxq_m_s8): Likewise.
10786 (__arm_vqdmlsdhxq_m_s32): Likewise.
10787 (__arm_vqdmlsdhxq_m_s16): Likewise.
10788 (__arm_vqdmulhq_m_n_s8): Likewise.
10789 (__arm_vqdmulhq_m_n_s32): Likewise.
10790 (__arm_vqdmulhq_m_n_s16): Likewise.
10791 (__arm_vqdmulhq_m_s8): Likewise.
10792 (__arm_vqdmulhq_m_s32): Likewise.
10793 (__arm_vqdmulhq_m_s16): Likewise.
10794 (__arm_vqrdmladhq_m_s8): Likewise.
10795 (__arm_vqrdmladhq_m_s32): Likewise.
10796 (__arm_vqrdmladhq_m_s16): Likewise.
10797 (__arm_vqrdmladhxq_m_s8): Likewise.
10798 (__arm_vqrdmladhxq_m_s32): Likewise.
10799 (__arm_vqrdmladhxq_m_s16): Likewise.
10800 (__arm_vqrdmlahq_m_n_s8): Likewise.
10801 (__arm_vqrdmlahq_m_n_s32): Likewise.
10802 (__arm_vqrdmlahq_m_n_s16): Likewise.
10803 (__arm_vqrdmlahq_m_n_u8): Likewise.
10804 (__arm_vqrdmlahq_m_n_u32): Likewise.
10805 (__arm_vqrdmlahq_m_n_u16): Likewise.
10806 (__arm_vqrdmlashq_m_n_s8): Likewise.
10807 (__arm_vqrdmlashq_m_n_s32): Likewise.
10808 (__arm_vqrdmlashq_m_n_s16): Likewise.
10809 (__arm_vqrdmlashq_m_n_u8): Likewise.
10810 (__arm_vqrdmlashq_m_n_u32): Likewise.
10811 (__arm_vqrdmlashq_m_n_u16): Likewise.
10812 (__arm_vqrdmlsdhq_m_s8): Likewise.
10813 (__arm_vqrdmlsdhq_m_s32): Likewise.
10814 (__arm_vqrdmlsdhq_m_s16): Likewise.
10815 (__arm_vqrdmlsdhxq_m_s8): Likewise.
10816 (__arm_vqrdmlsdhxq_m_s32): Likewise.
10817 (__arm_vqrdmlsdhxq_m_s16): Likewise.
10818 (__arm_vqrdmulhq_m_n_s8): Likewise.
10819 (__arm_vqrdmulhq_m_n_s32): Likewise.
10820 (__arm_vqrdmulhq_m_n_s16): Likewise.
10821 (__arm_vqrdmulhq_m_s8): Likewise.
10822 (__arm_vqrdmulhq_m_s32): Likewise.
10823 (__arm_vqrdmulhq_m_s16): Likewise.
10824 (__arm_vqrshlq_m_s8): Likewise.
10825 (__arm_vqrshlq_m_s32): Likewise.
10826 (__arm_vqrshlq_m_s16): Likewise.
10827 (__arm_vqrshlq_m_u8): Likewise.
10828 (__arm_vqrshlq_m_u32): Likewise.
10829 (__arm_vqrshlq_m_u16): Likewise.
10830 (__arm_vqshlq_m_n_s8): Likewise.
10831 (__arm_vqshlq_m_n_s32): Likewise.
10832 (__arm_vqshlq_m_n_s16): Likewise.
10833 (__arm_vqshlq_m_n_u8): Likewise.
10834 (__arm_vqshlq_m_n_u32): Likewise.
10835 (__arm_vqshlq_m_n_u16): Likewise.
10836 (__arm_vqshlq_m_s8): Likewise.
10837 (__arm_vqshlq_m_s32): Likewise.
10838 (__arm_vqshlq_m_s16): Likewise.
10839 (__arm_vqshlq_m_u8): Likewise.
10840 (__arm_vqshlq_m_u32): Likewise.
10841 (__arm_vqshlq_m_u16): Likewise.
10842 (__arm_vqsubq_m_n_s8): Likewise.
10843 (__arm_vqsubq_m_n_s32): Likewise.
10844 (__arm_vqsubq_m_n_s16): Likewise.
10845 (__arm_vqsubq_m_n_u8): Likewise.
10846 (__arm_vqsubq_m_n_u32): Likewise.
10847 (__arm_vqsubq_m_n_u16): Likewise.
10848 (__arm_vqsubq_m_s8): Likewise.
10849 (__arm_vqsubq_m_s32): Likewise.
10850 (__arm_vqsubq_m_s16): Likewise.
10851 (__arm_vqsubq_m_u8): Likewise.
10852 (__arm_vqsubq_m_u32): Likewise.
10853 (__arm_vqsubq_m_u16): Likewise.
10854 (__arm_vrhaddq_m_s8): Likewise.
10855 (__arm_vrhaddq_m_s32): Likewise.
10856 (__arm_vrhaddq_m_s16): Likewise.
10857 (__arm_vrhaddq_m_u8): Likewise.
10858 (__arm_vrhaddq_m_u32): Likewise.
10859 (__arm_vrhaddq_m_u16): Likewise.
10860 (__arm_vrmulhq_m_s8): Likewise.
10861 (__arm_vrmulhq_m_s32): Likewise.
10862 (__arm_vrmulhq_m_s16): Likewise.
10863 (__arm_vrmulhq_m_u8): Likewise.
10864 (__arm_vrmulhq_m_u32): Likewise.
10865 (__arm_vrmulhq_m_u16): Likewise.
10866 (__arm_vrshlq_m_s8): Likewise.
10867 (__arm_vrshlq_m_s32): Likewise.
10868 (__arm_vrshlq_m_s16): Likewise.
10869 (__arm_vrshlq_m_u8): Likewise.
10870 (__arm_vrshlq_m_u32): Likewise.
10871 (__arm_vrshlq_m_u16): Likewise.
10872 (__arm_vrshrq_m_n_s8): Likewise.
10873 (__arm_vrshrq_m_n_s32): Likewise.
10874 (__arm_vrshrq_m_n_s16): Likewise.
10875 (__arm_vrshrq_m_n_u8): Likewise.
10876 (__arm_vrshrq_m_n_u32): Likewise.
10877 (__arm_vrshrq_m_n_u16): Likewise.
10878 (__arm_vshlq_m_n_s8): Likewise.
10879 (__arm_vshlq_m_n_s32): Likewise.
10880 (__arm_vshlq_m_n_s16): Likewise.
10881 (__arm_vshlq_m_n_u8): Likewise.
10882 (__arm_vshlq_m_n_u32): Likewise.
10883 (__arm_vshlq_m_n_u16): Likewise.
10884 (__arm_vshrq_m_n_s8): Likewise.
10885 (__arm_vshrq_m_n_s32): Likewise.
10886 (__arm_vshrq_m_n_s16): Likewise.
10887 (__arm_vshrq_m_n_u8): Likewise.
10888 (__arm_vshrq_m_n_u32): Likewise.
10889 (__arm_vshrq_m_n_u16): Likewise.
10890 (__arm_vsliq_m_n_s8): Likewise.
10891 (__arm_vsliq_m_n_s32): Likewise.
10892 (__arm_vsliq_m_n_s16): Likewise.
10893 (__arm_vsliq_m_n_u8): Likewise.
10894 (__arm_vsliq_m_n_u32): Likewise.
10895 (__arm_vsliq_m_n_u16): Likewise.
10896 (__arm_vsubq_m_n_s8): Likewise.
10897 (__arm_vsubq_m_n_s32): Likewise.
10898 (__arm_vsubq_m_n_s16): Likewise.
10899 (__arm_vsubq_m_n_u8): Likewise.
10900 (__arm_vsubq_m_n_u32): Likewise.
10901 (__arm_vsubq_m_n_u16): Likewise.
10902 (vqdmladhq_m): Define polymorphic variant.
10903 (vqdmladhxq_m): Likewise.
10904 (vqdmlsdhq_m): Likewise.
10905 (vqdmlsdhxq_m): Likewise.
10906 (vabdq_m): Likewise.
10907 (vandq_m): Likewise.
10908 (vbicq_m): Likewise.
10909 (vbrsrq_m_n): Likewise.
10910 (vcaddq_rot270_m): Likewise.
10911 (vcaddq_rot90_m): Likewise.
10912 (veorq_m): Likewise.
10913 (vmaxq_m): Likewise.
10914 (vminq_m): Likewise.
10915 (vmladavaq_p): Likewise.
10916 (vmlaq_m_n): Likewise.
10917 (vmlasq_m_n): Likewise.
10918 (vmulhq_m): Likewise.
10919 (vmullbq_int_m): Likewise.
10920 (vmulltq_int_m): Likewise.
10921 (vornq_m): Likewise.
10922 (vorrq_m): Likewise.
10923 (vqdmlahq_m_n): Likewise.
10924 (vqrdmlahq_m_n): Likewise.
10925 (vqrdmlashq_m_n): Likewise.
10926 (vqrshlq_m): Likewise.
10927 (vqshlq_m_n): Likewise.
10928 (vqshlq_m): Likewise.
10929 (vrhaddq_m): Likewise.
10930 (vrmulhq_m): Likewise.
10931 (vrshlq_m): Likewise.
10932 (vrshrq_m_n): Likewise.
10933 (vshlq_m_n): Likewise.
10934 (vshrq_m_n): Likewise.
10935 (vsliq_m): Likewise.
10936 (vaddq_m_n): Likewise.
10937 (vaddq_m): Likewise.
10938 (vhaddq_m_n): Likewise.
10939 (vhaddq_m): Likewise.
10940 (vhcaddq_rot270_m): Likewise.
10941 (vhcaddq_rot90_m): Likewise.
10942 (vhsubq_m): Likewise.
10943 (vhsubq_m_n): Likewise.
10944 (vmulq_m_n): Likewise.
10945 (vmulq_m): Likewise.
10946 (vqaddq_m_n): Likewise.
10947 (vqaddq_m): Likewise.
10948 (vqdmulhq_m_n): Likewise.
10949 (vqdmulhq_m): Likewise.
10950 (vsubq_m_n): Likewise.
10951 (vsliq_m_n): Likewise.
10952 (vqsubq_m_n): Likewise.
10953 (vqsubq_m): Likewise.
10954 (vqrdmulhq_m): Likewise.
10955 (vqrdmulhq_m_n): Likewise.
10956 (vqrdmlsdhxq_m): Likewise.
10957 (vqrdmlsdhq_m): Likewise.
10958 (vqrdmladhq_m): Likewise.
10959 (vqrdmladhxq_m): Likewise.
10960 (vmlsdavaxq_p): Likewise.
10961 (vmlsdavaq_p): Likewise.
10962 (vmladavaxq_p): Likewise.
10963 * config/arm/arm_mve_builtins.def (QUADOP_NONE_NONE_NONE_IMM_UNONE): Use
10965 (QUADOP_NONE_NONE_NONE_NONE_UNONE): Likewise.
10966 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE): Likewise.
10967 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE): Likewise.
10968 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE): Likewise.
10969 * config/arm/mve.md (VHSUBQ_M): Define iterators.
10970 (VSLIQ_M_N): Likewise.
10971 (VQRDMLAHQ_M_N): Likewise.
10972 (VRSHLQ_M): Likewise.
10973 (VMINQ_M): Likewise.
10974 (VMULLBQ_INT_M): Likewise.
10975 (VMULHQ_M): Likewise.
10976 (VMULQ_M): Likewise.
10977 (VHSUBQ_M_N): Likewise.
10978 (VHADDQ_M_N): Likewise.
10979 (VORRQ_M): Likewise.
10980 (VRMULHQ_M): Likewise.
10981 (VQADDQ_M): Likewise.
10982 (VRSHRQ_M_N): Likewise.
10983 (VQSUBQ_M_N): Likewise.
10984 (VADDQ_M): Likewise.
10985 (VORNQ_M): Likewise.
10986 (VQDMLAHQ_M_N): Likewise.
10987 (VRHADDQ_M): Likewise.
10988 (VQSHLQ_M): Likewise.
10989 (VANDQ_M): Likewise.
10990 (VBICQ_M): Likewise.
10991 (VSHLQ_M_N): Likewise.
10992 (VCADDQ_ROT270_M): Likewise.
10993 (VQRSHLQ_M): Likewise.
10994 (VQADDQ_M_N): Likewise.
10995 (VADDQ_M_N): Likewise.
10996 (VMAXQ_M): Likewise.
10997 (VQSUBQ_M): Likewise.
10998 (VMLASQ_M_N): Likewise.
10999 (VMLADAVAQ_P): Likewise.
11000 (VBRSRQ_M_N): Likewise.
11001 (VMULQ_M_N): Likewise.
11002 (VCADDQ_ROT90_M): Likewise.
11003 (VMULLTQ_INT_M): Likewise.
11004 (VEORQ_M): Likewise.
11005 (VSHRQ_M_N): Likewise.
11006 (VSUBQ_M_N): Likewise.
11007 (VHADDQ_M): Likewise.
11008 (VABDQ_M): Likewise.
11009 (VQRDMLASHQ_M_N): Likewise.
11010 (VMLAQ_M_N): Likewise.
11011 (VQSHLQ_M_N): Likewise.
11012 (mve_vabdq_m_<supf><mode>): Define RTL pattern.
11013 (mve_vaddq_m_n_<supf><mode>): Likewise.
11014 (mve_vaddq_m_<supf><mode>): Likewise.
11015 (mve_vandq_m_<supf><mode>): Likewise.
11016 (mve_vbicq_m_<supf><mode>): Likewise.
11017 (mve_vbrsrq_m_n_<supf><mode>): Likewise.
11018 (mve_vcaddq_rot270_m_<supf><mode>): Likewise.
11019 (mve_vcaddq_rot90_m_<supf><mode>): Likewise.
11020 (mve_veorq_m_<supf><mode>): Likewise.
11021 (mve_vhaddq_m_n_<supf><mode>): Likewise.
11022 (mve_vhaddq_m_<supf><mode>): Likewise.
11023 (mve_vhsubq_m_n_<supf><mode>): Likewise.
11024 (mve_vhsubq_m_<supf><mode>): Likewise.
11025 (mve_vmaxq_m_<supf><mode>): Likewise.
11026 (mve_vminq_m_<supf><mode>): Likewise.
11027 (mve_vmladavaq_p_<supf><mode>): Likewise.
11028 (mve_vmlaq_m_n_<supf><mode>): Likewise.
11029 (mve_vmlasq_m_n_<supf><mode>): Likewise.
11030 (mve_vmulhq_m_<supf><mode>): Likewise.
11031 (mve_vmullbq_int_m_<supf><mode>): Likewise.
11032 (mve_vmulltq_int_m_<supf><mode>): Likewise.
11033 (mve_vmulq_m_n_<supf><mode>): Likewise.
11034 (mve_vmulq_m_<supf><mode>): Likewise.
11035 (mve_vornq_m_<supf><mode>): Likewise.
11036 (mve_vorrq_m_<supf><mode>): Likewise.
11037 (mve_vqaddq_m_n_<supf><mode>): Likewise.
11038 (mve_vqaddq_m_<supf><mode>): Likewise.
11039 (mve_vqdmlahq_m_n_<supf><mode>): Likewise.
11040 (mve_vqrdmlahq_m_n_<supf><mode>): Likewise.
11041 (mve_vqrdmlashq_m_n_<supf><mode>): Likewise.
11042 (mve_vqrshlq_m_<supf><mode>): Likewise.
11043 (mve_vqshlq_m_n_<supf><mode>): Likewise.
11044 (mve_vqshlq_m_<supf><mode>): Likewise.
11045 (mve_vqsubq_m_n_<supf><mode>): Likewise.
11046 (mve_vqsubq_m_<supf><mode>): Likewise.
11047 (mve_vrhaddq_m_<supf><mode>): Likewise.
11048 (mve_vrmulhq_m_<supf><mode>): Likewise.
11049 (mve_vrshlq_m_<supf><mode>): Likewise.
11050 (mve_vrshrq_m_n_<supf><mode>): Likewise.
11051 (mve_vshlq_m_n_<supf><mode>): Likewise.
11052 (mve_vshrq_m_n_<supf><mode>): Likewise.
11053 (mve_vsliq_m_n_<supf><mode>): Likewise.
11054 (mve_vsubq_m_n_<supf><mode>): Likewise.
11055 (mve_vhcaddq_rot270_m_s<mode>): Likewise.
11056 (mve_vhcaddq_rot90_m_s<mode>): Likewise.
11057 (mve_vmladavaxq_p_s<mode>): Likewise.
11058 (mve_vmlsdavaq_p_s<mode>): Likewise.
11059 (mve_vmlsdavaxq_p_s<mode>): Likewise.
11060 (mve_vqdmladhq_m_s<mode>): Likewise.
11061 (mve_vqdmladhxq_m_s<mode>): Likewise.
11062 (mve_vqdmlsdhq_m_s<mode>): Likewise.
11063 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
11064 (mve_vqdmulhq_m_n_s<mode>): Likewise.
11065 (mve_vqdmulhq_m_s<mode>): Likewise.
11066 (mve_vqrdmladhq_m_s<mode>): Likewise.
11067 (mve_vqrdmladhxq_m_s<mode>): Likewise.
11068 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
11069 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
11070 (mve_vqrdmulhq_m_n_s<mode>): Likewise.
11071 (mve_vqrdmulhq_m_s<mode>): Likewise.
11073 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11074 Mihail Ionescu <mihail.ionescu@arm.com>
11075 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11077 * config/arm/arm-builtins.c (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS):
11078 Define builtin qualifier.
11079 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11080 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11081 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11082 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11083 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11084 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11085 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11086 * config/arm/arm_mve.h (vsriq_m_n_s8): Define macro.
11087 (vsubq_m_s8): Likewise.
11088 (vcvtq_m_n_f16_u16): Likewise.
11089 (vqshluq_m_n_s8): Likewise.
11090 (vabavq_p_s8): Likewise.
11091 (vsriq_m_n_u8): Likewise.
11092 (vshlq_m_u8): Likewise.
11093 (vsubq_m_u8): Likewise.
11094 (vabavq_p_u8): Likewise.
11095 (vshlq_m_s8): Likewise.
11096 (vcvtq_m_n_f16_s16): Likewise.
11097 (vsriq_m_n_s16): Likewise.
11098 (vsubq_m_s16): Likewise.
11099 (vcvtq_m_n_f32_u32): Likewise.
11100 (vqshluq_m_n_s16): Likewise.
11101 (vabavq_p_s16): Likewise.
11102 (vsriq_m_n_u16): Likewise.
11103 (vshlq_m_u16): Likewise.
11104 (vsubq_m_u16): Likewise.
11105 (vabavq_p_u16): Likewise.
11106 (vshlq_m_s16): Likewise.
11107 (vcvtq_m_n_f32_s32): Likewise.
11108 (vsriq_m_n_s32): Likewise.
11109 (vsubq_m_s32): Likewise.
11110 (vqshluq_m_n_s32): Likewise.
11111 (vabavq_p_s32): Likewise.
11112 (vsriq_m_n_u32): Likewise.
11113 (vshlq_m_u32): Likewise.
11114 (vsubq_m_u32): Likewise.
11115 (vabavq_p_u32): Likewise.
11116 (vshlq_m_s32): Likewise.
11117 (__arm_vsriq_m_n_s8): Define intrinsic.
11118 (__arm_vsubq_m_s8): Likewise.
11119 (__arm_vqshluq_m_n_s8): Likewise.
11120 (__arm_vabavq_p_s8): Likewise.
11121 (__arm_vsriq_m_n_u8): Likewise.
11122 (__arm_vshlq_m_u8): Likewise.
11123 (__arm_vsubq_m_u8): Likewise.
11124 (__arm_vabavq_p_u8): Likewise.
11125 (__arm_vshlq_m_s8): Likewise.
11126 (__arm_vsriq_m_n_s16): Likewise.
11127 (__arm_vsubq_m_s16): Likewise.
11128 (__arm_vqshluq_m_n_s16): Likewise.
11129 (__arm_vabavq_p_s16): Likewise.
11130 (__arm_vsriq_m_n_u16): Likewise.
11131 (__arm_vshlq_m_u16): Likewise.
11132 (__arm_vsubq_m_u16): Likewise.
11133 (__arm_vabavq_p_u16): Likewise.
11134 (__arm_vshlq_m_s16): Likewise.
11135 (__arm_vsriq_m_n_s32): Likewise.
11136 (__arm_vsubq_m_s32): Likewise.
11137 (__arm_vqshluq_m_n_s32): Likewise.
11138 (__arm_vabavq_p_s32): Likewise.
11139 (__arm_vsriq_m_n_u32): Likewise.
11140 (__arm_vshlq_m_u32): Likewise.
11141 (__arm_vsubq_m_u32): Likewise.
11142 (__arm_vabavq_p_u32): Likewise.
11143 (__arm_vshlq_m_s32): Likewise.
11144 (__arm_vcvtq_m_n_f16_u16): Likewise.
11145 (__arm_vcvtq_m_n_f16_s16): Likewise.
11146 (__arm_vcvtq_m_n_f32_u32): Likewise.
11147 (__arm_vcvtq_m_n_f32_s32): Likewise.
11148 (vcvtq_m_n): Define polymorphic variant.
11149 (vqshluq_m_n): Likewise.
11150 (vshlq_m): Likewise.
11151 (vsriq_m_n): Likewise.
11152 (vsubq_m): Likewise.
11153 (vabavq_p): Likewise.
11154 * config/arm/arm_mve_builtins.def
11155 (QUADOP_UNONE_UNONE_NONE_NONE_UNONE_QUALIFIERS): Use builtin qualifier.
11156 (QUADOP_NONE_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
11157 (QUADOP_NONE_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11158 (QUADOP_UNONE_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
11159 (QUADOP_UNONE_UNONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
11160 (QUADOP_NONE_NONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11161 (QUADOP_UNONE_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
11162 (QUADOP_UNONE_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
11163 * config/arm/mve.md (VABAVQ_P): Define iterator.
11164 (VSHLQ_M): Likewise.
11165 (VSRIQ_M_N): Likewise.
11166 (VSUBQ_M): Likewise.
11167 (VCVTQ_M_N_TO_F): Likewise.
11168 (mve_vabavq_p_<supf><mode>): Define RTL pattern.
11169 (mve_vqshluq_m_n_s<mode>): Likewise.
11170 (mve_vshlq_m_<supf><mode>): Likewise.
11171 (mve_vsriq_m_n_<supf><mode>): Likewise.
11172 (mve_vsubq_m_<supf><mode>): Likewise.
11173 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
11175 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11176 Mihail Ionescu <mihail.ionescu@arm.com>
11177 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11179 * config/arm/arm_mve.h (vrmlaldavhaxq_s32): Define macro.
11180 (vrmlsldavhaq_s32): Likewise.
11181 (vrmlsldavhaxq_s32): Likewise.
11182 (vaddlvaq_p_s32): Likewise.
11183 (vcvtbq_m_f16_f32): Likewise.
11184 (vcvtbq_m_f32_f16): Likewise.
11185 (vcvttq_m_f16_f32): Likewise.
11186 (vcvttq_m_f32_f16): Likewise.
11187 (vrev16q_m_s8): Likewise.
11188 (vrev32q_m_f16): Likewise.
11189 (vrmlaldavhq_p_s32): Likewise.
11190 (vrmlaldavhxq_p_s32): Likewise.
11191 (vrmlsldavhq_p_s32): Likewise.
11192 (vrmlsldavhxq_p_s32): Likewise.
11193 (vaddlvaq_p_u32): Likewise.
11194 (vrev16q_m_u8): Likewise.
11195 (vrmlaldavhq_p_u32): Likewise.
11196 (vmvnq_m_n_s16): Likewise.
11197 (vorrq_m_n_s16): Likewise.
11198 (vqrshrntq_n_s16): Likewise.
11199 (vqshrnbq_n_s16): Likewise.
11200 (vqshrntq_n_s16): Likewise.
11201 (vrshrnbq_n_s16): Likewise.
11202 (vrshrntq_n_s16): Likewise.
11203 (vshrnbq_n_s16): Likewise.
11204 (vshrntq_n_s16): Likewise.
11205 (vcmlaq_f16): Likewise.
11206 (vcmlaq_rot180_f16): Likewise.
11207 (vcmlaq_rot270_f16): Likewise.
11208 (vcmlaq_rot90_f16): Likewise.
11209 (vfmaq_f16): Likewise.
11210 (vfmaq_n_f16): Likewise.
11211 (vfmasq_n_f16): Likewise.
11212 (vfmsq_f16): Likewise.
11213 (vmlaldavaq_s16): Likewise.
11214 (vmlaldavaxq_s16): Likewise.
11215 (vmlsldavaq_s16): Likewise.
11216 (vmlsldavaxq_s16): Likewise.
11217 (vabsq_m_f16): Likewise.
11218 (vcvtmq_m_s16_f16): Likewise.
11219 (vcvtnq_m_s16_f16): Likewise.
11220 (vcvtpq_m_s16_f16): Likewise.
11221 (vcvtq_m_s16_f16): Likewise.
11222 (vdupq_m_n_f16): Likewise.
11223 (vmaxnmaq_m_f16): Likewise.
11224 (vmaxnmavq_p_f16): Likewise.
11225 (vmaxnmvq_p_f16): Likewise.
11226 (vminnmaq_m_f16): Likewise.
11227 (vminnmavq_p_f16): Likewise.
11228 (vminnmvq_p_f16): Likewise.
11229 (vmlaldavq_p_s16): Likewise.
11230 (vmlaldavxq_p_s16): Likewise.
11231 (vmlsldavq_p_s16): Likewise.
11232 (vmlsldavxq_p_s16): Likewise.
11233 (vmovlbq_m_s8): Likewise.
11234 (vmovltq_m_s8): Likewise.
11235 (vmovnbq_m_s16): Likewise.
11236 (vmovntq_m_s16): Likewise.
11237 (vnegq_m_f16): Likewise.
11238 (vpselq_f16): Likewise.
11239 (vqmovnbq_m_s16): Likewise.
11240 (vqmovntq_m_s16): Likewise.
11241 (vrev32q_m_s8): Likewise.
11242 (vrev64q_m_f16): Likewise.
11243 (vrndaq_m_f16): Likewise.
11244 (vrndmq_m_f16): Likewise.
11245 (vrndnq_m_f16): Likewise.
11246 (vrndpq_m_f16): Likewise.
11247 (vrndq_m_f16): Likewise.
11248 (vrndxq_m_f16): Likewise.
11249 (vcmpeqq_m_n_f16): Likewise.
11250 (vcmpgeq_m_f16): Likewise.
11251 (vcmpgeq_m_n_f16): Likewise.
11252 (vcmpgtq_m_f16): Likewise.
11253 (vcmpgtq_m_n_f16): Likewise.
11254 (vcmpleq_m_f16): Likewise.
11255 (vcmpleq_m_n_f16): Likewise.
11256 (vcmpltq_m_f16): Likewise.
11257 (vcmpltq_m_n_f16): Likewise.
11258 (vcmpneq_m_f16): Likewise.
11259 (vcmpneq_m_n_f16): Likewise.
11260 (vmvnq_m_n_u16): Likewise.
11261 (vorrq_m_n_u16): Likewise.
11262 (vqrshruntq_n_s16): Likewise.
11263 (vqshrunbq_n_s16): Likewise.
11264 (vqshruntq_n_s16): Likewise.
11265 (vcvtmq_m_u16_f16): Likewise.
11266 (vcvtnq_m_u16_f16): Likewise.
11267 (vcvtpq_m_u16_f16): Likewise.
11268 (vcvtq_m_u16_f16): Likewise.
11269 (vqmovunbq_m_s16): Likewise.
11270 (vqmovuntq_m_s16): Likewise.
11271 (vqrshrntq_n_u16): Likewise.
11272 (vqshrnbq_n_u16): Likewise.
11273 (vqshrntq_n_u16): Likewise.
11274 (vrshrnbq_n_u16): Likewise.
11275 (vrshrntq_n_u16): Likewise.
11276 (vshrnbq_n_u16): Likewise.
11277 (vshrntq_n_u16): Likewise.
11278 (vmlaldavaq_u16): Likewise.
11279 (vmlaldavaxq_u16): Likewise.
11280 (vmlaldavq_p_u16): Likewise.
11281 (vmlaldavxq_p_u16): Likewise.
11282 (vmovlbq_m_u8): Likewise.
11283 (vmovltq_m_u8): Likewise.
11284 (vmovnbq_m_u16): Likewise.
11285 (vmovntq_m_u16): Likewise.
11286 (vqmovnbq_m_u16): Likewise.
11287 (vqmovntq_m_u16): Likewise.
11288 (vrev32q_m_u8): Likewise.
11289 (vmvnq_m_n_s32): Likewise.
11290 (vorrq_m_n_s32): Likewise.
11291 (vqrshrntq_n_s32): Likewise.
11292 (vqshrnbq_n_s32): Likewise.
11293 (vqshrntq_n_s32): Likewise.
11294 (vrshrnbq_n_s32): Likewise.
11295 (vrshrntq_n_s32): Likewise.
11296 (vshrnbq_n_s32): Likewise.
11297 (vshrntq_n_s32): Likewise.
11298 (vcmlaq_f32): Likewise.
11299 (vcmlaq_rot180_f32): Likewise.
11300 (vcmlaq_rot270_f32): Likewise.
11301 (vcmlaq_rot90_f32): Likewise.
11302 (vfmaq_f32): Likewise.
11303 (vfmaq_n_f32): Likewise.
11304 (vfmasq_n_f32): Likewise.
11305 (vfmsq_f32): Likewise.
11306 (vmlaldavaq_s32): Likewise.
11307 (vmlaldavaxq_s32): Likewise.
11308 (vmlsldavaq_s32): Likewise.
11309 (vmlsldavaxq_s32): Likewise.
11310 (vabsq_m_f32): Likewise.
11311 (vcvtmq_m_s32_f32): Likewise.
11312 (vcvtnq_m_s32_f32): Likewise.
11313 (vcvtpq_m_s32_f32): Likewise.
11314 (vcvtq_m_s32_f32): Likewise.
11315 (vdupq_m_n_f32): Likewise.
11316 (vmaxnmaq_m_f32): Likewise.
11317 (vmaxnmavq_p_f32): Likewise.
11318 (vmaxnmvq_p_f32): Likewise.
11319 (vminnmaq_m_f32): Likewise.
11320 (vminnmavq_p_f32): Likewise.
11321 (vminnmvq_p_f32): Likewise.
11322 (vmlaldavq_p_s32): Likewise.
11323 (vmlaldavxq_p_s32): Likewise.
11324 (vmlsldavq_p_s32): Likewise.
11325 (vmlsldavxq_p_s32): Likewise.
11326 (vmovlbq_m_s16): Likewise.
11327 (vmovltq_m_s16): Likewise.
11328 (vmovnbq_m_s32): Likewise.
11329 (vmovntq_m_s32): Likewise.
11330 (vnegq_m_f32): Likewise.
11331 (vpselq_f32): Likewise.
11332 (vqmovnbq_m_s32): Likewise.
11333 (vqmovntq_m_s32): Likewise.
11334 (vrev32q_m_s16): Likewise.
11335 (vrev64q_m_f32): Likewise.
11336 (vrndaq_m_f32): Likewise.
11337 (vrndmq_m_f32): Likewise.
11338 (vrndnq_m_f32): Likewise.
11339 (vrndpq_m_f32): Likewise.
11340 (vrndq_m_f32): Likewise.
11341 (vrndxq_m_f32): Likewise.
11342 (vcmpeqq_m_n_f32): Likewise.
11343 (vcmpgeq_m_f32): Likewise.
11344 (vcmpgeq_m_n_f32): Likewise.
11345 (vcmpgtq_m_f32): Likewise.
11346 (vcmpgtq_m_n_f32): Likewise.
11347 (vcmpleq_m_f32): Likewise.
11348 (vcmpleq_m_n_f32): Likewise.
11349 (vcmpltq_m_f32): Likewise.
11350 (vcmpltq_m_n_f32): Likewise.
11351 (vcmpneq_m_f32): Likewise.
11352 (vcmpneq_m_n_f32): Likewise.
11353 (vmvnq_m_n_u32): Likewise.
11354 (vorrq_m_n_u32): Likewise.
11355 (vqrshruntq_n_s32): Likewise.
11356 (vqshrunbq_n_s32): Likewise.
11357 (vqshruntq_n_s32): Likewise.
11358 (vcvtmq_m_u32_f32): Likewise.
11359 (vcvtnq_m_u32_f32): Likewise.
11360 (vcvtpq_m_u32_f32): Likewise.
11361 (vcvtq_m_u32_f32): Likewise.
11362 (vqmovunbq_m_s32): Likewise.
11363 (vqmovuntq_m_s32): Likewise.
11364 (vqrshrntq_n_u32): Likewise.
11365 (vqshrnbq_n_u32): Likewise.
11366 (vqshrntq_n_u32): Likewise.
11367 (vrshrnbq_n_u32): Likewise.
11368 (vrshrntq_n_u32): Likewise.
11369 (vshrnbq_n_u32): Likewise.
11370 (vshrntq_n_u32): Likewise.
11371 (vmlaldavaq_u32): Likewise.
11372 (vmlaldavaxq_u32): Likewise.
11373 (vmlaldavq_p_u32): Likewise.
11374 (vmlaldavxq_p_u32): Likewise.
11375 (vmovlbq_m_u16): Likewise.
11376 (vmovltq_m_u16): Likewise.
11377 (vmovnbq_m_u32): Likewise.
11378 (vmovntq_m_u32): Likewise.
11379 (vqmovnbq_m_u32): Likewise.
11380 (vqmovntq_m_u32): Likewise.
11381 (vrev32q_m_u16): Likewise.
11382 (__arm_vrmlaldavhaxq_s32): Define intrinsic.
11383 (__arm_vrmlsldavhaq_s32): Likewise.
11384 (__arm_vrmlsldavhaxq_s32): Likewise.
11385 (__arm_vaddlvaq_p_s32): Likewise.
11386 (__arm_vrev16q_m_s8): Likewise.
11387 (__arm_vrmlaldavhq_p_s32): Likewise.
11388 (__arm_vrmlaldavhxq_p_s32): Likewise.
11389 (__arm_vrmlsldavhq_p_s32): Likewise.
11390 (__arm_vrmlsldavhxq_p_s32): Likewise.
11391 (__arm_vaddlvaq_p_u32): Likewise.
11392 (__arm_vrev16q_m_u8): Likewise.
11393 (__arm_vrmlaldavhq_p_u32): Likewise.
11394 (__arm_vmvnq_m_n_s16): Likewise.
11395 (__arm_vorrq_m_n_s16): Likewise.
11396 (__arm_vqrshrntq_n_s16): Likewise.
11397 (__arm_vqshrnbq_n_s16): Likewise.
11398 (__arm_vqshrntq_n_s16): Likewise.
11399 (__arm_vrshrnbq_n_s16): Likewise.
11400 (__arm_vrshrntq_n_s16): Likewise.
11401 (__arm_vshrnbq_n_s16): Likewise.
11402 (__arm_vshrntq_n_s16): Likewise.
11403 (__arm_vmlaldavaq_s16): Likewise.
11404 (__arm_vmlaldavaxq_s16): Likewise.
11405 (__arm_vmlsldavaq_s16): Likewise.
11406 (__arm_vmlsldavaxq_s16): Likewise.
11407 (__arm_vmlaldavq_p_s16): Likewise.
11408 (__arm_vmlaldavxq_p_s16): Likewise.
11409 (__arm_vmlsldavq_p_s16): Likewise.
11410 (__arm_vmlsldavxq_p_s16): Likewise.
11411 (__arm_vmovlbq_m_s8): Likewise.
11412 (__arm_vmovltq_m_s8): Likewise.
11413 (__arm_vmovnbq_m_s16): Likewise.
11414 (__arm_vmovntq_m_s16): Likewise.
11415 (__arm_vqmovnbq_m_s16): Likewise.
11416 (__arm_vqmovntq_m_s16): Likewise.
11417 (__arm_vrev32q_m_s8): Likewise.
11418 (__arm_vmvnq_m_n_u16): Likewise.
11419 (__arm_vorrq_m_n_u16): Likewise.
11420 (__arm_vqrshruntq_n_s16): Likewise.
11421 (__arm_vqshrunbq_n_s16): Likewise.
11422 (__arm_vqshruntq_n_s16): Likewise.
11423 (__arm_vqmovunbq_m_s16): Likewise.
11424 (__arm_vqmovuntq_m_s16): Likewise.
11425 (__arm_vqrshrntq_n_u16): Likewise.
11426 (__arm_vqshrnbq_n_u16): Likewise.
11427 (__arm_vqshrntq_n_u16): Likewise.
11428 (__arm_vrshrnbq_n_u16): Likewise.
11429 (__arm_vrshrntq_n_u16): Likewise.
11430 (__arm_vshrnbq_n_u16): Likewise.
11431 (__arm_vshrntq_n_u16): Likewise.
11432 (__arm_vmlaldavaq_u16): Likewise.
11433 (__arm_vmlaldavaxq_u16): Likewise.
11434 (__arm_vmlaldavq_p_u16): Likewise.
11435 (__arm_vmlaldavxq_p_u16): Likewise.
11436 (__arm_vmovlbq_m_u8): Likewise.
11437 (__arm_vmovltq_m_u8): Likewise.
11438 (__arm_vmovnbq_m_u16): Likewise.
11439 (__arm_vmovntq_m_u16): Likewise.
11440 (__arm_vqmovnbq_m_u16): Likewise.
11441 (__arm_vqmovntq_m_u16): Likewise.
11442 (__arm_vrev32q_m_u8): Likewise.
11443 (__arm_vmvnq_m_n_s32): Likewise.
11444 (__arm_vorrq_m_n_s32): Likewise.
11445 (__arm_vqrshrntq_n_s32): Likewise.
11446 (__arm_vqshrnbq_n_s32): Likewise.
11447 (__arm_vqshrntq_n_s32): Likewise.
11448 (__arm_vrshrnbq_n_s32): Likewise.
11449 (__arm_vrshrntq_n_s32): Likewise.
11450 (__arm_vshrnbq_n_s32): Likewise.
11451 (__arm_vshrntq_n_s32): Likewise.
11452 (__arm_vmlaldavaq_s32): Likewise.
11453 (__arm_vmlaldavaxq_s32): Likewise.
11454 (__arm_vmlsldavaq_s32): Likewise.
11455 (__arm_vmlsldavaxq_s32): Likewise.
11456 (__arm_vmlaldavq_p_s32): Likewise.
11457 (__arm_vmlaldavxq_p_s32): Likewise.
11458 (__arm_vmlsldavq_p_s32): Likewise.
11459 (__arm_vmlsldavxq_p_s32): Likewise.
11460 (__arm_vmovlbq_m_s16): Likewise.
11461 (__arm_vmovltq_m_s16): Likewise.
11462 (__arm_vmovnbq_m_s32): Likewise.
11463 (__arm_vmovntq_m_s32): Likewise.
11464 (__arm_vqmovnbq_m_s32): Likewise.
11465 (__arm_vqmovntq_m_s32): Likewise.
11466 (__arm_vrev32q_m_s16): Likewise.
11467 (__arm_vmvnq_m_n_u32): Likewise.
11468 (__arm_vorrq_m_n_u32): Likewise.
11469 (__arm_vqrshruntq_n_s32): Likewise.
11470 (__arm_vqshrunbq_n_s32): Likewise.
11471 (__arm_vqshruntq_n_s32): Likewise.
11472 (__arm_vqmovunbq_m_s32): Likewise.
11473 (__arm_vqmovuntq_m_s32): Likewise.
11474 (__arm_vqrshrntq_n_u32): Likewise.
11475 (__arm_vqshrnbq_n_u32): Likewise.
11476 (__arm_vqshrntq_n_u32): Likewise.
11477 (__arm_vrshrnbq_n_u32): Likewise.
11478 (__arm_vrshrntq_n_u32): Likewise.
11479 (__arm_vshrnbq_n_u32): Likewise.
11480 (__arm_vshrntq_n_u32): Likewise.
11481 (__arm_vmlaldavaq_u32): Likewise.
11482 (__arm_vmlaldavaxq_u32): Likewise.
11483 (__arm_vmlaldavq_p_u32): Likewise.
11484 (__arm_vmlaldavxq_p_u32): Likewise.
11485 (__arm_vmovlbq_m_u16): Likewise.
11486 (__arm_vmovltq_m_u16): Likewise.
11487 (__arm_vmovnbq_m_u32): Likewise.
11488 (__arm_vmovntq_m_u32): Likewise.
11489 (__arm_vqmovnbq_m_u32): Likewise.
11490 (__arm_vqmovntq_m_u32): Likewise.
11491 (__arm_vrev32q_m_u16): Likewise.
11492 (__arm_vcvtbq_m_f16_f32): Likewise.
11493 (__arm_vcvtbq_m_f32_f16): Likewise.
11494 (__arm_vcvttq_m_f16_f32): Likewise.
11495 (__arm_vcvttq_m_f32_f16): Likewise.
11496 (__arm_vrev32q_m_f16): Likewise.
11497 (__arm_vcmlaq_f16): Likewise.
11498 (__arm_vcmlaq_rot180_f16): Likewise.
11499 (__arm_vcmlaq_rot270_f16): Likewise.
11500 (__arm_vcmlaq_rot90_f16): Likewise.
11501 (__arm_vfmaq_f16): Likewise.
11502 (__arm_vfmaq_n_f16): Likewise.
11503 (__arm_vfmasq_n_f16): Likewise.
11504 (__arm_vfmsq_f16): Likewise.
11505 (__arm_vabsq_m_f16): Likewise.
11506 (__arm_vcvtmq_m_s16_f16): Likewise.
11507 (__arm_vcvtnq_m_s16_f16): Likewise.
11508 (__arm_vcvtpq_m_s16_f16): Likewise.
11509 (__arm_vcvtq_m_s16_f16): Likewise.
11510 (__arm_vdupq_m_n_f16): Likewise.
11511 (__arm_vmaxnmaq_m_f16): Likewise.
11512 (__arm_vmaxnmavq_p_f16): Likewise.
11513 (__arm_vmaxnmvq_p_f16): Likewise.
11514 (__arm_vminnmaq_m_f16): Likewise.
11515 (__arm_vminnmavq_p_f16): Likewise.
11516 (__arm_vminnmvq_p_f16): Likewise.
11517 (__arm_vnegq_m_f16): Likewise.
11518 (__arm_vpselq_f16): Likewise.
11519 (__arm_vrev64q_m_f16): Likewise.
11520 (__arm_vrndaq_m_f16): Likewise.
11521 (__arm_vrndmq_m_f16): Likewise.
11522 (__arm_vrndnq_m_f16): Likewise.
11523 (__arm_vrndpq_m_f16): Likewise.
11524 (__arm_vrndq_m_f16): Likewise.
11525 (__arm_vrndxq_m_f16): Likewise.
11526 (__arm_vcmpeqq_m_n_f16): Likewise.
11527 (__arm_vcmpgeq_m_f16): Likewise.
11528 (__arm_vcmpgeq_m_n_f16): Likewise.
11529 (__arm_vcmpgtq_m_f16): Likewise.
11530 (__arm_vcmpgtq_m_n_f16): Likewise.
11531 (__arm_vcmpleq_m_f16): Likewise.
11532 (__arm_vcmpleq_m_n_f16): Likewise.
11533 (__arm_vcmpltq_m_f16): Likewise.
11534 (__arm_vcmpltq_m_n_f16): Likewise.
11535 (__arm_vcmpneq_m_f16): Likewise.
11536 (__arm_vcmpneq_m_n_f16): Likewise.
11537 (__arm_vcvtmq_m_u16_f16): Likewise.
11538 (__arm_vcvtnq_m_u16_f16): Likewise.
11539 (__arm_vcvtpq_m_u16_f16): Likewise.
11540 (__arm_vcvtq_m_u16_f16): Likewise.
11541 (__arm_vcmlaq_f32): Likewise.
11542 (__arm_vcmlaq_rot180_f32): Likewise.
11543 (__arm_vcmlaq_rot270_f32): Likewise.
11544 (__arm_vcmlaq_rot90_f32): Likewise.
11545 (__arm_vfmaq_f32): Likewise.
11546 (__arm_vfmaq_n_f32): Likewise.
11547 (__arm_vfmasq_n_f32): Likewise.
11548 (__arm_vfmsq_f32): Likewise.
11549 (__arm_vabsq_m_f32): Likewise.
11550 (__arm_vcvtmq_m_s32_f32): Likewise.
11551 (__arm_vcvtnq_m_s32_f32): Likewise.
11552 (__arm_vcvtpq_m_s32_f32): Likewise.
11553 (__arm_vcvtq_m_s32_f32): Likewise.
11554 (__arm_vdupq_m_n_f32): Likewise.
11555 (__arm_vmaxnmaq_m_f32): Likewise.
11556 (__arm_vmaxnmavq_p_f32): Likewise.
11557 (__arm_vmaxnmvq_p_f32): Likewise.
11558 (__arm_vminnmaq_m_f32): Likewise.
11559 (__arm_vminnmavq_p_f32): Likewise.
11560 (__arm_vminnmvq_p_f32): Likewise.
11561 (__arm_vnegq_m_f32): Likewise.
11562 (__arm_vpselq_f32): Likewise.
11563 (__arm_vrev64q_m_f32): Likewise.
11564 (__arm_vrndaq_m_f32): Likewise.
11565 (__arm_vrndmq_m_f32): Likewise.
11566 (__arm_vrndnq_m_f32): Likewise.
11567 (__arm_vrndpq_m_f32): Likewise.
11568 (__arm_vrndq_m_f32): Likewise.
11569 (__arm_vrndxq_m_f32): Likewise.
11570 (__arm_vcmpeqq_m_n_f32): Likewise.
11571 (__arm_vcmpgeq_m_f32): Likewise.
11572 (__arm_vcmpgeq_m_n_f32): Likewise.
11573 (__arm_vcmpgtq_m_f32): Likewise.
11574 (__arm_vcmpgtq_m_n_f32): Likewise.
11575 (__arm_vcmpleq_m_f32): Likewise.
11576 (__arm_vcmpleq_m_n_f32): Likewise.
11577 (__arm_vcmpltq_m_f32): Likewise.
11578 (__arm_vcmpltq_m_n_f32): Likewise.
11579 (__arm_vcmpneq_m_f32): Likewise.
11580 (__arm_vcmpneq_m_n_f32): Likewise.
11581 (__arm_vcvtmq_m_u32_f32): Likewise.
11582 (__arm_vcvtnq_m_u32_f32): Likewise.
11583 (__arm_vcvtpq_m_u32_f32): Likewise.
11584 (__arm_vcvtq_m_u32_f32): Likewise.
11585 (vcvtq_m): Define polymorphic variant.
11586 (vabsq_m): Likewise.
11587 (vcmlaq): Likewise.
11588 (vcmlaq_rot180): Likewise.
11589 (vcmlaq_rot270): Likewise.
11590 (vcmlaq_rot90): Likewise.
11591 (vcmpeqq_m_n): Likewise.
11592 (vcmpgeq_m_n): Likewise.
11593 (vrndxq_m): Likewise.
11594 (vrndq_m): Likewise.
11595 (vrndpq_m): Likewise.
11596 (vcmpgtq_m_n): Likewise.
11597 (vcmpgtq_m): Likewise.
11598 (vcmpleq_m): Likewise.
11599 (vcmpleq_m_n): Likewise.
11600 (vcmpltq_m_n): Likewise.
11601 (vcmpltq_m): Likewise.
11602 (vcmpneq_m): Likewise.
11603 (vcmpneq_m_n): Likewise.
11604 (vcvtbq_m): Likewise.
11605 (vcvttq_m): Likewise.
11606 (vcvtmq_m): Likewise.
11607 (vcvtnq_m): Likewise.
11608 (vcvtpq_m): Likewise.
11609 (vdupq_m_n): Likewise.
11610 (vfmaq_n): Likewise.
11612 (vfmasq_n): Likewise.
11614 (vmaxnmaq_m): Likewise.
11615 (vmaxnmavq_m): Likewise.
11616 (vmaxnmvq_m): Likewise.
11617 (vmaxnmavq_p): Likewise.
11618 (vmaxnmvq_p): Likewise.
11619 (vminnmaq_m): Likewise.
11620 (vminnmavq_p): Likewise.
11621 (vminnmvq_p): Likewise.
11622 (vrndnq_m): Likewise.
11623 (vrndaq_m): Likewise.
11624 (vrndmq_m): Likewise.
11625 (vrev64q_m): Likewise.
11626 (vrev32q_m): Likewise.
11627 (vpselq): Likewise.
11628 (vnegq_m): Likewise.
11629 (vcmpgeq_m): Likewise.
11630 (vshrntq_n): Likewise.
11631 (vrshrntq_n): Likewise.
11632 (vmovlbq_m): Likewise.
11633 (vmovnbq_m): Likewise.
11634 (vmovntq_m): Likewise.
11635 (vmvnq_m_n): Likewise.
11636 (vmvnq_m): Likewise.
11637 (vshrnbq_n): Likewise.
11638 (vrshrnbq_n): Likewise.
11639 (vqshruntq_n): Likewise.
11640 (vrev16q_m): Likewise.
11641 (vqshrunbq_n): Likewise.
11642 (vqshrntq_n): Likewise.
11643 (vqrshruntq_n): Likewise.
11644 (vqrshrntq_n): Likewise.
11645 (vqshrnbq_n): Likewise.
11646 (vqmovuntq_m): Likewise.
11647 (vqmovntq_m): Likewise.
11648 (vqmovnbq_m): Likewise.
11649 (vorrq_m_n): Likewise.
11650 (vmovltq_m): Likewise.
11651 (vqmovunbq_m): Likewise.
11652 (vaddlvaq_p): Likewise.
11653 (vmlaldavaq): Likewise.
11654 (vmlaldavaxq): Likewise.
11655 (vmlaldavq_p): Likewise.
11656 (vmlaldavxq_p): Likewise.
11657 (vmlsldavaq): Likewise.
11658 (vmlsldavaxq): Likewise.
11659 (vmlsldavq_p): Likewise.
11660 (vmlsldavxq_p): Likewise.
11661 (vrmlaldavhaxq): Likewise.
11662 (vrmlaldavhq_p): Likewise.
11663 (vrmlaldavhxq_p): Likewise.
11664 (vrmlsldavhaq): Likewise.
11665 (vrmlsldavhaxq): Likewise.
11666 (vrmlsldavhq_p): Likewise.
11667 (vrmlsldavhxq_p): Likewise.
11668 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_IMM_UNONE): Use
11670 (TERNOP_NONE_NONE_NONE_IMM): Likewise.
11671 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
11672 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
11673 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
11674 (TERNOP_UNONE_UNONE_IMM_UNONE): Likewise.
11675 (TERNOP_UNONE_UNONE_NONE_IMM): Likewise.
11676 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
11677 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
11678 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
11679 * config/arm/mve.md (MVE_constraint3): Define mode attribute iterator.
11680 (MVE_pred3): Likewise.
11681 (MVE_constraint1): Likewise.
11682 (MVE_pred1): Likewise.
11683 (VMLALDAVQ_P): Define iterator.
11684 (VQMOVNBQ_M): Likewise.
11685 (VMOVLTQ_M): Likewise.
11686 (VMOVNBQ_M): Likewise.
11687 (VRSHRNTQ_N): Likewise.
11688 (VORRQ_M_N): Likewise.
11689 (VREV32Q_M): Likewise.
11690 (VREV16Q_M): Likewise.
11691 (VQRSHRNTQ_N): Likewise.
11692 (VMOVNTQ_M): Likewise.
11693 (VMOVLBQ_M): Likewise.
11694 (VMLALDAVAQ): Likewise.
11695 (VQSHRNBQ_N): Likewise.
11696 (VSHRNBQ_N): Likewise.
11697 (VRSHRNBQ_N): Likewise.
11698 (VMLALDAVXQ_P): Likewise.
11699 (VQMOVNTQ_M): Likewise.
11700 (VMVNQ_M_N): Likewise.
11701 (VQSHRNTQ_N): Likewise.
11702 (VMLALDAVAXQ): Likewise.
11703 (VSHRNTQ_N): Likewise.
11704 (VCVTMQ_M): Likewise.
11705 (VCVTNQ_M): Likewise.
11706 (VCVTPQ_M): Likewise.
11707 (VCVTQ_M_N_FROM_F): Likewise.
11708 (VCVTQ_M_FROM_F): Likewise.
11709 (VRMLALDAVHQ_P): Likewise.
11710 (VADDLVAQ_P): Likewise.
11711 (mve_vrndq_m_f<mode>): Define RTL pattern.
11712 (mve_vabsq_m_f<mode>): Likewise.
11713 (mve_vaddlvaq_p_<supf>v4si): Likewise.
11714 (mve_vcmlaq_f<mode>): Likewise.
11715 (mve_vcmlaq_rot180_f<mode>): Likewise.
11716 (mve_vcmlaq_rot270_f<mode>): Likewise.
11717 (mve_vcmlaq_rot90_f<mode>): Likewise.
11718 (mve_vcmpeqq_m_n_f<mode>): Likewise.
11719 (mve_vcmpgeq_m_f<mode>): Likewise.
11720 (mve_vcmpgeq_m_n_f<mode>): Likewise.
11721 (mve_vcmpgtq_m_f<mode>): Likewise.
11722 (mve_vcmpgtq_m_n_f<mode>): Likewise.
11723 (mve_vcmpleq_m_f<mode>): Likewise.
11724 (mve_vcmpleq_m_n_f<mode>): Likewise.
11725 (mve_vcmpltq_m_f<mode>): Likewise.
11726 (mve_vcmpltq_m_n_f<mode>): Likewise.
11727 (mve_vcmpneq_m_f<mode>): Likewise.
11728 (mve_vcmpneq_m_n_f<mode>): Likewise.
11729 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
11730 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
11731 (mve_vcvttq_m_f16_f32v8hf): Likewise.
11732 (mve_vcvttq_m_f32_f16v4sf): Likewise.
11733 (mve_vdupq_m_n_f<mode>): Likewise.
11734 (mve_vfmaq_f<mode>): Likewise.
11735 (mve_vfmaq_n_f<mode>): Likewise.
11736 (mve_vfmasq_n_f<mode>): Likewise.
11737 (mve_vfmsq_f<mode>): Likewise.
11738 (mve_vmaxnmaq_m_f<mode>): Likewise.
11739 (mve_vmaxnmavq_p_f<mode>): Likewise.
11740 (mve_vmaxnmvq_p_f<mode>): Likewise.
11741 (mve_vminnmaq_m_f<mode>): Likewise.
11742 (mve_vminnmavq_p_f<mode>): Likewise.
11743 (mve_vminnmvq_p_f<mode>): Likewise.
11744 (mve_vmlaldavaq_<supf><mode>): Likewise.
11745 (mve_vmlaldavaxq_<supf><mode>): Likewise.
11746 (mve_vmlaldavq_p_<supf><mode>): Likewise.
11747 (mve_vmlaldavxq_p_<supf><mode>): Likewise.
11748 (mve_vmlsldavaq_s<mode>): Likewise.
11749 (mve_vmlsldavaxq_s<mode>): Likewise.
11750 (mve_vmlsldavq_p_s<mode>): Likewise.
11751 (mve_vmlsldavxq_p_s<mode>): Likewise.
11752 (mve_vmovlbq_m_<supf><mode>): Likewise.
11753 (mve_vmovltq_m_<supf><mode>): Likewise.
11754 (mve_vmovnbq_m_<supf><mode>): Likewise.
11755 (mve_vmovntq_m_<supf><mode>): Likewise.
11756 (mve_vmvnq_m_n_<supf><mode>): Likewise.
11757 (mve_vnegq_m_f<mode>): Likewise.
11758 (mve_vorrq_m_n_<supf><mode>): Likewise.
11759 (mve_vpselq_f<mode>): Likewise.
11760 (mve_vqmovnbq_m_<supf><mode>): Likewise.
11761 (mve_vqmovntq_m_<supf><mode>): Likewise.
11762 (mve_vqmovunbq_m_s<mode>): Likewise.
11763 (mve_vqmovuntq_m_s<mode>): Likewise.
11764 (mve_vqrshrntq_n_<supf><mode>): Likewise.
11765 (mve_vqrshruntq_n_s<mode>): Likewise.
11766 (mve_vqshrnbq_n_<supf><mode>): Likewise.
11767 (mve_vqshrntq_n_<supf><mode>): Likewise.
11768 (mve_vqshrunbq_n_s<mode>): Likewise.
11769 (mve_vqshruntq_n_s<mode>): Likewise.
11770 (mve_vrev32q_m_fv8hf): Likewise.
11771 (mve_vrev32q_m_<supf><mode>): Likewise.
11772 (mve_vrev64q_m_f<mode>): Likewise.
11773 (mve_vrmlaldavhaxq_sv4si): Likewise.
11774 (mve_vrmlaldavhxq_p_sv4si): Likewise.
11775 (mve_vrmlsldavhaxq_sv4si): Likewise.
11776 (mve_vrmlsldavhq_p_sv4si): Likewise.
11777 (mve_vrmlsldavhxq_p_sv4si): Likewise.
11778 (mve_vrndaq_m_f<mode>): Likewise.
11779 (mve_vrndmq_m_f<mode>): Likewise.
11780 (mve_vrndnq_m_f<mode>): Likewise.
11781 (mve_vrndpq_m_f<mode>): Likewise.
11782 (mve_vrndxq_m_f<mode>): Likewise.
11783 (mve_vrshrnbq_n_<supf><mode>): Likewise.
11784 (mve_vrshrntq_n_<supf><mode>): Likewise.
11785 (mve_vshrnbq_n_<supf><mode>): Likewise.
11786 (mve_vshrntq_n_<supf><mode>): Likewise.
11787 (mve_vcvtmq_m_<supf><mode>): Likewise.
11788 (mve_vcvtpq_m_<supf><mode>): Likewise.
11789 (mve_vcvtnq_m_<supf><mode>): Likewise.
11790 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
11791 (mve_vrev16q_m_<supf>v16qi): Likewise.
11792 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
11793 (mve_vrmlaldavhq_p_<supf>v4si): Likewise.
11794 (mve_vrmlsldavhaq_sv4si): Likewise.
11796 2020-03-18 Andre Vieira <andre.simoesdiasvieira@arm.com>
11797 Mihail Ionescu <mihail.ionescu@arm.com>
11798 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
11800 * config/arm/arm_mve.h (vpselq_u8): Define macro.
11801 (vpselq_s8): Likewise.
11802 (vrev64q_m_u8): Likewise.
11803 (vqrdmlashq_n_u8): Likewise.
11804 (vqrdmlahq_n_u8): Likewise.
11805 (vqdmlahq_n_u8): Likewise.
11806 (vmvnq_m_u8): Likewise.
11807 (vmlasq_n_u8): Likewise.
11808 (vmlaq_n_u8): Likewise.
11809 (vmladavq_p_u8): Likewise.
11810 (vmladavaq_u8): Likewise.
11811 (vminvq_p_u8): Likewise.
11812 (vmaxvq_p_u8): Likewise.
11813 (vdupq_m_n_u8): Likewise.
11814 (vcmpneq_m_u8): Likewise.
11815 (vcmpneq_m_n_u8): Likewise.
11816 (vcmphiq_m_u8): Likewise.
11817 (vcmphiq_m_n_u8): Likewise.
11818 (vcmpeqq_m_u8): Likewise.
11819 (vcmpeqq_m_n_u8): Likewise.
11820 (vcmpcsq_m_u8): Likewise.
11821 (vcmpcsq_m_n_u8): Likewise.
11822 (vclzq_m_u8): Likewise.
11823 (vaddvaq_p_u8): Likewise.
11824 (vsriq_n_u8): Likewise.
11825 (vsliq_n_u8): Likewise.
11826 (vshlq_m_r_u8): Likewise.
11827 (vrshlq_m_n_u8): Likewise.
11828 (vqshlq_m_r_u8): Likewise.
11829 (vqrshlq_m_n_u8): Likewise.
11830 (vminavq_p_s8): Likewise.
11831 (vminaq_m_s8): Likewise.
11832 (vmaxavq_p_s8): Likewise.
11833 (vmaxaq_m_s8): Likewise.
11834 (vcmpneq_m_s8): Likewise.
11835 (vcmpneq_m_n_s8): Likewise.
11836 (vcmpltq_m_s8): Likewise.
11837 (vcmpltq_m_n_s8): Likewise.
11838 (vcmpleq_m_s8): Likewise.
11839 (vcmpleq_m_n_s8): Likewise.
11840 (vcmpgtq_m_s8): Likewise.
11841 (vcmpgtq_m_n_s8): Likewise.
11842 (vcmpgeq_m_s8): Likewise.
11843 (vcmpgeq_m_n_s8): Likewise.
11844 (vcmpeqq_m_s8): Likewise.
11845 (vcmpeqq_m_n_s8): Likewise.
11846 (vshlq_m_r_s8): Likewise.
11847 (vrshlq_m_n_s8): Likewise.
11848 (vrev64q_m_s8): Likewise.
11849 (vqshlq_m_r_s8): Likewise.
11850 (vqrshlq_m_n_s8): Likewise.
11851 (vqnegq_m_s8): Likewise.
11852 (vqabsq_m_s8): Likewise.
11853 (vnegq_m_s8): Likewise.
11854 (vmvnq_m_s8): Likewise.
11855 (vmlsdavxq_p_s8): Likewise.
11856 (vmlsdavq_p_s8): Likewise.
11857 (vmladavxq_p_s8): Likewise.
11858 (vmladavq_p_s8): Likewise.
11859 (vminvq_p_s8): Likewise.
11860 (vmaxvq_p_s8): Likewise.
11861 (vdupq_m_n_s8): Likewise.
11862 (vclzq_m_s8): Likewise.
11863 (vclsq_m_s8): Likewise.
11864 (vaddvaq_p_s8): Likewise.
11865 (vabsq_m_s8): Likewise.
11866 (vqrdmlsdhxq_s8): Likewise.
11867 (vqrdmlsdhq_s8): Likewise.
11868 (vqrdmlashq_n_s8): Likewise.
11869 (vqrdmlahq_n_s8): Likewise.
11870 (vqrdmladhxq_s8): Likewise.
11871 (vqrdmladhq_s8): Likewise.
11872 (vqdmlsdhxq_s8): Likewise.
11873 (vqdmlsdhq_s8): Likewise.
11874 (vqdmlahq_n_s8): Likewise.
11875 (vqdmladhxq_s8): Likewise.
11876 (vqdmladhq_s8): Likewise.
11877 (vmlsdavaxq_s8): Likewise.
11878 (vmlsdavaq_s8): Likewise.
11879 (vmlasq_n_s8): Likewise.
11880 (vmlaq_n_s8): Likewise.
11881 (vmladavaxq_s8): Likewise.
11882 (vmladavaq_s8): Likewise.
11883 (vsriq_n_s8): Likewise.
11884 (vsliq_n_s8): Likewise.
11885 (vpselq_u16): Likewise.
11886 (vpselq_s16): Likewise.
11887 (vrev64q_m_u16): Likewise.
11888 (vqrdmlashq_n_u16): Likewise.
11889 (vqrdmlahq_n_u16): Likewise.
11890 (vqdmlahq_n_u16): Likewise.
11891 (vmvnq_m_u16): Likewise.
11892 (vmlasq_n_u16): Likewise.
11893 (vmlaq_n_u16): Likewise.
11894 (vmladavq_p_u16): Likewise.
11895 (vmladavaq_u16): Likewise.
11896 (vminvq_p_u16): Likewise.
11897 (vmaxvq_p_u16): Likewise.
11898 (vdupq_m_n_u16): Likewise.
11899 (vcmpneq_m_u16): Likewise.
11900 (vcmpneq_m_n_u16): Likewise.
11901 (vcmphiq_m_u16): Likewise.
11902 (vcmphiq_m_n_u16): Likewise.
11903 (vcmpeqq_m_u16): Likewise.
11904 (vcmpeqq_m_n_u16): Likewise.
11905 (vcmpcsq_m_u16): Likewise.
11906 (vcmpcsq_m_n_u16): Likewise.
11907 (vclzq_m_u16): Likewise.
11908 (vaddvaq_p_u16): Likewise.
11909 (vsriq_n_u16): Likewise.
11910 (vsliq_n_u16): Likewise.
11911 (vshlq_m_r_u16): Likewise.
11912 (vrshlq_m_n_u16): Likewise.
11913 (vqshlq_m_r_u16): Likewise.
11914 (vqrshlq_m_n_u16): Likewise.
11915 (vminavq_p_s16): Likewise.
11916 (vminaq_m_s16): Likewise.
11917 (vmaxavq_p_s16): Likewise.
11918 (vmaxaq_m_s16): Likewise.
11919 (vcmpneq_m_s16): Likewise.
11920 (vcmpneq_m_n_s16): Likewise.
11921 (vcmpltq_m_s16): Likewise.
11922 (vcmpltq_m_n_s16): Likewise.
11923 (vcmpleq_m_s16): Likewise.
11924 (vcmpleq_m_n_s16): Likewise.
11925 (vcmpgtq_m_s16): Likewise.
11926 (vcmpgtq_m_n_s16): Likewise.
11927 (vcmpgeq_m_s16): Likewise.
11928 (vcmpgeq_m_n_s16): Likewise.
11929 (vcmpeqq_m_s16): Likewise.
11930 (vcmpeqq_m_n_s16): Likewise.
11931 (vshlq_m_r_s16): Likewise.
11932 (vrshlq_m_n_s16): Likewise.
11933 (vrev64q_m_s16): Likewise.
11934 (vqshlq_m_r_s16): Likewise.
11935 (vqrshlq_m_n_s16): Likewise.
11936 (vqnegq_m_s16): Likewise.
11937 (vqabsq_m_s16): Likewise.
11938 (vnegq_m_s16): Likewise.
11939 (vmvnq_m_s16): Likewise.
11940 (vmlsdavxq_p_s16): Likewise.
11941 (vmlsdavq_p_s16): Likewise.
11942 (vmladavxq_p_s16): Likewise.
11943 (vmladavq_p_s16): Likewise.
11944 (vminvq_p_s16): Likewise.
11945 (vmaxvq_p_s16): Likewise.
11946 (vdupq_m_n_s16): Likewise.
11947 (vclzq_m_s16): Likewise.
11948 (vclsq_m_s16): Likewise.
11949 (vaddvaq_p_s16): Likewise.
11950 (vabsq_m_s16): Likewise.
11951 (vqrdmlsdhxq_s16): Likewise.
11952 (vqrdmlsdhq_s16): Likewise.
11953 (vqrdmlashq_n_s16): Likewise.
11954 (vqrdmlahq_n_s16): Likewise.
11955 (vqrdmladhxq_s16): Likewise.
11956 (vqrdmladhq_s16): Likewise.
11957 (vqdmlsdhxq_s16): Likewise.
11958 (vqdmlsdhq_s16): Likewise.
11959 (vqdmlahq_n_s16): Likewise.
11960 (vqdmladhxq_s16): Likewise.
11961 (vqdmladhq_s16): Likewise.
11962 (vmlsdavaxq_s16): Likewise.
11963 (vmlsdavaq_s16): Likewise.
11964 (vmlasq_n_s16): Likewise.
11965 (vmlaq_n_s16): Likewise.
11966 (vmladavaxq_s16): Likewise.
11967 (vmladavaq_s16): Likewise.
11968 (vsriq_n_s16): Likewise.
11969 (vsliq_n_s16): Likewise.
11970 (vpselq_u32): Likewise.
11971 (vpselq_s32): Likewise.
11972 (vrev64q_m_u32): Likewise.
11973 (vqrdmlashq_n_u32): Likewise.
11974 (vqrdmlahq_n_u32): Likewise.
11975 (vqdmlahq_n_u32): Likewise.
11976 (vmvnq_m_u32): Likewise.
11977 (vmlasq_n_u32): Likewise.
11978 (vmlaq_n_u32): Likewise.
11979 (vmladavq_p_u32): Likewise.
11980 (vmladavaq_u32): Likewise.
11981 (vminvq_p_u32): Likewise.
11982 (vmaxvq_p_u32): Likewise.
11983 (vdupq_m_n_u32): Likewise.
11984 (vcmpneq_m_u32): Likewise.
11985 (vcmpneq_m_n_u32): Likewise.
11986 (vcmphiq_m_u32): Likewise.
11987 (vcmphiq_m_n_u32): Likewise.
11988 (vcmpeqq_m_u32): Likewise.
11989 (vcmpeqq_m_n_u32): Likewise.
11990 (vcmpcsq_m_u32): Likewise.
11991 (vcmpcsq_m_n_u32): Likewise.
11992 (vclzq_m_u32): Likewise.
11993 (vaddvaq_p_u32): Likewise.
11994 (vsriq_n_u32): Likewise.
11995 (vsliq_n_u32): Likewise.
11996 (vshlq_m_r_u32): Likewise.
11997 (vrshlq_m_n_u32): Likewise.
11998 (vqshlq_m_r_u32): Likewise.
11999 (vqrshlq_m_n_u32): Likewise.
12000 (vminavq_p_s32): Likewise.
12001 (vminaq_m_s32): Likewise.
12002 (vmaxavq_p_s32): Likewise.
12003 (vmaxaq_m_s32): Likewise.
12004 (vcmpneq_m_s32): Likewise.
12005 (vcmpneq_m_n_s32): Likewise.
12006 (vcmpltq_m_s32): Likewise.
12007 (vcmpltq_m_n_s32): Likewise.
12008 (vcmpleq_m_s32): Likewise.
12009 (vcmpleq_m_n_s32): Likewise.
12010 (vcmpgtq_m_s32): Likewise.
12011 (vcmpgtq_m_n_s32): Likewise.
12012 (vcmpgeq_m_s32): Likewise.
12013 (vcmpgeq_m_n_s32): Likewise.
12014 (vcmpeqq_m_s32): Likewise.
12015 (vcmpeqq_m_n_s32): Likewise.
12016 (vshlq_m_r_s32): Likewise.
12017 (vrshlq_m_n_s32): Likewise.
12018 (vrev64q_m_s32): Likewise.
12019 (vqshlq_m_r_s32): Likewise.
12020 (vqrshlq_m_n_s32): Likewise.
12021 (vqnegq_m_s32): Likewise.
12022 (vqabsq_m_s32): Likewise.
12023 (vnegq_m_s32): Likewise.
12024 (vmvnq_m_s32): Likewise.
12025 (vmlsdavxq_p_s32): Likewise.
12026 (vmlsdavq_p_s32): Likewise.
12027 (vmladavxq_p_s32): Likewise.
12028 (vmladavq_p_s32): Likewise.
12029 (vminvq_p_s32): Likewise.
12030 (vmaxvq_p_s32): Likewise.
12031 (vdupq_m_n_s32): Likewise.
12032 (vclzq_m_s32): Likewise.
12033 (vclsq_m_s32): Likewise.
12034 (vaddvaq_p_s32): Likewise.
12035 (vabsq_m_s32): Likewise.
12036 (vqrdmlsdhxq_s32): Likewise.
12037 (vqrdmlsdhq_s32): Likewise.
12038 (vqrdmlashq_n_s32): Likewise.
12039 (vqrdmlahq_n_s32): Likewise.
12040 (vqrdmladhxq_s32): Likewise.
12041 (vqrdmladhq_s32): Likewise.
12042 (vqdmlsdhxq_s32): Likewise.
12043 (vqdmlsdhq_s32): Likewise.
12044 (vqdmlahq_n_s32): Likewise.
12045 (vqdmladhxq_s32): Likewise.
12046 (vqdmladhq_s32): Likewise.
12047 (vmlsdavaxq_s32): Likewise.
12048 (vmlsdavaq_s32): Likewise.
12049 (vmlasq_n_s32): Likewise.
12050 (vmlaq_n_s32): Likewise.
12051 (vmladavaxq_s32): Likewise.
12052 (vmladavaq_s32): Likewise.
12053 (vsriq_n_s32): Likewise.
12054 (vsliq_n_s32): Likewise.
12055 (vpselq_u64): Likewise.
12056 (vpselq_s64): Likewise.
12057 (__arm_vpselq_u8): Define intrinsic.
12058 (__arm_vpselq_s8): Likewise.
12059 (__arm_vrev64q_m_u8): Likewise.
12060 (__arm_vqrdmlashq_n_u8): Likewise.
12061 (__arm_vqrdmlahq_n_u8): Likewise.
12062 (__arm_vqdmlahq_n_u8): Likewise.
12063 (__arm_vmvnq_m_u8): Likewise.
12064 (__arm_vmlasq_n_u8): Likewise.
12065 (__arm_vmlaq_n_u8): Likewise.
12066 (__arm_vmladavq_p_u8): Likewise.
12067 (__arm_vmladavaq_u8): Likewise.
12068 (__arm_vminvq_p_u8): Likewise.
12069 (__arm_vmaxvq_p_u8): Likewise.
12070 (__arm_vdupq_m_n_u8): Likewise.
12071 (__arm_vcmpneq_m_u8): Likewise.
12072 (__arm_vcmpneq_m_n_u8): Likewise.
12073 (__arm_vcmphiq_m_u8): Likewise.
12074 (__arm_vcmphiq_m_n_u8): Likewise.
12075 (__arm_vcmpeqq_m_u8): Likewise.
12076 (__arm_vcmpeqq_m_n_u8): Likewise.
12077 (__arm_vcmpcsq_m_u8): Likewise.
12078 (__arm_vcmpcsq_m_n_u8): Likewise.
12079 (__arm_vclzq_m_u8): Likewise.
12080 (__arm_vaddvaq_p_u8): Likewise.
12081 (__arm_vsriq_n_u8): Likewise.
12082 (__arm_vsliq_n_u8): Likewise.
12083 (__arm_vshlq_m_r_u8): Likewise.
12084 (__arm_vrshlq_m_n_u8): Likewise.
12085 (__arm_vqshlq_m_r_u8): Likewise.
12086 (__arm_vqrshlq_m_n_u8): Likewise.
12087 (__arm_vminavq_p_s8): Likewise.
12088 (__arm_vminaq_m_s8): Likewise.
12089 (__arm_vmaxavq_p_s8): Likewise.
12090 (__arm_vmaxaq_m_s8): Likewise.
12091 (__arm_vcmpneq_m_s8): Likewise.
12092 (__arm_vcmpneq_m_n_s8): Likewise.
12093 (__arm_vcmpltq_m_s8): Likewise.
12094 (__arm_vcmpltq_m_n_s8): Likewise.
12095 (__arm_vcmpleq_m_s8): Likewise.
12096 (__arm_vcmpleq_m_n_s8): Likewise.
12097 (__arm_vcmpgtq_m_s8): Likewise.
12098 (__arm_vcmpgtq_m_n_s8): Likewise.
12099 (__arm_vcmpgeq_m_s8): Likewise.
12100 (__arm_vcmpgeq_m_n_s8): Likewise.
12101 (__arm_vcmpeqq_m_s8): Likewise.
12102 (__arm_vcmpeqq_m_n_s8): Likewise.
12103 (__arm_vshlq_m_r_s8): Likewise.
12104 (__arm_vrshlq_m_n_s8): Likewise.
12105 (__arm_vrev64q_m_s8): Likewise.
12106 (__arm_vqshlq_m_r_s8): Likewise.
12107 (__arm_vqrshlq_m_n_s8): Likewise.
12108 (__arm_vqnegq_m_s8): Likewise.
12109 (__arm_vqabsq_m_s8): Likewise.
12110 (__arm_vnegq_m_s8): Likewise.
12111 (__arm_vmvnq_m_s8): Likewise.
12112 (__arm_vmlsdavxq_p_s8): Likewise.
12113 (__arm_vmlsdavq_p_s8): Likewise.
12114 (__arm_vmladavxq_p_s8): Likewise.
12115 (__arm_vmladavq_p_s8): Likewise.
12116 (__arm_vminvq_p_s8): Likewise.
12117 (__arm_vmaxvq_p_s8): Likewise.
12118 (__arm_vdupq_m_n_s8): Likewise.
12119 (__arm_vclzq_m_s8): Likewise.
12120 (__arm_vclsq_m_s8): Likewise.
12121 (__arm_vaddvaq_p_s8): Likewise.
12122 (__arm_vabsq_m_s8): Likewise.
12123 (__arm_vqrdmlsdhxq_s8): Likewise.
12124 (__arm_vqrdmlsdhq_s8): Likewise.
12125 (__arm_vqrdmlashq_n_s8): Likewise.
12126 (__arm_vqrdmlahq_n_s8): Likewise.
12127 (__arm_vqrdmladhxq_s8): Likewise.
12128 (__arm_vqrdmladhq_s8): Likewise.
12129 (__arm_vqdmlsdhxq_s8): Likewise.
12130 (__arm_vqdmlsdhq_s8): Likewise.
12131 (__arm_vqdmlahq_n_s8): Likewise.
12132 (__arm_vqdmladhxq_s8): Likewise.
12133 (__arm_vqdmladhq_s8): Likewise.
12134 (__arm_vmlsdavaxq_s8): Likewise.
12135 (__arm_vmlsdavaq_s8): Likewise.
12136 (__arm_vmlasq_n_s8): Likewise.
12137 (__arm_vmlaq_n_s8): Likewise.
12138 (__arm_vmladavaxq_s8): Likewise.
12139 (__arm_vmladavaq_s8): Likewise.
12140 (__arm_vsriq_n_s8): Likewise.
12141 (__arm_vsliq_n_s8): Likewise.
12142 (__arm_vpselq_u16): Likewise.
12143 (__arm_vpselq_s16): Likewise.
12144 (__arm_vrev64q_m_u16): Likewise.
12145 (__arm_vqrdmlashq_n_u16): Likewise.
12146 (__arm_vqrdmlahq_n_u16): Likewise.
12147 (__arm_vqdmlahq_n_u16): Likewise.
12148 (__arm_vmvnq_m_u16): Likewise.
12149 (__arm_vmlasq_n_u16): Likewise.
12150 (__arm_vmlaq_n_u16): Likewise.
12151 (__arm_vmladavq_p_u16): Likewise.
12152 (__arm_vmladavaq_u16): Likewise.
12153 (__arm_vminvq_p_u16): Likewise.
12154 (__arm_vmaxvq_p_u16): Likewise.
12155 (__arm_vdupq_m_n_u16): Likewise.
12156 (__arm_vcmpneq_m_u16): Likewise.
12157 (__arm_vcmpneq_m_n_u16): Likewise.
12158 (__arm_vcmphiq_m_u16): Likewise.
12159 (__arm_vcmphiq_m_n_u16): Likewise.
12160 (__arm_vcmpeqq_m_u16): Likewise.
12161 (__arm_vcmpeqq_m_n_u16): Likewise.
12162 (__arm_vcmpcsq_m_u16): Likewise.
12163 (__arm_vcmpcsq_m_n_u16): Likewise.
12164 (__arm_vclzq_m_u16): Likewise.
12165 (__arm_vaddvaq_p_u16): Likewise.
12166 (__arm_vsriq_n_u16): Likewise.
12167 (__arm_vsliq_n_u16): Likewise.
12168 (__arm_vshlq_m_r_u16): Likewise.
12169 (__arm_vrshlq_m_n_u16): Likewise.
12170 (__arm_vqshlq_m_r_u16): Likewise.
12171 (__arm_vqrshlq_m_n_u16): Likewise.
12172 (__arm_vminavq_p_s16): Likewise.
12173 (__arm_vminaq_m_s16): Likewise.
12174 (__arm_vmaxavq_p_s16): Likewise.
12175 (__arm_vmaxaq_m_s16): Likewise.
12176 (__arm_vcmpneq_m_s16): Likewise.
12177 (__arm_vcmpneq_m_n_s16): Likewise.
12178 (__arm_vcmpltq_m_s16): Likewise.
12179 (__arm_vcmpltq_m_n_s16): Likewise.
12180 (__arm_vcmpleq_m_s16): Likewise.
12181 (__arm_vcmpleq_m_n_s16): Likewise.
12182 (__arm_vcmpgtq_m_s16): Likewise.
12183 (__arm_vcmpgtq_m_n_s16): Likewise.
12184 (__arm_vcmpgeq_m_s16): Likewise.
12185 (__arm_vcmpgeq_m_n_s16): Likewise.
12186 (__arm_vcmpeqq_m_s16): Likewise.
12187 (__arm_vcmpeqq_m_n_s16): Likewise.
12188 (__arm_vshlq_m_r_s16): Likewise.
12189 (__arm_vrshlq_m_n_s16): Likewise.
12190 (__arm_vrev64q_m_s16): Likewise.
12191 (__arm_vqshlq_m_r_s16): Likewise.
12192 (__arm_vqrshlq_m_n_s16): Likewise.
12193 (__arm_vqnegq_m_s16): Likewise.
12194 (__arm_vqabsq_m_s16): Likewise.
12195 (__arm_vnegq_m_s16): Likewise.
12196 (__arm_vmvnq_m_s16): Likewise.
12197 (__arm_vmlsdavxq_p_s16): Likewise.
12198 (__arm_vmlsdavq_p_s16): Likewise.
12199 (__arm_vmladavxq_p_s16): Likewise.
12200 (__arm_vmladavq_p_s16): Likewise.
12201 (__arm_vminvq_p_s16): Likewise.
12202 (__arm_vmaxvq_p_s16): Likewise.
12203 (__arm_vdupq_m_n_s16): Likewise.
12204 (__arm_vclzq_m_s16): Likewise.
12205 (__arm_vclsq_m_s16): Likewise.
12206 (__arm_vaddvaq_p_s16): Likewise.
12207 (__arm_vabsq_m_s16): Likewise.
12208 (__arm_vqrdmlsdhxq_s16): Likewise.
12209 (__arm_vqrdmlsdhq_s16): Likewise.
12210 (__arm_vqrdmlashq_n_s16): Likewise.
12211 (__arm_vqrdmlahq_n_s16): Likewise.
12212 (__arm_vqrdmladhxq_s16): Likewise.
12213 (__arm_vqrdmladhq_s16): Likewise.
12214 (__arm_vqdmlsdhxq_s16): Likewise.
12215 (__arm_vqdmlsdhq_s16): Likewise.
12216 (__arm_vqdmlahq_n_s16): Likewise.
12217 (__arm_vqdmladhxq_s16): Likewise.
12218 (__arm_vqdmladhq_s16): Likewise.
12219 (__arm_vmlsdavaxq_s16): Likewise.
12220 (__arm_vmlsdavaq_s16): Likewise.
12221 (__arm_vmlasq_n_s16): Likewise.
12222 (__arm_vmlaq_n_s16): Likewise.
12223 (__arm_vmladavaxq_s16): Likewise.
12224 (__arm_vmladavaq_s16): Likewise.
12225 (__arm_vsriq_n_s16): Likewise.
12226 (__arm_vsliq_n_s16): Likewise.
12227 (__arm_vpselq_u32): Likewise.
12228 (__arm_vpselq_s32): Likewise.
12229 (__arm_vrev64q_m_u32): Likewise.
12230 (__arm_vqrdmlashq_n_u32): Likewise.
12231 (__arm_vqrdmlahq_n_u32): Likewise.
12232 (__arm_vqdmlahq_n_u32): Likewise.
12233 (__arm_vmvnq_m_u32): Likewise.
12234 (__arm_vmlasq_n_u32): Likewise.
12235 (__arm_vmlaq_n_u32): Likewise.
12236 (__arm_vmladavq_p_u32): Likewise.
12237 (__arm_vmladavaq_u32): Likewise.
12238 (__arm_vminvq_p_u32): Likewise.
12239 (__arm_vmaxvq_p_u32): Likewise.
12240 (__arm_vdupq_m_n_u32): Likewise.
12241 (__arm_vcmpneq_m_u32): Likewise.
12242 (__arm_vcmpneq_m_n_u32): Likewise.
12243 (__arm_vcmphiq_m_u32): Likewise.
12244 (__arm_vcmphiq_m_n_u32): Likewise.
12245 (__arm_vcmpeqq_m_u32): Likewise.
12246 (__arm_vcmpeqq_m_n_u32): Likewise.
12247 (__arm_vcmpcsq_m_u32): Likewise.
12248 (__arm_vcmpcsq_m_n_u32): Likewise.
12249 (__arm_vclzq_m_u32): Likewise.
12250 (__arm_vaddvaq_p_u32): Likewise.
12251 (__arm_vsriq_n_u32): Likewise.
12252 (__arm_vsliq_n_u32): Likewise.
12253 (__arm_vshlq_m_r_u32): Likewise.
12254 (__arm_vrshlq_m_n_u32): Likewise.
12255 (__arm_vqshlq_m_r_u32): Likewise.
12256 (__arm_vqrshlq_m_n_u32): Likewise.
12257 (__arm_vminavq_p_s32): Likewise.
12258 (__arm_vminaq_m_s32): Likewise.
12259 (__arm_vmaxavq_p_s32): Likewise.
12260 (__arm_vmaxaq_m_s32): Likewise.
12261 (__arm_vcmpneq_m_s32): Likewise.
12262 (__arm_vcmpneq_m_n_s32): Likewise.
12263 (__arm_vcmpltq_m_s32): Likewise.
12264 (__arm_vcmpltq_m_n_s32): Likewise.
12265 (__arm_vcmpleq_m_s32): Likewise.
12266 (__arm_vcmpleq_m_n_s32): Likewise.
12267 (__arm_vcmpgtq_m_s32): Likewise.
12268 (__arm_vcmpgtq_m_n_s32): Likewise.
12269 (__arm_vcmpgeq_m_s32): Likewise.
12270 (__arm_vcmpgeq_m_n_s32): Likewise.
12271 (__arm_vcmpeqq_m_s32): Likewise.
12272 (__arm_vcmpeqq_m_n_s32): Likewise.
12273 (__arm_vshlq_m_r_s32): Likewise.
12274 (__arm_vrshlq_m_n_s32): Likewise.
12275 (__arm_vrev64q_m_s32): Likewise.
12276 (__arm_vqshlq_m_r_s32): Likewise.
12277 (__arm_vqrshlq_m_n_s32): Likewise.
12278 (__arm_vqnegq_m_s32): Likewise.
12279 (__arm_vqabsq_m_s32): Likewise.
12280 (__arm_vnegq_m_s32): Likewise.
12281 (__arm_vmvnq_m_s32): Likewise.
12282 (__arm_vmlsdavxq_p_s32): Likewise.
12283 (__arm_vmlsdavq_p_s32): Likewise.
12284 (__arm_vmladavxq_p_s32): Likewise.
12285 (__arm_vmladavq_p_s32): Likewise.
12286 (__arm_vminvq_p_s32): Likewise.
12287 (__arm_vmaxvq_p_s32): Likewise.
12288 (__arm_vdupq_m_n_s32): Likewise.
12289 (__arm_vclzq_m_s32): Likewise.
12290 (__arm_vclsq_m_s32): Likewise.
12291 (__arm_vaddvaq_p_s32): Likewise.
12292 (__arm_vabsq_m_s32): Likewise.
12293 (__arm_vqrdmlsdhxq_s32): Likewise.
12294 (__arm_vqrdmlsdhq_s32): Likewise.
12295 (__arm_vqrdmlashq_n_s32): Likewise.
12296 (__arm_vqrdmlahq_n_s32): Likewise.
12297 (__arm_vqrdmladhxq_s32): Likewise.
12298 (__arm_vqrdmladhq_s32): Likewise.
12299 (__arm_vqdmlsdhxq_s32): Likewise.
12300 (__arm_vqdmlsdhq_s32): Likewise.
12301 (__arm_vqdmlahq_n_s32): Likewise.
12302 (__arm_vqdmladhxq_s32): Likewise.
12303 (__arm_vqdmladhq_s32): Likewise.
12304 (__arm_vmlsdavaxq_s32): Likewise.
12305 (__arm_vmlsdavaq_s32): Likewise.
12306 (__arm_vmlasq_n_s32): Likewise.
12307 (__arm_vmlaq_n_s32): Likewise.
12308 (__arm_vmladavaxq_s32): Likewise.
12309 (__arm_vmladavaq_s32): Likewise.
12310 (__arm_vsriq_n_s32): Likewise.
12311 (__arm_vsliq_n_s32): Likewise.
12312 (__arm_vpselq_u64): Likewise.
12313 (__arm_vpselq_s64): Likewise.
12314 (vcmpneq_m_n): Define polymorphic variant.
12315 (vcmpneq_m): Likewise.
12316 (vqrdmlsdhq): Likewise.
12317 (vqrdmlsdhxq): Likewise.
12318 (vqrshlq_m_n): Likewise.
12319 (vqshlq_m_r): Likewise.
12320 (vrev64q_m): Likewise.
12321 (vrshlq_m_n): Likewise.
12322 (vshlq_m_r): Likewise.
12323 (vsliq_n): Likewise.
12324 (vsriq_n): Likewise.
12325 (vqrdmlashq_n): Likewise.
12326 (vqrdmlahq): Likewise.
12327 (vqrdmladhxq): Likewise.
12328 (vqrdmladhq): Likewise.
12329 (vqnegq_m): Likewise.
12330 (vqdmlsdhxq): Likewise.
12331 (vabsq_m): Likewise.
12332 (vclsq_m): Likewise.
12333 (vclzq_m): Likewise.
12334 (vcmpgeq_m): Likewise.
12335 (vcmpgeq_m_n): Likewise.
12336 (vdupq_m_n): Likewise.
12337 (vmaxaq_m): Likewise.
12338 (vmlaq_n): Likewise.
12339 (vmlasq_n): Likewise.
12340 (vmvnq_m): Likewise.
12341 (vnegq_m): Likewise.
12342 (vpselq): Likewise.
12343 (vqdmlahq_n): Likewise.
12344 (vqrdmlahq_n): Likewise.
12345 (vqdmlsdhq): Likewise.
12346 (vqdmladhq): Likewise.
12347 (vqabsq_m): Likewise.
12348 (vminaq_m): Likewise.
12349 (vrmlaldavhaq): Likewise.
12350 (vmlsdavxq_p): Likewise.
12351 (vmlsdavq_p): Likewise.
12352 (vmlsdavaxq): Likewise.
12353 (vmlsdavaq): Likewise.
12354 (vaddvaq_p): Likewise.
12355 (vcmpcsq_m_n): Likewise.
12356 (vcmpcsq_m): Likewise.
12357 (vcmpeqq_m_n): Likewise.
12358 (vcmpeqq_m): Likewise.
12359 (vmladavxq_p): Likewise.
12360 (vmladavq_p): Likewise.
12361 (vmladavaxq): Likewise.
12362 (vmladavaq): Likewise.
12363 (vminvq_p): Likewise.
12364 (vminavq_p): Likewise.
12365 (vmaxvq_p): Likewise.
12366 (vmaxavq_p): Likewise.
12367 (vcmpltq_m_n): Likewise.
12368 (vcmpltq_m): Likewise.
12369 (vcmpleq_m): Likewise.
12370 (vcmpleq_m_n): Likewise.
12371 (vcmphiq_m_n): Likewise.
12372 (vcmphiq_m): Likewise.
12373 (vcmpgtq_m_n): Likewise.
12374 (vcmpgtq_m): Likewise.
12375 * config/arm/arm_mve_builtins.def (TERNOP_NONE_NONE_NONE_IMM): Use
12377 (TERNOP_NONE_NONE_NONE_NONE): Likewise.
12378 (TERNOP_NONE_NONE_NONE_UNONE): Likewise.
12379 (TERNOP_UNONE_NONE_NONE_UNONE): Likewise.
12380 (TERNOP_UNONE_UNONE_NONE_UNONE): Likewise.
12381 (TERNOP_UNONE_UNONE_UNONE_IMM): Likewise.
12382 (TERNOP_UNONE_UNONE_UNONE_UNONE): Likewise.
12383 * config/arm/constraints.md (Rc): Define constraint to check constant is
12384 in the range of 0 to 15.
12385 (Re): Define constraint to check constant is in the range of 0 to 31.
12386 * config/arm/mve.md (VADDVAQ_P): Define iterator.
12387 (VCLZQ_M): Likewise.
12388 (VCMPEQQ_M_N): Likewise.
12389 (VCMPEQQ_M): Likewise.
12390 (VCMPNEQ_M_N): Likewise.
12391 (VCMPNEQ_M): Likewise.
12392 (VDUPQ_M_N): Likewise.
12393 (VMAXVQ_P): Likewise.
12394 (VMINVQ_P): Likewise.
12395 (VMLADAVAQ): Likewise.
12396 (VMLADAVQ_P): Likewise.
12397 (VMLAQ_N): Likewise.
12398 (VMLASQ_N): Likewise.
12399 (VMVNQ_M): Likewise.
12400 (VPSELQ): Likewise.
12401 (VQDMLAHQ_N): Likewise.
12402 (VQRDMLAHQ_N): Likewise.
12403 (VQRDMLASHQ_N): Likewise.
12404 (VQRSHLQ_M_N): Likewise.
12405 (VQSHLQ_M_R): Likewise.
12406 (VREV64Q_M): Likewise.
12407 (VRSHLQ_M_N): Likewise.
12408 (VSHLQ_M_R): Likewise.
12409 (VSLIQ_N): Likewise.
12410 (VSRIQ_N): Likewise.
12411 (mve_vabsq_m_s<mode>): Define RTL pattern.
12412 (mve_vaddvaq_p_<supf><mode>): Likewise.
12413 (mve_vclsq_m_s<mode>): Likewise.
12414 (mve_vclzq_m_<supf><mode>): Likewise.
12415 (mve_vcmpcsq_m_n_u<mode>): Likewise.
12416 (mve_vcmpcsq_m_u<mode>): Likewise.
12417 (mve_vcmpeqq_m_n_<supf><mode>): Likewise.
12418 (mve_vcmpeqq_m_<supf><mode>): Likewise.
12419 (mve_vcmpgeq_m_n_s<mode>): Likewise.
12420 (mve_vcmpgeq_m_s<mode>): Likewise.
12421 (mve_vcmpgtq_m_n_s<mode>): Likewise.
12422 (mve_vcmpgtq_m_s<mode>): Likewise.
12423 (mve_vcmphiq_m_n_u<mode>): Likewise.
12424 (mve_vcmphiq_m_u<mode>): Likewise.
12425 (mve_vcmpleq_m_n_s<mode>): Likewise.
12426 (mve_vcmpleq_m_s<mode>): Likewise.
12427 (mve_vcmpltq_m_n_s<mode>): Likewise.
12428 (mve_vcmpltq_m_s<mode>): Likewise.
12429 (mve_vcmpneq_m_n_<supf><mode>): Likewise.
12430 (mve_vcmpneq_m_<supf><mode>): Likewise.
12431 (mve_vdupq_m_n_<supf><mode>): Likewise.
12432 (mve_vmaxaq_m_s<mode>): Likewise.
12433 (mve_vmaxavq_p_s<mode>): Likewise.
12434 (mve_vmaxvq_p_<supf><mode>): Likewise.
12435 (mve_vminaq_m_s<mode>): Likewise.
12436 (mve_vminavq_p_s<mode>): Likewise.
12437 (mve_vminvq_p_<supf><mode>): Likewise.
12438 (mve_vmladavaq_<supf><mode>): Likewise.
12439 (mve_vmladavq_p_<supf><mode>): Likewise.
12440 (mve_vmladavxq_p_s<mode>): Likewise.
12441 (mve_vmlaq_n_<supf><mode>): Likewise.
12442 (mve_vmlasq_n_<supf><mode>): Likewise.
12443 (mve_vmlsdavq_p_s<mode>): Likewise.
12444 (mve_vmlsdavxq_p_s<mode>): Likewise.
12445 (mve_vmvnq_m_<supf><mode>): Likewise.
12446 (mve_vnegq_m_s<mode>): Likewise.
12447 (mve_vpselq_<supf><mode>): Likewise.
12448 (mve_vqabsq_m_s<mode>): Likewise.
12449 (mve_vqdmlahq_n_<supf><mode>): Likewise.
12450 (mve_vqnegq_m_s<mode>): Likewise.
12451 (mve_vqrdmladhq_s<mode>): Likewise.
12452 (mve_vqrdmladhxq_s<mode>): Likewise.
12453 (mve_vqrdmlahq_n_<supf><mode>): Likewise.
12454 (mve_vqrdmlashq_n_<supf><mode>): Likewise.
12455 (mve_vqrdmlsdhq_s<mode>): Likewise.
12456 (mve_vqrdmlsdhxq_s<mode>): Likewise.
12457 (mve_vqrshlq_m_n_<supf><mode>): Likewise.
12458 (mve_vqshlq_m_r_<supf><mode>): Likewise.
12459 (mve_vrev64q_m_<supf><mode>): Likewise.
12460 (mve_vrshlq_m_n_<supf><mode>): Likewise.
12461 (mve_vshlq_m_r_<supf><mode>): Likewise.
12462 (mve_vsliq_n_<supf><mode>): Likewise.
12463 (mve_vsriq_n_<supf><mode>): Likewise.
12464 (mve_vqdmlsdhxq_s<mode>): Likewise.
12465 (mve_vqdmlsdhq_s<mode>): Likewise.
12466 (mve_vqdmladhxq_s<mode>): Likewise.
12467 (mve_vqdmladhq_s<mode>): Likewise.
12468 (mve_vmlsdavaxq_s<mode>): Likewise.
12469 (mve_vmlsdavaq_s<mode>): Likewise.
12470 (mve_vmladavaxq_s<mode>): Likewise.
12471 * config/arm/predicates.md (mve_imm_15):Define predicate to check the
12472 matching constraint Rc.
12473 (mve_imm_31): Define predicate to check the matching constraint Re.
12475 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
12477 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Set operand 1 to DImode.
12478 (vec_cmp<mode>di_dup): Likewise.
12479 * config/gcn/gcn.h (STORE_FLAG_VALUE): Set to -1.
12481 2020-03-18 Andrew Stubbs <ams@codesourcery.com>
12483 * config/gcn/gcn-valu.md (COND_MODE): Delete.
12484 (COND_INT_MODE): Delete.
12485 (cond_op): Add "mult".
12486 (cond_<expander><mode>): Use VEC_ALLREG_MODE.
12487 (cond_<expander><mode>): Use VEC_ALLREG_INT_MODE.
12489 2020-03-18 Richard Biener <rguenther@suse.de>
12491 PR middle-end/94206
12492 * gimple-fold.c (gimple_fold_builtin_memset): Avoid using
12493 partial int modes or not mode-precision integer types for
12496 2020-03-18 Jakub Jelinek <jakub@redhat.com>
12498 * asan.c (get_mem_refs_of_builtin_call): Fix up duplicated word issue
12500 * config/arc/arc.c (frame_stack_add): Likewise.
12501 * gimple-loop-versioning.cc (loop_versioning::analyze_arbitrary_term):
12503 * ipa-predicate.c (predicate::remap_after_inlining): Likewise.
12504 * tree-ssa-strlen.h (handle_printf_call): Likewise.
12505 * tree-ssa-strlen.c (is_strlen_related_p): Likewise.
12506 * optinfo-emit-json.cc (optrecord_json_writer::add_record): Likewise.
12508 2020-03-18 Duan bo <duanbo3@huawei.com>
12511 * config/aarch64/aarch64.md (ldr_got_tiny): Delete.
12512 (@ldr_got_tiny_<mode>): New pattern.
12513 (ldr_got_tiny_sidi): Likewise.
12514 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Use
12515 them to handle SYMBOL_TINY_GOT for ILP32.
12517 2020-03-18 Richard Sandiford <richard.sandiford@arm.com>
12519 * config/aarch64/aarch64.c (aarch64_sve_abi): Treat p12-p15 as
12520 call-preserved for SVE PCS functions.
12521 (aarch64_layout_frame): Cope with up to 12 predicate save slots.
12522 Optimize the case in which there are no following vector save slots.
12524 2020-03-18 Richard Biener <rguenther@suse.de>
12526 PR middle-end/94188
12527 * fold-const.c (build_fold_addr_expr): Convert address to
12529 * asan.c (maybe_create_ssa_name): Strip useless type conversions.
12530 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Use build1
12531 to build the ADDR_EXPR which we don't really want to simplify.
12532 * tree-ssa-dom.c (record_equivalences_from_stmt): Likewise.
12533 * tree-ssa-loop-im.c (gather_mem_refs_stmt): Likewise.
12534 * tree-ssa-forwprop.c (forward_propagate_addr_expr_1): Likewise.
12535 (simplify_builtin_call): Strip useless type conversions.
12536 * tree-ssa-strlen.c (new_strinfo): Likewise.
12538 2020-03-17 Alexey Neyman <stilor@att.net>
12541 * dwarf2out.c (gen_decl_die): Proceed to generating the DIE if
12542 the debug level is terse and the declaration is public. Do not
12543 generate type info.
12544 (dwarf2out_decl): Same.
12545 (add_type_attribute): Return immediately if debug level is
12548 2020-03-17 Richard Sandiford <richard.sandiford@arm.com>
12550 * config/aarch64/iterators.md (Vmtype): Handle V4BF and V8BF.
12552 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12553 Mihail Ionescu <mihail.ionescu@arm.com>
12554 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12556 * config/arm/arm-builtins.c (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS):
12557 Define qualifier for ternary operands.
12558 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
12559 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12560 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12561 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
12562 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12563 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12564 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12565 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
12566 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12567 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12568 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
12569 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12570 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
12571 * config/arm/arm_mve.h (vabavq_s8): Define macro.
12572 (vabavq_s16): Likewise.
12573 (vabavq_s32): Likewise.
12574 (vbicq_m_n_s16): Likewise.
12575 (vbicq_m_n_s32): Likewise.
12576 (vbicq_m_n_u16): Likewise.
12577 (vbicq_m_n_u32): Likewise.
12578 (vcmpeqq_m_f16): Likewise.
12579 (vcmpeqq_m_f32): Likewise.
12580 (vcvtaq_m_s16_f16): Likewise.
12581 (vcvtaq_m_u16_f16): Likewise.
12582 (vcvtaq_m_s32_f32): Likewise.
12583 (vcvtaq_m_u32_f32): Likewise.
12584 (vcvtq_m_f16_s16): Likewise.
12585 (vcvtq_m_f16_u16): Likewise.
12586 (vcvtq_m_f32_s32): Likewise.
12587 (vcvtq_m_f32_u32): Likewise.
12588 (vqrshrnbq_n_s16): Likewise.
12589 (vqrshrnbq_n_u16): Likewise.
12590 (vqrshrnbq_n_s32): Likewise.
12591 (vqrshrnbq_n_u32): Likewise.
12592 (vqrshrunbq_n_s16): Likewise.
12593 (vqrshrunbq_n_s32): Likewise.
12594 (vrmlaldavhaq_s32): Likewise.
12595 (vrmlaldavhaq_u32): Likewise.
12596 (vshlcq_s8): Likewise.
12597 (vshlcq_u8): Likewise.
12598 (vshlcq_s16): Likewise.
12599 (vshlcq_u16): Likewise.
12600 (vshlcq_s32): Likewise.
12601 (vshlcq_u32): Likewise.
12602 (vabavq_u8): Likewise.
12603 (vabavq_u16): Likewise.
12604 (vabavq_u32): Likewise.
12605 (__arm_vabavq_s8): Define intrinsic.
12606 (__arm_vabavq_s16): Likewise.
12607 (__arm_vabavq_s32): Likewise.
12608 (__arm_vabavq_u8): Likewise.
12609 (__arm_vabavq_u16): Likewise.
12610 (__arm_vabavq_u32): Likewise.
12611 (__arm_vbicq_m_n_s16): Likewise.
12612 (__arm_vbicq_m_n_s32): Likewise.
12613 (__arm_vbicq_m_n_u16): Likewise.
12614 (__arm_vbicq_m_n_u32): Likewise.
12615 (__arm_vqrshrnbq_n_s16): Likewise.
12616 (__arm_vqrshrnbq_n_u16): Likewise.
12617 (__arm_vqrshrnbq_n_s32): Likewise.
12618 (__arm_vqrshrnbq_n_u32): Likewise.
12619 (__arm_vqrshrunbq_n_s16): Likewise.
12620 (__arm_vqrshrunbq_n_s32): Likewise.
12621 (__arm_vrmlaldavhaq_s32): Likewise.
12622 (__arm_vrmlaldavhaq_u32): Likewise.
12623 (__arm_vshlcq_s8): Likewise.
12624 (__arm_vshlcq_u8): Likewise.
12625 (__arm_vshlcq_s16): Likewise.
12626 (__arm_vshlcq_u16): Likewise.
12627 (__arm_vshlcq_s32): Likewise.
12628 (__arm_vshlcq_u32): Likewise.
12629 (__arm_vcmpeqq_m_f16): Likewise.
12630 (__arm_vcmpeqq_m_f32): Likewise.
12631 (__arm_vcvtaq_m_s16_f16): Likewise.
12632 (__arm_vcvtaq_m_u16_f16): Likewise.
12633 (__arm_vcvtaq_m_s32_f32): Likewise.
12634 (__arm_vcvtaq_m_u32_f32): Likewise.
12635 (__arm_vcvtq_m_f16_s16): Likewise.
12636 (__arm_vcvtq_m_f16_u16): Likewise.
12637 (__arm_vcvtq_m_f32_s32): Likewise.
12638 (__arm_vcvtq_m_f32_u32): Likewise.
12639 (vcvtaq_m): Define polymorphic variant.
12640 (vcvtq_m): Likewise.
12641 (vabavq): Likewise.
12642 (vshlcq): Likewise.
12643 (vbicq_m_n): Likewise.
12644 (vqrshrnbq_n): Likewise.
12645 (vqrshrunbq_n): Likewise.
12646 * config/arm/arm_mve_builtins.def
12647 (TERNOP_UNONE_UNONE_UNONE_IMM_QUALIFIERS): Use the builtin qualifer.
12648 (TERNOP_UNONE_UNONE_NONE_NONE_QUALIFIERS): Likewise.
12649 (TERNOP_UNONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12650 (TERNOP_NONE_NONE_UNONE_IMM_QUALIFIERS): Likewise.
12651 (TERNOP_UNONE_UNONE_NONE_IMM_QUALIFIERS): Likewise.
12652 (TERNOP_UNONE_UNONE_NONE_UNONE_QUALIFIERS): Likewise.
12653 (TERNOP_UNONE_UNONE_IMM_UNONE_QUALIFIERS): Likewise.
12654 (TERNOP_UNONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12655 (TERNOP_NONE_NONE_NONE_IMM_QUALIFIERS): Likewise.
12656 (TERNOP_NONE_NONE_NONE_UNONE_QUALIFIERS): Likewise.
12657 (TERNOP_NONE_NONE_IMM_UNONE_QUALIFIERS): Likewise.
12658 (TERNOP_NONE_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
12659 (TERNOP_UNONE_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
12660 (TERNOP_NONE_NONE_NONE_NONE_QUALIFIERS): Likewise.
12661 * config/arm/mve.md (VBICQ_M_N): Define iterator.
12662 (VCVTAQ_M): Likewise.
12663 (VCVTQ_M_TO_F): Likewise.
12664 (VQRSHRNBQ_N): Likewise.
12665 (VABAVQ): Likewise.
12666 (VSHLCQ): Likewise.
12667 (VRMLALDAVHAQ): Likewise.
12668 (mve_vbicq_m_n_<supf><mode>): Define RTL pattern.
12669 (mve_vcmpeqq_m_f<mode>): Likewise.
12670 (mve_vcvtaq_m_<supf><mode>): Likewise.
12671 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
12672 (mve_vqrshrnbq_n_<supf><mode>): Likewise.
12673 (mve_vqrshrunbq_n_s<mode>): Likewise.
12674 (mve_vrmlaldavhaq_<supf>v4si): Likewise.
12675 (mve_vabavq_<supf><mode>): Likewise.
12676 (mve_vshlcq_<supf><mode>): Likewise.
12677 (mve_vshlcq_<supf><mode>): Likewise.
12678 (mve_vshlcq_vec_<supf><mode>): Define RTL expand.
12679 (mve_vshlcq_carry_<supf><mode>): Likewise.
12681 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
12682 Mihail Ionescu <mihail.ionescu@arm.com>
12683 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
12685 * config/arm/arm_mve.h (vqmovntq_u16): Define macro.
12686 (vqmovnbq_u16): Likewise.
12687 (vmulltq_poly_p8): Likewise.
12688 (vmullbq_poly_p8): Likewise.
12689 (vmovntq_u16): Likewise.
12690 (vmovnbq_u16): Likewise.
12691 (vmlaldavxq_u16): Likewise.
12692 (vmlaldavq_u16): Likewise.
12693 (vqmovuntq_s16): Likewise.
12694 (vqmovunbq_s16): Likewise.
12695 (vshlltq_n_u8): Likewise.
12696 (vshllbq_n_u8): Likewise.
12697 (vorrq_n_u16): Likewise.
12698 (vbicq_n_u16): Likewise.
12699 (vcmpneq_n_f16): Likewise.
12700 (vcmpneq_f16): Likewise.
12701 (vcmpltq_n_f16): Likewise.
12702 (vcmpltq_f16): Likewise.
12703 (vcmpleq_n_f16): Likewise.
12704 (vcmpleq_f16): Likewise.
12705 (vcmpgtq_n_f16): Likewise.
12706 (vcmpgtq_f16): Likewise.
12707 (vcmpgeq_n_f16): Likewise.
12708 (vcmpgeq_f16): Likewise.
12709 (vcmpeqq_n_f16): Likewise.
12710 (vcmpeqq_f16): Likewise.
12711 (vsubq_f16): Likewise.
12712 (vqmovntq_s16): Likewise.
12713 (vqmovnbq_s16): Likewise.
12714 (vqdmulltq_s16): Likewise.
12715 (vqdmulltq_n_s16): Likewise.
12716 (vqdmullbq_s16): Likewise.
12717 (vqdmullbq_n_s16): Likewise.
12718 (vorrq_f16): Likewise.
12719 (vornq_f16): Likewise.
12720 (vmulq_n_f16): Likewise.
12721 (vmulq_f16): Likewise.
12722 (vmovntq_s16): Likewise.
12723 (vmovnbq_s16): Likewise.
12724 (vmlsldavxq_s16): Likewise.
12725 (vmlsldavq_s16): Likewise.
12726 (vmlaldavxq_s16): Likewise.
12727 (vmlaldavq_s16): Likewise.
12728 (vminnmvq_f16): Likewise.
12729 (vminnmq_f16): Likewise.
12730 (vminnmavq_f16): Likewise.
12731 (vminnmaq_f16): Likewise.
12732 (vmaxnmvq_f16): Likewise.
12733 (vmaxnmq_f16): Likewise.
12734 (vmaxnmavq_f16): Likewise.
12735 (vmaxnmaq_f16): Likewise.
12736 (veorq_f16): Likewise.
12737 (vcmulq_rot90_f16): Likewise.
12738 (vcmulq_rot270_f16): Likewise.
12739 (vcmulq_rot180_f16): Likewise.
12740 (vcmulq_f16): Likewise.
12741 (vcaddq_rot90_f16): Likewise.
12742 (vcaddq_rot270_f16): Likewise.
12743 (vbicq_f16): Likewise.
12744 (vandq_f16): Likewise.
12745 (vaddq_n_f16): Likewise.
12746 (vabdq_f16): Likewise.
12747 (vshlltq_n_s8): Likewise.
12748 (vshllbq_n_s8): Likewise.
12749 (vorrq_n_s16): Likewise.
12750 (vbicq_n_s16): Likewise.
12751 (vqmovntq_u32): Likewise.
12752 (vqmovnbq_u32): Likewise.
12753 (vmulltq_poly_p16): Likewise.
12754 (vmullbq_poly_p16): Likewise.
12755 (vmovntq_u32): Likewise.
12756 (vmovnbq_u32): Likewise.
12757 (vmlaldavxq_u32): Likewise.
12758 (vmlaldavq_u32): Likewise.
12759 (vqmovuntq_s32): Likewise.
12760 (vqmovunbq_s32): Likewise.
12761 (vshlltq_n_u16): Likewise.
12762 (vshllbq_n_u16): Likewise.
12763 (vorrq_n_u32): Likewise.
12764 (vbicq_n_u32): Likewise.
12765 (vcmpneq_n_f32): Likewise.
12766 (vcmpneq_f32): Likewise.
12767 (vcmpltq_n_f32): Likewise.
12768 (vcmpltq_f32): Likewise.
12769 (vcmpleq_n_f32): Likewise.
12770 (vcmpleq_f32): Likewise.
12771 (vcmpgtq_n_f32): Likewise.
12772 (vcmpgtq_f32): Likewise.
12773 (vcmpgeq_n_f32): Likewise.
12774 (vcmpgeq_f32): Likewise.
12775 (vcmpeqq_n_f32): Likewise.
12776 (vcmpeqq_f32): Likewise.
12777 (vsubq_f32): Likewise.
12778 (vqmovntq_s32): Likewise.
12779 (vqmovnbq_s32): Likewise.
12780 (vqdmulltq_s32): Likewise.
12781 (vqdmulltq_n_s32): Likewise.
12782 (vqdmullbq_s32): Likewise.
12783 (vqdmullbq_n_s32): Likewise.
12784 (vorrq_f32): Likewise.
12785 (vornq_f32): Likewise.
12786 (vmulq_n_f32): Likewise.
12787 (vmulq_f32): Likewise.
12788 (vmovntq_s32): Likewise.
12789 (vmovnbq_s32): Likewise.
12790 (vmlsldavxq_s32): Likewise.
12791 (vmlsldavq_s32): Likewise.
12792 (vmlaldavxq_s32): Likewise.
12793 (vmlaldavq_s32): Likewise.
12794 (vminnmvq_f32): Likewise.
12795 (vminnmq_f32): Likewise.
12796 (vminnmavq_f32): Likewise.
12797 (vminnmaq_f32): Likewise.
12798 (vmaxnmvq_f32): Likewise.
12799 (vmaxnmq_f32): Likewise.
12800 (vmaxnmavq_f32): Likewise.
12801 (vmaxnmaq_f32): Likewise.
12802 (veorq_f32): Likewise.
12803 (vcmulq_rot90_f32): Likewise.
12804 (vcmulq_rot270_f32): Likewise.
12805 (vcmulq_rot180_f32): Likewise.
12806 (vcmulq_f32): Likewise.
12807 (vcaddq_rot90_f32): Likewise.
12808 (vcaddq_rot270_f32): Likewise.
12809 (vbicq_f32): Likewise.
12810 (vandq_f32): Likewise.
12811 (vaddq_n_f32): Likewise.
12812 (vabdq_f32): Likewise.
12813 (vshlltq_n_s16): Likewise.
12814 (vshllbq_n_s16): Likewise.
12815 (vorrq_n_s32): Likewise.
12816 (vbicq_n_s32): Likewise.
12817 (vrmlaldavhq_u32): Likewise.
12818 (vctp8q_m): Likewise.
12819 (vctp64q_m): Likewise.
12820 (vctp32q_m): Likewise.
12821 (vctp16q_m): Likewise.
12822 (vaddlvaq_u32): Likewise.
12823 (vrmlsldavhxq_s32): Likewise.
12824 (vrmlsldavhq_s32): Likewise.
12825 (vrmlaldavhxq_s32): Likewise.
12826 (vrmlaldavhq_s32): Likewise.
12827 (vcvttq_f16_f32): Likewise.
12828 (vcvtbq_f16_f32): Likewise.
12829 (vaddlvaq_s32): Likewise.
12830 (__arm_vqmovntq_u16): Define intrinsic.
12831 (__arm_vqmovnbq_u16): Likewise.
12832 (__arm_vmulltq_poly_p8): Likewise.
12833 (__arm_vmullbq_poly_p8): Likewise.
12834 (__arm_vmovntq_u16): Likewise.
12835 (__arm_vmovnbq_u16): Likewise.
12836 (__arm_vmlaldavxq_u16): Likewise.
12837 (__arm_vmlaldavq_u16): Likewise.
12838 (__arm_vqmovuntq_s16): Likewise.
12839 (__arm_vqmovunbq_s16): Likewise.
12840 (__arm_vshlltq_n_u8): Likewise.
12841 (__arm_vshllbq_n_u8): Likewise.
12842 (__arm_vorrq_n_u16): Likewise.
12843 (__arm_vbicq_n_u16): Likewise.
12844 (__arm_vcmpneq_n_f16): Likewise.
12845 (__arm_vcmpneq_f16): Likewise.
12846 (__arm_vcmpltq_n_f16): Likewise.
12847 (__arm_vcmpltq_f16): Likewise.
12848 (__arm_vcmpleq_n_f16): Likewise.
12849 (__arm_vcmpleq_f16): Likewise.
12850 (__arm_vcmpgtq_n_f16): Likewise.
12851 (__arm_vcmpgtq_f16): Likewise.
12852 (__arm_vcmpgeq_n_f16): Likewise.
12853 (__arm_vcmpgeq_f16): Likewise.
12854 (__arm_vcmpeqq_n_f16): Likewise.
12855 (__arm_vcmpeqq_f16): Likewise.
12856 (__arm_vsubq_f16): Likewise.
12857 (__arm_vqmovntq_s16): Likewise.
12858 (__arm_vqmovnbq_s16): Likewise.
12859 (__arm_vqdmulltq_s16): Likewise.
12860 (__arm_vqdmulltq_n_s16): Likewise.
12861 (__arm_vqdmullbq_s16): Likewise.
12862 (__arm_vqdmullbq_n_s16): Likewise.
12863 (__arm_vorrq_f16): Likewise.
12864 (__arm_vornq_f16): Likewise.
12865 (__arm_vmulq_n_f16): Likewise.
12866 (__arm_vmulq_f16): Likewise.
12867 (__arm_vmovntq_s16): Likewise.
12868 (__arm_vmovnbq_s16): Likewise.
12869 (__arm_vmlsldavxq_s16): Likewise.
12870 (__arm_vmlsldavq_s16): Likewise.
12871 (__arm_vmlaldavxq_s16): Likewise.
12872 (__arm_vmlaldavq_s16): Likewise.
12873 (__arm_vminnmvq_f16): Likewise.
12874 (__arm_vminnmq_f16): Likewise.
12875 (__arm_vminnmavq_f16): Likewise.
12876 (__arm_vminnmaq_f16): Likewise.
12877 (__arm_vmaxnmvq_f16): Likewise.
12878 (__arm_vmaxnmq_f16): Likewise.
12879 (__arm_vmaxnmavq_f16): Likewise.
12880 (__arm_vmaxnmaq_f16): Likewise.
12881 (__arm_veorq_f16): Likewise.
12882 (__arm_vcmulq_rot90_f16): Likewise.
12883 (__arm_vcmulq_rot270_f16): Likewise.
12884 (__arm_vcmulq_rot180_f16): Likewise.
12885 (__arm_vcmulq_f16): Likewise.
12886 (__arm_vcaddq_rot90_f16): Likewise.
12887 (__arm_vcaddq_rot270_f16): Likewise.
12888 (__arm_vbicq_f16): Likewise.
12889 (__arm_vandq_f16): Likewise.
12890 (__arm_vaddq_n_f16): Likewise.
12891 (__arm_vabdq_f16): Likewise.
12892 (__arm_vshlltq_n_s8): Likewise.
12893 (__arm_vshllbq_n_s8): Likewise.
12894 (__arm_vorrq_n_s16): Likewise.
12895 (__arm_vbicq_n_s16): Likewise.
12896 (__arm_vqmovntq_u32): Likewise.
12897 (__arm_vqmovnbq_u32): Likewise.
12898 (__arm_vmulltq_poly_p16): Likewise.
12899 (__arm_vmullbq_poly_p16): Likewise.
12900 (__arm_vmovntq_u32): Likewise.
12901 (__arm_vmovnbq_u32): Likewise.
12902 (__arm_vmlaldavxq_u32): Likewise.
12903 (__arm_vmlaldavq_u32): Likewise.
12904 (__arm_vqmovuntq_s32): Likewise.
12905 (__arm_vqmovunbq_s32): Likewise.
12906 (__arm_vshlltq_n_u16): Likewise.
12907 (__arm_vshllbq_n_u16): Likewise.
12908 (__arm_vorrq_n_u32): Likewise.
12909 (__arm_vbicq_n_u32): Likewise.
12910 (__arm_vcmpneq_n_f32): Likewise.
12911 (__arm_vcmpneq_f32): Likewise.
12912 (__arm_vcmpltq_n_f32): Likewise.
12913 (__arm_vcmpltq_f32): Likewise.
12914 (__arm_vcmpleq_n_f32): Likewise.
12915 (__arm_vcmpleq_f32): Likewise.
12916 (__arm_vcmpgtq_n_f32): Likewise.
12917 (__arm_vcmpgtq_f32): Likewise.
12918 (__arm_vcmpgeq_n_f32): Likewise.
12919 (__arm_vcmpgeq_f32): Likewise.
12920 (__arm_vcmpeqq_n_f32): Likewise.
12921 (__arm_vcmpeqq_f32): Likewise.
12922 (__arm_vsubq_f32): Likewise.
12923 (__arm_vqmovntq_s32): Likewise.
12924 (__arm_vqmovnbq_s32): Likewise.
12925 (__arm_vqdmulltq_s32): Likewise.
12926 (__arm_vqdmulltq_n_s32): Likewise.
12927 (__arm_vqdmullbq_s32): Likewise.
12928 (__arm_vqdmullbq_n_s32): Likewise.
12929 (__arm_vorrq_f32): Likewise.
12930 (__arm_vornq_f32): Likewise.
12931 (__arm_vmulq_n_f32): Likewise.
12932 (__arm_vmulq_f32): Likewise.
12933 (__arm_vmovntq_s32): Likewise.
12934 (__arm_vmovnbq_s32): Likewise.
12935 (__arm_vmlsldavxq_s32): Likewise.
12936 (__arm_vmlsldavq_s32): Likewise.
12937 (__arm_vmlaldavxq_s32): Likewise.
12938 (__arm_vmlaldavq_s32): Likewise.
12939 (__arm_vminnmvq_f32): Likewise.
12940 (__arm_vminnmq_f32): Likewise.
12941 (__arm_vminnmavq_f32): Likewise.
12942 (__arm_vminnmaq_f32): Likewise.
12943 (__arm_vmaxnmvq_f32): Likewise.
12944 (__arm_vmaxnmq_f32): Likewise.
12945 (__arm_vmaxnmavq_f32): Likewise.
12946 (__arm_vmaxnmaq_f32): Likewise.
12947 (__arm_veorq_f32): Likewise.
12948 (__arm_vcmulq_rot90_f32): Likewise.
12949 (__arm_vcmulq_rot270_f32): Likewise.
12950 (__arm_vcmulq_rot180_f32): Likewise.
12951 (__arm_vcmulq_f32): Likewise.
12952 (__arm_vcaddq_rot90_f32): Likewise.
12953 (__arm_vcaddq_rot270_f32): Likewise.
12954 (__arm_vbicq_f32): Likewise.
12955 (__arm_vandq_f32): Likewise.
12956 (__arm_vaddq_n_f32): Likewise.
12957 (__arm_vabdq_f32): Likewise.
12958 (__arm_vshlltq_n_s16): Likewise.
12959 (__arm_vshllbq_n_s16): Likewise.
12960 (__arm_vorrq_n_s32): Likewise.
12961 (__arm_vbicq_n_s32): Likewise.
12962 (__arm_vrmlaldavhq_u32): Likewise.
12963 (__arm_vctp8q_m): Likewise.
12964 (__arm_vctp64q_m): Likewise.
12965 (__arm_vctp32q_m): Likewise.
12966 (__arm_vctp16q_m): Likewise.
12967 (__arm_vaddlvaq_u32): Likewise.
12968 (__arm_vrmlsldavhxq_s32): Likewise.
12969 (__arm_vrmlsldavhq_s32): Likewise.
12970 (__arm_vrmlaldavhxq_s32): Likewise.
12971 (__arm_vrmlaldavhq_s32): Likewise.
12972 (__arm_vcvttq_f16_f32): Likewise.
12973 (__arm_vcvtbq_f16_f32): Likewise.
12974 (__arm_vaddlvaq_s32): Likewise.
12975 (vst4q): Define polymorphic variant.
12976 (vrndxq): Likewise.
12978 (vrndpq): Likewise.
12979 (vrndnq): Likewise.
12980 (vrndmq): Likewise.
12981 (vrndaq): Likewise.
12982 (vrev64q): Likewise.
12984 (vdupq_n): Likewise.
12986 (vrev32q): Likewise.
12987 (vcvtbq_f32): Likewise.
12988 (vcvttq_f32): Likewise.
12990 (vsubq_n): Likewise.
12991 (vbrsrq_n): Likewise.
12992 (vcvtq_n): Likewise.
12996 (vaddq_n): Likewise.
13000 (vmulq_n): Likewise.
13002 (vcaddq_rot270): Likewise.
13003 (vcmpeqq_n): Likewise.
13004 (vcmpeqq): Likewise.
13005 (vcaddq_rot90): Likewise.
13006 (vcmpgeq_n): Likewise.
13007 (vcmpgeq): Likewise.
13008 (vcmpgtq_n): Likewise.
13009 (vcmpgtq): Likewise.
13010 (vcmpgtq): Likewise.
13011 (vcmpleq_n): Likewise.
13012 (vcmpleq_n): Likewise.
13013 (vcmpleq): Likewise.
13014 (vcmpleq): Likewise.
13015 (vcmpltq_n): Likewise.
13016 (vcmpltq_n): Likewise.
13017 (vcmpltq): Likewise.
13018 (vcmpltq): Likewise.
13019 (vcmpneq_n): Likewise.
13020 (vcmpneq_n): Likewise.
13021 (vcmpneq): Likewise.
13022 (vcmpneq): Likewise.
13023 (vcmulq): Likewise.
13024 (vcmulq): Likewise.
13025 (vcmulq_rot180): Likewise.
13026 (vcmulq_rot180): Likewise.
13027 (vcmulq_rot270): Likewise.
13028 (vcmulq_rot270): Likewise.
13029 (vcmulq_rot90): Likewise.
13030 (vcmulq_rot90): Likewise.
13033 (vmaxnmaq): Likewise.
13034 (vmaxnmaq): Likewise.
13035 (vmaxnmavq): Likewise.
13036 (vmaxnmavq): Likewise.
13037 (vmaxnmq): Likewise.
13038 (vmaxnmq): Likewise.
13039 (vmaxnmvq): Likewise.
13040 (vmaxnmvq): Likewise.
13041 (vminnmaq): Likewise.
13042 (vminnmaq): Likewise.
13043 (vminnmavq): Likewise.
13044 (vminnmavq): Likewise.
13045 (vminnmq): Likewise.
13046 (vminnmq): Likewise.
13047 (vminnmvq): Likewise.
13048 (vminnmvq): Likewise.
13049 (vbicq_n): Likewise.
13050 (vqmovntq): Likewise.
13051 (vqmovntq): Likewise.
13052 (vqmovnbq): Likewise.
13053 (vqmovnbq): Likewise.
13054 (vmulltq_poly): Likewise.
13055 (vmulltq_poly): Likewise.
13056 (vmullbq_poly): Likewise.
13057 (vmullbq_poly): Likewise.
13058 (vmovntq): Likewise.
13059 (vmovntq): Likewise.
13060 (vmovnbq): Likewise.
13061 (vmovnbq): Likewise.
13062 (vmlaldavxq): Likewise.
13063 (vmlaldavxq): Likewise.
13064 (vqmovuntq): Likewise.
13065 (vqmovuntq): Likewise.
13066 (vshlltq_n): Likewise.
13067 (vshlltq_n): Likewise.
13068 (vshllbq_n): Likewise.
13069 (vshllbq_n): Likewise.
13070 (vorrq_n): Likewise.
13071 (vorrq_n): Likewise.
13072 (vmlaldavq): Likewise.
13073 (vmlaldavq): Likewise.
13074 (vqmovunbq): Likewise.
13075 (vqmovunbq): Likewise.
13076 (vqdmulltq_n): Likewise.
13077 (vqdmulltq_n): Likewise.
13078 (vqdmulltq): Likewise.
13079 (vqdmulltq): Likewise.
13080 (vqdmullbq_n): Likewise.
13081 (vqdmullbq_n): Likewise.
13082 (vqdmullbq): Likewise.
13083 (vqdmullbq): Likewise.
13084 (vaddlvaq): Likewise.
13085 (vaddlvaq): Likewise.
13086 (vrmlaldavhq): Likewise.
13087 (vrmlaldavhq): Likewise.
13088 (vrmlaldavhxq): Likewise.
13089 (vrmlaldavhxq): Likewise.
13090 (vrmlsldavhq): Likewise.
13091 (vrmlsldavhq): Likewise.
13092 (vrmlsldavhxq): Likewise.
13093 (vrmlsldavhxq): Likewise.
13094 (vmlsldavxq): Likewise.
13095 (vmlsldavxq): Likewise.
13096 (vmlsldavq): Likewise.
13097 (vmlsldavq): Likewise.
13098 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13099 (BINOP_NONE_NONE_NONE): Likewise.
13100 (BINOP_UNONE_NONE_NONE): Likewise.
13101 (BINOP_UNONE_UNONE_IMM): Likewise.
13102 (BINOP_UNONE_UNONE_NONE): Likewise.
13103 (BINOP_UNONE_UNONE_UNONE): Likewise.
13104 * config/arm/mve.md (mve_vabdq_f<mode>): Define RTL pattern.
13105 (mve_vaddlvaq_<supf>v4si): Likewise.
13106 (mve_vaddq_n_f<mode>): Likewise.
13107 (mve_vandq_f<mode>): Likewise.
13108 (mve_vbicq_f<mode>): Likewise.
13109 (mve_vbicq_n_<supf><mode>): Likewise.
13110 (mve_vcaddq_rot270_f<mode>): Likewise.
13111 (mve_vcaddq_rot90_f<mode>): Likewise.
13112 (mve_vcmpeqq_f<mode>): Likewise.
13113 (mve_vcmpeqq_n_f<mode>): Likewise.
13114 (mve_vcmpgeq_f<mode>): Likewise.
13115 (mve_vcmpgeq_n_f<mode>): Likewise.
13116 (mve_vcmpgtq_f<mode>): Likewise.
13117 (mve_vcmpgtq_n_f<mode>): Likewise.
13118 (mve_vcmpleq_f<mode>): Likewise.
13119 (mve_vcmpleq_n_f<mode>): Likewise.
13120 (mve_vcmpltq_f<mode>): Likewise.
13121 (mve_vcmpltq_n_f<mode>): Likewise.
13122 (mve_vcmpneq_f<mode>): Likewise.
13123 (mve_vcmpneq_n_f<mode>): Likewise.
13124 (mve_vcmulq_f<mode>): Likewise.
13125 (mve_vcmulq_rot180_f<mode>): Likewise.
13126 (mve_vcmulq_rot270_f<mode>): Likewise.
13127 (mve_vcmulq_rot90_f<mode>): Likewise.
13128 (mve_vctp<mode1>q_mhi): Likewise.
13129 (mve_vcvtbq_f16_f32v8hf): Likewise.
13130 (mve_vcvttq_f16_f32v8hf): Likewise.
13131 (mve_veorq_f<mode>): Likewise.
13132 (mve_vmaxnmaq_f<mode>): Likewise.
13133 (mve_vmaxnmavq_f<mode>): Likewise.
13134 (mve_vmaxnmq_f<mode>): Likewise.
13135 (mve_vmaxnmvq_f<mode>): Likewise.
13136 (mve_vminnmaq_f<mode>): Likewise.
13137 (mve_vminnmavq_f<mode>): Likewise.
13138 (mve_vminnmq_f<mode>): Likewise.
13139 (mve_vminnmvq_f<mode>): Likewise.
13140 (mve_vmlaldavq_<supf><mode>): Likewise.
13141 (mve_vmlaldavxq_<supf><mode>): Likewise.
13142 (mve_vmlsldavq_s<mode>): Likewise.
13143 (mve_vmlsldavxq_s<mode>): Likewise.
13144 (mve_vmovnbq_<supf><mode>): Likewise.
13145 (mve_vmovntq_<supf><mode>): Likewise.
13146 (mve_vmulq_f<mode>): Likewise.
13147 (mve_vmulq_n_f<mode>): Likewise.
13148 (mve_vornq_f<mode>): Likewise.
13149 (mve_vorrq_f<mode>): Likewise.
13150 (mve_vorrq_n_<supf><mode>): Likewise.
13151 (mve_vqdmullbq_n_s<mode>): Likewise.
13152 (mve_vqdmullbq_s<mode>): Likewise.
13153 (mve_vqdmulltq_n_s<mode>): Likewise.
13154 (mve_vqdmulltq_s<mode>): Likewise.
13155 (mve_vqmovnbq_<supf><mode>): Likewise.
13156 (mve_vqmovntq_<supf><mode>): Likewise.
13157 (mve_vqmovunbq_s<mode>): Likewise.
13158 (mve_vqmovuntq_s<mode>): Likewise.
13159 (mve_vrmlaldavhxq_sv4si): Likewise.
13160 (mve_vrmlsldavhq_sv4si): Likewise.
13161 (mve_vrmlsldavhxq_sv4si): Likewise.
13162 (mve_vshllbq_n_<supf><mode>): Likewise.
13163 (mve_vshlltq_n_<supf><mode>): Likewise.
13164 (mve_vsubq_f<mode>): Likewise.
13165 (mve_vmulltq_poly_p<mode>): Likewise.
13166 (mve_vmullbq_poly_p<mode>): Likewise.
13167 (mve_vrmlaldavhq_<supf>v4si): Likewise.
13169 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13170 Mihail Ionescu <mihail.ionescu@arm.com>
13171 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
13173 * config/arm/arm_mve.h (vsubq_u8): Define macro.
13174 (vsubq_n_u8): Likewise.
13175 (vrmulhq_u8): Likewise.
13176 (vrhaddq_u8): Likewise.
13177 (vqsubq_u8): Likewise.
13178 (vqsubq_n_u8): Likewise.
13179 (vqaddq_u8): Likewise.
13180 (vqaddq_n_u8): Likewise.
13181 (vorrq_u8): Likewise.
13182 (vornq_u8): Likewise.
13183 (vmulq_u8): Likewise.
13184 (vmulq_n_u8): Likewise.
13185 (vmulltq_int_u8): Likewise.
13186 (vmullbq_int_u8): Likewise.
13187 (vmulhq_u8): Likewise.
13188 (vmladavq_u8): Likewise.
13189 (vminvq_u8): Likewise.
13190 (vminq_u8): Likewise.
13191 (vmaxvq_u8): Likewise.
13192 (vmaxq_u8): Likewise.
13193 (vhsubq_u8): Likewise.
13194 (vhsubq_n_u8): Likewise.
13195 (vhaddq_u8): Likewise.
13196 (vhaddq_n_u8): Likewise.
13197 (veorq_u8): Likewise.
13198 (vcmpneq_n_u8): Likewise.
13199 (vcmphiq_u8): Likewise.
13200 (vcmphiq_n_u8): Likewise.
13201 (vcmpeqq_u8): Likewise.
13202 (vcmpeqq_n_u8): Likewise.
13203 (vcmpcsq_u8): Likewise.
13204 (vcmpcsq_n_u8): Likewise.
13205 (vcaddq_rot90_u8): Likewise.
13206 (vcaddq_rot270_u8): Likewise.
13207 (vbicq_u8): Likewise.
13208 (vandq_u8): Likewise.
13209 (vaddvq_p_u8): Likewise.
13210 (vaddvaq_u8): Likewise.
13211 (vaddq_n_u8): Likewise.
13212 (vabdq_u8): Likewise.
13213 (vshlq_r_u8): Likewise.
13214 (vrshlq_u8): Likewise.
13215 (vrshlq_n_u8): Likewise.
13216 (vqshlq_u8): Likewise.
13217 (vqshlq_r_u8): Likewise.
13218 (vqrshlq_u8): Likewise.
13219 (vqrshlq_n_u8): Likewise.
13220 (vminavq_s8): Likewise.
13221 (vminaq_s8): Likewise.
13222 (vmaxavq_s8): Likewise.
13223 (vmaxaq_s8): Likewise.
13224 (vbrsrq_n_u8): Likewise.
13225 (vshlq_n_u8): Likewise.
13226 (vrshrq_n_u8): Likewise.
13227 (vqshlq_n_u8): Likewise.
13228 (vcmpneq_n_s8): Likewise.
13229 (vcmpltq_s8): Likewise.
13230 (vcmpltq_n_s8): Likewise.
13231 (vcmpleq_s8): Likewise.
13232 (vcmpleq_n_s8): Likewise.
13233 (vcmpgtq_s8): Likewise.
13234 (vcmpgtq_n_s8): Likewise.
13235 (vcmpgeq_s8): Likewise.
13236 (vcmpgeq_n_s8): Likewise.
13237 (vcmpeqq_s8): Likewise.
13238 (vcmpeqq_n_s8): Likewise.
13239 (vqshluq_n_s8): Likewise.
13240 (vaddvq_p_s8): Likewise.
13241 (vsubq_s8): Likewise.
13242 (vsubq_n_s8): Likewise.
13243 (vshlq_r_s8): Likewise.
13244 (vrshlq_s8): Likewise.
13245 (vrshlq_n_s8): Likewise.
13246 (vrmulhq_s8): Likewise.
13247 (vrhaddq_s8): Likewise.
13248 (vqsubq_s8): Likewise.
13249 (vqsubq_n_s8): Likewise.
13250 (vqshlq_s8): Likewise.
13251 (vqshlq_r_s8): Likewise.
13252 (vqrshlq_s8): Likewise.
13253 (vqrshlq_n_s8): Likewise.
13254 (vqrdmulhq_s8): Likewise.
13255 (vqrdmulhq_n_s8): Likewise.
13256 (vqdmulhq_s8): Likewise.
13257 (vqdmulhq_n_s8): Likewise.
13258 (vqaddq_s8): Likewise.
13259 (vqaddq_n_s8): Likewise.
13260 (vorrq_s8): Likewise.
13261 (vornq_s8): Likewise.
13262 (vmulq_s8): Likewise.
13263 (vmulq_n_s8): Likewise.
13264 (vmulltq_int_s8): Likewise.
13265 (vmullbq_int_s8): Likewise.
13266 (vmulhq_s8): Likewise.
13267 (vmlsdavxq_s8): Likewise.
13268 (vmlsdavq_s8): Likewise.
13269 (vmladavxq_s8): Likewise.
13270 (vmladavq_s8): Likewise.
13271 (vminvq_s8): Likewise.
13272 (vminq_s8): Likewise.
13273 (vmaxvq_s8): Likewise.
13274 (vmaxq_s8): Likewise.
13275 (vhsubq_s8): Likewise.
13276 (vhsubq_n_s8): Likewise.
13277 (vhcaddq_rot90_s8): Likewise.
13278 (vhcaddq_rot270_s8): Likewise.
13279 (vhaddq_s8): Likewise.
13280 (vhaddq_n_s8): Likewise.
13281 (veorq_s8): Likewise.
13282 (vcaddq_rot90_s8): Likewise.
13283 (vcaddq_rot270_s8): Likewise.
13284 (vbrsrq_n_s8): Likewise.
13285 (vbicq_s8): Likewise.
13286 (vandq_s8): Likewise.
13287 (vaddvaq_s8): Likewise.
13288 (vaddq_n_s8): Likewise.
13289 (vabdq_s8): Likewise.
13290 (vshlq_n_s8): Likewise.
13291 (vrshrq_n_s8): Likewise.
13292 (vqshlq_n_s8): Likewise.
13293 (vsubq_u16): Likewise.
13294 (vsubq_n_u16): Likewise.
13295 (vrmulhq_u16): Likewise.
13296 (vrhaddq_u16): Likewise.
13297 (vqsubq_u16): Likewise.
13298 (vqsubq_n_u16): Likewise.
13299 (vqaddq_u16): Likewise.
13300 (vqaddq_n_u16): Likewise.
13301 (vorrq_u16): Likewise.
13302 (vornq_u16): Likewise.
13303 (vmulq_u16): Likewise.
13304 (vmulq_n_u16): Likewise.
13305 (vmulltq_int_u16): Likewise.
13306 (vmullbq_int_u16): Likewise.
13307 (vmulhq_u16): Likewise.
13308 (vmladavq_u16): Likewise.
13309 (vminvq_u16): Likewise.
13310 (vminq_u16): Likewise.
13311 (vmaxvq_u16): Likewise.
13312 (vmaxq_u16): Likewise.
13313 (vhsubq_u16): Likewise.
13314 (vhsubq_n_u16): Likewise.
13315 (vhaddq_u16): Likewise.
13316 (vhaddq_n_u16): Likewise.
13317 (veorq_u16): Likewise.
13318 (vcmpneq_n_u16): Likewise.
13319 (vcmphiq_u16): Likewise.
13320 (vcmphiq_n_u16): Likewise.
13321 (vcmpeqq_u16): Likewise.
13322 (vcmpeqq_n_u16): Likewise.
13323 (vcmpcsq_u16): Likewise.
13324 (vcmpcsq_n_u16): Likewise.
13325 (vcaddq_rot90_u16): Likewise.
13326 (vcaddq_rot270_u16): Likewise.
13327 (vbicq_u16): Likewise.
13328 (vandq_u16): Likewise.
13329 (vaddvq_p_u16): Likewise.
13330 (vaddvaq_u16): Likewise.
13331 (vaddq_n_u16): Likewise.
13332 (vabdq_u16): Likewise.
13333 (vshlq_r_u16): Likewise.
13334 (vrshlq_u16): Likewise.
13335 (vrshlq_n_u16): Likewise.
13336 (vqshlq_u16): Likewise.
13337 (vqshlq_r_u16): Likewise.
13338 (vqrshlq_u16): Likewise.
13339 (vqrshlq_n_u16): Likewise.
13340 (vminavq_s16): Likewise.
13341 (vminaq_s16): Likewise.
13342 (vmaxavq_s16): Likewise.
13343 (vmaxaq_s16): Likewise.
13344 (vbrsrq_n_u16): Likewise.
13345 (vshlq_n_u16): Likewise.
13346 (vrshrq_n_u16): Likewise.
13347 (vqshlq_n_u16): Likewise.
13348 (vcmpneq_n_s16): Likewise.
13349 (vcmpltq_s16): Likewise.
13350 (vcmpltq_n_s16): Likewise.
13351 (vcmpleq_s16): Likewise.
13352 (vcmpleq_n_s16): Likewise.
13353 (vcmpgtq_s16): Likewise.
13354 (vcmpgtq_n_s16): Likewise.
13355 (vcmpgeq_s16): Likewise.
13356 (vcmpgeq_n_s16): Likewise.
13357 (vcmpeqq_s16): Likewise.
13358 (vcmpeqq_n_s16): Likewise.
13359 (vqshluq_n_s16): Likewise.
13360 (vaddvq_p_s16): Likewise.
13361 (vsubq_s16): Likewise.
13362 (vsubq_n_s16): Likewise.
13363 (vshlq_r_s16): Likewise.
13364 (vrshlq_s16): Likewise.
13365 (vrshlq_n_s16): Likewise.
13366 (vrmulhq_s16): Likewise.
13367 (vrhaddq_s16): Likewise.
13368 (vqsubq_s16): Likewise.
13369 (vqsubq_n_s16): Likewise.
13370 (vqshlq_s16): Likewise.
13371 (vqshlq_r_s16): Likewise.
13372 (vqrshlq_s16): Likewise.
13373 (vqrshlq_n_s16): Likewise.
13374 (vqrdmulhq_s16): Likewise.
13375 (vqrdmulhq_n_s16): Likewise.
13376 (vqdmulhq_s16): Likewise.
13377 (vqdmulhq_n_s16): Likewise.
13378 (vqaddq_s16): Likewise.
13379 (vqaddq_n_s16): Likewise.
13380 (vorrq_s16): Likewise.
13381 (vornq_s16): Likewise.
13382 (vmulq_s16): Likewise.
13383 (vmulq_n_s16): Likewise.
13384 (vmulltq_int_s16): Likewise.
13385 (vmullbq_int_s16): Likewise.
13386 (vmulhq_s16): Likewise.
13387 (vmlsdavxq_s16): Likewise.
13388 (vmlsdavq_s16): Likewise.
13389 (vmladavxq_s16): Likewise.
13390 (vmladavq_s16): Likewise.
13391 (vminvq_s16): Likewise.
13392 (vminq_s16): Likewise.
13393 (vmaxvq_s16): Likewise.
13394 (vmaxq_s16): Likewise.
13395 (vhsubq_s16): Likewise.
13396 (vhsubq_n_s16): Likewise.
13397 (vhcaddq_rot90_s16): Likewise.
13398 (vhcaddq_rot270_s16): Likewise.
13399 (vhaddq_s16): Likewise.
13400 (vhaddq_n_s16): Likewise.
13401 (veorq_s16): Likewise.
13402 (vcaddq_rot90_s16): Likewise.
13403 (vcaddq_rot270_s16): Likewise.
13404 (vbrsrq_n_s16): Likewise.
13405 (vbicq_s16): Likewise.
13406 (vandq_s16): Likewise.
13407 (vaddvaq_s16): Likewise.
13408 (vaddq_n_s16): Likewise.
13409 (vabdq_s16): Likewise.
13410 (vshlq_n_s16): Likewise.
13411 (vrshrq_n_s16): Likewise.
13412 (vqshlq_n_s16): Likewise.
13413 (vsubq_u32): Likewise.
13414 (vsubq_n_u32): Likewise.
13415 (vrmulhq_u32): Likewise.
13416 (vrhaddq_u32): Likewise.
13417 (vqsubq_u32): Likewise.
13418 (vqsubq_n_u32): Likewise.
13419 (vqaddq_u32): Likewise.
13420 (vqaddq_n_u32): Likewise.
13421 (vorrq_u32): Likewise.
13422 (vornq_u32): Likewise.
13423 (vmulq_u32): Likewise.
13424 (vmulq_n_u32): Likewise.
13425 (vmulltq_int_u32): Likewise.
13426 (vmullbq_int_u32): Likewise.
13427 (vmulhq_u32): Likewise.
13428 (vmladavq_u32): Likewise.
13429 (vminvq_u32): Likewise.
13430 (vminq_u32): Likewise.
13431 (vmaxvq_u32): Likewise.
13432 (vmaxq_u32): Likewise.
13433 (vhsubq_u32): Likewise.
13434 (vhsubq_n_u32): Likewise.
13435 (vhaddq_u32): Likewise.
13436 (vhaddq_n_u32): Likewise.
13437 (veorq_u32): Likewise.
13438 (vcmpneq_n_u32): Likewise.
13439 (vcmphiq_u32): Likewise.
13440 (vcmphiq_n_u32): Likewise.
13441 (vcmpeqq_u32): Likewise.
13442 (vcmpeqq_n_u32): Likewise.
13443 (vcmpcsq_u32): Likewise.
13444 (vcmpcsq_n_u32): Likewise.
13445 (vcaddq_rot90_u32): Likewise.
13446 (vcaddq_rot270_u32): Likewise.
13447 (vbicq_u32): Likewise.
13448 (vandq_u32): Likewise.
13449 (vaddvq_p_u32): Likewise.
13450 (vaddvaq_u32): Likewise.
13451 (vaddq_n_u32): Likewise.
13452 (vabdq_u32): Likewise.
13453 (vshlq_r_u32): Likewise.
13454 (vrshlq_u32): Likewise.
13455 (vrshlq_n_u32): Likewise.
13456 (vqshlq_u32): Likewise.
13457 (vqshlq_r_u32): Likewise.
13458 (vqrshlq_u32): Likewise.
13459 (vqrshlq_n_u32): Likewise.
13460 (vminavq_s32): Likewise.
13461 (vminaq_s32): Likewise.
13462 (vmaxavq_s32): Likewise.
13463 (vmaxaq_s32): Likewise.
13464 (vbrsrq_n_u32): Likewise.
13465 (vshlq_n_u32): Likewise.
13466 (vrshrq_n_u32): Likewise.
13467 (vqshlq_n_u32): Likewise.
13468 (vcmpneq_n_s32): Likewise.
13469 (vcmpltq_s32): Likewise.
13470 (vcmpltq_n_s32): Likewise.
13471 (vcmpleq_s32): Likewise.
13472 (vcmpleq_n_s32): Likewise.
13473 (vcmpgtq_s32): Likewise.
13474 (vcmpgtq_n_s32): Likewise.
13475 (vcmpgeq_s32): Likewise.
13476 (vcmpgeq_n_s32): Likewise.
13477 (vcmpeqq_s32): Likewise.
13478 (vcmpeqq_n_s32): Likewise.
13479 (vqshluq_n_s32): Likewise.
13480 (vaddvq_p_s32): Likewise.
13481 (vsubq_s32): Likewise.
13482 (vsubq_n_s32): Likewise.
13483 (vshlq_r_s32): Likewise.
13484 (vrshlq_s32): Likewise.
13485 (vrshlq_n_s32): Likewise.
13486 (vrmulhq_s32): Likewise.
13487 (vrhaddq_s32): Likewise.
13488 (vqsubq_s32): Likewise.
13489 (vqsubq_n_s32): Likewise.
13490 (vqshlq_s32): Likewise.
13491 (vqshlq_r_s32): Likewise.
13492 (vqrshlq_s32): Likewise.
13493 (vqrshlq_n_s32): Likewise.
13494 (vqrdmulhq_s32): Likewise.
13495 (vqrdmulhq_n_s32): Likewise.
13496 (vqdmulhq_s32): Likewise.
13497 (vqdmulhq_n_s32): Likewise.
13498 (vqaddq_s32): Likewise.
13499 (vqaddq_n_s32): Likewise.
13500 (vorrq_s32): Likewise.
13501 (vornq_s32): Likewise.
13502 (vmulq_s32): Likewise.
13503 (vmulq_n_s32): Likewise.
13504 (vmulltq_int_s32): Likewise.
13505 (vmullbq_int_s32): Likewise.
13506 (vmulhq_s32): Likewise.
13507 (vmlsdavxq_s32): Likewise.
13508 (vmlsdavq_s32): Likewise.
13509 (vmladavxq_s32): Likewise.
13510 (vmladavq_s32): Likewise.
13511 (vminvq_s32): Likewise.
13512 (vminq_s32): Likewise.
13513 (vmaxvq_s32): Likewise.
13514 (vmaxq_s32): Likewise.
13515 (vhsubq_s32): Likewise.
13516 (vhsubq_n_s32): Likewise.
13517 (vhcaddq_rot90_s32): Likewise.
13518 (vhcaddq_rot270_s32): Likewise.
13519 (vhaddq_s32): Likewise.
13520 (vhaddq_n_s32): Likewise.
13521 (veorq_s32): Likewise.
13522 (vcaddq_rot90_s32): Likewise.
13523 (vcaddq_rot270_s32): Likewise.
13524 (vbrsrq_n_s32): Likewise.
13525 (vbicq_s32): Likewise.
13526 (vandq_s32): Likewise.
13527 (vaddvaq_s32): Likewise.
13528 (vaddq_n_s32): Likewise.
13529 (vabdq_s32): Likewise.
13530 (vshlq_n_s32): Likewise.
13531 (vrshrq_n_s32): Likewise.
13532 (vqshlq_n_s32): Likewise.
13533 (__arm_vsubq_u8): Define intrinsic.
13534 (__arm_vsubq_n_u8): Likewise.
13535 (__arm_vrmulhq_u8): Likewise.
13536 (__arm_vrhaddq_u8): Likewise.
13537 (__arm_vqsubq_u8): Likewise.
13538 (__arm_vqsubq_n_u8): Likewise.
13539 (__arm_vqaddq_u8): Likewise.
13540 (__arm_vqaddq_n_u8): Likewise.
13541 (__arm_vorrq_u8): Likewise.
13542 (__arm_vornq_u8): Likewise.
13543 (__arm_vmulq_u8): Likewise.
13544 (__arm_vmulq_n_u8): Likewise.
13545 (__arm_vmulltq_int_u8): Likewise.
13546 (__arm_vmullbq_int_u8): Likewise.
13547 (__arm_vmulhq_u8): Likewise.
13548 (__arm_vmladavq_u8): Likewise.
13549 (__arm_vminvq_u8): Likewise.
13550 (__arm_vminq_u8): Likewise.
13551 (__arm_vmaxvq_u8): Likewise.
13552 (__arm_vmaxq_u8): Likewise.
13553 (__arm_vhsubq_u8): Likewise.
13554 (__arm_vhsubq_n_u8): Likewise.
13555 (__arm_vhaddq_u8): Likewise.
13556 (__arm_vhaddq_n_u8): Likewise.
13557 (__arm_veorq_u8): Likewise.
13558 (__arm_vcmpneq_n_u8): Likewise.
13559 (__arm_vcmphiq_u8): Likewise.
13560 (__arm_vcmphiq_n_u8): Likewise.
13561 (__arm_vcmpeqq_u8): Likewise.
13562 (__arm_vcmpeqq_n_u8): Likewise.
13563 (__arm_vcmpcsq_u8): Likewise.
13564 (__arm_vcmpcsq_n_u8): Likewise.
13565 (__arm_vcaddq_rot90_u8): Likewise.
13566 (__arm_vcaddq_rot270_u8): Likewise.
13567 (__arm_vbicq_u8): Likewise.
13568 (__arm_vandq_u8): Likewise.
13569 (__arm_vaddvq_p_u8): Likewise.
13570 (__arm_vaddvaq_u8): Likewise.
13571 (__arm_vaddq_n_u8): Likewise.
13572 (__arm_vabdq_u8): Likewise.
13573 (__arm_vshlq_r_u8): Likewise.
13574 (__arm_vrshlq_u8): Likewise.
13575 (__arm_vrshlq_n_u8): Likewise.
13576 (__arm_vqshlq_u8): Likewise.
13577 (__arm_vqshlq_r_u8): Likewise.
13578 (__arm_vqrshlq_u8): Likewise.
13579 (__arm_vqrshlq_n_u8): Likewise.
13580 (__arm_vminavq_s8): Likewise.
13581 (__arm_vminaq_s8): Likewise.
13582 (__arm_vmaxavq_s8): Likewise.
13583 (__arm_vmaxaq_s8): Likewise.
13584 (__arm_vbrsrq_n_u8): Likewise.
13585 (__arm_vshlq_n_u8): Likewise.
13586 (__arm_vrshrq_n_u8): Likewise.
13587 (__arm_vqshlq_n_u8): Likewise.
13588 (__arm_vcmpneq_n_s8): Likewise.
13589 (__arm_vcmpltq_s8): Likewise.
13590 (__arm_vcmpltq_n_s8): Likewise.
13591 (__arm_vcmpleq_s8): Likewise.
13592 (__arm_vcmpleq_n_s8): Likewise.
13593 (__arm_vcmpgtq_s8): Likewise.
13594 (__arm_vcmpgtq_n_s8): Likewise.
13595 (__arm_vcmpgeq_s8): Likewise.
13596 (__arm_vcmpgeq_n_s8): Likewise.
13597 (__arm_vcmpeqq_s8): Likewise.
13598 (__arm_vcmpeqq_n_s8): Likewise.
13599 (__arm_vqshluq_n_s8): Likewise.
13600 (__arm_vaddvq_p_s8): Likewise.
13601 (__arm_vsubq_s8): Likewise.
13602 (__arm_vsubq_n_s8): Likewise.
13603 (__arm_vshlq_r_s8): Likewise.
13604 (__arm_vrshlq_s8): Likewise.
13605 (__arm_vrshlq_n_s8): Likewise.
13606 (__arm_vrmulhq_s8): Likewise.
13607 (__arm_vrhaddq_s8): Likewise.
13608 (__arm_vqsubq_s8): Likewise.
13609 (__arm_vqsubq_n_s8): Likewise.
13610 (__arm_vqshlq_s8): Likewise.
13611 (__arm_vqshlq_r_s8): Likewise.
13612 (__arm_vqrshlq_s8): Likewise.
13613 (__arm_vqrshlq_n_s8): Likewise.
13614 (__arm_vqrdmulhq_s8): Likewise.
13615 (__arm_vqrdmulhq_n_s8): Likewise.
13616 (__arm_vqdmulhq_s8): Likewise.
13617 (__arm_vqdmulhq_n_s8): Likewise.
13618 (__arm_vqaddq_s8): Likewise.
13619 (__arm_vqaddq_n_s8): Likewise.
13620 (__arm_vorrq_s8): Likewise.
13621 (__arm_vornq_s8): Likewise.
13622 (__arm_vmulq_s8): Likewise.
13623 (__arm_vmulq_n_s8): Likewise.
13624 (__arm_vmulltq_int_s8): Likewise.
13625 (__arm_vmullbq_int_s8): Likewise.
13626 (__arm_vmulhq_s8): Likewise.
13627 (__arm_vmlsdavxq_s8): Likewise.
13628 (__arm_vmlsdavq_s8): Likewise.
13629 (__arm_vmladavxq_s8): Likewise.
13630 (__arm_vmladavq_s8): Likewise.
13631 (__arm_vminvq_s8): Likewise.
13632 (__arm_vminq_s8): Likewise.
13633 (__arm_vmaxvq_s8): Likewise.
13634 (__arm_vmaxq_s8): Likewise.
13635 (__arm_vhsubq_s8): Likewise.
13636 (__arm_vhsubq_n_s8): Likewise.
13637 (__arm_vhcaddq_rot90_s8): Likewise.
13638 (__arm_vhcaddq_rot270_s8): Likewise.
13639 (__arm_vhaddq_s8): Likewise.
13640 (__arm_vhaddq_n_s8): Likewise.
13641 (__arm_veorq_s8): Likewise.
13642 (__arm_vcaddq_rot90_s8): Likewise.
13643 (__arm_vcaddq_rot270_s8): Likewise.
13644 (__arm_vbrsrq_n_s8): Likewise.
13645 (__arm_vbicq_s8): Likewise.
13646 (__arm_vandq_s8): Likewise.
13647 (__arm_vaddvaq_s8): Likewise.
13648 (__arm_vaddq_n_s8): Likewise.
13649 (__arm_vabdq_s8): Likewise.
13650 (__arm_vshlq_n_s8): Likewise.
13651 (__arm_vrshrq_n_s8): Likewise.
13652 (__arm_vqshlq_n_s8): Likewise.
13653 (__arm_vsubq_u16): Likewise.
13654 (__arm_vsubq_n_u16): Likewise.
13655 (__arm_vrmulhq_u16): Likewise.
13656 (__arm_vrhaddq_u16): Likewise.
13657 (__arm_vqsubq_u16): Likewise.
13658 (__arm_vqsubq_n_u16): Likewise.
13659 (__arm_vqaddq_u16): Likewise.
13660 (__arm_vqaddq_n_u16): Likewise.
13661 (__arm_vorrq_u16): Likewise.
13662 (__arm_vornq_u16): Likewise.
13663 (__arm_vmulq_u16): Likewise.
13664 (__arm_vmulq_n_u16): Likewise.
13665 (__arm_vmulltq_int_u16): Likewise.
13666 (__arm_vmullbq_int_u16): Likewise.
13667 (__arm_vmulhq_u16): Likewise.
13668 (__arm_vmladavq_u16): Likewise.
13669 (__arm_vminvq_u16): Likewise.
13670 (__arm_vminq_u16): Likewise.
13671 (__arm_vmaxvq_u16): Likewise.
13672 (__arm_vmaxq_u16): Likewise.
13673 (__arm_vhsubq_u16): Likewise.
13674 (__arm_vhsubq_n_u16): Likewise.
13675 (__arm_vhaddq_u16): Likewise.
13676 (__arm_vhaddq_n_u16): Likewise.
13677 (__arm_veorq_u16): Likewise.
13678 (__arm_vcmpneq_n_u16): Likewise.
13679 (__arm_vcmphiq_u16): Likewise.
13680 (__arm_vcmphiq_n_u16): Likewise.
13681 (__arm_vcmpeqq_u16): Likewise.
13682 (__arm_vcmpeqq_n_u16): Likewise.
13683 (__arm_vcmpcsq_u16): Likewise.
13684 (__arm_vcmpcsq_n_u16): Likewise.
13685 (__arm_vcaddq_rot90_u16): Likewise.
13686 (__arm_vcaddq_rot270_u16): Likewise.
13687 (__arm_vbicq_u16): Likewise.
13688 (__arm_vandq_u16): Likewise.
13689 (__arm_vaddvq_p_u16): Likewise.
13690 (__arm_vaddvaq_u16): Likewise.
13691 (__arm_vaddq_n_u16): Likewise.
13692 (__arm_vabdq_u16): Likewise.
13693 (__arm_vshlq_r_u16): Likewise.
13694 (__arm_vrshlq_u16): Likewise.
13695 (__arm_vrshlq_n_u16): Likewise.
13696 (__arm_vqshlq_u16): Likewise.
13697 (__arm_vqshlq_r_u16): Likewise.
13698 (__arm_vqrshlq_u16): Likewise.
13699 (__arm_vqrshlq_n_u16): Likewise.
13700 (__arm_vminavq_s16): Likewise.
13701 (__arm_vminaq_s16): Likewise.
13702 (__arm_vmaxavq_s16): Likewise.
13703 (__arm_vmaxaq_s16): Likewise.
13704 (__arm_vbrsrq_n_u16): Likewise.
13705 (__arm_vshlq_n_u16): Likewise.
13706 (__arm_vrshrq_n_u16): Likewise.
13707 (__arm_vqshlq_n_u16): Likewise.
13708 (__arm_vcmpneq_n_s16): Likewise.
13709 (__arm_vcmpltq_s16): Likewise.
13710 (__arm_vcmpltq_n_s16): Likewise.
13711 (__arm_vcmpleq_s16): Likewise.
13712 (__arm_vcmpleq_n_s16): Likewise.
13713 (__arm_vcmpgtq_s16): Likewise.
13714 (__arm_vcmpgtq_n_s16): Likewise.
13715 (__arm_vcmpgeq_s16): Likewise.
13716 (__arm_vcmpgeq_n_s16): Likewise.
13717 (__arm_vcmpeqq_s16): Likewise.
13718 (__arm_vcmpeqq_n_s16): Likewise.
13719 (__arm_vqshluq_n_s16): Likewise.
13720 (__arm_vaddvq_p_s16): Likewise.
13721 (__arm_vsubq_s16): Likewise.
13722 (__arm_vsubq_n_s16): Likewise.
13723 (__arm_vshlq_r_s16): Likewise.
13724 (__arm_vrshlq_s16): Likewise.
13725 (__arm_vrshlq_n_s16): Likewise.
13726 (__arm_vrmulhq_s16): Likewise.
13727 (__arm_vrhaddq_s16): Likewise.
13728 (__arm_vqsubq_s16): Likewise.
13729 (__arm_vqsubq_n_s16): Likewise.
13730 (__arm_vqshlq_s16): Likewise.
13731 (__arm_vqshlq_r_s16): Likewise.
13732 (__arm_vqrshlq_s16): Likewise.
13733 (__arm_vqrshlq_n_s16): Likewise.
13734 (__arm_vqrdmulhq_s16): Likewise.
13735 (__arm_vqrdmulhq_n_s16): Likewise.
13736 (__arm_vqdmulhq_s16): Likewise.
13737 (__arm_vqdmulhq_n_s16): Likewise.
13738 (__arm_vqaddq_s16): Likewise.
13739 (__arm_vqaddq_n_s16): Likewise.
13740 (__arm_vorrq_s16): Likewise.
13741 (__arm_vornq_s16): Likewise.
13742 (__arm_vmulq_s16): Likewise.
13743 (__arm_vmulq_n_s16): Likewise.
13744 (__arm_vmulltq_int_s16): Likewise.
13745 (__arm_vmullbq_int_s16): Likewise.
13746 (__arm_vmulhq_s16): Likewise.
13747 (__arm_vmlsdavxq_s16): Likewise.
13748 (__arm_vmlsdavq_s16): Likewise.
13749 (__arm_vmladavxq_s16): Likewise.
13750 (__arm_vmladavq_s16): Likewise.
13751 (__arm_vminvq_s16): Likewise.
13752 (__arm_vminq_s16): Likewise.
13753 (__arm_vmaxvq_s16): Likewise.
13754 (__arm_vmaxq_s16): Likewise.
13755 (__arm_vhsubq_s16): Likewise.
13756 (__arm_vhsubq_n_s16): Likewise.
13757 (__arm_vhcaddq_rot90_s16): Likewise.
13758 (__arm_vhcaddq_rot270_s16): Likewise.
13759 (__arm_vhaddq_s16): Likewise.
13760 (__arm_vhaddq_n_s16): Likewise.
13761 (__arm_veorq_s16): Likewise.
13762 (__arm_vcaddq_rot90_s16): Likewise.
13763 (__arm_vcaddq_rot270_s16): Likewise.
13764 (__arm_vbrsrq_n_s16): Likewise.
13765 (__arm_vbicq_s16): Likewise.
13766 (__arm_vandq_s16): Likewise.
13767 (__arm_vaddvaq_s16): Likewise.
13768 (__arm_vaddq_n_s16): Likewise.
13769 (__arm_vabdq_s16): Likewise.
13770 (__arm_vshlq_n_s16): Likewise.
13771 (__arm_vrshrq_n_s16): Likewise.
13772 (__arm_vqshlq_n_s16): Likewise.
13773 (__arm_vsubq_u32): Likewise.
13774 (__arm_vsubq_n_u32): Likewise.
13775 (__arm_vrmulhq_u32): Likewise.
13776 (__arm_vrhaddq_u32): Likewise.
13777 (__arm_vqsubq_u32): Likewise.
13778 (__arm_vqsubq_n_u32): Likewise.
13779 (__arm_vqaddq_u32): Likewise.
13780 (__arm_vqaddq_n_u32): Likewise.
13781 (__arm_vorrq_u32): Likewise.
13782 (__arm_vornq_u32): Likewise.
13783 (__arm_vmulq_u32): Likewise.
13784 (__arm_vmulq_n_u32): Likewise.
13785 (__arm_vmulltq_int_u32): Likewise.
13786 (__arm_vmullbq_int_u32): Likewise.
13787 (__arm_vmulhq_u32): Likewise.
13788 (__arm_vmladavq_u32): Likewise.
13789 (__arm_vminvq_u32): Likewise.
13790 (__arm_vminq_u32): Likewise.
13791 (__arm_vmaxvq_u32): Likewise.
13792 (__arm_vmaxq_u32): Likewise.
13793 (__arm_vhsubq_u32): Likewise.
13794 (__arm_vhsubq_n_u32): Likewise.
13795 (__arm_vhaddq_u32): Likewise.
13796 (__arm_vhaddq_n_u32): Likewise.
13797 (__arm_veorq_u32): Likewise.
13798 (__arm_vcmpneq_n_u32): Likewise.
13799 (__arm_vcmphiq_u32): Likewise.
13800 (__arm_vcmphiq_n_u32): Likewise.
13801 (__arm_vcmpeqq_u32): Likewise.
13802 (__arm_vcmpeqq_n_u32): Likewise.
13803 (__arm_vcmpcsq_u32): Likewise.
13804 (__arm_vcmpcsq_n_u32): Likewise.
13805 (__arm_vcaddq_rot90_u32): Likewise.
13806 (__arm_vcaddq_rot270_u32): Likewise.
13807 (__arm_vbicq_u32): Likewise.
13808 (__arm_vandq_u32): Likewise.
13809 (__arm_vaddvq_p_u32): Likewise.
13810 (__arm_vaddvaq_u32): Likewise.
13811 (__arm_vaddq_n_u32): Likewise.
13812 (__arm_vabdq_u32): Likewise.
13813 (__arm_vshlq_r_u32): Likewise.
13814 (__arm_vrshlq_u32): Likewise.
13815 (__arm_vrshlq_n_u32): Likewise.
13816 (__arm_vqshlq_u32): Likewise.
13817 (__arm_vqshlq_r_u32): Likewise.
13818 (__arm_vqrshlq_u32): Likewise.
13819 (__arm_vqrshlq_n_u32): Likewise.
13820 (__arm_vminavq_s32): Likewise.
13821 (__arm_vminaq_s32): Likewise.
13822 (__arm_vmaxavq_s32): Likewise.
13823 (__arm_vmaxaq_s32): Likewise.
13824 (__arm_vbrsrq_n_u32): Likewise.
13825 (__arm_vshlq_n_u32): Likewise.
13826 (__arm_vrshrq_n_u32): Likewise.
13827 (__arm_vqshlq_n_u32): Likewise.
13828 (__arm_vcmpneq_n_s32): Likewise.
13829 (__arm_vcmpltq_s32): Likewise.
13830 (__arm_vcmpltq_n_s32): Likewise.
13831 (__arm_vcmpleq_s32): Likewise.
13832 (__arm_vcmpleq_n_s32): Likewise.
13833 (__arm_vcmpgtq_s32): Likewise.
13834 (__arm_vcmpgtq_n_s32): Likewise.
13835 (__arm_vcmpgeq_s32): Likewise.
13836 (__arm_vcmpgeq_n_s32): Likewise.
13837 (__arm_vcmpeqq_s32): Likewise.
13838 (__arm_vcmpeqq_n_s32): Likewise.
13839 (__arm_vqshluq_n_s32): Likewise.
13840 (__arm_vaddvq_p_s32): Likewise.
13841 (__arm_vsubq_s32): Likewise.
13842 (__arm_vsubq_n_s32): Likewise.
13843 (__arm_vshlq_r_s32): Likewise.
13844 (__arm_vrshlq_s32): Likewise.
13845 (__arm_vrshlq_n_s32): Likewise.
13846 (__arm_vrmulhq_s32): Likewise.
13847 (__arm_vrhaddq_s32): Likewise.
13848 (__arm_vqsubq_s32): Likewise.
13849 (__arm_vqsubq_n_s32): Likewise.
13850 (__arm_vqshlq_s32): Likewise.
13851 (__arm_vqshlq_r_s32): Likewise.
13852 (__arm_vqrshlq_s32): Likewise.
13853 (__arm_vqrshlq_n_s32): Likewise.
13854 (__arm_vqrdmulhq_s32): Likewise.
13855 (__arm_vqrdmulhq_n_s32): Likewise.
13856 (__arm_vqdmulhq_s32): Likewise.
13857 (__arm_vqdmulhq_n_s32): Likewise.
13858 (__arm_vqaddq_s32): Likewise.
13859 (__arm_vqaddq_n_s32): Likewise.
13860 (__arm_vorrq_s32): Likewise.
13861 (__arm_vornq_s32): Likewise.
13862 (__arm_vmulq_s32): Likewise.
13863 (__arm_vmulq_n_s32): Likewise.
13864 (__arm_vmulltq_int_s32): Likewise.
13865 (__arm_vmullbq_int_s32): Likewise.
13866 (__arm_vmulhq_s32): Likewise.
13867 (__arm_vmlsdavxq_s32): Likewise.
13868 (__arm_vmlsdavq_s32): Likewise.
13869 (__arm_vmladavxq_s32): Likewise.
13870 (__arm_vmladavq_s32): Likewise.
13871 (__arm_vminvq_s32): Likewise.
13872 (__arm_vminq_s32): Likewise.
13873 (__arm_vmaxvq_s32): Likewise.
13874 (__arm_vmaxq_s32): Likewise.
13875 (__arm_vhsubq_s32): Likewise.
13876 (__arm_vhsubq_n_s32): Likewise.
13877 (__arm_vhcaddq_rot90_s32): Likewise.
13878 (__arm_vhcaddq_rot270_s32): Likewise.
13879 (__arm_vhaddq_s32): Likewise.
13880 (__arm_vhaddq_n_s32): Likewise.
13881 (__arm_veorq_s32): Likewise.
13882 (__arm_vcaddq_rot90_s32): Likewise.
13883 (__arm_vcaddq_rot270_s32): Likewise.
13884 (__arm_vbrsrq_n_s32): Likewise.
13885 (__arm_vbicq_s32): Likewise.
13886 (__arm_vandq_s32): Likewise.
13887 (__arm_vaddvaq_s32): Likewise.
13888 (__arm_vaddq_n_s32): Likewise.
13889 (__arm_vabdq_s32): Likewise.
13890 (__arm_vshlq_n_s32): Likewise.
13891 (__arm_vrshrq_n_s32): Likewise.
13892 (__arm_vqshlq_n_s32): Likewise.
13893 (vsubq): Define polymorphic variant.
13894 (vsubq_n): Likewise.
13895 (vshlq_r): Likewise.
13896 (vrshlq_n): Likewise.
13897 (vrshlq): Likewise.
13898 (vrmulhq): Likewise.
13899 (vrhaddq): Likewise.
13900 (vqsubq_n): Likewise.
13901 (vqsubq): Likewise.
13902 (vqshlq): Likewise.
13903 (vqshlq_r): Likewise.
13904 (vqshluq): Likewise.
13905 (vrshrq_n): Likewise.
13906 (vshlq_n): Likewise.
13907 (vqshluq_n): Likewise.
13908 (vqshlq_n): Likewise.
13909 (vqrshlq_n): Likewise.
13910 (vqrshlq): Likewise.
13911 (vqrdmulhq_n): Likewise.
13912 (vqrdmulhq): Likewise.
13913 (vqdmulhq_n): Likewise.
13914 (vqdmulhq): Likewise.
13915 (vqaddq_n): Likewise.
13916 (vqaddq): Likewise.
13917 (vorrq_n): Likewise.
13920 (vmulq_n): Likewise.
13922 (vmulltq_int): Likewise.
13923 (vmullbq_int): Likewise.
13924 (vmulhq): Likewise.
13926 (vminaq): Likewise.
13928 (vmaxaq): Likewise.
13929 (vhsubq_n): Likewise.
13930 (vhsubq): Likewise.
13931 (vhcaddq_rot90): Likewise.
13932 (vhcaddq_rot270): Likewise.
13933 (vhaddq_n): Likewise.
13934 (vhaddq): Likewise.
13936 (vcaddq_rot90): Likewise.
13937 (vcaddq_rot270): Likewise.
13938 (vbrsrq_n): Likewise.
13939 (vbicq_n): Likewise.
13942 (vaddq_n): Likewise.
13945 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_IMM): Use it.
13946 (BINOP_NONE_NONE_NONE): Likewise.
13947 (BINOP_NONE_NONE_UNONE): Likewise.
13948 (BINOP_UNONE_NONE_IMM): Likewise.
13949 (BINOP_UNONE_NONE_NONE): Likewise.
13950 (BINOP_UNONE_UNONE_IMM): Likewise.
13951 (BINOP_UNONE_UNONE_NONE): Likewise.
13952 (BINOP_UNONE_UNONE_UNONE): Likewise.
13953 * config/arm/constraints.md (Ra): Define constraint to check constant is
13954 in the range of 0 to 7.
13955 (Rg): Define constriant to check the constant is one among 1, 2, 4
13957 * config/arm/mve.md (mve_vabdq_<supf>): Define RTL pattern.
13958 (mve_vaddq_n_<supf>): Likewise.
13959 (mve_vaddvaq_<supf>): Likewise.
13960 (mve_vaddvq_p_<supf>): Likewise.
13961 (mve_vandq_<supf>): Likewise.
13962 (mve_vbicq_<supf>): Likewise.
13963 (mve_vbrsrq_n_<supf>): Likewise.
13964 (mve_vcaddq_rot270_<supf>): Likewise.
13965 (mve_vcaddq_rot90_<supf>): Likewise.
13966 (mve_vcmpcsq_n_u): Likewise.
13967 (mve_vcmpcsq_u): Likewise.
13968 (mve_vcmpeqq_n_<supf>): Likewise.
13969 (mve_vcmpeqq_<supf>): Likewise.
13970 (mve_vcmpgeq_n_s): Likewise.
13971 (mve_vcmpgeq_s): Likewise.
13972 (mve_vcmpgtq_n_s): Likewise.
13973 (mve_vcmpgtq_s): Likewise.
13974 (mve_vcmphiq_n_u): Likewise.
13975 (mve_vcmphiq_u): Likewise.
13976 (mve_vcmpleq_n_s): Likewise.
13977 (mve_vcmpleq_s): Likewise.
13978 (mve_vcmpltq_n_s): Likewise.
13979 (mve_vcmpltq_s): Likewise.
13980 (mve_vcmpneq_n_<supf>): Likewise.
13981 (mve_vddupq_n_u): Likewise.
13982 (mve_veorq_<supf>): Likewise.
13983 (mve_vhaddq_n_<supf>): Likewise.
13984 (mve_vhaddq_<supf>): Likewise.
13985 (mve_vhcaddq_rot270_s): Likewise.
13986 (mve_vhcaddq_rot90_s): Likewise.
13987 (mve_vhsubq_n_<supf>): Likewise.
13988 (mve_vhsubq_<supf>): Likewise.
13989 (mve_vidupq_n_u): Likewise.
13990 (mve_vmaxaq_s): Likewise.
13991 (mve_vmaxavq_s): Likewise.
13992 (mve_vmaxq_<supf>): Likewise.
13993 (mve_vmaxvq_<supf>): Likewise.
13994 (mve_vminaq_s): Likewise.
13995 (mve_vminavq_s): Likewise.
13996 (mve_vminq_<supf>): Likewise.
13997 (mve_vminvq_<supf>): Likewise.
13998 (mve_vmladavq_<supf>): Likewise.
13999 (mve_vmladavxq_s): Likewise.
14000 (mve_vmlsdavq_s): Likewise.
14001 (mve_vmlsdavxq_s): Likewise.
14002 (mve_vmulhq_<supf>): Likewise.
14003 (mve_vmullbq_int_<supf>): Likewise.
14004 (mve_vmulltq_int_<supf>): Likewise.
14005 (mve_vmulq_n_<supf>): Likewise.
14006 (mve_vmulq_<supf>): Likewise.
14007 (mve_vornq_<supf>): Likewise.
14008 (mve_vorrq_<supf>): Likewise.
14009 (mve_vqaddq_n_<supf>): Likewise.
14010 (mve_vqaddq_<supf>): Likewise.
14011 (mve_vqdmulhq_n_s): Likewise.
14012 (mve_vqdmulhq_s): Likewise.
14013 (mve_vqrdmulhq_n_s): Likewise.
14014 (mve_vqrdmulhq_s): Likewise.
14015 (mve_vqrshlq_n_<supf>): Likewise.
14016 (mve_vqrshlq_<supf>): Likewise.
14017 (mve_vqshlq_n_<supf>): Likewise.
14018 (mve_vqshlq_r_<supf>): Likewise.
14019 (mve_vqshlq_<supf>): Likewise.
14020 (mve_vqshluq_n_s): Likewise.
14021 (mve_vqsubq_n_<supf>): Likewise.
14022 (mve_vqsubq_<supf>): Likewise.
14023 (mve_vrhaddq_<supf>): Likewise.
14024 (mve_vrmulhq_<supf>): Likewise.
14025 (mve_vrshlq_n_<supf>): Likewise.
14026 (mve_vrshlq_<supf>): Likewise.
14027 (mve_vrshrq_n_<supf>): Likewise.
14028 (mve_vshlq_n_<supf>): Likewise.
14029 (mve_vshlq_r_<supf>): Likewise.
14030 (mve_vsubq_n_<supf>): Likewise.
14031 (mve_vsubq_<supf>): Likewise.
14032 * config/arm/predicates.md (mve_imm_7): Define predicate to check
14033 the matching constraint Ra.
14034 (mve_imm_selective_upto_8): Define predicate to check the matching
14037 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14038 Mihail Ionescu <mihail.ionescu@arm.com>
14039 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14041 * config/arm/arm-builtins.c (BINOP_NONE_NONE_UNONE_QUALIFIERS): Define
14042 qualifier for binary operands.
14043 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14044 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14045 * config/arm/arm_mve.h (vaddlvq_p_s32): Define macro.
14046 (vaddlvq_p_u32): Likewise.
14047 (vcmpneq_s8): Likewise.
14048 (vcmpneq_s16): Likewise.
14049 (vcmpneq_s32): Likewise.
14050 (vcmpneq_u8): Likewise.
14051 (vcmpneq_u16): Likewise.
14052 (vcmpneq_u32): Likewise.
14053 (vshlq_s8): Likewise.
14054 (vshlq_s16): Likewise.
14055 (vshlq_s32): Likewise.
14056 (vshlq_u8): Likewise.
14057 (vshlq_u16): Likewise.
14058 (vshlq_u32): Likewise.
14059 (__arm_vaddlvq_p_s32): Define intrinsic.
14060 (__arm_vaddlvq_p_u32): Likewise.
14061 (__arm_vcmpneq_s8): Likewise.
14062 (__arm_vcmpneq_s16): Likewise.
14063 (__arm_vcmpneq_s32): Likewise.
14064 (__arm_vcmpneq_u8): Likewise.
14065 (__arm_vcmpneq_u16): Likewise.
14066 (__arm_vcmpneq_u32): Likewise.
14067 (__arm_vshlq_s8): Likewise.
14068 (__arm_vshlq_s16): Likewise.
14069 (__arm_vshlq_s32): Likewise.
14070 (__arm_vshlq_u8): Likewise.
14071 (__arm_vshlq_u16): Likewise.
14072 (__arm_vshlq_u32): Likewise.
14073 (vaddlvq_p): Define polymorphic variant.
14074 (vcmpneq): Likewise.
14076 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_UNONE_QUALIFIERS):
14078 (BINOP_UNONE_NONE_NONE_QUALIFIERS): Likewise.
14079 (BINOP_UNONE_UNONE_NONE_QUALIFIERS): Likewise.
14080 * config/arm/mve.md (mve_vaddlvq_p_<supf>v4si): Define RTL pattern.
14081 (mve_vcmpneq_<supf><mode>): Likewise.
14082 (mve_vshlq_<supf><mode>): Likewise.
14084 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14085 Mihail Ionescu <mihail.ionescu@arm.com>
14086 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14088 * config/arm/arm-builtins.c (BINOP_UNONE_UNONE_IMM_QUALIFIERS): Define
14089 qualifier for binary operands.
14090 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14091 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14092 * config/arm/arm_mve.h (vcvtq_n_s16_f16): Define macro.
14093 (vcvtq_n_s32_f32): Likewise.
14094 (vcvtq_n_u16_f16): Likewise.
14095 (vcvtq_n_u32_f32): Likewise.
14096 (vcreateq_u8): Likewise.
14097 (vcreateq_u16): Likewise.
14098 (vcreateq_u32): Likewise.
14099 (vcreateq_u64): Likewise.
14100 (vcreateq_s8): Likewise.
14101 (vcreateq_s16): Likewise.
14102 (vcreateq_s32): Likewise.
14103 (vcreateq_s64): Likewise.
14104 (vshrq_n_s8): Likewise.
14105 (vshrq_n_s16): Likewise.
14106 (vshrq_n_s32): Likewise.
14107 (vshrq_n_u8): Likewise.
14108 (vshrq_n_u16): Likewise.
14109 (vshrq_n_u32): Likewise.
14110 (__arm_vcreateq_u8): Define intrinsic.
14111 (__arm_vcreateq_u16): Likewise.
14112 (__arm_vcreateq_u32): Likewise.
14113 (__arm_vcreateq_u64): Likewise.
14114 (__arm_vcreateq_s8): Likewise.
14115 (__arm_vcreateq_s16): Likewise.
14116 (__arm_vcreateq_s32): Likewise.
14117 (__arm_vcreateq_s64): Likewise.
14118 (__arm_vshrq_n_s8): Likewise.
14119 (__arm_vshrq_n_s16): Likewise.
14120 (__arm_vshrq_n_s32): Likewise.
14121 (__arm_vshrq_n_u8): Likewise.
14122 (__arm_vshrq_n_u16): Likewise.
14123 (__arm_vshrq_n_u32): Likewise.
14124 (__arm_vcvtq_n_s16_f16): Likewise.
14125 (__arm_vcvtq_n_s32_f32): Likewise.
14126 (__arm_vcvtq_n_u16_f16): Likewise.
14127 (__arm_vcvtq_n_u32_f32): Likewise.
14128 (vshrq_n): Define polymorphic variant.
14129 * config/arm/arm_mve_builtins.def (BINOP_UNONE_UNONE_IMM_QUALIFIERS):
14131 (BINOP_UNONE_UNONE_UNONE_QUALIFIERS): Likewise.
14132 (BINOP_UNONE_NONE_IMM_QUALIFIERS): Likewise.
14133 * config/arm/constraints.md (Rb): Define constraint to check constant is
14134 in the range of 1 to 8.
14135 (Rf): Define constraint to check constant is in the range of 1 to 32.
14136 * config/arm/mve.md (mve_vcreateq_<supf><mode>): Define RTL pattern.
14137 (mve_vshrq_n_<supf><mode>): Likewise.
14138 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
14139 * config/arm/predicates.md (mve_imm_8): Define predicate to check
14140 the matching constraint Rb.
14141 (mve_imm_32): Define predicate to check the matching constraint Rf.
14143 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14144 Mihail Ionescu <mihail.ionescu@arm.com>
14145 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14147 * config/arm/arm-builtins.c (BINOP_NONE_NONE_NONE_QUALIFIERS): Define
14148 qualifier for binary operands.
14149 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14150 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14151 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14152 * config/arm/arm_mve.h (vsubq_n_f16): Define macro.
14153 (vsubq_n_f32): Likewise.
14154 (vbrsrq_n_f16): Likewise.
14155 (vbrsrq_n_f32): Likewise.
14156 (vcvtq_n_f16_s16): Likewise.
14157 (vcvtq_n_f32_s32): Likewise.
14158 (vcvtq_n_f16_u16): Likewise.
14159 (vcvtq_n_f32_u32): Likewise.
14160 (vcreateq_f16): Likewise.
14161 (vcreateq_f32): Likewise.
14162 (__arm_vsubq_n_f16): Define intrinsic.
14163 (__arm_vsubq_n_f32): Likewise.
14164 (__arm_vbrsrq_n_f16): Likewise.
14165 (__arm_vbrsrq_n_f32): Likewise.
14166 (__arm_vcvtq_n_f16_s16): Likewise.
14167 (__arm_vcvtq_n_f32_s32): Likewise.
14168 (__arm_vcvtq_n_f16_u16): Likewise.
14169 (__arm_vcvtq_n_f32_u32): Likewise.
14170 (__arm_vcreateq_f16): Likewise.
14171 (__arm_vcreateq_f32): Likewise.
14172 (vsubq): Define polymorphic variant.
14173 (vbrsrq): Likewise.
14174 (vcvtq_n): Likewise.
14175 * config/arm/arm_mve_builtins.def (BINOP_NONE_NONE_NONE_QUALIFIERS): Use
14177 (BINOP_NONE_NONE_IMM_QUALIFIERS): Likewise.
14178 (BINOP_NONE_UNONE_IMM_QUALIFIERS): Likewise.
14179 (BINOP_NONE_UNONE_UNONE_QUALIFIERS): Likewise.
14180 * config/arm/constraints.md (Rd): Define constraint to check constant is
14181 in the range of 1 to 16.
14182 * config/arm/mve.md (mve_vsubq_n_f<mode>): Define RTL pattern.
14183 mve_vbrsrq_n_f<mode>: Likewise.
14184 mve_vcvtq_n_to_f_<supf><mode>: Likewise.
14185 mve_vcreateq_f<mode>: Likewise.
14186 * config/arm/predicates.md (mve_imm_16): Define predicate to check
14187 the matching constraint Rd.
14189 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14190 Mihail Ionescu <mihail.ionescu@arm.com>
14191 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14193 * config/arm/arm-builtins.c (hi_UP): Define mode.
14194 * config/arm/arm.h (IS_VPR_REGNUM): Move.
14195 * config/arm/arm.md (VPR_REGNUM): Define before APSRQ_REGNUM.
14196 (APSRQ_REGNUM): Modify.
14197 (APSRGE_REGNUM): Modify.
14198 * config/arm/arm_mve.h (vctp16q): Define macro.
14199 (vctp32q): Likewise.
14200 (vctp64q): Likewise.
14201 (vctp8q): Likewise.
14203 (__arm_vctp16q): Define intrinsic.
14204 (__arm_vctp32q): Likewise.
14205 (__arm_vctp64q): Likewise.
14206 (__arm_vctp8q): Likewise.
14207 (__arm_vpnot): Likewise.
14208 * config/arm/arm_mve_builtins.def (UNOP_UNONE_UNONE): Use builtin
14210 * config/arm/mve.md (mve_vctp<mode1>qhi): Define RTL pattern.
14211 (mve_vpnothi): Likewise.
14213 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14214 Mihail Ionescu <mihail.ionescu@arm.com>
14215 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14217 * config/arm/arm.h (enum reg_class): Define new class EVEN_REGS.
14218 * config/arm/arm_mve.h (vdupq_n_s8): Define macro.
14219 (vdupq_n_s16): Likewise.
14220 (vdupq_n_s32): Likewise.
14221 (vabsq_s8): Likewise.
14222 (vabsq_s16): Likewise.
14223 (vabsq_s32): Likewise.
14224 (vclsq_s8): Likewise.
14225 (vclsq_s16): Likewise.
14226 (vclsq_s32): Likewise.
14227 (vclzq_s8): Likewise.
14228 (vclzq_s16): Likewise.
14229 (vclzq_s32): Likewise.
14230 (vnegq_s8): Likewise.
14231 (vnegq_s16): Likewise.
14232 (vnegq_s32): Likewise.
14233 (vaddlvq_s32): Likewise.
14234 (vaddvq_s8): Likewise.
14235 (vaddvq_s16): Likewise.
14236 (vaddvq_s32): Likewise.
14237 (vmovlbq_s8): Likewise.
14238 (vmovlbq_s16): Likewise.
14239 (vmovltq_s8): Likewise.
14240 (vmovltq_s16): Likewise.
14241 (vmvnq_s8): Likewise.
14242 (vmvnq_s16): Likewise.
14243 (vmvnq_s32): Likewise.
14244 (vrev16q_s8): Likewise.
14245 (vrev32q_s8): Likewise.
14246 (vrev32q_s16): Likewise.
14247 (vqabsq_s8): Likewise.
14248 (vqabsq_s16): Likewise.
14249 (vqabsq_s32): Likewise.
14250 (vqnegq_s8): Likewise.
14251 (vqnegq_s16): Likewise.
14252 (vqnegq_s32): Likewise.
14253 (vcvtaq_s16_f16): Likewise.
14254 (vcvtaq_s32_f32): Likewise.
14255 (vcvtnq_s16_f16): Likewise.
14256 (vcvtnq_s32_f32): Likewise.
14257 (vcvtpq_s16_f16): Likewise.
14258 (vcvtpq_s32_f32): Likewise.
14259 (vcvtmq_s16_f16): Likewise.
14260 (vcvtmq_s32_f32): Likewise.
14261 (vmvnq_u8): Likewise.
14262 (vmvnq_u16): Likewise.
14263 (vmvnq_u32): Likewise.
14264 (vdupq_n_u8): Likewise.
14265 (vdupq_n_u16): Likewise.
14266 (vdupq_n_u32): Likewise.
14267 (vclzq_u8): Likewise.
14268 (vclzq_u16): Likewise.
14269 (vclzq_u32): Likewise.
14270 (vaddvq_u8): Likewise.
14271 (vaddvq_u16): Likewise.
14272 (vaddvq_u32): Likewise.
14273 (vrev32q_u8): Likewise.
14274 (vrev32q_u16): Likewise.
14275 (vmovltq_u8): Likewise.
14276 (vmovltq_u16): Likewise.
14277 (vmovlbq_u8): Likewise.
14278 (vmovlbq_u16): Likewise.
14279 (vrev16q_u8): Likewise.
14280 (vaddlvq_u32): Likewise.
14281 (vcvtpq_u16_f16): Likewise.
14282 (vcvtpq_u32_f32): Likewise.
14283 (vcvtnq_u16_f16): Likewise.
14284 (vcvtmq_u16_f16): Likewise.
14285 (vcvtmq_u32_f32): Likewise.
14286 (vcvtaq_u16_f16): Likewise.
14287 (vcvtaq_u32_f32): Likewise.
14288 (__arm_vdupq_n_s8): Define intrinsic.
14289 (__arm_vdupq_n_s16): Likewise.
14290 (__arm_vdupq_n_s32): Likewise.
14291 (__arm_vabsq_s8): Likewise.
14292 (__arm_vabsq_s16): Likewise.
14293 (__arm_vabsq_s32): Likewise.
14294 (__arm_vclsq_s8): Likewise.
14295 (__arm_vclsq_s16): Likewise.
14296 (__arm_vclsq_s32): Likewise.
14297 (__arm_vclzq_s8): Likewise.
14298 (__arm_vclzq_s16): Likewise.
14299 (__arm_vclzq_s32): Likewise.
14300 (__arm_vnegq_s8): Likewise.
14301 (__arm_vnegq_s16): Likewise.
14302 (__arm_vnegq_s32): Likewise.
14303 (__arm_vaddlvq_s32): Likewise.
14304 (__arm_vaddvq_s8): Likewise.
14305 (__arm_vaddvq_s16): Likewise.
14306 (__arm_vaddvq_s32): Likewise.
14307 (__arm_vmovlbq_s8): Likewise.
14308 (__arm_vmovlbq_s16): Likewise.
14309 (__arm_vmovltq_s8): Likewise.
14310 (__arm_vmovltq_s16): Likewise.
14311 (__arm_vmvnq_s8): Likewise.
14312 (__arm_vmvnq_s16): Likewise.
14313 (__arm_vmvnq_s32): Likewise.
14314 (__arm_vrev16q_s8): Likewise.
14315 (__arm_vrev32q_s8): Likewise.
14316 (__arm_vrev32q_s16): Likewise.
14317 (__arm_vqabsq_s8): Likewise.
14318 (__arm_vqabsq_s16): Likewise.
14319 (__arm_vqabsq_s32): Likewise.
14320 (__arm_vqnegq_s8): Likewise.
14321 (__arm_vqnegq_s16): Likewise.
14322 (__arm_vqnegq_s32): Likewise.
14323 (__arm_vmvnq_u8): Likewise.
14324 (__arm_vmvnq_u16): Likewise.
14325 (__arm_vmvnq_u32): Likewise.
14326 (__arm_vdupq_n_u8): Likewise.
14327 (__arm_vdupq_n_u16): Likewise.
14328 (__arm_vdupq_n_u32): Likewise.
14329 (__arm_vclzq_u8): Likewise.
14330 (__arm_vclzq_u16): Likewise.
14331 (__arm_vclzq_u32): Likewise.
14332 (__arm_vaddvq_u8): Likewise.
14333 (__arm_vaddvq_u16): Likewise.
14334 (__arm_vaddvq_u32): Likewise.
14335 (__arm_vrev32q_u8): Likewise.
14336 (__arm_vrev32q_u16): Likewise.
14337 (__arm_vmovltq_u8): Likewise.
14338 (__arm_vmovltq_u16): Likewise.
14339 (__arm_vmovlbq_u8): Likewise.
14340 (__arm_vmovlbq_u16): Likewise.
14341 (__arm_vrev16q_u8): Likewise.
14342 (__arm_vaddlvq_u32): Likewise.
14343 (__arm_vcvtpq_u16_f16): Likewise.
14344 (__arm_vcvtpq_u32_f32): Likewise.
14345 (__arm_vcvtnq_u16_f16): Likewise.
14346 (__arm_vcvtmq_u16_f16): Likewise.
14347 (__arm_vcvtmq_u32_f32): Likewise.
14348 (__arm_vcvtaq_u16_f16): Likewise.
14349 (__arm_vcvtaq_u32_f32): Likewise.
14350 (__arm_vcvtaq_s16_f16): Likewise.
14351 (__arm_vcvtaq_s32_f32): Likewise.
14352 (__arm_vcvtnq_s16_f16): Likewise.
14353 (__arm_vcvtnq_s32_f32): Likewise.
14354 (__arm_vcvtpq_s16_f16): Likewise.
14355 (__arm_vcvtpq_s32_f32): Likewise.
14356 (__arm_vcvtmq_s16_f16): Likewise.
14357 (__arm_vcvtmq_s32_f32): Likewise.
14358 (vdupq_n): Define polymorphic variant.
14363 (vaddlvq): Likewise.
14364 (vaddvq): Likewise.
14365 (vmovlbq): Likewise.
14366 (vmovltq): Likewise.
14368 (vrev16q): Likewise.
14369 (vrev32q): Likewise.
14370 (vqabsq): Likewise.
14371 (vqnegq): Likewise.
14372 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
14373 (UNOP_SNONE_NONE): Likewise.
14374 (UNOP_UNONE_UNONE): Likewise.
14375 (UNOP_UNONE_NONE): Likewise.
14376 * config/arm/constraints.md (e): Define new constriant to allow only
14378 * config/arm/mve.md (mve_vqabsq_s<mode>): Define RTL pattern.
14379 (mve_vnegq_s<mode>): Likewise.
14380 (mve_vmvnq_<supf><mode>): Likewise.
14381 (mve_vdupq_n_<supf><mode>): Likewise.
14382 (mve_vclzq_<supf><mode>): Likewise.
14383 (mve_vclsq_s<mode>): Likewise.
14384 (mve_vaddvq_<supf><mode>): Likewise.
14385 (mve_vabsq_s<mode>): Likewise.
14386 (mve_vrev32q_<supf><mode>): Likewise.
14387 (mve_vmovltq_<supf><mode>): Likewise.
14388 (mve_vmovlbq_<supf><mode>): Likewise.
14389 (mve_vcvtpq_<supf><mode>): Likewise.
14390 (mve_vcvtnq_<supf><mode>): Likewise.
14391 (mve_vcvtmq_<supf><mode>): Likewise.
14392 (mve_vcvtaq_<supf><mode>): Likewise.
14393 (mve_vrev16q_<supf>v16qi): Likewise.
14394 (mve_vaddlvq_<supf>v4si): Likewise.
14396 2020-03-17 Jakub Jelinek <jakub@redhat.com>
14398 * lra-spills.c (remove_pseudos): Fix up duplicated word issue in
14400 * tree-sra.c (create_access_replacement): Fix up duplicated word issue
14402 * read-rtl-function.c (find_param_by_name,
14403 function_reader::parse_enum_value, function_reader::get_insn_by_uid):
14405 * spellcheck.c (get_edit_distance_cutoff): Likewise.
14406 * tree-data-ref.c (create_ifn_alias_checks): Likewise.
14407 * tree.def (SWITCH_EXPR): Likewise.
14408 * selftest.c (assert_str_contains): Likewise.
14409 * ipa-param-manipulation.h (class ipa_param_body_adjustments):
14411 * tree-ssa-math-opts.c (convert_expand_mult_copysign): Likewise.
14412 * tree-ssa-loop-split.c (find_vdef_in_loop): Likewise.
14413 * langhooks.h (struct lang_hooks_for_decls): Likewise.
14414 * ipa-prop.h (struct ipa_param_descriptor): Likewise.
14415 * tree-ssa-strlen.c (handle_builtin_string_cmp, handle_store):
14417 * tree-ssa-dom.c (simplify_stmt_for_jump_threading): Likewise.
14418 * tree-ssa-reassoc.c (reassociate_bb): Likewise.
14419 * tree.c (component_ref_size): Likewise.
14420 * hsa-common.c (hsa_init_compilation_unit_data): Likewise.
14421 * gimple-ssa-sprintf.c (get_string_length, format_string,
14422 format_directive): Likewise.
14423 * omp-grid.c (grid_process_kernel_body_copy): Likewise.
14424 * input.c (string_concat_db::get_string_concatenation,
14425 test_lexer_string_locations_ucn4): Likewise.
14426 * cfgexpand.c (pass_expand::execute): Likewise.
14427 * gimple-ssa-warn-restrict.c (builtin_memref::offset_out_of_bounds,
14428 maybe_diag_overlap): Likewise.
14429 * rtl.c (RTX_CODE_HWINT_P_1): Likewise.
14430 * shrink-wrap.c (spread_components): Likewise.
14431 * tree-ssa-dse.c (initialize_ao_ref_for_dse, valid_ao_ref_for_dse):
14433 * tree-call-cdce.c (shrink_wrap_one_built_in_call_with_conds):
14435 * dwarf2out.c (dwarf2out_early_finish): Likewise.
14436 * gimple-ssa-store-merging.c: Likewise.
14437 * ira-costs.c (record_operand_costs): Likewise.
14438 * tree-vect-loop.c (vectorizable_reduction): Likewise.
14439 * target.def (dispatch): Likewise.
14440 (validate_dims, gen_ccmp_first): Fix up duplicated word issue
14441 in documentation text.
14442 * doc/tm.texi: Regenerated.
14443 * config/i386/x86-tune.def (X86_TUNE_PARTIAL_FLAG_REG_STALL): Fix up
14444 duplicated word issue in a comment.
14445 * config/i386/i386.c (ix86_test_loading_unspec): Likewise.
14446 * config/i386/i386-features.c (remove_partial_avx_dependency):
14448 * config/msp430/msp430.c (msp430_select_section): Likewise.
14449 * config/gcn/gcn-run.c (load_image): Likewise.
14450 * config/aarch64/aarch64-sve.md (sve_ld1r<mode>): Likewise.
14451 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Likewise.
14452 * config/aarch64/falkor-tag-collision-avoidance.c
14453 (single_dest_per_chain): Likewise.
14454 * config/nvptx/nvptx.c (nvptx_record_fndecl): Likewise.
14455 * config/fr30/fr30.c (fr30_arg_partial_bytes): Likewise.
14456 * config/rs6000/rs6000-string.c (expand_cmp_vec_sequence): Likewise.
14457 * config/rs6000/rs6000-p8swap.c (replace_swapped_load_constant):
14459 * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise.
14460 * config/rs6000/rs6000.c (rs6000_option_override_internal): Likewise.
14461 * config/rs6000/rs6000-logue.c
14462 (rs6000_emit_probe_stack_range_stack_clash): Likewise.
14463 * config/nds32/nds32-md-auxiliary.c (nds32_split_ashiftdi3): Likewise.
14464 Fix various other issues in the comment.
14466 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com>
14468 * config/arm/t-rmprofile: create new multilib for
14469 armv8.1-m.main+mve hard float and reuse v8-m.main ones for
14472 2020-03-17 Jakub Jelinek <jakub@redhat.com>
14474 PR tree-optimization/94015
14475 * tree-ssa-strlen.c (count_nonzero_bytes): Split portions of the
14476 function where EXP is address of the bytes being stored rather than
14477 the bytes themselves into count_nonzero_bytes_addr. Punt on zero
14478 sized MEM_REF. Use VAR_P macro and handle CONST_DECL like VAR_DECLs.
14479 Use ctor_for_folding instead of looking at DECL_INITIAL. Punt before
14480 calling native_encode_expr if host or target doesn't have 8-bit
14481 chars. Formatting fixes.
14482 (count_nonzero_bytes_addr): New function.
14484 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14485 Mihail Ionescu <mihail.ionescu@arm.com>
14486 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14488 * config/arm/arm-builtins.c (UNOP_SNONE_SNONE_QUALIFIERS): Define.
14489 (UNOP_SNONE_NONE_QUALIFIERS): Likewise.
14490 (UNOP_SNONE_IMM_QUALIFIERS): Likewise.
14491 (UNOP_UNONE_NONE_QUALIFIERS): Likewise.
14492 (UNOP_UNONE_UNONE_QUALIFIERS): Likewise.
14493 (UNOP_UNONE_IMM_QUALIFIERS): Likewise.
14494 * config/arm/arm_mve.h (vmvnq_n_s16): Define macro.
14495 (vmvnq_n_s32): Likewise.
14496 (vrev64q_s8): Likewise.
14497 (vrev64q_s16): Likewise.
14498 (vrev64q_s32): Likewise.
14499 (vcvtq_s16_f16): Likewise.
14500 (vcvtq_s32_f32): Likewise.
14501 (vrev64q_u8): Likewise.
14502 (vrev64q_u16): Likewise.
14503 (vrev64q_u32): Likewise.
14504 (vmvnq_n_u16): Likewise.
14505 (vmvnq_n_u32): Likewise.
14506 (vcvtq_u16_f16): Likewise.
14507 (vcvtq_u32_f32): Likewise.
14508 (__arm_vmvnq_n_s16): Define intrinsic.
14509 (__arm_vmvnq_n_s32): Likewise.
14510 (__arm_vrev64q_s8): Likewise.
14511 (__arm_vrev64q_s16): Likewise.
14512 (__arm_vrev64q_s32): Likewise.
14513 (__arm_vrev64q_u8): Likewise.
14514 (__arm_vrev64q_u16): Likewise.
14515 (__arm_vrev64q_u32): Likewise.
14516 (__arm_vmvnq_n_u16): Likewise.
14517 (__arm_vmvnq_n_u32): Likewise.
14518 (__arm_vcvtq_s16_f16): Likewise.
14519 (__arm_vcvtq_s32_f32): Likewise.
14520 (__arm_vcvtq_u16_f16): Likewise.
14521 (__arm_vcvtq_u32_f32): Likewise.
14522 (vrev64q): Define polymorphic variant.
14523 * config/arm/arm_mve_builtins.def (UNOP_SNONE_SNONE): Use it.
14524 (UNOP_SNONE_NONE): Likewise.
14525 (UNOP_SNONE_IMM): Likewise.
14526 (UNOP_UNONE_UNONE): Likewise.
14527 (UNOP_UNONE_NONE): Likewise.
14528 (UNOP_UNONE_IMM): Likewise.
14529 * config/arm/mve.md (mve_vrev64q_<supf><mode>): Define RTL pattern.
14530 (mve_vcvtq_from_f_<supf><mode>): Likewise.
14531 (mve_vmvnq_n_<supf><mode>): Likewise.
14533 2020-03-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
14534 Mihail Ionescu <mihail.ionescu@arm.com>
14535 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14537 * config/arm/arm-builtins.c (UNOP_NONE_NONE_QUALIFIERS): Define macro.
14538 (UNOP_NONE_SNONE_QUALIFIERS): Likewise.
14539 (UNOP_NONE_UNONE_QUALIFIERS): Likewise.
14540 * config/arm/arm_mve.h (vrndxq_f16): Define macro.
14541 (vrndxq_f32): Likewise.
14542 (vrndq_f16) Likewise.
14543 (vrndq_f32): Likewise.
14544 (vrndpq_f16): Likewise.
14545 (vrndpq_f32): Likewise.
14546 (vrndnq_f16): Likewise.
14547 (vrndnq_f32): Likewise.
14548 (vrndmq_f16): Likewise.
14549 (vrndmq_f32): Likewise.
14550 (vrndaq_f16): Likewise.
14551 (vrndaq_f32): Likewise.
14552 (vrev64q_f16): Likewise.
14553 (vrev64q_f32): Likewise.
14554 (vnegq_f16): Likewise.
14555 (vnegq_f32): Likewise.
14556 (vdupq_n_f16): Likewise.
14557 (vdupq_n_f32): Likewise.
14558 (vabsq_f16): Likewise.
14559 (vabsq_f32): Likewise.
14560 (vrev32q_f16): Likewise.
14561 (vcvttq_f32_f16): Likewise.
14562 (vcvtbq_f32_f16): Likewise.
14563 (vcvtq_f16_s16): Likewise.
14564 (vcvtq_f32_s32): Likewise.
14565 (vcvtq_f16_u16): Likewise.
14566 (vcvtq_f32_u32): Likewise.
14567 (__arm_vrndxq_f16): Define intrinsic.
14568 (__arm_vrndxq_f32): Likewise.
14569 (__arm_vrndq_f16): Likewise.
14570 (__arm_vrndq_f32): Likewise.
14571 (__arm_vrndpq_f16): Likewise.
14572 (__arm_vrndpq_f32): Likewise.
14573 (__arm_vrndnq_f16): Likewise.
14574 (__arm_vrndnq_f32): Likewise.
14575 (__arm_vrndmq_f16): Likewise.
14576 (__arm_vrndmq_f32): Likewise.
14577 (__arm_vrndaq_f16): Likewise.
14578 (__arm_vrndaq_f32): Likewise.
14579 (__arm_vrev64q_f16): Likewise.
14580 (__arm_vrev64q_f32): Likewise.
14581 (__arm_vnegq_f16): Likewise.
14582 (__arm_vnegq_f32): Likewise.
14583 (__arm_vdupq_n_f16): Likewise.
14584 (__arm_vdupq_n_f32): Likewise.
14585 (__arm_vabsq_f16): Likewise.
14586 (__arm_vabsq_f32): Likewise.
14587 (__arm_vrev32q_f16): Likewise.
14588 (__arm_vcvttq_f32_f16): Likewise.
14589 (__arm_vcvtbq_f32_f16): Likewise.
14590 (__arm_vcvtq_f16_s16): Likewise.
14591 (__arm_vcvtq_f32_s32): Likewise.
14592 (__arm_vcvtq_f16_u16): Likewise.
14593 (__arm_vcvtq_f32_u32): Likewise.
14594 (vrndxq): Define polymorphic variants.
14596 (vrndpq): Likewise.
14597 (vrndnq): Likewise.
14598 (vrndmq): Likewise.
14599 (vrndaq): Likewise.
14600 (vrev64q): Likewise.
14603 (vrev32q): Likewise.
14604 (vcvtbq_f32): Likewise.
14605 (vcvttq_f32): Likewise.
14607 * config/arm/arm_mve_builtins.def (VAR2): Define.
14609 * config/arm/mve.md (mve_vrndxq_f<mode>): Add RTL pattern.
14610 (mve_vrndq_f<mode>): Likewise.
14611 (mve_vrndpq_f<mode>): Likewise.
14612 (mve_vrndnq_f<mode>): Likewise.
14613 (mve_vrndmq_f<mode>): Likewise.
14614 (mve_vrndaq_f<mode>): Likewise.
14615 (mve_vrev64q_f<mode>): Likewise.
14616 (mve_vnegq_f<mode>): Likewise.
14617 (mve_vdupq_n_f<mode>): Likewise.
14618 (mve_vabsq_f<mode>): Likewise.
14619 (mve_vrev32q_fv8hf): Likewise.
14620 (mve_vcvttq_f32_f16v4sf): Likewise.
14621 (mve_vcvtbq_f32_f16v4sf): Likewise.
14622 (mve_vcvtq_to_f_<supf><mode>): Likewise.
14624 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14625 Mihail Ionescu <mihail.ionescu@arm.com>
14626 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14628 * config/arm/arm-builtins.c (CF): Define mve_builtin_data.
14630 (ARM_BUILTIN_MVE_PATTERN_START): Define.
14631 (arm_init_mve_builtins): Define function.
14632 (arm_init_builtins): Add TARGET_HAVE_MVE check.
14633 (arm_expand_builtin_1): Check the range of fcode.
14634 (arm_expand_mve_builtin): Define function to expand MVE builtins.
14635 (arm_expand_builtin): Check the range of fcode.
14636 * config/arm/arm_mve.h (__ARM_FEATURE_MVE): Define MVE floating point
14638 (__ARM_MVE_PRESERVE_USER_NAMESPACE): Define to protect user namespace.
14639 (vst4q_s8): Define macro.
14640 (vst4q_s16): Likewise.
14641 (vst4q_s32): Likewise.
14642 (vst4q_u8): Likewise.
14643 (vst4q_u16): Likewise.
14644 (vst4q_u32): Likewise.
14645 (vst4q_f16): Likewise.
14646 (vst4q_f32): Likewise.
14647 (__arm_vst4q_s8): Define inline builtin.
14648 (__arm_vst4q_s16): Likewise.
14649 (__arm_vst4q_s32): Likewise.
14650 (__arm_vst4q_u8): Likewise.
14651 (__arm_vst4q_u16): Likewise.
14652 (__arm_vst4q_u32): Likewise.
14653 (__arm_vst4q_f16): Likewise.
14654 (__arm_vst4q_f32): Likewise.
14655 (__ARM_mve_typeid): Define macro with MVE types.
14656 (__ARM_mve_coerce): Define macro with _Generic feature.
14657 (vst4q): Define polymorphic variant for different vst4q builtins.
14658 * config/arm/arm_mve_builtins.def: New file.
14659 * config/arm/iterators.md (VSTRUCT): Modify to allow XI and OI
14661 * config/arm/mve.md (MVE_VLD_ST): Define iterator.
14662 (unspec): Define unspec.
14663 (mve_vst4q<mode>): Define RTL pattern.
14664 * config/arm/neon.md (mov<mode>): Modify expand to allow XI and OI
14666 (neon_mov<mode>): Modify RTL define_insn to allow XI and OI modes
14668 (define_split): Allow OI mode split for MVE after reload.
14669 (define_split): Allow XI mode split for MVE after reload.
14670 * config/arm/t-arm (arm.o): Add entry for arm_mve_builtins.def.
14671 (arm-builtins.o): Likewise.
14673 2020-03-17 Christophe Lyon <christophe.lyon@linaro.org>
14675 * c-typeck.c (process_init_element): Handle constructor_type with
14676 type size represented by POLY_INT_CST.
14678 2020-03-17 Jakub Jelinek <jakub@redhat.com>
14680 PR tree-optimization/94187
14681 * tree-ssa-strlen.c (count_nonzero_bytes): Punt if
14682 nchars - offset < nbytes.
14684 PR middle-end/94189
14685 * builtins.c (expand_builtin_strnlen): Do return NULL_RTX if we would
14686 emit a warning if it was enabled and don't depend on TREE_NO_WARNING
14687 for code-generation.
14689 2020-03-16 Vladimir Makarov <vmakarov@redhat.com>
14692 * lra-spills.c (remove_pseudos): Do not reuse insn alternative
14693 after changing memory subreg.
14695 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14696 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14698 * config/arm/arm.c (arm_libcall_uses_aapcs_base): Modify function to add
14699 emulator calls for dobule precision arithmetic operations for MVE.
14701 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14702 Mihail Ionescu <mihail.ionescu@arm.com>
14703 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14705 * common/config/arm/arm-common.c (arm_asm_auto_mfpu): When vfp_base
14706 feature bit is on and -mfpu=auto is passed as compiler option, do not
14707 generate error on not finding any matching fpu. Because in this case
14708 fpu is not required.
14709 * config/arm/arm-cpus.in (vfp_base): Define feature bit, this bit is
14710 enabled for MVE and also for all VFP extensions.
14711 (VFPv2): Modify fgroup to enable vfp_base feature bit when ever VFPv2
14713 (MVE): Define fgroup to enable feature bits mve, vfp_base and armv7em.
14714 (MVE_FP): Define fgroup to enable feature bits is fgroup MVE and FPv5
14715 along with feature bits mve_float.
14716 (mve): Modify add options in armv8.1-m.main arch for MVE.
14717 (mve.fp): Modify add options in armv8.1-m.main arch for MVE with
14719 * config/arm/arm.c (use_return_insn): Replace the
14720 check with TARGET_VFP_BASE.
14721 (thumb2_legitimate_index_p): Replace TARGET_HARD_FLOAT with
14723 (arm_rtx_costs_internal): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14724 with TARGET_VFP_BASE, to allow cost calculations for copies in MVE as
14726 (arm_get_vfp_saved_size): Replace TARGET_HARD_FLOAT with
14727 TARGET_VFP_BASE, to allow space calculation for VFP registers in MVE
14729 (arm_compute_frame_layout): Likewise.
14730 (arm_save_coproc_regs): Likewise.
14731 (arm_fixed_condition_code_regs): Modify to enable using VFPCC_REGNUM
14733 (arm_hard_regno_mode_ok): Replace "TARGET_HARD_FLOAT || TARGET_HAVE_MVE"
14734 with equivalent macro TARGET_VFP_BASE.
14735 (arm_expand_epilogue_apcs_frame): Likewise.
14736 (arm_expand_epilogue): Likewise.
14737 (arm_conditional_register_usage): Likewise.
14738 (arm_declare_function_name): Add check to skip printing .fpu directive
14739 in assembly file when TARGET_VFP_BASE is enabled and fpu_to_print is
14741 * config/arm/arm.h (TARGET_VFP_BASE): Define.
14742 * config/arm/arm.md (arch): Add "mve" to arch.
14743 (eq_attr "arch" "mve"): Enable on TARGET_HAVE_MVE is true.
14744 (vfp_pop_multiple_with_writeback): Replace "TARGET_HARD_FLOAT
14745 || TARGET_HAVE_MVE" with equivalent macro TARGET_VFP_BASE.
14746 * config/arm/constraints.md (Uf): Define to allow modification to FPCCR
14748 * config/arm/thumb2.md (thumb2_movsfcc_soft_insn): Modify target guard
14749 to not allow for MVE.
14750 * config/arm/unspecs.md (UNSPEC_GET_FPSCR): Move to volatile unspecs
14752 (VUNSPEC_GET_FPSCR): Define.
14753 * config/arm/vfp.md (thumb2_movhi_vfp): Add support for VMSR and VMRS
14754 instructions which move to general-purpose Register from Floating-point
14755 Special register and vice-versa.
14756 (thumb2_movhi_fp16): Likewise.
14757 (thumb2_movsi_vfp): Add support for VMSR and VMRS instructions along
14758 with MCR and MRC instructions which set and get Floating-point Status
14759 and Control Register (FPSCR).
14760 (movdi_vfp): Modify pattern to enable Single-precision scalar float move
14762 (thumb2_movdf_vfp): Modify pattern to enable Double-precision scalar
14763 float move patterns in MVE.
14764 (thumb2_movsfcc_vfp): Modify pattern to enable single float conditional
14765 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14766 (thumb2_movdfcc_vfp): Modify pattern to enable double float conditional
14767 code move patterns of VFP also in MVE by adding TARGET_VFP_BASE check.
14768 (push_multi_vfp): Add support to use VFP VPUSH pattern for MVE by adding
14769 TARGET_VFP_BASE check.
14770 (set_fpscr): Add support to set FPSCR register for MVE. Modify pattern
14771 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14773 (get_fpscr): Add support to get FPSCR register for MVE. Modify pattern
14774 using VFPCC_REGNUM as few MVE intrinsics use carry bit of FPSCR
14778 2020-03-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
14779 Mihail Ionescu <mihail.ionescu@arm.com>
14780 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
14782 * config.gcc (arm_mve.h): Include mve intrinsics header file.
14783 * config/arm/aout.h (p0): Add new register name for MVE predicated
14785 * config/arm-builtins.c (ARM_BUILTIN_SIMD_LANE_CHECK): Define macro
14786 common to Neon and MVE.
14787 (ARM_BUILTIN_NEON_LANE_CHECK): Renamed to ARM_BUILTIN_SIMD_LANE_CHECK.
14788 (arm_init_simd_builtin_types): Disable poly types for MVE.
14789 (arm_init_neon_builtins): Move a check to arm_init_builtins function.
14790 (arm_init_builtins): Use ARM_BUILTIN_SIMD_LANE_CHECK instead of
14791 ARM_BUILTIN_NEON_LANE_CHECK.
14792 (mve_dereference_pointer): Add function.
14793 (arm_expand_builtin_args): Call to mve_dereference_pointer when MVE is
14795 (arm_expand_neon_builtin): Moved to arm_expand_builtin function.
14796 (arm_expand_builtin): Moved from arm_expand_neon_builtin function.
14797 * config/arm/arm-c.c (__ARM_FEATURE_MVE): Define macro for MVE and MVE
14798 with floating point enabled.
14799 * config/arm/arm-protos.h (neon_immediate_valid_for_move): Renamed to
14800 simd_immediate_valid_for_move.
14801 (simd_immediate_valid_for_move): Renamed from
14802 neon_immediate_valid_for_move function.
14803 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Generate
14804 error if vfpv2 feature bit is disabled and mve feature bit is also
14805 disabled for HARD_FLOAT_ABI.
14806 (use_return_insn): Check to not push VFP regs for MVE.
14807 (aapcs_vfp_allocate): Add MVE check to have same Procedure Call Standard
14809 (aapcs_vfp_allocate_return_reg): Likewise.
14810 (thumb2_legitimate_address_p): Check to return 0 on valid Thumb-2
14811 address operand for MVE.
14812 (arm_rtx_costs_internal): MVE check to determine cost of rtx.
14813 (neon_valid_immediate): Rename to simd_valid_immediate.
14814 (simd_valid_immediate): Rename from neon_valid_immediate.
14815 (simd_valid_immediate): MVE check on size of vector is 128 bits.
14816 (neon_immediate_valid_for_move): Rename to
14817 simd_immediate_valid_for_move.
14818 (simd_immediate_valid_for_move): Rename from
14819 neon_immediate_valid_for_move.
14820 (neon_immediate_valid_for_logic): Modify call to neon_valid_immediate
14822 (neon_make_constant): Modify call to neon_valid_immediate function.
14823 (neon_vector_mem_operand): Return VFP register for POST_INC or PRE_DEC
14825 (output_move_neon): Add MVE check to generate vldm/vstm instrcutions.
14826 (arm_compute_frame_layout): Calculate space for saved VFP registers for
14828 (arm_save_coproc_regs): Save coproc registers for MVE.
14829 (arm_print_operand): Add case 'E' to print memory operands for MVE.
14830 (arm_print_operand_address): Check to print register number for MVE.
14831 (arm_hard_regno_mode_ok): Check for arm hard regno mode ok for MVE.
14832 (arm_modes_tieable_p): Check to allow structure mode for MVE.
14833 (arm_regno_class): Add VPR_REGNUM check.
14834 (arm_expand_epilogue_apcs_frame): MVE check to calculate epilogue code
14836 (arm_expand_epilogue): MVE check for enabling pop instructions in
14838 (arm_print_asm_arch_directives): Modify function to disable print of
14839 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14841 (arm_vector_mode_supported_p): Check for modes available in MVE interger
14842 and MVE floating point.
14843 (arm_array_mode_supported_p): Add TARGET_HAVE_MVE check for array mode
14845 (arm_conditional_register_usage): Enable usage of conditional regsiter
14847 (fixed_regs[VPR_REGNUM]): Enable VPR_REG for MVE.
14848 (arm_declare_function_name): Modify function to disable print of
14849 .arch_extension "mve" and "fp" for cases where MVE is enabled with
14851 * config/arm/arm.h (TARGET_HAVE_MVE): Disable for soft float abi and
14852 when target general registers are required.
14853 (TARGET_HAVE_MVE_FLOAT): Likewise.
14854 (FIXED_REGISTERS): Add bit for VFP_REG class which is enabled in arm.c
14856 (CALL_USED_REGISTERS): Set bit for VFP_REG class in CALL_USED_REGISTERS
14857 which indicate this is not available for across function calls.
14858 (FIRST_PSEUDO_REGISTER): Modify.
14859 (VALID_MVE_MODE): Define valid MVE mode.
14860 (VALID_MVE_SI_MODE): Define valid MVE SI mode.
14861 (VALID_MVE_SF_MODE): Define valid MVE SF mode.
14862 (VALID_MVE_STRUCT_MODE): Define valid MVE struct mode.
14863 (VPR_REGNUM): Add Vector Predication Register in arm_regs_in_sequence
14865 (IS_VPR_REGNUM): Macro to check for VPR_REG register.
14866 (REG_ALLOC_ORDER): Add VPR_REGNUM entry.
14867 (enum reg_class): Add VPR_REG entry.
14868 (REG_CLASS_NAMES): Add VPR_REG entry.
14869 * config/arm/arm.md (VPR_REGNUM): Define.
14870 (conds): Check is_mve_type attrbiute to differentiate "conditional" and
14871 "unconditional" instructions.
14872 (arm_movsf_soft_insn): Modify RTL to not allow for MVE.
14873 (movdf_soft_insn): Modify RTL to not allow for MVE.
14874 (vfp_pop_multiple_with_writeback): Enable for MVE.
14875 (include "mve.md"): Include mve.md file.
14876 * config/arm/arm_mve.h: Add MVE intrinsics head file.
14877 * config/arm/constraints.md (Up): Constraint to enable "p0" register in MVE
14878 for vector predicated operands.
14879 * config/arm/iterators.md (VNIM1): Define.
14880 (VNINOTM1): Define.
14881 (VHFBF_split): Define
14882 * config/arm/mve.md: New file.
14883 (mve_mov<mode>): Define RTL for move, store and load in MVE.
14884 (mve_mov<mode>): Define move RTL pattern with vec_duplicate operator for
14886 * config/arm/neon.md (neon_immediate_valid_for_move): Rename with
14887 simd_immediate_valid_for_move.
14888 (neon_mov<mode>): Split pattern and move expand pattern "movv8hf" which
14889 is common to MVE and NEON to vec-common.md file.
14890 (vec_init<mode><V_elem_l>): Add TARGET_HAVE_MVE check.
14891 * config/arm/predicates.md (vpr_register_operand): Define.
14892 * config/arm/t-arm: Add mve.md file.
14893 * config/arm/types.md (mve_move): Add MVE instructions mve_move to
14895 (mve_store): Add MVE instructions mve_store to attribute "type".
14896 (mve_load): Add MVE instructions mve_load to attribute "type".
14897 (is_mve_type): Define attribute.
14898 * config/arm/vec-common.md (mov<mode>): Modify RTL expand to support
14899 standard move patterns in MVE along with NEON and IWMMXT with mode
14901 (mov<mode>): Modify RTL expand to support standard move patterns in NEON
14902 and IWMMXT with mode iterator V8HF.
14903 (movv8hf): Define RTL expand to support standard "movv8hf" pattern in
14905 * config/arm/vfp.md (neon_immediate_valid_for_move): Rename to
14906 simd_immediate_valid_for_move.
14909 2020-03-16 H.J. Lu <hongjiu.lu@intel.com>
14912 * config/i386/i386.md (*movsi_internal): Call ix86_output_ssemov
14913 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14915 * config/i386/predicates.md (ext_sse_reg_operand): Removed.
14917 2020-03-16 Jakub Jelinek <jakub@redhat.com>
14920 * tree-inline.c (insert_init_stmt): Don't gimple_regimplify_operands
14923 PR tree-optimization/94166
14924 * tree-ssa-reassoc.c (sort_by_mach_mode): Use SSA_NAME_VERSION
14925 as secondary comparison key.
14927 2020-03-16 Bin Cheng <bin.cheng@linux.alibaba.com>
14929 PR tree-optimization/94125
14930 * tree-loop-distribution.c
14931 (loop_distribution::break_alias_scc_partitions): Update post order
14932 number for merged scc.
14934 2020-03-15 H.J. Lu <hongjiu.lu@intel.com>
14937 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_SI and
14939 * config/i386/i386.md (*movsf_internal): Call ix86_output_ssemov
14940 for TYPE_SSEMOV. Remove TARGET_PREFER_AVX256, TARGET_AVX512VL
14941 and ext_sse_reg_operand check.
14943 2020-03-15 Lewis Hyatt <lhyatt@gmail.com>
14945 * common.opt: Avoid redundancy in the help text.
14946 * config/arc/arc.opt: Likewise.
14947 * config/cr16/cr16.opt: Likewise.
14949 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14951 PR middle-end/93566
14952 * tree-nested.c (convert_nonlocal_omp_clauses,
14953 convert_local_omp_clauses): Handle {,in_,task_}reduction clauses
14954 with C/C++ array sections.
14956 2020-03-14 H.J. Lu <hongjiu.lu@intel.com>
14959 * config/i386/i386.md (*movdi_internal): Call ix86_output_ssemov
14960 for TYPE_SSEMOV. Remove ext_sse_reg_operand and TARGET_AVX512VL
14963 2020-03-14 Jakub Jelinek <jakub@redhat.com>
14965 * gimple-fold.c (gimple_fold_builtin_strncpy): Change
14966 "a an" to "an" in a comment.
14967 * hsa-common.h (is_a_helper): Likewise.
14968 * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Likewise.
14969 * config/arc/arc.c (arc600_corereg_hazard): Likewise.
14970 * config/s390/s390.c (s390_indirect_branch_via_thunk): Likewise.
14972 2020-03-13 Aaron Sawdey <acsawdey@linux.ibm.com>
14975 * config/rs6000/rs6000.c (num_insns_constant_multi): Don't shift a
14976 64-bit value by 64 bits (UB).
14978 2020-03-13 Vladimir Makarov <vmakarov@redhat.com>
14980 PR rtl-optimization/92303
14981 * lra-spills.c (remove_pseudos): Try to simplify memory subreg.
14983 2020-03-13 Segher Boessenkool <segher@kernel.crashing.org>
14985 PR rtl-optimization/94148
14986 PR rtl-optimization/94042
14987 * df-core.c (BB_LAST_CHANGE_AGE): Delete.
14988 (df_worklist_propagate_forward): New parameter last_change_age, use
14989 that instead of bb->aux.
14990 (df_worklist_propagate_backward): Ditto.
14991 (df_worklist_dataflow_doublequeue): Use a local array last_change_age.
14993 2020-03-13 Richard Biener <rguenther@suse.de>
14995 PR tree-optimization/94163
14996 * tree-ssa-pre.c (create_expression_by_pieces): Check
14997 whether alignment would be zero.
14999 2020-03-13 Martin Liska <mliska@suse.cz>
15002 * lto-wrapper.c (run_gcc): Use concat for appending
15003 to collect_gcc_options.
15005 2020-03-13 Jakub Jelinek <jakub@redhat.com>
15008 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use gen_int_mode
15009 instead of GEN_INT.
15011 2020-03-13 H.J. Lu <hongjiu.lu@intel.com>
15014 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DF.
15015 * config/i386/i386.md (*movdf_internal): Call ix86_output_ssemov
15016 for TYPE_SSEMOV. Remove TARGET_AVX512F, TARGET_PREFER_AVX256,
15017 TARGET_AVX512VL and ext_sse_reg_operand check.
15019 2020-03-13 Bu Le <bule1@huawei.com>
15022 * config/aarch64/aarch64.opt (-param=aarch64-float-recp-precision=)
15023 (-param=aarch64-double-recp-precision=): New options.
15024 * doc/invoke.texi: Document them.
15025 * config/aarch64/aarch64.c (aarch64_emit_approx_div): Use them
15026 instead of hard-coding the choice of 1 for float and 2 for double.
15028 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15030 PR rtl-optimization/94119
15031 * resource.h (clear_hashed_info_until_next_barrier): Declare.
15032 * resource.c (clear_hashed_info_until_next_barrier): New function.
15033 * reorg.c (add_to_delay_list): Fix formatting.
15034 (relax_delay_slots): Call clear_hashed_info_until_next_barrier on
15035 the next instruction after removing a BARRIER.
15037 2020-03-13 Eric Botcazou <ebotcazou@adacore.com>
15039 PR middle-end/92071
15040 * expmed.c (store_integral_bit_field): For fields larger than a word,
15041 call extract_bit_field on the value if the mode is BLKmode. Remove
15042 specific path for big-endian targets and tidy things up a little bit.
15044 2020-03-12 Richard Sandiford <richard.sandiford@arm.com>
15046 PR rtl-optimization/90275
15047 * cse.c (cse_insn): Delete no-op register moves too.
15049 2020-03-12 Darius Galis <darius.galis@cyberthorstudios.com>
15051 * config/rx/rx.md (CTRLREG_CPEN): Remove.
15052 * config/rx/rx.c (rx_print_operand): Remove CTRLREG_CPEN support.
15054 2020-03-12 Richard Biener <rguenther@suse.de>
15056 PR tree-optimization/94103
15057 * tree-ssa-sccvn.c (visit_reference_op_load): Avoid type
15058 punning when the mode precision is not sufficient.
15060 2020-03-12 H.J. Lu <hongjiu.lu@intel.com>
15063 * config/i386/i386.c (ix86_output_ssemov): Handle MODE_DI,
15064 MODE_V1DF and MODE_V2SF.
15065 * config/i386/mmx.md (MMXMODE:*mov<mode>_internal): Call
15066 ix86_output_ssemov for TYPE_SSEMOV. Remove ext_sse_reg_operand
15069 2020-03-12 Jakub Jelinek <jakub@redhat.com>
15071 * doc/tm.texi.in (ASM_OUTPUT_ALIGNED_DECL_LOCAL): Change
15072 ASM_OUTPUT_ALIGNED_DECL in description to ASM_OUTPUT_ALIGNED_LOCAL
15073 and ASM_OUTPUT_DECL to ASM_OUTPUT_LOCAL.
15074 * doc/tm.texi: Regenerated.
15076 PR tree-optimization/94130
15077 * tree-ssa-dse.c: Include gimplify.h.
15078 (increment_start_addr): If stmt has lhs, drop the lhs from call and
15079 set it after the call to the original value of the first argument.
15081 (decrement_count): Formatting fix.
15083 2020-03-11 Delia Burduv <delia.burduv@arm.com>
15085 * config/arm/arm-builtins.c
15086 (arm_init_simd_builtin_scalar_types): New.
15087 * config/arm/arm_neon.h (vld2_bf16): Used new builtin type.
15088 (vld2q_bf16): Used new builtin type.
15089 (vld3_bf16): Used new builtin type.
15090 (vld3q_bf16): Used new builtin type.
15091 (vld4_bf16): Used new builtin type.
15092 (vld4q_bf16): Used new builtin type.
15093 (vld2_dup_bf16): Used new builtin type.
15094 (vld2q_dup_bf16): Used new builtin type.
15095 (vld3_dup_bf16): Used new builtin type.
15096 (vld3q_dup_bf16): Used new builtin type.
15097 (vld4_dup_bf16): Used new builtin type.
15098 (vld4q_dup_bf16): Used new builtin type.
15100 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15103 * config/pdp11/pdp11.c (pdp11_asm_output_var): Call switch_to_section
15104 at the start to switch to data section. Don't print extra newline if
15105 .globl directive has not been emitted.
15107 2020-03-11 Richard Biener <rguenther@suse.de>
15109 * match.pd ((T *)(ptr - ptr-cst) -> &MEM[ptr + -ptr-cst]):
15112 2020-03-11 Eric Botcazou <ebotcazou@adacore.com>
15114 PR middle-end/93961
15115 * tree.c (variably_modified_type_p) <RECORD_TYPE>: Recurse into fields
15116 whose type is a qualified union.
15118 2020-03-11 Jakub Jelinek <jakub@redhat.com>
15121 * config/aarch64/aarch64.c (aarch64_add_offset_1): Use absu_hwi
15122 instead of abs_hwi, change moffset type to unsigned HOST_WIDE_INT.
15125 * value-prof.c (dump_histogram_value): Use abs_hwi instead of
15127 (get_nth_most_common_value): Use abs_hwi instead of abs.
15129 PR middle-end/94111
15130 * dfp.c (decimal_to_binary): Only use decimal128ToString if from->cl
15131 is rvc_normal, otherwise use real_to_decimal to print the number to
15134 PR tree-optimization/94114
15135 * tree-loop-distribution.c (generate_memset_builtin): Call
15136 rewrite_to_non_trapping_overflow even on mem.
15137 (generate_memcpy_builtin): Call rewrite_to_non_trapping_overflow even
15140 2020-03-10 Jeff Law <law@redhat.com>
15142 * config/bfin/bfin.md (movsi_insv): Add length attribute.
15144 2020-03-10 Jiufu Guo <guojiufu@linux.ibm.com>
15147 * config/rs6000/rs6000.c (rs6000_emit_p9_fp_minmax): Check
15148 NAN and SIGNED_ZEROR for smax/smin.
15150 2020-03-10 Will Schmidt <will_schmidt@vnet.ibm.com>
15153 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Add
15154 clause to handle P9V_BUILTIN_VEC_LXVL with const arguments.
15156 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15158 * loop-iv.c (find_simple_exit): Make it static.
15159 * cfgloop.h: Remove the corresponding prototype.
15161 2020-03-10 Roman Zhuykov <zhroma@ispras.ru>
15163 * ddg.c (create_ddg): Fix intendation.
15164 (set_recurrence_length): Likewise.
15165 (create_ddg_all_sccs): Likewise.
15167 2020-03-10 Jakub Jelinek <jakub@redhat.com>
15170 * config/i386/i386.md (*testqi_ext_3): Call ix86_match_ccmode with
15171 CCZmode instead of CCNOmode if operands[2] has DImode and pos + len
15174 2020-03-09 Jason Merrill <jason@redhat.com>
15176 * gdbinit.in (pgs): Fix typo in documentation.
15178 2020-03-09 Vladimir Makarov <vmakarov@redhat.com>
15182 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15184 PR rtl-optimization/93564
15185 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15186 do not honor reg alloc order.
15188 2020-03-09 Andrew Pinski <apinski@marvell.com>
15190 PR inline-asm/94095
15191 * doc/extend.texi (x86 Operand Modifiers): Fix column
15194 2020-03-09 Martin Liska <mliska@suse.cz>
15197 * config/rs6000/rs6000.c (rs6000_option_override_internal):
15198 Remove set of str_align_loops and str_align_jumps as these
15199 should be set in previous 2 conditions in the function.
15201 2020-03-09 Jakub Jelinek <jakub@redhat.com>
15203 PR rtl-optimization/94045
15204 * params.opt (-param=max-find-base-term-values=): New option.
15205 * alias.c (find_base_term): Add cut-off for number of visited VALUEs
15206 in a single toplevel find_base_term call.
15208 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
15211 * config/aarch64/aarch64-builtins.c (TYPES_TERNOPU_LANE): Add define.
15212 * config/aarch64/aarch64-simd.md
15213 (aarch64_vec_<su>mult_lane<Qlane>): Add new insn for widening lane mul.
15214 (aarch64_vec_<su>mlal_lane<Qlane>): Likewise.
15215 * config/aarch64/aarch64-simd-builtins.def: Add intrinsics.
15216 * config/aarch64/arm_neon.h:
15217 (vmlal_lane_s16): Expand using intrinsics rather than inline asm.
15218 (vmlal_lane_u16): Likewise.
15219 (vmlal_lane_s32): Likewise.
15220 (vmlal_lane_u32): Likewise.
15221 (vmlal_laneq_s16): Likewise.
15222 (vmlal_laneq_u16): Likewise.
15223 (vmlal_laneq_s32): Likewise.
15224 (vmlal_laneq_u32): Likewise.
15225 (vmull_lane_s16): Likewise.
15226 (vmull_lane_u16): Likewise.
15227 (vmull_lane_s32): Likewise.
15228 (vmull_lane_u32): Likewise.
15229 (vmull_laneq_s16): Likewise.
15230 (vmull_laneq_u16): Likewise.
15231 (vmull_laneq_s32): Likewise.
15232 (vmull_laneq_u32): Likewise.
15233 * config/aarch64/iterators.md (Vcondtype): New iterator for lane mul.
15236 2020-03-06 Wilco Dijkstra <wdijkstr@arm.com>
15238 * aarch64/aarch64-simd.md (aarch64_mla_elt<mode>): Correct lane syntax.
15239 (aarch64_mla_elt_<vswap_width_name><mode>): Likewise.
15240 (aarch64_mls_elt<mode>): Likewise.
15241 (aarch64_mls_elt_<vswap_width_name><mode>): Likewise.
15242 (aarch64_fma4_elt<mode>): Likewise.
15243 (aarch64_fma4_elt_<vswap_width_name><mode>): Likewise.
15244 (aarch64_fma4_elt_to_64v2df): Likewise.
15245 (aarch64_fnma4_elt<mode>): Likewise.
15246 (aarch64_fnma4_elt_<vswap_width_name><mode>): Likewise.
15247 (aarch64_fnma4_elt_to_64v2df): Likewise.
15249 2020-03-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
15251 * config/aarch64/aarch64-sve2.md (@aarch64_sve_<sve_int_op><mode>:
15252 Specify movprfx attribute.
15253 (@aarch64_sve_<sve_int_op>_lane_<mode>): Likewise.
15255 2020-03-06 David Edelsohn <dje.gcc@gmail.com>
15258 * config/rs6000/aix61.h (TARGET_NO_SUM_IN_TOC): Set to 1 for
15260 (TARGET_NO_FP_IN_TOC): Same.
15261 * config/rs6000/aix71.h: Same.
15262 * config/rs6000/aix72.h: Same.
15264 2020-03-06 Andrew Pinski <apinski@marvell.com>
15265 Jeff Law <law@redhat.com>
15267 PR rtl-optimization/93996
15268 * haifa-sched.c (remove_notes): Be more careful when adding
15271 2020-03-06 Delia Burduv <delia.burduv@arm.com>
15273 * config/arm/arm_neon.h (vld2_bf16): New.
15279 (vld2_dup_bf16): New.
15280 (vld2q_dup_bf16): New.
15281 (vld3_dup_bf16): New.
15282 (vld3q_dup_bf16): New.
15283 (vld4_dup_bf16): New.
15284 (vld4q_dup_bf16): New.
15285 * config/arm/arm_neon_builtins.def
15286 (vld2): Changed to VAR13 and added v4bf, v8bf
15287 (vld2_dup): Changed to VAR8 and added v4bf, v8bf
15288 (vld3): Changed to VAR13 and added v4bf, v8bf
15289 (vld3_dup): Changed to VAR8 and added v4bf, v8bf
15290 (vld4): Changed to VAR13 and added v4bf, v8bf
15291 (vld4_dup): Changed to VAR8 and added v4bf, v8bf
15292 * config/arm/iterators.md (VDXBF2): New iterator.
15293 *config/arm/neon.md (neon_vld2): Use new iterators.
15294 (neon_vld2_dup<mode): Use new iterators.
15295 (neon_vld3<mode>): Likewise.
15296 (neon_vld3qa<mode>): Likewise.
15297 (neon_vld3qb<mode>): Likewise.
15298 (neon_vld3_dup<mode>): Likewise.
15299 (neon_vld4<mode>): Likewise.
15300 (neon_vld4qa<mode>): Likewise.
15301 (neon_vld4qb<mode>): Likewise.
15302 (neon_vld4_dup<mode>): Likewise.
15303 (neon_vld2_dupv8bf): New.
15304 (neon_vld3_dupv8bf): Likewise.
15305 (neon_vld4_dupv8bf): Likewise.
15307 2020-03-06 Delia Burduv <delia.burduv@arm.com>
15309 * config/arm/arm_neon.h (bfloat16x4x2_t): New typedef.
15310 (bfloat16x8x2_t): New typedef.
15311 (bfloat16x4x3_t): New typedef.
15312 (bfloat16x8x3_t): New typedef.
15313 (bfloat16x4x4_t): New typedef.
15314 (bfloat16x8x4_t): New typedef.
15321 * config/arm/arm-builtins.c (v2bf_UP): Define.
15323 (arm_init_simd_builtin_types): Init Bfloat16x2_t eltype.
15324 * config/arm/arm-modes.def (V2BF): New mode.
15325 * config/arm/arm-simd-builtin-types.def
15326 (Bfloat16x2_t): New entry.
15327 * config/arm/arm_neon_builtins.def
15328 (vst2): Changed to VAR13 and added v4bf, v8bf
15329 (vst3): Changed to VAR13 and added v4bf, v8bf
15330 (vst4): Changed to VAR13 and added v4bf, v8bf
15331 * config/arm/iterators.md (VDXBF): New iterator.
15332 (VQ2BF): New iterator.
15333 *config/arm/neon.md (neon_vst2<mode>): Used new iterators.
15334 (neon_vst2<mode>): Used new iterators.
15335 (neon_vst3<mode>): Used new iterators.
15336 (neon_vst3<mode>): Used new iterators.
15337 (neon_vst3qa<mode>): Used new iterators.
15338 (neon_vst3qb<mode>): Used new iterators.
15339 (neon_vst4<mode>): Used new iterators.
15340 (neon_vst4<mode>): Used new iterators.
15341 (neon_vst4qa<mode>): Used new iterators.
15342 (neon_vst4qb<mode>): Used new iterators.
15344 2020-03-06 Delia Burduv <delia.burduv@arm.com>
15346 * config/aarch64/aarch64-simd-builtins.def
15347 (bfcvtn): New built-in function.
15348 (bfcvtn_q): New built-in function.
15349 (bfcvtn2): New built-in function.
15350 (bfcvt): New built-in function.
15351 * config/aarch64/aarch64-simd.md
15352 (aarch64_bfcvtn<q><mode>): New pattern.
15353 (aarch64_bfcvtn2v8bf): New pattern.
15354 (aarch64_bfcvtbf): New pattern.
15355 * config/aarch64/arm_bf16.h (float32_t): New typedef.
15356 (vcvth_bf16_f32): New intrinsic.
15357 * config/aarch64/arm_bf16.h (vcvt_bf16_f32): New intrinsic.
15358 (vcvtq_low_bf16_f32): New intrinsic.
15359 (vcvtq_high_bf16_f32): New intrinsic.
15360 * config/aarch64/iterators.md (V4SF_TO_BF): New mode iterator.
15361 (UNSPEC_BFCVTN): New UNSPEC.
15362 (UNSPEC_BFCVTN2): New UNSPEC.
15363 (UNSPEC_BFCVT): New UNSPEC.
15364 * config/arm/types.md (bf_cvt): New type.
15366 2020-03-06 Andreas Krebbel <krebbel@linux.ibm.com>
15368 * config/s390/s390.md ("tabort"): Get rid of two consecutive
15369 blanks in format string.
15371 2020-03-05 H.J. Lu <hongjiu.lu@intel.com>
15375 * config/i386/i386-protos.h (ix86_output_ssemov): New prototype.
15376 * config/i386/i386.c (ix86_get_ssemov): New function.
15377 (ix86_output_ssemov): Likewise.
15378 * config/i386/sse.md (VMOVE:mov<mode>_internal): Call
15379 ix86_output_ssemov for TYPE_SSEMOV. Remove TARGET_AVX512VL
15381 (*movxi_internal_avx512f): Call ix86_output_ssemov for TYPE_SSEMOV.
15382 (*movoi_internal_avx): Call ix86_output_ssemov for TYPE_SSEMOV.
15383 Remove ext_sse_reg_operand and TARGET_AVX512VL check.
15384 (*movti_internal): Likewise.
15385 (*movtf_internal): Call ix86_output_ssemov for TYPE_SSEMOV.
15387 2020-03-05 Jeff Law <law@redhat.com>
15389 PR tree-optimization/91890
15390 * gimple-ssa-warn-restrict.c (maybe_diag_overlap): Remove LOC argument.
15391 Use gimple_or_expr_nonartificial_location.
15392 (check_bounds_overlap): Drop LOC argument to maybe_diag_access_bounds.
15393 Use gimple_or_expr_nonartificial_location.
15394 * gimple.c (gimple_or_expr_nonartificial_location): New function.
15395 * gimple.h (gimple_or_expr_nonartificial_location): Declare it.
15396 * tree-ssa-strlen.c (maybe_warn_overflow): Use
15397 gimple_or_expr_nonartificial_location.
15398 (maybe_diag_stxncpy_trunc, handle_builtin_stxncpy_strncat): Likewise.
15399 (maybe_warn_pointless_strcmp): Likewise.
15401 2020-03-05 Jakub Jelinek <jakub@redhat.com>
15404 * config/i386/avx2intrin.h (_mm_mask_i32gather_ps): Fix first cast of
15405 SRC and MASK arguments to __m128 from __m128d.
15406 (_mm256_mask_i32gather_ps): Fix first cast of MASK argument to __m256
15408 (_mm_mask_i64gather_ps): Fix first cast of MASK argument to __m128
15410 * config/i386/xopintrin.h (_mm_permute2_pd): Fix first cast of C
15411 argument to __m128i from __m128d.
15412 (_mm256_permute2_pd): Fix first cast of C argument to __m256i from
15414 (_mm_permute2_ps): Fix first cast of C argument to __m128i from __m128.
15415 (_mm256_permute2_ps): Fix first cast of C argument to __m256i from
15418 2020-03-05 Delia Burduv <delia.burduv@arm.com>
15420 * config/arm/arm_neon.h (vbfmmlaq_f32): New.
15421 (vbfmlalbq_f32): New.
15422 (vbfmlaltq_f32): New.
15423 (vbfmlalbq_lane_f32): New.
15424 (vbfmlaltq_lane_f32): New.
15425 (vbfmlalbq_laneq_f32): New.
15426 (vbfmlaltq_laneq_f32): New.
15427 * config/arm/arm_neon_builtins.def (vmmla): New.
15432 (vfmab_laneq): New.
15433 (vfmat_laneq): New.
15434 * config/arm/iterators.md (BF_MA): New int iterator.
15435 (bt): New int attribute.
15436 (VQXBF): Copy of VQX with V8BF.
15437 * config/arm/neon.md (neon_vmmlav8bf): New insn.
15438 (neon_vfma<bt>v8bf): New insn.
15439 (neon_vfma<bt>_lanev8bf): New insn.
15440 (neon_vfma<bt>_laneqv8bf): New expand.
15441 (neon_vget_high<mode>): Changed iterator to VQXBF.
15442 * config/arm/unspecs.md (UNSPEC_BFMMLA): New UNSPEC.
15443 (UNSPEC_BFMAB): New UNSPEC.
15444 (UNSPEC_BFMAT): New UNSPEC.
15446 2020-03-05 Jakub Jelinek <jakub@redhat.com>
15448 PR middle-end/93399
15449 * tree-pretty-print.h (pretty_print_string): Declare.
15450 * tree-pretty-print.c (pretty_print_string): Remove forward
15451 declaration, no longer static. Change nbytes parameter type
15452 from unsigned to size_t.
15453 * print-rtl.c (print_value) <case CONST_STRING>: Use
15454 pretty_print_string and for shrink way too long strings.
15456 2020-03-05 Richard Biener <rguenther@suse.de>
15457 Jakub Jelinek <jakub@redhat.com>
15459 PR tree-optimization/93582
15460 * tree-ssa-sccvn.c (vn_reference_lookup_3): Treat POINTER_PLUS_EXPR
15461 last operand as signed when looking for memset offset. Formatting
15464 2020-03-04 Andrew Pinski <apinski@marvell.com>
15467 * value-prof.c (dump_histogram_value): Use std::abs.
15469 2020-03-04 Martin Sebor <msebor@redhat.com>
15471 PR tree-optimization/93986
15472 * tree-ssa-strlen.c (maybe_warn_overflow): Convert all wide_int
15473 operands to the same precision widest_int to avoid ICEs.
15475 2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com>
15478 * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
15479 * rs6000.c (rs6000_disable_incompatible_switches): Add table entry
15480 for OPTION_MASK_ALTIVEC.
15482 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
15484 * config.gcc: Include the glibc-stdint.h header for zTPF.
15486 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
15488 * config/s390/s390.c (s390_secondary_memory_needed): Disallow
15489 direct FPR-GPR copies.
15490 (s390_register_info_gprtofpr): Disallow GPR content to be saved in
15493 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com>
15495 * config/s390/s390.c (s390_emit_prologue): Specify the 2 new
15496 operands to the prologue_tpf expander.
15497 (s390_emit_epilogue): Likewise.
15498 (s390_option_override_internal): Do error checking and setup for
15500 * config/s390/tpf.h (TPF_TRACE_PROLOGUE_CHECK)
15501 (TPF_TRACE_EPILOGUE_CHECK, TPF_TRACE_PROLOGUE_TARGET)
15502 (TPF_TRACE_EPILOGUE_TARGET, TPF_TRACE_PROLOGUE_SKIP_TARGET)
15503 (TPF_TRACE_EPILOGUE_SKIP_TARGET): New macro definitions.
15504 * config/s390/tpf.md ("prologue_tpf", "epilogue_tpf"): Add two new
15505 operands for the check flag and the branch target.
15506 * config/s390/tpf.opt ("mtpf-trace-hook-prologue-check")
15507 ("mtpf-trace-hook-prologue-target")
15508 ("mtpf-trace-hook-epilogue-check")
15509 ("mtpf-trace-hook-epilogue-target", "mtpf-trace-skip"): New
15511 * doc/invoke.texi: Document -mtpf-trace-skip option. The other
15512 options are for debugging purposes and will not be documented
15515 2020-03-04 Jakub Jelinek <jakub@redhat.com>
15518 * tree-inline.c (copy_decl_to_var): Copy DECL_BY_REFERENCE flag.
15520 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Add offseti
15521 argument. Change pd argument so that it can be modified. Turn
15522 constant non-CONSTRUCTOR store into non-constant if it is too large.
15523 Adjust offset and size of CONSTRUCTOR or non-constant store to avoid
15525 (vn_walk_cb_data::vn_walk_cb_data, vn_reference_lookup_3): Adjust
15528 2020-02-04 Richard Biener <rguenther@suse.de>
15530 PR tree-optimization/93964
15531 * graphite-isl-ast-to-gimple.c
15532 (gcc_expression_from_isl_ast_expr_id): Add intermediate
15533 conversion for pointer to integer converts.
15534 * graphite-scop-detection.c (assign_parameter_index_in_region):
15537 2020-03-04 Martin Liska <mliska@suse.cz>
15541 * doc/invoke.texi: Clarify --help=language and --help=common
15544 2020-03-04 Jakub Jelinek <jakub@redhat.com>
15546 PR tree-optimization/94001
15547 * tree-tailcall.c (process_assignment): Before comparing op1 to
15548 *ass_var, verify *ass_var is non-NULL.
15550 2020-03-04 Kito Cheng <kito.cheng@sifive.com>
15553 * config/riscv/riscv.c (riscv_emit_float_compare): Using NE to compare
15556 2020-03-03 Dennis Zhang <dennis.zhang@arm.com>
15558 * config/arm/arm_bf16.h (vcvtah_f32_bf16, vcvth_bf16_f32): New.
15559 * config/arm/arm_neon.h (vcvt_f32_bf16, vcvtq_low_f32_bf16): New.
15560 (vcvtq_high_f32_bf16, vcvt_bf16_f32): New.
15561 (vcvtq_low_bf16_f32, vcvtq_high_bf16_f32): New.
15562 * config/arm/arm_neon_builtins.def (vbfcvt, vbfcvt_high): New entries.
15563 (vbfcvtv4sf, vbfcvtv4sf_high): Likewise.
15564 * config/arm/iterators.md (VBFCVT, VBFCVTM): New mode iterators.
15565 (V_bf_low, V_bf_cvt_m): New mode attributes.
15566 * config/arm/neon.md (neon_vbfcvtv4sf<VBFCVT:mode>): New.
15567 (neon_vbfcvtv4sf_highv8bf, neon_vbfcvtsf): New.
15568 (neon_vbfcvt<VBFCVT:mode>, neon_vbfcvt_highv8bf): New.
15569 (neon_vbfcvtbf_cvtmode<mode>, neon_vbfcvtbf): New
15570 * config/arm/unspecs.md (UNSPEC_BFCVT, UNSPEC_BFCVT_HIG): New.
15572 2020-03-03 Jakub Jelinek <jakub@redhat.com>
15574 PR tree-optimization/93582
15575 * tree-ssa-sccvn.h (vn_reference_lookup): Add mask argument.
15576 * tree-ssa-sccvn.c (struct vn_walk_cb_data): Add mask and masked_result
15577 members, initialize them in the constructor and if mask is non-NULL,
15578 artificially push_partial_def {} for the portions of the mask that
15580 (vn_walk_cb_data::finish): If mask is non-NULL, set masked_result to
15581 val and return (void *)-1. Formatting fix.
15582 (vn_reference_lookup_pieces): Adjust vn_walk_cb_data initialization.
15584 (vn_reference_lookup): Add mask argument. If non-NULL, don't call
15585 fully_constant_vn_reference_p nor vn_reference_lookup_1 and return
15587 (visit_nary_op): Handle BIT_AND_EXPR of a memory load and INTEGER_CST
15589 (visit_stmt): Formatting fix.
15591 2020-03-03 Richard Biener <rguenther@suse.de>
15593 PR tree-optimization/93946
15594 * alias.h (refs_same_for_tbaa_p): Declare.
15595 * alias.c (refs_same_for_tbaa_p): New function.
15596 * tree-ssa-alias.c (ao_ref_alias_set): For a NULL ref return
15598 * tree-ssa-scopedtables.h
15599 (avail_exprs_stack::lookup_avail_expr): Add output argument
15600 giving access to the hashtable entry.
15601 * tree-ssa-scopedtables.c (avail_exprs_stack::lookup_avail_expr):
15603 * tree-ssa-dom.c: Include alias.h.
15604 (dom_opt_dom_walker::optimize_stmt): Validate TBAA state before
15605 removing redundant store.
15606 * tree-ssa-sccvn.h (vn_reference_s::base_set): New member.
15607 (ao_ref_init_from_vn_reference): Adjust prototype.
15608 (vn_reference_lookup_pieces): Likewise.
15609 (vn_reference_insert_pieces): Likewise.
15610 * tree-ssa-sccvn.c: Track base alias set in addition to alias
15612 (eliminate_dom_walker::eliminate_stmt): Also check base alias
15613 set when removing redundant stores.
15614 (visit_reference_op_store): Likewise.
15615 * dse.c (record_store): Adjust valdity check for redundant
15618 2020-03-03 Jakub Jelinek <jakub@redhat.com>
15621 * config/s390/s390.h (OPTION_DEFAULT_SPECS): Reorder.
15623 PR rtl-optimization/94002
15624 * explow.c (plus_constant): Punt if cst has VOIDmode and
15625 get_pool_mode is different from mode.
15627 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15629 * config/arc/arc.c (leigitimate_small_data_address_p): Check if an
15630 address has an offset which fits the scalling constraint for a
15631 load/store operation.
15632 (legitimate_scaled_address_p): Update use
15633 leigitimate_small_data_address_p.
15634 (arc_print_operand): Likewise.
15635 (arc_legitimate_address_p): Likewise.
15636 (legitimate_small_data_address_p): Likewise.
15638 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15640 * config/arc/arc.md (fmasf4_fpu): Use accl_operand predicate.
15641 (fnmasf4_fpu): Likewise.
15643 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15645 * config/arc/arc.md (adddi3): Early expand the 64bit operation into
15647 (subdi3): Likewise.
15648 (adddi3_i): Remove pattern.
15649 (subdi3_i): Likewise.
15651 2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
15653 * config/arc/arc.md (eh_return): Add length info.
15655 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15657 * doc/invoke.texi (-fanalyzer-show-duplicate-count): New.
15659 2020-03-02 David Malcolm <dmalcolm@redhat.com>
15661 * doc/invoke.texi (Static Analyzer Options): Add
15662 -Wanalyzer-stale-setjmp-buffer to the list of options enabled
15665 2020-03-02 Uroš Bizjak <ubizjak@gmail.com>
15668 * config/i386/i386.md (movstrict<mode>): Allow only
15669 registers with VALID_INT_MODE_P modes.
15671 2020-03-02 Andrew Stubbs <ams@codesourcery.com>
15673 * config/gcn/gcn-valu.md (dpp_move<mode>): New.
15674 (reduc_insn): Use 'U' and 'B' operand codes.
15675 (reduc_<reduc_op>_scal_<mode>): Allow all types.
15676 (reduc_<reduc_op>_scal_v64di): Delete.
15677 (*<reduc_op>_dpp_shr_<mode>): Allow all 1reg types.
15678 (*plus_carry_dpp_shr_v64si): Change to ...
15679 (*plus_carry_dpp_shr_<mode>): ... this and allow all 1reg int types.
15680 (mov_from_lane63_v64di): Change to ...
15681 (mov_from_lane63_<mode>): ... this, and allow all 64-bit modes.
15682 * config/gcn/gcn.c (gcn_expand_dpp_shr_insn): Increase buffer size.
15683 Support UNSPEC_MOV_DPP_SHR output formats.
15684 (gcn_expand_reduc_scalar): Add "use_moves" reductions.
15685 Add "use_extends" reductions.
15686 (print_operand_address): Add 'I' and 'U' codes.
15687 * config/gcn/gcn.md (unspec): Add UNSPEC_MOV_DPP_SHR.
15689 2020-03-02 Martin Liska <mliska@suse.cz>
15691 * lto-wrapper.c: Fix typo in comment about
15692 C++ standard version.
15694 2020-03-01 Martin Sebor <msebor@redhat.com>
15697 * calls.c (init_attr_rdwr_indices): Correctly handle attribute.
15699 2020-03-01 Martin Sebor <msebor@redhat.com>
15701 PR middle-end/93829
15702 * tree-ssa-strlen.c (count_nonzero_bytes): Set the size to that
15703 of a pointer in the outermost ADDR_EXPRs.
15705 2020-02-28 Jeff Law <law@redhat.com>
15707 * config/v850/v850.h (STATIC_CHAIN_REGNUM): Change to r19.
15708 * config/v850/v850.c (v850_asm_trampoline_template): Update
15711 2020-02-28 Michael Meissner <meissner@linux.ibm.com>
15714 * config/rs6000/vsx.md (vsx_extract_<mode>_<VS_scalar>mode_var):
15717 2020-02-28 Martin Liska <mliska@suse.cz>
15720 * configure.ac: Improve detection of ld_date by requiring
15721 either two dashes or none.
15722 * configure: Regenerate.
15724 2020-02-28 Vladimir Makarov <vmakarov@redhat.com>
15726 PR rtl-optimization/93564
15727 * ira-color.c (assign_hard_reg): Prefer smaller hard regno when we
15728 do not honor reg alloc order.
15730 2020-02-27 Joel Hutton <Joel.Hutton@arm.com>
15733 * config/aarch64/aarch64.c (aarch64_override_options): Fix
15734 misleading warning string.
15736 2020-02-27 Martin Sebor <msebor@redhat.com>
15738 * doc/invoke.texi (-Wbuiltin-declaration-mismatch): Fix a typo.
15740 2020-02-27 Michael Meissner <meissner@linux.ibm.com>
15743 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
15744 Split the insn into two parts. This insn only does variable
15745 extract from a register.
15746 (vsx_extract_<mode>_var_load, VSX_D iterator): New insn, do
15747 variable extract from memory.
15748 (vsx_extract_v4sf_var): Split the insn into two parts. This insn
15749 only does variable extract from a register.
15750 (vsx_extract_v4sf_var_load): New insn, do variable extract from
15752 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Split the insn
15753 into two parts. This insn only does variable extract from a
15755 (vsx_extract_<mode>_var_load, VSX_EXTRACT_I iterator): New insn,
15756 do variable extract from memory.
15758 2020-02-27 Martin Jambor <mjambor@suse.cz>
15759 Feng Xue <fxue@os.amperecomputing.com>
15762 * ipa-cp.c (same_node_or_its_all_contexts_clone_p): Replaced with
15763 new function calls_same_node_or_its_all_contexts_clone_p.
15764 (cgraph_edge_brings_value_p): Use it.
15765 (cgraph_edge_brings_value_p): Likewise.
15766 (self_recursive_pass_through_p): Return false if caller is a clone.
15767 (self_recursive_agg_pass_through_p): Likewise.
15769 2020-02-27 Jan Hubicka <hubicka@ucw.cz>
15771 PR middle-end/92152
15772 * alias.c (ends_tbaa_access_path_p): Break out from ...
15773 (component_uses_parent_alias_set_from): ... here.
15774 * alias.h (ends_tbaa_access_path_p): Declare.
15775 * tree-ssa-alias.c (access_path_may_continue_p): Break out from ...;
15776 handle trailing arrays past end of tbaa access path.
15777 (aliasing_component_refs_p): ... here; likewise.
15778 (nonoverlapping_refs_since_match_p): Track TBAA segment of the access
15779 path; disambiguate also past end of it.
15780 (nonoverlapping_component_refs_p): Use only TBAA segment of the access
15783 2020-02-27 Mihail Ionescu <mihail.ionescu@arm.com>
15785 * (__ARM_NUM_LANES, __arm_lane, __arm_lane_q): Move to the
15786 beginning of the file.
15787 (vcreate_bf16, vcombine_bf16): New.
15788 (vdup_n_bf16, vdupq_n_bf16): New.
15789 (vdup_lane_bf16, vdup_laneq_bf16): New.
15790 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
15791 (vduph_lane_bf16, vduph_laneq_bf16): New.
15792 (vset_lane_bf16, vsetq_lane_bf16): New.
15793 (vget_lane_bf16, vgetq_lane_bf16): New.
15794 (vget_high_bf16, vget_low_bf16): New.
15795 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
15796 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
15797 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
15798 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
15799 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
15800 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
15801 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
15802 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
15803 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
15804 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
15805 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New.
15806 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
15807 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
15808 (vreinterpretq_bf16_p128): New.
15809 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
15810 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
15811 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
15812 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
15813 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
15814 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
15815 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
15816 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
15817 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
15818 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
15819 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
15820 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
15821 (vreinterpretq_p128_bf16): New.
15822 * config/arm/arm_neon_builtins.def (VDX): Add V4BF.
15823 (V_elem): Likewise.
15824 (V_elem_l): Likewise.
15825 (VD_LANE): Likewise.
15827 (V_DOUBLE): Likewise.
15828 (VDQX): Add V4BF and V8BF.
15829 (V_two_elem, V_three_elem, V_four_elem): Likewise.
15831 (V_HALF): Likewise.
15832 (V_double_vector_mode): Likewise.
15833 (V_cmp_result): Likewise.
15834 (V_uf_sclr): Likewise.
15835 (V_sz_elem): Likewise.
15836 (Is_d_reg): Likewise.
15837 (V_mode_nunits): Likewise.
15838 * config/arm/neon.md (neon_vdup_lane): Enable for BFloat16.
15840 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15842 * config/gcn/gcn-valu.md (VEC_SUBDWORD_MODE): New mode iterator.
15843 (<expander><mode>2<exec>): Change modes to VEC_ALL1REG_INT_MODE.
15844 (<expander><mode>3<exec>): Likewise.
15845 (<expander><mode>3): New.
15846 (v<expander><mode>3): New.
15847 (<expander><mode>3): New.
15848 (<expander><mode>3<exec>): Rename to ...
15849 (<expander>v64si3<exec>): ... this, and change modes to V64SI.
15850 * config/gcn/gcn.md (mnemonic): Use '%B' for not.
15852 2020-02-27 Alexandre Oliva <oliva@adacore.com>
15854 * config/vx-common.h (NO_DOLLAR_IN_LABEL, NO_DOT_IN_LABEL): Leave
15857 2020-02-27 Richard Biener <rguenther@suse.de>
15859 PR tree-optimization/93508
15860 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle _CHK like
15861 non-_CHK variants. Valueize their length arguments.
15863 2020-02-27 Richard Biener <rguenther@suse.de>
15865 PR tree-optimization/93953
15866 * tree-vect-slp.c (slp_copy_subtree): Avoid keeping a reference
15867 to the hash-map entry.
15869 2020-02-27 Andrew Stubbs <ams@codesourcery.com>
15871 * config/gcn/gcn.md (mov<mode>): Add transformations for BI subregs.
15873 2020-02-27 Mark Williams <mwilliams@fb.com>
15875 * dwarf2out.c (file_name_acquire): Call remap_debug_filename.
15876 * lto-opts.c (lto_write_options): Drop -fdebug-prefix-map,
15877 -ffile-prefix-map and -fmacro-prefix-map.
15878 * lto-streamer-out.c: Include file-prefix-map.h.
15879 (lto_output_location): Remap the file part of locations.
15881 2020-02-27 Jakub Jelinek <jakub@redhat.com>
15884 * gimplify.c (gimplify_init_constructor): Don't promote readonly
15885 DECL_REGISTER variables to TREE_STATIC.
15887 PR tree-optimization/93582
15888 PR tree-optimization/93945
15889 * tree-ssa-sccvn.c (vn_reference_lookup_3): Handle memset with
15890 non-zero INTEGER_CST second argument and ref->offset or ref->size
15891 not a multiple of BITS_PER_UNIT.
15893 2020-02-27 Jonathan Wakely <jwakely@redhat.com>
15895 * doc/install.texi (Binaries): Update description of BullFreeware.
15897 2020-02-26 Sandra Loosemore <sandra@codesourcery.com>
15901 * doc/invoke.texi (Option Summary): Re-alphabetize warnings in
15902 C++ Language Options, Warning Options, and Static Analyzer
15903 Options lists. Document negative form of options enabled by
15904 default. Move some things around to more accurately sort
15905 warnings by category.
15906 (C++ Dialect Options, Warning Options, Static Analyzer
15907 Options): Document negative form of options when enabled by
15908 default. Move some things around to more accurately sort
15909 warnings by category. Add some missing index entries.
15910 Light copy-editing.
15912 2020-02-26 Carl Love <cel@us.ibm.com>
15915 * doc/extend.texi (PowerPC AltiVec Built-in Functions available on
15916 ISA 2.07): The builtin-function name __builtin_crypto_vpmsumb is only
15917 for the vector unsigned short arguments. It is also listed as the
15918 name of the built-in for arguments vector unsigned short,
15919 vector unsigned int and vector unsigned long long built-ins. The
15920 name of the builtins for these arguments should be:
15921 __builtin_crypto_vpmsumh, __builtin_crypto_vpmsumw and
15922 __builtin_crypto_vpmsumd respectively.
15924 2020-02-26 Richard Biener <rguenther@suse.de>
15926 * tree-vect-slp.c (vect_print_slp_tree): Also dump ref count
15927 and load permutation.
15929 2020-02-26 Richard Sandiford <richard.sandiford@arm.com>
15931 PR middle-end/93843
15932 * optabs-tree.c (supportable_convert_operation): Reject types with
15935 2020-02-26 David Malcolm <dmalcolm@redhat.com>
15937 * Makefile.in (ANALYZER_OBJS): Add analyzer/bar-chart.o.
15939 2020-02-26 Jakub Jelinek <jakub@redhat.com>
15941 PR tree-optimization/93820
15942 * gimple-ssa-store-merging.c (check_no_overlap): Change RHS_CODE
15943 argument to ALL_INTEGER_CST_P boolean.
15944 (imm_store_chain_info::try_coalesce_bswap): Adjust caller.
15945 (imm_store_chain_info::coalesce_immediate_stores): Likewise. Handle
15946 adjacent INTEGER_CST store into merged_store->only_constants like
15949 2020-02-25 Jakub Jelinek <jakub@redhat.com>
15952 * config/sh/sh.c (expand_cbranchdi4): Fix comment typo, probablity
15954 * cfghooks.c (verify_flow_info): Likewise.
15955 * predict.c (combine_predictions_for_bb): Likewise.
15956 * bb-reorder.c (connect_better_edge_p): Likewise. Fix comment typo,
15957 sucessor -> successor.
15958 (find_traces_1_round): Fix comment typo, destinarion -> destination.
15959 * omp-expand.c (expand_oacc_for): Fix comment typo, sucessors ->
15961 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): Fix dump
15962 message typo, sucessors -> successors.
15964 2020-02-25 Martin Sebor <msebor@redhat.com>
15966 * doc/extend.texi (attribute access): Correct an example.
15968 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
15970 * config/aarch64/aarch64-builtins.c (aarch64_scalar_builtin_types):
15972 (aarch64_init_simd_builtin_scalar_types): Register simd_bf.
15973 (VAR15, VAR16): New.
15974 * config/aarch64/iterators.md (VALLDIF): Enable for V4BF and V8BF.
15975 (VD): Enable for V4BF.
15977 (VQ): Enable for V8BF.
15979 (VQ_NO2E): Likewise.
15980 (VDBL, Vdbl): Add V4BF.
15981 (V_INT_EQUIV, v_int_equiv): Add V4BF and V8BF.
15982 * config/aarch64/arm_neon.h (bfloat16x4x2_t): New typedef.
15983 (bfloat16x8x2_t): Likewise.
15984 (bfloat16x4x3_t): Likewise.
15985 (bfloat16x8x3_t): Likewise.
15986 (bfloat16x4x4_t): Likewise.
15987 (bfloat16x8x4_t): Likewise.
15988 (vcombine_bf16): New.
15989 (vld1_bf16, vld1_bf16_x2): New.
15990 (vld1_bf16_x3, vld1_bf16_x4): New.
15991 (vld1q_bf16, vld1q_bf16_x2): New.
15992 (vld1q_bf16_x3, vld1q_bf16_x4): New.
15993 (vld1_lane_bf16): New.
15994 (vld1q_lane_bf16): New.
15995 (vld1_dup_bf16): New.
15996 (vld1q_dup_bf16): New.
15999 (vld2_dup_bf16): New.
16000 (vld2q_dup_bf16): New.
16003 (vld3_dup_bf16): New.
16004 (vld3q_dup_bf16): New.
16007 (vld4_dup_bf16): New.
16008 (vld4q_dup_bf16): New.
16009 (vst1_bf16, vst1_bf16_x2): New.
16010 (vst1_bf16_x3, vst1_bf16_x4): New.
16011 (vst1q_bf16, vst1q_bf16_x2): New.
16012 (vst1q_bf16_x3, vst1q_bf16_x4): New.
16013 (vst1_lane_bf16): New.
16014 (vst1q_lane_bf16): New.
16022 2020-02-25 Mihail Ionescu <mihail.ionescu@arm.com>
16024 * config/aarch64/iterators.md (VDQF_F16) Add V4BF and V8BF.
16025 (VALL_F16): Likewise.
16026 (VALLDI_F16): Likewise.
16028 (Vetype): Likewise.
16029 (vswap_width_name): Likewise.
16030 (VSWAP_WIDTH): Likewise.
16034 * config/aarch64/arm_neon.h (vset_lane_bf16, vsetq_lane_bf16): New.
16035 (vget_lane_bf16, vgetq_lane_bf16): New.
16036 (vcreate_bf16): New.
16037 (vdup_n_bf16, vdupq_n_bf16): New.
16038 (vdup_lane_bf16, vdup_laneq_bf16): New.
16039 (vdupq_lane_bf16, vdupq_laneq_bf16): New.
16040 (vduph_lane_bf16, vduph_laneq_bf16): New.
16041 (vreinterpret_bf16_u8, vreinterpretq_bf16_u8): New.
16042 (vreinterpret_bf16_u16, vreinterpretq_bf16_u16): New.
16043 (vreinterpret_bf16_u32, vreinterpretq_bf16_u32): New.
16044 (vreinterpret_bf16_u64, vreinterpretq_bf16_u64): New.
16045 (vreinterpret_bf16_s8, vreinterpretq_bf16_s8): New.
16046 (vreinterpret_bf16_s16, vreinterpretq_bf16_s16): New.
16047 (vreinterpret_bf16_s32, vreinterpretq_bf16_s32): New.
16048 (vreinterpret_bf16_s64, vreinterpretq_bf16_s64): New.
16049 (vreinterpret_bf16_p8, vreinterpretq_bf16_p8): New.
16050 (vreinterpret_bf16_p16, vreinterpretq_bf16_p16): New.
16051 (vreinterpret_bf16_p64, vreinterpretq_bf16_p64): New
16052 (vreinterpret_bf16_f16, vreinterpretq_bf16_f16): New
16053 (vreinterpret_bf16_f32, vreinterpretq_bf16_f32): New.
16054 (vreinterpret_bf16_f64, vreinterpretq_bf16_f64): New.
16055 (vreinterpretq_bf16_p128): New.
16056 (vreinterpret_s8_bf16, vreinterpretq_s8_bf16): New.
16057 (vreinterpret_s16_bf16, vreinterpretq_s16_bf16): New.
16058 (vreinterpret_s32_bf16, vreinterpretq_s32_bf16): New.
16059 (vreinterpret_s64_bf16, vreinterpretq_s64_bf16): New.
16060 (vreinterpret_u8_bf16, vreinterpretq_u8_bf16): New.
16061 (vreinterpret_u16_bf16, vreinterpretq_u16_bf16): New.
16062 (vreinterpret_u32_bf16, vreinterpretq_u32_bf16): New.
16063 (vreinterpret_u64_bf16, vreinterpretq_u64_bf16): New.
16064 (vreinterpret_p8_bf16, vreinterpretq_p8_bf16): New.
16065 (vreinterpret_p16_bf16, vreinterpretq_p16_bf16): New.
16066 (vreinterpret_p64_bf16, vreinterpretq_p64_bf16): New.
16067 (vreinterpret_f32_bf16, vreinterpretq_f32_bf16): New.
16068 (vreinterpret_f64_bf16,vreinterpretq_f64_bf16): New.
16069 (vreinterpret_f16_bf16,vreinterpretq_f16_bf16): New.
16070 (vreinterpretq_p128_bf16): New.
16072 2020-02-25 Dennis Zhang <dennis.zhang@arm.com>
16074 * config/arm/arm_neon.h (vbfdot_f32, vbfdotq_f32): New
16075 (vbfdot_lane_f32, vbfdotq_laneq_f32): New.
16076 (vbfdot_laneq_f32, vbfdotq_lane_f32): New.
16077 * config/arm/arm_neon_builtins.def (vbfdot): New entry.
16078 (vbfdot_lanev4bf, vbfdot_lanev8bf): Likewise.
16079 * config/arm/iterators.md (VSF2BF): New attribute.
16080 * config/arm/neon.md (neon_vbfdot<VCVTF:mode>): New entry.
16081 (neon_vbfdot_lanev4bf<VCVTF:mode>): Likewise.
16082 (neon_vbfdot_lanev8bf<VCVTF:mode>): Likewise.
16084 2020-02-25 Christophe Lyon <christophe.lyon@linaro.org>
16086 * config/arm/arm.md (required_for_purecode): New attribute.
16087 (enabled): Handle required_for_purecode.
16088 * config/arm/thumb1.md (thumb1_movsi_insn): Add alternative to
16089 work with -mpure-code.
16091 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16093 PR rtl-optimization/93908
16094 * combine.c (find_split_point): For store into ZERO_EXTRACT, and src
16097 2019-02-25 Eric Botcazou <ebotcazou@adacore.com>
16099 * dwarf2out.c (dwarf2out_size_function): Run in early-DWARF mode.
16101 2020-02-25 Roman Zhuykov <zhroma@ispras.ru>
16103 * doc/install.texi (--enable-checking): Adjust wording.
16105 2020-02-25 Richard Biener <rguenther@suse.de>
16107 PR tree-optimization/93868
16108 * tree-vect-slp.c (slp_copy_subtree): New function.
16109 (vect_attempt_slp_rearrange_stmts): Copy the SLP tree before
16110 re-arranging stmts in it.
16112 2020-02-25 Jakub Jelinek <jakub@redhat.com>
16114 PR middle-end/93874
16115 * passes.c (pass_manager::dump_passes): Create a cgraph node for the
16116 dummy function and remove it at the end.
16118 PR translation/93864
16119 * config/lm32/lm32.c (lm32_setup_incoming_varargs): Fix comment typo
16120 paramter -> parameter.
16121 * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Likewise.
16122 * ipa-prop.h (struct ipa_agg_replacement_value): Likewise.
16124 2020-02-24 Roman Zhuykov <zhroma@ispras.ru>
16126 * doc/install.texi (--enable-checking): Properly document current
16128 (--enable-stage1-checking): Minor clarification about bootstrap.
16130 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16133 * doc/invoke.texi (-Wnanalyzer-tainted-array-index): Note that
16134 -fanalyzer-checker=taint is also required.
16135 (-fanalyzer-checker=): Note that providing this option enables the
16136 given checker, and doing so may be required for checkers that are
16137 disabled by default.
16139 2020-02-24 David Malcolm <dmalcolm@redhat.com>
16141 * doc/invoke.texi (-fanalyzer-verbosity=): "2" only shows
16142 significant control flow events; add a "3" which shows all
16143 control flow events; the old "3" becomes "4".
16145 2020-02-24 Jakub Jelinek <jakub@redhat.com>
16147 PR tree-optimization/93582
16148 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Consider
16149 pd.offset and pd.size to be counted in bits rather than bytes, add
16150 support for maxsizei that is not a multiple of BITS_PER_UNIT and
16151 handle bitfield stores and loads.
16152 (vn_reference_lookup_3): Don't call ranges_known_overlap_p with
16153 uncomparable quantities - bytes vs. bits. Allow push_partial_def
16154 on offsets/sizes that aren't multiple of BITS_PER_UNIT and adjust
16155 pd.offset/pd.size to be counted in bits rather than bytes.
16156 Formatting fix. Rename shadowed len variable to buflen.
16158 2020-02-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16159 Kugan Vivekandarajah <kugan.vivekanandarajah@linaro.org>
16162 * gcc.c (putenv_COLLECT_AS_OPTIONS): New function.
16163 (driver::main): Call putenv_COLLECT_AS_OPTIONS.
16164 * opts-common.c (parse_options_from_collect_gcc_options): New function.
16165 (prepend_xassembler_to_collect_as_options): Likewise.
16166 * opts.h (parse_options_from_collect_gcc_options): Declare prototype.
16167 (prepend_xassembler_to_collect_as_options): Likewise.
16168 * lto-opts.c (lto_write_options): Stream assembler options
16169 in COLLECT_AS_OPTIONS.
16170 * lto-wrapper.c (xassembler_options_error): New static variable.
16171 (get_options_from_collect_gcc_options): Move parsing options code to
16172 parse_options_from_collect_gcc_options and call it.
16173 (merge_and_complain): Validate -Xassembler options.
16174 (append_compiler_options): Handle OPT_Xassembler.
16175 (run_gcc): Append command line -Xassembler options to
16176 collect_gcc_options.
16177 * doc/invoke.texi: Add documentation about using Xassembler
16180 2020-02-24 Kito Cheng <kito.cheng@sifive.com>
16182 * config/riscv/riscv.c (riscv_emit_float_compare): Change the code gen
16184 (riscv_rtx_costs): Update cost model for LTGT.
16186 2020-02-23 Vladimir Makarov <vmakarov@redhat.com>
16188 PR rtl-optimization/93564
16189 * ira-color.c (struct update_cost_queue_elem): New member start.
16190 (queue_update_cost, get_next_update_cost): Add new arg start.
16191 (allocnos_conflict_p): New function.
16192 (update_costs_from_allocno): Add new arg conflict_cost_update_p.
16193 Add checking conflicts with allocnos_conflict_p.
16194 (update_costs_from_prefs, restore_costs_from_copies): Adjust
16195 update_costs_from_allocno calls.
16196 (update_conflict_hard_regno_costs): Add checking conflicts with
16197 allocnos_conflict_p. Adjust calls of queue_update_cost and
16198 get_next_update_cost.
16199 (assign_hard_reg): Adjust calls of queue_update_cost. Add
16201 (bucket_allocno_compare_func): Restore previous version.
16203 2020-02-21 John David Anglin <danglin@gcc.gnu.org>
16205 * config/pa/pa.c (pa_function_value): Fix check for word and
16206 double-word size when handling aggregate return values.
16207 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Fix to indicate
16208 that homogeneous SFmode and DFmode aggregates are passed and returned
16209 in general registers.
16211 2020-02-21 Jakub Jelinek <jakub@redhat.com>
16213 PR translation/93759
16214 * opts.c (print_filtered_help): Translate help before appending
16215 messages to it rather than after that.
16217 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
16219 PR rtl-optimization/PR92989
16220 * lra-lives.c (process_bb_lives): Restore the original order
16221 of the bb liveness update. Call make_hard_regno_dead for each
16222 register clobbered at the start of an EH receiver.
16224 2020-02-18 Feng Xue <fxue@os.amperecomputing.com>
16227 * ipa-cp.c (self_recursively_generated_p): Mark self-dependent value as
16228 self-recursively generated.
16230 2020-02-21 Iain Sandoe <iain@sandoe.co.uk>
16233 * config/darwin-c.c (pop_field_alignment): Adjust quoting of
16236 2020-02-21 Mihail Ionescu <mihail.ionescu@arm.com>
16238 * doc/sourcebuild.texi (arm_v8_1m_mve_ok):
16239 Document new target supports option.
16241 2020-02-21 Dennis Zhang <dennis.zhang@arm.com>
16243 * config/arm/arm_neon.h (vmmlaq_s32, vmmlaq_u32, vusmmlaq_s32): New.
16244 * config/arm/arm_neon_builtins.def (smmla, ummla, usmmla): New.
16245 * config/arm/iterators.md (MATMUL): New iterator.
16246 (sup): Add UNSPEC_MATMUL_S, UNSPEC_MATMUL_U, and UNSPEC_MATMUL_US.
16247 (mmla_sfx): New attribute.
16248 * config/arm/neon.md (neon_<sup>mmlav16qi): New.
16249 * config/arm/unspecs.md (UNSPEC_MATMUL_S, UNSPEC_MATMUL_U): New.
16250 (UNSPEC_MATMUL_US): New.
16252 2020-02-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
16254 * config/arm/arm.md: Prevent scalar shifts from being used when big
16257 2020-02-21 Jan Hubicka <hubicka@ucw.cz>
16258 Richard Biener <rguenther@suse.de>
16260 PR tree-optimization/93586
16261 * tree-ssa-alias.c (nonoverlapping_array_refs_p): Finish array walk
16262 after mismatched array refs; do not sure type size information to
16263 recover from unmatched referneces with !flag_strict_aliasing_p.
16265 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
16267 * config/gcn/gcn-valu.md (gather_load<mode>): Rename to ...
16268 (gather_load<mode>v64si): ... this and set operand 2 to V64SI.
16269 (scatter_store<mode>): Rename to ...
16270 (scatter_store<mode>v64si): ... this and set operand 1 to V64SI.
16271 (scatter<mode>_exec): Delete. Move contents ...
16272 (mask_scatter_store<mode>): ... here, and rename that to ...
16273 (mask_gather_load<mode>v64si): ... this. Set operand 2 to V64SI.
16274 Remove mode conversion.
16275 (mask_gather_load<mode>): Rename to ...
16276 (mask_scatter_store<mode>v64si): ... this. Set operand 1 to V64SI.
16277 Remove mode conversion.
16278 * config/gcn/gcn.c (gcn_expand_scaled_offsets): Remove mode conversion.
16280 2020-02-21 Martin Jambor <mjambor@suse.cz>
16282 PR tree-optimization/93845
16283 * tree-sra.c (verify_sra_access_forest): Only test access size of
16286 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
16288 * config/gcn/gcn.c (gcn_hard_regno_mode_ok): Align VGPR pairs.
16289 * config/gcn/gcn-valu.md (addv64di3): Remove early-clobber.
16290 (addv64di3_exec): Likewise.
16291 (subv64di3): Likewise.
16292 (subv64di3_exec): Likewise.
16293 (addv64di3_zext): Likewise.
16294 (addv64di3_zext_exec): Likewise.
16295 (addv64di3_zext_dup): Likewise.
16296 (addv64di3_zext_dup_exec): Likewise.
16297 (addv64di3_zext_dup2): Likewise.
16298 (addv64di3_zext_dup2_exec): Likewise.
16299 (addv64di3_sext_dup2): Likewise.
16300 (addv64di3_sext_dup2_exec): Likewise.
16301 (<expander>v64di3): Likewise.
16302 (<expander>v64di3_exec): Likewise.
16303 (*<reduc_op>_dpp_shr_v64di): Likewise.
16304 (*plus_carry_dpp_shr_v64di): Likewise.
16305 * config/gcn/gcn.md (adddi3): Likewise.
16306 (addptrdi3): Likewise.
16307 (<expander>di3): Likewise.
16309 2020-02-21 Andrew Stubbs <ams@codesourcery.com>
16311 * config/gcn/gcn-valu.md (vec_seriesv64di): Use gen_vec_duplicatev64di.
16313 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
16315 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Add SVE
16316 support. Use aarch64_emit_mult instead of emitting multiplication
16317 instructions directly.
16318 * config/aarch64/aarch64-sve.md (sqrt<mode>2, rsqrt<mode>2)
16319 (@aarch64_rsqrte<mode>, @aarch64_rsqrts<mode>): New expanders.
16321 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
16323 * config/aarch64/aarch64.c (aarch64_emit_mult): New function.
16324 (aarch64_emit_approx_div): Add SVE support. Use aarch64_emit_mult
16325 instead of emitting multiplication instructions directly.
16326 * config/aarch64/iterators.md (SVE_COND_FP_BINARY_OPTAB): New iterator.
16327 * config/aarch64/aarch64-sve.md (div<mode>3, @aarch64_frecpe<mode>)
16328 (@aarch64_frecps<mode>): New expanders.
16330 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
16332 * config/aarch64/aarch64-protos.h (AARCH64_APPROX_MODE): Operate
16333 on and produce uint64_ts rather than ints.
16334 (AARCH64_APPROX_NONE, AARCH64_APPROX_ALL): Change to uint64_ts.
16335 (cpu_approx_modes): Change the fields from unsigned int to uint64_t.
16337 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
16339 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Don't create
16340 an unused xmsk register when handling approximate rsqrt.
16342 2020-02-21 Richard Sandiford <richard.sandiford@arm.com>
16344 * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Fix inverted
16345 flag_finite_math_only condition.
16347 2020-02-20 Uroš Bizjak <ubizjak@gmail.com>
16350 * config/i386/mmx.md (*vec_extractv2sf_1): Match source operand
16351 to destination operand for shufps alternative.
16352 (*vec_extractv2si_1): Ditto.
16354 2020-02-20 Peter Bergner <bergner@linux.ibm.com>
16357 * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Handle VSX
16360 2020-02-20 Martin Liska <mliska@suse.cz>
16362 PR translation/93831
16363 * config/darwin.c (darwin_override_options): Change 64b to 64-bit mode.
16365 2020-02-20 Martin Liska <mliska@suse.cz>
16367 PR translation/93830
16368 * common/config/avr/avr-common.c: Remote trailing "|".
16370 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
16372 * collect2.c (maybe_run_lto_and_relink): Fix typo in
16375 2020-02-19 Richard Sandiford <richard.sandiford@arm.com>
16377 PR tree-optimization/93767
16378 * tree-vect-data-refs.c (vect_compile_time_alias): Remove the
16379 access-size bias from the offset calculations for negative strides.
16381 2020-02-19 Bernd Edlinger <bernd.edlinger@hotmail.de>
16383 * collect2.c (c_file, o_file): Make const again.
16384 (ldout,lderrout, dump_ld_file): Remove.
16385 (tool_cleanup): Avoid calling not signal-safe functions.
16386 (maybe_run_lto_and_relink): Avoid possible signal handler
16387 access to unintialzed memory (lto_o_files).
16388 (main): Avoid leaking temp files in $TMPDIR.
16389 Initialize c_file/o_file with concat, which avoids exposing
16390 uninitialized memory to signal handler, which calls unlink(!).
16391 Avoid calling maybe_unlink when the main function returns,
16392 since the atexit handler is already doing this.
16393 * collect2.h (dump_ld_file, ldout, lderrout): Remove.
16395 2020-02-19 Martin Jambor <mjambor@suse.cz>
16397 PR tree-optimization/93776
16398 * tree-sra.c (create_access): Do not create zero size accesses.
16399 (get_access_for_expr): Do not search for zero sized accesses.
16401 2020-02-19 Martin Jambor <mjambor@suse.cz>
16403 PR tree-optimization/93667
16404 * tree-sra.c (scalarizable_type_p): Return false if record fields
16405 do not follow wach other.
16407 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
16409 * config/riscv/riscv.c (riscv_output_move) Using fmv.x.w/fmv.w.x
16410 rather than fmv.x.s/fmv.s.x.
16412 2020-02-18 James Greenhalgh <james.greenhalgh@arm.com>
16414 * config/aarch64/aarch64-simd-builtins.def
16415 (intrinsic_vec_smult_lo_): New.
16416 (intrinsic_vec_umult_lo_): Likewise.
16417 (vec_widen_smult_hi_): Likewise.
16418 (vec_widen_umult_hi_): Likewise.
16419 * config/aarch64/aarch64-simd.md
16420 (aarch64_intrinsic_vec_<su>mult_lo_<mode>): New.
16421 * config/aarch64/arm_neon.h (vmull_high_s8): Use intrinsics.
16422 (vmull_high_s16): Likewise.
16423 (vmull_high_s32): Likewise.
16424 (vmull_high_u8): Likewise.
16425 (vmull_high_u16): Likewise.
16426 (vmull_high_u32): Likewise.
16427 (vmull_s8): Likewise.
16428 (vmull_s16): Likewise.
16429 (vmull_s32): Likewise.
16430 (vmull_u8): Likewise.
16431 (vmull_u16): Likewise.
16432 (vmull_u32): Likewise.
16434 2020-02-18 Martin Liska <mliska@suse.cz>
16436 * value-prof.c (stream_out_histogram_value): Restore LTO PGO
16437 bootstrap by missing removal of invalid sanity check.
16439 2020-02-18 Martin Liska <mliska@suse.cz>
16442 * ipa-icf-gimple.c (func_checker::compare_gimple_assign):
16443 Always compare LHS of gimple_assign.
16445 2020-02-18 Martin Liska <mliska@suse.cz>
16448 * cgraph.c (cgraph_node::verify_node): Verify MALLOC attribute
16449 and return type of functions.
16450 * ipa-param-manipulation.c (ipa_param_adjustments::adjust_decl):
16451 Drop MALLOC attribute for void functions.
16452 * ipa-pure-const.c (funct_state_summary_t::duplicate): Drop
16453 malloc_state for a new VOID clone.
16455 2020-02-18 Martin Liska <mliska@suse.cz>
16458 * common.opt: Add -fprofile-reproducibility.
16459 * doc/invoke.texi: Document it.
16460 * value-prof.c (dump_histogram_value):
16461 Document and support behavior for counters[0]
16462 being a negative value.
16463 (get_nth_most_common_value): Handle negative
16464 counters[0] in respect to flag_profile_reproducible.
16466 2020-02-18 Jakub Jelinek <jakub@redhat.com>
16469 * cgraph.c (verify_speculative_call): Use speculative_id instead of
16470 speculative_uid in messages. Remove trailing whitespace from error
16471 message. Use num_speculative_call_targets instead of
16472 num_speculative_targets in a message.
16473 (cgraph_node::verify_node): Use call_stmt instead of cal_stmt in
16474 edge messages and stmt instead of cal_stmt in reference message.
16476 PR tree-optimization/93780
16477 * tree-ssa.c (non_rewritable_lvalue_p): Check valid_vector_subparts_p
16478 before calling build_vector_type.
16479 (execute_update_addresses_taken): Likewise.
16482 * params.opt (-param=ipa-max-switch-predicate-bounds=): Fix help
16483 typo, functoin -> function.
16484 * tree.c (free_lang_data_in_decl): Fix comment typo,
16485 functoin -> function.
16486 * ipa-visibility.c (cgraph_externally_visible_p): Likewise.
16488 2020-02-17 David Malcolm <dmalcolm@redhat.com>
16490 * diagnostic.c (print_any_cwe): Don't call get_cwe_url if URLs
16492 (print_option_information): Don't call get_option_url if URLs
16495 2020-02-17 Alexandre Oliva <oliva@adacore.com>
16497 * tree-emutls.c (new_emutls_decl, emutls_common_1): Complete
16498 handling of register_common-less targets.
16500 2020-02-17 Martin Liska <mliska@suse.cz>
16503 * ipa-devirt.c (odr_types_equivalent_p): Fix grammar.
16505 2020-02-17 Martin Liska <mliska@suse.cz>
16507 PR translation/93755
16508 * config/rs6000/rs6000.c (rs6000_option_override_internal):
16511 2020-02-17 Martin Liska <mliska@suse.cz>
16514 * config/rx/elf.opt: Fix typo.
16516 2020-02-17 Richard Biener <rguenther@suse.de>
16519 * opts-global.c (print_ignored_options): Use inform and
16522 2020-02-17 Jiufu Guo <guojiufu@linux.ibm.com>
16525 * config/rs6000/rs6000.md (untyped_call): Add emit_clobber.
16527 2020-02-16 Uroš Bizjak <ubizjak@gmail.com>
16530 * config/i386/i386.md (atan2xf3): Swap operands 1 and 2.
16531 (atan2<mode>3): Update operand order in the call to gen_atan2xf3.
16533 2020-02-15 Jason Merrill <jason@redhat.com>
16535 * doc/invoke.texi (C Dialect Options): Add -std=c++20.
16537 2020-02-15 Jakub Jelinek <jakub@redhat.com>
16539 PR tree-optimization/93744
16540 * match.pd (((m1 >/</>=/<= m2) * d -> (m1 >/</>=/<= m2) ? d : 0,
16541 A - ((A - B) & -(C cmp D)) -> (C cmp D) ? B : A,
16542 A + ((B - A) & -(C cmp D)) -> (C cmp D) ? B : A): For GENERIC, make
16543 sure @2 in the first and @1 in the other patterns has no side-effects.
16545 2020-02-15 David Malcolm <dmalcolm@redhat.com>
16546 Bernd Edlinger <bernd.edlinger@hotmail.de>
16550 * config.in (DIAGNOSTICS_URLS_DEFAULT): New define.
16551 * configure.ac (--with-diagnostics-urls): New configuration
16552 option, based on --with-diagnostics-color.
16553 (DIAGNOSTICS_URLS_DEFAULT): New define.
16554 * config.h: Regenerate.
16555 * configure: Regenerate.
16556 * diagnostic.c (diagnostic_urls_init): Handle -1 for
16557 DIAGNOSTICS_URLS_DEFAULT from configure-time
16558 --with-diagnostics-urls=auto-if-env by querying for a GCC_URLS
16559 and TERM_URLS environment variable.
16560 * diagnostic-url.h (diagnostic_url_format): New enum type.
16561 (diagnostic_urls_enabled_p): rename to...
16562 (determine_url_format): ... this, and change return type.
16563 * diagnostic-color.c (parse_env_vars_for_urls): New helper function.
16564 (auto_enable_urls): Disable URLs on xfce4-terminal, gnome-terminal,
16565 the linux console, and mingw.
16566 (diagnostic_urls_enabled_p): rename to...
16567 (determine_url_format): ... this, and adjust.
16568 * pretty-print.h (pretty_printer::show_urls): rename to...
16569 (pretty_printer::url_format): ... this, and change to enum.
16570 * pretty-print.c (pretty_printer::pretty_printer,
16571 pp_begin_url, pp_end_url, test_urls): Adjust.
16572 * doc/install.texi (--with-diagnostics-urls): Document the new
16573 configuration option.
16574 (--with-diagnostics-color): Document the existing interaction
16575 with GCC_COLORS better.
16576 * doc/invoke.texi (-fdiagnostics-urls): Add GCC_URLS and TERM_URLS
16577 vindex reference. Update description of defaults based on the above.
16578 (-fdiagnostics-color): Update description of how -fdiagnostics-color
16579 interacts with GCC_COLORS.
16581 2020-02-14 Eric Botcazou <ebotcazou@adacore.com>
16584 * config/sparc/sparc.c (eligible_for_call_delay): Test HAVE_GNU_LD in
16585 conjunction with TARGET_GNU_TLS in early return.
16587 2020-02-14 Alexander Monakov <amonakov@ispras.ru>
16589 * rtlanal.c (rtx_cost): Handle a SET up front. Avoid division if
16590 the mode is not wider than UNITS_PER_WORD.
16592 2020-02-14 Martin Jambor <mjambor@suse.cz>
16594 PR tree-optimization/93516
16595 * tree-sra.c (propagate_subaccesses_from_rhs): Do not create
16596 access of the same type as the parent.
16597 (propagate_subaccesses_from_lhs): Likewise.
16599 2020-02-14 Hongtao Liu <hongtao.liu@intel.com>
16602 * config/i386/avx512vbmi2intrin.h
16603 (_mm512_shrdi_epi16, _mm512_mask_shrdi_epi16,
16604 _mm512_maskz_shrdi_epi16, _mm512_shrdi_epi32,
16605 _mm512_mask_shrdi_epi32, _mm512_maskz_shrdi_epi32,
16606 _m512_shrdi_epi64, _m512_mask_shrdi_epi64,
16607 _m512_maskz_shrdi_epi64, _mm512_shldi_epi16,
16608 _mm512_mask_shldi_epi16, _mm512_maskz_shldi_epi16,
16609 _mm512_shldi_epi32, _mm512_mask_shldi_epi32,
16610 _mm512_maskz_shldi_epi32, _mm512_shldi_epi64,
16611 _mm512_mask_shldi_epi64, _mm512_maskz_shldi_epi64): Fix typo
16612 of lacking a closing parenthesis.
16613 * config/i386/avx512vbmi2vlintrin.h
16614 (_mm256_shrdi_epi16, _mm256_mask_shrdi_epi16,
16615 _mm256_maskz_shrdi_epi16, _mm256_shrdi_epi32,
16616 _mm256_mask_shrdi_epi32, _mm256_maskz_shrdi_epi32,
16617 _m256_shrdi_epi64, _m256_mask_shrdi_epi64,
16618 _m256_maskz_shrdi_epi64, _mm256_shldi_epi16,
16619 _mm256_mask_shldi_epi16, _mm256_maskz_shldi_epi16,
16620 _mm256_shldi_epi32, _mm256_mask_shldi_epi32,
16621 _mm256_maskz_shldi_epi32, _mm256_shldi_epi64,
16622 _mm256_mask_shldi_epi64, _mm256_maskz_shldi_epi64,
16623 _mm_shrdi_epi16, _mm_mask_shrdi_epi16,
16624 _mm_maskz_shrdi_epi16, _mm_shrdi_epi32,
16625 _mm_mask_shrdi_epi32, _mm_maskz_shrdi_epi32,
16626 _mm_shrdi_epi64, _mm_mask_shrdi_epi64,
16627 _m_maskz_shrdi_epi64, _mm_shldi_epi16,
16628 _mm_mask_shldi_epi16, _mm_maskz_shldi_epi16,
16629 _mm_shldi_epi32, _mm_mask_shldi_epi32,
16630 _mm_maskz_shldi_epi32, _mm_shldi_epi64,
16631 _mm_mask_shldi_epi64, _mm_maskz_shldi_epi64): Ditto.
16633 2020-02-13 H.J. Lu <hongjiu.lu@intel.com>
16636 * config/i386/i386.c (ix86_trampoline_init): Skip ENDBR32 at
16637 the target function entry.
16639 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16641 * common/config/arc/arc-common.c (arc_option_optimization_table):
16642 Disable if-conversion step when optimized for size.
16644 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16646 * config/arc/arc.c (arc_conditional_register_usage): R0-R3 and
16647 R12-R15 are always in ARCOMPACT16_REGS register class.
16648 * config/arc/arc.opt (mq-class): Deprecate.
16649 * config/arc/constraint.md ("q"): Remove dependency on mq-class
16651 * doc/invoke.texi (mq-class): Update text.
16652 * common/config/arc/arc-common.c (arc_option_optimization_table):
16655 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16657 * config/arc/arc.c (arc_insn_cost): New function.
16658 (TARGET_INSN_COST): Define.
16659 * config/arc/arc.md (cost): New attribute.
16660 (add_n): Use arc_nonmemory_operand.
16661 (ashlsi3_insn): Likewise, also update constraints.
16662 (ashrsi3_insn): Likewise.
16663 (rotrsi3): Likewise.
16664 (add_shift): Likewise.
16665 * config/arc/predicates.md (arc_nonmemory_operand): New predicate.
16667 2020-02-13 Claudiu Zissulescu <claziss@synopsys.com>
16669 * config/arc/arc.md (mulsidi_600): Correctly select mlo/mhi
16671 (umulsidi_600): Likewise.
16673 2020-02-13 Jakub Jelinek <jakub@redhat.com>
16676 * config/i386/avx512bitalgintrin.h (_mm512_mask_popcnt_epi8,
16677 _mm512_mask_popcnt_epi16, _mm256_mask_popcnt_epi8,
16678 _mm256_mask_popcnt_epi16, _mm_mask_popcnt_epi8,
16679 _mm_mask_popcnt_epi16): Rename __B argument to __A and __A to __W,
16680 pass __A to the builtin followed by __W instead of __A followed by
16682 * config/i386/avx512vpopcntdqintrin.h (_mm512_mask_popcnt_epi32,
16683 _mm512_mask_popcnt_epi64): Likewise.
16684 * config/i386/avx512vpopcntdqvlintrin.h (_mm_mask_popcnt_epi32,
16685 _mm256_mask_popcnt_epi32, _mm_mask_popcnt_epi64,
16686 _mm256_mask_popcnt_epi64): Likewise.
16688 PR tree-optimization/93582
16689 * fold-const.h (shift_bytes_in_array_left,
16690 shift_bytes_in_array_right): Declare.
16691 * fold-const.c (shift_bytes_in_array_left,
16692 shift_bytes_in_array_right): New function, moved from
16693 gimple-ssa-store-merging.c, no longer static.
16694 * gimple-ssa-store-merging.c (shift_bytes_in_array): Move
16695 to gimple-ssa-store-merging.c and rename to shift_bytes_in_array_left.
16696 (shift_bytes_in_array_right): Move to gimple-ssa-store-merging.c.
16697 (encode_tree_to_bitpos): Use shift_bytes_in_array_left instead of
16698 shift_bytes_in_array.
16699 (verify_shift_bytes_in_array): Rename to ...
16700 (verify_shift_bytes_in_array_left): ... this. Use
16701 shift_bytes_in_array_left instead of shift_bytes_in_array.
16702 (store_merging_c_tests): Call verify_shift_bytes_in_array_left
16703 instead of verify_shift_bytes_in_array.
16704 * tree-ssa-sccvn.c (vn_reference_lookup_3): For native_encode_expr
16705 / native_interpret_expr where the store covers all needed bits,
16706 punt on PDP-endian, otherwise allow all involved offsets and sizes
16707 not to be byte-aligned.
16710 * config/i386/sse.md (k<code><mode>): Drop mode from last operand and
16711 use const_0_to_255_operand predicate instead of immediate_operand.
16712 (avx512dq_fpclass<mode><mask_scalar_merge_name>,
16713 avx512dq_vmfpclass<mode><mask_scalar_merge_name>,
16714 vgf2p8affineinvqb_<mode><mask_name>,
16715 vgf2p8affineqb_<mode><mask_name>): Drop mode from
16716 const_0_to_255_operand predicated operands.
16718 2020-02-12 Jeff Law <law@redhat.com>
16720 * config/h8300/h8300.md (comparison shortening peepholes): Use
16721 a mode iterator to merge the HImode and SImode peepholes.
16723 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16725 PR middle-end/93663
16726 * real.c (is_even): Make static. Function comment fix.
16727 (is_halfway_below): Make static, don't assert R is not inf/nan,
16728 instead return false for those. Small formatting fixes.
16730 2020-02-12 Martin Sebor <msebor@redhat.com>
16732 PR middle-end/93646
16733 * tree-ssa-strlen.c (handle_builtin_stxncpy): Rename...
16734 (handle_builtin_stxncpy_strncat): ...to this. Change first argument.
16735 Issue only -Wstringop-overflow strncat, never -Wstringop-truncation.
16736 (strlen_check_and_optimize_call): Adjust callee name.
16738 2020-02-12 Jeff Law <law@redhat.com>
16740 * config/h8300/h8300.md (comparison shortening peepholes): Drop
16741 (and (xor)) variant. Combine other two into single peephole.
16743 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16745 PR rtl-optimization/93565
16746 * config/aarch64/aarch64.c (aarch64_rtx_costs): Add CTZ costs.
16748 2020-02-12 Wilco Dijkstra <wdijkstr@arm.com>
16750 * config/aarch64/aarch64-simd.md
16751 (aarch64_zero_extend<GPI:mode>_reduc_plus_<VDQV_E:mode>): New pattern.
16752 * config/aarch64/aarch64.md (popcount<mode>2): Use it instead of
16753 generating separate ADDV and zero_extend patterns.
16754 * config/aarch64/iterators.md (VDQV_E): New iterator.
16756 2020-02-12 Jeff Law <law@redhat.com>
16758 * config/h8300/h8300.md (cpymemsi, movmd): Remove dead patterns,
16759 expanders, splits, etc.
16760 (movmd_internal_<mode>, movmd splitter, movstr, movsd): Likewise.
16761 (stpcpy_internal_<mode>, stpcpy splitter): Likewise.
16762 (peepholes to convert QI/HI mode pushes to SI mode pushes): Likewise.
16763 * config/h8300/h8300.c (h8300_swap_into_er6): Remove unused function.
16764 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise
16765 * config/h8300/h8300-protos.h (h8300_swap_into_er6): Remove unused
16766 function prototype.
16767 (h8300_swap_out_of_er6, h8sx_emit_movmd): Likewise.
16769 2020-02-12 Jakub Jelinek <jakub@redhat.com>
16772 * config/i386/sse.md (VI48F_256_DQ): New mode iterator.
16773 (avx512vl_vextractf128<mode>): Use it instead of VI48F_256. Remove
16774 TARGET_AVX512DQ from condition.
16775 (vec_extract_lo_<mode><mask_name>): Use <mask_avx512dq_condition>
16776 instead of <mask_mode512bit_condition> in condition. If
16777 TARGET_AVX512DQ is false, emit vextract*64x4 instead of
16779 (vec_extract_lo_<mode><mask_name>): Drop <mask_avx512dq_condition>
16782 2020-02-12 Kewen Lin <linkw@gcc.gnu.org>
16785 * ira.c (combine_and_move_insns): Skip multiple_sets def_insn.
16787 2020-02-12 Segher Boessenkool <segher@kernel.crashing.org>
16789 * config/rs6000/rs6000.c (rs6000_debug_print_mode): Don't use sizeof
16790 where strlen is more legible.
16791 (rs6000_builtin_vectorized_libmass): Ditto.
16792 (rs6000_print_options_internal): Ditto.
16794 2020-02-11 Martin Sebor <msebor@redhat.com>
16796 PR tree-optimization/93683
16797 * tree-ssa-alias.c (stmt_kills_ref_p): Avoid using LHS when not set.
16799 2020-02-11 Michael Meissner <meissner@linux.ibm.com>
16801 * config/rs6000/predicates.md (cint34_operand): Rename the
16802 -mprefixed-addr option to be -mprefixed.
16803 * config/rs6000/rs6000-cpus.def (ISA_FUTURE_MASKS_SERVER): Rename
16804 the -mprefixed-addr option to be -mprefixed.
16805 (OTHER_FUTURE_MASKS): Likewise.
16806 (POWERPC_MASKS): Likewise.
16807 * config/rs6000/rs6000.c (rs6000_option_override_internal): Rename
16808 the -mprefixed-addr option to be -mprefixed. Change error
16809 messages to refer to -mprefixed.
16810 (num_insns_constant_gpr): Rename the -mprefixed-addr option to be
16812 (rs6000_legitimate_offset_address_p): Likewise.
16813 (rs6000_mode_dependent_address): Likewise.
16814 (rs6000_opt_masks): Change the spelling of "-mprefixed-addr" to be
16815 "-mprefixed" for target attributes and pragmas.
16816 (address_to_insn_form): Rename the -mprefixed-addr option to be
16818 (rs6000_adjust_insn_length): Likewise.
16819 * config/rs6000/rs6000.h (FINAL_PRESCAN_INSN): Rename the
16820 -mprefixed-addr option to be -mprefixed.
16821 (ASM_OUTPUT_OPCODE): Likewise.
16822 * config/rs6000/rs6000.md (prefixed insn attribute): Rename the
16823 -mprefixed-addr option to be -mprefixed.
16824 * config/rs6000/rs6000.opt (-mprefixed): Rename the
16825 -mprefixed-addr option to be prefixed. Change the option from
16826 being undocumented to being documented.
16827 * doc/invoke.texi (RS/6000 and PowerPC Options): Document the
16828 -mprefixed option. Update the -mpcrel documentation to mention
16831 2020-02-11 Hans-Peter Nilsson <hp@axis.com>
16833 * ira-conflicts.c (print_hard_reg_set): Correct output for sets
16834 including FIRST_PSEUDO_REGISTER - 1.
16835 * ira-color.c (print_hard_reg_set): Ditto.
16837 2020-02-11 Stam Markianos-Wright <stam.markianos-wright@arm.com>
16839 * config/arm/arm-builtins.c (enum arm_type_qualifiers):
16840 (USTERNOP_QUALIFIERS): New define.
16841 (USMAC_LANE_QUADTUP_QUALIFIERS): New define.
16842 (SUMAC_LANE_QUADTUP_QUALIFIERS): New define.
16843 (arm_expand_builtin_args): Add case ARG_BUILTIN_LANE_QUADTUP_INDEX.
16844 (arm_expand_builtin_1): Add qualifier_lane_quadtup_index.
16845 * config/arm/arm_neon.h (vusdot_s32): New.
16846 (vusdot_lane_s32): New.
16847 (vusdotq_lane_s32): New.
16848 (vsudot_lane_s32): New.
16849 (vsudotq_lane_s32): New.
16850 * config/arm/arm_neon_builtins.def (usdot, usdot_lane,sudot_lane): New.
16851 * config/arm/iterators.md (DOTPROD_I8MM): New.
16852 (sup, opsuffix): Add <us/su>.
16853 * config/arm/neon.md (neon_usdot, <us/su>dot_lane: New.
16854 * config/arm/unspecs.md (UNSPEC_DOT_US, UNSPEC_DOT_SU): New.
16856 2020-02-11 Richard Biener <rguenther@suse.de>
16858 PR tree-optimization/93661
16859 PR tree-optimization/93662
16860 * tree-ssa-sccvn.c (vn_reference_lookup_3): Properly guard
16861 tree_to_poly_int64.
16862 * tree-sra.c (get_access_for_expr): Likewise.
16864 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16867 * config/i386/sse.md (VI_256_AVX2): New mode iterator.
16868 (vcond_mask_<mode><sseintvecmodelower>): Use it instead of VI_256.
16869 Change condition from TARGET_AVX2 to TARGET_AVX.
16871 2020-02-10 Iain Sandoe <iain@sandoe.co.uk>
16874 * config/darwin-c.c (darwin_cfstring_ref_p): Fix up last
16875 argument of strncmp.
16877 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16879 Try to generate zero-based comparisons.
16880 * config/cris/cris.c (cris_reduce_compare): New function.
16881 * config/cris/cris-protos.h (cris_reduce_compare): Add prototype.
16882 * config/cris/cris.md ("cbranch<mode>4", "cbranchdi4", "cstoredi4")
16883 (cstore<mode>4"): Apply cris_reduce_compare in expanders.
16885 2020-02-10 Richard Earnshaw <rearnsha@arm.com>
16888 * config/arm/arm.md (movsi_compare0): Allow SP as a source register
16889 in Thumb state and also as a destination in Arm state. Add T16
16892 2020-02-10 Hans-Peter Nilsson <hp@axis.com>
16894 * md.texi (Define Subst): Match closing paren in example.
16896 2020-02-10 Jakub Jelinek <jakub@redhat.com>
16900 * config/i386/i386.c (x86_64_elf_section_type_flags): Fix up last
16901 arguments of strncmp.
16903 2020-02-10 Feng Xue <fxue@os.amperecomputing.com>
16906 * ipa-cp.c (ipcp_lattice::add_value): Add source with same call edge
16907 but different source value.
16908 (adjust_callers_for_value_intersection): New function.
16909 (gather_edges_for_value): Adjust order of callers to let a
16910 non-self-recursive caller be the first element.
16911 (self_recursive_pass_through_p): Add a new parameter "simple", and
16912 check generalized self-recursive pass-through jump function.
16913 (self_recursive_agg_pass_through_p): Likewise.
16914 (find_more_scalar_values_for_callers_subset): Compute value from
16915 pass-through jump function for self-recursive.
16916 (intersect_with_plats): Cleanup previous implementation code for value
16917 itersection with self-recursive call edge.
16918 (intersect_with_agg_replacements): Likewise.
16919 (intersect_aggregates_with_edge): Deduce value from pass-through jump
16920 function for self-recursive call edge. Cleanup previous implementation
16921 code for value intersection with self-recursive call edge.
16922 (decide_whether_version_node): Remove dead callers and adjust order
16923 to let a non-self-recursive caller be the first element.
16925 2020-02-09 Uroš Bizjak <ubizjak@gmail.com>
16927 * recog.c: Move pass_split_before_sched2 code in front of
16928 pass_split_before_regstack.
16929 (pass_data_split_before_sched2): Rename pass to split3 from split4.
16930 (pass_data_split_before_regstack): Rename pass to split4 from split3.
16931 (rest_of_handle_split_before_sched2): Remove.
16932 (pass_split_before_sched2::execute): Unconditionally call
16934 (enable_split_before_sched2): New function.
16935 (pass_split_before_sched2::gate): Use enable_split_before_sched2.
16936 (pass_split_before_regstack::gate): Ditto.
16937 * config/nds32/nds32.c (nds32_split_double_word_load_store_p):
16938 Update name check for renamed split4 pass.
16939 * config/sh/sh.c (register_sh_passes): Update pass insertion
16940 point for renamed split4 pass.
16942 2020-02-09 Jakub Jelinek <jakub@redhat.com>
16944 * gimplify.c (gimplify_adjust_omp_clauses_1): Promote
16945 DECL_IN_CONSTANT_POOL variables into "omp declare target" to avoid
16946 copying them around between host and target.
16948 2020-02-08 Andrew Pinski <apinski@marvell.com>
16951 * config/aarch64/aarch64-simd.md (movmisalign<mode>): Check
16952 STRICT_ALIGNMENT also.
16954 2020-02-08 Jim Wilson <jimw@sifive.com>
16957 * config/riscv/riscv.h (HARD_REGNO_CALLER_SAVE_MODE): Define.
16959 2020-02-08 Uroš Bizjak <ubizjak@gmail.com>
16960 Jakub Jelinek <jakub@redhat.com>
16963 * config/i386/i386.h (CALL_USED_REGISTERS): Make
16964 xmm16-xmm31 call-used even in 64-bit ms-abi.
16966 2020-02-07 Dennis Zhang <dennis.zhang@arm.com>
16968 * config/aarch64/aarch64-simd-builtins.def (simd_smmla): New entry.
16969 (simd_ummla, simd_usmmla): Likewise.
16970 * config/aarch64/aarch64-simd.md (aarch64_simd_<sur>mmlav16qi): New.
16971 * config/aarch64/arm_neon.h (vmmlaq_s32, vmmlaq_u32): New.
16972 (vusmmlaq_s32): New.
16974 2020-02-07 Richard Biener <rguenther@suse.de>
16976 PR middle-end/93519
16977 * tree-inline.c (fold_marked_statements): Do a PRE walk,
16978 skipping unreachable regions.
16979 (optimize_inline_calls): Skip folding stmts when we didn't
16982 2020-02-07 H.J. Lu <hongjiu.lu@intel.com>
16985 * config/i386/i386.c (function_arg_ms_64): Add a type argument.
16986 Don't return aggregates with only SFmode and DFmode in SSE
16988 (ix86_function_arg): Pass arg.type to function_arg_ms_64.
16990 2020-02-07 Jakub Jelinek <jakub@redhat.com>
16993 * config/rs6000/rs6000-logue.c
16994 (rs6000_emit_probe_stack_range_stack_clash): Always use gen_add3_insn,
16995 if it fails, move rs into end_addr and retry. Add
16996 REG_FRAME_RELATED_EXPR note whenever it returns more than one insn or
16997 the insn pattern doesn't describe well what exactly happens to
17001 * config/i386/predicates.md (avx_identity_operand): Remove.
17002 * config/i386/sse.md (*avx_vec_concat<mode>_1): Remove.
17003 (avx_<castmode><avxsizesuffix>_<castmode>,
17004 avx512f_<castmode><avxsizesuffix>_256<castmode>): Change patterns to
17005 a VEC_CONCAT of the operand and UNSPEC_CAST.
17006 (avx512f_<castmode><avxsizesuffix>_<castmode>): Change pattern to
17007 a VEC_CONCAT of VEC_CONCAT of the operand and UNSPEC_CAST with
17011 * config/i386/i386.c (ix86_lea_outperforms): Make sure to clear
17012 recog_data.insn if distance_non_agu_define changed it.
17014 2020-02-06 Michael Meissner <meissner@linux.ibm.com>
17017 * config/rs6000/rs6000.c (reg_to_non_prefixed): Before ISA 3.0
17018 we only had X-FORM (reg+reg) addressing for vectors. Also before
17019 ISA 3.0, we only had X-FORM addressing for scalars in the
17020 traditional Altivec registers.
17022 2020-02-06 <zhongyunde@huawei.com>
17023 Vladimir Makarov <vmakarov@redhat.com>
17025 PR rtl-optimization/93561
17026 * lra-assigns.c (spill_for): Check that tested hard regno is not out of
17027 hard register range.
17029 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17031 * config/aarch64/aarch64.md (aarch64_movk<mode>): Add a type
17034 2020-02-06 Segher Boessenkool <segher@kernel.crashing.org>
17036 * config/rs6000/rs6000.c (rs6000_emit_set_long_const): Handle the case
17037 where the low and the high 32 bits are equal to each other specially,
17038 with an rldimi instruction.
17040 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17042 * config/arm/arm-cpus.in: Set profile M for armv8.1-m.main.
17044 2020-02-06 Mihail Ionescu <mihail.ionescu@arm.com>
17046 * config/arm/arm-tables.opt: Regenerate.
17048 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17051 * config/aarch64/aarch64-protos.h (aarch64_movk_shift): Declare.
17052 * config/aarch64/aarch64.c (aarch64_movk_shift): New function.
17053 * config/aarch64/aarch64.md (aarch64_movk<mode>): New pattern.
17055 2020-02-06 Richard Sandiford <richard.sandiford@arm.com>
17057 PR rtl-optimization/87763
17058 * config/aarch64/aarch64.md (*ashiftsi_extvdi_bfiz): New pattern.
17060 2020-02-06 Delia Burduv <delia.burduv@arm.com>
17062 * config/aarch64/aarch64-simd-builtins.def
17063 (bfmlaq): New built-in function.
17064 (bfmlalb): New built-in function.
17065 (bfmlalt): New built-in function.
17066 (bfmlalb_lane): New built-in function.
17067 (bfmlalt_lane): New built-in function.
17068 * config/aarch64/aarch64-simd.md
17069 (aarch64_bfmmlaqv4sf): New pattern.
17070 (aarch64_bfmlal<bt>v4sf): New pattern.
17071 (aarch64_bfmlal<bt>_lane<q>v4sf): New pattern.
17072 * config/aarch64/arm_neon.h (vbfmmlaq_f32): New intrinsic.
17073 (vbfmlalbq_f32): New intrinsic.
17074 (vbfmlaltq_f32): New intrinsic.
17075 (vbfmlalbq_lane_f32): New intrinsic.
17076 (vbfmlaltq_lane_f32): New intrinsic.
17077 (vbfmlalbq_laneq_f32): New intrinsic.
17078 (vbfmlaltq_laneq_f32): New intrinsic.
17079 * config/aarch64/iterators.md (BF_MLA): New int iterator.
17080 (bt): New int attribute.
17082 2020-02-06 Uroš Bizjak <ubizjak@gmail.com>
17084 * config/i386/i386.md (*pushtf): Emit "#" instead of
17085 calling gcc_unreachable in insn output.
17088 (*pushsf_rex64): Ditto for alternatives other than 1.
17089 (*pushsf): Ditto for alternatives other than 1.
17091 2020-02-06 Martin Liska <mliska@suse.cz>
17093 PR gcov-profile/91971
17094 PR gcov-profile/93466
17095 * coverage.c (coverage_init): Revert mangling of
17096 path into filename. It can lead to huge filename length.
17097 Creation of subfolders seem more natural.
17099 2020-02-06 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17102 * config/arm/arm.c (arm_block_arith_comp_libfuncs_for_mode): New.
17103 (arm_init_libfuncs): Add BFmode support to block spurious BF libfuncs.
17104 Use arm_block_arith_comp_libfuncs_for_mode for HFmode.
17106 2020-02-06 Jakub Jelinek <jakub@redhat.com>
17109 * config/i386/predicates.md (avx_identity_operand): New predicate.
17110 * config/i386/sse.md (*avx_vec_concat<mode>_1): New
17111 define_insn_and_split.
17114 * omp-low.c (use_pointer_for_field): For nested constructs, also
17115 look for map clauses on target construct.
17116 (scan_omp_1_stmt) <case GIMPLE_OMP_TARGET>: Bump temporarily
17117 taskreg_nesting_level.
17120 * gimplify.c (gimplify_scan_omp_clauses) <do_notice>: If adding
17121 shared clause, call omp_notice_variable on outer context if any.
17123 2020-02-05 Jason Merrill <jason@redhat.com>
17126 * symtab.c (symtab_node::nonzero_address): A DECL_COMDAT decl has
17127 non-zero address even if weak and not yet defined.
17129 2020-02-05 Martin Sebor <msebor@redhat.com>
17131 PR tree-optimization/92765
17132 * gimple-fold.c (get_range_strlen_tree): Handle MEM_REF and PARM_DECL.
17133 * tree-ssa-strlen.c (compute_string_length): Remove.
17134 (determine_min_objsize): Remove.
17135 (get_len_or_size): Add an argument. Call get_range_strlen_dynamic.
17136 Avoid using type size as the upper bound on string length.
17137 (handle_builtin_string_cmp): Add an argument. Adjust.
17138 (strlen_check_and_optimize_call): Pass additional argument to
17139 handle_builtin_string_cmp.
17141 2020-02-05 Uroš Bizjak <ubizjak@gmail.com>
17143 * config/i386/i386.md (*pushdi2_rex64 peephole2): Remove.
17144 (*pushdi2_rex64 peephole2): Unconditionally split after
17145 epilogue_completed.
17146 (*ashl<mode>3_doubleword): Ditto.
17147 (*<shift_insn><mode>3_doubleword): Ditto.
17149 2020-02-05 Michael Meissner <meissner@linux.ibm.com>
17152 * config/rs6000/rs6000.c (get_vector_offset): Fix
17154 2020-02-05 Andrew Stubbs <ams@codesourcery.com>
17156 * config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Use / not space.
17158 2020-02-05 David Malcolm <dmalcolm@redhat.com>
17160 * doc/analyzer.texi
17161 (Special Functions for Debugging the Analyzer): Update description
17162 of __analyzer_dump_exploded_nodes.
17164 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17167 * config/i386/i386-features.c (ix86_add_reg_usage_to_vzeroupper): Only
17168 include sets and not clobbers in the vzeroupper pattern.
17169 * config/i386/sse.md (*avx_vzeroupper): Require in insn condition that
17170 the parallel has 17 (64-bit) or 9 (32-bit) elts.
17171 (*avx_vzeroupper_1): New define_insn_and_split.
17174 * recog.c (pass_split_after_reload::gate): For STACK_REGS targets,
17175 don't run when !optimize.
17176 (pass_split_before_regstack::gate): For STACK_REGS targets, run even
17179 2020-02-05 Richard Biener <rguenther@suse.de>
17181 PR middle-end/90648
17182 * genmatch.c (dt_node::gen_kids_1): Emit number of argument
17183 checks before matching calls.
17185 2020-02-05 Jakub Jelinek <jakub@redhat.com>
17187 * tree-ssa-alias.c (aliasing_matching_component_refs_p): Fix up
17188 function comment typo.
17190 PR middle-end/93555
17191 * omp-simd-clone.c (expand_simd_clones): If simd_clone_mangle or
17192 simd_clone_create failed when i == 0, adjust clone->nargs by
17195 2020-02-05 Martin Liska <mliska@suse.cz>
17198 * doc/invoke.texi: Document that one should
17199 not combine ASLR and -fpch.
17201 2020-02-04 Richard Biener <rguenther@suse.de>
17203 PR tree-optimization/93538
17204 * match.pd (addr EQ/NE ptr): Amend to handle &ptr->x EQ/NE ptr.
17206 2020-02-04 Richard Biener <rguenther@suse.de>
17208 PR tree-optimization/91123
17209 * tree-ssa-sccvn.c (vn_walk_cb_data::finish): New method.
17210 (vn_walk_cb_data::last_vuse): New member.
17211 (vn_walk_cb_data::saved_operands): Likewsie.
17212 (vn_walk_cb_data::~vn_walk_cb_data): Release saved_operands.
17213 (vn_walk_cb_data::push_partial_def): Use finish.
17214 (vn_reference_lookup_2): Update last_vuse and use finish if
17215 we've saved operands.
17216 (vn_reference_lookup_3): Use finish and update calls to
17217 push_partial_defs everywhere. When translating through
17218 memcpy or aggregate copies save off operands and alias-set.
17219 (eliminate_dom_walker::eliminate_stmt): Restore VN_WALKREWRITE
17220 operation for redundant store removal.
17222 2020-02-04 Richard Biener <rguenther@suse.de>
17224 PR tree-optimization/92819
17225 * tree-ssa-forwprop.c (simplify_vector_constructor): Avoid
17226 generating more stmts than before.
17228 2020-02-04 Martin Liska <mliska@suse.cz>
17230 * config/arm/arm.c (arm_gen_far_branch): Move the function
17231 outside of selftests.
17233 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
17235 * config/rs6000/rs6000.c (adjust_vec_address_pcrel): New helper
17236 function to adjust PC-relative vector addresses.
17237 (rs6000_adjust_vec_address): Call adjust_vec_address_pcrel to
17238 handle vectors with PC-relative addresses.
17240 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
17242 * config/rs6000/rs6000.c (reg_to_non_prefixed): Add forward
17244 (hard_reg_and_mode_to_addr_mask): Delete.
17245 (rs6000_adjust_vec_address): If the original vector address
17246 was REG+REG or REG+OFFSET and the element is not zero, do the add
17247 of the elements in the original address before adding the offset
17248 for the vector element. Use address_to_insn_form to validate the
17249 address using the register being loaded, rather than guessing
17250 whether the address is a DS-FORM or DQ-FORM address.
17252 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
17254 * config/rs6000/rs6000.c (get_vector_offset): New helper function
17255 to calculate the offset in memory from the start of a vector of a
17256 particular element. Add code to keep the element number in
17257 bounds if the element number is variable.
17258 (rs6000_adjust_vec_address): Move calculation of offset of the
17259 vector element to get_vector_offset.
17260 (rs6000_split_vec_extract_var): Do not do the initial AND of
17261 element here, move the code to get_vector_offset.
17263 2020-02-03 Michael Meissner <meissner@linux.ibm.com>
17265 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add some
17268 2020-02-03 Segher Boessenkool <segher@kernel.crashing.org>
17270 * config/rs6000/constraints.md: Improve documentation.
17272 2020-02-03 Richard Earnshaw <rearnsha@arm.com>
17275 * config/arm/t-arm: ($(srcdir)/config/arm/arm-tune.md)
17276 ($(srcdir)/config/arm/arm-tables.opt): Use move-if-change.
17278 2020-02-03 Andrew Stubbs <ams@codesourcery.com>
17280 * config.gcc: Remove "carrizo" support.
17281 * config/gcn/gcn-opts.h (processor_type): Likewise.
17282 * config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Likewise.
17283 * config/gcn/gcn.opt (gpu_type): Likewise.
17284 * config/gcn/t-omp-device: Likewise.
17286 2020-02-03 Stam Markianos-Wright <stam.markianos-wright@arm.com>
17289 * config/arm/arm-protos.h: New function arm_gen_far_branch prototype.
17290 * config/arm/arm.c (arm_gen_far_branch): New function
17291 arm_gen_far_branch.
17292 * config/arm/arm.md: Update b<cond> for Thumb2 range checks.
17294 2020-02-03 Julian Brown <julian@codesourcery.com>
17295 Tobias Burnus <tobias@codesourcery.com>
17297 * doc/invoke.texi: Update mention of OpenACC version to 2.6.
17299 2020-02-03 Jakub Jelinek <jakub@redhat.com>
17302 * config/s390/s390.md (popcounthi2_z196): Fix up expander to emit
17303 valid RTL to sum up the lowest and second lowest bytes of the popcnt
17306 2020-02-02 Vladimir Makarov <vmakarov@redhat.com>
17308 PR rtl-optimization/91333
17309 * ira-color.c (struct allocno_color_data): Add member
17311 (init_allocno_threads): Set the member up.
17312 (bucket_allocno_compare_func): Add compare hard reg
17315 2020-01-31 Sandra Loosemore <sandra@codesourcery.com>
17317 nios2: Support for GOT-relative DW_EH_PE_datarel encoding.
17319 * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION.
17320 * config.in: Regenerated.
17321 * configure: Regenerated.
17322 * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling
17323 for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION.
17324 (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New.
17326 2020-02-01 Andrew Burgess <andrew.burgess@embecosm.com>
17328 * configure: Regenerate.
17330 2020-01-31 Vladimir Makarov <vmakarov@redhat.com>
17332 PR rtl-optimization/91333
17333 * ira-color.c (bucket_allocno_compare_func): Move conflict hard
17334 reg preferences comparison up.
17336 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
17338 * config/aarch64/aarch64.h (TARGET_SVE_BF16): New macro.
17339 * config/aarch64/aarch64-sve-builtins-sve2.h (svcvtnt): Move to
17340 aarch64-sve-builtins-base.h.
17341 * config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtnt): Move to
17342 aarch64-sve-builtins-base.cc.
17343 * config/aarch64/aarch64-sve-builtins-base.h (svbfdot, svbfdot_lane)
17344 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
17345 (svcvtnt): Declare.
17346 * config/aarch64/aarch64-sve-builtins-base.cc (svbfdot, svbfdot_lane)
17347 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
17348 (svcvtnt): New functions.
17349 * config/aarch64/aarch64-sve-builtins-base.def (svbfdot, svbfdot_lane)
17350 (svbfmlalb, svbfmlalb_lane, svbfmlalt, svbfmlalt_lane, svbfmmla)
17351 (svcvtnt): New functions.
17352 (svcvt): Add a form that converts f32 to bf16.
17353 * config/aarch64/aarch64-sve-builtins-shapes.h (ternary_bfloat)
17354 (ternary_bfloat_lane, ternary_bfloat_lanex2, ternary_bfloat_opt_n):
17356 * config/aarch64/aarch64-sve-builtins-shapes.cc (parse_element_type):
17357 Treat B as bfloat16_t.
17358 (ternary_bfloat_lane_base): New class.
17359 (ternary_bfloat_def): Likewise.
17360 (ternary_bfloat): New shape.
17361 (ternary_bfloat_lane_def): New class.
17362 (ternary_bfloat_lane): New shape.
17363 (ternary_bfloat_lanex2_def): New class.
17364 (ternary_bfloat_lanex2): New shape.
17365 (ternary_bfloat_opt_n_def): New class.
17366 (ternary_bfloat_opt_n): New shape.
17367 * config/aarch64/aarch64-sve-builtins.cc (TYPES_cvt_bfloat): New macro.
17368 * config/aarch64/aarch64-sve.md (@aarch64_sve_<sve_fp_op>vnx4sf)
17369 (@aarch64_sve_<sve_fp_op>_lanevnx4sf): New patterns.
17370 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
17371 (@cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
17372 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>): Likewise.
17373 (@aarch64_sve_cvtnt<VNx8BF_ONLY:mode>): Likewise.
17374 * config/aarch64/aarch64-sve2.md (@aarch64_sve2_cvtnt<mode>): Key
17375 the pattern off the narrow mode instead of the wider one.
17376 * config/aarch64/iterators.md (VNx8BF_ONLY): New mode iterator.
17377 (UNSPEC_BFMLALB, UNSPEC_BFMLALT, UNSPEC_BFMMLA): New unspecs.
17378 (sve_fp_op): Handle them.
17379 (SVE_BFLOAT_TERNARY_LONG): New int itertor.
17380 (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
17382 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
17384 * config/aarch64/arm_sve.h: Include arm_bf16.h.
17385 * config/aarch64/aarch64-modes.def (BF): Move definition before
17386 VECTOR_MODES. Remove separate VECTOR_MODES for V4BF and V8BF.
17387 (SVE_MODES): Handle BF modes.
17388 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
17390 (aarch64_full_sve_mode): Likewise.
17391 * config/aarch64/iterators.md (SVE_STRUCT): Add VNx16BF, VNx24BF
17393 (SVE_FULL, SVE_FULL_HSD, SVE_ALL): Add VNx8BF.
17394 (Vetype, Vesize, Vctype, VEL, Vel, VEL_INT, V128, v128, vwcore)
17395 (V_INT_EQUIV, v_int_equiv, V_FP_EQUIV, v_fp_equiv, vector_count)
17396 (insn_length, VSINGLE, vsingle, VPRED, vpred, VDOUBLE): Handle the
17398 * config/aarch64/aarch64-sve-builtins.h (TYPE_bfloat): New
17400 * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_arith): New macro.
17401 (TYPES_all_data): Add bf16.
17402 (TYPES_reinterpret1, TYPES_reinterpret): Likewise.
17403 (register_tuple_type): Increase buffer size.
17404 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): New type.
17405 (bf16): New type suffix.
17406 * config/aarch64/aarch64-sve-builtins-base.def (svabd, svadd, svaddv)
17407 (svcmpeq, svcmpge, svcmpgt, svcmple, svcmplt, svcmpne, svmad, svmax)
17408 (svmaxv, svmin, svminv, svmla, svmls, svmsb, svmul, svsub, svsubr):
17409 Change type from all_data to all_arith.
17410 * config/aarch64/aarch64-sve-builtins-sve2.def (svaddp, svmaxp)
17411 (svminp): Likewise.
17413 2020-01-31 Dennis Zhang <dennis.zhang@arm.com>
17414 Matthew Malcomson <matthew.malcomson@arm.com>
17415 Richard Sandiford <richard.sandiford@arm.com>
17417 * doc/invoke.texi (f32mm): Document new AArch64 -march= extension.
17418 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Define
17419 __ARM_FEATURE_SVE_MATMUL_INT8, __ARM_FEATURE_SVE_MATMUL_FP32 and
17420 __ARM_FEATURE_SVE_MATMUL_FP64 as appropriate. Don't define
17421 __ARM_FEATURE_MATMUL_FP64.
17422 * config/aarch64/aarch64-option-extensions.def (fp, simd, fp16)
17423 (sve): Add AARCH64_FL_F32MM to the list of extensions that should
17424 be disabled at the same time.
17425 (f32mm): New extension.
17426 * config/aarch64/aarch64.h (AARCH64_FL_F32MM): New macro.
17427 (AARCH64_FL_F64MM): Bump to the next bit up.
17428 (AARCH64_ISA_F32MM, TARGET_SVE_I8MM, TARGET_F32MM, TARGET_SVE_F32MM)
17429 (TARGET_SVE_F64MM): New macros.
17430 * config/aarch64/iterators.md (SVE_MATMULF): New mode iterator.
17431 (UNSPEC_FMMLA, UNSPEC_SMATMUL, UNSPEC_UMATMUL, UNSPEC_USMATMUL)
17432 (UNSPEC_TRN1Q, UNSPEC_TRN2Q, UNSPEC_UZP1Q, UNSPEC_UZP2Q, UNSPEC_ZIP1Q)
17433 (UNSPEC_ZIP2Q): New unspeccs.
17434 (DOTPROD_US_ONLY, PERMUTEQ, MATMUL, FMMLA): New int iterators.
17435 (optab, sur, perm_insn): Handle the new unspecs.
17436 (sve_fp_op): Handle UNSPEC_FMMLA. Resort.
17437 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use
17438 TARGET_SVE_F64MM instead of separate tests.
17439 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod<vsi2qi>): New pattern.
17440 (@aarch64_<DOTPROD_US_ONLY:sur>dot_prod_lane<vsi2qi>): Likewise.
17441 (@aarch64_sve_add_<MATMUL:optab><vsi2qi>): Likewise.
17442 (@aarch64_sve_<FMMLA:sve_fp_op><mode>): Likewise.
17443 (@aarch64_sve_<PERMUTEQ:optab><mode>): Likewise.
17444 * config/aarch64/aarch64-sve-builtins.cc (TYPES_s_float): New macro.
17445 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): Use it.
17446 (TYPES_s_signed): New macro.
17447 (TYPES_s_integer): Use it.
17448 (TYPES_d_float): New macro.
17449 (TYPES_d_data): Use it.
17450 * config/aarch64/aarch64-sve-builtins-shapes.h (mmla): Declare.
17451 (ternary_intq_uintq_lane, ternary_intq_uintq_opt_n, ternary_uintq_intq)
17452 (ternary_uintq_intq_lane, ternary_uintq_intq_opt_n): Likewise.
17453 * config/aarch64/aarch64-sve-builtins-shapes.cc (mmla_def): New class.
17454 (svmmla): New shape.
17455 (ternary_resize2_opt_n_base): Add TYPE_CLASS2 and TYPE_CLASS3
17456 template parameters.
17457 (ternary_resize2_lane_base): Likewise.
17458 (ternary_resize2_base): New class.
17459 (ternary_qq_lane_base): Likewise.
17460 (ternary_intq_uintq_lane_def): Likewise.
17461 (ternary_intq_uintq_lane): New shape.
17462 (ternary_intq_uintq_opt_n_def): New class
17463 (ternary_intq_uintq_opt_n): New shape.
17464 (ternary_qq_lane_def): Inherit from ternary_qq_lane_base.
17465 (ternary_uintq_intq_def): New class.
17466 (ternary_uintq_intq): New shape.
17467 (ternary_uintq_intq_lane_def): New class.
17468 (ternary_uintq_intq_lane): New shape.
17469 (ternary_uintq_intq_opt_n_def): New class.
17470 (ternary_uintq_intq_opt_n): New shape.
17471 * config/aarch64/aarch64-sve-builtins-base.h (svmmla, svsudot)
17472 (svsudot_lane, svtrn1q, svtrn2q, svusdot, svusdot_lane, svusmmla)
17473 (svuzp1q, svuzp2q, svzip1q, svzip2q): Declare.
17474 * config/aarch64/aarch64-sve-builtins-base.cc (svdot_lane_impl):
17476 (svdotprod_lane_impl): ...this new class.
17477 (svmmla_impl, svusdot_impl): New classes.
17478 (svdot_lane): Update to use svdotprod_lane_impl.
17479 (svmmla, svsudot, svsudot_lane, svtrn1q, svtrn2q, svusdot)
17480 (svusdot_lane, svusmmla, svuzp1q, svuzp2q, svzip1q, svzip2q): New
17482 * config/aarch64/aarch64-sve-builtins-base.def (svmmla): New base
17483 function, with no types defined.
17484 (svmmla, svusmmla, svsudot, svsudot_lane, svusdot, svusdot_lane): New
17485 AARCH64_FL_I8MM functions.
17486 (svmmla): New AARCH64_FL_F32MM function.
17487 (svld1ro): Depend only on AARCH64_FL_F64MM, not on AARCH64_FL_V8_6.
17488 (svmmla, svtrn1q, svtrn2q, svuz1q, svuz2q, svzip1q, svzip2q): New
17489 AARCH64_FL_F64MM function.
17490 (REQUIRED_EXTENSIONS):
17492 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
17494 * config/gcn/gcn-valu.md (addv64di3_exec): Allow one '0' in each
17497 2020-01-31 Uroš Bizjak <ubizjak@gmail.com>
17499 * config/i386/i386.md (*movoi_internal_avx): Do not check for
17500 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL. Remove MODE_V8SF handling.
17501 (*movti_internal): Do not check for
17502 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
17503 (*movtf_internal): Move check for TARGET_SSE2 and size optimization
17504 just after check for TARGET_AVX.
17505 (*movdf_internal): Ditto.
17506 * config/i386/mmx.md (*mov<mode>_internal): Do not check for
17507 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL.
17508 * config/i386/sse.md (mov<mode>_internal): Only check
17509 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL with V2DFmode. Move check
17510 for TARGET_SSE2 and size optimization just after check for TARGET_AVX.
17511 (<sse>_andnot<mode>3<mask_name>): Move check for
17512 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL after check for TARGET_AVX.
17513 (<code><mode>3<mask_name>): Ditto.
17514 (*andnot<mode>3): Ditto.
17515 (*andnottf3): Ditto.
17516 (*<code><mode>3): Ditto.
17517 (*<code>tf3): Ditto.
17518 (*andnot<VI:mode>3): Remove
17519 TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL handling.
17520 (<mask_codefor><code><VI48_AVX_AVX512F:mode>3<mask_name>): Ditto.
17521 (*<code><VI12_AVX_AVX512F:mode>3): Ditto.
17522 (sse4_1_blendv<ssemodesuffix>): Ditto.
17523 * config/i386/x86-tune.def (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL):
17524 Explain that tune applies to 128bit instructions only.
17526 2020-01-31 Kwok Cheung Yeung <kcy@codesourcery.com>
17528 * config/gcn/mkoffload.c (process_asm): Add sgpr_count and vgpr_count
17529 to definition of hsa_kernel_description. Parse assembly to find SGPR
17530 and VGPR count of kernel and store in hsa_kernel_description.
17532 2020-01-31 Tamar Christina <tamar.christina@arm.com>
17534 PR rtl-optimization/91838
17535 * simplify-rtx.c (simplify_binary_operation_1): Update LSHIFTRT case
17536 to truncate if allowed or reject combination.
17538 2020-01-31 Andrew Stubbs <ams@codesourcery.com>
17540 * tree-ssa-loop-ivopts.c (get_iv): Use sizetype for zero-step.
17541 (find_inv_vars_cb): Likewise.
17543 2020-01-31 David Malcolm <dmalcolm@redhat.com>
17545 * calls.c (special_function_p): Split out the check for DECL_NAME
17546 being non-NULL and fndecl being extern at file scope into a
17547 new maybe_special_function_p and call it. Drop check for fndecl
17548 being non-NULL that was after a usage of DECL_NAME (fndecl).
17549 * tree.h (maybe_special_function_p): New inline function.
17551 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
17553 * config/gcn/gcn-valu.md (gather<mode>_exec): Move contents ...
17554 (mask_gather_load<mode>): ... here, and zero-initialize the
17556 (maskload<mode>di): Zero-initialize the destination.
17557 * config/gcn/gcn.c:
17559 2020-01-30 David Malcolm <dmalcolm@redhat.com>
17562 * doc/analyzer.texi (Limitations): Note that constraints on
17563 floating-point values are currently ignored.
17565 2020-01-30 Jakub Jelinek <jakub@redhat.com>
17568 * symtab.c (symtab_node::noninterposable_alias): If localalias
17569 already exists, but is not usable, append numbers after it until
17570 a unique name is found. Formatting fix.
17572 PR middle-end/93505
17573 * combine.c (simplify_comparison) <case ROTATE>: Punt on out of range
17576 2020-01-30 Andrew Stubbs <ams@codesourcery.com>
17578 * config/gcn/gcn.c (print_operand): Handle LTGT.
17579 * config/gcn/predicates.md (gcn_fp_compare_operator): Allow ltgt.
17581 2020-01-30 Richard Biener <rguenther@suse.de>
17583 * tree-pretty-print.c (dump_generic_node): Wrap VECTOR_CST
17584 and CONSTRUCTOR in _Literal (type) with TDF_GIMPLE.
17586 2020-01-30 John David Anglin <danglin@gcc.gnu.org>
17588 * config/pa/pa.c (pa_elf_select_rtx_section): Place function pointers
17589 without a DECL in .data.rel.ro.local.
17591 2020-01-30 Jakub Jelinek <jakub@redhat.com>
17594 * config/arm/arm.md (uaddvdi4): Actually emit what gen_uaddvsi4
17598 * config/i386/sse.md
17599 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext): Renamed to ...
17600 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): ... this. Use
17601 any_extend code iterator instead of always zero_extend.
17602 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_lt): Renamed to ...
17603 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): ... this.
17604 Use any_extend code iterator instead of always zero_extend.
17605 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_zext_shift): Renamed to ...
17606 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): ... this.
17607 Use any_extend code iterator instead of always zero_extend.
17608 (*sse2_pmovmskb_ext): New define_insn.
17609 (*sse2_pmovmskb_ext_lt): New define_insn_and_split.
17612 * config/i386/i386.md (*popcountsi2_zext): New define_insn_and_split.
17613 (*popcountsi2_zext_falsedep): New define_insn.
17615 2020-01-30 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
17617 * config.in: Regenerated.
17618 * configure: Regenerated.
17620 2020-01-29 Tobias Burnus <tobias@codesourcery.com>
17623 * config/gcn/gcn-hsa.h (ASM_SPEC): Add -mattr=-code-object-v3 as
17624 LLVM's assembler changed the default in version 9.
17626 2020-01-24 Jeff Law <law@redhat.com>
17628 PR tree-optimization/89689
17629 * builtins.def (BUILT_IN_OBJECT_SIZE): Make it const rather than pure.
17631 2020-01-29 Richard Sandiford <richard.sandiford@arm.com>
17635 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17637 PR rtl-optimization/87763
17638 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
17639 simplification to handle subregs as well as bare regs.
17640 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
17642 2020-01-29 Joel Hutton <Joel.Hutton@arm.com>
17645 * ira.c (ira): Revert use of simplified LRA algorithm.
17647 2020-01-29 Martin Jambor <mjambor@suse.cz>
17649 PR tree-optimization/92706
17650 * tree-sra.c (struct access): Fields first_link, last_link,
17651 next_queued and grp_queued renamed to first_rhs_link, last_rhs_link,
17652 next_rhs_queued and grp_rhs_queued respectively, new fields
17653 first_lhs_link, last_lhs_link, next_lhs_queued and grp_lhs_queued.
17654 (struct assign_link): Field next renamed to next_rhs, new field
17655 next_lhs. Updated comment.
17656 (work_queue_head): Renamed to rhs_work_queue_head.
17657 (lhs_work_queue_head): New variable.
17658 (add_link_to_lhs): New function.
17659 (relink_to_new_repr): Also relink LHS lists.
17660 (add_access_to_work_queue): Renamed to add_access_to_rhs_work_queue.
17661 (add_access_to_lhs_work_queue): New function.
17662 (pop_access_from_work_queue): Renamed to
17663 pop_access_from_rhs_work_queue.
17664 (pop_access_from_lhs_work_queue): New function.
17665 (build_accesses_from_assign): Also add links to LHS lists and to LHS
17667 (child_would_conflict_in_lacc): Renamed to
17668 child_would_conflict_in_acc. Adjusted parameter names.
17669 (create_artificial_child_access): New parameter set_grp_read, use it.
17670 (subtree_mark_written_and_enqueue): Renamed to
17671 subtree_mark_written_and_rhs_enqueue.
17672 (propagate_subaccesses_across_link): Renamed to
17673 propagate_subaccesses_from_rhs.
17674 (propagate_subaccesses_from_lhs): New function.
17675 (propagate_all_subaccesses): Also propagate subaccesses from LHSs to
17678 2020-01-29 Martin Jambor <mjambor@suse.cz>
17680 PR tree-optimization/92706
17681 * tree-sra.c (struct access): Adjust comment of
17682 grp_total_scalarization.
17683 (find_access_in_subtree): Look for single children spanning an entire
17685 (scalarizable_type_p): Allow register accesses, adjust callers.
17686 (completely_scalarize): Remove function.
17687 (scalarize_elem): Likewise.
17688 (create_total_scalarization_access): Likewise.
17689 (sort_and_splice_var_accesses): Do not track total scalarization
17691 (analyze_access_subtree): New parameter totally, adjust to new meaning
17692 of grp_total_scalarization.
17693 (analyze_access_trees): Pass new parameter to analyze_access_subtree.
17694 (can_totally_scalarize_forest_p): New function.
17695 (create_total_scalarization_access): Likewise.
17696 (create_total_access_and_reshape): Likewise.
17697 (total_should_skip_creating_access): Likewise.
17698 (totally_scalarize_subtree): Likewise.
17699 (analyze_all_variable_accesses): Perform total scalarization after
17700 subaccess propagation using the new functions above.
17701 (initialize_constant_pool_replacements): Output initializers by
17702 traversing the access tree.
17704 2020-01-29 Martin Jambor <mjambor@suse.cz>
17706 * tree-sra.c (verify_sra_access_forest): New function.
17707 (verify_all_sra_access_forests): Likewise.
17708 (create_artificial_child_access): Set parent.
17709 (analyze_all_variable_accesses): Call the verifier.
17711 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17713 * cgraph.c (cgraph_edge::resolve_speculation): Only lookup direct edge
17714 if called on indirect edge.
17715 (cgraph_edge::redirect_call_stmt_to_callee): Lookup indirect edge of
17716 speculative call if needed.
17718 2020-01-29 Richard Biener <rguenther@suse.de>
17720 PR tree-optimization/93428
17721 * tree-vect-slp.c (vect_build_slp_tree_2): Compute the load
17722 permutation when the load node is created.
17723 (vect_analyze_slp_instance): Re-use it here.
17725 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17727 * ipa-prop.c (update_indirect_edges_after_inlining): Fix warning.
17729 2020-01-28 Vladimir Makarov <vmakarov@redhat.com>
17731 PR rtl-optimization/93272
17732 * ira-lives.c (process_out_of_region_eh_regs): New function.
17733 (process_bb_node_lives): Call it.
17735 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17737 * coverage.c (read_counts_file): Make error message lowercase.
17739 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17741 * profile-count.c (profile_quality_display_names): Fix ordering.
17743 2020-01-28 Jan Hubicka <hubicka@ucw.cz>
17746 * cgraph.c (cgraph_add_edge_to_call_site_hash): Update call site
17747 hash only when edge is first within the sequence.
17748 (cgraph_edge::set_call_stmt): Update handling of speculative calls.
17749 (symbol_table::create_edge): Do not set target_prob.
17750 (cgraph_edge::remove_caller): Watch for speculative calls when updating
17751 the call site hash.
17752 (cgraph_edge::make_speculative): Drop target_prob parameter.
17753 (cgraph_edge::speculative_call_info): Remove.
17754 (cgraph_edge::first_speculative_call_target): New member function.
17755 (update_call_stmt_hash_for_removing_direct_edge): New function.
17756 (cgraph_edge::resolve_speculation): Rewrite to new API.
17757 (cgraph_edge::speculative_call_for_target): New member function.
17758 (cgraph_edge::make_direct): Rewrite to new API; fix handling of
17759 multiple speculation targets.
17760 (cgraph_edge::redirect_call_stmt_to_callee): Likewise; fix updating
17762 (verify_speculative_call): Verify that targets form an interval.
17763 * cgraph.h (cgraph_edge::speculative_call_info): Remove.
17764 (cgraph_edge::first_speculative_call_target): New member function.
17765 (cgraph_edge::next_speculative_call_target): New member function.
17766 (cgraph_edge::speculative_call_target_ref): New member function.
17767 (cgraph_edge;:speculative_call_indirect_edge): New member funtion.
17768 (cgraph_edge): Remove target_prob.
17769 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
17770 Fix handling of speculative calls.
17771 * ipa-devirt.c (ipa_devirt): Fix handling of speculative cals.
17772 * ipa-fnsummary.c (analyze_function_body): Likewise.
17773 * ipa-inline.c (speculation_useful_p): Use new speculative call API.
17774 * ipa-profile.c (dump_histogram): Fix formating.
17775 (ipa_profile_generate_summary): Watch for overflows.
17776 (ipa_profile): Do not require probablity to be 1/2; update to new API.
17777 * ipa-prop.c (ipa_make_edge_direct_to_target): Update to new API.
17778 (update_indirect_edges_after_inlining): Update to new API.
17779 * ipa-utils.c (ipa_merge_profiles): Rewrite merging of speculative call
17781 * profile-count.h: (profile_probability::adjusted): New.
17782 * tree-inline.c (copy_bb): Update to new speculative call API; fix
17783 updating of profile.
17784 * value-prof.c (gimple_ic_transform): Rename to ...
17785 (dump_ic_profile): ... this one; update dumping.
17786 (stream_in_histogram_value): Fix formating.
17787 (gimple_value_profile_transformations): Update.
17789 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17792 * config/i386/i386.md (*movoi_internal_avx): Remove
17793 TARGET_SSE_TYPELESS_STORES check.
17794 (*movti_internal): Prefer TARGET_AVX over
17795 TARGET_SSE_TYPELESS_STORES.
17796 (*movtf_internal): Likewise.
17797 * config/i386/sse.md (mov<mode>_internal): Prefer TARGET_AVX over
17798 TARGET_SSE_TYPELESS_STORES. Remove "<MODE_SIZE> == 16" check
17799 from TARGET_SSE_TYPELESS_STORES.
17801 2020-01-28 David Malcolm <dmalcolm@redhat.com>
17803 * diagnostic-core.h (warning_at): Rename overload to...
17804 (warning_meta): ...this.
17805 (emit_diagnostic_valist): Delete decl of overload taking
17806 diagnostic_metadata.
17807 * diagnostic.c (emit_diagnostic_valist): Likewise for defn.
17808 (warning_at): Rename overload taking diagnostic_metadata to...
17809 (warning_meta): ...this.
17811 2020-01-28 Richard Biener <rguenther@suse.de>
17813 PR tree-optimization/93439
17814 * tree-parloops.c (create_loop_fn): Move clique bookkeeping...
17815 * tree-cfg.c (move_sese_region_to_fn): ... here.
17816 (verify_types_in_gimple_reference): Verify used cliques are
17819 2020-01-28 H.J. Lu <hongjiu.lu@intel.com>
17822 * config/i386/i386-options.c (set_ix86_tune_features): Add an
17823 argument of a pointer to struct gcc_options and pass it to
17824 parse_mtune_ctrl_str.
17825 (ix86_function_specific_restore): Pass opts to
17826 set_ix86_tune_features.
17827 (ix86_option_override_internal): Likewise.
17828 (parse_mtune_ctrl_str): Add an argument of a pointer to struct
17829 gcc_options and use it for x_ix86_tune_ctrl_string.
17831 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17833 PR rtl-optimization/87763
17834 * simplify-rtx.c (simplify_truncation): Extend sign/zero_extract
17835 simplification to handle subregs as well as bare regs.
17836 * config/i386/i386.md (*testqi_ext_3): Match QI extracts too.
17838 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17840 * tree-vect-loop.c (vectorizable_reduction): Fail gracefully
17841 for reduction chains that (now) include a call.
17843 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17845 PR tree-optimization/92822
17846 * tree-ssa-forwprop.c (simplify_vector_constructor): When filling
17847 out the don't-care elements of a vector whose significant elements
17848 are duplicates, make the don't-care elements duplicates too.
17850 2020-01-28 Richard Sandiford <richard.sandiford@arm.com>
17852 PR tree-optimization/93434
17853 * tree-predcom.c (split_data_refs_to_components): Record which
17854 components have had aliasing loads removed. Prevent store-store
17855 commoning for all such components.
17857 2020-01-28 Jakub Jelinek <jakub@redhat.com>
17860 * config/i386/i386.c (ix86_fold_builtin) <do_shift>: If mask is not
17861 -1 or is_vshift is true, use new_vector with number of elts npatterns
17862 rather than new_unary_operation.
17864 PR tree-optimization/93454
17865 * gimple-fold.c (fold_array_ctor_reference): Perform
17866 elt_size.to_uhwi () just once, instead of calling it in every
17867 iteration. Punt if that value is above size of the temporary
17868 buffer. Decrease third native_encode_expr argument when
17869 bufoff + elt_sz is above size of buf.
17871 2020-01-27 Joseph Myers <joseph@codesourcery.com>
17873 * config/mips/mips.c (mips_declare_object_name)
17874 [USE_GNU_UNIQUE_OBJECT]: Support use of gnu_unique_object.
17876 2020-01-27 Martin Liska <mliska@suse.cz>
17878 PR gcov-profile/93403
17879 * tree-profile.c (gimple_init_gcov_profiler): Generate
17880 both __gcov_indirect_call_profiler_v4 and
17881 __gcov_indirect_call_profiler_v4_atomic.
17883 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17886 * config/aarch64/aarch64-simd.md (aarch64_get_half<mode>): New
17888 (@aarch64_split_simd_mov<mode>): Use it.
17889 (aarch64_simd_mov_from_<mode>low): Add a GPR alternative.
17890 Leave the vec_extract patterns to handle 2-element vectors.
17891 (aarch64_simd_mov_from_<mode>high): Likewise.
17892 (vec_extract<VQMOV_NO2E:mode><Vhalf>): New expander.
17893 (vec_extractv2dfv1df): Likewise.
17895 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17897 * config/aarch64/aarch64.c (aarch64_if_then_else_costs): Match
17898 jump conditions for *compare_condjump<GPI:mode>.
17900 2020-01-27 David Malcolm <dmalcolm@redhat.com>
17903 * digraph.cc (test_edge::test_edge): Specify template for base
17906 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17908 * config/arc/arc.c (arc_rtx_costs): Update mul64 cost.
17910 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17912 * config/arc/arc-protos.h (gen_mlo): Remove.
17913 (gen_mhi): Likewise.
17914 * config/arc/arc.c (AUX_MULHI): Define.
17915 (arc_must_save_reister): Special handling for r58/59.
17916 (arc_compute_frame_size): Consider mlo/mhi registers.
17917 (arc_save_callee_saves): Emit fp/sp move only when emit_move
17919 (arc_conditional_register_usage): Remove TARGET_BIG_ENDIAN from
17920 mlo/mhi name selection.
17921 (arc_restore_callee_saves): Don't early restore blink when ISR.
17922 (arc_expand_prologue): Add mlo/mhi saving.
17923 (arc_expand_epilogue): Add mlo/mhi restoring.
17926 * config/arc/arc.h (DBX_REGISTER_NUMBER): Correct register
17927 numbering when MUL64 option is used.
17928 (DWARF2_FRAME_REG_OUT): Define.
17929 * config/arc/arc.md (arc600_stall): New pattern.
17930 (VUNSPEC_ARC_ARC600_STALL): Define.
17931 (mulsi64): Use correct mlo/mhi registers.
17932 (mulsi_600): Clean it up.
17933 * config/arc/predicates.md (mlo_operand): Remove any dependency on
17935 (mhi_operand): Likewise.
17937 2020-01-27 Claudiu Zissulescu <claziss@synopsys.com>
17938 Petro Karashchenko <petro.karashchenko@ring.com>
17940 * config/arc/arc.c (arc_is_uncached_mem_p): Check struct
17941 attributes if needed.
17942 (prepare_move_operands): Generate special unspec instruction for
17944 (arc_isuncached_mem_p): Propagate uncached attribute to each
17946 * config/arc/arc.md (VUNSPEC_ARC_LDDI): Define.
17947 (VUNSPEC_ARC_STDI): Likewise.
17948 (ALLI): New mode iterator.
17949 (mALLI): New mode attribute.
17950 (lddi): New instruction pattern.
17952 (stdidi_split): Split instruction for architectures which are not
17953 supporting ll64 option.
17954 (lddidi_split): Likewise.
17956 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17958 PR rtl-optimization/92989
17959 * lra-lives.c (process_bb_lives): Update the live-in set before
17960 processing additional clobbers.
17962 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17964 PR rtl-optimization/93170
17965 * cselib.c (cselib_invalidate_regno_val): New function, split out
17967 (cselib_invalidate_regno): ...here.
17968 (cselib_invalidated_by_call_p): New function.
17969 (cselib_process_insn): Iterate over all the hard-register entries in
17970 REG_VALUES and invalidate any that cross call-clobbered registers.
17972 2020-01-27 Richard Sandiford <richard.sandiford@arm.com>
17974 * dojump.c (split_comparison): Use HONOR_NANS rather than
17975 HONOR_SNANS when splitting LTGT.
17977 2020-01-27 Martin Liska <mliska@suse.cz>
17980 * opts.c (print_filtered_help): Exclude language-specific
17981 options from --help=common unless enabled in all FEs.
17983 2020-01-27 Martin Liska <mliska@suse.cz>
17985 * opts.c (print_help): Exclude params from
17986 all except --help=param.
17988 2020-01-27 Martin Liska <mliska@suse.cz>
17991 * config/i386/i386-features.c (make_resolver_func):
17992 Align the code with ppc64 target implementation.
17993 Do not generate a unique name for resolver function.
17995 2020-01-27 Richard Biener <rguenther@suse.de>
17997 PR tree-optimization/93397
17998 * tree-vect-slp.c (vect_analyze_slp_instance): Delay
17999 converted reduction chain SLP graph adjustment.
18001 2020-01-26 Marek Polacek <polacek@redhat.com>
18004 * sanopt.c (sanitize_rewrite_addressable_params): Avoid crash on
18007 2020-01-26 Jason Merrill <jason@redhat.com>
18010 * tree.c (verify_type_variant): Only verify TYPE_NEEDS_CONSTRUCTING
18013 2020-01-26 Darius Galis <darius.galis@cyberthorstudios.com>
18015 * config/rx/rx.md (setmemsi): Added rx_allow_string_insns constraint
18016 (rx_setmem): Likewise.
18018 2020-01-26 Jakub Jelinek <jakub@redhat.com>
18021 * config/i386/i386.md (*addv<dwi>4_doubleword, *subv<dwi>4_doubleword):
18022 Use nonimmediate_operand instead of x86_64_hilo_general_operand and
18023 drop <di> from constraint of last operand.
18026 * config/i386/sse.md (*avx_vperm_broadcast_<mode>): Disallow for
18027 TARGET_AVX2 and V4DFmode not in the split condition, but in the
18028 pattern condition, though allow { 0, 0, 0, 0 } broadcast always.
18030 2020-01-25 Feng Xue <fxue@os.amperecomputing.com>
18033 * ipa-cp.c (get_info_about_necessary_edges): Remove value
18036 2020-01-24 Jeff Law <law@redhat.com>
18038 PR tree-optimization/92788
18039 * tree-ssa-threadedge.c (thread_across_edge): Check EDGE_COMPLEX
18042 2020-01-24 Jakub Jelinek <jakub@redhat.com>
18045 * config/i386/sse.md (*avx_vperm_broadcast_v4sf,
18046 *avx_vperm_broadcast_<mode>,
18047 <sse2_avx_avx512f>_vpermil<mode><mask_name>,
18048 *<sse2_avx_avx512f>_vpermilp<mode><mask_name>):
18049 Move before avx2_perm<mode>/avx512f_perm<mode>.
18052 * simplify-rtx.c (simplify_const_unary_operation,
18053 simplify_const_binary_operation): Punt for mode precision above
18054 MAX_BITSIZE_MODE_ANY_INT.
18056 2020-01-24 Andrew Pinski <apinski@marvell.com>
18058 * config/arm/aarch-cost-tables.h (cortexa57_extra_costs): Change
18059 alu.shift_reg to 0.
18061 2020-01-24 Jeff Law <law@redhat.com>
18064 * config/h8300/h8300.c (h8300_print_operand): Only call byte_reg
18065 for REGs. Call output_operand_lossage to get more reasonable
18068 2020-01-24 Andrew Stubbs <ams@codesourcery.com>
18070 * config/gcn/gcn-valu.md (vec_cmp<mode>di): Use
18071 gcn_fp_compare_operator.
18072 (vec_cmpu<mode>di): Use gcn_compare_operator.
18073 (vec_cmp<u>v64qidi): Use gcn_compare_operator.
18074 (vec_cmp<mode>di_exec): Use gcn_fp_compare_operator.
18075 (vec_cmpu<mode>di_exec): Use gcn_compare_operator.
18076 (vec_cmp<u>v64qidi_exec): Use gcn_compare_operator.
18077 (vec_cmp<mode>di_dup): Use gcn_fp_compare_operator.
18078 (vec_cmp<mode>di_dup_exec): Use gcn_fp_compare_operator.
18079 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): Use
18080 gcn_fp_compare_operator.
18081 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): Use
18082 gcn_fp_compare_operator.
18083 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): Use
18084 gcn_fp_compare_operator.
18085 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): Use
18086 gcn_fp_compare_operator.
18088 2020-01-24 Maciej W. Rozycki <macro@wdc.com>
18090 * doc/install.texi (Cross-Compiler-Specific Options): Document
18091 `--with-toolexeclibdir' option.
18093 2020-01-24 Hans-Peter Nilsson <hp@axis.com>
18095 * target.def (flags_regnum): Also mention effect on delay slot filling.
18096 * doc/tm.texi: Regenerate.
18098 2020-01-23 Jeff Law <law@redhat.com>
18100 PR translation/90162
18101 * config/h8300/h8300.c (h8300_option_override): Fix diagnostic text.
18103 2020-01-23 Mikael Tillenius <mti-1@tillenius.com>
18106 * config/h8300/h8300.h (FUNCTION_PROFILER): Fix emission of
18109 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18111 PR rtl-optimization/93402
18112 * postreload.c (reload_combine_recognize_pattern): Don't try to adjust
18115 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18117 * config.in: Regenerated.
18118 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1
18119 for TARGET_LIBC_GNUSTACK.
18120 * configure: Regenerated.
18121 * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is
18122 found to be 2.31 or greater.
18124 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com>
18126 * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to
18128 * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ...
18129 (mips_asm_file_end): New function. Delegate to
18130 file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true.
18131 * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0.
18133 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18136 * config/i386/i386-modes.def (POImode): New mode.
18137 (MAX_BITSIZE_MODE_ANY_INT): Change from 128 to 160.
18138 * config/i386/i386.md (DPWI): New mode attribute.
18139 (addv<mode>4, subv<mode>4): Use <DPWI> instead of <DWI>.
18140 (QWI): Rename to...
18141 (QPWI): ... this. Use POI instead of OI for TImode.
18142 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1,
18143 *subv<dwi>4_doubleword, *subv<dwi>4_doubleword_1): Use <QPWI>
18146 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18149 * config/aarch64/aarch64.md (UNSPEC_SPECULATION_TRACKER_REV): New
18151 (speculation_tracker_rev): New pattern.
18152 * config/aarch64/aarch64-speculation.cc (aarch64_do_track_speculation):
18153 Use speculation_tracker_rev to track the inverse condition.
18155 2020-01-23 Richard Biener <rguenther@suse.de>
18157 PR tree-optimization/93381
18158 * tree-ssa-sccvn.c (vn_walk_cb_data::push_partial_def): Take
18159 alias-set of the def as argument and record the first one.
18160 (vn_walk_cb_data::first_set): New member.
18161 (vn_reference_lookup_3): Pass the alias-set of the current def
18162 to push_partial_def. Fix alias-set used in the aggregate copy
18164 (vn_reference_lookup): Consistently set *last_vuse_ptr.
18165 * real.c (clear_significand_below): Fix out-of-bound access.
18167 2020-01-23 Jakub Jelinek <jakub@redhat.com>
18170 * config/i386/i386.md (*bmi2_bzhi_<mode>3_2, *bmi2_bzhi_<mode>3_3):
18171 New define_insn patterns.
18173 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18175 * doc/sourcebuild.texi (check-function-bodies): Add an
18176 optional target/xfail selector.
18178 2020-01-23 Richard Sandiford <richard.sandiford@arm.com>
18180 PR rtl-optimization/93124
18181 * auto-inc-dec.c (merge_in_block): Don't add auto inc/decs to
18182 bare USE and CLOBBER insns.
18184 2020-01-22 Andrew Pinski <apinski@marvell.com>
18186 * config/arc/arc.c (output_short_suffix): Check insn for nullness.
18188 2020-01-22 David Malcolm <dmalcolm@redhat.com>
18191 * gdbinit.in (break-on-saved-diagnostic): Update for move of
18192 diagnostic_manager into "ana" namespace.
18193 * selftest-run-tests.c (selftest::run_tests): Update for move of
18194 selftest::run_analyzer_selftests to
18195 ana::selftest::run_analyzer_selftests.
18197 2020-01-22 Richard Sandiford <richard.sandiford@arm.com>
18199 * cfgexpand.c (union_stack_vars): Update the size.
18201 2020-01-22 Richard Biener <rguenther@suse.de>
18203 PR tree-optimization/93381
18204 * tree-ssa-structalias.c (find_func_aliases): Assume offsetting
18205 throughout, handle all conversions the same.
18207 2020-01-22 Jakub Jelinek <jakub@redhat.com>
18210 * config/aarch64/aarch64.c (aarch64_expand_subvti): Only use
18211 gen_subdi3_compare1_imm if low_in2 satisfies aarch64_plus_immediate
18212 predicate, not whenever it is CONST_INT. Otherwise, force_reg it.
18213 Call force_reg on high_in2 unconditionally.
18215 2020-01-22 Martin Liska <mliska@suse.cz>
18217 PR tree-optimization/92924
18218 * profile.c (compute_value_histograms): Divide
18219 all counter values.
18221 2020-01-22 Jakub Jelinek <jakub@redhat.com>
18224 * output.h (assemble_name_resolve): Declare.
18225 * varasm.c (assemble_name_resolve): New function.
18226 (assemble_name): Use it.
18227 * config/i386/i386.h (ASM_OUTPUT_SYMBOL_REF): Define.
18229 2020-01-22 Joseph Myers <joseph@codesourcery.com>
18231 * doc/sourcebuild.texi (Texinfo Manuals, Front End): Refer to
18232 update_web_docs_git instead of update_web_docs_svn.
18234 2020-01-21 Andrew Pinski <apinski@marvell.com>
18237 * config/aarch64/aarch64.md (tlsgd_small_<mode>): Have operand 0
18238 as PTR mode. Have operand 1 as being modeless, it can be P mode.
18239 (*tlsgd_small_<mode>): Likewise.
18240 * config/aarch64/aarch64.c (aarch64_load_symref_appropriately)
18241 <case SYMBOL_SMALL_TLSGD>: Call gen_tlsgd_small_* with a ptr_mode
18242 register. Convert that register back to dest using convert_mode.
18244 2020-01-21 Jim Wilson <jimw@sifive.com>
18246 * config/riscv/riscv-sr.c (riscv_sr_match_prologue): Use INTVAL
18249 2020-01-21 H.J. Lu <hongjiu.lu@intel.com>
18250 Uros Bizjak <ubizjak@gmail.com>
18253 * config/i386/i386.c (ix86_tls_module_base): Replace Pmode
18255 (legitimize_tls_address): Do GNU2 TLS address computation in
18256 ptr_mode and zero-extend result to Pmode.
18257 * config/i386/i386.md (@tls_dynamic_gnu2_64_<mode>): Replace
18258 :P with :PTR and Pmode with ptr_mode.
18259 (*tls_dynamic_gnu2_lea_64_<mode>): Likewise.
18260 (*tls_dynamic_gnu2_call_64_<mode>): Likewise.
18261 (*tls_dynamic_gnu2_combine_64_<mode>): Likewise.
18263 2020-01-21 Jakub Jelinek <jakub@redhat.com>
18266 * config/riscv/riscv.c (riscv_rtx_costs) <case ZERO_EXTRACT>: Verify
18267 the last two operands are CONST_INT_P before using them as such.
18269 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
18271 * config/aarch64/aarch64-sve-builtins.def: Use get_typenode_from_name
18272 to get the integer element types.
18274 2020-01-21 Richard Sandiford <richard.sandiford@arm.com>
18276 * config/aarch64/aarch64-sve-builtins.h
18277 (function_expander::convert_to_pmode): Declare.
18278 * config/aarch64/aarch64-sve-builtins.cc
18279 (function_expander::convert_to_pmode): New function.
18280 (function_expander::get_contiguous_base): Use it.
18281 (function_expander::prepare_gather_address_operands): Likewise.
18282 * config/aarch64/aarch64-sve-builtins-sve2.cc
18283 (svwhilerw_svwhilewr_impl::expand): Likewise.
18285 2020-01-21 Szabolcs Nagy <szabolcs.nagy@arm.com>
18288 * config/aarch64/aarch64.c (aarch64_declare_function_name): Set
18289 cfun->machine->label_is_assembled.
18290 (aarch64_print_patchable_function_entry): New.
18291 (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY): Define.
18292 * config/aarch64/aarch64.h (struct machine_function): New field,
18293 label_is_assembled.
18295 2020-01-21 David Malcolm <dmalcolm@redhat.com>
18298 * ipa-profile.c (ipa_profile): Delete call_sums and set it to
18301 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
18304 * cgraph.c (cgraph_edge::resolve_speculation,
18305 cgraph_edge::redirect_call_stmt_to_callee): Fix update of
18306 call_stmt_site_hash.
18308 2020-01-21 Martin Liska <mliska@suse.cz>
18310 * config/rs6000/rs6000.c (common_mode_defined): Remove
18313 2020-01-21 Richard Biener <rguenther@suse.de>
18315 PR tree-optimization/92328
18316 * tree-ssa-sccvn.c (vn_reference_lookup_3): Preserve
18317 type when value-numbering same-sized store by inserting a
18319 (eliminate_dom_walker::eliminate_stmt): When eliminating
18320 a redundant store handle bit-reinterpretation of the same value.
18322 2020-01-21 Andrew Pinski <apinski@marvel.com>
18325 * tree-into-ssa.c (prepare_block_for_update_1): Split out
18327 (prepare_block_for_update): This. Use a worklist instead of
18330 2020-01-21 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18332 * config/arm/arm.c (clear_operation_p):
18333 Initialise last_regno, skip first iteration
18334 based on the first_set value and use ints instead
18335 of the unnecessary HOST_WIDE_INTs.
18337 2020-01-21 Jakub Jelinek <jakub@redhat.com>
18340 * config/rs6000/rs6000.c (rs6000_emit_cmove): If using fsel, punt for
18341 compare_mode other than SFmode or DFmode.
18343 2020-01-21 Kito Cheng <kito.cheng@sifive.com>
18346 * config/riscv/riscv-protos.h (riscv_hard_regno_rename_ok): New.
18347 * config/riscv/riscv.c (riscv_hard_regno_rename_ok): New.
18348 * config/riscv/riscv.h (HARD_REGNO_RENAME_OK): Defined.
18350 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
18352 * config/aarch64/aarch64.c (neoversen1_tunings): Set jump_align to 4.
18354 2020-01-20 Andrew Pinski <apinski@marvell.com>
18356 PR middle-end/93242
18357 * targhooks.c (default_print_patchable_function_entry): Use
18358 output_asm_insn to emit the nop instruction.
18360 2020-01-20 Fangrui Song <maskray@google.com>
18362 PR middle-end/93194
18363 * targhooks.c (default_print_patchable_function_entry): Align to
18366 2020-01-20 H.J. Lu <hongjiu.lu@intel.com>
18369 * config/i386/i386.c (legitimize_tls_address): Pass Pmode to
18370 gen_tls_dynamic_gnu2_64. Compute GNU2 TLS address in ptr_mode.
18371 * config/i386/i386.md (tls_dynamic_gnu2_64): Renamed to ...
18372 (@tls_dynamic_gnu2_64_<mode>): This. Replace DI with P.
18373 (*tls_dynamic_gnu2_lea_64): Renamed to ...
18374 (*tls_dynamic_gnu2_lea_64_<mode>): This. Replace DI with P.
18375 Remove the {q} suffix from lea.
18376 (*tls_dynamic_gnu2_call_64): Renamed to ...
18377 (*tls_dynamic_gnu2_call_64_<mode>): This. Replace DI with P.
18378 (*tls_dynamic_gnu2_combine_64): Renamed to ...
18379 (*tls_dynamic_gnu2_combine_64_<mode>): This. Replace DI with P.
18380 Pass Pmode to gen_tls_dynamic_gnu2_64.
18382 2020-01-20 Wilco Dijkstra <wdijkstr@arm.com>
18384 * config/aarch64/aarch64.h (SLOW_BYTE_ACCESS): Set to 1.
18386 2020-01-20 Richard Sandiford <richard.sandiford@arm.com>
18388 * config/aarch64/aarch64-sve-builtins-base.cc
18389 (svld1ro_impl::memory_vector_mode): Remove parameter name.
18391 2020-01-20 Richard Biener <rguenther@suse.de>
18394 * dwarf2out.c (prune_unused_types): Unconditionally mark
18395 called function DIEs.
18397 2020-01-20 Martin Liska <mliska@suse.cz>
18399 PR tree-optimization/93199
18400 * tree-eh.c (struct leh_state): Add
18401 new field outer_non_cleanup.
18402 (cleanup_is_dead_in): Pass leh_state instead
18403 of eh_region. Add a checking that state->outer_non_cleanup
18404 points to outer non-clean up region.
18405 (lower_try_finally): Record outer_non_cleanup
18407 (lower_catch): Likewise.
18408 (lower_eh_filter): Likewise.
18409 (lower_eh_must_not_throw): Likewise.
18410 (lower_cleanup): Likewise.
18412 2020-01-20 Richard Biener <rguenther@suse.de>
18414 PR tree-optimization/93094
18415 * tree-vectorizer.h (vect_loop_versioning): Adjust.
18416 (vect_transform_loop): Likewise.
18417 * tree-vectorizer.c (try_vectorize_loop_1): Pass down
18418 loop_vectorized_call to vect_transform_loop.
18419 * tree-vect-loop.c (vect_transform_loop): Pass down
18420 loop_vectorized_call to vect_loop_versioning.
18421 * tree-vect-loop-manip.c (vect_loop_versioning): Use
18422 the earlier discovered loop_vectorized_call.
18424 2020-01-19 Eric S. Raymond <esr@thyrsus.com>
18426 * doc/contribute.texi: Update for SVN -> Git transition.
18427 * doc/install.texi: Likewise.
18429 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
18432 * cgraph.c (cgraph_edge::make_speculative): Increase number of
18433 speculative targets.
18434 (verify_speculative_call): New function
18435 (cgraph_node::verify_node): Use it.
18436 * ipa-profile.c (ipa_profile): Fix formating; do not set number of
18439 2020-01-18 Jan Hubicka <hubicka@ucw.cz>
18442 * cgraph.c (cgraph_edge::resolve_speculation): Fix foramting.
18443 (cgraph_edge::make_direct): Remove all indirect targets.
18444 (cgraph_edge::redirect_call_stmt_to_callee): Use make_direct..
18445 (cgraph_node::verify_node): Verify that only one call_stmt or
18446 lto_stmt_uid is set.
18447 * cgraphclones.c (cgraph_edge::clone): Set only one call_stmt or
18449 * lto-cgraph.c (lto_output_edge): Simplify streaming of stmt.
18450 (lto_output_ref): Simplify streaming of stmt.
18451 * lto-streamer-in.c (fixup_call_stmt_edges_1): Clear lto_stmt_uid.
18453 2020-01-18 Tamar Christina <tamar.christina@arm.com>
18455 * config/aarch64/aarch64-sve-builtins-base.cc (memory_vector_mode):
18456 Mark parameter unused.
18458 2020-01-18 Hans-Peter Nilsson <hp@axis.com>
18460 * config.gcc <obsolete targets>: Add crisv32-*-* and cris-*-linux*
18462 2019-01-18 Gerald Pfeifer <gerald@pfeifer.com>
18464 * varpool.c (ctor_useable_for_folding_p): Fix grammar.
18466 2020-01-18 Iain Sandoe <iain@sandoe.co.uk>
18468 * Makefile.in: Add coroutine-passes.o.
18469 * builtin-types.def (BT_CONST_SIZE): New.
18470 (BT_FN_BOOL_PTR): New.
18471 (BT_FN_PTR_PTR_CONST_SIZE_BOOL): New.
18472 * builtins.def (DEF_COROUTINE_BUILTIN): New.
18473 * coroutine-builtins.def: New file.
18474 * coroutine-passes.cc: New file.
18475 * function.h (struct GTY function): Add a bit to indicate that the
18476 function is a coroutine component.
18477 * internal-fn.c (expand_CO_FRAME): New.
18478 (expand_CO_YIELD): New.
18479 (expand_CO_SUSPN): New.
18480 (expand_CO_ACTOR): New.
18481 * internal-fn.def (CO_ACTOR): New.
18485 * passes.def: Add pass_coroutine_lower_builtins,
18486 pass_coroutine_early_expand_ifns.
18487 * tree-pass.h (make_pass_coroutine_lower_builtins): New.
18488 (make_pass_coroutine_early_expand_ifns): New.
18489 * doc/invoke.texi: Document the fcoroutines command line
18492 2020-01-18 Jakub Jelinek <jakub@redhat.com>
18494 * config/arm/vfp.md (*clear_vfp_multiple): Remove unused variable.
18497 * config/arm/arm.c (clear_operation_p): Don't use REGNO until
18498 after checking the argument is a REG. Don't use REGNO (reg)
18499 again to set last_regno, reuse regno variable instead.
18501 2020-01-17 David Malcolm <dmalcolm@redhat.com>
18503 * doc/analyzer.texi (Limitations): Add note about NaN.
18505 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18506 Sudakshina Das <sudi.das@arm.com>
18508 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
18509 and valid immediate.
18510 (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
18511 (lshrdi3): Generate thumb2_lsrl for valid immediates.
18512 * config/arm/constraints.md (Pg): New.
18513 * config/arm/predicates.md (long_shift_imm): New.
18514 (arm_reg_or_long_shift_imm): Likewise.
18515 * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
18516 (thumb2_lsll): Likewise.
18517 (thumb2_lsrl): New.
18519 2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18520 Sudakshina Das <sudi.das@arm.com>
18522 * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
18523 (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
18524 * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
18525 register pairs for doubleword quantities for ARMv8.1M-Mainline.
18526 * config/arm/thumb2.md (thumb2_asrl): New.
18527 (thumb2_lsll): Likewise.
18529 2020-01-17 Jakub Jelinek <jakub@redhat.com>
18531 * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
18534 2020-01-17 Alexander Monakov <amonakov@ispras.ru>
18536 * gdbinit.in (help-gcc-hooks): New command.
18537 (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
18538 pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
18541 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18543 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
18544 correct target macro.
18546 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18548 * config/aarch64/aarch64-protos.h
18549 (aarch64_sve_ld1ro_operand_p): New.
18550 * config/aarch64/aarch64-sve-builtins-base.cc
18551 (class load_replicate): New.
18552 (class svld1ro_impl): New.
18553 (class svld1rq_impl): Change to inherit from load_replicate.
18554 (svld1ro): New sve intrinsic function base.
18555 * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
18556 New DEF_SVE_FUNCTION.
18557 * config/aarch64/aarch64-sve-builtins-base.h
18558 (svld1ro): New decl.
18559 * config/aarch64/aarch64-sve-builtins.cc
18560 (function_expander::add_mem_operand): Modify assert to allow
18562 * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
18564 * config/aarch64/aarch64.c
18565 (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
18566 (aarch64_sve_ld1rq_ld1ro_operand_p): This.
18567 (aarch64_sve_ld1ro_operand_p): New.
18568 * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
18569 * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
18570 * config/aarch64/predicates.md
18571 (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
18573 2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
18575 * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
18576 Introduce this ACLE specified predefined macro.
18577 * config/aarch64/aarch64-option-extensions.def (f64mm): New.
18578 (fp): Disabling this disables f64mm.
18579 (simd): Disabling this disables f64mm.
18580 (fp16): Disabling this disables f64mm.
18581 (sve): Disabling this disables f64mm.
18582 * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
18583 (AARCH64_ISA_F64MM): New.
18584 (TARGET_F64MM): New.
18585 * doc/invoke.texi (f64mm): Document new option.
18587 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
18589 * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
18590 (neoversen1_tunings): Likewise.
18592 2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
18595 * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
18596 Add assert to ensure prolog has been emitted.
18597 (aarch64_split_atomic_op): Likewise.
18598 * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
18599 Use epilogue_completed rather than reload_completed.
18600 (aarch64_atomic_exchange<mode>): Likewise.
18601 (aarch64_atomic_<atomic_optab><mode>): Likewise.
18602 (atomic_nand<mode>): Likewise.
18603 (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
18604 (atomic_fetch_nand<mode>): Likewise.
18605 (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
18606 (atomic_nand_fetch<mode>): Likewise.
18608 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
18611 * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
18613 (REVERSE_CONDITION): Delete.
18614 * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
18615 (CCFP_CCFPE): Likewise.
18616 (e): New mode attribute.
18617 * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
18618 (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
18619 (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
18620 (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
18621 (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
18622 (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
18623 * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
18624 name of generator from gen_ccmpdi to gen_ccmpccdi.
18625 (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
18626 the previous comparison but aren't able to, use the new ccmp_rev
18629 2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
18631 * gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
18632 than testing directly for INTEGER_CST.
18633 (gimplify_target_expr, gimplify_omp_depend): Likewise.
18635 2020-01-17 Jakub Jelinek <jakub@redhat.com>
18637 PR tree-optimization/93292
18638 * tree-vect-stmts.c (vectorizable_comparison): Punt also if
18639 get_vectype_for_scalar_type returns NULL.
18641 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
18643 * params.opt (-param=max-predicted-iterations): Increase range from 0.
18644 * predict.c (estimate_loops): Add 1 to param_max_predicted_iterations.
18646 2020-01-16 Jan Hubicka <hubicka@ucw.cz>
18648 * ipa-fnsummary.c (estimate_calls_size_and_time): Fix formating of
18650 * params.opt: (max-predicted-iterations): Set bounds.
18651 * predict.c (real_almost_one, real_br_prob_base,
18652 real_inv_br_prob_base, real_one_half, real_bb_freq_max): Remove.
18653 (propagate_freq): Add max_cyclic_prob parameter; cap cyclic
18654 probabilities; do not truncate to reg_br_prob_bases.
18655 (estimate_loops_at_level): Pass max_cyclic_prob.
18656 (estimate_loops): Compute max_cyclic_prob.
18657 (estimate_bb_frequencies): Do not initialize real_*; update calculation
18659 * profile-count.c (profile_probability::to_sreal): New.
18660 * profile-count.h (class sreal): Move up in file.
18661 (profile_probability::to_sreal): Declare.
18663 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18666 (arm_invalid_conversion): New function for target hook.
18667 (arm_invalid_unary_op): New function for target hook.
18668 (arm_invalid_binary_op): New function for target hook.
18670 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18672 * config.gcc: Add arm_bf16.h.
18673 * config/arm/arm-builtins.c (arm_mangle_builtin_type): Fix comment.
18674 (arm_simd_builtin_std_type): Add BFmode.
18675 (arm_init_simd_builtin_types): Define element types for vector types.
18676 (arm_init_bf16_types): New function.
18677 (arm_init_builtins): Add arm_init_bf16_types function call.
18678 * config/arm/arm-modes.def: Add BFmode and V4BF, V8BF vector modes.
18679 * config/arm/arm-simd-builtin-types.def: Add V4BF, V8BF.
18680 * config/arm/arm.c (aapcs_vfp_sub_candidate): Add BFmode.
18681 (arm_hard_regno_mode_ok): Add BFmode and tidy up statements.
18682 (arm_vector_mode_supported_p): Add V4BF, V8BF.
18683 (arm_mangle_type): Add __bf16.
18684 * config/arm/arm.h: Add V4BF, V8BF to VALID_NEON_DREG_MODE,
18685 VALID_NEON_QREG_MODE respectively. Add export arm_bf16_type_node,
18686 arm_bf16_ptr_type_node.
18687 * config/arm/arm.md: Add BFmode to movhf expand, mov pattern and
18688 define_split between ARM registers.
18689 * config/arm/arm_bf16.h: New file.
18690 * config/arm/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
18691 * config/arm/iterators.md: (ANY64_BF, VDXMOV, VHFBF, HFBF, fporbf): New.
18692 (VQXMOV): Add V8BF.
18693 * config/arm/neon.md: Add BF vector types to movhf NEON move patterns.
18694 * config/arm/vfp.md: Add BFmode to movhf patterns.
18696 2020-01-16 Mihail Ionescu <mihail.ionescu@arm.com>
18697 Andre Vieira <andre.simoesdiasvieira@arm.com>
18699 * config/arm/arm-cpus.in (mve, mve_float): New features.
18700 (dsp, mve, mve.fp): New options.
18701 * config/arm/arm.h (TARGET_HAVE_MVE, TARGET_HAVE_MVE_FLOAT): Define.
18702 * config/arm/t-rmprofile: Map v8.1-M multilibs to v8-M.
18703 * doc/invoke.texi: Document the armv8.1-m mve and dps options.
18705 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18706 Thomas Preud'homme <thomas.preudhomme@arm.com>
18708 * config/arm/arm-cpus.in (ARMv8_1m_main): Redefine as an extension to
18710 * config/arm/arm.c (arm_options_perform_arch_sanity_checks): Remove
18711 error for using -mcmse when targeting Armv8.1-M Mainline.
18713 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18714 Thomas Preud'homme <thomas.preudhomme@arm.com>
18716 * config/arm/arm.md (nonsecure_call_internal): Do not force memory
18717 address in r4 when targeting Armv8.1-M Mainline.
18718 (nonsecure_call_value_internal): Likewise.
18719 * config/arm/thumb2.md (nonsecure_call_reg_thumb2): Make memory address
18720 a register match_operand again. Emit BLXNS when targeting
18721 Armv8.1-M Mainline.
18722 (nonsecure_call_value_reg_thumb2): Likewise.
18724 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18725 Thomas Preud'homme <thomas.preudhomme@arm.com>
18727 * config/arm/arm.c (arm_add_cfa_adjust_cfa_note): Declare early.
18728 (cmse_nonsecure_call_inline_register_clear): Define new lazy_fpclear
18729 variable as true when floating-point ABI is not hard. Replace
18730 check against TARGET_HARD_FLOAT_ABI by checks against lazy_fpclear.
18731 Generate VLSTM and VLLDM instruction respectively before and
18732 after a function call to cmse_nonsecure_call function.
18733 * config/arm/unspecs.md (VUNSPEC_VLSTM): Define unspec.
18734 (VUNSPEC_VLLDM): Likewise.
18735 * config/arm/vfp.md (lazy_store_multiple_insn): New define_insn.
18736 (lazy_load_multiple_insn): Likewise.
18738 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18739 Thomas Preud'homme <thomas.preudhomme@arm.com>
18741 * config/arm/arm.c (vfp_emit_fstmd): Declare early.
18742 (arm_emit_vfp_multi_reg_pop): Likewise.
18743 (cmse_nonsecure_call_inline_register_clear): Abstract number of VFP
18744 registers to clear in max_fp_regno. Emit VPUSH and VPOP to save and
18745 restore callee-saved VFP registers.
18747 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18748 Thomas Preud'homme <thomas.preudhomme@arm.com>
18750 * config/arm/arm.c (arm_emit_multi_reg_pop): Declare early.
18751 (cmse_nonsecure_call_clear_caller_saved): Rename into ...
18752 (cmse_nonsecure_call_inline_register_clear): This. Save and clear
18753 callee-saved GPRs as well as clear ip register before doing a nonsecure
18754 call then restore callee-saved GPRs after it when targeting
18755 Armv8.1-M Mainline.
18756 (arm_reorg): Adapt to function rename.
18758 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18759 Thomas Preud'homme <thomas.preudhomme@arm.com>
18761 * config/arm/arm-protos.h (clear_operation_p): Adapt prototype.
18762 * config/arm/arm.c (clear_operation_p): Extend to be able to check a
18763 clear_vfp_multiple pattern based on a new vfp parameter.
18764 (cmse_clear_registers): Generate VSCCLRM to clear VFP registers when
18765 targeting Armv8.1-M Mainline.
18766 (cmse_nonsecure_entry_clear_before_return): Clear VFP registers
18767 unconditionally when targeting Armv8.1-M Mainline architecture. Check
18768 whether VFP registers are available before looking call_used_regs for a
18770 * config/arm/predicates.md (clear_multiple_operation): Adapt to change
18771 of prototype of clear_operation_p.
18772 (clear_vfp_multiple_operation): New predicate.
18773 * config/arm/unspecs.md (VUNSPEC_VSCCLRM_VPR): New volatile unspec.
18774 * config/arm/vfp.md (clear_vfp_multiple): New define_insn.
18776 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18777 Thomas Preud'homme <thomas.preudhomme@arm.com>
18779 * config/arm/arm-protos.h (clear_operation_p): Declare.
18780 * config/arm/arm.c (clear_operation_p): New function.
18781 (cmse_clear_registers): Generate clear_multiple instruction pattern if
18782 targeting Armv8.1-M Mainline or successor.
18783 (output_return_instruction): Only output APSR register clearing if
18784 Armv8.1-M Mainline instructions not available.
18785 (thumb_exit): Likewise.
18786 * config/arm/predicates.md (clear_multiple_operation): New predicate.
18787 * config/arm/thumb2.md (clear_apsr): New define_insn.
18788 (clear_multiple): Likewise.
18789 * config/arm/unspecs.md (VUNSPEC_CLRM_APSR): New volatile unspec.
18791 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18792 Thomas Preud'homme <thomas.preudhomme@arm.com>
18794 * config/arm/arm.c (fp_sysreg_names): Declare and define.
18795 (use_return_insn): Also return false for Armv8.1-M Mainline.
18796 (output_return_instruction): Skip FPSCR clearing if Armv8.1-M
18797 Mainline instructions are available.
18798 (arm_compute_frame_layout): Allocate space in frame for FPCXTNS
18799 when targeting Armv8.1-M Mainline Security Extensions.
18800 (arm_expand_prologue): Save FPCXTNS if this is an Armv8.1-M
18801 Mainline entry function.
18802 (cmse_nonsecure_entry_clear_before_return): Clear IP and r4 if
18803 targeting Armv8.1-M Mainline or successor.
18804 (arm_expand_epilogue): Fix indentation of caller-saved register
18805 clearing. Restore FPCXTNS if this is an Armv8.1-M Mainline
18807 * config/arm/arm.h (TARGET_HAVE_FP_CMSE): New macro.
18808 (FP_SYSREGS): Likewise.
18809 (enum vfp_sysregs_encoding): Define enum.
18810 (fp_sysreg_names): Declare.
18811 * config/arm/unspecs.md (VUNSPEC_VSTR_VLDR): New volatile unspec.
18812 * config/arm/vfp.md (push_fpsysreg_insn): New define_insn.
18813 (pop_fpsysreg_insn): Likewise.
18815 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
18816 Thomas Preud'homme <thomas.preudhomme@arm.com>
18818 * config/arm/arm-cpus.in (armv8_1m_main): New feature.
18819 (ARMv4, ARMv4t, ARMv5t, ARMv5te, ARMv5tej, ARMv6, ARMv6j, ARMv6k,
18820 ARMv6z, ARMv6kz, ARMv6zk, ARMv6t2, ARMv6m, ARMv7, ARMv7a, ARMv7ve,
18821 ARMv7r, ARMv7m, ARMv7em, ARMv8a, ARMv8_1a, ARMv8_2a, ARMv8_3a,
18822 ARMv8_4a, ARMv8_5a, ARMv8m_base, ARMv8m_main, ARMv8r): Reindent.
18823 (ARMv8_1m_main): New feature group.
18824 (armv8.1-m.main): New architecture.
18825 * config/arm/arm-tables.opt: Regenerate.
18826 * config/arm/arm.c (arm_arch8_1m_main): Define and default initialize.
18827 (arm_option_reconfigure_globals): Initialize arm_arch8_1m_main.
18828 (arm_options_perform_arch_sanity_checks): Error out when targeting
18829 Armv8.1-M Mainline Security Extensions.
18830 * config/arm/arm.h (arm_arch8_1m_main): Declare.
18832 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18834 * config/aarch64/aarch64-simd-builtins.def (aarch64_bfdot,
18835 aarch64_bfdot_lane, aarch64_bfdot_laneq): New.
18836 * config/aarch64/aarch64-simd.md (aarch64_bfdot, aarch64_bfdot_lane,
18837 aarch64_bfdot_laneq): New.
18838 * config/aarch64/arm_bf16.h (vbfdot_f32, vbfdotq_f32,
18839 vbfdot_lane_f32, vbfdotq_lane_f32, vbfdot_laneq_f32,
18840 vbfdotq_laneq_f32): New.
18841 * config/aarch64/iterators.md (UNSPEC_BFDOT, Vbfdottype,
18842 VBFMLA_W, VBF): New.
18843 (isquadop): Add V4BF, V8BF.
18845 2020-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
18847 * config/aarch64/aarch64-builtins.c: (enum aarch64_type_qualifiers):
18848 New qualifier_lane_quadtup_index, TYPES_TERNOP_SSUS,
18849 TYPES_QUADOPSSUS_LANE_QUADTUP, TYPES_QUADOPSSSU_LANE_QUADTUP.
18850 (aarch64_simd_expand_args): Add case SIMD_ARG_LANE_QUADTUP_INDEX.
18851 (aarch64_simd_expand_builtin): Add qualifier_lane_quadtup_index.
18852 * config/aarch64/aarch64-simd-builtins.def (usdot, usdot_lane,
18853 usdot_laneq, sudot_lane,sudot_laneq): New.
18854 * config/aarch64/aarch64-simd.md (aarch64_usdot): New.
18855 (aarch64_<sur>dot_lane): New.
18856 * config/aarch64/arm_neon.h (vusdot_s32): New.
18857 (vusdotq_s32): New.
18858 (vusdot_lane_s32): New.
18859 (vsudot_lane_s32): New.
18860 * config/aarch64/iterators.md (DOTPROD_I8MM): New iterator.
18861 (UNSPEC_USDOT, UNSPEC_SUDOT): New unspecs.
18863 2020-01-16 Martin Liska <mliska@suse.cz>
18865 * value-prof.c (dump_histogram_value): Fix
18866 obvious spacing issue.
18868 2020-01-16 Andrew Pinski <apinski@marvell.com>
18870 * tree-ssa-sccvn.c(vn_reference_lookup_3): Check lhs for
18871 !storage_order_barrier_p.
18873 2020-01-16 Andrew Pinski <apinski@marvell.com>
18875 * sched-int.h (_dep): Add unused bit-field field for the padding.
18876 * sched-deps.c (init_dep_1): Init unused field.
18878 2020-01-16 Andrew Pinski <apinski@marvell.com>
18880 * optabs.h (create_expand_operand): Initialize target field also.
18882 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
18884 PR tree-optimization/92429
18885 * tree-ssa-loop-niter.h (simplify_replace_tree): Add parameter.
18886 * tree-ssa-loop-niter.c (simplify_replace_tree): Add parameter to
18888 * tree-vect-loop.c (update_epilogue_vinfo): Do not fold when replacing
18891 2020-01-16 Richard Sandiford <richard.sandiford@arm.com>
18893 * config/aarch64/aarch64.c (aarch64_split_sve_subreg_move): Apply
18894 aarch64_sve_int_mode to each mode.
18896 2020-01-15 David Malcolm <dmalcolm@redhat.com>
18898 * doc/analyzer.texi (Overview): Add note about
18899 -fdump-ipa-analyzer.
18901 2020-01-15 Wilco Dijkstra <wdijkstr@arm.com>
18903 PR tree-optimization/93231
18904 * tree-ssa-forwprop.c (optimize_count_trailing_zeroes): Check
18905 input_type is unsigned. Use tree_to_shwi for shift constant.
18906 Check CST_STRING element size is CHAR_TYPE_SIZE bits.
18907 (simplify_count_trailing_zeroes): Add test to handle known non-zero
18908 inputs more efficiently.
18910 2020-01-15 Uroš Bizjak <ubizjak@gmail.com>
18912 * config/i386/i386.md (*movsf_internal): Do not require
18913 SSE2 ISA for alternatives 14 and 15.
18915 2020-01-15 Richard Biener <rguenther@suse.de>
18917 PR middle-end/93273
18918 * tree-eh.c (sink_clobbers): If we already visited the destination
18919 block do not defer insertion.
18920 (pass_lower_eh_dispatch::execute): Maintain BB_VISITED for
18921 the purpose of defered insertion.
18923 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18925 * BASE-VER: Bump to 10.0.1.
18927 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18929 PR tree-optimization/93247
18930 * tree-vect-loop.c (update_epilogue_loop_vinfo): Check the access
18931 type of the stmt that we're going to vectorize.
18933 2020-01-15 Richard Sandiford <richard.sandiford@arm.com>
18935 * tree-vect-slp.c (vectorize_slp_instance_root_stmt): Use a
18936 VIEW_CONVERT_EXPR if the vectorized constructor has a diffeent
18939 2020-01-15 Martin Liska <mliska@suse.cz>
18941 * ipa-profile.c (ipa_profile_read_edge_summary): Do not allow
18942 2 calls of streamer_read_hwi in a function call.
18944 2020-01-15 Richard Biener <rguenther@suse.de>
18946 * alias.c (record_alias_subset): Avoid redundant work when
18947 subset is already recorded.
18949 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18951 * doc/invoke.texi (-fdiagnostics-show-cwe): Add note that some of
18952 the analyzer options provide CWE identifiers.
18954 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18956 * tree-diagnostic-path.cc (path_summary::event_range::print):
18957 When testing for UNKNOWN_LOCATION, look through ad-hoc wrappers
18958 using get_pure_location.
18960 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18962 PR tree-optimization/93262
18963 * tree-ssa-dse.c (maybe_trim_memstar_call): For *_chk builtins,
18964 perform head trimming only if the last argument is constant,
18965 either all ones, or larger or equal to head trim, in the latter
18966 case decrease the last argument by head_trim.
18968 PR tree-optimization/93249
18969 * tree-ssa-dse.c: Include builtins.h and gimple-fold.h.
18970 (maybe_trim_memstar_call): Move head_trim and tail_trim vars to
18971 function body scope, reindent. For BUILTIN_IN_STRNCPY*, don't
18972 perform head trim unless we can prove there are no '\0' chars
18973 from the source among the first head_trim chars.
18975 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18977 * Makefile.in (ANALYZER_OBJS): Add analyzer/function-set.o.
18979 2020-01-15 Jakub Jelinek <jakub@redhat.com>
18982 * config/i386/sse.md
18983 (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
18984 *<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
18985 *<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
18986 *<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
18987 just a single alternative instead of two, make operands 1 and 2
18990 2020-01-14 Jan Hubicka <hubicka@ucw.cz>
18993 * ipa-devirt.c (odr_types_equivalent_p): Compare TREE_ADDRESSABLE and
18996 2020-01-14 David Malcolm <dmalcolm@redhat.com>
18998 * Makefile.in (lang_opt_files): Add analyzer.opt.
18999 (ANALYZER_OBJS): New.
19000 (OBJS): Add digraph.o, graphviz.o, ordered-hash-map-tests.o,
19001 tristate.o and ANALYZER_OBJS.
19002 (TEXI_GCCINT_FILES): Add analyzer.texi.
19003 * common.opt (-fanalyzer): New driver option.
19004 * config.in: Regenerate.
19005 * configure: Regenerate.
19006 * configure.ac (--disable-analyzer, ENABLE_ANALYZER): New option.
19007 (gccdepdir): Also create depdir for "analyzer" subdir.
19008 * digraph.cc: New file.
19009 * digraph.h: New file.
19010 * doc/analyzer.texi: New file.
19011 * doc/gccint.texi ("Static Analyzer") New menu item.
19012 (analyzer.texi): Include it.
19013 * doc/invoke.texi ("Static Analyzer Options"): New list and new section.
19014 ("Warning Options"): Add static analysis warnings to the list.
19015 (-Wno-analyzer-double-fclose): New option.
19016 (-Wno-analyzer-double-free): New option.
19017 (-Wno-analyzer-exposure-through-output-file): New option.
19018 (-Wno-analyzer-file-leak): New option.
19019 (-Wno-analyzer-free-of-non-heap): New option.
19020 (-Wno-analyzer-malloc-leak): New option.
19021 (-Wno-analyzer-possible-null-argument): New option.
19022 (-Wno-analyzer-possible-null-dereference): New option.
19023 (-Wno-analyzer-null-argument): New option.
19024 (-Wno-analyzer-null-dereference): New option.
19025 (-Wno-analyzer-stale-setjmp-buffer): New option.
19026 (-Wno-analyzer-tainted-array-index): New option.
19027 (-Wno-analyzer-use-after-free): New option.
19028 (-Wno-analyzer-use-of-pointer-in-stale-stack-frame): New option.
19029 (-Wno-analyzer-use-of-uninitialized-value): New option.
19030 (-Wanalyzer-too-complex): New option.
19031 (-fanalyzer-call-summaries): New warning.
19032 (-fanalyzer-checker=): New warning.
19033 (-fanalyzer-fine-grained): New warning.
19034 (-fno-analyzer-state-merge): New warning.
19035 (-fno-analyzer-state-purge): New warning.
19036 (-fanalyzer-transitivity): New warning.
19037 (-fanalyzer-verbose-edges): New warning.
19038 (-fanalyzer-verbose-state-changes): New warning.
19039 (-fanalyzer-verbosity=): New warning.
19040 (-fdump-analyzer): New warning.
19041 (-fdump-analyzer-callgraph): New warning.
19042 (-fdump-analyzer-exploded-graph): New warning.
19043 (-fdump-analyzer-exploded-nodes): New warning.
19044 (-fdump-analyzer-exploded-nodes-2): New warning.
19045 (-fdump-analyzer-exploded-nodes-3): New warning.
19046 (-fdump-analyzer-supergraph): New warning.
19047 * doc/sourcebuild.texi (dg-require-dot): New.
19048 (dg-check-dot): New.
19049 * gdbinit.in (break-on-saved-diagnostic): New command.
19050 * graphviz.cc: New file.
19051 * graphviz.h: New file.
19052 * ordered-hash-map-tests.cc: New file.
19053 * ordered-hash-map.h: New file.
19054 * passes.def (pass_analyzer): Add before
19055 pass_ipa_whole_program_visibility.
19056 * selftest-run-tests.c (selftest::run_tests): Call
19057 selftest::ordered_hash_map_tests_cc_tests.
19058 * selftest.h (selftest::ordered_hash_map_tests_cc_tests): New
19060 * shortest-paths.h: New file.
19061 * timevar.def (TV_ANALYZER): New timevar.
19062 (TV_ANALYZER_SUPERGRAPH): Likewise.
19063 (TV_ANALYZER_STATE_PURGE): Likewise.
19064 (TV_ANALYZER_PLAN): Likewise.
19065 (TV_ANALYZER_SCC): Likewise.
19066 (TV_ANALYZER_WORKLIST): Likewise.
19067 (TV_ANALYZER_DUMP): Likewise.
19068 (TV_ANALYZER_DIAGNOSTICS): Likewise.
19069 (TV_ANALYZER_SHORTEST_PATHS): Likewise.
19070 * tree-pass.h (make_pass_analyzer): New decl.
19071 * tristate.cc: New file.
19072 * tristate.h: New file.
19074 2020-01-14 Uroš Bizjak <ubizjak@gmail.com>
19077 * config/i386/i386.md (*movsf_internal): Require SSE2 ISA for
19078 alternatives 9 and 10.
19080 2020-01-14 David Malcolm <dmalcolm@redhat.com>
19082 * attribs.c (excl_hash_traits::empty_zero_p): New static constant.
19083 * gcov.c (function_start_pair_hash::empty_zero_p): Likewise.
19084 * graphite.c (struct sese_scev_hash::empty_zero_p): Likewise.
19085 * hash-map-tests.c (selftest::test_nonzero_empty_key): New selftest.
19086 (selftest::hash_map_tests_c_tests): Call it.
19087 * hash-map-traits.h (simple_hashmap_traits::empty_zero_p):
19088 New static constant, using the value of = H::empty_zero_p.
19089 (unbounded_hashmap_traits::empty_zero_p): Likewise, using the value
19090 from default_hash_traits <Value>.
19091 * hash-map.h (hash_map::empty_zero_p): Likewise, using the value
19093 * hash-set-tests.c (value_hash_traits::empty_zero_p): Likewise.
19094 * hash-table.h (hash_table::alloc_entries): Guard the loop of
19095 calls to mark_empty with !Descriptor::empty_zero_p.
19096 (hash_table::empty_slow): Conditionalize the memset call with a
19097 check that Descriptor::empty_zero_p; otherwise, loop through the
19098 entries calling mark_empty on them.
19099 * hash-traits.h (int_hash::empty_zero_p): New static constant.
19100 (pointer_hash::empty_zero_p): Likewise.
19101 (pair_hash::empty_zero_p): Likewise.
19102 * ipa-devirt.c (default_hash_traits <type_pair>::empty_zero_p):
19104 * ipa-prop.c (ipa_bit_ggc_hash_traits::empty_zero_p): Likewise.
19105 (ipa_vr_ggc_hash_traits::empty_zero_p): Likewise.
19106 * profile.c (location_triplet_hash::empty_zero_p): Likewise.
19107 * sanopt.c (sanopt_tree_triplet_hash::empty_zero_p): Likewise.
19108 (sanopt_tree_couple_hash::empty_zero_p): Likewise.
19109 * tree-hasher.h (int_tree_hasher::empty_zero_p): Likewise.
19110 * tree-ssa-sccvn.c (vn_ssa_aux_hasher::empty_zero_p): Likewise.
19111 * tree-vect-slp.c (bst_traits::empty_zero_p): Likewise.
19112 * tree-vectorizer.h
19113 (default_hash_traits<scalar_cond_masked_key>::empty_zero_p):
19116 2020-01-14 Kewen Lin <linkw@gcc.gnu.org>
19118 * cfgloopanal.c (average_num_loop_insns): Free bbs when early return,
19119 fix typo on return value.
19121 2020-01-14 Xiong Hu Luo <luoxhu@linux.ibm.com>
19124 * cgraph.c (symbol_table::create_edge): Init speculative_id and
19126 (cgraph_edge::make_speculative): Add param for setting speculative_id
19128 (cgraph_edge::speculative_call_info): Update comments and find reference
19129 by speculative_id for multiple indirect targets.
19130 (cgraph_edge::resolve_speculation): Decrease the speculations
19131 for indirect edge, drop it's speculative if not direct target
19132 left. Update comments.
19133 (cgraph_edge::redirect_call_stmt_to_callee): Likewise.
19134 (cgraph_node::dump): Print num_speculative_call_targets.
19135 (cgraph_node::verify_node): Don't report error if speculative
19136 edge not include statement.
19137 (cgraph_edge::num_speculative_call_targets_p): New function.
19138 * cgraph.h (int common_target_id): Remove.
19139 (int common_target_probability): Remove.
19140 (num_speculative_call_targets): New variable.
19141 (make_speculative): Add param for setting speculative_id.
19142 (cgraph_edge::num_speculative_call_targets_p): New declare.
19143 (target_prob): New variable.
19144 (speculative_id): New variable.
19145 * ipa-fnsummary.c (analyze_function_body): Create and duplicate
19146 call summaries for multiple speculative call targets.
19147 * cgraphclones.c (cgraph_node::create_clone): Clone speculative_id.
19148 * ipa-profile.c (struct speculative_call_target): New struct.
19149 (class speculative_call_summary): New class.
19150 (class speculative_call_summaries): New class.
19151 (call_sums): New variable.
19152 (ipa_profile_generate_summary): Generate indirect multiple targets summaries.
19153 (ipa_profile_write_edge_summary): New function.
19154 (ipa_profile_write_summary): Stream out indirect multiple targets summaries.
19155 (ipa_profile_dump_all_summaries): New function.
19156 (ipa_profile_read_edge_summary): New function.
19157 (ipa_profile_read_summary_section): New function.
19158 (ipa_profile_read_summary): Stream in indirect multiple targets summaries.
19159 (ipa_profile): Generate num_speculative_call_targets from
19161 * ipa-ref.h (speculative_id): New variable.
19162 * ipa-utils.c (ipa_merge_profiles): Update with target_prob.
19163 * lto-cgraph.c (lto_output_edge): Remove indirect common_target_id and
19164 common_target_probability. Stream out speculative_id and
19165 num_speculative_call_targets.
19166 (input_edge): Likewise.
19167 * predict.c (dump_prediction): Remove edges count assert to be
19169 * symtab.c (symtab_node::create_reference): Init speculative_id.
19170 (symtab_node::clone_references): Clone speculative_id.
19171 (symtab_node::clone_referring): Clone speculative_id.
19172 (symtab_node::clone_reference): Clone speculative_id.
19173 (symtab_node::clear_stmts_in_references): Clear speculative_id.
19174 * tree-inline.c (copy_bb): Duplicate all the speculative edges
19175 if indirect call contains multiple speculative targets.
19176 * value-prof.h (check_ic_target): Remove.
19177 * value-prof.c (gimple_value_profile_transformations):
19178 Use void function gimple_ic_transform.
19179 * value-prof.c (gimple_ic_transform): Handle topn case.
19180 Fix comment typos. Change it to a void function.
19182 2020-01-13 Andrew Pinski <apinski@marvell.com>
19184 * config/aarch64/aarch64-cores.def (octeontx2): New define.
19185 (octeontx2t98): New define.
19186 (octeontx2t96): New define.
19187 (octeontx2t93): New define.
19188 (octeontx2f95): New define.
19189 (octeontx2f95n): New define.
19190 (octeontx2f95mm): New define.
19191 * config/aarch64/aarch64-tune.md: Regenerate.
19192 * doc/invoke.texi (-mcpu=): Document the new cpu types.
19194 2020-01-13 Jason Merrill <jason@redhat.com>
19196 PR c++/33799 - destroy return value if local cleanup throws.
19197 * gimplify.c (gimplify_return_expr): Handle COMPOUND_EXPR.
19199 2020-01-13 Martin Liska <mliska@suse.cz>
19201 * ipa-cp.c (get_max_overall_size): Use newly
19202 renamed param param_ipa_cp_unit_growth.
19203 * params.opt: Remove legacy param name.
19205 2020-01-13 Martin Sebor <msebor@redhat.com>
19207 PR tree-optimization/93213
19208 * tree-ssa-strlen.c (handle_store): Only allow single-byte nul-over-nul
19209 stores to be eliminated.
19211 2020-01-13 Martin Liska <mliska@suse.cz>
19213 * opts.c (print_help): Do not print CL_PARAM
19214 and CL_WARNING for CL_OPTIMIZATION.
19216 2020-01-13 Jonathan Wakely <jwakely@redhat.com>
19219 * doc/invoke.texi (Warning Options): Add caveat about some warnings
19220 depending on optimization settings.
19222 2020-01-13 Jakub Jelinek <jakub@redhat.com>
19224 PR tree-optimization/90838
19225 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
19226 SCALAR_INT_TYPE_MODE directly in CTZ_DEFINED_VALUE_AT_ZERO macro
19227 argument rather than to initialize temporary for targets that
19228 don't use the mode argument at all. Initialize ctzval to avoid
19231 2020-01-10 Thomas Schwinge <thomas@codesourcery.com>
19233 * tree.h (OMP_CLAUSE_USE_DEVICE_PTR_IF_PRESENT): New definition.
19234 * tree-core.h: Document it.
19235 * gimplify.c (gimplify_omp_workshare): Set it.
19236 * omp-low.c (lower_omp_target): Use it.
19237 * tree-pretty-print.c (dump_omp_clause): Print it.
19239 * omp-low.c (lower_omp_target) <OMP_CLAUSE_USE_DEVICE_PTR etc.>:
19240 Assert that for OpenACC we always have 'GOMP_MAP_USE_DEVICE_PTR'.
19242 2020-01-10 David Malcolm <dmalcolm@redhat.com>
19244 * Makefile.in (OBJS): Add tree-diagnostic-path.o.
19245 * common.opt (fdiagnostics-path-format=): New option.
19246 (diagnostic_path_format): New enum.
19247 (fdiagnostics-show-path-depths): New option.
19248 * coretypes.h (diagnostic_event_id_t): New forward decl.
19249 * diagnostic-color.c (color_dict): Add "path".
19250 * diagnostic-event-id.h: New file.
19251 * diagnostic-format-json.cc (json_from_expanded_location): Make
19253 (json_end_diagnostic): Call context->make_json_for_path if it
19254 exists and the diagnostic has a path.
19255 (diagnostic_output_format_init): Clear context->print_path.
19256 * diagnostic-path.h: New file.
19257 * diagnostic-show-locus.c (colorizer::set_range): Special-case
19258 when printing a run of events in a diagnostic_path so that they
19259 all get the same color.
19260 (layout::m_diagnostic_path_p): New field.
19261 (layout::layout): Initialize it.
19262 (layout::print_any_labels): Don't colorize the label text for an
19263 event in a diagnostic_path.
19264 (gcc_rich_location::add_location_if_nearby): Add
19265 "restrict_to_current_line_spans" and "label" params. Pass the
19266 former to layout.maybe_add_location_range; pass the latter
19267 when calling add_range.
19268 * diagnostic.c: Include "diagnostic-path.h".
19269 (diagnostic_initialize): Initialize context->path_format and
19270 context->show_path_depths.
19271 (diagnostic_show_any_path): New function.
19272 (diagnostic_path::interprocedural_p): New function.
19273 (diagnostic_report_diagnostic): Call diagnostic_show_any_path.
19274 (simple_diagnostic_path::num_events): New function.
19275 (simple_diagnostic_path::get_event): New function.
19276 (simple_diagnostic_path::add_event): New function.
19277 (simple_diagnostic_event::simple_diagnostic_event): New ctor.
19278 (simple_diagnostic_event::~simple_diagnostic_event): New dtor.
19279 (debug): New overload taking a diagnostic_path *.
19280 * diagnostic.def (DK_DIAGNOSTIC_PATH): New.
19281 * diagnostic.h (enum diagnostic_path_format): New enum.
19282 (json::value): New forward decl.
19283 (diagnostic_context::path_format): New field.
19284 (diagnostic_context::show_path_depths): New field.
19285 (diagnostic_context::print_path): New callback field.
19286 (diagnostic_context::make_json_for_path): New callback field.
19287 (diagnostic_show_any_path): New decl.
19288 (json_from_expanded_location): New decl.
19289 * doc/invoke.texi (-fdiagnostics-path-format=): New option.
19290 (-fdiagnostics-show-path-depths): New option.
19291 (-fdiagnostics-color): Add "path" to description of default
19292 GCC_COLORS; describe it.
19293 (-fdiagnostics-format=json): Document how diagnostic paths are
19294 represented in the JSON output format.
19295 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
19296 Add optional params "restrict_to_current_line_spans" and "label".
19297 * opts.c (common_handle_option): Handle
19298 OPT_fdiagnostics_path_format_ and
19299 OPT_fdiagnostics_show_path_depths.
19300 * pretty-print.c: Include "diagnostic-event-id.h".
19301 (pp_format): Implement "%@" format code for printing
19302 diagnostic_event_id_t *.
19303 (selftest::test_pp_format): Add tests for "%@".
19304 * selftest-run-tests.c (selftest::run_tests): Call
19305 selftest::tree_diagnostic_path_cc_tests.
19306 * selftest.h (selftest::tree_diagnostic_path_cc_tests): New decl.
19307 * toplev.c (general_init): Initialize global_dc->path_format and
19308 global_dc->show_path_depths.
19309 * tree-diagnostic-path.cc: New file.
19310 * tree-diagnostic.c (maybe_unwind_expanded_macro_loc): Make
19311 non-static. Drop "diagnostic" param in favor of storing the
19312 original value of "where" and re-using it.
19313 (virt_loc_aware_diagnostic_finalizer): Update for dropped param of
19314 maybe_unwind_expanded_macro_loc.
19315 (tree_diagnostics_defaults): Initialize context->print_path and
19316 context->make_json_for_path.
19317 * tree-diagnostic.h (default_tree_diagnostic_path_printer): New
19319 (default_tree_make_json_for_path): New decl.
19320 (maybe_unwind_expanded_macro_loc): New decl.
19322 2020-01-10 Jakub Jelinek <jakub@redhat.com>
19324 PR tree-optimization/93210
19325 * fold-const.h (native_encode_initializer,
19326 can_native_interpret_type_p): Declare.
19327 * fold-const.c (native_encode_string): Fix up handling with off != -1,
19329 (native_encode_initializer): New function, moved from dwarf2out.c.
19330 Adjust to native_encode_expr compatible arguments, including dry-run
19331 and partial extraction modes. Don't handle STRING_CST.
19332 (can_native_interpret_type_p): No longer static.
19333 * gimple-fold.c (fold_ctor_reference): For native_encode_expr, verify
19334 offset / BITS_PER_UNIT fits into int and don't call it if
19335 can_native_interpret_type_p fails. If suboff is NULL and for
19336 CONSTRUCTOR fold_{,non}array_ctor_reference returns NULL, retry with
19337 native_encode_initializer.
19338 (fold_const_aggregate_ref_1): Formatting fix.
19339 * dwarf2out.c (native_encode_initializer): Moved to fold-const.c.
19340 (tree_add_const_value_attribute): Adjust caller.
19342 PR tree-optimization/90838
19343 * tree-ssa-forwprop.c (simplify_count_trailing_zeroes): Use
19344 SCALAR_INT_TYPE_MODE instead of TYPE_MODE as operand of
19345 CTZ_DEFINED_VALUE_AT_ZERO.
19347 2020-01-10 Vladimir Makarov <vmakarov@redhat.com>
19349 PR inline-asm/93027
19350 * lra-constraints.c (match_reload): Permit input operands have the
19351 same mode as output while other input operands have a different
19354 2020-01-10 Wilco Dijkstra <wdijkstr@arm.com>
19356 PR tree-optimization/90838
19357 * tree-ssa-forwprop.c (check_ctz_array): Add new function.
19358 (check_ctz_string): Likewise.
19359 (optimize_count_trailing_zeroes): Likewise.
19360 (simplify_count_trailing_zeroes): Likewise.
19361 (pass_forwprop::execute): Try ctz simplification.
19362 * match.pd: Add matching for ctz idioms.
19364 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19366 * config/aarch64/aarch64.c (aarch64_invalid_conversion): New function
19368 (aarch64_invalid_unary_op): New function for target hook.
19369 (aarch64_invalid_binary_op): New function for target hook.
19371 2020-01-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
19373 * config.gcc: Add arm_bf16.h.
19374 * config/aarch64/aarch64-builtins.c
19375 (aarch64_simd_builtin_std_type): Add BFmode.
19376 (aarch64_init_simd_builtin_types): Define element types for vector
19378 (aarch64_init_bf16_types): New function.
19379 (aarch64_general_init_builtins): Add arm_init_bf16_types function call.
19380 * config/aarch64/aarch64-modes.def: Add BFmode and V4BF, V8BF vector
19382 * config/aarch64/aarch64-simd-builtin-types.def: Add BF SIMD types.
19383 * config/aarch64/aarch64-simd.md: Add BF vector types to NEON move
19385 * config/aarch64/aarch64.h (AARCH64_VALID_SIMD_DREG_MODE): Add V4BF.
19386 (AARCH64_VALID_SIMD_QREG_MODE): Add V8BF.
19387 * config/aarch64/aarch64.c
19388 (aarch64_classify_vector_mode): Add support for BF types.
19389 (aarch64_gimplify_va_arg_expr): Add support for BF types.
19390 (aarch64_vq_mode): Add support for BF types.
19391 (aarch64_simd_container_mode): Add support for BF types.
19392 (aarch64_mangle_type): Add support for BF scalar type.
19393 * config/aarch64/aarch64.md: Add BFmode to movhf pattern.
19394 * config/aarch64/arm_bf16.h: New file.
19395 * config/aarch64/arm_neon.h: Add arm_bf16.h and Bfloat vector types.
19396 * config/aarch64/iterators.md: Add BF types to mode attributes.
19397 (HFBF, GPF_TF_F16_MOV, VDMOV, VQMOV, VQMOV_NO2Em VALL_F16MOV): New.
19399 2020-01-10 Jason Merrill <jason@redhat.com>
19401 PR c++/93173 - incorrect tree sharing.
19402 * gimplify.c (copy_if_shared): No longer static.
19403 * gimplify.h: Declare it.
19405 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
19407 * doc/invoke.texi (-msve-vector-bits=): Document that
19408 -msve-vector-bits=128 now generates VL-specific code for
19409 little-endian targets.
19410 * config/aarch64/aarch64-sve-builtins.cc (register_builtin_types): Use
19411 build_vector_type_for_mode to construct the data vector types.
19412 * config/aarch64/aarch64.c (aarch64_convert_sve_vector_bits): Generate
19413 VL-specific code for -msve-vector-bits=128 on little-endian targets.
19414 (aarch64_simd_container_mode): Always prefer Advanced SIMD modes
19415 for 128-bit vectors.
19417 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
19419 * config/aarch64/aarch64.c (aarch64_evpc_sel): Fix gen_vcond_mask
19422 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
19424 * config/aarch64/aarch64-builtins.c
19425 (aarch64_builtin_vectorized_function): Check for specific vector modes,
19426 rather than checking the number of elements and the element mode.
19428 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
19430 * tree-vect-loop.c (vect_create_epilog_for_reduction): Use
19431 get_related_vectype_for_scalar_type rather than build_vector_type
19432 to create the index type for a conditional reduction.
19434 2020-01-10 Richard Sandiford <richard.sandiford@arm.com>
19436 * tree-vect-loop.c (update_epilogue_loop_vinfo): Update DR_REF
19437 for any type of gather or scatter, including strided accesses.
19439 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
19441 * tree-vectorizer.h (get_dr_vinfo_offset): Add missing function
19444 2020-01-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
19446 * tree-vect-data-refs.c (vect_create_addr_base_for_vector_ref): Use
19447 get_dr_vinfo_offset
19448 * tree-vect-loop.c (update_epilogue_loop_vinfo): Remove orig_drs_init
19449 parameter and its use to reset DR_OFFSET's.
19450 (vect_transform_loop): Remove orig_drs_init argument.
19451 * tree-vect-loop-manip.c (vect_update_init_of_dr): Update the offset
19452 member of dr_vec_info rather than the offset of the associated
19453 data_reference's innermost_loop_behavior.
19454 (vect_update_init_of_dr): Pass dr_vec_info instead of data_reference.
19455 (vect_do_peeling): Remove orig_drs_init parameter and its construction.
19456 * tree-vect-stmts.c (check_scan_store): Replace use of DR_OFFSET with
19457 get_dr_vinfo_offset.
19458 (vectorizable_store): Likewise.
19459 (vectorizable_load): Likewise.
19461 2020-01-10 Richard Biener <rguenther@suse.de>
19463 * gimple-ssa-store-merging
19464 (pass_store_merging::terminate_all_aliasing_chains): Cache alias info.
19466 2020-01-10 Martin Liska <mliska@suse.cz>
19469 * ipa-inline-analysis.c (offline_size): Make proper parenthesis
19470 encapsulation that was there before r280040.
19472 2020-01-10 Richard Biener <rguenther@suse.de>
19474 PR middle-end/93199
19475 * tree-eh.c (sink_clobbers): Move clobbers to out-of-IL
19476 sequences to avoid walking them again for secondary opportunities.
19477 (pass_lower_eh_dispatch::execute): Instead actually insert
19480 2020-01-10 Richard Biener <rguenther@suse.de>
19482 PR middle-end/93199
19483 * tree-eh.c (redirect_eh_edge_1): Avoid some work if possible.
19484 (cleanup_all_empty_eh): Walk landing pads in reverse order to
19485 avoid quadraticness.
19487 2020-01-10 Martin Jambor <mjambor@suse.cz>
19489 * params.opt (param_ipa_sra_max_replacements): Mark as Optimization.
19490 * ipa-sra.c (pull_accesses_from_callee): New parameter caller, use it
19491 to get param_ipa_sra_max_replacements.
19492 (param_splitting_across_edge): Pass the caller to
19493 pull_accesses_from_callee.
19495 2020-01-10 Martin Jambor <mjambor@suse.cz>
19497 * params.opt (param_ipcp_unit_growth): Mark as Optimization.
19498 * ipa-cp.c (max_new_size): Removed.
19499 (orig_overall_size): New variable.
19500 (get_max_overall_size): New function.
19501 (estimate_local_effects): Use it. Adjust dump.
19502 (decide_about_value): Likewise.
19503 (ipcp_propagate_stage): Do not calculate max_new_size, just store
19504 orig_overall_size. Adjust dump.
19505 (ipa_cp_c_finalize): Clear orig_overall_size instead of max_new_size.
19507 2020-01-10 Martin Jambor <mjambor@suse.cz>
19509 * params.opt (param_ipa_max_agg_items): Mark as Optimization
19510 * ipa-cp.c (merge_agg_lats_step): New parameter max_agg_items, use
19511 instead of param_ipa_max_agg_items.
19512 (merge_aggregate_lattices): Extract param_ipa_max_agg_items from
19513 optimization info for the callee.
19515 2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com>
19517 * lto-streamer-in.c (input_function): Remove streamed-in inline debug
19518 markers if debug_inline_points is false.
19520 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19522 * config.gcc (aarch64*-*-*): Add aarch64-sve-builtins-sve2.o to
19524 * config/aarch64/t-aarch64 (aarch64-sve-builtins.o): Depend on
19525 aarch64-sve-builtins-base.def, aarch64-sve-builtins-sve2.def and
19526 aarch64-sve-builtins-sve2.h.
19527 (aarch64-sve-builtins-sve2.o): New rule.
19528 * config/aarch64/aarch64.h (AARCH64_ISA_SVE2_AES): New macro.
19529 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3): Likewise.
19530 (AARCH64_ISA_SVE2_SM4, TARGET_SVE2_AES, TARGET_SVE2_BITPERM): Likewise.
19531 (TARGET_SVE2_SHA, TARGET_SVE2_SM4): Likewise.
19532 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
19533 TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3 and
19535 * config/aarch64/aarch64-sve.md: Update comments with SVE2
19536 instructions that are handled here.
19537 (@cond_asrd<mode>): Generalize to...
19538 (@cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>): ...this.
19539 (*cond_asrd<mode>_2): Generalize to...
19540 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_2): ...this.
19541 (*cond_asrd<mode>_z): Generalize to...
19542 (*cond_<SVE_INT_SHIFT_IMM:sve_int_op><mode>_z): ...this.
19543 * config/aarch64/aarch64.md (UNSPEC_LDNT1_GATHER): New unspec.
19544 (UNSPEC_STNT1_SCATTER, UNSPEC_WHILEGE, UNSPEC_WHILEGT): Likewise.
19545 (UNSPEC_WHILEHI, UNSPEC_WHILEHS): Likewise.
19546 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): New
19548 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
19549 (@aarch64_scatter_stnt<mode>): Likewise.
19550 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
19551 (@aarch64_mul_lane_<mode>): Likewise.
19552 (@aarch64_sve_suqadd<mode>_const): Likewise.
19553 (*<sur>h<addsub><mode>): Generalize to...
19554 (@aarch64_pred_<SVE2_COND_INT_BINARY_REV:sve_int_op><mode>): ...this
19556 (@cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>): New expander.
19557 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_2): New pattern.
19558 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_3): Likewise.
19559 (*cond_<SVE2_COND_INT_BINARY:sve_int_op><mode>_any): Likewise.
19560 (*cond_<SVE2_COND_INT_BINARY_NOREV:sve_int_op><mode>_z): Likewise.
19561 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op><mode>):: Likewise.
19562 (@aarch64_sve_<SVE2_INT_BINARY:sve_int_op>_lane_<mode>): Likewise.
19563 (@aarch64_pred_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): Likewise.
19564 (@cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>): New expander.
19565 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_2): New pattern.
19566 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_3): Likewise.
19567 (*cond_<SVE2_COND_INT_SHIFT:sve_int_op><mode>_any): Likewise.
19568 (@aarch64_sve_<SVE2_INT_TERNARY:sve_int_op><mode>): Likewise.
19569 (@aarch64_sve_<SVE2_INT_TERNARY_LANE:sve_int_op>_lane_<mode>)
19570 (@aarch64_sve_add_mul_lane_<mode>): Likewise.
19571 (@aarch64_sve_sub_mul_lane_<mode>): Likewise.
19572 (@aarch64_sve2_xar<mode>): Likewise.
19573 (@aarch64_sve2_bcax<mode>): Likewise.
19574 (*aarch64_sve2_eor3<mode>): Rename to...
19575 (@aarch64_sve2_eor3<mode>): ...this.
19576 (@aarch64_sve2_bsl<mode>): New expander.
19577 (@aarch64_sve2_nbsl<mode>): Likewise.
19578 (@aarch64_sve2_bsl1n<mode>): Likewise.
19579 (@aarch64_sve2_bsl2n<mode>): Likewise.
19580 (@aarch64_sve_add_<SHIFTRT:sve_int_op><mode>): Likewise.
19581 (*aarch64_sve2_sra<mode>): Add MOVPRFX support.
19582 (@aarch64_sve_add_<VRSHR_N:sve_int_op><mode>): New pattern.
19583 (@aarch64_sve_<SVE2_INT_SHIFT_INSERT:sve_int_op><mode>): Likewise.
19584 (@aarch64_sve2_<USMAX:su>aba<mode>): New expander.
19585 (*aarch64_sve2_<USMAX:su>aba<mode>): New pattern.
19586 (@aarch64_sve_<SVE2_INT_BINARY_WIDE:sve_int_op><mode>): Likewise.
19587 (<su>mull<bt><Vwide>): Generalize to...
19588 (@aarch64_sve_<SVE2_INT_BINARY_LONG:sve_int_op><mode>): ...this new
19590 (@aarch64_sve_<SVE2_INT_BINARY_LONG_lANE:sve_int_op>_lane_<mode>)
19591 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_LONG:sve_int_op><mode>)
19592 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG:sve_int_op><mode>)
19593 (@aarch64_sve_add_<SVE2_INT_ADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19594 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG:sve_int_op><mode>)
19595 (@aarch64_sve_qadd_<SVE2_INT_QADD_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19596 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG:sve_int_op><mode>)
19597 (@aarch64_sve_sub_<SVE2_INT_SUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19598 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG:sve_int_op><mode>)
19599 (@aarch64_sve_qsub_<SVE2_INT_QSUB_BINARY_LONG_LANE:sve_int_op>_lane_<mode>)
19600 (@aarch64_sve_<SVE2_FP_TERNARY_LONG:sve_fp_op><mode>): New patterns.
19601 (@aarch64_<SVE2_FP_TERNARY_LONG_LANE:sve_fp_op>_lane_<mode>)
19602 (@aarch64_sve_<SVE2_INT_UNARY_NARROWB:sve_int_op><mode>): Likewise.
19603 (@aarch64_sve_<SVE2_INT_UNARY_NARROWT:sve_int_op><mode>): Likewise.
19604 (@aarch64_sve_<SVE2_INT_BINARY_NARROWB:sve_int_op><mode>): Likewise.
19605 (@aarch64_sve_<SVE2_INT_BINARY_NARROWT:sve_int_op><mode>): Likewise.
19606 (<SHRNB:r>shrnb<mode>): Generalize to...
19607 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWB:sve_int_op><mode>): ...this
19609 (<SHRNT:r>shrnt<mode>): Generalize to...
19610 (@aarch64_sve_<SVE2_INT_SHIFT_IMM_NARROWT:sve_int_op><mode>): ...this
19612 (@aarch64_pred_<SVE2_INT_BINARY_PAIR:sve_int_op><mode>): New pattern.
19613 (@aarch64_pred_<SVE2_FP_BINARY_PAIR:sve_fp_op><mode>): Likewise.
19614 (@cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>): New expander.
19615 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_2): New pattern.
19616 (*cond_<SVE2_INT_BINARY_PAIR_LONG:sve_int_op><mode>_z): Likewise.
19617 (@aarch64_sve_<SVE2_INT_CADD:optab><mode>): Likewise.
19618 (@aarch64_sve_<SVE2_INT_CMLA:optab><mode>): Likewise.
19619 (@aarch64_<SVE2_INT_CMLA:optab>_lane_<mode>): Likewise.
19620 (@aarch64_sve_<SVE2_INT_CDOT:optab><mode>): Likewise.
19621 (@aarch64_<SVE2_INT_CDOT:optab>_lane_<mode>): Likewise.
19622 (@aarch64_pred_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): Likewise.
19623 (@cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New expander.
19624 (*cond_<SVE2_COND_FP_UNARY_LONG:sve_fp_op><mode>): New pattern.
19625 (@aarch64_sve2_cvtnt<mode>): Likewise.
19626 (@aarch64_pred_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): Likewise.
19627 (@cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>): New expander.
19628 (*cond_<SVE2_COND_FP_UNARY_NARROWB:sve_fp_op><mode>_any): New pattern.
19629 (@aarch64_sve2_cvtxnt<mode>): Likewise.
19630 (@aarch64_pred_<SVE2_U32_UNARY:sve_int_op><mode>): Likewise.
19631 (@cond_<SVE2_U32_UNARY:sve_int_op><mode>): New expander.
19632 (*cond_<SVE2_U32_UNARY:sve_int_op><mode>): New pattern.
19633 (@aarch64_pred_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): Likewise.
19634 (@cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New expander.
19635 (*cond_<SVE2_COND_INT_UNARY_FP:sve_fp_op><mode>): New pattern.
19636 (@aarch64_sve2_pmul<mode>): Likewise.
19637 (@aarch64_sve_<SVE2_PMULL:optab><mode>): Likewise.
19638 (@aarch64_sve_<SVE2_PMULL_PAIR:optab><mode>): Likewise.
19639 (@aarch64_sve2_tbl2<mode>): Likewise.
19640 (@aarch64_sve2_tbx<mode>): Likewise.
19641 (@aarch64_sve_<SVE2_INT_BITPERM:sve_int_op><mode>): Likewise.
19642 (@aarch64_sve2_histcnt<mode>): Likewise.
19643 (@aarch64_sve2_histseg<mode>): Likewise.
19644 (@aarch64_pred_<SVE2_MATCH:sve_int_op><mode>): Likewise.
19645 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_cc): Likewise.
19646 (*aarch64_pred_<SVE2_MATCH:sve_int_op><mode>_ptest): Likewise.
19647 (aarch64_sve2_aes<CRYPTO_AES:aes_op>): Likewise.
19648 (aarch64_sve2_aes<CRYPTO_AESMC:aesmc_op>): Likewise.
19649 (*aarch64_sve2_aese_fused, *aarch64_sve2_aesd_fused): Likewise.
19650 (aarch64_sve2_rax1, aarch64_sve2_sm4e, aarch64_sve2_sm4ekey): Likewise.
19651 (<su>mulh<r>s<mode>3): Update after above pattern name changes.
19652 * config/aarch64/iterators.md (VNx16QI_ONLY, VNx4SF_ONLY)
19653 (SVE_STRUCT2, SVE_FULL_BHI, SVE_FULL_HSI, SVE_FULL_HDI)
19654 (SVE2_PMULL_PAIR_I): New mode iterators.
19655 (UNSPEC_ADCLB, UNSPEC_ADCLT, UNSPEC_ADDHNB, UNSPEC_ADDHNT, UNSPEC_BDEP)
19656 (UNSPEC_BEXT, UNSPEC_BGRP, UNSPEC_CADD90, UNSPEC_CADD270, UNSPEC_CDOT)
19657 (UNSPEC_CDOT90, UNSPEC_CDOT180, UNSPEC_CDOT270, UNSPEC_CMLA)
19658 (UNSPEC_CMLA90, UNSPEC_CMLA180, UNSPEC_CMLA270, UNSPEC_COND_FCVTLT)
19659 (UNSPEC_COND_FCVTNT, UNSPEC_COND_FCVTX, UNSPEC_COND_FCVTXNT)
19660 (UNSPEC_COND_FLOGB, UNSPEC_EORBT, UNSPEC_EORTB, UNSPEC_FADDP)
19661 (UNSPEC_FMAXP, UNSPEC_FMAXNMP, UNSPEC_FMLALB, UNSPEC_FMLALT)
19662 (UNSPEC_FMLSLB, UNSPEC_FMLSLT, UNSPEC_FMINP, UNSPEC_FMINNMP)
19663 (UNSPEC_HISTCNT, UNSPEC_HISTSEG, UNSPEC_MATCH, UNSPEC_NMATCH)
19664 (UNSPEC_PMULLB, UNSPEC_PMULLB_PAIR, UNSPEC_PMULLT, UNSPEC_PMULLT_PAIR)
19665 (UNSPEC_RADDHNB, UNSPEC_RADDHNT, UNSPEC_RSUBHNB, UNSPEC_RSUBHNT)
19666 (UNSPEC_SLI, UNSPEC_SRI, UNSPEC_SABDLB, UNSPEC_SABDLT, UNSPEC_SADDLB)
19667 (UNSPEC_SADDLBT, UNSPEC_SADDLT, UNSPEC_SADDWB, UNSPEC_SADDWT)
19668 (UNSPEC_SBCLB, UNSPEC_SBCLT, UNSPEC_SMAXP, UNSPEC_SMINP)
19669 (UNSPEC_SQCADD90, UNSPEC_SQCADD270, UNSPEC_SQDMULLB, UNSPEC_SQDMULLBT)
19670 (UNSPEC_SQDMULLT, UNSPEC_SQRDCMLAH, UNSPEC_SQRDCMLAH90)
19671 (UNSPEC_SQRDCMLAH180, UNSPEC_SQRDCMLAH270, UNSPEC_SQRSHRNB)
19672 (UNSPEC_SQRSHRNT, UNSPEC_SQRSHRUNB, UNSPEC_SQRSHRUNT, UNSPEC_SQSHRNB)
19673 (UNSPEC_SQSHRNT, UNSPEC_SQSHRUNB, UNSPEC_SQSHRUNT, UNSPEC_SQXTNB)
19674 (UNSPEC_SQXTNT, UNSPEC_SQXTUNB, UNSPEC_SQXTUNT, UNSPEC_SSHLLB)
19675 (UNSPEC_SSHLLT, UNSPEC_SSUBLB, UNSPEC_SSUBLBT, UNSPEC_SSUBLT)
19676 (UNSPEC_SSUBLTB, UNSPEC_SSUBWB, UNSPEC_SSUBWT, UNSPEC_SUBHNB)
19677 (UNSPEC_SUBHNT, UNSPEC_TBL2, UNSPEC_UABDLB, UNSPEC_UABDLT)
19678 (UNSPEC_UADDLB, UNSPEC_UADDLT, UNSPEC_UADDWB, UNSPEC_UADDWT)
19679 (UNSPEC_UMAXP, UNSPEC_UMINP, UNSPEC_UQRSHRNB, UNSPEC_UQRSHRNT)
19680 (UNSPEC_UQSHRNB, UNSPEC_UQSHRNT, UNSPEC_UQXTNB, UNSPEC_UQXTNT)
19681 (UNSPEC_USHLLB, UNSPEC_USHLLT, UNSPEC_USUBLB, UNSPEC_USUBLT)
19682 (UNSPEC_USUBWB, UNSPEC_USUBWT): New unspecs.
19683 (UNSPEC_SMULLB, UNSPEC_SMULLT, UNSPEC_UMULLB, UNSPEC_UMULLT)
19684 (UNSPEC_SMULHS, UNSPEC_SMULHRS, UNSPEC_UMULHS, UNSPEC_UMULHRS)
19685 (UNSPEC_RSHRNB, UNSPEC_RSHRNT, UNSPEC_SHRNB, UNSPEC_SHRNT): Move
19687 (VNARROW, Ventype): New mode attributes.
19688 (Vewtype): Handle VNx2DI. Fix typo in comment.
19689 (VDOUBLE): New mode attribute.
19690 (sve_lane_con): Handle VNx8HI.
19691 (SVE_INT_UNARY): Include ss_abs and ss_neg for TARGET_SVE2.
19692 (SVE_INT_BINARY): Likewise ss_plus, us_plus, ss_minus and us_minus.
19693 (sve_int_op, sve_int_op_rev): Handle the above codes.
19694 (sve_pred_int_rhs2_operand): Likewise.
19695 (MULLBT, SHRNB, SHRNT): Delete.
19696 (SVE_INT_SHIFT_IMM): New int iterator.
19697 (SVE_WHILE): Add UNSPEC_WHILEGE, UNSPEC_WHILEGT, UNSPEC_WHILEHI
19698 and UNSPEC_WHILEHS for TARGET_SVE2.
19699 (SVE2_U32_UNARY, SVE2_INT_UNARY_NARROWB, SVE2_INT_UNARY_NARROWT)
19700 (SVE2_INT_BINARY, SVE2_INT_BINARY_LANE, SVE2_INT_BINARY_LONG)
19701 (SVE2_INT_BINARY_LONG_LANE, SVE2_INT_BINARY_NARROWB)
19702 (SVE2_INT_BINARY_NARROWT, SVE2_INT_BINARY_PAIR, SVE2_FP_BINARY_PAIR)
19703 (SVE2_INT_BINARY_PAIR_LONG, SVE2_INT_BINARY_WIDE): New int iterators.
19704 (SVE2_INT_SHIFT_IMM_LONG, SVE2_INT_SHIFT_IMM_NARROWB): Likewise.
19705 (SVE2_INT_SHIFT_IMM_NARROWT, SVE2_INT_SHIFT_INSERT, SVE2_INT_CADD)
19706 (SVE2_INT_BITPERM, SVE2_INT_TERNARY, SVE2_INT_TERNARY_LANE): Likewise.
19707 (SVE2_FP_TERNARY_LONG, SVE2_FP_TERNARY_LONG_LANE, SVE2_INT_CMLA)
19708 (SVE2_INT_CDOT, SVE2_INT_ADD_BINARY_LONG, SVE2_INT_QADD_BINARY_LONG)
19709 (SVE2_INT_SUB_BINARY_LONG, SVE2_INT_QSUB_BINARY_LONG): Likewise.
19710 (SVE2_INT_ADD_BINARY_LONG_LANE, SVE2_INT_QADD_BINARY_LONG_LANE)
19711 (SVE2_INT_SUB_BINARY_LONG_LANE, SVE2_INT_QSUB_BINARY_LONG_LANE)
19712 (SVE2_COND_INT_UNARY_FP, SVE2_COND_FP_UNARY_LONG): Likewise.
19713 (SVE2_COND_FP_UNARY_NARROWB, SVE2_COND_INT_BINARY): Likewise.
19714 (SVE2_COND_INT_BINARY_NOREV, SVE2_COND_INT_BINARY_REV): Likewise.
19715 (SVE2_COND_INT_SHIFT, SVE2_MATCH, SVE2_PMULL): Likewise.
19716 (optab): Handle the new unspecs.
19717 (su, r): Remove entries for UNSPEC_SHRNB, UNSPEC_SHRNT, UNSPEC_RSHRNB
19719 (lr): Handle the new unspecs.
19721 (cmp_op, while_optab_cmp, sve_int_op): Handle the new unspecs.
19722 (sve_int_op_rev, sve_int_add_op, sve_int_qadd_op, sve_int_sub_op)
19723 (sve_int_qsub_op): New int attributes.
19724 (sve_fp_op, rot): Handle the new unspecs.
19725 * config/aarch64/aarch64-sve-builtins.h
19726 (function_resolver::require_matching_pointer_type): Declare.
19727 (function_resolver::resolve_unary): Add an optional boolean argument.
19728 (function_resolver::finish_opt_n_resolution): Add an optional
19729 type_suffix_index argument.
19730 (gimple_folder::redirect_call): Declare.
19731 (gimple_expander::prepare_gather_address_operands): Add an optional
19733 * config/aarch64/aarch64-sve-builtins.cc: Include
19734 aarch64-sve-builtins-sve2.h.
19735 (TYPES_b_unsigned, TYPES_b_integer, TYPES_bh_integer): New macros.
19736 (TYPES_bs_unsigned, TYPES_hs_signed, TYPES_hs_integer): Likewise.
19737 (TYPES_hd_unsigned, TYPES_hsd_signed): Likewise.
19738 (TYPES_hsd_integer): Use TYPES_hsd_signed.
19739 (TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer): New macros.
19740 (TYPES_s_unsigned): Likewise.
19741 (TYPES_s_integer): Use TYPES_s_unsigned.
19742 (TYPES_sd_signed, TYPES_sd_unsigned): New macros.
19743 (TYPES_sd_integer): Use them.
19744 (TYPES_d_unsigned): New macro.
19745 (TYPES_d_integer): Use it.
19746 (TYPES_d_data, TYPES_cvt_long, TYPES_cvt_narrow_s): New macros.
19747 (TYPES_cvt_narrow): Likewise.
19748 (DEF_SVE_TYPES_ARRAY): Include the new types macros above.
19749 (preds_mx): New variable.
19750 (function_builder::add_overloaded_function): Allow the new feature
19751 set to be more restrictive than the original one.
19752 (function_resolver::infer_pointer_type): Remove qualifiers from
19753 the pointer type before printing it.
19754 (function_resolver::require_matching_pointer_type): New function.
19755 (function_resolver::resolve_sv_displacement): Handle functions
19756 that don't support 32-bit vector indices or svint32_t vector offsets.
19757 (function_resolver::finish_opt_n_resolution): Take the inferred type
19758 as a separate argument.
19759 (function_resolver::resolve_unary): Optionally treat all forms in
19760 the same way as normal merging functions.
19761 (gimple_folder::redirect_call): New function.
19762 (function_expander::prepare_gather_address_operands): Add an argument
19763 that says whether scaled forms are available. If they aren't,
19764 handle scaling of vector indices and don't add the extension and
19766 (function_expander::map_to_unspecs): If aarch64_sve isn't available,
19767 fall back to using cond_* instead.
19768 * config/aarch64/aarch64-sve-builtins-functions.h (rtx_code_function):
19769 Split out the member variables into...
19770 (rtx_code_function_base): ...this new base class.
19771 (rtx_code_function_rotated): Inherit rtx_code_function_base.
19772 (unspec_based_function): Split out the member variables into...
19773 (unspec_based_function_base): ...this new base class.
19774 (unspec_based_function_rotated): Inherit unspec_based_function_base.
19775 (unspec_based_function_exact_insn): New class.
19776 (unspec_based_add_function, unspec_based_add_lane_function)
19777 (unspec_based_lane_function, unspec_based_pred_function)
19778 (unspec_based_qadd_function, unspec_based_qadd_lane_function)
19779 (unspec_based_qsub_function, unspec_based_qsub_lane_function)
19780 (unspec_based_sub_function, unspec_based_sub_lane_function): New
19782 (unspec_based_fused_function): New class.
19783 (unspec_based_mla_function, unspec_based_mls_function): New typedefs.
19784 (unspec_based_fused_lane_function): New class.
19785 (unspec_based_mla_lane_function, unspec_based_mls_lane_function): New
19787 (CODE_FOR_MODE1): New macro.
19788 (fixed_insn_function): New class.
19789 (while_comparison): Likewise.
19790 * config/aarch64/aarch64-sve-builtins-shapes.h (binary_long_lane)
19791 (binary_long_opt_n, binary_narrowb_opt_n, binary_narrowt_opt_n)
19792 (binary_to_uint, binary_wide, binary_wide_opt_n, compare, compare_ptr)
19793 (load_ext_gather_index_restricted, load_ext_gather_offset_restricted)
19794 (load_gather_sv_restricted, shift_left_imm_long): Declare.
19795 (shift_left_imm_to_uint, shift_right_imm_narrowb): Likewise.
19796 (shift_right_imm_narrowt, shift_right_imm_narrowb_to_uint): Likewise.
19797 (shift_right_imm_narrowt_to_uint, store_scatter_index_restricted)
19798 (store_scatter_offset_restricted, tbl_tuple, ternary_long_lane)
19799 (ternary_long_opt_n, ternary_qq_lane_rotate, ternary_qq_rotate)
19800 (ternary_shift_left_imm, ternary_shift_right_imm, ternary_uint)
19801 (unary_convert_narrowt, unary_long, unary_narrowb, unary_narrowt)
19802 (unary_narrowb_to_uint, unary_narrowt_to_uint, unary_to_int): Likewise.
19803 * config/aarch64/aarch64-sve-builtins-shapes.cc (apply_predication):
19804 Also add an initial argument for unary_convert_narrowt, regardless
19805 of the predication type.
19806 (build_32_64): Allow loads and stores to specify MODE_none.
19807 (build_sv_index64, build_sv_uint_offset): New functions.
19808 (long_type_suffix): New function.
19809 (binary_imm_narrowb_base, binary_imm_narrowt_base): New classes.
19810 (binary_imm_long_base, load_gather_sv_base): Likewise.
19811 (shift_right_imm_narrow_wrapper, ternary_shift_imm_base): Likewise.
19812 (ternary_resize2_opt_n_base, ternary_resize2_lane_base): Likewise.
19813 (unary_narrowb_base, unary_narrowt_base): Likewise.
19814 (binary_long_lane_def, binary_long_lane): New shape.
19815 (binary_long_opt_n_def, binary_long_opt_n): Likewise.
19816 (binary_narrowb_opt_n_def, binary_narrowb_opt_n): Likewise.
19817 (binary_narrowt_opt_n_def, binary_narrowt_opt_n): Likewise.
19818 (binary_to_uint_def, binary_to_uint): Likewise.
19819 (binary_wide_def, binary_wide): Likewise.
19820 (binary_wide_opt_n_def, binary_wide_opt_n): Likewise.
19821 (compare_def, compare): Likewise.
19822 (compare_ptr_def, compare_ptr): Likewise.
19823 (load_ext_gather_index_restricted_def,
19824 load_ext_gather_index_restricted): Likewise.
19825 (load_ext_gather_offset_restricted_def,
19826 load_ext_gather_offset_restricted): Likewise.
19827 (load_gather_sv_def): Inherit from load_gather_sv_base.
19828 (load_gather_sv_restricted_def, load_gather_sv_restricted): New shape.
19829 (shift_left_imm_def, shift_left_imm): Likewise.
19830 (shift_left_imm_long_def, shift_left_imm_long): Likewise.
19831 (shift_left_imm_to_uint_def, shift_left_imm_to_uint): Likewise.
19832 (store_scatter_index_restricted_def,
19833 store_scatter_index_restricted): Likewise.
19834 (store_scatter_offset_restricted_def,
19835 store_scatter_offset_restricted): Likewise.
19836 (tbl_tuple_def, tbl_tuple): Likewise.
19837 (ternary_long_lane_def, ternary_long_lane): Likewise.
19838 (ternary_long_opt_n_def, ternary_long_opt_n): Likewise.
19839 (ternary_qq_lane_def): Inherit from ternary_resize2_lane_base.
19840 (ternary_qq_lane_rotate_def, ternary_qq_lane_rotate): New shape
19841 (ternary_qq_opt_n_def): Inherit from ternary_resize2_opt_n_base.
19842 (ternary_qq_rotate_def, ternary_qq_rotate): New shape.
19843 (ternary_shift_left_imm_def, ternary_shift_left_imm): Likewise.
19844 (ternary_shift_right_imm_def, ternary_shift_right_imm): Likewise.
19845 (ternary_uint_def, ternary_uint): Likewise.
19846 (unary_convert): Fix typo in comment.
19847 (unary_convert_narrowt_def, unary_convert_narrowt): New shape.
19848 (unary_long_def, unary_long): Likewise.
19849 (unary_narrowb_def, unary_narrowb): Likewise.
19850 (unary_narrowt_def, unary_narrowt): Likewise.
19851 (unary_narrowb_to_uint_def, unary_narrowb_to_uint): Likewise.
19852 (unary_narrowt_to_uint_def, unary_narrowt_to_uint): Likewise.
19853 (unary_to_int_def, unary_to_int): Likewise.
19854 * config/aarch64/aarch64-sve-builtins-base.cc (unspec_cmla)
19855 (unspec_fcmla, unspec_cond_fcmla, expand_mla_mls_lane): New functions.
19856 (svasrd_impl): Delete.
19857 (svcadd_impl::expand): Handle integer operations too.
19858 (svcmla_impl::expand, svcmla_lane::expand): Likewise, using the
19859 new functions to derive the unspec numbers.
19860 (svmla_svmls_lane_impl): Replace with...
19861 (svmla_lane_impl, svmls_lane_impl): ...these new classes. Handle
19862 integer operations too.
19863 (svwhile_impl): Rename to...
19864 (svwhilelx_impl): ...this and inherit from while_comparison.
19865 (svasrd): Use unspec_based_function.
19866 (svmla_lane): Use svmla_lane_impl.
19867 (svmls_lane): Use svmls_lane_impl.
19868 (svrecpe, svrsqrte): Handle unsigned integer operations too.
19869 (svwhilele, svwhilelt): Use svwhilelx_impl.
19870 * config/aarch64/aarch64-sve-builtins-sve2.h: New file.
19871 * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
19872 * config/aarch64/aarch64-sve-builtins-sve2.def: Likewise.
19873 * config/aarch64/aarch64-sve-builtins.def: Include
19874 aarch64-sve-builtins-sve2.def.
19876 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19878 * config/aarch64/aarch64-protos.h (aarch64_sve_arith_immediate_p)
19879 (aarch64_sve_sqadd_sqsub_immediate_p): Add a machine_mode argument.
19880 * config/aarch64/aarch64.c (aarch64_sve_arith_immediate_p)
19881 (aarch64_sve_sqadd_sqsub_immediate_p): Likewise. Handle scalar
19882 immediates as well as vector ones.
19883 * config/aarch64/predicates.md (aarch64_sve_arith_immediate)
19884 (aarch64_sve_sub_arith_immediate, aarch64_sve_qadd_immediate)
19885 (aarch64_sve_qsub_immediate): Update calls accordingly.
19887 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19889 * config/aarch64/aarch64-sve2.md: Add banner comments.
19890 (<su>mulh<r>s<mode>3): Move further up file.
19891 (<su>mull<bt><Vwide>, <r>shrnb<mode>, <r>shrnt<mode>)
19892 (*aarch64_sve2_sra<mode>): Move further down file.
19893 * config/aarch64/t-aarch64 (s-check-sve-md): Check aarch64-sve2.md too.
19895 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19897 * config/aarch64/iterators.md (SVE_WHILE): Add UNSPEC_WHILERW
19898 and UNSPEC_WHILEWR.
19899 (while_optab_cmp): Handle them.
19900 * config/aarch64/aarch64-sve.md
19901 (*while_<while_optab_cmp><GPI:mode><PRED_ALL:mode>_ptest): Make public
19902 and add a "@" marker.
19903 * config/aarch64/aarch64-sve2.md (check_<raw_war>_ptrs<mode>): Use it
19904 instead of gen_aarch64_sve2_while_ptest.
19905 (@aarch64_sve2_while<cmp_op><GPI:mode><PRED_ALL:mode>_ptest): Delete.
19907 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19909 * config/aarch64/aarch64.md (UNSPEC_WHILE_LE): Rename to...
19910 (UNSPEC_WHILELE): ...this.
19911 (UNSPEC_WHILE_LO): Rename to...
19912 (UNSPEC_WHILELO): ...this.
19913 (UNSPEC_WHILE_LS): Rename to...
19914 (UNSPEC_WHILELS): ...this.
19915 (UNSPEC_WHILE_LT): Rename to...
19916 (UNSPEC_WHILELT): ...this.
19917 * config/aarch64/iterators.md (SVE_WHILE): Update accordingly.
19918 (cmp_op, while_optab_cmp): Likewise.
19919 * config/aarch64/aarch64.c (aarch64_sve_move_pred_via_while): Likewise.
19920 * config/aarch64/aarch64-sve-builtins-base.cc (svwhilele): Likewise.
19921 (svwhilelt): Likewise.
19923 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19925 * config/aarch64/aarch64-sve-builtins-shapes.h (unary_count): Delete.
19926 (unary_to_uint): Define.
19927 * config/aarch64/aarch64-sve-builtins-shapes.cc (unary_count_def)
19928 (unary_count): Rename to...
19929 (unary_to_uint_def, unary_to_uint): ...this.
19930 * config/aarch64/aarch64-sve-builtins-base.def: Update accordingly.
19932 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19934 * config/aarch64/aarch64-sve-builtins-functions.h
19935 (code_for_mode_function): New class.
19936 (CODE_FOR_MODE0, QUIET_CODE_FOR_MODE0): New macros.
19937 * config/aarch64/aarch64-sve-builtins-base.cc (svcompact_impl)
19938 (svext_impl, svmul_lane_impl, svsplice_impl, svtmad_impl): Delete.
19939 (svcompact, svext, svsplice): Use QUIET_CODE_FOR_MODE0.
19940 (svmul_lane, svtmad): Use CODE_FOR_MODE0.
19942 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19944 * config/aarch64/iterators.md (addsub): New code attribute.
19945 * config/aarch64/aarch64-simd.md (aarch64_<su_optab><optab><mode>):
19947 (aarch64_<su_optab>q<addsub><mode>): ...this, making the same change
19948 in the asm string and attributes. Fix indentation.
19949 * config/aarch64/aarch64-sve.md (@aarch64_<su_optab><optab><mode>):
19951 (@aarch64_sve_<optab><mode>): ...this.
19952 * config/aarch64/aarch64-sve-builtins.h
19953 (function_expander::expand_signed_unpred_op): Delete.
19954 * config/aarch64/aarch64-sve-builtins.cc
19955 (function_expander::expand_signed_unpred_op): Likewise.
19956 (function_expander::map_to_rtx_codes): If the optab isn't defined,
19957 try using code_for_aarch64_sve instead.
19958 * config/aarch64/aarch64-sve-builtins-base.cc (svqadd_impl): Delete.
19959 (svqsub_impl): Likewise.
19960 (svqadd, svqsub): Use rtx_code_function instead.
19962 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19964 * config/aarch64/iterators.md (SRHSUB, URHSUB): Delete.
19965 (HADDSUB, sur, addsub): Remove them.
19967 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19969 * tree-nrv.c (pass_return_slot::execute): Handle all internal
19970 functions the same way, rather than singling out those that
19971 aren't mapped directly to optabs.
19973 2020-01-09 Richard Sandiford <richard.sandiford@arm.com>
19975 * target.def (compatible_vector_types_p): New target hook.
19976 * hooks.h (hook_bool_const_tree_const_tree_true): Declare.
19977 * hooks.c (hook_bool_const_tree_const_tree_true): New function.
19978 * doc/tm.texi.in (TARGET_COMPATIBLE_VECTOR_TYPES_P): New hook.
19979 * doc/tm.texi: Regenerate.
19980 * gimple-expr.c: Include target.h.
19981 (useless_type_conversion_p): Use targetm.compatible_vector_types_p.
19982 * config/aarch64/aarch64.c (aarch64_compatible_vector_types_p): New
19984 (TARGET_COMPATIBLE_VECTOR_TYPES_P): Define.
19985 * config/aarch64/aarch64-sve-builtins.cc (gimple_folder::convert_pred):
19986 Use the original predicate if it already has a suitable type.
19988 2020-01-09 Martin Jambor <mjambor@suse.cz>
19990 * cgraph.h (cgraph_edge): Make remove, set_call_stmt, make_direct,
19991 resolve_speculation and redirect_call_stmt_to_callee static. Change
19992 return type of set_call_stmt to cgraph_edge *.
19993 * auto-profile.c (afdo_indirect_call): Adjust call to
19994 redirect_call_stmt_to_callee.
19995 * cgraph.c (cgraph_edge::set_call_stmt): Make return cgraph-edge *,
19996 make the this pointer explicit, adjust self-recursive calls and the
19997 call top make_direct. Return the resulting edge.
19998 (cgraph_edge::remove): Make this pointer explicit.
19999 (cgraph_edge::resolve_speculation): Likewise, adjust call to remove.
20000 (cgraph_edge::make_direct): Likewise, adjust call to
20001 resolve_speculation.
20002 (cgraph_edge::redirect_call_stmt_to_callee): Likewise, also adjust
20003 call to set_call_stmt.
20004 (cgraph_update_edges_for_call_stmt_node): Update call to
20005 set_call_stmt and remove.
20006 * cgraphclones.c (cgraph_node::set_call_stmt_including_clones):
20007 Renamed edge to master_edge. Adjusted calls to set_call_stmt.
20008 (cgraph_node::create_edge_including_clones): Moved "first" definition
20009 of edge to the block where it was used. Adjusted calls to
20011 (cgraph_node::remove_symbol_and_inline_clones): Adjust call to
20012 cgraph_edge::remove.
20013 * cgraphunit.c (walk_polymorphic_call_targets): Adjusted calls to
20014 make_direct and redirect_call_stmt_to_callee.
20015 * ipa-fnsummary.c (redirect_to_unreachable): Adjust calls to
20016 resolve_speculation and make_direct.
20017 * ipa-inline-transform.c (inline_transform): Adjust call to
20018 redirect_call_stmt_to_callee.
20019 (check_speculations_1):: Adjust call to resolve_speculation.
20020 * ipa-inline.c (resolve_noninline_speculation): Adjust call to
20021 resolve-speculation.
20022 (inline_small_functions): Adjust call to resolve_speculation.
20023 (ipa_inline): Likewise.
20024 * ipa-prop.c (ipa_make_edge_direct_to_target): Adjust call to
20026 * ipa-visibility.c (function_and_variable_visibility): Make iteration
20027 safe with regards to edge removal, adjust calls to
20028 redirect_call_stmt_to_callee.
20029 * ipa.c (walk_polymorphic_call_targets): Adjust calls to make_direct
20030 and redirect_call_stmt_to_callee.
20031 * multiple_target.c (create_dispatcher_calls): Adjust call to
20032 redirect_call_stmt_to_callee
20033 (redirect_to_specific_clone): Likewise.
20034 * tree-cfgcleanup.c (delete_unreachable_blocks_update_callgraph):
20035 Adjust calls to cgraph_edge::remove.
20036 * tree-inline.c (copy_bb): Adjust call to set_call_stmt.
20037 (redirect_all_calls): Adjust call to redirect_call_stmt_to_callee.
20038 (expand_call_inline): Adjust call to cgraph_edge::remove.
20040 2020-01-09 Martin Liska <mliska@suse.cz>
20042 * params.opt: Set Optimization for
20043 param_max_speculative_devirt_maydefs.
20045 2020-01-09 Martin Sebor <msebor@redhat.com>
20047 PR middle-end/93200
20049 * builtins.c (compute_objsize): Avoid handling MEM_REFs of vector type.
20051 2020-01-09 Martin Liska <mliska@suse.cz>
20053 * auto-profile.c (auto_profile): Use opt_for_fn
20055 * ipa-cp.c (ipcp_lattice::add_value): Likewise.
20056 (propagate_vals_across_arith_jfunc): Likewise.
20057 (hint_time_bonus): Likewise.
20058 (incorporate_penalties): Likewise.
20059 (good_cloning_opportunity_p): Likewise.
20060 (perform_estimation_of_a_value): Likewise.
20061 (estimate_local_effects): Likewise.
20062 (ipcp_propagate_stage): Likewise.
20063 * ipa-fnsummary.c (decompose_param_expr): Likewise.
20064 (set_switch_stmt_execution_predicate): Likewise.
20065 (analyze_function_body): Likewise.
20066 * ipa-inline-analysis.c (offline_size): Likewise.
20067 * ipa-inline.c (early_inliner): Likewise.
20068 * ipa-prop.c (ipa_analyze_node): Likewise.
20069 (ipcp_transform_function): Likewise.
20070 * ipa-sra.c (process_scan_results): Likewise.
20071 (ipa_sra_summarize_function): Likewise.
20072 * params.opt: Rename ipcp-unit-growth to
20073 ipa-cp-unit-growth. Add Optimization for various
20074 IPA-related parameters.
20076 2020-01-09 Richard Biener <rguenther@suse.de>
20078 PR middle-end/93054
20079 * gimplify.c (gimplify_expr): Deal with NOP definitions.
20081 2020-01-09 Richard Biener <rguenther@suse.de>
20083 PR tree-optimization/93040
20084 * gimple-ssa-store-merging.c (find_bswap_or_nop): Raise search limit.
20086 2020-01-09 Georg-Johann Lay <avr@gjlay.de>
20088 * common/config/avr/avr-common.c (avr_option_optimization_table)
20089 [OPT_LEVELS_1_PLUS]: Set -fsplit-wide-types-early.
20091 2020-01-09 Martin Liska <mliska@suse.cz>
20093 * cgraphclones.c (symbol_table::materialize_all_clones):
20094 Use cgraph_node::dump_name.
20096 2020-01-09 Jakub Jelinek <jakub@redhat.com>
20098 PR inline-asm/93202
20099 * config/riscv/riscv.c (riscv_print_operand_reloc): Use
20100 output_operand_lossage instead of gcc_unreachable.
20101 * doc/md.texi (riscv f constraint): Fix typo.
20104 * config/i386/i386.md (subv<mode>4): Use SWIDWI iterator instead of
20105 SWI. Use <general_hilo_operand> instead of <general_operand>. Use
20106 CONST_SCALAR_INT_P instead of CONST_INT_P.
20107 (*subv<mode>4_1): Rename to ...
20108 (subv<mode>4_1): ... this.
20109 (*subv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
20110 define_insn_and_split patterns.
20111 (*subv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
20114 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20116 * vec.c (class selftest::count_dtor): New class.
20117 (selftest::test_auto_delete_vec): New test.
20118 (selftest::vec_c_tests): Call it.
20119 * vec.h (class auto_delete_vec): New class template.
20120 (auto_delete_vec<T>::~auto_delete_vec): New dtor.
20122 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20124 * sbitmap.h (auto_sbitmap): Add operator const_sbitmap.
20126 2020-01-08 Jim Wilson <jimw@sifive.com>
20128 * config/riscv/riscv.c (riscv_legitimize_tls_address): Ifdef out
20129 use of TLS_MODEL_LOCAL_EXEC when not pic.
20131 2020-01-08 David Malcolm <dmalcolm@redhat.com>
20133 * hash-map-tests.c (selftest::test_map_of_strings_to_int): Fix
20136 2020-01-08 Jakub Jelinek <jakub@redhat.com>
20139 * config/i386/i386.md (*stack_protect_set_2_<mode> peephole2,
20140 *stack_protect_set_3 peephole2): Also check that the second
20141 insns source is general_operand.
20144 * config/i386/i386.md (addcarry<mode>_0): Use nonimmediate_operand
20145 predicate for output operand instead of register_operand.
20146 (addcarry<mode>, addcarry<mode>_1): Likewise. Add alternative with
20147 memory destination and non-memory operands[2].
20149 2020-01-08 Martin Liska <mliska@suse.cz>
20151 * cgraph.c (cgraph_node::dump): Use ::dump_name or
20152 ::dump_asm_name instead of (::name or ::asm_name).
20153 * cgraphclones.c (symbol_table::materialize_all_clones): Likewise.
20154 * cgraphunit.c (walk_polymorphic_call_targets): Likewise.
20155 (analyze_functions): Likewise.
20156 (expand_all_functions): Likewise.
20157 * ipa-cp.c (ipcp_cloning_candidate_p): Likewise.
20158 (propagate_bits_across_jump_function): Likewise.
20159 (dump_profile_updates): Likewise.
20160 (ipcp_store_bits_results): Likewise.
20161 (ipcp_store_vr_results): Likewise.
20162 * ipa-devirt.c (dump_targets): Likewise.
20163 * ipa-fnsummary.c (analyze_function_body): Likewise.
20164 * ipa-hsa.c (check_warn_node_versionable): Likewise.
20165 (process_hsa_functions): Likewise.
20166 * ipa-icf.c (sem_item_optimizer::merge_classes): Likewise.
20167 (set_alias_uids): Likewise.
20168 * ipa-inline-transform.c (save_inline_function_body): Likewise.
20169 * ipa-inline.c (recursive_inlining): Likewise.
20170 (inline_to_all_callers_1): Likewise.
20171 (ipa_inline): Likewise.
20172 * ipa-profile.c (ipa_propagate_frequency_1): Likewise.
20173 (ipa_propagate_frequency): Likewise.
20174 * ipa-prop.c (ipa_make_edge_direct_to_target): Likewise.
20175 (remove_described_reference): Likewise.
20176 * ipa-pure-const.c (worse_state): Likewise.
20177 (check_retval_uses): Likewise.
20178 (analyze_function): Likewise.
20179 (propagate_pure_const): Likewise.
20180 (propagate_nothrow): Likewise.
20181 (dump_malloc_lattice): Likewise.
20182 (propagate_malloc): Likewise.
20183 (pass_local_pure_const::execute): Likewise.
20184 * ipa-visibility.c (optimize_weakref): Likewise.
20185 (function_and_variable_visibility): Likewise.
20186 * ipa.c (symbol_table::remove_unreachable_nodes): Likewise.
20187 (ipa_discover_variable_flags): Likewise.
20188 * lto-streamer-out.c (output_function): Likewise.
20189 (output_constructor): Likewise.
20190 * tree-inline.c (copy_bb): Likewise.
20191 * tree-ssa-structalias.c (ipa_pta_execute): Likewise.
20192 * varpool.c (symbol_table::remove_unreferenced_decls): Likewise.
20194 2020-01-08 Richard Biener <rguenther@suse.de>
20196 PR middle-end/93199
20197 * tree-eh.c (sink_clobbers): Update virtual operands for
20198 the first and last stmt only. Add a dry-run capability.
20199 (pass_lower_eh_dispatch::execute): Perform clobber sinking
20200 after CFG manipulations and in RPO order to catch all
20201 secondary opportunities reliably.
20203 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20206 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
20208 2019-01-08 Richard Biener <rguenther@suse.de>
20210 PR middle-end/93199
20211 * gimple-fold.c (rewrite_to_defined_overflow): Mark stmt modified.
20212 * tree-ssa-loop-im.c (move_computations_worker): Properly adjust
20213 virtual operand, also updating SSA use.
20214 * gimple-loop-interchange.cc (loop_cand::undo_simple_reduction):
20215 Update stmt after resetting virtual operand.
20216 (tree_loop_interchange::move_code_to_inner_loop): Likewise.
20217 * gimple-iterator.c (gsi_remove): When not removing the stmt
20218 permanently do not delink immediate uses or mark the stmt modified.
20220 2020-01-08 Martin Liska <mliska@suse.cz>
20222 * ipa-fnsummary.c (dump_ipa_call_summary): Use symtab_node::dump_name.
20223 (ipa_call_context::estimate_size_and_time): Likewise.
20224 (inline_analyze_function): Likewise.
20226 2020-01-08 Martin Liska <mliska@suse.cz>
20228 * cgraph.c (cgraph_node::dump): Use systematically
20231 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20233 Add -nodevicespecs option for avr.
20236 * config/avr/avr.opt (-nodevicespecs): New driver option.
20237 * config/avr/driver-avr.c (avr_devicespecs_file): Only issue
20238 "-specs=device-specs/..." if that option is not set.
20239 * doc/invoke.texi (AVR Options) <-nodevicespecs>: Document.
20241 2020-01-08 Georg-Johann Lay <avr@gjlay.de>
20243 Implement 64-bit double functions for avr.
20246 * config.gcc (tm_defines) [target=avr]: Support --with-libf7,
20247 --with-double-comparison.
20248 * doc/install.texi: Document them.
20249 * config/avr/avr-c.c (avr_cpu_cpp_builtins)
20250 <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS>
20251 <WITH_DOUBLE_COMPARISON>: New built-in defines.
20252 * doc/invoke.texi (AVR Built-in Macros): Document them.
20253 * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New.
20254 * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function.
20255 * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro.
20257 2020-01-08 Richard Earnshaw <rearnsha@arm.com>
20260 * config/arm/t-multilib (MULTILIB_MATCHES): Add rules to match
20261 armv7-a{+mp,+sec,+mp+sec} to appropriate armv7 multilib variants
20262 when only building rm-profile multilibs.
20264 2020-01-08 Feng Xue <fxue@os.amperecomputing.com>
20267 * ipa-cp.c (self_recursively_generated_p): Find matched aggregate
20268 lattice for a value to check.
20269 (propagate_vals_across_arith_jfunc): Add an assertion to ensure
20270 finite propagation in self-recursive scc.
20272 2020-01-08 Luo Xiong Hu <luoxhu@linux.ibm.com>
20274 * ipa-inline.c (caller_growth_limits): Restore the AND.
20276 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
20278 * config/gcn/gcn-valu.md (VEC_1REG_INT_ALT): Delete iterator.
20279 (VEC_ALLREG_ALT): New iterator.
20280 (VEC_ALLREG_INT_MODE): New iterator.
20281 (VCMP_MODE): New iterator.
20282 (VCMP_MODE_INT): New iterator.
20283 (vec_cmpu<mode>di): Use VCMP_MODE_INT.
20284 (vec_cmp<u>v64qidi): New define_expand.
20285 (vec_cmp<mode>di_exec): Use VCMP_MODE.
20286 (vec_cmpu<mode>di_exec): New define_expand.
20287 (vec_cmp<u>v64qidi_exec): New define_expand.
20288 (vec_cmp<mode>di_dup): Use VCMP_MODE.
20289 (vec_cmp<mode>di_dup_exec): Use VCMP_MODE.
20290 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>): Rename ...
20291 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>): ... to this.
20292 (vcond<VEC_ALL1REG_MODE:mode><VEC_1REG_ALT:mode>_exec): Rename ...
20293 (vcond<VEC_ALLREG_MODE:mode><VEC_ALLREG_ALT:mode>_exec): ... to this.
20294 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>): Rename ...
20295 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>): ... to this.
20296 (vcondu<VEC_ALL1REG_MODE:mode><VEC_1REG_INT_ALT:mode>_exec): Rename ...
20297 (vcondu<VEC_ALLREG_MODE:mode><VEC_ALLREG_INT_MODE:mode>_exec): ... to
20299 * config/gcn/gcn.c (print_operand): Fix 8 and 16 bit suffixes.
20300 * config/gcn/gcn.md (expander): Add sign_extend and zero_extend.
20302 2020-01-07 Andrew Stubbs <ams@codesourcery.com>
20304 * config/gcn/constraints.md (DA): Update description and match.
20306 (Db): New constraint.
20307 * config/gcn/gcn-protos.h (gcn_inline_constant64_p): Add second
20309 * config/gcn/gcn.c (gcn_inline_constant64_p): Add 'mixed' parameter.
20310 Implement 'Db' mixed immediate type.
20311 * config/gcn/gcn-valu.md (addcv64si3<exec_vcc>): Rework constraints.
20312 (addcv64si3_dup<exec_vcc>): Delete.
20313 (subcv64si3<exec_vcc>): Rework constraints.
20314 (addv64di3): Rework constraints.
20315 (addv64di3_exec): Rework constraints.
20316 (subv64di3): Rework constraints.
20317 (addv64di3_dup): Delete.
20318 (addv64di3_dup_exec): Delete.
20319 (addv64di3_zext): Rework constraints.
20320 (addv64di3_zext_exec): Rework constraints.
20321 (addv64di3_zext_dup): Rework constraints.
20322 (addv64di3_zext_dup_exec): Rework constraints.
20323 (addv64di3_zext_dup2): Rework constraints.
20324 (addv64di3_zext_dup2_exec): Rework constraints.
20325 (addv64di3_sext_dup2): Rework constraints.
20326 (addv64di3_sext_dup2_exec): Rework constraints.
20328 2020-01-07 Andre Vieira <andre.simoesdiasvieira@arm.com>
20330 * doc/sourcebuild.texi (arm_little_endian, arm_nothumb): Documented
20331 existing target checks.
20333 2020-01-07 Richard Biener <rguenther@suse.de>
20335 * doc/install.texi: Bump minimal supported MPC version.
20337 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
20339 * langhooks-def.h (lhd_simulate_enum_decl): Declare.
20340 (LANG_HOOKS_SIMULATE_ENUM_DECL): Use it.
20341 * langhooks.c: Include stor-layout.h.
20342 (lhd_simulate_enum_decl): New function.
20343 * config/aarch64/aarch64-sve-builtins.cc (init_builtins): Call
20344 handle_arm_sve_h for the LTO frontend.
20345 (register_vector_type): Cope with null returns from pushdecl.
20347 2020-01-07 Richard Sandiford <richard.sandiford@arm.com>
20349 * config/aarch64/aarch64-protos.h (aarch64_sve::svbool_type_p)
20350 (aarch64_sve::nvectors_if_data_type): Replace with...
20351 (aarch64_sve::builtin_type_p): ...this.
20352 * config/aarch64/aarch64-sve-builtins.cc: Include attribs.h.
20353 (find_vector_type): Delete.
20354 (add_sve_type_attribute): New function.
20355 (lookup_sve_type_attribute): Likewise.
20356 (register_builtin_types): Add an "SVE type" attribute to each type.
20357 (register_tuple_type): Likewise.
20358 (svbool_type_p, nvectors_if_data_type): Delete.
20359 (mangle_builtin_type): Use lookup_sve_type_attribute.
20360 (builtin_type_p): Likewise. Add an overload that returns the
20361 number of constituent vector and predicate registers.
20362 * config/aarch64/aarch64.c (aarch64_sve_argument_p): Delete.
20363 (aarch64_returns_value_in_sve_regs_p): Use aarch64_sve::builtin_type_p
20364 instead of aarch64_sve_argument_p.
20365 (aarch64_takes_arguments_in_sve_regs_p): Likewise.
20366 (aarch64_pass_by_reference): Likewise.
20367 (aarch64_function_value_1): Likewise.
20368 (aarch64_return_in_memory): Likewise.
20369 (aarch64_layout_arg): Likewise.
20371 2020-01-07 Jakub Jelinek <jakub@redhat.com>
20373 PR tree-optimization/93156
20374 * tree-ssa-ccp.c (bit_value_binop): For x * x note that the second
20375 least significant bit is always clear.
20377 PR tree-optimization/93118
20378 * match.pd ((x >> c) << c -> x & (-1<<c)): Add nop_convert?. Add new
20379 simplifier with two intermediate conversions.
20381 2020-01-07 Martin Liska <mliska@suse.cz>
20383 * params.opt: Add Optimization for various parameters.
20385 2020-01-07 Martin Liska <mliska@suse.cz>
20388 * doc/extend.texi: Explain cloning for target_clone
20391 2020-01-07 Martin Liska <mliska@suse.cz>
20393 PR tree-optimization/92860
20394 * common.opt: Make in Optimization option
20395 as it is affected by -O0, which is an Optimization
20397 * tree-inline.c (tree_inlinable_function_p):
20398 Use opt_for_fn for warn_inline.
20399 (expand_call_inline): Likewise.
20401 2020-01-07 Martin Liska <mliska@suse.cz>
20403 PR tree-optimization/92860
20404 * common.opt: Make flag_ree as optimization
20407 2020-01-07 Martin Liska <mliska@suse.cz>
20409 PR optimization/92860
20410 * params.opt: Mark param_min_crossjump_insns with Optimization
20413 2020-01-07 Luo Xiong Hu <luoxhu@linux.ibm.com>
20415 * ipa-inline-analysis.c (estimate_growth): Fix typo.
20416 * ipa-inline.c (caller_growth_limits): Use OR instead of AND.
20418 2020-01-06 Michael Meissner <meissner@linux.ibm.com>
20420 * config/rs6000/rs6000.c (hard_reg_and_mode_to_addr_mask): New
20421 helper function to return the valid addressing formats for a given
20422 hard register and mode.
20423 (rs6000_adjust_vec_address): Call hard_reg_and_mode_to_addr_mask.
20425 * config/rs6000/constraints.md (Q constraint): Update
20427 * doc/md.texi (RS/6000 constraints): Update 'Q' cosntraint
20430 * config/rs6000/vsx.md (vsx_extract_<mode>_var, VSX_D iterator):
20431 Use 'Q' for doing vector extract from memory.
20432 (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from
20434 (vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): Use 'Q' for
20435 doing vector extract from memory.
20436 (vsx_extract_<mode>_<VS_scalar>mode_var): Use 'Q' for doing vector
20437 extract from memory.
20439 * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support
20440 for the offset being 34-bits when -mcpu=future is used.
20442 2020-01-06 John David Anglin <danglin@gcc.gnu.org>
20444 * config/pa/pa.md: Revert change to use ordered_comparison_operator
20445 instead of cmpib_comparison_operator in cmpib patterns.
20446 * config/pa/predicates.md (cmpib_comparison_operator): Revert removal
20447 of cmpib_comparison_operator. Revise comment.
20449 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
20451 * tree-vect-slp.c (vect_build_slp_tree_1): Require all shifts
20452 in an IFN_DIV_POW2 node to be equal.
20454 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
20456 * tree-vect-stmts.c (vect_check_load_store_mask): Rename to...
20457 (vect_check_scalar_mask): ...this.
20458 (vectorizable_store, vectorizable_load): Update call accordingly.
20459 (vectorizable_call): Use vect_check_scalar_mask to check the mask
20460 argument in calls to conditional internal functions.
20462 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
20464 * config/gcn/gcn-valu.md (subv64di3): Use separate alternatives for
20465 '0' matching inputs.
20466 (subv64di3_exec): Likewise.
20468 2020-01-06 Bryan Stenson <bryan@siliconvortex.com>
20470 * config/mips/mips.c (vr4130_align_insns): Fix typo.
20471 * doc/md.texi (movstr): Likewise.
20473 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
20475 * config/gcn/gcn-valu.md (vec_extract<mode><scalar_mode>): Add early
20478 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
20480 * config/aarch64/t-aarch64 ($(srcdir)/config/aarch64/aarch64-tune.md):
20482 (s-aarch64-tune-md): ...this new stamp file. Pipe the new contents
20483 to a temporary file and use move-if-change to update the real
20484 file where necessary.
20486 2020-01-06 Richard Sandiford <richard.sandiford@arm.com>
20488 * config/aarch64/aarch64-sve.md (@aarch64_sel_dup<mode>): Use Upl
20489 rather than Upa for CPY /M.
20491 2020-01-06 Andrew Stubbs <ams@codesourcery.com>
20493 * config/gcn/gcn.c (gcn_inline_constant_p): Allow 64 as an inline
20496 2020-01-06 Martin Liska <mliska@suse.cz>
20498 PR tree-optimization/92860
20499 * params.opt: Mark param_max_combine_insns with Optimization
20502 2020-01-05 Jakub Jelinek <jakub@redhat.com>
20505 * config/i386/i386.md (SWIDWI): New mode iterator.
20506 (DWI, dwi): Add TImode variants.
20507 (addv<mode>4): Use SWIDWI iterator instead of SWI. Use
20508 <general_hilo_operand> instead of <general_operand>. Use
20509 CONST_SCALAR_INT_P instead of CONST_INT_P.
20510 (*addv<mode>4_1): Rename to ...
20511 (addv<mode>4_1): ... this.
20512 (QWI): New mode attribute.
20513 (*addv<dwi>4_doubleword, *addv<dwi>4_doubleword_1): New
20514 define_insn_and_split patterns.
20515 (*addv<mode>4_overflow_1, *addv<mode>4_overflow_2): New define_insn
20517 (uaddv<mode>4): Use SWIDWI iterator instead of SWI. Use
20518 <general_hilo_operand> instead of <general_operand>.
20519 (*addcarry<mode>_1): New define_insn.
20520 (*add<dwi>3_doubleword_cc_overflow_1): New define_insn_and_split.
20522 2020-01-03 Konstantin Kharlamov <Hi-Angel@yandex.ru>
20524 * gdbinit.in (pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, pdd, pbs, pbm):
20525 Use "call" instead of "set".
20527 2020-01-03 Martin Jambor <mjambor@suse.cz>
20530 * ipa-cp.c (print_all_lattices): Skip functions without info.
20532 2020-01-03 Jakub Jelinek <jakub@redhat.com>
20535 * config/i386/i386-options.c (ix86_simd_clone_adjust): If
20536 TARGET_PREFER_AVX128, use prefer-vector-width=256 for 'c' and 'd'
20537 simd clones. If TARGET_PREFER_AVX256, use prefer-vector-width=512
20538 for 'e' simd clones.
20541 * config/i386/i386.opt (x_prefer_vector_width_type): Remove TargetSave
20543 (mprefer-vector-width=): Add Save.
20544 * config/i386/i386-options.c (ix86_target_string): Add PVW argument, print
20545 -mprefer-vector-width= if non-zero. Fix up -mfpmath= comment.
20546 (ix86_debug_options, ix86_function_specific_print): Adjust
20547 ix86_target_string callers.
20548 (ix86_valid_target_attribute_inner_p): Handle prefer-vector-width=.
20549 (ix86_valid_target_attribute_tree): Likewise.
20550 * config/i386/i386-options.h (ix86_target_string): Add PVW argument.
20551 * config/i386/i386-expand.c (ix86_expand_builtin): Adjust
20552 ix86_target_string caller.
20555 * config/i386/i386.md (abs<mode>2): Use expand_simple_binop instead of
20556 emitting ASHIFTRT, XOR and MINUS by hand. Use gen_int_mode with QImode
20557 instead of gen_int_shift_amount + convert_modes.
20559 PR rtl-optimization/93088
20560 * loop-iv.c (find_single_def_src): Punt after looking through
20561 128 reg copies for regs with single definitions. Move definitions
20564 2020-01-02 Dennis Zhang <dennis.zhang@arm.com>
20566 * config/arm/arm-c.c (arm_cpu_builtins): Define
20567 __ARM_FEATURE_MATMUL_INT8, __ARM_FEATURE_BF16_VECTOR_ARITHMETIC,
20568 __ARM_FEATURE_BF16_SCALAR_ARITHMETIC, and
20569 __ARM_BF16_FORMAT_ALTERNATIVE when enabled.
20570 * config/arm/arm-cpus.in (armv8_6, i8mm, bf16): New features.
20571 * config/arm/arm-tables.opt: Regenerated.
20572 * config/arm/arm.c (arm_option_reconfigure_globals): Initialize
20573 arm_arch_i8mm and arm_arch_bf16 when enabled.
20574 * config/arm/arm.h (TARGET_I8MM): New macro.
20575 (TARGET_BF16_FP, TARGET_BF16_SIMD): Likewise.
20576 * config/arm/t-aprofile: Add matching rules for -march=armv8.6-a.
20577 * config/arm/t-arm-elf (all_v8_archs): Add armv8.6-a.
20578 * config/arm/t-multilib: Add matching rules for -march=armv8.6-a.
20579 (v8_6_a_simd_variants): New.
20580 (v8_*_a_simd_variants): Add i8mm and bf16.
20581 * doc/invoke.texi (armv8.6-a, i8mm, bf16): Document new options.
20583 2020-01-02 Jakub Jelinek <jakub@redhat.com>
20586 * predict.c (compute_function_frequency): Don't call
20587 warn_function_cold on functions that already have cold attribute.
20589 2020-01-01 John David Anglin <danglin@gcc.gnu.org>
20592 * config/pa/pa.c (pa_elf_select_rtx_section): New. Put references to
20593 COMDAT group function labels in .data.rel.ro.local section.
20594 * config/pa/pa32-linux.h (TARGET_ASM_SELECT_RTX_SECTION): Define.
20597 * config/pa/pa.md (scc): Use ordered_comparison_operator instead of
20598 comparison_operator in B and S integer comparisons. Likewise, use
20599 ordered_comparison_operator instead of cmpib_comparison_operator in
20601 * config/pa/predicates.md (cmpib_comparison_operator): Remove.
20603 2020-01-01 Jakub Jelinek <jakub@redhat.com>
20605 Update copyright years.
20607 * gcc.c (process_command): Update copyright notice dates.
20608 * gcov-dump.c (print_version): Ditto.
20609 * gcov.c (print_version): Ditto.
20610 * gcov-tool.c (print_version): Ditto.
20611 * gengtype.c (create_file): Ditto.
20612 * doc/cpp.texi: Bump @copying's copyright year.
20613 * doc/cppinternals.texi: Ditto.
20614 * doc/gcc.texi: Ditto.
20615 * doc/gccint.texi: Ditto.
20616 * doc/gcov.texi: Ditto.
20617 * doc/install.texi: Ditto.
20618 * doc/invoke.texi: Ditto.
20620 2020-01-01 Jan Hubicka <hubicka@ucw.cz>
20622 * ipa.c (walk_polymorphic_call_targets): Fix updating of overall
20625 2020-01-01 Jakub Jelinek <jakub@redhat.com>
20627 PR tree-optimization/93098
20628 * match.pd (popcount): For shift amounts, use integer_onep
20629 or wi::to_widest () == cst instead of tree_to_uhwi () == cst
20630 tests. Make sure that precision is power of two larger than or equal
20631 to 16. Ensure shift is never negative. Use HOST_WIDE_INT_UC macro
20632 instead of ULL suffixed constants. Formatting fixes.
20634 Copyright (C) 2020 Free Software Foundation, Inc.
20636 Copying and distribution of this file, with or without modification,
20637 are permitted in any medium without royalty provided the copyright
20638 notice and this notice are preserved.