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1 | /* Save and restore call-clobbered registers which are live across a call. | |
2 | Copyright (C) 1989, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "rtl.h" | |
22 | #include "insn-config.h" | |
23 | #include "flags.h" | |
24 | #include "regs.h" | |
25 | #include "hard-reg-set.h" | |
26 | #include "recog.h" | |
27 | #include "basic-block.h" | |
28 | #include "reload.h" | |
29 | #include "expr.h" | |
30 | ||
31 | /* A mode for each hard register that we can save. This mode is wide enough | |
32 | to save the entire contents of the register and will be used whenever the | |
33 | register must be saved because it is live. */ | |
34 | ||
35 | static enum machine_mode regno_save_mode[FIRST_PSEUDO_REGISTER]; | |
36 | ||
37 | /* For each hard register, a place on the stack where it can be saved, | |
38 | if needed. */ | |
39 | ||
40 | static rtx regno_save_mem[FIRST_PSEUDO_REGISTER]; | |
41 | ||
42 | /* We will only make a register eligible for caller-save if it can be | |
43 | saved in its widest mode with a simple SET insn as long as the memory | |
44 | address is valid. We record the INSN_CODE is those insns here since | |
45 | when we emit them, the addresses might not be valid, so they might not | |
46 | be recognized. */ | |
47 | ||
48 | static enum insn_code reg_save_code[FIRST_PSEUDO_REGISTER]; | |
49 | static enum insn_code reg_restore_code[FIRST_PSEUDO_REGISTER]; | |
50 | ||
51 | /* Set of hard regs currently live (during scan of all insns). */ | |
52 | ||
53 | static HARD_REG_SET hard_regs_live; | |
54 | ||
55 | /* Set of hard regs currently residing in save area (during insn scan). */ | |
56 | ||
57 | static HARD_REG_SET hard_regs_saved; | |
58 | ||
59 | /* Number of registers currently in hard_regs_saved. */ | |
60 | ||
61 | int n_regs_saved; | |
62 | ||
63 | static void set_reg_live (); | |
64 | static void clear_reg_live (); | |
65 | static void restore_referenced_regs (); | |
66 | static void insert_save_restore (); | |
67 | \f | |
68 | /* Return a machine mode that is legitimate for hard reg REGNO and large | |
69 | enough to save the whole register. If we can't find one, | |
70 | return VOIDmode. */ | |
71 | ||
72 | static enum machine_mode | |
73 | choose_hard_reg_mode (regno) | |
74 | int regno; | |
75 | { | |
76 | enum machine_mode found_mode = VOIDmode, mode; | |
77 | ||
78 | /* We first look for the largest integer mode that can be validly | |
79 | held in REGNO. If none, we look for the largest floating-point mode. | |
80 | If we still didn't find a valid mode, try CCmode. */ | |
81 | ||
82 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
83 | mode = GET_MODE_WIDER_MODE (mode)) | |
84 | if (HARD_REGNO_NREGS (regno, mode) == 1 | |
85 | && HARD_REGNO_MODE_OK (regno, mode)) | |
86 | found_mode = mode; | |
87 | ||
88 | if (found_mode != VOIDmode) | |
89 | return found_mode; | |
90 | ||
91 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
92 | mode = GET_MODE_WIDER_MODE (mode)) | |
93 | if (HARD_REGNO_NREGS (regno, mode) == 1 | |
94 | && HARD_REGNO_MODE_OK (regno, mode)) | |
95 | found_mode = mode; | |
96 | ||
97 | if (found_mode != VOIDmode) | |
98 | return found_mode; | |
99 | ||
100 | if (HARD_REGNO_NREGS (regno, CCmode) == 1 | |
101 | && HARD_REGNO_MODE_OK (regno, CCmode)) | |
102 | return CCmode; | |
103 | ||
104 | /* We can't find a mode valid for this register. */ | |
105 | return VOIDmode; | |
106 | } | |
107 | \f | |
108 | /* Initialize for caller-save. | |
109 | ||
110 | Look at all the hard registers that are used by a call and for which | |
111 | regclass.c has not already excluded from being used across a call. | |
112 | ||
113 | Ensure that we can find a mode to save the register and that there is a | |
114 | simple insn to save and restore the register. This latter check avoids | |
115 | problems that would occur if we tried to save the MQ register of some | |
116 | machines directly into memory. */ | |
117 | ||
118 | void | |
119 | init_caller_save () | |
120 | { | |
121 | char *first_obj = (char *) oballoc (0); | |
122 | rtx addr_reg; | |
123 | int offset; | |
124 | rtx address; | |
125 | int i; | |
126 | ||
127 | /* First find all the registers that we need to deal with and all | |
128 | the modes that they can have. If we can't find a mode to use, | |
129 | we can't have the register live over calls. */ | |
130 | ||
131 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
132 | { | |
133 | if (call_used_regs[i] && ! call_fixed_regs[i]) | |
134 | { | |
135 | regno_save_mode[i] = choose_hard_reg_mode (i); | |
136 | if (regno_save_mode[i] == VOIDmode) | |
137 | { | |
138 | call_fixed_regs[i] = 1; | |
139 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
140 | } | |
141 | } | |
142 | else | |
143 | regno_save_mode[i] = VOIDmode; | |
144 | } | |
145 | ||
146 | /* The following code tries to approximate the conditions under which | |
147 | we can easily save and restore a register without scratch registers or | |
148 | other complexities. It will usually work, except under conditions where | |
149 | the validity of an insn operand is dependent on the address offset. | |
150 | No such cases are currently known. | |
151 | ||
152 | We first find a typical offset from some BASE_REG_CLASS register. | |
153 | This address is chosen by finding the first register in the class | |
154 | and by finding the smallest power of two that is a valid offset from | |
155 | that register in every mode we will use to save registers. */ | |
156 | ||
157 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
158 | if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) | |
159 | break; | |
160 | ||
161 | if (i == FIRST_PSEUDO_REGISTER) | |
162 | abort (); | |
163 | ||
164 | addr_reg = gen_rtx (REG, Pmode, i); | |
165 | ||
166 | for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
167 | { | |
168 | address = gen_rtx (PLUS, Pmode, addr_reg, | |
169 | gen_rtx (CONST_INT, VOIDmode, offset)); | |
170 | ||
171 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
172 | if (regno_save_mode[i] != VOIDmode | |
173 | && ! strict_memory_address_p (regno_save_mode[i], address)) | |
174 | break; | |
175 | ||
176 | if (i == FIRST_PSEUDO_REGISTER) | |
177 | break; | |
178 | } | |
179 | ||
180 | /* If we didn't find a valid address, we must use register indirect. */ | |
181 | if (offset == 0) | |
182 | address = addr_reg; | |
183 | ||
184 | /* Next we try to form an insn to save and restore the register. We | |
185 | see if such an insn is recognized and meets its constraints. */ | |
186 | ||
187 | start_sequence (); | |
188 | ||
189 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
190 | if (regno_save_mode[i] != VOIDmode) | |
191 | { | |
192 | rtx mem = gen_rtx (MEM, regno_save_mode[i], address); | |
193 | rtx reg = gen_rtx (REG, regno_save_mode[i], i); | |
194 | rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); | |
195 | rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); | |
196 | rtx saveinsn = emit_insn (savepat); | |
197 | rtx restinsn = emit_insn (restpat); | |
198 | int ok; | |
199 | ||
200 | reg_save_code[i] = recog_memoized (saveinsn); | |
201 | reg_restore_code[i] = recog_memoized (restinsn); | |
202 | ||
203 | /* Now extract both insns and see if we can meet their constraints. */ | |
204 | ok = (reg_save_code[i] != -1 && reg_restore_code[i] != -1); | |
205 | if (ok) | |
206 | { | |
207 | insn_extract (saveinsn); | |
208 | ok = constrain_operands (reg_save_code[i], 1); | |
209 | insn_extract (restinsn); | |
210 | ok &= constrain_operands (reg_restore_code[i], 1); | |
211 | } | |
212 | ||
213 | if (! ok) | |
214 | { | |
215 | call_fixed_regs[i] = 1; | |
216 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
217 | } | |
218 | } | |
219 | ||
220 | end_sequence (); | |
221 | ||
222 | obfree (first_obj); | |
223 | } | |
224 | \f | |
225 | /* Initialize save areas by showing that we haven't allocated any yet. */ | |
226 | ||
227 | void | |
228 | init_save_areas () | |
229 | { | |
230 | int i; | |
231 | ||
232 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
233 | regno_save_mem[i] = 0; | |
234 | } | |
235 | ||
236 | /* Allocate save areas for any hard registers that might need saving. | |
237 | We take a conservative approach here and look for call-clobbered hard | |
238 | registers that are assigned to pseudos that cross calls. This may | |
239 | overestimate slightly (especially if some of these registers are later | |
240 | used as spill registers), but it should not be significant. | |
241 | ||
242 | Then perform register elimination in the addresses of the save area | |
243 | locations; return 1 if all eliminated addresses are strictly valid. | |
244 | We assume that our caller has set up the elimination table to the | |
245 | worst (largest) possible offsets. | |
246 | ||
247 | Set *PCHANGED to 1 if we had to allocate some memory for the save area. */ | |
248 | ||
249 | int | |
250 | setup_save_areas (pchanged) | |
251 | int *pchanged; | |
252 | { | |
253 | int ok = 1; | |
254 | int i; | |
255 | ||
256 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
257 | if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) | |
258 | { | |
259 | int regno = reg_renumber[i]; | |
260 | int endregno | |
261 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); | |
262 | int j; | |
263 | ||
264 | for (j = regno; j < endregno; j++) | |
265 | if (call_used_regs[j] && regno_save_mem[j] == 0) | |
266 | { | |
267 | regno_save_mem[j] | |
268 | = assign_stack_local (regno_save_mode[j], | |
269 | GET_MODE_SIZE (regno_save_mode[j]), 0); | |
270 | *pchanged = 1; | |
271 | } | |
272 | } | |
273 | ||
274 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
275 | if (regno_save_mem[i] != 0) | |
276 | ok &= strict_memory_address_p (regno_save_mode[i], | |
277 | XEXP (eliminate_regs (regno_save_mem[i], | |
278 | 0, 0), | |
279 | 0)); | |
280 | ||
281 | return ok; | |
282 | } | |
283 | \f | |
284 | /* Find the places where hard regs are live across calls and save them. | |
285 | ||
286 | INSN_MODE is the mode to assign to any insns that we add. This is used | |
287 | by reload to determine whether or not reloads or register eliminations | |
288 | need be done on these insns. */ | |
289 | ||
290 | void | |
291 | save_call_clobbered_regs (insn_mode) | |
292 | enum machine_mode insn_mode; | |
293 | { | |
294 | rtx insn; | |
295 | int b; | |
296 | ||
297 | for (b = 0; b < n_basic_blocks; b++) | |
298 | { | |
299 | regset regs_live = basic_block_live_at_start[b]; | |
300 | int offset, bit, i, j; | |
301 | int regno; | |
302 | ||
303 | /* Compute hard regs live at start of block -- this is the | |
304 | real hard regs marked live, plus live pseudo regs that | |
305 | have been renumbered to hard regs. No registers have yet been | |
306 | saved because we restore all of them before the end of the basic | |
307 | block. */ | |
308 | ||
309 | #ifdef HARD_REG_SET | |
310 | hard_regs_live = *regs_live; | |
311 | #else | |
312 | COPY_HARD_REG_SET (hard_regs_live, regs_live); | |
313 | #endif | |
314 | ||
315 | CLEAR_HARD_REG_SET (hard_regs_saved); | |
316 | n_regs_saved = 0; | |
317 | ||
318 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
319 | { | |
320 | if (regs_live[offset] == 0) | |
321 | i += HOST_BITS_PER_INT; | |
322 | else | |
323 | for (bit = 1; bit && i < max_regno; bit <<= 1, i++) | |
324 | if ((regs_live[offset] & bit) | |
325 | && (regno = reg_renumber[i]) >= 0) | |
326 | for (j = regno; | |
327 | j < regno + HARD_REGNO_NREGS (regno, | |
328 | PSEUDO_REGNO_MODE (i)); | |
329 | j++) | |
330 | SET_HARD_REG_BIT (hard_regs_live, j); | |
331 | } | |
332 | ||
333 | /* Now scan the insns in the block, keeping track of what hard | |
334 | regs are live as we go. When we see a call, save the live | |
335 | call-clobbered hard regs. */ | |
336 | ||
337 | for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) | |
338 | { | |
339 | RTX_CODE code = GET_CODE (insn); | |
340 | ||
341 | if (GET_RTX_CLASS (code) == 'i') | |
342 | { | |
343 | rtx link; | |
344 | ||
345 | /* If some registers have been saved, see if INSN references | |
346 | any of them. We must restore them before the insn if so. */ | |
347 | ||
348 | if (n_regs_saved) | |
349 | restore_referenced_regs (PATTERN (insn), insn, insn_mode); | |
350 | ||
351 | /* NB: the normal procedure is to first enliven any | |
352 | registers set by insn, then deaden any registers that | |
353 | had their last use at insn. This is incorrect now, | |
354 | since multiple pseudos may have been mapped to the | |
355 | same hard reg, and the death notes are ambiguous. So | |
356 | it must be done in the other, safe, order. */ | |
357 | ||
358 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
359 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
360 | clear_reg_live (XEXP (link, 0)); | |
361 | ||
362 | /* When we reach a call, we need to save all registers that are | |
363 | live, call-used, not fixed, and not already saved. We must | |
364 | test at this point because registers that die in a CALL_INSN | |
365 | are not live across the call and likewise for registers that | |
366 | are born in the CALL_INSN. */ | |
367 | ||
368 | if (code == CALL_INSN) | |
369 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
370 | if (call_used_regs[regno] && ! call_fixed_regs[regno] | |
371 | && TEST_HARD_REG_BIT (hard_regs_live, regno) | |
372 | && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
373 | insert_save_restore (insn, 1, regno, insn_mode); | |
374 | ||
375 | note_stores (PATTERN (insn), set_reg_live); | |
376 | ||
377 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
378 | if (REG_NOTE_KIND (link) == REG_UNUSED) | |
379 | clear_reg_live (XEXP (link, 0)); | |
380 | } | |
381 | ||
382 | if (insn == basic_block_end[b]) | |
383 | break; | |
384 | } | |
385 | ||
386 | /* At the end of the basic block, we must restore any registers that | |
387 | remain saved. If the last insn in the block is a JUMP_INSN, put | |
388 | the restore before the insn, otherwise, put it after the insn. */ | |
389 | ||
390 | if (n_regs_saved) | |
391 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
392 | if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
393 | insert_save_restore ((GET_CODE (insn) == JUMP_INSN | |
394 | ? insn : NEXT_INSN (insn)), | |
395 | 0, regno, insn_mode); | |
396 | } | |
397 | } | |
398 | ||
399 | /* Here from note_stores when an insn stores a value in a register. | |
400 | Set the proper bit or bits in hard_regs_live. All pseudos that have | |
401 | been assigned hard regs have had their register number changed already, | |
402 | so we can ignore pseudos. */ | |
403 | ||
404 | static void | |
405 | set_reg_live (reg, setter) | |
406 | rtx reg, setter; | |
407 | { | |
408 | register int regno, endregno, i; | |
409 | enum machine_mode mode = GET_MODE (reg); | |
410 | int word = 0; | |
411 | ||
412 | if (GET_CODE (reg) == SUBREG) | |
413 | { | |
414 | word = SUBREG_WORD (reg); | |
415 | reg = SUBREG_REG (reg); | |
416 | } | |
417 | ||
418 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
419 | return; | |
420 | ||
421 | regno = REGNO (reg) + word; | |
422 | endregno = regno + HARD_REGNO_NREGS (regno, mode); | |
423 | ||
424 | for (i = regno; i < endregno; i++) | |
425 | SET_HARD_REG_BIT (hard_regs_live, i); | |
426 | } | |
427 | ||
428 | /* Here when a REG_DEAD note records the last use of a reg. Clear | |
429 | the appropriate bit or bits in hard_regs_live. Again we can ignore | |
430 | pseudos. */ | |
431 | ||
432 | static void | |
433 | clear_reg_live (reg) | |
434 | rtx reg; | |
435 | { | |
436 | register int regno, endregno, i; | |
437 | ||
438 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
439 | return; | |
440 | ||
441 | regno = REGNO (reg); | |
442 | endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
443 | ||
444 | for (i = regno; i < endregno; i++) | |
445 | CLEAR_HARD_REG_BIT (hard_regs_live, i); | |
446 | } | |
447 | \f | |
448 | /* If any register currently residing in the save area is referenced in X, | |
449 | which is part of INSN, emit code to restore the register in front of INSN. | |
450 | INSN_MODE is the mode to assign to any insns that we add. */ | |
451 | ||
452 | static void | |
453 | restore_referenced_regs (x, insn, insn_mode) | |
454 | rtx x; | |
455 | rtx insn; | |
456 | enum machine_mode insn_mode; | |
457 | { | |
458 | enum rtx_code code = GET_CODE (x); | |
459 | char *fmt; | |
460 | int i, j; | |
461 | ||
462 | if (code == REG) | |
463 | { | |
464 | int regno = REGNO (x); | |
465 | ||
466 | /* If this is a pseudo, scan its memory location, since it might | |
467 | involve the use of another register, which might be saved. */ | |
468 | ||
469 | if (regno >= FIRST_PSEUDO_REGISTER | |
470 | && reg_equiv_mem[regno] != 0) | |
471 | restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), | |
472 | insn, insn_mode); | |
473 | else if (regno >= FIRST_PSEUDO_REGISTER | |
474 | && reg_equiv_address[regno] != 0) | |
475 | restore_referenced_regs (XEXP (reg_equiv_address[regno], 0), | |
476 | insn, insn_mode); | |
477 | ||
478 | /* Otherwise if this is a hard register, restore any piece of it that | |
479 | is currently saved. */ | |
480 | ||
481 | else if (regno < FIRST_PSEUDO_REGISTER) | |
482 | { | |
483 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
484 | ||
485 | for (i = regno; i < endregno; i ++) | |
486 | if (TEST_HARD_REG_BIT (hard_regs_saved, i)) | |
487 | insert_save_restore (insn, 0, i, insn_mode); | |
488 | } | |
489 | ||
490 | return; | |
491 | } | |
492 | ||
493 | fmt = GET_RTX_FORMAT (code); | |
494 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
495 | { | |
496 | if (fmt[i] == 'e') | |
497 | restore_referenced_regs (XEXP (x, i), insn, insn_mode); | |
498 | else if (fmt[i] == 'E') | |
499 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
500 | restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); | |
501 | } | |
502 | } | |
503 | \f | |
504 | /* Insert a sequence of insns to save or restore, SAVE_P says which, | |
505 | REGNO. Place these insns in front of INSN. INSN_MODE is the mode | |
506 | to assign to these insns. | |
507 | ||
508 | Note that we have verified in init_caller_save that we can do this | |
509 | with a simple SET, so use it. Set INSN_CODE to what we save there | |
510 | since the address might not be valid so the insn might not be recognized. | |
511 | These insns will be reloaded and have register elimination done by | |
512 | find_reload, so we need not worry about that here. */ | |
513 | ||
514 | static void | |
515 | insert_save_restore (insn, save_p, regno, insn_mode) | |
516 | rtx insn; | |
517 | int save_p; | |
518 | int regno; | |
519 | enum machine_mode insn_mode; | |
520 | { | |
521 | rtx pat; | |
522 | enum insn_code code; | |
523 | int i; | |
524 | ||
525 | /* A common failure mode if register status is not correct in the RTL | |
526 | is for this routine to be called with a REGNO we didn't expect to | |
527 | save. That will cause us to write an insn with a (nil) SET_DEST | |
528 | or SET_SRC. Instead of doing so and causing a crash later, check | |
529 | for this common case and abort here instead. This will remove one | |
530 | step in debugging such problems. */ | |
531 | ||
532 | if (regno_save_mem[regno] == 0) | |
533 | abort (); | |
534 | ||
535 | /* If INSN is a CALL_INSN, we must insert our insns before any | |
536 | USE insns in front of the CALL_INSN. */ | |
537 | ||
538 | if (GET_CODE (insn) == CALL_INSN) | |
539 | while (GET_CODE (PREV_INSN (insn)) == INSN | |
540 | && GET_CODE (PATTERN (PREV_INSN (insn))) == USE) | |
541 | insn = PREV_INSN (insn); | |
542 | ||
543 | #ifdef HAVE_cc0 | |
544 | /* If INSN references CC0, put our insns in front of the insn that sets | |
545 | CC0. This is always safe, since the only way we could be passed an | |
546 | insn that references CC0 is for a restore, and doing a restore earlier | |
547 | isn't a problem. We do, however, assume here that CALL_INSNs don't | |
548 | reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
549 | ||
550 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) | |
551 | && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
552 | insn = prev_nonnote_insn (insn); | |
553 | #endif | |
554 | ||
555 | /* Get the pattern to emit and update our status. */ | |
556 | if (save_p) | |
557 | { | |
558 | pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno], | |
559 | gen_rtx (REG, regno_save_mode[regno], regno)); | |
560 | code = reg_save_code[regno]; | |
561 | SET_HARD_REG_BIT (hard_regs_saved, regno); | |
562 | n_regs_saved++; | |
563 | } | |
564 | else | |
565 | { | |
566 | pat = gen_rtx (SET, VOIDmode, | |
567 | gen_rtx (REG, regno_save_mode[regno], regno), | |
568 | regno_save_mem[regno]); | |
569 | code = reg_restore_code[regno]; | |
570 | CLEAR_HARD_REG_BIT (hard_regs_saved, regno); | |
571 | n_regs_saved--; | |
572 | } | |
573 | ||
574 | /* Emit the insn and set the code and mode. */ | |
575 | ||
576 | insn = emit_insn_before (pat, insn); | |
577 | PUT_MODE (insn, insn_mode); | |
578 | INSN_CODE (insn) = code; | |
579 | } |