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libstdc++: Fix testsuite for remote testing (and sim)
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12024-07-24 David Malcolm <dmalcolm@redhat.com>
2
3 * diagnostic-format-sarif.cc (sarif_builder::make_locations_arr):
4 Don't add entirely empty location objects, such as for
5 UNKNOWN_LOCATION.
6 (test_sarif_diagnostic_context::test_sarif_diagnostic_context):
7 Add param "main_input_filename".
8 (selftest::test_simple_log): Provide above param. Verify that
9 "locations" is empty.
10 (selftest::test_simple_log_2): New.
11 (selftest::diagnostic_format_sarif_cc_tests): Call it.
12
132024-07-24 David Malcolm <dmalcolm@redhat.com>
14
15 * diagnostic-format-sarif.cc (sarif_builder::flush_to_object):
16 New, using code moved from...
17 (sarif_builder::end_group): ...here.
18 (class selftest::test_sarif_diagnostic_context): New.
19 (selftest::test_simple_log): New.
20 (selftest::diagnostic_format_sarif_cc_tests): Call it.
21 * json.h (json::object::is_empty): New.
22 * selftest-diagnostic.cc (test_diagnostic_context::report): New.
23 * selftest-diagnostic.h (test_diagnostic_context::report): New
24 decl.
25 * selftest-json.cc (selftest::assert_json_string_eq): New.
26 (selftest::expect_json_object_with_string_property): New.
27 (selftest::assert_json_string_property_eq): New.
28 * selftest-json.h (selftest::assert_json_string_eq): New decl.
29 (ASSERT_JSON_STRING_EQ): New macro.
30 (selftest::expect_json_object_with_string_property): New decl.
31 (EXPECT_JSON_OBJECT_WITH_STRING_PROPERTY): New macro.
32
332024-07-24 David Malcolm <dmalcolm@redhat.com>
34
35 * diagnostic-format-sarif.cc
36 (sarif_builder::make_location_object): Add "annotations" property if
37 there are any labelled ranges (§3.28.6).
38 (selftest::test_make_location_object): Verify annotations are added
39 to location_obj.
40 * json.h (json::array::size): New.
41 (json::array::operator[]): New.
42 * selftest-json.cc
43 (selftest::expect_json_object_with_array_property): New.
44 * selftest-json.h
45 (selftest::expect_json_object_with_array_property): New decl.
46 (EXPECT_JSON_OBJECT_WITH_ARRAY_PROPERTY): New macro.
47
482024-07-24 David Malcolm <dmalcolm@redhat.com>
49
50 * diagnostic-format-sarif.cc
51 (make_date_time_string_for_current_time): New.
52 (sarif_invocation::sarif_invocation): Set "startTimeUtc"
53 property (§3.20.7).
54 (sarif_invocation::prepare_to_flush): Set "endTimeUtc"
55 property (§3.20.8).
56
572024-07-24 David Malcolm <dmalcolm@redhat.com>
58
59 * diagnostic-format-sarif.cc (sarif_invocation::sarif_invocation):
60 Add "original_argv" param and use it to populate "arguments"
61 property (§3.20.2).
62 (sarif_builder::sarif_builder): Pass argv to m_invocation_obj's
63 ctor.
64 * diagnostic.cc (diagnostic_context::initialize): Initialize
65 m_original_argv.
66 (diagnostic_context::finish): Clean up m_original_argv.
67 (diagnostic_context::set_original_argv): New.
68 * diagnostic.h: Include "unique-argv.h".
69 (diagnostic_context::set_original_argv): New decl.
70 (diagnostic_context::get_original_argv): New decl.
71 (diagnostic_context::m_original_argv): New field.
72 * toplev.cc: Include "unique-argv.h".
73 (general_init): Add "original_argv" param and move it to global_dc.
74 (toplev::main): Stash a copy of the original argv before expansion,
75 and pass it to general_init for use by SARIF output.
76 * unique-argv.h: New file.
77
782024-07-24 David Malcolm <dmalcolm@redhat.com>
79
80 * diagnostic-format-sarif.cc
81 (sarif_builder::make_artifact_location_object): Make public.
82 (sarif_invocation::sarif_invocation): Add param "builder".
83 Use it to potentially populate the "workingDirectory" property
84 with the result of pwd (§3.20.19).
85 (sarif_builder::sarif_builder): Pass *this to m_invocation_obj's
86 ctor.
87
882024-07-24 David Malcolm <dmalcolm@redhat.com>
89
90 * text-range-label.h: New file, taking class text_range_label from
91 gcc-rich-location.h.
92
932024-07-24 David Malcolm <dmalcolm@redhat.com>
94
95 * Makefile.in (OBJS-libcommon): Add selftest-json.o.
96 * diagnostic-format-sarif.cc: Include "selftest.h",
97 "selftest-diagnostic.h", "selftest-diagnostic-show-locus.h",
98 "selftest-json.h", and "text-range-label.h".
99 (class content_renderer): New.
100 (sarif_builder::m_rules_arr): Convert to std::unique_ptr.
101 (sarif_builder::make_location_object): Add class
102 escape_nonascii_renderer. If rich_loc.escape_on_output_p (),
103 pass a nonnull escape_nonascii_renderer to
104 maybe_make_physical_location_object as its snippet_renderer, and
105 add a property bag property "gcc/escapeNonAscii" to the SARIF
106 location object. For other overloads of make_location_object,
107 pass nullptr for the snippet_renderer.
108 (sarif_builder::maybe_make_region_object_for_context): Add
109 "snippet_renderer" param and pass it to
110 maybe_make_artifact_content_object.
111 (sarif_builder::make_tool_object): Drop "const".
112 (sarif_builder::make_driver_tool_component_object): Likewise.
113 Use typesafe unique_ptr variant of object::set for setting "rules"
114 property on driver_obj.
115 (sarif_builder::maybe_make_artifact_content_object): Add param "r"
116 and use it to potentially set the "rendered" property (§3.3.4).
117 (selftest::test_make_location_object): New.
118 (selftest::diagnostic_format_sarif_cc_tests): New.
119 * diagnostic-show-locus.cc: Include "text-range-label.h" and
120 "selftest-diagnostic-show-locus.h".
121 (selftests::diagnostic_show_locus_fixture::diagnostic_show_locus_fixture):
122 New.
123 (selftests::test_layout_x_offset_display_utf8): Use
124 diagnostic_show_locus_fixture to simplify and consolidate setup
125 code.
126 (selftests::test_diagnostic_show_locus_one_liner): Likewise.
127 (selftests::test_one_liner_colorized_utf8): Likewise.
128 (selftests::test_diagnostic_show_locus_one_liner_utf8): Likewise.
129 * gcc-rich-location.h (class text_range_label): Move to new file
130 text-range-label.h.
131 * selftest-diagnostic-show-locus.h: New file, based on material in
132 diagnostic-show-locus.cc.
133 * selftest-json.cc: New file.
134 * selftest-json.h: New file.
135 * selftest-run-tests.cc (selftest::run_tests): Call
136 selftest::diagnostic_format_sarif_cc_tests.
137 * selftest.h (selftest::diagnostic_format_sarif_cc_tests): New decl.
138
1392024-07-24 David Malcolm <dmalcolm@redhat.com>
140
141 * diagnostic-format-json.cc: Include "make-unique.h".
142 (json_output_format::m_toplevel_array): Convert to
143 std::unique_ptr.
144 (json_output_format::json_output_format): Update accordingly.
145 (json_output_format::~json_output_format): Remove manual
146 "delete" of field.
147 (json_from_expanded_location): Convert return type to
148 std::unique_ptr.
149 (json_from_location_range): Likewise. Use nullptr rather than
150 NULL.
151 (json_from_fixit_hint): Convert return type to std::unique_ptr.
152 (json_from_metadata): Likewise.
153 (make_json_for_path): Likewise.
154 (json_output_format::on_end_diagnostic): Use std::unique_ptr
155 throughout.
156 (json_file_output_format::~json_file_output_format): Use nullptr.
157 (selftest::test_unknown_location): Update to use std::unique_ptr.
158 (selftest::test_bad_endpoints): Likewise. Replace NULL with
159 nullptr.
160
1612024-07-24 David Malcolm <dmalcolm@redhat.com>
162
163 * diagnostic-format-sarif.cc: Include "make-unique.h". Convert
164 raw pointers to std::unique_ptr throughout to indicate ownership,
165 adding comments in the few places where pointers are borrowed.
166 Use typesafe unique_ptr variants of json::object::set and
167 json::array::append throughout to make types of properties more
168 explicit, whilst using "auto" to reduce typing.
169 Use "nullptr" rather than "NULL" throughout.
170 * diagnostic-format-sarif.h (make_sarif_logical_location_object):
171 Use std::unique_ptr for return type.
172
1732024-07-24 David Malcolm <dmalcolm@redhat.com>
174
175 * diagnostic-format-json.cc: Define INCLUDE_MEMORY.
176 * diagnostic-format-sarif.cc: Likewise.
177 * dumpfile.cc: Likewise.
178 * gcov.cc: Likewise.
179 * json.cc: Likewise. Include "make-unique.h".
180 (selftest::test_formatting): Exercise overloads of
181 array::append and object::set that use unique_ptr.
182 * json.h: Require INCLUDE_MEMORY to have been defined.
183 (json::object::set): Add a template to add a family of overloads
184 taking a std::unique_ptr<JsonType>
185 (json::array::append): Likewise.
186 * optinfo-emit-json.cc: Define INCLUDE_MEMORY.
187 * optinfo.cc: Likewise.
188 * timevar.cc: Likewise.
189 * toplev.cc: Likewise.
190 * tree-diagnostic-client-data-hooks.cc: Likewise.
191
1922024-07-24 David Malcolm <dmalcolm@redhat.com>
193
194 * diagnostic-format-json.cc (json_from_expanded_location): Make
195 "static". Pass param "context" by reference, as it cannot be null.
196 (json_from_location_range): Likewise for param "context".
197 (json_from_fixit_hint): Likewise.
198 (make_json_for_path): Likewise.
199 (json_output_format::on_end_diagnostic): Update for above changes.
200 (diagnostic_output_format_init_json::diagnostic_output_format_init_json):
201 Pass param "context" by reference, as it cannot be null.
202 (diagnostic_output_format_init_json_stderr): Likewise.
203 (diagnostic_output_format_init_json_file): Likewise.
204 (selftest::test_unknown_location): Update for above changes.
205 (selftest::test_bad_endpoints): Likewise.
206 * diagnostic-format-sarif.cc (sarif_builder::m_context): Convert
207 from pointer to reference.
208 (sarif_invocation::add_notification_for_ice): Convert both params
209 from pointers to references.
210 (sarif_invocation::prepare_to_flush): Likewise for "context".
211 (sarif_result::on_nested_diagnostic): Likewise for "context" and
212 "builder".
213 (sarif_result::on_diagram): Likewise.
214 (sarif_ice_notification::sarif_ice_notification): Likewise.
215 (sarif_builder::sarif_builder): Likewise for "context".
216 (sarif_builder::end_diagnostic): Likewise.
217 (sarif_builder::emit_diagram): Likewise.
218 (sarif_builder::make_result_object): Likewise.
219 (make_reporting_descriptor_object_for_warning): Likewise.
220 (sarif_builder::make_locations_arr): Update for change to m_context.
221 (sarif_builder::get_sarif_column): Likewise.
222 (sarif_builder::make_message_object_for_diagram): Convert "context"
223 from pointer to reference.
224 (sarif_builder::make_tool_object): Likewise for "m_context".
225 (sarif_builder::make_driver_tool_component_object): Likewise.
226 (sarif_builder::get_or_create_artifact): Likewise.
227 (sarif_builder::maybe_make_artifact_content_object): Likewise.
228 (sarif_builder::get_source_lines): Likewise.
229 (sarif_output_format::on_end_diagnostic): Update for above changes.
230 (sarif_output_format::on_diagram): Likewise.
231 (sarif_output_format::sarif_output_format): Likewise.
232 (diagnostic_output_format_init_sarif): Convert param "context"
233 from pointer to reference.
234 (diagnostic_output_format_init_sarif_stderr): Likewise.
235 (diagnostic_output_format_init_sarif_file): Likewise.
236 (diagnostic_output_format_init_sarif_stream): Likewise.
237 * diagnostic.cc (diagnostic_output_format_init): Likewise.
238 * diagnostic.h (diagnostic_output_format_init): Likewise.
239 (diagnostic_output_format_init_json_stderr): Likewise.
240 (diagnostic_output_format_init_json_file): Likewise.
241 (diagnostic_output_format_init_sarif_stderr): Likewise.
242 (diagnostic_output_format_init_sarif_file): Likewise.
243 (diagnostic_output_format_init_sarif_stream): Likewise.
244 (json_from_expanded_location): Delete decl.
245 * gcc.cc (driver_handle_option): Update for change to
246 diagnostic_output_format_init.
247 * opts.cc (common_handle_option): Likewise.
248
2492024-07-24 David Malcolm <dmalcolm@redhat.com>
250
251 * diagnostic-format-sarif.cc: Introduce subclasses of sarif_object
252 for all aspects of the spec that we're using. Replace almost all
253 usage of json::object with uses of these subclasses, the only
254 remaining use of json::object being for originalUriBaseIds, as per
255 SARIF 2.1.0 §3.14.14. This stronger typing makes it considerably
256 easier to maintain validity against the schema.
257 * diagnostic-format-sarif.h (class sarif_logical_location): New.
258 (make_sarif_logical_location_object): Convert return type from
259 json::object * to sarif_logical_location *.
260
2612024-07-24 David Malcolm <dmalcolm@redhat.com>
262
263 * gcov.cc (output_intermediate_json_line): Use
264 json::object::set_integer to avoid naked "new".
265
2662024-07-24 David Malcolm <dmalcolm@redhat.com>
267
268 * diagnostic-format-sarif.cc (sarif_artifact::populate_roles):
269 Avoid naked "new" by using json::array::append_string.
270 (sarif_builder::maybe_make_kinds_array): Likewise.
271 * json.cc (json::array::append_string): New.
272 (selftest::test_writing_arrays): Use it.
273 * json.h (json::array::append_string): New decl.
274 * optinfo-emit-json.cc (optrecord_json_writer::pass_to_json):
275 Avoid naked "new" by using json::array::append_string.
276 (optrecord_json_writer::optinfo_to_json): Likewise.
277
2782024-07-24 David Malcolm <dmalcolm@redhat.com>
279
280 * json.cc (value::dump): New overload, taking no params.
281 * json.h (value::dump): New decl.
282
2832024-07-24 Jeff Law <jlaw@ventanamicro.com>
284
285 PR rtl-optimization/116037
286 * ext-dce.cc (ext_dce_process_sets): Note if we ever skip a dest
287 and return that info explicitly.
288 (ext_dce_process_uses): If a set was skipped, then consider all bits
289 in every input as live. Do not try to optimize away an extension if
290 we skipped processing a destination in the same insn. Restore code
291 to make shift/rotate count fully live.
292 (ext_dce_process_bb): Handle API changes for ext_dce_process_sets.
293
2942024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
295
296 * common/config/aarch64/aarch64-common.cc
297 (aarch64_set_asm_isa_flags): Store a second uint64_t value.
298 * config/aarch64/aarch64-opts.h
299 (aarch64_feature_flags): Switch typedef to bbitmap<2>.
300 * config/aarch64/aarch64.cc
301 (aarch64_set_current_function): Extract isa mode from val[0].
302 * config/aarch64/aarch64.h
303 (aarch64_get_asm_isa_flags): Load a second uint64_t value.
304 (aarch64_get_isa_flags): Ditto.
305 (aarch64_asm_isa_flags): Ditto.
306 (aarch64_isa_flags): Ditto.
307 (HANDLE): Use bbitmap<2>::from_index to initialise flags.
308 (AARCH64_FL_ISA_MODES): Do arithmetic on integer type.
309 (AARCH64_ISA_MODE): Extract value from bbitmap<2> array.
310 * config/aarch64/aarch64.opt
311 (aarch64_asm_isa_flags_1): New variable.
312 (aarch64_isa_flags_1): Ditto.
313
3142024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
315
316 * bbitmap.h: New file.
317
3182024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
319
320 * config/aarch64/aarch64-feature-deps.h
321 (get_flags_off): Construct aarch64_feature_flags (0) explicitly.
322
3232024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
324
325 * config/aarch64/aarch64-c.cc
326 (aarch64_define_unconditional_macros): Use TARGET_V8R macro.
327 (aarch64_update_cpp_builtins): Use TARGET_* macros.
328 * config/aarch64/aarch64.h (AARCH64_HAVE_ISA): New macro.
329 (AARCH64_ISA_SM_OFF, AARCH64_ISA_SM_ON, AARCH64_ISA_ZA_ON)
330 (AARCH64_ISA_V8A, AARCH64_ISA_V8_1A, AARCH64_ISA_CRC)
331 (AARCH64_ISA_FP, AARCH64_ISA_SIMD, AARCH64_ISA_LSE)
332 (AARCH64_ISA_RDMA, AARCH64_ISA_V8_2A, AARCH64_ISA_F16)
333 (AARCH64_ISA_SVE, AARCH64_ISA_SVE2, AARCH64_ISA_SVE2_AES)
334 (AARCH64_ISA_SVE2_BITPERM, AARCH64_ISA_SVE2_SHA3)
335 (AARCH64_ISA_SVE2_SM4, AARCH64_ISA_SME, AARCH64_ISA_SME_I16I64)
336 (AARCH64_ISA_SME_F64F64, AARCH64_ISA_SME2, AARCH64_ISA_V8_3A)
337 (AARCH64_ISA_DOTPROD, AARCH64_ISA_AES, AARCH64_ISA_SHA2)
338 (AARCH64_ISA_V8_4A, AARCH64_ISA_SM4, AARCH64_ISA_SHA3)
339 (AARCH64_ISA_F16FML, AARCH64_ISA_RCPC, AARCH64_ISA_RCPC8_4)
340 (AARCH64_ISA_RNG, AARCH64_ISA_V8_5A, AARCH64_ISA_TME)
341 (AARCH64_ISA_MEMTAG, AARCH64_ISA_V8_6A, AARCH64_ISA_I8MM)
342 (AARCH64_ISA_F32MM, AARCH64_ISA_F64MM, AARCH64_ISA_BF16)
343 (AARCH64_ISA_SB, AARCH64_ISA_RCPC3, AARCH64_ISA_V8R)
344 (AARCH64_ISA_PAUTH, AARCH64_ISA_V8_7A, AARCH64_ISA_V8_8A)
345 (AARCH64_ISA_V8_9A, AARCH64_ISA_V9A, AARCH64_ISA_V9_1A)
346 (AARCH64_ISA_V9_2A, AARCH64_ISA_V9_3A, AARCH64_ISA_V9_4A)
347 (AARCH64_ISA_MOPS, AARCH64_ISA_LS64, AARCH64_ISA_CSSC)
348 (AARCH64_ISA_D128, AARCH64_ISA_THE, AARCH64_ISA_GCS): Remove.
349 (TARGET_BASE_SIMD, TARGET_SIMD, TARGET_FLOAT)
350 (TARGET_NON_STREAMING, TARGET_STREAMING, TARGET_ZA, TARGET_SHA2)
351 (TARGET_SHA3, TARGET_AES, TARGET_SM4, TARGET_F16FML)
352 (TARGET_CRC32, TARGET_LSE, TARGET_FP_F16INST)
353 (TARGET_SIMD_F16INST, TARGET_DOTPROD, TARGET_SVE, TARGET_SVE2)
354 (TARGET_SVE2_AES, TARGET_SVE2_BITPERM, TARGET_SVE2_SHA3)
355 (TARGET_SVE2_SM4, TARGET_SME, TARGET_SME_I16I64)
356 (TARGET_SME_F64F64, TARGET_SME2, TARGET_ARMV8_3, TARGET_JSCVT)
357 (TARGET_FRINT, TARGET_TME, TARGET_RNG, TARGET_MEMTAG)
358 (TARGET_I8MM, TARGET_SVE_I8MM, TARGET_SVE_F32MM)
359 (TARGET_SVE_F64MM, TARGET_BF16_FP, TARGET_BF16_SIMD)
360 (TARGET_SVE_BF16, TARGET_PAUTH, TARGET_BTI, TARGET_MOPS)
361 (TARGET_LS64, TARGET_CSSC, TARGET_SB, TARGET_RCPC, TARGET_RCPC2)
362 (TARGET_RCPC3, TARGET_SIMD_RDMA, TARGET_ARMV9_4, TARGET_D128)
363 (TARGET_THE, TARGET_GCS): Redefine using AARCH64_HAVE_ISA.
364 (TARGET_V8R, TARGET_V9A): New.
365 * config/aarch64/aarch64.md (arch_enabled): Use TARGET_RCPC2.
366 * config/aarch64/iterators.md (GPI_I16): Use TARGET_FP_F16INST.
367 (GPF_F16): Ditto.
368 * config/aarch64/predicates.md
369 (aarch64_rcpc_memory_operand): Use TARGET_RCPC2.
370
3712024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
372
373 * config/aarch64/aarch64.cc
374 (aarch64_valid_sysreg_name_p): Add bool cast.
375
3762024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
377
378 * common/config/aarch64/aarch64-common.cc
379 (aarch64_set_asm_isa_flags): Reorder, and add suffix to names.
380 * config/aarch64/aarch64.h
381 (aarch64_get_asm_isa_flags): Add "_0" suffix.
382 (aarch64_get_isa_flags): Ditto.
383 (aarch64_asm_isa_flags): Redefine using renamed uint64_t value.
384 (aarch64_isa_flags): Ditto.
385 * config/aarch64/aarch64.opt:
386 (aarch64_asm_isa_flags): Rename to...
387 (aarch64_asm_isa_flags_0): ...this, and change to uint64_t.
388 (aarch64_isa_flags): Rename to...
389 (aarch64_isa_flags_0): ...this, and change to uint64_t.
390
3912024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
392
393 * common/config/aarch64/aarch64-common.cc
394 (aarch64_handle_option): Use new macro.
395 * config/aarch64/aarch64.cc
396 (aarch64_override_options_internal): Ditto.
397 (aarch64_option_print): Ditto.
398 (aarch64_set_current_function): Ditto.
399 (aarch64_can_inline_p): Ditto.
400 (aarch64_declare_function_name): Ditto.
401 (aarch64_start_file): Ditto.
402 * config/aarch64/aarch64.h (aarch64_get_asm_isa_flags): New
403 (aarch64_get_isa_flags): New.
404 (aarch64_asm_isa_flags): Use new macro.
405 (aarch64_isa_flags): Ditto.
406
4072024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
408
409 * config/aarch64/aarch64-opts.h: Add aarch64_isa_mode typedef.
410 * config/aarch64/aarch64-protos.h
411 (aarch64_gen_callee_cookie): Use aarch64_isa_mode parameter.
412 (aarch64_sme_vq_immediate): Ditto.
413 * config/aarch64/aarch64.cc
414 (aarch64_fntype_pstate_sm): Use aarch64_isa_mode values.
415 (aarch64_fntype_pstate_za): Ditto.
416 (aarch64_fndecl_pstate_sm): Ditto.
417 (aarch64_fndecl_pstate_za): Ditto.
418 (aarch64_fndecl_isa_mode): Ditto.
419 (aarch64_cfun_incoming_pstate_sm): Ditto.
420 (aarch64_cfun_enables_pstate_sm): Ditto.
421 (aarch64_call_switches_pstate_sm): Ditto.
422 (aarch64_gen_callee_cookie): Ditto.
423 (aarch64_callee_isa_mode): Ditto.
424 (aarch64_insn_callee_abi): Ditto.
425 (aarch64_sme_vq_immediate): Ditto.
426 (aarch64_add_offset_temporaries): Ditto.
427 (aarch64_add_offset): Ditto.
428 (aarch64_add_sp): Ditto.
429 (aarch64_sub_sp): Ditto.
430 (aarch64_guard_switch_pstate_sm): Ditto.
431 (aarch64_switch_pstate_sm): Ditto.
432 (aarch64_init_cumulative_args): Ditto.
433 (aarch64_allocate_and_probe_stack_space): Ditto.
434 (aarch64_expand_prologue): Ditto.
435 (aarch64_expand_epilogue): Ditto.
436 (aarch64_start_call_args): Ditto.
437 (aarch64_expand_call): Ditto.
438 (aarch64_end_call_args): Ditto.
439 (aarch64_set_current_function): Ditto, with added conversions.
440 (aarch64_handle_attr_arch): Avoid macro with changed type.
441 (aarch64_handle_attr_cpu): Ditto.
442 (aarch64_handle_attr_isa_flags): Ditto.
443 (aarch64_switch_pstate_sm_for_landing_pad):
444 Use arch64_isa_mode values.
445 (aarch64_switch_pstate_sm_for_jump): Ditto.
446 (pass_switch_pstate_sm::gate): Ditto.
447 * config/aarch64/aarch64.h
448 (AARCH64_ISA_MODE_{SM_ON|SM_OFF|ZA_ON}): New macros.
449 (AARCH64_FL_SM_STATE): Mark as possibly unused.
450 (AARCH64_ISA_MODE_SM_STATE): New aarch64_isa_mode mask.
451 (AARCH64_DEFAULT_ISA_MODE): New aarch64_isa_mode value.
452 (AARCH64_FL_DEFAULT_ISA_MODE): Define using above value.
453 (AARCH64_ISA_MODE): Change type to aarch64_isa_mode.
454 (arm_pcs): Use aarch64_isa_mode value.
455
4562024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
457
458 * config/aarch64/aarch64.cc
459 (aarch64_override_options): Remove temporary variable.
460
4612024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
462
463 * config/aarch64/aarch64.h (DEF_AARCH64_ISA_MODE): Move to...
464 * config/aarch64/aarch64-opts.h (DEF_AARCH64_ISA_MODE): ...here.
465
4662024-07-24 Andrew Carlotti <andrew.carlotti@arm.com>
467
468 * config/aarch64/aarch64.cc
469 (aarch64_tune_flags): Remove unused global variable.
470 (aarch64_override_options_internal): Remove dead assignment.
471
4722024-07-24 Andrew Pinski <quic_apinski@quicinc.com>
473
474 * config/rs6000/rs6000-builtins.def: s/iorc/iorn/. s/andc/andn/
475 for the code.
476 * config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Update
477 to iorn.
478 * config/rs6000/rs6000.md (andc<mode>3): Rename to ...
479 (andn<mode>3): This.
480 (iorc<mode>3): Rename to ...
481 (iorn<mode>3): This.
482 * doc/md.texi: Update documentation for the rename.
483 * internal-fn.def (BIT_ANDC): Rename to ...
484 (BIT_ANDN): This.
485 (BIT_IORC): Rename to ...
486 (BIT_IORN): This.
487 * optabs.def (andc_optab): Rename to ...
488 (andn_optab): This.
489 (iorc_optab): Rename to ...
490 (iorn_optab): This.
491 * gimple-isel.cc (gimple_expand_vec_cond_expr): Update for the
492 renamed internal functions, ANDC/IORC to ANDN/IORN.
493
4942024-07-24 Gaius Mulley <gaiusmod2@gmail.com>
495
496 * doc/install.texi (GM2-prerequisite): Add GNU flex.
497
4982024-07-24 Richard Biener <rguenther@suse.de>
499
500 PR tree-optimization/116057
501 * tree-ssa-ccp.cc (likely_value): Also walk CTORs in stmt
502 operands to look for constants.
503
5042024-07-24 Kyrylo Tkachov <ktkachov@nvidia.com>
505
506 Revert:
507 2024-07-24 Jennifer Schmitz <jschmitz@nvidia.com>
508
509 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement
510 fusion logic.
511 * config/aarch64/aarch64-fusion-pairs.def (cmp+csel): New entry.
512 (cmp+cset): Likewise.
513 * config/aarch64/tuning_models/neoversev2.h: Enable logic in
514 field fusible_ops.
515
5162024-07-24 Jennifer Schmitz <jschmitz@nvidia.com>
517
518 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Implement
519 fusion logic.
520 * config/aarch64/aarch64-fusion-pairs.def (cmp+csel): New entry.
521 (cmp+cset): Likewise.
522 * config/aarch64/tuning_models/neoversev2.h: Enable logic in
523 field fusible_ops.
524
5252024-07-24 Christoph Müllner <christoph.muellner@vrull.eu>
526
527 PR target/116035
528 * config/riscv/bitmanip.md: Disable zero_extendsidi2_bitmanip
529 for XTheadMemIdx.
530
5312024-07-24 Lingling Kong <lingling.kong@intel.com>
532
533 PR target/115978
534 * config/i386/driver-i386.cc (host_detect_local_cpu): Enable
535 APX_F only for 64-bit codegen.
536 * config/i386/i386-options.cc (DEF_PTA): Skip PTA_APX_F if
537 not in 64-bit mode.
538
5392024-07-24 Pan Li <pan2.li@intel.com>
540
541 PR target/115961
542 * internal-fn.cc (type_strictly_matches_mode_p): Add new func
543 impl to check type strictly matches mode or not.
544 (type_pair_strictly_matches_mode_p): Ditto but for tree type
545 pair.
546 (direct_internal_fn_supported_p): Add above check for the tree
547 type pair.
548
5492024-07-23 Mark Harmstone <mark@harmstone.com>
550
551 * dwarf2codeview.cc (get_type_num_reference_type): Handle rvalue refs.
552 (get_type_num_array_type): Add DW_TAG_rvalue_reference_type to switch.
553 (get_type_num): Handle DW_TAG_rvalue_reference_type DIEs.
554 * dwarf2codeview.h (CV_PTR_MODE_RVREF): Define.
555
5562024-07-23 Mark Harmstone <mark@harmstone.com>
557
558 * dwarf2codeview.cc (get_type_num_reference_type): New function.
559 (get_type_num_array_type): Add DW_TAG_reference_type to switch.
560 (get_type_num): Handle DW_TAG_reference_type DIEs.
561 * dwarf2codeview.h (CV_PTR_MODE_LVREF): Define.
562
5632024-07-23 Vineet Gupta <vineetg@rivosinc.com>
564
565 * config/riscv/bitmanip.md: Fix splitter.
566
5672024-07-23 Marek Polacek <polacek@redhat.com>
568
569 * doc/extend.texi: Add missing @option.
570
5712024-07-23 Andi Kleen <ak@linux.intel.com>
572
573 PR c/83324
574 * doc/extend.texi: Document [[musttail]]
575
5762024-07-23 Tobias Burnus <tburnus@baylibre.com>
577
578 * doc/install.texi (amdgcn-x-amdhsa): Suggest newer git version
579 for newlib.
580
5812024-07-23 Jiufu Guo <guojiufu@linux.ibm.com>
582
583 PR target/96866
584 * config/rs6000/rs6000.cc (print_operand_address): Emit message for
585 unsupported operand.
586
5872024-07-23 Richard Biener <rguenther@suse.de>
588
589 PR tree-optimization/116002
590 * tree-ssa-structalias.cc (topo_visit): Also consider
591 SCALAR = SCALAR complex constraints as edges.
592
5932024-07-23 Jakub Jelinek <jakub@redhat.com>
594 Andrew Pinski <quic_apinski@quicinc.com>
595
596 PR tree-optimization/116034
597 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Only use IMAGPART_EXPR
598 if MEM_REF offset is equal to element type size.
599
6002024-07-23 Richard Biener <rguenther@suse.de>
601
602 PR rtl-optimization/116002
603 * cselib.cc (cselib_hash_rtx): Use inchash to get proper mixing.
604 Consistently avoid a zero return value when hashing successfully.
605 Consistently treat a zero hash value from recursing as fatal.
606 Use hashval_t where appropriate.
607 (cselib_hash_plus_const_int): Likewise.
608 (new_cselib_val): Use hashval_t.
609 (cselib_lookup_1): Likewise.
610
6112024-07-23 liuhongt <hongtao.liu@intel.com>
612
613 * config/i386/i386.cc (ix86_hardreg_mov_ok): Relax mov subreg
614 to hard register after split1.
615
6162024-07-23 Kewen Lin <linkw@linux.ibm.com>
617
618 PR target/115713
619 * config/rs6000/rs6000.cc (rs6000_inner_target_options): Update option
620 set information for rs6000_opt_vars.
621
6222024-07-23 Kewen Lin <linkw@linux.ibm.com>
623
624 PR target/115713
625 * config/rs6000/rs6000.cc (rs6000_inner_target_options): Avoid to
626 enable altivec or disable avoid-indexed-addresses automatically
627 when they get specified explicitly.
628
6292024-07-23 Kewen Lin <linkw@linux.ibm.com>
630
631 PR target/115713
632 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Emit error
633 messages when explicit VSX encounters explicit soft-float, no-altivec
634 or avoid-indexed-addresses.
635
6362024-07-23 Haochen Jiang <haochen.jiang@intel.com>
637
638 * config/i386/i386.md (prefetchi): Change to %a.
639
6402024-07-23 Jeff Law <jlaw@ventanamicro.com>
641
642 PR rtl-optimization/115877
643 * ext-dce.cc (ext_dce_process_sets): Reasonably handle input/output
644 operands.
645 (ext_dce_rd_transfer_n): Drop bogus assertion.
646
6472024-07-23 Pan Li <pan2.li@intel.com>
648
649 * config/riscv/iterators.md (ANYI_DOUBLE_TRUNC): Add new iterator
650 for int double truncation.
651 (ANYI_DOUBLE_TRUNCATED): Add new attr for int double truncation.
652 (anyi_double_truncated): Ditto but for lowercase.
653 * config/riscv/riscv-protos.h (riscv_expand_ustrunc): Add new
654 func decl for expanding ustrunc
655 * config/riscv/riscv.cc (riscv_expand_ustrunc): Add new func
656 impl to expand ustrunc.
657 * config/riscv/riscv.md (ustrunc<mode><anyi_double_truncated>2): Impl
658 the new pattern ustrunc<m><n>2 for int.
659
6602024-07-22 Jan Hubicka <hubicka@ucw.cz>
661
662 PR ipa/109985
663 * ipa-modref.cc (modref_summary::useful_p): Fix handling of ECF_NOVOPS.
664 (modref_access_analysis::process_fnspec): Likevise.
665 (modref_access_analysis::analyze_call): Likevise.
666 (propagate_unknown_call): Likevise.
667 (modref_propagate_in_scc): Likevise.
668 (modref_propagate_flags_in_scc): Likewise.
669 (ipa_merge_modref_summary_after_inlining): Likewise.
670
6712024-07-22 Jan Hubicka <hubicka@ucw.cz>
672
673 PR ipa/111613
674 * ipa-modref.cc (analyze_parms): Do not preserve EAF_NO_DIRECT_READ and
675 EAF_NO_INDIRECT_READ from past flags.
676
6772024-07-22 Michael Meissner <meissner@linux.ibm.com>
678
679 * config.gcc (powerpc*-*-*): Add support for power11.
680 * config/rs6000/aix71.h (ASM_CPU_SPEC): Add support for -mcpu=power11.
681 * config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.
682 * config/rs6000/aix73.h (ASM_CPU_SPEC): Likewise.
683 * config/rs6000/driver-rs6000.cc (asm_names): Likewise.
684 * config/rs6000/ppc-auxv.h (PPC_PLATFORM_POWER11): New define.
685 * config/rs6000/rs6000-builtin.cc (cpu_is_info): Add power11.
686 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Define
687 _ARCH_PWR11 if -mcpu=power11.
688 * config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): New define.
689 (POWERPC_MASKS): Add power11.
690 (power11 cpu): Add power11 definition.
691 * config/rs6000/rs6000-opts.h (PROCESSOR_POWER11): Add power11 processor.
692 * config/rs6000/rs6000-string.cc (expand_compare_loop): Likewise.
693 * config/rs6000/rs6000-tables.opt: Regenerate.
694 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Add power11
695 support.
696 (rs6000_machine_from_flags): Likewise.
697 (rs6000_reassociation_width): Likewise.
698 (rs6000_adjust_cost): Likewise.
699 (rs6000_issue_rate): Likewise.
700 (rs6000_sched_reorder): Likewise.
701 (rs6000_sched_reorder2): Likewise.
702 (rs6000_register_move_cost): Likewise.
703 (rs6000_opt_masks): Likewise.
704 * config/rs6000/rs6000.h (ASM_CPU_SPEC): Likewise.
705 * config/rs6000/rs6000.md (cpu attribute): Add power11.
706 * config/rs6000/rs6000.opt (-mpower11): Add internal power11 flag.
707 * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mcpu=power11.
708 * config/rs6000/power10.md (all reservations): Add power11 support.
709
7102024-07-22 Jeff Law <jlaw@ventanamicro.com>
711
712 PR rtl-optimization/115877
713 * ext-dce.cc (ext_dce_process_sets): More correctly handle SUBREG
714 destinations.
715
7162024-07-22 Jan Hubicka <hubicka@ucw.cz>
717
718 PR ipa/115033
719 * ipa-modref.cc (modref_eaf_analysis::analyze_ssa_name): Fix checking of
720 EAF flags when analysing values dereferenced as function parameters.
721
7222024-07-22 Jan Hubicka <hubicka@ucw.cz>
723
724 PR ipa/114207
725 * ipa-prop.cc (unadjusted_ptr_and_unit_offset): Fix accounting of offsets in ADDR_EXPR.
726
7272024-07-22 Jan Hubicka <hubicka@ucw.cz>
728
729 PR ipa/115277
730 * ipa-icf-gimple.cc (func_checker::compare_loops): compare loop
731 bounds.
732
7332024-07-22 Richard Sandiford <richard.sandiford@arm.com>
734
735 PR rtl-optimization/116009
736 * rtl-ssa/accesses.cc (function_info::add_def): Set the root
737 local variable after removing the old clobber group.
738
7392024-07-22 Richard Sandiford <richard.sandiford@arm.com>
740
741 * rtl-ssa/accesses.h (rtl_ssa::pp_def_splay_tree): Declare.
742 (dump, debug): Add overloads for def_splay_tree.
743 * rtl-ssa/accesses.cc (rtl_ssa::pp_def_splay_tree): New function.
744 (dump, debug): Add overloads for def_splay_tree.
745
7462024-07-22 Richard Sandiford <richard.sandiford@arm.com>
747
748 PR target/115969
749 * config/aarch64/aarch64.cc (aarch64_simd_mem_operand_p): Require
750 the operand to be a legitimate memory_operand.
751
7522024-07-22 Jeff Law <jlaw@ventanamicro.com>
753
754 PR rtl-optimization/115877
755 * ext-dce.cc (group_limit): New function.
756 (mark_reg_live): Likewise.
757 (ext_dce_process_sets): Use new functions.
758 (ext_dce_process_uses): Likewise.
759 (ext_dce_init): Likewise.
760
7612024-07-22 Richard Biener <rguenther@suse.de>
762
763 * fold-const.cc (operand_compare::hash_operand): Fix hash
764 of WIDEN_*_EXPR.
765
7662024-07-22 Richard Biener <rguenther@suse.de>
767
768 * inchash.h (inchash::end): Make const.
769 (inchash::merge): Take const reference hash argument.
770 (inchash::add_commutative): Likewise.
771
7722024-07-22 Tamar Christina <tamar.christina@arm.com>
773
774 PR tree-optimization/115531
775 * config/aarch64/aarch64.cc
776 (aarch64_conditional_operation_is_expensive): New.
777 (TARGET_VECTORIZE_CONDITIONAL_OPERATION_IS_EXPENSIVE): New.
778
7792024-07-22 Tamar Christina <tamar.christina@arm.com>
780
781 PR tree-optimization/115531
782 * tree-vect-patterns.cc (vect_cond_store_pattern_same_ref): New.
783 (vect_recog_cond_store_pattern): New.
784 (vect_vect_recog_func_ptrs): Use it.
785 * target.def (conditional_operation_is_expensive): New.
786 * doc/tm.texi: Regenerate.
787 * doc/tm.texi.in: Document it.
788 * targhooks.cc (default_conditional_operation_is_expensive): New.
789 * targhooks.h (default_conditional_operation_is_expensive): New.
790
7912024-07-21 Jeff Law <jlaw@ventanamicro.com>
792
793 PR rtl-optimization/115877
794 * ext-dce.cc (safe_for_live_propagation): Handle RTX_CONST_OBJ.
795
7962024-07-21 Jeff Law <jlaw@ventanamicro.com>
797
798 PR rtl-optimization/115877
799 * ext-dce.cc (ext_dce_process_uses): Restore the value of DST_MASK
800 for reach operand.
801
8022024-07-21 Sam James <sam@gentoo.org>
803
804 * Makefile.in (NOCOMMON_FLAG): Delete.
805 (GCC_WARN_CFLAGS): Drop NOCOMMON_FLAG.
806 (GCC_WARN_CXXFLAGS): Drop NOCOMMON_FLAG.
807 * configure.ac: Ditto.
808 * configure: Regenerate.
809
8102024-07-21 Oleg Endo <olegendo@gcc.gnu.org>
811
812 * config/sh/sh.md (mov_neg_si_t): Allow insn and split after
813 register allocation.
814 (*treg_noop_move): New insn.
815
8162024-07-20 Andi Kleen <ak@gcc.gnu.org>
817
818 Revert:
819 2024-07-20 Andi Kleen <ak@linux.intel.com>
820
821 PR c/83324
822 * doc/extend.texi: Document [[musttail]]
823
8242024-07-20 Mark Harmstone <mark@harmstone.com>
825
826 * dwarf2codeview.cc (enum cv_sym_type): Add new values.
827 (struct codeview_symbol): Add function to union.
828 (struct codeview_custom_type): Add lf_func_id to union.
829 (write_function): New function.
830 (write_codeview_symbols): Call write_function.
831 (write_lf_func_id): New function.
832 (write_custom_types): Call write_lf_func_id.
833 (add_function): New function.
834 (codeview_debug_early_finish): Call add_function.
835
8362024-07-20 André Maroneze <andre.maroneze@cea.fr>
837
838 * doc/invoke.texi (Spec Files): Remove documentation of obsolete
839 spec strings "predefines" and "signed_char".
840
8412024-07-20 Siddhesh Poyarekar <siddhesh@gotplt.org>
842
843 * opt-suggestions.cc
844 (option_proposer::build_option_suggestions): Pull OPTB
845 definition out of the innermost loop.
846
8472024-07-20 Andi Kleen <ak@linux.intel.com>
848
849 PR c/83324
850 * doc/extend.texi: Document [[musttail]]
851
8522024-07-20 Lulu Cheng <chenglulu@loongson.cn>
853
854 * config/loongarch/loongarch-protos.h
855 (loongarch_split_128bit_move): Delete.
856 (loongarch_split_128bit_move_p): Delete.
857 (loongarch_split_256bit_move): Delete.
858 (loongarch_split_256bit_move_p): Delete.
859 (loongarch_split_vector_move): Add a function declaration.
860 * config/loongarch/loongarch.cc
861 (loongarch_vector_costs::finish_cost): Adjust the code
862 formatting.
863 (loongarch_split_vector_move_p): Merge
864 loongarch_split_128bit_move_p and loongarch_split_256bit_move_p.
865 (loongarch_split_move_p): Merge code.
866 (loongarch_split_move): Likewise.
867 (loongarch_split_128bit_move_p): Delete.
868 (loongarch_split_256bit_move_p): Delete.
869 (loongarch_split_128bit_move): Delete.
870 (loongarch_split_vector_move): Merge loongarch_split_128bit_move
871 and loongarch_split_256bit_move.
872 (loongarch_split_256bit_move): Delete.
873 (loongarch_global_init): Remove the extra semicolon at the
874 end of the function.
875 * config/loongarch/loongarch.md (*movdf_softfloat): Added a new
876 condition TARGET_64BIT.
877
8782024-07-19 Andrew MacLeod <amacleod@redhat.com>
879
880 PR tree-optimization/116003
881 * value-relation.cc (equiv_oracle::register_initial_def): Check
882 if SSA_NAME is in the IL before registering.
883
8842024-07-19 Thomas Schwinge <tschwinge@baylibre.com>
885
886 * passes.def: Rewrite usage comment at the top.
887
8882024-07-19 Richard Sandiford <richard.sandiford@arm.com>
889
890 PR middle-end/115406
891 * fold-const.cc (native_encode_vector_part): For vector booleans,
892 check whether an element is nonzero and, if so, set all of the
893 correspending bits in the target image.
894 * simplify-rtx.cc (native_encode_rtx): Likewise.
895
8962024-07-19 Georg-Johann Lay <avr@gjlay.de>
897
898 * config/avr/builtins.def (MASK1): New DEF_BUILTIN.
899 * config/avr/avr.cc (avr_rtx_costs_1): Handle rtx costs for
900 expressions like __builtin_avr_mask1.
901 (avr_init_builtins) <uintQI_ftype_uintQI_uintQI>: New tree type.
902 (avr_expand_builtin) [AVR_BUILTIN_MASK1]: Diagnose unexpected forms.
903 (avr_fold_builtin) [AVR_BUILTIN_MASK1]: Handle case.
904 * config/avr/avr.md (gen_mask1): New expand helper.
905 (mask1_0x01_split, mask1_0x80_split, mask1_0xfe_split): New
906 insn-and-split.
907 (*mask1_0x01, *mask1_0x80, *mask1_0xfe): New insns.
908 * doc/extend.texi (AVR Built-in Functions) <__builtin_avr_mask1>:
909 Document new built-in function.
910
9112024-07-19 Cupertino Miranda <cupertino.miranda@oracle.com>
912
913 * config/bpf/atomic.md (atomic_compare_and_swap,
914 atomic_exchange): Add operand modifier %M to the first
915 operand.
916 * config/bpf/bpf.cc (no_parentheses_mem_operand): Create
917 variable.
918 (bpf_print_operand): Set no_parentheses_mem_operand variable if
919 %M operand is used.
920 (bpf_print_operand_address): Conditionally output parentheses.
921
9222024-07-19 Pan Li <pan2.li@intel.com>
923
924 PR target/115863
925 * match.pd: Add single_use check for .SAT_TRUNC form 2.
926
9272024-07-18 René Rebe <rene@exactcode.de>
928 Peter Bergner <bergner@linux.ibm.com>
929
930 PR target/97367
931 * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Do not consider
932 OPTION_MASK_ALTIVEC.
933 (emit_asm_machine): For Altivec compiles, emit a ".machine altivec".
934
9352024-07-18 Marek Polacek <polacek@redhat.com>
936 Jakub Jelinek <jakub@redhat.com>
937
938 PR c++/115865
939 * tree-eh.cc (get_eh_else): Check that the result of
940 gimple_seq_first_stmt is non-null.
941
9422024-07-18 LIU Hao <lh_mouse@126.com>
943
944 PR rtl-optimization/115049
945 * varasm.cc (decl_binds_to_current_def_p): Add a check for COMDAT
946 declarations too, like weak ones.
947
9482024-07-18 Richard Biener <rguenther@suse.de>
949
950 PR middle-end/115641
951 * fold-const.cc (decode_field_reference): If the inner
952 reference isn't something we can take the address of, fail.
953
9542024-07-18 Pan Li <pan2.li@intel.com>
955
956 * doc/md.texi: Add Standard-Names ustrunc and sstrunc.
957
9582024-07-18 Rubin Gerritsen <rubin.gerritsen@gmail.com>
959
960 * gimple-fold.cc (dump_transformation): Moved definition.
961 (replace_call_with_call_and_fold): Calls dump_transformation.
962 (gimple_fold_builtin_stxcpy_chk): Removes call to
963 dump_transformation, now in replace_call_with_call_and_fold.
964 (gimple_fold_builtin_stxncpy_chk): Removes call to
965 dump_transformation, now in replace_call_with_call_and_fold.
966
9672024-07-18 Richard Biener <rguenther@suse.de>
968
969 PR tree-optimization/104515
970 * tree-ssa-loop-im.cc (execute_sm_exit): Add clobbers_to_prune
971 parameter and handle re-materializing of clobbers.
972 (sm_seq_valid_bb): end-of-storage/object clobbers are OK inside
973 an ordered sequence of stores.
974 (sm_seq_push_down): Refuse to push down clobbers.
975 (hoist_memory_references): Prune clobbers from the loop body
976 we re-materialized on an exit.
977
9782024-07-18 Roger Sayle <roger@nextmovesoftware.com>
979
980 * match.pd ((FTYPE) N CMP CST): Only worry about exceptions with
981 flag_trapping_math, and about signaling NaNs with HONOR_SNANS.
982
9832024-07-18 Kyrylo Tkachov <ktkachov@nvidia.com>
984
985 * doc/invoke.texi (AArch64 Options): Document rewriting of
986 -march=native to -mcpu=native.
987
9882024-07-18 liuhongt <hongtao.liu@intel.com>
989
990 PR target/115843
991 * config/i386/predicates.md (const0_or_m1_operand): New
992 predicate.
993 * config/i386/sse.md (*<avx512>_store<mode>_mask_1): New
994 pre_reload define_insn_and_split.
995 (V): Add V32BF,V16BF,V8BF.
996 (V4SF_V8BF): Rename to ..
997 (V24F_128): .. this.
998 (*vec_concat<mode>): Adjust with V24F_128.
999 (*vec_concat<mode>_0): Ditto.
1000
10012024-07-18 Andi Kleen <ak@linux.intel.com>
1002
1003 PR c/83324
1004 * calls.cc (initialize_argument_information): Mark messages
1005 for translation.
1006 (can_implement_as_sibling_call_p): Dito.
1007 (expand_call): Dito.
1008
10092024-07-18 Andi Kleen <ak@linux.intel.com>
1010
1011 PR c/83324
1012 * tree-tailcall.cc (maybe_error_musttail): New function.
1013 (suitable_for_tail_opt_p): Report error reason.
1014 (suitable_for_tail_call_opt_p): Report error reason.
1015 (find_tail_calls): Accept basic blocks with abnormal edges.
1016 Delay reporting of errors until the call is discovered.
1017 Move top level suitability checks to here.
1018 (tree_optimize_tail_calls_1): Remove top level checks.
1019
10202024-07-18 Andi Kleen <ak@linux.intel.com>
1021
1022 PR c/83324
1023 * function.h (struct function): Add has_musttail.
1024 * lto-streamer-in.cc (input_struct_function_base): Stream
1025 has_musttail.
1026 * lto-streamer-out.cc (output_struct_function_base): Dito.
1027 * passes.def (pass_musttail): Add.
1028 * tree-cfg.cc (notice_special_calls): Record has_musttail.
1029 (clear_special_calls): Clear has_musttail.
1030 * tree-pass.h (make_pass_musttail): Add.
1031 * tree-tailcall.cc (find_tail_calls): Handle only_musttail
1032 argument.
1033 (tree_optimize_tail_calls_1): Pass on only_musttail.
1034 (execute_tail_calls): Pass only_musttail as false.
1035 (class pass_musttail): Add.
1036 (make_pass_musttail): Add.
1037
10382024-07-18 Andi Kleen <ak@linux.intel.com>
1039
1040 PR target/115255
1041 * function.cc (thread_prologue_and_epilogue_insns): Check
1042 cfun->tail_call_marked for sibcalls too.
1043 (rest_of_handle_thread_prologue_and_epilogue): Dito.
1044
10452024-07-18 Andi Kleen <ak@linux.intel.com>
1046
1047 PR c/83324
1048 * calls.cc (maybe_complain_about_tail_call): Clear must tail
1049 flag on error.
1050 (expand_call): Give error messages for all musttail failures.
1051
10522024-07-17 Richard Sandiford <richard.sandiford@arm.com>
1053
1054 PR rtl-optimization/115929
1055 * rtl-ssa/movement.h (canonicalize_move_range): Check for null prev
1056 and next insns and create an invalid move range for them.
1057
10582024-07-17 Richard Sandiford <richard.sandiford@arm.com>
1059
1060 PR rtl-optimization/115928
1061 * rtl-ssa/accesses.h (clobber_group): Add a new constructor that
1062 takes the first, last and root clobbers.
1063 * rtl-ssa/internals.inl (clobber_group::clobber_group): Define it.
1064 * rtl-ssa/accesses.cc (function_info::split_clobber_group): Use it.
1065 Allocate a new group for both sides and invalidate the previous group.
1066 (function_info::add_def): After calling split_clobber_group,
1067 remove the old group from the splay tree.
1068
10692024-07-17 Richard Sandiford <richard.sandiford@arm.com>
1070
1071 * genattrtab.cc (attr_desc::cxx_type): New field.
1072 (write_attr_get, write_attr_value): Use it.
1073 (gen_attr, find_attr, make_internal_attr): Initialize it,
1074 dropping enum tags.
1075
10762024-07-17 Eikansh Gupta <quic_eikagupt@quicinc.com>
1077
1078 PR tree-optimization/111150
1079 * match.pd (`(a ? x : y) eq/ne (b ? x : y)`): New pattern.
1080 (`(a ? x : y) eq/ne (b ? y : x)`): New pattern.
1081
10822024-07-17 Andrew Pinski <quic_apinski@quicinc.com>
1083
1084 * dbgcnt.def (ext_dce): New debug counter.
1085 * ext-dce.cc (ext_dce_try_optimize_insn): Reject the insn
1086 if the debug counter says so.
1087 (ext_dce): Rename to ...
1088 (ext_dce_execute): This.
1089 (pass_ext_dce::execute): Update for the name of ext_dce.
1090
10912024-07-17 Uros Bizjak <ubizjak@gmail.com>
1092
1093 PR target/115526
1094 * config/alpha/alpha.md (movdi_er_high_g): Add cannot_copy attribute.
1095 (movdi_er_tlsgd): Ditto.
1096 (movdi_er_tlsldm): Ditto.
1097 (call_value_osf_<tls>): Ditto.
1098
10992024-07-17 Georg-Johann Lay <avr@gjlay.de>
1100
1101 PR target/90616
1102 * config/avr/predicates.md (const_0mod256_operand): New predicate.
1103 * config/avr/constraints.md (Cp8): New constraint.
1104 * config/avr/avr.md (*aligned_add_symbol): New insn.
1105 * config/avr/avr.cc (avr_out_plus_symbol) [HImode]:
1106 When op2 is a multiple of 256, there is no need to add / subtract
1107 the lo8 part.
1108 (avr_rtx_costs_1) [PLUS && HImode]: Return expected costs for
1109 new insn *aligned_add_symbol as it applies.
1110
11112024-07-17 Jakub Jelinek <jakub@redhat.com>
1112
1113 PR middle-end/115887
1114 * gimple-lower-bitint.cc (gimple_lower_bitint): Use gsi_insert_on_edge
1115 instead of gsi_insert_on_edge_immediate and set edge_insertions to
1116 true.
1117
11182024-07-17 Jakub Jelinek <jakub@redhat.com>
1119
1120 * varasm.cc (default_elf_asm_output_ascii): Use ASM_OUTPUT_SKIP instead
1121 of 2 or more default_elf_asm_output_limited_string (f, "") calls and
1122 adjust base64 heuristics correspondingly.
1123
11242024-07-17 Tamar Christina <tamar.christina@arm.com>
1125
1126 PR tree-optimization/115936
1127 * tree-scalar-evolution.cc (simple_iv_with_niters): Use sizetype for
1128 pointers.
1129
11302024-07-17 Feng Xue <fxue@os.amperecomputing.com>
1131
1132 PR tree-optimization/114440
1133 * tree-vectorizer.h (struct _stmt_vec_info): Add a new field
1134 reduc_result_pos.
1135 * tree-vect-loop.cc (vect_transform_reduction): Generate lane-reducing
1136 statements in an optimized order.
1137
11382024-07-17 Feng Xue <fxue@os.amperecomputing.com>
1139
1140 PR tree-optimization/114440
1141 * tree-vectorizer.h (vectorizable_lane_reducing): New function
1142 declaration.
1143 * tree-vect-stmts.cc (vect_analyze_stmt): Call new function
1144 vectorizable_lane_reducing to analyze lane-reducing operation.
1145 * tree-vect-loop.cc (vect_model_reduction_cost): Remove cost computation
1146 code related to emulated_mixed_dot_prod.
1147 (vectorizable_lane_reducing): New function.
1148 (vectorizable_reduction): Allow multiple lane-reducing operations in
1149 loop reduction. Move some original lane-reducing related code to
1150 vectorizable_lane_reducing.
1151 (vect_transform_reduction): Adjust comments with updated example.
1152
11532024-07-17 Feng Xue <fxue@os.amperecomputing.com>
1154
1155 * tree-vect-loop.cc (vect_reduction_update_partial_vector_usage):
1156 Calculate effective vector stmts number with generic
1157 vect_get_num_copies.
1158 (vect_transform_reduction): Insert copies for lane-reducing so as to
1159 fix over-estimated vector stmts number.
1160 (vect_transform_cycle_phi): Calculate vector PHI number only based on
1161 output vectype.
1162 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Remove
1163 adjustment on vector stmts number specific to slp reduction.
1164
11652024-07-17 Feng Xue <fxue@os.amperecomputing.com>
1166
1167 * tree-vectorizer.h (vect_get_num_copies): New overload function.
1168 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Calculate
1169 number of vector stmts for slp node with vect_get_num_copies.
1170 (vect_slp_analyze_node_operations): Calculate number of vector elements
1171 for constant/external slp node with vect_get_num_copies.
1172
11732024-07-17 Richard Biener <rguenther@suse.de>
1174
1175 PR tree-optimization/115959
1176 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
1177 Get at the REDUC_IDX child in a safer way for COND_EXPR
1178 nodes.
1179
11802024-07-17 Jakub Jelinek <jakub@redhat.com>
1181
1182 PR other/115958
1183 * varasm.cc (default_elf_asm_output_ascii): Cast t - s to unsigned
1184 to avoid -Wsign-compare warnings.
1185
11862024-07-17 Jakub Jelinek <jakub@redhat.com>
1187
1188 PR middle-end/115527
1189 * gimple-fold.cc (clear_padding_flush): Introduce endsize
1190 variable and use it instead of wordsize when comparing it against
1191 nonzero_last.
1192 (clear_padding_type): Increment off by sz.
1193
11942024-07-17 Haochen Gui <guihaoc@gcc.gnu.org>
1195
1196 * config/rs6000/rs6000.md (mov<mode>cc, *mov<mode>cc_p10,
1197 *mov<mode>cc_invert_p10, *fpmask<mode>, *xxsel<mode>,
1198 @ieee_128bit_vsx_abs<mode>2, *ieee_128bit_vsx_nabs<mode>2,
1199 add<mode>3, sub<mode>3, mul<mode>3, div<mode>3, sqrt<mode>2,
1200 copysign<mode>3, copysign<mode>3_hard, copysign<mode>3_soft,
1201 @neg<mode>2_hw, @abs<mode>2_hw, *nabs<mode>2_hw, fma<mode>4_hw,
1202 *fms<mode>4_hw, *nfma<mode>4_hw, *nfms<mode>4_hw,
1203 extend<SFDF:mode><IEEE128:mode>2_hw, trunc<mode>df2_hw,
1204 trunc<mode>sf2_hw, fix<uns>_<IEEE128:mode><SDI:mode>2_hw,
1205 fix<uns>_trunc<IEEE128:mode><QHI:mode>2,
1206 *fix<uns>_trunc<IEEE128:mode><QHSI:mode>2_mem,
1207 float_<mode>di2_hw, float_<mode>si2_hw,
1208 float<QHI:mode><IEEE128:mode>2, floatuns_<mode>di2_hw,
1209 floatuns_<mode>si2_hw, floatuns<QHI:mode><IEEE128:mode>2,
1210 floor<mode>2, ceil<mode>2, btrunc<mode>2, round<mode>2,
1211 add<mode>3_odd, sub<mode>3_odd, mul<mode>3_odd, div<mode>3_odd,
1212 sqrt<mode>2_odd, fma<mode>4_odd, *fms<mode>4_odd, *nfma<mode>4_odd,
1213 *nfms<mode>4_odd, trunc<mode>df2_odd, *cmp<mode>_hw for IEEE128):
1214 Remove guard FLOAT128_IEEE_P.
1215 (@extenddf<mode>2_fprs, @extenddf<mode>2_vsx,
1216 trunc<mode>df2_internal1, trunc<mode>df2_internal2,
1217 fix_trunc_helper<mode>, neg<mode>2, *cmp<mode>_internal1,
1218 *cmp<IBM128:mode>_internal2 for IBM128): Remove guard FLOAT128_IBM_P.
1219
12202024-07-17 Kewen Lin <linkw@linux.ibm.com>
1221
1222 * config/rs6000/rs6000.cc (init_float128_ieee): Use trunc_optab rather
1223 than sext_optab for converting FLOAT128_IBM_P mode to FLOAT128_IEEE_P
1224 mode, and use sext_optab rather than trunc_optab for converting
1225 FLOAT128_IEEE_P mode to FLOAT128_IBM_P mode.
1226 (rs6000_expand_float128_convert): Likewise.
1227
12282024-07-17 Kewen Lin <linkw@linux.ibm.com>
1229
1230 PR target/112993
1231 * tree.cc (build_common_tree_nodes): Drop the workaround for rs6000
1232 KFmode precision adjustment.
1233
12342024-07-17 Kewen Lin <linkw@linux.ibm.com>
1235
1236 PR target/112993
1237 * value-range.h (range_compatible_p): Remove the workaround on
1238 different type precision between _Float128 and long double.
1239
12402024-07-17 Kewen Lin <linkw@linux.ibm.com>
1241
1242 PR target/112993
1243 * config/rs6000/rs6000-modes.def (IFmode, KFmode, TFmode): Define
1244 with FLOAT_MODE instead of FRACTIONAL_FLOAT_MODE, don't use special
1245 precisions any more.
1246 (rs6000-modes.h): Remove include.
1247 * config/rs6000/rs6000-modes.h: Remove.
1248 * config/rs6000/rs6000.h (rs6000-modes.h): Remove include.
1249 * config/rs6000/t-rs6000: Remove rs6000-modes.h include.
1250 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
1251 all uses of FLOAT_PRECISION_TFmode with 128.
1252 (rs6000_c_mode_for_floating_type): Likewise.
1253 * config/rs6000/rs6000.md (define_expand extendiftf2): Remove.
1254 (define_expand extendifkf2): Remove.
1255 (define_expand extendtfkf2): Remove.
1256 (define_expand trunckftf2): Remove.
1257 (define_expand trunctfif2): Remove.
1258 (define_expand extendtfif2): Add new assertion.
1259 (define_expand expandkftf2): New.
1260 (define_expand trunciftf2): Add new assertion.
1261 (define_expand trunctfkf2): New.
1262 (define_expand truncifkf2): Change with gcc_unreachable.
1263 (define_expand expandkfif2): New.
1264 (define_insn_and_split extendkftf2): Rename to ...
1265 (define_insn_and_split *extendkftf2): ... this.
1266 (define_insn_and_split trunctfkf2): Rename to ...
1267 (define_insn_and_split *extendtfkf2): ... this.
1268
12692024-07-17 Kewen Lin <linkw@linux.ibm.com>
1270
1271 PR target/112993
1272 * expr.cc (convert_mode_scalar): Allow same precision conversion
1273 between scalar floating point modes if whose underlying format is
1274 ibm_extended_format or ieee_quad_format, and refactor assertion
1275 with new lambda function acceptable_same_precision_modes. Use
1276 trunc_optab rather than sext_optab for ibm128 to ieee128 conversion.
1277 * optabs-libfuncs.cc (gen_trunc_conv_libfunc): Use trunc_optab rather
1278 than sext_optab for ibm128 to ieee128 conversion.
1279
12802024-07-17 Peter Bergner <bergner@linux.ibm.com>
1281
1282 PR target/114759
1283 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Disallow
1284 CPUs and ABIs that do no support the ROP protection insns.
1285 * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Remove now
1286 unneeded tests.
1287 (rs6000_emit_prologue): Likewise.
1288 Remove unneeded gcc_assert.
1289 (rs6000_emit_epilogue): Likewise.
1290 * config/rs6000/rs6000.md: Likewise.
1291
12922024-07-17 Peter Bergner <bergner@linux.ibm.com>
1293
1294 PR target/114759
1295 * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Use TARGET_POWER8.
1296 (rs6000_emit_prologue): Likewise.
1297 * config/rs6000/rs6000.md (hashchk): Likewise.
1298 (hashst): Likewise.
1299 Fix whitespace.
1300
13012024-07-16 Andrew MacLeod <amacleod@redhat.com>
1302
1303 PR tree-optimization/115951
1304 * range-op-ptr.cc (operator_equal::fold_range): Return a boolean
1305 range with the requested type.
1306 (operator_not_equal::fold_range): Likewise.
1307 (operator_lt::fold_range): Likewise.
1308 (operator_le::fold_range): Likewise.
1309 (operator_gt::fold_range): Likewise.
1310 (operator_ge::fold_range): Likewise.
1311
13122024-07-16 Iain Sandoe <iain@sandoe.co.uk>
1313
1314 PR c++/115434
1315 PR c++/110871
1316 PR c++/110872
1317 * gimplify.cc (struct gimplify_ctx): Add a flag to show we are
1318 expending a handler.
1319 (gimplify_expr): When we are expanding a handler, and the body
1320 transforms might have re-written DECL_RESULT into a gimple var,
1321 ensure that hander references to DECL_RESULT are also re-written
1322 to refer to the gimple var. When we are processing an EH_ELSE
1323 expression, then add it if either of the cleanup slots is in
1324 use.
1325
13262024-07-16 Richard Sandiford <richard.sandiford@arm.com>
1327
1328 PR rtl-optimization/115929
1329 * rtl-ssa/insns.cc (function_info::remove_insn): Remove an
1330 order_node from the instruction as well as from the splay tree.
1331
13322024-07-16 Richard Sandiford <richard.sandiford@arm.com>
1333
1334 PR rtl-optimization/115901
1335 * recog.cc (insn_propagation::apply_to_rvalue_1): Restrict
1336 paradoxical mode punning to cases where "to" is constant.
1337
13382024-07-16 Richard Sandiford <richard.sandiford@arm.com>
1339
1340 PR rtl-optimization/115891
1341 * rtl-ssa/changes.cc (find_clobbered_access): New function.
1342 (recog_level2): Use it to check for overlap between input
1343 registers and hard-coded clobbers. Conditionally reset
1344 recog_data.insn after changing the insn code.
1345
13462024-07-16 Georg-Johann Lay <avr@gjlay.de>
1347
1348 * config/avr/avr.cc (avr_out_minus): Assimilate into...
1349 (avr_out_plus_ext): ...this new function.
1350 (avr_adjust_insn_length) [ADJUST_LEN_PLUS_EXT]: Handle case.
1351 (avr_rtx_costs_1) [PLUS, MINUS]: Adjust RTX costs.
1352 * config/avr/avr.md (adjust_len) <plus_ext>: Add new attribute value.
1353 (*addpsi3_zero_extend.hi_split): Assimilate...
1354 (*addpsi3_zero_extend.qi_split): Assimilate...
1355 (*addsi3_zero_extend_split): Assimilate...
1356 (*addsi3_zero_extend.hi_split): Assimilate...
1357 (*addpsi3_sign_extend.hi_split): Assimilate...
1358 (*addhi3.sign_extend1_split): Assimilate...
1359 (*add<PSISI:mode>3.<code>.<QIPSI:mode>_split): ...into this
1360 new insn-and-split.
1361 (*addpsi3_zero_extend.hi): Assimilate...
1362 (*addpsi3_zero_extend.qi): Assimilate...
1363 (*addsi3_zero_extend): Assimilate...
1364 (*addsi3_zero_extend.hi): Assimilate...
1365 (*addpsi3_sign_extend.hi): Assimilate...
1366 (*addhi3.sign_extend1): Assimilate...
1367 (*add<PSISI:mode>3.<code>.<QIPSI:mode>): ...into this new insn.
1368 (*subpsi3_sign_extend.hi_split): Assimilate...
1369 (*subhi3.sign_extend2_split): Assimilate...
1370 (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>_split): Assimilate...
1371 (*sub<HISI:mode>3.<code><QIPSI:mode>_split): ...into this new
1372 insn-and-split.
1373 (*subpsi3_sign_extend.hi): Assimilate...
1374 (*subhi3.sign_extend2): Assimilate...
1375 (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>): Assimilate...
1376 (*sub<HISI:mode>3.<code>.<QIPSI:mode>): ...into this new insn.
1377 (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>): Use avr_out_plus_ext
1378 for asm out.
1379 * config/avr/avr-protos.h (avr_out_minus): Remove.
1380 (avr_out_plus_ext): New proto.
1381
13822024-07-16 Richard Biener <rguenther@suse.de>
1383
1384 PR tree-optimization/115841
1385 * tree-vect-loop.cc (vect_transform_cycle_phi): Correctly
1386 place the partial vector reduction for the accumulator
1387 re-use when the main loop cannot be skipped but the
1388 epilogue can.
1389
13902024-07-16 Georg-Johann Lay <avr@gjlay.de>
1391
1392 * config/avr/avr-protos.h (avr_emit_xior_with_shift): New proto.
1393 * config/avr/avr.cc (avr_emit_xior_with_shift): New function.
1394 * config/avr/avr.md (any_lshift): New code iterator.
1395 (*<xior:code><mode>.<any_lshift:code>): New insn-and-split.
1396 (<code><HISI:mode><QIPSI:mode>.0): Replaces...
1397 (*<code_stdname><mode>qi.byte0): ...this one.
1398 (*<xior:code><HISI:mode><QIPSI:mode>.<any_lshift:code>): Replaces...
1399 (*<code_stdname><mode>qi.byte1-3): ...this one.
1400
14012024-07-16 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1402
1403 * config/s390/3931.md (vlbr, vstbr): Remove.
1404 * config/s390/s390.md (xdee): Add FPRX2 mapping.
1405 * config/s390/vector.md (bhfgq): Add TF mapping.
1406
14072024-07-16 Richard Biener <rguenther@suse.de>
1408
1409 * config/i386/x86-tune-costs.h (znver5_cost): Update unaligned
1410 load and store cost from the aligned costs.
1411
14122024-07-16 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1413
1414 PR target/114189
1415 * config/s390/vector.md (V_HW2): Remove.
1416 (vcond<V_HW:mode><V_HW2:mode>): Remove.
1417 (vcondu<V_HW:mode><V_HW2:mode>): Remove.
1418
14192024-07-16 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1420
1421 * config/s390/vector.md: Enable vcond_mask for 128-bit ops.
1422
14232024-07-16 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1424
1425 * config/s390/vector.md (V_HW): Enable V1TI unconditionally and
1426 add TI.
1427 (vec_cmpu<VIT_HW:mode><VIT_HW:mode>): Add 128-bit integer
1428 variants.
1429 (*vec_cmpeq<mode><mode>_nocc_emu): Emulate operation.
1430 (*vec_cmpgt<mode><mode>_nocc_emu): Emulate operation.
1431 (*vec_cmpgtu<mode><mode>_nocc_emu): Emulate operation.
1432
14332024-07-16 Richard Biener <rguenther@suse.de>
1434
1435 PR tree-optimization/115843
1436 * tree-vect-loop-manip.cc
1437 (vect_set_loop_condition_partial_vectors_avx512): Properly
1438 bias the shift of the initial mask for alignment peeling.
1439
14402024-07-16 Richard Biener <rguenther@suse.de>
1441
1442 PR tree-optimization/115843
1443 * config/i386/x86-tune-costs.h (znver4_cost): Update unaligned
1444 load and store cost from the aligned costs.
1445
14462024-07-16 Roger Sayle <roger@nextmovesoftware.com>
1447 Richard Biener <rguenther@suse.de>
1448
1449 PR tree-optimization/114661
1450 * match.pd ((X*C1)|(X*C2) to X*(C1+C2)): Allow optional useless
1451 type conversions around multiplications, such as those inserted
1452 by this transformation.
1453
14542024-07-16 Hu, Lin1 <lin1.hu@intel.com>
1455
1456 PR target/107432
1457 * config/i386/sse.md
1458 (PMOV_SRC_MODE_3_AVX2): Add TARGET_AVX2 for V4DI and V8SI.
1459 (PMOV_SRC_MODE_4): Add TARGET_AVX2 for V4DI.
1460 (trunc<mode><pmov_dst_3_lower>2): Change constraint from TARGET_AVX2 to
1461 TARGET_SSSE3.
1462 (trunc<mode><pmov_dst_4_lower>2): Ditto.
1463 (truncv2div2si2): Change constraint from TARGET_AVX2 to TARGET_SSE.
1464
14652024-07-16 Jeff Law <jlaw@ventanamicro.com>
1466
1467 * ext-dce.cc (ext_dce_process_uses): Simplify control flow and fix
1468 liveness computation for shift/rotate counts.
1469
14702024-07-15 Jeff Law <jlaw@ventanamicro.com>
1471
1472 * ext-dce.cc (carry_backpropagate): Make return type unsigned as well.
1473 Cast to signed for right shift to preserve sign bit.
1474
14752024-07-15 Christoph Müllner <christoph.muellner@vrull.eu>
1476
1477 Revert:
1478 2024-07-15 Christoph Müllner <christoph.muellner@vrull.eu>
1479
1480 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
1481 Replace new + std::unique_ptr by alloca().
1482 (riscv_process_one_target_attr): Likewise.
1483 (riscv_process_target_attr): Likewise.
1484
14852024-07-15 Christoph Müllner <christoph.muellner@vrull.eu>
1486
1487 * common/config/riscv/riscv-common.cc (riscv_subset_list::add):
1488 Allow adding enabled extension if m_allow_adding_dup is set.
1489 * config/riscv/riscv-subset.h: Add m_allow_adding_dup and setter.
1490 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
1491 Allow adding enabled extensions.
1492
14932024-07-15 Christoph Müllner <christoph.muellner@vrull.eu>
1494
1495 PR target/115554
1496 PR target/115562
1497 * common/config/riscv/riscv-common.cc (struct riscv_func_target_info):
1498 Remove.
1499 (struct riscv_func_target_hasher): Likewise.
1500 (riscv_func_decl_hash): Likewise.
1501 (riscv_func_target_hasher::hash): Likewise.
1502 (riscv_func_target_hasher::equal): Likewise.
1503 (riscv_current_subset_list): Likewise.
1504 (riscv_cmdline_subset_list): Remove obsolete space.
1505 (riscv_func_target_table_lazy_init): Remove.
1506 (riscv_func_target_get): Likewise.
1507 (riscv_func_target_put): Likewise.
1508 (riscv_func_target_remove_and_destory): Likewise.
1509 (riscv_arch_str): Generate from cmdline_subset_list.
1510 (riscv_set_arch_by_subset_list): Don't set current_subset_list.
1511 (riscv_parse_arch_string): Remove current_subset_list.
1512 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
1513 Get subset list via riscv_cmdline_subset_list().
1514 * config/riscv/riscv-subset.h (riscv_current_subset_list):
1515 Remove prototype.
1516 (riscv_func_target_get): Likewise.
1517 (riscv_func_target_put): Likewise.
1518 (riscv_func_target_remove_and_destory): Likewise.
1519 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
1520 Build base arch string from existing target options, if any.
1521 (riscv_target_attr_parser::update_settings): Store new arch
1522 string in target options.
1523 (riscv_process_one_target_attr): Whitespace fix.
1524 (riscv_process_target_attr): Drop opts argument.
1525 (riscv_option_valid_attribute_p): Properly save, change and restore
1526 target options.
1527 * config/riscv/riscv.cc (get_arch_str): New function.
1528 (riscv_declare_function_name): Get arch string for option-arch
1529 directive from function's target options.
1530 * config/riscv/riscv.opt: Add riscv_arch_string variable to
1531 march option.
1532
15332024-07-15 Christoph Müllner <christoph.muellner@vrull.eu>
1534
1535 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
1536 Replace new + std::unique_ptr by alloca().
1537 (riscv_process_one_target_attr): Likewise.
1538 (riscv_process_target_attr): Likewise.
1539
15402024-07-15 Alexandre Oliva <oliva@adacore.com>
1541
1542 PR target/113719
1543 * config/i386/i386-options.cc (ix86_option_override_internal):
1544 Move flag_omit_frame_pointer final overrider...
1545 (ix86_recompute_optlev_based_flags): ... here.
1546
15472024-07-15 Georg-Johann Lay <avr@gjlay.de>
1548
1549 * config/avr/avr.md: Simplify mode usage.
1550 (GET_MODE_SIZE (<MODE>mode)): Use <SIZE> instead.
1551 (GET_MODE_BITSIZE (<MODE>mode) - 1): Use <MSB> instead.
1552 (GET_MODE_MASK (QImode)): Use 0xff instead.
1553 * config/avr/avr-fixed.md: Same.
1554
15552024-07-15 Jakub Jelinek <jakub@redhat.com>
1556
1557 * configure.ac (HAVE_GAS_BASE64): New check.
1558 * config/elfos.h (BASE64_ASM_OP): Define if HAVE_GAS_BASE64 is
1559 defined.
1560 * varasm.cc (assemble_string): Bump maximum from 2000 to 16384 if
1561 BASE64_ASM_OP is defined.
1562 (default_elf_asm_output_limited_string): Emit opening '"' together
1563 with STRING_ASM_OP.
1564 (default_elf_asm_output_ascii): Use BASE64_ASM_OP if defined and
1565 beneficial. Remove UB when last_null is NULL.
1566 * configure: Regenerate.
1567 * config.in: Regenerate.
1568
15692024-07-15 liuhongt <hongtao.liu@intel.com>
1570
1571 PR target/115872
1572 * tree-ssa-ccp.cc (convert_atomic_bit_not): Remove use_stmt after use_nop_stmt is removed.
1573 (optimize_atomic_bit_test_and): Ditto.
1574
15752024-07-15 Hongyu Wang <hongyu.wang@intel.com>
1576
1577 * config/i386/i386.md (has_nf): New define_attr, add to all
1578 nf related patterns.
1579 * config/i386/i386-features.cc (apx_nf_convert): New function
1580 to convert Non-NF insns to their NF counterparts.
1581 (class pass_apx_nf_convert): New pass class.
1582 (make_pass_apx_nf_convert): New.
1583 * config/i386/i386-passes.def: Add pass_apx_nf_convert after
1584 rtl_ifcvt.
1585 * config/i386/i386-protos.h (make_pass_apx_nf_convert): Declare.
1586
15872024-07-15 Monk Chiang <monk.chiang@sifive.com>
1588
1589 * config/riscv/riscv.cc (riscv_print_operand): Add 'L' letter
1590 to print zihintntl instructions string.
1591 * config/riscv/riscv.md (prefetch): Add zihintntl instructions.
1592
15932024-07-15 Feng Wang <wangfeng@eswincomputing.com>
1594
1595 * config/riscv/generic-vector-ooo.md: Add def_insn_reservation for vector BFloat16.
1596 * config/riscv/riscv.md: Add new insn name for vector BFloat16.
1597 * config/riscv/vector-iterators.md: Add some iterators for vector BFloat16.
1598 * config/riscv/vector.md: Add some attribute for vector BFloat16.
1599 * config/riscv/vector-bfloat16.md: New file. Add insn pattern vector BFloat16.
1600
16012024-07-15 Feng Wang <wangfeng@eswincomputing.com>
1602
1603 * config/riscv/riscv-vector-builtins-bases.cc (class vfncvtbf16_f):
1604 Add 'Zvfbfmin' intrinsic in bases.
1605 (class vfwcvtbf16_f): Ditto.
1606 (class vfwmaccbf16): Add 'Zvfbfwma' intrinsic in bases.
1607 (BASE): Add BASE macro for 'Zvfbfmin' and 'Zvfbfwma'.
1608 * config/riscv/riscv-vector-builtins-bases.h: Add declaration for 'Zvfbfmin' and 'Zvfbfwma'.
1609 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
1610 Add builtins def for 'Zvfbfmin' and 'Zvfbfwma'.
1611 (vfncvtbf16_f): Ditto.
1612 (vfncvtbf16_f_frm): Ditto.
1613 (vfwcvtbf16_f): Ditto.
1614 (vfwmaccbf16): Ditto.
1615 (vfwmaccbf16_frm): Ditto.
1616 * config/riscv/riscv-vector-builtins-shapes.cc (supports_vectype_p):
1617 Add vector intrinsic build judgment for BFloat16.
1618 (build_all): Ditto.
1619 (BASE_NAME_MAX_LEN): Adjust max length.
1620 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_F32_OPS):
1621 Add new operand type for BFloat16.
1622 (vfloat32mf2_t): Ditto.
1623 (vfloat32m1_t): Ditto.
1624 (vfloat32m2_t): Ditto.
1625 (vfloat32m4_t): Ditto.
1626 (vfloat32m8_t): Ditto.
1627 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_F32_OPS): Ditto.
1628 (validate_instance_type_required_extensions):
1629 Add required_ext checking for 'Zvfbfmin' and 'Zvfbfwma'.
1630 * config/riscv/riscv-vector-builtins.h (enum required_ext):
1631 Add required_ext declaration for 'Zvfbfmin' and 'Zvfbfwma'.
1632 (reqired_ext_to_isa_name): Ditto.
1633 (required_extensions_specified): Ditto.
1634 (struct function_group_info): Add match case for 'Zvfbfmin' and 'Zvfbfwma'.
1635 * config/riscv/riscv.cc (riscv_validate_vector_type):
1636 Add required_ext checking for 'Zvfbfmin' and 'Zvfbfwma'.
1637
16382024-07-15 Hongyu Wang <hongyu.wang@intel.com>
1639
1640 PR target/115889
1641 * config/i386/predicates.md (vcvtne2ps2bf_parallel): Remove.
1642 * config/i386/sse.md (hi_cvt_bf): Remove.
1643 (HI_CVT_BF): Likewise.
1644 (vpermt2_sepcial_bf16_shuffle_<mode>):Likewise.
1645
16462024-07-15 Feng Wang <wangfeng@eswincomputing.com>
1647
1648 * config/riscv/genrvv-type-indexer.cc (bfloat16_type):
1649 Generate bf16 vector_type and scalar_type in DEF_RVV_TYPE_INDEX.
1650 (bfloat16_wide_type): Ditto.
1651 (same_ratio_eew_bf16_type): Ditto.
1652 (main): Ditto.
1653 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE):
1654 Add vector type for BFloat16.
1655 (RVV_WHOLE_MODES): Add vector type for BFloat16.
1656 (RVV_FRACT_MODE): Ditto.
1657 (RVV_NF4_MODES): Ditto.
1658 (RVV_NF8_MODES): Ditto.
1659 (RVV_NF2_MODES): Ditto.
1660 * config/riscv/riscv-vector-builtins-types.def (vbfloat16mf4_t):
1661 Add builtin vector type for BFloat16.
1662 (vbfloat16mf2_t): Add builtin vector type for BFloat16.
1663 (vbfloat16m1_t): Ditto.
1664 (vbfloat16m2_t): Ditto.
1665 (vbfloat16m4_t): Ditto.
1666 (vbfloat16m8_t): Ditto.
1667 (vbfloat16mf4x2_t): Ditto.
1668 (vbfloat16mf4x3_t): Ditto.
1669 (vbfloat16mf4x4_t): Ditto.
1670 (vbfloat16mf4x5_t): Ditto.
1671 (vbfloat16mf4x6_t): Ditto.
1672 (vbfloat16mf4x7_t): Ditto.
1673 (vbfloat16mf4x8_t): Ditto.
1674 (vbfloat16mf2x2_t): Ditto.
1675 (vbfloat16mf2x3_t): Ditto.
1676 (vbfloat16mf2x4_t): Ditto.
1677 (vbfloat16mf2x5_t): Ditto.
1678 (vbfloat16mf2x6_t): Ditto.
1679 (vbfloat16mf2x7_t): Ditto.
1680 (vbfloat16mf2x8_t): Ditto.
1681 (vbfloat16m1x2_t): Ditto.
1682 (vbfloat16m1x3_t): Ditto.
1683 (vbfloat16m1x4_t): Ditto.
1684 (vbfloat16m1x5_t): Ditto.
1685 (vbfloat16m1x6_t): Ditto.
1686 (vbfloat16m1x7_t): Ditto.
1687 (vbfloat16m1x8_t): Ditto.
1688 (vbfloat16m2x2_t): Ditto.
1689 (vbfloat16m2x3_t): Ditto.
1690 (vbfloat16m2x4_t): Ditto.
1691 (vbfloat16m4x2_t): Ditto.
1692 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
1693 Add required_ext checking for BFloat16.
1694 * config/riscv/riscv-vector-builtins.def (vbfloat16mf4_t):
1695 Add vector_type for BFloat16 in builtins.def.
1696 (vbfloat16mf4x2_t): Ditto.
1697 (vbfloat16mf4x3_t): Ditto.
1698 (vbfloat16mf4x4_t): Ditto.
1699 (vbfloat16mf4x5_t): Ditto.
1700 (vbfloat16mf4x6_t): Ditto.
1701 (vbfloat16mf4x7_t): Ditto.
1702 (vbfloat16mf4x8_t): Ditto.
1703 (vbfloat16mf2_t): Ditto.
1704 (vbfloat16mf2x2_t): Ditto.
1705 (vbfloat16mf2x3_t): Ditto.
1706 (vbfloat16mf2x4_t): Ditto.
1707 (vbfloat16mf2x5_t): Ditto.
1708 (vbfloat16mf2x6_t): Ditto.
1709 (vbfloat16mf2x7_t): Ditto.
1710 (vbfloat16mf2x8_t): Ditto.
1711 (vbfloat16m1_t): Ditto.
1712 (vbfloat16m1x2_t): Ditto.
1713 (vbfloat16m1x3_t): Ditto.
1714 (vbfloat16m1x4_t): Ditto.
1715 (vbfloat16m1x5_t): Ditto.
1716 (vbfloat16m1x6_t): Ditto.
1717 (vbfloat16m1x7_t): Ditto.
1718 (vbfloat16m1x8_t): Ditto.
1719 (vbfloat16m2_t): Ditto.
1720 (vbfloat16m2x2_t): Ditto.
1721 (vbfloat16m2x3_t): Ditto.
1722 (vbfloat16m2x4_t): Ditto.
1723 (vbfloat16m4_t): Ditto.
1724 (vbfloat16m4x2_t): Ditto.
1725 (vbfloat16m8_t): Ditto.
1726 (double_trunc_bfloat_scalar): Add scalar_type def for BFloat16.
1727 (double_trunc_bfloat_vector): Add vector_type def for BFloat16.
1728 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_BF_16):
1729 Add required defination of BFloat16 ext.
1730 * config/riscv/riscv-vector-switch.def (ENTRY):
1731 Add vector_type information for BFloat16.
1732 (TUPLE_ENTRY): Add tuple vector_type information for BFloat16.
1733
17342024-07-14 Roger Sayle <roger@nextmovesoftware.com>
1735
1736 * config/i386/i386-expand.cc (ix86_expand_fp_absneg_operator):
1737 Use E_?Fmode enumeration constants in switch statement.
1738 (ix86_expand_copysign): Likewise.
1739 (ix86_expand_xorsign): Likewise.
1740
17412024-07-14 Alejandro Colomar <alx@kernel.org>
1742
1743 PR c/115185
1744 * doc/invoke.texi: Document the new
1745 -Wunterminated-string-initialization.
1746
17472024-07-14 Hans-Peter Nilsson <hp@axis.com>
1748
1749 * config/cris/cris.cc (cris_option_override_after_change): Fix up
1750 comment regarding disabling late_combine.
1751
17522024-07-14 Hans-Peter Nilsson <hp@axis.com>
1753
1754 * config/cris/cris.cc (cris_option_override_after_change): New
1755 function. Disable late-combine by default.
1756 (cris_option_override): Call the new function.
1757
17582024-07-13 Mark Harmstone <mark@harmstone.com>
1759
1760 * dwarf2codeview.cc (write_lf_modifier): Expand upon comment.
1761
17622024-07-13 Mark Harmstone <mark@harmstone.com>
1763
1764 * dwarf2codeview.cc (write_data_symbol): Add alignment directive.
1765
17662024-07-13 Mark Harmstone <mark@harmstone.com>
1767
1768 * dwarf2codeview.cc (enum cv_leaf_type): Add padding constants.
1769 (write_cv_padding): Use names for padding constants.
1770
17712024-07-13 Mark Harmstone <mark@harmstone.com>
1772
1773 * dwarf2codeview.cc (S_LDATA32, S_GDATA32, S_COMPILE3): Undefine.
1774 (enum cv_sym_type): Define.
1775 (struct codeview_symbol): Use enum cv_sym_type.
1776 (write_codeview_symbols): Add default to switch.
1777
17782024-07-13 Mark Harmstone <mark@harmstone.com>
1779
1780 * dwarf2codeview.cc (enum cv_leaf_type): Define.
1781 (struct codeview_subtype): Use enum cv_leaf_type.
1782 (struct codeview_custom_type): Use enum cv_leaf_type.
1783 (write_lf_fieldlist): Add default to switch.
1784 (write_custom_types): Add default to switch.
1785 * dwarf2codeview.h (LF_MODIFIER, LF_POINTER): Undefine.
1786 (LF_PROCEDURE, LF_ARGLIST, LF_FIELDLIST, LF_BITFIELD): Likewise.
1787 (LF_INDEX, LF_ENUMERATE, LF_ARRAY, LF_CLASS): Likewise.
1788 (LF_STRUCTURE, LF_UNION, LF_ENUM, LF_MEMBER, LF_CHAR): Likewise.
1789 (LF_SHORT, LF_USHORT, LF_LONG, LF_ULONG, LF_QUADWORD): Likewise.
1790 (LF_UQUADWORD): Likewise.
1791
17922024-07-13 David Malcolm <dmalcolm@redhat.com>
1793
1794 * common.opt (fdiagnostics-show-highlight-colors): New option.
1795 * common.opt.urls: Regenerate.
1796 * coretypes.h (pp_markup::element): New forward decl.
1797 (pp_element): New typedef.
1798 * diagnostic-color.cc (gcc_color_defaults): Add "highlight-a"
1799 and "highlight-b".
1800 * diagnostic-format-json.cc (diagnostic_output_format_init_json):
1801 Disable highlight colors.
1802 * diagnostic-format-sarif.cc (diagnostic_output_format_init_sarif):
1803 Likewise.
1804 * diagnostic-highlight-colors.h: New file.
1805 * diagnostic-path.cc (struct event_range): Pass nullptr for
1806 highlight color of m_rich_loc.
1807 * diagnostic-show-locus.cc (colorizer::set_range): Handle ranges
1808 with m_highlight_color.
1809 (colorizer::STATE_NAMED_COLOR): New.
1810 (colorizer::m_richloc): New field.
1811 (colorizer::colorizer): Add richloc param for initializing
1812 m_richloc.
1813 (colorizer::set_named_color): New.
1814 (colorizer::begin_state): Add case STATE_NAMED_COLOR.
1815 (layout::layout): Pass richloc to m_colorizer's ctor.
1816 (selftest::test_one_liner_labels): Pass nullptr for new param of
1817 gcc_rich_location ctor for labels.
1818 (selftest::test_one_liner_labels_utf8): Likewise.
1819 * diagnostic.h (diagnostic_context::set_show_highlight_colors):
1820 New.
1821 * doc/invoke.texi: Add option -fdiagnostics-show-highlight-colors
1822 and highlight-a and highlight-b color caps.
1823 * doc/ux.texi
1824 (Use color consistently when highlighting mismatches): New
1825 subsection.
1826 * gcc-rich-location.cc (gcc_rich_location::add_expr): Add
1827 "highlight_color" param.
1828 (gcc_rich_location::maybe_add_expr): Likewise.
1829 * gcc-rich-location.h (gcc_rich_location::gcc_rich_location):
1830 Split out into a pair of ctors, where if a range_label is supplied
1831 the caller must also supply a highlight color.
1832 (gcc_rich_location::add_expr): Add "highlight_color" param.
1833 (gcc_rich_location::maybe_add_expr): Likewise.
1834 * gcc.cc (driver_handle_option): Handle
1835 OPT_fdiagnostics_show_highlight_colors.
1836 * lto-wrapper.cc (merge_and_complain): Likewise.
1837 (append_compiler_options): Likewise.
1838 (append_diag_options): Likewise.
1839 (run_gcc): Likewise.
1840 * opts-common.cc (decode_cmdline_options_to_array): Add comment
1841 about -fno-diagnostics-show-highlight-colors.
1842 * opts-global.cc (init_options_once): Preserve
1843 pp_show_highlight_colors in case the global_dc's printer is
1844 recreated.
1845 * opts.cc (common_handle_option): Handle
1846 OPT_fdiagnostics_show_highlight_colors.
1847 (gen_command_line_string): Likewise.
1848 * pretty-print-markup.h: New file.
1849 * pretty-print.cc: Include "pretty-print-markup.h" and
1850 "diagnostic-highlight-colors.h".
1851 (pretty_printer::format): Handle %e.
1852 (pretty_printer::pretty_printer): Handle new field
1853 m_show_highlight_colors.
1854 (pp_string_n): New.
1855 (pp_markup::context::begin_quote): New.
1856 (pp_markup::context::end_quote): New.
1857 (pp_markup::context::begin_color): New.
1858 (pp_markup::context::end_color): New.
1859 (highlight_colors::expected): New.
1860 (highlight_colors::actual): New.
1861 (highlight_colors::lhs): New.
1862 (highlight_colors::rhs): New.
1863 (class selftest::test_element): New.
1864 (selftest::test_pp_format): Add tests of %e.
1865 (selftest::test_urlification): Likewise.
1866 * pretty-print.h (pp_markup::context): New forward decl.
1867 (class chunk_info): Add friend class pp_markup::context.
1868 (class pretty_printer): Add friend pp_show_highlight_colors.
1869 (pretty_printer::m_show_highlight_colors): New field.
1870 (pp_show_highlight_colors): New inline function.
1871 (pp_string_n): New decl.
1872 * substring-locations.cc: Include "diagnostic-highlight-colors.h".
1873 (format_string_diagnostic_t::highlight_color_format_string): New.
1874 (format_string_diagnostic_t::highlight_color_param): New.
1875 (format_string_diagnostic_t::emit_warning_n_va): Use highlight
1876 colors.
1877 * substring-locations.h
1878 (format_string_diagnostic_t::highlight_color_format_string): New.
1879 (format_string_diagnostic_t::highlight_color_param): New.
1880 * toplev.cc (general_init): Initialize global_dc's
1881 show_highlight_colors.
1882 * tree-pretty-print-markup.h: New file.
1883
18842024-07-13 Richard Biener <rguenther@suse.de>
1885
1886 PR tree-optimization/115868
1887 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Correctly
1888 compute the number of mask copies required for vect_record_loop_mask.
1889
18902024-07-12 Gerald Pfeifer <gerald@pfeifer.com>
1891
1892 * doc/gm2.texi (Community): Update lists.nongnu.org and
1893 lists.gnu.org links.
1894
18952024-07-12 Jeff Law <jlaw@ventanamicro.com>
1896
1897 PR rtl-optimization/115876
1898 * ext-dce.cc (carry_backpropagate): Make mask and mmask unsigned.
1899
19002024-07-12 Marek Polacek <polacek@redhat.com>
1901
1902 * doc/invoke.texi: Remove @opindex and @itemx for -fconcepts-ts.
1903
19042024-07-12 Daniel Bertalan <dani@danielbertalan.dev>
1905
1906 * value-pointer-equiv.cc: Change NULL to nullptr.
1907
19082024-07-12 Richard Sandiford <richard.sandiford@arm.com>
1909
1910 PR rtl-optimization/115785
1911 * rtl-ssa/insns.h (insn_info::prev_insn_or_last_debug_insn)
1912 (insn_info::next_nondebug_or_debug_insn): Remove typedefs.
1913 (insn_info::m_prev_insn_or_last_debug_insn): Rename to...
1914 (insn_info::m_prev_sametype_or_last_debug_insn): ...this.
1915 * rtl-ssa/internals.inl (insn_info::insn_info): Update after
1916 above renaming.
1917 (insn_info::copy_prev_from): Likewise.
1918 (insn_info::set_prev_sametype_insn): Likewise.
1919 (insn_info::set_last_debug_insn): Likewise.
1920 (insn_info::clear_insn_links): Likewise.
1921 (insn_info::has_insn_links): Likewise.
1922 * rtl-ssa/member-fns.inl (insn_info::prev_nondebug_insn): Likewise.
1923 (insn_info::prev_any_insn): Fix moves from non-debug to debug insns.
1924
19252024-07-12 Jeff Law <jlaw@ventanamicro.com>
1926
1927 * config/riscv/riscv-string.cc (emit_memcmp_scalar_load_and_compare):
1928 Set RESULT directly rather than using a temporary.
1929 (emit_memcmp_scalar_result_calculation): Similarly.
1930 (riscv_expand_block_compare_scalar): Use CONST0_RTX rather than
1931 generating new RTL.
1932 * config/riscv/riscv.md (cmpmemsi): Pass an X mode temporary to the
1933 expansion routines. If necessary extract low part of the word to store
1934 in final result location.
1935
19362024-07-12 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1937
1938 * config/s390/2964.md: Remove extended mnemonics for vgm.
1939 * config/s390/3906.md: Remove extended mnemonics for vgm.
1940 * config/s390/3931.md: Remove extended mnemonics for vgm.
1941 * config/s390/8561.md: Remove extended mnemonics for vgm.
1942 * config/s390/constraints.md (jKK): Remove constraint.
1943 (jzz): Add constraint.
1944 * config/s390/s390-protos.h (s390_contiguous_bitmask_vector_p):
1945 Add prototype.
1946 (s390_constant_via_vgm_p): Add prototype.
1947 (s390_constant_via_vrepi_p): Add prototype.
1948 * config/s390/s390.cc (s390_contiguous_bitmask_vector_p): New
1949 function.
1950 (s390_constant_via_vgm_vrepi_helper): New function.
1951 (s390_constant_via_vgm_p): New function.
1952 (s390_constant_via_vgbm_p): For the sake of symmetry rename
1953 s390_bytemask_vector_p into s390_constant_via_vgbm_p.
1954 (s390_bytemask_vector_p): Deal with non-integer and partial
1955 vectors.
1956 (s390_constant_via_vrepi_p): New function.
1957 (s390_legitimate_constant_p): Allow partial vectors.
1958 (legitimate_reload_constant_p): Fix indentation.
1959 (legitimate_reload_vector_constant_p): Restrict to constraints
1960 j00, jm1, jxx, jyy, jzz only, i.e., allow partial vectors.
1961 (s390_expand_vec_init): Also make use of vrepi if possible.
1962 (print_operand): Add q,p,r for vgm,vrepi,vgbm, respectively.
1963 Remove e,s,t for constant vectors.
1964 * config/s390/s390.md (movti): Add variants utilizing
1965 vgbm,vgm,vrepi.
1966 * config/s390/vector.md (mov<mode><tf_vr>): Adapt variants
1967 for vgbm,vgm,vrepi for the new scheme.
1968 (mov<mode>): Adapt variants for vgbm,vgm for the new
1969 scheme and add vrepi variant for modes V_8,V_16,V_32,V_64.
1970
19712024-07-12 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1972
1973 * config/s390/vector.md (mov<mode>): Fix output template for
1974 movv1qi.
1975
19762024-07-12 Roger Sayle <roger@nextmovesoftware.com>
1977 Hongtao Liu <hongtao.liu@intel.com>
1978
1979 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
1980 Use CONST_VECTOR_P instead of comparison against GET_CODE.
1981 (ix86_gen_bcst_mem): Likewise.
1982 (ix86_ternlog_leaf_p): Likewise.
1983 (ix86_ternlog_operand_p): ix86_ternlog_leaf_p is always true for
1984 vector_all_ones_operand.
1985 (ix86_expand_ternlog_bin_op): Use CONST_VECTOR_P instead of
1986 equality comparison against GET_CODE. Replace call to force_reg
1987 with gen_reg_rtx and emit_move_insn (for VEC_DUPLICATE broadcast).
1988 Check for !register_operand instead of memory_operand.
1989 Support CONST_VECTORs by calling force_const_mem.
1990 (ix86_expand_ternlog): Fix indentation whitespace.
1991 Allow ix86_ternlog_leaf_p as ix86_expand_ternlog_andnot's second
1992 operand. Use CONST_VECTOR_P instead of equality against GET_CODE.
1993 Use gen_reg_rtx and emit_move_insn for ~a, ~b and ~c cases.
1994
19952024-07-12 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
1996
1997 * config/s390/s390.md (*icjump_64): Allow raw CC comparisons,
1998 i.e., any constant integer between 0 and 15 for CC comparisons.
1999
20002024-07-12 Richard Sandiford <richard.sandiford@arm.com>
2001
2002 * config/aarch64/aarch64.cc (aarch64_process_one_target_attr)
2003 (aarch64_process_target_attr): Avoid alloca.
2004
20052024-07-12 Alexandre Oliva <oliva@adacore.com>
2006
2007 PR target/115459
2008 * config/alpha/alpha.cc (alpha_expand_block_move): Adjust
2009 MEMs to match inferred alignment.
2010
20112024-07-12 YunQiang Su <yunqiang@isrc.iscas.ac.cn>
2012
2013 PR target/115840
2014 * config/riscv/riscv.cc(riscv_preferred_else_value): Mark
2015 tmp_var as NO_WARNING.
2016
20172024-07-12 xuli <xuli1@eswincomputing.com>
2018
2019 PR target/115862
2020 * config/riscv/riscv.cc (riscv_slow_unaligned_access): Disable vector misalign.
2021
20222024-07-12 Kito Cheng <kito.cheng@sifive.com>
2023
2024 * common/config/riscv/riscv-common.cc (riscv_implied_info): Add xsfvcp.
2025 (riscv_ext_version_table): Add xsfvcp, xsfcease.
2026 (riscv_ext_flag_table): Ditto.
2027 * config/riscv/riscv.opt (riscv_sifive_subext): New.
2028 (XSFVCP): New.
2029 (XSFCEASE): New.
2030
20312024-07-12 Kewen Lin <linkw@linux.ibm.com>
2032
2033 PR target/115659
2034 * config/rs6000/rs6000-protos.h (rs6000_emit_vector_cond_expr): Remove.
2035 * config/rs6000/rs6000.cc (rs6000_emit_vector_cond_expr): Add static
2036 qualifier as it is only called by rs6000_emit_swsqrt now.
2037 * config/rs6000/vector.md (vcond<VEC_F:mode><VEC_F:mode>): Remove.
2038 (vcond<VEC_I:mode><VEC_I:mode>): Remove.
2039 (vcondv4sfv4si): Likewise.
2040 (vcondv4siv4sf): Likewise.
2041 (vcondv2dfv2di): Likewise.
2042 (vcondv2div2df): Likewise.
2043 (vcondu<VEC_I:mode><VEC_I:mode>): Likewise.
2044 (vconduv4sfv4si): Likewise.
2045 (vconduv2dfv2di): Likewise.
2046
20472024-07-12 Richard Biener <rguenther@suse.de>
2048
2049 PR tree-optimization/115867
2050 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Properly
2051 guess the number of mask elements for integer mode masks.
2052
20532024-07-12 Jeff Law <jlaw@ventanamicro.com>
2054
2055 * config/m68k/m68k.md (extendsidi2): Add missing early clobbers.
2056
20572024-07-12 Lulu Cheng <chenglulu@loongson.cn>
2058
2059 * config/loongarch/loongarch.cc
2060 (loongarch_split_move): Delete.
2061 (loongarch_hard_regno_mode_ok_uncached): Likewise.
2062 * config/loongarch/loongarch.md
2063 (move_doubleword_fpr<mode>): Likewise.
2064 (load_low<mode>): Likewise.
2065 (load_high<mode>): Likewise.
2066 (store_word<mode>): Likewise.
2067 (movgr2frh<mode>): Likewise.
2068 (movfrh2gr<mode>): Likewise.
2069
20702024-07-12 Lulu Cheng <chenglulu@loongson.cn>
2071
2072 PR target/115752
2073 * config/loongarch/loongarch.cc
2074 (loongarch_hard_regno_mode_ok_uncached): Replace
2075 UNITS_PER_FPVALUE with UNITS_PER_HWFPVALUE.
2076 * config/loongarch/loongarch.h (UNITS_PER_FPVALUE): Delete.
2077
20782024-07-11 Jeff Law <jlaw@ventanamicro.com>
2079
2080 * config/riscv/riscv-string.cc
2081 (emit_strcmp_scalar_compare_byte): Set RESULT directly rather
2082 than using a new temporary.
2083 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
2084 (emit_strcmp_scalar_result_calculation): Likewise.
2085 (riscv_expand_strcmp_scalar): Use CONST0_RTX rather than
2086 generating a new node.
2087 (expand_strcmp): Copy directly from SUB to RESULT.
2088 * config/riscv/riscv.md (cmpstrnsi, cmpstrsi): Pass an X
2089 mode temporary to the expansion routines. If necessary
2090 extract low part of the word to store in final result location.
2091
20922024-07-11 Andrew Pinski <quic_apinski@quicinc.com>
2093
2094 * value-range.h (class int_range): Mark as final.
2095 (class prange): Likewise.
2096 (class frange): Likewise.
2097
20982024-07-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
2099
2100 PR target/115611
2101 * config/arm/mve.md (mve_vec_setv2di_internal): Fix printing of input
2102 scalar register pair when lane = 1.
2103
21042024-07-11 Richard Sandiford <richard.sandiford@arm.com>
2105
2106 PR rtl-optimization/115782
2107 * recog.cc (validate_change_1): Suppress early exit for no-op
2108 changes that are part of a group.
2109
21102024-07-11 Eric Botcazou <ebotcazou@adacore.com>
2111
2112 * gimplify.cc (gimplify_scalar_mode_aggregate_compare): Add support
2113 for ordering comparisons.
2114 (gimplify_expr) <default>: Call gimplify_scalar_mode_aggregate_compare
2115 only for integral scalar modes.
2116
21172024-07-11 Georg-Johann Lay <avr@gjlay.de>
2118
2119 * config/avr/avr-protos.h (avr_out_minus): New prototype.
2120 * config/avr/avr.cc (avr_out_minus): New function.
2121 * config/avr/avr.md (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>)
2122 (*sub<HISI:mode>3.zero_extend.<QIPSI:mode>_split): New insns.
2123 (*subpsi3_zero_extend.qi_split): Remove isns_and_split.
2124 (*subpsi3_zero_extend.hi_split): Remove insn_and_split.
2125 (*subhi3_zero_extend1_split): Remove insn_and_split.
2126 (*subsi3_zero_extend_split): Remove insn_and_split.
2127 (*subsi3_zero_extend.hi_split): Remove insn_and_split.
2128 (*subpsi3_zero_extend.qi): Remove insn.
2129 (*subpsi3_zero_extend.hi): Remove insn.
2130 (*subhi3_zero_extend1): Remove insn.
2131 (*subsi3_zero_extend): Remove insn.
2132 (*subsi3_zero_extend.hi): Remove insn.
2133
21342024-07-11 Jørgen Kvalsvik <j@lambda.is>
2135
2136 * doc/gcov.texi: Add --include, --exclude, --match-on-demangled
2137 documentation.
2138 * gcov.cc (struct fnfilter): New.
2139 (print_usage): Add --include, --exclude, -M,
2140 --match-on-demangled.
2141 (process_args): Likewise.
2142 (release_structures): Release filters.
2143 (read_graph_file): Only add function_infos matching filters.
2144 (output_lines): Likewise.
2145
21462024-07-11 Jørgen Kvalsvik <j@lambda.is>
2147
2148 * gcov.cc (process_all_functions): Ensure fn.end_line is
2149 included source[fn].lines.
2150
21512024-07-11 Fei Gao <gaofei@eswincomputing.com>
2152
2153 * common/config/riscv/riscv-common.cc:
2154 c implies zca, and conditionally zcf & zcd.
2155
21562024-07-10 Pan Li <pan2.li@intel.com>
2157
2158 * tree-vect-patterns.cc (vect_recog_sat_sub_pattern_transform):
2159 Add new func impl to perform the truncation distribution.
2160 (vect_recog_sat_sub_pattern): Perform above optimize before
2161 generate .SAT_SUB call.
2162
21632024-07-10 Uros Bizjak <ubizjak@gmail.com>
2164
2165 * config/i386/i386.md (ustruncdi<mode>2): Swap compare operands.
2166 (ustruncsi<mode>2): Ditto.
2167 (ustrunchiqi2): Ditto.
2168
21692024-07-10 Marek Polacek <polacek@redhat.com>
2170
2171 * doc/invoke.texi: Mention that -fconcepts-ts was removed.
2172
21732024-07-10 Edwin Lu <ewlu@rivosinc.com>
2174
2175 * common/config/riscv/riscv-common.cc: Add imply rules for B extension
2176 * config/riscv/arch-canonicalize: Ditto
2177
21782024-07-10 Richard Sandiford <richard.sandiford@arm.com>
2179
2180 * internal-fn.cc (create_call_lhs_operand, assign_call_lhs): New
2181 functions, split out from...
2182 (expand_fn_using_insn): ...here.
2183 (expand_load_lanes_optab_fn): Use them.
2184 (expand_GOMP_SIMT_ENTER_ALLOC): Likewise.
2185 (expand_GOMP_SIMT_LAST_LANE): Likewise.
2186 (expand_GOMP_SIMT_ORDERED_PRED): Likewise.
2187 (expand_GOMP_SIMT_VOTE_ANY): Likewise.
2188 (expand_GOMP_SIMT_XCHG_BFLY): Likewise.
2189 (expand_GOMP_SIMT_XCHG_IDX): Likewise.
2190 (expand_partial_load_optab_fn): Likewise.
2191 (expand_vec_cond_optab_fn): Likewise.
2192 (expand_vec_cond_mask_optab_fn): Likewise.
2193 (expand_RAWMEMCHR): Likewise.
2194 (expand_gather_load_optab_fn): Likewise.
2195 (expand_while_optab_fn): Likewise.
2196 (expand_SPACESHIP): Likewise.
2197
21982024-07-10 Richard Sandiford <richard.sandiford@arm.com>
2199
2200 * recog.cc (insn_propagation::apply_to_rvalue_1): Handle simple
2201 cases of hardreg propagation in which the register is set and
2202 used in different modes.
2203
22042024-07-10 Richard Sandiford <richard.sandiford@arm.com>
2205
2206 PR rtl-optimization/115785
2207 * rtl-ssa/functions.h (function_info::replace_nondebug_insn): Declare.
2208 * rtl-ssa/insns.h (insn_info::order_node::set_uid): New function.
2209 (insn_info::remove_note): Declare.
2210 * rtl-ssa/insns.cc (insn_info::remove_note): New function.
2211 (function_info::replace_nondebug_insn): Likewise.
2212 * rtl-ssa/changes.cc (function_info::change_insns): Use
2213 replace_nondebug_insn instead of remove_insn + add_insn.
2214
22152024-07-10 Uros Bizjak <ubizjak@gmail.com>
2216
2217 PR middle-end/115836
2218 * expmed.cc (emit_store_flag_1): Move calculation of
2219 scode just before its only usage site.
2220
22212024-07-10 Richard Earnshaw <rearnsha@arm.com>
2222
2223 * config/arm/arm-protos.h (arm_dllexport_name_p): Remove prototype.
2224 (arm_dllimport_name_p): Likewise.
2225 (arm_pe_unique_section): Likewise.
2226 (arm_pe_encode_section_info): Likewise.
2227 (arm_dllexport_p): Likewise.
2228 (arm_dllimport_p): Likewise.
2229 (arm_mark_dllexport): Likewise.
2230 (arm_mark_dllimport): Likewise.
2231 (arm_change_mode_p): Likewise.
2232 * config/arm/arm.cc (arm_gnu_attributes): Remove attributes for ARM_PE.
2233 (TARGET_ENCODE_SECTION_INFO): Remove setting for ARM_PE.
2234 (is_called_in_ARM_mode): Remove ARM_PE conditional code.
2235 (thumb1_output_interwork): Remove obsolete ARM_PE code.
2236 (arm_encode_section_info): Remove surrounding #ifndef.
2237
22382024-07-10 Prathamesh Kulkarni <prathameshk@nvidia.com>
2239
2240 PR lto/115394
2241 * lto-streamer.h: Remove streamer_debugging definition.
2242 * lto-streamer-out.cc (stream_write_tree_ref): Remove use of streamer_debugging.
2243 (lto_output_tree): Likewise.
2244 * tree-streamer-in.cc (streamer_read_tree_bitfields): Likewise.
2245 (streamer_get_pickled_tree): Likewise.
2246 * tree-streamer-out.cc (pack_ts_base_value_fields): Likewise.
2247
22482024-07-10 Pan Li <pan2.li@intel.com>
2249
2250 * match.pd: Add form 2 for .SAT_TRUNC.
2251 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
2252 Add new case NOP_EXPR, and try to match SAT_TRUNC.
2253
22542024-07-10 Andrew Pinski <quic_apinski@quicinc.com>
2255
2256 PR tree-optimization/115721
2257 * tree-complex.cc (expand_complex_comparison): Remove
2258 support for GIMPLE_RETURN.
2259
22602024-07-10 Fei Gao <gaofei@eswincomputing.com>
2261
2262 PR target/113715
2263 * config/riscv/riscv.cc (riscv_zcmp_can_use_popretz): Removed.
2264 (riscv_gen_multi_pop_insn): Remove generation of cm.popretz.
2265
22662024-07-09 Carl Love <cel@linux.ibm.com>
2267
2268 * config/rs6000/rs6000-builtin.cc (altivec_expand_vec_init_builtin):
2269 Remove the function.
2270 (rs6000_expand_builtin): Remove the if bif_is_int check to call
2271 the altivec_expand_vec_init_builtin function.
2272 * config/rs6000/rs6000-builtins.def: Remove the attribute string
2273 comment for init.
2274 (__builtin_vec_init_v16qi,
2275 __builtin_vec_init_v4sf, __builtin_vec_init_v4si,
2276 __builtin_vec_init_v8hi, __builtin_vec_init_v1ti,
2277 __builtin_vec_init_v2df, __builtin_vec_init_v2di,
2278 __builtin_vec_set_v16qi, __builtin_vec_set_v4sf,
2279 __builtin_vec_set_v4si, __builtin_vec_set_v8hi): Remove
2280 built-in definitions.
2281 * config/rs6000/rs6000-gen-builtins.cc: Remove comment for init
2282 attribute string.
2283 (struct attrinfo): Remove isinit entry.
2284 (parse_bif_attrs): Remove the if statement to check for attribute
2285 init.
2286 (ifdef DEBUG): Remove print for init attribute string.
2287 (write_decls): Remove print for define bif_init_bit and
2288 define for bif_is_init.
2289 (write_bif_static_init): Remove if bifp->attrs.isinit statement.
2290
22912024-07-09 Carl Love <cel@linux.ibm.com>
2292
2293 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcmpeqsp_p):
2294 Remove built-in definition.
2295
22962024-07-09 Carl Love <cel@linux.ibm.com>
2297
2298 * config/rs6000/rs6000-overload.def (vec_xxpermdi): Add new
2299 overloaded built-in instances of vector signed and unsigned
2300 int128.
2301 * doc/extend.texi: Add documentation for built-in instances of
2302 vector signed and unsigned int128.
2303
23042024-07-09 Carl Love <cel@linux.ibm.com>
2305
2306 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvnegdp,
2307 __builtin_vsx_xvnegsp): Remove built-in definitions.
2308
23092024-07-09 Carl Love <cel@linux.ibm.com>
2310
2311 * config/rs6000/rs6000-builtins.def (__builtin_vsx_vperm_16qi_uns,
2312 __builtin_vsx_vperm_1ti, __builtin_vsx_vperm_1ti_uns,
2313 __builtin_vsx_vperm_2df, __builtin_vsx_vperm_2di,
2314 __builtin_vsx_vperm_2di_uns, __builtin_vsx_vperm_4sf,
2315 __builtin_vsx_vperm_4si, __builtin_vsx_vperm_4si_uns): Remove
2316 built-in definitions and comments.
2317
23182024-07-09 Carl Love <cel@linux.ibm.com>
2319
2320 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_16qi,
2321 __builtin_vsx_xxsel_16qi_uns, __builtin_vsx_xxsel_2df,
2322 __builtin_vsx_xxsel_2di, __builtin_vsx_xxsel_2di_uns,
2323 __builtin_vsx_xxsel_4sf, __builtin_vsx_xxsel_4si,
2324 __builtin_vsx_xxsel_4si_uns, __builtin_vsx_xxsel_8hi,
2325 __builtin_vsx_xxsel_8hi_uns): Remove built-in definitions.
2326
23272024-07-09 Carl Love <cel@linux.ibm.com>
2328
2329 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xxsel_1ti,
2330 __builtin_vsx_xxsel_1ti_uns): Remove built-in definitions.
2331 * config/rs6000/rs6000-overload.def (vec_sel): Add new
2332 overloaded vector signed, unsigned and bool 128-bit definitions.
2333 * doc/extend.texi (vec_sel): Add documentation for new instances
2334 with signed, unsigned and bool 129-bit bool arguments.
2335
23362024-07-09 Carl Love <cel@linux.ibm.com>
2337
2338 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xxmrghw,
2339 __builtin_vsx_xxmrghw_4si, __builtin_vsx_xxmrglw,
2340 __builtin_vsx_xxmrglw_4si, __builtin_vsx_xxsel_16qi): Remove
2341 built-in definition.
2342 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin):
2343 remove case entries RS6000_BIF_XXMRGLW_4SI,
2344 RS6000_BIF_XXMRGLW_4SF, RS6000_BIF_XXMRGHW_4SI,
2345 RS6000_BIF_XXMRGHW_4SF.
2346 * config/rs6000/vsx.md (vsx_xxmrghw_<mode>, vsx_xxmrglw_<mode>):
2347 Remove unused define_expands.
2348
23492024-07-09 Carl Love <cel@linux.ibm.com>
2350
2351 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspdp,
2352 __builtin_vsx_xvcvdpsp, __builtin_vsx_xvcvsxwdp,
2353 __builtin_vsx_xvcvuxddp_uns): Remove.
2354
23552024-07-09 Carl Love <cel@linux.ibm.com>
2356
2357 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspsxds,
2358 __builtin_vsx_xvcvspuxds): Rename to __builtin_vsignede_v4sf,
2359 __builtin_vunsignede_v4sf respectively.
2360 (XVCVSPSXDS, XVCVSPUXDS): Rename to VEC_VSIGNEDE_V4SF,
2361 VEC_VUNSIGNEDE_V4SF respectively.
2362 (__builtin_vsignedo_v4sf, __builtin_vunsignedo_v4sf): New
2363 built-in definitions.
2364 * config/rs6000/rs6000-overload.def (vec_signede, vec_signedo,
2365 vec_unsignede, vec_unsignedo): Add new overloaded specifications.
2366 * config/rs6000/vsx.md (vsignede_v4sf, vsignedo_v4sf,
2367 vunsignede_v4sf, vunsignedo_v4sf): New define_expands.
2368 * doc/extend.texi (vec_signedo, vec_signede, vec_unsignedo,
2369 vec_unsignede): Add documentation for new overloaded built-ins to
2370 convert vector float to vector {un,}signed long long.
2371
23722024-07-09 Carl Love <cel@linux.ibm.com>
2373
2374 * config/rs6000/rs6000-builtins.def (__builtin_vsx_vunsigned_v2df,
2375 __builtin_vsx_vunsigned_v4sf, __builtin_vsx_vunsignede_v2df,
2376 __builtin_vsx_vunsignedo_v2df): Change the result type to unsigned.
2377
23782024-07-09 Carl Love <cel@linux.ibm.com>
2379
2380 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xvcvspsxws,
2381 __builtin_vsx_xvcvdpuxds_uns, __builtin_vsx_xvcvspuxws,
2382 __builtin_vsx_xvcvdpsxws, __builtin_vsx_xvcvdpuxws): Remove
2383 built-in definitions.
2384
23852024-07-09 Carl Love <cel@linux.ibm.com>
2386
2387 * config/rs6000/rs6000-builtin.cc (RS6000_BIF_CMPLE_16QI,
2388 RS6000_BIF_CMPLE_U16QI, RS6000_BIF_CMPLE_8HI,
2389 RS6000_BIF_CMPLE_U8HI, RS6000_BIF_CMPLE_4SI, RS6000_BIF_CMPLE_U4SI,
2390 RS6000_BIF_CMPLE_2DI, RS6000_BIF_CMPLE_U2DI, RS6000_BIF_CMPLE_1TI,
2391 RS6000_BIF_CMPLE_U1TI): Remove case statements.
2392 * config/rs6000/rs6000-builtins.def (__builtin_vsx_cmple_16qi,
2393 __builtin_vsx_cmple_2di, __builtin_vsx_cmple_4si,
2394 __builtin_vsx_cmple_8hi, __builtin_vsx_cmple_u16qi,
2395 __builtin_vsx_cmple_u2di, __builtin_vsx_cmple_u4si,
2396 __builtin_vsx_cmple_u8hi): Remove buit-in definitions.
2397
23982024-07-09 Uros Bizjak <ubizjak@gmail.com>
2399
2400 * config/i386/i386.md (@cmp<mode>_1): Use SWI mode iterator.
2401 (ustruncdi<mode>2): New expander.
2402 (ustruncsi<mode>2): Ditto.
2403 (ustrunchiqi2): Ditto.
2404
24052024-07-09 David Malcolm <dmalcolm@redhat.com>
2406
2407 * diagnostic-path.cc: Replace "const diagnostic_path *" with
2408 "const diagnostic_path &" throughout, and "diagnostic_context *"
2409 with "diagnostic context &".
2410 * diagnostic.cc (diagnostic_context::show_any_path): Pass
2411 reference in call to print_path.
2412 * diagnostic.h (diagnostic_context::print_path): Convert param
2413 to a reference.
2414
24152024-07-09 Richard Earnshaw <rearnsha@arm.com>
2416
2417 * config/arm/arm.cc (fp_consts_initited): Delete variable.
2418 (value_fp0): Likewise.
2419 (init_fp_table): Delete function.
2420 (fp_const_from_val): Likewise.
2421 (arm_const_double_rtx): Rework to avoid converting to REAL_VALUE_TYPE.
2422 (arm_print_operand, case 'N'): Make use of this case an error.
2423
24242024-07-09 Christoph Müllner <christoph.muellner@vrull.eu>
2425
2426 * config/riscv/riscv-target-attr.cc (riscv_process_target_attr):
2427 Fix comments and variable names.
2428
24292024-07-09 Christoph Müllner <christoph.muellner@vrull.eu>
2430
2431 * common/config/riscv/riscv-common.cc (riscv_set_arch_by_subset_list):
2432 Fix overlong line.
2433 (riscv_parse_arch_string): Replace duplicated code by a call to
2434 riscv_set_arch_by_subset_list.
2435
24362024-07-09 Haochen Jiang <haochen.jiang@intel.com>
2437
2438 * common/config/i386/cpuinfo.h (get_available_features): Correct
2439 AVX10 CPUID emulation to specify ecx value.
2440
24412024-07-09 liuhongt <hongtao.liu@intel.com>
2442
2443 PR target/115796
2444 * config/i386/emmintrin.h (__float_u): Rename to ..
2445 (__x86_float_u): .. this.
2446 (_mm_load_sd): Ditto.
2447 (_mm_store_sd): Ditto.
2448 (_mm_loadh_pd): Ditto.
2449 (_mm_loadl_pd): Ditto.
2450 * config/i386/xmmintrin.h (__double_u): Rename to ..
2451 (__x86_double_u): .. this.
2452 (_mm_load_ss): Ditto.
2453 (_mm_store_ss): Ditto.
2454
24552024-07-08 Jeff Law <jlaw@ventanamicro.com>
2456
2457 * Makefile.in (OBJS): Add ext-dce.o
2458 * common.opt (ext-dce): Document new option.
2459 * df-scan.cc (df_get_ext_block_use_set): Delete prototype and
2460 make extern.
2461 * df.h (df_get_exit_block_use_set): Prototype.
2462 * ext-dce.cc: New file/pass.
2463 * opts.cc (default_options_table): Handle ext-dce at -O2 or higher.
2464 * passes.def: Add ext-dce before combine.
2465 * tree-pass.h (make_pass_ext_dce): Prototype.
2466
24672024-07-08 Uros Bizjak <ubizjak@gmail.com>
2468
2469 * config/i386/i386.md (x86_mov<mode>cc_0_m1_neg splitter to SImode):
2470 New splitter.
2471 (NEG and NOT splitter to SImode): Remove optimize_insn_for_size_p
2472 predicate from insn condition.
2473
24742024-07-08 Patrick O'Neill <patrick@rivosinc.com>
2475
2476 * doc/invoke.texi: Remove trailing whitespace.
2477
24782024-07-08 Levy Hsu <admin@levyhsu.com>
2479
2480 * config/i386/i386-expand.cc (ix86_expand_fp_absneg_operator): Add VBF modes.
2481 (ix86_expand_copysign): Ditto.
2482 (ix86_expand_xorsign): Ditto.
2483 * config/i386/i386.cc (ix86_build_const_vector): Ditto.
2484 (ix86_build_signbit_mask): Ditto.
2485 * config/i386/sse.md: Ditto.
2486
24872024-07-08 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
2488
2489 PR target/110040
2490 * config/rs6000/vsx.md (split pattern for V1TI to DI move): New define.
2491
24922024-07-08 Pan Li <pan2.li@intel.com>
2493
2494 * config/riscv/autovec.md (ustrunc<mode><v_double_trunc>2): Add
2495 new pattern for double truncation.
2496 (ustrunc<mode><v_quad_trunc>2): Ditto but for quad truncation.
2497 (ustrunc<mode><v_oct_trunc>2): Ditto but for oct truncation.
2498 * config/riscv/riscv-protos.h (expand_vec_double_ustrunc): Add
2499 new func decl to expand double vec ustrunc.
2500 (expand_vec_quad_ustrunc): Ditto but for quad.
2501 (expand_vec_oct_ustrunc): Ditto but for oct.
2502 * config/riscv/riscv-v.cc (expand_vec_double_ustrunc): Add new
2503 func impl to expand vector double ustrunc.
2504 (expand_vec_quad_ustrunc): Ditto but for quad.
2505 (expand_vec_oct_ustrunc): Ditto but for oct.
2506
25072024-07-08 Fei Gao <gaofei@eswincomputing.com>
2508
2509 * common/config/riscv/riscv-common.cc (riscv_subset_list::riscv_subset_list):
2510 init m_subset_num to 0.
2511 (riscv_subset_list::add): increase m_subset_num once a subset added.
2512 (riscv_subset_list::finalize): call handle_implied_ext repeatly
2513 until no change in m_subset_num.
2514 * config/riscv/riscv-subset.h: add m_subset_num member.
2515
25162024-07-08 Kewen Lin <linkw@linux.ibm.com>
2517
2518 PR tree-optimization/115659
2519 * config/rs6000/rs6000-builtins.def: Update some bif expanders by
2520 replacing orc<mode>3 with iorc<mode>3.
2521 * config/rs6000/rs6000-string.cc (expand_cmp_vec_sequence): Update gen
2522 function by replacing orc<mode>3 with iorc<mode>3.
2523 * config/rs6000/rs6000.md (orc<mode>3): Rename to ...
2524 (iorc<mode>3): ... this.
2525
25262024-07-08 Kewen Lin <linkw@linux.ibm.com>
2527
2528 PR tree-optimization/115659
2529 * doc/md.texi: Document andcm3 and iorcm3.
2530 * gimple-isel.cc (gimple_expand_vec_cond_expr): Add more foldings for
2531 patterns x CMP y ? 0 : z and x CMP y ? z : -1.
2532 * internal-fn.def (BIT_ANDC): New internal function.
2533 (BIT_IORC): Likewise.
2534 * optabs.def (andc, iorc): New optab.
2535
25362024-07-08 Kewen Lin <linkw@linux.ibm.com>
2537
2538 PR target/115688
2539 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Consider
2540 explicit VSX when masking off ALTIVEC.
2541
25422024-07-08 H.J. Lu <hjl.tools@gmail.com>
2543
2544 * config/i386/i386.cc (ix86_print_operand): Always generate
2545 branch hint for conditional branches.
2546 * config/i386/i386.h (TARGET_BRANCH_PREDICTION_HINTS): Split
2547 into ..
2548 (TARGET_BRANCH_PREDICTION_HINTS_TAKEN): .. this, and ..
2549 (TARGET_BRANCH_PREDICTION_HINTS_NOT_TAKEN): .. this.
2550 * config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS):
2551 Split into ..
2552 (X86_TUNE_BRANCH_PREDICTION_HINTS_TAKEN): .. this, and ..
2553 (X86_TUNE_BRANCH_PREDICTION_HINTS_NOT_TAKEN): .. this.
2554
25552024-07-07 Gerald Pfeifer <gerald@pfeifer.com>
2556
2557 * doc/bugreport.texi (Bug Criteria): Remove dubious example.
2558
25592024-07-06 Jeff Law <jlaw@ventanamicro.com>
2560
2561 * config/riscv/bitmanip.md (bset splitters): Turn into define_and_splits.
2562 Don't depend on combine splitting the "andn with constant" form.
2563 (bset, binv, bclr with masked bit position): New patterns.
2564
25652024-07-06 Jeff Law <jlaw@ventanamicro.com>
2566
2567 * config/sh/sh.md (adddi3): Only allow matching when we can
2568 still create new pseudos.
2569 (subdi3, *rotcl, *rotcr, *rotcr_neg_t, negdi2): Likewise.
2570 (abs<mode>2, negabs<mode>2, negdi_cond): Likewise.
2571 (*swapbisi2_and_shl8, *swapbhisi2, *movsi_index_disp_load): Likewise.
2572 (*movhi_index_disp_load, *mov<mode>index_disp_store): Likewise.
2573 (*mov_t_msb_neg, *negt_msb, clipu_one): Likewise.
2574
25752024-07-06 Georg-Johann Lay <avr@gjlay.de>
2576
2577 * config/avr/avr.md: Also split with avr_split_tiny_move()
2578 for non-AVR_TINY.
2579 * config/avr/avr.cc (avr_split_tiny_move): Don't change memory
2580 references with base regs that can do PLUS addressing.
2581 (avr_out_lpm_no_lpmx) [POST_INC]: Don't output final ADIW when the
2582 address register is unused after.
2583
25842024-07-06 Eric Botcazou <ebotcazou@adacore.com>
2585
2586 PR target/115591
2587 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Add missing test on
2588 tree_fits_uhwi_p before calling tree_to_uhwi.
2589
25902024-07-06 Roger Sayle <roger@nextmovesoftware.com>
2591
2592 PR target/115751
2593 * config/i386/i386-expand.cc (ix86_expand_ternlog): Avoid use of
2594 force_reg to "reload" non-register operands, as these may contain
2595 vec_duplicate (broadcast) operands that aren't supported by
2596 force_reg. Use (safer) gen_reg_rtx and emit_move instead.
2597
25982024-07-05 Iain Sandoe <iain@sandoe.co.uk>
2599
2600 * config/i386/i386.cc (ix86_cannot_copy_insn_p): New.
2601 (TARGET_CANNOT_COPY_INSN_P): New.
2602
26032024-07-05 Wilco Dijkstra <wilco.dijkstra@arm.com>
2604
2605 PR target/115153
2606 * config/arm/arm.cc (arm_legitimate_index_p): Move LDRD case before
2607 NEON.
2608 (thumb2_legitimate_index_p): Update comments.
2609 (output_move_neon): Use DFmode for vldr/vstr and non-checking
2610 adjust_address.
2611
26122024-07-05 Robin Dapp <rdapp@ventanamicro.com>
2613
2614 * config/riscv/autovec.md: Add TU policy.
2615 * config/riscv/riscv-protos.h (enum insn_type): Define
2616 SCALAR_MOVE_MERGED_OP_TU.
2617
26182024-07-05 Georg-Johann Lay <avr@gjlay.de>
2619
2620 PR target/87376
2621 * config/avr/avr-dimode.md: Use "nop_general_operand" instead
2622 of "general_operand" as predicate for all input operands.
2623
26242024-07-05 Tamar Christina <tamar.christina@arm.com>
2625
2626 * config/aarch64/aarch64.cc (struct expand_vec_perm_d): Add zero_op0_p
2627 and zero_op_p1.
2628 (aarch64_evpc_tbl): Implement register value remapping.
2629 (aarch64_vectorize_vec_perm_const): Detect if operand is a zero dup
2630 before it's forced to a reg.
2631
26322024-07-05 Tamar Christina <tamar.christina@arm.com>
2633
2634 * config/aarch64/aarch64-simd.md
2635 (aarch64_simd_vec_unpack<su>_lo_<mode>): Remove.
2636 (vec_unpack<su>_lo_<mode): Simplify.
2637 * config/aarch64/aarch64.cc (aarch64_gen_shareable_zero): Update
2638 comment.
2639
26402024-07-05 Alex Coplan <alex.coplan@arm.com>
2641
2642 * dominance.cc (dot_dominance_tree): New.
2643
26442024-07-05 Hu, Lin1 <lin1.hu@intel.com>
2645
2646 * config/i386/sse.md (ssedoublemode): Remove mappings to twice
2647 the number of same-sized elements. Add mappings to the same
2648 number of double-sized elements.
2649 (define_split for vec_concat_minus_plus): Change mode_attr from
2650 ssedoublemode to ssedoublevecmode.
2651 (define_split for vec_concat_plus_minus): Ditto.
2652 (<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>):
2653 Ditto.
2654 (avx512f_shuf_<shuffletype>64x2_1<mask_name>): Ditto.
2655 (avx512vl_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
2656 (avx512f_shuf_<shuffletype>32x4_1<mask_name>): Ditto.
2657
26582024-07-05 YunQiang Su <syq@gcc.gnu.org>
2659
2660 * config/mips/mips-protos.h: New function mips_msa_shf_i8.
2661 * config/mips/mips-msa.md(MSA_WHB_W): Not used anymore;
2662 (msa_shf_<msafmt_f>): Use mips_msa_shf_i8.
2663 * config/mips/mips.cc(mips_const_vector_shuffle_set_p):
2664 Support more cases try to use alien mode instruction;
2665 (mips_msa_shf_i8): New function to get the correct MSA SHF
2666 instruction and IMM.
2667
26682024-07-05 Richard Biener <rguenther@suse.de>
2669
2670 * tree-vect-slp.cc (vect_build_slp_instance): Special case
2671 three input permute with the same number of lanes in store
2672 permute lowering.
2673
26742024-07-04 Siarhei Volkau <lis8215@gmail.com>
2675
2676 * config/arm/arm.cc (thumb_load_double_from_address): Emit ldmia
2677 when address reg rewritten by load.
2678 * config/arm/thumb1.md (peephole2 to rewrite DI/DF load): New.
2679 (peephole2 to rewrite DI/DF store): New.
2680 * config/arm/iterators.md (DIDF): New.
2681
26822024-07-04 Alfie Richards <alfie.richards@arm.com>
2683
2684 PR target/114890
2685 * config/aarch64/aarch64-simd.md: Remove bigendian operand swap.
2686
26872024-07-04 Richard Biener <rguenther@suse.de>
2688
2689 PR middle-end/115426
2690 * gimplify.cc (gimplify_asm_expr): Handle "rm" output
2691 constraint gimplified to a register (operation).
2692
26932024-07-04 Roger Sayle <roger@nextmovesoftware.com>
2694
2695 * config/i386/i386.md (bswaphisi2_lowpart peephole2): New
2696 peephole2 variant to eliminate register shuffling.
2697
26982024-07-04 Jeff Law <jlaw@ventanamicro.com>
2699
2700 * config/rx/rx.cc (rx_expand_prologue): Mark the copy from FP to SP
2701 as frame related.
2702 (rx_expand_epilogue): Mark the stack pointer adjustment as frame
2703 related.
2704
27052024-07-04 Hongyu Wang <hongyu.wang@intel.com>
2706
2707 * config/i386/i386.cc (ix86_expand_prologue): Set apx_ppx_used
2708 flag in m.fs with TARGET_APX_PPX && !crtl->calls_eh_return.
2709 (ix86_emit_save_regs): Emit ppx is available only when
2710 TARGET_APX_PPX && !crtl->calls_eh_return.
2711 (ix86_expand_epilogue): Don't restore reg using mov when
2712 apx_ppx_used flag is true.
2713 * config/i386/i386.h (struct machine_frame_state):
2714 Add apx_ppx_used flag.
2715
27162024-07-04 Hu, Lin1 <lin1.hu@intel.com>
2717
2718 PR tree-optimization/115753
2719 * tree-vect-stmts.cc (supportable_indirect_convert_operation): Add
2720 TYPE_CODE check before SSA_NAME_RANGE_INFO.
2721
27222024-07-03 Jeff Law <jlaw@ventanamicro.com>
2723
2724 * reorg.cc (relax_delay_slots): Do not optimize a conditional
2725 jump around an unconditional jump/return in the presence of
2726 a text section switch.
2727
27282024-07-03 John David Anglin <danglin@gcc.gnu.org>
2729
2730 Revert:
2731 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
2732
2733 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
2734
27352024-07-03 Palmer Dabbelt <palmer@rivosinc.com>
2736
2737 * doc/invoke.texi: Describe -march behavior for dependent extensions on
2738 RISC-V.
2739
27402024-07-03 Gianluca Guida <gianluca@rivosinc.com>
2741 Patrick O'Neill <patrick@rivosinc.com>
2742
2743 * common/config/riscv/riscv-common.cc
2744 (riscv_subset_list::to_string): Skip zabha when not supported by
2745 the assembler.
2746 * config.in: Regenerate.
2747 * config/riscv/arch-canonicalize: Make zabha imply zaamo.
2748 * config/riscv/iterators.md (amobh): Add iterator for amo
2749 byte/halfword.
2750 * config/riscv/riscv.opt: Add zabha.
2751 * config/riscv/sync.md (atomic_<atomic_optab><mode>): Add
2752 subword atomic op pattern.
2753 (zabha_atomic_fetch_<atomic_optab><mode>): Add subword
2754 atomic_fetch op pattern.
2755 (lrsc_atomic_fetch_<atomic_optab><mode>): Prefer zabha over lrsc
2756 for subword atomic ops.
2757 (zabha_atomic_exchange<mode>): Add subword atomic exchange
2758 pattern.
2759 (lrsc_atomic_exchange<mode>): Prefer zabha over lrsc for subword
2760 atomic exchange ops.
2761 * configure: Regenerate.
2762 * configure.ac: Add zabha assembler check.
2763 * doc/sourcebuild.texi: Add zabha documentation.
2764
27652024-07-03 Pan Li <pan2.li@intel.com>
2766
2767 PR target/115763
2768 * config/riscv/vector.md (*pred_broadcast<mode>): Split into
2769 zvfh and zvfhmin part.
2770 (*pred_broadcast<mode>_zvfh): New define_insn for zvfh part.
2771 (*pred_broadcast<mode>_zvfhmin): Ditto but for zvfhmin.
2772
27732024-07-03 Pan Li <pan2.li@intel.com>
2774
2775 * match.pd: Allow any otype is less than itype truncation.
2776
27772024-07-03 Pan Li <pan2.li@intel.com>
2778
2779 * tree-vect-patterns.cc (gimple_unsigned_integer_sat_trunc): Add
2780 new decl generated by match.
2781 (vect_recog_sat_trunc_pattern): Add new func impl to recog the
2782 .SAT_TRUNC pattern.
2783
27842024-07-03 Richard Biener <rguenther@suse.de>
2785
2786 * tree-vect-slp.cc (vectorizable_slp_permutation_1): Remove
2787 redundant dump.
2788
27892024-07-03 Jennifer Schmitz <jschmitz@nvidia.com>
2790
2791 * match.pd: Fold x/sqrt(x) to sqrt(x).
2792
27932024-07-03 Alexandre Oliva <oliva@adacore.com>
2794
2795 * dwarf2out.cc (modified_type_die): Follow name's debug type.
2796
27972024-07-03 Alexandre Oliva <oliva@adacore.com>
2798
2799 PR target/113719
2800 * config/i386/i386-options.cc
2801 (ix86_override_options_after_change_1): Add opts and opts_set
2802 parms, operate on them, after factoring out of...
2803 (ix86_override_options_after_change): ... this. Restore calls
2804 of ix86_default_align and ix86_recompute_optlev_based_flags.
2805 (ix86_option_override_internal): Call the factored-out bits.
2806
28072024-07-03 Kyrylo Tkachov <ktkachov@nvidia.com>
2808
2809 PR target/115475
2810 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
2811 Define __ARM_FEATURE_SVE_BF16 for TARGET_SVE_BF16.
2812
28132024-07-03 Kyrylo Tkachov <ktkachov@nvidia.com>
2814
2815 PR target/115457
2816 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins):
2817 Define __ARM_FEATURE_BF16 for TARGET_BF16_FP.
2818
28192024-07-03 Richard Biener <rguenther@suse.de>
2820
2821 * tree-vect-slp.cc (bst_traits::hash): Handle NULL elements
2822 in SLP_TREE_SCALAR_STMTS.
2823 (vect_print_slp_tree): Likewise.
2824 (vect_mark_slp_stmts): Likewise.
2825 (vect_mark_slp_stmts_relevant): Likewise.
2826 (vect_find_last_scalar_stmt_in_slp): Likewise.
2827 (vect_bb_slp_mark_live_stmts): Likewise.
2828 (vect_slp_prune_covered_roots): Likewise.
2829 (vect_bb_partition_graph_r): Likewise.
2830 (vect_remove_slp_scalar_calls): Likewise.
2831 (vect_slp_gather_vectorized_scalar_stmts): Likewise.
2832 (vect_bb_slp_scalar_cost): Likewise.
2833 (vect_contains_pattern_stmt_p): Likewise.
2834 (vect_slp_convert_to_external): Likewise.
2835 (vect_find_first_scalar_stmt_in_slp): Likewise.
2836 (vect_optimize_slp_pass::remove_redundant_permutations): Likewise.
2837 (vect_slp_analyze_node_operations_1): Likewise.
2838 (vect_schedule_slp_node): Likewise.
2839 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
2840 (vectorizable_shift): Likewise.
2841 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
2842 Handle NULL elements in SLP_TREE_SCALAR_STMTS.
2843
28442024-07-03 Georg-Johann Lay <avr@gjlay.de>
2845
2846 PR target/98762
2847 * config/avr/avr.cc (avr_out_movqi_r_mr_reg_disp_tiny): Properly
2848 restore the base register when it is partially clobbered.
2849
28502024-07-03 Tamar Christina <tamar.christina@arm.com>
2851
2852 PR tree-optimization/114932
2853 * tree-ssa-loop-ivopts.cc (constant_multiple_of): Use
2854 aff_combination_constant_multiple_p instead.
2855
28562024-07-03 Tamar Christina <tamar.christina@arm.com>
2857
2858 PR tree-optimization/114932
2859 * tree-affine.cc (wide_int_constant_multiple_p): Support 0 and 0 being
2860 multiples.
2861
28622024-07-03 Richard Sandiford <richard.sandiford@arm.com>
2863
2864 * df.h (DF_LR_DCE): New df_problem_id.
2865 (df_lr_dce): New macro.
2866 * df-core.cc (rest_of_handle_df_finish): Check for a null free_fun.
2867 * df-problems.cc (df_lr_finalize): Split out fast DCE handling to...
2868 (df_lr_dce_finalize): ...this new function.
2869 (problem_LR_DCE): New df_problem.
2870 (df_lr_add_problem): Register LR_DCE rather than LR itself.
2871 * dce.cc (fast_dce): Clear df_lr_dce->solutions_dirty.
2872
28732024-07-02 Pengxuan Zheng <quic_pzheng@quicinc.com>
2874
2875 PR target/113859
2876 * config/aarch64/aarch64-simd.md (aarch64_<su>addlp<mode>): Rename to...
2877 (@aarch64_<su>addlp<mode>): ... This.
2878 (popcount<mode>2): New define_expand.
2879
28802024-07-02 Andrew Pinski <quic_apinski@quicinc.com>
2881
2882 * passes.def (expand_pow): Renamed from expand_powcabs.
2883 * timevar.def (TV_TREE_POWCABS): Remove.
2884 (TV_TREE_POW): Add
2885 * tree-pass.h (make_pass_expand_powcabs): Rename to ...
2886 (make_pass_expand_pow): This.
2887 * tree-ssa-math-opts.cc (class pass_expand_powcabs): Rename to ...
2888 (class pass_expand_pow): This.
2889 (pass_expand_powcabs::execute): Rename to ...
2890 (pass_expand_pow::execute): This.
2891 (make_pass_expand_powcabs): Rename to ...
2892 (make_pass_expand_pow): This.
2893
28942024-07-02 Andrew Pinski <quic_apinski@quicinc.com>
2895
2896 * tree-complex.cc (gimple_expand_builtin_cabs): Add
2897 `cabs(a+ai)`, `cabs(x+0i)` and `cabs(0+xi)` optimizations.
2898
28992024-07-02 Andrew Pinski <quic_apinski@quicinc.com>
2900
2901 PR tree-optimization/115710
2902 * tree-complex.cc (init_dont_simulate_again): Handle CABS.
2903 (gimple_expand_builtin_cabs): New function, moved mostly
2904 from tree-ssa-math-opts.cc.
2905 (expand_complex_operations_1): Call gimple_expand_builtin_cabs.
2906 * tree-ssa-math-opts.cc (gimple_expand_builtin_cabs): Remove.
2907 (build_and_insert_binop): Remove.
2908 (pass_data_expand_powcabs): Update comment.
2909 (pass_expand_powcabs::execute): Don't handle CABS.
2910
29112024-07-02 Andrew Pinski <quic_apinski@quicinc.com>
2912
2913 * tree-complex.cc (expand_complex_addition): If both
2914 operands have the same real and imag parts, only
2915 add the addition once.
2916
29172024-07-02 David Faust <david.faust@oracle.com>
2918
2919 * common.opt.urls: Regenerate.
2920
29212024-07-02 David Faust <david.faust@oracle.com>
2922 Cupertino Miranda <cupertino.miranda@oracle.com>
2923
2924 * btfout.cc (btf_mark_type_used): New.
2925 * ctfc.h (btf_mark_type_used): Declare it here.
2926 * config/bpf/bpf.cc (bpf_option_override): Enable -gprune-btf
2927 by default if -gbtf is enabled.
2928 * config/bpf/core-builtins.cc (extra_fn): New typedef.
2929 (compute_field_expr): Add callback parameter, and call it if supplied.
2930 Fix computation for MEM_REF.
2931 (mark_component_type_as_used): New.
2932 (bpf_mark_types_as_used): Likewise.
2933 (bpf_expand_core_builtin): Call here.
2934 * doc/invoke.texi (Debugging Options): Note that -gprune-btf is
2935 enabled by default for BPF target when generating BTF.
2936
29372024-07-02 David Faust <david.faust@oracle.com>
2938
2939 * btfout.cc (btf_used_types): New hash set.
2940 (struct btf_fixup): New.
2941 (fixups, forwards): New vecs.
2942 (btf_output): Calculate num_types depending on debug_prune_btf.
2943 (btf_early_finsih): New initialization for debug_prune_btf.
2944 (btf_add_used_type): New function.
2945 (btf_used_type_list_cb): Likewise.
2946 (btf_collect_pruned_types): Likewise.
2947 (btf_add_vars): Handle special case for variables in ".maps" section
2948 when generating BTF for BPF CO-RE target.
2949 (btf_late_finish): Use btf_collect_pruned_types when debug_prune_btf
2950 is in effect. Move some initialization to btf_early_finish.
2951 (btf_finalize): Additional deallocation for debug_prune_btf.
2952 * common.opt (gprune-btf): New flag.
2953 * ctfc.cc (init_ctf_strtable): Make non-static.
2954 * ctfc.h (init_ctf_strtable, ctfc_delete_strtab): Make extern.
2955 * doc/invoke.texi (Debugging Options): Document -gprune-btf.
2956
29572024-07-02 David Faust <david.faust@oracle.com>
2958
2959 * btfout.cc (struct btf_datasec_entry): New.
2960 (struct btf_datasec): Add `id' member. Change `entries' to use
2961 new struct btf_datasec_entry.
2962 (func_map): New hash_map.
2963 (max_translated_id): New.
2964 (btf_var_ids, btf_id_map, holes, voids, num_vars_added)
2965 (num_types_added, num_types_created): Delete.
2966 (btf_absolute_var_id, btf_relative_var_id, btf_absolute_func_id)
2967 (btf_relative_func_id, btf_absolute_datasec_id, init_btf_id_map)
2968 (get_btf_id, set_btf_id, btf_emit_id_p): Delete.
2969 (btf_removed_type_p): Delete.
2970 (btf_dtd_kind, btf_emit_type_p): New helpers.
2971 (btf_fwd_to_enum_p, btf_calc_num_vbytes): Use them.
2972 (btf_collect_datasec): Delete.
2973 (btf_dtd_postprocess_cb, btf_dvd_emit_preprocess_cb)
2974 (btf_dtd_emit_preprocess_cb, btf_emit_preprocess): Delete.
2975 (btf_dmd_representable_bitfield_p): Adapt to type reference changes
2976 and delete now-unused ctfc argument.
2977 (btf_asm_datasec_type_ref): Delete.
2978 (btf_asm_type_ref): Adapt to type reference changes, simplify.
2979 (btf_asm_type): Likewise. Mark struct/union types with bitfield
2980 members.
2981 (btf_asm_array): Adapt to data structure changes.
2982 (btf_asm_varent): Likewise.
2983 (btf_asm_sou_member): Likewise. Ensure non-bitfield members are
2984 correctly re-encoded if struct or union contains any bitfield.
2985 (btf_asm_func_arg, btf_asm_func_type, btf_asm_datasec_entry)
2986 (btf_asm_datasec_type): Adapt to data structure changes.
2987 (output_btf_header): Adapt to other changes, simplify type
2988 length calculation, add info to assembler comments.
2989 (output_btf_vars): Adapt to other changes.
2990 (output_btf_strs): Fix overlong lines.
2991 (output_asm_btf_sou_fields, output_asm_btf_enum_list)
2992 (output_asm_btf_func_args_list, output_asm_btf_vlen_bytes)
2993 (output_asm_btf_type, output_btf_types, output_btf_func_types)
2994 (output_btf_datasec_types): Adapt to other changes.
2995 (btf_init_postprocess): Delete.
2996 (btf_output): Change to only perform output.
2997 (btf_add_const_void, btf_add_func_records): New.
2998 (btf_early_finish): Use them here. New.
2999 (btf_datasec_push_entry): Adapt to data structure changes.
3000 (btf_datasec_add_func, btf_datasec_add_var): New.
3001 (btf_add_func_datasec_entries): New.
3002 (btf_emit_variable_p): New helper.
3003 (btf_add_vars): Use it here. New.
3004 (btf_type_list_cb, btf_collect_translated_types): New.
3005 (btf_assign_func_ids, btf_late_assign_var_ids)
3006 (btf_assign_datasec_ids): New.
3007 (btf_finish): Remove unused argument. Call new btf_late*
3008 functions and btf_output.
3009 (btf_finalize): Adapt to data structure changes.
3010 * ctfc.h (struct ctf_dtdef): Convert existing boolean flags to
3011 BOOL_BITFIELD and reorder.
3012 (struct ctf_dvdef): Add dvd_id member.
3013 (btf_finish): Remove argument from prototype.
3014 (get_btf_id): Delete prototype.
3015 (funcs_traverse_callback, traverse_btf_func_types): Add an
3016 explanatory comment.
3017 * dwarf2ctf.cc (ctf_debug_finish): Remove unused argument.
3018 * dwarf2ctf.h: Analogous change.
3019 * dwarf2out.cc: Likewise.
3020
30212024-07-02 David Faust <david.faust@oracle.com>
3022
3023 * btfout.cc (BTF_VOID_TYPEID, BTF_INIT_TYPEID): Move defines to
3024 include/btf.h.
3025 (btf_dvd_emit_preprocess_cb, btf_emit_preprocess)
3026 (btf_dmd_representable_bitfield_p, btf_asm_array, btf_asm_varent)
3027 (btf_asm_sou_member, btf_asm_func_arg, btf_init_postprocess):
3028 Adapt to structural changes in ctf_* structs.
3029 * ctfc.h (struct ctf_dtdef): Add forward declaration.
3030 (ctf_dtdef_t, ctf_dtdef_ref): Move typedefs earlier.
3031 (struct ctf_arinfo, struct ctf_funcinfo, struct ctf_sliceinfo)
3032 (struct ctf_itype, struct ctf_dmdef, struct ctf_func_arg)
3033 (struct ctf_dvdef): Use pointers instead of type IDs for
3034 references to other types and use typedefs where appropriate.
3035 (struct ctf_dtdef): Add ref_type member.
3036 (ctf_type_exists): Use pointer instead of type ID.
3037 (ctf_add_reftype, ctf_add_enum, ctf_add_slice, ctf_add_float)
3038 (ctf_add_integer, ctf_add_unknown, ctf_add_pointer)
3039 (ctf_add_array, ctf_add_forward, ctf_add_typedef)
3040 (ctf_add_function, ctf_add_sou, ctf_add_enumerator)
3041 (ctf_add_variable): Likewise. Return pointer instead of ID.
3042 (ctf_lookup_tree_type): Return pointer to type instead of ID.
3043 * ctfc.cc: Analogous changes.
3044 * ctfout.cc (ctf_asm_type, ctf_asm_slice, ctf_asm_varent)
3045 (ctf_asm_sou_lmember, ctf_asm_sou_member, ctf_asm_func_arg)
3046 (output_ctf_objt_info): Adapt to changes.
3047 * dwarf2ctf.cc (gen_ctf_type, gen_ctf_void_type)
3048 (gen_ctf_unknown_type, gen_ctf_base_type, gen_ctf_pointer_type)
3049 (gen_ctf_subrange_type, gen_ctf_array_type, gen_ctf_typedef)
3050 (gen_ctf_modifier_type, gen_ctf_sou_type, gen_ctf_function_type)
3051 (gen_ctf_enumeration_type, gen_ctf_variable, gen_ctf_function)
3052 (gen_ctf_type, ctf_do_die): Likewise.
3053 * config/bpf/btfext-out.cc (struct btf_ext_core_reloc): Use
3054 pointer instead of type ID.
3055 (bpf_core_reloc_add, bpf_core_get_sou_member_index)
3056 (output_btfext_core_sections): Adapt to above changes.
3057 * config/bpf/core-builtins.cc (process_type): Likewise.
3058
30592024-07-02 David Faust <david.faust@oracle.com>
3060
3061 * btfout.cc (btf_init_postprocess): Rename to...
3062 (btf_early_finish): ...this.
3063 (btf_output): Rename to...
3064 (btf_finish): ...this.
3065 * ctfc.h: Analogous changes.
3066 * dwarf2ctf.cc (ctf_debug_early_finish): Conditionally call
3067 btf_early_finish, or ctf_finalize as appropriate. Emit BTF
3068 here for LTO builds.
3069 (ctf_debug_finish): Always call btf_finish here if generating
3070 BTF info in non-LTO builds.
3071 (ctf_debug_finalize, ctf_debug_init_postprocess): Delete.
3072 * dwarf2out.cc (dwarf2out_early_finish): Remove call to
3073 ctf_debug_init_postprocess.
3074
30752024-07-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
3076
3077 PR target/115188
3078 * config/arm/arm.md (unaligned_loadsi): Use 'Uw' constraint and
3079 'mem_and_no_t1_wback_op'.
3080 (unaligned_loadhiu): Likewise.
3081 (unaligned_storesi): Likewise.
3082 (unaligned_storehi): Likewise.
3083 * config/arm/predicates.md (mem_and_no_t1_wback_op): Add new predicate.
3084 * config/arm/sync.md (arm_atomic_load<mode>): Use 'Uw' constraint.
3085 (arm_atomic_store<mode>): Likewise.
3086
30872024-07-02 Matthew Malcomson <matthew.malcomson@arm.com>
3088
3089 * doc/tm.texi: Regenerated.
3090 * target.def (function_attribute_inlinable_p,
3091 unspec_may_trap_p): Update documentation.
3092
30932024-07-02 Richard Biener <rguenther@suse.de>
3094
3095 PR tree-optimization/115741
3096 * tree-vect-stmts.cc (get_group_load_store_type): Also
3097 handle VMAT_CONTIGUOUS_REVERSE when determining overrun.
3098
30992024-07-02 Andrew Stubbs <ams@baylibre.com>
3100
3101 * config/gcn/gcn-opts.h (TARGET_GLOBAL_ADDRSPACE): New.
3102 (TARGET_AVGPRS): New.
3103 (TARGET_AVGPR_MEMOPS): New.
3104 (TARGET_AVGPR_COMBINED): New.
3105 (TARGET_FLAT_OFFSETS): New.
3106 (TARGET_11BIT_GLOBAL_OFFSET): New.
3107 (TARGET_CDNA2_MEM_COSTS): New.
3108 (TARGET_WAVE64_COMPAT): New.
3109 (TARGET_DPP_FULL): New.
3110 (TARGET_DPP16): New.
3111 (TARGET_DPP8): New.
3112 (TARGET_AVGPR_CDNA1_NOPS): New.
3113 (TARGET_VGPR_GRANULARITY): New.
3114 (TARGET_ARCHITECTED_FLAT_SCRATCH): New.
3115 (TARGET_EXPLICIT_CARRY): New.
3116 (TARGET_MULTIPLY_IMMEDIATE): New.
3117 (TARGET_SDWA): New.
3118 (TARGET_WBINVL1_CACHE): New.
3119 (TARGET_GLn_CACHE): New.
3120 * config/gcn/gcn-valu.md (throughout): Change TARGET_GCN*,
3121 TARGET_CDNA* and TARGET_RDNA* to use TARGET_<feature> instead.
3122 * config/gcn/gcn.cc (throughout): Likewise.
3123 * config/gcn/gcn.md (throughout): Likewise.
3124
31252024-07-02 Lingling Kong <lingling.kong@intel.com>
3126
3127 * config/i386/i386.md (*imulhi<mode>zu): Added APX
3128 NF support.
3129 (*imulhi<mode>zu<nf_name>): New define_insn.
3130 (*mulsi3_1_zext<nf_name>): Ditto.
3131 (*mul<mode><dwi>3_1<nf_name>): Ditto.
3132 (*<u>mulqihi3_1<nf_name>): Ditto.
3133 (*mul<mode>3_1<nf_name>): Added APX NDD support.
3134 (*mulv<mode>4): Ditto.
3135 (*mulvhi4): Ditto.
3136
31372024-07-02 Kewen Lin <linkw@linux.ibm.com>
3138
3139 PR target/115739
3140 * config/sparc/vxworks.h (SPARC_LONG_DOUBLE_TYPE_SIZE): New define.
3141
31422024-07-02 Lulu Cheng <chenglulu@loongson.cn>
3143
3144 * config/loongarch/loongarch.cc (loongarch_insn_cost):
3145 New function.
3146 (TARGET_INSN_COST): New macro.
3147
31482024-07-02 Kewen Lin <linkw@linux.ibm.com>
3149
3150 PR tree-optimization/115659
3151 * gimple-isel.cc (gimple_expand_vec_cond_expr): Add more foldings for
3152 patterns x CMP y ? -1 : z and x CMP y ? z : 0.
3153
31542024-07-01 Richard Biener <rguenther@suse.de>
3155
3156 * tree-ssa-forwprop.cc (fwprop_set_lattice_val): Preserve
3157 SSA info.
3158 * tree-ssa-propagate.cc
3159 (substitute_and_fold_dom_walker::before_dom_children): Likewise.
3160
31612024-07-01 Roger Sayle <roger@nextmovesoftware.com>
3162
3163 * config/i386/i386.md (peephole2): Transform two consecutive
3164 additions into a 3-component lea if !TARGET_AVOID_LEA_FOR_ADDR.
3165
31662024-07-01 Georg-Johann Lay <avr@gjlay.de>
3167
3168 PR target/88236
3169 PR target/115726
3170 * config/avr/avr.md (mov<mode>) [avr_mem_memx_p]: Expand in such a
3171 way that the destination does not overlap with any hard register
3172 clobbered / used by xload8qi_A resp. xload<mode>_A.
3173 * config/avr/avr.cc (avr_out_xload): Avoid early-clobber
3174 situation for Z by executing just one load when the output register
3175 overlaps with Z.
3176
31772024-07-01 Richard Biener <rguenther@suse.de>
3178
3179 PR tree-optimization/115723
3180 * tree-vect-loop.cc (check_reduction_path): For a .COND_ADD
3181 verify the else value also refers to the reduction chain op.
3182
31832024-07-01 Richard Biener <rguenther@suse.de>
3184
3185 PR tree-optimization/115694
3186 * tree-ssa-forwprop.cc (pass_forwprop::execute): Check the
3187 store is complex before rewriting it.
3188
31892024-07-01 liuhongt <hongtao.liu@intel.com>
3190
3191 PR target/115517
3192 * config/i386/mmx.md (vcond<mode>v2sf): Removed.
3193 (vcond<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
3194 (vcond<mode><mode>): Ditto.
3195 (vcondu<MMXMODE124:mode><MMXMODEI:mode>): Ditto.
3196 (vcondu<mode><mode>): Ditto.
3197 * config/i386/sse.md (vcond<V_512:mode><VF_512:mode>): Ditto.
3198 (vcond<V_256:mode><VF_256:mode>): Ditto.
3199 (vcond<V_128:mode><VF_128:mode>): Ditto.
3200 (vcond<VI2HFBF_AVX512VL:mode><VHF_AVX512VL:mode>): Ditto.
3201 (vcond<V_512:mode><VI_AVX512BW:mode>): Ditto.
3202 (vcond<V_256:mode><VI_256:mode>): Ditto.
3203 (vcond<V_128:mode><VI124_128:mode>): Ditto.
3204 (vcond<VI8F_128:mode>v2di): Ditto.
3205 (vcondu<V_512:mode><VI_AVX512BW:mode>): Ditto.
3206 (vcondu<V_256:mode><VI_256:mode>): Ditto.
3207 (vcondu<V_128:mode><VI124_128:mode>): Ditto.
3208 (vcondu<VI8F_128:mode>v2di): Ditto.
3209 (vcondeq<VI8F_128:mode>v2di): Ditto.
3210
32112024-07-01 liuhongt <hongtao.liu@intel.com>
3212
3213 PR target/115517
3214 * config/i386/sse.md ("*ashr<mode>3_1"): New
3215 define_insn_and_split.
3216 (*avx512_ashr<mode>3_1): Ditto.
3217 (*avx2_lshr<mode>3_1): Ditto.
3218 (*avx2_lshr<mode>3_2): Ditto and add 2 combine splitter after
3219 it.
3220 * config/i386/mmx.md (mmxscalarsize): New mode attribute.
3221 (*mmw_ashr<mode>3_1): New define_insn_and_split.
3222 ("mmx_<insn><mode>3): Add a combine spiltter after it.
3223 (*mmx_ashrv2hi3_1): New define_insn_and_plit, also add a
3224 combine splitter after it.
3225
32262024-07-01 liuhongt <hongtao.liu@intel.com>
3227
3228 PR target/115517
3229 * config/i386/sse.md
3230 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt_avx512): New
3231 define_insn_and_split.
3232 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt_avx512):
3233 Ditto.
3234 (*<sse2_avx2>_pmovmskb_lt_avx512): Ditto.
3235 (*<sse2_avx2>_pmovmskb_zext_lt_avx512): Ditto.
3236 (*sse2_pmovmskb_ext_lt_avx512): Ditto.
3237 (*pmovsk_kmask_v16qi_avx512): Ditto.
3238 (*pmovsk_mask_v32qi_avx512): Ditto.
3239 (*pmovsk_mask_cmp_<mode>_avx512): Ditto.
3240 (*pmovsk_ptest_<mode>_avx512): Ditto.
3241
32422024-07-01 liuhongt <hongtao.liu@intel.com>
3243
3244 PR target/115517
3245 * config/i386/sse.md (*minmax<mode>3_1): New pre_reload
3246 define_insn_and_split.
3247 (*minmax<mode>3_2): Ditto.
3248
32492024-07-01 liuhongt <hongtao.liu@intel.com>
3250
3251 PR target/115517
3252 * config/i386/sse.md
3253 (*<avx512>_cvtmask2<ssemodesuffix><mode>_not): New pre_reload
3254 splitter.
3255 (*<avx512>_cvtmask2<ssemodesuffix><mode>_not): Ditto.
3256 (*avx2_pcmp<mode>3_6): Ditto.
3257 (*avx2_pcmp<mode>3_7): Ditto.
3258
32592024-07-01 liuhongt <hongtao.liu@intel.com>
3260
3261 PR target/115517
3262 * config/i386/sse.md
3263 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_gt): New
3264 define_insn_and_split.
3265 (*<sse4_1>_blendv<ssefltmodesuffix><avxsizesuffix>_gtint):
3266 Ditto.
3267 (*<sse4_1>_blendv<ssefltmodesuffix><avxsizesuffix>_not_gtint):
3268 Ditto.
3269 (*<sse4_1_avx2>_pblendvb_gt): Ditto.
3270 (*<sse4_1_avx2>_pblendvb_gt_subreg_not): Ditto.
3271
32722024-07-01 liuhongt <hongtao.liu@intel.com>
3273
3274 * config/i386/i386-features.cc (ix86_rpad_gate): New function.
3275 * config/i386/i386-options.cc (ix86_override_options_after_change):
3276 Don't disable flate_combine.
3277 * config/i386/i386-passes.def: Move pass_stv2 and pass_rpad
3278 after pre_reload pas_late_combine.
3279 * config/i386/i386-protos.h (ix86_rpad_gate): New declare.
3280 * config/i386/i386.cc (ix86_insn_cost): New function.
3281 (TARGET_INSN_COST): Define.
3282
32832024-07-01 liuhongt <hongtao.liu@intel.com>
3284
3285 PR target/115610
3286 * config/i386/i386.md (<*insnsi3_zext): Add alternative ?k,
3287 enable it only for lshiftrt and under avx512bw.
3288 * config/i386/sse.md (*klshrsi3_1_zext): New define_insn, and
3289 add corresponding define_split after it.
3290
32912024-06-30 John David Anglin <danglin@gcc.gnu.org>
3292
3293 PR target/115691
3294 * config/pa/pa.md: Remove incorrect xmpyu patterns.
3295
32962024-06-30 Richard Biener <rguenther@suse.de>
3297
3298 PR tree-optimization/115701
3299 * tree-ssanames.cc (maybe_duplicate_ssa_info_at_copy):
3300 Only copy info from within the same BB.
3301
33022024-06-30 Richard Biener <rguenther@suse.de>
3303
3304 PR tree-optimization/115701
3305 * tree-ssanames.h (maybe_duplicate_ssa_info_at_copy): Declare.
3306 * tree-ssanames.cc (maybe_duplicate_ssa_info_at_copy): New
3307 function, split out from ...
3308 * tree-ssa-copy.cc (fini_copy_prop): ... here.
3309 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): ...
3310 and here.
3311
33122024-06-30 Richard Biener <rguenther@suse.de>
3313
3314 * tree-vect-slp.cc (vect_build_slp_tree_1): Compare
3315 STMT_VINFO_REDUC_IDX.
3316 (vect_build_slp_tree_2): Prevent operand swapping for
3317 all stmts participating in a reduction.
3318
33192024-06-30 Feng Xue <fxue@os.amperecomputing.com>
3320
3321 * tree-vect-loop.cc (vectorizable_reduction): Determine input vectype
3322 during traversal of reduction statements.
3323
33242024-06-30 Feng Xue <fxue@os.amperecomputing.com>
3325
3326 * tree-vect-stmts.cc (vectorizable_shift): Allow shift-by-induction
3327 for single-lane slp node.
3328
33292024-06-29 Maciej W. Rozycki <macro@orcam.me.uk>
3330
3331 PR rtl-optimization/115565
3332 * cse.cc (record_jump_cond): Use INT_MIN rather than -1 for
3333 `comparison_qty' if !REG_P.
3334
33352024-06-29 Sergei Lewis <slewis@rivosinc.com>
3336
3337 * config/riscv/riscv.md (movmem<mode>): New expander.
3338
33392024-06-29 Pan Li <pan2.li@intel.com>
3340
3341 * match.pd: Add imm form for .SAT_ADD matching.
3342 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
3343 Add .SAT_ADD matching under PLUS_EXPR.
3344
33452024-06-29 Jeff Law <jlaw@ventanamicro.com>
3346
3347 * config/mcore/mcore.md (zero_extendqihi2): Clobber CC in expander
3348 and matching insn.
3349 (zero_extendqisi2): Likewise.
3350
33512024-06-28 Andrew MacLeod <amacleod@redhat.com>
3352
3353 * gimple-range-cache.cc (ssa_lazy_cache::ssa_lazy_cache): Relocate here.
3354 Check for provided obstack.
3355 (ssa_lazy_cache::~ssa_lazy_cache): Relocate here. Free bitmap or obstack.
3356 * gimple-range-cache.h (ssa_lazy_cache::ssa_lazy_cache): Move.
3357 (ssa_lazy_cache::~ssa_lazy_cache): Move.
3358 (ssa_lazy_cache::m_ob): New.
3359 * gimple-range.cc (dom_ranger::dom_ranger): Iniitialize obstack.
3360 (dom_ranger::~dom_ranger): Release obstack.
3361 (dom_ranger::pre_bb): Create ssa_lazy_cache using obstack.
3362 * gimple-range.h (m_bitmaps): New.
3363
33642024-06-28 Uros Bizjak <ubizjak@gmail.com>
3365
3366 * config/i386/i386-expand.cc (ix86_expand_move): Remove extra
3367 assignment to tmp variable, reuse tmp variable instead of
3368 declaring new temporary variable and remove tmp variable shadowing.
3369
33702024-06-28 Jørgen Kvalsvik <j@lambda.is>
3371
3372 * tree-profile.cc (find_conditions): Use auto_vec without
3373 embedded storage.
3374
33752024-06-28 Richard Biener <rguenther@suse.de>
3376
3377 PR tree-optimization/115652
3378 * tree-vect-slp.cc (vect_schedule_slp_node): Handle the case
3379 where the outer loop header block is empty.
3380
33812024-06-28 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3382
3383 PR bootstrap/115635
3384 PR target/115643
3385 PR target/115661
3386 * config/aarch64/cygming.h
3387 (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
3388 PE_COFF_LEGITIMIZE_EXTERN_DECL.
3389 (PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
3390 * config/i386/cygming.h (GOT_ALIAS_SET): Remove the diffinition to
3391 reuse it from i386.h.
3392 (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Rename to
3393 PE_COFF_LEGITIMIZE_EXTERN_DECL.
3394 (PE_COFF_LEGITIMIZE_EXTERN_DECL): Likewise.
3395 * config/i386/i386-expand.cc (ix86_expand_move): Return
3396 ix86_GOT_alias_set.
3397 * config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
3398 * config/i386/i386.cc (ix86_GOT_alias_set): Likewise.
3399 * config/i386/i386.h (GOT_ALIAS_SET): Likewise.
3400 * config/mingw/winnt-dll.cc (get_dllimport_decl): Use
3401 GOT_ALIAS_SET.
3402 (legitimize_pe_coff_symbol): Rename to
3403 PE_COFF_LEGITIMIZE_EXTERN_DECL.
3404 * config/mingw/winnt-dll.h (ix86_GOT_alias_set): Declare
3405 ix86_GOT_alias_set.
3406
34072024-06-28 Aldy Hernandez <aldyh@redhat.com>
3408
3409 * range-op-ptr.cc (class hybrid_and_operator): Remove.
3410 (class hybrid_or_operator): Same.
3411 (class hybrid_min_operator): Same.
3412 (class hybrid_max_operator): Same.
3413
34142024-06-28 Richard Biener <rguenther@suse.de>
3415
3416 PR tree-optimization/115640
3417 * tree-vect-stmts.cc (vectorizable_load): With an inner
3418 loop SLP access to not apply a gap adjustment.
3419
34202024-06-28 Andrew Stubbs <ams@baylibre.com>
3421
3422 PR target/115640
3423 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Modify RDNA checks.
3424
34252024-06-28 Roger Sayle <roger@nextmovesoftware.com>
3426
3427 * config/i386/i386.md (*concat<mode><dwi>3_3): Change zero_extend
3428 to any_extend in first operand to left shift by mode precision.
3429 (*concat<mode><dwi>3_4): Likewise.
3430 (*concat<mode><dwi>3_6): Likewise.
3431
34322024-06-28 Roger Sayle <roger@nextmovesoftware.com>
3433
3434 * config/i386/i386-expand.cc (ix86_ternlog_idx) <case VEC_DUPLICATE>:
3435 Add a "goto do_mem_operand" as this need not match memory_operand.
3436 <case CONST_VECTOR>: Only args[2] may be volatile memory operand.
3437 Allow MEM/VEC_DUPLICATE/CONST_VECTOR as args[0] and args[1].
3438
34392024-06-27 Richard Sandiford <richard.sandiford@arm.com>
3440
3441 PR rtl-optimization/115677
3442 * late-combine.cc (pass_late_combine::gate): New function.
3443
34442024-06-27 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
3445
3446 PR target/115634
3447 * config/s390/s390.cc (s390_decompose_addrstyle_without_index):
3448 Check for ADDR_REGS in s390_decompose_addrstyle_without_index.
3449
34502024-06-27 Richard Biener <rguenther@suse.de>
3451
3452 PR tree-optimization/115669
3453 * tree-vect-slp.cc (vect_build_slp_tree_2): Do not reassociate
3454 chains that participate in a reduction.
3455
34562024-06-27 Aldy Hernandez <aldyh@redhat.com>
3457
3458 * gimple-range-cache.cc (update_list::update_list): Add m_bitmaps.
3459 (update_list::~update_list): Initialize m_bitmaps.
3460 * gimple-range-cache.h (ssa_lazy_cache): Add m_bitmaps.
3461 * gimple-range.cc (enable_ranger): Remove global bitmap
3462 initialization.
3463 (disable_ranger): Remove global bitmap release.
3464
34652024-06-27 Hu, Lin1 <lin1.hu@intel.com>
3466
3467 * config/i386/sse.md
3468 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name>
3469 <round_name>): Refactor the pattern.
3470 (unspec_fix<vcvtt_uns_suffix>_trunc<mode><sselongvecmodelower>2
3471 <mask_name><round_saeonly_name>): Ditto.
3472 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name>
3473 <round_saeonly_name>): Ditto.
3474 * config/i386/subst.md (round_modev8sf_condition): Remove.
3475 (round_saeonly_modev8sf_condition): Ditto.
3476
34772024-06-27 Hu, Lin1 <lin1.hu@intel.com>
3478
3479 PR target/107432
3480 * config/i386/i386-expand.cc (ix86_expand_trunc_with_avx2_noavx512f):
3481 New function for generate a series of suitable insn.
3482 * config/i386/i386-protos.h (ix86_expand_trunc_with_avx2_noavx512f):
3483 Define new function.
3484 * config/i386/sse.md: Extend trunc<mode><mode>2 for x86-64-v3.
3485 (ssebytemode) Add V8HI.
3486 (PMOV_DST_MODE_2_AVX2): New mode iterator.
3487 (PMOV_SRC_MODE_3_AVX2): Ditto.
3488 * config/i386/mmx.md
3489 (trunc<mode><mmxhalfmodelower>2): Ditto.
3490 (avx512vl_trunc<mode><mmxhalfmodelower>2): Ditto.
3491 (truncv2si<mode>2): Ditto.
3492 (avx512vl_truncv2si<mode>2): Ditto.
3493 (mmxbytemode): New mode attr.
3494
34952024-06-27 Hu, Lin1 <lin1.hu@intel.com>
3496
3497 PR target/107432
3498 * config/i386/mmx.md
3499 (VI2_32_64): New mode iterator.
3500 (mmxhalfmode): New mode atter.
3501 (mmxhalfmodelower): Ditto.
3502 (truncv2hiv2qi2): Extend mode v4hi and change name from
3503 truncv2hiv2qi to trunc<mode><mmxhalfmodelower>2.
3504
35052024-06-27 Hu, Lin1 <lin1.hu@intel.com>
3506
3507 PR target/107432
3508 * tree-vect-generic.cc
3509 (expand_vector_conversion): Support convert for int -> int,
3510 float -> float and int <-> float.
3511 * tree-vect-stmts.cc (vectorizable_conversion): Wrap the
3512 indirect convert part.
3513 (supportable_indirect_convert_operation): New function.
3514 * tree-vectorizer.h (supportable_indirect_convert_operation):
3515 Define the new function.
3516
35172024-06-27 Xi Ruoyao <xry111@xry111.site>
3518
3519 * config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
3520 Dedup and sort the comment describing modifiers.
3521
35222024-06-27 Xi Ruoyao <xry111@xry111.site>
3523
3524 * config/loongarch/loongarch.cc:
3525 (loongarch_use_bstrins_for_ior_with_mask): Split the main logic
3526 into ...
3527 (loongarch_use_bstrins_for_ior_with_mask_1): ... here.
3528 (loongarch_rtx_costs): Special case for IOR those can be
3529 implemented with bstrins.
3530
35312024-06-27 liuhongt <hongtao.liu@intel.com>
3532
3533 PR target/115462
3534 * config/i386/i386.cc (ix86_rtx_costs): Make cost of MEM (reg +
3535 disp) just a little bit more than MEM (reg).
3536
35372024-06-27 Pan Li <pan2.li@intel.com>
3538
3539 * internal-fn.def (SAT_TRUNC): Add new signed IFN sat_trunc as
3540 unary_convert.
3541 * match.pd: Add new matching pattern for unsigned int sat_trunc.
3542 * optabs.def (OPTAB_CL): Add unsigned and signed optab.
3543 * tree-ssa-math-opts.cc (gimple_unsigend_integer_sat_trunc): Add
3544 new decl for the matching pattern generated func.
3545 (match_unsigned_saturation_trunc): Add new func impl to match
3546 the .SAT_TRUNC.
3547 (math_opts_dom_walker::after_dom_children): Add .SAT_TRUNC match
3548 function under BIT_IOR_EXPR case.
3549
35502024-06-27 Pan Li <pan2.li@intel.com>
3551
3552 * match.pd: Add convert description for minus and capture.
3553 * tree-vect-patterns.cc (vect_recog_build_binary_gimple_call): Add
3554 new logic to handle in_type is incompatibile with out_type, as
3555 well as rename from.
3556 (vect_recog_build_binary_gimple_stmt): Rename to.
3557 (vect_recog_sat_add_pattern): Leverage above renamed func.
3558 (vect_recog_sat_sub_pattern): Ditto.
3559
35602024-06-27 Richard Biener <rguenther@suse.de>
3561
3562 PR tree-optimization/115652
3563 * tree-vect-slp.cc (vect_schedule_slp_node): Only insert
3564 at the start of the block if that strictly dominates
3565 the discovered dependent stmt.
3566
35672024-06-27 Richard Biener <rguenther@suse.de>
3568
3569 PR tree-optimization/115493
3570 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Use
3571 first scalar result.
3572
35732024-06-26 Richard Biener <rguenther@suse.de>
3574
3575 PR tree-optimization/115629
3576 * tree-ssa-tail-merge.cc (gimple_equal_p): Handle
3577 memory references better.
3578 (deps_ok_for_redirect): Handle the case not both blocks
3579 are considered a valid prevailing block.
3580
35812024-06-26 Richard Biener <rguenther@suse.de>
3582
3583 PR tree-optimization/115652
3584 * tree-vect-slp.cc (vect_schedule_slp_node): Advance the
3585 iterator based on last_stmt only for vector defs.
3586
35872024-06-26 Jørgen Kvalsvik <j@lambda.is>
3588
3589 * gcov-io.h (GCOV_ARC_TRUE): New.
3590 (GCOV_ARC_FALSE): New.
3591 * gcov.cc (struct arc_info): Add true_value, false_value.
3592 (read_graph_file): Read true_value, false_value.
3593 * profile.cc (branch_prob): Write GCOV_ARC_TRUE, GCOV_ARC_FALSE.
3594
35952024-06-26 Jørgen Kvalsvik <j@lambda.is>
3596
3597 * gcov.cc (print_usage): Reference masking MC/DC.
3598
35992024-06-26 Jørgen Kvalsvik <j@lambda.is>
3600
3601 * doc/gcov.texi: Add MC/DC section.
3602
36032024-06-26 Jørgen Kvalsvik <j@lambda.is>
3604
3605 * tree-profile.cc (find_conditions): Use auto_vec.
3606
36072024-06-26 Andre Vieira <andre.simoesdiasvieira@arm.com>
3608
3609 * config/arm/arm.cc (arm_predict_doloop_p): Reject loops with function
3610 calls that are not builtins.
3611
36122024-06-26 Kyrylo Tkachov <ktkachov@nvidia.com>
3613
3614 * config/aarch64/aarch64-cores.def (grace): New entry.
3615 * config/aarch64/aarch64-tune.md: Regenerate.
3616 * doc/invoke.texi (AArch64 Options): Document the above.
3617
36182024-06-26 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3619
3620 * config/i386/i386.cc (legitimize_dllimport_symbol): Remove unused
3621 functions.
3622 (legitimize_pe_coff_extern_decl): Likewise.
3623
36242024-06-26 Kewen Lin <linkw@linux.ibm.com>
3625 Xionghu Luo <xionghuluo@tencent.com>
3626
3627 PR target/106069
3628 PR target/115355
3629 * config/rs6000/altivec.md (altivec_vmrghh_direct): Rename to ...
3630 (altivec_vmrghh_direct_be): ... this. Add condition BYTES_BIG_ENDIAN.
3631 (altivec_vmrghh_direct_le): New define_insn.
3632 (altivec_vmrglh_direct): Rename to ...
3633 (altivec_vmrglh_direct_be): ... this. Add condition BYTES_BIG_ENDIAN.
3634 (altivec_vmrglh_direct_le): New define_insn.
3635 (altivec_vmrghh): Adjust by calling gen_altivec_vmrghh_direct_be
3636 for BE and gen_altivec_vmrglh_direct_le for LE.
3637 (altivec_vmrglh): Adjust by calling gen_altivec_vmrglh_direct_be
3638 for BE and gen_altivec_vmrghh_direct_le for LE.
3639 (vec_widen_umult_hi_v16qi): Adjust the call to
3640 gen_altivec_vmrghh_direct by gen_altivec_vmrghh for BE
3641 and by gen_altivec_vmrglh for LE.
3642 (vec_widen_smult_hi_v16qi): Likewise.
3643 (vec_widen_umult_lo_v16qi): Adjust the call to
3644 gen_altivec_vmrglh_direct by gen_altivec_vmrglh for BE
3645 and by gen_altivec_vmrghh for LE.
3646 (vec_widen_smult_lo_v16qi): Likewise.
3647 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
3648 CODE_FOR_altivec_vmrghh_direct by
3649 CODE_FOR_altivec_vmrghh_direct_be for BE and
3650 CODE_FOR_altivec_vmrghh_direct_le for LE. And replace
3651 CODE_FOR_altivec_vmrglh_direct by
3652 CODE_FOR_altivec_vmrglh_direct_be for BE and
3653 CODE_FOR_altivec_vmrglh_direct_le for LE.
3654
36552024-06-26 Kewen Lin <linkw@linux.ibm.com>
3656 Xionghu Luo <xionghuluo@tencent.com>
3657
3658 PR target/106069
3659 PR target/115355
3660 * config/rs6000/altivec.md (altivec_vmrghb_direct): Rename to ...
3661 (altivec_vmrghb_direct_be): ... this. Add condition BYTES_BIG_ENDIAN.
3662 (altivec_vmrghb_direct_le): New define_insn.
3663 (altivec_vmrglb_direct): Rename to ...
3664 (altivec_vmrglb_direct_be): ... this. Add condition BYTES_BIG_ENDIAN.
3665 (altivec_vmrglb_direct_le): New define_insn.
3666 (altivec_vmrghb): Adjust by calling gen_altivec_vmrghb_direct_be
3667 for BE and gen_altivec_vmrglb_direct_le for LE.
3668 (altivec_vmrglb): Adjust by calling gen_altivec_vmrglb_direct_be
3669 for BE and gen_altivec_vmrghb_direct_le for LE.
3670 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
3671 CODE_FOR_altivec_vmrghb_direct by
3672 CODE_FOR_altivec_vmrghb_direct_be for BE and
3673 CODE_FOR_altivec_vmrghb_direct_le for LE. And replace
3674 CODE_FOR_altivec_vmrglb_direct by
3675 CODE_FOR_altivec_vmrglb_direct_be for BE and
3676 CODE_FOR_altivec_vmrglb_direct_le for LE.
3677
36782024-06-26 Richard Biener <rguenther@suse.de>
3679
3680 PR tree-optimization/115646
3681 * tree-call-cdce.cc (check_pow): Check for bit_sz values
3682 as allowed by transform.
3683
36842024-06-26 Haochen Gui <guihaoc@gcc.gnu.org>
3685
3686 * builtins.cc (interclass_mathfn_icode): Set optab to isnormal_optab
3687 for isnormal builtin.
3688 * optabs.def (isnormal_optab): New.
3689 * doc/md.texi (isnormal): Document.
3690
36912024-06-26 Haochen Gui <guihaoc@gcc.gnu.org>
3692
3693 * builtins.cc (interclass_mathfn_icode): Set optab to isfinite_optab
3694 for isfinite builtin.
3695 * optabs.def (isfinite_optab): New.
3696 * doc/md.texi (isfinite): Document.
3697
36982024-06-26 liuhongt <hongtao.liu@intel.com>
3699
3700 PR target/114189
3701 * match.pd: Simplify a < 0 ? -1 : 0 to (signed) >> 31 and a <
3702 0 ? 1 : 0 to (unsigned) a >> 31 for vector integer type.
3703
37042024-06-26 Mark Harmstone <mark@harmstone.com>
3705
3706 * dwarf2codeview.cc (struct codeview_custom_type): Add lf_procedure
3707 and lf_arglist to union.
3708 (write_lf_procedure, write_lf_arglist): New functions.
3709 (write_custom_types): Call write_lf_procedure and write_lf_arglist.
3710 (get_type_num_subroutine_type): New function.
3711 (get_type_num): Handle DW_TAG_subroutine_type DIEs.
3712 * dwarf2codeview.h (LF_PROCEDURE, LF_ARGLIST): Define.
3713
37142024-06-26 Mark Harmstone <mark@harmstone.com>
3715
3716 * dwarf2codeview.cc (struct codeview_custom_type): Add lf_bitfield to
3717 union.
3718 (write_lf_bitfield): New function.
3719 (write_custom_types): Call write_lf_bitfield.
3720 (create_bitfield): New function.
3721 (get_type_num_struct): Handle bitfields.
3722 * dwarf2codeview.h (LF_BITFIELD): Define.
3723
37242024-06-26 David Malcolm <dmalcolm@redhat.com>
3725
3726 * Makefile.in (OBJS-libcommon): Add diagnostic-global-context.o.
3727 * diagnostic-global-context.cc: New file, taken from material in
3728 diagnostic.cc.
3729 * diagnostic.cc (global_diagnostic_context): Move to
3730 diagnostic-global-context.cc.
3731 (global_dc): Likewise.
3732 (verbatim): Likewise.
3733 (emit_diagnostic): Likewise.
3734 (emit_diagnostic_valist): Likewise.
3735 (emit_diagnostic_valist_meta): Likewise.
3736 (inform): Likewise.
3737 (inform_n): Likewise.
3738 (warning): Likewise.
3739 (warning_at): Likewise.
3740 (warning_meta): Likewise.
3741 (warning_n): Likewise.
3742 (pedwarn): Likewise.
3743 (permerror): Likewise.
3744 (permerror_opt): Likewise.
3745 (error): Likewise.
3746 (error_n): Likewise.
3747 (error_at): Likewise.
3748 (error_meta): Likewise.
3749 (sorry): Likewise.
3750 (sorry_at): Likewise.
3751 (seen_error): Likewise.
3752 (fatal_error): Likewise.
3753 (internal_error): Likewise.
3754 (internal_error_no_backtrace): Likewise.
3755 (fnotice): Likewise.
3756 (auto_diagnostic_group::auto_diagnostic_group): Likewise.
3757 (auto_diagnostic_group::~auto_diagnostic_group): Likewise.
3758
37592024-06-26 David Malcolm <dmalcolm@redhat.com>
3760
3761 * diagnostic-path.cc (class path_label): Add m_path field,
3762 and use it to replace all uses of global_dc.
3763 (event_range::event_range): Add "ctxt" param and use it to
3764 construct m_path_label.
3765 (event_range::maybe_add_event): Add "ctxt" param and pass it to
3766 gcc_rich_location::add_location_if_nearby.
3767 (path_summary::path_summary): Add "ctxt" param and pass it to
3768 event_range::maybe_add_event.
3769 (diagnostic_context::print_path): Pass *this to path_summary ctor.
3770 (selftest::test_empty_path): Use "dc" when constructing
3771 path_summary rather than implicitly using global_dc.
3772 (selftest::test_intraprocedural_path): Likewise.
3773 (selftest::test_interprocedural_path_1): Likewise.
3774 (selftest::test_interprocedural_path_2): Likewise.
3775 (selftest::test_recursion): Likewise.
3776 (selftest::test_control_flow_1): Likewise.
3777 (selftest::test_control_flow_2): Likewise.
3778 (selftest::test_control_flow_3): Likewise.
3779 (selftest::assert_cfg_edge_path_streq): Likewise.
3780 (selftest::test_control_flow_5): Likewise.
3781 (selftest::test_control_flow_6): Likewise.
3782 (selftest::diagnostic_path_cc_tests): Eliminate use of global_dc.
3783 * diagnostic-show-locus.cc
3784 (gcc_rich_location::add_location_if_nearby): Add "ctxt" param and
3785 use it instead of implicitly using global_dc.
3786 (selftest::test_add_location_if_nearby): Use
3787 test_diagnostic_context rather than implicitly using global_dc.
3788 * diagnostic.cc (pedantic_warning_kind): Delete macro.
3789 (permissive_error_kind): Delete macro.
3790 (permissive_error_option): Delete macro.
3791 (diagnostic_context::diagnostic_enabled): Remove use of
3792 permissive_error_option.
3793 (diagnostic_context::report_diagnostic): Remove use of
3794 pedantic_warning_kind.
3795 (diagnostic_impl): Convert to...
3796 (diagnostic_context::diagnostic_impl): ...this.
3797 (diagnostic_n_impl): Convert to...
3798 (diagnostic_context::diagnostic_n_impl): ...this.
3799 (emit_diagnostic): Explicitly use global_dc for method call.
3800 (emit_diagnostic_valist): Likewise.
3801 (emit_diagnostic_valist_meta): Likewise.
3802 (inform): Likewise.
3803 (inform_n): Likewise.
3804 (warning): Likewise.
3805 (warning_at): Likewise.
3806 (warning_meta): Likewise.
3807 (warning_n): Likewise.
3808 (pedwarn): Likewise.
3809 (permerror): Likewise.
3810 (permerror_opt): Likewise.
3811 (error): Likewise.
3812 (error_n): Likewise.
3813 (error_at): Likewise.
3814 (error_meta): Likewise.
3815 (sorry): Likewise.
3816 (sorry_at): Likewise.
3817 (fatal_error): Likewise.
3818 (internal_error): Likewise.
3819 (internal_error_no_backtrace): Likewise.
3820 * diagnostic.h (diagnostic_context::diagnostic_impl): New decl.
3821 (diagnostic_context::diagnostic_n_impl): New decl.
3822 * gcc-rich-location.h (gcc_rich_location::add_location_if_nearby):
3823 Add "ctxt" param.
3824
38252024-06-26 David Malcolm <dmalcolm@redhat.com>
3826
3827 PR testsuite/109360
3828 * doc/install.texi (Python3 modules): Update SARIF validation
3829 requirement to use check-jsonschema rather than jsonschema.
3830
38312024-06-25 Mark Harmstone <mark@harmstone.com>
3832
3833 * dwarf2codeview.cc (struct codeview_custom_type): Add lf_array to
3834 union.
3835 (write_lf_array): New function.
3836 (write_custom_types): Call write_lf_array.
3837 (get_type_num_array_type): New function.
3838 (get_type_num): Handle DW_TAG_array_type DIEs.
3839 * dwarf2codeview.h (LF_ARRAY): Define.
3840
38412024-06-25 Mark Harmstone <mark@harmstone.com>
3842
3843 * dwarf2codeview.cc (write_lf_union): New function.
3844 (write_custom_types): Call write_lf_union.
3845 (add_struct_forward_def): Handle DW_TAG_union_type DIEs.
3846 (get_type_num_struct): Handle unions.
3847 (get_type_num): Handle DW_TAG_union_type DIEs.
3848 * dwarf2codeview.h (LF_UNION): Define.
3849
38502024-06-25 Sergei Lewis <slewis@rivosinc.com>
3851
3852 * config/riscv/riscv-protos.h (riscv_vector::expand_vec_cmpmem): New
3853 function declaration.
3854 * config/riscv/riscv-string.cc (riscv_vector::expand_vec_cmpmem): New
3855 function.
3856 * config/riscv/riscv.md (cmpmemsi): Try riscv_vector::expand_vec_cmpmem
3857 for constant lengths.
3858
38592024-06-25 Andrew MacLeod <amacleod@redhat.com>
3860
3861 * doc/invoke.texi (vrp-block-limit): Document.
3862 * params.opt (param=vrp-block-limit): New.
3863 * tree-vrp.cc (fvrp_folder::execute): Invoke fast_vrp if block
3864 count exceeds limit.
3865
38662024-06-25 Surya Kumari Jangala <jskumari@linux.ibm.com>
3867
3868 PR rtl-optimization/111673
3869 * ira-color.cc (assign_hard_reg): Scale save/restore costs of
3870 callee save registers with block frequency.
3871
38722024-06-25 Jeff Law <jlaw@ventanamicro.com>
3873
3874 * config/fr30/constraints.md (Q): Remove unused constraint.
3875 * config/fr30/predicates.md (call_operand): Remove unused predicate.
3876 * config/fr30/fr30.md (call, vall_value): Turn into expanders and
3877 force the call address into a register.
3878 (*call, *call_value): Adjust to only allow indirect calls. Adjust
3879 output template accordingly.
3880
38812024-06-25 Richard Sandiford <richard.sandiford@arm.com>
3882
3883 * late-combine.cc (insn_combination::substitute_nondebug_use):
3884 Reject second and subsequent uses if targetm.cannot_copy_insn_p
3885 disallows copying.
3886
38872024-06-25 Richard Biener <rguenther@suse.de>
3888
3889 * gimple-range-gori.cc (gori_compute::may_recompute_p):
3890 Call is_export_p with NULL bb.
3891
38922024-06-25 Xi Ruoyao <xry111@xry111.site>
3893
3894 * doc/rtl.texi (jump_table_data): Fix typos.
3895
38962024-06-25 Richard Sandiford <richard.sandiford@arm.com>
3897
3898 * dbgcnt.def (late_combine): New debug counter.
3899 * late-combine.cc (insn_combination::run): Use it.
3900
39012024-06-25 Eric Botcazou <ebotcazou@adacore.com>
3902
3903 PR target/115608
3904 * config/sparc/linux64.h (CC1_SPEC): Pass -m32 for -mv8plus.
3905
39062024-06-25 Thomas Schwinge <tschwinge@baylibre.com>
3907
3908 PR target/106594
3909 PR target/115622
3910 PR target/115633
3911 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Move
3912 default-disable of late-combine passes from here...
3913 (rs6000_override_options_after_change): ... to here.
3914
39152024-06-25 Richard Sandiford <richard.sandiford@arm.com>
3916
3917 * expmed.cc (store_bit_field_using_insv): Revert earlier change
3918 to use force_subreg instead of simplify_gen_subreg.
3919
39202024-06-25 YunQiang Su <syq@gcc.gnu.org>
3921
3922 * config/mips/mips.cc(mips_expand_vec_cond_expr): Add extra
3923 argument to info that opernads[3] is cmp_res already.
3924 * config/mips/mips-protos.h(mips_expand_vec_cond_expr): Ditto.
3925 * config/mips/mips-msa.md(vcond_mask): Define new expand.
3926 (vcondu): Use mips_expand_vec_cond_expr with 4th argument.
3927 (vcond): Ditto.
3928
39292024-06-25 YunQiang Su <syq@gcc.gnu.org>
3930
3931 * config/mips/mips.md(conditional_trap_reg): Output $0 instead
3932 of 0 if !ISA_HAS_COND_TRAPI.
3933
39342024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3935
3936 * config.gcc: Add winnt-dll.o, which contains the DLL
3937 import/export implementation.
3938 * config/aarch64/aarch64.cc (aarch64_load_symref_appropriately):
3939 Add dllimport implementation.
3940 (aarch64_expand_call): Likewise.
3941 (aarch64_legitimize_address): Likewise.
3942 * config/aarch64/cygming.h (SYMBOL_FLAG_DLLIMPORT): Modify MinGW
3943 environment to support DLL import/export.
3944 (SYMBOL_FLAG_DLLEXPORT): Likewise.
3945 (SYMBOL_REF_DLLIMPORT_P): Likewise.
3946 (SYMBOL_FLAG_STUBVAR): Likewise.
3947 (SYMBOL_REF_STUBVAR_P): Likewise.
3948 (TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
3949 (TARGET_ASM_FILE_END): Likewise.
3950 (SUB_TARGET_RECORD_STUB): Likewise.
3951 (GOT_ALIAS_SET): Likewise.
3952 (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Likewise.
3953 (HAVE_64BIT_POINTERS): Likewise.
3954
39552024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3956
3957 * config/i386/cygming.h
3958 (PE_COFF_EXTERN_DECL_SHOULD_BE_LEGITIMIZED): Declare whether an
3959 external declaration should be legitimized.
3960 (HAVE_64BIT_POINTERS): Define whether the target supports 64-bit
3961 pointers.
3962 * config/mingw/mingw32.h (defined): Use the correct
3963 DllMainCRTStartup entry function.
3964 * config/mingw/winnt-dll.cc (defined): Exclude ix86-related code.
3965
39662024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3967
3968 * config/aarch64/aarch64.cc: Extend the aarch64 attributes list.
3969 * config/aarch64/cygming.h (SUBTARGET_ATTRIBUTE_TABLE): Define the
3970 selectany attribute.
3971
39722024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
3973
3974 * config/i386/cygming.h (mingw_pe_record_stub): Rename functions
3975 in mingw folder which will be reused for aarch64.
3976 (TARGET_ASM_FILE_END): Update to new target-independent name.
3977 (SUBTARGET_ATTRIBUTE_TABLE): Likewise.
3978 (TARGET_VALID_DLLIMPORT_ATTRIBUTE_P): Likewise.
3979 (SUB_TARGET_RECORD_STUB): Likewise.
3980 * config/i386/i386-protos.h (ix86_handle_selectany_attribute):
3981 Likewise.
3982 (mingw_handle_selectany_attribute): Likewise.
3983 (i386_pe_valid_dllimport_attribute_p): Likewise.
3984 (mingw_pe_valid_dllimport_attribute_p): Likewise.
3985 (i386_pe_file_end): Likewise.
3986 (mingw_pe_file_end): Likewise.
3987 (i386_pe_record_stub): Likewise.
3988 (mingw_pe_record_stub): Likewise.
3989 * config/mingw/winnt.cc (ix86_handle_selectany_attribute):
3990 Likewise.
3991 (mingw_handle_selectany_attribute): Likewise.
3992 (i386_pe_valid_dllimport_attribute_p): Likewise.
3993 (mingw_pe_valid_dllimport_attribute_p): Likewise.
3994 (i386_pe_record_stub): Likewise.
3995 (mingw_pe_record_stub): Likewise.
3996 (i386_pe_file_end): Likewise.
3997 (mingw_pe_file_end): Likewise.
3998 * config/mingw/winnt.h (mingw_handle_selectany_attribute): Declate
3999 functionality that will be reused by multiple targets.
4000 (mingw_pe_file_end): Likewise.
4001 (mingw_pe_record_stub): Likewise.
4002 (mingw_pe_valid_dllimport_attribute_p): Likewise.
4003
40042024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
4005
4006 * config.gcc: Add winnt-dll.o, which contains the DLL
4007 import/export implementation.
4008 * config/i386/cygming.h (SUB_TARGET_RECORD_STUB): Remove the
4009 old implementation. Rename the required function to MinGW.
4010 Use MinGW implementation for COFF and nothing otherwise.
4011 (GOT_ALIAS_SET): Likewise.
4012 * config/i386/i386-expand.cc (ix86_expand_move): Likewise.
4013 * config/i386/i386-expand.h (ix86_GOT_alias_set): Likewise.
4014 (legitimize_pe_coff_symbol): Likewise.
4015 * config/i386/i386-protos.h (i386_pe_record_stub): Likewise.
4016 * config/i386/i386.cc (is_imported_p): Likewise.
4017 (legitimate_pic_address_disp_p): Likewise.
4018 (ix86_GOT_alias_set): Likewise.
4019 (legitimize_pic_address): Likewise.
4020 (legitimize_tls_address): Likewise.
4021 (struct dllimport_hasher): Likewise.
4022 (GTY): Likewise.
4023 (get_dllimport_decl): Likewise.
4024 (legitimize_pe_coff_extern_decl): Likewise.
4025 (legitimize_dllimport_symbol): Likewise.
4026 (legitimize_pe_coff_symbol): Likewise.
4027 (ix86_legitimize_address): Likewise.
4028 * config/i386/i386.h (GOT_ALIAS_SET): Likewise.
4029 * config/mingw/winnt.cc (i386_pe_record_stub): Likewise.
4030 (mingw_pe_record_stub): Likewise.
4031 * config/mingw/winnt.h (mingw_pe_record_stub): Likewise.
4032 * config/mingw/t-cygming: Add the winnt-dll.o compilation.
4033 * config/mingw/winnt-dll.cc: New file.
4034 * config/mingw/winnt-dll.h: New file.
4035
40362024-06-25 Evgeny Karpov <Evgeny.Karpov@microsoft.com>
4037
4038 * config.gcc: Move mingw_* declations to mingw.
4039 * config/aarch64/aarch64-protos.h
4040 (mingw_pe_maybe_record_exported_symbol): Likewise.
4041 (mingw_pe_section_type_flags): Likewise.
4042 (mingw_pe_unique_section): Likewise.
4043 (mingw_pe_encode_section_info): Likewise.
4044 * config/aarch64/cygming.h
4045 (mingw_pe_asm_named_section): Likewise.
4046 (mingw_pe_declare_function_type): Likewise.
4047 * config/i386/i386-protos.h
4048 (mingw_pe_unique_section): Likewise.
4049 (mingw_pe_declare_function_type): Likewise.
4050 (mingw_pe_maybe_record_exported_symbol): Likewise.
4051 (mingw_pe_encode_section_info): Likewise.
4052 (mingw_pe_section_type_flags): Likewise.
4053 (mingw_pe_asm_named_section): Likewise.
4054 * config/mingw/winnt.h: New file.
4055
40562024-06-25 Mark Harmstone <mark@harmstone.com>
4057
4058 * dwarf2codeview.cc (struct codeview_type): Add is_fwd_ref member.
4059 (struct codeview_subtype): Add lf_member to union.
4060 (struct codeview_custom_type): Add lf_structure to union.
4061 (struct codeview_deferred_type): New structure.
4062 (deferred_types, last_deferred_type): New variables.
4063 (get_type_num): Add new args to prototype.
4064 (write_lf_fieldlist): Handle LF_MEMBER subtypes.
4065 (write_lf_structure): New function.
4066 (write_custom_types): Call write_lf_structure.
4067 (get_type_num_pointer_type): Add in_struct argument.
4068 (get_type_num_const_type): Likewise.
4069 (get_type_num_volatile_type): Likewise.
4070 (add_enum_forward_def): Fix get_type_num call.
4071 (get_type_num_enumeration_type): Add in-struct argument.
4072 (add_deferred_type, flush_deferred_types): New functions.
4073 (add_struct_forward_def, get_type_num_struct): Likewise.
4074 (get_type_num): Handle self-referential structs.
4075 (add_variable): Fix get_type_num call.
4076 (codeview_debug_early_finish): Call flush_deferred_types.
4077 * dwarf2codeview.h (LF_CLASS, LF_STRUCTURE, LF_MEMBER): Define.
4078
40792024-06-25 Kewen Lin <linkw@linux.ibm.com>
4080
4081 * coretypes.h (enum tree_index): Forward declaration.
4082 * defaults.h (FLOAT_TYPE_SIZE): Remove.
4083 (DOUBLE_TYPE_SIZE): Likewise.
4084 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4085 * doc/rtl.texi: Update document by replacing {FLOAT,DOUBLE}_TYPE_SIZE
4086 with C type {float,double}.
4087 * doc/tm.texi.in: Document new hook mode_for_floating_type, remove
4088 document entries for {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE and
4089 update document for WIDEST_HARDWARE_FP_SIZE.
4090 * doc/tm.texi: Regenerate.
4091 * emit-rtl.cc (init_emit_once): Replace DOUBLE_TYPE_SIZE by
4092 calling targetm.c.mode_for_floating_type with TI_DOUBLE_TYPE.
4093 * real.h (REAL_VALUE_TO_TARGET_LONG_DOUBLE): Use TYPE_PRECISION of
4094 long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.
4095 * system.h (FLOAT_TYPE_SIZE): Poison.
4096 (DOUBLE_TYPE_SIZE): Likewise.
4097 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4098 * target.def (mode_for_floating_type): New hook.
4099 * targhooks.cc (default_mode_for_floating_type): New function.
4100 (default_scalar_mode_supported_p): Update macros
4101 {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE by calling
4102 targetm.c.mode_for_floating_type with
4103 TI_{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE.
4104 * targhooks.h (default_mode_for_floating_type): New declaration.
4105 * tree-core.h (enum tree_index): Specify underlying type unsigned
4106 to sync with forward declaration in coretypes.h.
4107 (NUM_FLOATN_TYPES): Explicitly convert to int.
4108 (NUM_FLOATNX_TYPES): Likewise.
4109 (NUM_FLOATN_NX_TYPES): Likewise.
4110 * tree.cc (build_common_tree_nodes): Update macros
4111 {FLOAT,DOUBLE,LONG_DOUBLE}_TYPE_SIZE by calling
4112 targetm.c.mode_for_floating_type with
4113 TI_{FLOAT,DOUBLE,LONG_DOUBLE}_TYPE and set type mode accordingly.
4114 * config/arc/arc.h (FLOAT_TYPE_SIZE): Remove.
4115 (DOUBLE_TYPE_SIZE): Likewise.
4116 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4117 * config/bpf/bpf.h (FLOAT_TYPE_SIZE): Remove.
4118 (DOUBLE_TYPE_SIZE): Likewise.
4119 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4120 * config/epiphany/epiphany.h (FLOAT_TYPE_SIZE): Remove.
4121 (DOUBLE_TYPE_SIZE): Likewise.
4122 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4123 * config/fr30/fr30.h (FLOAT_TYPE_SIZE): Remove.
4124 (DOUBLE_TYPE_SIZE): Likewise.
4125 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4126 * config/frv/frv.h (FLOAT_TYPE_SIZE): Remove.
4127 (DOUBLE_TYPE_SIZE): Likewise.
4128 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4129 * config/ft32/ft32.h (FLOAT_TYPE_SIZE): Remove.
4130 (DOUBLE_TYPE_SIZE): Likewise.
4131 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4132 * config/gcn/gcn.h (FLOAT_TYPE_SIZE): Remove.
4133 (DOUBLE_TYPE_SIZE): Likewise.
4134 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4135 * config/iq2000/iq2000.h (FLOAT_TYPE_SIZE): Remove.
4136 (DOUBLE_TYPE_SIZE): Likewise.
4137 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4138 * config/lm32/lm32.h (FLOAT_TYPE_SIZE): Remove.
4139 (DOUBLE_TYPE_SIZE): Likewise.
4140 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4141 * config/m32c/m32c.h (FLOAT_TYPE_SIZE): Remove.
4142 (DOUBLE_TYPE_SIZE): Likewise.
4143 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4144 * config/m32r/m32r.h (FLOAT_TYPE_SIZE): Remove.
4145 (DOUBLE_TYPE_SIZE): Likewise.
4146 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4147 * config/microblaze/microblaze.h (FLOAT_TYPE_SIZE): Remove.
4148 (DOUBLE_TYPE_SIZE): Likewise.
4149 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4150 * config/mmix/mmix.h (FLOAT_TYPE_SIZE): Remove.
4151 (DOUBLE_TYPE_SIZE): Likewise.
4152 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4153 * config/moxie/moxie.h (FLOAT_TYPE_SIZE): Remove.
4154 (DOUBLE_TYPE_SIZE): Likewise.
4155 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4156 * config/msp430/msp430.h (FLOAT_TYPE_SIZE): Remove.
4157 (DOUBLE_TYPE_SIZE): Likewise.
4158 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4159 * config/nds32/nds32.h (FLOAT_TYPE_SIZE): Remove.
4160 (DOUBLE_TYPE_SIZE): Likewise.
4161 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4162 * config/nios2/nios2.h (FLOAT_TYPE_SIZE): Remove.
4163 (DOUBLE_TYPE_SIZE): Likewise.
4164 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4165 * config/nvptx/nvptx.h (FLOAT_TYPE_SIZE): Remove.
4166 (DOUBLE_TYPE_SIZE): Likewise.
4167 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4168 * config/or1k/or1k.h (FLOAT_TYPE_SIZE): Remove.
4169 (DOUBLE_TYPE_SIZE): Likewise.
4170 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4171 * config/pdp11/pdp11.h (FLOAT_TYPE_SIZE): Remove.
4172 (DOUBLE_TYPE_SIZE): Likewise.
4173 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4174 * config/pru/pru.h (FLOAT_TYPE_SIZE): Remove.
4175 (DOUBLE_TYPE_SIZE): Likewise.
4176 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4177 * config/stormy16/stormy16.h (FLOAT_TYPE_SIZE): Remove.
4178 (DOUBLE_TYPE_SIZE): Likewise.
4179 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4180 * config/visium/visium.h (FLOAT_TYPE_SIZE): Remove.
4181 (DOUBLE_TYPE_SIZE): Likewise.
4182 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4183 * config/xtensa/xtensa.h (FLOAT_TYPE_SIZE): Remove.
4184 (DOUBLE_TYPE_SIZE): Likewise.
4185 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4186 * config/rs6000/rs6000.cc (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4187 (rs6000_c_mode_for_floating_type): New function.
4188 * config/rs6000/rs6000.h (FLOAT_TYPE_SIZE): Remove.
4189 (DOUBLE_TYPE_SIZE): Likewise.
4190 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4191 * config/aarch64/aarch64.cc (aarch64_c_mode_for_floating_type):
4192 New function.
4193 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4194 * config/aarch64/aarch64.h (FLOAT_TYPE_SIZE): Remove.
4195 (DOUBLE_TYPE_SIZE): Likewise.
4196 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4197 * config/alpha/alpha.cc (alpha_c_mode_for_floating_type): New
4198 function.
4199 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4200 * config/alpha/alpha.h (FLOAT_TYPE_SIZE): Remove.
4201 (DOUBLE_TYPE_SIZE): Likewise.
4202 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4203 * config/avr/avr.cc (avr_c_mode_for_floating_type): New
4204 function.
4205 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4206 * config/avr/avr.h (FLOAT_TYPE_SIZE): Remove.
4207 (DOUBLE_TYPE_SIZE): Likewise.
4208 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4209 * config/i386/i386.cc (ix86_c_mode_for_floating_type): New
4210 function.
4211 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4212 * config/i386/i386.h (FLOAT_TYPE_SIZE): Remove.
4213 (DOUBLE_TYPE_SIZE): Likewise.
4214 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4215 * config/ia64/ia64.cc (ia64_c_mode_for_floating_type): New
4216 function.
4217 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4218 * config/ia64/ia64.h (FLOAT_TYPE_SIZE): Remove.
4219 (DOUBLE_TYPE_SIZE): Likewise.
4220 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4221 * config/riscv/riscv.cc (riscv_c_mode_for_floating_type): New function.
4222 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4223 * config/riscv/riscv.h (FLOAT_TYPE_SIZE): Remove.
4224 (DOUBLE_TYPE_SIZE): Likewise.
4225 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4226 * config/rl78/rl78.cc (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4227 (rl78_c_mode_for_floating_type): New function.
4228 * config/rl78/rl78.h (FLOAT_TYPE_SIZE): Remove.
4229 (DOUBLE_TYPE_SIZE): Likewise.
4230 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4231 * config/rx/rx.cc (rx_c_mode_for_floating_type): New function.
4232 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4233 * config/rx/rx.h (FLOAT_TYPE_SIZE): Remove.
4234 (DOUBLE_TYPE_SIZE): Likewise.
4235 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4236 * config/s390/s390.cc (s390_c_mode_for_floating_type): New function.
4237 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4238 * config/s390/s390.h (FLOAT_TYPE_SIZE): Remove.
4239 (DOUBLE_TYPE_SIZE): Likewise.
4240 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4241 * config/sh/sh.cc (sh_c_mode_for_floating_type): New function.
4242 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4243 * config/sh/sh.h (LONG_DOUBLE_TYPE_SIZE): Remove.
4244 * config/h8300/h8300.cc (h8300_c_mode_for_floating_type): New
4245 function.
4246 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4247 * config/h8300/h8300.h (FLOAT_TYPE_SIZE): Remove.
4248 (DOUBLE_TYPE_SIZE): Remove.
4249 (LONG_DOUBLE_TYPE_SIZE): Remove.
4250 (DOUBLE_TYPE_MODE): New macro.
4251 * config/h8300/linux.h (DOUBLE_TYPE_SIZE): Remove.
4252 (DOUBLE_TYPE_MODE): New macro.
4253 * config/loongarch/loongarch.cc (loongarch_c_mode_for_floating_type):
4254 New function.
4255 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4256 * config/loongarch/loongarch.h (FLOAT_TYPE_SIZE): Remove.
4257 (DOUBLE_TYPE_SIZE): Remove.
4258 (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4259 (LA_LONG_DOUBLE_TYPE_SIZE): ... this.
4260 (UNITS_PER_FPVALUE): Replace LONG_DOUBLE_TYPE_SIZE with
4261 LA_LONG_DOUBLE_TYPE_SIZE.
4262 (MAX_FIXED_MODE_SIZE): Likewise.
4263 (STRUCTURE_SIZE_BOUNDARY): Likewise.
4264 (BIGGEST_ALIGNMENT): Likewise.
4265 * config/m68k/m68k.cc (m68k_c_mode_for_floating_type): New function.
4266 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4267 * config/m68k/m68k.h (LONG_DOUBLE_TYPE_SIZE): Remove.
4268 (LONG_DOUBLE_TYPE_MODE): New macro.
4269 * config/m68k/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Remove.
4270 (LONG_DOUBLE_TYPE_MODE): New macro.
4271 * config/mips/mips.cc (mips_c_mode_for_floating_type): New function.
4272 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4273 * config/mips/mips.h (UNITS_PER_FPVALUE): Replace LONG_DOUBLE_TYPE_SIZE
4274 with MIPS_LONG_DOUBLE_TYPE_SIZE.
4275 (MAX_FIXED_MODE_SIZE): Likewise.
4276 (STRUCTURE_SIZE_BOUNDARY): Likewise.
4277 (BIGGEST_ALIGNMENT): Likewise.
4278 (FLOAT_TYPE_SIZE): Remove.
4279 (DOUBLE_TYPE_SIZE): Remove.
4280 (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4281 (MIPS_LONG_DOUBLE_TYPE_SIZE): ... this.
4282 * config/mips/n32-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4283 (MIPS_LONG_DOUBLE_TYPE_SIZE): ... this.
4284 * config/pa/pa.cc (pa_c_mode_for_floating_type): New function.
4285 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4286 (pa_scalar_mode_supported_p): Rename FLOAT_TYPE_SIZE to
4287 PA_FLOAT_TYPE_SIZE, rename DOUBLE_TYPE_SIZE to PA_DOUBLE_TYPE_SIZE
4288 and rename LONG_DOUBLE_TYPE_SIZE to PA_LONG_DOUBLE_TYPE_SIZE.
4289 * config/pa/pa.h (PA_FLOAT_TYPE_SIZE): New macro.
4290 (PA_DOUBLE_TYPE_SIZE): Likewise.
4291 (PA_LONG_DOUBLE_TYPE_SIZE): Likewise.
4292 * config/pa/pa-64.h (FLOAT_TYPE_SIZE): Rename to ...
4293 (PA_FLOAT_TYPE_SIZE): ... this.
4294 (DOUBLE_TYPE_SIZE): Rename to ...
4295 (PA_DOUBLE_TYPE_SIZE): ... this.
4296 (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4297 (PA_LONG_DOUBLE_TYPE_SIZE): ... this.
4298 * config/pa/pa-hpux.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4299 (PA_LONG_DOUBLE_TYPE_SIZE): ... this.
4300 * config/sparc/sparc.cc (sparc_c_mode_for_floating_type): New function.
4301 (TARGET_C_MODE_FOR_FLOATING_TYPE): New macro.
4302 (FLOAT_TYPE_SIZE): Remove.
4303 (DOUBLE_TYPE_SIZE): Likewise.
4304 (LONG_DOUBLE_TYPE_SIZE): Likewise.
4305 (sparc_type_code): Replace FLOAT_TYPE_SIZE with TYPE_PRECISION of
4306 float_type_node.
4307 * config/sparc/sparc.h (FLOAT_TYPE_SIZE): Remove.
4308 (DOUBLE_TYPE_SIZE): Remove.
4309 * config/sparc/freebsd.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4310 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4311 * config/sparc/linux.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4312 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4313 * config/sparc/linux64.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4314 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4315 * config/sparc/netbsd-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4316 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4317 * config/sparc/openbsd64.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4318 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4319 * config/sparc/sol2.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4320 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4321 * config/sparc/sp-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4322 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4323 * config/sparc/sp64-elf.h (LONG_DOUBLE_TYPE_SIZE): Rename to ...
4324 (SPARC_LONG_DOUBLE_TYPE_SIZE): ... this.
4325 * config/bfin/bfin.h (FLOAT_TYPE_SIZE): Rename to ...
4326 (BFIN_FLOAT_TYPE_SIZE): ... this.
4327 (DOUBLE_TYPE_SIZE): Rename to ...
4328 (BFIN_DOUBLE_TYPE_SIZE): ... this.
4329 (LONG_DOUBLE_TYPE_SIZE): Remove.
4330 (UNITS_PER_FLOAT): Replace FLOAT_TYPE_SIZE with BFIN_FLOAT_TYPE_SIZE.
4331 (UNITS_PER_DOUBLE): Replace DOUBLE_TYPE_SIZE with
4332 BFIN_DOUBLE_TYPE_SIZE.
4333
43342024-06-25 Kewen Lin <linkw@linux.ibm.com>
4335
4336 * config/vms/vms.cc (vms_patch_builtins): Use TYPE_PRECISION of
4337 long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.
4338
43392024-06-25 Andrew MacLeod <amacleod@redhat.com>
4340
4341 * tree-vrp.cc (execute_fast_vrp): Do not use transitive relations.
4342 * value-query.cc (range_query::create_relation_oracle): Add
4343 parameter to enable transitive relations.
4344 * value-query.h (range_query::create_relation_oracle): Likewise.
4345 * value-relation.h (dom_oracle::dom_oracle): Likewise.
4346 * value-relation.cc (dom_oracle::dom_oracle): Likewise.
4347 (dom_oracle::register_transitives): Check transitive flag.
4348
43492024-06-24 Sergei Lewis <slewis@rivosinc.com>
4350
4351 * config/riscv/riscv-protos.h (riscv_vector::expand_vec_setmem): New
4352 function declaration.
4353 * config/riscv/riscv-string.cc (riscv_vector::expand_vec_setmem): New
4354 function: this generates an inline vectorised memory set, if and only if
4355 we know the entire operation can be performed in a single vector store.
4356 * config/riscv/riscv.md (setmem<mode>): Try riscv_vector::expand_vec_setmem
4357 for constant lengths. Do not require operand 2 to be a constant.
4358
43592024-06-24 Patrick O'Neill <patrick@rivosinc.com>
4360
4361 * doc/sourcebuild.texi (dg-remove-option): Add documentation.
4362 (dg-add-option): Add documentation for riscv_{a,zaamo,zalrsc,ztso}
4363
43642024-06-24 Roger Sayle <roger@nextmovesoftware.com>
4365 Richard Biener <rguenther@suse.de>
4366
4367 PR tree-optimization/113673
4368 * gimple-ssa-store-merging.cc (find_bswap_or_nop_load): Make static.
4369 (find_bswap_or_nop_1): Avoid transformations (load merging) when
4370 stmt_can_throw_internal indicates that a statement can trap.
4371
43722024-06-24 Richard Biener <rguenther@suse.de>
4373
4374 PR tree-optimization/115602
4375 * tree-vect-slp.cc (vect_cse_slp_nodes): Delay populating the
4376 bst-map to avoid cycles.
4377
43782024-06-24 Richard Biener <rguenther@suse.de>
4379
4380 PR tree-optimization/115528
4381 * tree-vect-data-refs.cc (vect_compute_data_ref_alignment):
4382 Make sure to look at both the inner and outer loop step
4383 behavior.
4384
43852024-06-24 Pali Rohár <pali@kernel.org>
4386
4387 * config/i386/mingw-w64.h (CPP_SPEC): Add missing -mcrtdll=
4388 cases: msvcr40*, msvcrtd*.
4389 * config/mingw/mingw32.h (CPP_SPEC): Add missing -mcrtdll=
4390 cases: msvcr40*, msvcrtd*.
4391 * doc/invoke.texi: Add missing -mcrtdll= cases: msvcr40*,
4392 msvcrtd*, msvcr71*. Express wildcards with *. Document _UCRT.
4393
43942024-06-24 Richard Sandiford <richard.sandiford@arm.com>
4395
4396 * common.opt.urls: Regenerate.
4397
43982024-06-24 Richard Sandiford <richard.sandiford@arm.com>
4399
4400 PR rtl-optimization/106594
4401 PR rtl-optimization/114515
4402 PR rtl-optimization/114575
4403 PR rtl-optimization/114996
4404 PR rtl-optimization/115104
4405 * Makefile.in (OBJS): Add late-combine.o.
4406 * common.opt (flate-combine-instructions): New option.
4407 * doc/invoke.texi: Document it.
4408 * opts.cc (default_options_table): Enable it by default at -O2
4409 and above.
4410 * tree-pass.h (make_pass_late_combine): Declare.
4411 * late-combine.cc: New file.
4412 * passes.def: Add two instances of late_combine.
4413 * doc/passes.texi: Document the new passes.
4414 * config/i386/i386-options.cc (ix86_override_options_after_change):
4415 Disable late-combine by default.
4416 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Likewise.
4417 * config/xtensa/xtensa.cc (xtensa_option_override): Likewise.
4418
44192024-06-24 Richard Sandiford <richard.sandiford@arm.com>
4420
4421 * rtl-ssa.h: Include predicates.h.
4422 * rtl-ssa/predicates.h: New file.
4423 * rtl-ssa/access-utils.h (prev_call_clobbers_ignoring): Rename to...
4424 (prev_call_clobbers): ...this and treat the ignore parameter as an
4425 object with the same interface as ignore_nothing.
4426 (next_call_clobbers_ignoring): Rename to...
4427 (next_call_clobbers): ...this and treat the ignore parameter as an
4428 object with the same interface as ignore_nothing.
4429 (first_nondebug_insn_use_ignoring): Rename to...
4430 (first_nondebug_insn_use): ...this and treat the ignore parameter as
4431 an object with the same interface as ignore_nothing.
4432 (last_nondebug_insn_use_ignoring): Rename to...
4433 (last_nondebug_insn_use): ...this and treat the ignore parameter as
4434 an object with the same interface as ignore_nothing.
4435 (last_access_ignoring): Rename to...
4436 (last_access): ...this and treat the ignore parameter as an object
4437 with the same interface as ignore_nothing. Conditionally skip
4438 definitions.
4439 (prev_access_ignoring): Rename to...
4440 (prev_access): ...this and treat the ignore parameter as an object
4441 with the same interface as ignore_nothing.
4442 (first_def_ignoring): Replace with...
4443 (first_access): ...this new function.
4444 (next_access_ignoring): Rename to...
4445 (next_access): ...this and treat the ignore parameter as an object
4446 with the same interface as ignore_nothing. Conditionally skip
4447 definitions.
4448 * rtl-ssa/change-utils.h (insn_is_changing): Delete.
4449 (restrict_movement_ignoring): Rename to...
4450 (restrict_movement): ...this and treat the ignore parameter as an
4451 object with the same interface as ignore_nothing.
4452 (recog_ignoring): Rename to...
4453 (recog): ...this and treat the ignore parameter as an object with
4454 the same interface as ignore_nothing.
4455 * rtl-ssa/changes.h (insn_is_changing_closure): Delete.
4456 * rtl-ssa/functions.h (function_info::add_regno_clobber): Treat
4457 the ignore parameter as an object with the same interface as
4458 ignore_nothing.
4459 * rtl-ssa/insn-utils.h (insn_is): Delete.
4460 * rtl-ssa/insns.h (insn_is_closure): Delete.
4461 * rtl-ssa/member-fns.inl
4462 (insn_is_changing_closure::insn_is_changing_closure): Delete.
4463 (insn_is_changing_closure::operator()): Likewise.
4464 (function_info::add_regno_clobber): Treat the ignore parameter
4465 as an object with the same interface as ignore_nothing.
4466 (ignore_changing_insns::ignore_changing_insns): New function.
4467 (ignore_changing_insns::should_ignore_insn): Likewise.
4468 * rtl-ssa/movement.h (restrict_movement_for_dead_range): Treat
4469 the ignore parameter as an object with the same interface as
4470 ignore_nothing.
4471 (restrict_movement_for_defs_ignoring): Rename to...
4472 (restrict_movement_for_defs): ...this and treat the ignore parameter
4473 as an object with the same interface as ignore_nothing.
4474 (restrict_movement_for_uses_ignoring): Rename to...
4475 (restrict_movement_for_uses): ...this and treat the ignore parameter
4476 as an object with the same interface as ignore_nothing. Conditionally
4477 skip definitions.
4478 * doc/rtl.texi: Update for above name changes. Use
4479 ignore_changing_insns instead of insn_is_changing.
4480 * config/aarch64/aarch64-cc-fusion.cc (cc_fusion::parallelize_insns):
4481 Likewise.
4482 * pair-fusion.cc (no_ignore): Delete.
4483 (latest_hazard_before, first_hazard_after): Update for above name
4484 changes. Use ignore_nothing instead of no_ignore.
4485 (pair_fusion_bb_info::fuse_pair): Update for above name changes.
4486 Use ignore_changing_insns instead of insn_is_changing.
4487 (pair_fusion::try_promote_writeback): Likewise.
4488
44892024-06-24 Richard Biener <rguenther@suse.de>
4490
4491 PR tree-optimization/115599
4492 * tree-ssa-reassoc.cc (compare_repeat_factors): Use explicit
4493 compares to avoid truncations.
4494
44952024-06-24 Haochen Gui <guihaoc@gcc.gnu.org>
4496
4497 PR target/113325
4498 * config/rs6000/vsx.md (vsx_stxvd2x4_le_const_<mode>): New.
4499
45002024-06-24 Haochen Gui <guihaoc@gcc.gnu.org>
4501
4502 * fwprop.cc (try_fwprop_subst_pattern): Invoke change_is_worthwhile
4503 to judge if a replacement is worthwhile. Remove single_set check
4504 and add is_debug_insn check.
4505 * recog.cc (swap_change): Invalidate recog_data when the cached INSN
4506 is swapped out.
4507 * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Check if the
4508 insn cost of new rtl is unknown and fail the replacement.
4509
45102024-06-24 Mark Harmstone <mark@harmstone.com>
4511
4512 * dwarf2codeview.cc (MAX_FIELDLIST_SIZE): Define.
4513 (struct codeview_integer): New structure.
4514 (struct codeview_subtype): Likewise
4515 (struct codeview_custom_type): Add lf_fieldlist and lf_enum to union.
4516 (write_cv_integer, cv_integer_len): New functions.
4517 (write_lf_fieldlist, write_lf_enum): Likewise.
4518 (write_custom_types): Call write_lf_fieldlist and write_lf_enum.
4519 (add_enum_forward_def): New function.
4520 (get_type_num_enumeration_type): Likewise.
4521 (get_type_num): Handle DW_TAG_enumeration_type DIEs.
4522 * dwarf2codeview.h (LF_FIELDLIST, LF_INDEX, LF_ENUMERATE): Define.
4523 (LF_ENUM, LF_CHAR, LF_SHORT, LF_USHORT, LF_LONG): Likewise.
4524 (LF_ULONG, LF_QUADWORD, LF_UQUADWORD): Likewise.
4525 (CV_ACCESS_PRIVATE, CV_ACCESS_PROTECTED): Likewise.
4526 (CV_ACCESS_PUBLIC, CV_PROP_FWDREF): Likewise.
4527
45282024-06-24 Mark Harmstone <mark@harmstone.com>
4529
4530 * dwarf2codeview.cc
4531 (struct codeview_custom_type): Add lf_modifier to union.
4532 (write_cv_padding, write_lf_modifier): New functions.
4533 (write_custom_types): Call write_lf_modifier.
4534 (get_type_num_const_type): New function.
4535 (get_type_num_volatile_type): Likewise.
4536 (get_type_num): Handle DW_TAG_const_type and DW_TAG_volatile_type DIEs.
4537 * dwarf2codeview.h (MOD_const, MOD_volatile): Define.
4538 (LF_MODIFIER): Likewise.
4539
45402024-06-24 Mark Harmstone <mark@harmstone.com>
4541
4542 * dwarf2codeview.cc (FIRST_TYPE): Define.
4543 (struct codeview_custom_type): New structure.
4544 (custom_types, last_custom_type): New variables.
4545 (get_type_num): Prototype.
4546 (write_lf_pointer, write_custom_types): New functions.
4547 (codeview_debug_finish): Call write_custom_types.
4548 (add_custom_type, get_type_num_pointer_type): New functions.
4549 (get_type_num): Handle DW_TAG_pointer_type DIEs.
4550 * dwarf2codeview.h (T_VOID): Define.
4551 (CV_POINTER_32, CV_POINTER_64): Likewise.
4552 (T_32PVOID, T_64PVOID): Likewise.
4553 (CV_PTR_NEAR32, CV_PTR64, LF_POINTER): Likewise.
4554
45552024-06-24 Mark Harmstone <mark@harmstone.com>
4556
4557 * dwarf2codeview.cc (get_type_num): Handle typedefs.
4558
45592024-06-24 Mark Harmstone <mark@harmstone.com>
4560
4561 * dwarf2codeview.cc (struct codeview_type): New structure.
4562 (struct die_hasher): Likewise.
4563 (types_htab): New variable.
4564 (codeview_debug_finish): Free types_htab if allocated.
4565 (get_type_num_base_type, get_type_num): New function.
4566 (add_variable): Call get_type_num.
4567 * dwarf2codeview.h (T_CHAR, T_SHORT, T_LONG, T_QUAD): Define.
4568 (T_UCHAR, T_USHORT, T_ULONG, T_UQUAD, T_BOOL08): Likewise.
4569 (T_REAL32, T_REAL64, T_REAL80, T_REAL128, T_RCHAR): Likewise.
4570 (T_WCHAR, T_INT4, T_UINT4, T_CHAR16, T_CHAR32, T_CHAR8): Likewise.
4571
45722024-06-23 Mark Harmstone <mark@harmstone.com>
4573
4574 * dwarf2codeview.cc (S_LDATA32, S_GDATA32): Define.
4575 (struct codeview_symbol): New structure.
4576 (sym, last_sym): New variables.
4577 (write_data_symbol): New function.
4578 (write_codeview_symbols): Call write_data_symbol.
4579 (add_variable, codeview_debug_early_finish): New functions.
4580 * dwarf2codeview.h (codeview_debug_early_finish): Prototype.
4581 * dwarf2out.cc
4582 (dwarf2out_early_finish): Call codeview_debug_early_finish.
4583
45842024-06-23 Artemiy Volkov <Artemiy.Volkov@synopsys.com>
4585
4586 * config/riscv/riscv.cc (riscv_expand_conditional_move): Add a
4587 CONST0_RTX check.
4588
45892024-06-23 Jeff Law <jlaw@ventanamicro.com>
4590
4591 PR target/114139
4592 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Verify object
4593 is a CONST_INT before looking at INTVAL.
4594
45952024-06-23 Richard Biener <rguenther@suse.de>
4596
4597 PR tree-optimization/115597
4598 * tree-vect-slp.cc (vect_cse_slp_nodes): Allow to CSE
4599 VEC_PERM nodes.
4600
46012024-06-23 Richard Biener <rguenther@suse.de>
4602
4603 PR tree-optimization/115579
4604 * tree-ssa-loop-im.cc (execute_sm): Return the auxiliary data
4605 created.
4606 (hoist_memory_references): Record the flag var that's eventually
4607 created and re-use it when all stores are in the same BB.
4608
46092024-06-23 Collin Funk <collin.funk1@gmail.com>
4610
4611 PR target/115409
4612 * config/i386/avx512fp16intrin.h (_mm512_conj_pch): Make the
4613 constant unsigned before shifting.
4614 * config/i386/avx512fp16vlintrin.h (_mm256_conj_pch): Likewise.
4615 (_mm_conj_pch): Likewise.
4616
46172024-06-23 demin.han <demin.han@starfivetech.com>
4618
4619 * config/riscv/predicates.md (comparison_except_eqge_operator): Only
4620 exclude ge.
4621 (comparison_except_ge_operator): Ditto.
4622 * config/riscv/riscv-string.cc (expand_rawmemchr): Use cmp pattern.
4623 (expand_strcmp): Ditto.
4624 * config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond.
4625 * config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove eqne
4626 patterns.
4627 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
4628 (*pred_eqne<mode>_scalar): Ditto.
4629 (*pred_eqne<mode>_scalar_narrow): Ditto.
4630 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
4631 (*pred_eqne<mode>_extended_scalar): Ditto.
4632 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
4633
46342024-06-21 David Malcolm <dmalcolm@redhat.com>
4635
4636 * diagnostic-format-json.cc
4637 (json_output_format::on_end_diagnostic): Use
4638 get_diagnostic_kind_text rather than embedding a duplicate copy of
4639 the table.
4640 * diagnostic-format-sarif.cc
4641 (make_rule_id_for_diagnostic_kind): Likewise.
4642 * diagnostic.cc (get_diagnostic_kind_text): New.
4643 * diagnostic.h (get_diagnostic_kind_text): New decl.
4644
46452024-06-21 David Malcolm <dmalcolm@redhat.com>
4646
4647 * diagnostic-path.cc (diagnostic_event::meaning::dump_to_pp): Move
4648 here from diagnostic.cc.
4649 (diagnostic_event::meaning::maybe_get_verb_str): Likewise.
4650 (diagnostic_event::meaning::maybe_get_noun_str): Likewise.
4651 (diagnostic_event::meaning::maybe_get_property_str): Likewise.
4652 (diagnostic_path::get_first_event_in_a_function): Likewise.
4653 (diagnostic_path::interprocedural_p): Likewise.
4654 (debug): Likewise for diagnostic_path * overload.
4655 * diagnostic.cc (diagnostic_event::meaning::dump_to_pp): Move from
4656 here to diagnostic-path.cc.
4657 (diagnostic_event::meaning::maybe_get_verb_str): Likewise.
4658 (diagnostic_event::meaning::maybe_get_noun_str): Likewise.
4659 (diagnostic_event::meaning::maybe_get_property_str): Likewise.
4660 (diagnostic_path::get_first_event_in_a_function): Likewise.
4661 (diagnostic_path::interprocedural_p): Likewise.
4662 (debug): Likewise for diagnostic_path * overload.
4663
46642024-06-21 Jeff Law <jlaw@ventanamicro.com>
4665
4666 * config/stormy16/stormy16.md (swpn_zext): New pattern.
4667
46682024-06-21 Richard Sandiford <richard.sandiford@arm.com>
4669
4670 * config/stormy16/predicates.md (xs_hi_nonmemory_operand): Handle
4671 symbol_ref and label_ref.
4672
46732024-06-21 Richard Sandiford <richard.sandiford@arm.com>
4674
4675 * config/iq2000/iq2000.cc (iq2000_print_operand): Make %p handle 1<<31.
4676 * config/iq2000/iq2000.md: Remove "I" constraints on
4677 power_of_2_operands.
4678
46792024-06-21 Richard Sandiford <richard.sandiford@arm.com>
4680
4681 * rtl-ssa/changes.cc (rtl_ssa::changes_are_worthwhile): Don't
4682 cost no-op moves.
4683 * rtl-ssa/insns.cc (insn_info::calculate_cost): Likewise.
4684
46852024-06-21 Andrew MacLeod <amacleod@redhat.com>
4686
4687 * gimple-range.cc (gimple_ranger::register_inferred_ranges): Do not
4688 dump global range info after set_range_info.
4689 (gimple_ranger::register_transitive_inferred_ranges): Likewise.
4690 (dom_ranger::range_of_stmt): Likewise.
4691 * tree-ssanames.cc (set_range_info): If global range info
4692 changes, maybe print new range to dump_file.
4693 * tree-vrp.cc (remove_unreachable::handle_early): Do not
4694 dump global range info after set_range_info.
4695 (remove_unreachable::remove): Likewise.
4696 (remove_unreachable::remove_and_update_globals): Likewise.
4697 (pass_assumptions::execute): Likewise.
4698
46992024-06-21 Andrew MacLeod <amacleod@redhat.com>
4700
4701 * gimple-range.cc (dom_ranger::dom_ranger): Create a block
4702 vector.
4703 (dom_ranger::~dom_ranger): Dispose of the block vector.
4704 (dom_ranger::edge_range): Delete.
4705 (dom_ranger::range_on_edge): Combine range in src BB with any
4706 range gori_nme_on_edge returns.
4707 (dom_ranger::range_in_bb): Combine global range with any active
4708 contextual range for an ssa-name.
4709 (dom_ranger::range_of_stmt): Fix non-ssa LHS case, use
4710 fur_depend for folding so relations can be registered.
4711 (dom_ranger::maybe_push_edge): Delete.
4712 (dom_ranger::pre_bb): Create incoming contextual range vector.
4713 (dom_ranger::post_bb): Free contextual range vector.
4714 * gimple-range.h (dom_ranger::edge_range): Delete.
4715 (dom_ranger::m_e0): Delete.
4716 (dom_ranger::m_e1): Delete.
4717 (dom_ranger::m_bb): New.
4718 (dom_ranger::m_pop_list): Delete.
4719 * tree-vrp.cc (execute_fast_vrp): Enable relation oracle.
4720
47212024-06-21 Andrew MacLeod <amacleod@redhat.com>
4722
4723 * tree-vrp.cc (remove_unreachable::remove): Export global range
4724 if builtin_unreachable dominates all uses.
4725 (remove_unreachable::remove_and_update_globals): Do not reset SCEV.
4726 (execute_ranger_vrp): Reset SCEV here instead.
4727 (fvrp_folder::fvrp_folder): Take final pass flag
4728 and create a remove_unreachable object when specified.
4729 (fvrp_folder::pre_fold_stmt): Register GIMPLE_CONDs with
4730 the remove_unreachcable object.
4731 (fvrp_folder::m_unreachable): New.
4732 (execute_fast_vrp): Process remove_unreachable object.
4733 (pass_vrp::execute): Add final_p flag to execute_fast_vrp.
4734
47352024-06-21 David Malcolm <dmalcolm@redhat.com>
4736
4737 PR testsuite/109360
4738 * doc/install.texi: Mention optional usage of "jsonschema" tool.
4739
47402024-06-21 David Malcolm <dmalcolm@redhat.com>
4741
4742 PR testsuite/109360
4743 * diagnostic-format-sarif.cc
4744 (sarif_builder::make_location_object): Pass any column override
4745 from rich_loc to maybe_make_physical_location_object.
4746 (sarif_builder::maybe_make_physical_location_object): Add
4747 "column_override" param and pass it to maybe_make_region_object.
4748 (sarif_builder::maybe_make_region_object): Add "column_override"
4749 param and use it when the location has 0 for a column. Don't
4750 add "startLine", "startColumn", "endLine", or "endColumn" if
4751 the values aren't positive.
4752 (sarif_builder::maybe_make_region_object_for_context): Don't
4753 add "startLine" or "endLine" if the values aren't positive.
4754
47552024-06-21 Richard Sandiford <richard.sandiford@arm.com>
4756
4757 * config/sh/sh.md (*minus_plus_one): Add constraints.
4758
47592024-06-21 Andrew Pinski <quic_apinski@quicinc.com>
4760
4761 PR tree-optimization/68855
4762 * tree-complex.cc (init_dont_simulate_again): Handle PAREN_EXPR
4763 like NEGATE_EXPR.
4764 (complex_propagate::visit_stmt): Likewise.
4765 (expand_complex_move): Don't handle PAREN_EXPR.
4766 (expand_complex_paren): New function.
4767 (expand_complex_operations_1): Handle PAREN_EXPR like
4768 NEGATE_EXPR. And call expand_complex_paren for PAREN_EXPR.
4769
47702024-06-21 Richard Biener <rguenther@suse.de>
4771
4772 * doc/passes.texi: Remove references to no longer existing
4773 passes.
4774
47752024-06-21 YunQiang Su <syq@gcc.gnu.org>
4776
4777 * configure.ac: Set gcc_cv_as_mips_explicit_relocs if
4778 gcc_cv_as_mips_explicit_relocs_pcrel.
4779 * configure: Regenerate.
4780
47812024-06-21 YunQiang Su <syq@gcc.gnu.org>
4782
4783 * config/mips/mips.cc(mips_rtx_costs): Set condmove cost.
4784 * config/mips/mips.md(mov<GPR:mode>_on_<MOVECC:mode>,
4785 mov<GPR:mode>_on_<MOVECC:mode>_mips16e2,
4786 mov<GPR:mode>_on_<GPR2:mode>_ne
4787 mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Define name by
4788 remove starting *, so that we can use CODE_FOR_.
4789
47902024-06-21 Kewen Lin <linkw@linux.ibm.com>
4791 Xionghu Luo <xionghuluo@tencent.com>
4792
4793 PR target/106069
4794 PR target/115355
4795 * config/rs6000/altivec.md (altivec_vmrghw_direct_<VSX_W:mode>): Rename
4796 to ...
4797 (altivec_vmrghw_direct_<VSX_W:mode>_be): ... this. Add the condition
4798 BYTES_BIG_ENDIAN.
4799 (altivec_vmrghw_direct_<VSX_W:mode>_le): New define_insn.
4800 (altivec_vmrglw_direct_<VSX_W:mode>): Rename to ...
4801 (altivec_vmrglw_direct_<VSX_W:mode>_be): ... this. Add the condition
4802 BYTES_BIG_ENDIAN.
4803 (altivec_vmrglw_direct_<VSX_W:mode>_le): New define_insn.
4804 (altivec_vmrghw): Adjust by calling gen_altivec_vmrghw_direct_v4si_be
4805 for BE and gen_altivec_vmrglw_direct_v4si_le for LE.
4806 (altivec_vmrglw): Adjust by calling gen_altivec_vmrglw_direct_v4si_be
4807 for BE and gen_altivec_vmrghw_direct_v4si_le for LE.
4808 (vec_widen_umult_hi_v8hi): Adjust the call to
4809 gen_altivec_vmrghw_direct_v4si by gen_altivec_vmrghw for BE
4810 and by gen_altivec_vmrglw for LE.
4811 (vec_widen_smult_hi_v8hi): Likewise.
4812 (vec_widen_umult_lo_v8hi): Adjust the call to
4813 gen_altivec_vmrglw_direct_v4si by gen_altivec_vmrglw for BE
4814 and by gen_altivec_vmrghw for LE
4815 (vec_widen_smult_lo_v8hi): Likewise.
4816 * config/rs6000/rs6000.cc (altivec_expand_vec_perm_const): Replace
4817 CODE_FOR_altivec_vmrghw_direct_v4si by
4818 CODE_FOR_altivec_vmrghw_direct_v4si_be for BE and
4819 CODE_FOR_altivec_vmrghw_direct_v4si_le for LE. And replace
4820 CODE_FOR_altivec_vmrglw_direct_v4si by
4821 CODE_FOR_altivec_vmrglw_direct_v4si_be for BE and
4822 CODE_FOR_altivec_vmrglw_direct_v4si_le for LE.
4823 * config/rs6000/vsx.md (vsx_xxmrghw_<VSX_W:mode>): Adjust by calling
4824 gen_altivec_vmrghw_direct_v4si_be for BE and
4825 gen_altivec_vmrglw_direct_v4si_le for LE.
4826 (vsx_xxmrglw_<VSX_W:mode>): Adjust by calling
4827 gen_altivec_vmrglw_direct_v4si_be for BE and
4828 gen_altivec_vmrghw_direct_v4si_le for LE.
4829
48302024-06-20 Roger Sayle <roger@nextmovesoftware.com>
4831
4832 * config/i386/i386-expand.cc (ix86_ternlog_idx): Allow any SUBREG
4833 that matches register_operand. Use rtx_equal_p to compare REG
4834 or SUBREG "leaf" operands.
4835
48362024-06-20 Jeff Law <jlaw@ventanamicro.com>
4837
4838 * config/riscv/bitmanip.md (<bit_optab><mode>): New unified
4839 pattern for bset/binv using a code iterator.
4840 (<bit_optab>i<mode>): Likewise.
4841 (<bit_optab><mode>_mask): Likewise. Support XOR via any_or.
4842 (<bit_optab>isidi): Likewise.
4843 * config/riscv/iterators.md (bit_optab): New iterator.
4844
48452024-06-20 Hongyu Wang <hongyu.wang@intel.com>
4846
4847 * config/i386/i386-options.cc (ix86_option_override_internal):
4848 Use TARGET_*_P (opts->x_ix86_isa_flags*) instead of TARGET_*
4849 for UINTR, LAM and APX_F.
4850
48512024-06-20 Richard Biener <rguenther@suse.de>
4852
4853 PR tree-optimization/114413
4854 * tree-vect-slp.cc (release_scalar_stmts_to_slp_tree_map):
4855 New function, split out from ...
4856 (vect_analyze_slp): ... here. Call it.
4857 (vect_cse_slp_nodes): New function.
4858 (vect_optimize_slp): Call it.
4859
48602024-06-20 Feng Xue <fxue@os.amperecomputing.com>
4861
4862 * tree-vect-loop.cc (vect_transform_reduction): Change assertion to
4863 cover all lane-reducing ops.
4864
48652024-06-20 Feng Xue <fxue@os.amperecomputing.com>
4866
4867 * tree-vect-loop.cc (vect_transform_reduction): Replace vec_oprnds0/1/2
4868 with one new array variable vec_oprnds[3].
4869
48702024-06-20 Feng Xue <fxue@os.amperecomputing.com>
4871
4872 * tree-vect-loop.cc (vectorizable_reduction): Remove v_reduc_type, and
4873 replace it to another local variable reduction_type.
4874
48752024-06-20 Feng Xue <fxue@os.amperecomputing.com>
4876
4877 * tree-vect-loop.cc (vectorizable_reduction): Remove the duplicated
4878 check.
4879
48802024-06-20 Feng Xue <fxue@os.amperecomputing.com>
4881
4882 * tree-vectorizer.h (lane_reducing_stmt_p): New function.
4883 * tree-vect-slp.cc (vect_analyze_slp): Use new function
4884 lane_reducing_stmt_p to check statement.
4885
48862024-06-19 YunQiang Su <syq@gcc.gnu.org>
4887
4888 Revert:
4889 2024-06-19 Collin Funk <collin.funk1@gmail.com>
4890
4891 * configure.ac: Add missing quotation of variable
4892 gcc_cv_as_mips_explicit_relocs.
4893 * configure: Regenerate.
4894
48952024-06-19 demin.han <demin.han@starfivetech.com>
4896
4897 * config/riscv/riscv-vector-builtins-bases.cc: Remove eqne cond
4898 * config/riscv/vector.md (@pred_eqne<mode>_scalar): Remove patterns
4899 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto
4900 (*pred_eqne<mode>_scalar): Ditto
4901 (*pred_eqne<mode>_scalar_narrow): Ditto
4902
49032024-06-19 Patrick O'Neill <patrick@rivosinc.com>
4904
4905 * common/config/riscv/riscv-common.cc: Add 'a' extension to
4906 riscv_combine_info.
4907
49082024-06-19 Jakub Jelinek <jakub@redhat.com>
4909
4910 PR tree-optimization/115544
4911 * gimple-lower-bitint.cc (gimple_lower_bitint): Disable optimizing
4912 loads used by COMPLEX_EXPR operands.
4913
49142024-06-19 mayshao <mayshao-oc@zhaoxin.com>
4915
4916 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Recognize shijidadao.
4917 * common/config/i386/i386-common.cc: Add shijidadao.
4918 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
4919 Add ZHAOXIN_FAM7H_SHIJIDADAO.
4920 * config.gcc: Add shijidadao.
4921 * config/i386/driver-i386.cc (host_detect_local_cpu):
4922 Let -march=native recognize shijidadao processors.
4923 * config/i386/i386-c.cc (ix86_target_macros_internal): Add shijidadao.
4924 * config/i386/i386-options.cc (m_ZHAOXIN): Add m_SHIJIDADAO.
4925 (m_SHIJIDADAO): New definition.
4926 * config/i386/i386.h (enum processor_type): Add PROCESSOR_SHIJIDADAO.
4927 * config/i386/x86-tune-costs.h (struct processor_costs):
4928 Add shijidadao_cost.
4929 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add shijidadao.
4930 (ix86_adjust_cost): Ditto.
4931 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Add m_SHIJIDADAO.
4932 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
4933 (X86_TUNE_USE_GATHER_8PARTS): Ditto.
4934 (X86_TUNE_AVOID_128FMA_CHAINS): Ditto.
4935 * doc/extend.texi: Add details about shijidadao.
4936 * doc/invoke.texi: Ditto.
4937
49382024-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
4939
4940 * config/xtensa/xtensa.cc (print_operand):
4941 When outputting MEMW before the instruction, check if the previous
4942 instruction is already that.
4943
49442024-06-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4945 Stam Markianos-Wright <stam.markianos-wright@arm.com>
4946
4947 * config/arm/arm-protos.h (arm_target_bb_ok_for_lob): Change
4948 declaration to pass basic_block.
4949 (arm_attempt_dlstp_transform): New declaration.
4950 * config/arm/arm.cc (TARGET_LOOP_UNROLL_ADJUST): Define targethook.
4951 (TARGET_PREDICT_DOLOOP_P): Likewise.
4952 (arm_target_bb_ok_for_lob): Adapt condition.
4953 (arm_mve_get_vctp_lanes): New function.
4954 (arm_dl_usage_type): New internal enum.
4955 (arm_get_required_vpr_reg): New function.
4956 (arm_get_required_vpr_reg_param): New function.
4957 (arm_get_required_vpr_reg_ret_val): New function.
4958 (arm_mve_get_loop_vctp): New function.
4959 (arm_mve_insn_predicated_by): New function.
4960 (arm_mve_across_lane_insn_p): New function.
4961 (arm_mve_load_store_insn_p): New function.
4962 (arm_mve_impl_pred_on_outputs_p): New function.
4963 (arm_mve_impl_pred_on_inputs_p): New function.
4964 (arm_last_vect_def_insn): New function.
4965 (arm_mve_impl_predicated_p): New function.
4966 (arm_mve_check_reg_origin_is_num_elems): New function.
4967 (arm_mve_dlstp_check_inc_counter): New function.
4968 (arm_mve_dlstp_check_dec_counter): New function.
4969 (arm_mve_loop_valid_for_dlstp): New function.
4970 (arm_predict_doloop_p): New function.
4971 (arm_loop_unroll_adjust): New function.
4972 (arm_emit_mve_unpredicated_insn_to_seq): New function.
4973 (arm_attempt_dlstp_transform): New function.
4974 * config/arm/arm.opt (mdlstp): New option.
4975 * config/arm/iterators.md (dlstp_elemsize, letp_num_lanes,
4976 letp_num_lanes_neg, letp_num_lanes_minus_1): New attributes.
4977 (DLSTP, LETP): New iterators.
4978 * config/arm/mve.md (predicated_doloop_end_internal<letp_num_lanes>,
4979 dlstp<dlstp_elemsize>_insn): New insn patterns.
4980 * config/arm/thumb2.md (doloop_end): Adapt to support tail-predicated
4981 loops.
4982 (doloop_begin): Likewise.
4983 * config/arm/types.md (mve_misc): New mve type to represent
4984 predicated_loop_end insn sequences.
4985 * config/arm/unspecs.md:
4986 (DLSTP8, DLSTP16, DLSTP32, DSLTP64,
4987 LETP8, LETP16, LETP32, LETP64): New unspecs for DLSTP and LETP.
4988
49892024-06-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
4990 Stam Markianos-Wright <stam.markianos-wright@arm.com>
4991
4992 * df-core.cc (df_bb_regno_only_def_find): New helper function.
4993 * df.h (df_bb_regno_only_def_find): Declare new function.
4994 * loop-doloop.cc (doloop_condition_get): Add support for detecting
4995 predicated vectorized hardware loops.
4996 (doloop_modify): Add support for GTU condition checks.
4997 (doloop_optimize): Update costing computation to support alterations to
4998 desc->niter_expr by the backend.
4999
50002024-06-19 Collin Funk <collin.funk1@gmail.com>
5001
5002 * configure.ac: Add missing quotation of variable
5003 gcc_cv_as_mips_explicit_relocs.
5004 * configure: Regenerate.
5005
50062024-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
5007
5008 * config/xtensa/xtensa-protos.h (xtensa_constantsynth):
5009 Change the second argument from HOST_WIDE_INT to rtx.
5010 * config/xtensa/xtensa.cc (#include):
5011 Add "context.h" and "pass_manager.h".
5012 (machine_function): Add a new hash_map field "litpool_usage".
5013 (xtensa_constantsynth): Make "src" (the second operand) accept
5014 RTX literal instead of its value, and treat both bare and pooled
5015 SI/SFmode literals equally by bit-exact canonicalization into
5016 CONST_INT RTX internally. And then, make avoid synthesis if
5017 such multiple identical canonicalized literals are found in same
5018 function when optimizing for size. Finally, for literals where
5019 synthesis is not possible or has been avoided, re-emit "move"
5020 RTXes with canonicalized ones to increase the chances of sharing
5021 literal pool entries.
5022 * config/xtensa/xtensa.md (split patterns for constant synthesis):
5023 Change to simply invoke xtensa_constantsynth() as mentioned above,
5024 and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.
5025
50262024-06-18 Edwin Lu <ewlu@rivosinc.com>
5027 Robin Dapp <rdapp@ventanamicro.com>
5028
5029 * config/riscv/riscv-v.cc: Move assert out of conditional block
5030
50312024-06-18 Edwin Lu <ewlu@rivosinc.com>
5032 Robin Dapp <rdapp@ventanamicro.com>
5033
5034 * config/riscv/autovec-opt.md: Fix mode mismatch
5035
50362024-06-18 Andrew Pinski <quic_apinski@quicinc.com>
5037
5038 * config/aarch64/aarch64-cores.def: Add comment
5039 saying thunderxt81/t83 are aliases of octeontx81/83.
5040
50412024-06-18 Andrew Pinski <quic_apinski@quicinc.com>
5042
5043 * config/aarch64/aarch64-cores.def (thunderxt88p1): Make an alias of thunderxt88 and
5044 move below thunderxt88.
5045 * config/aarch64/aarch64-tune.md: Regenerate.
5046
50472024-06-18 David Malcolm <dmalcolm@redhat.com>
5048
5049 * Makefile.in (OBJS): Move selftest-diagnostic-path.o,
5050 selftest-logical-location.o, and tree-diagnostic-path.o to...
5051 (OBJS-libcommon): ...here, renaming tree-diagnostic-path.o to
5052 diagnostic-path.o.
5053 * tree-diagnostic-path.cc: Rename to...
5054 * diagnostic-path.cc: ...this. Drop include of "tree.h".
5055 (tree_diagnostic_path_cc_tests): Rename to...
5056 (diagnostic_path_cc_tests): ...this.
5057 * selftest-run-tests.cc (selftest::run_tests): Update for above
5058 renaming.
5059 * selftest.h (tree_diagnostic_path_cc_tests): Rename decl to...
5060 (diagnostic_path_cc_tests): ...this.
5061
50622024-06-18 David Malcolm <dmalcolm@redhat.com>
5063
5064 * diagnostic-format-json.cc (diagnostic_output_format_init_json):
5065 Replace clearing of diagnostic_context::m_print_path callback with
5066 setting the path format to DPF_NONE.
5067 * diagnostic-format-sarif.cc
5068 (diagnostic_output_format_init_sarif): Likewise.
5069 * diagnostic.cc (diagnostic_context::show_any_path): Replace call
5070 to diagnostic_context::m_print_path callback with a direct call to
5071 diagnostic_context::print_path.
5072 * diagnostic.h (diagnostic_context::print_path): New decl.
5073 (diagnostic_context::m_print_path): Delete callback.
5074 * tree-diagnostic-path.cc (default_tree_diagnostic_path_printer):
5075 Convert to...
5076 (diagnostic_context::print_path): ...this.
5077 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete
5078 initialization of m_print_path.
5079 * tree-diagnostic.h (default_tree_diagnostic_path_printer): Delete
5080 decl.
5081
50822024-06-18 David Malcolm <dmalcolm@redhat.com>
5083
5084 * diagnostic-macro-unwinding.cc: New file, with material taken
5085 from tree-diagnostic.cc.
5086 * diagnostic-macro-unwinding.h: New file, with material taken
5087 from tree-diagnostic.h.
5088 * tree-diagnostic-path.cc: Repalce include of "tree-diagnostic.h"
5089 with "diagnostic-macro-unwinding.h".
5090 * tree-diagnostic.cc (struct loc_map_pair): Move to
5091 diagnostic-macro-unwinding.cc.
5092 (maybe_unwind_expanded_macro_loc): Likewise.
5093 (virt_loc_aware_diagnostic_finalizer): Likewise.
5094 * tree-diagnostic.h (virt_loc_aware_diagnostic_finalizer): Move
5095 decl to diagnostic-macro-unwinding.h.
5096 (maybe_unwind_expanded_macro_loc): Likewise.
5097
50982024-06-18 David Malcolm <dmalcolm@redhat.com>
5099
5100 * Makefile.in (OBJS): Add diagnostic-macro-unwinding.o.
5101
51022024-06-18 David Malcolm <dmalcolm@redhat.com>
5103
5104 * diagnostic-format-json.cc: Include "diagnostic-path.h" and
5105 "logical-location.h".
5106 (make_json_for_path): Move tree-diagnostic-path.cc's
5107 default_tree_make_json_for_path here, renaming it and making it
5108 static.
5109 (json_output_format::on_end_diagnostic): Replace call of
5110 m_context's m_make_json_for_path callback with a direct call to
5111 make_json_for_path.
5112 * diagnostic.h (diagnostic_context::m_make_json_for_path): Drop
5113 field.
5114 * tree-diagnostic-path.cc: Drop include of "json.h".
5115 (default_tree_make_json_for_path): Rename to make_json_for_path
5116 and move to diagnostic-format-json.cc.
5117 * tree-diagnostic.cc (tree_diagnostics_defaults): Drop
5118 initialization of m_make_json_for_path.
5119 * tree-diagnostic.h (default_tree_make_json_for): Delete decl.
5120
51212024-06-18 David Malcolm <dmalcolm@redhat.com>
5122
5123 * Makefile.in (OBJS): Add selftest-diagnostic-path.o and
5124 selftest-logical-location.o.
5125 * logical-location.h: Include "label-text.h".
5126 (class logical_location): Update leading comment.
5127 * selftest-diagnostic-path.cc: New file, adapted from
5128 simple-diagnostic-path.cc and from material in
5129 tree-diagnostic-path.cc.
5130 * selftest-diagnostic-path.h: New file, adapted from
5131 simple-diagnostic-path.h and from material in
5132 tree-diagnostic-path.cc.
5133 * selftest-logical-location.cc: New file.
5134 * selftest-logical-location.h: New file.
5135 * tree-diagnostic-path.cc: Remove includes of "tree-pretty-print.h",
5136 "langhooks.h", and "simple-diagnostic-path.h". Add include of
5137 "selftest-diagnostic-path.h".
5138 (class test_diagnostic_path): Delete, in favor of new
5139 implementation in selftest-diagnostic-path.{h,cc}, which is
5140 directly derived from diagnostic_path, rather than from
5141 simple_diagnostic_path.
5142 (selftest::test_intraprocedural_path): Eliminate tree usage,
5143 via change to test_diagnostic_path, using strings rather than
5144 function_decls for identifying functions in the test.
5145 (selftest::test_interprocedural_path_1): Likewise.
5146 (selftest::test_interprocedural_path_2): Likewise.
5147 (selftest::test_recursion): Likewise.
5148 (selftest::test_control_flow_1): Likewise.
5149 (selftest::test_control_flow_2): Likewise.
5150 (selftest::test_control_flow_3): Likewise.
5151 (selftest::assert_cfg_edge_path_streq): Likewise.
5152 (selftest::test_control_flow_5): Likewise.
5153 (selftest::test_control_flow_6): Likewise.
5154
51552024-06-18 David Malcolm <dmalcolm@redhat.com>
5156
5157 * diagnostic.cc: Include "logical-location.h".
5158 (diagnostic_path::get_first_event_in_a_function): Fix typo in
5159 leading comment. Rewrite to use logical_location rather than
5160 tree. Drop test on stack depth.
5161 (diagnostic_path::interprocedural_p): Rewrite to use
5162 logical_location rather than tree.
5163 (logical_location::function_p): New.
5164 * diagnostic-path.h (diagnostic_event::get_fndecl): Eliminate
5165 vfunc.
5166 (diagnostic_path::same_function_p): New pure virtual func.
5167 * logical-location.h (logical_location::get_name_for_path_output):
5168 New pure virtual func.
5169 * simple-diagnostic-path.cc
5170 (simple_diagnostic_path::same_function_p): New.
5171 (simple_diagnostic_event::simple_diagnostic_event): Initialize
5172 m_logical_loc.
5173 * simple-diagnostic-path.h: Include "tree-logical-location.h".
5174 (simple_diagnostic_event::get_fndecl): Convert from a vfunc
5175 implementation to an accessor.
5176 (simple_diagnostic_event::get_logical_location): Use
5177 m_logical_loc.
5178 (simple_diagnostic_event::m_logical_loc): New field.
5179 (simple_diagnostic_path::same_function_p): New decl.
5180 * tree-diagnostic-path.cc: Move pragma disabling -Wformat-diag to
5181 cover the whole file.
5182 (can_consolidate_events): Add params "path", "ev1_idx", and
5183 "ev2_idx". Rewrite to use diagnostic_path::same_function_p rather
5184 than tree.
5185 (per_thread_summary::per_thread_summary): Add "path" param
5186 (per_thread_summary::m_path): New field.
5187 (event_range::event_range): Update for conversion of m_fndecl to
5188 m_logical_loc.
5189 (event_range::maybe_add_event): Rename param "idx" to
5190 "new_ev_idx". Update call to can_consolidate_events to pass in
5191 "m_path", "m_start_idx", and "new_ev_idx".
5192 (event_range::m_fndecl): Replace with...
5193 (event_range::m_logical_loc): ...this.
5194 (path_summary::get_or_create_events_for_thread_id): Pass "path" to
5195 per_thread_summary ctor.
5196 (per_thread_summary::interprocedural_p): Rewrite to use
5197 diagnostic_path::same_function_p rather than tree.
5198 (print_fndecl): Delete.
5199 (thread_event_printer::print_swimlane_for_event_range): Update for
5200 conversion from tree to logical_location.
5201 (default_tree_diagnostic_path_printer): Likewise.
5202 (default_tree_make_json_for_path): Likewise.
5203 * tree-logical-location.cc: Include "intl.h".
5204 (compiler_logical_location::get_name_for_tree_for_path_output):
5205 New.
5206 (tree_logical_location::get_name_for_path_output): New.
5207 (current_fndecl_logical_location::get_name_for_path_output): New.
5208 * tree-logical-location.h
5209 (compiler_logical_location::get_name_for_tree_for_path_output):
5210 New decl.
5211 (tree_logical_location::get_name_for_path_output): New decl.
5212 (current_fndecl_logical_location::get_name_for_path_output): New
5213 decl.
5214
52152024-06-18 David Malcolm <dmalcolm@redhat.com>
5216
5217 * Makefile.in (OBJS): Add simple-diagnostic-path.o.
5218 * diagnostic-path.h (class simple_diagnostic_event): Move to
5219 simple-diagnostic-path.h.
5220 (class simple_diagnostic_thread): Likewise.
5221 (class simple_diagnostic_path): Likewise.
5222 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
5223 Move to simple-diagnostic-path.cc.
5224 (simple_diagnostic_path::num_events): Likewise.
5225 (simple_diagnostic_path::get_event): Likewise.
5226 (simple_diagnostic_path::num_threads): Likewise.
5227 (simple_diagnostic_path::get_thread): Likewise.
5228 (simple_diagnostic_path::add_thread): Likewise.
5229 (simple_diagnostic_path::add_event): Likewise.
5230 (simple_diagnostic_path::add_thread_event): Likewise.
5231 (simple_diagnostic_path::connect_to_next_event): Likewise.
5232 (simple_diagnostic_event::simple_diagnostic_event): Likewise.
5233 (simple_diagnostic_event::~simple_diagnostic_event): Likewise.
5234 * selftest-run-tests.cc (selftest::run_tests): Call
5235 selftest::simple_diagnostic_path_cc_tests.
5236 * selftest.h (selftest::simple_diagnostic_path_cc_tests): New
5237 decl.
5238 * simple-diagnostic-path.cc: New file, from the above material.
5239 * simple-diagnostic-path.h: New file, from the above material
5240 from diagnostic-path.h.
5241 * tree-diagnostic-path.cc: Include "simple-diagnostic-path.h".
5242
52432024-06-18 Pan Li <pan2.li@intel.com>
5244
5245 * match.pd: Add form 7 and 8 for the unsigned .SAT_ADD match.
5246
52472024-06-18 Pan Li <pan2.li@intel.com>
5248
5249 * match.pd: Add form 11 match pattern for .SAT_SUB.
5250
52512024-06-18 Richard Biener <rguenther@suse.de>
5252
5253 PR tree-optimization/115537
5254 * tree-vect-loop.cc (vectorizable_reduction): Also reject
5255 SLP condition reductions of EXTRACT_LAST kind when multiple
5256 statement copies are involved.
5257
52582024-06-18 Jeff Law <jlaw@ventanamicro.com>
5259
5260 * config/riscv/bitmanip.md (bset splitters): New patterns for
5261 generating bset when bit position is limited.
5262
52632024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5264
5265 * config/aarch64/aarch64.cc (aarch64_addti_scratch_regs): Use
5266 force_highpart_subreg instead of gen_highpart and simplify_gen_subreg.
5267 (aarch64_subvti_scratch_regs): Likewise.
5268
52692024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5270
5271 * explow.h (force_highpart_subreg): Declare.
5272 * explow.cc (force_highpart_subreg): New function.
5273 * builtins.cc (expand_builtin_issignaling): Use it.
5274 * expmed.cc (emit_store_flag_1): Likewise.
5275
52762024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5277
5278 * builtins.cc (expand_builtin_issignaling): Use force_lowpart_subreg
5279 instead of simplify_gen_subreg and lowpart_subreg.
5280 * expr.cc (convert_mode_scalar, expand_expr_real_2): Likewise.
5281 * optabs.cc (expand_doubleword_mod): Likewise.
5282
52832024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5284
5285 PR target/115464
5286 * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
5287 (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
5288 simplify_gen_subreg and lowpart_subreg.
5289 * config/aarch64/aarch64-sve-builtins-base.cc
5290 (svset_neonq_impl::expand): Likewise.
5291 * config/aarch64/aarch64-sve-builtins-sme.cc
5292 (add_load_store_slice_operand): Likewise.
5293 * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
5294 (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise.
5295
52962024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5297
5298 * explow.h (force_lowpart_subreg): Declare.
5299 * explow.cc (force_lowpart_subreg): New function.
5300 * optabs.cc (lowpart_subreg_maybe_copy): Delete.
5301 (expand_absneg_bit): Use force_lowpart_subreg instead of
5302 lowpart_subreg_maybe_copy.
5303 (expand_copysign_bit): Likewise.
5304
53052024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5306
5307 * expmed.cc (store_bit_field_using_insv): Use force_subreg
5308 instead of simplify_gen_subreg.
5309 (store_bit_field_1): Likewise.
5310 (extract_bit_field_as_subreg): Likewise.
5311 (extract_integral_bit_field): Likewise.
5312 (emit_store_flag_1): Likewise.
5313 * expr.cc (convert_move): Likewise.
5314 (convert_modes): Likewise.
5315 (emit_group_load_1): Likewise.
5316 (emit_group_store): Likewise.
5317 (expand_assignment): Likewise.
5318
53192024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5320
5321 * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin):
5322 Use force_subreg instead of simplify_gen_subreg.
5323 * config/aarch64/aarch64-simd.md (ctz<mode>2): Likewise.
5324 * config/aarch64/aarch64-sve-builtins-base.cc
5325 (svget_impl::expand): Likewise.
5326 (svget_neonq_impl::expand): Likewise.
5327 * config/aarch64/aarch64-sve-builtins-functions.h
5328 (multireg_permute::expand): Likewise.
5329
53302024-06-18 Richard Sandiford <richard.sandiford@arm.com>
5331
5332 * explow.cc (force_subreg): Emit no instructions on failure.
5333
53342024-06-18 Jakub Jelinek <jakub@redhat.com>
5335
5336 PR target/115324
5337 * config/rs6000/rs6000-gen-builtins.cc (write_decls): Change
5338 declaration of rs6000_init_generated_builtins from no arguments
5339 to 4 pointer arguments.
5340 (write_init_bif_table): Change rs6000_builtin_info_fntype to
5341 builtin_info_fntype and rs6000_builtin_decls to builtin_decls.
5342 (write_init_ovld_table): Change rs6000_instance_info_fntype to
5343 instance_info_fntype, rs6000_builtin_decls to builtin_decls and
5344 rs6000_overload_info to overload_info.
5345 (write_init_file): Add __noipa__ attribute to
5346 rs6000_init_generated_builtins for GCC 8.1+ and change the function
5347 from no arguments to 4 pointer arguments. Change rs6000_builtin_decls
5348 to builtin_decls.
5349 * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Adjust
5350 rs6000_init_generated_builtins caller.
5351
53522024-06-18 Richard Biener <rguenther@suse.de>
5353
5354 PR tree-optimization/115493
5355 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Use
5356 the first scalar result.
5357
53582024-06-18 Richard Biener <rguenther@suse.de>
5359
5360 PR tree-optimization/111793
5361 * tree-ssa-alias.h (ref_can_have_store_data_races): Declare.
5362 * tree-ssa-alias.cc (ref_can_have_store_data_races): New
5363 function.
5364 * tree-if-conv.cc (ifcvt_memrefs_wont_trap): Use
5365 ref_can_have_store_data_races to allow more unconditional
5366 stores.
5367 * tree-ssa-loop-im.cc (execute_sm): Likewise.
5368 * tree-ssa-phiopt.cc (cond_store_replacement): Likewise.
5369
53702024-06-18 Hu, Lin1 <lin1.hu@intel.com>
5371
5372 * config/i386/avxintrin.h: Move cmp[p|s][s|d] to [e|x]mmintrin.h,
5373 and move macros to xmmintrin.h
5374 * config/i386/emmintrin.h: Add cmp[p|s]s intrins.
5375 * config/i386/i386-builtin.def: Modify __builtin_ia32_cmp[p|s][s|d].
5376 * config/i386/i386-expand.cc
5377 (ix86_expand_args_builtin): Raise error when imm is in range of
5378 [8, 32] without avx.
5379 * config/i386/predicates.md (cmpps_imm_operand): New predicate.
5380 * config/i386/sse.md (avx_cmp<mode>3): Modefy define_insn.
5381 (avx_vmcmp<mode>3): Ditto.
5382 * config/i386/xmmintrin.h (_CMP_EQ_OQ): New macro for sse/sse2.
5383 (_CMP_LT_OS): Ditto
5384 (_CMP_LE_OS): Ditto
5385 (_CMP_UNORD_Q): Ditto
5386 (_CMP_NEQ_UQ): Ditto
5387 (_CMP_NLT_US): Ditto
5388 (_CMP_NLE_US): Ditto
5389 (_CMP_ORD_Q): Ditto
5390 (_mm_cmp_ps): Move intrin from avxintrin.h to xmmintrin.h
5391 (_mm_cmp_ss): Ditto.
5392
53932024-06-17 Jeff Law <jlaw@ventanamicro.com>
5394
5395 * config/riscv/bitmanip.md (bsetclr_zero_extract): New pattern.
5396
53972024-06-17 Jakub Jelinek <jakub@redhat.com>
5398
5399 PR driver/115440
5400 * opts-common.cc (add_misspelling_candidates): If opt1 is non-NULL,
5401 add a space and opt1 to the alternative suggestion text.
5402
54032024-06-17 Patrick O'Neill <patrick@rivosinc.com>
5404
5405 * common/config/riscv/riscv-common.cc
5406 (riscv_subset_list::to_string): Skip zaamo/zalrsc when not
5407 supported by the assembler.
5408 * config.in: Regenerate.
5409 * configure: Regenerate.
5410 * configure.ac: Add zaamo/zalrsc assmeber check.
5411
54122024-06-17 Gerald Pfeifer <gerald@pfeifer.com>
5413
5414 * doc/install.texi (Configuration): Mark up __cxa_atexit as @code.
5415
54162024-06-17 Peter Bergner <bergner@linux.ibm.com>
5417
5418 PR target/115389
5419 * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Compute
5420 rop_hash_save_offset for non-Altivec compiles.
5421
54222024-06-17 Jeff Law <jlaw@ventanamicro.com>
5423
5424 * config/riscv/bitmanip.md (bsetdi_2): New pattern.
5425
54262024-06-17 Richard Biener <rguenther@suse.de>
5427
5428 PR tree-optimization/115508
5429 * tree-vect-slp.cc (vect_schedule_slp_node): Guard check on
5430 representative.
5431
54322024-06-17 Richard Biener <rguenther@suse.de>
5433
5434 Revert:
5435 2024-05-06 Richard Biener <rguenther@suse.de>
5436
5437 PR tree-optimization/100923
5438 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Valueize
5439 base SSA_NAME.
5440 (vn_reference_lookup_3): Adjust vn_context_bb around calls
5441 to ao_ref_init_from_vn_reference.
5442 (vn_reference_lookup_pieces): Revert original PR100923 fix.
5443 (vn_reference_lookup): Likewise.
5444
54452024-06-17 Aldy Hernandez <aldyh@redhat.com>
5446
5447 * data-streamer-in.cc (streamer_read_value_range): Rename
5448 Value_Range to value_range.
5449 * data-streamer.h (streamer_read_value_range): Same.
5450 * gimple-pretty-print.cc (dump_ssaname_info): Same.
5451 * gimple-range-cache.cc (ssa_block_ranges::dump): Same.
5452 (ssa_lazy_cache::merge): Same.
5453 (block_range_cache::dump): Same.
5454 (ssa_cache::merge_range): Same.
5455 (ssa_cache::dump): Same.
5456 (ranger_cache::edge_range): Same.
5457 (ranger_cache::propagate_cache): Same.
5458 (ranger_cache::fill_block_cache): Same.
5459 (ranger_cache::resolve_dom): Same.
5460 (ranger_cache::range_from_dom): Same.
5461 (ranger_cache::register_inferred_value): Same.
5462 * gimple-range-fold.cc (op1_range): Same.
5463 (op2_range): Same.
5464 (fold_relations): Same.
5465 (fold_using_range::range_of_range_op): Same.
5466 (fold_using_range::range_of_phi): Same.
5467 (fold_using_range::range_of_call): Same.
5468 (fold_using_range::condexpr_adjust): Same.
5469 (fold_using_range::range_of_cond_expr): Same.
5470 (fur_source::register_outgoing_edges): Same.
5471 * gimple-range-fold.h (gimple_range_type): Same.
5472 (gimple_range_ssa_p): Same.
5473 * gimple-range-gori.cc (gori_compute::compute_operand_range): Same.
5474 (gori_compute::logical_combine): Same.
5475 (gori_compute::refine_using_relation): Same.
5476 (gori_compute::compute_operand1_range): Same.
5477 (gori_compute::compute_operand2_range): Same.
5478 (gori_compute::compute_operand1_and_operand2_range): Same.
5479 (gori_calc_operands): Same.
5480 (gori_name_helper): Same.
5481 * gimple-range-infer.cc (gimple_infer_range::check_assume_func): Same.
5482 (gimple_infer_range::gimple_infer_range): Same.
5483 (infer_range_manager::maybe_adjust_range): Same.
5484 (infer_range_manager::add_range): Same.
5485 * gimple-range-infer.h: Same.
5486 * gimple-range-op.cc
5487 (gimple_range_op_handler::gimple_range_op_handler): Same.
5488 (gimple_range_op_handler::calc_op1): Same.
5489 (gimple_range_op_handler::calc_op2): Same.
5490 (gimple_range_op_handler::maybe_builtin_call): Same.
5491 * gimple-range-path.cc (path_range_query::internal_range_of_expr): Same.
5492 (path_range_query::ssa_range_in_phi): Same.
5493 (path_range_query::compute_ranges_in_phis): Same.
5494 (path_range_query::compute_ranges_in_block): Same.
5495 (path_range_query::add_to_exit_dependencies): Same.
5496 * gimple-range-trace.cc (debug_seed_ranger): Same.
5497 * gimple-range.cc (gimple_ranger::range_of_expr): Same.
5498 (gimple_ranger::range_on_entry): Same.
5499 (gimple_ranger::range_on_edge): Same.
5500 (gimple_ranger::range_of_stmt): Same.
5501 (gimple_ranger::prefill_stmt_dependencies): Same.
5502 (gimple_ranger::register_inferred_ranges): Same.
5503 (gimple_ranger::register_transitive_inferred_ranges): Same.
5504 (gimple_ranger::export_global_ranges): Same.
5505 (gimple_ranger::dump_bb): Same.
5506 (assume_query::calculate_op): Same.
5507 (assume_query::calculate_phi): Same.
5508 (assume_query::dump): Same.
5509 (dom_ranger::range_of_stmt): Same.
5510 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Same.
5511 (ipa_vr_operation_and_type_effects): Same.
5512 (ipa_value_range_from_jfunc): Same.
5513 (propagate_bits_across_jump_function): Same.
5514 (propagate_vr_across_jump_function): Same.
5515 (ipcp_store_vr_results): Same.
5516 * ipa-cp.h: Same.
5517 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
5518 (evaluate_properties_for_edge): Same.
5519 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
5520 (ipa_vr::get_vrange): Same.
5521 (ipa_vr::streamer_read): Same.
5522 (ipa_vr::streamer_write): Same.
5523 (ipa_vr::dump): Same.
5524 (ipa_set_jfunc_vr): Same.
5525 (ipa_compute_jump_functions_for_edge): Same.
5526 (ipcp_get_parm_bits): Same.
5527 (ipcp_update_vr): Same.
5528 (ipa_record_return_value_range): Same.
5529 (ipa_return_value_range): Same.
5530 * ipa-prop.h (ipa_return_value_range): Same.
5531 (ipa_record_return_value_range): Same.
5532 * range-op.h (range_cast): Same.
5533 * tree-ssa-dom.cc
5534 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges): Same.
5535 (cprop_operand): Same.
5536 * tree-ssa-loop-ch.cc (loop_static_stmt_p): Same.
5537 * tree-ssa-loop-niter.cc (record_nonwrapping_iv): Same.
5538 * tree-ssa-loop-split.cc (split_at_bb_p): Same.
5539 * tree-ssa-phiopt.cc (value_replacement): Same.
5540 * tree-ssa-strlen.cc (get_range): Same.
5541 * tree-ssa-threadedge.cc (hybrid_jt_simplifier::simplify): Same.
5542 (hybrid_jt_simplifier::compute_exit_dependencies): Same.
5543 * tree-ssanames.cc (set_range_info): Same.
5544 (duplicate_ssa_name_range_info): Same.
5545 * tree-vrp.cc (remove_unreachable::handle_early): Same.
5546 (remove_unreachable::remove_and_update_globals): Same.
5547 (execute_ranger_vrp): Same.
5548 * value-query.cc (range_query::value_of_expr): Same.
5549 (range_query::value_on_edge): Same.
5550 (range_query::value_of_stmt): Same.
5551 (range_query::value_on_entry): Same.
5552 (range_query::value_on_exit): Same.
5553 (range_query::get_tree_range): Same.
5554 * value-range-storage.cc (vrange_storage::set_vrange): Same.
5555 * value-range.cc (Value_Range::dump): Same.
5556 (value_range::dump): Same.
5557 (debug): Same.
5558 * value-range.h (enum value_range_discriminator): Same.
5559 (class vrange): Same.
5560 (class Value_Range): Same.
5561 (class value_range): Same.
5562 (Value_Range::Value_Range): Same.
5563 (value_range::value_range): Same.
5564 (Value_Range::~Value_Range): Same.
5565 (value_range::~value_range): Same.
5566 (Value_Range::set_type): Same.
5567 (value_range::set_type): Same.
5568 (Value_Range::init): Same.
5569 (value_range::init): Same.
5570 (Value_Range::operator=): Same.
5571 (value_range::operator=): Same.
5572 (Value_Range::operator==): Same.
5573 (value_range::operator==): Same.
5574 (Value_Range::operator!=): Same.
5575 (value_range::operator!=): Same.
5576 (Value_Range::supports_type_p): Same.
5577 (value_range::supports_type_p): Same.
5578 * vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Same.
5579 (simplify_using_ranges::legacy_fold_cond): Same.
5580
55812024-06-17 Hu, Lin1 <lin1.hu@intel.com>
5582
5583 PR target/115161
5584 * config/i386/i386-builtin.def: Change CODE_FOR_* for cvtt*'s builtins.
5585 * config/i386/sse.md:
5586 (unspec_avx512fp16_fix<vcvtt_uns_suffix>
5587 _trunc<mode>2<mask_name><round_saeonly_name>):
5588 Use UNSPEC instead of FIX/UNSIGNED_FIX.
5589 (unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<mask_name>):
5590 Ditto.
5591 (unspec_avx512fp16_fix<vcvtt_uns_suffix>_truncv2di2<mask_name>): Ditto.
5592 (unspec_avx512fp16_fix<vcvtt_uns_suffix>_trunc<mode>2<round_saeonly_name>):
5593 Ditto.
5594 (unspec_sse_cvttps2pi): Ditto.
5595 (unspec_sse_cvttss2si<rex64namesuffix><round_saeonly_name>): Ditto.
5596 (unspec_fix<vcvtt_uns_suffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
5597 Ditto.
5598 (unspec_fix_truncv8sfv8si2<mask_name>): Ditto.
5599 (unspec_fix_truncv4sfv4si2<mask_name>): Ditto.
5600 (unspec_sse2_cvttpd2pi): Ditto.
5601 (unspec_fixuns_truncv2dfv2si2): Ditto.
5602 (unspec_avx512f_vcvttss2usi<rex64namesuffix><round_saeonly_name>):
5603 Ditto.
5604 (unspec_avx512f_vcvttsd2usi<rex64namesuffix><round_saeonly_name>):
5605 Ditto.
5606 (unspec_sse2_cvttsd2si<rex64namesuffix><round_saeonly_name>): Ditto.
5607 (unspec_fix<vcvtt_uns_suffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
5608 Ditto.
5609 (*unspec_fixuns_truncv2dfv2si2): Ditto.
5610 (unspec_fixuns_truncv2dfv2si2_mask): Ditto.
5611 (unspec_fix_truncv4dfv4si2<mask_name>): Ditto.
5612 (unspec_fixuns_truncv4dfv4si2<mask_name>): Ditto.
5613 (unspec_fix<vcvtt_uns_suffix>
5614 _trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
5615 Ditto.
5616 (unspec_fix<vcvtt_uns_suffix>
5617 _trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
5618 Ditto.
5619 (unspec_avx512dq_fix<vcvtt_uns_suffix>_truncv2sfv2di2<mask_name>):
5620 Ditto.
5621 (<mask_codefor>unspec_fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
5622 Ditto.
5623 (unspec_sse2_cvttpd2dq<mask_name>): Ditto.
5624
56252024-06-17 Levy Hsu <admin@levyhsu.com>
5626
5627 * config/i386/i386-expand.cc
5628 (ix86_vectorize_vec_perm_const): Convert BF to HI using subreg.
5629 * config/i386/predicates.md
5630 (vcvtne2ps2bf_parallel): New define_insn_and_split.
5631 * config/i386/sse.md
5632 (vpermt2_sepcial_bf16_shuffle_<mode>): New predicates matches odd increasing perm.
5633
56342024-06-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5635
5636 * config/s390/vector.md (*vmrhf_half<mode>): New.
5637 (extendv2sfv2df2): New.
5638
56392024-06-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5640
5641 PR target/115261
5642 * config/s390/s390.md (any_extend,extend_insn,zero_extend):
5643 New code attributes and code iterator.
5644 * config/s390/vector.md (V_EXTEND): New mode iterator.
5645 (<extend_insn><V_EXTEND:mode><vec_2x_wide>2): New insn.
5646
56472024-06-16 Andrew Pinski <quic_apinski@quicinc.com>
5648
5649 PR target/100211
5650 * config/aarch64/aarch64.h (machine_function): Fix the size
5651 of reg_is_wrapped_separately.
5652
56532024-06-16 Jeff Law <jlaw@ventanamicro.com>
5654
5655 * config/riscv/bitmanip.md ((1 << N) | C): New splitter for IOR/XOR
5656 of a single bit an a DImode object.
5657
56582024-06-16 Jeff Law <jlaw@ventanamicro.com>
5659
5660 * config/sh/sh.md (neg_zero_extract_4b): New pattern.
5661
56622024-06-16 Peter Damianov <peter0x44@disroot.org>
5663
5664 * pretty-print.cc (mingw_ansi_fputs): Don't translate escape sequences if
5665 the console has ENABLE_VIRTUAL_TERMINAL_PROCESSING.
5666
56672024-06-16 Peter Damianov <peter0x44@disroot.org>
5668
5669 * diagnostic-color.cc (auto_enable_urls): Don't hardcode to return
5670 false on mingw hosts.
5671 (auto_enable_urls): Return true if console
5672 supports ansi escape sequences.
5673
56742024-06-16 Peter Damianov <peter0x44@disroot.org>
5675
5676 * diagnostic-color.cc (should_colorize): Enable processing of VT100
5677 escape sequences on windows consoles
5678
56792024-06-15 Christoph Müllner <christoph.muellner@vrull.eu>
5680
5681 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
5682 Fix allocation size of buffer.
5683 (riscv_process_one_target_attr): Likewise.
5684 (riscv_process_target_attr): Likewise.
5685
56862024-06-15 Gerald Pfeifer <gerald@pfeifer.com>
5687
5688 PR target/69374
5689 * doc/install.texi (Specific): Remove pointer to old versions
5690 of binutils.
5691
56922024-06-14 Andrew MacLeod <amacleod@redhat.com>
5693
5694 * gimple-range-gori.cc (gori_calc_operands): Do not continue nor
5695 add the range when VARYING is produced for an operand.
5696
56972024-06-14 Andrew MacLeod <amacleod@redhat.com>
5698
5699 * gimple-range-cache.cc (ssa_lazy_cache::merge): New.
5700 * gimple-range-cache.h (ssa_lazy_cache::merge): New prototype.
5701
57022024-06-14 Andrew MacLeod <amacleod@redhat.com>
5703
5704 * gimple-range-fold.cc (fold_using_range::range_of_call): Ensure
5705 LHS is an SSA_NAME before invoking gimple_range_global.
5706
57072024-06-14 Pan Li <pan2.li@intel.com>
5708
5709 * match.pd: Add more match for unsigned sat_sub.
5710 * tree-ssa-math-opts.cc (match_unsigned_saturation_sub): Add new
5711 func impl to match phi node for .SAT_SUB.
5712 (math_opts_dom_walker::after_dom_children): Try match .SAT_SUB
5713 for the phi node, MULT_EXPR, BIT_XOR_EXPR and BIT_AND_EXPR.
5714
57152024-06-14 Jan Beulich <jbeulich@suse.com>
5716
5717 * configure.ac: Drop ${objdir}/ from NM and AR. Move setting of
5718 ld_ver out of conditional.
5719 * configure: Re-generate.
5720
57212024-06-14 Richard Biener <rguenther@suse.de>
5722
5723 * tree-vect-loop.cc (vectorizable_reduction): Allow
5724 single-def-use cycles with SLP.
5725 (vect_transform_reduction): Handle SLP single def-use cycles.
5726 (vect_transform_cycle_phi): Likewise.
5727
57282024-06-14 Gerald Pfeifer <gerald@pfeifer.com>
5729
5730 * doc/invoke.texi (x86 Options): Consolidate duplicate MOVBE
5731 listings for haswell, broadwell, skylake, skylake-avx512,
5732 cannonlake, icelake-client, icelake-server, cascadelake,
5733 cooperlake, tigerlake, sapphirerapids, rocketlake, graniterapids,
5734 and graniterapids-d options to -march.
5735
57362024-06-14 Pan Li <pan2.li@intel.com>
5737
5738 PR target/115456
5739 * config/riscv/vector-iterators.md: Leverage V_ZVFH instead of V
5740 which contains the VF_ZVFHMIN for alignment.
5741
57422024-06-14 Gerald Pfeifer <gerald@pfeifer.com>
5743
5744 PR target/69374
5745 * doc/install.texi (Specific): Remove stale reference to Interix.
5746
57472024-06-14 Richard Biener <rguenther@suse.de>
5748
5749 * tree-vect-stmts.cc (get_group_load_store_type): Do not
5750 re-use poly-int remain but re-compute with non-poly values.
5751 Verify the shortened load is good enough to be covered with
5752 a single scalar gap iteration before accepting it.
5753
57542024-06-14 liuhongt <hongtao.liu@intel.com>
5755
5756 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
5757 pternlog_operand under AVX512, also adjust VEC_DUPLICATE
5758 according since vec_dup:mem can't be that cheap.
5759
57602024-06-14 liuhongt <hongtao.liu@intel.com>
5761
5762 * config/i386/x86-tune.def (X86_TUNE_ONE_IF_CONV_INSN): Remove
5763 latest Intel processors.
5764 Co-authored by: Lingling Kong <lingling.kong@intel.com>
5765
57662024-06-14 Roger Sayle <roger@nextmovesoftware.com>
5767
5768 * config/i386/i386-expand.cc (ix86_expand_ternlog): Try performing
5769 logic operation in a different vector mode if that enables use of
5770 a 32-bit or 64-bit broadcast addressing mode.
5771
57722024-06-14 Andrew Pinski <quic_apinski@quicinc.com>
5773
5774 PR middle-end/113212
5775 * expr.h (const_seqpops): New typedef.
5776 (expand_expr_real_2): Constify the first argument.
5777 * optabs.cc (expand_widen_pattern_expr): Likewise.
5778 * optabs.h (expand_widen_pattern_expr): Likewise.
5779 * expr.cc (expand_expr_real_2): Likewise
5780 (do_store_flag): Likewise. Remove incorrect store to ops->code.
5781
57822024-06-13 Patrick O'Neill <patrick@rivosinc.com>
5783
5784 * config/riscv/sync-rvwmo.md: Add support for subword fenced
5785 loads/stores.
5786 * config/riscv/sync-ztso.md: Ditto.
5787 * config/riscv/sync.md: Ditto.
5788
57892024-06-13 Gerald Pfeifer <gerald@pfeifer.com>
5790
5791 * doc/extend.texi (AArch64 Function Attributes): Add
5792 (AVR Variable Attributes): Ditto.
5793 (Common Type Attributes): Ditto.
5794
57952024-06-13 Hongyu Wang <hongyu.wang@intel.com>
5796
5797 PR target/115370
5798 PR target/115463
5799 * target.def (have_ccmp): New target hook.
5800 * targhooks.cc (default_have_ccmp): New function.
5801 * targhooks.h (default_have_ccmp): New prototype.
5802 * doc/tm.texi.in: Add TARGET_HAVE_CCMP.
5803 * doc/tm.texi: Regenerate.
5804 * cfgexpand.cc (expand_gimple_cond): Call targetm.have_ccmp
5805 instead of checking if targetm.gen_ccmp_first exists.
5806 * expr.cc (expand_expr_real_gassign): Likewise.
5807 * config/i386/i386.cc (ix86_have_ccmp): New target hook to
5808 check if APX_CCMP enabled.
5809 (TARGET_HAVE_CCMP): Define.
5810
58112024-06-13 Richard Sandiford <richard.sandiford@arm.com>
5812
5813 PR target/115464
5814 * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
5815 to fold two subregs together if their relationship isn't known
5816 at compile time.
5817 * explow.h (force_subreg): Declare.
5818 * explow.cc (force_subreg): New function.
5819 * config/aarch64/aarch64-sve-builtins-base.cc
5820 (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.
5821
58222024-06-13 Pan Li <pan2.li@intel.com>
5823
5824 PR target/115456
5825 * config/riscv/autovec.md: Take ZVFH mode iterator instead of
5826 the ZVFHMIN for the alignment.
5827 * config/riscv/vector-iterators.md: Add 2 new iterator
5828 V_VLS_ZVFH and VLS_ZVFH.
5829
58302024-06-13 Hongyu Wang <hongyu.wang@intel.com>
5831
5832 * config/i386/i386.md (@ccmp<mode>): Add new alternative
5833 <r>,C and adjust output templates. Also adjust UNSPEC mode
5834 to CCmode.
5835
58362024-06-13 Gerald Pfeifer <gerald@pfeifer.com>
5837
5838 PR other/69374
5839 * doc/install.texi (Prerequisites): Simplify note on the C++
5840 compiler required. Drop requirements for versions of GCC prior
5841 to 3.4. Fix grammar.
5842
58432024-06-13 Richard Biener <rguenther@suse.de>
5844
5845 * tree-vect-stmts.cc (get_group_load_store_type): Consistently
5846 use VMAT_STRIDED_SLP for strided SLP accesses and not
5847 VMAT_ELEMENTWISE.
5848 (vectorizable_store): Adjust VMAT_STRIDED_SLP handling to
5849 allow not only half-size but also smaller accesses.
5850 (vectorizable_load): Likewise.
5851
58522024-06-13 Richard Biener <rguenther@suse.de>
5853
5854 PR tree-optimization/115385
5855 * tree-vect-stmts.cc (get_group_load_store_type): Peeling
5856 of a single scalar iteration is sufficient if we can narrow
5857 the access to the next power of two of the bits in the last
5858 access.
5859 (vectorizable_load): Ensure that the last access is narrowed.
5860
58612024-06-13 Richard Biener <rguenther@suse.de>
5862
5863 PR tree-optimization/114107
5864 PR tree-optimization/110445
5865 * tree-vect-stmts.cc (get_group_load_store_type): Refactor
5866 contiguous access case. Make sure peeling for gap constraints
5867 are always tested and consistently relax when we know we can
5868 avoid touching excess elements during code generation. But
5869 rewrite the check poly-int aware.
5870
58712024-06-13 Andi Kleen <ak@linux.intel.com>
5872
5873 * doc/extend.texi: Use std::string_view in asm constexpr
5874 example.
5875
58762024-06-13 liuhongt <hongtao.liu@intel.com>
5877
5878 PR target/115452
5879 * config/i386/i386-features.cc (scalar_chain::convert_op): Use
5880 reg_or_subregno instead of REGNO to avoid ICE.
5881
58822024-06-13 YunQiang Su <syq@gcc.gnu.org>
5883
5884 * config/mips/mips-cpus.def: Use PROCESSOR_24KF1_1 for mips32;
5885 Use PROCESSOR_5KF for mips64/mips64r2/mips64r3/mips64r5.
5886
58872024-06-13 YunQiang Su <syq@gcc.gnu.org>
5888
5889 * config/mips/mips-modes.def: New CC_MODE CCE.
5890 * config/mips/mips-protos.h(mips_output_compare): New function.
5891 * config/mips/mips.cc(mips_allocate_fcc): Set CCEmode count=1.
5892 (mips_emit_compare): Use CCEmode for LTGT/LT/LE for pre-R6.
5893 (mips_output_compare): New function. Convert lt/le to slt/sle
5894 for R6; convert ueq to ngl for CCEmode.
5895 (mips_hard_regno_mode_ok_uncached): Mention CCEmode.
5896 * config/mips/mips.h: Mention CCEmode for LOAD_EXTEND_OP.
5897 * config/mips/mips.md(FPCC): Add CCE.
5898 (define_mode_iterator MOVECC): Mention CCE.
5899 (define_mode_attr reg): Add CCE with "z".
5900 (define_mode_attr fpcmp): Add CCE with "c".
5901 (define_code_attr fcond): ltgt should use sne instead of ne.
5902 (s<code>_<SCALARF:mode>_using_<FPCC:mode>): call mips_output_compare.
5903
59042024-06-13 Lingling Kong <lingling.kong@intel.com>
5905
5906 * config/i386/i386-opts.h (enum apx_features): Add apx_zu.
5907 * config/i386/i386.h (TARGET_APX_ZU): Define.
5908 * config/i386/i386.md (*imulhi<mode>zu): New define_insn.
5909 (*setcc_<mode>_zu): Ditto.
5910 * config/i386/i386.opt: Add enum value for zu.
5911
59122024-06-12 David Malcolm <dmalcolm@redhat.com>
5913
5914 PR bootstrap/115465
5915 * config/aarch64/aarch64-early-ra.cc (early_ra::process_block):
5916 Update for fields of pretty_printer becoming private in
5917 r15-1209-gc5e3be456888aa.
5918
59192024-06-12 Andrew Pinski <quic_apinski@quicinc.com>
5920
5921 PR target/115176
5922 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode><vczle><vczbe>): Use
5923 bitreverse instead of unspec.
5924 * config/aarch64/aarch64-sve-builtins-base.cc (svrbit): Convert over to using
5925 rtx_code_function instead of unspec_based_function.
5926 * config/aarch64/aarch64-sve.md: Update comment where RBIT is included.
5927 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Handle BITREVERSE like BSWAP.
5928 Remove UNSPEC_RBIT support.
5929 * config/aarch64/aarch64.md (unspec): Remove UNSPEC_RBIT.
5930 (aarch64_rbit<mode>): Use bitreverse instead of unspec.
5931 * config/aarch64/iterators.md (SVE_INT_UNARY): Add bitreverse.
5932 (optab): Likewise.
5933 (sve_int_op): Likewise.
5934 (SVE_INT_UNARY): Remove UNSPEC_RBIT.
5935 (optab): Likewise.
5936 (sve_int_op): Likewise.
5937 (min_elem_bits): Likewise.
5938
59392024-06-12 Andrew Pinski <quic_apinski@quicinc.com>
5940
5941 PR tree-optimization/115449
5942 * gimple-match-head.cc (gimple_maybe_truncate): New declaration.
5943 (gimple_bitwise_equal_p): Match truncations that differ only
5944 in types with the same precision.
5945 (gimple_bitwise_inverted_equal_p): For matching after bit_not_with_nop
5946 call gimple_bitwise_equal_p.
5947 * match.pd (maybe_truncate): New match pattern.
5948
59492024-06-12 Victor Do Nascimento <victor.donascimento@arm.com>
5950
5951 PR tree-optimization/114061
5952 * tree-data-ref.cc (get_references_in_stmt): set
5953 `clobbers_memory' to false for __builtin_prefetch.
5954 * tree-vect-loop.cc (vect_transform_loop): Drop all
5955 __builtin_prefetch calls from loops.
5956
59572024-06-12 David Malcolm <dmalcolm@redhat.com>
5958
5959 * dumpfile.cc (dump_pretty_printer::emit_items): Update for
5960 changes to chunk_info.
5961 * pretty-print.cc (chunk_info::append_formatted_chunk): New, based
5962 on code in cp/error.cc's append_formatted_chunk.
5963 (chunk_info::pop_from_output_buffer): New, based on code in
5964 pp_output_formatted_text and dump_pretty_printer::emit_items.
5965 (on_begin_quote): Convert to...
5966 (chunk_info::on_begin_quote): ...this.
5967 (on_end_quote): Convert to...
5968 (chunk_info::on_end_quote): ...this.
5969 (pretty_printer::format): Update for chunk_info becoming a class
5970 and its fields gaining "m_" prefixes. Update for on_begin_quote
5971 and on_end_quote moving to chunk_info.
5972 (quoting_info::handle_phase_3): Update for changes to chunk_info.
5973 (pp_output_formatted_text): Likewise. Move cleanup code to
5974 chunk_info::pop_from_output_buffer.
5975 * pretty-print.h (class output_buffer): New forward decl.
5976 (class urlifier): New forward decl.
5977 (struct chunk_info): Convert to...
5978 (class chunk_info): ...this. Add friend class pretty_printer.
5979 (chunk_info::get_args): New accessor.
5980 (chunk_info::get_quoting_info): New accessor.
5981 (chunk_info::append_formatted_chunk): New decl.
5982 (chunk_info::pop_from_output_buffer): New decl.
5983 (chunk_info::on_begin_quote): New decl.
5984 (chunk_info::on_end_quote): New decl.
5985 (chunk_info::prev): Rename to...
5986 (chunk_info::m_prev): ...this.
5987 (chunk_info::args): Rename to...
5988 (chunk_info::m_args): ...this.
5989 (output_buffer::cur_chunk_array): Drop "struct" from decl.
5990
59912024-06-12 David Malcolm <dmalcolm@redhat.com>
5992
5993 * diagnostic.cc (diagnostic_context::urls_init): Update for fields
5994 of pretty_printer becoming private.
5995 (diagnostic_context::print_any_cwe): Likewise.
5996 (diagnostic_context::print_any_rules): Likewise.
5997 (diagnostic_context::print_option_information): Likewise.
5998 * diagnostic.h (diagnostic_format_decoder): Likewise.
5999 (diagnostic_prefixing_rule): Likewise, fixing typo.
6000 * digraph.cc (test_dump_to_dot): Likewise.
6001 * digraph.h (digraph<GraphTraits>::dump_dot_to_file): Likewise.
6002 * dumpfile.cc
6003 (dump_pretty_printer::emit_any_pending_textual_chunks): Likewise.
6004 * gimple-pretty-print.cc (print_gimple_stmt): Likewise.
6005 (print_gimple_expr): Likewise.
6006 (print_gimple_seq): Likewise.
6007 (dump_ssaname_info_to_file): Likewise.
6008 (gimple_dump_bb): Likewise.
6009 * graph.cc (print_graph_cfg): Likewise.
6010 (start_graph_dump): Likewise.
6011 * langhooks.cc (lhd_print_error_function): Likewise.
6012 * lto-wrapper.cc (print_lto_docs_link): Likewise.
6013 * pretty-print.cc (pp_set_real_maximum_length): Convert to...
6014 (pretty_printer::set_real_maximum_length): ...this.
6015 (pp_clear_state): Convert to...
6016 (pretty_printer::clear_state): ...this.
6017 (pp_wrap_text): Update for pp_remaining_character_count_for_line
6018 becoming a member function.
6019 (urlify_quoted_string): Update for fields of pretty_printer becoming
6020 private.
6021 (pp_format): Convert to...
6022 (pretty_printer::format): ...this. Reduce the scope of local
6023 variables "old_line_length" and "old_wrapping_mode" and make
6024 const. Reduce the scope of locals "args", "new_chunk_array",
6025 "curarg", "any_unnumbered", and "any_numbered".
6026 (pp_output_formatted_text): Update for fields of pretty_printer
6027 becoming private.
6028 (pp_flush): Likewise.
6029 (pp_really_flush): Likewise.
6030 (pp_set_line_maximum_length): Likewise.
6031 (pp_set_prefix): Convert to...
6032 (pretty_printer::set_prefix): ...this.
6033 (pp_take_prefix): Update for fields of pretty_printer gaining
6034 "m_" prefixes.
6035 (pp_destroy_prefix): Likewise.
6036 (pp_emit_prefix): Convert to...
6037 (pretty_printer::emit_prefix): ...this.
6038 (pretty_printer::pretty_printer): Update both ctors for fields
6039 gaining "m_" prefixes.
6040 (pretty_printer::~pretty_printer): Likewise for dtor.
6041 (pp_append_text): Update for pp_emit_prefix becoming
6042 pretty_printer::emit_prefix.
6043 (pp_remaining_character_count_for_line): Convert to...
6044 (pretty_printer::remaining_character_count_for_line): ...this.
6045 (pp_character): Update for above change.
6046 (pp_maybe_space): Convert to...
6047 (pretty_printer::maybe_space): ...this.
6048 (pp_begin_url): Convert to...
6049 (pretty_printer::begin_url): ...this.
6050 (get_end_url_string): Update for fields of pretty_printer
6051 becoming private.
6052 (pp_end_url): Convert to...
6053 (pretty_printer::end_url): ...this.
6054 (selftest::test_pretty_printer::test_pretty_printer): Update for
6055 fields of pretty_printer becoming private.
6056 (selftest::test_urls): Likewise.
6057 (selftest::test_null_urls): Likewise.
6058 (selftest::test_urlification): Likewise.
6059 * pretty-print.h (pp_line_cutoff): Convert from macro to inline
6060 function.
6061 (pp_prefixing_rule): Likewise.
6062 (pp_wrapping_mode): Likewise.
6063 (pp_format_decoder): Likewise.
6064 (pp_needs_newline): Likewise.
6065 (pp_indentation): Likewise.
6066 (pp_translate_identifiers): Likewise.
6067 (pp_show_color): Likewise.
6068 (pp_buffer): Likewise.
6069 (pp_get_prefix): Add forward decl to allow friend decl.
6070 (pp_take_prefix): Likewise.
6071 (pp_destroy_prefix): Likewise.
6072 (class pretty_printer): Fix typo in leading comment. Add
6073 "friend" decls for the various new accessor functions that were
6074 formerly macros and for pp_get_prefix, pp_take_prefix, and
6075 pp_destroy_prefix. Make all fields private.
6076 (pretty_printer::set_output_stream): New.
6077 (pretty_printer::set_prefix): New decl.
6078 (pretty_printer::emit_prefix): New decl.
6079 (pretty_printer::format): New decl.
6080 (pretty_printer::maybe_space): New decl.
6081 (pretty_printer::supports_urls_p): New.
6082 (pretty_printer::get_url_format): New.
6083 (pretty_printer::set_url_format): New.
6084 (pretty_printer::begin_url): New decl.
6085 (pretty_printer::end_url): New decl.
6086 (pretty_printer::set_verbatim_wrapping): New.
6087 (pretty_printer::set_padding): New.
6088 (pretty_printer::get_padding): New.
6089 (pretty_printer::clear_state): New decl.
6090 (pretty_printer::set_real_maximum_length): New decl.
6091 (pretty_printer::remaining_character_count_for_line): New decl.
6092 (pretty_printer::buffer): Rename to...
6093 (pretty_printer::m_buffer): ...this.
6094 (pretty_printer::prefix): Rename to...
6095 (pretty_printer::m_prefix): ...this;
6096 (pretty_printer::padding): Rename to...
6097 (pretty_printer::m_padding): ...this;
6098 (pretty_printer::maximum_length): Rename to...
6099 (pretty_printer::m_maximum_length): ...this;
6100 (pretty_printer::indent_skip): Rename to...
6101 (pretty_printer::m_indent_skip): ...this;
6102 (pretty_printer::wrapping): Rename to...
6103 (pretty_printer::m_wrapping): ...this;
6104 (pretty_printer::format_decoder): Rename to...
6105 (pretty_printer::m_format_decoder): ...this;
6106 (pretty_printer::emitted_prefix): Rename to...
6107 (pretty_printer::m_emitted_prefix): ...this;
6108 (pretty_printer::need_newline): Rename to...
6109 (pretty_printer::m_need_newline): ...this;
6110 (pretty_printer::translate_identifiers): Rename to...
6111 (pretty_printer::m_translate_identifiers): ...this;
6112 (pretty_printer::show_color): Rename to...
6113 (pretty_printer::m_show_color): ...this;
6114 (pretty_printer::url_format): Rename to...
6115 (pretty_printer::m_url_format): ...this;
6116 (pp_get_prefix): Reformat.
6117 (pp_format_postprocessor): New inline function.
6118 (pp_take_prefix): Move decl to before class pretty_printer.
6119 (pp_destroy_prefix): Likewise.
6120 (pp_set_prefix): Convert to inline function.
6121 (pp_emit_prefix): Convert to inline function.
6122 (pp_format): Convert to inline function.
6123 (pp_maybe_space): Convert to inline function.
6124 (pp_begin_url): Convert to inline function.
6125 (pp_end_url): Convert to inline function.
6126 (pp_set_verbatim_wrapping): Convert from macro to inline
6127 function, renaming...
6128 (pp_set_verbatim_wrapping_): ...this.
6129 * print-rtl.cc (dump_value_slim): Update for fields of
6130 pretty_printer becoming private.
6131 (dump_insn_slim): Likewise.
6132 (dump_rtl_slim): Likewise.
6133 * print-tree.cc (print_node): Likewise.
6134 * sched-rgn.cc (dump_rgn_dependencies_dot): Likewise.
6135 * text-art/canvas.cc (canvas::print_to_pp): Likewise.
6136 (canvas::debug): Likewise.
6137 (selftest::test_canvas_urls): Likewise.
6138 * text-art/dump.h (dump_to_file): Likewise.
6139 * text-art/selftests.cc (selftest::assert_canvas_streq): Likewise.
6140 * text-art/style.cc (style::print_changes): Likewise.
6141 * text-art/styled-string.cc (styled_string::from_fmt_va):
6142 Likewise.
6143 * tree-diagnostic-path.cc (control_flow_tests): Update for
6144 pp_show_color becoming an inline function.
6145 * tree-loop-distribution.cc (dot_rdg_1): Update for fields of
6146 pretty_printer becoming private.
6147 * tree-pretty-print.cc (maybe_init_pretty_print): Likewise.
6148 * value-range.cc (vrange::dump): Likewise.
6149 (irange_bitmask::dump): Likewise.
6150
61512024-06-12 David Malcolm <dmalcolm@redhat.com>
6152
6153 * gimple-pretty-print.cc: Rename pretty_printer "buffer" to "pp"
6154 throughout.
6155 * print-tree.cc (print_node): Likewise.
6156 * tree-loop-distribution.cc (dot_rdg_1): Likewise.
6157 * tree-pretty-print.h (dump_location): Likewise.
6158 * value-range.cc (vrange::dump): Likewise.
6159 (irange_bitmask::dump): Likewise.
6160
61612024-06-12 Xi Ruoyao <xry111@xry111.site>
6162
6163 * config/loongarch/predicates.md (high_bitmask_operand): New
6164 predicate.
6165 * config/loongarch/constraints.md (Yy): New constriant.
6166 * config/loongarch/loongarch.md (and<mode>3_align): New
6167 define_insn_and_split.
6168
61692024-06-12 Xi Ruoyao <xry111@xry111.site>
6170
6171 * config/loongarch/loongarch.cc
6172 (loongarch_expand_conditional_move): Compare mode size with
6173 UNITS_PER_WORD instead of word_mode.
6174
61752024-06-12 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
6176 Yvan ROUX <yvan.roux@foss.st.com>
6177
6178 PR target/115253
6179 * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
6180 Sign extend for Thumb1.
6181 (thumb1_expand_prologue): Add zero/sign extend.
6182
61832024-06-12 Gerald Pfeifer <gerald@pfeifer.com>
6184
6185 PR target/69374
6186 * doc/install.texi (Specific) <*-*-cygwin>: Update web link.
6187
61882024-06-12 Pan Li <pan2.li@intel.com>
6189
6190 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
6191 Leverage gsi_after_labels instead of gsi_start_bb to skip the
6192 leading labels of bb.
6193
61942024-06-12 Gerald Pfeifer <gerald@pfeifer.com>
6195
6196 PR target/69374
6197 * doc/install.texi (Specific) <*-*-linux-gnu>: Do not list
6198 glibc 2.1 and binutils 2.12 as minimum dependencies.
6199
62002024-06-12 Alexandre Oliva <oliva@adacore.com>
6201
6202 PR tree-optimization/113681
6203 * tree-profile.cc (pass_ipa_tree_profile::gate): Skip if
6204 seen_errors.
6205
62062024-06-12 liuhongt <hongtao.liu@intel.com>
6207
6208 PR target/115384
6209 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
6210 Only do the simplification of (AND (ASHIFTRT A imm) mask)
6211 to (LSHIFTRT A imm) when the component of const_vector is
6212 CONST_INT_P.
6213
62142024-06-11 Joseph Myers <josmyers@redhat.com>
6215
6216 * doc/cpp.texi (__STDC_VERSION__): Document C2Y handling.
6217 * doc/invoke.texi (-Wc23-c2y-compat, -std=c2y, -std=gnu2y):
6218 Document options.
6219 (-std=gnu23): Update documentation.
6220 * doc/standards.texi (C Language): Document C2Y. Update C23
6221 description.
6222 * config/rl78/rl78.cc (rl78_option_override): Handle "GNU C2Y"
6223 language name.
6224 * dwarf2out.cc (highest_c_language, gen_compile_unit_die):
6225 Likewise.
6226
62272024-06-11 Gerald Pfeifer <gerald@pfeifer.com>
6228
6229 PR target/69374
6230 * doc/install.texi (Specific) <x86_64-*-solaris2*>: Remove
6231 redundant introduction of x86-64.
6232
62332024-06-11 Robin Dapp <rdapp@ventanamicro.com>
6234
6235 PR tree-optimization/115382
6236 * tree-vect-loop.cc (vectorize_fold_left_reduction): Use
6237 prepare_vec_mask.
6238 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
6239 Remove static of prepare_vec_mask.
6240 * tree-vectorizer.h (prepare_vec_mask): Export.
6241
62422024-06-11 Patrick O'Neill <patrick@rivosinc.com>
6243
6244 * config/riscv/sync.md (atomic_<atomic_optab><mode>): New expand pattern.
6245 (amo_atomic_<atomic_optab><mode>): Rename amo pattern.
6246 (atomic_fetch_<atomic_optab><mode>): New lrsc sequence pattern.
6247 (lrsc_atomic_<atomic_optab><mode>): New expand pattern.
6248 (amo_atomic_fetch_<atomic_optab><mode>): Rename amo pattern.
6249 (lrsc_atomic_fetch_<atomic_optab><mode>): New lrsc sequence pattern.
6250 (atomic_exchange<mode>): New expand pattern.
6251 (amo_atomic_exchange<mode>): Rename amo pattern.
6252 (lrsc_atomic_exchange<mode>): New lrsc sequence pattern.
6253
62542024-06-11 Patrick O'Neill <patrick@rivosinc.com>
6255
6256 * doc/sourcebuild.texi: Add docs for atomic extension testsuite infra.
6257
62582024-06-11 Edwin Lu <ewlu@rivosinc.com>
6259 Patrick O'Neill <patrick@rivosinc.com>
6260
6261 * common/config/riscv/riscv-common.cc: Add Zaamo and Zalrsc.
6262 * config/riscv/arch-canonicalize: Make A imply Zaamo and Zalrsc.
6263 * config/riscv/riscv.opt: Add Zaamo and Zalrsc
6264 * config/riscv/sync.md: Convert TARGET_ATOMIC to TARGET_ZAAMO and
6265 TARGET_ZALRSC.
6266
62672024-06-11 Uros Bizjak <ubizjak@gmail.com>
6268
6269 PR target/112600
6270 * config/i386/i386.md (usadd<mode>3): Emit insn sequence
6271 involving conditional move for TARGET_CMOVE targets.
6272 (ussub<mode>3): Ditto.
6273
62742024-06-11 Pengxuan Zheng <quic_pzheng@quicinc.com>
6275
6276 * config/aarch64/aarch64-builtins.cc (VAR1): Remap float_truncate_lo_
6277 builtin codes to standard optab ones.
6278 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_<mode><vczle><vczbe>):
6279 Rename to...
6280 (trunc<Vwide><mode>2<vczle><vczbe>): ... This.
6281
62822024-06-11 Andi Kleen <ak@linux.intel.com>
6283
6284 * doc/extend.texi: Document constexpr asm.
6285
62862024-06-11 Andrew MacLeod <amacleod@redhat.com>
6287
6288 * gimple-range-fold.cc (range_of_ssa_name_with_loop_info): Issue a
6289 message if SCEV is not invoked due to a mismatch.
6290
62912024-06-11 Roger Sayle <roger@nextmovesoftware.com>
6292
6293 PR target/115397
6294 * config/i386/i386-expand.cc (ix86_expand_ternlog): Move call to
6295 ix86_broadcast_from_constant before call to validize_mem, but after
6296 call to force_const_mem.
6297
62982024-06-11 Pan Li <pan2.li@intel.com>
6299
6300 * config/riscv/autovec.md (ussub<mode>3): Add new pattern impl
6301 for the unsigned vector modes.
6302 * config/riscv/riscv-protos.h (expand_vec_ussub): Add new func
6303 decl to expand .SAT_SUB for vector mode.
6304 * config/riscv/riscv-v.cc (emit_vec_saddu): Add new func impl
6305 to expand .SAT_SUB for vector mode.
6306 (emit_vec_binary_alu): Add new helper func to emit binary alu.
6307 (expand_vec_ussub): Leverage above helper func.
6308
63092024-06-10 Gerald Pfeifer <gerald@pfeifer.com>
6310
6311 * doc/gm2.texi (Documentation): Fix typos, grammar, and a link.
6312
63132024-06-10 Andrew MacLeod <amacleod@redhat.com>
6314
6315 * gimple-array-bounds.cc (array_bounds_checker::array_bounds_checker):
6316 Always use current range_query.
6317 (pass_data_array_bounds): New.
6318 (pass_array_bounds): New.
6319 (make_pass_array_bounds): New.
6320 * gimple-array-bounds.h (array_bounds_checker): Adjust prototype.
6321 * passes.def (pass_array_bounds): New. Add after VRP1.
6322 * timevar.def (TV_TREE_ARRAY_BOUNDS): New timevar.
6323 * tree-pass.h (make_pass_array_bounds): Add prototype.
6324 * tree-vrp.cc (execute_ranger_vrp): Remove warning param and do
6325 not invoke array bounds warning pass.
6326 (pass_vrp::pass_vrp): Adjust params.
6327 (pass_vrp::close): Adjust parameters.
6328 (pass_vrp::warn_array_bounds_p): Remove.
6329 (make_pass_vrp): Remove warning param.
6330 (make_pass_early_vrp): Remove warning param.
6331 (make_pass_fast_vrp): Remove warning param.
6332
63332024-06-10 Raphael Zinsly <rzinsly@ventanamicro.com>
6334
6335 * config/riscv/bitmanip.md (*bextdisi): New pattern.
6336
63372024-06-10 Pan Li <pan2.li@intel.com>
6338
6339 PR target/115387
6340 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children): Take
6341 the gsi of start_bb instead of last_bb.
6342
63432024-06-10 Raphael Zinsly <rzinsly@ventanamicro.com>
6344
6345 * config/riscv/bitmanip.md (*bextdisi): New pattern.
6346
63472024-06-10 Richard Biener <rguenther@suse.de>
6348
6349 PR tree-optimization/115388
6350 * tree-ssa-dse.cc (dse_classify_store): Handle irreducible
6351 regions.
6352 (pass_dse::execute): Make sure to mark backedges.
6353
63542024-06-10 Richard Biener <rguenther@suse.de>
6355
6356 PR tree-optimization/115395
6357 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
6358 Handle STMT_VINFO_REDUC_EPILOGUE_ADJUSTMENT also for SLP
6359 reductions of group_size one.
6360
63612024-06-10 Andreas Krebbel <krebbel@linux.ibm.com>
6362
6363 * config/s390/s390.cc (expand_perm_as_replicate): Handle memory
6364 operands.
6365 * config/s390/vx-builtins.md (vec_splats<mode>): Turn into parameterized expander.
6366 (@vec_splats<mode>): New expander.
6367
63682024-06-10 Richard Biener <rguenther@suse.de>
6369
6370 PR tree-optimization/115383
6371 * tree-vect-stmts.cc (vectorizable_condition): Handle
6372 generating a chain of .FOLD_EXTRACT_LAST.
6373
63742024-06-09 Andreas Tobler <andreast@gcc.gnu.org>
6375
6376 * config/freebsd-spec.h: Change fbsd-lib-spec for FreeBSD > 13,
6377 do not link against profiled system libraries if -pg is invoked.
6378 Add a define to note about this change.
6379 * config/aarch64/aarch64-freebsd.h: Use the note to inform if
6380 -pg is invoked on FreeBSD > 13.
6381 * config/arm/freebsd.h: Likewise.
6382 * config/i386/freebsd.h: Likewise.
6383 * config/i386/freebsd64.h: Likewise.
6384 * config/riscv/freebsd.h: Likewise.
6385 * config/rs6000/freebsd64.h: Likewise.
6386 * config/rs6000/sysv4.h: Likeise.
6387
63882024-06-09 Jeff Law <jlaw@ventanamicro.com>
6389
6390 * config/riscv/riscv.cc (riscv_move_integer): Initialize "x".
6391
63922024-06-09 Uros Bizjak <ubizjak@gmail.com>
6393
6394 PR target/112600
6395 * config/i386/i386.md (ussub<mode>3): New expander.
6396 (sub<mode>_3): Ditto.
6397
63982024-06-09 Gerald Pfeifer <gerald@pfeifer.com>
6399
6400 * doc/install.texi (avr): Remove link to www.amelek.gda.pl/avr/.
6401
64022024-06-09 Roger Sayle <roger@nextmovesoftware.com>
6403
6404 * expmed.cc (expand_shift_1): Use add_optab instead of ior_optab
6405 to generate PLUS instead or IOR when unioning disjoint bitfields.
6406 * optabs.cc (expand_subword_shift): Likewise.
6407 (expand_binop): Likewise for double-word rotate.
6408
64092024-06-08 Peter Bergner <bergner@linux.ibm.com>
6410
6411 * config/rs6000/rs6000-logue.cc (rs6000_stack_info): Update comment.
6412
64132024-06-08 Uros Bizjak <ubizjak@gmail.com>
6414
6415 PR target/112600
6416 * config/i386/i386.md (usadd<mode>3): New expander.
6417 (x86_mov<mode>cc_0_m1_neg): Use SWI mode iterator.
6418
64192024-06-08 Pan Li <pan2.li@intel.com>
6420
6421 * config/riscv/riscv-protos.h (riscv_expand_ussub): Add new func
6422 decl for ussub expanding.
6423 * config/riscv/riscv.cc (riscv_expand_ussub): Ditto but for impl.
6424 * config/riscv/riscv.md (ussub<mode>3): Add new pattern ussub
6425 for scalar modes.
6426
64272024-06-07 David Malcolm <dmalcolm@redhat.com>
6428
6429 * doc/invoke.texi: Add -Wanalyzer-undefined-behavior-ptrdiff.
6430
64312024-06-07 Jason Merrill <jason@redhat.com>
6432
6433 * doc/invoke.texi (C++ Modules): Mention -include.
6434
64352024-06-07 Roger Sayle <roger@nextmovesoftware.com>
6436
6437 PR target/115351
6438 * config/i386/i386.cc (ix86_rtx_costs): Provide estimates for
6439 the *concatditi3 and *insvti_highpart patterns, about two insns.
6440
64412024-06-07 Roger Sayle <roger@nextmovesoftware.com>
6442 Hongtao Liu <hongtao.liu@intel.com>
6443
6444 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Call
6445 fixup_modeless_constant before testing predicates. Only call
6446 copy_to_mode_reg on memory operands (after the first one).
6447 (ix86_gen_bcst_mem): Helper function to convert a CONST_VECTOR
6448 into a VEC_DUPLICATE if possible.
6449 (ix86_ternlog_idx): Convert an RTX expression into a ternlog
6450 index between 0 and 255, recording the operands in ARGS, if
6451 possible or return -1 if this is not possible/valid.
6452 (ix86_ternlog_leaf_p): Helper function to identify "leaves"
6453 of a ternlog expression, e.g. REG_P, MEM_P, CONST_VECTOR, etc.
6454 (ix86_ternlog_operand_p): Test whether a expression is suitable
6455 for and prefered as an UNSPEC_TERNLOG.
6456 (ix86_expand_ternlog_binop): Helper function to construct the
6457 binary operation corresponding to a sufficiently simple ternlog.
6458 (ix86_expand_ternlog_andnot): Helper function to construct a
6459 ANDN operation corresponding to a sufficiently simple ternlog.
6460 (ix86_expand_ternlog): Expand a 3-operand ternary logic
6461 expression, constructing either an UNSPEC_TERNLOG or simpler
6462 rtx expression. Called from builtin expanders and pre-reload
6463 splitters.
6464 * config/i386/i386-protos.h (ix86_ternlog_idx): Prototype here.
6465 (ix86_ternlog_operand_p): Likewise.
6466 (ix86_expand_ternlog): Likewise.
6467 * config/i386/predicates.md (ternlog_operand): New predicate
6468 that calls xi86_ternlog_operand_p.
6469 * config/i386/sse.md (<avx512>_vpternlog<mode>_0): New
6470 define_insn_and_split that recognizes a SET_SRC of ternlog_operand
6471 and expands it via ix86_expand_ternlog pre-reload.
6472 (<avx512>_vternlog<mode>_mask): Convert from define_insn to
6473 define_expand. Use ix86_expand_ternlog if the mask operand is
6474 ~0 (or 255 or -1).
6475 (*<avx512>_vternlog<mode>_mask): define_insn renamed from above.
6476
64772024-06-07 Michal Jires <mjires@suse.cz>
6478
6479 * common.opt: Add cache partitioning.
6480 * flag-types.h (enum lto_partition_model): Likewise.
6481
64822024-06-07 Richard Biener <rguenther@suse.de>
6483
6484 * tree-vect-loop.cc (vectorize_fold_left_reduction): Fix
6485 mask vector operand indexing.
6486
64872024-06-07 Jakub Jelinek <jakub@redhat.com>
6488
6489 PR middle-end/115352
6490 * gimple-lower-bitint.cc (lower_addsub_overflow): Don't disable
6491 single_comparison if cmp_code is GE_EXPR.
6492
64932024-06-07 Alexandre Oliva <oliva@adacore.com>
6494
6495 * target.def (call_offset_return_label): New hook.
6496 * doc/tm.texi.in (TARGET_CALL_OFFSET_RETURN_LABEL): Add
6497 placeholder.
6498 * doc/tm.texi: Rebuild.
6499 * dwarf2out.cc (struct call_arg_loc_node): Record call_insn
6500 instead of call_arg_loc_note.
6501 (add_AT_lbl_id): Add optional offset argument.
6502 (gen_call_site_die): Compute and pass on a return pc offset.
6503 (gen_subprogram_die): Move call_arg_loc_note computation...
6504 (dwarf2out_var_location): ... from here. Set call_insn.
6505
65062024-06-06 Pan Li <pan2.li@intel.com>
6507
6508 * doc/match-and-simplify.texi: Add doc for the matching flag '^'.
6509 * genmatch.cc (cmp_operand): Add match_phi comparation.
6510 (dt_node::gen_kids_1): Add cond_expr bool flag for phi match.
6511 (dt_operand::gen_phi_on_cond): Add new func to gen phi matching
6512 on cond_expr.
6513 (parser::parse_expr): Add handling for the expr flag '^'.
6514 * match.pd: Add more form for unsigned .SAT_ADD.
6515 * tree-ssa-math-opts.cc (build_saturation_binary_arith_call): Add
6516 new func impl to build call for phi gimple.
6517 (match_unsigned_saturation_add): Add new func impl to match the
6518 .SAT_ADD for phi gimple.
6519 (math_opts_dom_walker::after_dom_children): Add phi matching
6520 try for all gimple phi stmt.
6521
65222024-06-06 Pengxuan Zheng <quic_pzheng@quicinc.com>
6523
6524 PR target/113880
6525 PR target/113869
6526 * config/aarch64/aarch64-builtins.cc (VAR1): Remap float_extend_lo_
6527 builtin codes to standard optab ones.
6528 * config/aarch64/aarch64-simd.md (aarch64_float_extend_lo_<Vwide>): Rename
6529 to...
6530 (extend<mode><Vwide>2): ... This.
6531
65322024-06-06 Andrew Pinski <quic_apinski@quicinc.com>
6533
6534 PR plugins/115288
6535 * Makefile.in (CPPLIB_H): Add label-text.h.
6536
65372024-06-06 Richard Ball <richard.ball@arm.com>
6538
6539 * config/aarch64/aarch64-c.cc (aarch64_define_unconditional_macros):
6540 Add missing __ARM_NEON_SVE_BRIDGE.
6541
65422024-06-06 Richard Ball <richard.ball@arm.com>
6543
6544 PR target/115353
6545 * config/arm/arm.h (enum arm_auto_incmodes):
6546 Correct CASE_VECTOR_SHORTEN_MODE query.
6547
65482024-06-06 Tamar Christina <tamar.christina@arm.com>
6549
6550 * config/aarch64/aarch64-sve.md (@aarch64_pred_cmp<cmp_op><mode>,
6551 *cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest,
6552 @aarch64_pred_cmp<cmp_op><mode>_wide,
6553 *aarch64_pred_cmp<cmp_op><mode>_wide_cc,
6554 *aarch64_pred_cmp<cmp_op><mode>_wide_ptest): Fix Upl tie alternative.
6555 * config/aarch64/aarch64-sve2.md (@aarch64_pred_<sve_int_op><mode>): Fix
6556 Upl tie alternative.
6557
65582024-06-06 Thomas Schwinge <tschwinge@baylibre.com>
6559
6560 * config/nvptx/nvptx.md (nvptx_uniform_warp_check): Make fit for
6561 non-full-warp execution, via 'vote.all.pred'.
6562
65632024-06-06 Pan Li <pan2.li@intel.com>
6564
6565 * match.pd: Add new form for vector mode recog.
6566 * tree-vect-patterns.cc (gimple_unsigned_integer_sat_sub): Add
6567 new match func decl;
6568 (vect_recog_build_binary_gimple_call): Extract helper func to
6569 build gcall with given internal_fn.
6570 (vect_recog_sat_sub_pattern): Add new func impl to recog .SAT_SUB.
6571
65722024-06-06 Michal Jires <mjires@suse.cz>
6573
6574 * lto-streamer.cc (lto_get_section_name): Remove suffixes after WPA.
6575
65762024-06-06 Michal Jires <mjires@suse.cz>
6577
6578 * lto-opts.cc (lto_write_options): Skip OPT_fltrans_output_list_.
6579
65802024-06-06 Robin Dapp <rdapp@ventanamicro.com>
6581
6582 * config/riscv/riscv.opt.urls: Regenerate.
6583
65842024-06-06 Hongyu Wang <hongyu.wang@intel.com>
6585
6586 * config/i386/i386-expand.cc (ix86_gen_ccmp_first):
6587 Add fp compare and check the allowed fp compare type.
6588 (ix86_gen_ccmp_next): Adjust compare_code input to ccmp for
6589 fp compare.
6590
65912024-06-06 Hongyu Wang <hongyu.wang@intel.com>
6592
6593 * ccmp.cc (expand_ccmp_expr_1): Check ret and ret2 of
6594 expand_ccmp_next, returns the valid one first instead of
6595 comparing cost.
6596
65972024-06-06 Hongyu Wang <hongyu.wang@intel.com>
6598
6599 * config/i386/i386-expand.cc (ix86_gen_ccmp_first): New function
6600 that test if the first compare can be generated.
6601 (ix86_gen_ccmp_next): New function to emit a simgle compare and ccmp
6602 sequence.
6603 * config/i386/i386-opts.h (enum apx_features): Add apx_ccmp.
6604 * config/i386/i386-protos.h (ix86_gen_ccmp_first): New proto
6605 declare.
6606 (ix86_gen_ccmp_next): Likewise.
6607 (ix86_get_flags_cc): Likewise.
6608 * config/i386/i386.cc (ix86_flags_cc): New enum.
6609 (ix86_ccmp_dfv_mapping): New string array to map conditional
6610 code to dfv.
6611 (ix86_print_operand): Handle special dfv flag for CCMP.
6612 (ix86_get_flags_cc): New function to return x86 CC enum.
6613 (TARGET_GEN_CCMP_FIRST): Define.
6614 (TARGET_GEN_CCMP_NEXT): Likewise.
6615 * config/i386/i386.h (TARGET_APX_CCMP): Define.
6616 * config/i386/i386.md (@ccmp<mode>): New define_insn to support
6617 ccmp.
6618 (UNSPEC_APX_DFV): New unspec for ccmp dfv.
6619 (ALL_CC): New mode iterator.
6620 (cstorecc4): Change to ...
6621 (cstore<mode>4) ... this, use ALL_CC to loop through all
6622 available CCmodes.
6623 * config/i386/i386.opt (apx_ccmp): Add enum value for ccmp.
6624
66252024-06-06 Richard Biener <rguenther@suse.de>
6626
6627 * tree-vect-loop.cc (vectorizable_reduction): Allow
6628 single-lane SLP in-order reductions.
6629 (vectorize_fold_left_reduction): Handle SLP reduction with
6630 conditional reduction op.
6631
66322024-06-06 Richard Biener <rguenther@suse.de>
6633
6634 * tree-vect-loop.cc (vect_analyze_scalar_cycles_1): Queue
6635 double reductions in LOOP_VINFO_REDUCTIONS.
6636 (vect_create_epilog_for_reduction): Remove asserts disabling
6637 SLP for double reductions.
6638 (vectorizable_reduction): Analyze SLP double reductions
6639 only once and start off the correct places.
6640 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Allow
6641 vect_double_reduction_def.
6642 (vect_build_slp_tree_2): Fix condition for the ignored
6643 reduction initial values.
6644 * tree-vect-stmts.cc (vect_analyze_stmt): Allow
6645 vect_double_reduction_def.
6646
66472024-06-06 Richard Biener <rguenther@suse.de>
6648
6649 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
6650 Adjust for single-lane COND_REDUCTION SLP vectorization.
6651 (vectorizable_reduction): Likewise.
6652 (vect_transform_cycle_phi): Likewise.
6653
66542024-06-06 Richard Biener <rguenther@suse.de>
6655
6656 * tree-vect-stmts.cc (vectorizable_condition): Allow
6657 single-lane SLP, but not when we need to swap then and
6658 else clause.
6659
66602024-06-06 YunQiang Su <syq@gcc.gnu.org>
6661
6662 * config/mips/mips.cc(mips_insn_cost): Add missing COSTS_N_INSNS
6663 to count.
6664
66652024-06-06 liuhongt <hongtao.liu@intel.com>
6666
6667 PR target/114428
6668 * config/i386/i386.cc (ix86_rtx_costs): Adjust cost for
6669 CONST_VECTOR_DUPLICATE_P in constant_pool.
6670 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
6671 Remove static.
6672 * config/i386/i386-protos.h (ix86_broadcast_from_constant):
6673 Declare.
6674
66752024-06-06 liuhongt <hongtao.liu@intel.com>
6676
6677 PR target/114428
6678 * simplify-rtx.cc
6679 (simplify_context::simplify_binary_operation_1):
6680 Simplify (AND (ASHIFTRT A imm) mask) to (LSHIFTRT A imm) for
6681 specific mask.
6682
66832024-06-05 Robin Dapp <rdapp.gcc@gmail.com>
6684
6685 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
6686 Move from here...
6687 * config/riscv/riscv.h (TARGET_VECTOR_MISALIGN_SUPPORTED):
6688 ...to here and map to riscv_vector_unaligned_access_p.
6689 * config/riscv/riscv.opt: Add -mvector-strict-align.
6690 * config/riscv/riscv.cc (struct riscv_tune_param): Add
6691 vector_unaligned_access.
6692 (riscv_override_options_internal): Set
6693 riscv_vector_unaligned_access_p.
6694 * doc/invoke.texi: Document -mvector-strict-align.
6695
66962024-06-05 Tamar Christina <tamar.christina@arm.com>
6697
6698 * config/aarch64/tuning_models/neoversen2.h (neoversen2_tunings): Add
6699 AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.
6700 * config/aarch64/tuning_models/neoversev1.h (neoversev1_tunings): Add
6701 AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.
6702 * config/aarch64/tuning_models/neoversev2.h (neoversev2_tunings): Add
6703 AARCH64_EXTRA_TUNE_AVOID_PRED_RMW.
6704
67052024-06-05 Tamar Christina <tamar.christina@arm.com>
6706
6707 * config/aarch64/aarch64-sve.md (and<mode>3,
6708 @aarch64_pred_<optab><mode>_z, *<optab><mode>3_cc,
6709 *<optab><mode>3_ptest, aarch64_pred_<nlogical><mode>_z,
6710 *<nlogical><mode>3_cc, *<nlogical><mode>3_ptest,
6711 aarch64_pred_<logical_nn><mode>_z, *<logical_nn><mode>3_cc,
6712 *<logical_nn><mode>3_ptest, @aarch64_pred_cmp<cmp_op><mode>,
6713 *cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest,
6714 @aarch64_pred_cmp<cmp_op><mode>_wide,
6715 *aarch64_pred_cmp<cmp_op><mode>_wide_cc,
6716 *aarch64_pred_cmp<cmp_op><mode>_wide_ptest, @aarch64_brk<brk_op>,
6717 *aarch64_brk<brk_op>_cc, *aarch64_brk<brk_op>_ptest,
6718 @aarch64_brk<brk_op>, *aarch64_brk<brk_op>_cc,
6719 *aarch64_brk<brk_op>_ptest, aarch64_rdffr_z, *aarch64_rdffr_z_ptest,
6720 *aarch64_rdffr_ptest, *aarch64_rdffr_z_cc, *aarch64_rdffr_cc): Add
6721 new early clobber
6722 alternative.
6723 * config/aarch64/aarch64-sve2.md
6724 (@aarch64_pred_<sve_int_op><mode>): Likewise.
6725
67262024-06-05 Tamar Christina <tamar.christina@arm.com>
6727
6728 * config/aarch64/aarch64-tuning-flags.def
6729 (AVOID_PRED_RMW): New.
6730 * config/aarch64/aarch64.h (TARGET_SVE_PRED_CLOBBER): New.
6731 * config/aarch64/aarch64.md (pred_clobber): New.
6732 (arch_enabled): Use it.
6733
67342024-06-05 Tamar Christina <tamar.christina@arm.com>
6735
6736 * config/aarch64/aarch64-sve.md (and<mode>3,
6737 @aarch64_pred_<optab><mode>_z, *<optab><mode>3_cc,
6738 *<optab><mode>3_ptest, aarch64_pred_<nlogical><mode>_z,
6739 *<nlogical><mode>3_cc, *<nlogical><mode>3_ptest,
6740 aarch64_pred_<logical_nn><mode>_z, *<logical_nn><mode>3_cc,
6741 *<logical_nn><mode>3_ptest, *cmp<cmp_op><mode>_ptest,
6742 @aarch64_pred_cmp<cmp_op><mode>_wide,
6743 *aarch64_pred_cmp<cmp_op><mode>_wide_cc,
6744 *aarch64_pred_cmp<cmp_op><mode>_wide_ptest, *aarch64_brk<brk_op>_cc,
6745 *aarch64_brk<brk_op>_ptest, @aarch64_brk<brk_op>,
6746 *aarch64_brk<brk_op>_cc, *aarch64_brk<brk_op>_ptest, aarch64_rdffr_z,
6747 *aarch64_rdffr_z_ptest, *aarch64_rdffr_ptest, *aarch64_rdffr_z_cc,
6748 *aarch64_rdffr_cc): Convert to compact syntax.
6749 * config/aarch64/aarch64-sve2.md
6750 (@aarch64_pred_<sve_int_op><mode>): Likewise.
6751
67522024-06-05 Jakub Jelinek <jakub@redhat.com>
6753 Frederik Harwath <frederik@codesourcery.com>
6754 Sandra Loosemore <sandra@codesourcery.com>
6755
6756 * tree.def (OMP_TILE, OMP_UNROLL): New tree codes.
6757 * tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_PARTIAL,
6758 OMP_CLAUSE_FULL and OMP_CLAUSE_SIZES.
6759 * tree.h (OMP_LOOPXFORM_CHECK): Define.
6760 (OMP_LOOPXFORM_LOWERED): Define.
6761 (OMP_CLAUSE_PARTIAL_EXPR): Define.
6762 (OMP_CLAUSE_SIZES_LIST): Define.
6763 * tree.cc (omp_clause_num_ops, omp_clause_code_name): Add entries
6764 for OMP_CLAUSE_{PARTIAL,FULL,SIZES}.
6765 * tree-pretty-print.cc (dump_omp_clause): Handle
6766 OMP_CLAUSE_{PARTIAL,FULL,SIZES}.
6767 (dump_generic_node): Handle OMP_TILE and OMP_UNROLL. Skip printing
6768 loops with NULL OMP_FOR_INIT (node) vector element.
6769 * gimplify.cc (is_gimple_stmt): Handle OMP_TILE and OMP_UNROLL.
6770 (gimplify_omp_taskloop_expr): For SAVE_EXPR use gimplify_save_expr.
6771 (gimplify_omp_loop_xform): New function.
6772 (gimplify_omp_for): Call omp_maybe_apply_loop_xforms and if that
6773 reshuffles what the passed pointer points to, retry or return GS_OK.
6774 Handle OMP_TILE and OMP_UNROLL.
6775 (gimplify_omp_loop): Call omp_maybe_apply_loop_xforms and if that
6776 reshuffles what the passed pointer points to, return GS_OK.
6777 (gimplify_expr): Handle OMP_TILE and OMP_UNROLL.
6778 * omp-general.h (omp_loop_number_of_iterations,
6779 omp_maybe_apply_loop_xforms): Declare.
6780 * omp-general.cc (omp_adjust_for_condition): For LE_EXPR and GE_EXPR
6781 with pointers, don't add/subtract one, but the size of what the
6782 pointer points to.
6783 (omp_loop_number_of_iterations, omp_apply_tile,
6784 find_nested_loop_xform, omp_maybe_apply_loop_xforms): New functions.
6785
67862024-06-05 Kewen Lin <linkw@linux.ibm.com>
6787
6788 * config/darwin.cc (darwin_patch_builtins): Use TYPE_PRECISION of
6789 long_double_type_node to replace LONG_DOUBLE_TYPE_SIZE.
6790
67912024-06-05 Pan Li <pan2.li@intel.com>
6792
6793 PR target/51492
6794 PR target/112600
6795 * internal-fn.def (SAT_SUB): Add new IFN define for SAT_SUB.
6796 * match.pd: Add new match for SAT_SUB.
6797 * optabs.def (OPTAB_NL): Remove fixed-point for ussub/ssub.
6798 * tree-ssa-math-opts.cc (gimple_unsigned_integer_sat_sub): Add
6799 new decl for generated in match.pd.
6800 (build_saturation_binary_arith_call): Add new helper function
6801 to build the gimple call to binary SAT alu.
6802 (match_saturation_arith): Rename from.
6803 (match_unsigned_saturation_add): Rename to.
6804 (match_unsigned_saturation_sub): Add new func to match the
6805 unsigned sat sub.
6806 (math_opts_dom_walker::after_dom_children): Add SAT_SUB matching
6807 try when COND_EXPR.
6808
68092024-06-05 Gerald Pfeifer <gerald@pfeifer.com>
6810
6811 PR other/69374
6812 * doc/install.texi (Prerequisites): Drop reference to GNU awk
6813 version 3.1.5. Remove fluff.
6814
68152024-06-05 liuhongt <hongtao.liu@intel.com>
6816
6817 PR rtl-optimization/100927
6818 PR rtl-optimization/115161
6819 PR rtl-optimization/115115
6820 * simplify-rtx.cc (simplify_const_unary_operation): Prevent
6821 simplication of FIX/UNSIGNED_FIX for NAN/INF/out-of-range
6822 constant when flag_trapping_math.
6823 * fold-const.cc (fold_convert_const_int_from_real): Don't fold
6824 for overflow value when_trapping_math.
6825
68262024-06-05 Xiao Zeng <zengxiao@eswincomputing.com>
6827
6828 * config/riscv/iterators.md: Add mode_iterator between
6829 floating-point modes and BFmode.
6830 * config/riscv/riscv.cc (riscv_output_move): Handle BFmode move
6831 for zfbfmin.
6832 * config/riscv/riscv.md (trunc<mode>bf2): New pattern for BFmode.
6833 (extendbfsf2): Dotto.
6834 (*movhf_hardfloat): Add BFmode.
6835 (*mov<mode>_hardfloat): Dotto.
6836
68372024-06-04 Jakub Jelinek <jakub@redhat.com>
6838
6839 PR tree-optimization/115337
6840 * gimple-range-op.cc (cfn_clz::fold_range): For
6841 m_gimple_call_internal_p handle as a special case also second argument
6842 of -1 next to prec.
6843
68442024-06-04 Jakub Jelinek <jakub@redhat.com>
6845
6846 PR tree-optimization/115337
6847 * fold-const.cc (tree_call_nonnegative_warnv_p): Handle
6848 CASE_CFN_CTZ like CASE_CFN_CLZ.
6849
68502024-06-04 Jakub Jelinek <jakub@redhat.com>
6851
6852 * fold-const.cc (tree_call_nonnegative_warnv_p): Formatting fixes.
6853 (tree_invalid_nonnegative_warnv_p): Likewise.
6854 * gimple-fold.cc (gimple_call_nonnegative_warnv_p): Likewise.
6855
68562024-06-04 Jakub Jelinek <jakub@redhat.com>
6857
6858 PR tree-optimization/115337
6859 * fold-const.cc (tree_call_nonnegative_warnv_p) <CASE_CFN_CLZ>:
6860 If arg1 is non-NULL, RECURSE on it, otherwise return true.
6861
68622024-06-04 Jakub Jelinek <jakub@redhat.com>
6863
6864 PR middle-end/108789
6865 * builtins.cc (fold_builtin_arith_overflow): For ovf_only,
6866 don't call save_expr and don't build REALPART_EXPR, otherwise
6867 set TREE_SIDE_EFFECTS on call before calling save_expr.
6868 (fold_builtin_addc_subc): Set TREE_SIDE_EFFECTS on call before
6869 calling save_expr.
6870
68712024-06-04 Jakub Jelinek <jakub@redhat.com>
6872
6873 * doc/invoke.texi (lujiazui): Clarify that while the CPUs do support
6874 AVX and F16C, -march=lujiazui actually doesn't enable those.
6875
68762024-06-04 Richard Biener <rguenther@suse.de>
6877
6878 * tree-vect-slp.cc (vect_build_slp_tree_2): Only multi-lane
6879 discoveries are reduction chains and need special backedge
6880 treatment.
6881 (vect_analyze_slp): Fall back to single-lane SLP discovery
6882 for reductions. Make sure to try single-lane SLP reduction
6883 for all reductions as fallback.
6884 (vectorizable_load): Avoid outer loop SLP vectorization with
6885 multi-copy vector stmts in the inner loop.
6886 (vectorizable_store): Likewise.
6887 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Allow
6888 direct opcode and shift reduction also for SLP reductions
6889 with a single lane.
6890 * tree-vect-stmts.cc (get_group_load_store_type): For SLP also
6891 check for the PR65518 single-element interleaving case as done in
6892 vect_grouped_load_supported.
6893
68942024-06-04 Richard Biener <rguenther@suse.de>
6895
6896 * tree-vect-slp.cc (vect_schedule_slp_node): For mask/len
6897 loops make sure to not advance the insertion iterator
6898 beyond a GIMPLE_COND.
6899
69002024-06-03 Jakub Jelinek <jakub@redhat.com>
6901
6902 PR target/115324
6903 * config/rs6000/rs6000-gen-builtins.cc (write_decls): Remove
6904 GTY markup from struct bifdata and struct ovlddata and remove their
6905 fntype members. Change next member in struct ovlddata and
6906 first_instance member of struct ovldrecord to have int type rather
6907 than struct ovlddata *. Remove GTY markup from rs6000_builtin_info
6908 and rs6000_instance_info arrays, declare new
6909 rs6000_builtin_info_fntype and rs6000_instance_info_fntype arrays,
6910 which have GTY markup.
6911 (write_bif_static_init): Adjust for the above changes.
6912 (write_ovld_static_init): Likewise.
6913 (write_init_bif_table): Likewise.
6914 (write_init_ovld_table): Likewise.
6915 * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
6916 * config/rs6000/rs6000-c.cc (find_instance): Likewise. Make static.
6917 (altivec_resolve_overloaded_builtin): Adjust for the above changes.
6918
69192024-06-03 David Malcolm <dmalcolm@redhat.com>
6920
6921 * diagnostic-format-sarif.cc: Include "ordered-hash-map.h" and
6922 "sbitmap.h".
6923 (enum class diagnostic_artifact_role): New.
6924 (class sarif_artifact): New.
6925 (sarif_builder::maybe_make_artifact_content_object): Make public.
6926 (sarif_builder::m_filenames): Replace with...
6927 (sarif_builder::m_filename_to_artifact_map): ...this.
6928 (sarif_artifact::add_role): New.
6929 (sarif_artifact::populate_contents): New.
6930 (get_artifact_role_string): New.
6931 (sarif_artifact::populate_roles): New.
6932 (sarif_result::on_nested_diagnostic): Pass role to
6933 make_location_object.
6934 (sarif_ice_notification::sarif_ice_notification): Likewise.
6935 (sarif_builder::sarif_builder): Add "main_input_filename_" param.
6936 Mark it as the artifact that the tool was instructed to scan.
6937 (sarif_builder::make_result_object): Pass role to
6938 make_locations_arr.
6939 (sarif_builder::make_locations_arr): Add "role" param and pass it
6940 to make_location_object.
6941 (sarif_builder::make_location_object): Add "role" param and pass
6942 it to maybe_make_physical_location_object.
6943 (sarif_builder::maybe_make_physical_location_object): Add "role"
6944 param and pass it to call to get_or_create_artifact, rather than
6945 adding to now-removed "m_filenames". Flag the artifact for its
6946 contents to be embedded.
6947 (sarif_builder::make_thread_flow_location_object): Pass role to
6948 make_location_object.
6949 (sarif_builder::make_run_object): Update for change from
6950 m_filename to m_filename_to_artifact_map. Call populate_contents
6951 and populate_roles on each artifact_obj.
6952 (sarif_builder::make_artifact_object): Convert to...
6953 (sarif_builder::get_or_create_artifact): ...this, moving addition
6954 of contents to make_run_object, and conditionalizing setting of
6955 sourceLanguage on "role".
6956 (sarif_output_format::sarif_output_format): Add
6957 "main_input_filename_" param and pass to m_builder's ctor.
6958 (sarif_stream_output_format::sarif_stream_output_format):
6959 Likewise.
6960 (sarif_file_output_format::sarif_file_output_format): Likewise.
6961 (diagnostic_output_format_init_sarif_stderr): Add
6962 "main_input_filename_" param and pass to ctor.
6963 (diagnostic_output_format_init_sarif_file): Likewise.
6964 (diagnostic_output_format_init_sarif_stream): Likewise.
6965 * diagnostic.cc (diagnostic_output_format_init): Add
6966 "main_input_filename_" param and pass to the
6967 diagnostic_output_format_init_sarif_* calls.
6968 * diagnostic.h (diagnostic_output_format_init): Add
6969 main_input_filename_" param to decl.
6970 (diagnostic_output_format_init_sarif_stderr): Likewise.
6971 (diagnostic_output_format_init_sarif_file): Likewise.
6972 (diagnostic_output_format_init_sarif_stream): Likewise.
6973 * gcc.cc (driver_handle_option): Pass main input filename to
6974 diagnostic_output_format_init.
6975 * opts.cc (common_handle_option): Likewise.
6976
69772024-06-03 Eric Botcazou <ebotcazou@adacore.com>
6978
6979 * dwarf2out.cc (loc_list_from_tree_1) <CEIL_DIV_EXPR>; Add const.
6980 <do_comp_binop>: Use a signed comparison for small unsigned types.
6981 Implement wrap-around arithmetics for small integer types.
6982
69832024-06-03 Uros Bizjak <ubizjak@gmail.com>
6984
6985 PR target/115321
6986 * config/i386/i386.md (bswapsi2): Force operand 1
6987 to a register also for !TARGET_BSWAP.
6988
69892024-06-03 Aldy Hernandez <aldyh@redhat.com>
6990
6991 * builtins.cc (expand_builtin_strnlen): Replace value_range use
6992 with int_range_max or irange when appropriate.
6993 (determine_block_size): Same.
6994 * fold-const.cc (minmax_from_comparison): Same.
6995 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
6996 (array_bounds_checker::check_array_ref): Same.
6997 * gimple-fold.cc (size_must_be_zero_p): Same.
6998 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
6999 * gimple-ssa-sprintf.cc (get_int_range): Same.
7000 (format_integer): Same.
7001 (try_substitute_return_value): Same.
7002 (handle_printf_call): Same.
7003 * gimple-ssa-warn-restrict.cc
7004 (builtin_memref::extend_offset_range): Same.
7005 * graphite-sese-to-poly.cc (add_param_constraints): Same.
7006 * internal-fn.cc (get_min_precision): Same.
7007 * match.pd: Same.
7008 * pointer-query.cc (get_size_range): Same.
7009 * range-op.cc (get_shift_range): Same.
7010 (operator_trunc_mod::op1_range): Same.
7011 (operator_trunc_mod::op2_range): Same.
7012 * range.cc (range_negatives): Same.
7013 * range.h (range_positives): Same.
7014 (range_negatives): Same.
7015 * tree-affine.cc (expr_to_aff_combination): Same.
7016 * tree-data-ref.cc (compute_distributive_range): Same.
7017 (nop_conversion_for_offset_p): Same.
7018 (split_constant_offset): Same.
7019 (split_constant_offset_1): Same.
7020 (dr_step_indicator): Same.
7021 * tree-dfa.cc (get_ref_base_and_extent): Same.
7022 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
7023 * tree-ssa-math-opts.cc (optimize_spaceship): Same.
7024 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
7025 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
7026 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
7027 (dump_strlen_info): Same.
7028 (get_range_strlen_dynamic): Same.
7029 (set_strlen_range): Same.
7030 (maybe_diag_stxncpy_trunc): Same.
7031 (strlen_pass::get_len_or_size): Same.
7032 (strlen_pass::handle_builtin_string_cmp): Same.
7033 (strlen_pass::count_nonzero_bytes_addr): Same.
7034 (strlen_pass::handle_integral_assign): Same.
7035 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
7036 * tree-vect-loop-manip.cc (vect_gen_vector_loop_niters): Same.
7037 (vect_do_peeling): Same.
7038 * tree-vect-patterns.cc (vect_get_range_info): Same.
7039 (vect_recog_divmod_pattern): Same.
7040 * tree.cc (get_range_pos_neg): Same.
7041 * value-range.cc (debug): Remove value_range variants.
7042 * value-range.h (value_range): Remove typedef.
7043 * vr-values.cc
7044 (simplify_using_ranges::op_with_boolean_value_range_p): Replace
7045 value_range use with int_range_max or irange when appropriate.
7046 (check_for_binary_op_overflow): Same.
7047 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
7048 (find_case_label_ranges): Same.
7049 (simplify_using_ranges::simplify_abs_using_ranges): Same.
7050 (test_for_singularity): Same.
7051 (simplify_using_ranges::simplify_compare_using_ranges_1): Same.
7052 (simplify_using_ranges::simplify_casted_compare): Same.
7053 (simplify_using_ranges::simplify_switch_using_ranges): Same.
7054 (simplify_conversion_using_ranges): Same.
7055 (simplify_using_ranges::two_valued_val_range_p): Same.
7056
70572024-06-03 Tobias Burnus <tburnus@baylibre.com>
7058
7059 * doc/install.texi (gcn): Fix date of recommended newlib version.
7060
70612024-06-03 Marc Poulhiès <poulhies@adacore.com>
7062
7063 * config/aarch64/aarch64-ldp-fusion.cc (struct aarch64_pair_fusion):
7064 Use new type name.
7065
70662024-06-03 Marc Poulhiès <poulhies@adacore.com>
7067
7068 * pair-fusion.h (enum class writeback): Rename to...
7069 (enum class writeback_type): ...this.
7070 (struct pair_fusion): Adjust type name after renaming.
7071 * pair-fusion.cc (pair_fusion_bb_info::track_access): Likewise.
7072 (pair_fusion_bb_info::fuse_pair): Likewise.
7073 (pair_fusion::process_block): Likewise.
7074
70752024-06-03 Richard Biener <rguenther@suse.de>
7076
7077 * tree-vect-loop.cc (vect_analyze_loop_1): Avoid extra space
7078 before 'failed'.
7079
70802024-06-03 Richard Biener <rguenther@suse.de>
7081
7082 * tree-vect-loop.cc (get_initial_defs_for_reduction):
7083 Always convert neutral_op.
7084
70852024-06-03 liuhongt <hongtao.liu@intel.com>
7086
7087 PR target/115299
7088 * config/i386/i386.cc (ix86_noce_conversion_profitable_p): Add
7089 some preference for floating point ifcvt when SSE4.1 is not
7090 available.
7091
70922024-06-03 Haochen Jiang <haochen.jiang@intel.com>
7093
7094 * common/config/i386/i386-common.cc: Change Granite Rapids
7095 series CPU type to P_PROC_AVX10_1_512.
7096 * common/config/i386/i386-cpuinfo.h (enum feature_priority):
7097 Revise comment part. Add P_AVX10_1_256, P_AVX10_1_512,
7098 P_PROC_AVX10_1_512.
7099 * common/config/i386/i386-isas.h: Link to avx10.1-256, avx10.1-512.
7100
71012024-06-03 Lingling Kong <lingling.kong@intel.com>
7102
7103 * config/i386/i386.md (clz<mode>2_lzcnt_nf): New define_insn.
7104 (*clz<mode>2_lzcnt_falsedep_nf): Ditto.
7105 (<lt_zcnt>_<mode>_nf): Ditto.
7106 (*<lt_zcnt>_<mode>_falsedep_nf): Ditto.
7107 (<lt_zcnt>_hi<nf_name>): Ditto.
7108 (popcount<mode>2_nf): Ditto.
7109 (*popcount<mode>2_falsedep_nf): Ditto.
7110 (popcounthi2<nf_name>): Ditto.
7111
71122024-06-03 Lingling Kong <lingling.kong@intel.com>
7113
7114 * config/i386/i386.md (*mul<mode>3_1<nf_name>): New define_insn.
7115 (*mulqi3_1<nf_name>): Ditto.
7116 (*<u>divmod<mode>4_noext_nf): Ditto.
7117 (<u>divmodhiqi3<nf_name>): Ditto.
7118
71192024-06-03 Lingling Kong <lingling.kong@intel.com>
7120
7121 * config/i386/i386.md (x86_64_shld): New define_insn.
7122 (x86_64_shld<nf_name>): Ditto.
7123 (x86_64_shld_ndd<nf_name>): Ditto.
7124 (x86_64_shld_1<nf_name>): Ditto.
7125 (x86_64_shld_ndd_1<nf_name>): Ditto.
7126 (*x86_64_shld_shrd_1_nozext_nf): Ditto.
7127 (x86_shld<nf_name>): Ditto.
7128 (x86_shld_ndd<nf_name>): Ditto.
7129 (x86_shld_1<nf_name>): Ditto.
7130 (x86_shld_ndd_1<nf_name>): Ditto.
7131 (*x86_shld_shrd_1_nozext_nf): Ditto.
7132 (<insn><dwi>3_doubleword_lowpart_nf): Ditto.
7133 (x86_64_shrd<nf_name>): Ditto.
7134 (x86_64_shrd_ndd<nf_name>): Ditto.
7135 (x86_64_shrd_1<nf_name>): Ditto.
7136 (x86_64_shrd_ndd_1<nf_name>): Ditto.
7137 (*x86_64_shrd_shld_1_nozext_nf): Ditto.
7138 (x86_shrd<nf_name>): Ditto.
7139 (x86_shrd_ndd<nf_name>): Ditto.
7140 (x86_shrd_1<nf_name>): Ditto.
7141 (x86_shrd_ndd_1<nf_name>): Ditto.
7142 (*x86_shrd_shld_1_nozext_nf): Ditto.
7143
71442024-06-03 Lingling Kong <lingling.kong@intel.com>
7145
7146 * config/i386/i386.md (ashr<mode>3_cvt<nf_name>): New
7147 define_insn.
7148 (*<insn><mode>3_1<nf_name>): Ditto.
7149
71502024-06-03 Lingling Kong <lingling.kong@intel.com>
7151
7152 * config/i386/i386.md (*ashr<mode>3_1<nf_name>): New
7153 define_insn.
7154 (*lshr<mode>3_1<nf_name>): Ditto.
7155 (*lshrqi3_1<nf_name>): Ditto.
7156 (*lshrhi3_1<nf_name>): Ditto.
7157
71582024-06-03 Lingling Kong <lingling.kong@intel.com>
7159
7160 * config/i386/i386.md (*ashl<mode>3_1<nf_name>): New
7161 define_insn.
7162 (*ashlhi3_1<nf_name>): Ditto.
7163 (*ashlqi3_1<nf_name>): Ditto.
7164 * config/i386/sse.md: New define_split.
7165
71662024-06-03 Lingling Kong <lingling.kong@intel.com>
7167
7168 * config/i386/i386.md (nf_nonf_attr): New subst_attr.
7169 (nf_nonf_x64_attr): Ditto.
7170 (*sub<mode>_1<nf_name>): New define_insn.
7171 (*anddi_1<nf_name>): Ditto.
7172 (*and<mode>_1<nf_name>): Ditto.
7173 (*andqi_1<nf_name>): Ditto.
7174 (*<code><mode>_1<nf_name>): Ditto.
7175 (*<code>qi_1<nf_name>): Ditto.
7176 (*neg<mode>_1<nf_name>): Ditto.
7177 * config/i386/sse.md: New define_split.
7178
71792024-06-03 Lingling Kong <lingling.kong@intel.com>
7180 Hongyu Wong <hongyu.wang@intel.com>
7181
7182 * config/i386/i386-opts.h (enum apx_features): Add nf
7183 enumeration.
7184 * config/i386/i386.h (TARGET_APX_NF): New.
7185 * config/i386/i386.md (nf_name): New subst_att.
7186 (nf_prefix): Ditto.
7187 (nf_condition): Ditto.
7188 (nf_mem_constraint): Ditto.
7189 (nf_applied): Ditto.
7190 (nf_subst): Add new define_subst.
7191 (*add<mode>_1<nf_name>): New define_insn.
7192 (*addhi_1<nf_name>): Ditto.
7193 (*addqi_1<nf_name>): Diito.
7194 * config/i386/i386.opt: Add apx_nf enumeration.
7195
71962024-06-03 Hu, Lin1 <lin1.hu@intel.com>
7197
7198 PR target/113609
7199 * config/i386/sse.md
7200 (*kortest_cmp<mode>_setcc): New define_insn_and_split.
7201 (*kortest_cmp<mode>_jcc): Ditto.
7202
72032024-06-01 Georg-Johann Lay <avr@gjlay.de>
7204
7205 PR tree-optimization/115307
7206 * config/avr/avr.md (SFDF): New mode iterator.
7207 (isinf<mode>2) [sf, df]: New expanders.
7208
72092024-06-01 Jeff Law <jlaw@ventanamicro.com>
7210
7211 * config/riscv/riscv.cc (riscv_integer_op): Add new field.
7212 (riscv_build_integer_1): Initialize the new field.
7213 (riscv_built_integer): Recognize more cases where Zbkb's
7214 pack instruction is profitable.
7215 (riscv_move_integer): Loop over all the codes. If requested,
7216 save the current constant into a temporary. Generate pack
7217 for more cases using the saved constant.
7218
72192024-06-01 Feng Xue <fxue@os.amperecomputing.com>
7220
7221 * tree-vect-loop.cc (vect_is_emulated_mixed_dot_prod): Remove parameter
7222 loop_vinfo. Get input vectype from stmt_info instead of reduction PHI.
7223 (vect_model_reduction_cost): Remove loop_vinfo argument of call to
7224 vect_is_emulated_mixed_dot_prod.
7225 (vect_transform_reduction): Likewise.
7226 (vectorizable_reduction): Likewise, and bind input vectype to
7227 lane-reducing operation.
7228
72292024-06-01 Feng Xue <fxue@os.amperecomputing.com>
7230
7231 * tree-vect-loop.cc (vect_reduction_update_partial_vector_usage): New
7232 function.
7233 (vectorizable_reduction): Move partial vectorization checking code to
7234 vect_reduction_update_partial_vector_usage.
7235
72362024-06-01 Feng Xue <fxue@os.amperecomputing.com>
7237
7238 * tree-vectorizer.h (lane_reducing_op_p): New function.
7239 * tree-vect-slp.cc (vect_analyze_slp): Use new function
7240 lane_reducing_op_p to check statement code.
7241 * tree-vect-loop.cc (vect_transform_reduction): Likewise.
7242 (vectorizable_reduction): Likewise, and change name of a local
7243 variable that holds the result flag.
7244
72452024-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7246
7247 * config/xtensa/xtensa-protos.h (xtensa_expand_call):
7248 Add the third argument as boolean.
7249 (xtensa_expand_epilogue): Remove the first argument.
7250 * config/xtensa/xtensa.cc (xtensa_expand_call):
7251 Add the third argument "sibcall_p", and modify in order to prepend
7252 "(use A0_REG)" to CALL_INSN_FUNCTION_USAGE if the argument is true.
7253 (xtensa_expand_epilogue): Remove the first argument "sibcall_p" and
7254 its conditional clause.
7255 * config/xtensa/xtensa.md (call, call_value, sibcall, sibcall_value):
7256 Append a boolean value to the argument of xtensa_expand_call()
7257 indicating whether it is sibling call or not.
7258 (epilogue): Remove the boolean argument from xtensa_expand_epilogue(),
7259 and then append emitting "(return)".
7260 (sibcall_epilogue): Remove the boolean argument from
7261 xtensa_expand_epilogue().
7262
72632024-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7264
7265 * config/xtensa/predicates.md
7266 (subreg_HQI_lowpart_operator, xtensa_sminmax_operator):
7267 New operator predicates.
7268 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
7269 Remove.
7270 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p): Ditto.
7271 * config/xtensa/xtensa.md
7272 (*addsubx, *extzvsi-1bit_ashlsi3, *extzvsi-1bit_addsubx):
7273 Revise the output statements by conditional ternary operator rather
7274 than switch-case clause in order to avoid using gcc_unreachable().
7275 (xtensa_clamps): Reduce to a single pattern definition using the
7276 predicate added above.
7277 (Some split patterns to assist *masktrue_const_bitcmpl): Ditto.
7278
72792024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7280
7281 * config/riscv/riscv-v.cc (expand_const_vector): Document.
7282 (shuffle_extract_and_slide1up_patterns): Remove.
7283
72842024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7285
7286 * config/riscv/autovec.md (ctz<mode>2): New expander.
7287 (clz<mode>2): Ditto.
7288 * config/riscv/generic-vector-ooo.md: Add bitmanip ops to insn
7289 reservation.
7290 * config/riscv/vector-crypto.md: Add VLS modes to insns.
7291 * config/riscv/vector.md: Add bitmanip ops to mode_idx and other
7292 attributes.
7293
72942024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7295
7296 * config/riscv/autovec-opt.md (*vandn_<mode>): New pattern.
7297 * config/riscv/vector.md: Add vandn to mode_idx.
7298
72992024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7300
7301 * config/riscv/riscv-v.cc (expand_gather_scatter): Use vwsll if
7302 applicable.
7303 * config/riscv/vector-crypto.md: Remove mode from vwsll shift
7304 count operator.
7305 * config/riscv/vector.md: Add vwsll to mode iterator.
7306
73072024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7308
7309 * config/riscv/autovec-opt.md (*vwsll_zext1_<mode>): New
7310 pattern.
7311 (*vwsll_zext2_<mode>): Ditto.
7312 (*vwsll_zext1_scalar_<mode>): Ditto.
7313 (*vwsll_zext1_trunc_<mode>): Ditto.
7314 (*vwsll_zext2_trunc_<mode>): Ditto.
7315 (*vwsll_zext1_trunc_scalar_<mode>): Ditto.
7316 * config/riscv/vector-crypto.md: Make pattern similar to other
7317 narrowing/widening patterns.
7318
73192024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7320
7321 * config/riscv/vector.md: Split vwadd.wx/vwsub.wx pattern and
7322 add extended_scalar patterns.
7323
73242024-05-31 Robin Dapp <rdapp@ventanamicro.com>
7325
7326 PR target/115068
7327 * config/riscv/vector.md: Split vfw<insn>.wf pattern.
7328
73292024-05-31 Qing Zhao <qing.zhao@oracle.com>
7330
7331 * tree-object-size.cc (access_with_size_object_size): Use the type
7332 of the 6th argument for the type of the element.
7333 * internal-fn.cc (expand_ACCESS_WITH_SIZE): Update the comment with
7334 the 6th argument.
7335
73362024-05-31 Qing Zhao <qing.zhao@oracle.com>
7337
7338 * tree-object-size.cc (access_with_size_object_size): New function.
7339 (call_object_size): Call the new function.
7340
73412024-05-31 Qing Zhao <qing.zhao@oracle.com>
7342
7343 * internal-fn.cc (expand_ACCESS_WITH_SIZE): New function.
7344 * internal-fn.def (ACCESS_WITH_SIZE): New internal function.
7345 * tree.cc (is_access_with_size_p): New function.
7346 (get_ref_from_access_with_size): New function.
7347 * tree.h (is_access_with_size_p): New prototype.
7348 (get_ref_from_access_with_size): New prototype.
7349
73502024-05-31 Qing Zhao <qing.zhao@oracle.com>
7351
7352 * doc/extend.texi: Document attribute counted_by.
7353
73542024-05-31 Uros Bizjak <ubizjak@gmail.com>
7355
7356 PR target/115297
7357 * config/alpha/alpha.md (<any_divmod:code>si3): Wrap DImode
7358 operands 3 and 4 with truncate:SI RTX.
7359 (*divmodsi_internal_er): Ditto for operands 1 and 2.
7360 (*divmodsi_internal_er_1): Ditto.
7361 (*divmodsi_internal): Ditto.
7362 * config/alpha/constraints.md ("b"): Correct register
7363 number in the description.
7364
73652024-05-31 Thomas Schwinge <tschwinge@baylibre.com>
7366
7367 * config/nvptx/nvptx.h: Configure global constructor, destructor
7368 support.
7369
73702024-05-31 Richard Biener <rguenther@suse.de>
7371
7372 PR tree-optimization/115278
7373 * tree-if-conv.cc (ifcvt_local_dce): Do not DSE volatile stores.
7374
73752024-05-31 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7376
7377 * config.gcc: Move ${target_min} from obsolete to unsupported
7378 message.
7379
73802024-05-31 Andrew Pinski <quic_apinski@quicinc.com>
7381
7382 PR target/115022
7383 * doc/invoke.texi (fstrub=disable): Fix opindex.
7384 (minline-memops-threshold): Fix opindex.
7385 (mcmodel=): Add opindex and fix them.
7386 * common.opt.urls: Regenerate.
7387 * config/aarch64/aarch64.opt.urls: Regenerate.
7388 * config/bpf/bpf.opt.urls: Regenerate.
7389 * config/i386/i386.opt.urls: Regenerate.
7390 * config/loongarch/loongarch.opt.urls: Regenerate.
7391 * config/nds32/nds32-elf.opt.urls: Regenerate.
7392 * config/nds32/nds32-linux.opt.urls: Regenerate.
7393 * config/or1k/or1k.opt.urls: Regenerate.
7394 * config/riscv/riscv.opt.urls: Regenerate.
7395 * config/rs6000/aix64.opt.urls: Regenerate.
7396 * config/rs6000/linux64.opt.urls: Regenerate.
7397 * config/sparc/sparc.opt.urls: Regenerate.
7398
73992024-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7400
7401 * config/xtensa/xtensa-protos.h
7402 (xtensa_use_return_instruction_p): Remove.
7403 * config/xtensa/xtensa.cc
7404 (machine_function): Remove "epilogue_done" field.
7405 (xtensa_expand_epilogue): Remove "cfun->machine->epilogue_done" usage.
7406 (xtensa_use_return_instruction_p): Remove.
7407 * config/xtensa/xtensa.md ("return"):
7408 Replace calling "xtensa_use_return_instruction_p()" with inline code.
7409
74102024-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
7411
7412 * config/xtensa/xtensa.cc (xtensa_valid_move, constantpool_address_p,
7413 xtensa_tls_symbol_p, gen_int_relational, xtensa_emit_move_sequence,
7414 xtensa_copy_incoming_a7, xtensa_expand_block_move,
7415 xtensa_expand_nonlocal_goto, xtensa_emit_call,
7416 xtensa_legitimate_address_p, xtensa_legitimize_address,
7417 xtensa_tls_referenced_p, print_operand, print_operand_address,
7418 xtensa_output_literal):
7419 Replace RTX code comparisons with their predicate macros such as
7420 REG_P().
7421 * config/xtensa/xtensa.h (CONSTANT_ADDRESS_P,
7422 LEGITIMATE_PIC_OPERAND_P): Ditto.
7423 * config/xtensa/xtensa.md (reload<mode>_literal, indirect_jump):
7424 Ditto.
7425
74262024-05-31 Martin Uecker <uecker@tugraz.at>
7427
7428 PR tree-optimization/115157
7429 PR tree-optimization/115177
7430 * godump.cc (go_output_typedef): Use TYPE_MAIN_VARIANT instead
7431 of TYPE_CANONICAL.
7432
74332024-05-31 liuhongt <hongtao.liu@intel.com>
7434
7435 * config/i386/emmintrin.h (__double_u): Rename from double_u.
7436 (_mm_load_sd): Replace double_u with __double_u.
7437 (_mm_store_sd): Ditto.
7438 (_mm_loadh_pd): Ditto.
7439 (_mm_loadl_pd): Ditto.
7440 * config/i386/xmmintrin.h (__float_u): Rename from float_u.
7441 (_mm_load_ss): Ditto.
7442 (_mm_store_ss): Ditto.
7443
74442024-05-30 Uros Bizjak <ubizjak@gmail.com>
7445
7446 PR target/115102
7447 * config/i386/i386.md (bswaphi2): Also enable for !TARGET_MOVBE.
7448 (*bswaphi2): New insn pattern.
7449 (bswaphisi2_lowpart): Rename from bswaphi_lowpart. Rewrite
7450 insn RTX to match the expected form of the combine pass.
7451 Remove rol{w} alternative and corresponding attributes.
7452 (bswsaphisi2_lowpart peephole2): New peephole2 pattern to
7453 conditionally convert bswaphisi2_lowpart to rotlhi3_1_slp.
7454 (bswapsi2): Update expander for rename.
7455 (rotlhi3_1_slp splitter): Conditionally split to bswaphi2.
7456
74572024-05-30 Richard Sandiford <richard.sandiford@arm.com>
7458
7459 PR rtl-optimization/115281
7460 * ira-conflicts.cc (go_through_subreg): Use the natural size of
7461 the inner mode rather than the outer mode.
7462
74632024-05-30 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
7464
7465 * pair-fusion.h: Generic header code for load store pair fusion
7466 that can be shared across different architectures.
7467 * pair-fusion.cc: Generic source code implementation for
7468 load store pair fusion that can be shared across different architectures.
7469 * Makefile.in: Add new object file pair-fusion.o.
7470 * config/aarch64/aarch64-ldp-fusion.cc: Delete generic code and move it
7471 to pair-fusion.cc in the middle-end.
7472 * config/aarch64/t-aarch64: Add header file dependency on pair-fusion.h.
7473 Remove unnecessary header file dependency.
7474
74752024-05-30 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
7476
7477 PR c++/115031
7478 * config/sparc/sol2.h (GGC_QUIRE_SIZE): Define as 510.
7479
74802024-05-30 David Malcolm <dmalcolm@redhat.com>
7481
7482 * Makefile.in (OBJS-libcommon): Add text-art/tree-widget.o.
7483 * doc/analyzer.texi: Rewrite discussion of dumping state to
7484 cover the text_art::tree_widget-based dumps, with a more
7485 interesting example.
7486 * text-art/dump-widget-info.h: New file.
7487 * text-art/dump.h: New file.
7488 * text-art/selftests.cc (selftest::text_art_tests): Call
7489 text_art_tree_widget_cc_tests.
7490 * text-art/selftests.h (selftest::text_art_tree_widget_cc_tests):
7491 New decl.
7492 * text-art/theme.cc (ascii_theme::get_cppchar): Handle the various
7493 cell_kind::TREE_*.
7494 (unicode_theme::get_cppchar): Likewise.
7495 * text-art/theme.h (enum class theme::cell_kind): Add
7496 TREE_CHILD_NON_FINAL, TREE_CHILD_FINAL, TREE_X_CONNECTOR, and
7497 TREE_Y_CONNECTOR.
7498 * text-art/tree-widget.cc: New file.
7499 * text-art/tree-widget.h: New file.
7500
75012024-05-30 liuhongt <hongtao.liu@intel.com>
7502
7503 * config/i386/sse.md (vcond_mask_<mode><mode>): New expander.
7504
75052024-05-30 liuhongt <hongtao.liu@intel.com>
7506
7507 PR tree-optimization/112325
7508 * tree-ssa-loop-ivcanon.cc (estimated_unrolled_size): Move the
7509 2 / 3 loop body size reduction to ..
7510 (try_unroll_loop_completely): .. here, add it for the check of
7511 body size shrink, and the check of comparison against
7512 param_max_completely_peeled_insns when
7513 (!cunrolli ||loop->inner).
7514 (canonicalize_loop_induction_variables): Add new parameter
7515 cunrolli and pass down.
7516 (tree_unroll_loops_completely_1): Ditto.
7517 (canonicalize_induction_variables): Pass cunrolli as false to
7518 canonicalize_loop_induction_variables.
7519 (tree_unroll_loops_completely): Set cunrolli to true at
7520 beginning and set it to false after CHANGED is true.
7521
75222024-05-30 Alexandre Oliva <oliva@adacore.com>
7523
7524 * doc/sourcebuild.texi (dg-additional-sources): Document
7525 newly-added support for target selectors, and implicit discard
7526 on non-linking tests that name the compiler output explicitly.
7527
75282024-05-30 Jiawei <jiawei@iscas.ac.cn>
7529
7530 * tree-ssa-pre.cc (create_component_ref_by_pieces_1): New conditions.
7531
75322024-05-30 Hans-Peter Nilsson <hp@axis.com>
7533
7534 Revert:
7535 2024-05-28 Hans-Peter Nilsson <hp@axis.com>
7536
7537 * resource.cc: Include cfgrtl.h. Use BLOCK_FOR_INSN (insn)->index
7538 instead of calling find_basic_block (insn). Assert for not -1.
7539 (find_basic_block): Remove function.
7540 (init_resource_info): Call compute_bb_for_insn.
7541 (free_resource_info): Call free_bb_for_insn.
7542
75432024-05-30 Hans-Peter Nilsson <hp@axis.com>
7544
7545 Revert:
7546 2024-05-28 Hans-Peter Nilsson <hp@axis.com>
7547
7548 * resource.cc (mark_target_live_regs): Remove redundant check for b
7549 being -1, after gcc_assert.
7550
75512024-05-30 Hans-Peter Nilsson <hp@axis.com>
7552
7553 Revert:
7554 2024-05-28 Hans-Peter Nilsson <hp@axis.com>
7555
7556 * resource.cc (free_resource_info, clear_hashed_info_for_insn): Don't
7557 check for non-null target_hash_table and bb_ticks.
7558 (mark_target_live_regs): Ditto. Replace check for non-NULL result from
7559 BLOCK_FOR_INSN with a call to gcc_assert. Fold code conditioned on
7560 tinfo != NULL.
7561
75622024-05-29 YunQiang Su <syq@gcc.gnu.org>
7563
7564 * config/mips/mips.cc(mips16_gp_pseudo_reg): Mark
7565 MIPS16_PIC_TEMP and MIPS_PROLOGUE_TEMP clobbered.
7566 (mips_emit_call_insn): Mark MIPS16_PIC_TEMP and
7567 MIPS_PROLOGUE_TEMP clobbered if MIPS16 and CALL_CLOBBERED_GP.
7568
75692024-05-29 Andrew Pinski <quic_apinski@quicinc.com>
7570
7571 PR tree-optimization/115224
7572 * generic-match-head.cc (bitwise_inverted_equal_p): Add `a ^ CST`
7573 case.
7574 * gimple-match-head.cc (gimple_bit_xor_cst): New declaration.
7575 (gimple_bitwise_inverted_equal_p): Add `a ^ CST` case.
7576 * match.pd (bit_xor_cst): New match.
7577 (maybe_bit_not): Add bit_xor_cst case.
7578
75792024-05-29 Andrew Pinski <quic_apinski@quicinc.com>
7580
7581 * match.pd (bit_not_with_nop): Unconditionalize.
7582 (maybe_cmp): Likewise.
7583 (maybe_bit_not): New match pattern.
7584 (`~X & X`): Use maybe_bit_not and add `:c` back.
7585 (`~x ^ x`/`~x | x`): Likewise.
7586
75872024-05-29 Richard Sandiford <richard.sandiford@arm.com>
7588
7589 PR target/115258
7590 * config/aarch64/aarch64-simd.md (aarch64_combinev16qi): Allow
7591 the split before reload.
7592 * config/aarch64/aarch64.cc (aarch64_split_combinev16qi): Generalize
7593 into a form that handles pseudo registers.
7594
75952024-05-29 Feng Xue <fxue@os.amperecomputing.com>
7596
7597 * tree-vect-loop.c : Removed.
7598
75992024-05-29 Feng Xue <fxue@os.amperecomputing.com>
7600
7601 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Move
7602 initialization of bbs to explicit construction code. Adjust the
7603 definition of nbbs.
7604 (update_epilogue_loop_vinfo): Update nbbs for epilog vinfo.
7605 * tree-vect-patterns.cc (vect_determine_precisions): Make
7606 loop_vec_info and bb_vec_info share same code.
7607 (vect_pattern_recog): Remove duplicated vect_pattern_recog_1 loop.
7608 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Access to bbs[0]
7609 via base vec_info class.
7610 (_bb_vec_info::_bb_vec_info): Initialize bbs and nbbs using data
7611 fields of input auto_vec<> bbs.
7612 (vect_slp_region): Use access to nbbs to replace original
7613 bbs.length().
7614 (vect_schedule_slp_node): Access to bbs[0] via base vec_info class.
7615 * tree-vectorizer.cc (vec_info::vec_info): Add initialization of
7616 bbs and nbbs.
7617 (vec_info::insert_seq_on_entry): Access to bbs[0] via base vec_info
7618 class.
7619 * tree-vectorizer.h (vec_info): Add new fields bbs and nbbs.
7620 (LOOP_VINFO_NBBS): New macro.
7621 (BB_VINFO_BBS): Rename BB_VINFO_BB to BB_VINFO_BBS.
7622 (BB_VINFO_NBBS): New macro.
7623 (_loop_vec_info): Remove field bbs.
7624 (_bb_vec_info): Rename field bbs.
7625 * tree-vect-loop.c: New file.
7626
76272024-05-29 Jeff Law <jlaw@ventanamicro.com>
7628
7629 * config/riscv/crypto.md (riscv_xpack_<X:mode>_<HX:mode>_2): Remove '*'
7630 allow it to be used via the gen_* interface.
7631 * config/riscv/riscv.cc (riscv_build_integer): Identify when Zbkb
7632 can be used to profitably synthesize repeating constants.
7633 (riscv_move_integer): Codegen changes to generate those Zbkb sequences.
7634
76352024-05-29 Jason Merrill <jason@redhat.com>
7636
7637 * doc/invoke.texi: Update module extension docs.
7638
76392024-05-29 Tobias Burnus <tburnus@baylibre.com>
7640
7641 * config/gcn/gcn-hsa.h (gcn_local_sym_hash): Fix typo.
7642
76432024-05-29 Richard Biener <rguenther@suse.de>
7644
7645 PR tree-optimization/115252
7646 * tree-vect-stmts.cc (get_group_load_store_type): Enhance
7647 detecting the number of cases where we can avoid accessing a gap
7648 during code generation.
7649 (vectorizable_load): Remove old half-vector peeling for gap
7650 avoidance which is now redundant. Add gap-aligned case where
7651 it's OK to access the gap. Add assert that we have peeling for
7652 gaps enabled when we access a gap.
7653
76542024-05-29 Richard Biener <rguenther@suse.de>
7655
7656 PR tree-optimization/114435
7657 * tree-predcom.cc (tree_predictive_commoning): Queue
7658 the next scalar cleanup sub-pipeline to be run when we
7659 did something.
7660
76612024-05-29 Hongyu Wang <hongyu.wang@intel.com>
7662
7663 PR target/113719
7664 * config/i386/i386-options.cc (ix86_override_options_after_change):
7665 Remove call to ix86_default_align and
7666 ix86_recompute_optlev_based_flags.
7667 (ix86_option_override_internal): Call ix86_default_align and
7668 ix86_recompute_optlev_based_flags.
7669
76702024-05-29 liuhongt <hongtao.liu@intel.com>
7671
7672 * config/i386/i386.cc (ix86_avoid_jump_mispredicts): Change
7673 gen_pad to gen_max_skip_align.
7674 (ix86_align_loops): New function.
7675 (ix86_reorg): Call ix86_align_loops.
7676 * config/i386/i386.md (pad): Rename to ..
7677 (max_skip_align): .. this, and accept 2 operands for align and
7678 skip.
7679
76802024-05-29 Haochen Jiang <haochen.jiang@intel.com>
7681
7682 * config/i386/x86-tune-costs.h (generic_cost): Change from
7683 16:11:8 to 16.
7684
76852024-05-29 Andrew MacLeod <amacleod@redhat.com>
7686
7687 * gimple-range-gori.cc (gori_on_edge): Always use static ranges
7688 from the specified range_query.
7689 * gimple-range-gori.h (gori_on_edge): Change prototype.
7690 * gimple-range.cc (dom_ranger::maybe_push_edge): Change arguments
7691 to call.
7692
76932024-05-29 Kewen Lin <linkw@linux.ibm.com>
7694
7695 PR target/114846
7696 * config/rs6000/rs6000-logue.cc (rs6000_emit_epilogue): As
7697 EPILOGUE_TYPE_EH_RETURN would be passed as epilogue_type directly
7698 now, adjust the relevant handlings on it.
7699 * config/rs6000/rs6000.md (eh_return expander): Append by calling
7700 gen_eh_return_internal and emit_barrier.
7701 (eh_return_internal): New define_insn_and_split, call function
7702 rs6000_emit_epilogue with epilogue type EPILOGUE_TYPE_EH_RETURN.
7703
77042024-05-28 liuhongt <hongtao.liu@intel.com>
7705
7706 PR target/67325
7707 * config/i386/i386.cc (ix86_rtx_costs): Reduce cost of MEM (A
7708 + imm) to "cost of MEM (A)" + 1.
7709
77102024-05-28 Andrew MacLeod <amacleod@redhat.com>
7711
7712 * gimple-range.cc (dom_ranger::dom_ranger): Do not initialize m_out.
7713 (dom_ranger::maybe_push_edge): Use gori () rather than m_out.
7714 * gimple-range.h (dom_ranger::m_out): Remove.
7715 * tree-vrp.cc (remove_unreachable::remove_unreachable): Use a
7716 range-query ranther than a gimple_ranger.
7717 (remove_unreachable::remove): New.
7718 (remove_unreachable::m_ranger): Change to a range_query.
7719 (remove_unreachable::handle_early): If there is no dependency
7720 information, do nothing.
7721 (remove_unreachable::remove_and_update_globals): Do not update
7722 globals if there is no dependecy info to use.
7723
77242024-05-28 Hans-Peter Nilsson <hp@axis.com>
7725
7726 * resource.cc (free_resource_info, clear_hashed_info_for_insn): Don't
7727 check for non-null target_hash_table and bb_ticks.
7728 (mark_target_live_regs): Ditto. Replace check for non-NULL result from
7729 BLOCK_FOR_INSN with a call to gcc_assert. Fold code conditioned on
7730 tinfo != NULL.
7731
77322024-05-28 Hans-Peter Nilsson <hp@axis.com>
7733
7734 * resource.cc (mark_target_live_regs): Remove redundant check for b
7735 being -1, after gcc_assert.
7736
77372024-05-28 Hans-Peter Nilsson <hp@axis.com>
7738
7739 * resource.cc: Include cfgrtl.h. Use BLOCK_FOR_INSN (insn)->index
7740 instead of calling find_basic_block (insn). Assert for not -1.
7741 (find_basic_block): Remove function.
7742 (init_resource_info): Call compute_bb_for_insn.
7743 (free_resource_info): Call free_bb_for_insn.
7744
77452024-05-28 Hans-Peter Nilsson <hp@axis.com>
7746
7747 PR rtl-optimization/115182
7748 * resource.cc (mark_target_live_regs): Don't look for
7749 unconditional branches after the target to improve on the
7750 register liveness.
7751 (find_dead_or_set_registers): Remove unused function.
7752
77532024-05-28 Uros Bizjak <ubizjak@gmail.com>
7754
7755 * config/i386/sync.md (atomic_loaddi_fpu): Use movd/pextrd
7756 to move DImode value from XMM to GPR for TARGET_SSE4_1.
7757 (atomic_storedi_fpu): Use movd/pinsrd to move DImode value
7758 from GPR to XMM for TARGET_SSE4_1.
7759
77602024-05-28 David Malcolm <dmalcolm@redhat.com>
7761
7762 * diagnostic-color.cc: Define INCLUDE_VECTOR.
7763 Include "label-text.h" and "selftest.h".
7764 (struct color_cap): Replace with...
7765 (struct color_default): ...this, adding "m_" prefixes to fields
7766 and dropping "name_len" and "free_val" field.
7767 (color_dict): Convert to...
7768 (gcc_color_defaults): ...this, making const, dropping the trailing
7769 strlen and "false" from each entry.
7770 (class diagnostic_color_dict): New.
7771 (g_color_dict): New.
7772 (colorize_start): Reimplement in terms of g_color_dict.
7773 (diagnostic_color_dict::get_entry_by_name): New, based on
7774 colorize_start.
7775 (diagnostic_color_dict::get_start_by_name): Likewise.
7776 (diagnostic_color_dict::diagnostic_color_dict): New.
7777 (parse_gcc_colors): Reimplement, moving body...
7778 (diagnostic_color_dict::parse_envvar_value): ...here.
7779 (colorize_init): Lazily create g_color_dict.
7780 (selftest::test_empty_color_dict): New.
7781 (selftest::test_default_color_dict): New.
7782 (selftest::test_color_dict_envvar_parsing): New.
7783 (selftest::diagnostic_color_cc_tests): New.
7784 * selftest-run-tests.cc (selftest::run_tests): Call
7785 selftest::diagnostic_color_cc_tests.
7786 * selftest.h (selftest::diagnostic_color_cc_tests): New decl.
7787
77882024-05-28 David Malcolm <dmalcolm@redhat.com>
7789
7790 * function-tests.cc: Include "selftest-tree.h".
7791 * selftest-tree.h: New file.
7792 * selftest.h (make_fndecl): Move to selftest-tree.h.
7793
77942024-05-28 David Malcolm <dmalcolm@redhat.com>
7795
7796 * config/v850/v850.opt.urls: Regenerate, with fix.
7797 * config/vax/vax.opt.urls: Likewise.
7798 * regenerate-opt-urls.py (TARGET_SPECIFIC_PAGES): Fix transposed
7799 values for "vax" and "v850".
7800
78012024-05-28 Andrew MacLeod <amacleod@redhat.com>
7802
7803 PR tree-optimization/115221
7804 * gimple-range-fold.cc (range_of_ssa_name_with_loop_info): Do
7805 not invoke SCEV is range_query's do not match.
7806
78072024-05-28 Andrew MacLeod <amacleod@redhat.com>
7808
7809 * tree-ssa-strlen.cc (strlen_pass::strlen_pass): Add function
7810 pointer and initialize ptr_qry with current range_query.
7811 (strlen_pass::m_ranger): Remove.
7812 (printf_strlen_execute): Enable and disable ranger.
7813
78142024-05-28 David Malcolm <dmalcolm@redhat.com>
7815
7816 PR analyzer/115203
7817 * diagnostic-path.h
7818 (simple_diagnostic_path::disable_event_localization): New.
7819 (simple_diagnostic_path::m_localize_events): New field.
7820 * diagnostic.cc
7821 (simple_diagnostic_path::simple_diagnostic_path): Initialize
7822 m_localize_events.
7823 (simple_diagnostic_path::add_event): Only localize fmt if
7824 m_localize_events is true.
7825 * tree-diagnostic-path.cc
7826 (test_diagnostic_path::test_diagnostic_path): Call
7827 disable_event_localization.
7828
78292024-05-28 David Malcolm <dmalcolm@redhat.com>
7830
7831 PR bootstrap/115167
7832 * Makefile.in (C_COMMON_OBJS): Add c-family/c-type-mismatch.o.
7833 * gcc-rich-location.cc
7834 (maybe_range_label_for_tree_type_mismatch::get_text): Move to
7835 c-family/c-type-mismatch.cc.
7836 (binary_op_rich_location::binary_op_rich_location): Likewise.
7837 (binary_op_rich_location::use_operator_loc_p): Likewise.
7838 * gcc-rich-location.h (class range_label_for_type_mismatch):
7839 Likewise.
7840 (class maybe_range_label_for_tree_type_mismatch): Likewise.
7841 (class op_location_t): Likewise for forward decl.
7842 (class binary_op_rich_location): Likewise.
7843
78442024-05-28 Lyut Nersisyan <lyut.nersisyan@gmail.com>
7845
7846 * config/riscv/crypto.md: Add new combiner patterns to generate
7847 pack, packh, packw instrutions.
7848 * config/riscv/iterators.md (HX): New iterator for half X mode.
7849 * config/riscv/riscv.md (<optab>_shift_reverse<X:mode>): Tighten
7850 cases to avoid. Do not lose bits for XOR/IOR.
7851
78522024-05-28 Feng Xue <fxue@os.amperecomputing.com>
7853
7854 PR tree-optimization/115060
7855 * tree-vect-patterns.cc (vect_get_internal_def): Return statement for
7856 vectorization.
7857 (vect_widened_op_tree): Call vect_get_internal_def instead of look_def
7858 to get statement information.
7859 (vect_recog_widen_abd_pattern): No need to call vect_stmt_to_vectorize.
7860
78612024-05-28 Richard Biener <rguenther@suse.de>
7862
7863 PR tree-optimization/115236
7864 * tree-ssa-structalias.cc (build_pred_graph): Properly
7865 handle *ANYTHING = X.
7866 (build_succ_graph): Likewise. Do not elide direct nodes
7867 from receiving from STOREDANYTHING.
7868
78692024-05-28 Richard Biener <rguenther@suse.de>
7870
7871 * tree-ssa-structalias.cc (find_func_aliases): Use
7872 get_constraint_for_address_of to build escape constraints
7873 for asm inputs and outputs.
7874
78752024-05-28 Richard Biener <rguenther@suse.de>
7876
7877 PR tree-optimization/115254
7878 * tree-vect-slp.cc (vect_build_slp_tree): Only account
7879 multi-lane SLP to limit.
7880
78812024-05-28 Richard Biener <rguenther@suse.de>
7882
7883 * tree-vect-loop.cc (get_initial_defs_for_reduction): Convert
7884 neutral op to the vector component type.
7885
78862024-05-28 liuhongt <hongtao.liu@intel.com>
7887
7888 * config/i386/sse.md
7889 (<avx512>_<complexopname>_<mode>_mask<round_name>): Align
7890 operands' predicate with corresponding expander.
7891 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
7892 Ditto.
7893
78942024-05-28 Xi Ruoyao <xry111@xry111.site>
7895
7896 PR target/115169
7897 * config/loongarch/loongarch.cc
7898 (loongarch_expand_conditional_move): Guard REGNO with REG_P.
7899
79002024-05-27 Andrew Pinski <quic_apinski@quicinc.com>
7901
7902 PR tree-optimization/115238
7903 * generic-match-head.cc (bitwise_inverted_equal_p): Use
7904 uniform_integer_cst_p instead of checking INTEGER_CST.
7905 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Likewise.
7906
79072024-05-27 Gaius Mulley <gaiusmod2@gmail.com>
7908
7909 * doc/gm2.texi: Replace all occurrences of xref
7910 {foo, , , gm2} with xref {foo}.
7911
79122024-05-27 Richard Biener <rguenther@suse.de>
7913
7914 * tree-ssa-structalias.cc (scc_visit): Mark the node we
7915 collapse to as being in a component.
7916
79172024-05-27 Richard Biener <rguenther@suse.de>
7918
7919 PR tree-optimization/115220
7920 PR tree-optimization/115226
7921 * tree-ssa-sink.cc (statement_sink_location): When ignoring
7922 paths to kills when sinking stores make sure the final
7923 sink location is still post-dominated by the original one.
7924 Otherwise we'd need to insert a PHI node to merge virtual operands.
7925
79262024-05-27 TheShermanTanker <tanksherman27@gmail.com>
7927
7928 * config/mingw/mingw32.h: Add new define for POSIX
7929 threads.
7930
79312024-05-27 Richard Biener <rguenther@suse.de>
7932
7933 PR tree-optimization/115232
7934 * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
7935 failure to demangle gracefully.
7936
79372024-05-27 Gerald Pfeifer <gerald@pfeifer.com>
7938
7939 * doc/gm2.texi (What is GNU Modula-2): Move gcc.gnu.org links to
7940 https.
7941 (Other languages): Ditto. And fix casing of GCC.
7942
79432024-05-27 Liao Shihua <shihua@iscas.ac.cn>
7944
7945 * config/riscv/riscv.cc (riscv_rtx_costs): Add TARGET_ZMMUL.
7946
79472024-05-27 Maciej W. Rozycki <macro@orcam.me.uk>
7948
7949 * doc/invoke.texi (Option Summary): Add `-md', `-md-float', and
7950 `-mg-float' options. Reorder, matching VAX Options.
7951 (VAX Options): Reword the description of `-mg' option. Add
7952 `-md', `-md-float', and `-mg-float' options.
7953
79542024-05-27 Abe Skolnik <abe_skolnik@yahoo.com>
7955
7956 PR target/79646
7957 * config/vax/vax.opt (md, md-float, mg, mg-float): Correct
7958 descriptions.
7959
79602024-05-27 Lyut Nersisyan <lyut.nersisyan@gmail.com>
7961
7962 * config/riscv/riscv.md (<optab>_shift_reverse<X:mode>): New pattern.
7963
79642024-05-27 Levy Hsu <admin@levyhsu.com>
7965 H.J. Lu <hjl.tools@gmail.com>
7966
7967 PR target/115146
7968 * config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): Replace arithmatic shift
7969 gen_ashrv4hi3 with logic shift gen_lshrv4hi3.
7970 Replace gen_vlshrv8hi3 with gen_lshrv8hi3 and gen_vashlv8hi3 with gen_ashlv8hi3.
7971
79722024-05-27 Pan Li <pan2.li@intel.com>
7973
7974 * genmatch.cc (dt_node::gen_kids_1): Fix indenet mis-aligned.
7975
79762024-05-26 Jeff Law <jlaw@ventanamicro.com>
7977
7978 * config/riscv/riscv.cc (riscv_build_integer_one): Verify there
7979 are no bits left to set in the constant when generating bseti.
7980 (riscv_built_integer): Synthesize ~value and if it's cheap use it
7981 with a trailing xori with -1.
7982
79832024-05-26 Gerald Pfeifer <gerald@pfeifer.com>
7984
7985 * doc/extend.texi (Attribute Syntax): Use @samp{=} instead of @code{=}.
7986 (Extended Asm): Ditto.
7987
79882024-05-26 Jeff Law <jlaw@ventanamicro.com>
7989
7990 * config/riscv/riscv.cc (riscv_build_integer_1): Try generating
7991 a nearby simpler constant, then using a final addi to set low
7992 bits properly.
7993
79942024-05-26 Andrew MacLeod <amacleod@redhat.com>
7995
7996 PR tree-optimization/115208
7997 * value-query.cc (range_query::create_gori): Confirm gori_map is NULL.
7998 (range_query::destroy_gori): Free gori_map if one was allocated.
7999
80002024-05-25 Jeff Law <jlaw@ventanamicro.com>
8001
8002 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Handle
8003 more logical simplifications.
8004
80052024-05-24 Jeff Law <jlaw@ventanamicro.com>
8006
8007 * config/riscv/predicates.md (arith_operand_or_mode_mask): Renamed to..
8008 (arith_or_mode_mask_or_zbs_operand): New predicate.
8009 * config/riscv/riscv.md (and<mode>3): Update predicate for operand 2.
8010 * config/riscv/riscv.cc (riscv_build_integer_1): Use bclri to clear
8011 bits, particularly bits 31..63 when profitable to do so.
8012
80132024-05-24 Richard Sandiford <richard.sandiford@arm.com>
8014
8015 PR tree-optimization/115192
8016 * tree-data-ref.cc (create_intersect_range_checks): Take the
8017 alignment of the access sizes into account.
8018
80192024-05-24 Gaius Mulley <gaiusmod2@gmail.com>
8020
8021 * doc/gm2.texi: Replace all occurrences of xref {, , , gm2}
8022 with xref {, , , m2}.
8023
80242024-05-24 Manolis Tsamis <manolis.tsamis@vrull.eu>
8025
8026 * match.pd: Allow no-op view_convert between permutes.
8027
80282024-05-24 Richard Biener <rguenther@suse.de>
8029
8030 PR tree-optimization/115144
8031 * tree-ssa-sink.cc (do_not_sink): New function, split out
8032 from ...
8033 (select_best_block): Here. First pick valid block to
8034 sink to. From that search for the best valid block,
8035 avoiding sinking across conditions to exceptional code.
8036 (sink_code_in_bb): When updating vuses of stores in
8037 paths we do not sink a store to make sure we didn't
8038 pick a dominating sink location.
8039
80402024-05-24 Andrew Pinski <quic_apinski@quicinc.com>
8041
8042 * tree-ssa-phiprop.cc (phiprop_insert_phi): Add
8043 dce_ssa_names argument. Add the phi's result to it.
8044 (propagate_with_phi): Add dce_ssa_names argument.
8045 Update call to phiprop_insert_phi.
8046 (pass_phiprop::execute): Update call to propagate_with_phi.
8047 Call simple_dce_from_worklist if there was a change.
8048
80492024-05-24 Richard Biener <rguenther@suse.de>
8050
8051 * tree-vect-slp.cc (vect_build_slp_instance): Do not split
8052 store dataref groups on loop SLP discovery failure but create
8053 a single SLP instance for the stores but branch to SLP sub-trees
8054 and merge with a series of VEC_PERM nodes.
8055
80562024-05-23 Andrew MacLeod <amacleod@redhat.com>
8057
8058 * gimple-range-edge.h (range_query::condexpr_adjust): Delete.
8059 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Use
8060 gori_ssa routine.
8061 (fold_using_range::range_of_address): Likewise.
8062 (fold_using_range::range_of_phi): Likewise.
8063 (fold_using_range::condexpr_adjust): Relocated from gori_compute.
8064 (fold_using_range::range_of_cond_expr): Use local condexpr_adjust.
8065 (fur_source::register_outgoing_edges): Use gori_ssa routine.
8066 * gimple-range-fold.h (gori_ssa): Rename from gori_bb.
8067 (fold_using_range::condexpr_adjust): Add prototype.
8068 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Relocate.
8069 * gimple-range-gori.h (gori_compute::condexpr_adjust): Delete.
8070
80712024-05-23 Andrew MacLeod <amacleod@redhat.com>
8072
8073 * gimple-range-cache.cc (ranger_cache::ranger_cache): Use gori_ssa.
8074 (ranger_cache::dump): Likewise.
8075 (ranger_cache::get_global_range): Likewise.
8076 (ranger_cache::set_global_range): Likewise.
8077 (ranger_cache::register_inferred_value): Likewise.
8078 * gimple-range-edge.h (gimple_outgoing_range::map): Remove.
8079 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Use
8080 gori_ssa.
8081 (fold_using_range::range_of_address): Likewise.
8082 (fold_using_range::range_of_phi): Likewise.
8083 (fur_source::register_outgoing_edges): Likewise.
8084 * gimple-range-fold.h (fur_source::query): Make const.
8085 (gori_ssa): New.
8086 * gimple-range-gori.cc (gori_map::dump): Use 'this' pointer.
8087 (gori_compute::gori_compute): Construct with a gori_map.
8088 * gimple-range-gori.h (gori_compute:gori_compute): Change
8089 prototype.
8090 (gori_compute::map): Delete.
8091 (gori_compute::m_map): Change to a reference.
8092 (FOR_EACH_GORI_IMPORT_NAME): Change parameter gori to gorimap.
8093 (FOR_EACH_GORI_EXPORT_NAME): Likewise.
8094 * gimple-range-path.cc (path_range_query::compute_ranges_in_block):
8095 Use gori_ssa method.
8096 (path_range_query::compute_exit_dependencies): Likewise.
8097 * gimple-range.cc (gimple_ranger::range_of_stmt): Likewise.
8098 (gimple_ranger::register_transitive_inferred_ranges): Likewise.
8099 * tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges):
8100 Likewise.
8101 * tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
8102 * tree-vrp.cc (remove_unreachable::handle_early): Likewise.
8103 (remove_unreachable::remove_and_update_globals): Likewise.
8104 * value-query.cc (range_query::create_gori): Create gori map.
8105 (range_query::share_query): Copy gori map member.
8106 (range_query::range_query): Initiialize gori_map member.
8107 * value-query.h (range_query::gori_ssa): New.
8108 (range_query::m_map): New.
8109
81102024-05-23 Andrew MacLeod <amacleod@redhat.com>
8111
8112 * gimple-range-cache.cc (ranger_cache::ranger_cache): Create
8113 GORi via the range_query instead of a local member.
8114 (ranger_cache::dump_bb): Use gori via from the range_query parent.
8115 (ranger_cache::get_global_range): Likewise.
8116 (ranger_cache::set_global_range): Likewise.
8117 (ranger_cache::edge_range): Likewise.
8118 (anger_cache::block_range): Likewise.
8119 (ranger_cache::fill_block_cache): Likewise.
8120 (ranger_cache::range_from_dom): Likewise.
8121 (ranger_cache::register_inferred_value): Likewise.
8122 * gimple-range-cache.h (ranger_cache::m_gori): Delete.
8123 * gimple-range-fold.cc (fur_source::fur_source): Set m_depend_p.
8124 (fur_depend::fur_depend): Remove gori parameter.
8125 * gimple-range-fold.h (fur_source::gori): Adjust.
8126 (fur_source::m_gori): Delete.
8127 (fur_source::m_depend): New.
8128 (fur_depend::fur_depend): Adjust prototype.
8129 * gimple-range-path.cc (path_range_query::path_range_query): Share
8130 ranger oracles.
8131 (path_range_query::range_defined_in_block): Use oracle directly.
8132 (path_range_query::compute_ranges_in_block): Use new gori() method.
8133 (path_range_query::adjust_for_non_null_uses): Use oracle directly.
8134 (path_range_query::compute_exit_dependencies): Likewise.
8135 (jt_fur_source::jt_fur_source): No gori in the parameters.
8136 (path_range_query::range_of_stmt): Likewise.
8137 (path_range_query::compute_outgoing_relations): Likewise.
8138 * gimple-range.cc (gimple_ranger::fold_range_internal): Likewise.
8139 (gimple_ranger::range_of_stmt): Access gori via gori () method.
8140 (assume_query::range_of_expr): Create a gori object.
8141 (assume_query::~assume_query): Destroy a gori object.
8142 (assume_query::calculate_op): Remove old gori() accessor.
8143 * gimple-range.h (gimple_ranger::gori): Delete.
8144 (assume_query::~assume_query): New.
8145 (assume_query::m_gori): Delete.
8146 * tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges): use
8147 gori () method.
8148 * tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
8149 * value-query.cc (default_gori): New.
8150 (range_query::create_gori): New.
8151 (range_query::destroy_gori): New.
8152 (range_query::share_oracles): Set m_gori.
8153 (range_query::range_query): Set m_gori to default.
8154 (range_query::~range_query): call destroy gori.
8155 * value-query.h (range_query): Adjust prototypes
8156 (range_query::m_gori): New.
8157
81582024-05-23 Andrew MacLeod <amacleod@redhat.com>
8159
8160 * gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust
8161 m_gori constructor.
8162 (ranger_cache::edge_range): Use renamed edge_range_p name.
8163 (ranger_cache::range_from_dom): Likewise.
8164 * gimple-range-edge.h (gimple_outgoing_range::condexpr_adjust): New.
8165 (gimple_outgoing_range::has_edge_range_p): New.
8166 (gimple_outgoing_range::dump): New.
8167 (gimple_outgoing_range::compute_operand_range): New.
8168 (gimple_outgoing_range::map): New.
8169 * gimple-range-fold.cc (fur_source::register_outgoing_edges ): Use
8170 renamed edge_range_p routine
8171 * gimple-range-gori.cc (gori_compute::gori_compute): Adjust
8172 constructor.
8173 (gori_compute::~gori_compute): New.
8174 (gori_compute::edge_range_p): Rename from outgoing_edge_range_p
8175 and use inherited routine instead of member method.
8176 * gimple-range-gori.h (class gori_compute): Inherit from
8177 gimple_outgoing_range, adjust protoypes.
8178 (gori_compute::outgpoing): Delete.
8179 * gimple-range-path.cc (path_range_query::compute_ranges_in_block): Use
8180 renamed edge_range_p routine.
8181 * tree-ssa-loop-unswitch.cc (evaluate_control_stmt_using_entry_checks):
8182 Likewise.
8183
81842024-05-23 Andrew MacLeod <amacleod@redhat.com>
8185
8186 * gimple-range-cache.cc (ranger_cache::ranger_cache): Access
8187 gori_map via member call.
8188 (ranger_cache::dump_bb): Likewise.
8189 (ranger_cache::get_global_range): Likewise.
8190 (ranger_cache::set_global_range): Likewise.
8191 (ranger_cache::register_inferred_value): Likewise.
8192 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Likewise.
8193 (fold_using_range::range_of_address): Likewise.
8194 (fold_using_range::range_of_phi): Likewise.
8195 * gimple-range-gori.cc (gori_compute::compute_operand_range_switch):
8196 likewise.
8197 (gori_compute::compute_operand_range): Likewise.
8198 (gori_compute::compute_logical_operands): Likewise.
8199 (gori_compute::refine_using_relation): Likewise.
8200 (gori_compute::compute_operand1_and_operand2_range): Likewise.
8201 (gori_compute::may_recompute_p): Likewise.
8202 (gori_compute::has_edge_range_p): Likewise.
8203 (gori_compute::outgoing_edge_range_p): Likewise.
8204 (gori_compute::condexpr_adjust): Likewise.
8205 * gimple-range-gori.h (class gori_compute): Do not inherit from
8206 gori_map.
8207 (gori_compute::m_map): New.
8208 * gimple-range-path.cc (gimple-range-path.cc): Use gori_map member.
8209 (path_range_query::compute_exit_dependencies): Likewise.
8210 * gimple-range.cc (gimple_ranger::range_of_stmt): Likewise.
8211 (gimple_ranger::register_transitive_inferred_ranges): Likewise.
8212 * tree-ssa-dom.cc (set_global_ranges_from_unreachable_edges): Likewise.
8213 * tree-ssa-threadedge.cc (compute_exit_dependencies): Likewise.
8214 * tree-vrp.cc (remove_unreachable::handle_early): Likewise.
8215 (remove_unreachable::remove_and_update_globals): Likewise.
8216
82172024-05-23 Andrew MacLeod <amacleod@redhat.com>
8218
8219 * gimple-range-edge.cc (gimple_outgoing_range::gimple_outgoing_range):
8220 Do not allocate a range allocator at construction time.
8221 (gimple_outgoing_range::~gimple_outgoing_range): Delete allocator
8222 if one was allocated.
8223 (gimple_outgoing_range::set_switch_limit): New.
8224 (gimple_outgoing_range::switch_edge_range): Create an allocator if one
8225 does not exist.
8226 (gimple_outgoing_range::edge_range_p): Check for zero edges.
8227 * gimple-range-edge.h (class gimple_outgoing_range): Adjust prototypes.
8228
82292024-05-23 Andrew MacLeod <amacleod@redhat.com>
8230
8231 PR tree-optimization/113879
8232 * gimple-range-fold.cc (op1_range): New.
8233 (op2_range): New.
8234 * gimple-range-fold.h (op1_range): New prototypes.
8235 (op2_range): New prototypes.
8236 * gimple-range-infer.cc (gimple_infer_range::add_range): Do not
8237 add an inferred range if it is VARYING.
8238 (gimple_infer_range::gimple_infer_range): Add inferred ranges
8239 for any range-op statements if requested.
8240 * gimple-range-infer.h (gimple_infer_range): Add parameter.
8241
82422024-05-23 Andrew MacLeod <amacleod@redhat.com>
8243
8244 * gimple-range-cache.cc (ranger_cache::ranger_cache): Create an infer
8245 oracle instead of a local member.
8246 (ranger_cache::~ranger_cache): Destroy the oracle.
8247 (ranger_cache::edge_range): Use oracle.
8248 (ranger_cache::fill_block_cache): Likewise.
8249 (ranger_cache::range_from_dom): Likewise.
8250 (ranger_cache::apply_inferred_ranges): Likewise.
8251 * gimple-range-cache.h (ranger_cache::m_exit): Delete.
8252 * gimple-range-infer.cc (infer_oracle): New static object;
8253 (class infer_oracle): New.
8254 (non_null_wrapper::non_null_wrapper): New.
8255 (non_null_wrapper::add_nonzero): New.
8256 (non_null_wrapper::add_range): New.
8257 (non_null_loadstore): Use nonnull_wrapper.
8258 (gimple_infer_range::gimple_infer_range): New alternate constructor.
8259 (exit_range::stmt): New.
8260 (infer_range_manager::has_range_p): Combine seperate methods.
8261 (infer_range_manager::maybe_adjust_range): Adjust has_range_p call.
8262 (infer_range_manager::add_ranges): New.
8263 (infer_range_manager::add_range): Take stmt rather than BB.
8264 (infer_range_manager::add_nonzero): Adjust from BB to stmt.
8265 * gimple-range-infer.h (class gimple_infer_range): Adjust methods.
8266 (infer_range_oracle): New.
8267 (class infer_range_manager): Inherit from infer_range_oracle.
8268 Adjust methods.
8269 * gimple-range-path.cc (path_range_query::range_defined_in_block): Use
8270 oracle.
8271 (path_range_query::adjust_for_non_null_uses): Likewise.
8272 * gimple-range.cc (gimple_ranger::range_on_edge): Likewise
8273 (gimple_ranger::register_transitive_inferred_ranges): Likewise.
8274 * value-query.cc (default_infer_oracle): New.
8275 (range_query::create_infer_oracle): New.
8276 (range_query::destroy_infer_oracle): New.
8277 (range_query::share_query): Copy infer pointer.
8278 (range_query::range_query): Initialize infer pointer.
8279 (range_query::~range_query): destroy infer object.
8280 * value-query.h (range_query::infer_oracle): New.
8281 (range_query::create_infer_oracle): New prototype.
8282 (range_query::destroy_infer_oracle): New prototype.
8283 (range_query::m_infer): New.
8284
82852024-05-23 Andrew MacLeod <amacleod@redhat.com>
8286
8287 * gimple-range.cc (gimple_ranger::gimple_ranger): Share the
8288 components from ranger_cache.
8289 (gimple_ranger::~gimple_ranger): Don't clear pointer.
8290 * value-query.cc (range_query::share_query): New.
8291 (range_query::range_query): Clear shared component flag.
8292 (range_query::~range_query): Don't free shared component copies.
8293 * value-query.h (share_query): New prototype.
8294 (m_shared_copy_p): New member.
8295
82962024-05-23 Andrew MacLeod <amacleod@redhat.com>
8297
8298 * gimple-range-cache.cc (ranger_cache::dump_bb): Use m_relation.
8299 (ranger_cache::fill_block_cache): Likewise
8300 * gimple-range-fold.cc (fur_stmt::get_phi_operand): Use new names.
8301 (fur_depend::register_relation): Likewise.
8302 (fold_using_range::range_of_phi): Likewise.
8303 * gimple-range-path.cc (path_range_query::path_range_query): Likewise.
8304 (path_range_query::~path_range_query): Likewise.
8305 (ath_range_query::compute_ranges): Likewise.
8306 (jt_fur_source::register_relation): Likewise.
8307 (jt_fur_source::query_relation): Likewise.
8308 (path_range_query::maybe_register_phi_relation): Likewise.
8309 * gimple-range-path.h (get_path_oracle): Likewise.
8310 * gimple-range.cc (gimple_ranger::gimple_ranger): Likewise.
8311 (gimple_ranger::~gimple_ranger): Likewise.
8312 * value-query.cc (range_query::create_relation_oracle): Likewise.
8313 (range_query::destroy_relation_oracle): Likewise.
8314 (range_query::share_oracles): Likewise.
8315 (range_query::range_query): Likewise.
8316 * value-query.h (value_query::relation): Rename from oracle.
8317 (m_relation): Rename from m_oracle.
8318 * value-relation.cc (relation_oracle::query): Rename from
8319 query_relation.
8320 (equiv_oracle::query): Likewise.
8321 (equiv_oracle::record): Rename from register_relation.
8322 (relation_oracle::record): Likewise.
8323 (dom_oracle::record): Likewise.
8324 (dom_oracle::query): Rename from query_relation.
8325 (path_oracle::record): Rename from register_relation.
8326 (path_oracle::query): Rename from query_relation.
8327 * value-relation.h (*::record): Rename from register_relation.
8328 (*::query): Rename from query_relation.
8329
83302024-05-23 Andrew MacLeod <amacleod@redhat.com>
8331
8332 * gimple-range-cache.cc (ranger_cache::dump_bb): Remove check for
8333 NULL oracle pointer.
8334 (ranger_cache::fill_block_cache): Likewise.
8335 * gimple-range-fold.cc (fur_stmt::get_phi_operand): Likewise.
8336 (fur_depend::fur_depend): Likewise.
8337 (fur_depend::register_relation): Likewise, use qury_relation.
8338 (fold_using_range::range_of_phi): Likewise.
8339 (fold_using_range::relation_fold_and_or): Likewise.
8340 * gimple-range-fold.h (fur_source::m_oracle): Delete. Oracle
8341 can be accessed dirctly via m_query now.
8342 * gimple-range-path.cc (path_range_query::path_range_query):
8343 Adjust for oracle reference pointer.
8344 (path_range_query::compute_ranges): Likewise.
8345 (jt_fur_source::jt_fur_source): Adjust for no m_oracle member.
8346 (jt_fur_source::register_relation): Do not check for NULL
8347 pointer.
8348 (jt_fur_source::query_relation): Likewise.
8349 * gimple-range.cc (gimple_ranger::gimple_ranger): Adjust for
8350 reference pointer.
8351 * value-query.cc (default_relation_oracle): New.
8352 (range_query::create_relation_oracle): Relocate from header.
8353 Ensure not being added to global query.
8354 (range_query::destroy_relation_oracle): Relocate from header.
8355 (range_query::range_query): Initailize to default oracle.
8356 (ange_query::~range_query): Call destroy_relation_oracle.
8357 * value-query.h (class range_query): Adjust prototypes.
8358 (range_query::create_relation_oracle): Move to source file.
8359 (range_query::destroy_relation_oracle): Move to source file.
8360 * value-relation.cc (relation_oracle::validate_relation): Delete.
8361 (relation_oracle::register_stmt): Rename to register_relation.
8362 (relation_oracle::register_edge): Likewise.
8363 * value-relation.h (register_stmt): Rename to register_relation and
8364 provide default function in base class.
8365 (register_edge): Likewise.
8366 (relation_oracle::validate_relation): Delete.
8367 (relation_oracle::query_relation): Provide default in base class.
8368 (relation_oracle::dump): Likewise.
8369 (relation_oracle::equiv_set): Likewise.
8370 (default_relation_oracle): New extenal reference.
8371 (partial_equiv_set, add_partial_equiv): Move to protected.
8372
83732024-05-23 Andrew MacLeod <amacleod@redhat.com>
8374
8375 * gimple-range-cache.cc (ranger_cache::ranger_cache): Call
8376 create_relation_oracle.
8377 (ranger_cache::~ranger_cache): Call destroy_relation_oracle.
8378 * gimple-range-fold.cc (fur_stmt::get_phi_operand): Check for
8379 relation oracle bnefore calling query_relation.
8380 (fold_using_range::range_of_phi): Likewise.
8381 * gimple-range-path.cc (path_range_query::~path_range_query): Set
8382 relation oracle pointer to NULL when done.
8383 * gimple-range.cc (gimple_ranger::~gimple_ranger): Likewise.
8384 * value-query.cc (range_query::~range_query): Ensure any
8385 relation oracle is destroyed.
8386 (range_query::query_relation): relocate to relation_oracle object.
8387 * value-query.h (class range_query): Adjust method proototypes.
8388 (range_query::create_relation_oracle): New.
8389 (range_query::destroy_relation_oracle): New.
8390 * value-relation.cc (relation_oracle::query_relation): Relocate
8391 from range query class.
8392 * value-relation.h (Call relation_oracle): New prototypes.
8393
83942024-05-23 Pan Li <pan2.li@intel.com>
8395
8396 * generic-match-head.cc (types_match): Add overloaded types_match
8397 for 3 types.
8398 * gimple-match-head.cc (types_match): Ditto.
8399 * match.pd: Leverage overloaded types_match.
8400
84012024-05-23 Richard Biener <rguenther@suse.de>
8402
8403 PR tree-optimization/115197
8404 * tree-loop-distribution.cc (copy_loop_before): Constant PHI
8405 args remain the same.
8406
84072024-05-23 Richard Biener <rguenther@suse.de>
8408
8409 PR tree-optimization/115199
8410 * tree-ssa-structalias.cc (process_constraint): Also
8411 record &ANYTHING = X as *ANYTING = X in the end.
8412
84132024-05-23 Richard Biener <rguenther@suse.de>
8414
8415 PR tree-optimization/115138
8416 * tree-ssa-alias.cc (ptrs_compare_unequal): Make sure
8417 pt.vars_contains_nonlocal differs since we do not represent
8418 FUNCTION_DECLs or LABEL_DECLs in vars explicitly.
8419
84202024-05-23 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
8421
8422 PR target/109549
8423 * config/s390/s390.cc (TARGET_NOCE_CONVERSION_PROFITABLE_P):
8424 Define.
8425 (s390_noce_conversion_profitable_p): Implement.
8426
84272024-05-23 Aldy Hernandez <aldyh@redhat.com>
8428
8429 PR tree-optimization/115191
8430 * tree-ssa-phiopt.cc (value_replacement): Use Value_Range instead
8431 of int_range_max.
8432
84332024-05-23 Andrew Pinski <quic_apinski@quicinc.com>
8434 Joel Jones <quic_joeljone@quicinc.com>
8435 Wei Zhao <quic_wezhao@quicinc.com>
8436
8437 * config/aarch64/aarch64-cores.def (oryon-1): New entry.
8438 * config/aarch64/aarch64-tune.md: Regenerate.
8439 * doc/invoke.texi (AArch64 Options): Document oryon-1.
8440
84412024-05-22 Pengxuan Zheng <quic_pzheng@quicinc.com>
8442
8443 PR target/102171
8444 * config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_HIGH_BUILTINS):
8445 New macro to create definitions for all vget_high intrinsics.
8446 (VGET_HIGH_BUILTIN): Likewise.
8447 (enum aarch64_builtins): Add vget_high function codes.
8448 (AARCH64_SIMD_VGET_LOW_BUILTINS): Delete duplicate macro.
8449 (aarch64_general_fold_builtin): Fold vget_high calls.
8450 * config/aarch64/aarch64-simd-builtins.def: Delete vget_high builtins.
8451 * config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Delete.
8452 (aarch64_vget_hi_halfv8bf): Likewise.
8453 * config/aarch64/arm_neon.h (__attribute__): Delete.
8454 (vget_high_f16): Likewise.
8455 (vget_high_f32): Likewise.
8456 (vget_high_f64): Likewise.
8457 (vget_high_p8): Likewise.
8458 (vget_high_p16): Likewise.
8459 (vget_high_p64): Likewise.
8460 (vget_high_s8): Likewise.
8461 (vget_high_s16): Likewise.
8462 (vget_high_s32): Likewise.
8463 (vget_high_s64): Likewise.
8464 (vget_high_u8): Likewise.
8465 (vget_high_u16): Likewise.
8466 (vget_high_u32): Likewise.
8467 (vget_high_u64): Likewise.
8468 (vget_high_bf16): Likewise.
8469
84702024-05-22 Eric Botcazou <ebotcazou@adacore.com>
8471
8472 PR rtl-optimization/115038
8473 * fold-mem-offsets.cc (fold_offsets): Return 0 if the defining
8474 instruction of the register is frame related.
8475
84762024-05-22 Roger Sayle <roger@nextmovesoftware.com>
8477
8478 * config/i386/i386.cc (ix86_rtx_costs) <case CONST_INT>:
8479 A CONST_INT that isn't x86_64_immediate_operand requires an extra
8480 (expensive) movabsq insn to load, so return COSTS_N_INSNS (1) + 1.
8481
84822024-05-22 Roger Sayle <roger@nextmovesoftware.com>
8483
8484 * except.cc (output_function_exception_table): Move call to
8485 get_personality_function after targetm_common.except_unwind_info
8486 check, to avoid ICE on targets that don't support exceptions.
8487
84882024-05-22 Richard Biener <rguenther@suse.de>
8489
8490 * tree-vect-slp.cc (change_vec_perm_layout): Ignore an
8491 input partition of -1.
8492
84932024-05-22 Richard Biener <rguenther@suse.de>
8494
8495 * tree-vect-slp.cc (vect_schedule_slp_node): Avoid looking
8496 at SLP_REPRESENTATIVE for VEC_PERM nodes.
8497
84982024-05-22 Richard Biener <rguenther@suse.de>
8499
8500 * tree-vect-stmts.cc (vect_check_store_rhs): Look at *rhs
8501 only when it's a vec_constant_def.
8502 (vect_is_simple_use): When we have no representative for
8503 an internal node, fill in *op with error_mark_node.
8504
85052024-05-22 Richard Biener <rguenther@suse.de>
8506
8507 * doc/invoke.texi (C++ Modules): Fix typo.
8508
85092024-05-22 Jakub Jelinek <jakub@redhat.com>
8510
8511 PR tree-optimization/115152
8512 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes_addr): If
8513 !si->full_string_p, clear *nulterm and set maxlen to nbytes.
8514
85152024-05-22 Jakub Jelinek <jakub@redhat.com>
8516
8517 PR sanitizer/115172
8518 * ubsan.cc (instrument_bool_enum_load): If rhs is not in generic
8519 address space, use qualified version of utype with the right
8520 address space. Formatting fix.
8521
85222024-05-22 Haochen Jiang <haochen.jiang@intel.com>
8523
8524 PR target/115069
8525 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
8526 Do not enable the optimization when AVX512BW is not enabled.
8527
85282024-05-21 Vineet Gupta <vineetg@rivosinc.com>
8529
8530 * config/riscv/riscv.cc (riscv_expand_epilogue): Handle offset
8531 being sum of two S12.
8532
85332024-05-21 Vineet Gupta <vineetg@rivosinc.com>
8534
8535 PR target/105733
8536 * config/riscv/riscv.h: New macros for with aligned offsets.
8537 * config/riscv/riscv.cc (riscv_split_sum_of_two_s12): New
8538 function to split a sum of two s12 values into constituents.
8539 (riscv_expand_prologue): Handle offset being sum of two S12.
8540 (riscv_expand_epilogue): Ditto.
8541 * config/riscv/riscv-protos.h (riscv_split_sum_of_two_s12): New.
8542
85432024-05-21 Andrew Pinski <quic_apinski@quicinc.com>
8544
8545 PR tree-optimization/115154
8546 * match.pd (convert (mult zero_one_valued_p@1 INTEGER_CST@2)): Disable
8547 for 1bit signed types.
8548
85492024-05-21 Richard Biener <rguenther@suse.de>
8550
8551 PR tree-optimization/115137
8552 * tree-ssa-structalias.cc (pt_solution_includes_const_pool): NONLOCAL
8553 also includes constant pool entries.
8554
85552024-05-21 Richard Sandiford <richard.sandiford@arm.com>
8556
8557 * hard-reg-set.h (target_hard_regs::x_eh_return_data_regs): New field.
8558 (eh_return_data_regs): New macro.
8559 * reginfo.cc (init_reg_sets_1): Initialize x_eh_return_data_regs.
8560 * df-scan.cc (df_get_exit_block_use_set): Use it.
8561 * ira-lives.cc (process_out_of_region_eh_regs): Likewise.
8562
85632024-05-21 Richard Biener <rguenther@suse.de>
8564
8565 PR tree-optimization/115149
8566 * tree-ssa-live.cc (virtual_operand_live::get_live_in):
8567 Explicitly track the first processed edge.
8568
85692024-05-21 liuhongt <hongtao.liu@intel.com>
8570
8571 PR target/114427
8572 * config/i386/i386-expand.cc (expand_vec_perm_even_odd_pack):
8573 Use pblendw instead of pand to clear upper bits.
8574
85752024-05-21 Kewen Lin <linkw@linux.ibm.com>
8576
8577 * config/rs6000/rs6000.md (@ieee_128bit_vsx_neg<IEEE128>2): Remove
8578 the use of operands[3].
8579 (@ieee_128bit_vsx_neg<IEEE128>2): Likewise.
8580 (*ieee_128bit_vsx_nabs<mode>2): Likewise.
8581
85822024-05-21 Kewen Lin <linkw@linux.ibm.com>
8583
8584 * config/rs6000/rs6000.md (mode attribute rreg): Remove useless
8585 entries with modes TF, TD, V4SF and V2DF.
8586
85872024-05-21 Kewen Lin <linkw@linux.ibm.com>
8588
8589 * config/rs6000/vector.md (define_expand vector_load_<mode>): Remove.
8590 (vector_store_<mode>): Likewise.
8591
85922024-05-21 Kewen Lin <linkw@linux.ibm.com>
8593
8594 * config/rs6000/rs6000-call.cc (rs6000_darwin64_record_arg_recurse):
8595 Clean up TFmode and TDmode check with FLOAT128_2REG_P.
8596
85972024-05-21 Kewen Lin <linkw@linux.ibm.com>
8598
8599 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
8600 useless check on TARGET_P8_VECTOR && !TARGET_ALTIVEC and add an
8601 assertion on !TARGET_VSX if !TARGET_ALTIVEC.
8602
86032024-05-21 Kewen Lin <linkw@linux.ibm.com>
8604
8605 PR target/114402
8606 * config/rs6000/rs6000.cc (rs6000_generate_compare): Make IEEE128
8607 handling without vsx go with libcall.
8608
86092024-05-20 Andrew Pinski <quic_apinski@quicinc.com>
8610
8611 PR tree-optimization/115143
8612 * tree-ssa-phiopt.cc (minmax_replacement): Check for empty
8613 phi nodes for middle bbs for the case where middle bb is not empty.
8614
86152024-05-20 Pengxuan Zheng <quic_pzheng@quicinc.com>
8616
8617 PR target/102171
8618 * config/aarch64/aarch64-builtins.cc (AARCH64_SIMD_VGET_LOW_BUILTINS):
8619 New macro to create definitions for all vget_low intrinsics.
8620 (VGET_LOW_BUILTIN): Likewise.
8621 (enum aarch64_builtins): Add vget_low function codes.
8622 (aarch64_general_fold_builtin): Fold vget_low calls.
8623 * config/aarch64/aarch64-simd-builtins.def: Delete vget_low builtins.
8624 * config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Delete.
8625 (aarch64_vget_lo_halfv8bf): Likewise.
8626 * config/aarch64/arm_neon.h (__attribute__): Delete.
8627 (vget_low_f16): Likewise.
8628 (vget_low_f32): Likewise.
8629 (vget_low_f64): Likewise.
8630 (vget_low_p8): Likewise.
8631 (vget_low_p16): Likewise.
8632 (vget_low_p64): Likewise.
8633 (vget_low_s8): Likewise.
8634 (vget_low_s16): Likewise.
8635 (vget_low_s32): Likewise.
8636 (vget_low_s64): Likewise.
8637 (vget_low_u8): Likewise.
8638 (vget_low_u16): Likewise.
8639 (vget_low_u32): Likewise.
8640 (vget_low_u64): Likewise.
8641 (vget_low_bf16): Likewise.
8642
86432024-05-20 Wilco Dijkstra <wilco.dijkstra@arm.com>
8644
8645 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Improve CTZ costing.
8646
86472024-05-20 Wilco Dijkstra <wilco.dijkstra@arm.com>
8648
8649 * config/aarch64/aarch64.md (movsi_aarch64): Use '\;' to force
8650 newline in 2-instruction pattern.
8651 (movdi_aarch64): Likewise.
8652
86532024-05-20 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
8654
8655 * config/aarch64/aarch64-ldp-fusion.cc: Rename generic parts of code
8656 to avoid "ldp" and "stp".
8657
86582024-05-20 Mark Wielaard <mark@klomp.org>
8659
8660 * config/riscv/riscv.opt.urls: Regenerate.
8661 * config/i386/i386.opt.urls: Likewise.
8662
86632024-05-20 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
8664
8665 * config/aarch64/aarch64-ldp-fusion.cc: Factor out a
8666 target-independent interface and move it to the head of the file
8667
86682024-05-20 YunQiang Su <syq@gcc.gnu.org>
8669
8670 * config/mips/mips.cc(mips_option_override):
8671 Drop mips_lra_flag variable;
8672 (mips_lra_p): Removed.
8673 (TARGET_LRA_P): Remove definition here to use the default one.
8674 * config/mips/mips.md(*mul_acc_si, *mul_acc_si_r3900, *mul_sub_si):
8675 Drop mips_lra_flag variable.
8676 * config/mips/mips.opt(-mlra): Removed.
8677 * config/mips/mips.opt.urls(mlra): Removed.
8678
86792024-05-20 Haochen Jiang <haochen.jiang@intel.com>
8680
8681 * common/config/i386/cpuinfo.h
8682 (get_intel_cpu): Remove Xeon Phi cpus.
8683 (get_available_features): Remove Xeon Phi ISAs.
8684 * common/config/i386/i386-common.cc
8685 (OPTION_MASK_ISA_AVX512PF_SET): Removed.
8686 (OPTION_MASK_ISA_AVX512ER_SET): Ditto.
8687 (OPTION_MASK_ISA2_AVX5124FMAPS_SET): Ditto.
8688 (OPTION_MASK_ISA2_AVX5124VNNIW_SET): Ditto.
8689 (OPTION_MASK_ISA_PREFETCHWT1_SET): Ditto.
8690 (OPTION_MASK_ISA_AVX512F_UNSET): Remove AVX512PF and AVX512ER.
8691 (OPTION_MASK_ISA_AVX512PF_UNSET): Removed.
8692 (OPTION_MASK_ISA_AVX512ER_UNSET): Ditto.
8693 (OPTION_MASK_ISA2_AVX5124FMAPS_UNSET): Ditto.
8694 (OPTION_MASK_ISA2_AVX5124VNNIW_UNSET): Ditto.
8695 (OPTION_MASK_ISA_PREFETCHWT1_UNSET): Ditto.
8696 (OPTION_MASK_ISA2_AVX512F_UNSET): Remove AVX5124FMAPS and
8697 AVX5125VNNIW.
8698 (ix86_handle_option): Remove Xeon Phi options.
8699 (processor_names): Remove Xeon Phi cpus.
8700 (processor_alias_table): Ditto.
8701 * common/config/i386/i386-cpuinfo.h
8702 (enum processor_types): Ditto.
8703 (enum processor_features): Remove Xeon Phi ISAs.
8704 * common/config/i386/i386-isas.h: Ditto.
8705 * config.gcc: Remove Xeon Phi cpus and ISAs.
8706 * config/i386/avx5124fmapsintrin.h: Remove intrin support.
8707 * config/i386/avx5124vnniwintrin.h: Ditto.
8708 * config/i386/avx512erintrin.h: Ditto.
8709 * config/i386/avx512pfintrin.h: Ditto.
8710 * config/i386/cpuid.h (bit_AVX512PF): Removed.
8711 (bit_AVX512ER): Ditto.
8712 (bit_PREFETCHWT1): Ditto.
8713 (bit_AVX5124VNNIW): Ditto.
8714 (bit_AVX5124FMAPS): Ditto.
8715 * config/i386/driver-i386.cc
8716 (host_detect_local_cpu): Remove Xeon Phi.
8717 * config/i386/i386-builtin-types.def: Remove unused types.
8718 * config/i386/i386-builtin.def (BDESC): Remove builtins.
8719 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins): Ditto.
8720 * config/i386/i386-c.cc (ix86_target_macros_internal): Remove Xeon
8721 Phi cpus and ISAs.
8722 * config/i386/i386-expand.cc (ix86_expand_builtin): Remove Xeon Phi
8723 related handlers.
8724 (ix86_emit_swdivsf): Ditto.
8725 (ix86_emit_swsqrtsf): Ditto.
8726 * config/i386/i386-isa.def: Remove Xeon Phi ISAs.
8727 * config/i386/i386-options.cc (m_KNL): Removed.
8728 (m_KNM): Ditto.
8729 (isa2_opts): Remove Xeon Phi ISAs.
8730 (isa_opts): Ditto.
8731 (processor_cost_table): Remove Xeon Phi cpus.
8732 (ix86_valid_target_attribute_inner_p): Remove Xeon Phi ISAs.
8733 (ix86_option_override_internal): Remove Xeon Phi related handlers.
8734 * config/i386/i386-rust.cc (ix86_rust_target_cpu_info): Remove Xeon
8735 Phi ISAs.
8736 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Remove Xeon Phi
8737 related handler.
8738 * config/i386/i386.h (TARGET_EMIT_VZEROUPPER): Removed.
8739 (enum processor_type): Remove Xeon Phi cpus.
8740 * config/i386/i386.md (prefetch): Remove PREFETCHWT1.
8741 (*prefetch_3dnow): Ditto.
8742 (*prefetch_prefetchwt1): Removed.
8743 * config/i386/i386.opt: Remove Xeon Phi ISAs.
8744 * config/i386/immintrin.h: Ditto.
8745 * config/i386/sse.md (VF1_AVX512ER_128_256): Removed.
8746 (rsqrt<mode>2): Change iterator from VF1_AVX512ER_128_256 to
8747 VF1_128_256.
8748 (GATHER_SCATTER_SF_MEM_MODE): Removed.
8749 (avx512pf_gatherpf<mode>sf): Ditto.
8750 (*avx512pf_gatherpf<VI48_512:mode>sf_mask): Ditto.
8751 (avx512pf_gatherpf<mode>df): Ditto.
8752 (*avx512pf_gatherpf<VI4_256_8_512:mode>df_mask): Ditto.
8753 (avx512pf_scatterpf<mode>sf): Ditto.
8754 (*avx512pf_scatterpf<VI48_512:mode>sf_mask): Ditto.
8755 (avx512pf_scatterpf<mode>df): Ditto.
8756 (*avx512pf_scatterpf<VI4_256_8_512:mode>df_mask): Ditto.
8757 (exp2<mode>2): Ditto.
8758 (avx512er_exp2<mode><mask_name><round_saeonly_name>): Ditto.
8759 (<mask_codefor>avx512er_rcp28<mode><mask_name><round_saeonly_name>):
8760 Ditto.
8761 (avx512er_vmrcp28<mode><mask_name><round_saeonly_name>): Ditto.
8762 (<mask_codefor>avx512er_rsqrt28<mode><mask_name><round_saeonly_name>):
8763 Ditto.
8764 (avx512er_vmrsqrt28<mode><mask_name><round_saeonly_name>): Ditto.
8765 (IMOD4): Ditto.
8766 (imod4_narrow): Ditto.
8767 (mov<mode>): Ditto.
8768 (*mov<mode>_internal): Ditto.
8769 (avx5124fmaddps_4fmaddps): Ditto.
8770 (avx5124fmaddps_4fmaddps_mask): Ditto.
8771 (avx5124fmaddps_4fmaddps_maskz): Ditto.
8772 (avx5124fmaddps_4fmaddss): Ditto.
8773 (avx5124fmaddps_4fmaddss_mask): Ditto.
8774 (avx5124fmaddps_4fmaddss_maskz): Ditto.
8775 (avx5124fmaddps_4fnmaddps): Ditto.
8776 (avx5124fmaddps_4fnmaddps_mask): Ditto.
8777 (avx5124fmaddps_4fnmaddps_maskz): Ditto.
8778 (avx5124fmaddps_4fnmaddss): Ditto.
8779 (avx5124fmaddps_4fnmaddss_mask): Ditto.
8780 (avx5124fmaddps_4fnmaddss_maskz): Ditto.
8781 (avx5124vnniw_vp4dpwssd): Ditto.
8782 (avx5124vnniw_vp4dpwssd_mask): Ditto.
8783 (avx5124vnniw_vp4dpwssd_maskz): Ditto.
8784 (avx5124vnniw_vp4dpwssds): Ditto.
8785 (avx5124vnniw_vp4dpwssds_mask): Ditto.
8786 (avx5124vnniw_vp4dpwssds_maskz): Ditto.
8787 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Remove Xeon Phi cpus.
8788 (ix86_adjust_cost): Ditto.
8789 * config/i386/x86-tune.def (X86_TUNE_SCHEDULE): Ditto.
8790 (X86_TUNE_PARTIAL_REG_DEPENDENCY): Ditto.
8791 (X86_TUNE_MOVX): Ditto.
8792 (X86_TUNE_MEMORY_MISMATCH_STALL): Ditto.
8793 (X86_TUNE_ACCUMULATE_OUTGOING_ARGS): Ditto.
8794 (X86_TUNE_FOUR_JUMP_LIMIT): Ditto.
8795 (X86_TUNE_USE_INCDEC): Ditto.
8796 (X86_TUNE_INTEGER_DFMODE_MOVES): Ditto.
8797 (X86_TUNE_OPT_AGU): Ditto.
8798 (X86_TUNE_AVOID_LEA_FOR_ADDR): Ditto.
8799 (X86_TUNE_AVOID_MEM_OPND_FOR_CMOVE): Ditto.
8800 (X86_TUNE_USE_SAHF): Ditto.
8801 (X86_TUNE_USE_CLTD): Ditto.
8802 (X86_TUNE_USE_BT): Ditto.
8803 (X86_TUNE_ONE_IF_CONV_INSN): Ditto.
8804 (X86_TUNE_EXPAND_ABS): Ditto.
8805 (X86_TUNE_USE_SIMODE_FIOP): Ditto.
8806 (X86_TUNE_EXT_80387_CONSTANTS): Ditto.
8807 (X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL): Ditto.
8808 (X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL): Ditto.
8809 (X86_TUNE_SPLIT_MEM_OPND_FOR_FP_CONVERTS): Ditto.
8810 (X86_TUNE_SLOW_PSHUFB): Ditto.
8811 (X86_TUNE_EMIT_VZEROUPPER): Removed.
8812 * config/i386/xmmintrin.h (enum _mm_hint): Remove _MM_HINT_ET1.
8813 * doc/extend.texi: Remove Xeon Phi.
8814 * doc/invoke.texi: Ditto.
8815
88162024-05-20 Pan Li <pan2.li@intel.com>
8817
8818 * dse.cc (get_stored_val): Make sure read_mode/write_mode
8819 is valid subreg before gen_lowpart.
8820
88212024-05-19 Jeff Law <jlaw@ventanamicro.com>
8822
8823 PR target/115142
8824 * config/riscv/riscv.cc (mem_shadd_or_shadd_rtx_p): Make sure
8825 shifted argument is a register.
8826
88272024-05-19 Eric Botcazou <ebotcazou@adacore.com>
8828
8829 * optabs-query.cc (can_mult_highpart_p): Test for the existence of
8830 a wider mode instead of requiring it.
8831
88322024-05-19 Roger Sayle <roger@nextmovesoftware.com>
8833
8834 * config/nvptx/nvptx.md (popcount<mode>2): Split into...
8835 (popcountsi2): define_insn handling SImode popcount.
8836 (popcountdi2): define_insn handling DImode popcount, with an
8837 explicit truncate:SI to produce an SImode result.
8838
88392024-05-18 Palmer Dabbelt <palmer@rivosinc.com>
8840
8841 * config/riscv/riscv.opt: Add -mno-fence-tso.
8842 * config/riscv/sync-rvwmo.md (mem_thread_fence_rvwmo): Respect
8843 -mno-fence-tso.
8844 * doc/invoke.texi (RISC-V): Document -mno-fence-tso.
8845
88462024-05-18 Jeff Law <jlaw@ventanamicro.com>
8847
8848 * config/riscv/riscv.md: Add new patterns to allow selection
8849 between (x << C1) + C2 vs (x + C2') << C1 depending on the
8850 cost C2 vs C2'.
8851
88522024-05-18 Xiao Zeng <zengxiao@eswincomputing.com>
8853
8854 * config/riscv/riscv.cc (riscv_legitimize_move): Optimize movbf
8855 with Nan-boxing value.
8856 * config/riscv/riscv.md (*movhf_softfloat_boxing): Expand movbf
8857 with Nan-boxing value.
8858 (*mov<HFBF:mode>_softfloat_boxing): Ditto.
8859 with Nan-boxing value.
8860 (*movbf_softfloat_boxing): Delete abandon pattern.
8861
88622024-05-18 Xiao Zeng <zengxiao@eswincomputing.com>
8863
8864 * config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
8865 Modify _Bfloat16 to __bf16.
8866 * config/riscv/riscv.cc (riscv_mangle_type): Ditto.
8867
88682024-05-18 Pan Li <pan2.li@intel.com>
8869
8870 PR target/51492
8871 PR target/112600
8872 * config/riscv/autovec.md (usadd<mode>3): New pattern expand for
8873 the unsigned SAT_ADD in vector mode.
8874 * config/riscv/riscv-protos.h (riscv_expand_usadd): New func decl
8875 to expand usadd<mode>3 pattern.
8876 (expand_vec_usadd): Ditto but for vector.
8877 * config/riscv/riscv-v.cc (emit_vec_saddu): New func impl to emit
8878 the vsadd insn.
8879 (expand_vec_usadd): New func impl to expand usadd<mode>3 for vector.
8880 * config/riscv/riscv.cc (riscv_expand_usadd): New func impl to
8881 expand usadd<mode>3 for scalar.
8882 * config/riscv/riscv.md (usadd<mode>3): New pattern expand for
8883 the unsigned SAT_ADD in scalar mode.
8884 * config/riscv/vector.md: Allow VLS mode for vsaddu.
8885
88862024-05-17 David Malcolm <dmalcolm@redhat.com>
8887
8888 * common.opt.urls: Regenerate to add
8889 fdiagnostics-show-event-links.
8890
88912024-05-17 Robin Dapp <rdapp@ventanamicro.com>
8892
8893 * config/riscv/riscv-protos.h (struct common_vector_cost): Add
8894 segment_permute cost.
8895 * config/riscv/riscv-vector-costs.cc (costs::adjust_stmt_cost):
8896 Handle segment loads/stores.
8897 * config/riscv/riscv.cc: Initialize segment_permute_[2-8] to 1.
8898
88992024-05-17 Robin Dapp <rdapp@ventanamicro.com>
8900
8901 PR middle-end/113474
8902 * internal-fn.cc (expand_vec_cond_mask_optab_fn): Remove
8903 force_regs.
8904
89052024-05-17 Tom Tromey <tromey@adacore.com>
8906
8907 * dwarf2out.cc (gen_namespace_die): Use DW_TAG_module for Ada.
8908
89092024-05-17 David Malcolm <dmalcolm@redhat.com>
8910
8911 * common.opt (fdiagnostics-show-event-links): New option.
8912 * diagnostic-label-effects.h: New file.
8913 * diagnostic-path.h (diagnostic_event::connect_to_next_event_p):
8914 New pure virtual function.
8915 (simple_diagnostic_event::connect_to_next_event_p): Implement it.
8916 (simple_diagnostic_event::connect_to_next_event): New.
8917 (simple_diagnostic_event::m_connected_to_next_event): New field.
8918 (simple_diagnostic_path::connect_to_next_event): New decl.
8919 * diagnostic-show-locus.cc: Include "text-art/theme.h" and
8920 "diagnostic-label-effects.h".
8921 (colorizer::set_cfg_edge): New.
8922 (layout::m_fallback_theme): New field.
8923 (layout::m_theme): New field.
8924 (layout::m_effect_info): New field.
8925 (layout::m_link_lhs_state): New enum and field.
8926 (layout::m_link_rhs_column): New field.
8927 (layout_range::has_in_edge): New.
8928 (layout_range::has_out_edge): New.
8929 (layout::layout): Add "effect_info" optional param. Initialize
8930 m_theme, m_link_lhs_state, and m_link_rhs_column.
8931 (layout::maybe_add_location_range): Remove stray "FIXME" from
8932 leading comment.
8933 (layout::print_source_line): Replace space after margin with a
8934 call to print_leftmost_column.
8935 (layout::print_leftmost_column): New.
8936 (layout::start_annotation_line): Make non-const. Gain
8937 responsibility for printing the leftmost column after the margin.
8938 (layout::print_annotation_line): Drop pp_space, as this is now
8939 added by start_annotation_line.
8940 (line_label::line_label): Add "has_in_edge" and "has_out_edge"
8941 params and initialize...
8942 (line_label::m_has_in_edge): New field.
8943 (line_label::m_has_out_edge): New field.
8944 (layout::print_any_labels): Pass edge information to line_label
8945 ctor. Keep track of in-edges and out-edges, adding visualizations
8946 of these links between labels.
8947 (layout::print_leading_fixits): Drop pp_character, as this is now
8948 added by start_annotation_line.
8949 (layout::print_trailing_fixits): Fix off-by-one errors in column
8950 calculation.
8951 (layout::move_to_column): Add comment about debugging.
8952 (layout::show_ruler): Make non-const. Drop pp_space calls, as
8953 this is now added by start_annotation_line.
8954 (layout::print_line): Call print_any_right_to_left_edge_lines.
8955 (layout::print_any_right_to_left_edge_lines): New.
8956 (layout::update_any_effects): New.
8957 (gcc_rich_location::add_location_if_nearby): Initialize
8958 loc_range.m_label.
8959 (diagnostic_context::maybe_show_locus): Add "effects" param and
8960 pass it to diagnostic_context::show_locus.
8961 (diagnostic_context::show_locus): Add "effects" param, passing it
8962 to layout's ctor. Call update_any_effects on the layout after
8963 printing the lines.
8964 (selftest::test_layout_x_offset_display_utf8): Update expected
8965 result for eliminated trailing newline.
8966 (selftest::test_layout_x_offset_display_utf8): Likewise.
8967 (selftest::test_layout_x_offset_display_tab): Likewise.
8968 * diagnostic.cc (diagnostic_context::initialize): Initialize
8969 m_source_printing.show_event_links_p.
8970 (simple_diagnostic_path::connect_to_next_event): New.
8971 (simple_diagnostic_event::simple_diagnostic_event): Initialize
8972 m_connected_to_next_event.
8973 * diagnostic.h (class diagnostic_source_effect_info): New forward
8974 decl.
8975 (diagnostic_source_printing_options::show_event_links_p): New
8976 field.
8977 (diagnostic_context::maybe_show_locus): Add optional "effect_info"
8978 param.
8979 (diagnostic_context::show_locus): Add "effect_info" param.
8980 (diagnostic_show_locus): Add optional "effect_info" param.
8981 * doc/invoke.texi: Add -fno-diagnostics-show-event-links.
8982 * lto-wrapper.cc (merge_and_complain): Add
8983 OPT_fdiagnostics_show_event_links to switch.
8984 (append_compiler_options): Likewise.
8985 (append_diag_options): Likewise.
8986 * opts-common.cc (decode_cmdline_options_to_array): Add
8987 "-fno-diagnostics-show-event-links" to -fdiagnostics-plain-output.
8988 * opts.cc (common_handle_option): Add case for
8989 OPT_fdiagnostics_show_event_links.
8990 * text-art/theme.cc (ascii_theme::get_cppchar): Handle
8991 cell_kind::CFG_*.
8992 (unicode_theme::get_cppchar): Likewise.
8993 * text-art/theme.h (theme::cell_kind): Add CFG_*.
8994 * toplev.cc (general_init): Initialize
8995 global_dc->m_source_printing.show_event_links_p.
8996 * tree-diagnostic-path.cc: Define INCLUDE_ALGORITHM,
8997 INCLUDE_MEMORY, and INCLUDE_STRING. Include
8998 "diagnostic-label-effects.h".
8999 (path_label::path_label): Initialize m_effects.
9000 (path_label::get_effects): New.
9001 (class path_label::path_label_effects): New.
9002 (path_label::m_effects): New field.
9003 (class per_thread_summary): Add "friend struct event_range;".
9004 (per_thread_summary::per_thread_summary): Initialize m_last_event.
9005 (per_thread_summary::m_last_event): New field.
9006 (struct event_range::per_source_line_info): New.
9007 (event_range::event_range): Make "t" non-const. Add
9008 "show_event_links" param and use it to initialize
9009 m_show_event_links. Add info for initial event.
9010 (event_range::get_per_source_line_info): New.
9011 (event_range::maybe_add_event): Verify compatibility of the new
9012 label and existing labels with respect to the link-printing code.
9013 Update per-source-line info when an event is added.
9014 (event_range::print): Add"effect_info" param and pass to
9015 diagnostic_show_locus.
9016 (event_range::m_per_thread_summary): Make non-const.
9017 (event_range::m_source_line_info_map): New field.
9018 (event_range::m_show_event_links): New field.
9019 (path_summary::path_summary): Add "show_event_links" optional
9020 param, passing it to event_range ctor calls. Update
9021 pts.m_last_event.
9022 (thread_event_printer::print_swimlane_for_event_range): Add
9023 "effect_info" param and pass it to range->print.
9024 (print_path_summary_as_text): Keep track of the column for any
9025 out-edges at the end of printing each event_range and use as
9026 the leading in-edge for the next event_range.
9027 (default_tree_diagnostic_path_printer): Pass in show_event_links_p
9028 to path_summary ctor.
9029 (selftest::path_events_have_column_data_p): New.
9030 (class selftest::control_flow_test): New.
9031 (selftest::test_control_flow_1): New.
9032 (selftest::test_control_flow_2): New.
9033 (selftest::test_control_flow_3): New.
9034 (selftest::assert_cfg_edge_path_streq): New.
9035 (ASSERT_CFG_EDGE_PATH_STREQ): New macro.
9036 (selftest::test_control_flow_4): New.
9037 (selftest::test_control_flow_5): New.
9038 (selftest::test_control_flow_6): New.
9039 (selftest::control_flow_tests): New.
9040 (selftest::tree_diagnostic_path_cc_tests): Disable colorization on
9041 global_dc's printer. Convert event_pp to a std::unique_ptr. Call
9042 control_flow_tests via for_each_line_table_case.
9043 (gen_command_line_string): Likewise.
9044
90452024-05-17 Uros Bizjak <ubizjak@gmail.com>
9046
9047 PR middle-end/112600
9048 * config/i386/mmx.md (<insn><mode>3): New expander.
9049 * config/i386/sse.md
9050 (<sse2_avx2>_<sat_plusminus:insn><mode>3<mask_name>):
9051 Rename expander to <sat_plusminus:insn><mode>3<mask_name>.
9052 (<umaxmin:code><mode>3): Update for rename.
9053 * config/i386/i386-builtin.def: Update for rename.
9054
90552024-05-17 Aldy Hernandez <aldyh@redhat.com>
9056
9057 PR middle-end/115131
9058 * value-range.cc (prange::intersect): Set VARYING if intersection
9059 of bitmasks made the range span the entire domain.
9060 (range_tests_misc): New test.
9061
90622024-05-17 Alexander Monakov <amonakov@ispras.ru>
9063
9064 PR c++/114480
9065 * tree-into-ssa.cc (prune_unused_phi_nodes): Add dfs_out entries
9066 to the 'defs' array in the reverse order.
9067
90682024-05-17 Aldy Hernandez <aldyh@redhat.com>
9069
9070 PR middle-end/115128
9071 * ipa-cp.cc (ipa_value_range_from_jfunc): Check for undefined_p
9072 before looking at type.
9073 (propagate_vr_across_jump_function): Same.
9074
90752024-05-17 Richard Biener <rguenther@suse.de>
9076
9077 PR middle-end/115110
9078 * tree-ssa-alias.cc (view_converted_memref_p): Fix.
9079
90802024-05-17 Eric Botcazou <ebotcazou@adacore.com>
9081
9082 * expmed.h (expmed_mult_highpart_optab): Declare.
9083 * expmed.cc (expmed_mult_highpart_optab): Remove static keyword.
9084 Do not assume that OP1 is a constant integer. Fix pasto.
9085 (expmed_mult_highpart): Pass OP1 narrowed to MODE in all the calls
9086 to expmed_mult_highpart_optab.
9087 * optabs-query.cc (can_mult_highpart_p): Use 2 for integer widening
9088 and shift subsequent values accordingly.
9089 * optabs.cc (expand_mult_highpart): Call expmed_mult_highpart_optab
9090 when can_mult_highpart_p returns 2 and adjust to above change.
9091
90922024-05-17 Richard Biener <rguenther@suse.de>
9093
9094 * tree-ssa-alias.h (pt_solution_includes_const_pool): Declare.
9095 * tree-ssa-alias.cc (ptrs_compare_unequal): Use
9096 pt_solution_includes_const_pool.
9097 * tree-ssa-structalias.cc (pt_solution_includes_const_pool): New.
9098
90992024-05-17 Alexandre Oliva <oliva@adacore.com>
9100
9101 * common.opt (freg-struct-return): Make it explicitly
9102 fpcc-struct-return's NegativeAlias. Copy Optimization...
9103 (freg-struct-return): ... here.
9104
91052024-05-17 Pan Li <pan2.li@intel.com>
9106
9107 * config/riscv/.riscv.cc.swo: Removed.
9108 * config/riscv/j: Removed.
9109
91102024-05-16 Pan Li <pan2.li@intel.com>
9111
9112 * config/riscv/autovec-opt.md(*vcond_mask_len_popcount_<VB_VLS:mode><P:mode>):
9113 New pattern of vcond_mask_len_popcount for vector bool mode.
9114 * config/riscv/autovec.md (vcond_mask_len_<mode>): New pattern of
9115 vcond_mask_len for vector bool mode.
9116 (cbranch<mode>4): New pattern for vector bool mode.
9117 * config/riscv/vector-iterators.md: Add new unspec UNSPEC_SELECT_MASK.
9118 * config/riscv/vector.md (@pred_popcount<VB:mode><P:mode>): Add VLS mode
9119 to popcount pattern.
9120 (@pred_popcount<VB_VLS:mode><P:mode>): Ditto.
9121
91222024-05-16 Jan Hubicka <jh@suse.cz>
9123
9124 PR ipa/113787
9125 * ipa-fnsummary.cc (points_to_local_or_readonly_memory_p): Do not
9126 look into TARGET_MEM_REFS with constant opreand 0.
9127
91282024-05-16 Richard Biener <rguenther@suse.de>
9129
9130 PR tree-optimization/13962
9131 PR tree-optimization/96564
9132 * tree-ssa-alias.h (pt_solution::const_pool): New flag.
9133 * tree-ssa-alias.cc (ptrs_compare_unequal): Handle pointer-pointer
9134 compares.
9135 (dump_points_to_solution): Dump the const_pool flag, fix guard
9136 of flag dumping.
9137 * gimple-pretty-print.cc (pp_points_to_solution): Likewise.
9138 * tree-ssa-structalias.cc (find_what_var_points_to): Set
9139 the const_pool flag for STRING.
9140 (pt_solution_ior_into): Handle the const_pool flag.
9141 (ipa_escaped_pt): Initialize it.
9142
91432024-05-16 Richard Biener <rguenther@suse.de>
9144
9145 * tree-ssa-structalias.cc (get_constraint_for_1): For
9146 volatile referenced or decls use ANYTHING.
9147
91482024-05-16 Pan Li <pan2.li@intel.com>
9149
9150 * tree-vect-loop.cc (vect_gen_loop_len_mask): New func to gen
9151 the loop len mask.
9152 * tree-vect-stmts.cc (vectorizable_early_exit): Invoke the
9153 vect_gen_loop_len_mask for 1 or more stmt(s).
9154 * tree-vectorizer.h (vect_gen_loop_len_mask): New func decl
9155 for vect_gen_loop_len_mask.
9156
91572024-05-16 Pan Li <pan2.li@intel.com>
9158
9159 PR target/51492
9160 PR target/112600
9161 * tree-vect-patterns.cc (gimple_unsigned_integer_sat_add): New
9162 func decl generated by match.pd match.
9163 (vect_recog_sat_add_pattern): New func impl to recog the pattern
9164 for unsigned SAT_ADD.
9165
91662024-05-16 Pan Li <pan2.li@intel.com>
9167
9168 PR target/51492
9169 PR target/112600
9170 * internal-fn.cc (commutative_binary_fn_p): Add type IFN_SAT_ADD
9171 to the return true switch case(s).
9172 * internal-fn.def (SAT_ADD): Add new signed optab SAT_ADD.
9173 * match.pd: Add unsigned SAT_ADD match(es).
9174 * optabs.def (OPTAB_NL): Remove fixed-point limitation for
9175 us/ssadd.
9176 * tree-ssa-math-opts.cc (gimple_unsigned_integer_sat_add): New
9177 extern func decl generated in match.pd match.
9178 (match_saturation_arith): New func impl to match the saturation arith.
9179 (math_opts_dom_walker::after_dom_children): Try match saturation
9180 arith when IOR expr.
9181
91822024-05-16 Aldy Hernandez <aldyh@redhat.com>
9183
9184 Revert:
9185 2024-05-10 Aldy Hernandez <aldyh@redhat.com>
9186
9187 Revert:
9188 2024-05-08 Aldy Hernandez <aldyh@redhat.com>
9189
9190 * gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
9191 Change irange to prange.
9192 * gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
9193 (fold_using_range::range_of_address): Same.
9194 * gimple-range-fold.h (range_of_address): Same.
9195 * gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
9196 * gimple-range-op.cc (class cfn_strlen): Same.
9197 * gimple-range-path.cc
9198 (path_range_query::adjust_for_non_null_uses): Same.
9199 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
9200 * tree-ssa-structalias.cc (find_what_p_points_to): Same.
9201 * range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
9202 hybrid entries in table.
9203 * range-op.cc (range_op_table::range_op_table): Add pointer
9204 entries for bitwise and/or and min/max.
9205 * value-range.cc (irange::verify_range): Add assert.
9206 * value-range.h (irange::varying_compatible_p): Remove check for
9207 error_mark_node.
9208 (irange::supports_p): Remove pointer support.
9209 * ipa-cp.h (ipa_supports_p): Add prange support.
9210
92112024-05-16 Aldy Hernandez <aldyh@redhat.com>
9212
9213 PR tree-optimization/114985
9214 * gimple-range-op.cc: Remove pointers_handled_p.
9215 * ipa-cp.cc (ipa_value_range_from_jfunc): Skip range folding if
9216 operands don't match.
9217 (propagate_vr_across_jump_function): Same.
9218 * range-op-mixed.h: Remove pointers_handled_p and tweak
9219 operand_check_p.
9220 * range-op-ptr.cc (range_operator::pointers_handled_p): Remove.
9221 (pointer_plus_operator::pointers_handled_p): Remove.
9222 (class operator_pointer_diff): Remove pointers_handled_p.
9223 (operator_pointer_diff::pointers_handled_p): Remove.
9224 (operator_identity::pointers_handled_p): Remove.
9225 (operator_cst::pointers_handled_p): Remove.
9226 (operator_cast::pointers_handled_p): Remove.
9227 (operator_min::pointers_handled_p): Remove.
9228 (operator_max::pointers_handled_p): Remove.
9229 (operator_addr_expr::pointers_handled_p): Remove.
9230 (operator_bitwise_and::pointers_handled_p): Remove.
9231 (operator_bitwise_or::pointers_handled_p): Remove.
9232 (operator_equal::pointers_handled_p): Remove.
9233 (operator_not_equal::pointers_handled_p): Remove.
9234 (operator_lt::pointers_handled_p): Remove.
9235 (operator_le::pointers_handled_p): Remove.
9236 (operator_gt::pointers_handled_p): Remove.
9237 (operator_ge::pointers_handled_p): Remove.
9238 * range-op.cc (TRAP_ON_UNHANDLED_POINTER_OPERATORS): Remove.
9239 (range_op_handler::lhs_op1_relation): Remove pointers_handled_p checks.
9240 (range_op_handler::lhs_op2_relation): Same.
9241 (range_op_handler::op1_op2_relation): Same.
9242 * range-op.h: Remove RO_* declarations.
9243
92442024-05-16 Aldy Hernandez <aldyh@redhat.com>
9245
9246 PR tree-optimization/114985
9247 * vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Use
9248 boolean type when folding conditionals.
9249
92502024-05-16 Richard Biener <rguenther@suse.de>
9251
9252 PR tree-optimization/79958
9253 PR tree-optimization/109087
9254 PR tree-optimization/100314
9255 PR tree-optimization/114774
9256 * tree-ssa-dse.cc (dse_classify_store): New forwarder.
9257 (dse_classify_store): Add arguments cnt and visited, recurse
9258 to track multiple paths when we end up with multiple defs.
9259
92602024-05-16 David Malcolm <dmalcolm@redhat.com>
9261
9262 * text-art/theme.cc (ascii_theme::get_cppchar): Add
9263 cell_kind::INTERPROCEDURAL_*.
9264 (unicode_theme::get_cppchar): Likewise.
9265 * text-art/theme.h (theme::cell_kind): Likewise.
9266 * tree-diagnostic-path.cc:
9267 (thread_event_printer::print_swimlane_for_event_range): Use the
9268 above to get characters for indicating interprocedural stack
9269 depth activity, falling back to ascii.
9270 (selftest::test_interprocedural_path_1): Test with both ascii
9271 and unicode themes.
9272 (selftest::test_interprocedural_path_2): Likewise.
9273 (selftest::test_recursion): Likewise.
9274
92752024-05-16 David Malcolm <dmalcolm@redhat.com>
9276
9277 * tree-diagnostic-path.cc: Include "text-art/theme.h".
9278 (path_label::get_text): If the event has
9279 diagnostic_event::VERB_danger, and the theme enables emojis, then
9280 add a warning emoji between the event number and the event text.
9281
92822024-05-16 David Malcolm <dmalcolm@redhat.com>
9283
9284 * tree-diagnostic-path.cc (per_thread_summary::interprocedural_p):
9285 New.
9286 (thread_event_printer::print_swimlane_for_event_range): Don't
9287 indent and print the stack depth line if this thread's events are
9288 purely intraprocedural.
9289 (selftest::test_intraprocedural_path): Update expected output.
9290
92912024-05-16 David Malcolm <dmalcolm@redhat.com>
9292
9293 * diagnostic-path.h: Update leading comment to reflect
9294 intraprocedural cases. Fix typo in comment.
9295 * doc/invoke.texi: Update intraprocedural example.
9296
92972024-05-16 David Malcolm <dmalcolm@redhat.com>
9298
9299 * diagnostic-show-locus.cc: Define INCLUDE_VECTOR and include
9300 "text-art/types.h".
9301 (line_label::line_label): Drop "policy" argument. Use
9302 styled_string::calc_canvas_width when computing m_display_width,
9303 as this skips SGR codes.
9304 (layout::print_any_labels): Update for line_label ctor change.
9305 (selftest::test_one_liner_labels_utf8): Update expected text to
9306 reflect that the labels can fit on one line if we don't get
9307 confused by SGR colorization codes.
9308
93092024-05-16 Xiao Zeng <zengxiao@eswincomputing.com>
9310
9311 * common/config/riscv/riscv-common.cc:
9312 (riscv_implied_info): Add zvfbfwma item.
9313 (riscv_ext_version_table): Ditto.
9314 (riscv_ext_flag_table): Ditto.
9315 * config/riscv/riscv.opt:
9316 (MASK_ZVFBFWMA): New macro.
9317 (TARGET_ZVFBFWMA): Ditto.
9318
93192024-05-16 liuhongt <hongtao.liu@intel.com>
9320
9321 PR target/114514
9322 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
9323 Set d.one_operand_p to true when TARGET_SSSE3.
9324
93252024-05-16 liuhongt <hongtao.liu@intel.com>
9326
9327 PR target/114514
9328 * config/i386/i386-expand.cc
9329 (ix86_expand_vec_shift_qihi_constant): Optimize ashift >> 7 to
9330 vpcmpgtb.
9331 (ix86_expand_vecop_qihi_partial): Ditto.
9332
93332024-05-15 Jeff Law <jlaw@ventanamicro.com>
9334
9335 * config/riscv/riscv-string.cc: Add missing hunk from last change.
9336
93372024-05-15 Christoph Müllner <christoph.muellner@vrull.eu>
9338
9339 * config/riscv/riscv-string.cc (emit_strcmp_scalar_load_and_compare):
9340 Use adjust_address() to calculate MEM-PLUS pattern.
9341
93422024-05-15 Christoph Müllner <christoph.muellner@vrull.eu>
9343
9344 * config/riscv/riscv-protos.h (riscv_expand_block_compare): New
9345 prototype.
9346 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER2): New helper
9347 for zero_extendhi.
9348 (do_load_from_addr): Add support for HI and SI/64 modes.
9349 (do_load): Add helper for zero-extended loads.
9350 (emit_memcmp_scalar_load_and_compare): New helper to emit memcmp.
9351 (emit_memcmp_scalar_result_calculation): Likewise.
9352 (riscv_expand_block_compare_scalar): Likewise.
9353 (riscv_expand_block_compare): New RISC-V expander for memory compare.
9354 * config/riscv/riscv.md (cmpmemsi): New cmpmem expansion.
9355
93562024-05-15 Marek Polacek <polacek@redhat.com>
9357
9358 DR 1693
9359 PR c++/113760
9360 DR 569
9361 * doc/invoke.texi: Update -Wextra-semi documentation.
9362
93632024-05-15 Jakub Jelinek <jakub@redhat.com>
9364
9365 PR rtl-optimization/114902
9366 PR rtl-optimization/115092
9367 * combine.cc (simplify_compare_const): Don't optimize
9368 GE op0 SIGNED_MIN or LT op0 SIGNED_MIN into NE op0 const0_rtx or
9369 EQ op0 const0_rtx.
9370
93712024-05-15 Richard Biener <rguenther@suse.de>
9372
9373 PR tree-optimization/114589
9374 * tree-ssa-sink.cc (select_best_block): Remove profile-based
9375 heuristics. Instead reject sink locations that sink
9376 to post-dominators. Move empty latch check here from
9377 statement_sink_location. Also consider early_bb for the
9378 loop depth check.
9379 (statement_sink_location): Remove superfluous check. Remove
9380 empty latch check.
9381 (pass_sink_code::execute): Compute/release post-dominators.
9382
93832024-05-15 Richard Biener <rguenther@suse.de>
9384
9385 PR middle-end/111422
9386 * cfgexpand.cc (add_scope_conflicts_2): Handle PHIs
9387 by recursing to their arguments.
9388
93892024-05-15 Wilco Dijkstra <wilco.dijkstra@arm.com>
9390
9391 * config/aarch64/aarch64-simd.md (aarch64_combine_internal<mode>):
9392 Use UZP1 instead of INS.
9393 (aarch64_combine_internal_be<mode>): Likewise.
9394
93952024-05-15 Jan Hubicka <jh@suse.cz>
9396
9397 * alias.cc (reference_alias_ptr_type_1): Use view_converted_memref_p.
9398 * alias.h (view_converted_memref_p): Declare.
9399 * tree-ssa-alias.cc (view_converted_memref_p): Export.
9400 (ao_compare::compare_ao_refs): Use same_type_for_tbaa.
9401
94022024-05-15 Christoph Müllner <christoph.muellner@vrull.eu>
9403
9404 * config/riscv/riscv-string.cc (riscv_block_move_straight):
9405 Hand over up to 2xXLEN bytes to move_by_pieces().
9406
94072024-05-15 Christoph Müllner <christoph.muellner@vrull.eu>
9408
9409 * config/riscv/riscv-string.cc (riscv_block_move_straight): Add
9410 parameter align.
9411 (riscv_adjust_block_mem): Replace parameter length by align.
9412 (riscv_block_move_loop): Add parameter align.
9413 (riscv_expand_block_move_scalar): Set alignment properly if the
9414 target has fast unaligned access.
9415
94162024-05-15 Aldy Hernandez <aldyh@redhat.com>
9417
9418 PR tree-optimization/114995
9419 * range-op-ptr.cc (range_operator::pointers_handled_p): Default to true.
9420
94212024-05-15 Andrew Pinski <quic_apinski@quicinc.com>
9422
9423 PR tree-optimization/114301
9424 * tree-cfg.cc (gimple_can_duplicate_bb_p): Check returns_twice
9425 only on the last call statement rather than all.
9426
94272024-05-15 Jeff Law <jlaw@ventanamicro.com>
9428
9429 * config/riscv/riscv-string.cc
9430 (riscv_expand_block_clear_zicboz_zic64b): Handle rv32 correctly.
9431
94322024-05-15 Levy Hsu <admin@levyhsu.com>
9433
9434 PR target/107563
9435 * config/i386/i386-expand.cc (expand_vec_perm_psrlw_psllw_por): New
9436 subroutine.
9437 (ix86_expand_vec_perm_const_1): Call expand_vec_perm_psrlw_psllw_por.
9438
94392024-05-15 Jeff Law <jlaw@ventanamicro.com>
9440
9441 * config/riscv/riscv.md: Add pattern for sign extended shift-add
9442 sequence with a masked input.
9443
94442024-05-14 Dimitar Dimitrov <dimitar@dinux.eu>
9445
9446 PR rtl-optimization/115013
9447 * config/pru/pru.cc (pru_class_likely_spilled_p): Implement
9448 to mark classes containing one SImode register as likely
9449 spilled.
9450 (TARGET_CLASS_LIKELY_SPILLED_P): Define.
9451
94522024-05-14 Vineet Gupta <vineetg@rivosinc.com>
9453
9454 * config/riscv/riscv.h: New macros to check for sum of two S12
9455 range.
9456 * config/riscv/constraints.md: New constraint.
9457 * config/riscv/predicates.md: New Predicate.
9458 * config/riscv/riscv.md: New splitter.
9459 * config/riscv/riscv.cc (riscv_reg_frame_related): New helper.
9460 * config/riscv/riscv-protos.h: New helper prototype.
9461
94622024-05-14 Richard Biener <rguenther@suse.de>
9463
9464 PR tree-optimization/99954
9465 * tree-data-ref.cc (dr_may_alias_p): For bases that are
9466 not completely analyzed fall back to TBAA and points-to.
9467 * tree-loop-distribution.cc
9468 (loop_distribution::classify_builtin_ldst): When there
9469 is no dependence again classify as memcpy.
9470 * tree-ssa-alias.cc (ptr_deref_may_alias_decl_p): Verify
9471 the pointer is an SSA name.
9472
94732024-05-14 Christoph Müllner <christoph.muellner@vrull.eu>
9474
9475 * config/riscv/riscv-protos.h (riscv_expand_block_clear): New prototype.
9476 * config/riscv/riscv-string.cc (riscv_expand_block_clear_zicboz_zic64b):
9477 New function to expand a block-clear with cbo.zero.
9478 (riscv_expand_block_clear): New RISC-V block-clear expansion function.
9479 * config/riscv/riscv.md (setmem<mode>): New setmem expansion.
9480
94812024-05-14 Christoph Müllner <christoph.muellner@vrull.eu>
9482
9483 * expr.cc (clear_by_pieces): Remove static from clear_by_pieces.
9484 * expr.h (clear_by_pieces): Add prototype for clear_by_pieces.
9485
94862024-05-14 Tom de Vries <tdevries@suse.de>
9487
9488 PR debug/115066
9489 * dwarf2out.cc (output_macinfo_op): Fix DW_MACRO_define_strx/strp
9490 choice for v4 .debug_macro.dwo. Add asserts to check that choice.
9491
94922024-05-14 Jan Hubicka <jh@suse.cz>
9493
9494 PR ipa/113291
9495 * ipa-inline.cc (enum can_inline_edge_by_limits_flags): New enum.
9496 (can_inline_edge_by_limits_p): Take flags instead of multiple bools; add flag
9497 for forcing inlinie limits.
9498 (can_early_inline_edge_p): Update.
9499 (want_inline_self_recursive_call_p): Update; use FORCE_LIMITS mode.
9500 (check_callers): Update.
9501 (update_caller_keys): Update.
9502 (update_callee_keys): Update.
9503 (recursive_inlining): Update.
9504 (add_new_edges_to_heap): Update.
9505 (speculation_useful_p): Update.
9506 (inline_small_functions): Clear DECL_DISREGARD_INLINE_LIMITS on self recursion.
9507 (flatten_function): Update.
9508 (inline_to_all_callers_1): Update.
9509
95102024-05-14 Haochen Gui <guihaoc@gcc.gnu.org>
9511
9512 * config/rs6000/rs6000.cc (TARGET_OVERLAP_OP_BY_PIECES_P): Define.
9513
95142024-05-14 Jeff Law <jlaw@ventanamicro.com>
9515
9516 Revert:
9517 2024-05-13 Sergei Lewis <slewis@rivosinc.com>
9518
9519 * config/riscv/riscv.md (movmem<mode>): Use riscv_vector::expand_block_move,
9520 if and only if we know the entire operation can be performed using one vector
9521 load followed by one vector store
9522
95232024-05-14 Pan Li <pan2.li@intel.com>
9524
9525 * config/riscv/riscv-vector-builtins.cc
9526 (validate_instance_type_required_extensions): Remove the
9527 operator from the trailing and put it to new line.
9528
95292024-05-13 Jeff Law <jlaw@ventanamicro.com>
9530
9531 * config/riscv/bitmanip.md: Add new splitter for AND with
9532 a constant that masks off bits 32..63 and needs synthesis.
9533
95342024-05-13 Sergei Lewis <slewis@rivosinc.com>
9535
9536 * config/riscv/riscv.md (movmem<mode>): Use riscv_vector::expand_block_move,
9537 if and only if we know the entire operation can be performed using one vector
9538 load followed by one vector store
9539
95402024-05-13 Vladimir N. Makarov <vmakarov@redhat.com>
9541
9542 PR rtl-optimization/115013
9543 * lra-constraints.cc (process_alt_operands): Update all_used_nregs
9544 only for winreg. Ignore reg starvation for small reg classes.
9545
95462024-05-13 Pan Li <pan2.li@intel.com>
9547
9548 PR target/114988
9549 * config/riscv/riscv-vector-builtins.cc
9550 (validate_instance_type_required_extensions): New func impl to
9551 validate the intrinisc func type ops.
9552 (expand_builtin): Validate instance type before expand.
9553
95542024-05-13 Jeff Law <jlaw@ventanamicro.com>
9555
9556 * config/riscv/bitmanip.md (bextseqzdisi): New patterns.
9557 * config/riscv/.riscv.cc.swo: New file.
9558 * config/riscv/j: New file.
9559
95602024-05-13 Richard Biener <rguenther@suse.de>
9561
9562 PR tree-optimization/60276
9563 * tree-vect-stmts.cc (vectorizable_load): Do not exempt
9564 pure_slp grouped loads from the STMT_VINFO_MIN_NEG_DIST
9565 restriction.
9566
95672024-05-13 Richard Biener <rguenther@suse.de>
9568
9569 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
9570 slp_inst_kind_reduc_group handling.
9571 (vect_analyze_slp): Add the meat here.
9572
95732024-05-13 Jakub Jelinek <jakub@redhat.com>
9574
9575 PR middle-end/113982
9576 * tree-ssa-math-opts.cc (arith_overflow_check_p): Also return 1
9577 for RSHIFT_EXPR by precision of maxval if shift result is only
9578 used in a cast or comparison against zero.
9579 (match_arith_overflow): Handle the RSHIFT_EXPR use case.
9580
95812024-05-13 YunQiang Su <syq@debian.org>
9582
9583 Revert:
9584 2024-05-09 YunQiang Su <syq@gcc.gnu.org>
9585
9586 * config/mips/constraints.md: Add new constraint 'w'.
9587
95882024-05-12 Roger Sayle <roger@nextmovesoftware.com>
9589 Kyrill Tkachov <kyrylo.tkachov@foss.arm.com>
9590
9591 * config/arm/arm.md (*arm_zeroextractsi2_8_8, *arm_signextractsi2_8_8,
9592 *arm_zeroextractsi2_8_16, *arm_signextractsi2_8_16,
9593 *arm_zeroextractsi2_16_8, *arm_signextractsi2_16_8): New.
9594
95952024-05-12 Jeff Law <jlaw@ventanamicro.com>
9596
9597 * config/riscv/riscv.cc (riscv_build_integer_1): Use slli.uw more.
9598
95992024-05-12 Jeff Law <jlaw@ventanamicro.com>
9600
9601 * config/riscv/riscv.cc (riscv_build_integer_1): Fix thinko in testing
9602 when lui can be used to set several bits in bseti path.
9603
96042024-05-12 Mark Wielaard <mark@klomp.org>
9605
9606 * config/mingw/cygming.opt.urls: Regenerate.
9607 * config/mingw/mingw.opt.urls: Likewise.
9608
96092024-05-11 Mark Harmstone <mark@harmstone.com>
9610
9611 * dwarf2codeview.cc (DEBUG_S_SYMBOLS): Define.
9612 (S_COMPILE3, CV_CFL_80386, CV_CFL_X64): Likewise.
9613 (CV_CFL_C, CV_CFL_CXX): Likewise.
9614 (SYMBOL_START_LABEL, SYMBOL_END_LABEL): Likewise.
9615 (start_processor, language_constant): New functions.
9616 (write_compile3_symbol, write_codeview_symbols): Likewise.
9617 (codeview_debug_finish): Call write_codeview_symbols.
9618
96192024-05-11 Mark Harmstone <mark@harmstone.com>
9620
9621 * dwarf2codeview.cc (DEBUG_S_LINES, LINE_LABEL): Define.
9622 (END_FUNC_LABEL): Likewise.
9623 (struct codeview_line, codeview_line_block): New structures.
9624 (codeview_function): Likewise.
9625 (line_label_num, func_label_num, funcs, last_func): New variables.
9626 (last_filename, last_file_id): Likewise.
9627 (codeview_source_line, write_line_numbers): New functions.
9628 (codeview_switch_text_section, codeview_end_epilogue): Likewise.
9629 (codeview_debug_finish): Call write_line_numbers.
9630 * dwarf2codeview.h (codeview_source_line): Prototype.
9631 (codeview_switch_text_secction, codeview_end_epilogue): Likewise.
9632 * dwarf2out.cc (dwarf2_end_epilogue): Add codeview support.
9633 (dwarf2out_switch_text_section): Likewise.
9634 (dwarf2out_source_line): Likewise.
9635 * opts.cc (finish_options): Handle codeview debugging symbols.
9636
96372024-05-11 Mark Harmstone <mark@harmstone.com>
9638
9639 * dwarf2codeview.cc (DEBUG_S_STRINGTABLE): Define.
9640 (DEBUG_S_FILECHKSMS, CHKSUM_TYPE_MD5, HASH_SIZE): Likewise.
9641 (codeview_string, codeview_source_file): New structures.
9642 (struct string_hasher): New class for codeview_string hashing.
9643 (files, last_file, num_files, string_offset): New variables.
9644 (strings_hstab, strings, last_string): Likewise.
9645 (add_string, codevie_start_source_file): New functions.
9646 (write_strings_tabe, write_soruce_files): Likewise.
9647 (codeview_debug_finish): Call new functions.
9648 * dwarf2codeview.h (codeview_start_source_file): Prototype.
9649 * dwarf2out.cc (dwarf2out_start_source_file): Handle codeview.
9650
96512024-05-11 Mark Harmstone <mark@harmstone.com>
9652
9653 * Makefile.in (OBJS): Add dwarf2codeview.o.
9654 (GTFILES): Add dwarf2codeview.cc
9655 * config/i386/cygming.h (CODEVIEW_DEBUGGING_INFO): Define.
9656 * dwarf2codeview.cc: New file.
9657 * dwarf2codeview.h: New file.
9658 * dwarf2out.cc: Include dwarf2codeview.h.
9659 (dwarf2out_finish): Call codeview_debug_finish as needed.
9660 * flag-types.h (DINFO_TYPE_CODEVIEW): Add enum member.
9661 (CODEVIEW_DEBUG): Define.
9662 * flags.h (codeview_debuginfo_p): Proottype.
9663 * opts.cc (debug_type_names): Add codeview.
9664 (debug_type_masks): Add CODEVIEW_DEBUG.
9665 (df_set_names): Add codeview.
9666 (codeview_debuginfo_p): New function.
9667 (dwarf_based_debuginfo_p): Add CODEVIEW clause.
9668 (set_debug_level): Handle CODEVIEW_DEBUG.
9669 * toplev.cc (process_options): Handle codeview.
9670
96712024-05-11 dzhao.ampere <di.zhao@amperecomputing.com>
9672
9673 PR tree-optimization/114760
9674 * tree-ssa-loop-niter.cc (is_lshift_by_1): New function
9675 to check if STMT is equivalent to x << 1.
9676 (is_rshift_by_1): New function to check if STMT is
9677 equivalent to x >> 1.
9678 (number_of_iterations_cltz): Enhance the identification
9679 of logical shift by one.
9680 (number_of_iterations_cltz_complement): Enhance the
9681 identification of logical shift by one.
9682
96832024-05-11 Aldy Hernandez <aldyh@redhat.com>
9684
9685 * range-op-ptr.cc (range_operator::fold_range): Return false.
9686
96872024-05-11 Aldy Hernandez <aldyh@redhat.com>
9688
9689 * range-op.cc (TRAP_ON_UNHANDLED_POINTER_OPERATORS): New
9690 (range_op_handler::fold_range): Use it.
9691 (range_op_handler::op1_range): Same.
9692 (range_op_handler::op2_range): Same.
9693 (range_op_handler::lhs_op1_relation): Same.
9694 (range_op_handler::lhs_op2_relation): Same.
9695 (range_op_handler::op1_op2_relation): Same.
9696
96972024-05-10 Jeff Law <jlaw@ventanamicro.com>
9698
9699 * config/riscv/riscv.cc (riscv_build_integer_1): Recognize cases where
9700 we can use shNadd to improve constant synthesis.
9701 (riscv_move_integer): Handle code generation for shNadd.
9702
97032024-05-10 Roger Sayle <roger@nextmovesoftware.com>
9704 Hongtao Liu <hongtao.liu@intel.com>
9705
9706 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
9707 Don't attempt ix86_expand_vec_shift_qihi_constant on SSE4.1.
9708
97092024-05-10 Dimitar Dimitrov <dimitar@dinux.eu>
9710
9711 * config/pru/predicates.md (pru_mulsrc0_operand): Use register
9712 class instead of register number for the check.
9713 (pru_mulsrc1_operand): Ditto.
9714
97152024-05-10 Vladimir N. Makarov <vmakarov@redhat.com>
9716
9717 PR target/114942
9718 * lra-constraints.cc (struct input_reload): Add new member early_clobber_p.
9719 (get_reload_reg): Add new arg early_clobber_p, don't reuse input
9720 reload with true early_clobber_p member value, use the arg for new
9721 element of curr_insn_input_reloads.
9722 (match_reload): Assign false to early_clobber_p member.
9723 (process_addr_reg, simplify_operand_subreg, curr_insn_transform):
9724 Adjust get_reload_reg calls.
9725
97262024-05-10 Aldy Hernandez <aldyh@redhat.com>
9727
9728 PR tree-optimization/115026
9729 * value-range.cc (prange::update_bitmask): Use operand bitmask.
9730
97312024-05-10 Richard Biener <rguenther@suse.de>
9732
9733 PR tree-optimization/114998
9734 * tree-loop-distribution.cc (free_rdg): Take loop argument.
9735 Reset UIDs of stmts still in the IL rather than all stmts
9736 referenced from the RDG.
9737 (loop_distribution::build_rdg): Pass loop to free_rdg.
9738 (loop_distribution::distribute_loop): Likewise.
9739 (loop_distribution::transform_reduction_loop): Likewise.
9740
97412024-05-10 Richard Biener <rguenther@suse.de>
9742
9743 * tree-vect-patterns.cc (vect_pattern_recog_1): Do not
9744 remove reductions involving patterns.
9745 * tree-vect-loop.cc (vectorizable_reduction): Reject SLP
9746 reduction groups with multiple lane-reducing reductions.
9747 * tree-vect-slp.cc (vect_analyze_slp_instance): When discovering
9748 SLP reduction groups avoid including lane-reducing ones.
9749
97502024-05-10 Jose E. Marchesi <jose.marchesi@oracle.com>
9751
9752 * config/bpf/bpf.cc (bpf_print_operand_address): Include
9753 surrounding parenthesis around mem operands in pseudoc asm
9754 dialect.
9755 * config/bpf/bpf.md (*mov<MM:mode>): Adapt accordingly.
9756 (zero_extendhidi2): Likewise.
9757 (zero_extendqidi2): Likewise.
9758 (*extendsidi2): Likewise.
9759 (*extendsidi2): Likewise.
9760 (extendhidi2): Likewise.
9761 (extendqidi2): Likewise.
9762 (extendhisi2): Likewise.
9763 * config/bpf/atomic.md (atomic_add<AMO:mode>): Likewise.
9764 (atomic_and<AMO:mode>): Likewise.
9765 (atomic_or<AMO:mode>): Likewise.
9766 (atomic_xor<AMO:mode>): Likewise.
9767 (atomic_fetch_add<AMO:mode>): Likewise.
9768 (atomic_fetch_and<AMO:mode>): Likewise.
9769 (atomic_fetch_or<AMO:mode>): Likewise.
9770 (atomic_fetch_xor<AMO:mode>): Likewise.
9771
97722024-05-10 Jakub Jelinek <jakub@redhat.com>
9773
9774 PR target/114968
9775 * target.def (use_atexit_for_cxa_atexit): Remove spurious space
9776 from comment.
9777 (adjust_cdtor_callabi_fntype): New cxx target hook.
9778 * targhooks.h (default_cxx_adjust_cdtor_callabi_fntype): Declare.
9779 * targhooks.cc (default_cxx_adjust_cdtor_callabi_fntype): New
9780 function.
9781 * doc/tm.texi.in (TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Add.
9782 * doc/tm.texi: Regenerate.
9783 * config/i386/i386.cc (ix86_cxx_adjust_cdtor_callabi_fntype): New
9784 function.
9785 (TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Redefine.
9786
97872024-05-10 Aldy Hernandez <aldyh@redhat.com>
9788
9789 PR tree-optimization/115009
9790 * value-range-storage.cc (prange_storage::alloc): Do not assume
9791 all pointers are the same size.
9792 (prange_storage::prange_storage): Same.
9793 (prange_storage::fits_p): Same.
9794
97952024-05-10 Kito Cheng <kito.cheng@sifive.com>
9796
9797 * config/riscv/riscv-vsetvl.cc: Fix typos in comments.
9798 (get_all_predecessors): Ditto.
9799 (pre_vsetvl::m_unknow_info): Rename to...
9800 (pre_vsetvl::m_unknown_info): this.
9801 (pre_vsetvl::compute_vsetvl_def_data): Rename m_unknow_info to
9802 m_unknown_info.
9803 (pre_vsetvl::cleaup): Rename to...
9804 (pre_vsetvl::cleanup): this.
9805 (pre_vsetvl::compute_vsetvl_def_data): Fix typos.
9806 (pass_vsetvl::lazy_vsetvl): Update function name and fix typos.
9807 * config/riscv/riscv.cc: Fix typos in comments.
9808 (struct machine_function): Fix typo in comments.
9809 (riscv_valid_lo_sum_p): Ditto.
9810 (riscv_force_address): Ditto.
9811 (riscv_immediate_operand_p): Ditto.
9812 (riscv_in_small_data_p): Ditto.
9813 (riscv_first_stack_step): Ditto.
9814 (riscv_expand_prologue): Ditto.
9815 (riscv_convert_vector_chunks): Ditto.
9816 (riscv_override_options_internal): Ditto.
9817 (get_common_costs): Ditto.
9818
98192024-05-10 Xi Ruoyao <xry111@xry111.site>
9820
9821 PR driver/114980
9822 * opts-common.cc (prune_options): Move -fdiagnostics-urls=
9823 early like -fdiagnostics-color=.
9824
98252024-05-10 Jeff Law <jlaw@ventanamicro.com>
9826
9827 * config/riscv/bitmanip.md: Add splitter for shadd feeding another
9828 add instruction.
9829
98302024-05-10 Aldy Hernandez <aldyh@redhat.com>
9831
9832 Revert:
9833 2024-05-08 Aldy Hernandez <aldyh@redhat.com>
9834
9835 * gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
9836 Change irange to prange.
9837 * gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
9838 (fold_using_range::range_of_address): Same.
9839 * gimple-range-fold.h (range_of_address): Same.
9840 * gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
9841 * gimple-range-op.cc (class cfn_strlen): Same.
9842 * gimple-range-path.cc
9843 (path_range_query::adjust_for_non_null_uses): Same.
9844 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
9845 * tree-ssa-structalias.cc (find_what_p_points_to): Same.
9846 * range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
9847 hybrid entries in table.
9848 * range-op.cc (range_op_table::range_op_table): Add pointer
9849 entries for bitwise and/or and min/max.
9850 * value-range.cc (irange::verify_range): Add assert.
9851 * value-range.h (irange::varying_compatible_p): Remove check for
9852 error_mark_node.
9853 (irange::supports_p): Remove pointer support.
9854 * ipa-cp.h (ipa_supports_p): Add prange support.
9855
98562024-05-09 Roger Sayle <roger@nextmovesoftware.com>
9857
9858 * simplify-rtx.cc (simplify_const_binary_operation): Constant
9859 fold binary operations where the LHS is CONST_VECTOR and the
9860 RHS is CONST_INT (or CONST_DOUBLE) such as vector shifts.
9861
98622024-05-09 Martin Jambor <mjambor@suse.cz>
9863
9864 * tree-sra.cc (sra_modify_assign): Remove the original statement
9865 also when dealing with a store to a fully covered aggregate from a
9866 non-candidate.
9867
98682024-05-09 YunQiang Su <syq@gcc.gnu.org>
9869
9870 * config/mips/constraints.md: Add new constraint 'w'.
9871
98722024-05-09 Hu, Lin1 <lin1.hu@intel.com>
9873
9874 PR target/84508
9875 * config/i386/emmintrin.h
9876 (_mm_load_sd): Remove alignment requirement.
9877 (_mm_store_sd): Ditto.
9878 (_mm_loadh_pd): Ditto.
9879 (_mm_loadl_pd): Ditto.
9880 (_mm_storel_pd): Add alignment requirement.
9881 * config/i386/xmmintrin.h
9882 (_mm_loadh_pi): Remove alignment requirement.
9883 (_mm_loadl_pi): Ditto.
9884 (_mm_load_ss): Ditto.
9885 (_mm_store_ss): Ditto.
9886
98872024-05-09 Aldy Hernandez <aldyh@redhat.com>
9888
9889 PR tree-optimization/114912
9890 * value-range.h (class Value_Range): Use a union.
9891
98922024-05-09 Aldy Hernandez <aldyh@redhat.com>
9893
9894 * range-op.cc (range_op_handler::discriminator_fail): Reword error
9895 message.
9896
98972024-05-09 konglin1 <lingling.kong@intel.com>
9898
9899 * config/i386/i386.cc (ix86_hardreg_mov_ok): Relax
9900 hard reg mov restriction when lra in progress.
9901
99022024-05-08 Xiao Zeng <zengxiao@eswincomputing.com>
9903
9904 * config/riscv/riscv.cc (riscv_legitimize_move): Expand movbf
9905 with Nan-boxing value.
9906 * config/riscv/riscv.md (*movbf_softfloat_boxing): New pattern.
9907
99082024-05-08 Jeff Law <jlaw@ventanamicro.com>
9909
9910 * config/riscv/riscv.cc (riscv_build_integer_1): Fix incorrect
9911 if-then-else nesting of Zbs code.
9912
99132024-05-08 Vladimir N. Makarov <vmakarov@redhat.com>
9914
9915 PR target/114810
9916 * lra-constraints.cc (process_alt_operands): Calculate union reg
9917 class for the alternative, peak matched regs and required reload
9918 regs. Recognize alternatives with lack of available registers and
9919 make them costly. Add debug print about this case.
9920
99212024-05-08 Andrew Pinski <quic_apinski@quicinc.com>
9922
9923 PR tree-optimization/112392
9924 * match.pd (`x CMP nonnegative ? x : ABS<x>`): New pattern;
9925 where CMP is ==, > and >=.
9926 (`x CMP nonnegative@y ? y : ABS<x>`): New pattern.
9927
99282024-05-08 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
9929
9930 PR tree-optimization/81953
9931 * tree-ssa-sink.cc (statement_sink_location):Sink statements at
9932 the begining of the basic block after labels.
9933
99342024-05-08 Christoph Müllner <christoph.muellner@vrull.eu>
9935
9936 * config/riscv/iterators.md (ashiftrt): New code attribute
9937 'extract_shift' and adding extractions to optab.
9938 * config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): Rename to...
9939 (*<any_extract:optab><GPR:mode>3):...this and add support for
9940 sign-extensions.
9941
99422024-05-08 Christoph Müllner <christoph.muellner@vrull.eu>
9943
9944 PR target/111501
9945 * config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): New
9946 pattern for zero-extraction.
9947
99482024-05-08 Christoph Müllner <christoph.muellner@vrull.eu>
9949
9950 * config/riscv/iterators.md (sraiw): New code iterator 'any_extract'.
9951 New code attribute 'extract_sidi_shift'.
9952 * config/riscv/riscv.md (*lshrsi3_zero_extend_2): Rename to...
9953 (*lshrsi3_extend_2):...this and add support for sign-extensions.
9954
99552024-05-08 Richard Biener <rguenther@suse.de>
9956
9957 * tree-vect-loop.cc (get_initial_defs_for_reduction): Convert
9958 initial value to the vector component type.
9959
99602024-05-08 Richard Biener <rguenther@suse.de>
9961
9962 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
9963 Properly guard DR_GROUP_SIZE access with STMT_VINFO_GROUPED_ACCESS.
9964
99652024-05-08 Alex Coplan <alex.coplan@arm.com>
9966
9967 PR target/114936
9968 * config/aarch64/aarch64-ldp-fusion.cc (combine_reg_notes):
9969 Ensure insn iN has its REG_FRAME_RELATED_EXPR (if any) stored in
9970 FR_EXPR[N-1], thus matching the correspondence expected by the
9971 copy_rtx calls.
9972
99732024-05-08 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
9974
9975 * tree-ssa-loop-prefetch.cc (determine_unroll_factor): Honour
9976 -fno-unroll-loops.
9977
99782024-05-08 Georg-Johann Lay <avr@gjlay.de>
9979
9980 PR target/114975
9981 * config/avr/avr.md: Add combine pattern for
9982 8-bit parity detection.
9983
99842024-05-08 Georg-Johann Lay <avr@gjlay.de>
9985
9986 PR target/114975
9987 * config/avr/avr.md: Add combine pattern for
9988 8-bit popcount detection.
9989
99902024-05-08 Richard Biener <rguenther@suse.de>
9991
9992 * tree-into-ssa.cc (insert_updated_phi_nodes_for): Skip
9993 pruning when the nearest common dominator is the successor
9994 of ENTRY_BLOCK. Do not copy IDF but prune it directly.
9995
99962024-05-08 Jakub Jelinek <jakub@redhat.com>
9997
9998 PR tree-optimization/114965
9999 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Don't try to
10000 optimize away exp - lowi subtraction from shift count unless entry
10001 test is emitted or unless r.upper_bound () is smaller than prec.
10002
100032024-05-08 Eric Botcazou <ebotcazou@adacore.com>
10004
10005 * expmed.h (choose_multiplier): Tweak description and remove last
10006 parameter.
10007 * expmed.cc (choose_multiplier): Likewise. Add assertion for the
10008 third parameter and adds details to various comments.
10009 (invert_mod2n): Tweak description and add assertion for the first
10010 parameter.
10011 (expand_divmod): Adjust calls to choose_multiplier.
10012 * tree-vect-generic.cc (expand_vector_divmod): Likewise.
10013 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Likewise.
10014
100152024-05-08 konglin1 <lingling.kong@intel.com>
10016
10017 PR target/109549
10018 * config/i386/i386.cc (ix86_rtx_costs): The XEXP (x, 0) for cmov
10019 is an operator do not need to compute cost.
10020
100212024-05-08 Aldy Hernandez <aldyh@redhat.com>
10022
10023 * gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
10024 Change irange to prange.
10025 * gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
10026 (fold_using_range::range_of_address): Same.
10027 * gimple-range-fold.h (range_of_address): Same.
10028 * gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
10029 * gimple-range-op.cc (class cfn_strlen): Same.
10030 * gimple-range-path.cc
10031 (path_range_query::adjust_for_non_null_uses): Same.
10032 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
10033 * tree-ssa-structalias.cc (find_what_p_points_to): Same.
10034 * range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
10035 hybrid entries in table.
10036 * range-op.cc (range_op_table::range_op_table): Add pointer
10037 entries for bitwise and/or and min/max.
10038 * value-range.cc (irange::verify_range): Add assert.
10039 * value-range.h (irange::varying_compatible_p): Remove check for
10040 error_mark_node.
10041 (irange::supports_p): Remove pointer support.
10042 * ipa-cp.h (ipa_supports_p): Add prange support.
10043
100442024-05-07 Andrew Pinski <quic_apinski@quicinc.com>
10045
10046 PR tree-optimization/19661
10047 * tree-ssa-dce.cc (is_cxa_atexit): New function.
10048 (is_removable_cxa_atexit_call): New function.
10049 (mark_stmt_if_obviously_necessary): Don't mark removable
10050 cxa_at_exit calls.
10051 (mark_all_reaching_defs_necessary_1): Likewise.
10052 (propagate_necessity): Likewise.
10053
100542024-05-07 Andrew Pinski <quic_apinski@quicinc.com>
10055
10056 PR tree-optimization/114894
10057 * match.pd (`a != 0 ? a / b : 0`): New pattern.
10058 (`a != 0 ? a * b : 0`): New pattern.
10059 (`a != 0 ? a & b : 0`): New pattern.
10060
100612024-05-07 Jeff Law <jlaw@ventanamicro.com>
10062
10063 * config/riscv/riscv.cc (generic_ooo_tune_info): Turn on
10064 overlap_op_by_pieces.
10065
100662024-05-07 Christoph Müllner <christoph.muellner@vrull.eu>
10067
10068 * config/riscv/riscv.cc (struct riscv_tune_param): Add new
10069 "overlap_op_by_pieces" field.
10070 (rocket_tune_info, sifive_7_tune_info): Set it.
10071 (sifive_p400_tune_info, sifive_p600_tune_info): Likewise.
10072 (thead_c906_tune_info, xiangshan_nanhu_tune_info): Likewise.
10073 (generic_ooo_tune_info, optimize_size_tune_info): Likewise.
10074 (riscv_overlap_op_by_pieces): New function.
10075 (TARGET_OVERLAP_OP_BY_PIECES_P): define.
10076
100772024-05-07 Jakub Jelinek <jakub@redhat.com>
10078
10079 PR middle-end/114907
10080 * expr.cc (convert_mode_scalar): Use trunc_optab rather than
10081 sext_optab for HF->BF conversions.
10082 * optabs-libfuncs.cc (gen_trunc_conv_libfunc): Likewise.
10083
100842024-05-07 Jakub Jelinek <jakub@redhat.com>
10085
10086 PR sanitizer/114956
10087 * tree-inline.cc: Include asan.h.
10088 (copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan
10089 sanitization disabled.
10090
100912024-05-07 Jeff Law <jlaw@ventanamicro.com>
10092
10093 * config/riscv/riscv-string.cc (riscv_expand_strcmp): Do not inline
10094 strncmp with zero size.
10095 (emit_strcmp_scalar_compare_subword): Adjust rotation for rv32 vs rv64.
10096 * config/riscv/riscv.opt (var_inline_strcmp): Enable by default.
10097 (vriscv_inline_strncmp, riscv_inline_strlen): Likewise.
10098
100992024-05-07 Zac Walker <zacwalker@microsoft.com>
10100
10101 * config.gcc: Build and add objects for Cygwin and MinGW. Add Cygwin
10102 and MinGW options to the target.
10103
101042024-05-07 Zac Walker <zacwalker@microsoft.com>
10105
10106 * config/i386/mingw-w64.opt.urls: Rename options' name and
10107 regenerate option URLs.
10108 * config/lynx.opt.urls: Likewise.
10109 * config/mingw/cygming.opt.urls: Likewise.
10110 * config/mingw/mingw.opt.urls: Likewise.
10111 * doc/invoke.texi: Likewise.
10112
101132024-05-07 Zac Walker <zacwalker@microsoft.com>
10114
10115 * config/aarch64/aarch64.h (struct seh_frame_state): Declare SEH
10116 structure in machine_function.
10117 (GTY): Add SEH field.
10118
101192024-05-07 Zac Walker <zacwalker@microsoft.com>
10120
10121 * config.gcc: Add Cygwin and MinGW difinitions.
10122 * config/aarch64/aarch64-protos.h
10123 (mingw_pe_maybe_record_exported_symbol): Declare functions
10124 which are used in Cygwin and MinGW environment.
10125 (mingw_pe_section_type_flags): Likewise.
10126 (mingw_pe_unique_section): Likewise.
10127 (mingw_pe_encode_section_info): Likewise.
10128 * config/aarch64/cygming.h: New file.
10129
101302024-05-07 Zac Walker <zacwalker@microsoft.com>
10131
10132 * config.gcc: Define TARGET_AARCH64_MS_ABI.
10133 * config/mingw/mingw-stdint.h (INTPTR_TYPE): Use
10134 TARGET_AARCH64_MS_ABI to adjust MinGW headers for
10135 AArch64 MS ABI.
10136 (UINTPTR_TYPE): Likewise.
10137 (defined): Likewise.
10138 * config/mingw/mingw32.h (DEFAULT_ABI): Likewise.
10139 (defined): Likewise.
10140 * config/mingw/winnt.cc (defined): Use TARGET_ARM64_MS_ABI to
10141 exclude ix86_get_callcvt.
10142 (i386_pe_maybe_mangle_decl_assembler_name): Likewise.
10143 (i386_pe_mangle_decl_assembler_name): Likewise.
10144
101452024-05-07 Zac Walker <zacwalker@microsoft.com>
10146
10147 * config/i386/cygming.h (SUBTARGET_ENCODE_SECTION_INFO):
10148 Rename functions in mingw folder which will be reused for
10149 aarch64.
10150 (TARGET_ASM_UNIQUE_SECTION): Likewise.
10151 (TARGET_ASM_NAMED_SECTION): Likewise.
10152 (TARGET_SECTION_TYPE_FLAGS): Likewise.
10153 (ASM_DECLARE_COLD_FUNCTION_NAME): Likewise.
10154 (ASM_OUTPUT_EXTERNAL_LIBCALL): Likewise.
10155 * config/i386/i386-protos.h (i386_pe_unique_section):
10156 Rename into ...
10157 (mingw_pe_unique_section): ... this.
10158 (i386_pe_declare_function_type): Rename into ...
10159 (mingw_pe_declare_function_type): ... this.
10160 (i386_pe_encode_section_info): Rename into ...
10161 (mingw_pe_encode_section_info): ... this.
10162 (i386_pe_maybe_record_exported_symbol): Rename into ...
10163 (mingw_pe_maybe_record_exported_symbol): ... this.
10164 (i386_pe_section_type_flags): Rename into ...
10165 (mingw_pe_section_type_flags): ... this.
10166 (i386_pe_asm_named_section): Rename into ...
10167 (mingw_pe_asm_named_section): ... this.
10168 * config/mingw/winnt.cc (i386_pe_encode_section_info):
10169 Rename into ...
10170 (mingw_pe_encode_section_info): ... this.
10171 (i386_pe_unique_section): Rename into ...
10172 (mingw_pe_unique_section): ... this.
10173 (i386_pe_section_type_flags): Rename into ...
10174 (mingw_pe_section_type_flags): ... this.
10175 (i386_pe_asm_named_section): Rename into ...
10176 (mingw_pe_asm_named_section): ... this.
10177 (i386_pe_asm_output_aligned_decl_common): Likewise.
10178 (i386_pe_declare_function_type): Rename into ...
10179 (mingw_pe_declare_function_type): ... this.
10180 (i386_pe_maybe_record_exported_symbol): Rename into ...
10181 (mingw_pe_maybe_record_exported_symbol): ... this.
10182 (i386_pe_start_function): Likewise.
10183 * varasm.cc (switch_to_comdat_section): Likewise.
10184
101852024-05-07 Zac Walker <zacwalker@microsoft.com>
10186
10187 * config.gcc: Adjust targets after moving MinGW related files
10188 from i386 to mingw folder.
10189 * config/i386/cygming.opt: Move to...
10190 * config/mingw/cygming.opt: ...here.
10191 * config/i386/cygming.opt.urls: Move to...
10192 * config/mingw/cygming.opt.urls: ...here.
10193 * config/i386/cygwin-d.cc: Move to...
10194 * config/mingw/cygwin-d.cc: ...here.
10195 * config/i386/mingw-stdint.h: Move to...
10196 * config/mingw/mingw-stdint.h: ...here.
10197 * config/i386/mingw.opt: Move to...
10198 * config/mingw/mingw.opt: ...here.
10199 * config/i386/mingw.opt.urls: Move to...
10200 * config/mingw/mingw.opt.urls: ...here.
10201 * config/i386/mingw32.h: Move to...
10202 * config/mingw/mingw32.h: ...here.
10203 * config/i386/msformat-c.cc: Move to...
10204 * config/mingw/msformat-c.cc: ...here.
10205 * config/i386/t-cygming: Move to...
10206 * config/mingw/t-cygming: ...here and updated.
10207 * config/i386/winnt-cxx.cc: Move to...
10208 * config/mingw/winnt-cxx.cc: ...here.
10209 * config/i386/winnt-d.cc: Move to...
10210 * config/mingw/winnt-d.cc: ...here.
10211 * config/i386/winnt-stubs.cc: Move to...
10212 * config/mingw/winnt-stubs.cc: ...here.
10213 * config/i386/winnt.cc: Move to...
10214 * config/mingw/winnt.cc: ...here.
10215
102162024-05-07 Zac Walker <zacwalker@microsoft.com>
10217
10218 * config.gcc: Add COFF format support definitions.
10219 * config/aarch64/aarch64-coff.h: New file.
10220
102212024-05-07 Zac Walker <zacwalker@microsoft.com>
10222
10223 * config.gcc: Define TARGET_AARCH64_MS_ABI when
10224 AArch64 MS ABI is used.
10225 * config/aarch64/aarch64.h (FIXED_X18): Adjust
10226 FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
10227 STATIC_CHAIN_REGNUM for AArch64 MS ABI.
10228 (CALL_USED_X18): Likewise.
10229 (FIXED_REGISTERS): Likewise.
10230 * config/aarch64/aarch64-abi-ms.h: New file.
10231
102322024-05-07 Zac Walker <zacwalker@microsoft.com>
10233
10234 * config.gcc: Add aarch64-w64-mingw32 target.
10235
102362024-05-07 Alex Coplan <alex.coplan@arm.com>
10237
10238 PR target/114674
10239 * config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
10240 Use replace_equiv_address_nv on a change of base instead of
10241 adjust_address_nv on the other access.
10242
102432024-05-07 Richard Biener <rguenther@suse.de>
10244
10245 * tree-into-ssa.cc (insert_updated_phi_nodes_for): Fix block
10246 index check.
10247
102482024-05-07 Richard Biener <rguenther@suse.de>
10249
10250 * tree-ssa-live.cc (init_var_map): Pre-allocate vec_bbs vector
10251 to the correct size and use quick_push.
10252
102532024-05-07 Richard Biener <rguenther@suse.de>
10254
10255 PR middle-end/27800
10256 * gimplify.cc (gimplify_modify_expr_rhs): For a COND_EXPR
10257 avoid a temporary from gimplify_cond_expr when the LHS is
10258 a register by pushing the assignment into the COND_EXPR arms.
10259
102602024-05-07 Richard Biener <rguenther@suse.de>
10261
10262 * gimplify.cc (gimplify_hasher::equal): Remove redundant
10263 checking.
10264
102652024-05-07 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
10266
10267 PR tree-optimization/110490
10268 * tree-scalar-evolution.cc (expression_expensive_p): Also
10269 consider mode widening for popcount, clz, and ctz.
10270
102712024-05-07 Richard Biener <rguenther@suse.de>
10272
10273 * cfgexpand.cc (stack_var::representative): Use 'unsigned'
10274 for stack var indexes instead of 'size_t'.
10275 (stack_var::next): Likewise.
10276 (EOC): Likewise.
10277 (stack_vars_alloc): Likewise.
10278 (stack_vars_num): Likewise.
10279 (decl_to_stack_part): Likewise.
10280 (stack_vars_sorted): Likewise.
10281 (add_stack_var): Likewise.
10282 (add_stack_var_conflict): Likewise.
10283 (stack_var_conflict_p): Likewise.
10284 (visit_op): Likewise.
10285 (visit_conflict): Likewise.
10286 (add_scope_conflicts_1): Likewise.
10287 (stack_var_cmp): Likewise.
10288 (part_hashmap): Likewise.
10289 (update_alias_info_with_stack_vars): Likewise.
10290 (union_stack_vars): Likewise.
10291 (partition_stack_vars): Likewise.
10292 (dump_stack_var_partition): Likewise.
10293 (expand_stack_vars): Likewise.
10294 (account_stack_vars): Likewise.
10295 (stack_protect_decl_phase_1): Likewise.
10296 (stack_protect_decl_phase_2): Likewise.
10297 (asan_decl_phase_3): Likewise.
10298 (init_vars_expansion): Likewise.
10299 (estimated_stack_frame_size): Likewise.
10300
103012024-05-07 Richard Biener <rguenther@suse.de>
10302
10303 PR middle-end/114931
10304 * tree.cc (type_hash_canon_hash): Hash TYPE_STRUCTURAL_EQUALITY_P.
10305 (type_cache_hasher::equal): Compare TYPE_STRUCTURAL_EQUALITY_P.
10306 (build_array_type_1): Set TYPE_STRUCTURAL_EQUALITY_P before
10307 probing with type_hash_canon.
10308 (build_function_type): Likewise.
10309 (build_method_type_directly): Likewise.
10310 (build_offset_type): Likewise.
10311 (build_complex_type): Likewise.
10312 * attribs.cc (build_type_attribute_qual_variant): Likewise.
10313
103142024-05-07 Aldy Hernandez <aldyh@redhat.com>
10315
10316 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Use ipa_supports_p.
10317 (ipa_value_range_from_jfunc): Change Value_Range type.
10318 (propagate_vr_across_jump_function): Same.
10319 * ipa-cp.h (ipa_supports_p): New.
10320 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Change Value_Range type.
10321 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Use ipa_supports_p.
10322 (ipcp_get_parm_bits): Same.
10323
103242024-05-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
10325
10326 * config.gcc: Move *-*-solaris2.11.[0-3]* to unsupported list.
10327 <*-*-solaris2*> (default_use_cxa_atexit): Set unconditionally.
10328 * configure.ac (AX_LIB_SOCKET_NSL): Don't call.
10329 (NETLIBS): Remove.
10330 (gcc_cv_ld_aligned_shf_merge): Remove.
10331 (hidden_linkonce) <i?86-*-solaris2* | x86_64-*-solaris2*>: Remove.
10332 (gcc_cv_target_dl_iterate_phdr) <*-*-solaris2*>: Always set to yes.
10333 * Makefile.in (NETLIBS): Remove.
10334 * configure, config.in, aclocal.m4: Regenerate.
10335 * config/sol2.h: Don't check HAVE_SOLARIS_CRTS.
10336 (STARTFILE_SPEC): Remove !HAVE_SOLARIS_CRTS case.
10337 [USE_GLD] (LINK_EH_SPEC): Remove TARGET_DL_ITERATE_PHDR guard.
10338 * config/i386/i386.cc (USE_HIDDEN_LINKONCE): Remove guard.
10339 * varasm.cc (mergeable_string_section): Remove
10340 HAVE_LD_ALIGNED_SHF_MERGE handling.
10341 (mergeable_constant_section): Likewise.
10342 * doc/install.texi (Specific,i?86-*-solaris2*): Reference Solaris
10343 11.4 only.
10344 (Specific, *-*-solaris2*): Document Solaris 11.3 removal. Remove
10345 11.3 references and caveats. Update for 11.4.
10346
103472024-05-07 Richard Biener <rguenther@suse.de>
10348
10349 Revert:
10350 2024-04-10 Richard Biener <rguenther@suse.de>
10351
10352 Revert:
10353 2024-03-27 Segher Boessenkool <segher@kernel.crashing.org>
10354
10355 PR rtl-optimization/101523
10356 * combine.cc (try_combine): Don't do a 2-insn combination if
10357 it does not in fact change I2.
10358
103592024-05-07 Andrew Pinski <quic_apinski@quicinc.com>
10360
10361 PR middle-end/97263
10362 * doc/invoke.texi(fmath-errno): Document it is turned on
10363 with -Ofast.
10364 (funsafe-math-optimizations): Likewise.
10365 (ffinite-math-only): Likewise.
10366 (fno-trapping-math): Likewise and use less strong language.
10367
103682024-05-07 liuhongt <hongtao.liu@intel.com>
10369
10370 * config/i386/sse.md (usdot_prodv*qi): Extend to VI1_AVX512
10371 with vpmaddwd when avxvnni/avx512vnni is not available.
10372
103732024-05-07 liuhongt <hongtao.liu@intel.com>
10374
10375 PR target/113079
10376 * config/i386/mmx.md (usdot_prodv8qi): New expander.
10377 (sdot_prodv8qi): Ditto.
10378 (udot_prodv8qi): Ditto.
10379 (usdot_prodv4hi): Ditto.
10380 (udot_prodv4hi): Ditto.
10381 (sdot_prodv4hi): Ditto.
10382
103832024-05-07 liuhongt <hongtao.liu@intel.com>
10384
10385 PR target/113090
10386 * config/i386/i386-expand.cc
10387 (expand_vec_perm_punpckldq_pshuf): New function.
10388 (ix86_expand_vec_perm_const_1): Try
10389 expand_vec_perm_punpckldq_pshuf for sequence of 2
10390 instructions.
10391
103922024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10393
10394 * config/pru/pru-passes.cc (class pass_pru_minrt_check): New
10395 pass.
10396 (pass_pru_minrt_check::execute): New method.
10397 (make_pru_minrt_check): New function.
10398 * config/pru/pru-passes.def (INSERT_PASS_AFTER): Register the
10399 minrt check pass.
10400 * config/pru/pru-protos.h (make_pru_minrt_check): Add
10401 declaration.
10402
104032024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10404
10405 * config/pru/pru-passes.cc (class pass_tiabi_check): Rename to
10406 add "pru_" prefix.
10407 (class pass_pru_tiabi_check): Ditto.
10408 (pass_tiabi_check::execute): Ditto.
10409 (pass_pru_tiabi_check::execute): Ditto.
10410 (make_pru_tiabi_check): Ditto.
10411 (pru_register_abicheck_pass): Remove.
10412 * config/pru/pru-protos.h (pru_register_abicheck_pass): Remove.
10413 (make_pru_tiabi_check): Add declaration.
10414 * config/pru/pru.cc (pru_option_override): Remove explicit pass
10415 registration.
10416 * config/pru/t-pru: Register PRU passes definition file.
10417 * config/pru/pru-passes.def: New file.
10418
104192024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10420
10421 * config/pru/pru.md (lshrdi3): Use HOST_WIDE_INT_1U macro.
10422 (ashldi3): Ditto.
10423
104242024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10425
10426 * config/pru/pru-passes.cc: Drop ATTRIBUTE_UNUSED and remove
10427 argument's name.
10428 * config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Ditto.
10429 * config/pru/pru.cc (pru_function_profiler): Ditto.
10430 (pru_can_eliminate): Ditto.
10431 (pru_rtx_costs): Ditto.
10432 (pru_insert_attributes): Ditto.
10433 (pru_function_value): Ditto.
10434 (pru_libcall_value): Ditto.
10435 (pru_return_in_memory): Ditto.
10436 (pru_builtin_decl): Ditto.
10437 (pru_expand_builtin): Ditto.
10438
104392024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10440
10441 * config/pru/pru.cc (prologue_saved_reg_p): Skip saving
10442 if function will not return.
10443
104442024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10445
10446 * config/pru/alu-zext.md (_noz0): New subst attribute.
10447 (<code>_impl): Allow zero-extending the destination.
10448 (<shift_op>): Remove unified pattern
10449 (ashl_impl): New distinct pattern.
10450 (lshr_impl): Ditto.
10451 (alu3_zext_op0_subst): New subst iterator to zero-extend the
10452 destination register.
10453
104542024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10455
10456 * config/pru/pru.md (extzv<mode>): Make it an expand pattern,
10457 handle efficiently zero-positioned bit-fields.
10458 (insv<mode>): New expand pattern.
10459
104602024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10461
10462 * config/pru/pru.md: New pattern alternative for zero-filling
10463 64-bit registers.
10464
104652024-05-07 Dimitar Dimitrov <dimitar@dinux.eu>
10466
10467 * config/pru/pru.cc (pru_address_cost): Implement address cost
10468 calculation.
10469 (TARGET_ADDRESS_COST): Define for PRU.
10470
104712024-05-07 Richard Biener <rguenther@suse.de>
10472
10473 PR tree-optimization/114921
10474 * tree-vect-stmts.cc (vectorizable_assignment): Use
10475 tree_nop_conversion_p to identify converts we can vectorize
10476 with a simple assignment.
10477
104782024-05-07 Roger Sayle <roger@nextmovesoftware.com>
10479 Hongtao Liu <hongtao.liu@intel.com>
10480
10481 PR target/106060
10482 * config/i386/i386-expand.cc (enum ix86_vec_bcast_alg): New.
10483 (struct ix86_vec_bcast_map_simode_t): New type for table below.
10484 (ix86_vec_bcast_map_simode): Table of SImode constants that may
10485 be efficiently synthesized by a ix86_vec_bcast_alg method.
10486 (ix86_vec_bcast_map_simode_cmp): New comparator for bsearch.
10487 (ix86_vector_duplicate_simode_const): Efficiently synthesize
10488 V4SImode and V8SImode constants that duplicate special constants.
10489 (ix86_vector_duplicate_value): Attempt to synthesize "special"
10490 vector constants using ix86_vector_duplicate_simode_const.
10491 * config/i386/i386.cc (ix86_rtx_costs) <case ABS>: ABS of a
10492 vector integer mode costs with a single SSE instruction.
10493
104942024-05-06 Xiao Zeng <zengxiao@eswincomputing.com>
10495
10496 * common/config/riscv/riscv-common.cc (riscv_implied_info): zfbfmin
10497 implies zfhmin.
10498 (riscv_ext_version_table, riscv_ext_flag_table): Add zfbfmin.
10499 * config/riscv/riscv.opt (ZFBFMIN): Add optoion.
10500
105012024-05-06 Xiao Zeng <zengxiao@eswincomputing.com>
10502 Jin Ma <jinma@linux.alibaba.com>
10503
10504 * config/riscv/iterators.md: New mode iterator HFBF.
10505 * config/riscv/riscv-builtins.cc (riscv_init_builtin_types):
10506 Initialize data type _Bfloat16.
10507 * config/riscv/riscv-modes.def (FLOAT_MODE): New.
10508 (ADJUST_FLOAT_FORMAT): New.
10509 * config/riscv/riscv.cc (riscv_mangle_type): Support for BFmode.
10510 (riscv_scalar_mode_supported_p): Ditto.
10511 (riscv_libgcc_floating_mode_supported_p): Ditto.
10512 (riscv_init_libfuncs): Set the conversion method for BFmode and
10513 HFmode.
10514 (riscv_block_arith_comp_libfuncs_for_mode): Set the arithmetic
10515 and comparison libfuncs for the mode.
10516 * config/riscv/riscv.md (mode" ): Add BF.
10517 (movhf): Support for BFmode.
10518 (mov<mode>): Ditto.
10519 (*movhf_softfloat): Ditto.
10520 (*mov<mode>_softfloat): Ditto.
10521
105222024-05-06 Palmer Dabbelt <palmer@rivosinc.com>
10523
10524 * doc/invoke.texi (RISC-V): Add -mcmodel=large.
10525
105262024-05-06 Jeff Law <jlaw@ventanamicro.com>
10527
10528 * config/riscv/riscv.cc (riscv_integer_op): Add field tracking if we
10529 want to use a "uw" instruction variant.
10530 (riscv_build_integer_1): Initialize the new field in various places.
10531 Use lui+slli.uw for some constants.
10532 (riscv_move_integer): Handle slli.uw.
10533
105342024-05-06 Qing Zhao <qing.zhao@oracle.com>
10535
10536 PR c/53548
10537 * stor-layout.cc (place_union_field): Use zero sizes for flexible array
10538 member fields.
10539
105402024-05-06 Qing Zhao <qing.zhao@oracle.com>
10541
10542 PR c/53548
10543 * doc/extend.texi: Add documentation for Flexible Array Members in
10544 Unions and Flexible Array Members alone in Structures.
10545
105462024-05-06 Georg-Johann Lay <avr@gjlay.de>
10547
10548 PR ipa/92606
10549 * config/avr/avr.cc (avr_option_override): Set
10550 flag_ipa_icf_variables = 0.
10551
105522024-05-06 Sandra Loosemore <sloosemore@baylibre.com>
10553
10554 * tree-nested.cc (convert_tramp_reference_stmt): Use the correct
10555 accessor for GIMPLE_OMP_TARGET clauses.
10556
105572024-05-06 Richard Biener <rguenther@suse.de>
10558
10559 PR tree-optimization/100923
10560 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Valueize
10561 base SSA_NAME.
10562 (vn_reference_lookup_3): Adjust vn_context_bb around calls
10563 to ao_ref_init_from_vn_reference.
10564 (vn_reference_lookup_pieces): Revert original PR100923 fix.
10565 (vn_reference_lookup): Likewise.
10566
105672024-05-06 Richard Biener <rguenther@suse.de>
10568
10569 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Add
10570 TARGET_MEM_REF support. Handle more bases.
10571
105722024-05-06 YunQiang Su <syq@gcc.gnu.org>
10573
10574 PR target/113179
10575 * expmed.cc(store_bit_field_using_insv): TRUNCATE value1 if
10576 needed.
10577
105782024-05-05 Andrew Pinski <quic_apinski@quicinc.com>
10579
10580 * gimple-loop-versioning.cc (loop_versioning): Remove m_nloops field.
10581 (loop_versioning::loop_versioning): Remove initialization of
10582 m_nloops field and move it to be a local variable.
10583 (loop_versioning::analyze_blocks): Fix formating.
10584
105852024-05-04 Aldy Hernandez <aldyh@redhat.com>
10586
10587 * gimple-range-op.cc (class cfn_pass_through_arg1): Add overloads
10588 for prange operations.
10589 (cfn_strlen): Same.
10590
105912024-05-04 Aldy Hernandez <aldyh@redhat.com>
10592
10593 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10594 * range-op-ptr.cc (operator_ge::fold_range): New.
10595 (operator_ge::op1_range): New.
10596 (operator_ge::op2_range): New.
10597 (operator_ge::op1_op2_relation): New.
10598 (operator_ge::pointers_handled_p): New.
10599
106002024-05-04 Aldy Hernandez <aldyh@redhat.com>
10601
10602 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10603 * range-op-ptr.cc (operator_gt::fold_range): New.
10604 (operator_gt::op1_range): New.
10605 (operator_gt::op2_range): New.
10606 (operator_gt::op1_op2_relation): New.
10607 (operator_gt::pointers_handled_p): New.
10608
106092024-05-04 Aldy Hernandez <aldyh@redhat.com>
10610
10611 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10612 * range-op-ptr.cc (operator_le::fold_range): New.
10613 (operator_le::op1_range): New.
10614 (operator_le::op2_range): New.
10615 (operator_le::op1_op2_relation): New.
10616 (operator_le::pointers_handled_p): New.
10617
106182024-05-04 Aldy Hernandez <aldyh@redhat.com>
10619
10620 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10621 * range-op-ptr.cc (max_limit): New.
10622 (min_limit): New.
10623 (build_lt): New.
10624 (build_le): New.
10625 (build_gt): New.
10626 (build_ge): New.
10627 (operator_lt::fold_range): New.
10628 (operator_lt::op1_range): New.
10629 (operator_lt::op2_range): New.
10630 (operator_lt::op1_op2_relation): New.
10631 (operator_lt::pointers_handled_p): New.
10632
106332024-05-04 Aldy Hernandez <aldyh@redhat.com>
10634
10635 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10636 * range-op-ptr.cc (operator_equal::fold_range): New.
10637 (operator_equal::op1_range): New.
10638 (operator_equal::op2_range): New.
10639 (operator_equal::op1_op2_relation): New.
10640 (operator_equal::pointers_handled_p): New.
10641
106422024-05-04 Aldy Hernandez <aldyh@redhat.com>
10643
10644 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10645 * range-op-ptr.cc (operator_not_equal::fold_range): New.
10646 (operator_not_equal::op1_range): New.
10647 (operator_not_equal::op2_range): New.
10648 (operator_not_equal::op1_op2_relation): New.
10649 (operator_not_equal::pointers_handled_p): New.
10650
106512024-05-04 Aldy Hernandez <aldyh@redhat.com>
10652
10653 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10654 * range-op-ptr.cc (operator_bitwise_or::pointers_handled_p): New.
10655
106562024-05-04 Aldy Hernandez <aldyh@redhat.com>
10657
10658 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10659 * range-op-ptr.cc (operator_bitwise_and::fold_range): New.
10660 (operator_bitwise_and::pointers_handled_p): New.
10661
106622024-05-04 Aldy Hernandez <aldyh@redhat.com>
10663
10664 * range-op-ptr.cc
10665 (operator_pointer_diff::op1_op2_relation_effect): New.
10666 (operator_pointer_diff::pointers_handled_p): New.
10667
106682024-05-04 Aldy Hernandez <aldyh@redhat.com>
10669
10670 * range-op-ptr.cc (class pointer_plus_operator): Add overloaded declarations
10671 for pointer variants.
10672 (pointer_plus_operator::fold_range): New.
10673 (pointer_plus_operator::op2_range): New.
10674 (pointer_plus_operator::pointers_handled_p): New.
10675
106762024-05-04 Aldy Hernandez <aldyh@redhat.com>
10677
10678 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10679 * range-op-ptr.cc (operator_addr_expr::op1_range): New.
10680 (operator_addr_expr::pointers_handled_p): New.
10681
106822024-05-04 Aldy Hernandez <aldyh@redhat.com>
10683
10684 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10685 * range-op-ptr.cc (operator_min::fold_range): New.
10686 (operator_min::pointers_handled_p): New.
10687 (operator_max::fold_range): New.
10688 (operator_max::pointers_handled_p): New.
10689
106902024-05-04 Aldy Hernandez <aldyh@redhat.com>
10691
10692 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10693 * range-op-ptr.cc (operator_cast::fold_range): New.
10694 (operator_cast::op1_range): New.
10695 (operator_cast::lhs_op1_relation): New.
10696 (operator_cast::pointers_handled_p): New.
10697
106982024-05-04 Aldy Hernandez <aldyh@redhat.com>
10699
10700 * range-op-mixed.h: Add overloaded declarations for pointer variants.
10701 * range-op-ptr.cc (operator_cst::fold_range): New.
10702 (operator_cst::pointers_handled_p): New.
10703
107042024-05-04 Aldy Hernandez <aldyh@redhat.com>
10705
10706 * range-op-mixed.h: Add overloaded declarations for fold_range, op1_range,
10707 lhs_op1_relation, pointers_handled_p.
10708 * range-op-ptr.cc (operator_identity::fold_range): New.
10709 (operator_identity::lhs_op1_relation): New.
10710 (operator_identity::op1_range): New.
10711 (operator_identity::pointers_handled_p): New.
10712
107132024-05-04 Aldy Hernandez <aldyh@redhat.com>
10714
10715 * range-op-mixed.h: Add using declarator for all classes.
10716 * range-op-ptr.cc (range_operator::pointers_handled_p): New.
10717 (range_operator::fold_range): New.
10718 (range_operator::op1_op2_relation_effect): New.
10719 (range_operator::op1_range): New.
10720 (range_operator::op2_range): New.
10721 (range_operator::op1_op2_relation): New.
10722 (range_operator::lhs_op1_relation): New.
10723 (range_operator::update_bitmask): New.
10724 (class pointer_plus_operator): New.
10725 (class operator_pointer_diff): New.
10726 (class hybrid_min_operator): New.
10727 (class hybrid_max_operator): New.
10728 * range-op.cc: Add RO_PPP, RO_PPI, RO_IPP, RO_IPI, RO_PIP, RO_PII.
10729 (range_op_handler::discriminator_fail): New.
10730 (has_pointer_operand_p): New.
10731 (range_op_handler::fold_range): Add pointer support.
10732 (range_op_handler::op1_range): Same.
10733 (range_op_handler::op2_range): Same.
10734 (range_op_handler::lhs_op1_relation): Same.
10735 (range_op_handler::lhs_op2_relation): Same.
10736 (range_op_handler::op1_op2_relation): Same.
10737 (class operator_div): Add using.
10738 (class operator_lshift): Add using.
10739 (class operator_rshift):Add using.
10740 (class operator_trunc_mod):Add using.
10741 (class operator_absu):Add using.
10742 * range-op.h (enum range_op_dispatch_type): New.
10743 Add extern definitions for RO_*.
10744
107452024-05-04 Aldy Hernandez <aldyh@redhat.com>
10746
10747 * value-range.cc (get_legacy_range): New version for prange.
10748
107492024-05-04 Aldy Hernandez <aldyh@redhat.com>
10750
10751 * value-range.cc (add_vrange): Add prange support.
10752
107532024-05-04 Aldy Hernandez <aldyh@redhat.com>
10754
10755 * value-range-storage.cc (vrange_allocator::clone_varying): Add
10756 prange support.
10757 (vrange_allocator::clone_undefined): Same.
10758 (vrange_storage::alloc): Same.
10759 (vrange_storage::set_vrange): Same.
10760 (vrange_storage::get_vrange): Same.
10761 (vrange_storage::fits_p): Same.
10762 (vrange_storage::equal_p): Same.
10763 (prange_storage::alloc): New.
10764 (prange_storage::prange_storage): New.
10765 (prange_storage::set_prange): New.
10766 (prange_storage::get_prange): New.
10767 (prange_storage::equal_p): New.
10768 (prange_storage::fits_p): New.
10769 * value-range-storage.h (class prange_storage): Add prange support.
10770
107712024-05-04 Aldy Hernandez <aldyh@redhat.com>
10772
10773 * data-streamer-in.cc (streamer_read_value_range): Add prange support.
10774 * data-streamer-out.cc (streamer_write_vrange): Same.
10775
107762024-05-04 Aldy Hernandez <aldyh@redhat.com>
10777
10778 * value-range-pretty-print.cc (vrange_printer::visit): New.
10779 * value-range-pretty-print.h: Declare prange visit() method.
10780 * value-range.cc (vrange::operator=): Add prange support.
10781 (vrange::operator==): Same.
10782 (prange::accept): New.
10783 (prange::set_nonnegative): New.
10784 (prange::set): New.
10785 (prange::contains_p): New.
10786 (prange::singleton_p): New.
10787 (prange::lbound): New.
10788 (prange::ubound): New.
10789 (prange::union_): New.
10790 (prange::intersect): New.
10791 (prange::operator=): New.
10792 (prange::operator==): New.
10793 (prange::invert): New.
10794 (prange::verify_range): New.
10795 (prange::update_bitmask): New.
10796 (range_tests_misc): Use prange.
10797 * value-range.h (enum value_range_discriminator): Add VR_PRANGE.
10798 (class prange): New.
10799 (Value_Range::init): Add prange support.
10800 (Value_Range::operator=): Same.
10801 (Value_Range::supports_type_p): Same.
10802 (prange::prange): New.
10803 (prange::supports_p): New.
10804 (prange::supports_type_p): New.
10805 (prange::set_undefined): New.
10806 (prange::set_varying): New.
10807 (prange::set_nonzero): New.
10808 (prange::set_zero): New.
10809 (prange::contains_p): New.
10810 (prange::zero_p): New.
10811 (prange::nonzero_p): New.
10812 (prange::type): New.
10813 (prange::lower_bound): New.
10814 (prange::upper_bound): New.
10815 (prange::varying_compatible_p): New.
10816 (prange::get_bitmask): New.
10817 (prange::fits_p): New.
10818
108192024-05-04 Aldy Hernandez <aldyh@redhat.com>
10820
10821 * value-range.h (class prange): New.
10822
108232024-05-03 Andrew Pinski <quic_apinski@quicinc.com>
10824
10825 PR middle-end/23872
10826 * tree-pretty-print.cc (dump_generic_node <case COMPOUND_EXPR>): Fix
10827 calls to dump_generic_node and also remove unreachable code that is testing
10828 `flags & TDF_SLIM`.
10829
108302024-05-03 Vineet Gupta <vineetg@rivosinc.com>
10831
10832 * config/riscv/riscv.cc: Comment updates.
10833 * config/riscv/riscv.h: Ditto.
10834
108352024-05-03 Vineet Gupta <vineetg@rivosinc.com>
10836
10837 * doc/rtl.texi: Add entry for GET_MODE_INNER.
10838
108392024-05-03 Richard Biener <rguenther@suse.de>
10840
10841 * bitmap.cc (bitmap_alloc): When using the global bitmap obstack
10842 assert that is initialized.
10843
108442024-05-03 Richard Biener <rguenther@suse.de>
10845
10846 PR middle-end/114931
10847 * tree.cc (build_array_type_1): Return early when type_hash_canon
10848 returned an older existing type.
10849 (build_function_type): Likewise.
10850 (build_method_type_directly): Likewise.
10851 (build_offset_type): Likewise.
10852
108532024-05-03 Alex Coplan <alex.coplan@arm.com>
10854
10855 PR rtl-optimization/114924
10856 * cfgrtl.cc (duplicate_insn_chain): When updating MEM_EXPRs,
10857 don't strip (e.g.) ARRAY_REFs from the final MEM_EXPR.
10858
108592024-05-03 Jakub Jelinek <jakub@redhat.com>
10860
10861 PR middle-end/113596
10862 * tree-inline.cc (expand_call_inline): Emit __builtin_stack_save
10863 and __builtin_stack_restore calls around inlined functions which
10864 call alloca.
10865
108662024-05-03 Richard Biener <rguenther@suse.de>
10867
10868 PR tree-optimization/114921
10869 * tree-vect-stmts.cc (vectorizable_assignment): Require
10870 same vector component modes for input and output for
10871 CONVERT_EXPR_CODE_P.
10872
108732024-05-02 Jeff Law <jlaw@ventanamicro.com>
10874
10875 * config/riscv/riscv.md (<round_pattern><ANYF:mode>2): Adjust
10876 condition to match what can be properly implemented. Fix various
10877 formatting issues.
10878 (l<round_pattern><ANYF:mode>si2_sext): Fix formatting
10879
108802024-05-02 Jeff Law <jlaw@ventanamicro.com>
10881
10882 * config/riscv/predicates.md (arith_or_zbs_operand): New predicate.
10883 * config/riscv/riscv.cc (riscv_build_integer_one): Use bseti to set
10884 single bits when profitable.
10885 * config/riscv/riscv.md (*<optab><mode>3): Renamed with '*' prefix.
10886 (<optab><mode>3): New expander for IOR/XOR.
10887
108882024-05-02 Richard Biener <rguenther@suse.de>
10889
10890 * tree-vect-slp.cc (vect_print_slp_tree): Mark live lanes.
10891 (dot_slp_tree): New overload for multiple entries.
10892
108932024-05-02 Gaius Mulley <gaiusmod2@gmail.com>
10894
10895 PR modula2/113836
10896 * doc/gm2.texi (Compiler options): Add -fm2-debug-trace=,
10897 -fm2-dump, -fm2-dump-decl=, -fm2-dump-gimple=, -fm2-dump-quad=
10898 and -fm2-dump-filter=.
10899
109002024-05-02 Marc Poulhiès <poulhies@adacore.com>
10901
10902 * value-range.h: fix static_assert to use 2 arguments.
10903
109042024-05-02 Peter Damianov <peter0x44@disroot.org>
10905
10906 PR lto/110710
10907 * lto-wrapper.cc (run_gcc): Instead of truncating a processed
10908 ltrans input from the Makefile use the new -truncate option
10909 to accomplish the same.
10910
109112024-05-02 Peter Damianov <peter0x44@disroot.org>
10912
10913 PR lto/110710
10914 * common.opt (truncate): New internal option.
10915 * gcc.cc (totruncate_file): New global.
10916 (driver_handle_option): Handle -truncate <file>.
10917 (driver::final_actions): Truncate the file indicated.
10918
109192024-05-02 Richard Biener <rguenther@suse.de>
10920
10921 * graphds.cc (dump_graph): Dump in graphviz format.
10922
109232024-05-02 Richard Biener <rguenther@suse.de>
10924
10925 * tree-ssa-live.h (tree_live_info_d::global): Remove.
10926 (partition_is_global): Likewise.
10927 (make_live_on_entry): Do not set bit in global.
10928 * tree-ssa-live.cc (new_tree_live_info): Do not allocate
10929 global bitmap.
10930 (delete_tree_live_info): Do not release it.
10931 (set_var_live_on_entry): Do not set bits in it.
10932
109332024-05-02 Richard Biener <rguenther@suse.de>
10934
10935 PR middle-end/114579
10936 * cfgexpand.cc (add_scope_conflicts_1): Record all-to-all
10937 conflicts only when there's a CFG merge but for all CFG merges.
10938
109392024-05-01 Gerald Pfeifer <gerald@pfeifer.com>
10940
10941 PR target/69374
10942 PR target/112959
10943 * doc/install.texi (Specific) <*-*-freebsd*>: The Ada and D
10944 run-time libraries are broken on i386 which also can affect
10945 64-bit builds. Go is broken.
10946
109472024-05-01 Jeff Law <jlaw@ventanamicro.com>
10948
10949 * config/riscv/bitmanip.md (splitter to use w-form division): Remove
10950 explicit subregs.
10951 (zero extended bitfield extraction): Similarly.
10952 * config/riscv/thead.md (*th_memidx_operand): Similarly.
10953
109542024-05-01 Jeff Law <jlaw@ventanamicro.com>
10955
10956 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Break out
10957 tests for easier debugging in store pair fusion case. Fix offset
10958 check in same.
10959
109602024-05-01 Gerald Pfeifer <gerald@pfeifer.com>
10961
10962 PR target/69374
10963 PR target/112959
10964 * doc/install.texi (Specific) <*-*-freebsd*>: No longer refer
10965 to GCC or binutils in base. Recommend bootstrap using binutils.
10966
109672024-05-01 Gerald Pfeifer <gerald@pfeifer.com>
10968
10969 PR target/69374
10970 * doc/install.texi (Specific) <ia64-*-hpux*>: Remove details
10971 on libunwind for GCC 3.4 and earlier.
10972
109732024-05-01 Aldy Hernandez <aldyh@redhat.com>
10974
10975 * ipa-fnsummary.cc (evaluate_properties_for_edge): Initialize Value_Range's.
10976 * value-range.h (class Value_Range): Add a buffer and remove
10977 m_irange and m_frange.
10978 (Value_Range::Value_Range): Call init.
10979 (Value_Range::set_type): Same.
10980 (Value_Range::init): Use in place new to initialize buffer.
10981 (Value_Range::operator=): Tidy.
10982
109832024-05-01 Aldy Hernandez <aldyh@redhat.com>
10984
10985 * value-range.cc (unsupported_range::union_): Cast vrange to
10986 unsupported_range.
10987 (unsupported_range::intersect): Same.
10988 (unsupported_range::operator=): Make argument an unsupported_range.
10989 * value-range.h: New constructor.
10990
109912024-04-30 Andrew MacLeod <amacleod@redhat.com>
10992
10993 * gimple-range-op.cc (gimple_range_op_handler::calc_op1): Don't
10994 assert that here are less than 3 operands.
10995 (gimple_range_op_handler::maybe_builtin_call): Simply return if
10996 there is no type for the function call.
10997
109982024-04-30 Andrew MacLeod <amacleod@redhat.com>
10999
11000 * gimple-range.cc (gimple_ranger::range_on_entry): Adjust for new
11001 API and support non-SSA expressions.
11002 (gimple_ranger::range_on_exit): Ditto.
11003 * gimple-range.h (range_on_entry, range_on_exit): Adjust API.
11004 * value-query.cc (range_query::range_on_entry): New.
11005 (range_query::range_on_exit): New.
11006 (range_query::value_on_entry): New.
11007 (range_query::value_on_exit): New.
11008 (range_query::invoke_range_of_expr): New.
11009 (range_query::get_tree_range): Allow stmt, on_entry or on_exit
11010 range queries.
11011 SSA_NAMES should invoke range_of_expr if possible.
11012 * value-query.h (class range_query): Adjust prototypes.
11013
110142024-04-30 Andrew MacLeod <amacleod@redhat.com>
11015
11016 * gimple-range.cc (gimple_ranger::range_of_expr): Call range_of_stmt
11017 when there is no context stmt.
11018
110192024-04-30 Andrew MacLeod <amacleod@redhat.com>
11020
11021 * gimple-range-cache.cc (ranger_cache::get_global_range): Do not
11022 pre-evaluate PHI nodes from the cache.
11023 (ranger_cache::fill_block_cache): Make re-entrant.
11024
110252024-04-30 Andrew MacLeod <amacleod@redhat.com>
11026
11027 * value-query.cc (get_range_global): Rename to gimple_range_global.
11028 (gimple_range_global): Remove wrapper function.
11029 (global_range_query::range_of_expr): Call gimple_range_global.
11030
110312024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11032
11033 * tree-cfg.cc (verify_gimple_assign): Remove quote
11034 mark to shut up the warning.
11035
110362024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11037
11038 * tree-ssa-phiopt.cc (value_replacement): Reject undef variables
11039 so they don't become unconditional used.
11040
110412024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11042
11043 * tree-ssa-phiopt.cc (value_replacement): Move check for
11044 NE/EQ earlier.
11045
110462024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11047
11048 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges):
11049 Remove the special case of gimple_seq_singleton_p.
11050
110512024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11052
11053 PR middle-end/112976
11054 * cfgexpand.cc (expand_gimple_stmt_1): Remove
11055 support for expanding nontemporal "moves" with
11056 ssa names on the LHS.
11057
110582024-04-30 Andrew Pinski <quic_apinski@quicinc.com>
11059
11060 PR middle-end/112976
11061 * tree-cfg.cc (verify_gimple_assign): Verify that
11062 nontmporal moves are stores.
11063 * gimple.h (struct gimple): Note that only
11064 nontemporal stores are supported.
11065
110662024-04-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
11067
11068 * config/riscv/iterators.md (fix_ops, fix_uns): New iterators.
11069 (RINT, rint_pattern, rint_rm): Remove unused iterators.
11070 * config/riscv/riscv-protos.h (get_fp_rounding_coefficient): Prototype.
11071 * config/riscv/riscv-v.cc (get_fp_rounding_coefficient): Externalize.
11072 external linkage.
11073 * config/riscv/riscv.md (UNSPEC_LROUND): Remove.
11074 (fix_trunc<ANYF:mode><GPR:mode>2): Replace with ...
11075 (<fix_uns>_trunc<ANYF:mode>si2): New expander & associated insn.
11076 (<fix_uns>_trunc<ANYF:mode>si2_ext): New insn.
11077 (<fix_uns>_trunc<ANYF:mode>di2): Likewise.
11078 (l<rint_pattern><ANYF:mode><GPR:mode>2): Replace with ...
11079 (lrint<ANYF:mode>si2): New expander and associated insn.
11080 (lrint<ANYF:mode>si2_ext, lrint<ANYF:mode>di2): New insns.
11081 (<round_pattern><ANYF:mode>2): Replace with....
11082 (l<round_pattern><ANYF:mode>si2): New expander and associated insn.
11083 (l<round_pattern><ANYF:mode>si2_sext): New insn.
11084 (l<round_pattern><ANYF:mode>di2): Likewise.
11085 (<round_pattern><ANYF:mode>2): New expander.
11086
110872024-04-30 Aldy Hernandez <aldyh@redhat.com>
11088
11089 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Change
11090 int_range<2> to int_range_max.
11091 (memmodel_to_uhwi): Same.
11092 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Same.
11093 (determine_value_range): Same.
11094 (infer_loop_bounds_from_signedness): Same.
11095 (scev_var_range_cant_overflow): Same.
11096
110972024-04-30 Richard Biener <rguenther@suse.de>
11098
11099 PR middle-end/13421
11100 * optabs-tree.cc (optab_for_tree_code): Do not consider
11101 {add,sub}v or {us,ss}{add,sub} optabs for POINTER_DIFF_EXPR
11102 or POINTER_PLUS_EXPR.
11103
111042024-04-30 Jakub Jelinek <jakub@redhat.com>
11105
11106 PR tree-optimization/114876
11107 * gimple-ssa-sprintf.cc (format_character): For min == 0 && max == 0,
11108 set max, likely and unlikely members to 1 rather than 0. Remove
11109 useless res.knownrange = true;. Formatting fixes.
11110
111112024-04-30 Jakub Jelinek <jakub@redhat.com>
11112 Hongtao Liu <hongtao.liu@intel.com>
11113
11114 PR tree-optimization/114883
11115 * tree-vect-loop.cc (vect_transform_reduction): Allow IFN_COND_MIN and
11116 IFN_COND_MAX in the assert.
11117
111182024-04-30 Jakub Jelinek <jakub@redhat.com>
11119
11120 * doc/cpp.texi (__STDC_VERSION__): Document 202311L value
11121 for -std=c23/-std=gnu23.
11122
111232024-04-30 Richard Biener <rguenther@suse.de>
11124
11125 PR middle-end/114734
11126 * internal-fn.cc (expand_call_mem_ref): Use
11127 get_gimple_for_ssa_name to get at the def stmt of the address
11128 argument to honor SSA coalescing constraints.
11129
111302024-04-29 demin.han <demin.han@starfivetech.com>
11131
11132 PR target/114506
11133 * config/riscv/riscv-vector-costs.cc (non_contiguous_memory_access_p): Rename
11134 (need_additional_vector_vars_p): Rename and refine condition
11135
111362024-04-29 Pan Li <pan2.li@intel.com>
11137
11138 PR target/114885
11139 * config/riscv/riscv.cc (riscv_legitimize_subreg_const_poly_move): New
11140 func impl to take care of (const_int_poly:TI 8).
11141 (riscv_legitimize_move): Handle subreg is const_int_poly,
11142
111432024-04-29 Christoph Müllner <christoph.muellner@vrull.eu>
11144
11145 * common/config/riscv/riscv-common.cc: Move ziccamoa, ziccif,
11146 zicclsm, and ziccrse into riscv_zi_subext.
11147 * config/riscv/riscv.opt: Define MASK_ZIC64B for
11148 riscv_ziccmo_subext.
11149
111502024-04-29 Jie Mei <jie.mei@oss.cipunited.com>
11151
11152 * config/mips/i6400.md (i6400_fpu_minmax): New
11153 define_insn_reservation.
11154 * config/mips/mips.h (ISA_HAS_FMIN_FMAX): Define new macro.
11155 * config/mips/mips.md (UNSPEC_FMIN): New unspec.
11156 (UNSPEC_FMAX): Same as above.
11157 (type): Add fminmax.
11158 (smin<mode>3): Generates MIN.fmt instructions.
11159 (smax<mode>3): Generates MAX.fmt instructions.
11160 (fmin<mode>3): Generates MIN.fmt instructions.
11161 (fmax<mode>3): Generates MAX.fmt instructions.
11162 * config/mips/p6600.md (p6600_fpu_fabs): Include fminmax
11163 type.
11164
111652024-04-28 Aldy Hernandez <aldyh@redhat.com>
11166
11167 * tree-ssa-ccp.cc (ccp_finalize): Normalize before calling
11168 set_bitmask.
11169 * value-range.cc (irange::intersect_bitmask): Calculate changed
11170 irange_bitmask bits on our own.
11171 (irange::union_bitmask): Same.
11172 (irange_bitmask::verify_mask): Verify that bits are normalized.
11173 * value-range.h (irange_bitmask::union_): Do not normalize.
11174 Remove return value.
11175 (irange_bitmask::intersect): Same.
11176
111772024-04-28 Aldy Hernandez <aldyh@redhat.com>
11178
11179 * range-op-ptr.cc (pointer_plus_operator::wi_fold): Use method
11180 range setters instead of out of line functions.
11181 (pointer_min_max_operator::wi_fold): Same.
11182 (pointer_and_operator::wi_fold): Same.
11183 (pointer_or_operator::wi_fold): Same.
11184 * range-op.cc (operator_negate::fold_range): Same.
11185 (operator_addr_expr::fold_range): Same.
11186 (range_op_cast_tests): Same.
11187 * range.cc (range_zero): Remove.
11188 (range_nonzero): Remove.
11189 * range.h (range_zero): Remove.
11190 (range_nonzero): Remove.
11191 * value-range.cc (range_tests_misc): Use method instead of out of
11192 line function.
11193
111942024-04-28 Aldy Hernandez <aldyh@redhat.com>
11195
11196 * value-range-pretty-print.cc (print_int_bound): New.
11197 (print_irange_bitmasks): New.
11198 (vrange_printer::print_irange_bound): Remove.
11199 (vrange_printer::print_irange_bitmasks): Remove.
11200 * value-range-pretty-print.h: Remove print_irange_bitmasks and
11201 print_irange_bound
11202
112032024-04-28 Aldy Hernandez <aldyh@redhat.com>
11204
11205 * value-range.h (range_includes_zero_p): Accept vrange.
11206
112072024-04-28 Aldy Hernandez <aldyh@redhat.com>
11208
11209 * tree-ssa-loop-split.cc (split_at_bb_p): Make int_range a Value_Range.
11210 * tree-ssa-strlen.cc (get_range): Same.
11211 * value-query.cc (range_query::get_tree_range): Handle both
11212 integers and pointers.
11213 * vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Make
11214 r0 and r1 Value_Range's.
11215
112162024-04-28 Aldy Hernandez <aldyh@redhat.com>
11217
11218 * value-range.cc (get_bitmask_from_range): Move out of irange class.
11219 (irange::get_bitmask): Call function instead of internal method.
11220 * value-range.h (class irange): Remove get_bitmask_from_range.
11221
112222024-04-28 Aldy Hernandez <aldyh@redhat.com>
11223
11224 * value-range.cc (get_legacy_range): Make static and add another
11225 version of get_legacy_range that takes a vrange.
11226 * value-range.h (class irange): Remove unnecessary friendship with
11227 get_legacy_range.
11228 (get_legacy_range): Accept a vrange.
11229
112302024-04-28 Aldy Hernandez <aldyh@redhat.com>
11231
11232 * value-range-storage.cc (irange_storage::set_irange): Move
11233 verification code from here...
11234 (vrange_storage::set_vrange): ...to here.
11235
112362024-04-28 Aldy Hernandez <aldyh@redhat.com>
11237
11238 * gimple-range-op.cc (cfn_clz::fold_range): Change
11239 range_includes_zero_p argument to a reference.
11240 (cfn_ctz::fold_range): Same.
11241 * range-op.cc (operator_plus::lhs_op1_relation): Same.
11242 * value-range.h (range_includes_zero_p): Same.
11243
112442024-04-28 Aldy Hernandez <aldyh@redhat.com>
11245
11246 * vr-values.cc (simplify_using_ranges::fold_cond_with_ops): Remove
11247 type from range_true and range_false.
11248
112492024-04-28 Aldy Hernandez <aldyh@redhat.com>
11250
11251 * value-range-storage.h: Remove friends.
11252 * value-range.cc (gt_ggc_mx): Remove.
11253 (gt_pch_nx): Remove.
11254 * value-range.h (class vrange): Remove GTY markers.
11255 (class irange): Same.
11256 (class int_range): Same.
11257 (class frange): Same.
11258 (gt_ggc_mx): Remove.
11259 (gt_pch_nx): Remove.
11260
112612024-04-28 Aldy Hernandez <aldyh@redhat.com>
11262
11263 * ipa-cp.cc (propagate_bits_across_jump_function): Access bitmask
11264 through base class.
11265 (ipcp_store_vr_results): Same.
11266 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
11267 (ipcp_get_parm_bits): Same.
11268 (ipcp_update_vr): Same.
11269 * range-op-mixed.h (update_known_bitmask): Change argument to vrange.
11270 * range-op.cc (update_known_bitmask): Same.
11271 * value-range.cc (vrange::update_bitmask): New.
11272 (irange::set_nonzero_bits): Move to vrange class.
11273 (irange::get_nonzero_bits): Same.
11274 * value-range.h (class vrange): Add update_bitmask, get_bitmask,
11275 get_nonzero_bits, and set_nonzero_bits.
11276 (class irange): Make bitmask methods virtual overrides.
11277 (class Value_Range): Add get_bitmask and update_bitmask.
11278
112792024-04-28 Aldy Hernandez <aldyh@redhat.com>
11280
11281 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Convert
11282 bound to wide_int.
11283 * value-range.cc (Value_Range::lower_bound): Remove.
11284 (Value_Range::upper_bound): Remove.
11285 (unsupported_range::lbound): New.
11286 (unsupported_range::ubound): New.
11287 (frange::lbound): New.
11288 (frange::ubound): New.
11289 (irange::lbound): New.
11290 (irange::ubound): New.
11291 * value-range.h (class vrange): Add lbound() and ubound().
11292 (class irange): Same.
11293 (class frange): Same.
11294 (class unsupported_range): Same.
11295 (class Value_Range): Rename lower_bound and upper_bound to lbound
11296 and ubound respectively.
11297
112982024-04-28 Aldy Hernandez <aldyh@redhat.com>
11299
11300 * gimple-ssa-warn-access.cc (check_nul_terminated_array): Make Value_Range an int_range.
11301 (memmodel_to_uhwi): Same
11302 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Same.
11303 (determine_value_range): Same.
11304 (infer_loop_bounds_from_signedness): Same.
11305 (scev_var_range_cant_overflow): Same.
11306
113072024-04-28 Aldy Hernandez <aldyh@redhat.com>
11308
11309 * value-range.h (vrange::~vrange): New.
11310 (int_range::~int_range): Make final override.
11311
113122024-04-28 Aldy Hernandez <aldyh@redhat.com>
11313
11314 * value-range.cc (unsupported_range::accept): Move down.
11315 (vrange::contains_p): Rename to...
11316 (unsupported_range::contains_p): ...this.
11317 (vrange::singleton_p): Rename to...
11318 (unsupported_range::singleton_p): ...this.
11319 (vrange::set): Rename to...
11320 (unsupported_range::set): ...this.
11321 (vrange::type): Rename to...
11322 (unsupported_range::type): ...this.
11323 (vrange::supports_type_p): Rename to...
11324 (unsupported_range::supports_type_p): ...this.
11325 (vrange::set_undefined): Rename to...
11326 (unsupported_range::set_undefined): ...this.
11327 (vrange::set_varying): Rename to...
11328 (unsupported_range::set_varying): ...this.
11329 (vrange::union_): Rename to...
11330 (unsupported_range::union_): ...this.
11331 (vrange::intersect): Rename to...
11332 (unsupported_range::intersect): ...this.
11333 (vrange::zero_p): Rename to...
11334 (unsupported_range::zero_p): ...this.
11335 (vrange::nonzero_p): Rename to...
11336 (unsupported_range::nonzero_p): ...this.
11337 (vrange::set_nonzero): Rename to...
11338 (unsupported_range::set_nonzero): ...this.
11339 (vrange::set_zero): Rename to...
11340 (unsupported_range::set_zero): ...this.
11341 (vrange::set_nonnegative): Rename to...
11342 (unsupported_range::set_nonnegative): ...this.
11343 (vrange::fits_p): Rename to...
11344 (unsupported_range::fits_p): ...this.
11345 (unsupported_range::operator=): New.
11346 (frange::fits_p): New.
11347 * value-range.h (class vrange): Make an abstract class.
11348 (class unsupported_range): Declare override methods.
11349
113502024-04-28 Gerald Pfeifer <gerald@pfeifer.com>
11351
11352 PR target/69374
11353 PR target/112959
11354 * doc/install.texi (Specific) <*-*-freebsd*>: Remove references to
11355 FreeBSD 7 and older.
11356
113572024-04-28 Gerald Pfeifer <gerald@pfeifer.com>
11358
11359 * doc/contrib.texi: Update David Binderman's entry.
11360
113612024-04-28 liuhongt <hongtao.liu@intel.com>
11362
11363 * config/i386/i386.md: (zero_extendsidi2): Adjust
11364 alternative *k to ?k.
11365 (zero_extend<mode>di2): Ditto.
11366 (*zero_extend<mode>si2): Ditto.
11367 (*zero_extendqihi2): Ditto.
11368
113692024-04-28 Jiufu Guo <guojiufu@linux.ibm.com>
11370
11371 PR target/95782
11372 * config/s390/s390-c.cc (s390_macro_to_expand): Avoid empty identifier.
11373
113742024-04-28 Andrew Pinski <quic_apinski@quicinc.com>
11375
11376 PR target/113822
11377 * config/aarch64/aarch64.cc (aarch64_evpc_reencode): Use
11378 vec_perm_indices::new_shrunk_vector instead of manually
11379 going through the indices.
11380
113812024-04-27 Xi Ruoyao <xry111@xry111.site>
11382
11383 PR target/114861
11384 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask): Add
11385 constraints for operands.
11386 (bstrins_<mode>_for_ior_mask): Likewise.
11387
113882024-04-27 Fangrui Song <maskray@gcc.gnu.org>
11389
11390 * config/riscv/elf.h (LINK_SPEC): Add -X.
11391 * config/riscv/freebsd.h (LINK_SPEC): Add -X.
11392 * config/riscv/linux.h (LINK_SPEC): Add -X.
11393
113942024-04-26 Wilco Dijkstra <wilco.dijkstra@arm.com>
11395
11396 * config/aarch64/aarch64.cc (MAX_SET_SIZE): New define.
11397 (aarch64_progress_pointer): Remove function.
11398 (aarch64_set_one_block_and_progress_pointer): Simplify and clean up.
11399 (aarch64_expand_setmem): Clean up implementation, use byte offsets,
11400 simplify size calculation.
11401
114022024-04-26 Wilco Dijkstra <wilco.dijkstra@arm.com>
11403
11404 * config/aarch64/aarch64.cc (aarch64_mode_valid_for_sched_fusion_p):
11405 Remove check for AARCH64_EXTRA_TUNE_NO_LDP_STP_QREGS.
11406 (aarch64_advsimd_ldp_stp_p): Likewise.
11407 (aarch64_stp_sequence_cost): Likewise.
11408 (aarch64_expand_cpymem): Likewise.
11409 (aarch64_expand_setmem): Likewise.
11410 * config/aarch64/aarch64-ldp-fusion.cc (ldp_operand_mode_ok_p):
11411 Likewise.
11412 * config/aarch64/aarch64-ldpstp.md: Likewise.
11413 * config/aarch64/aarch64-tuning-flags.def: Remove NO_LDP_STP_QREGS.
11414 * config/aarch64/tuning_models/emag.h: Likewise.
11415 * config/aarch64/tuning_models/xgene1.h: Likewise.
11416
114172024-04-26 Frederik Harwath <frederik@harwath.name>
11418
11419 * config.gcc: Add gfx90c.
11420 * config/gcn/gcn-hsa.h (NO_SRAM_ECC): Likewise.
11421 * config/gcn/gcn-opts.h (enum processor_type): Likewise.
11422 (TARGET_GFX90c): New macro.
11423 * config/gcn/gcn.cc (gcn_option_override): Handle gfx90c.
11424 (gcn_omp_device_kind_arch_isa): Likewise.
11425 (output_file_start): Likewise.
11426 * config/gcn/gcn.h: Add gfx90c.
11427 * config/gcn/gcn.opt: Likewise.
11428 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX90c): New macro.
11429 (get_arch): Handle gfx90c.
11430 (main): Handle EF_AMDGPU_MACH_AMDGCN_GFX90c
11431 * config/gcn/t-omp-device: Add gfx90c.
11432 * doc/install.texi: Likewise.
11433 * doc/invoke.texi: Likewise.
11434
114352024-04-25 David Faust <david.faust@oracle.com>
11436
11437 * config/bpf/bpf.h (PREFERRED_DEBUGGING_TYPE): Set to BTF_DEBUG.
11438
114392024-04-25 David Faust <david.faust@oracle.com>
11440
11441 * config/bpf/bpf.cc (bpf_option_override): Improve handling of CO-RE
11442 options to avoid issues with -gtoggle.
11443
114442024-04-25 Jakub Jelinek <jakub@redhat.com>
11445
11446 PR fortran/114825
11447 * tree-nested.cc (get_debug_decl): New function.
11448 (get_nonlocal_debug_decl): Use it.
11449 (get_local_debug_decl): Likewise.
11450
114512024-04-25 Jose E. Marchesi <jose.marchesi@oracle.com>
11452
11453 * config/bpf/bpf.opt: Use ASM_PSEUDOC for the default value of
11454 -masm.
11455 * config/bpf/bpf.h (ASM_SPEC): Adapt accordingly.
11456 * doc/invoke.texi (eBPF Options): Update.
11457
114582024-04-25 Richard Ball <richard.ball@arm.com>
11459
11460 PR target/114837
11461 * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear):
11462 Add zero/sign extend.
11463 (arm_expand_prologue): Add zero/sign extend.
11464
114652024-04-25 Richard Biener <rguenther@suse.de>
11466
11467 PR tree-optimization/114792
11468 * tree-ssa-loop-ch.cc (ch_order_loops): New function.
11469 (ch_base::copy_headers): Sort loops to unloop inner-to-outer.
11470
114712024-04-25 Eric Botcazou <ebotcazou@adacore.com>
11472
11473 PR target/114416
11474 * config/sparc/sparc.h (SUN_V9_ABI_COMPATIBILITY): New macro.
11475 * config/sparc/sol2.h (SUN_V9_ABI_COMPATIBILITY): Redefine it.
11476 * config/sparc/sparc.cc (fp_type_for_abi): New predicate.
11477 (traverse_record_type): Use it to spot floating-point types.
11478 (compute_fp_layout): Also deal with array types.
11479
114802024-04-25 Pan Li <pan2.li@intel.com>
11481
11482 * config/riscv/vector-crypto.md: Add early clobber to the
11483 dest operand of vwsll.
11484
114852024-04-25 Haochen Gui <guihaoc@gcc.gnu.org>
11486
11487 * config/rs6000/altivec.md (*bcdinvalid_<mode>): Replace bcdadd
11488 with bcdsub.
11489 (bcdinvalid_<mode>): Likewise.
11490
114912024-04-24 Jakub Jelinek <jakub@redhat.com>
11492
11493 PR other/114738
11494 * opts.cc (get_option_url): Revert 2024-04-17 changes.
11495 * gcc-urlifier.cc: Don't include diagnostic-core.h.
11496 (gcc_urlifier::make_doc_url): Revert 2024-04-17 changes.
11497 * configure.ac (documentation-root-url): On release branches
11498 append gcc-MAJOR.MINOR.0/ to the default DOCUMENTATION_ROOT_URL.
11499 * doc/install.texi (--with-documentation-root-url=): Document
11500 the change of the default.
11501 * configure: Regenerate.
11502
115032024-04-24 Pan Li <pan2.li@intel.com>
11504
11505 Revert:
11506 2023-11-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11507 kito-cheng <kito.cheng@sifive.com>
11508 kito-cheng <kito.cheng@gmail.com>
11509
11510 PR target/112431
11511 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): New register filters.
11512 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Ditto.
11513 (no,yes): Ditto.
11514 * config/riscv/vector.md: Support highpart register overlap for vwcvt.
11515
115162024-04-24 Jose E. Marchesi <jose.marchesi@oracle.com>
11517
11518 * config.gcc: Add bpf-c.o as a target object for C and C++.
11519 * config/bpf/bpf.cc (bpf_target_macros): Move to bpf-c.cc.
11520 * config/bpf/bpf-c.cc: New file.
11521 (bpf_target_macros): Move from bpf.cc and define BPF CPU
11522 feature macros.
11523 * config/bpf/t-bpf: Add rules to build bpf-c.o.
11524
115252024-04-24 Richard Biener <rguenther@suse.de>
11526
11527 PR tree-optimization/114787
11528 * tree-cfg.cc (remove_edge_and_dominated_blocks): When
11529 removing a loop backedge clear niter info and when removing
11530 the last backedge of a loop mark that loop for removal.
11531
115322024-04-24 Richard Biener <rguenther@suse.de>
11533
11534 PR tree-optimization/114832
11535 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
11536 Fix dominance check.
11537
115382024-04-24 Haochen Jiang <haochen.jiang@intel.com>
11539
11540 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
11541 Check whether AVX512F is explicitly enabled.
11542
115432024-04-24 Pan Li <pan2.li@intel.com>
11544
11545 Revert:
11546 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11547
11548 * config/riscv/vector.md: Support highpart overlap for vext.vf2
11549
115502024-04-23 Jakub Jelinek <jakub@redhat.com>
11551
11552 PR target/114810
11553 * config/i386/i386.md (*andn<dwi>3_doubleword_bmi): Split the =&r,r,ro
11554 alternative into =&r,r,r enabled only for x64 and =&r,r,o.
11555
115562024-04-23 Jan Hubicka <jh@suse.cz>
11557
11558 * doc/invoke.texi (-ftree-loop-distribute-patterns): Remove duplicated
11559 sentence about optimization flags implying this.
11560
115612024-04-23 Jakub Jelinek <jakub@redhat.com>
11562
11563 * config/darwin.opt (init): Spelling fix: initialiser -> initializer.
11564
115652024-04-23 Jakub Jelinek <jakub@redhat.com>
11566
11567 * config/epiphany/epiphany.opt (may-round-for-trunc): Spelling fix:
11568 floatig -> floating.
11569 * config/riscv/riscv.opt (mcsr-check): Spelling fix: CRS -> CSR.
11570 * params.opt (-param=ipa-cp-profile-count-base=): Spelling fix:
11571 frequncy -> frequency.
11572
115732024-04-23 Richard Biener <rguenther@suse.de>
11574
11575 PR tree-optimization/114799
11576 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Properly
11577 update ->any_pattern when swapping operands.
11578
115792024-04-23 Andreas Krebbel <krebbel@linux.ibm.com>
11580
11581 PR target/114676
11582 * config/s390/s390-c.cc (s390_expand_overloaded_builtin): Use a
11583 MEM_REF with an addend of type ptr_type_node.
11584
115852024-04-23 Yang Yujie <yangyujie@loongson.cn>
11586
11587 * config.gcc: Add loongarch-evolution.o.
11588 * config/loongarch/genopts/genstr.sh: Enable generation of
11589 loongarch-evolution.[cc,h].
11590 * config/loongarch/t-loongarch: Likewise.
11591 * config/loongarch/genopts/gen-evolution.awk: New file.
11592 * config/loongarch/genopts/isa-evolution.in: Mark ISA version
11593 of introduction for each ISA evolution feature.
11594 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
11595 Define builtin macros for enabled ISA evolutions and the ISA
11596 version.
11597 * config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
11598 * config/loongarch/loongarch.h: Likewise.
11599 * config/loongarch/loongarch-cpucfg-map.h: Delete.
11600 * config/loongarch/loongarch-evolution.cc: New file.
11601 * config/loongarch/loongarch-evolution.h: New file.
11602 * config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
11603 (ISA_HAS_DIV32): Likewise.
11604 (ISA_HAS_LAM_BH): Likewise.
11605 (ISA_HAS_LAMCAS): Likewise.
11606 (ISA_HAS_LD_SEQ_SA): Likewise.
11607
116082024-04-23 Yang Yujie <yangyujie@loongson.cn>
11609
11610 * config.gcc: Make la64v1.0 the default ISA preset of the lp64d ABI.
11611 * config/loongarch/genopts/loongarch-strings: Define la64v1.0, la64v1.1.
11612 * config/loongarch/genopts/loongarch.opt.in: Likewise.
11613 * config/loongarch/loongarch-c.cc (LARCH_CPP_SET_PROCESSOR): Likewise.
11614 (loongarch_cpu_cpp_builtins): Likewise.
11615 * config/loongarch/loongarch-cpu.cc (get_native_prid): Likewise.
11616 (fill_native_cpu_config): Likewise.
11617 * config/loongarch/loongarch-def.cc (array_tune): Likewise.
11618 * config/loongarch/loongarch-def.h: Likewise.
11619 * config/loongarch/loongarch-driver.cc (driver_set_m_parm): Likewise.
11620 (driver_get_normalized_m_opts): Likewise.
11621 * config/loongarch/loongarch-opts.cc (default_tune_for_arch): Likewise.
11622 (TUNE_FOR_ARCH): Likewise.
11623 (arch_str): Likewise.
11624 (loongarch_target_option_override): Likewise.
11625 * config/loongarch/loongarch-opts.h (TARGET_uARCH_LA464): Likewise.
11626 (TARGET_uARCH_LA664): Likewise.
11627 * config/loongarch/loongarch-str.h (STR_CPU_ABI_DEFAULT): Likewise.
11628 (STR_ARCH_ABI_DEFAULT): Likewise.
11629 (STR_TUNE_GENERIC): Likewise.
11630 (STR_ARCH_LA64V1_0): Likewise.
11631 (STR_ARCH_LA64V1_1): Likewise.
11632 * config/loongarch/loongarch.cc (loongarch_cpu_sched_reassociation_width): Likewise.
11633 (loongarch_asm_code_end): Likewise.
11634 * config/loongarch/loongarch.opt: Likewise.
11635 * doc/invoke.texi: Likewise.
11636
116372024-04-22 Pan Li <pan2.li@intel.com>
11638
11639 * config/riscv/vector-crypto.md:
11640
116412024-04-22 Pan Li <pan2.li@intel.com>
11642
11643 Revert:
11644 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11645
11646 * config/riscv/constraints.md (TARGET_VECTOR ? V_REGS : NO_REGS): Fix constraint.
11647 * config/riscv/riscv.md (no,W21,W42,W84,W41,W81,W82): Rename vconstraint into group_overlap.
11648 (no,yes): Ditto.
11649 (none,W21,W42,W84,W43,W86,W87): Ditto.
11650 * config/riscv/vector.md: Ditto.
11651
116522024-04-22 Pan Li <pan2.li@intel.com>
11653
11654 Revert:
11655 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11656
11657 * config/riscv/riscv.md: Rostify the constraints.
11658
116592024-04-22 Haochen Jiang <haochen.jiang@intel.com>
11660
11661 * common/config/i386/i386-common.cc (processor_alias_table):
11662 Let Sierra Forest map to CPU_TYPE enum.
11663
116642024-04-22 Andreas Krebbel <krebbel@linux.ibm.com>
11665
11666 * config/s390/s390.cc (s390_option_override_internal): Check zarch
11667 flag before enabling -mvx.
11668
116692024-04-22 Pan Li <pan2.li@intel.com>
11670
11671 Revert:
11672 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11673
11674 PR target/112431
11675 * config/riscv/vector.md: Add widenning overlap.
11676
116772024-04-22 Pan Li <pan2.li@intel.com>
11678
11679 Revert:
11680 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11681
11682 PR target/112431
11683 * config/riscv/vector.md: Support highpart overlap for indexed load.
11684
116852024-04-22 Pan Li <pan2.li@intel.com>
11686
11687 Revert:
11688 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11689
11690 PR target/112431
11691 * config/riscv/vector.md: Add highest-number overlap support.
11692
116932024-04-22 Pan Li <pan2.li@intel.com>
11694
11695 Revert:
11696 2023-11-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11697
11698 PR target/112431
11699 * config/riscv/vector.md: Add widening overlap of vf2/vf4.
11700
117012024-04-21 Pan Li <pan2.li@intel.com>
11702
11703 Revert:
11704 2023-12-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11705
11706 PR target/112431
11707 * config/riscv/vector.md: Support highpart overlap for vx/vf.
11708
117092024-04-20 Pan Li <pan2.li@intel.com>
11710
11711 Revert:
11712 2023-12-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11713
11714 PR target/112431
11715 * config/riscv/vector.md: Fix incorrect overlap in v0.
11716
117172024-04-20 Pan Li <pan2.li@intel.com>
11718
11719 Revert:
11720 2023-12-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11721
11722 PR target/112431
11723 * config/riscv/vector.md: Support highest overlap for wv instructions.
11724
117252024-04-20 Pan Li <pan2.li@intel.com>
11726
11727 Revert:
11728 2023-12-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11729
11730 PR target/112432
11731 * config/riscv/riscv.md (none,W21,W42,W84,W43,W86,W87): Add W0.
11732 (none,W21,W42,W84,W43,W86,W87,W0): Ditto.
11733 * config/riscv/vector.md: Ditto.
11734
117352024-04-19 Jakub Jelinek <jakub@redhat.com>
11736
11737 PR target/114783
11738 * config/i386/sse.md (*avx2_eq<mode>3): Change last operand's
11739 constraint from "jm" to "xjm".
11740
117412024-04-19 Jakub Jelinek <jakub@redhat.com>
11742
11743 PR middle-end/114753
11744 * internal-fn.cc (expand_arith_overflow): Add one missing restore
11745 of flag_trapv before return.
11746
117472024-04-19 Tamar Christina <tamar.christina@arm.com>
11748
11749 PR tree-optimization/114769
11750 * tree-vect-patterns.cc:
11751 (vect_recog_absolute_difference): Have only one success condition.
11752 (vect_recog_abd_pattern): Handle further checks if
11753 vect_recog_absolute_difference fails.
11754
117552024-04-19 Cupertino Miranda <cupertino.miranda@oracle.com>
11756
11757 * config/bpf/core-builtins.cc (get_index_for_enum_value): Create
11758 function.
11759 (pack_enum_value): Check for enumerator and error out.
11760 (process_enum_value): Correct string allocation.
11761
117622024-04-19 Cupertino Miranda <cupertino.miranda@oracle.com>
11763
11764 * config/bpf/bpf-protos.h (bpf_add_core_reloc): Renamed function
11765 to bpf_output_move.
11766 * config/bpf/bpf.cc (bpf_legitimate_address_p): Allow
11767 UNSPEC_CORE_RELOC to match an address.
11768 (bpf_insn_cost): Make UNSPEC_CORE_RELOC immediate moves
11769 expensive to prioritize loads and stores.
11770 (TARGET_INSN_COST): Add hook.
11771 (bpf_output_move): Wrapper to call bpf_output_core_reloc.
11772 (bpf_print_operand): Add support to print immediate operands
11773 specified with the UNSPEC_CORE_RELOC.
11774 (bpf_print_operand_address): Likewise, but to support
11775 UNSPEC_CORE_RELOC in addresses.
11776 (bpf_init_builtins): Flag BPF_BUILTIN_CORE_RELOC as NOTHROW.
11777 * config/bpf/bpf.md: Wrap patterns for MOV, LD and ST
11778 instruction with bpf_output_move call.
11779 (mov_reloc_core<MM:mode>): Remove now spurious define_insn.
11780 * config/bpf/constraints.md: Added "c" and "C" constraints to
11781 match immediates represented with UNSPEC_CORE_RELOC.
11782 * config/bpf/core-builtins.cc (bpf_add_core_reloc): Remove
11783 (bpf_output_core_reloc): Add function to create the CO-RE
11784 relocations based on new matching rules.
11785 * config/bpf/core-builtins.h (bpf_output_core_reloc): Add
11786 prototype.
11787 * config/bpf/predicates.md (core_imm_operand) Add predicate.
11788 (mov_src_operand): Add match for core_imm_operand.
11789
117902024-04-19 Jakub Jelinek <jakub@redhat.com>
11791
11792 PR rtl-optimization/114768
11793 * rtlanal.cc (set_noop_p): Don't return true for MEM <- MEM
11794 sets if src has side-effects or for stores into ZERO_EXTRACT
11795 if ZERO_EXTRACT operand has side-effects.
11796
117972024-04-19 Alexandre Oliva <oliva@adacore.com>
11798
11799 * config/t-vxworks (vxw-glimits.h): Don't mangle c23-required
11800 __STDC_VERSION_LIMITS_H__ define.
11801
118022024-04-18 Sandra Loosemore <sloosemore@baylibre.com>
11803
11804 * config.gcc: Add nios2*-*-* to the list of obsoleted targets.
11805
118062024-04-18 Alexandre Oliva <oliva@adacore.com>
11807
11808 * doc/sourcebuild.texi (strndup): Add effective target.
11809
118102024-04-18 Tamar Christina <tamar.christina@arm.com>
11811
11812 PR target/114741
11813 * config/aarch64/aarch64.md (<optab><mode>3): Remove ^ from alt 2.
11814 (copysign<GPF:mode>3): Use SIMD version of IOR directly.
11815
118162024-04-18 Jakub Jelinek <jakub@redhat.com>
11817
11818 PR middle-end/114753
11819 * internal-fn.cc (expand_mul_overflow): Save flag_trapv and
11820 temporarily clear it for the duration of the function, then
11821 restore previous value.
11822 (expand_vector_ubsan_overflow): Likewise.
11823 (expand_arith_overflow): Likewise.
11824
118252024-04-17 Jakub Jelinek <jakub@redhat.com>
11826
11827 PR other/114738
11828 * opts.cc (get_option_url): On release branches append
11829 gcc-MAJOR.MINOR.0/ after DOCUMENTATION_ROOT_URL.
11830 * gcc-urlifier.cc (gcc_urlifier::make_doc_url): Likewise.
11831
118322024-04-17 Richard Biener <rguenther@suse.de>
11833
11834 PR tree-optimization/114749
11835 * tree-vect-loop.cc (vect_analyze_loop_2): Reset
11836 LOOP_VINFO_USING_PARTIAL_VECTORS_P when re-trying without SLP.
11837
118382024-04-17 Georg-Johann Lay <avr@gjlay.de>
11839
11840 PR target/114752
11841 * config/avr/avr.cc (avr_print_operand) [CONST_DOUBLE_P]: Handle DFmode.
11842
118432024-04-17 Jakub Jelinek <jakub@redhat.com>
11844
11845 PR sanitizer/114743
11846 * asan.cc (maybe_instrument_call): Don't instrument calls to
11847 .ABNORMAL_DISPATCHER.
11848
118492024-04-16 Andrew Pinski <quic_apinski@quicinc.com>
11850
11851 PR c/92880
11852 * doc/extend.texi (Using Vector Instructions): Add that
11853 the base_types could be a typedef of them.
11854
118552024-04-16 Richard Biener <rguenther@suse.de>
11856
11857 PR tree-optimization/114736
11858 * tree-vect-slp.cc (vect_optimize_slp_pass::is_cfg_latch_edge):
11859 Do not consider VEC_PERM_EXPRs as PHI use.
11860
118612024-04-16 Richard Biener <rguenther@suse.de>
11862
11863 PR tree-optimization/114733
11864 * tree-vect-loop.cc (vectorizable_nonlinear_induction): Reject
11865 neg induction vectorization of single element vectors.
11866
118672024-04-16 Jakub Jelinek <jakub@redhat.com>
11868
11869 * tree.cc (array_type_nelts): Ensure 2 spaces after . in comment
11870 instead of just one.
11871 (build_variant_type_copy): Likewise.
11872 (tree_check_failed): Likewise.
11873 (build_atomic_base): Likewise.
11874 * ipa-free-lang-data.cc (fld_incomplete_type_of): Use an indefinite
11875 article rather than a.
11876
118772024-04-16 Fei Gao <gaofei@eswincomputing.com>
11878
11879 * config/riscv/riscv.cc (riscv_expand_conditional_move):
11880 replace or with add when expanding zicond if possible.
11881
118822024-04-16 Alexandre Oliva <oliva@adacore.com>
11883
11884 PR middle-end/112938
11885 * ipa-strub.cc (pass_ipa_strub::execute): Drop volatility from
11886 indirected parm.
11887 (maybe_make_indirect): Restore volatility in dereferences.
11888
118892024-04-16 Lulu Cheng <chenglulu@loongson.cn>
11890
11891 * config/loongarch/loongarch.opt.urls: Regenerate.
11892 * config/mn10300/mn10300.opt.urls: Likewise.
11893 * config/msp430/msp430.opt.urls: Likewise.
11894 * config/nds32/nds32-elf.opt.urls: Likewise.
11895 * config/nds32/nds32-linux.opt.urls: Likewise.
11896 * config/nds32/nds32.opt.urls: Likewise.
11897 * config/pru/pru.opt.urls: Likewise.
11898 * config/riscv/riscv.opt.urls: Likewise.
11899 * config/rx/rx.opt.urls: Likewise.
11900 * config/sh/sh.opt.urls: Likewise.
11901 * config/sparc/sparc.opt.urls: Likewise.
11902 * doc/invoke.texi: Add indexes for some compilation options.
11903
119042024-04-15 Georg-Johann Lay <avr@gjlay.de>
11905
11906 * config/avr/avr-mcus.def: Add: avr16du14, avr16du20, avr16du28,
11907 avr16du32, avr32du14, avr32du20, avr32du28, avr32du32.
11908 * doc/avr-mmcu.texi: Rebuild.
11909
119102024-04-15 Robin Dapp <rdapp@ventanamicro.com>
11911
11912 PR target/114668
11913 * config/riscv/autovec.md: Add VLS.
11914
119152024-04-15 Richard Biener <rguenther@suse.de>
11916
11917 PR gcov-profile/114715
11918 * gimplify.cc (gimplify_switch_expr): Set the location of the
11919 GIMPLE switch.
11920
119212024-04-15 H.J. Lu <hjl.tools@gmail.com>
11922
11923 PR target/114696
11924 * config/i386/i386.md (isa): Add apx_ndd_64.
11925 (enabled): Likewise.
11926 (*add<dwi>3_doubleword): Change rjO to r,ro,jO with 8-bit
11927 signed integer constant and enable jO only for apx_ndd_64.
11928 (*add<dwi>3_doubleword_cc_overflow_1): Likewise.
11929 (*and<dwi>3_doubleword): Likewise.
11930 (*<code><dwi>3_doubleword): Likewise.
11931
119322024-04-15 Tamar Christina <tamar.christina@arm.com>
11933
11934 PR tree-optimization/114403
11935 * tree-vect-loop.cc (vect_transform_loop): Adjust upper bounds for when
11936 peeling for gaps and early break.
11937
119382024-04-15 Jakub Jelinek <jakub@redhat.com>
11939
11940 PR c++/114634
11941 * attribs.cc (diag_attr_exclusions): Set attrs[1] to NULL_TREE for
11942 decls with NULL TREE_TYPE.
11943
119442024-04-12 Andrew Carlotti <andrew.carlotti@arm.com>
11945
11946 * config/aarch64/aarch64-option-extensions.def: Add RCPC to
11947 RCPC3 dependencies.
11948 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC8_4): Add test for
11949 RCPC3 bit
11950
119512024-04-12 Andrew Carlotti <andrew.carlotti@arm.com>
11952
11953 * config/aarch64/aarch64-arches.def: Add CSSC to V8_9A
11954 dependencies.
11955
119562024-04-12 Will Schmidt <will_schmidt@linux.ibm.com>
11957 Peter Bergner <bergner@linux.ibm.com>
11958
11959 PR target/101865
11960 * config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported): Use
11961 TARGET_POWER8.
11962 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Use
11963 OPTION_MASK_POWER8.
11964 * config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add OPTION_MASK_POWER8.
11965 (ISA_2_7_MASKS_SERVER): Likewise.
11966 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Update
11967 comment. Use OPTION_MASK_POWER8 and TARGET_POWER8.
11968 * config/rs6000/rs6000.h (TARGET_SYNC_HI_QI): Use TARGET_POWER8.
11969 * config/rs6000/rs6000.md (define_attr "isa"): Add p8.
11970 (define_attr "enabled"): Handle it.
11971 (define_insn "prefetch"): Use TARGET_POWER8.
11972 * config/rs6000/rs6000.opt (mpower8-internal): New.
11973
119742024-04-12 Jason Merrill <jason@redhat.com>
11975 Patrick Palka <ppalka@redhat.com>
11976
11977 PR c++/113141
11978 * doc/invoke.texi: Document -Wcast-user-defined.
11979
119802024-04-12 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
11981
11982 * config/riscv/riscv.opt.urls: Regenerated.
11983
119842024-04-12 Andrew Pinski <quic_apinski@quicinc.com>
11985
11986 PR tree-optimization/114666
11987 * match.pd (`!a?b:c`): Reject signed types for the condition.
11988 (`a?~t:t`): Likewise.
11989
119902024-04-12 Richard Sandiford <richard.sandiford@arm.com>
11991
11992 * config/aarch64/aarch64.cc (aarch64_output_sme_zero_za): Require
11993 all tiles to have the same suffix.
11994
119952024-04-12 Pan Li <pan2.li@intel.com>
11996
11997 * config/riscv/riscv.cc (riscv_vector_float_type_p): Take int
11998 as the return value instead of unsigned.
11999 (riscv_vector_element_bitsize): Ditto.
12000 (riscv_vector_required_min_vlen): Ditto.
12001 (riscv_validate_vector_type): Take int type for local variable(s).
12002
120032024-04-12 Jakub Jelinek <jakub@redhat.com>
12004
12005 * tree-cfg.cc (gimple_verify_flow_info): Make the misplaced
12006 returns_twice diagnostics translatable.
12007
120082024-04-12 Jakub Jelinek <jakub@redhat.com>
12009
12010 PR sanitizer/114687
12011 * gimple-iterator.cc (gsi_safe_insert_before): Only use
12012 edge_before_returns_twice_call if bb_has_abnormal_pred.
12013 (gsi_safe_insert_seq_before): Likewise.
12014 * gimple-lower-bitint.cc (bitint_large_huge::lower_call): Only
12015 push to m_returns_twice_calls if bb_has_abnormal_pred.
12016
120172024-04-12 Pan Li <pan2.li@intel.com>
12018
12019 PR target/114639
12020 * config/riscv/riscv.cc (riscv_function_value_regno_p): Add
12021 TARGET_VECTOR predicate for V_RETURN regno.
12022
120232024-04-11 David Faust <david.faust@oracle.com>
12024
12025 * btfout.cc (btf_asm_type_ref): Convert IDs to BTF internally and
12026 fix potentially looking up wrong type for asm debug comment info.
12027 Split into...
12028 (btf_asm_datasec_type_ref): ... This. New.
12029 (btf_asm_datasec_entry): Call it here, instead of btf_asm_type_ref.
12030 (btf_asm_type, btf_asm_array, btf_asm_varent, btf_asm_sou_member)
12031 (btf_asm_func_arg, btf_asm_func_type): Adapt btf_asm_type_ref call.
12032
120332024-04-11 David Faust <david.faust@oracle.com>
12034
12035 * btfout.cc (btf_asm_sou_member): Always emit non-representable
12036 bitfield members as having 'void' type. Refactor slightly.
12037
120382024-04-11 Andrew Carlotti <andrew.carlotti@arm.com>
12039
12040 * config/aarch64/aarch64-option-extensions.def:
12041 Remove "memtag", "memtag2", "ssbs", "ssbs2", "ls64", "ls64_v"
12042 and "ls64_accdata" FMV features.
12043
120442024-04-11 Andrew Carlotti <andrew.carlotti@arm.com>
12045
12046 * config/aarch64/aarch64-option-extensions.def:
12047 Remove "flagm2", "sha1", "pmull", "dit", "dpb", "dpb2", "jscvt",
12048 "fcma", "rcpc2", "frintts", "dgh", "ebf16", "sve-bf16",
12049 "sve-ebf16", "sve-i8mm", "sve2-pmull128", "memtag3", "bti" and
12050 "wfxt" entries.
12051
120522024-04-11 Andrew Carlotti <andrew.carlotti@arm.com>
12053
12054 * config/aarch64/aarch64-option-extensions.def:
12055 Fix "rmd"->"rdm", and add FMV to "rdma".
12056 * config/aarch64/aarch64.cc (FEAT_RDMA): Define as FEAT_RDM.
12057
120582024-04-11 Andrew Carlotti <andrew.carlotti@arm.com>
12059
12060 * config/aarch64/aarch64.cc (compare_feature_masks):
12061 Use ARRAY_SIZE and >=0 for iteration bounds.
12062 (aarch64_mangle_decl_assembler_name): Use ARRAY_SIZE.
12063
120642024-04-11 Andrew Carlotti <andrew.carlotti@arm.com>
12065
12066 * config/aarch64/aarch64-option-extensions.def: Reorder FMV entries.
12067
120682024-04-11 Gaius Mulley <gaiusmod2@gmail.com>
12069
12070 * doc/standards.texi (Language Standards Supported by GCC):
12071 Add Modula-2 language section.
12072
120732024-04-11 Jakub Jelinek <jakub@redhat.com>
12074
12075 PR middle-end/110027
12076 * asan.cc (asan_emit_stack_protection): Assert offsets[0] is
12077 zero if there is no stack protect guard, otherwise
12078 -ASAN_RED_ZONE_SIZE. If alignb > ASAN_RED_ZONE_SIZE and there is
12079 stack pointer guard, take the ASAN_RED_ZONE_SIZE bytes allocated at
12080 the top of the stack into account when computing base_align_bias.
12081 Recompute use_after_return_class from asan_frame_size + base_align_bias
12082 and set to -1 if that would overflow to 11.
12083
120842024-04-11 Richard Biener <rguenther@suse.de>
12085
12086 PR tree-optimization/109596
12087 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Propagate
12088 debug stmts to nonexit->dest rather than exit->dest.
12089
120902024-04-11 Richard Biener <rguenther@suse.de>
12091
12092 PR middle-end/114681
12093 * tree-inline.cc (copy_bb): Key on the remapped stmt
12094 to identify gconds to have condition coverage data remapped.
12095
120962024-04-11 Pan Li <pan2.li@intel.com>
12097
12098 PR target/114639
12099 * config/riscv/riscv.cc (riscv_function_value_regno_p): New func
12100 impl for hook TARGET_FUNCTION_VALUE_REGNO_P.
12101 (riscv_get_raw_result_mode): New func imple for hook
12102 TARGET_GET_RAW_RESULT_MODE.
12103 (TARGET_FUNCTION_VALUE_REGNO_P): Impl the hook.
12104 (TARGET_GET_RAW_RESULT_MODE): Ditto.
12105 * config/riscv/riscv.h (V_RETURN): New macro for vector return.
12106 (GP_RETURN_FIRST): New macro for the first GPR in return.
12107 (GP_RETURN_LAST): New macro for the last GPR in return.
12108 (FP_RETURN_FIRST): Diito but for FPR.
12109 (FP_RETURN_LAST): Ditto.
12110 (FUNCTION_VALUE_REGNO_P): Remove as deprecated and replace by
12111 TARGET_FUNCTION_VALUE_REGNO_P.
12112
121132024-04-11 Indu Bhagat <indu.bhagat@oracle.com>
12114
12115 * btfout.cc (btf_asm_type): Do not skip emitting members of
12116 unknown type.
12117
121182024-04-11 Indu Bhagat <indu.bhagat@oracle.com>
12119
12120 PR debug/112878
12121 * dwarf2ctf.cc (gen_ctf_sou_type): Check for conditions before
12122 call to ctf_add_slice. Use CTF_K_UNKNOWN type if fail.
12123
121242024-04-10 Marek Polacek <polacek@redhat.com>
12125
12126 PR target/114606
12127 * config/i386/i386-options.cc (ix86_option_override_internal): Use
12128 opts_set rather than checking == CF_NONE.
12129
121302024-04-10 David Malcolm <dmalcolm@redhat.com>
12131
12132 * doc/analyzer.texi: Various tweaks.
12133
121342024-04-10 Richard Biener <rguenther@suse.de>
12135
12136 PR tree-optimization/114672
12137 * tree-ssa-math-opts.cc (convert_plusminus_to_widen): Only
12138 allow mode-precision results.
12139
121402024-04-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
12141
12142 * config/aarch64/aarch64.cc (TARGET_C_BITINT_TYPE_INFO): Declare MACRO.
12143 (aarch64_bitint_type_info): New function.
12144 (aarch64_return_in_memory_1): Return large _BitInt's in memory.
12145 (aarch64_function_arg_alignment): Adapt to correctly return the ABI
12146 mandated alignment of _BitInt(N) where N > 128 as the alignment of
12147 TImode.
12148 (aarch64_composite_type_p): Return true for _BitInt(N), where N > 128.
12149
121502024-04-10 Andre Vieira <andre.simoesdiasvieira@arm.com>
12151
12152 * config/aarch64/aarch64.cc (bitint_or_aggr_of_bitint_p): New function.
12153 (aarch64_layout_arg): Don't emit diagnostics for types involving
12154 _BitInt(N).
12155
121562024-04-10 Jakub Jelinek <jakub@redhat.com>
12157
12158 PR c++/114462
12159 * tree-core.h (enum annot_expr_kind): Add
12160 annot_expr_maybe_infinite_kind enumerator.
12161 * gimplify.cc (gimple_boolify): Handle annot_expr_maybe_infinite_kind.
12162 * tree-cfg.cc (replace_loop_annotate_in_block): Likewise.
12163 (replace_loop_annotate): Likewise. Move loop->finite_p initialization
12164 before the replace_loop_annotate_in_block calls.
12165 * tree-pretty-print.cc (dump_generic_node): Handle
12166 annot_expr_maybe_infinite_kind.
12167
121682024-04-10 Richard Biener <rguenther@suse.de>
12169
12170 Revert:
12171 2024-03-27 Segher Boessenkool <segher@kernel.crashing.org>
12172
12173 PR rtl-optimization/101523
12174 * combine.cc (try_combine): Don't do a 2-insn combination if
12175 it does not in fact change I2.
12176
121772024-04-10 Peter Bergner <bergner@linux.ibm.com>
12178
12179 PR target/101865
12180 * config/rs6000/rs6000.h (TARGET_DIRECT_MOVE): Define.
12181 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Replace
12182 OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete redundant
12183 OPTION_MASK_DIRECT_MOVE usage. Delete TARGET_DIRECT_MOVE dead code.
12184 (rs6000_opt_masks): Neuter the "direct-move" option.
12185 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Replace
12186 OPTION_MASK_DIRECT_MOVE with OPTION_MASK_P8_VECTOR. Delete useless
12187 comment.
12188 * config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
12189 OPTION_MASK_DIRECT_MOVE.
12190 (OTHER_VSX_VECTOR_MASKS): Likewise.
12191 (POWERPC_MASKS): Likewise.
12192 * config/rs6000/rs6000.opt (mdirect-move): Remove Mask and Var.
12193
121942024-04-10 Hongyu Wang <hongyu.wang@intel.com>
12195
12196 * config/i386/sse.md (sha1msg1): Use "ja" instead of "Bm" for
12197 memory constraint.
12198 (sha1msg2): Likewise.
12199 (sha1nexte): Likewise.
12200 (sha1rnds4): Likewise.
12201 (sha256msg1): Likewise.
12202 (sha256msg2): Likewise.
12203 (sha256rnds2): Likewise.
12204 (aes<aesklvariant>u8): Use "jm" instead of "m" for memory
12205 constraint.
12206 (*aes<aeswideklvariant>u8): Likewise.
12207 (*encodekey128u32): Use "jr" instead of "r" for register
12208 constraints.
12209 (*encodekey256u32): Likewise.
12210
122112024-04-09 Juergen Christ <jchrist@linux.ibm.com>
12212
12213 * config/s390/s390.cc (expand_perm_as_replicate): Implement.
12214 (vectorize_vec_perm_const_1): Call new function.
12215 * config/s390/vx-builtins.md (vec_splat<mode>): Change to...
12216 (@vec_splat<mode>): ...this.
12217
122182024-04-09 David Faust <david.faust@oracle.com>
12219
12220 PR debug/114608
12221 * btfout.cc (btf_asm_datasec_entry): Only emit a symbol reference when
12222 generating BTF for BPF CO-RE target.
12223
122242024-04-09 Richard Ball <richard.ball@arm.com>
12225
12226 * config/aarch64/aarch64-c.cc (aarch64_pragma_aarch64):
12227 Add functions_nulls parameter to pragma_handlers.
12228 * config/aarch64/aarch64-protos.h: Likewise.
12229 * config/aarch64/aarch64-sve-builtins.h
12230 (enum handle_pragma_index): Add enum to count
12231 number of pragmas to be handled.
12232 * config/aarch64/aarch64-sve-builtins.cc
12233 (GTY): Add global variable for initial indexes
12234 and change overload_names to an array.
12235 (function_builder::function_builder):
12236 Add pragma handler information.
12237 (function_builder::add_function):
12238 Add code for overwriting previous
12239 registered_functions entries.
12240 (add_unique_function):
12241 Use an array to register overload_names
12242 for both pragma handler modes.
12243 (add_overloaded_function): Likewise.
12244 (init_builtins):
12245 Add functions_nulls parameter to pragma_handlers.
12246 (handle_arm_sve_h):
12247 Initialize pragma handler information.
12248 (handle_arm_neon_sve_bridge_h): Likewise.
12249 (handle_arm_sme_h): Likewise.
12250
122512024-04-09 Richard Biener <rguenther@suse.de>
12252
12253 PR lto/114655
12254 * lto-wrapper.cc (merge_flto_options): Add force argument.
12255 (merge_and_complain): Do not force here.
12256 (run_gcc): But here to make the link-time -flto option override
12257 any compile-time one.
12258
122592024-04-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
12260
12261 * config/rs6000/rtems.h (OS_MISSING_POWERPC64): Define.
12262
122632024-04-09 Jørgen Kvalsvik <j@lambda.is>
12264
12265 PR gcov-profile/114601
12266 * tree-profile.cc (condition_uid): Guard fn->cond_uids access.
12267
122682024-04-09 Jakub Jelinek <jakub@redhat.com>
12269
12270 PR target/114576
12271 * config/i386/i386.md (isa): Remove aes, add vaes_avx512vl.
12272 (enabled): Remove aes isa check, add vaes_avx512vl.
12273 * config/i386/sse.md (aesenc, aesenclast, aesdec, aesdeclast): Use
12274 jm instead of m for second alternative and emit {evex} prefix
12275 for it if !TARGET_AES. Use noavx,avx,vaes_avx512vl isa attribute.
12276 (vaesdec_<mode>, vaesdeclast_<mode>, vaesenc_<mode>,
12277 vaesenclast_<mode>): Add second alternative with x instead of v
12278 and jm instead of m.
12279
122802024-04-09 Gaius Mulley <gaiusmod2@gmail.com>
12281
12282 * doc/gm2.texi (Compiler options): Remove -fdebug-trace-quad.
12283 Remove -fdebug-trace-api.
12284 Add -fm2-debug-trace=.
12285
122862024-04-09 Yang Yujie <yangyujie@loongson.cn>
12287
12288 PR target/113233
12289 * config/loongarch/loongarch.cc (loongarch_reg_init):
12290 Reinitialize the loongarch_regno_mode_ok cache.
12291 (loongarch_option_override): Same.
12292 (loongarch_save_restore_target_globals): Restore target globals.
12293 (loongarch_set_current_function): Restore the target contexts
12294 for functions.
12295 (TARGET_SET_CURRENT_FUNCTION): Define.
12296 * config/loongarch/loongarch.h (SWITCHABLE_TARGET): Enable
12297 switchable target context.
12298 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
12299 Initialize all builtin functions at startup.
12300 (loongarch_expand_builtin): Turn assertion of builtin availability
12301 into a test.
12302
123032024-04-09 Jørgen Kvalsvik <j@lambda.is>
12304
12305 PR middle-end/114627
12306 * tree-profile.cc (instrument_decisions): Generate constant
12307 at the start of loop.
12308
123092024-04-09 Jørgen Kvalsvik <j@lambda.is>
12310
12311 PR middle-end/114599
12312 * tree-inline.cc (copy_bb): Copy cond_uids into callee.
12313 (prepend_lexical_block): Remove outdated comment.
12314 (add_local_variables): Remove bad cond_uids copy.
12315
123162024-04-09 Jakub Jelinek <jakub@redhat.com>
12317
12318 * expr.cc (convert_mode_scalar): Fix duplicated words in comment;
12319 into into -> it into.
12320 * function.h (function::cond_uids): Fix duplicated words in comment;
12321 same same -> same.
12322 * config/riscv/riscv-vector-costs.cc
12323 (costs::adjust_vect_cost_per_loop): Fix duplicated words in comment;
12324 model model -> model.
12325 * config/riscv/riscv-vector-builtins-shapes.cc (build_base): Fix
12326 duplicated words in comment; for for -> for.
12327 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Fix
12328 duplicated words in comment; more more -> more.
12329 * config/aarch64/driver-aarch64.cc (host_detect_local_cpu): Fix
12330 duplicated words in comment; be be -> be.
12331 * tree-profile.cc (masking_vectors): Fix duplicated words in comment;
12332 has has -> has, the the -> the.
12333 * value-range.cc (irange::set_range_from_bitmask): Fix duplicated
12334 words in comment; the the -> the.
12335 * gcov.cc (add_condition_counts): Fix duplicated words in comment;
12336 to to -> to.
12337 * vr-values.cc (get_scev_info): Fix duplicated words in comment;
12338 the the -> to the.
12339 * tree-vrp.cc (fully_replaceable): Fix duplicated words in comment;
12340 by by -> by.
12341 * mode-switching.cc (single_succ_confluence_n): Fix duplicated words
12342 in comment; the the -> the.
12343 * tree-ssa-phiopt.cc (value_replacement): Fix duplicated words in
12344 comment; can can -> we can.
12345 * gimple-range-phi.cc (phi_analyzer::process_phi): Fix duplicated words
12346 in comment; it it -> it is.
12347 * tree-ssa-sccvn.cc (visit_phi): Fix duplicated words in comment;
12348 to to -> to.
12349 * rtl-ssa/accesses.h (use_info::next_debug_insn_use): Fix duplicated
12350 words in comment; if if -> if.
12351 * doc/options.texi (InverseMask): Fix duplicated words; and and -> and.
12352 Change take to takes.
12353 * doc/invoke.texi (fanalyzer-undo-inlining): Fix duplicated words;
12354 be be -> be.
12355 (-minline-memops-threshold): Likewise.
12356
123572024-04-09 Jakub Jelinek <jakub@redhat.com>
12358
12359 PR middle-end/114628
12360 * gimple-lower-bitint.cc (gimple_lower_bitint): Keep debug stmts
12361 before returns_twice calls as is, don't push them into arg_stmts
12362 vector/move to edges.
12363
123642024-04-09 Sergey Bugaev <bugaevc@gmail.com>
12365
12366 * config.gcc: Recognize aarch64*-*-gnu* targets.
12367 * config/aarch64/aarch64-gnu.h: New file.
12368
123692024-04-09 Sergey Bugaev <bugaevc@gmail.com>
12370
12371 * config/i386/gnu.h: Move GNU/Hurd STARTFILE_SPEC from here...
12372 * config/gnu.h: ...to here.
12373
123742024-04-09 Richard Biener <rguenther@suse.de>
12375
12376 PR middle-end/114604
12377 * gimple-range.cc (enable_ranger): Initialize the global
12378 bitmap obstack.
12379 (disable_ranger): Release it.
12380
123812024-04-09 Sebastian Huber <sebastian.huber@embedded-brains.de>
12382
12383 * config.gcc (aarch64-*-rtems*): Add target makefile fragment
12384 t-aarch64-rtems.
12385 * config/aarch64/t-aarch64-rtems: New file.
12386
123872024-04-09 H.J. Lu <hjl.tools@gmail.com>
12388
12389 PR target/114587
12390 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12391 __APX_INLINE_ASM_USE_GPR32__ for -mapx-inline-asm-use-gpr32.
12392
123932024-04-09 Kewen Lin <linkw@linux.ibm.com>
12394 Andrew Pinski <quic_apinski@quicinc.com>
12395
12396 PR target/88309
12397 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Fix
12398 wrong align passed to function build_aligned_type.
12399 * tree-ssa-loop-prefetch.cc (is_miss_rate_acceptable): Add an
12400 assertion to ensure align_unit should be positive.
12401 * tree.cc (build_qualified_type): Update function comments.
12402
124032024-04-08 Uros Bizjak <ubizjak@gmail.com>
12404
12405 PR rtl-optimization/112560
12406 * combine.cc (try_combine): Replace cc_use_loc with the entire
12407 new RTX only in case cc_use_loc satisfies COMPARISON_P predicate.
12408 Otherwise scan the entire cc_use_loc RTX for CC reg to be updated
12409 with a new mode.
12410 * config/i386/i386.md (@pushf<mode>2): Allow all CC modes for
12411 operand 1.
12412
124132024-04-08 Thomas Schwinge <tschwinge@baylibre.com>
12414
12415 * config/gcn/gcn.opt (--param=gcn-preferred-vectorization-factor):
12416 New.
12417 * config/gcn/gcn.cc (gcn_vectorize_preferred_simd_mode) Use it.
12418 * doc/invoke.texi (Optimize Options): Document it.
12419
124202024-04-08 Thomas Schwinge <tschwinge@baylibre.com>
12421
12422 * doc/sourcebuild.texi (Effective-Target Keywords): Document
12423 'asm_goto_with_outputs'. Add comment to 'lra'.
12424
124252024-04-08 Martin Jambor <mjambor@suse.cz>
12426
12427 PR ipa/113359
12428 * ipa-icf-gimple.h (func_checker): New members
12429 safe_for_total_scalarization_p, m_total_scalarization_limit_known_p
12430 and m_total_scalarization_limit.
12431 (func_checker::func_checker): Initialize new member variables.
12432 * ipa-icf-gimple.cc: Include tree-sra.h.
12433 (func_checker::func_checker): Initialize new member variables.
12434 (func_checker::safe_for_total_scalarization_p): New function.
12435 (func_checker::compare_operand): Use the new function.
12436 * tree-sra.h (sra_get_max_scalarization_size): Declare.
12437 (sra_total_scalarization_would_copy_same_data_p): Likewise.
12438 * tree-sra.cc (prepare_iteration_over_array_elts): New function.
12439 (class sra_padding_collecting): New.
12440 (sra_padding_collecting::record_padding): Likewise.
12441 (scalarizable_type_p): Rename to totally_scalarizable_type_p. Add
12442 ability to record padding when requested.
12443 (totally_scalarize_subtree): Split out gathering information necessary
12444 to iterate over array elements to prepare_iteration_over_array_elts.
12445 Fix errornous early exit.
12446 (analyze_all_variable_accesses): Adjust the call to
12447 totally_scalarizable_type_p. Move determining of total scalariation
12448 size limit...
12449 (sra_get_max_scalarization_size): ...here.
12450 (check_ts_and_push_padding_to_vec): New function.
12451 (sra_total_scalarization_would_copy_same_data_p): Likewise.
12452
124532024-04-08 Martin Jambor <mjambor@suse.cz>
12454
12455 PR ipa/113907
12456 * ipa-prop.h (class ipa_vr): Declare new overload of a member function
12457 equal_p.
12458 (ipa_jump_functions_equivalent_p): Declare.
12459 * ipa-prop.cc (ipa_vr::equal_p): New function.
12460 (ipa_agg_pass_through_jf_equivalent_p): Likewise.
12461 (ipa_agg_jump_functions_equivalent_p): Likewise.
12462 (ipa_jump_functions_equivalent_p): Likewise.
12463 * ipa-cp.h (values_equal_for_ipcp_p): Declare.
12464 * ipa-cp.cc (values_equal_for_ipcp_p): Make function public.
12465 * ipa-icf-gimple.cc: Include alloc-pool.h, symbol-summary.h, sreal.h,
12466 ipa-cp.h and ipa-prop.h.
12467 (func_checker::compare_gimple_call): Comapre jump functions.
12468
124692024-04-08 Richard Sandiford <richard.sandiford@arm.com>
12470
12471 PR target/114607
12472 * config/aarch64/aarch64-sve-builtins-base.cc
12473 (svusdot_impl::expand): Fix botched attempt to swap the operands
12474 for svsudot.
12475
124762024-04-08 Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
12477
12478 * config/riscv/riscv.opt: Add -mtls-dialect to configure TLS flavor.
12479 * config.gcc: Add --with-tls configuration option to change the
12480 default TLS flavor.
12481 * config/riscv/riscv.h: Add TARGET_TLSDESC determined from
12482 -mtls-dialect and with_tls defaults.
12483 * config/riscv/riscv-opts.h: Define enum riscv_tls_type for the
12484 two TLS flavors.
12485 * config/riscv/riscv-protos.h: Define SYMBOL_TLSDESC symbol type.
12486 * config/riscv/riscv.md: Add instruction sequence for TLSDESC.
12487 * config/riscv/riscv.cc (riscv_symbol_insns): Add instruction
12488 sequence length data for TLSDESC.
12489 (riscv_legitimize_tls_address): Add lowering of TLSDESC.
12490 * doc/install.texi: Document --with-tls for RISC-V.
12491 * doc/invoke.texi: Document -mtls-dialect for RISC-V.
12492
124932024-04-08 Jakub Jelinek <jakub@redhat.com>
12494
12495 PR target/114605
12496 * config/s390/s390.cc (s390_const_int_pool_entry_p): Punt
12497 if mem doesn't have MODE_INT mode, or pool constant doesn't
12498 have MODE_INT mode, or if pool constant mode is smaller than
12499 mem mode. If mem mode is different from pool constant mode,
12500 try to simplify subreg. If that doesn't work, punt, if it
12501 does, use the simplified constant instead of the constant pool
12502 constant.
12503 * config/s390/s390.md (movdi from const pool peephole): If
12504 either low or high 32-bit part is zero, just emit move insn
12505 instead of move + ior.
12506
125072024-04-08 Richard Biener <rguenther@suse.de>
12508
12509 PR tree-optimization/114624
12510 * tree-scalar-evolution.cc (final_value_replacement_loop):
12511 Get at the PHI arg location before releasing the PHI node.
12512
125132024-04-08 Pan Li <pan2.li@intel.com>
12514
12515 * config/riscv/riscv-vector-builtins-shapes.cc (build_one): Pass
12516 required_ext arg when invoke add function.
12517 (build_th_loadstore): Ditto.
12518 (struct vcreate_def): Ditto.
12519 (struct read_vl_def): Ditto.
12520 (struct vlenb_def): Ditto.
12521 * config/riscv/riscv-vector-builtins.cc (function_builder::add_function):
12522 Introduce new arg required_ext to fill in the register func.
12523 (function_builder::add_unique_function): Ditto.
12524 (function_builder::add_overloaded_function): Ditto.
12525 (expand_builtin): Leverage required_extensions_specified to
12526 check if the required extension is provided.
12527 * config/riscv/riscv-vector-builtins.h (reqired_ext_to_isa_name): New
12528 func impl to convert the required_ext enum to the extension name.
12529 (required_extensions_specified): New func impl to predicate if
12530 the required extension is well feeded.
12531
125322024-04-08 Iain Sandoe <iain@sandoe.co.uk>
12533
12534 * config/darwin.h (LINK_COMMAND_SPEC_A): Update coverage
12535 specs.
12536
125372024-04-08 demin.han <demin.han@starfivetech.com>
12538
12539 * config/riscv/riscv-vector-costs.cc: Use length()
12540
125412024-04-08 Pan Li <pan2.li@intel.com>
12542
12543 * config/riscv/riscv-c.cc (struct pragma_intrinsic_flags): New
12544 struct to hold all intrinisc related flags.
12545 (riscv_pragma_intrinsic_flags_pollute): New func to pollute
12546 the intrinsic flags and backup original flags.
12547 (riscv_pragma_intrinsic_flags_restore): New func to restore
12548 the flags from the backup intrinsic flags.
12549 (riscv_pragma_intrinsic): Pollute the flags and register all
12550 possible builtin types and functions, then restore and reinit.
12551 * config/riscv/riscv-protos.h (reinit_builtins): New func
12552 decl to reinit after flags pollution.
12553 (riscv_option_override): New extern func decl.
12554 * config/riscv/riscv-vector-builtins.cc (register_builtin_types_on_null):
12555 New func to register builtin types if null.
12556 (DEF_RVV_TYPE): Ditto.
12557 (DEF_RVV_TUPLE_TYPE): Ditto.
12558 (reinit_builtins): New func impl to reinit after flags pollution.
12559 (expand_builtin): Return
12560 target rtx after error_at.
12561 * config/riscv/riscv.cc (riscv_vector_int_type_p): New predicate
12562 func to tell one tree type is integer or not.
12563 (riscv_vector_float_type_p): New predicate func to tell one tree
12564 type is float or not.
12565 (riscv_vector_element_bitsize): New func to get the element bitsize
12566 of a vector tree type.
12567 (riscv_vector_required_min_vlen): New func to get the required min vlen
12568 of a vector tree type.
12569 (riscv_validate_vector_type): New func to validate the tree type
12570 is valid on flags.
12571 (riscv_return_value_is_vector_type_p): Leverage the func
12572 riscv_validate_vector_type to do the tree type validation.
12573 (riscv_arguments_is_vector_type_p): Ditto.
12574 (riscv_override_options_internal): Ditto.
12575
125762024-04-08 Lulu Cheng <chenglulu@loongson.cn>
12577
12578 PR target/112919
12579 * config/loongarch/loongarch-def.cc (la664_align): Newly defined
12580 function that sets alignment rules under the LA664 microarchitecture.
12581 * config/loongarch/loongarch-opts.cc
12582 (loongarch_target_option_override): If not optimizing for size, set
12583 the default alignment to what the target wants.
12584 * config/loongarch/loongarch-tune.h (struct loongarch_align): Add
12585 new member variables jump and loop.
12586
125872024-04-06 H.J. Lu <hjl.tools@gmail.com>
12588
12589 PR target/114590
12590 * config/i386/i386.md (x86_64_shld): Use explicit shift count in
12591 AT&T syntax.
12592 (x86_64_shld_ndd): Likewise.
12593 (x86_shld): Likewise.
12594 (x86_shld_ndd): Likewise.
12595 (x86_64_shrd): Likewise.
12596 (x86_64_shrd_ndd): Likewise.
12597 (x86_shrd): Likewise.
12598 (x86_shrd_ndd): Likewise.
12599
126002024-04-06 Jørgen Kvalsvik <j@lambda.is>
12601
12602 PR middle-end/114599
12603 * tree-inline.cc (add_local_variables): Copy cond_uids mappings.
12604
126052024-04-05 David Malcolm <dmalcolm@redhat.com>
12606
12607 PR analyzer/114588
12608 * diagnostic-color.cc (color_dict): Add "valid" and "invalid" as
12609 color capability names.
12610 * doc/invoke.texi: Document them in description of GCC_COLORS.
12611 * text-art/style.cc: Include "diagnostic-color.h".
12612 (text_art::get_style_from_color_cap_name): New.
12613 * text-art/types.h (get_style_from_color_cap_name): New decl.
12614
126152024-04-05 Alex Coplan <alex.coplan@arm.com>
12616
12617 * config/aarch64/aarch64-ldp-fusion.cc (struct alias_walker):
12618 Fix double space after const qualifier on valid ().
12619
126202024-04-05 Martin Jambor <mjambor@suse.cz>
12621
12622 PR ipa/113964
12623 * ipa-param-manipulation.cc (ipa_param_adjustments::modify_call):
12624 Force values obtined through pass-through maps to the expected
12625 split type.
12626
126272024-04-05 Mark Wielaard <mark@klomp.org>
12628
12629 * common.opt.urls: Regenerate.
12630
126312024-04-05 Richard Sandiford <richard.sandiford@arm.com>
12632
12633 PR target/114603
12634 * config/aarch64/aarch64-sve.md (@aarch64_pred_cnot<mode>): Replace
12635 with...
12636 (@aarch64_ptrue_cnot<mode>): ...this, requiring operand 1 to be
12637 a ptrue.
12638 (*cnot<mode>): Require operand 1 to be a ptrue.
12639 * config/aarch64/aarch64-sve-builtins-base.cc (svcnot_impl::expand):
12640 Use aarch64_ptrue_cnot<mode> for _x operations that are predicated
12641 with a ptrue. Represent other _x operations as fully-defined _m
12642 operations.
12643
126442024-04-05 Jakub Jelinek <jakub@redhat.com>
12645
12646 PR tree-optimization/114566
12647 * tree-vect-loop.cc (update_epilogue_loop_vinfo): Don't clear
12648 base_misaligned.
12649
126502024-04-05 Richard Biener <rguenther@suse.de>
12651
12652 PR middle-end/114599
12653 PR gcov-profile/114115
12654 * symtab.cc (ifunc_ref_map): Do not use auto_bitmap.
12655 (is_caller_ifunc_resolver): Optimize bitmap_bit_p/bitmap_set_bit
12656 pair.
12657 (symtab_node::check_ifunc_callee_symtab_nodes): Properly
12658 allocate ifunc_ref_map here.
12659
126602024-04-04 Martin Jambor <mjambor@suse.cz>
12661
12662 PR ipa/111571
12663 * ipa-param-manipulation.cc
12664 (ipa_param_body_adjustments::common_initialization): Avoid creating
12665 duplicate replacement entries.
12666
126672024-04-04 Vladimir N. Makarov <vmakarov@redhat.com>
12668
12669 PR rtl-optimization/114415
12670 * sched-deps.cc (add_insn_mem_dependence): Add memory check for mem argument.
12671 (sched_analyze_1): Treat stack pointer modification as memory read.
12672 (sched_analyze_2, sched_analyze_insn): Add memory guard for processing pending_read_mems.
12673 * sched-int.h (deps_desc): Add comment to pending_read_mems.
12674
126752024-04-04 Tobias Burnus <tburnus@baylibre.com>
12676
12677 * config/nvptx/mkoffload.cc (main): Call
12678 gcc_init_libintl and diagnostic_color_init.
12679
126802024-04-04 H.J. Lu <hjl.tools@gmail.com>
12681
12682 PR target/114587
12683 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
12684 __APX_F__ when APX is enabled.
12685
126862024-04-04 Jørgen Kvalsvik <j@lambda.is>
12687
12688 * builtins.cc (expand_builtin_fork_or_exec): Check
12689 condition_coverage_flag.
12690 * collect2.cc (main): Add -fno-condition-coverage to OBSTACK.
12691 * common.opt: Add new options -fcondition-coverage and
12692 -Wcoverage-too-many-conditions.
12693 * doc/gcov.texi: Add --conditions documentation.
12694 * doc/invoke.texi: Add -fcondition-coverage documentation.
12695 * function.cc (free_after_compilation): Free cond_uids.
12696 * function.h (struct function): Add cond_uids.
12697 * gcc.cc: Link gcov on -fcondition-coverage.
12698 * gcov-counter.def (GCOV_COUNTER_CONDS): New.
12699 * gcov-dump.cc (tag_conditions): New.
12700 * gcov-io.h (GCOV_TAG_CONDS): New.
12701 (GCOV_TAG_CONDS_LENGTH): New.
12702 (GCOV_TAG_CONDS_NUM): New.
12703 * gcov.cc (class condition_info): New.
12704 (condition_info::condition_info): New.
12705 (condition_info::popcount): New.
12706 (struct coverage_info): New.
12707 (add_condition_counts): New.
12708 (output_conditions): New.
12709 (print_usage): Add -g, --conditions.
12710 (process_args): Likewise.
12711 (output_intermediate_json_line): Output conditions.
12712 (read_graph_file): Read condition counters.
12713 (read_count_file): Likewise.
12714 (file_summary): Print conditions.
12715 (accumulate_line_info): Accumulate conditions.
12716 (output_line_details): Print conditions.
12717 * gimplify.cc (next_cond_uid): New.
12718 (reset_cond_uid): New.
12719 (shortcut_cond_r): Set condition discriminator.
12720 (tag_shortcut_cond): New.
12721 (gimple_associate_condition_with_expr): New.
12722 (shortcut_cond_expr): Set condition discriminator.
12723 (gimplify_cond_expr): Likewise.
12724 (gimplify_function_tree): Call reset_cond_uid.
12725 * ipa-inline.cc (can_early_inline_edge_p): Check
12726 condition_coverage_flag.
12727 * ipa-split.cc (pass_split_functions::gate): Likewise.
12728 * passes.cc (finish_optimization_passes): Likewise.
12729 * profile.cc (struct condcov): New declaration.
12730 (cov_length): Likewise.
12731 (cov_blocks): Likewise.
12732 (cov_masks): Likewise.
12733 (cov_maps): Likewise.
12734 (cov_free): Likewise.
12735 (instrument_decisions): New.
12736 (read_thunk_profile): Control output to file.
12737 (branch_prob): Call find_conditions, instrument_decisions.
12738 (init_branch_prob): Add total_num_conds.
12739 (end_branch_prob): Likewise.
12740 * tree-core.h (struct tree_exp): Add condition_uid.
12741 * tree-profile.cc (struct conds_ctx): New.
12742 (CONDITIONS_MAX_TERMS): New.
12743 (EDGE_CONDITION): New.
12744 (topological_cmp): New.
12745 (index_of): New.
12746 (single_p): New.
12747 (single_edge): New.
12748 (contract_edge_up): New.
12749 (struct outcomes): New.
12750 (conditional_succs): New.
12751 (condition_index): New.
12752 (condition_uid): New.
12753 (masking_vectors): New.
12754 (emit_assign): New.
12755 (emit_bitwise_op): New.
12756 (make_top_index_visit): New.
12757 (make_top_index): New.
12758 (paths_between): New.
12759 (struct condcov): New.
12760 (cov_length): New.
12761 (cov_blocks): New.
12762 (cov_masks): New.
12763 (cov_maps): New.
12764 (cov_free): New.
12765 (find_conditions): New.
12766 (struct counters): New.
12767 (find_counters): New.
12768 (resolve_counter): New.
12769 (resolve_counters): New.
12770 (instrument_decisions): New.
12771 (tree_profiling): Check condition_coverage_flag.
12772 (pass_ipa_tree_profile::gate): Likewise.
12773 * tree.h (SET_EXPR_UID): New.
12774 (EXPR_COND_UID): New.
12775
127762024-04-04 Richard Sandiford <richard.sandiford@arm.com>
12777
12778 PR target/114577
12779 * config/aarch64/aarch64-sve-builtins.h (aarch64_sve::lookup_fndecl):
12780 Declare.
12781 * config/aarch64/aarch64-sve-builtins.cc (aarch64_sve::lookup_fndecl):
12782 New function.
12783 * config/aarch64/aarch64-sve-builtins-base.cc (is_undef): Likewise.
12784 (svset_neonq_impl::expand): Optimise expansions whose first argument
12785 is undefined.
12786
127872024-04-04 Richard Biener <rguenther@suse.de>
12788
12789 PR tree-optimization/114485
12790 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
12791 vect_step_op_neg isn't OK for partial vectors but only
12792 for unknown niter.
12793
127942024-04-04 Jakub Jelinek <jakub@redhat.com>
12795
12796 PR c++/114537
12797 * fold-const.cc (native_encode_initializer): Look through
12798 NON_LVALUE_EXPR if val is INTEGER_CST.
12799
128002024-04-04 Jakub Jelinek <jakub@redhat.com>
12801
12802 PR tree-optimization/114555
12803 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): For
12804 m_bitfld_load and save_cast_conditional add any needed PHIs
12805 and adjust t4 accordingly.
12806
128072024-04-04 Richard Biener <rguenther@suse.de>
12808
12809 PR tree-optimization/114551
12810 * tree-ssa-loop-split.cc (split_loop): If the guard is
12811 only conditionally evaluated rewrite computations with
12812 possibly undefined overflow to unsigned arithmetic.
12813
128142024-04-04 Eugene Rozenfeld <erozen@microsoft.com>
12815
12816 PR gcov-profile/113765
12817 * auto-profile.cc (afdo_annotate_cfg): Don't set full_profile to true
12818
128192024-04-03 Mark Wielaard <mark@klomp.org>
12820
12821 * config/i386/i386.opt.urls: Regenerate.
12822
128232024-04-03 H.J. Lu <hjl.tools@gmail.com>
12824
12825 PR tree-optimization/114115
12826 * cgraph.h (symtab_node): Add check_ifunc_callee_symtab_nodes.
12827 (cgraph_node): Add called_by_ifunc_resolver.
12828 * cgraphunit.cc (symbol_table::compile): Call
12829 symtab_node::check_ifunc_callee_symtab_nodes.
12830 * symtab.cc (check_ifunc_resolver): New.
12831 (ifunc_ref_map): Likewise.
12832 (is_caller_ifunc_resolver): Likewise.
12833 (symtab_node::check_ifunc_callee_symtab_nodes): Likewise.
12834 * tree-profile.cc (gimple_gen_ic_func_profiler): Disable indirect
12835 call profiling for IFUNC resolvers and their callees.
12836
128372024-04-03 Tobias Burnus <tburnus@baylibre.com>
12838
12839 * lto-wrapper.cc (compile_offload_image): Prefix 'offload_args'
12840 suffix by the target name.
12841
128422024-04-03 Tobias Burnus <tburnus@baylibre.com>
12843
12844 * doc/install.texi (amdgcn-*-amdhsa): Update Newlib recommendation
12845 and update wording for LLVM 18 release.
12846
128472024-04-03 Tobias Burnus <tburnus@baylibre.com>
12848
12849 PR other/111966
12850 * config/gcn/mkoffload.cc (get_arch): New; moved -march= flag
12851 handling from ...
12852 (main): ... here; call it to handle --with-arch config option
12853 and -march= commandline.
12854
128552024-04-03 Jakub Jelinek <jakub@redhat.com>
12856
12857 PR middle-end/114552
12858 * expr.cc (emit_push_insn): Only use store_constructor for
12859 immediate_const_ctor_p if int_expr_size matches size.
12860
128612024-04-03 Richard Biener <rguenther@suse.de>
12862
12863 PR tree-optimization/114557
12864 PR tree-optimization/114480
12865 * tree-phinodes.cc (release_phi_node): Return PHIs from
12866 allocation buckets not covered by free_phinodes to GC.
12867 (remove_phi_node): Release the PHI LHS before freeing the
12868 PHI node.
12869 * tree-vect-loop.cc (vectorizable_live_operation): Get PHI lhs
12870 before releasing it.
12871
128722024-04-03 Jiahao Xu <xujiahao@loongson.cn>
12873
12874 * config/loongarch/lasx.md: Remove unused code.
12875 * config/loongarch/loongarch-protos.h
12876 (loongarch_split_lsx_copy_d): Remove.
12877 (loongarch_split_lsx_insert_d): Ditto.
12878 (loongarch_split_lsx_fill_d): Ditto.
12879 * config/loongarch/loongarch.cc
12880 (loongarch_split_lsx_copy_d): Ditto.
12881 (loongarch_split_lsx_insert_d): Ditto.
12882 (loongarch_split_lsx_fill_d): Ditto.
12883 * config/loongarch/lsx.md (lsx_vpickve2gr_du): Remove splitter.
12884 (lsx_vpickve2gr_<lsxfmt_f>): Ditto.
12885 (abs<mode>2): Remove expander.
12886 (vabs<mode>2): Rename 2 abs<mode>2.
12887
128882024-04-02 Christophe Lyon <christophe.lyon@linaro.org>
12889
12890 * config/aarch64/aarch64-option-extensions.def: Fix comment.
12891
128922024-04-02 Tom Tromey <tromey@adacore.com>
12893
12894 * dwarf2out.cc (print_dw_val) <dw_val_class_loc>: Don't
12895 print newline when not recursing.
12896
128972024-04-02 Iain Sandoe <iain@sandoe.co.uk>
12898
12899 * config/darwin.cc (darwin_override_options): Update the
12900 clang major version value in the dsymutil check.
12901
129022024-04-02 Iain Sandoe <iain@sandoe.co.uk>
12903
12904 * config/darwin.cc (darwin_override_options): Reduce the debug
12905 level to 2 if dsymutil cannot handle .macinfo sections.
12906
129072024-04-02 Yang Yujie <yangyujie@loongson.cn>
12908
12909 * config/loongarch/t-loongarch: Add loongarch-def-arrays.h
12910 to OPTION_H_EXTRA.
12911
129122024-04-02 mengqinggang <mengqinggang@loongson.cn>
12913 Lulu Cheng <chenglulu@loongson.cn>
12914 Xi Ruoyao <xry111@xry111.site>
12915
12916 * config.gcc: Add --with-tls option to change TLS flavor.
12917 * config/loongarch/genopts/loongarch.opt.in: Add -mtls-dialect to
12918 configure TLS flavor.
12919 * config/loongarch/loongarch-def.h (struct loongarch_target): Add
12920 tls_dialect.
12921 * config/loongarch/loongarch-driver.cc (la_driver_init): Add tls
12922 flavor.
12923 * config/loongarch/loongarch-opts.cc (loongarch_init_target): Add
12924 tls_dialect.
12925 (loongarch_config_target): Ditto.
12926 (loongarch_update_gcc_opt_status): Ditto.
12927 * config/loongarch/loongarch-opts.h (loongarch_init_target): Ditto.
12928 (TARGET_TLS_DESC): New define.
12929 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Add TLS
12930 DESC instructions sequence length.
12931 (loongarch_legitimize_tls_address): New TLS DESC instruction sequence.
12932 (loongarch_option_override_internal): Add la_opt_tls_dialect.
12933 (loongarch_option_restore): Add la_target.tls_dialect.
12934 * config/loongarch/loongarch.md (@got_load_tls_desc<mode>): Normal
12935 code model for TLS DESC.
12936 (got_load_tls_desc_off64): Extreme cmode model for TLS DESC.
12937 * config/loongarch/loongarch.opt: Regenerate.
12938 * config/loongarch/loongarch.opt.urls: Ditto.
12939 * doc/invoke.texi: Add a description of the compilation option
12940 '-mtls-dialect={trad,desc}'.
12941
129422024-04-02 Lulu Cheng <chenglulu@loongson.cn>
12943
12944 * config/loongarch/loongarch.opt.urls: Regenerate.
12945
129462024-04-01 Yang Yujie <yangyujie@loongson.cn>
12947
12948 * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as
12949 aliases to -mrecip={all,none}, respectively.
12950 * config/loongarch/loongarch.opt: Regenerate.
12951 * config/loongarch/loongarch-def.h (ABI_FPU_64): Rename to...
12952 (ABI_FPU64_P): ...this.
12953 (ABI_FPU_32): Rename to...
12954 (ABI_FPU32_P): ...this.
12955 (ABI_FPU_NONE): Rename to...
12956 (ABI_NOFPU_P): ...this.
12957 (ABI_LP64_P): Define.
12958 * config/loongarch/loongarch.cc (loongarch_init_print_operand_punct):
12959 Merged into loongarch_global_init.
12960 (loongarch_cpu_option_override): Renamed to
12961 loongarch_target_option_override.
12962 (loongarch_option_override_internal): Move the work after
12963 loongarch_config_target into loongarch_target_option_override.
12964 (loongarch_global_init): Define.
12965 (INIT_TARGET_FLAG): Move to loongarch-opts.cc.
12966 (loongarch_option_override): Call loongarch_global_init
12967 separately.
12968 * config/loongarch/loongarch-opts.cc (loongarch_parse_mrecip_scheme):
12969 Split the parsing of -mrecip=<string> from
12970 loongarch_option_override_internal.
12971 (loongarch_generate_mrecip_scheme): Define. Split from
12972 loongarch_option_override_internal.
12973 (loongarch_target_option_override): Define. Renamed from
12974 loongarch_cpu_option_override.
12975 (loongarch_init_misc_options): Define. Split from
12976 loongarch_option_override_internal.
12977 (INIT_TARGET_FLAG): Move from loongarch.cc.
12978 * config/loongarch/loongarch-opts.h (loongarch_target_option_override):
12979 New prototype.
12980 (loongarch_parse_mrecip_scheme): New prototype.
12981 (loongarch_init_misc_options): New prototype.
12982 (TARGET_ABI_LP64): Simplify with ABI_LP64_P.
12983 * config/loongarch/loongarch.h (TARGET_RECIP_DIV): Simplify.
12984 Do not reference specific CPU architecture (LA664).
12985 (TARGET_RECIP_SQRT): Same.
12986 (TARGET_RECIP_RSQRT): Same.
12987 (TARGET_RECIP_VEC_DIV): Same.
12988 (TARGET_RECIP_VEC_SQRT): Same.
12989 (TARGET_RECIP_VEC_RSQRT): Same.
12990
129912024-04-01 Lulu Cheng <chenglulu@loongson.cn>
12992
12993 * doc/invoke.texi: Add descriptions for the compilation
12994 options.
12995
129962024-03-31 Jeff Law <jlaw@ventanamicro.com>
12997
12998 * config/riscv/xiangshan.md (xiangshan_jump): Add branch, jalr, ret
12999 and sfb_alu.
13000
130012024-03-31 Pan Li <pan2.li@intel.com>
13002
13003 * config/riscv/riscv-vector-builtins.cc (expand_builtin): Take
13004 the term built-in over builtin.
13005
130062024-03-31 Pan Li <pan2.li@intel.com>
13007
13008 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
13009 Remove unused var decl.
13010
130112024-03-30 Xi Ruoyao <xry111@xry111.site>
13012
13013 PR target/114175
13014 * config/mips/mips.cc (mips_setup_incoming_varargs): Only skip
13015 mips_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P
13016 functions if arg.type is NULL.
13017
130182024-03-29 Andrew Pinski <quic_apinski@quicinc.com>
13019
13020 * lto-compress.cc (lto_end_uncompression): Use
13021 fatal_error instead of internal_error when ZSTD
13022 is not enabled.
13023
130242024-03-28 Jeff Law <jlaw@ventanamicro.com>
13025
13026 * config/h8300/extensions.md (zero_extendqihi*): Add output
13027 template for reg->reg case where the regs don't match.
13028
130292024-03-28 Gaius Mulley <(no_default)>
13030
13031 PR modula2/114517
13032 * doc/gm2.texi: Mention gm2 treats a # in the first column
13033 as a preprocessor directive unless -fno-cpp is supplied.
13034
130352024-03-28 Jakub Jelinek <jakub@redhat.com>
13036
13037 * predict.cc (estimate_bb_frequencies): Fix comment typo,
13038 scalling -> scaling.
13039
130402024-03-28 Jakub Jelinek <jakub@redhat.com>
13041
13042 PR tree-optimization/112303
13043 * profile-count.h (profile_count::operator+): Perform
13044 addition in uint64_t variable and set m_val to MIN of that
13045 val and max_count.
13046 (profile_count::operator+=): Likewise.
13047 (profile_count::operator-=): Formatting fix.
13048 (profile_count::apply_probability): Use safe_scale_64bit
13049 even in the int overload.
13050
130512024-03-28 Jan Hubicka <jh@suse.cz>
13052
13053 PR middle-end/113907
13054 * ipa-icf.cc (sem_function::init): Hash PHI operands
13055 (sem_function::compare_phi_node): Add argument about preserving order
13056
130572024-03-28 Richard Biener <rguenther@suse.de>
13058
13059 PR middle-end/114480
13060 * cfganal.cc (compute_idf): Use simpler bitmap iteration,
13061 touch work_set only when phi_insertion_points changed.
13062
130632024-03-28 Palmer Dabbelt <palmer@rivosinc.com>
13064
13065 * config/riscv/riscv.h (REGISTER_NAMES): Add vxsat.
13066
130672024-03-27 Segher Boessenkool <segher@kernel.crashing.org>
13068
13069 PR rtl-optimization/101523
13070 * combine.cc (try_combine): Don't do a 2-insn combination if
13071 it does not in fact change I2.
13072
130732024-03-27 Jakub Jelinek <jakub@redhat.com>
13074
13075 * doc/invoke.texi (Spec Files): Use @var{S} instead of S,
13076 @var{X} instead of X etc. for other placeholders.
13077
130782024-03-27 Richard Biener <rguenther@suse.de>
13079
13080 PR tree-optimization/114057
13081 * tree-vect-slp.cc (vect_bb_slp_mark_live_stmts): Mark
13082 BB reduction remain defs as scalar uses.
13083
130842024-03-27 Victor Do Nascimento <victor.donascimento@arm.com>
13085
13086 * config/aarch64/aarch64-option-extensions.def (rcpc3):
13087 Fix FEATURE_STRING field to "lrcpc3".
13088
130892024-03-27 Victor Do Nascimento <victor.donascimento@arm.com>
13090
13091 * config/aarch64/aarch64-option-extensions.def: Add LSE128
13092 AARCH64_OPT_EXTENSION, adding it as a dependency for the D128
13093 feature.
13094 * doc/invoke.texi (AArch64 Options): Document +lse128.
13095
130962024-03-26 Richard Sandiford <richard.sandiford@arm.com>
13097
13098 * config/aarch64/aarch64-feature-deps.h: Use constexpr for
13099 out-of-line statics.
13100
131012024-03-26 Cupertino Miranda <cupertino.miranda@oracle.com>
13102
13103 PR target/114431
13104 * btfout.cc (get_name_for_datasec_entry): Add function.
13105 (btf_asm_datasec_entry): Print label when possible.
13106
131072024-03-26 Richard Ball <richard.ball@arm.com>
13108
13109 PR target/114272
13110 * config/aarch64/aarch64-cores.def (AARCH64_CORE):
13111 Change SCHEDULER_IDENT from cortexa55 to cortexa53
13112 for Cortex-A510 and Cortex-A520.
13113
131142024-03-26 Jakub Jelinek <jakub@redhat.com>
13115
13116 PR middle-end/111151
13117 * fold-const.cc (extract_muldiv_1) <case MAX_EXPR>: Punt for
13118 MULT_EXPR altogether, or for MAX_EXPR if c is -1.
13119
131202024-03-26 Jakub Jelinek <jakub@redhat.com>
13121
13122 PR sanitizer/111736
13123 * tsan.cc (instrument_expr): Punt on non-generic address space
13124 accesses.
13125
131262024-03-26 Richard Biener <rguenther@suse.de>
13127
13128 PR tree-optimization/114471
13129 * tree-vect-stmts.cc (vectorizable_operation): Verify operand
13130 types are compatible with the result type.
13131
131322024-03-26 Richard Biener <rguenther@suse.de>
13133
13134 PR tree-optimization/114464
13135 * tree-vect-loop.cc (vectorizable_recurr): Verify the latch
13136 vector type is compatible with what we chose for the recurrence.
13137
131382024-03-26 Jakub Jelinek <jakub@redhat.com>
13139
13140 * cfgloopmanip.cc (update_loop_exit_probability_scale_dom_bbs):
13141 Fix comment typo - multple -> multiple.
13142 * config/i386/x86-tune.def (X86_TUNE_ACCUMULATE_OUTGOING_ARGS):
13143 Likewise.
13144
131452024-03-26 YunQiang Su <syq@gcc.gnu.org>
13146
13147 * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Predefine
13148 __mips_strict_alignment if STRICT_ALIGNMENT.
13149
131502024-03-25 Richard Biener <rguenther@suse.de>
13151
13152 * config.gcc (amdgcn): Add gfx1036 entries.
13153 * config/gcn/gcn-hsa.h (NO_XNACK): Likewise.
13154 (gcn_local_sym_hash): Likewise.
13155 * config/gcn/gcn-opts.h (enum processor_type): Likewise.
13156 (TARGET_GFX1036): New macro.
13157 * config/gcn/gcn.cc (gcn_option_override): Handle gfx1036.
13158 (gcn_omp_device_kind_arch_isa): Likewise.
13159 (output_file_start): Likewise.
13160 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __gfx1036__.
13161 (TARGET_CPU_CPP_BUILTINS): Rename __gfx1030 to __gfx1030__.
13162 * config/gcn/gcn.opt: Add gfx1036.
13163 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1036): New.
13164 (main): Handle gfx1036.
13165 * config/gcn/t-omp-device: Add gfx1036 isa.
13166 * doc/install.texi (amdgcn): Add gfx1036.
13167 * doc/invoke.texi (-march): Likewise.
13168
131692024-03-25 Pan Li <pan2.li@intel.com>
13170
13171 * config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Remove error
13172 when V is disabled and init the RVV types and intrinic APIs.
13173 * config/riscv/riscv-vector-builtins.cc (expand_builtin): Report
13174 error if V ext is disabled.
13175 * config/riscv/riscv.cc (riscv_return_value_is_vector_type_p):
13176 Ditto.
13177 (riscv_arguments_is_vector_type_p): Ditto.
13178 (riscv_vector_cc_function_p): Ditto.
13179 * config/riscv/riscv_vector.h: Remove error if V is disable.
13180
131812024-03-23 John David Anglin <danglin@gcc.gnu.org>
13182
13183 * config/pa/pa.cc (pa_output_global_address): Handle
13184 UNSPEC_DLTIND14R addresses.
13185 * config/pa/pa.h (PRINT_OPERAND_ADDRESS): Output "RT'" for
13186 UNSPEC_DLTIND14R address.
13187
131882024-03-23 Jakub Jelinek <jakub@redhat.com>
13189
13190 PR tree-optimization/114433
13191 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): For
13192 m_bitfld_load check save_first rather than m_first.
13193
131942024-03-23 Jakub Jelinek <jakub@redhat.com>
13195
13196 PR tree-optimization/114425
13197 * gimple-lower-bitint.cc (build_bitint_stmt_ssa_conflicts): Handle
13198 _Complex large/huge _BitInt types like the large/huge _BitInt types.
13199
132002024-03-23 Jakub Jelinek <jakub@redhat.com>
13201
13202 PR middle-end/111683
13203 * tree-predcom.cc (pcom_worker::suitable_component_p): If has_write
13204 and comp_step is RS_NONZERO, return false if any reference in the
13205 component doesn't have DR_STEP a multiple of access size.
13206
132072024-03-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
13208
13209 * config/xtensa/xtensa.md: Add new split pattern described above.
13210
132112024-03-22 Georg-Johann Lay <avr@gjlay.de>
13212
13213 * config/avr/avr.cc (avr_set_current_function): Adjust diagnostic
13214 for deprecated SIGNAL and INTERRUPT usage without respective header.
13215
132162024-03-22 Andrew Stubbs <ams@baylibre.com>
13217
13218 * config/gcn/gcn.md (*memory_barrier): Split into RDNA and !RDNA.
13219 (atomic_load<mode>): Adjust RDNA cache settings.
13220 (atomic_store<mode>): Likewise.
13221 (atomic_exchange<mode>): Likewise.
13222
132232024-03-22 Andrew Stubbs <ams@baylibre.com>
13224
13225 * config/gcn/gcn.cc (gcn_vectorize_preferred_simd_mode): Prefer V32 on
13226 RDNA devices.
13227
132282024-03-22 Andrew Stubbs <ams@baylibre.com>
13229
13230 * config.gcc (amdgcn): Add gfx1103 entries.
13231 * config/gcn/gcn-hsa.h (NO_XNACK): Likewise.
13232 (gcn_local_sym_hash): Likewise.
13233 * config/gcn/gcn-opts.h (enum processor_type): Likewise.
13234 (TARGET_GFX1103): New macro.
13235 * config/gcn/gcn.cc (gcn_option_override): Handle gfx1103.
13236 (gcn_omp_device_kind_arch_isa): Likewise.
13237 (output_file_start): Likewise.
13238 (gcn_hsa_declare_function_name): Use TARGET_RDNA3, not just gfx1100.
13239 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Add __gfx1103__.
13240 * config/gcn/gcn.opt: Add gfx1103.
13241 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1103): New.
13242 (main): Handle gfx1103.
13243 * config/gcn/t-omp-device: Add gfx1103 isa.
13244 * doc/install.texi (amdgcn): Add gfx1103.
13245 * doc/invoke.texi (-march): Likewise.
13246
132472024-03-22 Andrew Stubbs <ams@baylibre.com>
13248
13249 * dojump.cc (do_compare_rtx_and_jump): Clear excess bits in vector
13250 bitmasks.
13251 (do_compare_and_jump): Remove now-redundant similar code.
13252 * internal-fn.cc (expand_fn_using_insn): Clear excess bits in vector
13253 bitmasks.
13254 (add_mask_and_len_args): Likewise.
13255
132562024-03-22 Pan Li <pan2.li@intel.com>
13257
13258 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add pre-define
13259 macro __riscv_v_fixed_vlen when zvl.
13260 * config/riscv/riscv.cc (riscv_handle_rvv_vector_bits_attribute):
13261 New static func to take care of the RVV types decorated by
13262 the attributes.
13263
132642024-03-22 Andrew Pinski <quic_apinski@quicinc.com>
13265
13266 PR c/109619
13267 * builtins.cc (fold_builtin_1): Use error_operand_p
13268 instead of checking against ERROR_MARK.
13269 (fold_builtin_2): Likewise.
13270 (fold_builtin_3): Likewise.
13271
132722024-03-22 Jakub Jelinek <jakub@redhat.com>
13273
13274 PR sanitizer/111736
13275 * ubsan.cc (ubsan_expand_null_ifn, instrument_mem_ref): Avoid
13276 SANITIZE_NULL instrumentation for non-generic address spaces
13277 for which targetm.addr_space.zero_address_valid (as) is true.
13278
132792024-03-22 Jakub Jelinek <jakub@redhat.com>
13280
13281 PR tree-optimization/114405
13282 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt):
13283 Set rprec to limb_prec rather than 0 if tprec is divisible by
13284 limb_prec. In the last bf_cur handling, set rprec to (tprec + bo_bit)
13285 % limb_prec rather than tprec % limb_prec and use just rprec instead
13286 of rprec + bo_bit. For build_bit_field_ref offset, divide
13287 (tprec + bo_bit) by limb_prec rather than just tprec.
13288
132892024-03-22 Christoph Müllner <christoph.muellner@vrull.eu>
13290
13291 PR target/114194
13292 * config/riscv/vector-iterators.md: Split VI into VI_FRAC and VI_NOFRAC.
13293 Only include VI_NOFRAC in V_VLS without TARGET_XTHEADVECTOR.
13294
132952024-03-22 Jeff Law <jlaw@ventanamicro.com>
13296
13297 * config/riscv/riscv.cc (riscv_expand_prologue): Add missing stack
13298 tie for scalable and final stack adjustment if needed.
13299 Co-authored-by: Raphael Zinsly <rzinsly@ventanamicro.com>
13300
133012024-03-22 Pan Li <pan2.li@intel.com>
13302
13303 PR target/114352
13304 * common/config/riscv/riscv-common.cc (struct riscv_func_target_info):
13305 New struct for func decl and target name.
13306 (struct riscv_func_target_hasher): New hasher for hash table mapping
13307 from the fn_decl to fn_target_name.
13308 (riscv_func_decl_hash): New func to compute the hash for fn_decl.
13309 (riscv_func_target_hasher::hash): New func to impl hash interface.
13310 (riscv_func_target_hasher::equal): New func to impl equal interface.
13311 (riscv_cmdline_subset_list): New static var for cmdline subset list.
13312 (riscv_func_target_table_lazy_init): New func to lazy init the func
13313 target hash table.
13314 (riscv_func_target_get): New func to get target name from hash table.
13315 (riscv_func_target_put): New func to put target name into hash table.
13316 (riscv_func_target_remove_and_destory): New func to remove target
13317 info from the hash table and destory it.
13318 (riscv_parse_arch_string): Set the static var cmdline_subset_list.
13319 * config/riscv/riscv-subset.h (riscv_cmdline_subset_list): New static
13320 var for cmdline subset list.
13321 (riscv_func_target_get): New func decl.
13322 (riscv_func_target_put): Ditto.
13323 (riscv_func_target_remove_and_destory): Ditto.
13324 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
13325 Take cmdline_subset_list instead of current_subset_list when clone.
13326 (riscv_process_target_attr): Record the func target info to hash table.
13327 (riscv_option_valid_attribute_p): Add new arg tree fndel.
13328 * config/riscv/riscv.cc (riscv_declare_function_name): Consume the
13329 func target info and print the arch message.
13330
133312024-03-22 Pan Li <pan2.li@intel.com>
13332
13333 PR target/114352
13334 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
13335 Replace implied, combine and check to func finalize.
13336 (riscv_subset_list::finalize): New func impl to take care of
13337 implied, combine ext and related checks.
13338 * config/riscv/riscv-subset.h: Add func decl for finalize.
13339 * config/riscv/riscv-target-attr.cc (riscv_target_attr_parser::parse_arch):
13340 Finalize the ext before return succeed.
13341 * config/riscv/riscv.cc (riscv_set_current_function): Reinit the
13342 machine mode before when set cur function.
13343
133442024-03-21 Andrew Stubbs <ams@baylibre.com>
13345
13346 * config/gcn/gcn.cc (gcn_expand_builtin_1): Comment correction.
13347
133482024-03-21 Andrew Stubbs <ams@baylibre.com>
13349
13350 * config/gcn/gcn-hsa.h (ASM_SPEC): Pass -mattr=+cumode.
13351
133522024-03-21 Andrew Stubbs <ams@baylibre.com>
13353
13354 * config/gcn/gcn-run.cc (main): Add an hsa_memory_free calls for each
13355 device_malloc call.
13356
133572024-03-21 liuhongt <hongtao.liu@intel.com>
13358
13359 PR tree-optimization/114396
13360 * tree-vect-loop.cc (vect_peel_nonlinear_iv_init): Pass utype
13361 and true to wi::from_mpz.
13362
133632024-03-21 Richard Biener <rguenther@suse.de>
13364
13365 PR tree-optimization/111736
13366 * asan.cc (instrument_derefs): Do not instrument accesses
13367 to non-generic address-spaces.
13368
133692024-03-21 Richard Biener <rguenther@suse.de>
13370
13371 PR tree-optimization/113727
13372 * tree-sra.cc (analyze_access_subtree): Do not allow
13373 replacements in subtrees when grp_partial_lhs.
13374
133752024-03-21 liuhongt <hongtao.liu@intel.com>
13376
13377 PR middle-end/114347
13378 * doc/invoke.texi: Document -fexcess-precision=16.
13379
133802024-03-20 Cupertino Miranda <cupertino.miranda@oracle.com>
13381
13382 * config/bpf/core-builtins.cc (bpf_core_get_index): Check if
13383 field contains a DECL_NAME.
13384
133852024-03-20 Cupertino Miranda <cupertino.miranda@oracle.com>
13386
13387 * config/bpf/btfext-out.cc (cpf_core_reloc_add): Correct for new code.
13388 Add assert to validate the string is set.
13389 * config/bpf/core-builtins.cc (cr_final): Make string struct
13390 field as const.
13391 (process_enum_value): Correct for field type change.
13392 (process_type): Set access string to "0".
13393
133942024-03-20 Cupertino Miranda <cupertino.miranda@oracle.com>
13395
13396 * config/bpf/core-builtins.cc (core_field_info): Add
13397 support for POINTER_PLUS_EXPR in the root of the field expression.
13398 (bpf_core_get_index): Likewise.
13399 (pack_field_expr): Make the BTF type to point to the structure
13400 related node, instead of its pointer type.
13401 (make_core_safe_access_index): Correct to new code.
13402
134032024-03-20 Xi Ruoyao <xry111@xry111.site>
13404
13405 PR target/114407
13406 * config/loongarch/loongarch-opts.cc (loongarch_config_target):
13407 Fix typo in diagnostic message, enabing -> enabling.
13408
134092024-03-20 Jakub Jelinek <jakub@redhat.com>
13410
13411 PR target/114175
13412 * config/visium/visium.cc (visium_setup_incoming_varargs): Only skip
13413 TARGET_FUNCTION_ARG_ADVANCE for TYPE_NO_NAMED_ARGS_STDARG_P functions
13414 if arg.type is NULL.
13415
134162024-03-20 Jakub Jelinek <jakub@redhat.com>
13417
13418 PR target/114175
13419 * config/nios2/nios2.cc (nios2_setup_incoming_varargs): Only skip
13420 nios2_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13421 if arg.type is NULL.
13422
134232024-03-20 Jakub Jelinek <jakub@redhat.com>
13424
13425 PR target/114175
13426 * config/nds32/nds32.cc (nds32_setup_incoming_varargs): Only skip
13427 function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13428 if arg.type is NULL.
13429
134302024-03-20 Jakub Jelinek <jakub@redhat.com>
13431
13432 PR target/114175
13433 * config/m32r/m32r.cc (m32r_setup_incoming_varargs): Only skip
13434 function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13435 if arg.type is NULL.
13436
134372024-03-20 Jakub Jelinek <jakub@redhat.com>
13438
13439 PR target/114175
13440 * config/ft32/ft32.cc (ft32_setup_incoming_varargs): Only skip
13441 function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13442 if arg.type is NULL.
13443
134442024-03-20 Jakub Jelinek <jakub@redhat.com>
13445
13446 PR target/114175
13447 * config/epiphany/epiphany.cc (epiphany_setup_incoming_varargs): Only
13448 skip function arg advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13449 if arg.type is NULL.
13450
134512024-03-20 Jakub Jelinek <jakub@redhat.com>
13452
13453 PR target/114175
13454 * config/csky/csky.cc (csky_setup_incoming_varargs): Only skip
13455 csky_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13456 if arg.type is NULL.
13457
134582024-03-20 Yury Khrustalev <yury.khrustalev@arm.com>
13459
13460 * config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
13461
134622024-03-20 Jakub Jelinek <jakub@redhat.com>
13463
13464 PR tree-optimization/114365
13465 * gimple-lower-bitint.cc (bitint_large_huge::handle_load): When adding
13466 a PHI node, set iv2 to its result afterwards.
13467
134682024-03-20 Jakub Jelinek <jakub@redhat.com>
13469
13470 * tree-ssa-loop-ch.cc (update_profile_after_ch): Fix comment typo:
13471 probabbility -> probability.
13472 (ch_base::copy_headers): Fix comment typo: itrations -> iterations.
13473
134742024-03-20 Jakub Jelinek <jakub@redhat.com>
13475
13476 PR bootstrap/114369
13477 * system.h (vec_step): Define to vec_step_ when compiling
13478 with clang on PowerPC.
13479
134802024-03-20 demin.han <demin.han@starfivetech.com>
13481
13482 PR target/112651
13483 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Rename
13484 (enum rvv_max_lmul_enum): Ditto
13485 (TARGET_MAX_LMUL): Ditto
13486 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto
13487 * config/riscv/riscv-vector-costs.cc (costs::record_potential_unexpected_spills): Ditto
13488 (costs::better_main_loop_than_p): Ditto
13489 * config/riscv/riscv.opt: Replace -param=riscv-autovec-lmul with -mrvv-max-lmul
13490
134912024-03-20 Richard Biener <rguenther@suse.de>
13492
13493 PR middle-end/113396
13494 * tree-dfa.cc (get_ref_base_and_extent): Use index range
13495 bounds only if they fit within the address-range constraints
13496 of offset_int.
13497
134982024-03-20 Chenghui Pan <panchenghui@loongson.cn>
13499
13500 * config/loongarch/loongarch.cc
13501 (loongarch_hard_regno_mode_ok_uncached): Combine UNITS_PER_FP_REG and
13502 UNITS_PER_FPREG macros.
13503 (loongarch_hard_regno_nregs): Ditto.
13504 (loongarch_class_max_nregs): Ditto.
13505 (loongarch_get_separate_components): Ditto.
13506 (loongarch_process_components): Ditto.
13507 * config/loongarch/loongarch.h (UNITS_PER_FPREG): Ditto.
13508 (UNITS_PER_HWFPVALUE): Ditto.
13509 (UNITS_PER_FPVALUE): Ditto.
13510
135112024-03-20 Chenghui Pan <panchenghui@loongson.cn>
13512
13513 * config/loongarch/lasx.md (vec_cmp<mode><mode256_i>): Remove checking
13514 of loongarch_expand_vec_cmp()'s return value.
13515 (vec_cmpu<ILASX:mode><mode256_i>): Ditto.
13516 * config/loongarch/lsx.md (vec_cmp<mode><mode_i>): Ditto.
13517 (vec_cmpu<ILSX:mode><mode_i>): Ditto.
13518 * config/loongarch/loongarch-protos.h
13519 (loongarch_expand_vec_cmp): Change loongarch_expand_vec_cmp()'s return
13520 type from bool to void.
13521 * config/loongarch/loongarch.cc (loongarch_expand_vec_cmp): Ditto.
13522
135232024-03-20 Chenghui Pan <panchenghui@loongson.cn>
13524
13525 * config/loongarch/loongarch-protos.h
13526 (loongarch_cfun_has_cprestore_slot_p): Delete.
13527 (loongarch_adjust_insn_length): Delete.
13528 (current_section_name): Delete.
13529 (loongarch_split_symbol_type): Delete.
13530 * config/loongarch/loongarch.cc
13531 (loongarch_case_values_threshold): Delete.
13532 (loongarch_spill_class): Delete.
13533 (TARGET_OPTAB_SUPPORTED_P): Delete.
13534 (TARGET_CASE_VALUES_THRESHOLD): Delete.
13535 (TARGET_SPILL_CLASS): Delete.
13536
135372024-03-20 Lewis Hyatt <lhyatt@gmail.com>
13538
13539 PR c++/111918
13540 * diagnostic-core.h (enum diagnostic_t): Add DK_ANY special flag.
13541 * diagnostic.cc (diagnostic_option_classifier::classify_diagnostic):
13542 Make use of DK_ANY to indicate a diagnostic was initially enabled.
13543 (diagnostic_context::diagnostic_enabled): Do not change the type of
13544 a diagnostic if the saved classification is type DK_ANY.
13545
135462024-03-19 Martin Jambor <mjambor@suse.cz>
13547
13548 PR ipa/108802
13549 PR ipa/114254
13550 * ipa-prop.cc (ipa_get_stmt_member_ptr_load_param): Fix case looking
13551 at COMPONENT_REFs directly from a PARM_DECL, also recognize loads from
13552 a pointer parameter.
13553 (ipa_analyze_indirect_call_uses): Also recognize loads from a pointer
13554 parameter, also recognize the case when pfn pointer is loaded in its
13555 own BB.
13556
135572024-03-19 Vladimir N. Makarov <vmakarov@redhat.com>
13558
13559 PR target/99829
13560 * lra-constraints.cc (lra_constraints): Prevent removing insn
13561 with reverse equivalence to memory if the memory was reloaded.
13562
135632024-03-19 David Malcolm <dmalcolm@redhat.com>
13564
13565 PR middle-end/114348
13566 * diagnostic-format-json.cc
13567 (json_stderr_output_format::machine_readable_stderr_p): New.
13568 (json_file_output_format::machine_readable_stderr_p): New.
13569 * diagnostic-format-sarif.cc
13570 (sarif_stream_output_format::machine_readable_stderr_p): New.
13571 (sarif_file_output_format::machine_readable_stderr_p): New.
13572 * diagnostic.cc (diagnostic_context::action_after_output): Move
13573 "fnotice" to before "finish" call, so that we still have the
13574 diagnostic_context.
13575 (fnotice): Bail out if the user requested one of the
13576 machine-readable diagnostic output formats on stderr.
13577 * diagnostic.h
13578 (diagnostic_output_format::machine_readable_stderr_p): New pure
13579 virtual function.
13580 (diagnostic_text_output_format::machine_readable_stderr_p): New.
13581 (diagnostic_context::get_output_format): New accessor.
13582
135832024-03-19 Edwin Lu <ewlu@rivosinc.com>
13584
13585 PR target/114175
13586 * config/riscv/riscv.cc (riscv_setup_incoming_varargs): Only skip
13587 riscv_funciton_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13588 if arg.type is NULL
13589
135902024-03-19 Jonathan Wakely <jwakely@redhat.com>
13591
13592 * doc/install.texi (Prerequisites): Document use of autogen for
13593 libstdc++.
13594
135952024-03-19 Richard Biener <rguenther@suse.de>
13596
13597 PR tree-optimization/114151
13598 PR tree-optimization/114269
13599 PR tree-optimization/114322
13600 PR tree-optimization/114074
13601 * tree-chrec.cc (chrec_fold_multiply): Restrict the use of
13602 unsigned arithmetic when actual overflow on constant operands
13603 is observed.
13604
136052024-03-19 Jakub Jelinek <jakub@redhat.com>
13606
13607 PR target/114175
13608 * config/arc/arc.cc (arc_setup_incoming_varargs): Only skip
13609 arc_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13610 if arg.type is NULL.
13611
136122024-03-19 Xi Ruoyao <xry111@xry111.site>
13613
13614 PR target/114175
13615 * config/loongarch/loongarch.cc
13616 (loongarch_setup_incoming_varargs): Only skip
13617 loongarch_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P
13618 functions if arg.type is NULL.
13619
136202024-03-19 Christophe Lyon <christophe.lyon@linaro.org>
13621
13622 PR target/114323
13623 * config/arm/arm-mve-builtins.cc
13624 (function_instance::reads_global_state_p): Take CP_READ_MEMORY
13625 into account.
13626
136272024-03-19 Jakub Jelinek <jakub@redhat.com>
13628
13629 PR target/114175
13630 * config/alpha/alpha.cc (alpha_setup_incoming_varargs): Only skip
13631 function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13632 if arg.type is NULL.
13633
136342024-03-19 Jakub Jelinek <jakub@redhat.com>
13635
13636 PR target/114175
13637 * config/rs6000/rs6000-call.cc (setup_incoming_varargs): Only skip
13638 rs6000_function_arg_advance_1 for TYPE_NO_NAMED_ARGS_STDARG_P functions
13639 if arg.type is NULL.
13640
136412024-03-19 Richard Biener <rguenther@suse.de>
13642
13643 PR tree-optimization/114375
13644 * tree-vect-slp.cc (vect_build_slp_tree_2): Compute the
13645 load permutation for masked loads but reject it when any
13646 such is necessary.
13647 * tree-vect-stmts.cc (vectorizable_load): Reject masked
13648 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP as those are not
13649 supported.
13650
136512024-03-19 Mary Bennett <mary.bennett@embecosm.com>
13652
13653 * common/config/riscv/riscv-common.cc: Create XCVbi extension
13654 support.
13655 * config/riscv/riscv.opt: Likewise.
13656 * config/riscv/corev.md: Implement cv_branch<mode> pattern
13657 for cv.beqimm and cv.bneimm.
13658 * config/riscv/riscv.md: Add CORE-V branch immediate to RISC-V
13659 branch instruction pattern.
13660 * config/riscv/constraints.md: Implement constraints
13661 cv_bi_s5 - signed 5-bit immediate.
13662 * config/riscv/predicates.md: Implement predicate
13663 const_int5s_operand - signed 5 bit immediate.
13664 * doc/sourcebuild.texi: Add XCVbi documentation.
13665
136662024-03-19 Chen Jiawei <jiawei@iscas.ac.cn>
13667
13668 * config/riscv/riscv-cores.def (RISCV_TUNE): New def.
13669 (RISCV_CORE): Ditto.
13670 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): New
13671 option.
13672 * config/riscv/riscv.cc: New def.
13673 * config/riscv/riscv.md: New include.
13674 * config/riscv/xiangshan.md: New file.
13675
136762024-03-18 David Malcolm <dmalcolm@redhat.com>
13677
13678 PR analyzer/110902
13679 PR analyzer/110928
13680 PR analyzer/111305
13681 PR analyzer/111441
13682 * selftest.h (ASSERT_NE_AT): New macro.
13683
136842024-03-18 Uros Bizjak <ubizjak@gmail.com>
13685
13686 PR target/111822
13687 * config/i386/i386-features.cc (smode_convert_cst): New function
13688 to handle SImode, DImode and TImode immediates, generalized from
13689 timode_convert_cst.
13690 (timode_convert_cst): Remove.
13691 (scalar_chain::convert_op): Unify from
13692 general_scalar_chain::convert_op and timode_scalar_chain::convert_op.
13693 (general_scalar_chain::convert_op): Remove.
13694 (timode_scalar_chain::convert_op): Remove.
13695 (timode_scalar_chain::convert_insn): Update the call to
13696 renamed timode_convert_cst.
13697 * config/i386/i386-features.h (class scalar_chain):
13698 Redeclare convert_op as protected class member.
13699 (class general_calar_chain): Remove convert_op.
13700 (class timode_scalar_chain): Ditto.
13701
137022024-03-18 Jan Hubicka <jh@suse.cz>
13703
13704 * config/i386/zn4zn5.md: Add file missed in the previous commit.
13705
137062024-03-18 Jan Hubicka <jh@suse.cz>
13707 Karthiban Anbazhagan <Karthiban.Anbazhagan@amd.com>
13708
13709 * common/config/i386/cpuinfo.h (get_amd_cpu): Recognize znver5.
13710 * common/config/i386/i386-common.cc (processor_names): Add znver5.
13711 (processor_alias_table): Likewise.
13712 * common/config/i386/i386-cpuinfo.h (processor_types): Add new zen
13713 family.
13714 (processor_subtypes): Add znver5.
13715 * config.gcc (x86_64-*-* |...): Likewise.
13716 * config/i386/driver-i386.cc (host_detect_local_cpu): Let
13717 march=native detect znver5 cpu's.
13718 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
13719 znver5.
13720 * config/i386/i386-options.cc (m_ZNVER5): New definition
13721 (processor_cost_table): Add znver5.
13722 * config/i386/i386.cc (ix86_reassociation_width): Likewise.
13723 * config/i386/i386.h (processor_type): Add PROCESSOR_ZNVER5
13724 (PTA_ZNVER5): New definition.
13725 * config/i386/i386.md (define_attr "cpu"): Add znver5.
13726 (Scheduling descriptions) Add znver5.md.
13727 * config/i386/x86-tune-costs.h (znver5_cost): New definition.
13728 * config/i386/x86-tune-sched.cc (ix86_issue_rate): Add znver5.
13729 (ix86_adjust_cost): Likewise.
13730 * config/i386/x86-tune.def (avx512_move_by_pieces): Add m_ZNVER5.
13731 (avx512_store_by_pieces): Add m_ZNVER5.
13732 * doc/extend.texi: Add znver5.
13733 * doc/invoke.texi: Likewise.
13734 * config/i386/znver4.md: Rename to zn4zn5.md; combine znver4 and znver5 Scheduler.
13735
137362024-03-18 Georg-Johann Lay <avr@gjlay.de>
13737
13738 * config/avr/constraints.md (CX2, CX3, CX4): New constraints.
13739 * config/avr/avr-protos.h (avr_xor_noclobber_dconst): New proto.
13740 * config/avr/avr.cc (avr_xor_noclobber_dconst): New function.
13741 * config/avr/avr.md (xorhi3, *xorhi3): Add "d,0,CX2,X" alternative.
13742 (xorpsi3, *xorpsi3): Add "d,0,CX3,X" alternative.
13743 (xorsi3, *xorsi3): Add "d,0,CX4,X" alternative.
13744
137452024-03-18 liuhongt <hongtao.liu@intel.com>
13746
13747 PR target/114334
13748 * config/i386/i386.md (mode): Add new number V8BF,V16BF,V32BF.
13749 (MODEF248): New mode iterator.
13750 (ssevecmodesuffix): Hanlde BF and HF.
13751 * config/i386/sse.md (andnot<mode>3): Extend to HF/BF.
13752 (<code><mode>3): Ditto.
13753
137542024-03-18 John David Anglin <danglin@gcc.gnu.org>
13755
13756 PR rtl-optimization/112415
13757 * config/pa/pa.cc (pa_emit_move_sequence): Revise condition
13758 for symbolic memory operands.
13759 (pa_legitimate_address_p): Revise LO_SUM condition.
13760 * config/pa/pa.h (INT14_OK_STRICT): Revise define. Move
13761 comment about GNU linker to predicates.md.
13762 * config/pa/predicates.md (floating_point_store_memory_operand):
13763 Revise condition for symbolic memory operands. Update
13764 comment.
13765
137662024-03-17 John David Anglin <danglin@gcc.gnu.org>
13767
13768 * config/pa/pa.cc (pa_delegitimize_address): Delegitimize UNSPEC_TP.
13769
137702024-03-16 Jakub Jelinek <jakub@redhat.com>
13771
13772 PR target/114175
13773 * config/i386/i386.cc (ix86_setup_incoming_varargs): Only skip
13774 ix86_function_arg_advance for TYPE_NO_NAMED_ARGS_STDARG_P functions
13775 if arg.type is NULL.
13776
137772024-03-16 Jakub Jelinek <jakub@redhat.com>
13778
13779 PR tree-optimization/114329
13780 * gimple-lower-bitint.cc (struct bitint_large_huge): Declare
13781 build_bit_field_ref method.
13782 (bitint_large_huge::build_bit_field_ref): New method.
13783 (bitint_large_huge::lower_mergeable_stmt): Use it.
13784
137852024-03-15 YunQiang Su <syq@gcc.gnu.org>
13786
13787 * config/riscv/riscv.opt.urls: Regenerated.
13788 * config/rs6000/sysv4.opt.urls: Likewise.
13789 * config/xtensa/xtensa.opt.urls: Likewise.
13790
137912024-03-15 Jakub Jelinek <jakub@redhat.com>
13792
13793 * lower-subreg.cc (resolve_simple_move): Fix comment typo,
13794 betwee -> between.
13795 * edit-context.cc (class line_event): Fix comment typo,
13796 betweeen -> between.
13797
137982024-03-15 Jakub Jelinek <jakub@redhat.com>
13799
13800 PR target/114339
13801 * config/i386/i386-expand.cc (ix86_expand_int_sse_cmp) <case LE>: Fix
13802 a pasto, compare code against LE rather than GE.
13803
138042024-03-15 Joe Ramsay <Joe.Ramsay@arm.com>
13805
13806 * match.pd: Fix truncation pattern for -fno-signed-zeroes
13807
138082024-03-15 Jakub Jelinek <jakub@redhat.com>
13809
13810 PR middle-end/114332
13811 * expr.cc (expand_expr_real_1): EXTEND_BITINT also CALL_EXPR results.
13812
138132024-03-15 Jakub Jelinek <jakub@redhat.com>
13814
13815 PR tree-optimization/113466
13816 * gimple-lower-bitint.cc (bitint_large_huge): Add m_returns_twice_calls
13817 member.
13818 (bitint_large_huge::bitint_large_huge): Initialize it.
13819 (bitint_large_huge::~bitint_large_huge): Release it.
13820 (bitint_large_huge::lower_call): Remember ECF_RETURNS_TWICE call stmts
13821 before which at least one statement has been inserted.
13822 (gimple_lower_bitint): Move argument loads before ECF_RETURNS_TWICE
13823 calls to a different block and add corresponding PHIs.
13824
138252024-03-15 YunQiang Su <syq@gcc.gnu.org>
13826
13827 * config/mips/mips.opt: Support -mstrict-align, and use
13828 TARGET_STRICT_ALIGN as the flag; keep -m(no-)unaligned-access
13829 as alias.
13830 * config/mips/mips.h: Use TARGET_STRICT_ALIGN.
13831 * config/mips/mips.opt.urls: Regenerate.
13832 * doc/invoke.texi: Document -m(no-)strict-algin for MIPSr6.
13833
138342024-03-15 Tejas Belagod <tejas.belagod@arm.com>
13835
13836 PR middle-end/114108
13837 * tree-vect-patterns.cc (vect_recog_abd_pattern): Call
13838 vect_convert_output with the correct vecitype.
13839
138402024-03-15 Chenghui Pan <panchenghui@loongson.cn>
13841
13842 * config/loongarch/lasx.md (lasx_xvpermi_q_<LASX:mode>):
13843 Remove masking of operand 3.
13844
138452024-03-14 Jason Merrill <jason@redhat.com>
13846
13847 * tree-core.h (enum clobber_kind): Clarify CLOBBER_OBJECT_*
13848 comments.
13849
138502024-03-14 John David Anglin <danglin@gcc.gnu.org>
13851
13852 PR target/114288
13853 * config/pa/pa.cc (pa_legitimate_address_p): Don't allow
13854 14-bit displacements before reload for modes that may use
13855 a floating-point load or store.
13856
138572024-03-14 David Faust <david.faust@oracle.com>
13858
13859 * config/bpf/bpf.h (INT8_TYPE): Change to signed char.
13860
138612024-03-14 Max Filippov <jcmvbkbc@gmail.com>
13862
13863 * config/xtensa/xtensa.md (movsi_internal): Move l32i and s32i
13864 patterns ahead of the l32i.n and s32i.n.
13865
138662024-03-14 Jakub Jelinek <jakub@redhat.com>
13867
13868 * config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): Fix comment typo.
13869
138702024-03-14 Jakub Jelinek <jakub@redhat.com>
13871
13872 PR middle-end/113907
13873 * ipa-icf.cc (sem_item_optimizer::merge_classes): Reset
13874 SSA_NAME_RANGE_INFO and SSA_NAME_PTR_INFO on successfully ICF merged
13875 functions.
13876
138772024-03-14 Xi Ruoyao <xry111@xry111.site>
13878
13879 * config/loongarch/loongarch.md (any_ge): Remove.
13880 (sge<u>_<X:mode><GPR:mode>): Remove.
13881
138822024-03-14 Jakub Jelinek <jakub@redhat.com>
13883
13884 PR target/114310
13885 * config/aarch64/aarch64.cc (aarch64_expand_compare_and_swap): For
13886 TImode force newval into a register.
13887
138882024-03-14 Chung-Lin Tang <cltang@baylibre.com>
13889
13890 * tree.h (OMP_CLAUSE_MAP_READONLY): New macro.
13891 (OMP_CLAUSE__CACHE__READONLY): New macro.
13892 * tree-core.h (struct GTY(()) tree_base): Adjust comments for new
13893 uses of readonly_flag bit in OMP_CLAUSE_MAP_READONLY and
13894 OMP_CLAUSE__CACHE__READONLY.
13895 * tree-pretty-print.cc (dump_omp_clause): Add support for printing
13896 OMP_CLAUSE_MAP_READONLY and OMP_CLAUSE__CACHE__READONLY.
13897
138982024-03-14 Andreas Krebbel <krebbel@linux.ibm.com>
13899
13900 * config/s390/s390.cc (s390_encode_section_info): Adjust the check
13901 for misaligned symbols.
13902 * config/s390/s390.opt: Improve documentation.
13903
139042024-03-14 Jakub Jelinek <jakub@redhat.com>
13905
13906 * gimple-iterator.cc (edge_before_returns_twice_call): Copy all
13907 flags and probability from ad_edge to e edge. If CDI_DOMINATORS
13908 are computed, recompute immediate dominator of other_edge->src
13909 and other_edge->dest.
13910 (gsi_safe_insert_before, gsi_safe_insert_seq_before): Update *iter
13911 for the returns_twice call case to the gsi_for_stmt (stmt) to deal
13912 with update it for bb splitting.
13913
139142024-03-14 liuhongt <hongtao.liu@intel.com>
13915
13916 * config/i386/i386-features.cc
13917 (general_scalar_chain::convert_op): Handle REG_EH_REGION note.
13918 (convert_scalars_to_vector): Ditto.
13919 * config/i386/i386-features.h (class scalar_chain): New
13920 memeber control_flow_insns.
13921
139222024-03-13 Jakub Jelinek <jakub@redhat.com>
13923
13924 PR middle-end/114319
13925 * gimple-ssa-store-merging.cc
13926 (imm_store_chain_info::try_coalesce_bswap): For 32-bit targets
13927 allow matching __builtin_bswap64 if there is bswapsi2 optab.
13928
139292024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13930
13931 * config/s390/s390.cc (s390_secondary_reload): Guard
13932 SYMBOL_FLAG_NOTALIGN2_P.
13933
139342024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13935
13936 * config/s390/s390-builtin-types.def: Update to reflect latest
13937 changes.
13938 * config/s390/s390-builtins.def: Streamline vector builtins with
13939 LLVM.
13940
139412024-03-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
13942
13943 * config/s390/s390-builtins.def (vec_permi): Deprecate.
13944 (vec_ctd): Deprecate.
13945 (vec_ctd_s64): Deprecate.
13946 (vec_ctd_u64): Deprecate.
13947 (vec_ctsl): Deprecate.
13948 (vec_ctul): Deprecate.
13949 (vec_ld2f): Deprecate.
13950 (vec_st2f): Deprecate.
13951 (vec_insert): Deprecate overloads with bool vectors.
13952
139532024-03-13 Jakub Jelinek <jakub@redhat.com>
13954
13955 PR middle-end/114313
13956 * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use
13957 TYPE_SIZE of TREE_TYPE (var) rather than TYPE_SIZE of type.
13958 (bitint_large_huge::handle_load): Pass NULL_TREE rather than
13959 rhs_type to limb_access for the bitfield load cases.
13960 (bitint_large_huge::lower_mergeable_stmt): Pass NULL_TREE rather than
13961 lhs_type to limb_access if nlhs is non-NULL.
13962
139632024-03-13 Jakub Jelinek <jakub@redhat.com>
13964
13965 PR sanitizer/112709
13966 * asan.cc (maybe_create_ssa_name, maybe_cast_to_ptrmode,
13967 build_check_stmt, maybe_instrument_call, asan_expand_mark_ifn): Use
13968 gsi_safe_insert_before instead of gsi_insert_before.
13969
139702024-03-13 Jakub Jelinek <jakub@redhat.com>
13971
13972 PR sanitizer/112709
13973 * gimple-iterator.h (gsi_safe_insert_before,
13974 gsi_safe_insert_seq_before): Declare.
13975 * gimple-iterator.cc: Include gimplify.h.
13976 (edge_before_returns_twice_call, adjust_before_returns_twice_call,
13977 gsi_safe_insert_before, gsi_safe_insert_seq_before): New functions.
13978 * ubsan.cc (instrument_mem_ref, instrument_pointer_overflow,
13979 instrument_nonnull_arg, instrument_nonnull_return): Use
13980 gsi_safe_insert_before instead of gsi_insert_before.
13981 (maybe_instrument_pointer_overflow): Use force_gimple_operand,
13982 gimple_seq_add_seq_without_update and gsi_safe_insert_seq_before
13983 instead of force_gimple_operand_gsi.
13984 (instrument_object_size): Likewise. Use gsi_safe_insert_before
13985 instead of gsi_insert_before.
13986
139872024-03-12 Richard Biener <rguenther@suse.de>
13988
13989 PR tree-optimization/114121
13990 * tree-chrec.cc (chrec_fold_plus_1): Guard recursion with
13991 converted operand properly.
13992 (chrec_fold_multiply): Likewise. Handle missed recursion.
13993
139942024-03-12 Jakub Jelinek <jakub@redhat.com>
13995
13996 PR sanitizer/112709
13997 * asan.cc (has_stmt_been_instrumented_p): Don't instrument call
13998 stores on the caller side unless it is a call to a builtin or
13999 internal function or function doesn't return by hidden reference.
14000 (maybe_instrument_call): Likewise.
14001 (instrument_derefs): Instrument stores to RESULT_DECL if
14002 returning by hidden reference.
14003
140042024-03-12 Jakub Jelinek <jakub@redhat.com>
14005
14006 PR tree-optimization/114293
14007 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_strlen): If
14008 max is smaller than min, set max to ~(size_t)0.
14009
140102024-03-12 Pan Li <pan2.li@intel.com>
14011
14012 * config/riscv/riscv-c.cc (riscv_ext_version_value): Fix
14013 code style greater than 80 chars.
14014 (riscv_cpu_cpp_builtins): Fix useless empty line, indent
14015 with 3 space(s) and argument unalignment.
14016
140172024-03-12 Richard Biener <rguenther@suse.de>
14018
14019 PR tree-optimization/114297
14020 * tree-vect-loop.cc (vectorizable_live_operation): Pass in the
14021 live stmts SLP node to vect_create_epilog_for_reduction.
14022
140232024-03-12 Andrew Pinski <quic_apinski@quicinc.com>
14024
14025 PR driver/114314
14026 * common.opt (fmultiflags): Add RejectNegative.
14027
140282024-03-11 Szabolcs Nagy <szabolcs.nagy@arm.com>
14029
14030 * config/aarch64/aarch64.md: Rename aarch_ to aarch64_.
14031 * config/aarch64/aarch64.opt: Likewise.
14032 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
14033 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Likewise.
14034 (aarch64_expand_epilogue): Likewise.
14035 (aarch64_post_cfi_startproc): Likewise.
14036 (aarch64_handle_no_branch_protection): Copy and rename.
14037 (aarch64_handle_standard_branch_protection): Likewise.
14038 (aarch64_handle_pac_ret_protection): Likewise.
14039 (aarch64_handle_pac_ret_leaf): Likewise.
14040 (aarch64_handle_pac_ret_b_key): Likewise.
14041 (aarch64_handle_bti_protection): Likewise.
14042 (aarch64_override_options): Update branch protection validation.
14043 (aarch64_handle_attr_branch_protection): Likewise.
14044 * config/arm/aarch-common-protos.h (aarch_validate_mbranch_protection):
14045 Pass branch protection type description as argument.
14046 (struct aarch_branch_protect_type): Move from aarch-common.h.
14047 * config/arm/aarch-common.cc (aarch_handle_no_branch_protection):
14048 Remove.
14049 (aarch_handle_standard_branch_protection): Remove.
14050 (aarch_handle_pac_ret_protection): Remove.
14051 (aarch_handle_pac_ret_leaf): Remove.
14052 (aarch_handle_pac_ret_b_key): Remove.
14053 (aarch_handle_bti_protection): Remove.
14054 (aarch_validate_mbranch_protection): Pass branch protection type
14055 description as argument.
14056 * config/arm/aarch-common.h (enum aarch_key_type): Remove.
14057 (struct aarch_branch_protect_type): Remove.
14058 * config/arm/arm-c.cc (arm_cpu_builtins): Remove aarch_ra_sign_key.
14059 * config/arm/arm.cc (arm_handle_no_branch_protection): Copy and rename.
14060 (arm_handle_standard_branch_protection): Likewise.
14061 (arm_handle_pac_ret_protection): Likewise.
14062 (arm_handle_pac_ret_leaf): Likewise.
14063 (arm_handle_bti_protection): Likewise.
14064 (arm_configure_build_target): Update branch protection validation.
14065 * config/arm/arm.opt: Remove aarch_ra_sign_key.
14066
140672024-03-11 Richard Biener <rguenther@suse.de>
14068
14069 PR middle-end/114299
14070 * gimplify.cc (internal_get_tmp_var): When gimplification
14071 of VAL failed, return a decl.
14072
140732024-03-11 Jakub Jelinek <jakub@redhat.com>
14074
14075 PR tree-optimization/114278
14076 * tree-ssa.cc (maybe_optimize_var): If large/huge _BitInt vars are no
14077 longer addressable, set DECL_NOT_GIMPLE_REG_P on them.
14078
140792024-03-11 Eric Botcazou <ebotcazou@adacore.com>
14080
14081 PR debug/113519
14082 PR debug/113777
14083 * dwarf2out.cc (gen_enumeration_type_die): In the reverse case,
14084 generate the DIE with the same parent as in the regular case.
14085
140862024-03-11 Andrew Pinski <quic_apinski@quicinc.com>
14087
14088 PR middle-end/95351
14089 * fold-const.cc (merge_truthop_with_opposite_arm): Use
14090 the type of the operands of the comparison and not the type
14091 of the comparison.
14092
140932024-03-10 jlaw <jeffreyalaw@gmail.com>
14094
14095 PR tree-optimization/110199
14096 * tree-ssa-scopedtables.cc
14097 (avail_exprs_stack::simplify_binary_operation): Generalize handling
14098 of MIN_EXPR/MAX_EXPR to allow additional simplifications. Canonicalize
14099 comparison operands for other cases.
14100
141012024-03-10 Pan Li <pan2.li@intel.com>
14102
14103 * tree-vect-stmts.cc (vectorizable_store): Enable the assert
14104 during transform process.
14105 (vectorizable_load): Ditto.
14106
141072024-03-10 jlaw <jeffreyalaw@gmail.com>
14108
14109 PR target/102250
14110 * doc/install.texi: Document need for python when building
14111 RISC-V compilers.
14112
141132024-03-10 jlaw <jeffreyalaw@gmail.com>
14114
14115 PR target/111362
14116 * mode-switching.cc (optimize_mode_switching): Only process
14117 NONDEBUG insns.
14118
141192024-03-09 Georg-Johann Lay <avr@gjlay.de>
14120
14121 * config/avr/avr.md: Fix typos in comment, indentation glitches
14122 and some other nits.
14123
141242024-03-09 Jakub Jelinek <jakub@redhat.com>
14125
14126 PR target/114284
14127 * fwprop.cc (try_fwprop_subst_pattern): Don't propagate
14128 src containing MEMs unless prop.likely_profitable_p ().
14129
141302024-03-09 Xi Ruoyao <xry111@xry111.site>
14131
14132 * config/loongarch/loongarch.cc (loongarch_print_operand_reloc):
14133 Support 'Q' for R_LARCH_RELAX for TLS IE.
14134 (loongarch_output_move): Use 'Q' to print R_LARCH_RELAX for TLS
14135 IE.
14136 * config/loongarch/loongarch.md (ld_from_got<mode>): Likewise.
14137
141382024-03-09 Georg-Johann Lay <avr@gjlay.de>
14139
14140 * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Determine cost for
14141 usum_widenqihi and add_zero_extend1.
14142 [MINUS]: Determine costs for udiff_widenqihi, sub+zero_extend,
14143 sub+sign_extend.
14144 * config/avr/avr.md (*addhi3.sign_extend1, *subhi3.sign_extend2):
14145 Compute exact insn lengths.
14146 (*usum_widenqihi3): Allow input operands to commute.
14147
141482024-03-09 Jakub Jelinek <jakub@redhat.com>
14149
14150 * config/i386/i386.opt.urls: Regenerate.
14151
141522024-03-09 Lulu Cheng <chenglulu@loongson.cn>
14153
14154 * config/loongarch/sync.md (atomic_cas_value_strong<mode>):
14155 In loongarch64, a sign extension operation is added when
14156 operands[2] is a register operand and the mode is SImode.
14157
141582024-03-08 Martin Jambor <mjambor@suse.cz>
14159
14160 PR ipa/113757
14161 * tree-inline.cc (redirect_all_calls): Remove code adding SSAs to
14162 id->killed_new_ssa_names.
14163
141642024-03-08 Vladimir N. Makarov <vmakarov@redhat.com>
14165
14166 PR target/113790
14167 * lra-assigns.cc (assign_by_spills): Set up all_spilled_pseudos
14168 for non-reload pseudo too.
14169
141702024-03-08 David Faust <david.faust@oracle.com>
14171
14172 * config/bpf/bpf.cc (bpf_expand_cpymem, bpf_expand_setmem): Do
14173 not attempt inline expansion if size is above threshold.
14174 * config/bpf/bpf.opt (-minline-memops-threshold): New option.
14175 * doc/invoke.texi (eBPF Options) <-minline-memops-threshold>:
14176 Document.
14177
141782024-03-08 Richard Biener <rguenther@suse.de>
14179
14180 PR tree-optimization/114269
14181 PR tree-optimization/114074
14182 * tree-chrec.cc (chrec_fold_plus_1): Handle sign-conversions
14183 in the third CASE_CONVERT case as well.
14184 (chrec_fold_multiply): Handle sign-conversions from unsigned
14185 by performing the operation in the unsigned type.
14186
141872024-03-08 Georg-Johann Lay <avr@gjlay.de>
14188
14189 * config/avr/avr.md (*addhi3_zero_extend.ashift1): New pattern.
14190 * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Compute its cost.
14191
141922024-03-08 Jakub Jelinek <jakub@redhat.com>
14193
14194 * bb-reorder.cc (fix_up_fall_thru_edges): Fix up checking assert,
14195 asm_noperands < 0 means it is not asm goto too.
14196
141972024-03-08 Jakub Jelinek <jakub@redhat.com>
14198
14199 PR target/38534
14200 * config/i386/i386.opt (mnoreturn-no-callee-saved-registers): New
14201 option.
14202 * config/i386/i386-options.cc (ix86_set_func_type): Don't use
14203 TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP unless
14204 ix86_noreturn_no_callee_saved_registers is enabled.
14205 * doc/invoke.texi (-mnoreturn-no-callee-saved-registers): Document.
14206
142072024-03-08 Jakub Jelinek <jakub@redhat.com>
14208
14209 PR debug/113918
14210 * dwarf2out.cc (gen_field_die): Emit DW_AT_export_symbols
14211 on anonymous unions or structs for -gdwarf-5 or -gno-strict-dwarf.
14212
142132024-03-08 demin.han <demin.han@starfivetech.com>
14214
14215 PR target/114264
14216 * config/riscv/riscv-vector-costs.cc: Fix ICE
14217
142182024-03-08 Haochen Gui <guihaoc@gcc.gnu.org>
14219
14220 * fwprop.cc (forward_propagate_into): Return false for volatile set
14221 source rtx.
14222
142232024-03-07 Wilco Dijkstra <wilco.dijkstra@arm.com>
14224
14225 PR target/113618
14226 * config/aarch64/aarch64.cc (aarch64_copy_one_block): Remove.
14227 (aarch64_expand_cpymem): Emit single load/store only.
14228 (aarch64_set_one_block): Emit single stores only.
14229
142302024-03-07 Robin Dapp <rdapp@ventanamicro.com>
14231
14232 PR middle-end/114196
14233 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Merge
14234 vectorization guards.
14235
142362024-03-07 Jonathan Wakely <jwakely@redhat.com>
14237
14238 * doc/cppopts.texi: Remove incorrect claim about -dD not
14239 outputting predefined macros.
14240
142412024-03-07 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
14242
14243 PR target/113950
14244 * config/rs6000/vsx.md (vsx_splat_<mode>): Correct assignment to operand1
14245 and simplify else if with else.
14246
142472024-03-07 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
14248
14249 * system.h: Include safe-ctype.h after C++ standard headers.
14250
142512024-03-07 Jakub Jelinek <jakub@redhat.com>
14252
14253 PR rtl-optimization/110079
14254 * bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust
14255 asm goto.
14256
142572024-03-07 Jakub Jelinek <jakub@redhat.com>
14258
14259 PR middle-end/105533
14260 * expmed.cc (choose_mult_variant): Only try the val - 1 variant
14261 if val is not HOST_WIDE_INT_MIN or if mode has exactly
14262 HOST_BITS_PER_WIDE_INT precision. Avoid triggering UB while computing
14263 val - 1.
14264
142652024-03-07 Jakub Jelinek <jakub@redhat.com>
14266
14267 PR middle-end/105533
14268 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference) <case ARRAY_REF>:
14269 Multiple op->off by BITS_PER_UNIT instead of shifting it left by
14270 LOG2_BITS_PER_UNIT.
14271
142722024-03-07 Yang Yujie <yangyujie@loongson.cn>
14273
14274 * config.gcc: Add a case for loongarch*-*-linux-musl*.
14275 * config/loongarch/linux.h: Disable the multilib-compatible
14276 treatment for *musl* targets.
14277 * config/loongarch/musl.h: New file.
14278
142792024-03-07 Jakub Jelinek <jakub@redhat.com>
14280
14281 PR tree-optimization/114009
14282 * genmatch.cc (decision_tree::gen): Emit ARG_UNUSED for captures
14283 argument even for GENERIC, not just for GIMPLE.
14284 * match.pd (a * !a -> 0): New simplifications.
14285
142862024-03-07 demin.han <demin.han@starfivetech.com>
14287
14288 * config/riscv/riscv-protos.h (expand_vec_cmp): Change proto
14289 * config/riscv/riscv-v.cc (expand_vec_cmp): Use default arguments
14290 (expand_vec_cmp_float): Adapt arguments
14291
142922024-03-06 Uros Bizjak <ubizjak@gmail.com>
14293
14294 PR target/114232
14295 * config/i386/mmx.md (negv2qi2): Enable for optimize_size instead
14296 of optimize_function_for_size_p. Explictily enable for TARGET_SSE2.
14297 (negv2qi SSE reg splitter): Enable for TARGET_SSE2 only.
14298 (<plusminus:insn>v2qi3): Enable for optimize_size instead
14299 of optimize_function_for_size_p. Explictily enable for TARGET_SSE2.
14300 (<plusminus:insn>v2qi SSE reg splitter): Enable for TARGET_SSE2 only.
14301 (<any_shift:insn>v2qi3): Enable for optimize_size instead
14302 of optimize_function_for_size_p.
14303
143042024-03-06 Robin Dapp <rdapp@ventanamicro.com>
14305
14306 PR target/114200
14307 PR target/114202
14308 * config/riscv/vector.md: Use vmv[1248]r.v instead of vmv.v.v.
14309
143102024-03-06 Robin Dapp <rdapp@ventanamicro.com>
14311
14312 * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Move...
14313 (costs::adjust_stmt_cost): ... to here and add vec_load/vec_store
14314 offset handling.
14315 (costs::add_stmt_cost): Also adjust cost for statements without
14316 stmt_info.
14317 * config/riscv/riscv-vector-costs.h: Define zero constant.
14318
143192024-03-06 Wilco Dijkstra <wilco.dijkstra@arm.com>
14320
14321 PR target/113915
14322 * config/arm/arm.md (NOCOND): Improve comment.
14323 (arm_rev*) Add predicable.
14324 * config/arm/arm.cc (arm_final_prescan_insn): Add check for
14325 PREDICABLE_YES.
14326
143272024-03-06 Jeff Law <jlaw@ventanamicro.com>
14328
14329 PR target/113001
14330 PR target/112871
14331 * config/riscv/riscv.cc (expand_conditional_move): Do not swap
14332 operands when the comparison operand is the same as the false
14333 arm for a NE test.
14334
143352024-03-06 Uros Bizjak <ubizjak@gmail.com>
14336
14337 * config/i386/i386-expand.cc (ix86_expand_move) [TARGET_MACHO]:
14338 Eliminate common code and use generic code instead.
14339
143402024-03-06 Georg-Johann Lay <avr@gjlay.de>
14341
14342 * config/avr/avr.cc (avr_rtx_costs_1) [PLUS+ZERO_EXTEND]: Adjust
14343 rtx cost.
14344
143452024-03-06 Richard Biener <rguenther@suse.de>
14346
14347 PR tree-optimization/114239
14348 * tree-vect-loop.cc (vect_get_vect_def): Remove.
14349 (vect_create_epilog_for_reduction): The passed in stmt_info
14350 should now be the live stmt that produces the scalar reduction
14351 result. Revert PR114192 fix. Base reduction info off
14352 info_for_reduction. Remove special handling of
14353 early-break/peeled, restore original vector def gathering.
14354 Make sure to pick the correct exit PHIs.
14355 (vectorizable_live_operation): Pass in the proper stmt_info
14356 for early break exits.
14357
143582024-03-06 Richard Sandiford <richard.sandiford@arm.com>
14359
14360 * config/aarch64/aarch64-feature-deps.h (feature_deps::info): Add
14361 out-of-class definitions of static constants.
14362
143632024-03-06 Richard Biener <rguenther@suse.de>
14364
14365 PR tree-optimization/114249
14366 * tree-vect-slp.cc (vect_build_slp_instance): Move making
14367 a BB reduction lane number even ...
14368 (vect_slp_check_for_roots): ... here to avoid leaking
14369 pattern defs.
14370
143712024-03-06 Richard Biener <rguenther@suse.de>
14372
14373 PR tree-optimization/114246
14374 * tree-ssa-dse.cc (increment_start_addr): Strip useless
14375 type conversions from the adjusted address.
14376
143772024-03-06 Jakub Jelinek <jakub@redhat.com>
14378
14379 PR rtl-optimization/114190
14380 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
14381 Call df_remove_problem for df_note before calling df_analyze.
14382
143832024-03-05 Cupertino Miranda <cupertino.miranda@oracle.com>
14384 Indu Bhagat <indu.bhagat@oracle.com>
14385
14386 PR debug/114186
14387 * dwarf2ctf.cc (gen_ctf_array_type): Invoke the ctf_add_array ()
14388 in the correct order of the dimensions.
14389 (gen_ctf_subrange_type): Refactor out handling of
14390 DW_TAG_subrange_type DIE to here.
14391
143922024-03-05 Richard Sandiford <richard.sandiford@arm.com>
14393
14394 PR sanitizer/97696
14395 * asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int.
14396
143972024-03-05 Richard Sandiford <richard.sandiford@arm.com>
14398
14399 * config/aarch64/aarch64.md (stride_type): Remove luti_consecutive
14400 and luti_strided.
14401 * config/aarch64/aarch64-sme.md
14402 (@aarch64_sme_lut<LUTI_BITS><mode>): Remove stride_type attribute.
14403 (@aarch64_sme_lut<LUTI_BITS><mode>_strided2): Delete.
14404 (@aarch64_sme_lut<LUTI_BITS><mode>_strided4): Likewise.
14405 * config/aarch64/aarch64-early-ra.cc (is_stride_candidate)
14406 (early_ra::maybe_convert_to_strided_access): Remove support for
14407 strided LUTI2 and LUTI4.
14408
144092024-03-05 Richard Earnshaw <rearnsha@arm.com>
14410
14411 PR target/113510
14412 * config/arm/thumb1.md (peephole2 to fuse mov imm/add SP): Use
14413 low_register_operand.
14414
144152024-03-05 Georg-Johann Lay <avr@gjlay.de>
14416
14417 * config/avr/avr.md: Add two RTL peepholes for PLUS, IOR and AND
14418 in HI, PSI, SI that swap operation order from "X = CST, X o= Y"
14419 to "X = Y, X o= CST".
14420
144212024-03-05 Xi Ruoyao <xry111@xry111.site>
14422
14423 * config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add
14424 s9 as an alias of r22.
14425
144262024-03-05 Roger Sayle <roger@nextmovesoftware.com>
14427
14428 * config/avr/avr-protos.h (avr_out_insv): New proto.
14429 * config/avr/avr.cc (avr_out_insv): New function.
14430 (avr_adjust_insn_length) [ADJUST_LEN_INSV]: Handle case.
14431 (avr_cbranch_cost) [ZERO_EXTRACT]: Adjust rtx costs.
14432 * config/avr/avr.md (define_attr "adjust_len") Add insv.
14433 (andhi3, *andhi3, andpsi3, *andpsi3, andsi3, *andsi3):
14434 Add constraint alternative where the 3rd operand is a power
14435 of 2, and the source register may differ from the destination.
14436 (*insv.any_shift.<mode>_split): Call avr_out_insv to output
14437 instructions. Set attr "length" to "insv".
14438 * config/avr/constraints.md (Cb2, Cb3, Cb4): New constraints.
14439
144402024-03-05 Richard Biener <rguenther@suse.de>
14441
14442 PR tree-optimization/114231
14443 * tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when
14444 processing a BB SLP root.
14445
144462024-03-05 Jakub Jelinek <jakub@redhat.com>
14447
14448 PR rtl-optimization/114211
14449 * lower-subreg.cc (resolve_simple_move): For double-word
14450 rotates by BITS_PER_WORD if there is overlap between source
14451 and destination use a temporary.
14452
144532024-03-05 Jakub Jelinek <jakub@redhat.com>
14454
14455 PR middle-end/114157
14456 * gimple-lower-bitint.cc: Include stor-layout.h.
14457 (mergeable_op): Return true for BIT_FIELD_REF.
14458 (struct bitint_large_huge): Declare handle_bit_field_ref method.
14459 (bitint_large_huge::handle_bit_field_ref): New method.
14460 (bitint_large_huge::handle_stmt): Use it for BIT_FIELD_REF.
14461
144622024-03-05 Jakub Jelinek <jakub@redhat.com>
14463
14464 PR target/114116
14465 * config/i386/i386.h (enum call_saved_registers_type): Add
14466 TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP enumerator.
14467 * config/i386/i386-options.cc (ix86_set_func_type): Remove
14468 has_no_callee_saved_registers variable, add no_callee_saved_registers
14469 instead, initialize it depending on whether it is
14470 no_callee_saved_registers function or not. Don't set it if
14471 no_caller_saved_registers attribute is present. Adjust users.
14472 * config/i386/i386.cc (ix86_function_ok_for_sibcall): Handle
14473 TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP like
14474 TYPE_NO_CALLEE_SAVED_REGISTERS.
14475 (ix86_save_reg): Handle TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP.
14476
144772024-03-05 Pan Li <pan2.li@intel.com>
14478
14479 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): Cleanup unused
14480 mode_size related code.
14481
144822024-03-05 Patrick Palka <ppalka@redhat.com>
14483
14484 * doc/invoke.texi (-Wno-global-module): Document.
14485
144862024-03-04 David Faust <david.faust@oracle.com>
14487
14488 * config/bpf/bpf-protos.h (bpf_expand_setmem): New prototype.
14489 * config/bpf/bpf.cc (bpf_expand_setmem): New.
14490 * config/bpf/bpf.md (setmemdi): New define_expand.
14491
144922024-03-04 Jakub Jelinek <jakub@redhat.com>
14493
14494 PR rtl-optimization/113010
14495 * combine.cc (simplify_comparison): Guard the
14496 WORD_REGISTER_OPERATIONS check on scalar_int_mode of SUBREG_REG
14497 and initialize inner_mode.
14498
144992024-03-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
14500
14501 * config/arm/iterators.md (supf): Remove VMLALDAVXQ_U, VMLALDAVXQ_P_U,
14502 VMLALDAVAXQ_U cases.
14503 (VMLALDAVXQ): Remove iterator.
14504 (VMLALDAVXQ_P): Likewise.
14505 (VMLALDAVAXQ): Likewise.
14506 * config/arm/mve.md (mve_vstrwq_p_fv4sf): Replace use of <MVE_VPRED>
14507 mode iterator attribute with V4BI mode.
14508 * config/arm/unspecs.md (VMLALDAVXQ_U, VMLALDAVXQ_P_U,
14509 VMLALDAVAXQ_U): Remove unused unspecs.
14510
145112024-03-04 Andre Vieira <andre.simoesdiasvieira@arm.com>
14512
14513 * config/arm/arm.md (mve_safe_imp_xlane_pred): New attribute.
14514 * config/arm/iterators.md (mve_vmaxmin_safe_imp): New iterator
14515 attribute.
14516 * config/arm/mve.md (vaddvq_s, vaddvq_u, vaddlvq_s, vaddlvq_u,
14517 vaddvaq_s, vaddvaq_u, vmaxavq_s, vmaxvq_u, vmladavq_s, vmladavq_u,
14518 vmladavxq_s, vmlsdavq_s, vmlsdavxq_s, vaddlvaq_s, vaddlvaq_u,
14519 vmlaldavq_u, vmlaldavq_s, vmlaldavq_u, vmlaldavxq_s, vmlsldavq_s,
14520 vmlsldavxq_s, vrmlaldavhq_u, vrmlaldavhq_s, vrmlaldavhxq_s,
14521 vrmlsldavhq_s, vrmlsldavhxq_s, vrmlaldavhaq_s, vrmlaldavhaq_u,
14522 vrmlaldavhaxq_s, vrmlsldavhaq_s, vrmlsldavhaxq_s, vabavq_s, vabavq_u,
14523 vmladavaq_u, vmladavaq_s, vmladavaxq_s, vmlsdavaq_s, vmlsdavaxq_s,
14524 vmlaldavaq_s, vmlaldavaq_u, vmlaldavaxq_s, vmlsldavaq_s,
14525 vmlsldavaxq_s): Added mve_safe_imp_xlane_pred.
14526
145272024-03-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
14528
14529 * config/arm/arm.md (mve_unpredicated_insn): New attribute.
14530 * config/arm/arm.h (MVE_VPT_PREDICATED_INSN_P): New define.
14531 (MVE_VPT_UNPREDICATED_INSN_P): Likewise.
14532 (MVE_VPT_PREDICABLE_INSN_P): Likewise.
14533 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Add attribute.
14534 * config/arm/mve.md (arm_vcx1q<a>_p_v16qi): Add attribute.
14535 (arm_vcx1q<a>v16qi): Likewise.
14536 (arm_vcx1qav16qi): Likewise.
14537 (arm_vcx1qv16qi): Likewise.
14538 (arm_vcx2q<a>_p_v16qi): Likewise.
14539 (arm_vcx2q<a>v16qi): Likewise.
14540 (arm_vcx2qav16qi): Likewise.
14541 (arm_vcx2qv16qi): Likewise.
14542 (arm_vcx3q<a>_p_v16qi): Likewise.
14543 (arm_vcx3q<a>v16qi): Likewise.
14544 (arm_vcx3qav16qi): Likewise.
14545 (arm_vcx3qv16qi): Likewise.
14546 (@mve_<mve_insn>q_<supf><mode>): Likewise.
14547 (@mve_<mve_insn>q_int_<supf><mode>): Likewise.
14548 (@mve_<mve_insn>q_<supf>v4si): Likewise.
14549 (@mve_<mve_insn>q_n_<supf><mode>): Likewise.
14550 (@mve_<mve_insn>q_r_<supf><mode>): Likewise.
14551 (@mve_<mve_insn>q_f<mode>): Likewise.
14552 (@mve_<mve_insn>q_m_<supf><mode>): Likewise.
14553 (@mve_<mve_insn>q_m_n_<supf><mode>): Likewise.
14554 (@mve_<mve_insn>q_m_r_<supf><mode>): Likewise.
14555 (@mve_<mve_insn>q_m_f<mode>): Likewise.
14556 (@mve_<mve_insn>q_int_m_<supf><mode>): Likewise.
14557 (@mve_<mve_insn>q_p_<supf>v4si): Likewise.
14558 (@mve_<mve_insn>q_p_<supf><mode>): Likewise.
14559 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): Likewise.
14560 (@mve_<mve_insn>q<mve_rot>_f<mode>): Likewise.
14561 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): Likewise.
14562 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): Likewise.
14563 (mve_v<absneg_str>q_f<mode>): Likewise.
14564 (mve_<mve_addsubmul>q<mode>): Likewise.
14565 (mve_<mve_addsubmul>q_f<mode>): Likewise.
14566 (mve_vadciq_<supf>v4si): Likewise.
14567 (mve_vadciq_m_<supf>v4si): Likewise.
14568 (mve_vadcq_<supf>v4si): Likewise.
14569 (mve_vadcq_m_<supf>v4si): Likewise.
14570 (mve_vandq_<supf><mode>): Likewise.
14571 (mve_vandq_f<mode>): Likewise.
14572 (mve_vandq_m_<supf><mode>): Likewise.
14573 (mve_vandq_m_f<mode>): Likewise.
14574 (mve_vandq_s<mode>): Likewise.
14575 (mve_vandq_u<mode>): Likewise.
14576 (mve_vbicq_<supf><mode>): Likewise.
14577 (mve_vbicq_f<mode>): Likewise.
14578 (mve_vbicq_m_<supf><mode>): Likewise.
14579 (mve_vbicq_m_f<mode>): Likewise.
14580 (mve_vbicq_m_n_<supf><mode>): Likewise.
14581 (mve_vbicq_n_<supf><mode>): Likewise.
14582 (mve_vbicq_s<mode>): Likewise.
14583 (mve_vbicq_u<mode>): Likewise.
14584 (@mve_vclzq_s<mode>): Likewise.
14585 (mve_vclzq_u<mode>): Likewise.
14586 (@mve_vcmp_<mve_cmp_op>q_<mode>): Likewise.
14587 (@mve_vcmp_<mve_cmp_op>q_n_<mode>): Likewise.
14588 (@mve_vcmp_<mve_cmp_op>q_f<mode>): Likewise.
14589 (@mve_vcmp_<mve_cmp_op>q_n_f<mode>): Likewise.
14590 (@mve_vcmp_<mve_cmp_op1>q_m_f<mode>): Likewise.
14591 (@mve_vcmp_<mve_cmp_op1>q_m_n_<supf><mode>): Likewise.
14592 (@mve_vcmp_<mve_cmp_op1>q_m_<supf><mode>): Likewise.
14593 (@mve_vcmp_<mve_cmp_op1>q_m_n_f<mode>): Likewise.
14594 (mve_vctp<MVE_vctp>q<MVE_vpred>): Likewise.
14595 (mve_vctp<MVE_vctp>q_m<MVE_vpred>): Likewise.
14596 (mve_vcvtaq_<supf><mode>): Likewise.
14597 (mve_vcvtaq_m_<supf><mode>): Likewise.
14598 (mve_vcvtbq_f16_f32v8hf): Likewise.
14599 (mve_vcvtbq_f32_f16v4sf): Likewise.
14600 (mve_vcvtbq_m_f16_f32v8hf): Likewise.
14601 (mve_vcvtbq_m_f32_f16v4sf): Likewise.
14602 (mve_vcvtmq_<supf><mode>): Likewise.
14603 (mve_vcvtmq_m_<supf><mode>): Likewise.
14604 (mve_vcvtnq_<supf><mode>): Likewise.
14605 (mve_vcvtnq_m_<supf><mode>): Likewise.
14606 (mve_vcvtpq_<supf><mode>): Likewise.
14607 (mve_vcvtpq_m_<supf><mode>): Likewise.
14608 (mve_vcvtq_from_f_<supf><mode>): Likewise.
14609 (mve_vcvtq_m_from_f_<supf><mode>): Likewise.
14610 (mve_vcvtq_m_n_from_f_<supf><mode>): Likewise.
14611 (mve_vcvtq_m_n_to_f_<supf><mode>): Likewise.
14612 (mve_vcvtq_m_to_f_<supf><mode>): Likewise.
14613 (mve_vcvtq_n_from_f_<supf><mode>): Likewise.
14614 (mve_vcvtq_n_to_f_<supf><mode>): Likewise.
14615 (mve_vcvtq_to_f_<supf><mode>): Likewise.
14616 (mve_vcvttq_f16_f32v8hf): Likewise.
14617 (mve_vcvttq_f32_f16v4sf): Likewise.
14618 (mve_vcvttq_m_f16_f32v8hf): Likewise.
14619 (mve_vcvttq_m_f32_f16v4sf): Likewise.
14620 (mve_vdwdupq_m_wb_u<mode>_insn): Likewise.
14621 (mve_vdwdupq_wb_u<mode>_insn): Likewise.
14622 (mve_veorq_s><mode>): Likewise.
14623 (mve_veorq_u><mode>): Likewise.
14624 (mve_veorq_f<mode>): Likewise.
14625 (mve_vidupq_m_wb_u<mode>_insn): Likewise.
14626 (mve_vidupq_u<mode>_insn): Likewise.
14627 (mve_viwdupq_m_wb_u<mode>_insn): Likewise.
14628 (mve_viwdupq_wb_u<mode>_insn): Likewise.
14629 (mve_vldrbq_<supf><mode>): Likewise.
14630 (mve_vldrbq_gather_offset_<supf><mode>): Likewise.
14631 (mve_vldrbq_gather_offset_z_<supf><mode>): Likewise.
14632 (mve_vldrbq_z_<supf><mode>): Likewise.
14633 (mve_vldrdq_gather_base_<supf>v2di): Likewise.
14634 (mve_vldrdq_gather_base_wb_<supf>v2di_insn): Likewise.
14635 (mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Likewise.
14636 (mve_vldrdq_gather_base_z_<supf>v2di): Likewise.
14637 (mve_vldrdq_gather_offset_<supf>v2di): Likewise.
14638 (mve_vldrdq_gather_offset_z_<supf>v2di): Likewise.
14639 (mve_vldrdq_gather_shifted_offset_<supf>v2di): Likewise.
14640 (mve_vldrdq_gather_shifted_offset_z_<supf>v2di): Likewise.
14641 (mve_vldrhq_<supf><mode>): Likewise.
14642 (mve_vldrhq_fv8hf): Likewise.
14643 (mve_vldrhq_gather_offset_<supf><mode>): Likewise.
14644 (mve_vldrhq_gather_offset_fv8hf): Likewise.
14645 (mve_vldrhq_gather_offset_z_<supf><mode>): Likewise.
14646 (mve_vldrhq_gather_offset_z_fv8hf): Likewise.
14647 (mve_vldrhq_gather_shifted_offset_<supf><mode>): Likewise.
14648 (mve_vldrhq_gather_shifted_offset_fv8hf): Likewise.
14649 (mve_vldrhq_gather_shifted_offset_z_<supf><mode>): Likewise.
14650 (mve_vldrhq_gather_shifted_offset_z_fv8hf): Likewise.
14651 (mve_vldrhq_z_<supf><mode>): Likewise.
14652 (mve_vldrhq_z_fv8hf): Likewise.
14653 (mve_vldrwq_<supf>v4si): Likewise.
14654 (mve_vldrwq_fv4sf): Likewise.
14655 (mve_vldrwq_gather_base_<supf>v4si): Likewise.
14656 (mve_vldrwq_gather_base_fv4sf): Likewise.
14657 (mve_vldrwq_gather_base_wb_<supf>v4si_insn): Likewise.
14658 (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise.
14659 (mve_vldrwq_gather_base_wb_z_<supf>v4si_insn): Likewise.
14660 (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise.
14661 (mve_vldrwq_gather_base_z_<supf>v4si): Likewise.
14662 (mve_vldrwq_gather_base_z_fv4sf): Likewise.
14663 (mve_vldrwq_gather_offset_<supf>v4si): Likewise.
14664 (mve_vldrwq_gather_offset_fv4sf): Likewise.
14665 (mve_vldrwq_gather_offset_z_<supf>v4si): Likewise.
14666 (mve_vldrwq_gather_offset_z_fv4sf): Likewise.
14667 (mve_vldrwq_gather_shifted_offset_<supf>v4si): Likewise.
14668 (mve_vldrwq_gather_shifted_offset_fv4sf): Likewise.
14669 (mve_vldrwq_gather_shifted_offset_z_<supf>v4si): Likewise.
14670 (mve_vldrwq_gather_shifted_offset_z_fv4sf): Likewise.
14671 (mve_vldrwq_z_<supf>v4si): Likewise.
14672 (mve_vldrwq_z_fv4sf): Likewise.
14673 (mve_vmvnq_s<mode>): Likewise.
14674 (mve_vmvnq_u<mode>): Likewise.
14675 (mve_vornq_<supf><mode>): Likewise.
14676 (mve_vornq_f<mode>): Likewise.
14677 (mve_vornq_m_<supf><mode>): Likewise.
14678 (mve_vornq_m_f<mode>): Likewise.
14679 (mve_vornq_s<mode>): Likewise.
14680 (mve_vornq_u<mode>): Likewise.
14681 (mve_vorrq_<supf><mode>): Likewise.
14682 (mve_vorrq_f<mode>): Likewise.
14683 (mve_vorrq_m_<supf><mode>): Likewise.
14684 (mve_vorrq_m_f<mode>): Likewise.
14685 (mve_vorrq_m_n_<supf><mode>): Likewise.
14686 (mve_vorrq_n_<supf><mode>): Likewise.
14687 (mve_vorrq_s<mode>): Likewise.
14688 (mve_vorrq_s<mode>): Likewise.
14689 (mve_vsbciq_<supf>v4si): Likewise.
14690 (mve_vsbciq_m_<supf>v4si): Likewise.
14691 (mve_vsbcq_<supf>v4si): Likewise.
14692 (mve_vsbcq_m_<supf>v4si): Likewise.
14693 (mve_vshlcq_<supf><mode>): Likewise.
14694 (mve_vshlcq_m_<supf><mode>): Likewise.
14695 (mve_vshrq_m_n_<supf><mode>): Likewise.
14696 (mve_vshrq_n_<supf><mode>): Likewise.
14697 (mve_vstrbq_<supf><mode>): Likewise.
14698 (mve_vstrbq_p_<supf><mode>): Likewise.
14699 (mve_vstrbq_scatter_offset_<supf><mode>_insn): Likewise.
14700 (mve_vstrbq_scatter_offset_p_<supf><mode>_insn): Likewise.
14701 (mve_vstrdq_scatter_base_<supf>v2di): Likewise.
14702 (mve_vstrdq_scatter_base_p_<supf>v2di): Likewise.
14703 (mve_vstrdq_scatter_base_wb_<supf>v2di): Likewise.
14704 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Likewise.
14705 (mve_vstrdq_scatter_offset_<supf>v2di_insn): Likewise.
14706 (mve_vstrdq_scatter_offset_p_<supf>v2di_insn): Likewise.
14707 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn): Likewise.
14708 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn): Likewise.
14709 (mve_vstrhq_<supf><mode>): Likewise.
14710 (mve_vstrhq_fv8hf): Likewise.
14711 (mve_vstrhq_p_<supf><mode>): Likewise.
14712 (mve_vstrhq_p_fv8hf): Likewise.
14713 (mve_vstrhq_scatter_offset_<supf><mode>_insn): Likewise.
14714 (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise.
14715 (mve_vstrhq_scatter_offset_p_<supf><mode>_insn): Likewise.
14716 (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise.
14717 (mve_vstrhq_scatter_shifted_offset_<supf><mode>_insn): Likewise.
14718 (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise.
14719 (mve_vstrhq_scatter_shifted_offset_p_<supf><mode>_insn): Likewise.
14720 (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise.
14721 (mve_vstrwq_<supf>v4si): Likewise.
14722 (mve_vstrwq_fv4sf): Likewise.
14723 (mve_vstrwq_p_<supf>v4si): Likewise.
14724 (mve_vstrwq_p_fv4sf): Likewise.
14725 (mve_vstrwq_scatter_base_<supf>v4si): Likewise.
14726 (mve_vstrwq_scatter_base_fv4sf): Likewise.
14727 (mve_vstrwq_scatter_base_p_<supf>v4si): Likewise.
14728 (mve_vstrwq_scatter_base_p_fv4sf): Likewise.
14729 (mve_vstrwq_scatter_base_wb_<supf>v4si): Likewise.
14730 (mve_vstrwq_scatter_base_wb_fv4sf): Likewise.
14731 (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Likewise.
14732 (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise.
14733 (mve_vstrwq_scatter_offset_<supf>v4si_insn): Likewise.
14734 (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise.
14735 (mve_vstrwq_scatter_offset_p_<supf>v4si_insn): Likewise.
14736 (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise.
14737 (mve_vstrwq_scatter_shifted_offset_<supf>v4si_insn): Likewise.
14738 (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise.
14739 (mve_vstrwq_scatter_shifted_offset_p_<supf>v4si_insn): Likewise.
14740 (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise.
14741
147422024-03-04 Marek Polacek <polacek@redhat.com>
14743
14744 * doc/extend.texi: Update [[gnu::no_dangling]].
14745
147462024-03-04 Andrew Stubbs <ams@baylibre.com>
14747
14748 * dojump.cc (do_compare_and_jump): Use full-width integers for shifts.
14749 * expr.cc (store_constructor): Likewise.
14750 (do_store_flag): Likewise.
14751
147522024-03-04 Mark Wielaard <mark@klomp.org>
14753
14754 * common.opt.urls: Regenerate.
14755 * config/avr/avr.opt.urls: Likewise.
14756 * config/i386/i386.opt.urls: Likewise.
14757 * config/pru/pru.opt.urls: Likewise.
14758 * config/riscv/riscv.opt.urls: Likewise.
14759 * config/rs6000/rs6000.opt.urls: Likewise.
14760
147612024-03-04 Richard Biener <rguenther@suse.de>
14762
14763 PR tree-optimization/114197
14764 * tree-if-conv.cc (bitfields_to_lower_p): Do not lower if
14765 there are volatile bitfield accesses.
14766 (pass_if_conversion::execute): Throw away result if the
14767 if-converted and original loops are not nested as expected.
14768
147692024-03-04 Richard Biener <rguenther@suse.de>
14770
14771 PR tree-optimization/114164
14772 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fail if
14773 the code generated for mask argument setup is not supported.
14774
147752024-03-04 Richard Biener <rguenther@suse.de>
14776
14777 PR tree-optimization/114203
14778 * tree-ssa-loop-niter.cc (build_cltz_expr): Apply CTZ->CLZ
14779 adjustment before making the result defined at zero.
14780
147812024-03-04 Richard Biener <rguenther@suse.de>
14782
14783 PR tree-optimization/114192
14784 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Use the
14785 appropriate def for the live out stmt in case of an alternate
14786 exit.
14787
147882024-03-04 Jakub Jelinek <jakub@redhat.com>
14789
14790 PR middle-end/114209
14791 * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Call
14792 unshare_expr when creating a MEM_REF from MEM_REF.
14793 (bitint_large_huge::lower_stmt): Call unshare_expr.
14794
147952024-03-04 Jakub Jelinek <jakub@redhat.com>
14796
14797 PR target/114184
14798 * config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1
14799 is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or
14800 register.
14801
148022024-03-04 Roger Sayle <roger@nextmovesoftware.com>
14803
14804 PR target/114187
14805 * simplify-rtx.cc (simplify_context::simplify_subreg): Call
14806 lowpart_subreg to perform type conversion, to avoid confusion
14807 over the offset to use in the call to simplify_reg_subreg.
14808
148092024-03-03 Greg McGary <gkm@rivosinc.com>
14810
14811 PR rtl-optimization/113010
14812 * combine.cc (simplify_comparison): Simplify a SUBREG on
14813 WORD_REGISTER_OPERATIONS targets only if it is a zero-extending
14814 MEM load.
14815
148162024-03-03 Georg-Johann Lay <avr@gjlay.de>
14817
14818 * config/avr/avr.cc: Resolve ATTRIBUTE_UNUSED.
14819 Use bool in place of int for boolean logic (if possible).
14820 Move declarations to definitions (if possible).
14821 * config/avr/avr.md: Use C++ comments. Fix some indentation glitches.
14822 * config/avr/avr-dimode.md: Same.
14823 * config/avr/constraints.md: Same.
14824 * config/avr/predicates.md: Same.
14825
148262024-03-03 Uros Bizjak <ubizjak@gmail.com>
14827
14828 PR target/113720
14829 * config/alpha/alpha.md (umuldi3_highpart): Remove expander.
14830 (*umuldi3_highpart_reg): Rename to umuldi3_highpart and
14831 simplify insn RTX using UMUL_HIGHPART rtx_code.
14832 (*umuldi3_highpart_const): Remove.
14833
148342024-03-03 Georg-Johann Lay <avr@gjlay.de>
14835
14836 PR target/114100
14837 * config/avr/avr-protos.h (_reg_unused_after): Remove proto.
14838 * config/avr/avr.cc (_reg_unused_after): Make static. And
14839 add 3rd argument to skip the current insn.
14840 (reg_unused_after): Adjust call of reg_unused_after.
14841 (avr_out_plus_1) [AVR_TINY && -mfuse-add >= 2]: Don't output
14842 unneeded frame pointer adjustments.
14843
148442024-03-03 Georg-Johann Lay <avr@gjlay.de>
14845
14846 PR target/92729
14847 * config/avr/avr.md (define_attr "cc"): Remove.
14848 * config/avr/avr-protos.h (avr_out_plus): Remove pcc argument
14849 from prototype.
14850 * config/avr/avr.cc (avr_out_plus_1): Remove pcc argument and
14851 its uses. Add insn argument.
14852 (avr_out_plus_symbol): Remove pcc argument and its uses.
14853 (avr_out_plus): Remove pcc argument and its uses.
14854 Adjust calls of avr_out_plus_symbol and avr_out_plus_1.
14855 (avr_out_round): Adjust call of avr_out_plus.
14856
148572024-03-03 Georg-Johann Lay <avr@gjlay.de>
14858
14859 * config/avr/avr.cc (avr_init_cumulative_args): Fix a typo
14860 from r14-9273.
14861
148622024-03-03 Oleg Endo <olegendo@gcc.gnu.org>
14863
14864 PR target/101737
14865 * config/sh/sh.cc (sh_is_nott_insn): Handle case where the input
14866 is not an insn, but e.g. a code label.
14867
148682024-03-02 Georg-Johann Lay <avr@gjlay.de>
14869
14870 * config/avr/avr.md (REG_0, ... REG_36): New define_constants.
14871 * config/avr/avr.cc: Use them instead of magic numbers when it
14872 means a register number.
14873
148742024-03-02 Georg-Johann Lay <avr@gjlay.de>
14875
14876 * config/avr/avr.cc: Adjust some comments.
14877
148782024-03-02 Georg-Johann Lay <avr@gjlay.de>
14879
14880 PR target/114100
14881 * config/avr/avr.cc (avr_out_plus_1) [-mtiny-stack]: Only adjust
14882 the low part of the frame pointer with 8-bit stack pointer.
14883
148842024-03-01 Patrick Palka <ppalka@redhat.com>
14885
14886 PR c++/104919
14887 PR c++/106009
14888 * tree-inline.cc (remap_decl): Handle copy_decl returning the
14889 original decl.
14890 (remap_decls): Handle remap_decl returning the original decl.
14891 (copy_fn): Adjust copy_decl callback to skip TYPE_DECL and
14892 CONST_DECL.
14893
148942024-03-01 Jeff Law <jlaw@ventanamicro.com>
14895
14896 * config/riscv/riscv.md (zero_extendqi<SUPERQI:mode>2_internal): Fix
14897 type attribute.
14898 (extendsidi2_internal, movhf_hardfloat, movhf_softfloat): Likewise.
14899 (movdi_32bit, movdi_64bit, movsi_internal): Likewise.
14900 (movhi_internal, movqi_internal): Likewise.
14901 (movsf_softfloat, movsf_hardfloat): Likewise.
14902 (movdf_hardfloat_rv32, movdf_hardfloat_rv64): Likewise.
14903 (movdf_softfloat): Likewise.
14904
149052024-03-01 Marek Polacek <polacek@redhat.com>
14906
14907 PR c++/110358
14908 PR c++/109642
14909 * doc/extend.texi: Document gnu::no_dangling.
14910 * doc/invoke.texi: Mention that gnu::no_dangling disables
14911 -Wdangling-reference.
14912
149132024-03-01 Georg-Johann Lay <avr@gjlay.de>
14914
14915 * config/avr/avr.opt: Overhaul help screen.
14916
149172024-03-01 Jakub Jelinek <jakub@redhat.com>
14918 Tobias Burnus <tburnus@baylibre.com>
14919
14920 PR c++/110347
14921 * gimplify.cc (omp_notice_variable): Fix 'shared' arg to
14922 lang_hooks.decls.omp_disregard_value_expr for
14923 (first)private in target regions.
14924
149252024-03-01 Jakub Jelinek <jakub@redhat.com>
14926
14927 PR middle-end/114136
14928 * calls.cc (expand_call): For TYPE_NO_NAMED_ARGS_STDARG_P set
14929 n_named_args initially before INIT_CUMULATIVE_ARGS to
14930 structure_value_addr_parm rather than 0, after it don't modify
14931 it if strict_argument_naming and clear only if
14932 !pretend_outgoing_varargs_named.
14933
149342024-03-01 Jakub Jelinek <jakub@redhat.com>
14935
14936 PR debug/114015
14937 * dwarf2out.cc (should_move_die_to_comdat): Return false for
14938 aggregates without DW_AT_byte_size attribute or with non-constant
14939 DW_AT_byte_size.
14940
149412024-03-01 Georg-Johann Lay <avr@gjlay.de>
14942
14943 * doc/invoke.texi (AVR Options) <-mfuse-add=level>: Document
14944 valid values for level.
14945
149462024-03-01 Richard Biener <rguenther@suse.de>
14947
14948 PR middle-end/114070
14949 * match.pd ((c ? a : b) op d --> c ? (a op d) : (b op d)):
14950 Allow the folding if before lowering and the current IL
14951 isn't supported with vcond_mask.
14952
149532024-03-01 xuli <xuli1@eswincomputing.com>
14954
14955 * config/riscv/riscv.cc (TARGET_GNU_ATTRIBUTES): Add riscv_vector_cc
14956 attribute to riscv_attribute_table.
14957 (riscv_vector_cc_function_p): Return true if FUNC is a riscv_vector_cc function.
14958 (riscv_fntype_abi): Add riscv_vector_cc attribute check.
14959 * doc/extend.texi: Add riscv_vector_cc attribute description.
14960
149612024-03-01 Pan Li <pan2.li@intel.com>
14962
14963 PR target/112817
14964 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Replace
14965 RVV_FIXED_VLMAX to RVV_VECTOR_BITS_ZVL.
14966 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Remove.
14967 (enum rvv_vector_bits_enum): New enum for different RVV vector bits.
14968 * config/riscv/riscv-selftests.cc (riscv_run_selftests): Update
14969 comments for option replacement.
14970 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Replace enum of
14971 riscv_autovec_preference to rvv_vector_bits.
14972 (vls_mode_valid_p): Ditto.
14973 (estimated_poly_value): Ditto.
14974 * config/riscv/riscv.cc (riscv_convert_vector_chunks): Rename to
14975 vector chunks and honor new option mrvv-vector-bits.
14976 (riscv_override_options_internal): Update comments and rename the
14977 vector chunks.
14978 * config/riscv/riscv.opt: Add option mrvv-vector-bits and remove
14979 internal option param=riscv-autovec-preference.
14980
149812024-03-01 Jakub Jelinek <jakub@redhat.com>
14982
14983 * function.cc (assign_parms): Only call assign_parms_setup_varargs
14984 early for TYPE_NO_NAMED_ARGS_STDARG_P functions if fnargs is empty.
14985
149862024-03-01 Jakub Jelinek <jakub@redhat.com>
14987
14988 PR middle-end/114156
14989 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Allow
14990 rhs1 of a VCE to have no underlying variable if it is a load and
14991 handle that case.
14992
149932024-02-29 David Malcolm <dmalcolm@redhat.com>
14994
14995 PR analyzer/114159
14996 * function.cc (function_name): Make param const.
14997 * function.h (function_name): Likewise.
14998
149992024-02-29 Georg-Johann Lay <avr@gjlay.de>
15000
15001 PR target/114100
15002 * doc/invoke.texi (AVR Options) <-mfuse-add>: Document.
15003 * config/avr/avr.opt (-mfuse-add=): New target option.
15004 * common/config/avr/avr-common.cc (avr_option_optimization_table)
15005 [OPT_LEVELS_1_PLUS]: Set -mfuse-add=1.
15006 [OPT_LEVELS_2_PLUS]: Set -mfuse-add=2.
15007 * config/avr/avr-passes.def (avr_pass_fuse_add): Insert new pass.
15008 * config/avr/avr-protos.h (avr_split_tiny_move)
15009 (make_avr_pass_fuse_add): New protos.
15010 * config/avr/avr.md [AVR_TINY]: New post-reload splitter uses
15011 avr_split_tiny_move to split indirect memory accesses.
15012 (gen_move_clobbercc): New define_expand helper.
15013 * config/avr/avr.cc (avr_pass_data_fuse_add): New pass data.
15014 (avr_pass_fuse_add): New class from rtl_opt_pass.
15015 (make_avr_pass_fuse_add, avr_split_tiny_move): New functions.
15016 (reg_seen_between_p, emit_move_ccc, emit_move_ccc_after): New functions.
15017 (avr_legitimate_address_p) [AVR_TINY]: Don't restrict offsets
15018 of PLUS addressing for AVR_TINY.
15019 (avr_regno_mode_code_ok_for_base_p) [AVR_TINY]: Ignore -mstrict-X.
15020 (avr_out_plus_1) [AVR_TINY]: Tweak ++Y and --Y.
15021 (avr_mode_code_base_reg_class) [AVR_TINY]: Always return POINTER_REGS.
15022
150232024-02-29 Georg-Johann Lay <avr@gjlay.de>
15024
15025 PR target/114132
15026 * config/avr/avr.h (CUMULATIVE_ARGS) <has_stack_args>: New field.
15027 * config/avr/avr.cc (avr_init_cumulative_args): Initialize it.
15028 (avr_function_arg): Set it.
15029 (avr_frame_pointer_required_p): Use it instead of .nregs.
15030
150312024-02-29 Andrew Pinski <quic_apinski@quicinc.com>
15032
15033 PR target/108174
15034 * config/aarch64/aarch64-builtins.cc (aarch64_memtag_builtin_data): Make
15035 static and mark with GTY.
15036
150372024-02-29 Xi Ruoyao <xry111@xry111.site>
15038
15039 * config/loongarch/loongarch.md
15040 (loongarch_<crc>_w_<size>_w_extended): New define_insn.
15041
150422024-02-29 Xi Ruoyao <xry111@xry111.site>
15043
15044 * config/loongarch/loongarch.md (CRC): New define_int_iterator.
15045 (crc): New define_int_attr.
15046 (loongarch_crc_w_<size>_w, loongarch_crcc_w_<size>_w): Unify
15047 into ...
15048 (loongarch_<crc>_w_<size>_w): ... here.
15049
150502024-02-29 Kito Cheng <kito.cheng@sifive.com>
15051
15052 PR target/114130
15053 * config/riscv/sync.md (atomic_compare_and_swap<mode>): Sign
15054 extend the expected value if needed.
15055
150562024-02-28 Cupertino Miranda <cupertino.miranda@oracle.com>
15057
15058 * config.gcc (target_gtfiles): Change coreout to btfext-out.
15059 (extra_objs): Change coreout to btfext-out.
15060 * config/bpf/coreout.cc: Rename to btfext-out.cc.
15061 * config/bpf/btfext-out.cc: Add.
15062 * config/bpf/coreout.h: Rename to btfext-out.h.
15063 * config/bpf/btfext-out.h: Add.
15064 * config/bpf/core-builtins.cc: Change include.
15065 * config/bpf/core-builtins.h: Change include.
15066 * config/bpf/t-bpf: Accomodate renamed files.
15067
150682024-02-28 Cupertino Miranda <cupertino.miranda@oracle.com>
15069
15070 PR target/113453
15071 * config/bpf/bpf.cc (bpf_function_prologue): Define target
15072 hook.
15073 * config/bpf/coreout.cc (brf_ext_info_section)
15074 (btf_ext_info): Move from coreout.h
15075 (btf_ext_funcinfo, btf_ext_lineinfo): Add struct.
15076 (bpf_core_reloc): Rename to btf_ext_core_reloc.
15077 (btf_ext): Add static variable.
15078 (btfext_info_sec_find_or_add, SEARCH_NODE_AND_RETURN)
15079 (bpf_create_or_find_funcinfo, bpt_create_core_reloc)
15080 (btf_ext_add_string, btf_funcinfo_type_callback)
15081 (btf_add_func_info_for, btf_validate_funcinfo)
15082 (btf_ext_info_len, output_btfext_func_info): Add function.
15083 (output_btfext_header, bpf_core_reloc_add)
15084 (output_btfext_core_relocs, btf_ext_init, btf_ext_output):
15085 Change to support new structs.
15086 * config/bpf/coreout.h (btf_ext_funcinfo, btf_ext_lineinfo):
15087 Move and change in coreout.cc.
15088 (btf_add_func_info_for, btf_ext_add_string): Add prototypes.
15089
150902024-02-28 Cupertino Miranda <cupertino.miranda@oracle.com>
15091
15092 * config/bpf/bpf.cc (bpf_option_override): Make .BTF.ext
15093 enabled by default for BPF.
15094 (bpf_file_end): Call BTF deallocation.
15095 (bpf_asm_init_sections): Correct condition.
15096 * dwarf2ctf.cc (ctf_debug_finalize): Conditionally execute BTF
15097 deallocation.
15098 (ctf_debuf_finish): Correct condition for calling
15099 ctf_debug_finalize.
15100
151012024-02-28 Cupertino Miranda <cupertino.miranda@oracle.com>
15102
15103 * btfout.cc (output_btf_func_types): Use FOR_EACH_VEC_ELT.
15104 (traverse_btf_func_types): Define function.
15105 * ctfc.h (funcs_traverse_callback): Typedef for function
15106 prototype.
15107 (traverse_btf_func_types): Add prototype.
15108
151092024-02-28 Cupertino Miranda <cupertino.miranda@oracle.com>
15110
15111 * btfout.cc (btf_collect_dataset): Corrects BTF type id.
15112
151132024-02-28 Richard Biener <rguenther@suse.de>
15114
15115 PR tree-optimization/113831
15116 PR tree-optimization/108355
15117 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Revert
15118 PR113831 fix.
15119
151202024-02-28 Richard Biener <rguenther@suse.de>
15121
15122 PR tree-optimization/114121
15123 * tree-ssa-sccvn.h (vn_reference_s::offset,
15124 vn_reference_s::max_size): New fields.
15125 (vn_reference_insert_pieces): Adjust prototype.
15126 * tree-ssa-pre.cc (phi_translate_1): Preserve offset/max_size.
15127 * tree-ssa-sccvn.cc (vn_reference_eq): Compare offset and
15128 size, allow using "don't know" state.
15129 (vn_walk_cb_data::finish): Pass along offset/max_size.
15130 (vn_reference_lookup_or_insert_for_pieces): Take offset and
15131 max_size as argument and use it.
15132 (vn_reference_lookup_3): Properly adjust offset and max_size
15133 according to the adjusted ao_ref.
15134 (vn_reference_lookup_pieces): Initialize offset and max_size.
15135 (vn_reference_lookup): Likewise.
15136 (vn_reference_lookup_call): Likewise.
15137 (vn_reference_insert): Likewise.
15138 (visit_reference_op_call): Likewise.
15139 (vn_reference_insert_pieces): Take offset and max_size
15140 as argument and use it.
15141
151422024-02-28 Juergen Christ <jchrist@linux.ibm.com>
15143
15144 PR tree-optimization/114075
15145 * tree-vect-stmts.cc (vectorizable_operation): Don't emulate floating
15146 point vectors
15147
151482024-02-28 Jakub Jelinek <jakub@redhat.com>
15149
15150 PR tree-optimization/114041
15151 * graphite-sese-to-poly.cc (add_conditions_to_domain): Check for
15152 INTEGRAL_TYPE_P check rather than INTEGER_TYPE.
15153
151542024-02-28 Jakub Jelinek <jakub@redhat.com>
15155
15156 PR tree-optimization/113988
15157 * stor-layout.h (bitwise_mode_for_size): Declare.
15158 * stor-layout.cc (bitwise_mode_for_size): New function.
15159 * gimple-fold.cc (gimple_fold_builtin_memory_op): Use it.
15160 Use bitwise_type_for_mode instead of build_nonstandard_integer_type.
15161 Use BITS_PER_UNIT instead of 8.
15162
151632024-02-27 Uros Bizjak <ubizjak@gmail.com>
15164
15165 PR target/113871
15166 * config/i386/mmx.md (V248FI): Add V2BF mode.
15167 (V24FI_32): Ditto.
15168
151692024-02-27 Eric Botcazou <ebotcazou@adacore.com>
15170
15171 * tree-ssa-dse.cc (compute_trims): Fix description. Return early
15172 if either ref->offset is not byte aligned or ref->size is not known
15173 to be equal to ref->max_size.
15174 (maybe_trim_complex_store): Fix description.
15175 (maybe_trim_constructor_store): Likewise.
15176 (maybe_trim_partially_dead_store): Likewise.
15177
151782024-02-27 Richard Earnshaw <rearnsha@arm.com>
15179
15180 * config/arm/mmintrin.h: Warn if this header is included without
15181 defining __ENABLE_DEPRECATED_IWMMXT.
15182
151832024-02-27 Richard Biener <rguenther@suse.de>
15184
15185 PR tree-optimization/114074
15186 * tree-chrec.h (chrec_convert_rhs): Default at_stmt arg to NULL.
15187 * tree-chrec.cc (chrec_fold_multiply): Canonicalize inputs.
15188 Handle poly vs. non-poly multiplication correctly with respect
15189 to undefined behavior on overflow.
15190
151912024-02-27 Jakub Jelinek <jakub@redhat.com>
15192
15193 PR rtl-optimization/114044
15194 * internal-fn.def (CLRSB, CLZ, CTZ, FFS, PARITY): Use
15195 DEF_INTERNAL_INT_EXT_FN macro rather than DEF_INTERNAL_INT_FN.
15196 * internal-fn.h (expand_CLRSB, expand_CLZ, expand_CTZ, expand_FFS,
15197 expand_PARITY): Declare.
15198 * internal-fn.cc (expand_bitquery, expand_CLRSB, expand_CLZ,
15199 expand_CTZ, expand_FFS, expand_PARITY): New functions.
15200 (expand_POPCOUNT): Use expand_bitquery.
15201
152022024-02-27 Richard Biener <rguenther@suse.de>
15203
15204 PR tree-optimization/114081
15205 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
15206 Perform manual dominator update for prologue peeling.
15207 (vect_do_peeling): Properly update dominators after adding the
15208 prologue-around guard.
15209
152102024-02-26 Georg-Johann Lay <avr@gjlay.de>
15211
15212 * config/avr/avr.opt (mcall-prologues, mrelax, maccumulate-args)
15213 (mstrict-X): Tag as "Optimization".
15214
152152024-02-26 Georg-Johann Lay <avr@gjlay.de>
15216
15217 * config/avr/avr.cc (avr_out_compare) [AVR_TINY]: Remove code in
15218 an "if avr_adiw_reg_p()" block that's dead for AVR_TINY.
15219
152202024-02-26 Jakub Jelinek <jakub@redhat.com>
15221 H.J. Lu <hjl.tools@gmail.com>
15222
15223 PR rtl-optimization/113617
15224 * varasm.cc (default_elf_select_rtx_section): For
15225 references to private symbols in comdat sections
15226 use .data.relro.local.pool.<comdat>, .data.relro.pool.<comdat>
15227 or .rodata.<comdat> comdat sections.
15228
152292024-02-26 Richard Biener <rguenther@suse.de>
15230
15231 PR tree-optimization/114099
15232 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
15233 Create and fill in a needed virtual LC PHI for the alternate
15234 exits. Remove code dealing with that missing.
15235
152362024-02-26 Richard Biener <rguenther@suse.de>
15237
15238 PR tree-optimization/114068
15239 * tree-vect-loop-manip.cc (get_live_virtual_operand_on_edge):
15240 New function.
15241 (slpeel_tree_duplicate_loop_to_edge_cfg): Add a virtual LC PHI
15242 on the main exit if needed. Remove band-aid for the case
15243 it was missing.
15244
152452024-02-26 H.J. Lu <hjl.tools@gmail.com>
15246
15247 PR target/114097
15248 * config/i386/i386-options.cc (ix86_set_func_type): Check
15249 interrupt instead of noreturn attribute.
15250
152512024-02-26 Jakub Jelinek <jakub@redhat.com>
15252
15253 * config/i386/i386.cc (ix86_bitint_type_info): Add support for
15254 !TARGET_64BIT.
15255
152562024-02-26 Jakub Jelinek <jakub@redhat.com>
15257
15258 PR tree-optimization/114090
15259 * match.pd ((x >= 0 ? x : 0) + (x <= 0 ? -x : 0) -> abs x):
15260 Restrict pattern to ANY_INTEGRAL_TYPE_P and TYPE_OVERFLOW_UNDEFINED
15261 types.
15262 ((x <= 0 ? -x : 0) -> max(-x, 0)): Likewise.
15263
152642024-02-26 Jakub Jelinek <jakub@redhat.com>
15265
15266 PR middle-end/114084
15267 * fold-const.cc (fold_binary_loc): Avoid the final associate_trees
15268 if all subtrees of var0 come from one of the op0 or op1 operands
15269 and all subtrees of con0 come from the other one. Don't clear
15270 variables which are never used afterwards.
15271
152722024-02-26 Richard Biener <rguenther@suse.de>
15273
15274 PR middle-end/114070
15275 * genmatch.cc (parser::parse_c_expr): Do not record operand
15276 lists but only mark operators used.
15277 * match.pd ((c ? a : b) op (c ? d : e) --> c ? (a op d) : (b op e)):
15278 Properly guard the case of tcc_comparison changing the VEC_COND
15279 value operand type.
15280
152812024-02-26 Jakub Jelinek <jakub@redhat.com>
15282
15283 PR target/114094
15284 * config/i386/i386.cc (x86_function_profiler): Add missing new-line
15285 to printed instruction.
15286
152872024-02-26 H.J. Lu <hjl.tools@gmail.com>
15288
15289 PR target/114098
15290 * config/i386/amxtileintrin.h (_tile_loadconfig): Use
15291 __builtin_ia32_ldtilecfg.
15292 (_tile_storeconfig): Use __builtin_ia32_sttilecfg.
15293 * config/i386/i386-builtin.def (BDESC): Add
15294 __builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg.
15295 * config/i386/i386-expand.cc (ix86_expand_builtin): Handle
15296 IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG.
15297 * config/i386/i386.md (ldtilecfg): New pattern.
15298 (sttilecfg): Likewise.
15299
153002024-02-24 Richard Sandiford <richard.sandiford@arm.com>
15301
15302 PR tree-optimization/113205
15303 * tree-vect-slp.cc (vect_optimize_slp_pass::forward_cost): Reject
15304 the proposed layout if it does not allow a source partition with
15305 layout 2 to keep that layout.
15306
153072024-02-24 Jakub Jelinek <jakub@redhat.com>
15308
15309 * builtins.cc (fold_builtin_isascii): Use HOST_WIDE_INT_UC macro.
15310 * combine.cc (make_field_assignment): Use HOST_WIDE_INT_1U macro.
15311 * double-int.cc (double_int::mask): Use HOST_WIDE_INT_UC macros.
15312 * genattrtab.cc (attr_alt_complement): Use HOST_WIDE_INT_1 macro.
15313 (mk_attr_alt): Use HOST_WIDE_INT_0 macro.
15314 * genautomata.cc (bitmap_set_bit, CLEAR_BIT): Use HOST_WIDE_INT_1
15315 macros.
15316 * ipa-strub.cc (can_strub_internally_p): Use HOST_WIDE_INT_1 macro.
15317 * loop-iv.cc (implies_p): Use HOST_WIDE_INT_1U macro.
15318 * pretty-print.cc (test_pp_format): Use HOST_WIDE_INT_C and
15319 HOST_WIDE_INT_UC macros.
15320 * rtlanal.cc (nonzero_bits1): Use HOST_WIDE_INT_UC macro.
15321 * tree.cc (build_replicated_int_cst): Use HOST_WIDE_INT_1U macro.
15322 * tree.h (DECL_OFFSET_ALIGN): Use HOST_WIDE_INT_1U macro.
15323 * tree-ssa-structalias.cc (dump_varinfo): Use ~HOST_WIDE_INT_0U
15324 macros.
15325 * wide-int.cc (divmod_internal_2): Use HOST_WIDE_INT_1U macro.
15326 * config/i386/constraints.md (define_constraint "L"): Use
15327 HOST_WIDE_INT_C macro.
15328 * config/i386/i386.md (movabsq split peephole2): Use HOST_WIDE_INT_C
15329 macro.
15330 (movl + movb peephole2): Likewise.
15331 * config/i386/predicates.md (x86_64_zext_immediate_operand): Likewise.
15332 (const_32bit_mask): Likewise.
15333
153342024-02-24 Jakub Jelinek <jakub@redhat.com>
15335
15336 PR middle-end/114073
15337 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle
15338 VIEW_CONVERT_EXPRs between large/huge _BitInt and non-integer/pointer
15339 types like vector or complex types.
15340 (gimple_lower_bitint): Don't merge VIEW_CONVERT_EXPRs to non-integral
15341 types. Fix up VIEW_CONVERT_EXPR handling. Allow merging
15342 VIEW_CONVERT_EXPR from non-integral/pointer types with a store.
15343
153442024-02-23 Robin Dapp <rdapp@ventanamicro.com>
15345
15346 PR target/114028
15347 * config/riscv/riscv-v.cc (rvv_builder::can_duplicate_repeating_sequence_p):
15348 Return false if inner mode is already Pmode.
15349 (rvv_builder::is_all_same_sequence): New function.
15350 (expand_vec_init): Emit broadcast if sequence is all same.
15351
153522024-02-23 Richard Sandiford <richard.sandiford@arm.com>
15353
15354 PR target/113613
15355 * config/aarch64/aarch64-early-ra.cc
15356 (early_ra::m_current_region): New member variable.
15357 (early_ra::m_fpr_recency): Likewise.
15358 (early_ra::start_new_region): Bump m_current_region.
15359 (early_ra::allocate_colors): Prefer less recently used registers
15360 in the event of a tie. Add a comment to explain why we prefer(ed)
15361 higher-numbered registers.
15362 (early_ra::find_oldest_color): Prefer less recently used registers
15363 here too.
15364 (early_ra::finalize_allocation): Update recency information for
15365 allocated registers.
15366 (early_ra::process_blocks): Initialize m_current_region and
15367 m_fpr_recency.
15368
153692024-02-23 Richard Sandiford <richard.sandiford@arm.com>
15370
15371 PR target/113295
15372 * config/aarch64/aarch64-early-ra.cc
15373 (early_ra::test_strictness): New enum.
15374 (early_ra::is_chain_candidate): Add a strictness parameter to
15375 control whether only correctness matters, or whether both correctness
15376 and heuristics should be used. Handle multiple levels of equivalence.
15377 (early_ra::find_related_start): Update call accordingly.
15378 (early_ra::strided_polarity_pref): Likewise.
15379 (early_ra::form_chains): Likewise.
15380 (early_ra::try_to_chain_allocnos): Use is_chain_candidate in
15381 correctness mode rather than trying to inline the test.
15382
153832024-02-23 Richard Sandiford <richard.sandiford@arm.com>
15384
15385 PR target/113295
15386 * config/aarch64/aarch64-early-ra.cc
15387 (early_ra::find_related_start): Account for definitions by shared
15388 registers when testing for a single register definition.
15389 (early_ra::accumulate_defs): New function.
15390 (early_ra::record_copy): If A shares B's register, fold A's
15391 definition information into B's. Fold A's use information into B's.
15392
153932024-02-23 H.J. Lu <hjl.tools@gmail.com>
15394
15395 * configure.ac (HAVE_AS_R_X86_64_CODE_6_GOTTPOFF): Defined as 1
15396 if R_X86_64_CODE_6_GOTTPOFF is supported.
15397 * config.in: Regenerated.
15398 * configure: Likewise.
15399 * config/i386/predicates.md (apx_ndd_add_memory_operand): Allow
15400 UNSPEC_GOTNTPOFF if R_X86_64_CODE_6_GOTTPOFF is supported.
15401
154022024-02-23 Richard Earnshaw <rearnsha@arm.com>
15403
15404 PR target/108120
15405 * config/arm/neon.md (div<VCVTF:mode>3): Rename from div<mode>3.
15406 Gate with ARM_HAVE_NEON_<MODE>_ARITH.
15407
154082024-02-23 Jakub Jelinek <jakub@redhat.com>
15409
15410 PR rtl-optimization/114054
15411 * expr.cc (expand_expr_real_2) <case MULT_EXPR>: Use
15412 temp variable instead of target parameter for result.
15413
154142024-02-23 Jakub Jelinek <jakub@redhat.com>
15415
15416 PR tree-optimization/114040
15417 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow):
15418 Use EQ_EXPR rather than LT_EXPR for g2 condition and change its
15419 probability from likely to unlikely. When handling the true true
15420 store, first cast to limb_access_type and then to l's type.
15421
154222024-02-23 Richard Biener <rguenther@suse.de>
15423
15424 PR target/90785
15425 * config.gcc: Add ia64*-*-* to the list of obsoleted targets.
15426
154272024-02-23 Palmer Dabbelt <palmer@rivosinc.com>
15428
15429 PR other/109668
15430 * config/riscv/arch-canonicalize: Move to python3
15431 * config/riscv/multilib-generator: Likewise
15432
154332024-02-23 Palmer Dabbelt <palmer@rivosinc.com>
15434
15435 * doc/invoke.texi: Document -mcpu.
15436
154372024-02-23 Lulu Cheng <chenglulu@loongson.cn>
15438
15439 * configure: Regenerate.
15440 * configure.ac: Add parameter "--fatal-warnings" to assemble
15441 when checking whether the assemble support conditional branch
15442 relaxation.
15443
154442024-02-22 Jakub Jelinek <jakub@redhat.com>
15445
15446 PR c/114007
15447 * doc/extend.texi: (__extension__): Remove comments about scope
15448 tokens vs. two colons.
15449
154502024-02-22 Andrew Pinski <quic_apinski@quicinc.com>
15451
15452 PR tree-optimization/109804
15453 * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle
15454 DEMANGLE_COMPONENT_UNNAMED_TYPE.
15455
154562024-02-22 Richard Biener <rguenther@suse.de>
15457
15458 PR tree-optimization/114048
15459 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): MEM_REF
15460 can also produce -1 off.
15461
154622024-02-22 Richard Biener <rguenther@suse.de>
15463
15464 PR tree-optimization/114027
15465 * tree-vect-loop.cc (vecctorizable_reduction): Use optimized
15466 condition reduction classification only for single-element
15467 chains.
15468
154692024-02-22 Jakub Jelinek <jakub@redhat.com>
15470
15471 PR ipa/111960
15472 * profile-count.h (profile_count::dump): Remove overload with
15473 char * first argument.
15474 * profile-count.cc (profile_count::dump): Change overload with char *
15475 first argument which uses sprintf into the overfload with FILE *
15476 first argument and use fprintf instead. Remove overload which wrapped
15477 it.
15478
154792024-02-22 Jakub Jelinek <jakub@redhat.com>
15480
15481 PR tree-optimization/113993
15482 * tree-call-cdce.cc (get_no_error_domain): Handle
15483 BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X}. Handle
15484 BUILT_IN_{COSH,SINH,EXP{,M1,2}}L for
15485 REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384
15486 the as the F128 suffixed cases, otherwise as non-suffixed ones.
15487 Handle BUILT_IN_{EXP,POW}10L for
15488 REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384
15489 as (-inf, 4932).
15490
154912024-02-22 Jakub Jelinek <jakub@redhat.com>
15492
15493 PR tree-optimization/114038
15494 * gimple-lower-bitint.cc (bitint_large_huge::lower_mul_overflow): Fix
15495 loop exit condition if end is divisible by limb_prec.
15496
154972024-02-22 YunQiang Su <syq@gcc.gnu.org>
15498
15499 * doc/invoke.texi(MIPS Options): Fix skipping UrlSuffix
15500 problem of mabi=, mno-flush-func, mexplicit-relocs;
15501 add missing leading - of mbranch-cost option.
15502 * config/mips/mips.opt.urls: Regenerate.
15503
155042024-02-22 Kewen Lin <linkw@linux.ibm.com>
15505
15506 PR target/109987
15507 * config/rs6000/constraints.md (we): Update internal doc without
15508 referring to option -mpower9-vector.
15509 * config/rs6000/driver-rs6000.cc (asm_names): Remove mpower9-vector
15510 special handlings.
15511 * config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS,
15512 OTHER_P8_VECTOR_MASKS): Merge to ...
15513 (OTHER_VSX_VECTOR_MASKS): ... here.
15514 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove
15515 some error message handlings and explicit option mask adjustments on
15516 explicit option power{8,9}-vector conflicting with other options.
15517 (rs6000_print_isa_options): Update comments.
15518 (rs6000_disable_incompatible_switches): Remove power{8,9}-vector
15519 related array items and handlings.
15520 * config/rs6000/rs6000.h (ASM_CPU_SPEC): Remove mpower9-vector
15521 special handlings.
15522 * config/rs6000/rs6000.opt: Make option power{8,9}-vector as
15523 WarnRemoved.
15524 * doc/extend.texi: Remove documentation referring to option
15525 -mpower8-vector.
15526 * doc/invoke.texi: Remove documentation for option
15527 -mpower{8,9}-vector and adjust some documentation referring to them.
15528 * doc/md.texi: Update documentation for constraint we.
15529 * doc/sourcebuild.texi: Remove documentation for powerpc_p8vector_ok.
15530
155312024-02-22 Pan Li <pan2.li@intel.com>
15532
15533 PR target/114017
15534 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade
15535 the version to 0.12.
15536
155372024-02-21 Edwin Lu <ewlu@rivosinc.com>
15538
15539 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
15540
155412024-02-21 Edwin Lu <ewlu@rivosinc.com>
15542 Robin Dapp <rdapp.gcc@gmail.com>
15543
15544 * config/riscv/generic-ooo.md (generic_ooo): Move reservation
15545 (generic_ooo_vec_load): Ditto
15546 (generic_ooo_vec_store): Ditto
15547 (generic_ooo_vec_loadstore_seg): Ditto
15548 (generic_ooo_vec_alu): Ditto
15549 (generic_ooo_vec_fcmp): Ditto
15550 (generic_ooo_vec_imul): Ditto
15551 (generic_ooo_vec_fadd): Ditto
15552 (generic_ooo_vec_fmul): Ditto
15553 (generic_ooo_crypto): Ditto
15554 (generic_ooo_perm): Ditto
15555 (generic_ooo_vec_reduction): Ditto
15556 (generic_ooo_vec_ordered_reduction): Ditto
15557 (generic_ooo_vec_idiv): Ditto
15558 (generic_ooo_vec_float_divsqrt): Ditto
15559 (generic_ooo_vec_mask): Ditto
15560 (generic_ooo_vec_vesetvl): Ditto
15561 (generic_ooo_vec_setrm): Ditto
15562 (generic_ooo_vec_readlen): Ditto
15563 * config/riscv/riscv.md: Include generic-vector-ooo
15564 * config/riscv/generic-vector-ooo.md: New file. To here
15565
155662024-02-21 Edwin Lu <ewlu@rivosinc.com>
15567
15568 * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
15569 (generic_ooo_branch): Ditto
15570 * config/riscv/generic.md (generic_sfb_alu): Ditto
15571 (generic_fmul_half): Ditto
15572 * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
15573 * config/riscv/sifive-7.md (sifive_7_hfma): Add reservation
15574 (sifive_7_popcount): Ditto
15575 * config/riscv/sifive-p400.md (sifive_p400_clmul): Ditto
15576 * config/riscv/sifive-p600.md (sifive_p600_clmul): Ditto
15577 * config/riscv/vector.md: Change rdfrm to fmove
15578 * config/riscv/zc.md: Change pushpop to load/store
15579
155802024-02-21 Jonathan Wakely <jwakely@redhat.com>
15581
15582 * doc/invoke.texi (Warning Options): Fix typos.
15583
155842024-02-21 David Faust <david.faust@oracle.com>
15585
15586 * config/bpf/bpf-protos.h (bpf_expand_cpymem): New.
15587 * config/bpf/bpf.cc: (emit_move_loop, bpf_expand_cpymem): New.
15588 * config/bpf/bpf.md: (cpymemdi, movmemdi): New define_expands.
15589
155902024-02-21 Martin Jambor <mjambor@suse.cz>
15591
15592 PR ipa/113476
15593 * ipa-prop.h (ipa_node_params): Convert lattices to a vector, adjust
15594 initializers in the contructor.
15595 (ipa_node_params::~ipa_node_params): Release lattices as a vector.
15596 * ipa-cp.h: New file.
15597 * ipa-cp.cc: Include sreal.h and ipa-cp.h.
15598 (ipcp_value_source): Move to ipa-cp.h.
15599 (ipcp_value_base): Likewise.
15600 (ipcp_value): Likewise.
15601 (ipcp_lattice): Likewise.
15602 (ipcp_agg_lattice): Likewise.
15603 (ipcp_bits_lattice): Likewise.
15604 (ipcp_vr_lattice): Likewise.
15605 (ipcp_param_lattices): Likewise.
15606 (ipa_get_parm_lattices): Remove assert latticess is non-NULL.
15607 (ipa_value_from_jfunc): Adjust a check for empty lattices.
15608 (ipa_context_from_jfunc): Likewise.
15609 (ipa_agg_value_from_jfunc): Likewise.
15610 (merge_agg_lats_step): Do not memset new aggregate lattices to zero.
15611 (ipcp_propagate_stage): Allocate lattices in a vector as opposed to
15612 just in contiguous memory.
15613 (ipcp_store_vr_results): Adjust a check for empty lattices.
15614 * auto-profile.cc: Include sreal.h and ipa-cp.h.
15615 * cgraph.cc: Likewise.
15616 * cgraphclones.cc: Likewise.
15617 * cgraphunit.cc: Likewise.
15618 * config/aarch64/aarch64.cc: Likewise.
15619 * config/i386/i386-builtins.cc: Likewise.
15620 * config/i386/i386-expand.cc: Likewise.
15621 * config/i386/i386-features.cc: Likewise.
15622 * config/i386/i386-options.cc: Likewise.
15623 * config/i386/i386.cc: Likewise.
15624 * config/rs6000/rs6000.cc: Likewise.
15625 * config/s390/s390.cc: Likewise.
15626 * gengtype.cc (open_base_files): Added sreal.h and ipa-cp.h to the
15627 files to be included in gtype-desc.cc.
15628 * gimple-range-fold.cc: Include sreal.h and ipa-cp.h.
15629 * ipa-devirt.cc: Likewise.
15630 * ipa-fnsummary.cc: Likewise.
15631 * ipa-icf.cc: Likewise.
15632 * ipa-inline-analysis.cc: Likewise.
15633 * ipa-inline-transform.cc: Likewise.
15634 * ipa-inline.cc: Include ipa-cp.h, move inclusion of sreal.h higher.
15635 * ipa-modref.cc: Include sreal.h and ipa-cp.h.
15636 * ipa-param-manipulation.cc: Likewise.
15637 * ipa-predicate.cc: Likewise.
15638 * ipa-profile.cc: Likewise.
15639 * ipa-prop.cc: Likewise.
15640 (ipa_node_params_t::duplicate): Assert new lattices remain empty
15641 instead of setting them to NULL.
15642 * ipa-pure-const.cc: Include sreal.h and ipa-cp.h.
15643 * ipa-split.cc: Likewise.
15644 * ipa-sra.cc: Likewise.
15645 * ipa-strub.cc: Likewise.
15646 * ipa-utils.cc: Likewise.
15647 * ipa.cc: Likewise.
15648 * toplev.cc: Likewise.
15649 * tree-ssa-ccp.cc: Likewise.
15650 * tree-ssa-sccvn.cc: Likewise.
15651 * tree-vrp.cc: Likewise.
15652
156532024-02-21 Tamar Christina <tamar.christina@arm.com>
15654
15655 * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Remove LS64 from
15656 Armv8.7-a.
15657
156582024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15659
15660 * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
15661 Use aarch64_gen_compare_zero_and_branch rather than emitting
15662 a CBZ directly.
15663
156642024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15665
15666 * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p):
15667 Remove duplicated call.
15668
156692024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15670
15671 * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall):
15672 Check that each individual piece of state is shared in the same
15673 way, rather than using an aggregate check for PSTATE.ZA.
15674
156752024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15676
15677 * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
15678 In the code that commits a lazy save, only zero ZA if the function
15679 has ZA state. Similarly zero ZT0 if the function has ZT0 state.
15680
156812024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15682
15683 * config/aarch64/aarch64-sme.md (aarch64_commit_lazy_save): Remove,
15684 directly inserting the associated sequence
15685 * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state):
15686 ...here instead.
15687
156882024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15689
15690 PR target/113995
15691 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Don't
15692 fold the SVE allocation into the initial allocation if the
15693 initial allocation includes a VG save.
15694
156952024-02-21 Richard Sandiford <richard.sandiford@arm.com>
15696
15697 PR target/113220
15698 * cfgrtl.cc (commit_one_edge_insertion): Handle sequences that
15699 contain jumps even if called after initial RTL expansion.
15700 * mode-switching.cc: Include cfgbuild.h.
15701 (optimize_mode_switching): Allow the sequence returned by the
15702 emit hook to contain internal jumps. Record which blocks
15703 contain such jumps and split the blocks at the end.
15704 * config/aarch64/aarch64.cc (aarch64_mode_emit): Check for
15705 non-debug insns when scanning the sequence.
15706
157072024-02-21 Tobias Burnus <tburnus@baylibre.com>
15708
15709 * config/nvptx/gen-omp-device-properties.sh: Add 'nvptx64' to arch.
15710 * config/nvptx/nvptx.cc (nvptx_omp_device_kind_arch_isa): Likewise.
15711
157122024-02-21 Dimitar Dimitrov <dimitar@dinux.eu>
15713
15714 * doc/invoke.texi (-mmcu): Add information about MCU specs.
15715
157162024-02-21 Dimitar Dimitrov <dimitar@dinux.eu>
15717
15718 * doc/invoke.texi (-minrt): Clarify that main
15719 must take no arguments.
15720
157212024-02-20 Georg-Johann Lay <avr@gjlay.de>
15722
15723 * config/avr/builtins.def: Use function prototypes of given size
15724 and signedness.
15725 * config/avr/avr.cc (avr_init_builtins): Adjust types required
15726 by builtins.def.
15727 * doc/extend.texi (AVR Built-in Functions): Adjust accordingly.
15728
157292024-02-20 Georg-Johann Lay <avr@gjlay.de>
15730
15731 * doc/extend.texi (AVR Built-in Functions): Use @defbuiltin
15732 instead of @table.
15733
157342024-02-20 Will Hawkins <hawkinsw@obs.cr>
15735
15736 * config/bpf/bpf.opt: Add help information for -mcpu.
15737
157382024-02-20 Richard Sandiford <richard.sandiford@arm.com>
15739
15740 PR target/113805
15741 * config/aarch64/aarch64-passes.def (pass_late_track_speculation):
15742 New pass.
15743 * config/aarch64/aarch64-protos.h (make_pass_late_track_speculation):
15744 Declare.
15745 * config/aarch64/aarch64.md (is_call): New attribute.
15746 (*and<mode>3nr_compare0): Rename to...
15747 (@aarch64_and<mode>3nr_compare0): ...this.
15748 * config/aarch64/aarch64-sme.md (aarch64_get_sme_state)
15749 (aarch64_tpidr2_save, aarch64_tpidr2_restore): Add is_call attributes.
15750 * config/aarch64/aarch64-speculation.cc: Update file comment to
15751 describe the new late pass.
15752 (aarch64_do_track_speculation): Handle is_call insns like other calls.
15753 (pass_track_speculation): Add an is_late member variable.
15754 (pass_track_speculation::gate): Run the late pass for streaming-
15755 compatible functions and the early pass for other functions.
15756 (make_pass_track_speculation): Update accordingly.
15757 (make_pass_late_track_speculation): New function.
15758 * config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): New
15759 function.
15760 (aarch64_guard_switch_pstate_sm): Use it.
15761
157622024-02-19 Iain Sandoe <iain@sandoe.co.uk>
15763
15764 * config/aarch64/aarch64-builtins.cc (aarch64_init_rng_builtins):
15765 Register these builtins with a pointer to uint64_t rather than unsigned
15766 DI mode.
15767
157682024-02-19 Thomas Schwinge <tschwinge@baylibre.com>
15769
15770 PR target/113615
15771 * config/gcn/gcn-valu.md (define_expand "reduc_<fexpander>_scal_<mode>"):
15772 Conditionalize on '!TARGET_RDNA2_PLUS'.
15773 * config/gcn/gcn.cc (gcn_expand_dpp_shr_insn)
15774 (gcn_expand_reduc_scalar):
15775 'gcc_checking_assert (!TARGET_RDNA2_PLUS);'.
15776
157772024-02-19 Thomas Schwinge <tschwinge@baylibre.com>
15778
15779 * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Restore lost
15780 '__gfx90a__' target CPU definition. Add some safeguards for the future.
15781
157822024-02-19 Richard Biener <rguenther@suse.de>
15783
15784 PR rtl-optimization/54052
15785 * rtl-ssa/blocks.cc (function_info::place_phis): Filter
15786 local defs by LR_OUT.
15787
157882024-02-19 Jakub Jelinek <jakub@redhat.com>
15789
15790 PR tree-optimization/113967
15791 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): Require
15792 in condition that @rpos is multiple of vector element size.
15793
157942024-02-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15795
15796 PR target/113696
15797 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info):
15798 Suppress vsetvl fusion.
15799
158002024-02-18 H.J. Lu <hjl.tools@gmail.com>
15801
15802 PR target/113912
15803 * config/i386/i386.cc (ix86_can_use_push2pop2): New.
15804 (ix86_pro_and_epilogue_can_use_push2pop2): Use it.
15805 (ix86_emit_save_regs): Don't generate push2 if
15806 ix86_can_use_push2pop2 return false.
15807 (ix86_expand_epilogue): Don't generate pop2 if
15808 ix86_can_use_push2pop2 return false.
15809
158102024-02-18 Georg-Johann Lay <avr@gjlay.de>
15811
15812 * doc/invoke.texi (AVR Options) <-mmcu>: Remove "Atmel".
15813 Note on complete device support.
15814
158152024-02-18 Georg-Johann Lay <avr@gjlay.de>
15816
15817 * doc/extend.texi (AVR Function Attributes): Fuse description
15818 of "signal" and "interrupt" attribute. Link pseudo instruction.
15819
158202024-02-18 Lulu Cheng <chenglulu@loongson.cn>
15821
15822 * config/loongarch/larchintrin.h (__movgr2fcsr): Remove redundant
15823 symbol type conversions.
15824 (__cacop_d): Likewise.
15825 (__cpucfg): Likewise.
15826 (__asrtle_d): Likewise.
15827 (__asrtgt_d): Likewise.
15828 (__lddir_d): Likewise.
15829 (__ldpte_d): Likewise.
15830 (__crc_w_b_w): Likewise.
15831 (__crc_w_h_w): Likewise.
15832 (__crc_w_w_w): Likewise.
15833 (__crc_w_d_w): Likewise.
15834 (__crcc_w_b_w): Likewise.
15835 (__crcc_w_h_w): Likewise.
15836 (__crcc_w_w_w): Likewise.
15837 (__crcc_w_d_w): Likewise.
15838 (__csrrd_w): Likewise.
15839 (__csrwr_w): Likewise.
15840 (__csrxchg_w): Likewise.
15841 (__csrrd_d): Likewise.
15842 (__csrwr_d): Likewise.
15843 (__csrxchg_d): Likewise.
15844 (__iocsrrd_b): Likewise.
15845 (__iocsrrd_h): Likewise.
15846 (__iocsrrd_w): Likewise.
15847 (__iocsrrd_d): Likewise.
15848 (__iocsrwr_b): Likewise.
15849 (__iocsrwr_h): Likewise.
15850 (__iocsrwr_w): Likewise.
15851 (__iocsrwr_d): Likewise.
15852 (__frecipe_s): Likewise.
15853 (__frecipe_d): Likewise.
15854 (__frsqrte_s): Likewise.
15855 (__frsqrte_d): Likewise.
15856
158572024-02-18 Lulu Cheng <chenglulu@loongson.cn>
15858
15859 * config/loongarch/larchintrin.h (__iocsrrd_h): Modify the
15860 function return value type to unsigned short.
15861
158622024-02-16 Edwin Lu <ewlu@rivosinc.com>
15863
15864 * doc/sourcebuild.texi: add scan-assembler-bound
15865
158662024-02-16 Jason Merrill <jason@redhat.com>
15867
15868 * gdbhooks.py: Fix regex syntax.
15869
158702024-02-16 Richard Biener <rguenther@suse.de>
15871
15872 PR tree-optimization/113895
15873 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Disable
15874 consistency checking when there are out-of-bound array
15875 accesses. Allow -1 off when from an array reference with
15876 constant index.
15877
158782024-02-16 Kito Cheng <kito.cheng@sifive.com>
15879
15880 PR target/106543
15881 * config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>): Fix asm
15882 pattern.
15883
158842024-02-16 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
15885
15886 * doc/sourcebuild.texi (Effective-Target Keywords, Other
15887 attribugs): Document linker_plugin.
15888 (Require Support): Document dg-require-linker-plugin.
15889
158902024-02-16 Kito Cheng <kito.cheng@sifive.com>
15891
15892 PR target/109349
15893 * common/config/riscv/riscv-common.cc (riscv_arch_help): New.
15894 * config/riscv/riscv-protos.h (RISCV_MAJOR_VERSION_BASE): New.
15895 (RISCV_MINOR_VERSION_BASE): Ditto.
15896 (RISCV_REVISION_VERSION_BASE): Ditto.
15897 * config/riscv/riscv-c.cc (riscv_ext_version_value): Use enum
15898 rather than magic number.
15899 * config/riscv/riscv.h (riscv_arch_help): New.
15900 (EXTRA_SPEC_FUNCTIONS): Add riscv_arch_help.
15901 (DRIVER_SELF_SPECS): Handle -march=help, -print-supported-extensions and
15902 --print-supported-extensions.
15903 * config/riscv/riscv.opt (march=help): New.
15904 (print-supported-extensions): New.
15905 (-print-supported-extensions): New.
15906 * doc/invoke.texi (RISC-V Options): Document -march=help.
15907
159082024-02-16 Tejas Belagod <tejas.belagod@arm.com>
15909
15910 PR target/113780
15911 * config/arm/arm.cc (arm_function_ok_for_sibcall): Don't allow tailcalls
15912 for indirect calls with 4 or more arguments in pac-enabled functions.
15913
159142024-02-15 David Faust <david.faust@oracle.com>
15915
15916 * config/bpf/bpf.md (zero_extendqidi2): Correct asm template to
15917 use ldxb instead of ldxh.
15918
159192024-02-15 Jakub Jelinek <jakub@redhat.com>
15920
15921 PR middle-end/113921
15922 * cfgrtl.h (prepend_insn_to_edge): New declaration.
15923 * cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function
15924 comment.
15925 (prepend_insn_to_edge): New function.
15926 * cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of
15927 insert_insn_on_edge.
15928
159292024-02-15 Richard Biener <rguenther@suse.de>
15930
15931 PR tree-optimization/111156
15932 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): Look
15933 at the pattern stmt if any.
15934
159352024-02-15 Georg-Johann Lay <avr@gjlay.de>
15936
15937 PR target/113927
15938 * config/avr/avr.h (AVR_HAVE_ADIW): New macro.
15939 * config/avr/avr-protos.h (avr_adiw_reg_p): New proto.
15940 * config/avr/avr.cc (avr_adiw_reg_p): New function.
15941 (avr_conditional_register_usage) [AVR_TINY]: Don't clear ADDW_REGS.
15942 Replace test_hard_reg_class (ADDW_REGS, ...) with calls to
15943 * config/avr/avr.md: Same.
15944 (attr "isa") <tiny, no_tiny>: Remove.
15945 <adiw, no_adiw>: Add.
15946 (define_insn, define_insn_and_split): When an alternative has
15947 constraint "w", then set attribute "isa" to "adiw".
15948 * config/avr/avr-c.cc (avr_cpu_cpp_builtins) [AVR_HAVE_ADIW]:
15949 Built-in define __AVR_HAVE_ADIW__.
15950 * doc/invoke.texi (AVR Options): Document it.
15951
159522024-02-15 Andrew Stubbs <ams@baylibre.com>
15953
15954 * config/gcn/gcn-valu.md
15955 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): Add conditions for RDNA.
15956 * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Check permutation
15957 details are supported on RDNA devices.
15958
159592024-02-15 Andrew Pinski <quic_apinski@quicinc.com>
15960
15961 PR middle-end/113508
15962 * doc/md.texi (sdot_prod@var{m}, udot_prod@var{m},
15963 usdot_prod@var{m}, ssad@var{m}, usad@var{m}, widen_usum@var{m}3,
15964 smulhs@var{m}3, umulhs@var{m}3, smulhrs@var{m}3, umulhrs@var{m}3):
15965 Add sentence about what the mode m is.
15966
159672024-02-15 Andrew Pinski <quic_apinski@quicinc.com>
15968
15969 * doc/md.texi (widen_ssum, widen_usum, smulhs, umulhs,
15970 smulhrs, umulhrs, sdiv_pow2): Move the 3 outside of the
15971 var.
15972
159732024-02-15 Richard Biener <rguenther@suse.de>
15974
15975 * tree-ssa-tail-merge.cc (same_succ_hash): Skip debug
15976 stmts.
15977
159782024-02-15 Jakub Jelinek <jakub@redhat.com>
15979
15980 PR tree-optimization/113567
15981 * gimple-lower-bitint.cc (gimple_lower_bitint): For large/huge
15982 _BitInt multiplication, division or modulo with
15983 SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs and at least one of rhs1 and rhs2
15984 force the affected inputs into a new SSA_NAME.
15985
159862024-02-14 Uros Bizjak <ubizjak@gmail.com>
15987
15988 PR target/113871
15989 * config/i386/mmx.md (V248FI): New mode iterator.
15990 (V24FI_32): DItto.
15991 (vec_shl_<V248FI:mode>): New expander.
15992 (vec_shl_<V24FI_32:mode>): Ditto.
15993 (vec_shr_<V248FI:mode>): Ditto.
15994 (vec_shr_<V24FI_32:mode>): Ditto.
15995 * config/i386/sse.md (vec_shl_<V_128:mode>): Simplify expander.
15996 (vec_shr_<V248FI:mode>): Ditto.
15997
159982024-02-14 Jan Hubicka <jh@suse.cz>
15999
16000 PR tree-optimization/111054
16001 * tree-ssa-loop-split.cc (split_loop): Check for profile being present.
16002
160032024-02-14 Tamar Christina <tamar.christina@arm.com>
16004
16005 * tree-cfg.cc (replace_loop_annotate): Inspect loop edges for annotations.
16006
160072024-02-14 Richard Biener <rguenther@suse.de>
16008
16009 PR tree-optimization/113910
16010 * bitmap.cc (bitmap_hash): Mix the full element "hash" to
16011 the hashval_t hash.
16012
160132024-02-14 Jakub Jelinek <jakub@redhat.com>
16014
16015 * pretty-print.cc (PTRDIFF_MAX): Define if not yet defined.
16016 (pp_integer_with_precision): For unsigned ptrdiff_t printing
16017 with u, o or x print ptrdiff_t argument converted to
16018 unsigned long long and masked with 2ULL * PTRDIFF_MAX + 1.
16019
160202024-02-14 Richard Biener <rguenther@suse.de>
16021
16022 PR middle-end/113576
16023 * expr.cc (do_store_flag): For vector bool compares of vectors
16024 with padding zero that.
16025 * dojump.cc (do_compare_and_jump): Likewise.
16026
160272024-02-14 Gerald Pfeifer <gerald@pfeifer.com>
16028
16029 * doc/install.texi (Prerequisites): Update gettext link.
16030
160312024-02-13 H.J. Lu <hjl.tools@gmail.com>
16032
16033 PR target/113876
16034 * config/i386/i386.cc (ix86_pro_and_epilogue_can_use_push2pop2):
16035 Return false if the incoming stack isn't 16-byte aligned.
16036
160372024-02-13 Tobias Burnus <tburnus@baylibre.com>
16038
16039 PR middle-end/113904
16040 * omp-general.cc (struct omp_ts_info): Update for splitting of
16041 OMP_TRAIT_PROPERTY_EXPR into OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR.
16042 * omp-selectors.h (enum omp_tp_type): Replace
16043 OMP_TRAIT_PROPERTY_EXPR by OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR.
16044
160452024-02-13 Monk Chiang <monk.chiang@sifive.com>
16046
16047 PR target/113742
16048 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix
16049 recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI.
16050
160512024-02-13 Richard Biener <rguenther@suse.de>
16052
16053 PR tree-optimization/113895
16054 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Track
16055 offset to discover constant array indices in bits, handle
16056 COMPONENT_REF to bitfields.
16057
160582024-02-13 Richard Biener <rguenther@suse.de>
16059
16060 PR tree-optimization/113831
16061 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Fix
16062 typo in comment.
16063
160642024-02-13 Richard Biener <rguenther@suse.de>
16065
16066 PR tree-optimization/113902
16067 * tree-vect-loop.cc (move_early_exit_stmts): Track
16068 last_seen_vuse for VUSE updating.
16069
160702024-02-13 Tamar Christina <tamar.christina@arm.com>
16071
16072 PR tree-optimization/113734
16073 * tree-vect-loop.cc (vect_transform_loop): Treat the final iteration of
16074 an early break loop as partial.
16075
160762024-02-13 Richard Biener <rguenther@suse.de>
16077
16078 PR tree-optimization/113898
16079 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Add
16080 missing accumulated off adjustment.
16081
160822024-02-13 Jakub Jelinek <jakub@redhat.com>
16083
16084 * hwint.h (GCC_PRISZ, fmt_size_t): Fix preprocessor conditions,
16085 instead of comparing SIZE_MAX against INT_MAX and LONG_MAX compare
16086 it against UINT_MAX and ULONG_MAX.
16087
160882024-02-13 David Malcolm <dmalcolm@redhat.com>
16089
16090 * diagnostic-core.h (emit_diagnostic_valist): Rename overload
16091 to...
16092 (emit_diagnostic_valist_meta): ...this.
16093 * diagnostic.cc (emit_diagnostic_valist): Likewise, to...
16094 (emit_diagnostic_valist_meta): ...this.
16095
160962024-02-12 Jakub Jelinek <jakub@redhat.com>
16097
16098 PR tree-optimization/113849
16099 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't use
16100 fast path for widening casts where !m_upwards_2limb and lhs_type
16101 has precision which is a multiple of limb_prec.
16102
161032024-02-12 Jakub Jelinek <jakub@redhat.com>
16104
16105 PR c++/113674
16106 * attribs.cc (extract_attribute_substring): Remove.
16107 (lookup_scoped_attribute_spec): Don't call it.
16108
161092024-02-12 Jakub Jelinek <jakub@redhat.com>
16110
16111 * gengtype.cc (adjust_field_rtx_def): Use HOST_SIZE_T_PRINT_UNSIGNED
16112 and cast to fmt_size_t instead of %lu and cast to unsigned long.
16113
161142024-02-12 Christophe Lyon <christophe.lyon@linaro.org>
16115
16116 * Makefile.in: Add no-info dependency.
16117 * configure.ac: Set BUILD_INFO=no-info if makeinfo is not
16118 available.
16119 * configure: Regenerate.
16120
161212024-02-12 Iain Sandoe <iain@sandoe.co.uk>
16122
16123 PR target/113855
16124 * config/i386/darwin.h (DARWIN_HEAP_T_LIB): Moved to be
16125 available to all sub-targets.
16126 * config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): Delete.
16127 * config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): Delete.
16128
161292024-02-12 Richard Biener <rguenther@suse.de>
16130
16131 PR tree-optimization/113831
16132 PR tree-optimization/108355
16133 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): When
16134 we see variable array indices and get_ref_base_and_extent
16135 can resolve those to constants fix up the ops to constants
16136 as well.
16137 (ao_ref_init_from_vn_reference): Use 'off' member for
16138 ARRAY_REF and ARRAY_RANGE_REF instead of recomputing it.
16139 (valueize_refs_1): Also fixup 'off' of ARRAY_RANGE_REF.
16140
161412024-02-12 Pan Li <pan2.li@intel.com>
16142
16143 * config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin):
16144 Replace args to arguments for misspelled term.
16145
161462024-02-12 Georg-Johann Lay <avr@gjlay.de>
16147
16148 PR target/112944
16149 * config/avr/gen-avr-mmcu-specs.cc (print_mcu) [have_flmap]:
16150 <*link_rodata_in_ram>: Spec undefs symbol __do_flmap_init
16151 when not linked with -mrodata-in-ram.
16152
161532024-02-12 Richard Biener <rguenther@suse.de>
16154
16155 PR tree-optimization/113863
16156 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
16157 Record crossed virtual PHIs.
16158 * tree-vect-loop.cc (move_early_exit_stmts): Elide crossed
16159 virtual PHIs.
16160
161612024-02-10 Marek Polacek <polacek@redhat.com>
16162
16163 DR 2237
16164 PR c++/107126
16165 PR c++/97202
16166 * doc/invoke.texi: Document -Wtemplate-id-cdtor.
16167
161682024-02-10 Jakub Jelinek <jakub@redhat.com>
16169
16170 * gimple-lower-bitint.cc (itint_large_huge::lower_addsub_overflow): Fix
16171 computation of idx for i == 4 of bitint_prec_huge.
16172
161732024-02-10 Jakub Jelinek <jakub@redhat.com>
16174
16175 PR middle-end/110754
16176 * gimple-low.cc (assumption_copy_decl): For TREE_THIS_VOLATILE
16177 decls create PARM_DECL with pointer to original type, set
16178 TREE_READONLY and keep TREE_THIS_VOLATILE, TREE_ADDRESSABLE,
16179 DECL_NOT_GIMPLE_REG_P and DECL_BY_REFERENCE cleared.
16180 (adjust_assumption_stmt_op): For remapped TREE_THIS_VOLATILE decls
16181 wrap PARM_DECL into a simple TREE_THIS_NO_TRAP MEM_REF.
16182 (lower_assumption): For TREE_THIS_VOLATILE vars pass ADDR_EXPR
16183 of the var as argument.
16184
161852024-02-10 Jakub Jelinek <jakub@redhat.com>
16186
16187 * pretty-print.cc (pp_integer_with_precision): Handle precision 3 for
16188 size_t and precision 4 for ptrdiff_t. Formatting fix.
16189 (pp_format): Document %{t,z}{d,i,u,o,x}. Implement t and z modifiers.
16190 Formatting fixes.
16191 (test_pp_format): Test t and z modifiers.
16192 * gcc.cc (read_specs): Use %td instead of %ld and casts to long.
16193
161942024-02-10 Jakub Jelinek <jakub@redhat.com>
16195
16196 * ipa-icf.cc (sem_item_optimizer::process_cong_reduction,
16197 sem_item_optimizer::dump_cong_classes): Use HOST_SIZE_T_PRINT_UNSIGNED
16198 and casts to fmt_size_t instead of "%lu" and casts to unsigned long.
16199 * tree.cc (print_debug_expr_statistics): Use HOST_SIZE_T_PRINT_DEC
16200 and casts to fmt_size_t instead of "%ld" and casts to long.
16201 (print_value_expr_statistics, print_type_hash_statistics): Likewise.
16202 * dwarf2out.cc (output_macinfo_op): Use HOST_WIDE_INT_PRINT_UNSIGNED
16203 instead of "%lu" and casts to unsigned long.
16204 * gcov-dump.cc (dump_gcov_file): Use %u instead of %lu and casts to
16205 unsigned long.
16206 * tree-ssa-dom.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC
16207 and casts to fmt_size_t instead of "%ld" and casts to long.
16208 * cfgexpand.cc (dump_stack_var_partition): Use
16209 HOST_SIZE_T_PRINT_UNSIGNED and casts to fmt_size_t instead of "%lu"
16210 and casts to unsigned long.
16211 * gengtype.cc (adjust_field_rtx_def): Likewise.
16212 * tree-into-ssa.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC
16213 and casts to fmt_size_t instead of "%ld" and casts to long.
16214 * postreload-gcse.cc (dump_hash_table): Likewise.
16215 * ggc-page.cc (alloc_page): Use HOST_SIZE_T_PRINT_UNSIGNED
16216 and casts to fmt_size_t instead of "%lu" and casts to unsigned long.
16217 (ggc_internal_alloc, ggc_free): Likewise.
16218 * genpreds.cc (write_lookup_constraint_1): Likewise.
16219 (write_insn_constraint_len): Likewise.
16220 * tree-dfa.cc (dump_dfa_stats): Use HOST_SIZE_T_PRINT_DEC
16221 and casts to fmt_size_t instead of "%ld" and casts to long.
16222 * varasm.cc (output_constant_pool_contents): Use
16223 HOST_WIDE_INT_PRINT_DEC instead of "%ld" and casts to long.
16224 * var-tracking.cc (dump_var): Likewise.
16225
162262024-02-09 Jakub Jelinek <jakub@redhat.com>
16227
16228 PR tree-optimization/113783
16229 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Look
16230 through VIEW_CONVERT_EXPR for final cast checks. Handle
16231 VIEW_CONVERT_EXPRs from large/huge _BitInt to > MAX_FIXED_MODE_SIZE
16232 INTEGER_TYPEs.
16233 (gimple_lower_bitint): Don't merge mergeable operations or other
16234 casts with VIEW_CONVERT_EXPRs to > MAX_FIXED_MODE_SIZE INTEGER_TYPEs.
16235 * expr.cc (expand_expr_real_1): Don't use convert_modes if either
16236 mode is BLKmode.
16237
162382024-02-09 Jakub Jelinek <jakub@redhat.com>
16239
16240 * hwint.h (GCC_PRISZ, fmt_size_t, HOST_SIZE_T_PRINT_DEC,
16241 HOST_SIZE_T_PRINT_UNSIGNED, HOST_SIZE_T_PRINT_HEX,
16242 HOST_SIZE_T_PRINT_HEX_PURE): Define.
16243 * ira-conflicts.cc (build_conflict_bit_table): Use it. Formatting
16244 fixes.
16245
162462024-02-09 Jakub Jelinek <jakub@redhat.com>
16247
16248 PR middle-end/113415
16249 * cfgexpand.cc (expand_asm_stmt): For asm goto, use
16250 duplicate_insn_chain to duplicate after_rtl_seq sequence instead
16251 of hand written loop with emit_insn of copy_insn and emit original
16252 after_rtl_seq on the last edge.
16253
162542024-02-09 Jakub Jelinek <jakub@redhat.com>
16255
16256 PR tree-optimization/113818
16257 * gimple-lower-bitint.cc (add_eh_edge): New function.
16258 (bitint_large_huge::handle_load,
16259 bitint_large_huge::lower_mergeable_stmt,
16260 bitint_large_huge::lower_muldiv_stmt): Use it.
16261
162622024-02-09 Jakub Jelinek <jakub@redhat.com>
16263
16264 PR tree-optimization/113774
16265 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't
16266 emit any comparison if m_first and low + 1 is equal to
16267 m_upwards_2limb, simplify condition for that. If not
16268 single_comparison, not m_first and we can prove that the idx <= low
16269 comparison will be always true, emit instead of idx <= low
16270 comparison low <= low such that cfg cleanup will optimize it at
16271 the end of the pass.
16272
162732024-02-08 Aldy Hernandez <aldyh@redhat.com>
16274
16275 PR tree-optimization/113735
16276 * value-relation.cc (equiv_oracle::add_equiv_to_block): Call
16277 limit_check().
16278
162792024-02-08 Georg-Johann Lay <avr@gjlay.de>
16280
16281 * config/avr/gen-avr-mmcu-specs.cc (struct McuInfo): New.
16282 (main, print_mcu, diagnose_mrodata_in_ram): Pass it down.
16283
162842024-02-08 H.J. Lu <hjl.tools@gmail.com>
16285
16286 PR target/113711
16287 PR target/113733
16288 * config/i386/constraints.md: List all constraints with j prefix.
16289 (j>): Change auto-dec to auto-inc in documentation.
16290 (je): Changed to a memory constraint with APX NDD TLS operand
16291 check.
16292 (jM): New memory constraint for APX NDD instructions.
16293 (jO): Likewise.
16294 * config/i386/i386-protos.h (x86_poff_operand_p): Removed.
16295 * config/i386/i386.cc (x86_poff_operand_p): Likewise.
16296 * config/i386/i386.md (*add<dwi>3_doubleword): Use rjO.
16297 (*add<mode>_1[SWI48]): Use je and jM.
16298 (addsi_1_zext): Use jM.
16299 (*addv<dwi>4_doubleword_1[DWI]): Likewise.
16300 (*sub<mode>_1[SWI]): Use jM.
16301 (@add<mode>3_cc_overflow_1[SWI]): Likewise.
16302 (*add<dwi>3_doubleword_cc_overflow_1): Use rjO.
16303 (*and<dwi>3_doubleword): Likewise.
16304 (*anddi_1): Use jM.
16305 (*andsi_1_zext): Likewise.
16306 (*and<mode>_1[SWI24]): Likewise.
16307 (*<code><dwi>3_doubleword[any_or]): Use rjO
16308 (*code<mode>_1[any_or SWI248]): Use jM.
16309 (*<code>si_1_zext[zero_extend + any_or]): Likewise.
16310 * config/i386/predicates.md (apx_ndd_memory_operand): New.
16311 (apx_ndd_add_memory_operand): Likewise.
16312
163132024-02-08 Georg-Johann Lay <avr@gjlay.de>
16314
16315 PR target/113824
16316 * config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4.
16317 * doc/avr-mmcu.texi: Rebuild.
16318
163192024-02-08 Tamar Christina <tamar.christina@arm.com>
16320
16321 PR tree-optimization/113808
16322 * tree-vect-loop.cc (vectorizable_live_operation): Don't cache the
16323 value cross iterations.
16324
163252024-02-08 Georg-Johann Lay <avr@gjlay.de>
16326
16327 * config/avr/gen-avr-mmcu-specs.cc (print_mcu) <*cpp_mcu>: Spec always
16328 defines __AVR_PM_BASE_ADDRESS__ if the core has it.
16329
163302024-02-08 Richard Biener <rguenther@suse.de>
16331
16332 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
16333 Revert last change to dr_may_alias_p.
16334
163352024-02-08 Georg-Johann Lay <avr@gjlay.de>
16336
16337 * config/avr/gen-avr-mmcu-specs.cc: Rename spec cc1_misc to
16338 cc1_rodata_in_ram. Rename spec link_misc to link_rodata_in_ram.
16339 Remove spec asm_misc.
16340 * config/avr/specs.h: Same.
16341
163422024-02-08 Pan Li <pan2.li@intel.com>
16343
16344 PR target/113766
16345 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make
16346 sure the c.arg_num is >= 2 before checking.
16347 (struct build_frm_base): Ditto.
16348 (struct narrow_alu_def): Ditto.
16349
163502024-02-07 Richard Biener <rguenther@suse.de>
16351
16352 PR tree-optimization/113796
16353 * tree-if-conv.cc (combine_blocks): Wipe range-info before
16354 replacing PHIs and inserting predicates.
16355
163562024-02-07 Roger Sayle <roger@nextmovesoftware.com>
16357 Uros Bizjak <ubizjak@gmail.com>
16358
16359 PR target/113690
16360 * config/i386/i386-features.cc (timode_convert_cst): New helper
16361 function to convert a TImode CONST_SCALAR_INT_P to a V1TImode
16362 CONST_VECTOR.
16363 (timode_scalar_chain::convert_op): Use timode_convert_cst.
16364 (timode_scalar_chain::convert_insn): Delete REG_EQUAL notes.
16365 Use timode_convert_cst.
16366
163672024-02-07 Victor Do Nascimento <victor.donascimento@arm.com>
16368
16369 * config/aarch64/aarch64-sys-regs.def: Copy from Binutils.
16370 * config/aarch64/aarch64.h (AARCH64_FL_AIE): New.
16371 (AARCH64_FL_DEBUGv8p9): Likewise.
16372 (AARCH64_FL_FGT2): Likewise.Likewise.
16373 (AARCH64_FL_ITE): Likewise.
16374 (AARCH64_FL_PFAR): Likewise.
16375 (AARCH64_FL_PMUv3_ICNTR): Likewise.
16376 (AARCH64_FL_PMUv3_SS): Likewise.
16377 (AARCH64_FL_PMUv3p9): Likewise.
16378 (AARCH64_FL_RASv2): Likewise.
16379 (AARCH64_FL_S1PIE): Likewise.
16380 (AARCH64_FL_S1POE): Likewise.
16381 (AARCH64_FL_S2PIE): Likewise.
16382 (AARCH64_FL_S2POE): Likewise.
16383 (AARCH64_FL_SCTLR2): Likewise.
16384 (AARCH64_FL_SEBEP): Likewise.
16385 (AARCH64_FL_SPE_FDS): Likewise.
16386 (AARCH64_FL_TCR2): Likewise.
16387
163882024-02-07 Richard Biener <rguenther@suse.de>
16389
16390 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences):
16391 Only check whether reads are in-bound in places that are not safe.
16392 Fix dependence check. Add missing newline. Clarify comments.
16393
163942024-02-07 Tamar Christina <tamar.christina@arm.com>
16395
16396 PR tree-optimization/113750
16397 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Check
16398 for single predecessor when doing early break vect.
16399 * tree-vect-loop.cc (move_early_exit_stmts): Get gsi at the start but
16400 after labels.
16401
164022024-02-07 Tamar Christina <tamar.christina@arm.com>
16403
16404 PR tree-optimization/113731
16405 * gimple-iterator.cc (gsi_move_before): Take new parameter for update
16406 method.
16407 * gimple-iterator.h (gsi_move_before): Default new param to
16408 GSI_SAME_STMT.
16409 * tree-vect-loop.cc (move_early_exit_stmts): Call gsi_move_before with
16410 GSI_NEW_STMT.
16411
164122024-02-07 Jakub Jelinek <jakub@redhat.com>
16413
16414 PR tree-optimization/113756
16415 * range-op.cc (update_known_bitmask): For GIMPLE_UNARY_RHS,
16416 use TYPE_SIGN (lh.type ()) instead of sign for widest_int::from
16417 of lh_bits value and mask.
16418
164192024-02-07 Jakub Jelinek <jakub@redhat.com>
16420
16421 PR tree-optimization/113753
16422 * wide-int.cc (wi::mul_internal): Unpack op1val and op2val with
16423 UNSIGNED rather than SIGNED. If high or needs_overflow and prec is
16424 not a multiple of HOST_BITS_PER_WIDE_INT, shift left bits above prec
16425 so that they start with r[half_blocks_needed] lowest bit. Fix up
16426 computation of top mask for SIGNED.
16427
164282024-02-07 Pan Li <pan2.li@intel.com>
16429
16430 PR target/113766
16431 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): Adjust
16432 the signature of func.
16433 * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): Ditto.
16434 * config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin): Make
16435 overloaded func with empty args error.
16436
164372024-02-06 H.J. Lu <hjl.tools@gmail.com>
16438
16439 PR target/113689
16440 * config/i386/i386.cc (x86_64_select_profile_regnum): Return
16441 R10_REG after sorry.
16442
164432024-02-06 Andrew Carlotti <andrew.carlotti@arm.com>
16444
16445 * config/aarch64/aarch64.cc (aarch64_mangle_decl_assembler_name):
16446 Move before new caller, and add ".default" suffix.
16447 (get_suffixed_assembler_name): New.
16448 (make_resolver_func): Use get_suffixed_assembler_name.
16449 (aarch64_generate_version_dispatcher_body): Redo name mangling.
16450
164512024-02-06 Jakub Jelinek <jakub@redhat.com>
16452
16453 PR target/113763
16454 * config/aarch64/aarch64.cc (aarch64_output_sme_zero_za): Change tiles
16455 element from std::pair<unsigned int, char> to an unnamed struct.
16456 Adjust uses of tile range variable.
16457
164582024-02-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16459
16460 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Fix inifinite compilation.
16461 (pre_vsetvl::remove_vsetvl_pre_insns): Ditto.
16462
164632024-02-06 Jakub Jelinek <jakub@redhat.com>
16464
16465 PR sanitizer/110676
16466 * gimple-fold.cc (gimple_fold_builtin_strlen): For -fsanitize=address
16467 reset maxlen to sizetype maximum.
16468
164692024-02-06 Jakub Jelinek <jakub@redhat.com>
16470
16471 PR tree-optimization/113736
16472 * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use
16473 var's address space for MEM_REF or VIEW_CONVERT_EXPRs.
16474
164752024-02-06 Jakub Jelinek <jakub@redhat.com>
16476
16477 PR tree-optimization/113759
16478 * tree-ssa-math-opts.cc (convert_mult_to_widen): If actual_precision
16479 or from_unsignedN differs from properties of typeN, update typeN
16480 to build_nonstandard_integer_type. If TREE_TYPE (rhsN) is not
16481 uselessly convertible to typeN, convert it using fold_convert or
16482 build_and_insert_cast depending on if rhsN is INTEGER_CST or not.
16483 (convert_plusminus_to_widen): Likewise.
16484
164852024-02-06 Tejas Belagod <tejas.belagod@arm.com>
16486
16487 PR target/112577
16488 * config/aarch64/aarch64.cc (aarch64_class_max_nregs): Handle 64-bit
16489 vector structure modes correctly.
16490
164912024-02-05 Christoph Müllner <christoph.muellner@vrull.eu>
16492
16493 * config/riscv/thead.cc (th_print_operand_address): Fix compiler
16494 warning.
16495
164962024-02-05 H.J. Lu <hjl.tools@gmail.com>
16497
16498 PR target/113689
16499 * config/i386/i386.cc (x86_64_select_profile_regnum): New.
16500 (x86_function_profiler): Call x86_64_select_profile_regnum to
16501 get a scratch register for large model profiling.
16502
165032024-02-05 Richard Ball <richard.ball@arm.com>
16504
16505 * config/arm/arm.cc (arm_output_mi_thunk): Emit
16506 insn for bti_c when bti is enabled.
16507
165082024-02-05 Xi Ruoyao <xry111@xry111.site>
16509
16510 * config/mips/mips-msa.md (neg<mode:MSA>2): Add missing mode for
16511 neg.
16512
165132024-02-05 Xi Ruoyao <xry111@xry111.site>
16514
16515 * config/mips/mips-msa.md (elmsgnbit): New define_mode_attr.
16516 (neg<mode>2): Change the mode iterator from MSA to IMSA because
16517 in FP arithmetic we cannot use (0 - x) for -x.
16518 (neg<mode>2): New define_insn to implement FP vector negation,
16519 using a bnegi instruction to negate the sign bit.
16520
165212024-02-05 Richard Biener <rguenther@suse.de>
16522
16523 PR tree-optimization/113707
16524 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): After
16525 checking the avail set treat out-of-region defines as
16526 available.
16527
165282024-02-05 Richard Biener <rguenther@suse.de>
16529
16530 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Use
16531 the default mode when building a pointer.
16532
165332024-02-05 Jakub Jelinek <jakub@redhat.com>
16534
16535 PR tree-optimization/113737
16536 * gimple-lower-bitint.cc (gimple_lower_bitint): If GIMPLE_SWITCH
16537 has just a single label, remove it and make single successor edge
16538 EDGE_FALLTHRU.
16539
165402024-02-05 Jakub Jelinek <jakub@redhat.com>
16541
16542 PR target/113059
16543 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper):
16544 Remove REG_DEAD/REG_UNUSED notes at the end of the pass before
16545 df_analyze call.
16546
165472024-02-05 Richard Biener <rguenther@suse.de>
16548
16549 PR target/113255
16550 * config/i386/i386-expand.cc
16551 (expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves):
16552 Use a new pseudo for the skipped number of bytes.
16553
165542024-02-05 Monk Chiang <monk.chiang@sifive.com>
16555
16556 * config/riscv/riscv-cores.def: Add sifive-p450, sifive-p670.
16557 * doc/invoke.texi (RISC-V Options): Add sifive-p450,
16558 sifive-p670.
16559
165602024-02-05 Monk Chiang <monk.chiang@sifive.com>
16561
16562 * config/riscv/riscv.md: Include sifive-p400.md.
16563 * config/riscv/sifive-p400.md: New file.
16564 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
16565 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
16566 Add sifive_p400.
16567 * config/riscv/riscv.cc (sifive_p400_tune_info): New.
16568 * config/riscv/riscv.h (TARGET_SFB_ALU): Update.
16569 * doc/invoke.texi (RISC-V Options): Add sifive-p400-series
16570
165712024-02-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16572
16573 * config/xtensa/xtensa.md (*eqne_zero_masked_bits):
16574 Add missing ":SI" to the match_operator.
16575
165762024-02-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
16577
16578 * config/xtensa/xtensa.md (SHI): New mode iterator.
16579 (2 split patterns related to constsynth):
16580 Change to also accept HImode operands.
16581
165822024-02-04 Jeff Law <jlaw@ventanamicro.com>
16583
16584 * config/riscv/riscv.cc (riscv_rtx_costs): Handle SUBREG and REG
16585 similarly.
16586
165872024-02-04 Xi Ruoyao <xry111@xry111.site>
16588
16589 * config/loongarch/lsx.md (neg<mode:FLSX>2): Remove the
16590 incorrect expand.
16591 * config/loongarch/simd.md (simdfmt_as_i): New define_mode_attr.
16592 (elmsgnbit): Likewise.
16593 (neg<mode:FVEC>2): New define_insn.
16594 * config/loongarch/lasx.md (negv4df2, negv8sf2): Remove as they
16595 are now instantiated in simd.md.
16596
165972024-02-04 Xi Ruoyao <xry111@xry111.site>
16598
16599 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Do not
16600 use LSX_SUPPORTED_MODE_P or LASX_SUPPORTED_MODE_P if mode is
16601 MAX_MACHINE_MODE.
16602
166032024-02-04 Li Wei <liwei@loongson.cn>
16604
16605 * config/loongarch/loongarch.cc (loongarch_expand_vselect): Adjust.
16606 (loongarch_expand_vselect_vconcat): Ditto.
16607 (loongarch_try_expand_lsx_vshuf_const): New, use vshuf to implement
16608 all 128-bit constant permutation situations.
16609 (loongarch_expand_lsx_shuffle): Adjust and rename function name.
16610 (loongarch_is_imm_set_shuffle): Renamed function name.
16611 (loongarch_expand_vec_perm_even_odd): Function forward declaration.
16612 (loongarch_expand_vec_perm_even_odd_1): Add implement for 128-bit
16613 extract-even and extract-odd permutations.
16614 (loongarch_is_odd_extraction): Delete.
16615 (loongarch_is_even_extraction): Ditto.
16616 (loongarch_expand_vec_perm_const): Adjust.
16617
166182024-02-03 Jakub Jelinek <jakub@redhat.com>
16619
16620 PR middle-end/113722
16621 * wide-int.cc (wi::bswap_large): Rename third argument from
16622 len to xlen and adjust use in safe_uhwi. Add len variable, set
16623 it to BLOCKS_NEEDED (precision) and use it for clearing of val
16624 and as canonize argument. Clear val using memset instead of
16625 a loop.
16626
166272024-02-03 Jakub Jelinek <jakub@redhat.com>
16628
16629 * ggc-common.cc (gt_pch_save): Allow addr to be equal to
16630 mmi.preferred_base + mmi.size - sizeof (void *).
16631
166322024-02-03 Xi Ruoyao <xry111@xry111.site>
16633
16634 * config/loongarch/loongarch-def.h (abi_minimal_isa): Declare.
16635 * config/loongarch/loongarch-opts.cc (abi_minimal_isa): Remove
16636 the ODR-violating locale declaration.
16637
166382024-02-02 Tamar Christina <tamar.christina@arm.com>
16639
16640 PR tree-optimization/113588
16641 PR tree-optimization/113467
16642 * tree-vect-data-refs.cc
16643 (vect_analyze_data_ref_dependence): Choose correct dest and fix checks.
16644 (vect_analyze_early_break_dependences): Update comments.
16645
166462024-02-02 John David Anglin <danglin@gcc.gnu.org>
16647
16648 PR target/59778
16649 * config/pa/pa.cc (enum pa_builtins): Add PA_BUILTIN_GET_FPSR
16650 and PA_BUILTIN_SET_FPSR builtins.
16651 * (pa_builtins_icode): Declare.
16652 * (def_builtin, pa_fpu_init_builtins): New.
16653 * (pa_init_builtins): Initialize FPU builtins.
16654 * (pa_builtin_decl, pa_expand_builtin_1): New.
16655 * (pa_expand_builtin): Handle PA_BUILTIN_GET_FPSR and
16656 PA_BUILTIN_SET_FPSR builtins.
16657 * (pa_atomic_assign_expand_fenv): New.
16658 * config/pa/pa.md (UNSPECV_GET_FPSR, UNSPECV_SET_FPSR): New
16659 UNSPECV constants.
16660 (get_fpsr, put_fpsr): New expanders.
16661 (get_fpsr_32, get_fpsr_64, set_fpsr_32, set_fpsr_64): New
16662 insn patterns.
16663
166642024-02-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16665
16666 PR target/113697
16667 * config/riscv/riscv-v.cc (expand_reduction): Pass VLMAX avl to scalar move.
16668
166692024-02-02 Jonathan Wakely <jwakely@redhat.com>
16670
16671 * doc/extend.texi (Common Type Attributes): Fix typo in
16672 description of hardbool.
16673
166742024-02-02 Jakub Jelinek <jakub@redhat.com>
16675
16676 PR tree-optimization/113692
16677 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle casts
16678 from large/huge BITINT_TYPEs to POINTER_TYPE/REFERENCE_TYPE as
16679 final_cast_p.
16680
166812024-02-02 Jakub Jelinek <jakub@redhat.com>
16682
16683 PR middle-end/113699
16684 * gimple-lower-bitint.cc (bitint_large_huge::lower_asm): Handle
16685 uninitialized large/huge _BitInt SSA_NAME inputs.
16686
166872024-02-02 Jakub Jelinek <jakub@redhat.com>
16688
16689 PR middle-end/113705
16690 * tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use wide_int_from
16691 around wi::to_wide in order to compare value in prec precision.
16692
166932024-02-02 Lehua Ding <lehua.ding@rivai.ai>
16694
16695 Revert:
16696 2024-02-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16697
16698 * config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation.
16699
167002024-02-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16701
16702 * config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation.
16703
167042024-02-02 Pan Li <pan2.li@intel.com>
16705
16706 * config/riscv/riscv.cc (riscv_get_arg_info): Cleanup comments.
16707 (riscv_pass_by_reference): Ditto.
16708 (riscv_fntype_abi): Ditto.
16709
167102024-02-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16711
16712 * config/riscv/riscv-vsetvl.cc (vsetvl_pre_insn_p): New function.
16713 (pre_vsetvl::cleaup): Remove vsetvl_pre.
16714 (pre_vsetvl::remove_vsetvl_pre_insns): New function.
16715
167162024-02-02 Jiahao Xu <xujiahao@loongson.cn>
16717
16718 * config/loongarch/larchintrin.h
16719 (__frecipe_s): Update function return type.
16720 (__frecipe_d): Ditto.
16721 (__frsqrte_s): Ditto.
16722 (__frsqrte_d): Ditto.
16723
167242024-02-02 Li Wei <liwei@loongson.cn>
16725
16726 * config/loongarch/loongarch.cc (loongarch_multiply_add_p): New.
16727 (loongarch_vector_costs::add_stmt_cost): Adjust.
16728
167292024-02-02 Xi Ruoyao <xry111@xry111.site>
16730
16731 * config/loongarch/loongarch.md (unspec): Add
16732 UNSPEC_LA_PCREL_64_PART1 and UNSPEC_LA_PCREL_64_PART2.
16733 (la_pcrel64_two_parts): New define_insn.
16734 * config/loongarch/loongarch.cc (loongarch_tls_symbol): Fix a
16735 typo in the comment.
16736 (loongarch_call_tls_get_addr): If -mcmodel=extreme
16737 -mexplicit-relocs={always,auto}, use la_pcrel64_two_parts for
16738 addressing the TLS symbol and __tls_get_addr. Emit an REG_EQUAL
16739 note to allow CSE addressing __tls_get_addr.
16740 (loongarch_legitimize_tls_address): If -mcmodel=extreme
16741 -mexplicit-relocs={always,auto}, address TLS IE symbols with
16742 la_pcrel64_two_parts.
16743 (loongarch_split_symbol): If -mcmodel=extreme
16744 -mexplicit-relocs={always,auto}, address symbols with
16745 la_pcrel64_two_parts.
16746 (loongarch_output_mi_thunk): Clean up unreachable code. If
16747 -mcmodel=extreme -mexplicit-relocs={always,auto}, address the MI
16748 thunks with la_pcrel64_two_parts.
16749
167502024-02-02 Lulu Cheng <chenglulu@loongson.cn>
16751
16752 * config/loongarch/loongarch.cc (loongarch_call_tls_get_addr):
16753 Add support for call36.
16754
167552024-02-02 Lulu Cheng <chenglulu@loongson.cn>
16756
16757 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
16758 When the code model of the symbol is extreme and -mexplicit-relocs=auto,
16759 the macro instruction loading symbol address is not applicable.
16760 (loongarch_call_tls_get_addr): Adjust code.
16761 (loongarch_legitimize_tls_address): Likewise.
16762
167632024-02-02 Lulu Cheng <chenglulu@loongson.cn>
16764
16765 * config/loongarch/loongarch-protos.h (loongarch_symbol_extreme_p):
16766 Add function declaration.
16767 * config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
16768 For SYMBOL_PCREL64, non-zero addend of "la.local $rd,$rt,sym+addend"
16769 is not allowed
16770 (loongarch_load_tls): Added macro support in extreme mode.
16771 (loongarch_call_tls_get_addr): Likewise.
16772 (loongarch_legitimize_tls_address): Likewise.
16773 (loongarch_force_address): Likewise.
16774 (loongarch_legitimize_move): Likewise.
16775 (loongarch_output_mi_thunk): Likewise.
16776 (loongarch_option_override_internal): Remove the code that detects
16777 explicit relocs status.
16778 (loongarch_handle_model_attribute): Likewise.
16779 * config/loongarch/loongarch.md (movdi_symbolic_off64): New template.
16780 * config/loongarch/predicates.md (symbolic_off64_operand): New predicate.
16781 (symbolic_off64_or_reg_operand): Likewise.
16782
167832024-02-02 Lulu Cheng <chenglulu@loongson.cn>
16784
16785 * config/loongarch/loongarch.cc (loongarch_load_tls):
16786 Load all types of tls symbols through one function.
16787 (loongarch_got_load_tls_gd): Delete.
16788 (loongarch_got_load_tls_ld): Delete.
16789 (loongarch_got_load_tls_ie): Delete.
16790 (loongarch_got_load_tls_le): Delete.
16791 (loongarch_call_tls_get_addr): Modify the called function name.
16792 (loongarch_legitimize_tls_address): Likewise.
16793 * config/loongarch/loongarch.md (@got_load_tls_gd<mode>): Delete.
16794 (@load_tls<mode>): New template.
16795 (@got_load_tls_ld<mode>): Delete.
16796 (@got_load_tls_le<mode>): Delete.
16797 (@got_load_tls_ie<mode>): Delete.
16798
167992024-02-02 Lulu Cheng <chenglulu@loongson.cn>
16800
16801 * config/loongarch/loongarch.cc (mem_shadd_or_shadd_rtx_p): New function.
16802 (loongarch_legitimize_address): Add logical transformation code.
16803
168042024-02-01 Marek Polacek <polacek@redhat.com>
16805
16806 * doc/invoke.texi: Update -Wdangling-reference documentation.
16807
168082024-02-01 Uros Bizjak <ubizjak@gmail.com>
16809
16810 PR target/113701
16811 * config/i386/i386.md (*cmp<dwi>_doubleword):
16812 Do not force SUBREG pieces to pseudos.
16813
168142024-02-01 John David Anglin <danglin@gcc.gnu.org>
16815
16816 * config/pa/pa.md (atomic_storedi_1): Fix bug in
16817 alternative 1.
16818
168192024-02-01 Georg-Johann Lay <avr@gjlay.de>
16820
16821 * config/avr/avr.cc: Tabify.
16822
168232024-02-01 Richard Ball <richard.ball@arm.com>
16824
16825 PR tree-optimization/111268
16826 * tree-vect-slp.cc (vectorizable_slp_permutation_1):
16827 Add variable-length check for vector input arguments
16828 to a function.
16829
168302024-02-01 Thomas Schwinge <tschwinge@baylibre.com>
16831
16832 * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Don't
16833 hard-code number of SGPR/VGPR/AVGPR registers.
16834 * config/gcn/gcn.h: Add a 'STATIC_ASSERT's for number of
16835 SGPR/VGPR/AVGPR registers.
16836
168372024-02-01 Monk Chiang <monk.chiang@sifive.com>
16838
16839 * config/riscv/riscv.md: Add "fcvt_i2f", "fcvt_f2i" type
16840 attribute, and include sifive-p600.md.
16841 * config/riscv/generic-ooo.md: Update type attribute.
16842 * config/riscv/generic.md: Update type attribute.
16843 * config/riscv/sifive-7.md: Update type attribute.
16844 * config/riscv/sifive-p600.md: New file.
16845 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
16846 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
16847 Add sifive_p600.
16848 * config/riscv/riscv.cc (sifive_p600_tune_info): New.
16849 * config/riscv/riscv.h (TARGET_SFB_ALU): Update.
16850 * doc/invoke.texi (RISC-V Options): Add sifive-p600-series
16851
168522024-02-01 Monk Chiang <monk.chiang@sifive.com>
16853
16854 * common/config/riscv/riscv-common.cc: Add Za64rs, Za128rs,
16855 Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b items.
16856 * config/riscv/riscv.opt: New macro for 7 new unprivileged
16857 extensions.
16858 * doc/invoke.texi (RISC-V Options): Add Za64rs, Za128rs,
16859 Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b extensions.
16860
168612024-02-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
16862
16863 * config/sol2.h (LIBASAN_EARLY_SPEC): Add -z now unless
16864 -static-libasan. Add missing whitespace.
16865
168662024-02-01 Thomas Schwinge <tschwinge@baylibre.com>
16867
16868 * config/gcn/gcn.md (FIRST_SGPR_REG, LAST_SGPR_REG)
16869 (FIRST_VGPR_REG, LAST_VGPR_REG, FIRST_AVGPR_REG, LAST_AVGPR_REG):
16870 Don't 'define_constants'.
16871
168722024-02-01 Thomas Schwinge <tschwinge@baylibre.com>
16873
16874 * config/gcn/gcn.h (SGPR_OR_VGPR_REGNO_P): Remove.
16875
168762024-02-01 Thomas Schwinge <tschwinge@baylibre.com>
16877
16878 * config/gcn/gcn.md (sync_compare_and_swap<mode>_lds_insn)
16879 [TARGET_RDNA3]: Adjust.
16880
168812024-02-01 Richard Biener <rguenther@suse.de>
16882
16883 PR tree-optimization/113693
16884 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Honor avail
16885 data when available.
16886
168872024-02-01 Jakub Jelinek <jakub@redhat.com>
16888 Jason Merrill <jason@redhat.com>
16889
16890 PR c++/113531
16891 * gimple-low.cc (lower_stmt): Remove .ASAN_MARK calls
16892 on variables which were promoted to TREE_STATIC.
16893
168942024-02-01 Roger Sayle <roger@nextmovesoftware.com>
16895 Richard Biener <rguenther@suse.de>
16896
16897 PR target/113560
16898 * tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use range
16899 information via tree_non_zero_bits to check if this operand
16900 is suitably extended for a widening (or highpart) multiplication.
16901 (convert_mult_to_widen): Insert explicit casts if the RHS or LHS
16902 isn't already of the claimed type.
16903
169042024-02-01 Edwin Lu <ewlu@rivosinc.com>
16905
16906 Revert:
16907 2024-02-01 Edwin Lu <ewlu@rivosinc.com>
16908
16909 * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
16910 (generic_ooo_branch): ditto
16911 * config/riscv/generic.md (generic_sfb_alu): ditto
16912 (generic_fmul_half): ditto
16913 * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
16914 * config/riscv/sifive-7.md (sifive_7_hfma):Add reservation
16915 (sifive_7_popcount): ditto
16916 * config/riscv/vector.md: change rdfrm to fmove
16917 * config/riscv/zc.md: change pushpop to load/store
16918
169192024-02-01 Edwin Lu <ewlu@rivosinc.com>
16920
16921 Revert:
16922 2024-02-01 Edwin Lu <ewlu@rivosinc.com>
16923 Robin Dapp <rdapp.gcc@gmail.com>
16924
16925 * config/riscv/generic-ooo.md (generic_ooo): Move reservation
16926 (generic_ooo_vec_load): ditto
16927 (generic_ooo_vec_store): ditto
16928 (generic_ooo_vec_loadstore_seg): ditto
16929 (generic_ooo_vec_alu): ditto
16930 (generic_ooo_vec_fcmp): ditto
16931 (generic_ooo_vec_imul): ditto
16932 (generic_ooo_vec_fadd): ditto
16933 (generic_ooo_vec_fmul): ditto
16934 (generic_ooo_crypto): ditto
16935 (generic_ooo_perm): ditto
16936 (generic_ooo_vec_reduction): ditto
16937 (generic_ooo_vec_ordered_reduction): ditto
16938 (generic_ooo_vec_idiv): ditto
16939 (generic_ooo_vec_float_divsqrt): ditto
16940 (generic_ooo_vec_mask): ditto
16941 (generic_ooo_vec_vesetvl): ditto
16942 (generic_ooo_vec_setrm): ditto
16943 (generic_ooo_vec_readlen): ditto
16944 * config/riscv/riscv.md: include generic-vector-ooo
16945 * config/riscv/generic-vector-ooo.md: New file. to here
16946
169472024-02-01 Edwin Lu <ewlu@rivosinc.com>
16948
16949 Revert:
16950 2024-02-01 Edwin Lu <ewlu@rivosinc.com>
16951
16952 * config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert
16953
169542024-02-01 Edwin Lu <ewlu@rivosinc.com>
16955
16956 * config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert
16957
169582024-02-01 Edwin Lu <ewlu@rivosinc.com>
16959 Robin Dapp <rdapp.gcc@gmail.com>
16960
16961 * config/riscv/generic-ooo.md (generic_ooo): Move reservation
16962 (generic_ooo_vec_load): ditto
16963 (generic_ooo_vec_store): ditto
16964 (generic_ooo_vec_loadstore_seg): ditto
16965 (generic_ooo_vec_alu): ditto
16966 (generic_ooo_vec_fcmp): ditto
16967 (generic_ooo_vec_imul): ditto
16968 (generic_ooo_vec_fadd): ditto
16969 (generic_ooo_vec_fmul): ditto
16970 (generic_ooo_crypto): ditto
16971 (generic_ooo_perm): ditto
16972 (generic_ooo_vec_reduction): ditto
16973 (generic_ooo_vec_ordered_reduction): ditto
16974 (generic_ooo_vec_idiv): ditto
16975 (generic_ooo_vec_float_divsqrt): ditto
16976 (generic_ooo_vec_mask): ditto
16977 (generic_ooo_vec_vesetvl): ditto
16978 (generic_ooo_vec_setrm): ditto
16979 (generic_ooo_vec_readlen): ditto
16980 * config/riscv/riscv.md: include generic-vector-ooo
16981 * config/riscv/generic-vector-ooo.md: New file. to here
16982
169832024-02-01 Edwin Lu <ewlu@rivosinc.com>
16984
16985 * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation
16986 (generic_ooo_branch): ditto
16987 * config/riscv/generic.md (generic_sfb_alu): ditto
16988 (generic_fmul_half): ditto
16989 * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types
16990 * config/riscv/sifive-7.md (sifive_7_hfma):Add reservation
16991 (sifive_7_popcount): ditto
16992 * config/riscv/vector.md: change rdfrm to fmove
16993 * config/riscv/zc.md: change pushpop to load/store
16994
169952024-02-01 Andrew Pinski <quic_apinski@quicinc.com>
16996
16997 PR target/113657
16998 * config/aarch64/aarch64-simd.md (split for movv8di):
16999 For strict aligned mode, use DImode instead of TImode.
17000
170012024-01-31 Robin Dapp <rdapp@ventanamicro.com>
17002
17003 PR middle-end/113607
17004 * match.pd: Make sure else values match when folding a
17005 vec_cond into a conditional operation.
17006
170072024-01-31 Marek Polacek <polacek@redhat.com>
17008
17009 * doc/invoke.texi: Mention that -fconcepts-ts was deprecated in GCC 14.
17010
170112024-01-31 Tamar Christina <tamar.christina@arm.com>
17012 Matthew Malcomson <matthew.malcomson@arm.com>
17013
17014 PR sanitizer/112644
17015 * asan.h (asan_intercepted_p): Incercept memset, memmove, memcpy and
17016 memcmp.
17017 * builtins.cc (expand_builtin): Include HWASAN when checking for
17018 builtin inlining.
17019
170202024-01-31 Richard Biener <rguenther@suse.de>
17021
17022 PR middle-end/110176
17023 * match.pd (zext (bool) <= (int) 4294967295u): Make sure
17024 to match INTEGER_CST only without outstanding conversion.
17025
170262024-01-31 Alex Coplan <alex.coplan@arm.com>
17027
17028 PR target/111677
17029 * config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use
17030 V16QImode for the full 16-byte FPR saves in the vector PCS case.
17031
170322024-01-31 Richard Biener <rguenther@suse.de>
17033
17034 PR tree-optimization/111444
17035 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Do not use
17036 vn_reference_lookup_2 when optimistically skipping may-defs.
17037
170382024-01-31 Richard Biener <rguenther@suse.de>
17039
17040 PR tree-optimization/113630
17041 * tree-ssa-pre.cc (compute_avail): Avoid registering a
17042 reference with a representation with not matching base
17043 access size.
17044
170452024-01-31 Jakub Jelinek <jakub@redhat.com>
17046
17047 PR rtl-optimization/113656
17048 * simplify-rtx.cc (simplify_context::simplify_unary_operation_1)
17049 <case FLOAT_TRUNCATE>: Fix up last argument to simplify_gen_unary.
17050
170512024-01-31 Jakub Jelinek <jakub@redhat.com>
17052
17053 PR debug/113637
17054 * dwarf2out.cc (loc_list_from_tree_1): Assume integral types
17055 with BLKmode are larger than DWARF2_ADDR_SIZE.
17056
170572024-01-31 Jakub Jelinek <jakub@redhat.com>
17058
17059 PR tree-optimization/113639
17060 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
17061 For VIEW_CONVERT_EXPR set rhs1 to its operand.
17062
170632024-01-31 Richard Biener <rguenther@suse.de>
17064
17065 PR tree-optimization/113670
17066 * tree-vect-data-refs.cc (vect_check_gather_scatter):
17067 Make sure we can take the address of the reference base.
17068
170692024-01-31 Georg-Johann Lay <avr@gjlay.de>
17070
17071 * config/avr/avr-mcus.def: Add AVR64DU28, AVR64DU32, ATA5787,
17072 ATA5835, ATtiny64AUTO, ATA5700M322.
17073 * doc/avr-mmcu.texi: Rebuild.
17074
170752024-01-31 Alexandre Oliva <oliva@adacore.com>
17076
17077 PR debug/113394
17078 * ipa-strub.cc (build_ref_type_for): Drop nonaliased. Adjust
17079 caller.
17080
170812024-01-31 Alexandre Oliva <oliva@adacore.com>
17082
17083 PR middle-end/112917
17084 PR middle-end/113100
17085 * builtins.cc (expand_builtin_stack_address): Use
17086 STACK_ADDRESS_OFFSET.
17087 * doc/extend.texi (__builtin_stack_address): Adjust.
17088 * config/sparc/sparc.h (STACK_ADDRESS_OFFSET): Define.
17089 * doc/tm.texi.in (STACK_ADDRESS_OFFSET): Document.
17090 * doc/tm.texi: Rebuilt.
17091
170922024-01-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17093
17094 PR target/113495
17095 * config/riscv/riscv-vsetvl.cc (extract_single_source): Remove.
17096 (pre_vsetvl::compute_vsetvl_def_data): Fix compile time issue.
17097 (pre_vsetvl::compute_transparent): New function.
17098 (pre_vsetvl::compute_lcm_local_properties): Fix compile time time issue.
17099
171002024-01-30 Fangrui Song <maskray@google.com>
17101
17102 PR target/105576
17103 * config/i386/constraints.md: Define constraint "Ws".
17104 * doc/md.texi: Document it.
17105
171062024-01-30 Marek Polacek <polacek@redhat.com>
17107
17108 PR c++/110358
17109 PR c++/109640
17110 * doc/invoke.texi: Update -Wdangling-reference description.
17111
171122024-01-30 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17113
17114 * config/xtensa/constraints.md (R, T, U):
17115 Change define_constraint to define_memory_constraint.
17116 * config/xtensa/predicates.md (move_operand): Don't check that a
17117 constant pool operand size is a multiple of UNITS_PER_WORD.
17118 * config/xtensa/xtensa.cc
17119 (xtensa_lra_p, TARGET_LRA_P): Remove.
17120 (xtensa_emit_move_sequence): Remove "if (reload_in_progress)"
17121 clause as it can no longer be true.
17122 (fixup_subreg_mem): Drop function.
17123 (xtensa_output_integer_literal_parts): Consider 16-bit wide
17124 constants.
17125 (xtensa_legitimate_constant_p): Add short-circuit path for
17126 integer load instructions. Don't check that mode size is
17127 at least UNITS_PER_WORD.
17128 * config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p()
17129 rather reload_in_progress and reload_completed.
17130 (doloop_end): Drop operand 2.
17131 (movhi_internal): Add alternative loading constant from a
17132 literal pool.
17133 (define_split for DI register_operand): Don't limit to
17134 !TARGET_AUTO_LITPOOLS.
17135 * config/xtensa/xtensa.opt (mlra): Change to no effect.
17136
171372024-01-30 Pan Li <pan2.li@intel.com>
17138
17139 * config/riscv/riscv.cc (riscv_v_vls_mode_aggregate_gpr_count): New function to
17140 calculate the gpr count required by vls mode.
17141 (riscv_v_vls_to_gpr_mode): New function convert vls mode to gpr mode.
17142 (riscv_pass_vls_aggregate_in_gpr): New function to return the rtx of gpr
17143 for vls mode.
17144 (riscv_get_arg_info): Add vls mode handling.
17145 (riscv_pass_by_reference): Return false if arg info has no zero gpr count.
17146
171472024-01-30 Richard Biener <rguenther@suse.de>
17148
17149 PR tree-optimization/113659
17150 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
17151 Handle main exit without virtual use.
17152
171532024-01-30 Christoph Müllner <christoph.muellner@vrull.eu>
17154
17155 * config/riscv/riscv.md: Move UNSPEC_XTHEADFMV* to unspec enum.
17156
171572024-01-30 Iain Sandoe <iain@sandoe.co.uk>
17158
17159 PR libgcc/113403
17160 * config/darwin.h (DARWIN_SHARED_WEAK_ADDS, DARWIN_WEAK_CRTS): New.
17161 (REAL_LIBGCC_SPEC): Move weak CRT handling to separate spec.
17162 * config/i386/darwin.h (DARWIN_HEAP_T_LIB): New.
17163 * config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): New.
17164 * config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): New.
17165 * config/rs6000/darwin.h (DARWIN_HEAP_T_LIB): New.
17166
171672024-01-30 Richard Sandiford <richard.sandiford@arm.com>
17168
17169 PR target/113623
17170 * config/aarch64/aarch64-early-ra.cc (early_ra::preprocess_insns):
17171 Mark all registers that occur in addresses as needing a GPR.
17172
171732024-01-30 Richard Sandiford <richard.sandiford@arm.com>
17174
17175 PR target/113636
17176 * config/aarch64/aarch64-early-ra.cc (early_ra::replace_regs): Take
17177 the containing insn as an extra parameter. Reset debug instructions
17178 if they reference a register that is no longer used by real insns.
17179 (early_ra::apply_allocation): Update calls accordingly.
17180
171812024-01-30 Jakub Jelinek <jakub@redhat.com>
17182
17183 PR tree-optimization/113603
17184 * tree-ssa-strlen.cc (strlen_pass::handle_store): After
17185 count_nonzero_bytes call refetch si using get_strinfo in case it
17186 has been unshared in the meantime.
17187
171882024-01-30 Jakub Jelinek <jakub@redhat.com>
17189
17190 PR middle-end/101195
17191 * except.cc (expand_builtin_eh_return_data_regno): If which doesn't
17192 fit into unsigned HOST_WIDE_INT, return constm1_rtx.
17193
171942024-01-30 Jin Ma <jinma@linux.alibaba.com>
17195
17196 * config/riscv/thead.cc (th_print_operand_address): Change %ld
17197 to %lld.
17198
171992024-01-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
17200 Manolis Tsamis <manolis.tsamis@vrull.eu>
17201 Philipp Tomsich <philipp.tomsich@vrull.eu>
17202
17203 * config/aarch64/aarch64-ldpstp.md: Remove unused mode.
17204 * config/aarch64/aarch64-protos.h (aarch64_operands_ok_for_ldpstp):
17205 Likewise.
17206 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
17207 Call on framework moved later.
17208
172092024-01-29 Jose E. Marchesi <jose.marchesi@oracle.com>
17210
17211 * config/bpf/bpf.cc (bpf_expand_epilogue): Do not emit a return
17212 instruction in naked function epilogues.
17213
172142024-01-29 YunQiang Su <syq@gcc.gnu.org>
17215
17216 PR target/113655
17217 * configure.ac: Fix typo gcc_cv_as_mips_explicit should be
17218 gcc_cv_as_mips_explicit_relocs.
17219 * configure: Regnerated.
17220
172212024-01-29 Matthieu Longo <matthieu.longo@arm.com>
17222
17223 PR target/108933
17224 * config/arm/arm.md (arm_rev16si2): Convert to define_insn.
17225 Correct generated RTL.
17226 (arm_rev16si2_alt1): Correctly handle conditional execution.
17227 (arm_rev16si2_alt2): Likewise.
17228
172292024-01-29 Richard Biener <rguenther@suse.de>
17230
17231 PR middle-end/113622
17232 * expr.cc (expand_assignment): Spill hard registers if
17233 we index them with a variable offset.
17234
172352024-01-29 Richard Biener <rguenther@suse.de>
17236
17237 PR middle-end/113622
17238 * gimple-isel.cc (gimple_expand_vec_set_extract_expr):
17239 Also allow DECL_HARD_REGISTER variables.
17240
172412024-01-29 Alex Coplan <alex.coplan@arm.com>
17242
17243 PR target/113616
17244 * config/aarch64/aarch64-ldp-fusion.cc (fixup_debug_uses_trailing_add):
17245 Use iterate_safely when iterating over debug uses.
17246 (fixup_debug_uses): Likewise.
17247 (ldp_bb_info::cleanup_tombstones): Use iterate_safely to iterate
17248 over nondebug insns instead of manually maintaining the next insn.
17249 * iterator-utils.h (class safe_iterator): New.
17250 (iterate_safely): New.
17251
172522024-01-29 H.J. Lu <hjl.tools@gmail.com>
17253
17254 PR target/38534
17255 * config/i386/i386-options.cc (ix86_set_func_type): Save
17256 callee-saved registers in noreturn functions for -O0/-Og.
17257
172582024-01-29 Tobias Burnus <tburnus@baylibre.com>
17259
17260 PR target/113615
17261 * config/gcn/gcn-valu.md (fold_left_plus_<mode>): Only
17262 define for !TARGET_RDNA2_PLUS.
17263
172642024-01-29 Richard Sandiford <richard.sandiford@arm.com>
17265
17266 PR target/113281
17267 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove
17268 workaround for right shifts.
17269 (vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR.
17270 (vect_determine_precisions_from_range): Be more selective about
17271 which codes can be narrowed based on their input and output ranges.
17272 For shifts, require at least one more bit of precision than the
17273 maximum shift amount.
17274
172752024-01-29 Tobias Burnus <tburnus@baylibre.com>
17276
17277 * config/nvptx/nvptx.opt (march-map=): Add sm_89 and sm_90a.
17278
172792024-01-29 Tobias Burnus <tburnus@baylibre.com>
17280
17281 * doc/install.texi (amdgcn): Recommend LLVM 15+ and newlib 4.4+,
17282 but keep requiring only newlib 4.3+ and, if gfx1100 is disabled,
17283 LLVM 13.0.1+.
17284
172852024-01-29 Tobias Burnus <tburnus@baylibre.com>
17286
17287 PR other/111966
17288 * config/gcn/mkoffload.cc (SET_XNACK_UNSET, TEST_SRAM_ECC_UNSET): New.
17289 (SET_SRAM_ECC_UNSUPPORTED): Renamed to ...
17290 (SET_SRAM_ECC_UNSET): ... this.
17291 (copy_early_debug_info): Remove gfx900 special case, now handled as
17292 part of the generic handling.
17293 (main): Update SRAM_ECC and XNACK for the -march as done in gcn-hsa.h.
17294
172952024-01-29 Jakub Jelinek <jakub@redhat.com>
17296
17297 PR tree-optimization/110603
17298 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Remove incorrect
17299 setting of pdata->maxlen to vr.upper_bound (which is unconditionally
17300 overwritten anyway). Avoid creating invalid range with minlen
17301 larger than maxlen. Formatting fix.
17302
173032024-01-29 Richard Biener <rguenther@suse.de>
17304
17305 PR debug/103047
17306 * tree-inline.cc (initialize_inlined_parameters): Reverse
17307 the decl chain of inlined parameters.
17308
173092024-01-28 Iain Sandoe <iain@sandoe.co.uk>
17310
17311 * config/darwin.cc (darwin_build_constant_cfstring): Prevent over-
17312 alignment of CFString constants by setting DECL_USER_ALIGN.
17313
173142024-01-28 Iain Sandoe <iain@sandoe.co.uk>
17315 Jakub Jelinek <jakub@redhat.com>
17316
17317 PR libgcc/113402
17318 * builtins.cc (expand_builtin): Handle BUILT_IN_GCC_NESTED_PTR_CREATED
17319 and BUILT_IN_GCC_NESTED_PTR_DELETED.
17320 * builtins.def (BUILT_IN_GCC_NESTED_PTR_CREATED,
17321 BUILT_IN_GCC_NESTED_PTR_DELETED): Make these builtins LIB-EXT and
17322 rename the library fallbacks to __gcc_nested_func_ptr_created and
17323 __gcc_nested_func_ptr_deleted.
17324 * doc/invoke.texi: Rename these to __gcc_nested_func_ptr_created
17325 and __gcc_nested_func_ptr_deleted.
17326 * tree-nested.cc (finalize_nesting_tree_1): Use builtin_explicit for
17327 BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED.
17328 * tree.cc (build_common_builtin_nodes): Build the
17329 BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED local
17330 builtins only for non-explicit.
17331
173322024-01-28 YunQiang Su <syq@gcc.gnu.org>
17333
17334 * doc/invoke.texi: Remove duplicate MIPS explicit-relocs option.
17335
173362024-01-27 H.J. Lu <hjl.tools@gmail.com>
17337
17338 PR target/38534
17339 * config/i386/i386-options.cc (ix86_set_func_type): Don't
17340 save and restore callee saved registers for a noreturn function
17341 with nothrow or compiled with -fno-exceptions.
17342
173432024-01-27 H.J. Lu <hjl.tools@gmail.com>
17344
17345 PR target/103503
17346 PR target/113312
17347 * config/i386/i386-expand.cc (ix86_expand_call): Replace
17348 no_caller_saved_registers check with call_saved_registers check.
17349 Clobber all registers that are not used by the callee with
17350 no_callee_saved_registers attribute.
17351 * config/i386/i386-options.cc (ix86_set_func_type): Set
17352 call_saved_registers to TYPE_NO_CALLEE_SAVED_REGISTERS for
17353 noreturn function. Disallow no_callee_saved_registers with
17354 interrupt or no_caller_saved_registers attributes together.
17355 (ix86_set_current_function): Replace no_caller_saved_registers
17356 check with call_saved_registers check.
17357 (ix86_handle_no_caller_saved_registers_attribute): Renamed to ...
17358 (ix86_handle_call_saved_registers_attribute): This.
17359 (ix86_gnu_attributes): Add
17360 ix86_handle_call_saved_registers_attribute.
17361 * config/i386/i386.cc (ix86_conditional_register_usage): Replace
17362 no_caller_saved_registers check with call_saved_registers check.
17363 (ix86_function_ok_for_sibcall): Don't allow callee with
17364 no_callee_saved_registers attribute when the calling function
17365 has callee-saved registers.
17366 (ix86_comp_type_attributes): Also check
17367 no_callee_saved_registers.
17368 (ix86_epilogue_uses): Replace no_caller_saved_registers check
17369 with call_saved_registers check.
17370 (ix86_hard_regno_scratch_ok): Likewise.
17371 (ix86_save_reg): Replace no_caller_saved_registers check with
17372 call_saved_registers check. Don't save any registers for
17373 TYPE_NO_CALLEE_SAVED_REGISTERS. Save all registers with
17374 TYPE_DEFAULT_CALL_SAVED_REGISTERS if function with
17375 no_callee_saved_registers attribute is called.
17376 (find_drap_reg): Replace no_caller_saved_registers check with
17377 call_saved_registers check.
17378 * config/i386/i386.h (call_saved_registers_type): New enum.
17379 (machine_function): Replace no_caller_saved_registers with
17380 call_saved_registers.
17381 * doc/extend.texi: Document no_callee_saved_registers attribute.
17382
173832024-01-27 Jakub Jelinek <jakub@redhat.com>
17384
17385 PR tree-optimization/113614
17386 * gimple-lower-bitint.cc (gimple_lower_bitint): Don't merge
17387 widening casts from signed to unsigned types with TRUNC_DIV_EXPR,
17388 TRUNC_MOD_EXPR or FLOAT_EXPR uses.
17389
173902024-01-27 Jakub Jelinek <jakub@redhat.com>
17391
17392 PR tree-optimization/113568
17393 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt):
17394 For VIEW_CONVERT_EXPR use first operand of rhs1 instead of rhs1
17395 in the widening extension checks.
17396
173972024-01-27 Jakub Jelinek <jakub@redhat.com>
17398
17399 * gimple-lower-bitint.cc (gimple_lower_bitint): For
17400 TDF_DETAILS dump mapping of SSA_NAMEs to decls.
17401
174022024-01-26 Hans-Peter Nilsson <hp@axis.com>
17403
17404 * cgraphunit.cc (process_function_and_variable_attributes): Tweak
17405 the warning for an attribute-always_inline without inline declaration.
17406
174072024-01-26 Robin Dapp <rdapp@ventanamicro.com>
17408
17409 PR other/113575
17410 * genopinit.cc (main): Split init_all_optabs into functions
17411 of 1000 patterns each.
17412
174132024-01-26 Tobias Burnus <tburnus@baylibre.com>
17414
17415 * config.gcc (amdgcn-*-*): Add gfx1030 and gfx1100 to
17416 TM_MULTILIB_CONFIG.
17417 * doc/install.texi (Configuration amdgcn-*-*): Mention gfx1030/gfx1100.
17418 * doc/invoke.texi (AMD GCN Options): Add gfx1030 and gfx1100 to
17419 -march/-mtune.
17420
174212024-01-26 Andrew Stubbs <ams@baylibre.com>
17422
17423 * config/gcn/gcn-opts.h (TARGET_PACKED_WORK_ITEMS): Add TARGET_RDNA3.
17424 * config/gcn/gcn-valu.md (all_convert): New iterator.
17425 (<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): New
17426 define_expand, and rename the old one to ...
17427 (*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): ... this.
17428 (extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>2<exec>): Likewise, to ...
17429 (extend<V_INT_1REG_ALT:mode><V_INT_1REG:mode>_sdwa<exec>): .. this.
17430 (*<convop><V_INT_1REG_ALT:mode><V_INT_1REG:mode>_shift<exec>): New.
17431 * config/gcn/gcn.cc (gcn_global_address_p): Use "offsetbits" correctly.
17432 (gcn_hsa_declare_function_name): Update the vgpr counting for gfx1100.
17433 * config/gcn/gcn.md (<u>mulhisi3): Disable on RDNA3.
17434 (<u>mulqihi3_scalar): Likewise.
17435
174362024-01-26 Richard Biener <rguenther@suse.de>
17437
17438 PR tree-optimization/113602
17439 * tree-data-ref.cc (dr_analyze_innermost): Fail when
17440 the base object isn't addressable.
17441
174422024-01-26 Tobias Burnus <tburnus@baylibre.com>
17443
17444 * config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): New; creates the
17445 "--amdhsa-code-object-version=" argument.
17446 (ASM_SPEC): Use it; replace previous version of it.
17447
174482024-01-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17449
17450 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Refine some codes.
17451 (pre_vsetvl::emit_vsetvl): Ditto.
17452
174532024-01-26 Jiahao Xu <xujiahao@loongson.cn>
17454
17455 * config/loongarch/lasx.md (vec_extract<mode>_0):
17456 New define_insn_and_split patten.
17457
174582024-01-26 Jiahao Xu <xujiahao@loongson.cn>
17459
17460 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define.
17461
174622024-01-26 Li Wei <liwei@loongson.cn>
17463
17464 * config/loongarch/loongarch.cc (loongarch_emit_swdivsf): Adjust.
17465
174662024-01-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17467
17468 PR target/113469
17469 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix bug.
17470
174712024-01-26 Andrew Pinski <quic_apinski@quicinc.com>
17472
17473 PR target/100212
17474 * config/aarch64/aarch64.cc (aarch64_classify_index): Avoid
17475 undefined shift after the call to exact_log2.
17476
174772024-01-25 Andrew Pinski <quic_apinski@quicinc.com>
17478
17479 PR target/100204
17480 * config/aarch64/constraints.md (J): Cast to `unsigned HOST_WIDE_INT`
17481 before taking the negative of it.
17482
174832024-01-25 Vladimir N. Makarov <vmakarov@redhat.com>
17484
17485 PR target/113526
17486 * lra-constraints.cc (curr_insn_transform): Change class even for
17487 spilled pseudo successfully matched with with NO_REGS.
17488
174892024-01-25 Georg-Johann Lay <avr@gjlay.de>
17490
17491 PR target/113601
17492 * config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start.
17493
174942024-01-25 Szabolcs Nagy <szabolcs.nagy@arm.com>
17495
17496 PR target/112987
17497 * config/aarch64/aarch64.cc (aarch64_gen_compare_zero_and_branch): New.
17498 (aarch64_expand_epilogue): Use the new function.
17499 (aarch64_split_compare_and_swap): Likewise.
17500 (aarch64_split_atomic_op): Likewise.
17501
175022024-01-25 Robin Dapp <rdapp.gcc@gmail.com>
17503
17504 PR middle-end/112971
17505 * fold-const.cc (simplify_const_binop): New function for binop
17506 simplification of two constant vectors when element-wise
17507 handling is not necessary.
17508 (const_binop): Call new function.
17509
175102024-01-25 Mary Bennett <mary.bennett@embecosm.com>
17511
17512 * common/config/riscv/riscv-common.cc: Add XCVbitmanip.
17513 * config/riscv/constraints.md: Likewise.
17514 * config/riscv/corev.def: Likewise.
17515 * config/riscv/corev.md: Likewise.
17516 * config/riscv/predicates.md: Likewise.
17517 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
17518 * config/riscv/riscv-ftypes.def: Likewise.
17519 * config/riscv/riscv.opt: Likewise.
17520 * config/riscv/riscv.cc (riscv_print_operand): Add new operand 'Y'.
17521 * doc/extend.texi: Add XCVbitmanip builtin documentation.
17522 * doc/sourcebuild.texi: Likewise.
17523
175242024-01-25 Tobias Burnus <tburnus@baylibre.com>
17525
17526 * config/gcn/gcn-hsa.h (ASM_SPEC): Add space after -mxnack= argument.
17527
175282024-01-25 Yanzhang Wang <yanzhang.wang@intel.com>
17529
17530 PR target/113538
17531 * config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag.
17532 (riscv_fntype_abi): Ditto.
17533 * config/riscv/riscv.opt: Ditto.
17534
175352024-01-25 Jakub Jelinek <jakub@redhat.com>
17536
17537 PR middle-end/113574
17538 * convert.cc (convert_to_integer_1) <case LSHIFT_EXPR>: Compare shift
17539 count against TYPE_PRECISION rather than TYPE_SIZE.
17540
175412024-01-25 Richard Sandiford <richard.sandiford@arm.com>
17542
17543 PR target/113572
17544 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same):
17545 Check VECTOR_CST_ELT instead of VECTOR_CST_ENCODED_ELT
17546
175472024-01-25 Richard Sandiford <richard.sandiford@arm.com>
17548
17549 PR target/113550
17550 * config/aarch64/aarch64-simd.md: In the movv8di splitter, check
17551 whether each split instruction is a load that clobbers the source
17552 address. Emit that instruction last if so.
17553
175542024-01-25 Richard Sandiford <richard.sandiford@arm.com>
17555
17556 PR target/113485
17557 * config/aarch64/aarch64-simd.md (aarch64_zip1<mode>_low): New
17558 pattern.
17559 (<optab><Vnarrowq><mode>2): Use it instead of generating a
17560 paradoxical subreg for the input.
17561
175622024-01-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17563
17564 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): New function.
17565 (pre_vsetvl::pre_global_vsetvl_info): Add LCM delete block all
17566 predecessors dump information.
17567
175682024-01-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17569
17570 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_vsetvl_def_data): Remove
17571 redundant full available computation.
17572 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
17573
175742024-01-25 Jakub Jelinek <jakub@redhat.com>
17575
17576 * doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns.
17577 * doc/rtl.texi (CONST_VECTOR): Likewise.
17578
175792024-01-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17580
17581 * config/riscv/riscv-opts.h (enum vsetvl_strategy_enum): Add optim-no-fusion option.
17582 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::lazy_vsetvl): Ditto.
17583 (pass_vsetvl::execute): Ditto.
17584 * config/riscv/riscv.opt: Ditto.
17585
175862024-01-25 Jiahao Xu <xujiahao@loongson.cn>
17587
17588 * config/loongarch/lasx.md (@vec_concatz<mode>): Remove this define_insn pattern.
17589 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): Use vec_concat<mode>.
17590
175912024-01-25 Richard Biener <rguenther@suse.de>
17592
17593 PR tree-optimization/113576
17594 * tree-vect-loop.cc (vec_init_loop_exit_info): Only allow
17595 exits with may_be_zero niters when its the last one.
17596
175972024-01-25 Lulu Cheng <chenglulu@loongson.cn>
17598
17599 * config/loongarch/loongarch.cc (loongarch_symbolic_constant_p):
17600 For symbols of type tls, non-zero Offset is not generated.
17601
176022024-01-25 Haochen Gui <guihaoc@gcc.gnu.org>
17603
17604 * config/rs6000/rs6000-string.cc (expand_block_compare): Enable
17605 P9 with m32 and mpowerpc64.
17606
176072024-01-25 liuhongt <hongtao.liu@intel.com>
17608
17609 * config/i386/i386-options.cc (ix86_option_override_internal):
17610 Enable -mlam=u57 by default when compiled with
17611 -fsanitize=hwaddress.
17612
176132024-01-25 Palmer Dabbelt <palmer@rivosinc.com>
17614
17615 * common/config/riscv/riscv-common.cc (riscv_implied_info):
17616 Remove {"ztso", "a"}.
17617
176182024-01-24 Martin Jambor <mjambor@suse.cz>
17619
17620 PR ipa/108007
17621 PR ipa/112616
17622 * cgraph.h (cgraph_edge): Add a parameter to
17623 redirect_call_stmt_to_callee.
17624 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
17625 parameter to modify_call.
17626 (ipa_release_ssas_in_hash): Declare.
17627 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
17628 parameter killed_ssas, pass it to padjs->modify_call.
17629 * ipa-param-manipulation.cc (purge_all_uses): New function.
17630 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
17631 Instead of substituting uses, invoke purge_all_uses. If
17632 hash of killed SSAs has not been provided, create a temporary one
17633 and release SSAs that have been added to it.
17634 (compare_ssa_versions): New function.
17635 (ipa_release_ssas_in_hash): Likewise.
17636 * tree-inline.cc (redirect_all_calls): Create
17637 id->killed_new_ssa_names earlier, pass it to edge redirection,
17638 adjust a comment.
17639 (copy_body): Release SSAs in id->killed_new_ssa_names.
17640
176412024-01-24 Andrew Pinski <quic_apinski@quicinc.com>
17642
17643 PR target/113486
17644 * config/aarch64/aarch64.cc (aarch64_get_reg_raw_mode): For
17645 TARGET_GENERAL_REGS_ONLY, return VOIDmode for non-GP_REGNUM_P regno.
17646
176472024-01-24 Monk Chiang <monk.chiang@sifive.com>
17648
17649 PR target/113095
17650 * config/riscv/sfb.md: New splitters to rewrite single bit
17651 sign extension as the condition to SFB instructions.
17652
176532024-01-24 Jan Hubicka <jh@suse.cz>
17654
17655 PR middle-end/88345
17656 * common.opt: (flimit-function-alignment): Reorder alphabeticaly
17657 (fmin-function-alignment): New parameter.
17658 * doc/invoke.texi: (-fmin-function-alignment): Document.
17659 (-falign-functions,-falign-loops,-falign-labels): Mention that
17660 aglinments are ignored in cold code.
17661 * varasm.cc (assemble_start_function): Handle min-function-alignment.
17662
176632024-01-24 Tamar Christina <tamar.christina@arm.com>
17664
17665 PR target/109636
17666 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3,
17667 mulv2di3): Remove.
17668 * config/aarch64/iterators.md (VQDIV): Remove.
17669 (SVE_FULL_SDI_SIMD, SVE_FULL_HSDI_SIMD_DI,
17670 SVE_I_SIMD_DI): New.
17671 (VPRED, sve_lane_con): Add V4SI and V2DI.
17672 * config/aarch64/aarch64-sve.md (<optab><mode>3,
17673 @aarch64_pred_<optab><mode>): Support Advanced SIMD types.
17674 (mul<mode>3): New, split from <optab><mode>3.
17675 (@aarch64_pred_<optab><mode>, *post_ra_<optab><mode>3): New.
17676 * config/aarch64/aarch64-sve2.md (@aarch64_mul_lane_<mode>,
17677 *aarch64_mul_unpredicated_<mode>): Change SVE_FULL_HSDI to
17678 SVE_FULL_HSDI_SIMD_DI.
17679
176802024-01-24 Tamar Christina <tamar.christina@arm.com>
17681
17682 PR tree-optimization/113552
17683 * config/aarch64/aarch64.cc
17684 (aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1.
17685
176862024-01-24 Martin Jambor <mjambor@suse.cz>
17687
17688 PR ipa/113490
17689 * ipa-cp.cc (ipcp_lattice<valtype>::add_value): Bail out if value
17690 count is equal or greater than the limit. Use the limit from the
17691 callee.
17692
176932024-01-24 YunQiang Su <syq@gcc.gnu.org>
17694
17695 * configure.ac: Detect the explicit relocs support for
17696 mips, and define C macro MIPS_EXPLICIT_RELOCS.
17697 * config.in: Regenerated.
17698 * configure: Regenerated.
17699 * doc/invoke.texi(MIPS Options): Add -mexplicit-relocs.
17700 * config/mips/mips-opts.h: Define enum mips_explicit_relocs.
17701 * config/mips/mips.cc(mips_set_compression_mode): Sorry if
17702 !TARGET_EXPLICIT_RELOCS instead of just set it.
17703 * config/mips/mips.h: Define TARGET_EXPLICIT_RELOCS and
17704 TARGET_EXPLICIT_RELOCS_PCREL with mips_opt_explicit_relocs.
17705 * config/mips/mips.opt: Introduce -mexplicit-relocs= option
17706 and define -m(no-)explicit-relocs as aliases.
17707
177082024-01-24 Alex Coplan <alex.coplan@arm.com>
17709
17710 * config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default
17711 to 1.
17712 (-mlate-ldp-fusion): Likewise.
17713
177142024-01-24 Tamar Christina <tamar.christina@arm.com>
17715
17716 * tree-vect-loop.cc (vect_get_vect_def,
17717 vect_create_epilog_for_reduction): Rename main_exit_p to
17718 last_val_reduc_p.
17719
177202024-01-24 Tamar Christina <tamar.christina@arm.com>
17721
17722 PR tree-optimization/113364
17723 * tree-vect-loop.cc (vect_create_epilog_for_reduction): If all exits all
17724 early exits then we must reduce from the first offset for all of them.
17725
177262024-01-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17727
17728 PR target/113495
17729 * config/riscv/riscv-vsetvl.cc (get_expr_id): Remove.
17730 (get_regno): Ditto.
17731 (get_bb_index): Ditto.
17732 (pre_vsetvl::compute_avl_def_data): Ditto.
17733 (pre_vsetvl::earliest_fuse_vsetvl_info): Fix large memory usage.
17734 (pre_vsetvl::pre_global_vsetvl_info): Ditto.
17735
177362024-01-23 Andrew Pinski <quic_apinski@quicinc.com>
17737 Richard Sandiford <richard.sandiford@arm.com>
17738
17739 PR target/100942
17740 * ccmp.cc (ccmp_candidate_p): Add outer argument.
17741 Allow if the outer is true and the lhs is used more
17742 than once.
17743 (expand_ccmp_expr): Update call to ccmp_candidate_p.
17744 * expr.h (expand_expr_real_gassign): Declare.
17745 * expr.cc (expand_expr_real_gassign): New function, split out from...
17746 (expand_expr_real_1): ...here.
17747 * cfgexpand.cc (expand_gimple_stmt_1): Use expand_expr_real_gassign.
17748
177492024-01-23 Alex Coplan <alex.coplan@arm.com>
17750
17751 PR target/113089
17752 * config/aarch64/aarch64-ldp-fusion.cc (reset_debug_use): New.
17753 (fixup_debug_use): New.
17754 (fixup_debug_uses_trailing_add): New.
17755 (fixup_debug_uses): New. Use it ...
17756 (ldp_bb_info::fuse_pair): ... here.
17757 (try_promote_writeback): Call fixup_debug_uses_trailing_add to
17758 fix up debug uses of the base register that are affected by
17759 folding in the trailing add insn.
17760
177612024-01-23 Alex Coplan <alex.coplan@arm.com>
17762
17763 PR target/113089
17764 * config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
17765 Update trailing nondebug uses of the base register in the case
17766 of cancelling writeback.
17767
177682024-01-23 Alex Coplan <alex.coplan@arm.com>
17769
17770 PR target/113089
17771 * rtl-ssa/accesses.h (use_info::next_debug_insn_use): New.
17772 (debug_insn_use_iterator): New.
17773 (set_info::first_debug_insn_use): New.
17774 (set_info::debug_insn_uses): New.
17775 * rtl-ssa/member-fns.inl (use_info::next_debug_insn_use): New.
17776 (set_info::first_debug_insn_use): New.
17777 (set_info::debug_insn_uses): New.
17778
177792024-01-23 Alex Coplan <alex.coplan@arm.com>
17780
17781 PR target/113356
17782 * config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::try_fuse_pair):
17783 Don't record hazards against the opposite insn in the pair.
17784
177852024-01-23 Alex Coplan <alex.coplan@arm.com>
17786
17787 PR target/113070
17788 * config/aarch64/aarch64-ldp-fusion.cc
17789 (struct stp_change_builder): New.
17790 (decide_stp_strategy): Reanme to ...
17791 (try_repurpose_store): ... this.
17792 (ldp_bb_info::fuse_pair): Refactor to use stp_change_builder to
17793 construct stp changes. Fix up uses when inserting new stp insns.
17794
177952024-01-23 Alex Coplan <alex.coplan@arm.com>
17796
17797 PR target/113070
17798 * rtl-ssa.h: Include hash-set.h.
17799 * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add
17800 new_sets parameter and use it to keep track of new user-created sets.
17801 (function_info::apply_changes_to_insn): Also call add_def on new sets.
17802 (function_info::change_insns): Add hash_set to keep track of new
17803 user-created defs. Plumb it through.
17804 * rtl-ssa/functions.h: Add hash_set parameter to finalize_new_accesses and
17805 apply_changes_to_insn.
17806
178072024-01-23 Alex Coplan <alex.coplan@arm.com>
17808
17809 PR target/113070
17810 * rtl-ssa/accesses.cc (function_info::create_use): New.
17811 * rtl-ssa/changes.cc (function_info::finalize_new_accesses):
17812 Ensure new uses end up referring to permanent defs.
17813 * rtl-ssa/functions.h (function_info::create_use): Declare.
17814
178152024-01-23 Alex Coplan <alex.coplan@arm.com>
17816
17817 PR target/113070
17818 * rtl-ssa/changes.cc (function_info::change_insns): Split out the call
17819 to finalize_new_accesses from the backwards placement loop, run it
17820 forwards in a separate loop.
17821
178222024-01-23 Richard Biener <rguenther@suse.de>
17823
17824 PR tree-optimization/113552
17825 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use
17826 floor_log2 instead of exact_log2 on the number of calls.
17827
178282024-01-23 Jeff Law <jlaw@ventanamicro.com>
17829 Jakub Jelinek <jakub@redhat.com>
17830
17831 * config/ia64/ia64.cc (ia64_start_function): Add ATTRIBUTE_UNUSED to
17832 decl.
17833
178342024-01-23 Richard Biener <rguenther@suse.de>
17835
17836 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
17837 Separate single and multi-exit case when creating PHIs between
17838 the main and epilogue.
17839
178402024-01-23 Richard Sandiford <richard.sandiford@arm.com>
17841
17842 PR target/112989
17843 * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Skip
17844 MODE_single variants of functions that don't take tuple arguments.
17845
178462024-01-23 Alex Coplan <alex.coplan@arm.com>
17847
17848 PR target/113114
17849 * config/aarch64/aarch64-ldp-fusion.cc (try_promote_writeback):
17850 Don't assert recog success, just punt if the writeback pair
17851 isn't recognized.
17852
178532024-01-23 Jakub Jelinek <jakub@redhat.com>
17854
17855 * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Add
17856 ATTRIBUTE_UNUSED to decl.
17857
178582024-01-23 Richard Biener <rguenther@suse.de>
17859
17860 PR debug/107058
17861 * dwarf2out.cc (dwarf2out_die_ref_for_decl): Gracefully
17862 handle unexpected but bogus DIE contexts when not checking
17863 enabled.
17864
178652024-01-23 Jakub Jelinek <jakub@redhat.com>
17866
17867 PR tree-optimization/113462
17868 * fold-const.cc (native_interpret_int): Don't punt if total_bytes
17869 is larger than HOST_BITS_PER_DOUBLE_INT / BITS_PER_UNIT.
17870 (fold_view_convert_expr): Use XALLOCAVEC buffers for types with
17871 sizes between 129 and 8192 bytes.
17872
178732024-01-23 Xi Ruoyao <xry111@xry111.site>
17874
17875 * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p):
17876 If la_opt_explicit_relocs is EXPLICIT_RELOCS_AUTO, return false
17877 for SYMBOL_TLS_LDM and SYMBOL_TLS_GD.
17878 (loongarch_call_tls_get_addr): Do not split symbols of
17879 SYMBOL_TLS_LDM or SYMBOL_TLS_GD if la_opt_explicit_relocs is
17880 EXPLICIT_RELOCS_AUTO.
17881
178822024-01-23 Richard Biener <rguenther@suse.de>
17883
17884 * alias.cc (known_base_value_p): Remove.
17885 (find_base_value): Remove PLUS/MINUS handling
17886 when both operands are not CONST_INT_P.
17887
178882024-01-23 Richard Biener <rguenther@suse.de>
17889
17890 PR rtl-optimization/113255
17891 * alias.cc (find_base_term): Remove PLUS/MINUS handling
17892 when both operands are not CONST_INT_P.
17893
178942024-01-23 Richard Biener <rguenther@suse.de>
17895
17896 PR debug/112718
17897 * dwarf2out.cc (dwarf2out_finish): Reset all type units
17898 for the fat part of an LTO compile.
17899
179002024-01-23 chenxiaolong <chenxiaolong@loongson.cn>
17901
17902 * doc/sourcebuild.texi: Add attributes for keywords.
17903
179042024-01-23 Sandra Loosemore <sandra@codesourcery.com>
17905
17906 PR c++/90463
17907 * doc/invoke.texi (Warning Options): Correct lists of options
17908 enabled by -Wall and -Wextra by checking against common.opt
17909 and c-family/c.opt.
17910
179112024-01-22 Andrew Pinski <quic_apinski@quicinc.com>
17912
17913 PR target/113030
17914 * config/arm/parsecpu.awk (check_cpu): Use cpu_opt_alias
17915 instead of cpu_optaliases.
17916 (check_arch): Use arch_opt_alias instead of arch_optaliases.
17917
179182024-01-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17919
17920 * config/riscv/riscv-protos.h (splat_to_scalar_move_p): New function.
17921 * config/riscv/riscv-v.cc (splat_to_scalar_move_p): Ditto.
17922 * config/riscv/vector.md: Simplify vmv.v.x. into vmv.s.x.
17923
179242024-01-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17925
17926 PR target/109092
17927 * config/riscv/riscv.md: Use reg instead of subreg.
17928
179292024-01-22 Tobias Burnus <tburnus@baylibre.com>
17930
17931 PR other/111966
17932 * config/gcn/mkoffload.cc (elf_arch): Change default to gfx900
17933 to match the compiler default.
17934 (simple_object_copy_lto_debug_sections): Never unlink the outfile
17935 on error as the caller does so.
17936 (maybe_unlink, compile_native): Use %<...%> and %qs in fatal_error.
17937 (main): Likewise. Fix 'mkoffload.dbg.o' cleanup.
17938
179392024-01-22 Richard Biener <rguenther@suse.de>
17940
17941 PR tree-optimization/113373
17942 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
17943 Create LC PHIs in the exit blocks where necessary.
17944 * tree-vect-loop.cc (vectorizable_live_operation): Do not try
17945 to handle missing LC PHIs.
17946 (find_connected_edge): Remove.
17947 (vect_create_epilog_for_reduction): Cleanup use of auto_vec.
17948
179492024-01-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17950
17951 * config/riscv/vector.md: Fix vfirst/vmsbf/vmsof ratio attributes.
17952
179532024-01-22 xuli <xuli1@eswincomputing.com>
17954
17955 PR target/113420
17956 * config/riscv/riscv-vector-builtins.cc (has_vxrm_or_frm_p):remove.
17957 (registered_function::overloaded_hash):refactor.
17958 (resolve_overloaded_builtin):avoid internal ICE.
17959
179602024-01-21 Mikael Pettersson <mikpelinux@gmail.com>
17961
17962 PR target/82420
17963 PR target/111279
17964 * calls.cc (emit_library_call_value_1): Pass valid TYPE
17965 to emit_push_insn.
17966 * expr.cc (emit_push_insn): Likewise.
17967
179682024-01-21 Jeff Law <jlaw@ventanamicro.com>
17969
17970 * config/riscv/riscv.cc (riscv_init_cumulative_args): Install
17971 correcction version of last change.
17972
179732024-01-21 Jeff Law <jlaw@ventanamicro.com>
17974
17975 * config/riscv/riscv.cc (riscv_init_cumulative_args): Update and
17976 fix bugs in signature.
17977
179782024-01-21 Roger Sayle <roger@nextmovesoftware.com>
17979 Richard Biener <rguenther@suse.de>
17980
17981 PR rtl-optimization/111267
17982 * fwprop.cc (fwprop_propagation::profitabe_p): Rename
17983 profitable_p method to likely_profitable_p.
17984 (try_fwprop_subst_node): Update call to likely_profitable_p.
17985 Only bail-out early when !prop.likely_profitable_p for instructions
17986 that are not single sets. When comparing costs, bail-out if the
17987 cost is unchanged and !prop.likely_profitable_p.
17988
179892024-01-21 Sandra Loosemore <sandra@codesourcery.com>
17990
17991 PR c++/90464
17992 * doc/invoke.texi (Warning Options): Document that -Wunused-parameter
17993 isn't enabled by -Wunused unless -Wextra is provided, and that
17994 -Wunused does enable -Wunused-const-variable=1 for C. Clarify that
17995 -Wunused doesn't enable -Wunused-* options documented as behaving
17996 otherwise, and list them explicitly.
17997
179982024-01-21 Sandra Loosemore <sandra@codesourcery.com>
17999
18000 PR c/109708
18001 * doc/invoke.texi (Warning Options): Fix broken example and
18002 clean up/reorganize the others. Also describe what the short-form
18003 options mean.
18004
180052024-01-20 Sandra Loosemore <sandra@codesourcery.com>
18006
18007 PR c/102998
18008 * doc/invoke.texi (Option Summary): Add -Warray-parameter.
18009 (Warning Options): Correct/edit discussion of -Warray-parameter
18010 to make the first example less confusing, and fill in missing info.
18011
180122024-01-20 Jakub Jelinek <jakub@redhat.com>
18013
18014 PR tree-optimization/113462
18015 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast):
18016 Handle rhs1 INTEGER_CST like SSA_NAME.
18017
180182024-01-20 Jakub Jelinek <jakub@redhat.com>
18019
18020 PR tree-optimization/113491
18021 * tree-switch-conversion.cc (switch_conversion::build_constructors):
18022 If elt.index has precision higher than sizetype, fold_convert it to
18023 sizetype.
18024 (switch_conversion::array_value_type): Return type if type is
18025 BITINT_TYPE with precision above MAX_FIXED_MODE_SIZE or with BLKmode.
18026 (switch_conversion::build_arrays): Use unsigned_type_for rather than
18027 lang_hooks.types.type_for_mode if utype is BITINT_TYPE with precision
18028 above MAX_FIXED_MODE_SIZE or with BLKmode. If utype has precision
18029 higher than sizetype, use sizetype as tidx type and fold_convert the
18030 subtraction to sizetype.
18031
180322024-01-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18033
18034 * config/riscv/riscv.cc (riscv_init_cumulative_args): Suppress warning.
18035 (riscv_vector_mode_supported_any_target_p): Ditto.
18036
180372024-01-19 Mikael Pettersson <mikpelinux@gmail.com>
18038
18039 PR target/110934
18040 * config/m68k/m68k.cc (m68k_zero_call_used_regs): New function.
18041 (TARGET_ZERO_CALL_USED_REGS): Define.
18042
180432024-01-19 Mikael Pettersson <mikpelinux@gmail.com>
18044
18045 PR target/108640
18046 * config/m68k/m68k.cc (output_andsi3): Use QImode for
18047 address adjusted for 1-byte RMW access.
18048 (output_iorsi3): Likewise.
18049 (output_xorsi3): Likewise.
18050
180512024-01-19 Kito Cheng <kito.cheng@sifive.com>
18052
18053 * doc/invoke.texi (RISC-V Options): Add list of supported
18054 extensions.
18055
180562024-01-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18057
18058 PR target/113495
18059 * config/riscv/riscv-protos.h (RVV_VLMAX): Change to regno_reg_rtx[X0_REGNUM].
18060 (RVV_VUNDEF): Ditto.
18061 * config/riscv/riscv-vsetvl.cc: Add timevar.
18062
180632024-01-19 Richard Biener <rguenther@suse.de>
18064
18065 PR debug/113488
18066 * lto-streamer-in.cc (lto_read_tree_1): When there isn't
18067 an early DIE but there should be, do not pretend there is.
18068
180692024-01-19 Richard Biener <rguenther@suse.de>
18070
18071 PR tree-optimization/113494
18072 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
18073 Handle endless loop on exit. Handle re-allocated PHI.
18074
180752024-01-19 Jakub Jelinek <jakub@redhat.com>
18076
18077 PR tree-optimization/113464
18078 * gimple-lower-bitint.cc (gimple_lower_bitint): Don't try to
18079 optimize loads into GIMPLE_ASM stmts.
18080
180812024-01-19 Jakub Jelinek <jakub@redhat.com>
18082
18083 PR tree-optimization/113463
18084 * gimple-ssa-warn-restrict.cc (builtin_memref::extend_offset_range):
18085 Only look through NOP_EXPRs if rhs1 doesn't have wider type than
18086 lhs.
18087
180882024-01-19 Jakub Jelinek <jakub@redhat.com>
18089
18090 PR tree-optimization/113459
18091 * tree-ssa-sccvn.cc (vn_walk_cb_data::push_partial_def): Use
18092 TREE_INT_CST_LOW of TYPE_SIZE_UNIT rather than GET_MODE_SIZE
18093 of SCALAR_INT_TYPE_MODE if type has BLKmode.
18094 (vn_reference_lookup_3): Likewise. Formatting fix.
18095
180962024-01-19 Jakub Jelinek <jakub@redhat.com>
18097 Richard Biener <rguenther@suse.de>
18098
18099 * cfgexpand.cc (discover_nonconstant_array_refs_r): Force non-BLKmode
18100 VAR_DECLs referenced in BLKmode VIEW_CONVERT_EXPRs into memory.
18101 * expr.cc (expand_expr_real_1) <case VIEW_CONVERT_EXPR>: Do nothing
18102 but adjust_address also for BLKmode mode and MEM op0.
18103
181042024-01-19 Palmer Dabbelt <palmer@rivosinc.com>
18105
18106 * common/config/riscv/riscv-common.cc: Add Zihpm and Zicnttr
18107 extensions.
18108
181092024-01-19 Kito Cheng <kito.cheng@sifive.com>
18110
18111 * doc/invoke.texi (RISC-V Options): Document the syntax of -march.
18112
181132024-01-19 Kito Cheng <kito.cheng@sifive.com>
18114
18115 * common/config/riscv/riscv-common.cc
18116 (riscv_subset_list::parse_std_ext): Remove.
18117 (riscv_subset_list::parse_multiletter_ext): Remove.
18118 * config/riscv/riscv-subset.h
18119 (riscv_subset_list::parse_std_ext): Remove.
18120 (riscv_subset_list::parse_multiletter_ext): Remove.
18121
181222024-01-19 Kito Cheng <kito.cheng@sifive.com>
18123
18124 * common/config/riscv/riscv-common.cc
18125 (riscv_subset_list::parse_single_std_ext): New parameter.
18126 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
18127 (riscv_subset_list::parse_single_ext): Ditto.
18128 (riscv_subset_list::parse): Relax the order for the input of ISA
18129 string.
18130 * config/riscv/riscv-subset.h
18131 (riscv_subset_list::parse_single_std_ext): New parameter.
18132 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
18133 (riscv_subset_list::parse_single_ext): Ditto.
18134
181352024-01-19 Kito Cheng <kito.cheng@sifive.com>
18136
18137 * common/config/riscv/riscv-common.cc
18138 (riscv_subset_list::parse_base_ext): New.
18139 (riscv_subset_list::parse): Extract part of logic into
18140 riscv_subset_list::parse_base_ext.
18141 * config/riscv/riscv-subset.h (riscv_subset_list::parse_base_ext):
18142 New.
18143
181442024-01-19 Kito Cheng <kito.cheng@sifive.com>
18145
18146 * config/riscv/riscv.cc (riscv_override_options_internal): Tweak
18147 sorry message.
18148
181492024-01-19 Kuan-Lin Chen <rufus@andestech.com>
18150
18151 * config/riscv/vector-crypto.md (UNSPEC_CLMUL): Rename to
18152 UNSPEC_CLMUL_VC.
18153
181542024-01-19 Sandra Loosemore <sandra@codesourcery.com>
18155
18156 PR c/110029
18157 * doc/extend.texi (Common Variable Attributes): Explain what
18158 happens when multiple variables with cleanups are in the same scope.
18159
181602024-01-18 Sandra Loosemore <sandra@codesourcery.com>
18161
18162 PR ipa/108470
18163 * doc/extend.texi (Common Function Attributes): Document that
18164 noinline also disables some interprocedural optimizations and
18165 improve flow to the part about using inline asm instead to
18166 disable calls from being optimized away completely. Remove the
18167 sentence that says noipa is mainly for internal compiler testing.
18168
181692024-01-18 John David Anglin <danglin@gcc.gnu.org>
18170
18171 PR tree-optimization/69807
18172 * config/pa/pa.cc (pa_option_override): Set flag_pie on TARGET_64BIT.
18173
181742024-01-18 Brian Inglis <Brian.Inglis@Shaw.ca>
18175
18176 PR target/108521
18177 * doc/invoke.texi (Option Summary): Remove -mcygwin and -mno-cygwin
18178 from x86 Windows Options.
18179
181802024-01-18 Sandra Loosemore <sandra@codesourcery.com>
18181
18182 PR c/107942
18183 * doc/extend.texi (C Extensions): Add new section to menu.
18184 (Function Attributes): Move dangling index entries to....
18185 (Const and Volatile Functions): New section.
18186
181872024-01-18 David Malcolm <dmalcolm@redhat.com>
18188
18189 PR middle-end/112684
18190 * toplev.cc (toplev::main): Don't ICE in
18191 -fdiagnostics-generate-patch when exiting after options,
18192 since no edit context will have been created.
18193
181942024-01-18 Richard Biener <rguenther@suse.de>
18195
18196 * tree-vect-stmts.cc (vectorizable_store): Do not pre-allocate
18197 operands vector.
18198
181992024-01-18 Iain Sandoe <iain@sandoe.co.uk>
18200
18201 * Makefile.in: Emit ENABLE_DARWIN_AT_RPATH into site.exp
18202 when ENABLE_DARWIN_AT_RPATH_TRUE is not '#'.
18203
182042024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18205 Jin Ma <jinma@linux.alibaba.com>
18206 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18207 Christoph Müllner <christoph.muellner@vrull.eu>
18208
18209 * config/riscv/thead.cc
18210 (th_asm_output_opcode): Rewrite some instructions.
18211
182122024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18213 Jin Ma <jinma@linux.alibaba.com>
18214 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18215 Christoph Müllner <christoph.muellner@vrull.eu>
18216
18217 * config/riscv/riscv.md (none,thv,rvv): New attribute.
18218 (no,yes): Add an attribute to disable alternative
18219 for xtheadvector or RVV1.0.
18220 * config/riscv/vector.md:
18221 Disable alternatives that destination register overlaps
18222 source register group for xtheadvector.
18223
182242024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18225 Jin Ma <jinma@linux.alibaba.com>
18226 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18227 Christoph Müllner <christoph.muellner@vrull.eu>
18228
18229 * config/riscv/riscv-vector-builtins-bases.cc
18230 (class th_loadstore_width): Define new builtin bases.
18231 (class th_extract): Define new builtin bases.
18232 (BASE): Define new builtin bases.
18233 * config/riscv/riscv-vector-builtins-bases.h:
18234 Define new builtin class.
18235 * config/riscv/riscv-vector-builtins-shapes.cc
18236 (struct th_loadstore_width_def): Define new builtin shapes.
18237 (struct th_indexed_loadstore_width_def):
18238 Define new builtin shapes.
18239 (struct th_extract_def): Define new builtin shapes.
18240 (SHAPE): Define new builtin shapes.
18241 * config/riscv/riscv-vector-builtins-shapes.h:
18242 Define new builtin shapes.
18243 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION):
18244 Redefine DEF_RVV_FUNCTION for XTheadVector special intrinsics.
18245 * config/riscv/riscv-vector-builtins.h
18246 (enum required_ext): Add new XTheadVector member.
18247 (struct function_group_info): Likewise.
18248 * config/riscv/t-riscv:
18249 Add thead-vector-builtins-functions.def
18250 * config/riscv/thead-vector.md
18251 (@pred_mov_width<vlmem_op_attr><mode>): Add new patterns.
18252 (*pred_mov_width<vlmem_op_attr><mode>): Likewise.
18253 (@pred_store_width<vlmem_op_attr><mode>): Likewise.
18254 (@pred_strided_load_width<vlmem_op_attr><mode>): Likewise.
18255 (@pred_strided_store_width<vlmem_op_attr><mode>): Likewise.
18256 (@pred_indexed_load_width<vlmem_op_attr><mode>): Likewise.
18257 (@pred_th_extract<mode>): Likewise.
18258 (*pred_th_extract<mode>): Likewise.
18259 * config/riscv/thead-vector-builtins-functions.def: New file.
18260
182612024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18262 Jin Ma <jinma@linux.alibaba.com>
18263 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18264 Christoph Müllner <christoph.muellner@vrull.eu>
18265
18266 * config.gcc: Add files for XTheadVector intrinsics.
18267 * config/riscv/autovec.md: Guard XTheadVector.
18268 * config/riscv/predicates.md: Disable immediate vl
18269 for XTheadVector.
18270 * config/riscv/riscv-c.cc (riscv_pragma_intrinsic):
18271 Add pragma for XTheadVector.
18272 * config/riscv/riscv-string.cc (riscv_expand_block_move):
18273 Guard XTheadVector.
18274 * config/riscv/riscv-v.cc (vls_mode_valid_p):
18275 Avoid autovec.
18276 * config/riscv/riscv-vector-builtins-bases.cc:
18277 Do not normalize vsetvl instructions for XTheadVector.
18278 * config/riscv/riscv-vector-builtins-shapes.cc (check_type):
18279 New check type function.
18280 (build_one): Adjust for XTheadVector.
18281 * config/riscv/riscv-vector-switch.def (ENTRY):
18282 Disable fractional mode for the XTheadVector extension.
18283 (TUPLE_ENTRY): Likewise.
18284 * config/riscv/riscv.cc (riscv_v_adjust_bytesize):
18285 Guard XTheadVector.
18286 (riscv_preferred_simd_mode): Likewsie.
18287 (riscv_autovectorize_vector_modes): Likewise.
18288 (riscv_vector_mode_supported_any_target_p): Likewise.
18289 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
18290 * config/riscv/thead.cc (th_asm_output_opcode):
18291 Rewrite vsetvl instructions.
18292 * config/riscv/vector.md:
18293 Include thead-vector.md and change fractional LMUL
18294 into 1 for vbool.
18295 * config/riscv/riscv_th_vector.h: New file.
18296 * config/riscv/thead-vector.md: New file.
18297
182982024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18299 Jin Ma <jinma@linux.alibaba.com>
18300 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18301 Christoph Müllner <christoph.muellner@vrull.eu>
18302
18303 * config/riscv/riscv-protos.h (riscv_asm_output_opcode):
18304 Add new function to add assembler insn code prefix/suffix.
18305 (th_asm_output_opcode):
18306 Add Thead function to add assembler insn code prefix/suffix.
18307 * config/riscv/riscv.cc (riscv_asm_output_opcode):
18308 Implement function to add assembler insn code prefix/suffix.
18309 * config/riscv/riscv.h (ASM_OUTPUT_OPCODE):
18310 Add new function to add assembler insn code prefix/suffix.
18311 * config/riscv/thead.cc (th_asm_output_opcode):
18312 Implement Thead function to add assembler insn code
18313 prefix/suffix.
18314
183152024-01-18 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
18316 Jin Ma <jinma@linux.alibaba.com>
18317 Xianmiao Qu <cooper.qu@linux.alibaba.com>
18318 Christoph Müllner <christoph.muellner@vrull.eu>
18319
18320 * common/config/riscv/riscv-common.cc
18321 (riscv_subset_list::parse): Add new vendor extension.
18322 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
18323 Add test marco.
18324 * config/riscv/riscv.opt: Add new mask.
18325
183262024-01-18 Iain Sandoe <iain@sandoe.co.uk>
18327
18328 * config/darwin.h (DARWIN_RPATH_SPEC): Arrange for the %P spec
18329 to be conditional on macosx-version-min.
18330
183312024-01-18 Iain Sandoe <iain@sandoe.co.uk>
18332
18333 * config/darwin.cc (darwin_objc1_section): Use the correct
18334 meta-data version for constant strings.
18335 (machopic_select_section): Assert if we fail to handle CFString
18336 sections as Obejctive-C meta-data or drectly.
18337
183382024-01-18 Iain Sandoe <iain@sandoe.co.uk>
18339
18340 * lto-section-names.h (OFFLOAD_SECTION_NAME_PREFIX,
18341 OFFLOAD_VAR_TABLE_SECTION_NAME, OFFLOAD_FUNC_TABLE_SECTION_NAME,
18342 OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): Provide Mach-O syntax
18343 versions when the object format is Mach-O.
18344
183452024-01-18 Iain Sandoe <iain@sandoe.co.uk>
18346
18347 PR target/105522
18348 * config/darwin.cc (machopic_select_section): Handle C and C++
18349 CFStrings.
18350 (darwin_rename_builtins): Move this out of the CFString code.
18351 (darwin_libc_has_function): Likewise.
18352 (darwin_build_constant_cfstring): Create an anonymous var to
18353 hold each CFString.
18354 * config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant
18355 CFstrings.
18356
183572024-01-18 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
18358
18359 PR bootstrap/113445
18360 * haifa-sched.cc (dep_list_size): Make global.
18361 * sched-deps.cc (find_inc): Use instead of sd_lists_size().
18362 * sched-int.h (dep_list_size): Declare.
18363
183642024-01-18 Martin Jambor <mjambor@suse.cz>
18365
18366 PR tree-optimization/110422
18367 * tree-sra.cc (scan_function): Disqualify bases of operands of asm
18368 gotos.
18369
183702024-01-18 Richard Biener <rguenther@suse.de>
18371
18372 PR tree-optimization/113475
18373 * gimple-range-phi.h (phi_analyzer::m_phi_groups): New.
18374 * gimple-range-phi.cc (phi_analyzer::phi_analyzer): Initialize.
18375 (phi_analyzer::~phi_analyzer): Deallocate and free collected
18376 phi_grous.
18377 (phi_analyzer::process_phi): Record allocated phi_groups.
18378
183792024-01-18 Richard Biener <rguenther@suse.de>
18380
18381 * tree-vect-stmts.cc (vectorizable_store): Do not allocate
18382 storage for gvec_oprnds elements.
18383
183842024-01-18 Richard Biener <rguenther@suse.de>
18385
18386 * tree-vect-loop.cc (vec_init_loop_exit_info): Adjust comment,
18387 prefer all later exits we can handle.
18388 (vect_analyze_loop_form): Free the allocated loop body.
18389 Adjust comments.
18390
183912024-01-18 Georg-Johann Lay <avr@gjlay.de>
18392
18393 * config/avr/avr-log.cc: Tabify.
18394
183952024-01-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18396
18397 * config/riscv/autovec.md: Support vi variant.
18398
183992024-01-18 Georg-Johann Lay <avr@gjlay.de>
18400
18401 * config/avr/avr-devices.cc: Tabify.
18402
184032024-01-18 Georg-Johann Lay <avr@gjlay.de>
18404
18405 * config/avr/avr-c.cc: Tabify.
18406
184072024-01-18 Georg-Johann Lay <avr@gjlay.de>
18408
18409 * config/avr/driver-avr.cc: Tabify.
18410
184112024-01-18 Georg-Johann Lay <avr@gjlay.de>
18412
18413 * config/avr/gen-avr-mmcu-texi.cc: Tabify.
18414
184152024-01-18 Georg-Johann Lay <avr@gjlay.de>
18416
18417 * config/avr/gen-avr-mmcu-specs.cc: Tabify.
18418
184192024-01-18 Jakub Jelinek <jakub@redhat.com>
18420
18421 * config/riscv/riscv.opt (mshorten-memrefs, mrelax, mcsr-check,
18422 minline-strcmp, minline-strncmp, minline-strlen,
18423 -param=riscv-vector-abi): Remove Bool keywords.
18424
184252024-01-18 Jakub Jelinek <jakub@redhat.com>
18426
18427 PR target/113122
18428 * config/i386/i386.cc (x86_function_profiler): Add -masm=intel
18429 support. Add missing space after , in emitted assembly in some
18430 cases. Formatting fixes.
18431
184322024-01-18 Xi Ruoyao <xry111@xry111.site>
18433
18434 * config/loongarch/loongarch.md (movsi_internal): Remove
18435 constraint z.
18436
184372024-01-18 Georg-Johann Lay <avr@gjlay.de>
18438
18439 * config/avr/gen-avr-mmcu-specs.cc (diagnose_rodata_in_ram): Fix typo
18440 in the diagnostic, and capitalize the device name.
18441 (print_mcu): Generate specs such that:
18442 <*check_rodata_in_ram>: New.
18443 <*cc1_misc>: Use check_rodata_in_ram instead of cc1_rodata_in_ram.
18444 <*link_misc>: Use check_rodata_in_ram instead of link_rodata_in_ram.
18445 <*cc1_rodata_in_ram, *link_rodata_in_ram>: Remove.
18446
184472024-01-18 Jakub Jelinek <jakub@redhat.com>
18448
18449 PR other/113399
18450 * common.opt (ffold-mem-offsets): Remove Target and Bool keywords, add
18451 Common and Optimization.
18452
184532024-01-18 Richard Biener <rguenther@suse.de>
18454
18455 PR tree-optimization/113431
18456 * tree-vect-data-refs.cc (vect_preserves_scalar_order_p):
18457 When there is an invariant load we might not preserve
18458 scalar order.
18459
184602024-01-18 Richard Biener <rguenther@suse.de>
18461
18462 PR tree-optimization/113374
18463 * tree-ssa-operands.h (SET_PHI_ARG_DEF_ON_EDGE): New.
18464 * tree-vect-loop.cc (move_early_exit_stmts): Update
18465 virtual LC PHIs.
18466 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
18467 Refactor. Preserve virtual LC PHIs on all exits.
18468
184692024-01-18 Lulu Cheng <chenglulu@loongson.cn>
18470
18471 * config/loongarch/loongarch.cc (loongarch_split_symbol):
18472 Assign the '/u' attribute to the mem.
18473
184742024-01-18 Sandra Loosemore <sandra@codesourcery.com>
18475
18476 PR middle-end/110847
18477 * doc/invoke.texi (Option Summary): Document negative forms of
18478 -Wtsan and -Wxor-used-as-pow.
18479 (Warning Options): Likewise.
18480
184812024-01-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18482
18483 PR target/113429
18484 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Fix bug.
18485
184862024-01-18 Sandra Loosemore <sandra@codesourcery.com>
18487
18488 * doc/extend.texi (Common Function Attributes): Re-alphabetize
18489 the table.
18490 (Common Variable Attributes): Likewise.
18491 (Common Type Attributes): Likewise.
18492
184932024-01-17 Sandra Loosemore <sandra@codesourcery.com>
18494
18495 PR middle-end/111659
18496 * doc/extend.texi (Common Variable Attributes): Fix long lines
18497 in documentation of strict_flex_array + other minor copy-editing.
18498 Add a cross-reference to -Wstrict-flex-arrays.
18499 * doc/invoke.texi (Option Summary): Fix whitespace in tables
18500 before -fstrict-flex-arrays and -Wstrict-flex-arrays.
18501 (C Dialect Options): Combine the docs for the two
18502 -fstrict-flex-arrays forms into a single entry. Note this option
18503 is for C/C++ only. Add a cross-reference to -Wstrict-flex-arrays.
18504 (Warning Options): Note -Wstrict-flex-arrays is for C/C++ only.
18505 Minor copy-editing. Add cross references to the strict_flex_array
18506 attribute and -fstrict-flex-arrays option. Add note that this
18507 option depends on -ftree-vrp.
18508
185092024-01-17 Andrew Pinski <quic_apinski@quicinc.com>
18510
18511 PR target/113221
18512 * config/aarch64/predicates.md (aarch64_ldp_reg_operand): For subreg,
18513 only allow REG operands instead of allowing all.
18514
185152024-01-17 Vineet Gupta <vineetg@rivosinc.com>
18516
18517 * config/riscv/riscv-vsetvl.cc (earliest_fuse_vsetvl_info):
18518 Remove redundant checks in else condition for readablity.
18519 (earliest_fuse_vsetvl_info) Print iteration count in debug
18520 prints.
18521 (earliest_fuse_vsetvl_info) Fix misleading vsetvl info
18522 dump details in certain cases.
18523
185242024-01-17 Vineet Gupta <vineetg@rivosinc.com>
18525
18526 * config/riscv/riscv.opt: New -param=vsetvl-strategy.
18527 * config/riscv/riscv-opts.h: New enum vsetvl_strategy_enum.
18528 * config/riscv/riscv-vsetvl.cc
18529 (pre_vsetvl::pre_global_vsetvl_info): Use vsetvl_strategy.
18530 (pass_vsetvl::execute): Use vsetvl_strategy.
18531
185322024-01-17 Jan Hubicka <jh@suse.cz>
18533
18534 * ipa-polymorphic-call.cc (ipa_polymorphic_call_context::set_by_invariant): Remove
18535 accidental hack reseting offset.
18536
185372024-01-17 Jan Hubicka <jh@suse.cz>
18538
18539 * config/i386/i386-options.cc (ix86_option_override_internal): Fix
18540 handling of X86_TUNE_AVOID_512FMA_CHAINS.
18541
185422024-01-17 Jan Hubicka <jh@suse.cz>
18543 Jakub Jelinek <jakub@redhat.com>
18544
18545 PR tree-optimization/110852
18546 * predict.cc (expr_expected_value_1): Fix profile merging of PHI and
18547 binary operations
18548 (get_predictor_value): Handle PRED_COMBINED_VALUE_PREDICTIONS and
18549 PRED_COMBINED_VALUE_PREDICTIONS_PHI
18550 * predict.def (PRED_COMBINED_VALUE_PREDICTIONS): New predictor.
18551 (PRED_COMBINED_VALUE_PREDICTIONS_PHI): New predictor.
18552
185532024-01-17 Jakub Jelinek <jakub@redhat.com>
18554
18555 PR tree-optimization/113421
18556 * gimple-lower-bitint.cc (stmt_needs_operand_addr): Adjust function
18557 comment.
18558 (bitint_dom_walker::before_dom_children): Add g temporary to simplify
18559 formatting. Start at vop rather than cvop even if stmt is a store
18560 and needs_operand_addr.
18561
185622024-01-17 Jakub Jelinek <jakub@redhat.com>
18563
18564 PR middle-end/113410
18565 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
18566 If access_nelts is integral with larger precision than sizetype,
18567 fold_convert it to sizetype.
18568
185692024-01-17 Jakub Jelinek <jakub@redhat.com>
18570
18571 PR tree-optimization/113408
18572 * gimple-lower-bitint.cc (bitint_large_huge::handle_stmt): For
18573 VIEW_CONVERT_EXPR, pass TREE_OPERAND (rhs1, 0) rather than rhs1
18574 to handle_cast.
18575
185762024-01-17 Jakub Jelinek <jakub@redhat.com>
18577
18578 PR middle-end/113406
18579 * ipa-strub.cc (pass_ipa_strub::execute): Check aggregate_value_p
18580 regardless of whether is_gimple_reg_type (restype) or not.
18581
185822024-01-17 Jakub Jelinek <jakub@redhat.com>
18583
18584 * tree-into-ssa.cc (pass_build_ssa::gate): Fix comment typo,
18585 funcions -> functions, and use were instead of was.
18586 * gengtype.cc (dump_typekind): Fix comment typos, funcion -> function
18587 and guaranteee -> guarantee.
18588 * attribs.h (struct attr_access): Fix comment typo funcion -> function.
18589
185902024-01-17 Jakub Jelinek <jakub@redhat.com>
18591
18592 PR middle-end/113409
18593 * omp-general.cc (omp_adjust_for_condition): Handle BITINT_TYPE like
18594 INTEGER_TYPE.
18595 (omp_extract_for_data): Use build_bitint_type rather than
18596 build_nonstandard_integer_type if either iter_type or loop->v type
18597 is BITINT_TYPE.
18598 * omp-expand.cc (expand_omp_for_generic,
18599 expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Handle
18600 BITINT_TYPE like INTEGER_TYPE.
18601
186022024-01-17 Richard Biener <rguenther@suse.de>
18603
18604 PR tree-optimization/113371
18605 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
18606 Do not peel when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED.
18607 * tree-vect-loop-manip.cc (vect_do_peeling): Assert we do
18608 not perform prologue peeling when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED.
18609
186102024-01-17 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
18611
18612 PR rtl-optimization/96388
18613 PR rtl-optimization/111554
18614 * sched-deps.cc (find_inc): Avoid exponential behavior.
18615
186162024-01-17 Sandra Loosemore <sandra@codesourcery.com>
18617
18618 PR c/111693
18619 * doc/invoke.texi (Option Summary): Move -Wuseless-cast
18620 from C++ Language Options to Warning Options. Add entry for
18621 -Wuse-after-free.
18622 (C++ Dialect Options): Move -Wuse-after-free and -Wuseless-cast
18623 from here....
18624 (Warning Options): ...to here. Minor copy-editing to fix typo
18625 and grammar.
18626
186272024-01-17 YunQiang Su <syq@gcc.gnu.org>
18628
18629 * config/mips/mips.cc (mips_compute_frame_info): If another
18630 register is used as global_pointer, mark $GP live false.
18631
186322024-01-17 Sandra Loosemore <sandra@codesourcery.com>
18633
18634 PR target/112973
18635 * doc/extend.texi (BPF Built-in Functions): Wrap long lines and
18636 give the section a light copy-editing pass.
18637
186382024-01-16 Wilco Dijkstra <wilco.dijkstra@arm.com>
18639
18640 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU.
18641 * config/aarch64/aarch64-tune.md: Regenerated.
18642 * doc/invoke.texi (-mcpu): Add cobalt-100 core.
18643
186442024-01-16 Wilco Dijkstra <wilco.dijkstra@arm.com>
18645
18646 PR target/112573
18647 * config/aarch64/aarch64.cc (aarch64_legitimize_address): Reassociate
18648 badly formed CONST expressions.
18649
186502024-01-16 Daniel Cederman <cederman@gaisler.com>
18651
18652 * config/sparc/sparc.cc (next_active_non_empty_insn): Length 0 treated as empty
18653
186542024-01-16 Daniel Cederman <cederman@gaisler.com>
18655
18656 * config/sparc/sparc.cc (atomic_insn_for_leon3_p): Treat membar_storeload as atomic
18657 * config/sparc/sync.md (membar_storeload): Turn into named insn
18658 and add GR712RC errata workaround.
18659 (membar_v8): Add GR712RC errata workaround.
18660
186612024-01-16 Andreas Larsson <andreas@gaisler.com>
18662
18663 * config/sparc/sync.md (*membar_storeload_leon3): Remove
18664 (*membar_storeload): Enable for LEON
18665
186662024-01-16 Jakub Jelinek <jakub@redhat.com>
18667
18668 PR tree-optimization/113372
18669 PR middle-end/90348
18670 PR middle-end/110115
18671 PR middle-end/111422
18672 * cfgexpand.cc (add_scope_conflicts_2): New function.
18673 (add_scope_conflicts_1): Use it.
18674
186752024-01-16 Georg-Johann Lay <avr@gjlay.de>
18676
18677 * config/avr/avr-mcus.def (avr16eb14, avr16eb20, avr16eb28, avr16eb32)
18678 (avr16ea28, avr16ea32, avr16ea48, avr32ea28, avr32ea32, avr32ea48): Add.
18679 * doc/avr-mmcu.texi: Regenerate.
18680
186812024-01-16 Feng Xue <fxue@os.amperecomputing.com>
18682
18683 PR tree-optimization/113091
18684 * tree-vect-slp.cc (vect_slp_has_scalar_use): New function.
18685 (vect_bb_slp_mark_live_stmts): New parameter scalar_use_map, check
18686 scalar use with new function.
18687 (vect_bb_slp_mark_live_stmts): New function as entry to existing
18688 overriden functions with same name.
18689 (vect_slp_analyze_operations): Call new entry function to mark
18690 live statements.
18691
186922024-01-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18693
18694 PR target/113404
18695 * config/riscv/riscv.cc (riscv_override_options_internal): Report sorry
18696 for RVV in big-endian mode.
18697
186982024-01-16 Yanzhang Wang <yanzhang.wang@intel.com>
18699
18700 * config/riscv/riscv.cc (riscv_arg_has_vector): Delete.
18701 (riscv_pass_in_vector_p): Delete.
18702 (riscv_init_cumulative_args): Delete the checking.
18703 (riscv_get_arg_info): Delete the checking.
18704 (riscv_function_value): Delete the checking.
18705 * config/riscv/riscv.h: Delete the member for checking.
18706
187072024-01-15 Georg-Johann Lay <avr@gjlay.de>
18708
18709 * doc/invoke.texi (AVR Options) [-mskip-bug]: Add documentation.
18710
187112024-01-15 Liao Shihua <shihua@iscas.ac.cn>
18712
18713 * config.gcc: Include riscv_bitmanip.h.
18714 * config/riscv/bitmanip.md: Changed mode form X to GPR in orcb and clmul pattern.
18715 * config/riscv/crypto.md: Changed mode form X to GPR in brev8 pattern.
18716 * config/riscv/riscv-builtins.cc (AVAIL): Adding new bitmanip builtins.
18717 (RISCV_BUILTIN_NO_PREFIX): New helper macro.
18718 * config/riscv/riscv-cmo.def (RISCV_BUILTIN): Add '_32'/'_64' postfix to builtins.
18719 * config/riscv/riscv-ftypes.def (2): New ftypes.
18720 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): New builtins.
18721 (RISCV_BUILTIN_NO_PREFIX): Likewise.
18722 * config/riscv/riscv_bitmanip.h: New file.
18723
187242024-01-15 Liao Shihua <shihua@iscas.ac.cn>
18725
18726 * config.gcc: Include riscv_crypto.h.
18727 * config/riscv/riscv_crypto.h: New file.
18728
187292024-01-15 Vladimir N. Makarov <vmakarov@redhat.com>
18730
18731 PR middle-end/113354
18732 * lra-constraints.cc (curr_insn_transform): Spill pseudo only used
18733 in the insn if the corresponding operand does not require hard
18734 register anymore.
18735
187362024-01-15 Georg-Johann Lay <avr@gjlay.de>
18737
18738 PR target/107201
18739 * config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib.
18740 * config/avr/driver-avr.cc (avr_no_devlib): New function.
18741 (avr_devicespecs_file): Use it to remove -nodevicelib from the
18742 options for cores only.
18743 * config/avr/avr-arch.h (avr_get_parch): New prototype.
18744 * config/avr/avr-devices.cc (avr_get_parch): New function.
18745
187462024-01-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18747
18748 PR target/113247
18749 * config/riscv/riscv-protos.h (struct regmove_vector_cost): Add vector to scalar regmove.
18750 * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Ditto.
18751 * config/riscv/riscv.cc (riscv_builtin_vectorization_cost): Adjust vec_construct cost.
18752
187532024-01-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18754
18755 PR target/113281
18756 * config/riscv/riscv-vector-costs.cc (costs::adjust_vect_cost_per_loop): New function.
18757 (costs::finish_cost): Adjust cost for LOOP LEN with NITERS < VF.
18758 * config/riscv/riscv-vector-costs.h: New function.
18759
187602024-01-15 Richard Biener <rguenther@suse.de>
18761
18762 PR tree-optimization/113385
18763 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
18764 First redirect, then split the exit edge.
18765
187662024-01-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18767
18768 * config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo):
18769 Remove m_num_vector_iterations.
18770 * config/riscv/riscv-vector-costs.h: Ditto.
18771
187722024-01-15 Andrew Pinski <quic_apinski@quicinc.com>
18773
18774 PR target/113156
18775 * config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag.
18776 (-mbranch-cost): Set "Optimization" flag.
18777
187782024-01-15 Jakub Jelinek <jakub@redhat.com>
18779
18780 PR tree-optimization/113370
18781 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Only
18782 set rem to prec % (2 * limb_prec) if m_upwards_2limb, otherwise
18783 set it to just prec % limb_prec.
18784
187852024-01-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18786
18787 PR target/113393
18788 * config/riscv/vector.md: Fix ternary attributes.
18789
187902024-01-14 Georg-Johann Lay <avr@gjlay.de>
18791
18792 PR target/112944
18793 * configure.ac [target=avr]: Check availability of emulations
18794 avrxmega2_flmap and avrxmega4_flmap, resulting in new config vars
18795 HAVE_LD_AVR_AVRXMEGA2_FLMAP and HAVE_LD_AVR_AVRXMEGA4_FLMAP.
18796 * configure: Regenerate.
18797 * config.in: Regenerate.
18798 * doc/invoke.texi (AVR Options): Document -mflmap, -mrodata-in-ram,
18799 __AVR_HAVE_FLMAP__, __AVR_RODATA_IN_RAM__.
18800 * config/avr/avr.opt (-mflmap, -mrodata-in-ram): New options.
18801 * config/avr/avr-arch.h (enum avr_device_specific_features):
18802 Add AVR_ISA_FLMAP.
18803 * config/avr/avr-mcus.def (AVR_MCU) [avr64*, avr128*]: Set isa flag
18804 AVR_ISA_FLMAP.
18805 * config/avr/avr.cc (avr_arch_index, avr_has_rodata_p): New vars.
18806 (avr_set_core_architecture): Set avr_arch_index.
18807 (have_avrxmega2_flmap, have_avrxmega4_flmap)
18808 (have_avrxmega3_rodata_in_flash): Set new static const bool according
18809 to configure results.
18810 (avr_rodata_in_flash_p): New function using them.
18811 (avr_asm_init_sections): Let readonly_data_section->unnamed.callback
18812 track avr_need_copy_data_p only if not avr_rodata_in_flash_p().
18813 (avr_asm_named_section): Track avr_has_rodata_p.
18814 (avr_file_end): Emit __do_copy_data also when avr_has_rodata_p
18815 and not avr_rodata_in_flash_p ().
18816 * config/avr/specs.h (CC1_SPEC): Add %(cc1_rodata_in_ram).
18817 (LINK_SPEC): Add %(link_rodata_in_ram).
18818 (LINK_ARCH_SPEC): Remove.
18819 * config/avr/gen-avr-mmcu-specs.cc (have_avrxmega3_rodata_in_flash)
18820 (have_avrxmega2_flmap, have_avrxmega4_flmap): Set new static
18821 const bool according to configure results.
18822 (diagnose_mrodata_in_ram): New function.
18823 (print_mcu): Generate specs with the following changes:
18824 <*cc1_misc, *asm_misc, *link_misc>: New specs so that we don't
18825 need to extend avr/specs.h each time we add a new bell or whistle.
18826 <*cc1_rodata_in_ram, *link_rodata_in_ram>: New specs to diagnose
18827 -m[no-]rodata-in-ram.
18828 <*cpp_rodata_in_ram>: New. Does -D__AVR_RODATA_IN_RAM__=0/1.
18829 <*cpp_mcu>: Add -D__AVR_AVR_FLMAP__ if it applies.
18830 <*cpp>: Add %(cpp_rodata_in_ram).
18831 <*link_arch>: Use emulation avrxmega2_flmap, avrxmega4_flmap as
18832 requested.
18833 <*self_spec>: Add -mflmap or %<mflmap as needed.
18834
188352024-01-14 Jeff Law <jlaw@ventanamicro.com>
18836
18837 * config/mips/mips.md (ior<mode>3_mips16_asmacro): Use SImode,
18838 not the GPR iterator. Adjust pattern name and mode attribute
18839 accordingly.
18840
188412024-01-13 Jakub Jelinek <jakub@redhat.com>
18842
18843 PR tree-optimization/113361
18844 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr):
18845 Fix up determination of the type for > limb_prec constants.
18846
188472024-01-12 Georg-Johann Lay <avr@gjlay.de>
18848
18849 * doc/extend.texi (AVR Named Address Spaces, Limitations and Caveats):
18850 Add web-link to the avr-gcc wiki.
18851
188522024-01-12 Georg-Johann Lay <avr@gjlay.de>
18853
18854 * doc/extend.texi (AVR Variable Attributes) [address]: Remove
18855 documentation for a version without argument, which is not supported.
18856
188572024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18858
18859 * config/arm/arm_neon.h
18860 (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New.
18861 (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
18862 (vld1_f16_x4, vld1_f32_x4): New.
18863 (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
18864 (vld1_bf16_x4): New.
18865 (vld1q_types_x4): Updated to use vld1q_x4
18866 from arm_neon_builtins.def
18867 * config/arm/arm_neon_builtins.def
18868 (vld1_x4): Updated entries.
18869 (vld1q_x4): New entries, but comes from the old vld1_x4
18870 * config/arm/neon.md
18871 (neon_vld1q_x4<mode>): Updated from neon_vld1_x4<mode>.
18872
188732024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18874
18875 * config/arm/arm_neon.h
18876 (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New.
18877 (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New.
18878 (vld1_f16_x3, vld1_f32_x3): New.
18879 (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New.
18880 (vld1_bf16_x3): New.
18881 (vld1q_types_x3): Updated to use vld1q_x3 from
18882 arm_neon_builtins.def
18883 * config/arm/arm_neon_builtins.def
18884 (vld1_x3): Updated entries.
18885 (vld1q_x3): New entries, but comes from the old vld1_x2
18886 * config/arm/neon.md
18887 (neon_vld1q_x3<mode>): Updated from neon_vld1_x3<mode>.
18888
188892024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18890
18891 * config/arm/arm_neon.h
18892 (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New.
18893 (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New.
18894 (vld1_f16_x2, vld1_f32_x2): New.
18895 (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New.
18896 (vld1_bf16_x2): New.
18897 (vld1q_types_x2): Updated to use vld1q_x2 from
18898 arm_neon_builtins.def
18899 * config/arm/arm_neon_builtins.def
18900 (vld1_x2): Updated entries.
18901 (vld1q_x2): New entries, but comes from the old vld1_x2
18902 * config/arm/neon.md
18903 (neon_vld1<VMEMX2_q>_x2<VDQX:mode>): Updated from
18904 neon_vld1_x2<mode>.
18905
189062024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18907
18908 * config/arm/arm_neon.h
18909 (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New.
18910 (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New.
18911 (vst1q_f16_x4, vst1q_f32_x4): New.
18912 (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New.
18913 (vst1q_bf16_x4): New.
18914 * config/arm/arm_neon_builtins.def (vst1q_x4): New entries.
18915 * config/arm/neon.md
18916 (neon_vst1q_x4<mode>): New.
18917 (neon_vst1x4qa<mode>, neon_vst1x4qb<mode>): New.
18918 * config/arm/unspecs.md
18919 (UNSPEC_VST1X4A, UNSPEC_VST1X4B): New.
18920
189212024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18922
18923 * config/arm/arm_neon.h
18924 (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New.
18925 (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New.
18926 (vst1q_f16_x3, vst1q_f32_x3): New.
18927 (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New.
18928 (vst1q_bf16_x3): New.
18929 * config/arm/arm_neon_builtins.def (vst1q_x3): New entries.
18930 * config/arm/neon.md
18931 (neon_vst1q_x3<mode>): New.
18932 (neon_vld1x3qa<mode>, neon_vst1x3qb<mode>): New.
18933 * config/arm/unspecs.md
18934 (UNSPEC_VST1X3A, UNSPEC_VST1X3B): New.
18935
189362024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18937
18938 * config/arm/arm_neon.h
18939 (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New.
18940 (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New.
18941 (vst1q_f16_x2, vst1q_f32_x2): New.
18942 (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New.
18943 (vst1q_bf16_x2): New.
18944 * config/arm/arm_neon_builtins.def (vst1<_x2): New entries.
18945 * config/arm/neon.md
18946 (neon_vst1<VMEMX2_q>_x2<VDQX:mode>): Updated from
18947 neon_vst1_x2<mode>.
18948 * config/arm/iterators.md
18949 (VMEMX2): New mode iterator.
18950 (VMEMX2_q): New mode attribute.
18951
189522024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18953
18954 * config/arm/arm_neon.h
18955 (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New.
18956 (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New.
18957 (vst1_f16_x4, vst1_f32_x4): New.
18958 (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New.
18959 (vst1_bf16_x4): New.
18960 * config/arm/arm_neon_builtins.def (vst1_x4): New entries.
18961 * config/arm/neon.md (vst1_x4<mode>): New.
18962
189632024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18964
18965 * config/arm/arm_neon.h
18966 (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New.
18967 (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New.
18968 (vst1_f16_x3, vst1_f32_x3): New.
18969 (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New.
18970 (vst1_bf16_x3): New.
18971 * config/arm/arm_neon_builtins.def (vst1_x3): New entries.
18972 * config/arm/neon.md (vst1_x3<mode>): New.
18973
189742024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18975
18976 * config/arm/arm_neon.h
18977 (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New.
18978 (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New.
18979 (vst1_f16_x2, vst1_f32_x2): New.
18980 (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New.
18981 (vst1_bf16_x2): New.
18982 * config/arm/arm_neon_builtins.def (vst1_x2): New entries.
18983 * config/arm/neon.md (vst1_x2<mode>): New.
18984
189852024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
18986
18987 * config/arm/arm_neon.h
18988 (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New.
18989 (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New.
18990 (vld1q_f16_x4, vld1q_f32_x4): New.
18991 (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New.
18992 (vld1q_bf16_x4): New.
18993 * config/arm/arm_neon_builtins.def (vld1_x4): New entries.
18994 * config/arm/neon.md
18995 (neon_vld1_x4<mode>): New.
18996 (neon_vld1x4qa<mode>, neon_vld1x4qb<mode>): New
18997 * config/arm/unspecs.md
18998 (UNSPEC_VLD1X4A, UNSPEC_VLD1X4B): New.
18999
190002024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
19001
19002 * config/arm/arm_neon.h
19003 (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New.
19004 (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New.
19005 (vld1q_f16_x3, vld1q_f32_x3): New.
19006 (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New.
19007 (vld1q_bf16_x3): New.
19008 * config/arm/arm_neon_builtins.def (vld1_x3): New entries.
19009 * config/arm/neon.md
19010 (neon_vld1_x3<mode>): New.
19011 (neon_vld1x3qa<mode>, neon_vld1x3qb<mode>): New.
19012 * config/arm/unspecs.md
19013 (UNSPEC_VLD1X3A, UNSPEC_VLD1X3B): New.
19014
190152024-01-12 Ezra Sitorus <ezra.sitorus@arm.com>
19016
19017 * config/arm/arm_neon.h
19018 (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New.
19019 (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New.
19020 (vld1q_f16_x2, vld1q_f32_x2): New.
19021 (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New.
19022 (vld1q_bf16_x2): New.
19023 * config/arm/arm_neon_builtins.def (vld1_x2): New entries.
19024 * config/arm/neon.md (vld1_x2<mode>): New.
19025
190262024-01-12 Tamar Christina <tamar.christina@arm.com>
19027
19028 PR tree-optimization/113287
19029 * doc/sourcebuild.texi (check_effective_target_bitint65535): New.
19030
190312024-01-12 Tamar Christina <tamar.christina@arm.com>
19032
19033 * tree-vect-loop-manip.cc (vect_loop_versioning): Replace single_exit.
19034 * tree-vect-loop.cc (vect_transform_loop): Likewise.
19035
190362024-01-12 Tamar Christina <tamar.christina@arm.com>
19037
19038 PR tree-optimization/113178
19039 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Fill in all
19040 alternate exits.
19041
190422024-01-12 Tamar Christina <tamar.christina@arm.com>
19043
19044 PR tree-optimization/113237
19045 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use
19046 existing LCSSA variable for exit when all exits are early break.
19047
190482024-01-12 Tamar Christina <tamar.christina@arm.com>
19049
19050 PR tree-optimization/113137
19051 PR tree-optimization/113136
19052 PR tree-optimization/113172
19053 PR tree-optimization/113178
19054 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
19055 Maintain PHIs on inverted loops.
19056 (vect_do_peeling): Maintain virtual PHIs on inverted loops.
19057 * tree-vect-loop.cc (vec_init_loop_exit_info): Pick exit closes to
19058 latch.
19059 (vect_create_loop_vinfo): Record all conds instead of only alt ones.
19060
190612024-01-12 Tamar Christina <tamar.christina@arm.com>
19062
19063 PR tree-optimization/113135
19064 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Rework
19065 dependency analysis.
19066
190672024-01-12 Iain Sandoe <iain@sandoe.co.uk>
19068
19069 * config/rs6000/host-darwin.cc (segv_handler): Use the revised
19070 diagnostics class member name for abort of error.
19071
190722024-01-12 Georg-Johann Lay <avr@gjlay.de>
19073
19074 * config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from
19075 format string to %s argument.
19076
190772024-01-12 John David Anglin <danglin@gcc.gnu.org>
19078 Jakub Jelinek <jakub@redhat.com>
19079
19080 PR middle-end/113182
19081 * varasm.cc (process_pending_assemble_externals,
19082 assemble_external_libcall): Use targetm.strip_name_encoding
19083 before calling get_identifier.
19084
190852024-01-12 Richard Sandiford <richard.sandiford@arm.com>
19086
19087 PR target/113196
19088 * config/aarch64/aarch64.h (machine_function::advsimd_zero_insn):
19089 New member variable.
19090 * config/aarch64/aarch64-protos.h (aarch64_split_simd_shift_p):
19091 Declare.
19092 * config/aarch64/iterators.md (Vnarrowq2): New mode attribute.
19093 * config/aarch64/aarch64-simd.md
19094 (vec_unpacku_hi_<mode>, vec_unpacks_hi_<mode>): Recombine into...
19095 (vec_unpack<su>_hi_<mode>): ...this. Move the generation of
19096 zip2 for zero-extends to...
19097 (aarch64_simd_vec_unpack<su>_hi_<mode>): ...a split of this
19098 instruction. Fix big-endian handling.
19099 (vec_unpacku_lo_<mode>, vec_unpacks_lo_<mode>): Recombine into...
19100 (vec_unpack<su>_lo_<mode>): ...this. Move the generation of
19101 zip1 for zero-extends to...
19102 (<optab><Vnarrowq><mode>2): ...a split of this instruction.
19103 Fix big-endian handling.
19104 (*aarch64_zip1_uxtl): New pattern.
19105 (aarch64_usubw<mode>_lo_zip, aarch64_uaddw<mode>_lo_zip): Delete
19106 (aarch64_usubw<mode>_hi_zip, aarch64_uaddw<mode>_hi_zip): Likewise.
19107 * config/aarch64/aarch64.cc (aarch64_get_shareable_reg): New function.
19108 (aarch64_gen_shareable_zero): Use it.
19109 (aarch64_split_simd_shift_p): New function.
19110
191112024-01-12 Richard Sandiford <richard.sandiford@arm.com>
19112
19113 * emit-rtl.h (rtl_data::x_function_beg_note): New member variable.
19114 (function_beg_insn): New macro.
19115 * function.cc (expand_function_start): Initialize function_beg_insn.
19116
191172024-01-12 Richard Sandiford <richard.sandiford@arm.com>
19118
19119 PR target/112989
19120 * config/aarch64/aarch64-sve-builtins.h
19121 (function_builder::m_overload_names): Replace with...
19122 * config/aarch64/aarch64-sve-builtins.cc (overload_names): ...this
19123 new global.
19124 (add_overloaded_function): Update accordingly, using get_identifier
19125 to get a GGC-friendly record of the name.
19126
191272024-01-12 Richard Sandiford <richard.sandiford@arm.com>
19128
19129 PR target/112989
19130 * config/aarch64/aarch64-sve-builtins.def: Don't include
19131 aarch64-sve-builtins-sme.def.
19132 (DEF_SME_ZA_FUNCTION_GS, DEF_SME_ZA_FUNCTION): Move to...
19133 * config/aarch64/aarch64-sve-builtins-sme.def: ...here.
19134 (DEF_SME_FUNCTION): New macro. Use it and DEF_SME_FUNCTION_GS
19135 instead of DEF_SVE_*. Add AARCH64_FL_SME to anything that
19136 requires AARCH64_FL_SME2.
19137 * config/aarch64/aarch64-sve-builtins-sve2.def: Make same
19138 AARCH64_FL_SME adjustment here.
19139 * config/aarch64/aarch64-sve-builtins.cc (function_groups): Don't
19140 include SME intrinsics.
19141 (sme_function_groups): New array.
19142 (handle_arm_sve_h): Remove check for AARCH64_FL_SME.
19143 (handle_arm_sme_h): Use sme_function_groups instead of function_groups.
19144
191452024-01-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19146
19147 PR target/113281
19148 * config/riscv/riscv-protos.h (struct regmove_vector_cost): New struct.
19149 (struct cpu_vector_cost): Add regmove struct.
19150 (get_vector_costs): Export as global.
19151 * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Adjust scalar_to_vec cost.
19152 (costs::add_stmt_cost): Ditto.
19153 * config/riscv/riscv.cc (get_common_costs): Export global function.
19154
191552024-01-12 Jakub Jelinek <jakub@redhat.com>
19156
19157 PR tree-optimization/113334
19158 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Use
19159 wi::neg_p (wi::to_wide (op)) instead of tree_int_cst_sgn (op) < 0
19160 to determine if number should be extended by all ones rather than zero
19161 extended.
19162
191632024-01-12 Jakub Jelinek <jakub@redhat.com>
19164
19165 PR tree-optimization/113330
19166 * tree-sra.cc (create_access): Punt for BITINT_TYPE accesses with
19167 too large size.
19168
191692024-01-12 Jakub Jelinek <jakub@redhat.com>
19170
19171 PR tree-optimization/113323
19172 * gimple-lower-bitint.cc (bitint_dom_walker::before_dom_children): Fix
19173 check for lhs being large/huge _BitInt not in m_names.
19174
191752024-01-12 Jakub Jelinek <jakub@redhat.com>
19176
19177 PR tree-optimization/113316
19178 * gimple-lower-bitint.cc (bitint_large_huge::lower_call): Handle
19179 uninitialized large/huge _BitInt arguments to calls.
19180
191812024-01-12 Jakub Jelinek <jakub@redhat.com>
19182
19183 * gimple-lower-bitint.cc (mergeable_op): Instead of comparing
19184 TYPE_SIZE (t) of large/huge BITINT_TYPEs, compare
19185 CEIL (TYPE_PRECISION (t), limb_prec).
19186 (bitint_large_huge::handle_cast): Likewise.
19187
191882024-01-12 Ilya Leoshkevich <iii@linux.ibm.com>
19189
19190 PR sanitizer/113284
19191 * config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
19192 Use assemble_function_label_final () for Power ELF V1 ABI.
19193 * output.h (assemble_function_label_final): New function.
19194 * varasm.cc (assemble_function_label_raw): Use
19195 assemble_function_label_final ().
19196 (assemble_function_label_final): New function.
19197
191982024-01-12 Richard Biener <rguenther@suse.de>
19199
19200 PR middle-end/113344
19201 * match.pd ((double)float CMP (double)float -> float CMP float):
19202 Perform result type check only for vectors.
19203 * fold-const.cc (fold_binary_loc): Likewise.
19204
192052024-01-12 Haochen Jiang <haochen.jiang@intel.com>
19206
19207 * config/i386/sse.md (sdot_prod<mode>): Remove redundant SET.
19208 (usdot_prod<mode>): Ditto.
19209 (sdot_prod<mode>): Ditto.
19210 (udot_prod<mode>): Ditto.
19211
192122024-01-12 Haochen Jiang <haochen.jiang@intel.com>
19213
19214 PR target/113288
19215 * config/i386/i386-c.cc (ix86_target_macros_internal):
19216 Add __AVX10_1__, __AVX10_1_256__ and __AVX10_1_512__.
19217
192182024-01-12 Richard Biener <rguenther@suse.de>
19219
19220 PR target/112280
19221 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
19222 Do not generate code when d.testing_p.
19223
192242024-01-12 liuhongt <hongtao.liu@intel.com>
19225
19226 PR target/113039
19227 * doc/invoke.texi (fcf-protection=): Update documents.
19228
192292024-01-12 Pan Li <pan2.li@intel.com>
19230
19231 * config/riscv/riscv.cc (riscv_v_ext_mode_p): Update the
19232 comments of predicate func riscv_v_ext_mode_p.
19233
192342024-01-12 Feng Wang <wangfeng@eswincomputing.com>
19235
19236 * config/riscv/riscv-vector-builtins.def (vfloat16m8_t):
19237 Modify ABI-name length of vfloat16m8_t
19238
192392024-01-12 Li Wei <liwei@loongson.cn>
19240
19241 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
19242 Adjust.
19243
192442024-01-12 Li Wei <liwei@loongson.cn>
19245
19246 * config/loongarch/loongarch.md (add<mode>3): Removed.
19247 (*addsi3): New.
19248 (addsi3): Ditto.
19249 (adddi3): Ditto.
19250 (*addsi3_extended): Removed.
19251 (addsi3_extended): New.
19252
192532024-01-11 Jin Ma <jinma@linux.alibaba.com>
19254
19255 * config/riscv/thead.md: Add limits for splits.
19256
192572024-01-11 Andrew Pinski <quic_apinski@quicinc.com>
19258
19259 PR middle-end/113322
19260 * expr.cc (do_store_flag): Don't try single bit tests with
19261 comparison on vector types.
19262
192632024-01-11 Andrew Pinski <quic_apinski@quicinc.com>
19264
19265 PR tree-optimization/113301
19266 * match.pd (`1/x`): Delay signed case until late.
19267
192682024-01-11 Georg-Johann Lay <avr@gjlay.de>
19269
19270 * doc/invoke.texi (AVR Options): Move -mrmw, -mn-flash, -mshort-calls
19271 and -msp8 to...
19272 (AVR Internal Options): ...this new @subsubsection.
19273
192742024-01-11 Vladimir N. Makarov <vmakarov@redhat.com>
19275
19276 PR rtl-optimization/112918
19277 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p.
19278 (in_class_p): Restrict condition for narrowing class in case of
19279 allow_all_reload_class_changes_p.
19280 (process_alt_operands): Try to match operand without and with
19281 narrowing reg class. Discourage narrowing the class. Finish insn
19282 matching only if there is no class narrowing.
19283 (curr_insn_transform): Pass true to in_class_p for reg operand win.
19284
192852024-01-11 Richard Biener <rguenther@suse.de>
19286
19287 PR tree-optimization/112505
19288 * tree-vect-loop.cc (vectorizable_induction): Reject
19289 bit-precision induction.
19290
192912024-01-11 Richard Biener <rguenther@suse.de>
19292
19293 PR tree-optimization/113126
19294 * match.pd ((double)float CMP (double)float -> float CMP float):
19295 Make sure the boolean type is the same.
19296 * fold-const.cc (fold_binary_loc): Likewise.
19297
192982024-01-11 Richard Biener <rguenther@suse.de>
19299
19300 PR tree-optimization/112636
19301 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Call
19302 estimate_numbers_of_iterations before querying
19303 get_max_loop_iterations_int.
19304 (pass_ch::execute): Initialize SCEV and loops appropriately.
19305
193062024-01-11 Georg-Johann Lay <avr@gjlay.de>
19307
19308 * config/avr/avr-devices.cc (avr_texinfo): Adjust documentation for
19309 Reduced Tiny.
19310 * config/avr/gen-avr-mmcu-texi.cc (main): Add @anchor for each core.
19311 * doc/extend.texi (AVR Variable Attributes): Improve documentation
19312 of io, io_low and address attributes.
19313 * doc/invoke.texi (AVR Options): Add some anchors for external refs.
19314 * doc/avr-mmcu.texi: Rebuild.
19315
193162024-01-11 Yang Yujie <yangyujie@loongson.cn>
19317
19318 PR target/113233
19319 * config/loongarch/genopts/loongarch.opt.in: Mark options with
19320 the "Save" property.
19321 * config/loongarch/loongarch.opt: Same.
19322 * config/loongarch/loongarch-opts.cc: Refresh -mcmodel= state
19323 according to la_target.
19324 * config/loongarch/loongarch.cc: Implement TARGET_OPTION_{SAVE,
19325 RESTORE} for the la_target structure; Rename option conditions
19326 to have the same "la_" prefix.
19327 * config/loongarch/loongarch.h: Same.
19328
193292024-01-11 Pan Li <pan2.li@intel.com>
19330
19331 * loop-unroll.cc (insert_var_expansion_initialization): Leverage
19332 MODE_HAS_SIGNED_ZEROS for expansion variable initialization.
19333
193342024-01-11 Alex Coplan <alex.coplan@arm.com>
19335
19336 PR target/113077
19337 * config/aarch64/aarch64-ldp-fusion.cc (filter_notes): Add
19338 fr_expr param to extract REG_FRAME_RELATED_EXPR notes.
19339 (combine_reg_notes): Handle REG_FRAME_RELATED_EXPR notes, and
19340 synthesize these if needed. Update caller ...
19341 (ldp_bb_info::fuse_pair): ... here.
19342 (ldp_bb_info::try_fuse_pair): Punt if either insn has writeback
19343 and either insn is frame-related.
19344 (find_trailing_add): Punt on frame-related insns.
19345 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
19346 REG_FRAME_RELATED_EXPR instead of REG_CFA_OFFSET.
19347
193482024-01-11 YunQiang Su <syq@gcc.gnu.org>
19349
19350 * config/mips/mips.cc (mips_start_function_definition):
19351 Add ATTRIBUTE_UNUSED.
19352
193532024-01-11 Richard Biener <rguenther@suse.de>
19354
19355 PR middle-end/112740
19356 * expr.cc (store_constructor): Check the integer vector
19357 mask has a single bit per element before using sign-extension
19358 to expand an uniform vector.
19359
193602024-01-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19361
19362 * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): VLA
19363 preempt VLS on unknown NITERS loop.
19364
193652024-01-11 Haochen Jiang <haochen.jiang@intel.com>
19366
19367 * doc/invoke.texi: Add -mevex512.
19368
193692024-01-11 Lulu Cheng <chenglulu@loongson.cn>
19370
19371 * config/loongarch/loongarch.md (one_cmpl<mode>2): Replace GPR with X.
19372 (*nor<mode>3): Likewise.
19373 (nor<mode>3): Likewise.
19374 (*negsi2_extended): New template.
19375 (*<optab>si3_internal): Likewise.
19376 (*one_cmplsi2_internal): Likewise.
19377 (*norsi3_internal): Likewise.
19378 (*<optab>nsi_internal): Likewise.
19379 (bytepick_w_<bytepick_imm>_extend): Modify this template according to the
19380 modified bit operation to make the optimization work.
19381
193822024-01-11 liuhongt <hongtao.liu@intel.com>
19383
19384 PR target/104401
19385 * match.pd (VEC_COND_EXPR: A < B ? A : B -> MIN_EXPR): New patten match.
19386
193872024-01-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19388
19389 * config/riscv/riscv.cc (get_common_costs): Switch RVV cost model.
19390 (get_vector_costs): Ditto.
19391 (riscv_builtin_vectorization_cost): Ditto.
19392
193932024-01-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19394
19395 * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): Minior tweak.
19396
193972024-01-10 Antoni Boucher <bouanto@zoho.com>
19398
19399 PR jit/111396
19400 * ipa-fnsummary.cc (ipa_fnsummary_cc_finalize): Call
19401 ipa_free_size_summary.
19402 * ipa-icf.cc (ipa_icf_cc_finalize): New function.
19403 * ipa-profile.cc (ipa_profile_cc_finalize): New function.
19404 * ipa-prop.cc (ipa_prop_cc_finalize): New function.
19405 * ipa-prop.h (ipa_prop_cc_finalize): New function.
19406 * ipa-sra.cc (ipa_sra_cc_finalize): New function.
19407 * ipa-utils.h (ipa_profile_cc_finalize, ipa_icf_cc_finalize,
19408 ipa_sra_cc_finalize): New functions.
19409 * toplev.cc (toplev::finalize): Call ipa_icf_cc_finalize,
19410 ipa_prop_cc_finalize, ipa_profile_cc_finalize and
19411 ipa_sra_cc_finalize
19412 Include ipa-utils.h.
19413
194142024-01-10 Jin Ma <jinma@linux.alibaba.com>
19415
19416 * config/riscv/riscv-protos.h (th_int_get_mask): New prototype.
19417 (th_int_get_save_adjustment): Likewise.
19418 (th_int_adjust_cfi_prologue): Likewise.
19419 * config/riscv/riscv.cc (BITSET_P): Moved away from here.
19420 (TH_INT_INTERRUPT): New macro.
19421 (riscv_expand_prologue): Add the processing of XTheadInt.
19422 (riscv_expand_epilogue): Likewise.
19423 * config/riscv/riscv.h (BITSET_P): Moved to here.
19424 * config/riscv/riscv.md: New unspec.
19425 * config/riscv/thead.cc (th_int_get_mask): New function.
19426 (th_int_get_save_adjustment): Likewise.
19427 (th_int_adjust_cfi_prologue): Likewise.
19428 * config/riscv/thead.md (th_int_push): New pattern.
19429 (th_int_pop): new pattern.
19430
194312024-01-10 Tamar Christina <tamar.christina@arm.com>
19432
19433 PR tree-optimization/112468
19434 * doc/sourcebuild.texi: Document ifn_copysign.
19435 * match.pd: Only apply transformation if target supports the IFN.
19436
194372024-01-10 Andrew Pinski <quic_apinski@quicinc.com>
19438
19439 PR tree-optimization/112581
19440 * gimple-if-to-switch.cc (pass_if_to_switch::execute): Call
19441 mark_ssa_maybe_undefs.
19442 * tree-ssa-reassoc.cc (can_reassociate_op_p): Uninitialized
19443 variables can not be reassociated.
19444 (init_range_entry): Check for uninitialized variables too.
19445 (init_reassoc): Call mark_ssa_maybe_undefs.
19446
194472024-01-10 Maciej W. Rozycki <macro@embecosm.com>
19448
19449 * config/riscv/riscv.cc (riscv_noce_conversion_profitable_p):
19450 Also handle sign extension.
19451
194522024-01-10 Alex Coplan <alex.coplan@arm.com>
19453
19454 * config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default
19455 to 0.
19456 (-mlate-ldp-fusion): Likewise.
19457
194582024-01-10 Tamar Christina <tamar.christina@arm.com>
19459
19460 PR tree-optimization/113287
19461 * tree-vect-stmts.cc (vectorizable_early_exit): Check the flags on edge
19462 instead of using BRANCH_EDGE to determine true edge.
19463
194642024-01-10 Richard Biener <rguenther@suse.de>
19465
19466 PR tree-optimization/113078
19467 * tree-vect-loop.cc (check_reduction_path): Canonicalize
19468 .COND_SUB to .COND_ADD.
19469
194702024-01-10 David Malcolm <dmalcolm@redhat.com>
19471
19472 * gcc-urlifier.cc (gcc_urlifier::get_url_suffix_for_option):
19473 Handle prefix mappings before calling find_opt.
19474 (selftest::gcc_urlifier_cc_tests): Add example of urlifying a
19475 "-fno-"-prefixed command-line option.
19476 * opts-common.cc (get_option_prefix_remapping): New.
19477 * opts.h (get_option_prefix_remapping): New decl.
19478
194792024-01-10 David Malcolm <dmalcolm@redhat.com>
19480
19481 * diagnostic.cc (diagnostic_context::report_diagnostic): Pass
19482 m_urlifier to pp_output_formatted_text.
19483 * pretty-print.cc: Add #define of INCLUDE_VECTOR.
19484 (obstack_append_string): New overload, taking a length.
19485 (urlify_quoted_string): Pass in an obstack ptr, rather than using
19486 that of the pp's buffer. Generalize to handle trailing text in
19487 the buffer beyond the run of quoted text.
19488 (class quoting_info): New.
19489 (on_begin_quote): New.
19490 (on_end_quote): New.
19491 (pp_format): Refactor phase 1 and phase 2 quoting support, moving
19492 it to calls to on_begin_quote and on_end_quote.
19493 (struct auto_obstack): New.
19494 (quoting_info::handle_phase_3): New.
19495 (pp_output_formatted_text): Add urlifier param. Use it if there
19496 is deferred urlification. Delete m_quotes.
19497 (selftest::pp_printf_with_urlifier): Pass urlifier to
19498 pp_output_formatted_text.
19499 (selftest::test_urlification): Update results for the existing
19500 case of quoted text stradding chunks; add more such test cases.
19501 * pretty-print.h (class quoting_info): New forward decl.
19502 (chunk_info::m_quotes): New field.
19503 (pp_output_formatted_text): Add optional urlifier param.
19504
195052024-01-10 David Malcolm <dmalcolm@redhat.com>
19506
19507 * pretty-print.cc (selftest::test_pp_format): Add selftest
19508 coverage for numbered args.
19509
195102024-01-10 Tamar Christina <tamar.christina@arm.com>
19511
19512 PR tree-optimization/113144
19513 PR tree-optimization/113145
19514 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg):
19515 Update all BB that the original exits dominated.
19516
195172024-01-10 Eric Botcazou <ebotcazou@adacore.com>
19518
19519 * dwarf2out.cc (modified_type_die): Extend the support of reverse
19520 storage order to enumeration types if -gstrict-dwarf is not passed.
19521 (gen_enumeration_type_die): Add REVERSE parameter and generate the
19522 DIE immediately after the existing one if it is true.
19523 (gen_tagged_type_die): Add REVERSE parameter and pass it in the
19524 call to gen_enumeration_type_die.
19525 (gen_type_die_with_usage): Add REVERSE parameter and pass it in the
19526 first recursive call as well as the call to gen_tagged_type_die.
19527 (gen_type_die): Add REVERSE parameter and pass it in the call to
19528 gen_type_die_with_usage.
19529
195302024-01-10 Jakub Jelinek <jakub@redhat.com>
19531
19532 PR tree-optimization/113120
19533 * tree-sra.cc (analyze_access_subtree): For BITINT_TYPE
19534 with root->size TYPE_PRECISION don't build anything new.
19535 Otherwise, if root->type is a BITINT_TYPE, use build_bitint_type
19536 rather than build_nonstandard_integer_type.
19537
195382024-01-10 Hongyu Wang <hongyu.wang@intel.com>
19539
19540 * config/i386/i386.opt: Adjust document.
19541 * doc/invoke.texi: Add description for
19542 -mapx-inline-asm-use-gpr32.
19543
195442024-01-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19545
19546 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor): Remove.
19547 (avg<v_double_trunc>3_floor): New pattern.
19548 (<u>avg<v_double_trunc>3_ceil): Remove.
19549 (avg<v_double_trunc>3_ceil): New pattern.
19550 (uavg<mode>3_floor): Ditto.
19551 (uavg<mode>3_ceil): Ditto.
19552 * config/riscv/riscv-protos.h (enum insn_flags): Add for average addition.
19553 (enum insn_type): Ditto.
19554 * config/riscv/riscv-v.cc: Ditto.
19555 * config/riscv/vector-iterators.md (ashiftrt): Remove.
19556 (ASHIFTRT): Ditto.
19557 * config/riscv/vector.md: Add VLS modes.
19558
195592024-01-10 Kewen Lin <linkw@linux.ibm.com>
19560
19561 PR target/111480
19562 * config/rs6000/vsx.md (VCZLSBB): New int iterator.
19563 (vczlsbb_char): New int attribute.
19564 (vclzlsbb_<mode>, vctzlsbb_<mode>): Merge to ...
19565 (vc<vczlsbb_char>zlsbb_<mode>): ... this.
19566 (*vctzlsbb_zext_<mode>): Rename to ...
19567 (*vc<vczlsbb_char>zlsbb_zext_<mode>): ... this, and extend it to
19568 cover vclzlsbb.
19569
195702024-01-10 Kewen Lin <linkw@linux.ibm.com>
19571
19572 PR target/112606
19573 * config/rs6000/rs6000.md (copysign<mode>3 IEEE128): Change predicate
19574 of the last argument from altivec_register_operand to any_operand. If
19575 operands[2] is CONST_DOUBLE, emit abs or neg abs depending on its sign
19576 otherwise if it doesn't satisfy altivec_register_operand, force it to
19577 REG using copy_to_mode_reg.
19578
195792024-01-10 Kewen Lin <linkw@linux.ibm.com>
19580
19581 PR middle-end/113100
19582 * builtins.cc (expand_builtin_stack_address): Guard stack point
19583 adjustment with SPARC_STACK_BOUNDARY_HACK.
19584
195852024-01-10 Yang Yujie <yangyujie@loongson.cn>
19586
19587 * config/loongarch/genopts/loongarch-strings: Remove explicit-reloc
19588 argument string definitions.
19589 * config/loongarch/loongarch-str.h: Same.
19590 * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs
19591 as aliases to -mexplicit-relocs={always,none}
19592 * config/loongarch/loongarch.opt: Regenerate.
19593 * config/loongarch/loongarch.cc: Same.
19594
195952024-01-10 Yang Yujie <yangyujie@loongson.cn>
19596
19597 * config/loongarch/loongarch-def.h: Define constants with
19598 enums instead of Macros.
19599
196002024-01-10 Yang Yujie <yangyujie@loongson.cn>
19601
19602 * config/loongarch/genopts/loongarch-strings: Rename.
19603 * config/loongarch/genopts/loongarch.opt.in: Same.
19604 * config/loongarch/loongarch-cpu.cc: Same.
19605 * config/loongarch/loongarch-def.cc: Same.
19606 * config/loongarch/loongarch-def.h: Same.
19607 * config/loongarch/loongarch-opts.cc: Same.
19608 * config/loongarch/loongarch-opts.h: Same.
19609 * config/loongarch/loongarch-str.h: Same.
19610 * config/loongarch/loongarch.opt: Same.
19611
196122024-01-10 Yang Yujie <yangyujie@loongson.cn>
19613
19614 * config/loongarch/genopts/genstr.sh: Prepend the isa_evolution
19615 variable with the common la_ prefix.
19616 * config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution
19617 flags as saved using TargetVariable.
19618 * config/loongarch/loongarch.opt: Same.
19619 * config/loongarch/loongarch-def.h: Define evolution_set to
19620 mark changes to the -march default.
19621 * config/loongarch/loongarch-driver.cc: Same.
19622 * config/loongarch/loongarch-opts.cc: Same.
19623 * config/loongarch/loongarch-opts.h: Define and use ISA evolution
19624 conditions around the la_target structure.
19625 * config/loongarch/loongarch.cc: Same.
19626 * config/loongarch/loongarch.md: Same.
19627 * config/loongarch/loongarch-builtins.cc: Same.
19628 * config/loongarch/loongarch-c.cc: Same.
19629 * config/loongarch/lasx.md: Same.
19630 * config/loongarch/lsx.md: Same.
19631 * config/loongarch/sync.md: Same.
19632
196332024-01-09 Jeff Law <jlaw@ventanamicro.com>
19634
19635 * config/epiphany/constraints.md (Car): Allow -1024..1023, no more,
19636 no less.
19637
196382024-01-09 Richard Sandiford <richard.sandiford@arm.com>
19639
19640 * config/mn10300/mn10300.md (subdi3_degenerate): Add isa attribute.
19641
196422024-01-09 Tamar Christina <tamar.christina@arm.com>
19643
19644 * tree-vect-loop.cc (vectorizable_live_operation_1): Drop unused
19645 restart_loop.
19646 (vectorizable_live_operation): Likewise.
19647
196482024-01-09 Tamar Christina <tamar.christina@arm.com>
19649
19650 PR tree-optimization/113199
19651 * tree-vect-loop.cc (vectorizable_live_operation_1): Use
19652 BIT_FIELD_REF.
19653
196542024-01-09 Jakub Jelinek <jakub@redhat.com>
19655
19656 PR target/113270
19657 * config.gcc (aarch64*-*-*): Add aarch64-builtins.h to target_gtfiles.
19658 * config/aarch64/aarch64-builtins.cc (aarch64_simd_types): Add extern
19659 GTY(()) declaration before the definition, drop GTY(()) drom the
19660 definition.
19661
196622024-01-09 Richard Biener <rguenther@suse.de>
19663
19664 PR tree-optimization/113026
19665 * tree-vect-loop-manip.cc (vect_do_peeling): Remove
19666 redundant and wrong niter bound setting. Move niter
19667 bound adjustment down.
19668
196692024-01-09 Tamar Christina <tamar.christina@arm.com>
19670
19671 PR middle-end/113163
19672 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
19673 Reject non-linear inductions that aren't supported.
19674
196752024-01-09 Roger Sayle <roger@nextmovesoftware.com>
19676
19677 * config/arc/arc.cc (arc_shift_alg): New enumerated type for
19678 left shift implementation strategies.
19679 (arc_shift_info): Type for each entry of the shift strategy table.
19680 (arc_shift_context_idx): Return a integer value for each code
19681 generation context, used as an index
19682 (arc_ashl_alg): Table indexed by context and shifted bit count.
19683 (arc_split_ashl): Use the arc_ashl_alg table to select SImode
19684 left shift implementation.
19685 (arc_rtx_costs) <case ASHIFT>: Use the arc_ashl_alg table to
19686 provide accurate costs, when optimizing for speed or size.
19687
196882024-01-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19689
19690 * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): Fix loop invariant check.
19691
196922024-01-09 Julian Brown <julian@codesourcery.com>
19693
19694 * gimplify.cc (gimplify_expr): Ensure OMP_ARRAY_SECTION has been
19695 processed out before gimplification.
19696 * tree-pretty-print.cc (dump_generic_node): Support OMP_ARRAY_SECTION.
19697 * tree.def (OMP_ARRAY_SECTION): New tree code.
19698
196992024-01-09 Jakub Jelinek <jakub@redhat.com>
19700
19701 PR tree-optimization/113210
19702 * tree-vect-loop.cc (vect_get_loop_niters): If non-INTEGER_CST
19703 value in *number_of_iterationsm1 PLUS_EXPR 1 is folded into
19704 INTEGER_CST, recompute *number_of_iterationsm1 as the INTEGER_CST
19705 minus 1.
19706
197072024-01-09 Eric Botcazou <ebotcazou@adacore.com>
19708
19709 PR rtl-optimization/113140
19710 * reorg.cc (fill_slots_from_thread): If we are to branch after the
19711 last instruction of the function, create an end label.
19712
197132024-01-09 Roger Sayle <roger@nextmovesoftware.com>
19714 Hongtao Liu <hongtao.liu@intel.com>
19715
19716 PR target/112992
19717 * config/i386/i386-expand.cc
19718 (ix86_convert_const_wide_int_to_broadcast): Allow call to
19719 ix86_expand_vector_init_duplicate to fail, and return NULL_RTX.
19720 (ix86_broadcast_from_constant): Revert recent change; Return a
19721 suitable MEMREF independently of mode/target combinations.
19722 (ix86_expand_vector_move): Allow ix86_expand_vector_init_duplicate
19723 to decide whether expansion is possible/preferrable. Only try
19724 forcing DImode constants to memory (and trying again) if calling
19725 ix86_expand_vector_init_duplicate fails with an DImode immediate
19726 constant.
19727 (ix86_expand_vector_init_duplicate) <case E_V2DImode>: Try using
19728 V4SImode for suitable immediate constants.
19729 <case E_V4DImode>: Try using V8SImode for suitable constants.
19730 <case E_V4HImode>: Fail for CONST_INT_P, i.e. use constant pool.
19731 <case E_V2HImode>: Likewise.
19732 <case E_V8HImode>: For CONST_INT_P try using V4SImode via widen.
19733 <case E_V16QImode>: For CONT_INT_P try using V8HImode via widen.
19734 <label widen>: Handle CONT_INTs via simplify_binary_operation.
19735 Allow recursive calls to ix86_expand_vector_init_duplicate to fail.
19736 <case E_V16HImode>: For CONST_INT_P try V8SImode via widen.
19737 <case E_V32QImode>: For CONST_INT_P try V16HImode via widen.
19738 (ix86_expand_vector_init): Move try using a broadcast for all_same
19739 with ix86_expand_vector_init_duplicate before using constant pool.
19740
197412024-01-09 Chung-Ju Wu <jasonwucj@gmail.com>
19742
19743 * doc/invoke.texi (Arm Options): Document Cortex-M52 options.
19744
197452024-01-09 Chung-Ju Wu <jasonwucj@gmail.com>
19746
19747 * config/arm/arm-cpus.in (cortex-m52): New cpu.
19748 * config/arm/arm-tables.opt: Regenerate.
19749 * config/arm/arm-tune.md: Regenerate.
19750
197512024-01-09 Jiahao Xu <xujiahao@loongson.cn>
19752
19753 * config/loongarch/lasx.md (vec_initv32qiv16qi): Rename to ..
19754 (vec_init<mode><lasxhalf>): .. this, and extend to mode.
19755 (@vec_concatz<mode>): New insn pattern.
19756 * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init):
19757 Handle VALS containing two vectors.
19758
197592024-01-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19760
19761 * config/riscv/riscv-vector-builtins-functions.def (vleff): Move comments.
19762 (vundefined): Ditto.
19763
197642024-01-09 Feng Wang <wangfeng@eswincomputing.com>
19765
19766 * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
19767 Add new function_base for crypto vector.
19768 (class bitmanip): Ditto.
19769 (class b_reverse):Ditto.
19770 (class vwsll): Ditto.
19771 (class clmul): Ditto.
19772 (class vg_nhab): Ditto.
19773 (class crypto_vv):Ditto.
19774 (class crypto_vi):Ditto.
19775 (class vaeskf2_vsm3c):Ditto.
19776 (class vsm3me): Ditto.
19777 (BASE): Add BASE declaration for crypto vector.
19778 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
19779 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
19780 Add crypto vector intrinsic definition.
19781 (vbrev): Ditto.
19782 (vclz): Ditto.
19783 (vctz): Ditto.
19784 (vwsll): Ditto.
19785 (vandn): Ditto.
19786 (vbrev8): Ditto.
19787 (vrev8): Ditto.
19788 (vrol): Ditto.
19789 (vror): Ditto.
19790 (vclmul): Ditto.
19791 (vclmulh): Ditto.
19792 (vghsh): Ditto.
19793 (vgmul): Ditto.
19794 (vaesef): Ditto.
19795 (vaesem): Ditto.
19796 (vaesdf): Ditto.
19797 (vaesdm): Ditto.
19798 (vaesz): Ditto.
19799 (vaeskf1): Ditto.
19800 (vaeskf2): Ditto.
19801 (vsha2ms): Ditto.
19802 (vsha2ch): Ditto.
19803 (vsha2cl): Ditto.
19804 (vsm4k): Ditto.
19805 (vsm4r): Ditto.
19806 (vsm3me): Ditto.
19807 (vsm3c): Ditto.
19808 * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
19809 Add new function_shape for crypto vector.
19810 (struct crypto_vi_def): Ditto.
19811 (struct crypto_vv_no_op_type_def): Ditto.
19812 (SHAPE): Add SHAPE declaration of crypto vector.
19813 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
19814 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
19815 Add new data type for crypto vector.
19816 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
19817 (vuint32mf2_t): Ditto.
19818 (vuint32m1_t): Ditto.
19819 (vuint32m2_t): Ditto.
19820 (vuint32m4_t): Ditto.
19821 (vuint32m8_t): Ditto.
19822 (vuint64m1_t): Ditto.
19823 (vuint64m2_t): Ditto.
19824 (vuint64m4_t): Ditto.
19825 (vuint64m8_t): Ditto.
19826 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
19827 Add new data struct for crypto vector.
19828 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
19829 (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
19830 * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
19831
198322024-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
19833
19834 PR sanitizer/113251
19835 * varasm.cc (assemble_function_label_raw): Do not call
19836 asan_function_start () without the current function.
19837
198382024-01-08 Cupertino Miranda <cupertino.miranda@oracle.com>
19839
19840 PR target/113225
19841 * btfout.cc (btf_collect_datasec): Skip creating BTF info for
19842 extern and kernel_helper attributed function decls.
19843
198442024-01-08 Cupertino Miranda <cupertino.miranda@oracle.com>
19845
19846 * btfout.cc (output_btf_strs): Changed.
19847
198482024-01-08 Tobias Burnus <tobias@codesourcery.com>
19849
19850 * config/gcn/mkoffload.cc (main): Handle gfx1100
19851 when setting the default XNACK.
19852
198532024-01-08 Tobias Burnus <tobias@codesourcery.com>
19854
19855 * config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
19856 * config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
19857 (ASM_SPEC): Handle gfx1100.
19858 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
19859 (enum gcn_isa): Add ISA_RDNA3.
19860 (TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
19861 * config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
19862 * config/gcn/gcn.cc (gcn_option_override,
19863 gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
19864 (gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
19865 TARGET_RDNA2 to TARGET_RDNA2_PLUS.
19866 (gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
19867 with gfx1100.
19868 * config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
19869 (TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
19870 __gfx1100__.
19871 * config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
19872 * config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
19873 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
19874 (isa_has_combined_avgprs, main): Handle gfx1100.
19875 * config/gcn/t-omp-device (isa): Add gfx1100.
19876
198772024-01-08 Richard Biener <rguenther@suse.de>
19878
19879 * doc/invoke.texi (-mmovbe): Clarify.
19880
198812024-01-08 Richard Biener <rguenther@suse.de>
19882
19883 PR tree-optimization/113026
19884 * tree-vect-loop.cc (vect_need_peeling_or_partial_vectors_p):
19885 Avoid an epilog in more cases.
19886 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust the
19887 epilogues niter upper bounds and estimates.
19888
198892024-01-08 Jakub Jelinek <jakub@redhat.com>
19890
19891 PR tree-optimization/113228
19892 * gimplify.cc (recalculate_side_effects): Do nothing for SSA_NAMEs.
19893
198942024-01-08 Jakub Jelinek <jakub@redhat.com>
19895
19896 PR tree-optimization/113120
19897 * gimple-lower-bitint.cc (gimple_lower_bitint): Fix handling of very
19898 large _BitInt zero INTEGER_CST PHI argument.
19899
199002024-01-08 Jakub Jelinek <jakub@redhat.com>
19901
19902 PR tree-optimization/113119
19903 * gimple-lower-bitint.cc (optimizable_arith_overflow): Punt if
19904 both REALPART_EXPR and cast from IMAGPART_EXPR appear, but cast
19905 is before REALPART_EXPR.
19906
199072024-01-08 Georg-Johann Lay <avr@gjlay.de>
19908
19909 PR target/112952
19910 * config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
19911 range when diagnosing attribute "io" and "io_low" are out of range.
19912 (avr_eval_addr_attrib): Don't ICE on empty address at that place.
19913 (avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
19914 in contexts other than static storage.
19915 (avr_asm_output_aligned_decl_common): Move output of decls with
19916 attribute "address", "io", and "io_low" to...
19917 (avr_output_addr_attrib): ...this new function.
19918 (avr_asm_asm_output_aligned_bss): Remove output for decls with
19919 attribute "address", "io", and "io_low".
19920 (avr_encode_section_info): Rectify handling of decls with attribute
19921 "address", "io", and "io_low".
19922
199232024-01-08 Andrew Stubbs <ams@codesourcery.com>
19924
19925 * config/gcn/mkoffload.cc (TEST_XNACK_UNSET): New.
19926 (elf_flags): Remove XNACK from the default value.
19927 (main): Set a default XNACK according to the arch.
19928
199292024-01-08 Andrew Stubbs <ams@codesourcery.com>
19930
19931 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): Delete.
19932 (process_asm): Don't count avgprs.
19933
199342024-01-08 Hongyu Wang <hongyu.wang@intel.com>
19935
19936 * config/i386/i386.opt: Add supported sub-features.
19937 * doc/extend.texi: Add description for target attribute.
19938
199392024-01-08 Feng Wang <wangfeng@eswincomputing.com>
19940
19941 * config/riscv/vector.md: Modify avl_type operand index of zvbc ins.
19942
199432024-01-07 Roger Sayle <roger@nextmovesoftware.com>
19944 Uros Bizjak <ubizjak@gmail.com>
19945
19946 PR target/113231
19947 * config/i386/i386-features.cc (compute_convert_gain): Include
19948 the overhead of explicit load and store (movd) instructions when
19949 converting non-store scalar operations with memory destinations.
19950 Various indentation whitespace fixes.
19951
199522024-01-07 Tamar Christina <tamar.christina@arm.com>
19953
19954 * config/arm/neon.md (cbranch<mode>4): New.
19955
199562024-01-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19957
19958 * config/riscv/riscv-vsetvl.cc: replace std::max by MAX.
19959
199602024-01-06 Jiahao Xu <xujiahao@loongson.cn>
19961
19962 * config/loongarch/lasx.md: Set the unused bits in operand[3] to 0.
19963
199642024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19965
19966 PR target/113248
19967 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
19968 Update the MAX_SEW.
19969
199702024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19971
19972 * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): New function.
19973 (variable_vectorized_p): Teach loop invariant.
19974 (has_unexpected_spills_p): Ditto.
19975
199762024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19977
19978 * config/riscv/riscv-protos.h (whole_reg_to_reg_move_p): New function.
19979 * config/riscv/riscv-v.cc (whole_reg_to_reg_move_p): Ditto.
19980 * config/riscv/vector.md: Allow non-vlmax with len = NUNITS simplification.
19981
199822024-01-05 Richard Sandiford <richard.sandiford@arm.com>
19983
19984 PR target/113104
19985 * doc/invoke.texi (aarch64-sve-compare-costs): Replace with...
19986 (aarch64-vect-compare-costs): ...this.
19987 * config/aarch64/aarch64.opt (-param=aarch64-sve-compare-costs=):
19988 Replace with...
19989 (-param=aarch64-vect-compare-costs=): ...this new param.
19990 * config/aarch64/aarch64.cc (aarch64_override_options_internal):
19991 Don't disable it when vectorizing for Advanced SIMD only.
19992 (aarch64_autovectorize_vector_modes): Apply VECT_COMPARE_COSTS
19993 whenever aarch64_vect_compare_costs is true.
19994
199952024-01-05 Lulu Cheng <chenglulu@loongson.cn>
19996
19997 * config/loongarch/lasx.md (lasx_mxld_<lasxfmt_f>):
19998 Modify the method of determining the memory offset of [x]vld/[x]vst.
19999 (lasx_mxst_<lasxfmt_f>): Likewise.
20000 * config/loongarch/loongarch.cc (loongarch_valid_offset_p): Delete.
20001 (loongarch_address_insns): Likewise.
20002 * config/loongarch/lsx.md (lsx_ld_<lsxfmt_f>): Likewise.
20003 (lsx_st_<lsxfmt_f>): Likewise.
20004 * config/loongarch/predicates.md (aq10b_operand): Likewise.
20005 (aq10h_operand): Likewise.
20006 (aq10w_operand): Likewise.
20007 (aq10d_operand): Likewise.
20008
200092024-01-05 Alex Coplan <alex.coplan@arm.com>
20010
20011 PR target/113217
20012 * config/aarch64/aarch64-ldp-fusion.cc
20013 (ldp_bb_info::try_fuse_pair): If the second access can throw,
20014 narrow the move range to exactly that insn.
20015
200162024-01-05 Ilya Leoshkevich <iii@linux.ibm.com>
20017
20018 * asan.cc (asan_function_start): Drop switch_to_section ().
20019 (asan_emit_stack_protection): Set .LASANPC alignment.
20020 * config/i386/i386.cc: Use assemble_function_label_raw ()
20021 instead of ASM_OUTPUT_LABEL ().
20022 * config/s390/s390.cc (s390_asm_output_function_label):
20023 Likewise.
20024 * defaults.h (ASM_OUTPUT_FUNCTION_LABEL): Likewise.
20025 * final.cc (final_start_function_1): Drop
20026 asan_function_start ().
20027 * output.h (assemble_function_label_raw): New function.
20028 * varasm.cc (assemble_function_label_raw): Likewise.
20029
200302024-01-05 Ilya Leoshkevich <iii@linux.ibm.com>
20031
20032 * config/aarch64/aarch64.cc (aarch64_declare_function_name):
20033 Use ASM_OUTPUT_FUNCTION_LABEL ().
20034 * config/alpha/alpha.cc (alpha_start_function): Likewise.
20035 * config/arm/aout.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
20036 * config/arm/arm.cc (arm_asm_declare_function_name): Likewise.
20037 * config/bfin/bfin.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
20038 * config/c6x/c6x.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
20039 * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Likewise.
20040 * config/h8300/h8300.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
20041 * config/ia64/ia64.cc (ia64_start_function): Likewise.
20042 * config/mcore/mcore-elf.h (ASM_DECLARE_FUNCTION_NAME):
20043 Likewise.
20044 * config/microblaze/microblaze.cc (microblaze_function_prologue):
20045 Likewise.
20046 * config/mips/mips.cc (mips_start_unique_function): Return the
20047 tree.
20048 (mips_start_function_definition): Use
20049 ASM_OUTPUT_FUNCTION_LABEL ().
20050 (mips_finish_stub): Pass the tree to
20051 mips_start_function_definition ().
20052 (mips16_build_function_stub): Likewise.
20053 (mips16_build_call_stub): Likewise.
20054 (mips_output_function_prologue): Likewise.
20055 * config/pa/pa.cc (pa_output_function_label): Use
20056 ASM_OUTPUT_FUNCTION_LABEL ().
20057 * config/riscv/riscv.cc (riscv_declare_function_name): Likewise.
20058 * config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
20059 Likewise.
20060 (rs6000_xcoff_declare_function_name): Likewise.
20061
200622024-01-05 Jakub Jelinek <jakub@redhat.com>
20063
20064 PR tree-optimization/113201
20065 * tree-scalar-evolution.cc (final_value_replacement_loop): Don't call
20066 replace_uses_by on SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt.
20067
200682024-01-05 Jakub Jelinek <jakub@redhat.com>
20069
20070 PR tree-optimization/90693
20071 * tree-ssa-math-opts.cc (match_single_bit_test): If
20072 tree_expr_nonzero_p (arg), remember it in the second argument to
20073 IFN_POPCOUNT or lower it as arg & (arg - 1) == 0 rather than
20074 arg ^ (arg - 1) > arg - 1.
20075 * internal-fn.cc (expand_POPCOUNT): If second argument to
20076 IFN_POPCOUNT suggests arg is non-zero, try to expand it as
20077 arg & (arg - 1) == 0 rather than arg ^ (arg - 1) > arg - 1.
20078
200792024-01-05 Kito Cheng <kito.cheng@sifive.com>
20080
20081 * config/riscv/riscv-v.cc (expand_load_store):
20082 Remove `value`.
20083 (expand_cond_len_op): Ditto.
20084 (expand_gather_scatter): Ditto.
20085 (expand_lanes_load_store): Ditto.
20086 (expand_fold_extract_last): Ditto.
20087
200882024-01-05 Pan Li <pan2.li@intel.com>
20089
20090 Revert:
20091 2024-01-05 Feng Wang <wangfeng@eswincomputing.com>
20092
20093 * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
20094 Add new function_base for crypto vector.
20095 (class bitmanip): Ditto.
20096 (class b_reverse):Ditto.
20097 (class vwsll): Ditto.
20098 (class clmul): Ditto.
20099 (class vg_nhab): Ditto.
20100 (class crypto_vv):Ditto.
20101 (class crypto_vi):Ditto.
20102 (class vaeskf2_vsm3c):Ditto.
20103 (class vsm3me): Ditto.
20104 (BASE): Add BASE declaration for crypto vector.
20105 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20106 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
20107 Add crypto vector intrinsic definition.
20108 (vbrev): Ditto.
20109 (vclz): Ditto.
20110 (vctz): Ditto.
20111 (vwsll): Ditto.
20112 (vandn): Ditto.
20113 (vbrev8): Ditto.
20114 (vrev8): Ditto.
20115 (vrol): Ditto.
20116 (vror): Ditto.
20117 (vclmul): Ditto.
20118 (vclmulh): Ditto.
20119 (vghsh): Ditto.
20120 (vgmul): Ditto.
20121 (vaesef): Ditto.
20122 (vaesem): Ditto.
20123 (vaesdf): Ditto.
20124 (vaesdm): Ditto.
20125 (vaesz): Ditto.
20126 (vaeskf1): Ditto.
20127 (vaeskf2): Ditto.
20128 (vsha2ms): Ditto.
20129 (vsha2ch): Ditto.
20130 (vsha2cl): Ditto.
20131 (vsm4k): Ditto.
20132 (vsm4r): Ditto.
20133 (vsm3me): Ditto.
20134 (vsm3c): Ditto.
20135 * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
20136 Add new function_shape for crypto vector.
20137 (struct crypto_vi_def): Ditto.
20138 (struct crypto_vv_no_op_type_def): Ditto.
20139 (SHAPE): Add SHAPE declaration of crypto vector.
20140 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
20141 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
20142 Add new data type for crypto vector.
20143 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
20144 (vuint32mf2_t): Ditto.
20145 (vuint32m1_t): Ditto.
20146 (vuint32m2_t): Ditto.
20147 (vuint32m4_t): Ditto.
20148 (vuint32m8_t): Ditto.
20149 (vuint64m1_t): Ditto.
20150 (vuint64m2_t): Ditto.
20151 (vuint64m4_t): Ditto.
20152 (vuint64m8_t): Ditto.
20153 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
20154 Add new data struct for crypto vector.
20155 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
20156 (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
20157 * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
20158
201592024-01-05 Feng Wang <wangfeng@eswincomputing.com>
20160
20161 * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
20162 Add new function_base for crypto vector.
20163 (class bitmanip): Ditto.
20164 (class b_reverse):Ditto.
20165 (class vwsll): Ditto.
20166 (class clmul): Ditto.
20167 (class vg_nhab): Ditto.
20168 (class crypto_vv):Ditto.
20169 (class crypto_vi):Ditto.
20170 (class vaeskf2_vsm3c):Ditto.
20171 (class vsm3me): Ditto.
20172 (BASE): Add BASE declaration for crypto vector.
20173 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
20174 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
20175 Add crypto vector intrinsic definition.
20176 (vbrev): Ditto.
20177 (vclz): Ditto.
20178 (vctz): Ditto.
20179 (vwsll): Ditto.
20180 (vandn): Ditto.
20181 (vbrev8): Ditto.
20182 (vrev8): Ditto.
20183 (vrol): Ditto.
20184 (vror): Ditto.
20185 (vclmul): Ditto.
20186 (vclmulh): Ditto.
20187 (vghsh): Ditto.
20188 (vgmul): Ditto.
20189 (vaesef): Ditto.
20190 (vaesem): Ditto.
20191 (vaesdf): Ditto.
20192 (vaesdm): Ditto.
20193 (vaesz): Ditto.
20194 (vaeskf1): Ditto.
20195 (vaeskf2): Ditto.
20196 (vsha2ms): Ditto.
20197 (vsha2ch): Ditto.
20198 (vsha2cl): Ditto.
20199 (vsm4k): Ditto.
20200 (vsm4r): Ditto.
20201 (vsm3me): Ditto.
20202 (vsm3c): Ditto.
20203 * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
20204 Add new function_shape for crypto vector.
20205 (struct crypto_vi_def): Ditto.
20206 (struct crypto_vv_no_op_type_def): Ditto.
20207 (SHAPE): Add SHAPE declaration of crypto vector.
20208 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
20209 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
20210 Add new data type for crypto vector.
20211 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
20212 (vuint32mf2_t): Ditto.
20213 (vuint32m1_t): Ditto.
20214 (vuint32m2_t): Ditto.
20215 (vuint32m4_t): Ditto.
20216 (vuint32m8_t): Ditto.
20217 (vuint64m1_t): Ditto.
20218 (vuint64m2_t): Ditto.
20219 (vuint64m4_t): Ditto.
20220 (vuint64m8_t): Ditto.
20221 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
20222 Add new data struct for crypto vector.
20223 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
20224 (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
20225 * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
20226
202272024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20228
20229 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
20230
202312024-01-04 Andrew Pinski <quic_apinski@quicinc.com>
20232
20233 PR tree-optimization/113186
20234 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p):
20235 Match `^` with the `==` for 1bit integral types.
20236 * match.pd (maybe_cmp): Allow for bit_xor for 1bit
20237 integral types.
20238
202392024-01-04 David Malcolm <dmalcolm@redhat.com>
20240
20241 * toplev.cc (general_init): Pass lang_mask to urlifier.
20242
202432024-01-04 David Malcolm <dmalcolm@redhat.com>
20244
20245 * diagnostic.h (diagnostic_make_option_url_cb): Add lang_mask
20246 param.
20247 (diagnostic_context::make_option_url): Update for lang_mask param.
20248 * gcc-urlifier.cc: Include "opts.h" and "options.h".
20249 (gcc_urlifier::gcc_urlifier): Add lang_mask param.
20250 (gcc_urlifier::m_lang_mask): New field.
20251 (doc_urls): Make static.
20252 (gcc_urlifier::get_url_for_quoted_text): Use label_text.
20253 (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
20254 Look for an option by name before trying a binary search in
20255 doc_urls.
20256 (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
20257 (gcc_urlifier::get_url_suffix_for_option): New.
20258 (make_gcc_urlifier): Add lang_mask param.
20259 (selftest::gcc_urlifier_cc_tests): Update for above changes.
20260 Verify that a URL is found for "-fpack-struct".
20261 * gcc-urlifier.def: Drop options "--version" and "-fpack-struct".
20262 * gcc-urlifier.h (make_gcc_urlifier): Add lang_mask param.
20263 * gcc.cc (driver::global_initializations): Pass 0 for lang_mask
20264 to make_gcc_urlifier.
20265 * opts-diagnostic.h (get_option_url): Add lang_mask param.
20266 * opts.cc (get_option_html_page): Remove special-casing for
20267 analyzer and LTO.
20268 (get_option_url_suffix): New.
20269 (get_option_url): Reimplement.
20270 (selftest::test_get_option_html_page): Rename to...
20271 (selftest::test_get_option_url_suffix): ...this and update for
20272 above changes.
20273 (selftest::opts_cc_tests): Update for renaming.
20274 * opts.h: Include "rich-location.h".
20275 (get_option_url_suffix): New decl.
20276
202772024-01-04 David Malcolm <dmalcolm@redhat.com>
20278
20279 * Makefile.in (ALL_OPT_URL_FILES): New.
20280 (GCC_OBJS): Add options-urls.o.
20281 (OBJS): Likewise.
20282 (OBJS-libcommon): Likewise.
20283 (s-options): Depend on $(ALL_OPT_URL_FILES), and add this to
20284 inputs to opt-gather.awk.
20285 (options-urls.cc): New Makefile target.
20286 * opt-functions.awk (url_suffix): New function.
20287 (lang_url_suffix): New function.
20288 * options-urls-cc-gen.awk: New file.
20289 * opts.h (get_opt_url_suffix): New decl.
20290
202912024-01-04 David Malcolm <dmalcolm@redhat.com>
20292
20293 * params.opt.urls: New file, autogenerated by
20294 regenerate-opt-urls.py.
20295
202962024-01-04 David Malcolm <dmalcolm@redhat.com>
20297
20298 * common.opt.urls: New file, autogenerated by
20299 regenerate-opt-urls.py.
20300 * config/aarch64/aarch64.opt.urls: Likewise.
20301 * config/alpha/alpha.opt.urls: Likewise.
20302 * config/alpha/elf.opt.urls: Likewise.
20303 * config/arc/arc-tables.opt.urls: Likewise.
20304 * config/arc/arc.opt.urls: Likewise.
20305 * config/arm/arm-tables.opt.urls: Likewise.
20306 * config/arm/arm.opt.urls: Likewise.
20307 * config/arm/vxworks.opt.urls: Likewise.
20308 * config/avr/avr.opt.urls: Likewise.
20309 * config/bpf/bpf.opt.urls: Likewise.
20310 * config/c6x/c6x-tables.opt.urls: Likewise.
20311 * config/c6x/c6x.opt.urls: Likewise.
20312 * config/cris/cris.opt.urls: Likewise.
20313 * config/cris/elf.opt.urls: Likewise.
20314 * config/csky/csky.opt.urls: Likewise.
20315 * config/csky/csky_tables.opt.urls: Likewise.
20316 * config/darwin.opt.urls: Likewise.
20317 * config/dragonfly.opt.urls: Likewise.
20318 * config/epiphany/epiphany.opt.urls: Likewise.
20319 * config/fr30/fr30.opt.urls: Likewise.
20320 * config/freebsd.opt.urls: Likewise.
20321 * config/frv/frv.opt.urls: Likewise.
20322 * config/ft32/ft32.opt.urls: Likewise.
20323 * config/fused-madd.opt.urls: Likewise.
20324 * config/g.opt.urls: Likewise.
20325 * config/gcn/gcn.opt.urls: Likewise.
20326 * config/gnu-user.opt.urls: Likewise.
20327 * config/h8300/h8300.opt.urls: Likewise.
20328 * config/hpux11.opt.urls: Likewise.
20329 * config/i386/cygming.opt.urls: Likewise.
20330 * config/i386/cygwin.opt.urls: Likewise.
20331 * config/i386/djgpp.opt.urls: Likewise.
20332 * config/i386/i386.opt.urls: Likewise.
20333 * config/i386/mingw-w64.opt.urls: Likewise.
20334 * config/i386/mingw.opt.urls: Likewise.
20335 * config/i386/nto.opt.urls: Likewise.
20336 * config/ia64/ia64.opt.urls: Likewise.
20337 * config/ia64/ilp32.opt.urls: Likewise.
20338 * config/ia64/vms.opt.urls: Likewise.
20339 * config/iq2000/iq2000.opt.urls: Likewise.
20340 * config/linux-android.opt.urls: Likewise.
20341 * config/linux.opt.urls: Likewise.
20342 * config/lm32/lm32.opt.urls: Likewise.
20343 * config/loongarch/loongarch.opt.urls: Likewise.
20344 * config/lynx.opt.urls: Likewise.
20345 * config/m32c/m32c.opt.urls: Likewise.
20346 * config/m32r/m32r.opt.urls: Likewise.
20347 * config/m68k/ieee.opt.urls: Likewise.
20348 * config/m68k/m68k-tables.opt.urls: Likewise.
20349 * config/m68k/m68k.opt.urls: Likewise.
20350 * config/m68k/uclinux.opt.urls: Likewise.
20351 * config/mcore/mcore.opt.urls: Likewise.
20352 * config/microblaze/microblaze.opt.urls: Likewise.
20353 * config/mips/mips-tables.opt.urls: Likewise.
20354 * config/mips/mips.opt.urls: Likewise.
20355 * config/mips/sde.opt.urls: Likewise.
20356 * config/mmix/mmix.opt.urls: Likewise.
20357 * config/mn10300/mn10300.opt.urls: Likewise.
20358 * config/moxie/moxie.opt.urls: Likewise.
20359 * config/msp430/msp430.opt.urls: Likewise.
20360 * config/nds32/nds32-elf.opt.urls: Likewise.
20361 * config/nds32/nds32-linux.opt.urls: Likewise.
20362 * config/nds32/nds32.opt.urls: Likewise.
20363 * config/netbsd-elf.opt.urls: Likewise.
20364 * config/netbsd.opt.urls: Likewise.
20365 * config/nios2/elf.opt.urls: Likewise.
20366 * config/nios2/nios2.opt.urls: Likewise.
20367 * config/nvptx/nvptx-gen.opt.urls: Likewise.
20368 * config/nvptx/nvptx.opt.urls: Likewise.
20369 * config/openbsd.opt.urls: Likewise.
20370 * config/or1k/elf.opt.urls: Likewise.
20371 * config/or1k/or1k.opt.urls: Likewise.
20372 * config/pa/pa-hpux.opt.urls: Likewise.
20373 * config/pa/pa-hpux1010.opt.urls: Likewise.
20374 * config/pa/pa-hpux1111.opt.urls: Likewise.
20375 * config/pa/pa-hpux1131.opt.urls: Likewise.
20376 * config/pa/pa.opt.urls: Likewise.
20377 * config/pa/pa64-hpux.opt.urls: Likewise.
20378 * config/pdp11/pdp11.opt.urls: Likewise.
20379 * config/pru/pru.opt.urls: Likewise.
20380 * config/riscv/riscv.opt.urls: Likewise.
20381 * config/rl78/rl78.opt.urls: Likewise.
20382 * config/rpath.opt.urls: Likewise.
20383 * config/rs6000/476.opt.urls: Likewise.
20384 * config/rs6000/aix64.opt.urls: Likewise.
20385 * config/rs6000/darwin.opt.urls: Likewise.
20386 * config/rs6000/linux64.opt.urls: Likewise.
20387 * config/rs6000/rs6000-tables.opt.urls: Likewise.
20388 * config/rs6000/rs6000.opt.urls: Likewise.
20389 * config/rs6000/sysv4.opt.urls: Likewise.
20390 * config/rtems.opt.urls: Likewise.
20391 * config/rx/elf.opt.urls: Likewise.
20392 * config/rx/rx.opt.urls: Likewise.
20393 * config/s390/s390.opt.urls: Likewise.
20394 * config/s390/tpf.opt.urls: Likewise.
20395 * config/sh/sh.opt.urls: Likewise.
20396 * config/sh/superh.opt.urls: Likewise.
20397 * config/sol2.opt.urls: Likewise.
20398 * config/sparc/long-double-switch.opt.urls: Likewise.
20399 * config/sparc/sparc.opt.urls: Likewise.
20400 * config/stormy16/stormy16.opt.urls: Likewise.
20401 * config/v850/v850.opt.urls: Likewise.
20402 * config/vax/elf.opt.urls: Likewise.
20403 * config/vax/vax.opt.urls: Likewise.
20404 * config/visium/visium.opt.urls: Likewise.
20405 * config/vms/vms.opt.urls: Likewise.
20406 * config/vxworks-smp.opt.urls: Likewise.
20407 * config/vxworks.opt.urls: Likewise.
20408 * config/xtensa/elf.opt.urls: Likewise.
20409 * config/xtensa/uclinux.opt.urls: Likewise.
20410 * config/xtensa/xtensa.opt.urls: Likewise.
20411 * config/bfin/bfin.opt.urls: New file.
20412
204132024-01-04 David Malcolm <dmalcolm@redhat.com>
20414
20415 * Makefile.in (OPT_URLS_HTML_DEPS): New.
20416 (regenerate-opt-urls): New target.
20417 (regenerate-opt-urls-unit-test): New target.
20418 * doc/options.texi (Option properties): Add UrlSuffix and
20419 description of regenerate-opt-urls.py. Add LangUrlSuffix_*.
20420 * doc/sourcebuild.texi (Anatomy of a Language Front End): Add
20421 reference to regenerate-opt-urls.py's PER_LANGUAGE_OPTION_INDEXES
20422 and Makefile.in's OPT_URLS_HTML_DEPS.
20423 (Anatomy of a Target Back End): Add
20424 reference to regenerate-opt-urls.py's TARGET_SPECIFIC_PAGES.
20425 * regenerate-opt-urls.py: New file.
20426
204272024-01-04 David Malcolm <dmalcolm@redhat.com>
20428
20429 * diagnostic-format-sarif.cc
20430 (sarif_builder::make_logical_location_object): Convert to...
20431 (make_sarif_logical_location_object): ...this.
20432 (sarif_builder::set_any_logical_locs_arr): Update for above
20433 change.
20434 (sarif_builder::make_thread_flow_location_object): Call
20435 maybe_add_sarif_properties on each diagnostic_event.
20436 * diagnostic-format-sarif.h (class logical_location): New forward
20437 decl.
20438 (make_sarif_logical_location_object): New decl.
20439 * diagnostic-path.h (class sarif_object): New forward decl.
20440 (diagnostic_event::maybe_add_sarif_properties): New vfunc.
20441
204422024-01-04 Kuan-Lin Chen <rufus@andestech.com>
20443 Patrick Lin <patrick@andestech.com>
20444 Rufus Chen <rufus@andestech.com>
20445 Monk Chiang <monk.chiang@sifive.com>
20446
20447 * config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
20448 with Nan-boxing value.
20449 * config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.
20450
204512024-01-04 Roger Sayle <roger@nextmovesoftware.com>
20452 Jeff Law <jlaw@ventanamicro.com>
20453
20454 PR rtl-optimization/104914
20455 * expr.cc (expand_assignment): When target is SUBREG_PROMOTED_VAR_P
20456 a sign or zero extension is only required if the modified field
20457 overlaps the SUBREG's most significant bit. On MODE_REP_EXTENDED
20458 targets, don't refer to the temporarily incorrectly extended value
20459 using a SUBREG, but instead generate an explicit TRUNCATE rtx.
20460
204612024-01-04 Pan Li <pan2.li@intel.com>
20462
20463 Revert:
20464 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20465
20466 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
20467
204682024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20469
20470 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
20471
204722024-01-04 Kito Cheng <kito.cheng@sifive.com>
20473
20474 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Adjust the
20475 offset of fcsr.
20476
204772024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20478
20479 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
20480 (compute_nregs_for_mode): Refine LMUL.
20481 (max_number_of_live_regs): Ditto.
20482 (compute_estimated_lmul): Ditto.
20483 (has_unexpected_spills_p): Ditto.
20484
204852024-01-04 Li Wei <liwei@loongson.cn>
20486
20487 * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
20488 Remove useless forward declaration.
20489 (loongarch_is_even_extraction): Remove useless forward declaration.
20490 (loongarch_try_expand_lsx_vshuf_const): Removed.
20491 (loongarch_expand_vec_perm_const_1): Merged.
20492 (loongarch_is_double_duplicate): Removed.
20493 (loongarch_is_center_extraction): Ditto.
20494 (loongarch_is_reversing_permutation): Ditto.
20495 (loongarch_is_di_misalign_extract): Ditto.
20496 (loongarch_is_si_misalign_extract): Ditto.
20497 (loongarch_is_lasx_lowpart_extract): Ditto.
20498 (loongarch_is_op_reverse_perm): Ditto.
20499 (loongarch_is_single_op_perm): Ditto.
20500 (loongarch_is_divisible_perm): Ditto.
20501 (loongarch_is_triple_stride_extract): Ditto.
20502 (loongarch_expand_vec_perm_const_2): Merged.
20503 (loongarch_expand_vec_perm_const): New.
20504 (loongarch_vectorize_vec_perm_const): Adjust.
20505
205062024-01-04 Sandra Loosemore <sandra@codesourcery.com>
20507
20508 * omp-general.cc: Fix comment typos and misplaced/confusing
20509 comments. Delete redundant include of omp-general.h.
20510
205112024-01-04 YunQiang Su <syq@gcc.gnu.org>
20512
20513 PR rtl-optimization/104914
20514 * config/mips/mips.md (insqisi_extended): New patterns.
20515 (inshisi_extended): Ditto.
20516
205172024-01-04 YunQiang Su <syq@gcc.gnu.org>
20518
20519 * config/mips/mips.cc (mips_insn_cost): New function.
20520
205212024-01-04 YunQiang Su <syq@gcc.gnu.org>
20522
20523 * config/mips/mips.md (perf_ratio): New attribute.
20524
205252024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20526
20527 PR target/113206
20528 PR target/113209
20529 * config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): New function.
20530 (pre_vsetvl::compute_lcm_local_properties): Disable earliest fusion on
20531 blocks belong to infinite loop.
20532 (pre_vsetvl::emit_vsetvl): Remove fake edges.
20533 * config/riscv/t-riscv: Add a new include file.
20534
205352024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20536
20537 * config/riscv/vector.md: Fix indent.
20538
205392024-01-03 Kwok Cheung Yeung <kcy@codesourcery.com>
20540
20541 * tree-core.h (enum omp_clause_code): Move OMP_CLAUSE_INDIRECT to before
20542 OMP_CLAUSE__SIMDUID_.
20543 * tree.cc (omp_clause_num_ops): Update position of entry for
20544 OMP_CLAUSE_INDIRECT to correspond with omp_clause_code.
20545 (omp_clause_code_name): Likewise.
20546
205472024-01-03 Kwok Cheung Yeung <kcy@codesourcery.com>
20548
20549 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Restucture
20550 printing of FUNC_MAP/IND_FUNC_MAP labels.
20551
205522024-01-03 Jakub Jelinek <jakub@redhat.com>
20553
20554 * gcc.cc (process_command): Update copyright notice dates.
20555 * gcov-dump.cc (print_version): Ditto.
20556 * gcov.cc (print_version): Ditto.
20557 * gcov-tool.cc (print_version): Ditto.
20558 * gengtype.cc (create_file): Ditto.
20559 * doc/cpp.texi: Bump @copying's copyright year.
20560 * doc/cppinternals.texi: Ditto.
20561 * doc/gcc.texi: Ditto.
20562 * doc/gccint.texi: Ditto.
20563 * doc/gcov.texi: Ditto.
20564 * doc/install.texi: Ditto.
20565 * doc/invoke.texi: Ditto.
20566
205672024-01-03 Xi Ruoyao <xry111@xry111.site>
20568
20569 * config/loongarch/simd.md (fmax<mode>3): New define_insn.
20570 (fmin<mode>3): Likewise.
20571 (reduc_fmax_scal_<mode>3): New define_expand.
20572 (reduc_fmin_scal_<mode>3): Likewise.
20573
205742024-01-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20575
20576 PR target/113112
20577 * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Add rgroup info.
20578 (max_number_of_live_regs): Ditto.
20579 (has_unexpected_spills_p): Ditto.
20580
205812024-01-02 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
20582 Jin Ma <jinma@linux.alibaba.com>
20583 Xianmiao Qu <cooper.qu@linux.alibaba.com>
20584 Christoph Müllner <christoph.muellner@vrull.eu>
20585
20586 * config/riscv/vector.md:
20587 Use vector_length_operand for vsetvl patterns.
20588
205892024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20590
20591 * config/riscv/riscv-v.cc (is_vlmax_len_p): Remove satisfies_constraint_K.
20592 (expand_cond_len_op): Add simplification of dummy len and dummy mask.
20593
205942024-01-02 Di Zhao <dizhao@os.amperecomputing.com>
20595
20596 * config/aarch64/aarch64-tuning-flags.def
20597 (AARCH64_EXTRA_TUNING_OPTION): New tuning option
20598 AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
20599 * config/aarch64/aarch64.cc
20600 (aarch64_override_options_internal): Set
20601 param_fully_pipelined_fma according to tuning option.
20602 * config/aarch64/tuning_models/ampere1.h: Add
20603 AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA to tune_flags.
20604 * config/aarch64/tuning_models/ampere1a.h: Likewise.
20605 * config/aarch64/tuning_models/ampere1b.h: Likewise.
20606
206072024-01-02 Feng Wang <wangfeng@eswincomputing.com>
20608
20609 * config/riscv/vector-crypto.md: Modify copyright year.
20610
206112024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20612
20613 * config/riscv/riscv-vector-costs.cc: Move STMT_VINFO_TYPE (...) to local.
20614
206152024-01-02 Lulu Cheng <chenglulu@loongson.cn>
20616
20617 * config.in: Regenerate.
20618 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS_LE_RELAXATION): Define.
20619 * config/loongarch/loongarch.cc (loongarch_legitimize_tls_address):
20620 Added TLS Le Relax support.
20621 (loongarch_print_operand_reloc): Add the output string of TLS Le Relax.
20622 * config/loongarch/loongarch.md (@add_tls_le_relax<mode>): New template.
20623 * configure: Regenerate.
20624 * configure.ac: Check if binutils supports TLS le relax.
20625
206262024-01-02 Feng Wang <wangfeng@eswincomputing.com>
20627
20628 * config/riscv/iterators.md: Add rotate insn name.
20629 * config/riscv/riscv.md: Add new insns name for crypto vector.
20630 * config/riscv/vector-iterators.md: Add new iterators for crypto vector.
20631 * config/riscv/vector.md: Add the corresponding attr for crypto vector.
20632 * config/riscv/vector-crypto.md: New file.The machine descriptions for crypto vector.
20633
206342024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20635
20636 PR target/113112
20637 * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Fix
20638 pointer type liveness count.
20639\f
20640Copyright (C) 2024 Free Software Foundation, Inc.
20641
20642Copying and distribution of this file, with or without modification,
20643are permitted in any medium without royalty provided the copyright
20644notice and this notice are preserved.
GNU Compiler Collection
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