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6f18836c JZZ |
1 | /* { dg-do compile } */ |
2 | /* { dg-options "-march=rv32gcv -mabi=ilp32" } */ | |
3 | ||
4 | #include "riscv_vector.h" | |
5 | ||
6 | /* The for loop body should not have vsetvl instruction. */ | |
7 | void f (void * restrict in, void * restrict out, int n, int cond) | |
8 | { | |
9 | if (cond == 1) | |
10 | { | |
11 | vuint16mf4_t v = *(vuint16mf4_t*)(in + 100); | |
12 | *(vuint16mf4_t*)(out + 100) = v; | |
13 | } | |
14 | else if (cond == 2) | |
15 | { | |
16 | vuint16mf4_t v = *(vuint16mf4_t*)(in + 200); | |
17 | *(vuint16mf4_t*)(out + 200) = v; | |
18 | } | |
19 | else if (cond == 3) | |
20 | { | |
21 | vuint16mf4_t v = *(vuint16mf4_t*)(in + 300); | |
22 | *(vuint16mf4_t*)(out + 300) = v; | |
23 | } | |
24 | else | |
25 | { | |
26 | vuint16mf4_t v = *(vuint16mf4_t*)(in + 400); | |
27 | *(vuint16mf4_t*)(out + 400) = v; | |
28 | } | |
29 | for (int i = 0; i < n; i++) | |
30 | { | |
31 | vuint16mf4_t v = *(vuint16mf4_t*)(in + i); | |
32 | *(vuint16mf4_t*)(out + i) = v; | |
33 | } | |
34 | } | |
35 | ||
36 | /* { dg-final { scan-assembler-times {vsetvli\s+[a-x0-9]+,\s*zero,\s*e16,\s*mf4,\s*t[au],\s*m[au]} 4 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ | |
a190f583 | 37 | /* { dg-final { scan-assembler-times {ble\t[a-x0-9]+,zero,.L[0-9]+\s*\.L[0-9]+\:\s*vle16\.v\s+v[0-9]+,0\([a-x0-9]+\)} 1 { target { no-opts "-O0" no-opts "-Os" no-opts "-funroll-loops" no-opts "-g" no-opts "-flto" } } } } */ |