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672a6f42 1/* Data structure definitions for a generic GCC target.
7daebb7a 2 Copyright (C) 2001, 2002, 2003 Free Software Foundation, Inc.
672a6f42
NB
3
4This program is free software; you can redistribute it and/or modify it
5under the terms of the GNU General Public License as published by the
6Free Software Foundation; either version 2, or (at your option) any
7later version.
8
9This program is distributed in the hope that it will be useful,
10but WITHOUT ANY WARRANTY; without even the implied warranty of
11MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12GNU General Public License for more details.
13
14You should have received a copy of the GNU General Public License
15along with this program; if not, write to the Free Software
16Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 In other words, you are welcome to use, share and improve this program.
19 You are forbidden to forbid anyone else to use, share and improve
20 what you give them. Help stamp out software-hoarding! */
21
22/* This file contains a data structure that describes a GCC target.
17b53c33 23 At present it is incomplete, but in future it should grow to
672a6f42
NB
24 contain most or all target machine and target O/S specific
25 information.
26
27 This structure has its initializer declared in target-def.h in the
28 form of large macro TARGET_INITIALIZER that expands to many smaller
29 macros.
30
31 The smaller macros each initialize one component of the structure,
32 and each has a default. Each target should have a file that
33 includes target.h and target-def.h, and overrides any inappropriate
34 defaults by undefining the relevant macro and defining a suitable
35 replacement. That file should then contain the definition of
f6897b10 36 "targetm" like so:
672a6f42 37
f6897b10 38 struct gcc_target targetm = TARGET_INITIALIZER;
672a6f42
NB
39
40 Doing things this way allows us to bring together everything that
17b53c33
NB
41 defines a GCC target. By supplying a default that is appropriate
42 to most targets, we can easily add new items without needing to
43 edit dozens of target configuration files. It should also allow us
44 to gradually reduce the amount of conditional compilation that is
45 scattered throughout GCC. */
672a6f42
NB
46
47struct gcc_target
48{
08c148a8
NB
49 /* Functions that output assembler for the target. */
50 struct asm_out
51 {
17b53c33
NB
52 /* Opening and closing parentheses for asm expression grouping. */
53 const char *open_paren, *close_paren;
54
301d03af
RS
55 /* Assembler instructions for creating various kinds of integer object. */
56 const char *byte_op;
57 struct asm_int_op
58 {
59 const char *hi;
60 const char *si;
61 const char *di;
62 const char *ti;
63 } aligned_op, unaligned_op;
64
65 /* Try to output the assembler code for an integer object whose
66 value is given by X. SIZE is the size of the object in bytes and
67 ALIGNED_P indicates whether it is aligned. Return true if
68 successful. Only handles cases for which BYTE_OP, ALIGNED_OP
69 and UNALIGNED_OP are NULL. */
46c5ad27 70 bool (* integer) (rtx x, unsigned int size, int aligned_p);
301d03af 71
5eb99654 72 /* Output code that will globalize a label. */
46c5ad27 73 void (* globalize_label) (FILE *, const char *);
5eb99654 74
4977bab6 75 /* Output an internal label. */
46c5ad27 76 void (* internal_label) (FILE *, const char *, unsigned long);
4977bab6 77
93638d7a
AM
78 /* Emit an assembler directive to set visibility for the symbol
79 associated with the tree decl. */
46c5ad27 80 void (* visibility) (tree, int);
93638d7a 81
08c148a8 82 /* Output the assembler code for entry to a function. */
46c5ad27 83 void (* function_prologue) (FILE *, HOST_WIDE_INT);
08c148a8 84
b4c25db2 85 /* Output the assembler code for end of prologue. */
46c5ad27 86 void (* function_end_prologue) (FILE *);
b4c25db2
NB
87
88 /* Output the assembler code for start of epilogue. */
46c5ad27 89 void (* function_begin_epilogue) (FILE *);
b4c25db2 90
08c148a8 91 /* Output the assembler code for function exit. */
46c5ad27 92 void (* function_epilogue) (FILE *, HOST_WIDE_INT);
7c262518 93
715bdd29
RH
94 /* Switch to an arbitrary section NAME with attributes as
95 specified by FLAGS. */
46c5ad27 96 void (* named_section) (const char *, unsigned int);
2cc07db4 97
07c9d2eb 98 /* Switch to the section that holds the exception table. */
46c5ad27 99 void (* exception_section) (void);
07c9d2eb
SS
100
101 /* Switch to the section that holds the exception frames. */
46c5ad27 102 void (* eh_frame_section) (void);
07c9d2eb 103
ae46c4e0 104 /* Select and switch to a section for EXP. It may be a DECL or a
0864034e
ZW
105 constant. RELOC is nonzero if runtime relocations must be applied;
106 bit 1 will be set if the runtime relocations require non-local
107 name resolution. ALIGN is the required alignment of the data. */
46c5ad27 108 void (* select_section) (tree, int, unsigned HOST_WIDE_INT);
ae46c4e0 109
b64a1b53
RH
110 /* Select and switch to a section for X with MODE. ALIGN is
111 the desired alignment of the data. */
46c5ad27
AJ
112 void (* select_rtx_section) (enum machine_mode, rtx,
113 unsigned HOST_WIDE_INT);
b64a1b53 114
ae46c4e0
RH
115 /* Select a unique section name for DECL. RELOC is the same as
116 for SELECT_SECTION. */
46c5ad27 117 void (* unique_section) (tree, int);
ae46c4e0 118
2cc07db4 119 /* Output a constructor for a symbol with a given priority. */
46c5ad27 120 void (* constructor) (rtx, int);
2cc07db4
RH
121
122 /* Output a destructor for a symbol with a given priority. */
46c5ad27 123 void (* destructor) (rtx, int);
483ab821 124
3961e8fe
RH
125 /* Output the assembler code for a thunk function. THUNK_DECL is the
126 declaration for the thunk function itself, FUNCTION is the decl for
127 the target function. DELTA is an immediate constant offset to be
476c5eb6 128 added to THIS. If VCALL_OFFSET is nonzero, the word at
3961e8fe 129 *(*this + vcall_offset) should be added to THIS. */
46c5ad27
AJ
130 void (* output_mi_thunk) (FILE *file, tree thunk_decl,
131 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
132 tree function_decl);
3961e8fe
RH
133
134 /* Determine whether output_mi_thunk would succeed. */
135 /* ??? Ideally, this hook would not exist, and success or failure
136 would be returned from output_mi_thunk directly. But there's
137 too much undo-able setup involved in invoking output_mi_thunk.
138 Could be fixed by making output_mi_thunk emit rtl instead of
139 text to the output file. */
46c5ad27
AJ
140 bool (* can_output_mi_thunk) (tree thunk_decl, HOST_WIDE_INT delta,
141 HOST_WIDE_INT vcall_offset,
142 tree function_decl);
a5fe455b 143
1bc7c5b6
ZW
144 /* Output any boilerplate text needed at the beginning of a
145 translation unit. */
46c5ad27 146 void (*file_start) (void);
1bc7c5b6
ZW
147
148 /* Output any boilerplate text needed at the end of a
149 translation unit. */
46c5ad27 150 void (*file_end) (void);
08c148a8
NB
151 } asm_out;
152
c237e94a
ZW
153 /* Functions relating to instruction scheduling. */
154 struct sched
155 {
156 /* Given the current cost, COST, of an insn, INSN, calculate and
157 return a new cost based on its relationship to DEP_INSN through
158 the dependence LINK. The default is to make no adjustment. */
46c5ad27 159 int (* adjust_cost) (rtx insn, rtx link, rtx def_insn, int cost);
c237e94a
ZW
160
161 /* Adjust the priority of an insn as you see fit. Returns the new
162 priority. */
46c5ad27 163 int (* adjust_priority) (rtx, int);
c237e94a
ZW
164
165 /* Function which returns the maximum number of insns that can be
166 scheduled in the same machine cycle. This must be constant
167 over an entire compilation. The default is 1. */
46c5ad27 168 int (* issue_rate) (void);
c237e94a
ZW
169
170 /* Calculate how much this insn affects how many more insns we
171 can emit this cycle. Default is they all cost the same. */
46c5ad27 172 int (* variable_issue) (FILE *, int, rtx, int);
41077ce4 173
c237e94a 174 /* Initialize machine-dependent scheduling code. */
46c5ad27 175 void (* md_init) (FILE *, int, int);
c237e94a
ZW
176
177 /* Finalize machine-dependent scheduling code. */
46c5ad27 178 void (* md_finish) (FILE *, int);
c237e94a
ZW
179
180 /* Reorder insns in a machine-dependent fashion, in two different
181 places. Default does nothing. */
46c5ad27
AJ
182 int (* reorder) (FILE *, int, rtx *, int *, int);
183 int (* reorder2) (FILE *, int, rtx *, int *, int);
c237e94a 184
30028c85
VM
185 /* The following member value is a pointer to a function called
186 after evaluation forward dependencies of insns in chain given
187 by two parameter values (head and tail correspondingly). */
46c5ad27 188 void (* dependencies_evaluation_hook) (rtx, rtx);
30028c85 189
fae15c93
VM
190 /* The following member value is a pointer to a function returning
191 nonzero if we should use DFA based scheduling. The default is
192 to use the old pipeline scheduler. */
46c5ad27 193 int (* use_dfa_pipeline_interface) (void);
fae15c93
VM
194 /* The values of all the following members are used only for the
195 DFA based scheduler: */
196 /* The values of the following four members are pointers to
197 functions used to simplify the automaton descriptions.
198 dfa_pre_cycle_insn and dfa_post_cycle_insn give functions
199 returning insns which are used to change the pipeline hazard
200 recognizer state when the new simulated processor cycle
201 correspondingly starts and finishes. The function defined by
202 init_dfa_pre_cycle_insn and init_dfa_post_cycle_insn are used
203 to initialize the corresponding insns. The default values of
204 the memebers result in not changing the automaton state when
205 the new simulated processor cycle correspondingly starts and
206 finishes. */
46c5ad27
AJ
207 void (* init_dfa_pre_cycle_insn) (void);
208 rtx (* dfa_pre_cycle_insn) (void);
209 void (* init_dfa_post_cycle_insn) (void);
210 rtx (* dfa_post_cycle_insn) (void);
fae15c93
VM
211 /* The following member value is a pointer to a function returning value
212 which defines how many insns in queue `ready' will we try for
213 multi-pass scheduling. if the member value is nonzero and the
214 function returns positive value, the DFA based scheduler will make
215 multi-pass scheduling for the first cycle. In other words, we will
216 try to choose ready insn which permits to start maximum number of
217 insns on the same cycle. */
46c5ad27 218 int (* first_cycle_multipass_dfa_lookahead) (void);
30028c85
VM
219 /* The following member value is pointer to a function controlling
220 what insns from the ready insn queue will be considered for the
221 multipass insn scheduling. If the hook returns zero for insn
222 passed as the parameter, the insn will be not chosen to be
223 issued. */
46c5ad27 224 int (* first_cycle_multipass_dfa_lookahead_guard) (rtx);
30028c85
VM
225 /* The following member value is pointer to a function called by
226 the insn scheduler before issuing insn passed as the third
227 parameter on given cycle. If the hook returns nonzero, the
228 insn is not issued on given processors cycle. Instead of that,
229 the processor cycle is advanced. If the value passed through
230 the last parameter is zero, the insn ready queue is not sorted
231 on the new cycle start as usually. The first parameter passes
232 file for debugging output. The second one passes the scheduler
233 verbose level of the debugging output. The forth and the fifth
234 parameter values are correspondingly processor cycle on which
235 the previous insn has been issued and the current processor
236 cycle. */
46c5ad27 237 int (* dfa_new_cycle) (FILE *, int, rtx, int, int, int *);
fae15c93
VM
238 /* The values of the following members are pointers to functions
239 used to improve the first cycle multipass scheduling by
240 inserting nop insns. dfa_scheduler_bubble gives a function
241 returning a nop insn with given index. The indexes start with
242 zero. The function should return NULL if there are no more nop
243 insns with indexes greater than given index. To initialize the
244 nop insn the function given by member
245 init_dfa_scheduler_bubbles is used. The default values of the
246 members result in not inserting nop insns during the multipass
247 scheduling. */
46c5ad27
AJ
248 void (* init_dfa_bubbles) (void);
249 rtx (* dfa_bubble) (int);
c237e94a
ZW
250 } sched;
251
672a6f42 252 /* Given two decls, merge their attributes and return the result. */
46c5ad27 253 tree (* merge_decl_attributes) (tree, tree);
672a6f42
NB
254
255 /* Given two types, merge their attributes and return the result. */
46c5ad27 256 tree (* merge_type_attributes) (tree, tree);
672a6f42 257
349ae713
NB
258 /* Table of machine attributes and functions to handle them.
259 Ignored if NULL. */
91d231cb 260 const struct attribute_spec *attribute_table;
8d8e52be
JM
261
262 /* Return zero if the attributes on TYPE1 and TYPE2 are incompatible,
263 one if they are compatible and two if they are nearly compatible
264 (which causes a warning to be generated). */
46c5ad27 265 int (* comp_type_attributes) (tree type1, tree type2);
8d8e52be
JM
266
267 /* Assign default attributes to the newly defined TYPE. */
46c5ad27 268 void (* set_default_type_attributes) (tree type);
12a68f1f
JM
269
270 /* Insert attributes on the newly created DECL. */
46c5ad27 271 void (* insert_attributes) (tree decl, tree *attributes);
f6155fda 272
91d231cb
JM
273 /* Return true if FNDECL (which has at least one machine attribute)
274 can be inlined despite its machine attributes, false otherwise. */
46c5ad27 275 bool (* function_attribute_inlinable_p) (tree fndecl);
91d231cb 276
f913c102
AO
277 /* Return true if bitfields in RECORD_TYPE should follow the
278 Microsoft Visual C++ bitfield layout rules. */
46c5ad27 279 bool (* ms_bitfield_layout_p) (tree record_type);
f913c102 280
f6155fda 281 /* Set up target-specific built-in functions. */
46c5ad27 282 void (* init_builtins) (void);
f6155fda
SS
283
284 /* Expand a target-specific builtin. */
46c5ad27
AJ
285 rtx (* expand_builtin) (tree exp, rtx target, rtx subtarget,
286 enum machine_mode mode, int ignore);
7c262518
RH
287
288 /* Given a decl, a section name, and whether the decl initializer
289 has relocs, choose attributes for the section. */
290 /* ??? Should be merged with SELECT_SECTION and UNIQUE_SECTION. */
46c5ad27 291 unsigned int (* section_type_flags) (tree, const char *, int);
7c262518 292
e4ec2cac
AO
293 /* True if new jumps cannot be created, to replace existing ones or
294 not, at the current point in the compilation. */
46c5ad27 295 bool (* cannot_modify_jumps_p) (void);
ae46c4e0 296
a3424f5c
RH
297 /* Return a register class for which branch target register
298 optimizations should be applied. */
46c5ad27 299 int (* branch_target_register_class) (void);
a3424f5c
RH
300
301 /* Return true if branch target register optimizations should include
302 callee-saved registers that are not already live during the current
303 function. AFTER_PE_GEN is true if prologues and epilogues have
304 already been generated. */
46c5ad27 305 bool (* branch_target_register_callee_saved) (bool after_pe_gen);
fe3ad572 306
3a04ff64 307 /* True if the constant X cannot be placed in the constant pool. */
46c5ad27 308 bool (* cannot_force_const_mem) (rtx);
3a04ff64 309
0b077eac 310 /* True if the insn X cannot be duplicated. */
46c5ad27 311 bool (* cannot_copy_insn_p) (rtx);
0b077eac 312
7daebb7a 313 /* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */
46c5ad27 314 rtx (* delegitimize_address) (rtx);
7daebb7a 315
4977bab6
ZW
316 /* True if it is OK to do sibling call optimization for the specified
317 call expression EXP. DECL will be the called function, or NULL if
318 this is an indirect call. */
46c5ad27
AJ
319 bool (*function_ok_for_sibcall) (tree decl, tree exp);
320
ae46c4e0 321 /* True if EXP should be placed in a "small data" section. */
46c5ad27 322 bool (* in_small_data_p) (tree);
fb49053f 323
47754fd5
RH
324 /* True if EXP names an object for which name resolution must resolve
325 to the current module. */
46c5ad27 326 bool (* binds_local_p) (tree);
47754fd5 327
fb49053f
RH
328 /* Do something target-specific to record properties of the DECL into
329 the associated SYMBOL_REF. */
46c5ad27 330 void (* encode_section_info) (tree, rtx, int);
772c5265
RH
331
332 /* Undo the effects of encode_section_info on the symbol string. */
46c5ad27 333 const char * (* strip_name_encoding) (const char *);
47754fd5 334
3c50106f 335 /* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
46c5ad27 336 bool (* valid_pointer_mode) (enum machine_mode mode);
3c50106f 337
c8e4f0e9 338 /* True if a vector is opaque. */
46c5ad27 339 bool (* vector_opaque_p) (tree);
62e1dfcf 340
3c50106f
RH
341 /* Compute a (partial) cost for rtx X. Return true if the complete
342 cost has been computed, and false if subexpressions should be
343 scanned. In either case, *TOTAL contains the cost result. */
344 /* Note that CODE and OUTER_CODE ought to be RTX_CODE, but that's
345 not necessarily defined at this point. */
46c5ad27 346 bool (* rtx_costs) (rtx x, int code, int outer_code, int *total);
3c50106f 347
dcefdf67
RH
348 /* Compute the cost of X, used as an address. Never called with
349 invalid addresses. */
46c5ad27 350 int (* address_cost) (rtx x);
dcefdf67 351
96714395
AH
352 /* Given a register, this hook should return a parallel of registers
353 to represent where to find the register pieces. Define this hook
354 if the register and its mode are represented in Dwarf in
355 non-contiguous locations, or if the register should be
356 represented in more than one register in Dwarf. Otherwise, this
357 hook should return NULL_RTX. */
46c5ad27 358 rtx (* dwarf_register_span) (rtx);
96714395 359
18dbd950
RS
360 /* Do machine-dependent code transformations. Called just before
361 delayed-branch scheduling. */
46c5ad27 362 void (* machine_dependent_reorg) (void);
18dbd950 363
47754fd5
RH
364 /* Leave the boolean fields at the end. */
365
366 /* True if arbitrary sections are supported. */
367 bool have_named_sections;
368
369 /* True if "native" constructors and destructors are supported,
370 false if we're using collect2 for the job. */
371 bool have_ctors_dtors;
3d78f2e9
RH
372
373 /* True if thread-local storage is supported. */
374 bool have_tls;
275b6d80
DE
375
376 /* True if a small readonly data section is supported. */
377 bool have_srodata_section;
7606e68f
SS
378
379 /* True if EH frame info sections should be zero-terminated. */
380 bool terminate_dw2_eh_frame_info;
1bc7c5b6
ZW
381
382 /* True if #NO_APP should be emitted at the beginning of
383 assembly output. */
384 bool file_start_app_off;
385
386 /* True if output_file_directive should be called for main_input_filename
387 at the beginning of assembly output. */
388 bool file_start_file_directive;
672a6f42
NB
389};
390
f6897b10 391extern struct gcc_target targetm;
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