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672a6f42 1/* Data structure definitions for a generic GCC target.
d9221e01 2 Copyright (C) 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
672a6f42
NB
3
4This program is free software; you can redistribute it and/or modify it
5under the terms of the GNU General Public License as published by the
6Free Software Foundation; either version 2, or (at your option) any
7later version.
8
9This program is distributed in the hope that it will be useful,
10but WITHOUT ANY WARRANTY; without even the implied warranty of
11MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12GNU General Public License for more details.
13
14You should have received a copy of the GNU General Public License
15along with this program; if not, write to the Free Software
16Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17
18 In other words, you are welcome to use, share and improve this program.
19 You are forbidden to forbid anyone else to use, share and improve
20 what you give them. Help stamp out software-hoarding! */
21
22/* This file contains a data structure that describes a GCC target.
17b53c33 23 At present it is incomplete, but in future it should grow to
672a6f42
NB
24 contain most or all target machine and target O/S specific
25 information.
26
27 This structure has its initializer declared in target-def.h in the
28 form of large macro TARGET_INITIALIZER that expands to many smaller
29 macros.
30
31 The smaller macros each initialize one component of the structure,
32 and each has a default. Each target should have a file that
33 includes target.h and target-def.h, and overrides any inappropriate
34 defaults by undefining the relevant macro and defining a suitable
35 replacement. That file should then contain the definition of
f6897b10 36 "targetm" like so:
672a6f42 37
f6897b10 38 struct gcc_target targetm = TARGET_INITIALIZER;
672a6f42
NB
39
40 Doing things this way allows us to bring together everything that
17b53c33
NB
41 defines a GCC target. By supplying a default that is appropriate
42 to most targets, we can easily add new items without needing to
43 edit dozens of target configuration files. It should also allow us
44 to gradually reduce the amount of conditional compilation that is
45 scattered throughout GCC. */
672a6f42 46
59587b18
JQ
47#ifndef GCC_TARGET_H
48#define GCC_TARGET_H
49
7bb1ad93 50#include "tm.h"
59587b18 51#include "insn-modes.h"
7bb1ad93 52
672a6f42
NB
53struct gcc_target
54{
08c148a8
NB
55 /* Functions that output assembler for the target. */
56 struct asm_out
57 {
17b53c33
NB
58 /* Opening and closing parentheses for asm expression grouping. */
59 const char *open_paren, *close_paren;
60
301d03af
RS
61 /* Assembler instructions for creating various kinds of integer object. */
62 const char *byte_op;
63 struct asm_int_op
64 {
65 const char *hi;
66 const char *si;
67 const char *di;
68 const char *ti;
69 } aligned_op, unaligned_op;
70
71 /* Try to output the assembler code for an integer object whose
72 value is given by X. SIZE is the size of the object in bytes and
73 ALIGNED_P indicates whether it is aligned. Return true if
74 successful. Only handles cases for which BYTE_OP, ALIGNED_OP
75 and UNALIGNED_OP are NULL. */
46c5ad27 76 bool (* integer) (rtx x, unsigned int size, int aligned_p);
301d03af 77
5eb99654 78 /* Output code that will globalize a label. */
46c5ad27 79 void (* globalize_label) (FILE *, const char *);
5eb99654 80
4746cf84
MA
81 /* Output code that will emit a label for unwind info, if this
82 target requires such labels. Second argument is the decl the
eeab4d81
MS
83 unwind info is associated with, third is a boolean: true if
84 this is for exception handling, fourth is a boolean: true if
9cf737f8 85 this is only a placeholder for an omitted FDE. */
eeab4d81 86 void (* unwind_label) (FILE *, tree, int, int);
4746cf84 87
4977bab6 88 /* Output an internal label. */
46c5ad27 89 void (* internal_label) (FILE *, const char *, unsigned long);
4977bab6 90
93638d7a
AM
91 /* Emit an assembler directive to set visibility for the symbol
92 associated with the tree decl. */
46c5ad27 93 void (* visibility) (tree, int);
93638d7a 94
08c148a8 95 /* Output the assembler code for entry to a function. */
46c5ad27 96 void (* function_prologue) (FILE *, HOST_WIDE_INT);
08c148a8 97
b4c25db2 98 /* Output the assembler code for end of prologue. */
46c5ad27 99 void (* function_end_prologue) (FILE *);
b4c25db2
NB
100
101 /* Output the assembler code for start of epilogue. */
46c5ad27 102 void (* function_begin_epilogue) (FILE *);
b4c25db2 103
08c148a8 104 /* Output the assembler code for function exit. */
46c5ad27 105 void (* function_epilogue) (FILE *, HOST_WIDE_INT);
7c262518 106
715bdd29
RH
107 /* Switch to an arbitrary section NAME with attributes as
108 specified by FLAGS. */
46c5ad27 109 void (* named_section) (const char *, unsigned int);
2cc07db4 110
07c9d2eb 111 /* Switch to the section that holds the exception table. */
46c5ad27 112 void (* exception_section) (void);
07c9d2eb
SS
113
114 /* Switch to the section that holds the exception frames. */
46c5ad27 115 void (* eh_frame_section) (void);
07c9d2eb 116
ae46c4e0 117 /* Select and switch to a section for EXP. It may be a DECL or a
0864034e
ZW
118 constant. RELOC is nonzero if runtime relocations must be applied;
119 bit 1 will be set if the runtime relocations require non-local
120 name resolution. ALIGN is the required alignment of the data. */
46c5ad27 121 void (* select_section) (tree, int, unsigned HOST_WIDE_INT);
ae46c4e0 122
b64a1b53
RH
123 /* Select and switch to a section for X with MODE. ALIGN is
124 the desired alignment of the data. */
46c5ad27
AJ
125 void (* select_rtx_section) (enum machine_mode, rtx,
126 unsigned HOST_WIDE_INT);
b64a1b53 127
ae46c4e0
RH
128 /* Select a unique section name for DECL. RELOC is the same as
129 for SELECT_SECTION. */
46c5ad27 130 void (* unique_section) (tree, int);
ae46c4e0 131
2cc07db4 132 /* Output a constructor for a symbol with a given priority. */
46c5ad27 133 void (* constructor) (rtx, int);
2cc07db4
RH
134
135 /* Output a destructor for a symbol with a given priority. */
46c5ad27 136 void (* destructor) (rtx, int);
483ab821 137
3961e8fe
RH
138 /* Output the assembler code for a thunk function. THUNK_DECL is the
139 declaration for the thunk function itself, FUNCTION is the decl for
140 the target function. DELTA is an immediate constant offset to be
476c5eb6 141 added to THIS. If VCALL_OFFSET is nonzero, the word at
3961e8fe 142 *(*this + vcall_offset) should be added to THIS. */
46c5ad27
AJ
143 void (* output_mi_thunk) (FILE *file, tree thunk_decl,
144 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
145 tree function_decl);
3961e8fe
RH
146
147 /* Determine whether output_mi_thunk would succeed. */
148 /* ??? Ideally, this hook would not exist, and success or failure
149 would be returned from output_mi_thunk directly. But there's
150 too much undo-able setup involved in invoking output_mi_thunk.
151 Could be fixed by making output_mi_thunk emit rtl instead of
152 text to the output file. */
46c5ad27
AJ
153 bool (* can_output_mi_thunk) (tree thunk_decl, HOST_WIDE_INT delta,
154 HOST_WIDE_INT vcall_offset,
155 tree function_decl);
a5fe455b 156
1bc7c5b6
ZW
157 /* Output any boilerplate text needed at the beginning of a
158 translation unit. */
46c5ad27 159 void (*file_start) (void);
1bc7c5b6
ZW
160
161 /* Output any boilerplate text needed at the end of a
162 translation unit. */
46c5ad27 163 void (*file_end) (void);
6773a41c
RO
164
165 /* Output an assembler pseudo-op to declare a library function name
166 external. */
167 void (*external_libcall) (rtx);
08c148a8
NB
168 } asm_out;
169
c237e94a
ZW
170 /* Functions relating to instruction scheduling. */
171 struct sched
172 {
173 /* Given the current cost, COST, of an insn, INSN, calculate and
174 return a new cost based on its relationship to DEP_INSN through
175 the dependence LINK. The default is to make no adjustment. */
46c5ad27 176 int (* adjust_cost) (rtx insn, rtx link, rtx def_insn, int cost);
c237e94a
ZW
177
178 /* Adjust the priority of an insn as you see fit. Returns the new
179 priority. */
46c5ad27 180 int (* adjust_priority) (rtx, int);
c237e94a
ZW
181
182 /* Function which returns the maximum number of insns that can be
183 scheduled in the same machine cycle. This must be constant
184 over an entire compilation. The default is 1. */
46c5ad27 185 int (* issue_rate) (void);
c237e94a
ZW
186
187 /* Calculate how much this insn affects how many more insns we
188 can emit this cycle. Default is they all cost the same. */
46c5ad27 189 int (* variable_issue) (FILE *, int, rtx, int);
41077ce4 190
c237e94a 191 /* Initialize machine-dependent scheduling code. */
46c5ad27 192 void (* md_init) (FILE *, int, int);
c237e94a
ZW
193
194 /* Finalize machine-dependent scheduling code. */
46c5ad27 195 void (* md_finish) (FILE *, int);
c237e94a 196
58565a33
SKG
197 /* Initialize machine-dependent function while scheduling code. */
198 void (* md_init_global) (FILE *, int, int);
199
200 /* Finalize machine-dependent function wide scheduling code. */
201 void (* md_finish_global) (FILE *, int);
202
c237e94a
ZW
203 /* Reorder insns in a machine-dependent fashion, in two different
204 places. Default does nothing. */
46c5ad27
AJ
205 int (* reorder) (FILE *, int, rtx *, int *, int);
206 int (* reorder2) (FILE *, int, rtx *, int *, int);
c237e94a 207
30028c85
VM
208 /* The following member value is a pointer to a function called
209 after evaluation forward dependencies of insns in chain given
210 by two parameter values (head and tail correspondingly). */
46c5ad27 211 void (* dependencies_evaluation_hook) (rtx, rtx);
30028c85 212
fae15c93
VM
213 /* The following member value is a pointer to a function returning
214 nonzero if we should use DFA based scheduling. The default is
215 to use the old pipeline scheduler. */
46c5ad27 216 int (* use_dfa_pipeline_interface) (void);
fae15c93
VM
217 /* The values of all the following members are used only for the
218 DFA based scheduler: */
219 /* The values of the following four members are pointers to
220 functions used to simplify the automaton descriptions.
221 dfa_pre_cycle_insn and dfa_post_cycle_insn give functions
222 returning insns which are used to change the pipeline hazard
223 recognizer state when the new simulated processor cycle
224 correspondingly starts and finishes. The function defined by
225 init_dfa_pre_cycle_insn and init_dfa_post_cycle_insn are used
226 to initialize the corresponding insns. The default values of
d91edf86 227 the members result in not changing the automaton state when
fae15c93
VM
228 the new simulated processor cycle correspondingly starts and
229 finishes. */
46c5ad27
AJ
230 void (* init_dfa_pre_cycle_insn) (void);
231 rtx (* dfa_pre_cycle_insn) (void);
232 void (* init_dfa_post_cycle_insn) (void);
233 rtx (* dfa_post_cycle_insn) (void);
fae15c93
VM
234 /* The following member value is a pointer to a function returning value
235 which defines how many insns in queue `ready' will we try for
5ad6fca5 236 multi-pass scheduling. If the member value is nonzero and the
fae15c93
VM
237 function returns positive value, the DFA based scheduler will make
238 multi-pass scheduling for the first cycle. In other words, we will
239 try to choose ready insn which permits to start maximum number of
240 insns on the same cycle. */
46c5ad27 241 int (* first_cycle_multipass_dfa_lookahead) (void);
30028c85
VM
242 /* The following member value is pointer to a function controlling
243 what insns from the ready insn queue will be considered for the
244 multipass insn scheduling. If the hook returns zero for insn
245 passed as the parameter, the insn will be not chosen to be
246 issued. */
46c5ad27 247 int (* first_cycle_multipass_dfa_lookahead_guard) (rtx);
30028c85
VM
248 /* The following member value is pointer to a function called by
249 the insn scheduler before issuing insn passed as the third
250 parameter on given cycle. If the hook returns nonzero, the
251 insn is not issued on given processors cycle. Instead of that,
252 the processor cycle is advanced. If the value passed through
253 the last parameter is zero, the insn ready queue is not sorted
254 on the new cycle start as usually. The first parameter passes
255 file for debugging output. The second one passes the scheduler
256 verbose level of the debugging output. The forth and the fifth
257 parameter values are correspondingly processor cycle on which
258 the previous insn has been issued and the current processor
259 cycle. */
46c5ad27 260 int (* dfa_new_cycle) (FILE *, int, rtx, int, int, int *);
569fa502
DN
261 /* The following member value is a pointer to a function called
262 by the insn scheduler. It should return true if there exists a
263 dependence which is considered costly by the target, between
264 the insn passed as the first parameter, and the insn passed as
265 the second parameter. The third parameter is the INSN_DEPEND
266 link that represents the dependence between the two insns. The
267 fourth argument is the cost of the dependence as estimated by
268 the scheduler. The last argument is the distance in cycles
269 between the already scheduled insn (first parameter) and the
80fcc7bc
SB
270 the second insn (second parameter). */
271 bool (* is_costly_dependence) (rtx, rtx, rtx, int, int);
c237e94a
ZW
272 } sched;
273
672a6f42 274 /* Given two decls, merge their attributes and return the result. */
46c5ad27 275 tree (* merge_decl_attributes) (tree, tree);
672a6f42
NB
276
277 /* Given two types, merge their attributes and return the result. */
46c5ad27 278 tree (* merge_type_attributes) (tree, tree);
672a6f42 279
349ae713
NB
280 /* Table of machine attributes and functions to handle them.
281 Ignored if NULL. */
91d231cb 282 const struct attribute_spec *attribute_table;
8d8e52be
JM
283
284 /* Return zero if the attributes on TYPE1 and TYPE2 are incompatible,
285 one if they are compatible and two if they are nearly compatible
286 (which causes a warning to be generated). */
46c5ad27 287 int (* comp_type_attributes) (tree type1, tree type2);
8d8e52be
JM
288
289 /* Assign default attributes to the newly defined TYPE. */
46c5ad27 290 void (* set_default_type_attributes) (tree type);
12a68f1f
JM
291
292 /* Insert attributes on the newly created DECL. */
46c5ad27 293 void (* insert_attributes) (tree decl, tree *attributes);
f6155fda 294
91d231cb
JM
295 /* Return true if FNDECL (which has at least one machine attribute)
296 can be inlined despite its machine attributes, false otherwise. */
46c5ad27 297 bool (* function_attribute_inlinable_p) (tree fndecl);
91d231cb 298
f913c102
AO
299 /* Return true if bitfields in RECORD_TYPE should follow the
300 Microsoft Visual C++ bitfield layout rules. */
46c5ad27 301 bool (* ms_bitfield_layout_p) (tree record_type);
f913c102 302
13c1cd82
PB
303 /* Return true if anonymous bitfields affect structure alignment. */
304 bool (* align_anon_bitfield) (void);
305
f6155fda 306 /* Set up target-specific built-in functions. */
46c5ad27 307 void (* init_builtins) (void);
f6155fda
SS
308
309 /* Expand a target-specific builtin. */
46c5ad27
AJ
310 rtx (* expand_builtin) (tree exp, rtx target, rtx subtarget,
311 enum machine_mode mode, int ignore);
7c262518 312
f18eca82
ZL
313 /* For a vendor-specific fundamental TYPE, return a pointer to
314 a statically-allocated string containing the C++ mangling for
315 TYPE. In all other cases, return NULL. */
316 const char * (* mangle_fundamental_type) (tree type);
317
c15c90bb
ZW
318 /* Make any adjustments to libfunc names needed for this target. */
319 void (* init_libfuncs) (void);
320
7c262518
RH
321 /* Given a decl, a section name, and whether the decl initializer
322 has relocs, choose attributes for the section. */
323 /* ??? Should be merged with SELECT_SECTION and UNIQUE_SECTION. */
46c5ad27 324 unsigned int (* section_type_flags) (tree, const char *, int);
7c262518 325
e4ec2cac
AO
326 /* True if new jumps cannot be created, to replace existing ones or
327 not, at the current point in the compilation. */
46c5ad27 328 bool (* cannot_modify_jumps_p) (void);
ae46c4e0 329
a3424f5c
RH
330 /* Return a register class for which branch target register
331 optimizations should be applied. */
46c5ad27 332 int (* branch_target_register_class) (void);
a3424f5c
RH
333
334 /* Return true if branch target register optimizations should include
335 callee-saved registers that are not already live during the current
336 function. AFTER_PE_GEN is true if prologues and epilogues have
337 already been generated. */
46c5ad27 338 bool (* branch_target_register_callee_saved) (bool after_pe_gen);
fe3ad572 339
3a04ff64 340 /* True if the constant X cannot be placed in the constant pool. */
46c5ad27 341 bool (* cannot_force_const_mem) (rtx);
3a04ff64 342
0b077eac 343 /* True if the insn X cannot be duplicated. */
46c5ad27 344 bool (* cannot_copy_insn_p) (rtx);
0b077eac 345
7daebb7a 346 /* Given an address RTX, undo the effects of LEGITIMIZE_ADDRESS. */
46c5ad27 347 rtx (* delegitimize_address) (rtx);
7daebb7a 348
4977bab6
ZW
349 /* True if it is OK to do sibling call optimization for the specified
350 call expression EXP. DECL will be the called function, or NULL if
351 this is an indirect call. */
46c5ad27
AJ
352 bool (*function_ok_for_sibcall) (tree decl, tree exp);
353
ae46c4e0 354 /* True if EXP should be placed in a "small data" section. */
46c5ad27 355 bool (* in_small_data_p) (tree);
fb49053f 356
47754fd5
RH
357 /* True if EXP names an object for which name resolution must resolve
358 to the current module. */
46c5ad27 359 bool (* binds_local_p) (tree);
47754fd5 360
fb49053f
RH
361 /* Do something target-specific to record properties of the DECL into
362 the associated SYMBOL_REF. */
46c5ad27 363 void (* encode_section_info) (tree, rtx, int);
772c5265
RH
364
365 /* Undo the effects of encode_section_info on the symbol string. */
46c5ad27 366 const char * (* strip_name_encoding) (const char *);
47754fd5 367
3c50106f 368 /* True if MODE is valid for a pointer in __attribute__((mode("MODE"))). */
46c5ad27 369 bool (* valid_pointer_mode) (enum machine_mode mode);
3c50106f 370
c8e4f0e9 371 /* True if a vector is opaque. */
46c5ad27 372 bool (* vector_opaque_p) (tree);
62e1dfcf 373
3c50106f
RH
374 /* Compute a (partial) cost for rtx X. Return true if the complete
375 cost has been computed, and false if subexpressions should be
376 scanned. In either case, *TOTAL contains the cost result. */
377 /* Note that CODE and OUTER_CODE ought to be RTX_CODE, but that's
378 not necessarily defined at this point. */
46c5ad27 379 bool (* rtx_costs) (rtx x, int code, int outer_code, int *total);
3c50106f 380
dcefdf67
RH
381 /* Compute the cost of X, used as an address. Never called with
382 invalid addresses. */
46c5ad27 383 int (* address_cost) (rtx x);
dcefdf67 384
96714395
AH
385 /* Given a register, this hook should return a parallel of registers
386 to represent where to find the register pieces. Define this hook
387 if the register and its mode are represented in Dwarf in
388 non-contiguous locations, or if the register should be
389 represented in more than one register in Dwarf. Otherwise, this
390 hook should return NULL_RTX. */
46c5ad27 391 rtx (* dwarf_register_span) (rtx);
96714395 392
e129d93a
ILT
393 /* Fetch the fixed register(s) which hold condition codes, for
394 targets where it makes sense to look for duplicate assignments to
395 the condition codes. This should return true if there is such a
396 register, false otherwise. The arguments should be set to the
397 fixed register numbers. Up to two condition code registers are
398 supported. If there is only one for this target, the int pointed
399 at by the second argument should be set to -1. */
400 bool (* fixed_condition_code_regs) (unsigned int *, unsigned int *);
401
402 /* If two condition code modes are compatible, return a condition
403 code mode which is compatible with both, such that a comparison
404 done in the returned mode will work for both of the original
405 modes. If the condition code modes are not compatible, return
406 VOIDmode. */
407 enum machine_mode (* cc_modes_compatible) (enum machine_mode,
408 enum machine_mode);
409
18dbd950
RS
410 /* Do machine-dependent code transformations. Called just before
411 delayed-branch scheduling. */
46c5ad27 412 void (* machine_dependent_reorg) (void);
18dbd950 413
c35d187f
RH
414 /* Create the __builtin_va_list type. */
415 tree (* build_builtin_va_list) (void);
416
7bb1ad93
GK
417 /* Validity-checking routines for PCH files, target-specific.
418 get_pch_validity returns a pointer to the data to be stored,
419 and stores the size in its argument. pch_valid_p gets the same
420 information back and returns NULL if the PCH is valid,
421 or an error message if not.
422 */
423 void * (* get_pch_validity) (size_t *);
424 const char * (* pch_valid_p) (const void *, size_t);
425
a841ab8b 426 /* True if the compiler should give an enum type only as many
221ee7c9
KH
427 bytes as it takes to represent the range of possible values of
428 that type. */
429 bool (* default_short_enums) (void);
430
d6da68b9 431 /* This target hook returns an rtx that is used to store the address
a841ab8b 432 of the current frame into the built-in setjmp buffer. */
d6da68b9
KH
433 rtx (* builtin_setjmp_frame_value) (void);
434
67dfe110
KH
435 /* This target hook should add STRING_CST trees for any hard regs
436 the port wishes to automatically clobber for all asms. */
437 tree (* md_asm_clobbers) (tree);
438
42ba5130
RH
439 /* Functions relating to calls - argument passing, returns, etc. */
440 struct calls {
441 bool (*promote_function_args) (tree fntype);
442 bool (*promote_function_return) (tree fntype);
443 bool (*promote_prototypes) (tree fntype);
444 rtx (*struct_value_rtx) (tree fndecl, int incoming);
445 bool (*return_in_memory) (tree type, tree fndecl);
446 bool (*return_in_msb) (tree type);
447 rtx (*expand_builtin_saveregs) (void);
448 /* Returns pretend_argument_size. */
449 void (*setup_incoming_varargs) (CUMULATIVE_ARGS *ca, enum machine_mode mode,
450 tree type, int *pretend_arg_size,
451 int second_time);
452 bool (*strict_argument_naming) (CUMULATIVE_ARGS *ca);
453 /* Returns true if we should use
454 targetm.calls.setup_incoming_varargs() and/or
455 targetm.calls.strict_argument_naming(). */
456 bool (*pretend_outgoing_varargs_named) (CUMULATIVE_ARGS *ca);
457
458 /* Given a complex type T, return true if a parameter of type T
459 should be passed as two scalars. */
460 bool (* split_complex_arg) (tree type);
cd3ce9b4
JM
461
462 /* Gimplifies a VA_ARG_EXPR. */
23a60a04 463 tree (* gimplify_va_arg_expr) (tree valist, tree type, tree *pre_p,
cd3ce9b4 464 tree *post_p);
42ba5130
RH
465 } calls;
466
4185ae53
PB
467 /* Functions specific to the C++ frontend. */
468 struct cxx {
469 /* Return the integer type used for guard variables. */
470 tree (*guard_type) (void);
471 /* Return true if only the low bit of the guard should be tested. */
472 bool (*guard_mask_bit) (void);
46e995e0
PB
473 /* Returns the size of the array cookie for an array of type. */
474 tree (*get_cookie_size) (tree);
475 /* Returns true if the element size should be stored in the
476 array cookie. */
477 bool (*cookie_has_size) (void);
d59c7b4b
NC
478 /* Allows backends to perform additional processing when
479 deciding if a class should be exported or imported. */
480 int (*import_export_class) (tree, int);
4185ae53
PB
481 } cxx;
482
47754fd5
RH
483 /* Leave the boolean fields at the end. */
484
485 /* True if arbitrary sections are supported. */
486 bool have_named_sections;
487
488 /* True if "native" constructors and destructors are supported,
489 false if we're using collect2 for the job. */
490 bool have_ctors_dtors;
3d78f2e9
RH
491
492 /* True if thread-local storage is supported. */
493 bool have_tls;
275b6d80
DE
494
495 /* True if a small readonly data section is supported. */
496 bool have_srodata_section;
7606e68f
SS
497
498 /* True if EH frame info sections should be zero-terminated. */
499 bool terminate_dw2_eh_frame_info;
1bc7c5b6
ZW
500
501 /* True if #NO_APP should be emitted at the beginning of
502 assembly output. */
503 bool file_start_app_off;
504
505 /* True if output_file_directive should be called for main_input_filename
506 at the beginning of assembly output. */
507 bool file_start_file_directive;
61f71b34 508
84b8b0e0
ZW
509 /* True if #pragma redefine_extname is to be supported. */
510 bool handle_pragma_redefine_extname;
511
512 /* True if #pragma extern_prefix is to be supported. */
513 bool handle_pragma_extern_prefix;
514
9ac617d4
EB
515 /* True if the RTL prologue and epilogue should be expanded after all
516 passes that modify the instructions (and not merely reorder them)
517 have been run. */
518 bool late_rtl_prologue_epilogue;
519
42ba5130 520 /* Leave the boolean fields at the end. */
672a6f42
NB
521};
522
f6897b10 523extern struct gcc_target targetm;
59587b18
JQ
524
525#endif /* GCC_TARGET_H */
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