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d9d4fb43 | 1 | /* Static Single Assignment conversion routines for the GNU compiler. |
fd9305ef | 2 | Copyright (C) 2000, 2001 Free Software Foundation, Inc. |
d9d4fb43 | 3 | |
1322177d | 4 | This file is part of GCC. |
d9d4fb43 | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it under |
7 | the terms of the GNU General Public License as published by the Free | |
8 | Software Foundation; either version 2, or (at your option) any later | |
9 | version. | |
d9d4fb43 | 10 | |
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
12 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
770ae6cc RK |
13 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License |
14 | for more details. | |
d9d4fb43 | 15 | |
770ae6cc | 16 | You should have received a copy of the GNU General Public License |
1322177d | 17 | along with GCC; see the file COPYING. If not, write to the Free |
770ae6cc RK |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA |
19 | 02111-1307, USA. */ | |
d9d4fb43 AS |
20 | |
21 | /* References: | |
22 | ||
23 | Building an Optimizing Compiler | |
24 | Robert Morgan | |
25 | Butterworth-Heinemann, 1998 | |
26 | ||
27 | Static Single Assignment Construction | |
28 | Preston Briggs, Tim Harvey, Taylor Simpson | |
29 | Technical Report, Rice University, 1995 | |
cdbca172 | 30 | ftp://ftp.cs.rice.edu/public/preston/optimizer/SSA.ps.gz. */ |
d9d4fb43 AS |
31 | |
32 | #include "config.h" | |
33 | #include "system.h" | |
34 | ||
35 | #include "rtl.h" | |
0829d244 | 36 | #include "expr.h" |
cdbca172 JO |
37 | #include "varray.h" |
38 | #include "partition.h" | |
39 | #include "sbitmap.h" | |
40 | #include "hashtab.h" | |
d9d4fb43 AS |
41 | #include "regs.h" |
42 | #include "hard-reg-set.h" | |
43 | #include "flags.h" | |
44 | #include "function.h" | |
45 | #include "real.h" | |
46 | #include "insn-config.h" | |
47 | #include "recog.h" | |
48 | #include "basic-block.h" | |
49 | #include "output.h" | |
b53978a3 | 50 | #include "ssa.h" |
d9d4fb43 | 51 | |
d9d4fb43 AS |
52 | /* TODO: |
53 | ||
4e872036 AS |
54 | Handle subregs better, maybe. For now, if a reg that's set in a |
55 | subreg expression is duplicated going into SSA form, an extra copy | |
56 | is inserted first that copies the entire reg into the duplicate, so | |
57 | that the other bits are preserved. This isn't strictly SSA, since | |
58 | at least part of the reg is assigned in more than one place (though | |
59 | they are adjacent). | |
60 | ||
d9d4fb43 AS |
61 | ??? What to do about strict_low_part. Probably I'll have to split |
62 | them out of their current instructions first thing. | |
63 | ||
64 | Actually the best solution may be to have a kind of "mid-level rtl" | |
65 | in which the RTL encodes exactly what we want, without exposing a | |
66 | lot of niggling processor details. At some later point we lower | |
67 | the representation, calling back into optabs to finish any necessary | |
4e872036 AS |
68 | expansion. */ |
69 | ||
cdbca172 JO |
70 | /* All pseudo-registers and select hard registers are converted to SSA |
71 | form. When converting out of SSA, these select hard registers are | |
72 | guaranteed to be mapped to their original register number. Each | |
73 | machine's .h file should define CONVERT_HARD_REGISTER_TO_SSA_P | |
74 | indicating which hard registers should be converted. | |
75 | ||
76 | When converting out of SSA, temporaries for all registers are | |
77 | partitioned. The partition is checked to ensure that all uses of | |
78 | the same hard register in the same machine mode are in the same | |
79 | class. */ | |
4e872036 AS |
80 | |
81 | /* If conservative_reg_partition is non-zero, use a conservative | |
82 | register partitioning algorithm (which leaves more regs after | |
83 | emerging from SSA) instead of the coalescing one. This is being | |
84 | left in for a limited time only, as a debugging tool until the | |
85 | coalescing algorithm is validated. */ | |
cdbca172 | 86 | |
4e872036 | 87 | static int conservative_reg_partition; |
d9d4fb43 | 88 | |
4e872036 AS |
89 | /* This flag is set when the CFG is in SSA form. */ |
90 | int in_ssa_form = 0; | |
d9d4fb43 | 91 | |
cdbca172 | 92 | /* Element I is the single instruction that sets register I. */ |
d9d4fb43 AS |
93 | varray_type ssa_definition; |
94 | ||
d9d4fb43 AS |
95 | /* Element I-PSEUDO is the normal register that originated the ssa |
96 | register in question. */ | |
97 | varray_type ssa_rename_from; | |
98 | ||
cdbca172 JO |
99 | /* Element I is the normal register that originated the ssa |
100 | register in question. | |
101 | ||
102 | A hash table stores the (register, rtl) pairs. These are each | |
103 | xmalloc'ed and deleted when the hash table is destroyed. */ | |
104 | htab_t ssa_rename_from_ht; | |
105 | ||
106 | /* The running target ssa register for a given pseudo register. | |
107 | (Pseudo registers appear in only one mode.) */ | |
108 | static rtx *ssa_rename_to_pseudo; | |
109 | /* Similar, but for hard registers. A hard register can appear in | |
110 | many modes, so we store an equivalent pseudo for each of the | |
111 | modes. */ | |
112 | static rtx ssa_rename_to_hard[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]; | |
113 | ||
114 | /* ssa_rename_from maps pseudo registers to the original corresponding | |
115 | RTL. It is implemented as using a hash table. */ | |
116 | ||
117 | typedef struct { | |
118 | unsigned int reg; | |
119 | rtx original; | |
120 | } ssa_rename_from_pair; | |
121 | ||
122 | struct ssa_rename_from_hash_table_data { | |
123 | sbitmap canonical_elements; | |
124 | partition reg_partition; | |
125 | }; | |
126 | ||
b53978a3 | 127 | static void ssa_rename_from_initialize |
cdbca172 | 128 | PARAMS ((void)); |
b53978a3 | 129 | static rtx ssa_rename_from_lookup |
cdbca172 | 130 | PARAMS ((int reg)); |
b53978a3 | 131 | static unsigned int original_register |
cdbca172 | 132 | PARAMS ((unsigned int regno)); |
b53978a3 | 133 | static void ssa_rename_from_insert |
cdbca172 | 134 | PARAMS ((unsigned int reg, rtx r)); |
b53978a3 | 135 | static void ssa_rename_from_free |
cdbca172 JO |
136 | PARAMS ((void)); |
137 | typedef int (*srf_trav) PARAMS ((int regno, rtx r, sbitmap canonical_elements, partition reg_partition)); | |
138 | static void ssa_rename_from_traverse | |
139 | PARAMS ((htab_trav callback_function, sbitmap canonical_elements, partition reg_partition)); | |
b53978a3 | 140 | /*static Avoid warnign message. */ void ssa_rename_from_print |
cdbca172 JO |
141 | PARAMS ((void)); |
142 | static int ssa_rename_from_print_1 | |
143 | PARAMS ((void **slot, void *data)); | |
144 | static hashval_t ssa_rename_from_hash_function | |
145 | PARAMS ((const void * srfp)); | |
146 | static int ssa_rename_from_equal | |
147 | PARAMS ((const void *srfp1, const void *srfp2)); | |
148 | static void ssa_rename_from_delete | |
149 | PARAMS ((void *srfp)); | |
150 | ||
151 | static rtx ssa_rename_to_lookup | |
152 | PARAMS ((rtx reg)); | |
153 | static void ssa_rename_to_insert | |
154 | PARAMS ((rtx reg, rtx r)); | |
d9d4fb43 AS |
155 | |
156 | /* The number of registers that were live on entry to the SSA routines. */ | |
770ae6cc | 157 | static unsigned int ssa_max_reg_num; |
d9d4fb43 AS |
158 | |
159 | /* Local function prototypes. */ | |
160 | ||
5397b155 GK |
161 | struct rename_context; |
162 | ||
d9d4fb43 AS |
163 | static inline rtx * phi_alternative |
164 | PARAMS ((rtx, int)); | |
d9d4fb43 AS |
165 | static void compute_dominance_frontiers_1 |
166 | PARAMS ((sbitmap *frontiers, int *idom, int bb, sbitmap done)); | |
d9d4fb43 AS |
167 | static void find_evaluations_1 |
168 | PARAMS ((rtx dest, rtx set, void *data)); | |
169 | static void find_evaluations | |
170 | PARAMS ((sbitmap *evals, int nregs)); | |
171 | static void compute_iterated_dominance_frontiers | |
172 | PARAMS ((sbitmap *idfs, sbitmap *frontiers, sbitmap *evals, int nregs)); | |
173 | static void insert_phi_node | |
174 | PARAMS ((int regno, int b)); | |
175 | static void insert_phi_nodes | |
176 | PARAMS ((sbitmap *idfs, sbitmap *evals, int nregs)); | |
5397b155 GK |
177 | static void create_delayed_rename |
178 | PARAMS ((struct rename_context *, rtx *)); | |
179 | static void apply_delayed_renames | |
180 | PARAMS ((struct rename_context *)); | |
d9d4fb43 AS |
181 | static int rename_insn_1 |
182 | PARAMS ((rtx *ptr, void *data)); | |
183 | static void rename_block | |
184 | PARAMS ((int b, int *idom)); | |
185 | static void rename_registers | |
186 | PARAMS ((int nregs, int *idom)); | |
187 | ||
188 | static inline int ephi_add_node | |
189 | PARAMS ((rtx reg, rtx *nodes, int *n_nodes)); | |
190 | static int * ephi_forward | |
191 | PARAMS ((int t, sbitmap visited, sbitmap *succ, int *tstack)); | |
192 | static void ephi_backward | |
193 | PARAMS ((int t, sbitmap visited, sbitmap *pred, rtx *nodes)); | |
194 | static void ephi_create | |
195 | PARAMS ((int t, sbitmap visited, sbitmap *pred, sbitmap *succ, rtx *nodes)); | |
196 | static void eliminate_phi | |
197 | PARAMS ((edge e, partition reg_partition)); | |
d9d4fb43 AS |
198 | static int make_regs_equivalent_over_bad_edges |
199 | PARAMS ((int bb, partition reg_partition)); | |
4e872036 AS |
200 | |
201 | /* These are used only in the conservative register partitioning | |
202 | algorithms. */ | |
d9d4fb43 AS |
203 | static int make_equivalent_phi_alternatives_equivalent |
204 | PARAMS ((int bb, partition reg_partition)); | |
205 | static partition compute_conservative_reg_partition | |
62771d51 | 206 | PARAMS ((void)); |
cdbca172 JO |
207 | static int record_canonical_element_1 |
208 | PARAMS ((void **srfp, void *data)); | |
209 | static int check_hard_regs_in_partition | |
210 | PARAMS ((partition reg_partition)); | |
4e872036 AS |
211 | static int rename_equivalent_regs_in_insn |
212 | PARAMS ((rtx *ptr, void *data)); | |
213 | ||
214 | /* These are used in the register coalescing algorithm. */ | |
215 | static int coalesce_if_unconflicting | |
216 | PARAMS ((partition p, conflict_graph conflicts, int reg1, int reg2)); | |
217 | static int coalesce_regs_in_copies | |
6308dae9 | 218 | PARAMS ((basic_block bb, partition p, conflict_graph conflicts)); |
4e872036 AS |
219 | static int coalesce_reg_in_phi |
220 | PARAMS ((rtx, int dest_regno, int src_regno, void *data)); | |
221 | static int coalesce_regs_in_successor_phi_nodes | |
6308dae9 | 222 | PARAMS ((basic_block bb, partition p, conflict_graph conflicts)); |
4e872036 | 223 | static partition compute_coalesced_reg_partition |
36244024 | 224 | PARAMS ((void)); |
4e872036 AS |
225 | static int mark_reg_in_phi |
226 | PARAMS ((rtx *ptr, void *data)); | |
227 | static void mark_phi_and_copy_regs | |
228 | PARAMS ((regset phi_set)); | |
229 | ||
d9d4fb43 AS |
230 | static int rename_equivalent_regs_in_insn |
231 | PARAMS ((rtx *ptr, void *data)); | |
232 | static void rename_equivalent_regs | |
233 | PARAMS ((partition reg_partition)); | |
234 | ||
cdbca172 JO |
235 | /* Deal with hard registers. */ |
236 | static int conflicting_hard_regs_p | |
237 | PARAMS ((int reg1, int reg2)); | |
238 | ||
239 | /* ssa_rename_to maps registers and machine modes to SSA pseudo registers. */ | |
240 | ||
241 | /* Find the register associated with REG in the indicated mode. */ | |
242 | ||
243 | static rtx | |
244 | ssa_rename_to_lookup (reg) | |
245 | rtx reg; | |
246 | { | |
247 | if (!HARD_REGISTER_P (reg)) | |
248 | return ssa_rename_to_pseudo[REGNO (reg) - FIRST_PSEUDO_REGISTER]; | |
249 | else | |
250 | return ssa_rename_to_hard[REGNO (reg)][GET_MODE (reg)]; | |
251 | } | |
252 | ||
253 | /* Store a new value mapping REG to R in ssa_rename_to. */ | |
254 | ||
255 | static void | |
256 | ssa_rename_to_insert(reg, r) | |
257 | rtx reg; | |
258 | rtx r; | |
259 | { | |
260 | if (!HARD_REGISTER_P (reg)) | |
261 | ssa_rename_to_pseudo[REGNO (reg) - FIRST_PSEUDO_REGISTER] = r; | |
262 | else | |
263 | ssa_rename_to_hard[REGNO (reg)][GET_MODE (reg)] = r; | |
264 | } | |
265 | ||
266 | /* Prepare ssa_rename_from for use. */ | |
267 | ||
b53978a3 | 268 | static void |
cdbca172 JO |
269 | ssa_rename_from_initialize () |
270 | { | |
271 | /* We use an arbitrary initial hash table size of 64. */ | |
272 | ssa_rename_from_ht = htab_create (64, | |
273 | &ssa_rename_from_hash_function, | |
274 | &ssa_rename_from_equal, | |
275 | &ssa_rename_from_delete); | |
276 | } | |
277 | ||
278 | /* Find the REG entry in ssa_rename_from. Return NULL_RTX if no entry is | |
279 | found. */ | |
280 | ||
b53978a3 | 281 | static rtx |
cdbca172 JO |
282 | ssa_rename_from_lookup (reg) |
283 | int reg; | |
284 | { | |
285 | ssa_rename_from_pair srfp; | |
286 | ssa_rename_from_pair *answer; | |
287 | srfp.reg = reg; | |
288 | srfp.original = NULL_RTX; | |
289 | answer = (ssa_rename_from_pair *) | |
290 | htab_find_with_hash (ssa_rename_from_ht, (void *) &srfp, reg); | |
291 | return (answer == 0 ? NULL_RTX : answer->original); | |
292 | } | |
293 | ||
294 | /* Find the number of the original register specified by REGNO. If | |
295 | the register is a pseudo, return the original register's number. | |
296 | Otherwise, return this register number REGNO. */ | |
297 | ||
b53978a3 | 298 | static unsigned int |
cdbca172 JO |
299 | original_register (regno) |
300 | unsigned int regno; | |
301 | { | |
302 | rtx original_rtx = ssa_rename_from_lookup (regno); | |
303 | return original_rtx != NULL_RTX ? REGNO (original_rtx) : regno; | |
304 | } | |
305 | ||
306 | /* Add mapping from R to REG to ssa_rename_from even if already present. */ | |
307 | ||
b53978a3 | 308 | static void |
cdbca172 JO |
309 | ssa_rename_from_insert (reg, r) |
310 | unsigned int reg; | |
311 | rtx r; | |
312 | { | |
313 | void **slot; | |
314 | ssa_rename_from_pair *srfp = xmalloc (sizeof (ssa_rename_from_pair)); | |
315 | srfp->reg = reg; | |
316 | srfp->original = r; | |
317 | slot = htab_find_slot_with_hash (ssa_rename_from_ht, (const void *) srfp, | |
318 | reg, INSERT); | |
319 | if (*slot != 0) | |
320 | free ((void *) *slot); | |
321 | *slot = srfp; | |
322 | } | |
323 | ||
324 | /* Apply the CALLBACK_FUNCTION to each element in ssa_rename_from. | |
325 | CANONICAL_ELEMENTS and REG_PARTITION pass data needed by the only | |
326 | current use of this function. */ | |
327 | ||
b53978a3 | 328 | static void |
cdbca172 JO |
329 | ssa_rename_from_traverse (callback_function, |
330 | canonical_elements, reg_partition) | |
331 | htab_trav callback_function; | |
332 | sbitmap canonical_elements; | |
333 | partition reg_partition; | |
334 | { | |
335 | struct ssa_rename_from_hash_table_data srfhd; | |
336 | srfhd.canonical_elements = canonical_elements; | |
337 | srfhd.reg_partition = reg_partition; | |
338 | htab_traverse (ssa_rename_from_ht, callback_function, (void *) &srfhd); | |
339 | } | |
340 | ||
341 | /* Destroy ssa_rename_from. */ | |
342 | ||
b53978a3 | 343 | static void |
cdbca172 JO |
344 | ssa_rename_from_free () |
345 | { | |
346 | htab_delete (ssa_rename_from_ht); | |
347 | } | |
348 | ||
349 | /* Print the contents of ssa_rename_from. */ | |
350 | ||
b53978a3 JO |
351 | /* static Avoid erroneous error message. */ |
352 | void | |
cdbca172 JO |
353 | ssa_rename_from_print () |
354 | { | |
355 | printf ("ssa_rename_from's hash table contents:\n"); | |
356 | htab_traverse (ssa_rename_from_ht, &ssa_rename_from_print_1, NULL); | |
357 | } | |
358 | ||
359 | /* Print the contents of the hash table entry SLOT, passing the unused | |
360 | sttribute DATA. Used as a callback function with htab_traverse (). */ | |
361 | ||
362 | static int | |
363 | ssa_rename_from_print_1 (slot, data) | |
364 | void **slot; | |
365 | void *data ATTRIBUTE_UNUSED; | |
366 | { | |
367 | ssa_rename_from_pair * p = *slot; | |
368 | printf ("ssa_rename_from maps pseudo %i to original %i.\n", | |
369 | p->reg, REGNO (p->original)); | |
370 | return 1; | |
371 | } | |
372 | ||
373 | /* Given a hash entry SRFP, yield a hash value. */ | |
374 | ||
375 | static hashval_t | |
376 | ssa_rename_from_hash_function (srfp) | |
377 | const void *srfp; | |
378 | { | |
ce1cc601 | 379 | return ((const ssa_rename_from_pair *) srfp)->reg; |
cdbca172 JO |
380 | } |
381 | ||
382 | /* Test whether two hash table entries SRFP1 and SRFP2 are equal. */ | |
383 | ||
384 | static int | |
385 | ssa_rename_from_equal (srfp1, srfp2) | |
386 | const void *srfp1; | |
387 | const void *srfp2; | |
388 | { | |
389 | return ssa_rename_from_hash_function (srfp1) == | |
390 | ssa_rename_from_hash_function (srfp2); | |
391 | } | |
392 | ||
393 | /* Delete the hash table entry SRFP. */ | |
394 | ||
395 | static void | |
396 | ssa_rename_from_delete (srfp) | |
397 | void *srfp; | |
398 | { | |
399 | free (srfp); | |
400 | } | |
d9d4fb43 | 401 | |
d9d4fb43 AS |
402 | /* Given the SET of a PHI node, return the address of the alternative |
403 | for predecessor block C. */ | |
404 | ||
405 | static inline rtx * | |
406 | phi_alternative (set, c) | |
407 | rtx set; | |
408 | int c; | |
409 | { | |
410 | rtvec phi_vec = XVEC (SET_SRC (set), 0); | |
411 | int v; | |
412 | ||
413 | for (v = GET_NUM_ELEM (phi_vec) - 2; v >= 0; v -= 2) | |
414 | if (INTVAL (RTVEC_ELT (phi_vec, v + 1)) == c) | |
415 | return &RTVEC_ELT (phi_vec, v); | |
416 | ||
417 | return NULL; | |
418 | } | |
419 | ||
420 | /* Given the SET of a phi node, remove the alternative for predecessor | |
421 | block C. Return non-zero on success, or zero if no alternative is | |
422 | found for C. */ | |
423 | ||
fd9305ef JL |
424 | int |
425 | remove_phi_alternative (set, block) | |
d9d4fb43 | 426 | rtx set; |
fd9305ef | 427 | basic_block block; |
d9d4fb43 AS |
428 | { |
429 | rtvec phi_vec = XVEC (SET_SRC (set), 0); | |
430 | int num_elem = GET_NUM_ELEM (phi_vec); | |
fd9305ef | 431 | int v, c; |
d9d4fb43 | 432 | |
fd9305ef | 433 | c = block->index; |
d9d4fb43 AS |
434 | for (v = num_elem - 2; v >= 0; v -= 2) |
435 | if (INTVAL (RTVEC_ELT (phi_vec, v + 1)) == c) | |
436 | { | |
437 | if (v < num_elem - 2) | |
438 | { | |
439 | RTVEC_ELT (phi_vec, v) = RTVEC_ELT (phi_vec, num_elem - 2); | |
440 | RTVEC_ELT (phi_vec, v + 1) = RTVEC_ELT (phi_vec, num_elem - 1); | |
441 | } | |
442 | PUT_NUM_ELEM (phi_vec, num_elem - 2); | |
443 | return 1; | |
444 | } | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
d9d4fb43 AS |
449 | /* For all registers, find all blocks in which they are set. |
450 | ||
451 | This is the transform of what would be local kill information that | |
452 | we ought to be getting from flow. */ | |
453 | ||
454 | static sbitmap *fe_evals; | |
455 | static int fe_current_bb; | |
456 | ||
457 | static void | |
458 | find_evaluations_1 (dest, set, data) | |
459 | rtx dest; | |
460 | rtx set ATTRIBUTE_UNUSED; | |
461 | void *data ATTRIBUTE_UNUSED; | |
462 | { | |
463 | if (GET_CODE (dest) == REG | |
cdbca172 JO |
464 | && CONVERT_REGISTER_TO_SSA_P (REGNO (dest))) |
465 | SET_BIT (fe_evals[REGNO (dest)], fe_current_bb); | |
d9d4fb43 AS |
466 | } |
467 | ||
468 | static void | |
469 | find_evaluations (evals, nregs) | |
470 | sbitmap *evals; | |
471 | int nregs; | |
472 | { | |
473 | int bb; | |
474 | ||
475 | sbitmap_vector_zero (evals, nregs); | |
476 | fe_evals = evals; | |
477 | ||
478 | for (bb = n_basic_blocks; --bb >= 0; ) | |
479 | { | |
480 | rtx p, last; | |
481 | ||
482 | fe_current_bb = bb; | |
483 | p = BLOCK_HEAD (bb); | |
484 | last = BLOCK_END (bb); | |
485 | while (1) | |
486 | { | |
2c3c49de | 487 | if (INSN_P (p)) |
d9d4fb43 AS |
488 | note_stores (PATTERN (p), find_evaluations_1, NULL); |
489 | ||
490 | if (p == last) | |
491 | break; | |
492 | p = NEXT_INSN (p); | |
493 | } | |
494 | } | |
495 | } | |
496 | ||
d9d4fb43 AS |
497 | /* Computing the Dominance Frontier: |
498 | ||
499 | As decribed in Morgan, section 3.5, this may be done simply by | |
500 | walking the dominator tree bottom-up, computing the frontier for | |
501 | the children before the parent. When considering a block B, | |
502 | there are two cases: | |
503 | ||
504 | (1) A flow graph edge leaving B that does not lead to a child | |
505 | of B in the dominator tree must be a block that is either equal | |
506 | to B or not dominated by B. Such blocks belong in the frontier | |
507 | of B. | |
508 | ||
509 | (2) Consider a block X in the frontier of one of the children C | |
510 | of B. If X is not equal to B and is not dominated by B, it | |
511 | is in the frontier of B. | |
512 | */ | |
513 | ||
514 | static void | |
515 | compute_dominance_frontiers_1 (frontiers, idom, bb, done) | |
516 | sbitmap *frontiers; | |
517 | int *idom; | |
518 | int bb; | |
519 | sbitmap done; | |
520 | { | |
521 | basic_block b = BASIC_BLOCK (bb); | |
522 | edge e; | |
523 | int c; | |
524 | ||
525 | SET_BIT (done, bb); | |
526 | sbitmap_zero (frontiers[bb]); | |
527 | ||
528 | /* Do the frontier of the children first. Not all children in the | |
529 | dominator tree (blocks dominated by this one) are children in the | |
530 | CFG, so check all blocks. */ | |
531 | for (c = 0; c < n_basic_blocks; ++c) | |
532 | if (idom[c] == bb && ! TEST_BIT (done, c)) | |
533 | compute_dominance_frontiers_1 (frontiers, idom, c, done); | |
534 | ||
535 | /* Find blocks conforming to rule (1) above. */ | |
536 | for (e = b->succ; e; e = e->succ_next) | |
537 | { | |
538 | if (e->dest == EXIT_BLOCK_PTR) | |
539 | continue; | |
540 | if (idom[e->dest->index] != bb) | |
541 | SET_BIT (frontiers[bb], e->dest->index); | |
542 | } | |
543 | ||
544 | /* Find blocks conforming to rule (2). */ | |
545 | for (c = 0; c < n_basic_blocks; ++c) | |
546 | if (idom[c] == bb) | |
547 | { | |
548 | int x; | |
549 | EXECUTE_IF_SET_IN_SBITMAP (frontiers[c], 0, x, | |
550 | { | |
551 | if (idom[x] != bb) | |
552 | SET_BIT (frontiers[bb], x); | |
553 | }); | |
554 | } | |
555 | } | |
556 | ||
316dcdf6 | 557 | void |
d9d4fb43 AS |
558 | compute_dominance_frontiers (frontiers, idom) |
559 | sbitmap *frontiers; | |
560 | int *idom; | |
561 | { | |
562 | sbitmap done = sbitmap_alloc (n_basic_blocks); | |
563 | sbitmap_zero (done); | |
564 | ||
565 | compute_dominance_frontiers_1 (frontiers, idom, 0, done); | |
566 | ||
567 | sbitmap_free (done); | |
568 | } | |
569 | ||
d9d4fb43 AS |
570 | /* Computing the Iterated Dominance Frontier: |
571 | ||
572 | This is the set of merge points for a given register. | |
573 | ||
574 | This is not particularly intuitive. See section 7.1 of Morgan, in | |
575 | particular figures 7.3 and 7.4 and the immediately surrounding text. | |
576 | */ | |
577 | ||
578 | static void | |
579 | compute_iterated_dominance_frontiers (idfs, frontiers, evals, nregs) | |
580 | sbitmap *idfs; | |
581 | sbitmap *frontiers; | |
582 | sbitmap *evals; | |
583 | int nregs; | |
584 | { | |
585 | sbitmap worklist; | |
586 | int reg, passes = 0; | |
587 | ||
588 | worklist = sbitmap_alloc (n_basic_blocks); | |
589 | ||
590 | for (reg = 0; reg < nregs; ++reg) | |
591 | { | |
592 | sbitmap idf = idfs[reg]; | |
593 | int b, changed; | |
594 | ||
595 | /* Start the iterative process by considering those blocks that | |
596 | evaluate REG. We'll add their dominance frontiers to the | |
597 | IDF, and then consider the blocks we just added. */ | |
598 | sbitmap_copy (worklist, evals[reg]); | |
599 | ||
600 | /* Morgan's algorithm is incorrect here. Blocks that evaluate | |
601 | REG aren't necessarily in REG's IDF. Start with an empty IDF. */ | |
602 | sbitmap_zero (idf); | |
603 | ||
604 | /* Iterate until the worklist is empty. */ | |
605 | do | |
606 | { | |
607 | changed = 0; | |
608 | passes++; | |
609 | EXECUTE_IF_SET_IN_SBITMAP (worklist, 0, b, | |
610 | { | |
611 | RESET_BIT (worklist, b); | |
612 | /* For each block on the worklist, add to the IDF all | |
613 | blocks on its dominance frontier that aren't already | |
614 | on the IDF. Every block that's added is also added | |
615 | to the worklist. */ | |
616 | sbitmap_union_of_diff (worklist, worklist, frontiers[b], idf); | |
617 | sbitmap_a_or_b (idf, idf, frontiers[b]); | |
618 | changed = 1; | |
619 | }); | |
620 | } | |
621 | while (changed); | |
622 | } | |
623 | ||
624 | sbitmap_free (worklist); | |
625 | ||
626 | if (rtl_dump_file) | |
627 | { | |
628 | fprintf(rtl_dump_file, | |
629 | "Iterated dominance frontier: %d passes on %d regs.\n", | |
630 | passes, nregs); | |
631 | } | |
632 | } | |
633 | ||
d9d4fb43 AS |
634 | /* Insert the phi nodes. */ |
635 | ||
636 | static void | |
637 | insert_phi_node (regno, bb) | |
638 | int regno, bb; | |
639 | { | |
640 | basic_block b = BASIC_BLOCK (bb); | |
641 | edge e; | |
642 | int npred, i; | |
643 | rtvec vec; | |
644 | rtx phi, reg; | |
589ca5cb MM |
645 | rtx insn; |
646 | int end_p; | |
d9d4fb43 AS |
647 | |
648 | /* Find out how many predecessors there are. */ | |
649 | for (e = b->pred, npred = 0; e; e = e->pred_next) | |
650 | if (e->src != ENTRY_BLOCK_PTR) | |
651 | npred++; | |
652 | ||
653 | /* If this block has no "interesting" preds, then there is nothing to | |
654 | do. Consider a block that only has the entry block as a pred. */ | |
655 | if (npred == 0) | |
656 | return; | |
657 | ||
cdbca172 JO |
658 | /* This is the register to which the phi function will be assigned. */ |
659 | reg = regno_reg_rtx[regno]; | |
d9d4fb43 AS |
660 | |
661 | /* Construct the arguments to the PHI node. The use of pc_rtx is just | |
662 | a placeholder; we'll insert the proper value in rename_registers. */ | |
663 | vec = rtvec_alloc (npred * 2); | |
664 | for (e = b->pred, i = 0; e ; e = e->pred_next, i += 2) | |
665 | if (e->src != ENTRY_BLOCK_PTR) | |
666 | { | |
667 | RTVEC_ELT (vec, i + 0) = pc_rtx; | |
668 | RTVEC_ELT (vec, i + 1) = GEN_INT (e->src->index); | |
669 | } | |
670 | ||
671 | phi = gen_rtx_PHI (VOIDmode, vec); | |
672 | phi = gen_rtx_SET (VOIDmode, reg, phi); | |
673 | ||
589ca5cb MM |
674 | insn = first_insn_after_basic_block_note (b); |
675 | end_p = PREV_INSN (insn) == b->end; | |
676 | emit_insn_before (phi, insn); | |
677 | if (end_p) | |
678 | b->end = PREV_INSN (insn); | |
d9d4fb43 AS |
679 | } |
680 | ||
d9d4fb43 AS |
681 | static void |
682 | insert_phi_nodes (idfs, evals, nregs) | |
683 | sbitmap *idfs; | |
684 | sbitmap *evals ATTRIBUTE_UNUSED; | |
685 | int nregs; | |
686 | { | |
687 | int reg; | |
688 | ||
689 | for (reg = 0; reg < nregs; ++reg) | |
cdbca172 | 690 | if (CONVERT_REGISTER_TO_SSA_P (reg)) |
d9d4fb43 AS |
691 | { |
692 | int b; | |
693 | EXECUTE_IF_SET_IN_SBITMAP (idfs[reg], 0, b, | |
694 | { | |
cdbca172 | 695 | if (REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, reg)) |
d9d4fb43 AS |
696 | insert_phi_node (reg, b); |
697 | }); | |
698 | } | |
699 | } | |
700 | ||
701 | /* Rename the registers to conform to SSA. | |
702 | ||
703 | This is essentially the algorithm presented in Figure 7.8 of Morgan, | |
704 | with a few changes to reduce pattern search time in favour of a bit | |
705 | more memory usage. */ | |
706 | ||
d9d4fb43 AS |
707 | /* One of these is created for each set. It will live in a list local |
708 | to its basic block for the duration of that block's processing. */ | |
709 | struct rename_set_data | |
710 | { | |
711 | struct rename_set_data *next; | |
5397b155 | 712 | /* This is the SET_DEST of the (first) SET that sets the REG. */ |
d9d4fb43 | 713 | rtx *reg_loc; |
5397b155 GK |
714 | /* This is what used to be at *REG_LOC. */ |
715 | rtx old_reg; | |
716 | /* This is the REG that will replace OLD_REG. It's set only | |
717 | when the rename data is moved onto the DONE_RENAMES queue. */ | |
d9d4fb43 | 718 | rtx new_reg; |
cdbca172 JO |
719 | /* This is what to restore ssa_rename_to_lookup (old_reg) to. It is |
720 | usually the previous contents of ssa_rename_to_lookup (old_reg). */ | |
d9d4fb43 | 721 | rtx prev_reg; |
5397b155 | 722 | /* This is the insn that contains all the SETs of the REG. */ |
4e872036 AS |
723 | rtx set_insn; |
724 | }; | |
725 | ||
726 | /* This struct is used to pass information to callback functions while | |
727 | renaming registers. */ | |
728 | struct rename_context | |
729 | { | |
5397b155 GK |
730 | struct rename_set_data *new_renames; |
731 | struct rename_set_data *done_renames; | |
4e872036 | 732 | rtx current_insn; |
d9d4fb43 AS |
733 | }; |
734 | ||
5397b155 GK |
735 | /* Queue the rename of *REG_LOC. */ |
736 | static void | |
737 | create_delayed_rename (c, reg_loc) | |
738 | struct rename_context *c; | |
739 | rtx *reg_loc; | |
740 | { | |
741 | struct rename_set_data *r; | |
742 | r = (struct rename_set_data *) xmalloc (sizeof(*r)); | |
743 | ||
744 | if (GET_CODE (*reg_loc) != REG | |
cdbca172 | 745 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*reg_loc))) |
5397b155 GK |
746 | abort(); |
747 | ||
748 | r->reg_loc = reg_loc; | |
749 | r->old_reg = *reg_loc; | |
cdbca172 | 750 | r->prev_reg = ssa_rename_to_lookup(r->old_reg); |
5397b155 GK |
751 | r->set_insn = c->current_insn; |
752 | r->next = c->new_renames; | |
753 | c->new_renames = r; | |
754 | } | |
d9d4fb43 AS |
755 | |
756 | /* This is part of a rather ugly hack to allow the pre-ssa regno to be | |
757 | reused. If, during processing, a register has not yet been touched, | |
cdbca172 | 758 | ssa_rename_to[regno][machno] will be NULL. Now, in the course of pushing |
d9d4fb43 AS |
759 | and popping values from ssa_rename_to, when we would ordinarily |
760 | pop NULL back in, we pop RENAME_NO_RTX. We treat this exactly the | |
761 | same as NULL, except that it signals that the original regno has | |
762 | already been reused. */ | |
763 | #define RENAME_NO_RTX pc_rtx | |
764 | ||
5397b155 GK |
765 | /* Move all the entries from NEW_RENAMES onto DONE_RENAMES by |
766 | applying all the renames on NEW_RENAMES. */ | |
767 | ||
768 | static void | |
769 | apply_delayed_renames (c) | |
770 | struct rename_context *c; | |
771 | { | |
772 | struct rename_set_data *r; | |
773 | struct rename_set_data *last_r = NULL; | |
cdbca172 | 774 | |
5397b155 GK |
775 | for (r = c->new_renames; r != NULL; r = r->next) |
776 | { | |
5397b155 GK |
777 | int new_regno; |
778 | ||
779 | /* Failure here means that someone has a PARALLEL that sets | |
780 | a register twice (bad!). */ | |
cdbca172 | 781 | if (ssa_rename_to_lookup (r->old_reg) != r->prev_reg) |
5397b155 GK |
782 | abort(); |
783 | /* Failure here means we have changed REG_LOC before applying | |
784 | the rename. */ | |
785 | /* For the first set we come across, reuse the original regno. */ | |
cdbca172 | 786 | if (r->prev_reg == NULL_RTX && !HARD_REGISTER_P (r->old_reg)) |
5397b155 GK |
787 | { |
788 | r->new_reg = r->old_reg; | |
2d76cb1a | 789 | /* We want to restore RENAME_NO_RTX rather than NULL_RTX. */ |
5397b155 GK |
790 | r->prev_reg = RENAME_NO_RTX; |
791 | } | |
792 | else | |
793 | r->new_reg = gen_reg_rtx (GET_MODE (r->old_reg)); | |
794 | new_regno = REGNO (r->new_reg); | |
cdbca172 | 795 | ssa_rename_to_insert (r->old_reg, r->new_reg); |
5397b155 GK |
796 | |
797 | if (new_regno >= (int) ssa_definition->num_elements) | |
798 | { | |
799 | int new_limit = new_regno * 5 / 4; | |
8f54374e | 800 | VARRAY_GROW (ssa_definition, new_limit); |
5397b155 GK |
801 | } |
802 | ||
803 | VARRAY_RTX (ssa_definition, new_regno) = r->set_insn; | |
cdbca172 | 804 | ssa_rename_from_insert (new_regno, r->old_reg); |
5397b155 GK |
805 | last_r = r; |
806 | } | |
807 | if (last_r != NULL) | |
808 | { | |
809 | last_r->next = c->done_renames; | |
810 | c->done_renames = c->new_renames; | |
811 | c->new_renames = NULL; | |
812 | } | |
813 | } | |
814 | ||
d9d4fb43 AS |
815 | /* Part one of the first step of rename_block, called through for_each_rtx. |
816 | Mark pseudos that are set for later update. Transform uses of pseudos. */ | |
817 | ||
818 | static int | |
819 | rename_insn_1 (ptr, data) | |
820 | rtx *ptr; | |
821 | void *data; | |
822 | { | |
823 | rtx x = *ptr; | |
4e872036 | 824 | struct rename_context *context = data; |
d9d4fb43 AS |
825 | |
826 | if (x == NULL_RTX) | |
827 | return 0; | |
828 | ||
829 | switch (GET_CODE (x)) | |
830 | { | |
831 | case SET: | |
832 | { | |
833 | rtx *destp = &SET_DEST (x); | |
834 | rtx dest = SET_DEST (x); | |
835 | ||
ea0eceb1 JL |
836 | /* An assignment to a paradoxical SUBREG does not read from |
837 | the destination operand, and thus does not need to be | |
838 | wrapped into a SEQUENCE when translating into SSA form. | |
839 | We merely strip off the SUBREG and proceed normally for | |
840 | this case. */ | |
841 | if (GET_CODE (dest) == SUBREG | |
842 | && (GET_MODE_SIZE (GET_MODE (dest)) | |
843 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) | |
844 | && GET_CODE (SUBREG_REG (dest)) == REG | |
845 | && CONVERT_REGISTER_TO_SSA_P (REGNO (SUBREG_REG (dest)))) | |
846 | { | |
847 | destp = &XEXP (dest, 0); | |
848 | dest = XEXP (dest, 0); | |
849 | } | |
850 | ||
5397b155 GK |
851 | /* Some SETs also use the REG specified in their LHS. |
852 | These can be detected by the presence of | |
853 | STRICT_LOW_PART, SUBREG, SIGN_EXTRACT, and ZERO_EXTRACT | |
854 | in the LHS. Handle these by changing | |
855 | (set (subreg (reg foo)) ...) | |
856 | into | |
857 | (sequence [(set (reg foo_1) (reg foo)) | |
858 | (set (subreg (reg foo_1)) ...)]) | |
859 | ||
ea0eceb1 JL |
860 | FIXME: Much of the time this is too much. For some constructs |
861 | we know that the output register is strictly an output | |
862 | (paradoxical SUBREGs and some libcalls for example). | |
863 | ||
864 | For those cases we are better off not making the false | |
5397b155 | 865 | dependency. */ |
5397b155 GK |
866 | if (GET_CODE (dest) == STRICT_LOW_PART |
867 | || GET_CODE (dest) == SUBREG | |
868 | || GET_CODE (dest) == SIGN_EXTRACT | |
869 | || GET_CODE (dest) == ZERO_EXTRACT) | |
d9d4fb43 | 870 | { |
5397b155 GK |
871 | rtx i, reg; |
872 | reg = dest; | |
873 | ||
874 | while (GET_CODE (reg) == STRICT_LOW_PART | |
875 | || GET_CODE (reg) == SUBREG | |
876 | || GET_CODE (reg) == SIGN_EXTRACT | |
877 | || GET_CODE (reg) == ZERO_EXTRACT) | |
878 | reg = XEXP (reg, 0); | |
879 | ||
880 | if (GET_CODE (reg) == REG | |
cdbca172 | 881 | && CONVERT_REGISTER_TO_SSA_P (REGNO (reg))) |
5397b155 GK |
882 | { |
883 | /* Generate (set reg reg), and do renaming on it so | |
884 | that it becomes (set reg_1 reg_0), and we will | |
885 | replace reg with reg_1 in the SUBREG. */ | |
886 | ||
887 | struct rename_set_data *saved_new_renames; | |
888 | saved_new_renames = context->new_renames; | |
889 | context->new_renames = NULL; | |
890 | i = emit_insn (gen_rtx_SET (VOIDmode, reg, reg)); | |
891 | for_each_rtx (&i, rename_insn_1, data); | |
892 | apply_delayed_renames (context); | |
893 | context->new_renames = saved_new_renames; | |
894 | } | |
d9d4fb43 | 895 | } |
ea0eceb1 JL |
896 | else if (GET_CODE (dest) == REG |
897 | && CONVERT_REGISTER_TO_SSA_P (REGNO (dest))) | |
d9d4fb43 AS |
898 | { |
899 | /* We found a genuine set of an interesting register. Tag | |
900 | it so that we can create a new name for it after we finish | |
901 | processing this insn. */ | |
902 | ||
5397b155 | 903 | create_delayed_rename (context, destp); |
d9d4fb43 AS |
904 | |
905 | /* Since we do not wish to (directly) traverse the | |
906 | SET_DEST, recurse through for_each_rtx for the SET_SRC | |
907 | and return. */ | |
5397b155 GK |
908 | if (GET_CODE (x) == SET) |
909 | for_each_rtx (&SET_SRC (x), rename_insn_1, data); | |
d9d4fb43 AS |
910 | return -1; |
911 | } | |
912 | ||
913 | /* Otherwise, this was not an interesting destination. Continue | |
914 | on, marking uses as normal. */ | |
915 | return 0; | |
916 | } | |
917 | ||
918 | case REG: | |
cdbca172 JO |
919 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (x)) && |
920 | REGNO (x) < ssa_max_reg_num) | |
d9d4fb43 | 921 | { |
cdbca172 | 922 | rtx new_reg = ssa_rename_to_lookup (x); |
d9d4fb43 AS |
923 | |
924 | if (new_reg != NULL_RTX && new_reg != RENAME_NO_RTX) | |
925 | { | |
926 | if (GET_MODE (x) != GET_MODE (new_reg)) | |
927 | abort (); | |
928 | *ptr = new_reg; | |
d9d4fb43 AS |
929 | } |
930 | /* Else this is a use before a set. Warn? */ | |
931 | } | |
932 | return -1; | |
933 | ||
cdbca172 JO |
934 | case CLOBBER: |
935 | /* There is considerable debate on how CLOBBERs ought to be | |
936 | handled in SSA. For now, we're keeping the CLOBBERs, which | |
937 | means that we don't really have SSA form. There are a couple | |
938 | of proposals for how to fix this problem, but neither is | |
939 | implemented yet. */ | |
940 | { | |
941 | rtx dest = XCEXP (x, 0, CLOBBER); | |
942 | if (REG_P (dest)) | |
943 | { | |
944 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (dest)) | |
945 | && REGNO (dest) < ssa_max_reg_num) | |
946 | { | |
947 | rtx new_reg = ssa_rename_to_lookup (dest); | |
948 | if (new_reg != NULL_RTX && new_reg != RENAME_NO_RTX) | |
949 | XCEXP (x, 0, CLOBBER) = new_reg; | |
950 | } | |
951 | /* Stop traversing. */ | |
952 | return -1; | |
953 | } | |
954 | else | |
955 | /* Continue traversing. */ | |
956 | return 0; | |
957 | } | |
958 | ||
d9d4fb43 AS |
959 | case PHI: |
960 | /* Never muck with the phi. We do that elsewhere, special-like. */ | |
961 | return -1; | |
962 | ||
963 | default: | |
964 | /* Anything else, continue traversing. */ | |
965 | return 0; | |
966 | } | |
967 | } | |
968 | ||
d9d4fb43 AS |
969 | static void |
970 | rename_block (bb, idom) | |
971 | int bb; | |
972 | int *idom; | |
973 | { | |
974 | basic_block b = BASIC_BLOCK (bb); | |
975 | edge e; | |
976 | rtx insn, next, last; | |
977 | struct rename_set_data *set_data = NULL; | |
978 | int c; | |
979 | ||
980 | /* Step One: Walk the basic block, adding new names for sets and | |
981 | replacing uses. */ | |
982 | ||
983 | next = b->head; | |
984 | last = b->end; | |
985 | do | |
986 | { | |
987 | insn = next; | |
2c3c49de | 988 | if (INSN_P (insn)) |
d9d4fb43 | 989 | { |
4e872036 | 990 | struct rename_context context; |
5397b155 GK |
991 | context.done_renames = set_data; |
992 | context.new_renames = NULL; | |
4e872036 | 993 | context.current_insn = insn; |
d9d4fb43 | 994 | |
5397b155 | 995 | start_sequence (); |
4e872036 AS |
996 | for_each_rtx (&PATTERN (insn), rename_insn_1, &context); |
997 | for_each_rtx (®_NOTES (insn), rename_insn_1, &context); | |
5397b155 GK |
998 | |
999 | /* Sometimes, we end up with a sequence of insns that | |
1000 | SSA needs to treat as a single insn. Wrap these in a | |
1001 | SEQUENCE. (Any notes now get attached to the SEQUENCE, | |
1002 | not to the old version inner insn.) */ | |
1003 | if (get_insns () != NULL_RTX) | |
1004 | { | |
7e1b6513 | 1005 | rtx seq; |
5397b155 GK |
1006 | int i; |
1007 | ||
1008 | emit (PATTERN (insn)); | |
7e1b6513 GK |
1009 | seq = gen_sequence (); |
1010 | /* We really want a SEQUENCE of SETs, not a SEQUENCE | |
1011 | of INSNs. */ | |
1012 | for (i = 0; i < XVECLEN (seq, 0); i++) | |
1013 | XVECEXP (seq, 0, i) = PATTERN (XVECEXP (seq, 0, i)); | |
1014 | PATTERN (insn) = seq; | |
5397b155 GK |
1015 | } |
1016 | end_sequence (); | |
d9d4fb43 | 1017 | |
5397b155 GK |
1018 | apply_delayed_renames (&context); |
1019 | set_data = context.done_renames; | |
d9d4fb43 AS |
1020 | } |
1021 | ||
1022 | next = NEXT_INSN (insn); | |
1023 | } | |
1024 | while (insn != last); | |
1025 | ||
1026 | /* Step Two: Update the phi nodes of this block's successors. */ | |
1027 | ||
1028 | for (e = b->succ; e; e = e->succ_next) | |
1029 | { | |
1030 | if (e->dest == EXIT_BLOCK_PTR) | |
1031 | continue; | |
1032 | ||
589ca5cb | 1033 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1034 | |
1035 | while (PHI_NODE_P (insn)) | |
1036 | { | |
1037 | rtx phi = PATTERN (insn); | |
d9d4fb43 AS |
1038 | rtx reg; |
1039 | ||
1040 | /* Find out which of our outgoing registers this node is | |
cdbca172 | 1041 | intended to replace. Note that if this is not the first PHI |
d9d4fb43 AS |
1042 | node to have been created for this register, we have to |
1043 | jump through rename links to figure out which register | |
1044 | we're talking about. This can easily be recognized by | |
1045 | noting that the regno is new to this pass. */ | |
cdbca172 JO |
1046 | reg = SET_DEST (phi); |
1047 | if (REGNO (reg) >= ssa_max_reg_num) | |
1048 | reg = ssa_rename_from_lookup (REGNO (reg)); | |
3db35af4 MM |
1049 | if (reg == NULL_RTX) |
1050 | abort (); | |
cdbca172 | 1051 | reg = ssa_rename_to_lookup (reg); |
d9d4fb43 AS |
1052 | |
1053 | /* It is possible for the variable to be uninitialized on | |
1054 | edges in. Reduce the arity of the PHI so that we don't | |
1055 | consider those edges. */ | |
1056 | if (reg == NULL || reg == RENAME_NO_RTX) | |
1057 | { | |
5e93ca86 | 1058 | if (! remove_phi_alternative (phi, b)) |
d9d4fb43 AS |
1059 | abort (); |
1060 | } | |
1061 | else | |
1062 | { | |
1063 | /* When we created the PHI nodes, we did not know what mode | |
1064 | the register should be. Now that we've found an original, | |
1065 | we can fill that in. */ | |
1066 | if (GET_MODE (SET_DEST (phi)) == VOIDmode) | |
1067 | PUT_MODE (SET_DEST (phi), GET_MODE (reg)); | |
1068 | else if (GET_MODE (SET_DEST (phi)) != GET_MODE (reg)) | |
1069 | abort(); | |
1070 | ||
1071 | *phi_alternative (phi, bb) = reg; | |
d9d4fb43 AS |
1072 | } |
1073 | ||
1074 | insn = NEXT_INSN (insn); | |
1075 | } | |
1076 | } | |
1077 | ||
1078 | /* Step Three: Do the same to the children of this block in | |
1079 | dominator order. */ | |
1080 | ||
1081 | for (c = 0; c < n_basic_blocks; ++c) | |
1082 | if (idom[c] == bb) | |
1083 | rename_block (c, idom); | |
1084 | ||
5397b155 GK |
1085 | /* Step Four: Update the sets to refer to their new register, |
1086 | and restore ssa_rename_to to its previous state. */ | |
d9d4fb43 AS |
1087 | |
1088 | while (set_data) | |
1089 | { | |
1090 | struct rename_set_data *next; | |
4e872036 AS |
1091 | rtx old_reg = *set_data->reg_loc; |
1092 | ||
5397b155 GK |
1093 | if (*set_data->reg_loc != set_data->old_reg) |
1094 | abort(); | |
d9d4fb43 | 1095 | *set_data->reg_loc = set_data->new_reg; |
5397b155 | 1096 | |
cdbca172 | 1097 | ssa_rename_to_insert (old_reg, set_data->prev_reg); |
d9d4fb43 AS |
1098 | |
1099 | next = set_data->next; | |
1100 | free (set_data); | |
1101 | set_data = next; | |
1102 | } | |
1103 | } | |
1104 | ||
1105 | static void | |
1106 | rename_registers (nregs, idom) | |
1107 | int nregs; | |
1108 | int *idom; | |
1109 | { | |
1110 | VARRAY_RTX_INIT (ssa_definition, nregs * 3, "ssa_definition"); | |
cdbca172 | 1111 | ssa_rename_from_initialize (); |
d9d4fb43 | 1112 | |
cdbca172 | 1113 | ssa_rename_to_pseudo = (rtx *) alloca (nregs * sizeof(rtx)); |
961192e1 JM |
1114 | memset ((char *) ssa_rename_to_pseudo, 0, nregs * sizeof(rtx)); |
1115 | memset ((char *) ssa_rename_to_hard, 0, | |
cdbca172 | 1116 | FIRST_PSEUDO_REGISTER * NUM_MACHINE_MODES * sizeof (rtx)); |
d9d4fb43 AS |
1117 | |
1118 | rename_block (0, idom); | |
1119 | ||
1120 | /* ??? Update basic_block_live_at_start, and other flow info | |
1121 | as needed. */ | |
1122 | ||
cdbca172 | 1123 | ssa_rename_to_pseudo = NULL; |
d9d4fb43 AS |
1124 | } |
1125 | ||
d9d4fb43 AS |
1126 | /* The main entry point for moving to SSA. */ |
1127 | ||
1128 | void | |
cdbca172 | 1129 | convert_to_ssa () |
d9d4fb43 AS |
1130 | { |
1131 | /* Element I is the set of blocks that set register I. */ | |
1132 | sbitmap *evals; | |
1133 | ||
1134 | /* Dominator bitmaps. */ | |
d9d4fb43 AS |
1135 | sbitmap *dfs; |
1136 | sbitmap *idfs; | |
1137 | ||
1138 | /* Element I is the immediate dominator of block I. */ | |
1139 | int *idom; | |
1140 | ||
1141 | int nregs; | |
1142 | ||
4e872036 AS |
1143 | /* Don't do it twice. */ |
1144 | if (in_ssa_form) | |
1145 | abort (); | |
1146 | ||
fd9305ef JL |
1147 | /* Need global_live_at_{start,end} up to date. Do not remove any |
1148 | dead code. We'll let the SSA optimizers do that. */ | |
1149 | life_analysis (get_insns (), NULL, 0); | |
d9d4fb43 | 1150 | |
d9d4fb43 AS |
1151 | idom = (int *) alloca (n_basic_blocks * sizeof (int)); |
1152 | memset ((void *)idom, -1, (size_t)n_basic_blocks * sizeof (int)); | |
f8032688 | 1153 | calculate_dominance_info (idom, NULL, CDI_DOMINATORS); |
d9d4fb43 AS |
1154 | |
1155 | if (rtl_dump_file) | |
1156 | { | |
1157 | int i; | |
1158 | fputs (";; Immediate Dominators:\n", rtl_dump_file); | |
1159 | for (i = 0; i < n_basic_blocks; ++i) | |
1160 | fprintf (rtl_dump_file, ";\t%3d = %3d\n", i, idom[i]); | |
1161 | fflush (rtl_dump_file); | |
1162 | } | |
1163 | ||
1164 | /* Compute dominance frontiers. */ | |
1165 | ||
1166 | dfs = sbitmap_vector_alloc (n_basic_blocks, n_basic_blocks); | |
1167 | compute_dominance_frontiers (dfs, idom); | |
1168 | ||
1169 | if (rtl_dump_file) | |
1170 | { | |
1171 | dump_sbitmap_vector (rtl_dump_file, ";; Dominance Frontiers:", | |
1172 | "; Basic Block", dfs, n_basic_blocks); | |
1173 | fflush (rtl_dump_file); | |
1174 | } | |
1175 | ||
1176 | /* Compute register evaluations. */ | |
1177 | ||
1178 | ssa_max_reg_num = max_reg_num(); | |
cdbca172 | 1179 | nregs = ssa_max_reg_num; |
d9d4fb43 AS |
1180 | evals = sbitmap_vector_alloc (nregs, n_basic_blocks); |
1181 | find_evaluations (evals, nregs); | |
1182 | ||
1183 | /* Compute the iterated dominance frontier for each register. */ | |
1184 | ||
1185 | idfs = sbitmap_vector_alloc (nregs, n_basic_blocks); | |
1186 | compute_iterated_dominance_frontiers (idfs, dfs, evals, nregs); | |
1187 | ||
1188 | if (rtl_dump_file) | |
1189 | { | |
1190 | dump_sbitmap_vector (rtl_dump_file, ";; Iterated Dominance Frontiers:", | |
cdbca172 | 1191 | "; Register", idfs, nregs); |
d9d4fb43 AS |
1192 | fflush (rtl_dump_file); |
1193 | } | |
1194 | ||
1195 | /* Insert the phi nodes. */ | |
1196 | ||
1197 | insert_phi_nodes (idfs, evals, nregs); | |
1198 | ||
1199 | /* Rename the registers to satisfy SSA. */ | |
1200 | ||
1201 | rename_registers (nregs, idom); | |
1202 | ||
1203 | /* All done! Clean up and go home. */ | |
1204 | ||
1205 | sbitmap_vector_free (dfs); | |
1206 | sbitmap_vector_free (evals); | |
1207 | sbitmap_vector_free (idfs); | |
4e872036 | 1208 | in_ssa_form = 1; |
d9d4fb43 | 1209 | |
4e872036 | 1210 | reg_scan (get_insns (), max_reg_num (), 1); |
4e872036 | 1211 | } |
d9d4fb43 | 1212 | |
d9d4fb43 AS |
1213 | /* REG is the representative temporary of its partition. Add it to the |
1214 | set of nodes to be processed, if it hasn't been already. Return the | |
1215 | index of this register in the node set. */ | |
1216 | ||
1217 | static inline int | |
1218 | ephi_add_node (reg, nodes, n_nodes) | |
1219 | rtx reg, *nodes; | |
1220 | int *n_nodes; | |
1221 | { | |
1222 | int i; | |
1223 | for (i = *n_nodes - 1; i >= 0; --i) | |
1224 | if (REGNO (reg) == REGNO (nodes[i])) | |
1225 | return i; | |
1226 | ||
1227 | nodes[i = (*n_nodes)++] = reg; | |
1228 | return i; | |
1229 | } | |
1230 | ||
1231 | /* Part one of the topological sort. This is a forward (downward) search | |
1232 | through the graph collecting a stack of nodes to process. Assuming no | |
1233 | cycles, the nodes at top of the stack when we are finished will have | |
1234 | no other dependancies. */ | |
1235 | ||
1236 | static int * | |
1237 | ephi_forward (t, visited, succ, tstack) | |
1238 | int t; | |
1239 | sbitmap visited; | |
1240 | sbitmap *succ; | |
1241 | int *tstack; | |
1242 | { | |
1243 | int s; | |
1244 | ||
1245 | SET_BIT (visited, t); | |
1246 | ||
1247 | EXECUTE_IF_SET_IN_SBITMAP (succ[t], 0, s, | |
1248 | { | |
1249 | if (! TEST_BIT (visited, s)) | |
1250 | tstack = ephi_forward (s, visited, succ, tstack); | |
1251 | }); | |
1252 | ||
1253 | *tstack++ = t; | |
1254 | return tstack; | |
1255 | } | |
1256 | ||
1257 | /* Part two of the topological sort. The is a backward search through | |
1258 | a cycle in the graph, copying the data forward as we go. */ | |
1259 | ||
1260 | static void | |
1261 | ephi_backward (t, visited, pred, nodes) | |
1262 | int t; | |
1263 | sbitmap visited, *pred; | |
1264 | rtx *nodes; | |
1265 | { | |
1266 | int p; | |
1267 | ||
1268 | SET_BIT (visited, t); | |
1269 | ||
1270 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1271 | { | |
1272 | if (! TEST_BIT (visited, p)) | |
1273 | { | |
1274 | ephi_backward (p, visited, pred, nodes); | |
1275 | emit_move_insn (nodes[p], nodes[t]); | |
1276 | } | |
1277 | }); | |
1278 | } | |
1279 | ||
1280 | /* Part two of the topological sort. Create the copy for a register | |
1281 | and any cycle of which it is a member. */ | |
1282 | ||
1283 | static void | |
1284 | ephi_create (t, visited, pred, succ, nodes) | |
1285 | int t; | |
1286 | sbitmap visited, *pred, *succ; | |
1287 | rtx *nodes; | |
1288 | { | |
1289 | rtx reg_u = NULL_RTX; | |
1290 | int unvisited_predecessors = 0; | |
1291 | int p; | |
1292 | ||
1293 | /* Iterate through the predecessor list looking for unvisited nodes. | |
1294 | If there are any, we have a cycle, and must deal with that. At | |
1295 | the same time, look for a visited predecessor. If there is one, | |
1296 | we won't need to create a temporary. */ | |
1297 | ||
1298 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1299 | { | |
1300 | if (! TEST_BIT (visited, p)) | |
1301 | unvisited_predecessors = 1; | |
1302 | else if (!reg_u) | |
1303 | reg_u = nodes[p]; | |
1304 | }); | |
1305 | ||
1306 | if (unvisited_predecessors) | |
1307 | { | |
1308 | /* We found a cycle. Copy out one element of the ring (if necessary), | |
1309 | then traverse the ring copying as we go. */ | |
1310 | ||
1311 | if (!reg_u) | |
1312 | { | |
1313 | reg_u = gen_reg_rtx (GET_MODE (nodes[t])); | |
1314 | emit_move_insn (reg_u, nodes[t]); | |
1315 | } | |
1316 | ||
1317 | EXECUTE_IF_SET_IN_SBITMAP (pred[t], 0, p, | |
1318 | { | |
1319 | if (! TEST_BIT (visited, p)) | |
1320 | { | |
1321 | ephi_backward (p, visited, pred, nodes); | |
1322 | emit_move_insn (nodes[p], reg_u); | |
1323 | } | |
1324 | }); | |
1325 | } | |
1326 | else | |
1327 | { | |
1328 | /* No cycle. Just copy the value from a successor. */ | |
1329 | ||
1330 | int s; | |
1331 | EXECUTE_IF_SET_IN_SBITMAP (succ[t], 0, s, | |
1332 | { | |
1333 | SET_BIT (visited, t); | |
1334 | emit_move_insn (nodes[t], nodes[s]); | |
1335 | return; | |
1336 | }); | |
1337 | } | |
1338 | } | |
1339 | ||
1340 | /* Convert the edge to normal form. */ | |
1341 | ||
1342 | static void | |
1343 | eliminate_phi (e, reg_partition) | |
1344 | edge e; | |
1345 | partition reg_partition; | |
1346 | { | |
1347 | int n_nodes; | |
1348 | sbitmap *pred, *succ; | |
1349 | sbitmap visited; | |
1350 | rtx *nodes; | |
1351 | int *stack, *tstack; | |
1352 | rtx insn; | |
1353 | int i; | |
1354 | ||
1355 | /* Collect an upper bound on the number of registers needing processing. */ | |
1356 | ||
589ca5cb | 1357 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1358 | |
1359 | n_nodes = 0; | |
1360 | while (PHI_NODE_P (insn)) | |
1361 | { | |
1362 | insn = next_nonnote_insn (insn); | |
1363 | n_nodes += 2; | |
1364 | } | |
1365 | ||
1366 | if (n_nodes == 0) | |
1367 | return; | |
1368 | ||
1369 | /* Build the auxilliary graph R(B). | |
1370 | ||
1371 | The nodes of the graph are the members of the register partition | |
1372 | present in Phi(B). There is an edge from FIND(T0)->FIND(T1) for | |
1373 | each T0 = PHI(...,T1,...), where T1 is for the edge from block C. */ | |
1374 | ||
1375 | nodes = (rtx *) alloca (n_nodes * sizeof(rtx)); | |
1376 | pred = sbitmap_vector_alloc (n_nodes, n_nodes); | |
1377 | succ = sbitmap_vector_alloc (n_nodes, n_nodes); | |
1378 | sbitmap_vector_zero (pred, n_nodes); | |
1379 | sbitmap_vector_zero (succ, n_nodes); | |
1380 | ||
589ca5cb | 1381 | insn = first_insn_after_basic_block_note (e->dest); |
d9d4fb43 AS |
1382 | |
1383 | n_nodes = 0; | |
1384 | for (; PHI_NODE_P (insn); insn = next_nonnote_insn (insn)) | |
1385 | { | |
1386 | rtx* preg = phi_alternative (PATTERN (insn), e->src->index); | |
1387 | rtx tgt = SET_DEST (PATTERN (insn)); | |
1388 | rtx reg; | |
1389 | ||
1390 | /* There may be no phi alternative corresponding to this edge. | |
1391 | This indicates that the phi variable is undefined along this | |
1392 | edge. */ | |
1393 | if (preg == NULL) | |
1394 | continue; | |
1395 | reg = *preg; | |
1396 | ||
1397 | if (GET_CODE (reg) != REG || GET_CODE (tgt) != REG) | |
1398 | abort(); | |
1399 | ||
4e872036 AS |
1400 | reg = regno_reg_rtx[partition_find (reg_partition, REGNO (reg))]; |
1401 | tgt = regno_reg_rtx[partition_find (reg_partition, REGNO (tgt))]; | |
d9d4fb43 AS |
1402 | /* If the two registers are already in the same partition, |
1403 | nothing will need to be done. */ | |
4e872036 | 1404 | if (reg != tgt) |
d9d4fb43 AS |
1405 | { |
1406 | int ireg, itgt; | |
1407 | ||
1408 | ireg = ephi_add_node (reg, nodes, &n_nodes); | |
1409 | itgt = ephi_add_node (tgt, nodes, &n_nodes); | |
1410 | ||
1411 | SET_BIT (pred[ireg], itgt); | |
1412 | SET_BIT (succ[itgt], ireg); | |
1413 | } | |
1414 | } | |
1415 | ||
1416 | if (n_nodes == 0) | |
1417 | goto out; | |
1418 | ||
1419 | /* Begin a topological sort of the graph. */ | |
1420 | ||
1421 | visited = sbitmap_alloc (n_nodes); | |
1422 | sbitmap_zero (visited); | |
1423 | ||
1424 | tstack = stack = (int *) alloca (n_nodes * sizeof (int)); | |
1425 | ||
1426 | for (i = 0; i < n_nodes; ++i) | |
1427 | if (! TEST_BIT (visited, i)) | |
1428 | tstack = ephi_forward (i, visited, succ, tstack); | |
1429 | ||
1430 | sbitmap_zero (visited); | |
1431 | ||
1432 | /* As we find a solution to the tsort, collect the implementation | |
1433 | insns in a sequence. */ | |
1434 | start_sequence (); | |
1435 | ||
1436 | while (tstack != stack) | |
1437 | { | |
1438 | i = *--tstack; | |
1439 | if (! TEST_BIT (visited, i)) | |
1440 | ephi_create (i, visited, pred, succ, nodes); | |
1441 | } | |
1442 | ||
1443 | insn = gen_sequence (); | |
1444 | end_sequence (); | |
1445 | insert_insn_on_edge (insn, e); | |
1446 | if (rtl_dump_file) | |
1447 | fprintf (rtl_dump_file, "Emitting copy on edge (%d,%d)\n", | |
1448 | e->src->index, e->dest->index); | |
1449 | ||
1450 | sbitmap_free (visited); | |
1451 | out: | |
1452 | sbitmap_vector_free (pred); | |
1453 | sbitmap_vector_free (succ); | |
1454 | } | |
1455 | ||
d9d4fb43 AS |
1456 | /* For basic block B, consider all phi insns which provide an |
1457 | alternative corresponding to an incoming abnormal critical edge. | |
1458 | Place the phi alternative corresponding to that abnormal critical | |
1459 | edge in the same register class as the destination of the set. | |
1460 | ||
1461 | From Morgan, p. 178: | |
1462 | ||
1463 | For each abnormal critical edge (C, B), | |
1464 | if T0 = phi (T1, ..., Ti, ..., Tm) is a phi node in B, | |
1465 | and C is the ith predecessor of B, | |
1466 | then T0 and Ti must be equivalent. | |
1467 | ||
1468 | Return non-zero iff any such cases were found for which the two | |
1469 | regs were not already in the same class. */ | |
1470 | ||
1471 | static int | |
1472 | make_regs_equivalent_over_bad_edges (bb, reg_partition) | |
1473 | int bb; | |
1474 | partition reg_partition; | |
1475 | { | |
1476 | int changed = 0; | |
1477 | basic_block b = BASIC_BLOCK (bb); | |
589ca5cb | 1478 | rtx phi; |
d9d4fb43 AS |
1479 | |
1480 | /* Advance to the first phi node. */ | |
589ca5cb | 1481 | phi = first_insn_after_basic_block_note (b); |
d9d4fb43 AS |
1482 | |
1483 | /* Scan all the phi nodes. */ | |
1484 | for (; | |
1485 | PHI_NODE_P (phi); | |
1486 | phi = next_nonnote_insn (phi)) | |
1487 | { | |
1488 | edge e; | |
1489 | int tgt_regno; | |
1490 | rtx set = PATTERN (phi); | |
1491 | rtx tgt = SET_DEST (set); | |
1492 | ||
cdbca172 | 1493 | /* The set target is expected to be an SSA register. */ |
d9d4fb43 | 1494 | if (GET_CODE (tgt) != REG |
cdbca172 | 1495 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (tgt))) |
d9d4fb43 AS |
1496 | abort (); |
1497 | tgt_regno = REGNO (tgt); | |
1498 | ||
1499 | /* Scan incoming abnormal critical edges. */ | |
1500 | for (e = b->pred; e; e = e->pred_next) | |
555a0aa7 CP |
1501 | if ((e->flags & (EDGE_ABNORMAL | EDGE_CRITICAL)) |
1502 | == (EDGE_ABNORMAL | EDGE_CRITICAL)) | |
d9d4fb43 AS |
1503 | { |
1504 | rtx *alt = phi_alternative (set, e->src->index); | |
1505 | int alt_regno; | |
1506 | ||
1507 | /* If there is no alternative corresponding to this edge, | |
1508 | the value is undefined along the edge, so just go on. */ | |
1509 | if (alt == 0) | |
1510 | continue; | |
1511 | ||
cdbca172 | 1512 | /* The phi alternative is expected to be an SSA register. */ |
d9d4fb43 | 1513 | if (GET_CODE (*alt) != REG |
cdbca172 | 1514 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt))) |
d9d4fb43 AS |
1515 | abort (); |
1516 | alt_regno = REGNO (*alt); | |
1517 | ||
1518 | /* If the set destination and the phi alternative aren't | |
1519 | already in the same class... */ | |
1520 | if (partition_find (reg_partition, tgt_regno) | |
1521 | != partition_find (reg_partition, alt_regno)) | |
1522 | { | |
1523 | /* ... make them such. */ | |
cdbca172 JO |
1524 | if (conflicting_hard_regs_p (tgt_regno, alt_regno)) |
1525 | /* It is illegal to unify a hard register with a | |
1526 | different register. */ | |
1527 | abort (); | |
1528 | ||
d9d4fb43 AS |
1529 | partition_union (reg_partition, |
1530 | tgt_regno, alt_regno); | |
1531 | ++changed; | |
1532 | } | |
1533 | } | |
1534 | } | |
1535 | ||
1536 | return changed; | |
1537 | } | |
1538 | ||
d9d4fb43 AS |
1539 | /* Consider phi insns in basic block BB pairwise. If the set target |
1540 | of both isns are equivalent pseudos, make the corresponding phi | |
1541 | alternatives in each phi corresponding equivalent. | |
1542 | ||
1543 | Return nonzero if any new register classes were unioned. */ | |
1544 | ||
1545 | static int | |
1546 | make_equivalent_phi_alternatives_equivalent (bb, reg_partition) | |
1547 | int bb; | |
1548 | partition reg_partition; | |
1549 | { | |
1550 | int changed = 0; | |
d9d4fb43 | 1551 | basic_block b = BASIC_BLOCK (bb); |
589ca5cb | 1552 | rtx phi; |
d9d4fb43 AS |
1553 | |
1554 | /* Advance to the first phi node. */ | |
589ca5cb | 1555 | phi = first_insn_after_basic_block_note (b); |
d9d4fb43 AS |
1556 | |
1557 | /* Scan all the phi nodes. */ | |
1558 | for (; | |
1559 | PHI_NODE_P (phi); | |
1560 | phi = next_nonnote_insn (phi)) | |
1561 | { | |
1562 | rtx set = PATTERN (phi); | |
1563 | /* The regno of the destination of the set. */ | |
1564 | int tgt_regno = REGNO (SET_DEST (PATTERN (phi))); | |
1565 | ||
1566 | rtx phi2 = next_nonnote_insn (phi); | |
1567 | ||
1568 | /* Scan all phi nodes following this one. */ | |
1569 | for (; | |
1570 | PHI_NODE_P (phi2); | |
1571 | phi2 = next_nonnote_insn (phi2)) | |
1572 | { | |
1573 | rtx set2 = PATTERN (phi2); | |
1574 | /* The regno of the destination of the set. */ | |
1575 | int tgt2_regno = REGNO (SET_DEST (set2)); | |
1576 | ||
1577 | /* Are the set destinations equivalent regs? */ | |
1578 | if (partition_find (reg_partition, tgt_regno) == | |
1579 | partition_find (reg_partition, tgt2_regno)) | |
1580 | { | |
1581 | edge e; | |
1582 | /* Scan over edges. */ | |
1583 | for (e = b->pred; e; e = e->pred_next) | |
1584 | { | |
1585 | int pred_block = e->src->index; | |
cdbca172 | 1586 | /* Identify the phi alternatives from both phi |
d9d4fb43 AS |
1587 | nodes corresponding to this edge. */ |
1588 | rtx *alt = phi_alternative (set, pred_block); | |
1589 | rtx *alt2 = phi_alternative (set2, pred_block); | |
1590 | ||
1591 | /* If one of the phi nodes doesn't have a | |
1592 | corresponding alternative, just skip it. */ | |
1593 | if (alt == 0 || alt2 == 0) | |
1594 | continue; | |
1595 | ||
cdbca172 | 1596 | /* Both alternatives should be SSA registers. */ |
d9d4fb43 | 1597 | if (GET_CODE (*alt) != REG |
cdbca172 | 1598 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt))) |
d9d4fb43 AS |
1599 | abort (); |
1600 | if (GET_CODE (*alt2) != REG | |
cdbca172 | 1601 | || !CONVERT_REGISTER_TO_SSA_P (REGNO (*alt2))) |
d9d4fb43 AS |
1602 | abort (); |
1603 | ||
cdbca172 | 1604 | /* If the alternatives aren't already in the same |
2d76cb1a | 1605 | class ... */ |
d9d4fb43 AS |
1606 | if (partition_find (reg_partition, REGNO (*alt)) |
1607 | != partition_find (reg_partition, REGNO (*alt2))) | |
1608 | { | |
1609 | /* ... make them so. */ | |
cdbca172 JO |
1610 | if (conflicting_hard_regs_p (REGNO (*alt), REGNO (*alt2))) |
1611 | /* It is illegal to unify a hard register with | |
2d76cb1a | 1612 | a different register. */ |
cdbca172 JO |
1613 | abort (); |
1614 | ||
d9d4fb43 AS |
1615 | partition_union (reg_partition, |
1616 | REGNO (*alt), REGNO (*alt2)); | |
1617 | ++changed; | |
1618 | } | |
1619 | } | |
1620 | } | |
1621 | } | |
1622 | } | |
1623 | ||
1624 | return changed; | |
1625 | } | |
1626 | ||
d9d4fb43 AS |
1627 | /* Compute a conservative partition of outstanding pseudo registers. |
1628 | See Morgan 7.3.1. */ | |
1629 | ||
1630 | static partition | |
1631 | compute_conservative_reg_partition () | |
1632 | { | |
1633 | int bb; | |
1634 | int changed = 0; | |
1635 | ||
1636 | /* We don't actually work with hard registers, but it's easier to | |
1637 | carry them around anyway rather than constantly doing register | |
1638 | number arithmetic. */ | |
1639 | partition p = | |
cdbca172 | 1640 | partition_new (ssa_definition->num_elements); |
d9d4fb43 AS |
1641 | |
1642 | /* The first priority is to make sure registers that might have to | |
1643 | be copied on abnormal critical edges are placed in the same | |
1644 | partition. This saves us from having to split abnormal critical | |
1645 | edges. */ | |
1646 | for (bb = n_basic_blocks; --bb >= 0; ) | |
1647 | changed += make_regs_equivalent_over_bad_edges (bb, p); | |
1648 | ||
1649 | /* Now we have to insure that corresponding arguments of phi nodes | |
1650 | assigning to corresponding regs are equivalent. Iterate until | |
1651 | nothing changes. */ | |
1652 | while (changed > 0) | |
1653 | { | |
1654 | changed = 0; | |
1655 | for (bb = n_basic_blocks; --bb >= 0; ) | |
1656 | changed += make_equivalent_phi_alternatives_equivalent (bb, p); | |
1657 | } | |
1658 | ||
1659 | return p; | |
1660 | } | |
1661 | ||
4e872036 AS |
1662 | /* The following functions compute a register partition that attempts |
1663 | to eliminate as many reg copies and phi node copies as possible by | |
1664 | coalescing registers. This is the strategy: | |
1665 | ||
1666 | 1. As in the conservative case, the top priority is to coalesce | |
1667 | registers that otherwise would cause copies to be placed on | |
1668 | abnormal critical edges (which isn't possible). | |
1669 | ||
1670 | 2. Figure out which regs are involved (in the LHS or RHS) of | |
1671 | copies and phi nodes. Compute conflicts among these regs. | |
1672 | ||
1673 | 3. Walk around the instruction stream, placing two regs in the | |
1674 | same class of the partition if one appears on the LHS and the | |
1675 | other on the RHS of a copy or phi node and the two regs don't | |
1676 | conflict. The conflict information of course needs to be | |
1677 | updated. | |
1678 | ||
1679 | 4. If anything has changed, there may be new opportunities to | |
1680 | coalesce regs, so go back to 2. | |
1681 | */ | |
1682 | ||
1683 | /* If REG1 and REG2 don't conflict in CONFLICTS, place them in the | |
1684 | same class of partition P, if they aren't already. Update | |
1685 | CONFLICTS appropriately. | |
1686 | ||
1687 | Returns one if REG1 and REG2 were placed in the same class but were | |
1688 | not previously; zero otherwise. | |
1689 | ||
1690 | See Morgan figure 11.15. */ | |
1691 | ||
1692 | static int | |
1693 | coalesce_if_unconflicting (p, conflicts, reg1, reg2) | |
1694 | partition p; | |
1695 | conflict_graph conflicts; | |
1696 | int reg1; | |
1697 | int reg2; | |
1698 | { | |
1699 | int reg; | |
1700 | ||
2d76cb1a | 1701 | /* Work only on SSA registers. */ |
cdbca172 | 1702 | if (!CONVERT_REGISTER_TO_SSA_P (reg1) || !CONVERT_REGISTER_TO_SSA_P (reg2)) |
4e872036 AS |
1703 | return 0; |
1704 | ||
1705 | /* Find the canonical regs for the classes containing REG1 and | |
1706 | REG2. */ | |
1707 | reg1 = partition_find (p, reg1); | |
1708 | reg2 = partition_find (p, reg2); | |
1709 | ||
1710 | /* If they're already in the same class, there's nothing to do. */ | |
1711 | if (reg1 == reg2) | |
1712 | return 0; | |
1713 | ||
1714 | /* If the regs conflict, our hands are tied. */ | |
cdbca172 JO |
1715 | if (conflicting_hard_regs_p (reg1, reg2) || |
1716 | conflict_graph_conflict_p (conflicts, reg1, reg2)) | |
4e872036 AS |
1717 | return 0; |
1718 | ||
1719 | /* We're good to go. Put the regs in the same partition. */ | |
1720 | partition_union (p, reg1, reg2); | |
1721 | ||
1722 | /* Find the new canonical reg for the merged class. */ | |
1723 | reg = partition_find (p, reg1); | |
1724 | ||
1725 | /* Merge conflicts from the two previous classes. */ | |
1726 | conflict_graph_merge_regs (conflicts, reg, reg1); | |
1727 | conflict_graph_merge_regs (conflicts, reg, reg2); | |
1728 | ||
1729 | return 1; | |
1730 | } | |
1731 | ||
1732 | /* For each register copy insn in basic block BB, place the LHS and | |
1733 | RHS regs in the same class in partition P if they do not conflict | |
1734 | according to CONFLICTS. | |
1735 | ||
1736 | Returns the number of changes that were made to P. | |
1737 | ||
1738 | See Morgan figure 11.14. */ | |
1739 | ||
1740 | static int | |
1741 | coalesce_regs_in_copies (bb, p, conflicts) | |
6308dae9 | 1742 | basic_block bb; |
4e872036 AS |
1743 | partition p; |
1744 | conflict_graph conflicts; | |
1745 | { | |
1746 | int changed = 0; | |
1747 | rtx insn; | |
6308dae9 | 1748 | rtx end = bb->end; |
4e872036 AS |
1749 | |
1750 | /* Scan the instruction stream of the block. */ | |
6308dae9 | 1751 | for (insn = bb->head; insn != end; insn = NEXT_INSN (insn)) |
4e872036 AS |
1752 | { |
1753 | rtx pattern; | |
1754 | rtx src; | |
1755 | rtx dest; | |
1756 | ||
1757 | /* If this isn't a set insn, go to the next insn. */ | |
1758 | if (GET_CODE (insn) != INSN) | |
1759 | continue; | |
1760 | pattern = PATTERN (insn); | |
1761 | if (GET_CODE (pattern) != SET) | |
1762 | continue; | |
1763 | ||
1764 | src = SET_SRC (pattern); | |
1765 | dest = SET_DEST (pattern); | |
1766 | ||
4e872036 AS |
1767 | /* We're only looking for copies. */ |
1768 | if (GET_CODE (src) != REG || GET_CODE (dest) != REG) | |
1769 | continue; | |
1770 | ||
1771 | /* Coalesce only if the reg modes are the same. As long as | |
1772 | each reg's rtx is unique, it can have only one mode, so two | |
1773 | pseudos of different modes can't be coalesced into one. | |
1774 | ||
1775 | FIXME: We can probably get around this by inserting SUBREGs | |
1776 | where appropriate, but for now we don't bother. */ | |
1777 | if (GET_MODE (src) != GET_MODE (dest)) | |
1778 | continue; | |
1779 | ||
1780 | /* Found a copy; see if we can use the same reg for both the | |
1781 | source and destination (and thus eliminate the copy, | |
1782 | ultimately). */ | |
1783 | changed += coalesce_if_unconflicting (p, conflicts, | |
1784 | REGNO (src), REGNO (dest)); | |
1785 | } | |
1786 | ||
1787 | return changed; | |
1788 | } | |
1789 | ||
4e872036 AS |
1790 | struct phi_coalesce_context |
1791 | { | |
1792 | partition p; | |
1793 | conflict_graph conflicts; | |
1794 | int changed; | |
1795 | }; | |
1796 | ||
1797 | /* Callback function for for_each_successor_phi. If the set | |
1798 | destination and the phi alternative regs do not conflict, place | |
1799 | them in the same paritition class. DATA is a pointer to a | |
1800 | phi_coalesce_context struct. */ | |
1801 | ||
1802 | static int | |
1803 | coalesce_reg_in_phi (insn, dest_regno, src_regno, data) | |
1804 | rtx insn ATTRIBUTE_UNUSED; | |
1805 | int dest_regno; | |
1806 | int src_regno; | |
1807 | void *data; | |
1808 | { | |
1809 | struct phi_coalesce_context *context = | |
1810 | (struct phi_coalesce_context *) data; | |
1811 | ||
1812 | /* Attempt to use the same reg, if they don't conflict. */ | |
1813 | context->changed | |
1814 | += coalesce_if_unconflicting (context->p, context->conflicts, | |
1815 | dest_regno, src_regno); | |
1816 | return 0; | |
1817 | } | |
1818 | ||
1819 | /* For each alternative in a phi function corresponding to basic block | |
1820 | BB (in phi nodes in successor block to BB), place the reg in the | |
1821 | phi alternative and the reg to which the phi value is set into the | |
1822 | same class in partition P, if allowed by CONFLICTS. | |
1823 | ||
1824 | Return the number of changes that were made to P. | |
1825 | ||
1826 | See Morgan figure 11.14. */ | |
1827 | ||
1828 | static int | |
1829 | coalesce_regs_in_successor_phi_nodes (bb, p, conflicts) | |
6308dae9 | 1830 | basic_block bb; |
4e872036 AS |
1831 | partition p; |
1832 | conflict_graph conflicts; | |
1833 | { | |
1834 | struct phi_coalesce_context context; | |
1835 | context.p = p; | |
1836 | context.conflicts = conflicts; | |
1837 | context.changed = 0; | |
1838 | ||
1839 | for_each_successor_phi (bb, &coalesce_reg_in_phi, &context); | |
1840 | ||
1841 | return context.changed; | |
1842 | } | |
1843 | ||
1844 | /* Compute and return a partition of pseudos. Where possible, | |
1845 | non-conflicting pseudos are placed in the same class. | |
1846 | ||
1847 | The caller is responsible for deallocating the returned partition. */ | |
1848 | ||
1849 | static partition | |
1850 | compute_coalesced_reg_partition () | |
1851 | { | |
1852 | int bb; | |
1853 | int changed = 0; | |
1854 | ||
4e872036 | 1855 | partition p = |
cdbca172 | 1856 | partition_new (ssa_definition->num_elements); |
4e872036 AS |
1857 | |
1858 | /* The first priority is to make sure registers that might have to | |
1859 | be copied on abnormal critical edges are placed in the same | |
1860 | partition. This saves us from having to split abnormal critical | |
1861 | edges (which can't be done). */ | |
1862 | for (bb = n_basic_blocks; --bb >= 0; ) | |
1863 | make_regs_equivalent_over_bad_edges (bb, p); | |
1864 | ||
1865 | do | |
1866 | { | |
1867 | regset_head phi_set; | |
1868 | conflict_graph conflicts; | |
1869 | ||
1870 | changed = 0; | |
1871 | ||
1872 | /* Build the set of registers involved in phi nodes, either as | |
1873 | arguments to the phi function or as the target of a set. */ | |
1874 | INITIALIZE_REG_SET (phi_set); | |
1875 | mark_phi_and_copy_regs (&phi_set); | |
1876 | ||
1877 | /* Compute conflicts. */ | |
1878 | conflicts = conflict_graph_compute (&phi_set, p); | |
1879 | ||
1880 | /* FIXME: Better would be to process most frequently executed | |
1881 | blocks first, so that most frequently executed copies would | |
1882 | be more likely to be removed by register coalescing. But any | |
1883 | order will generate correct, if non-optimal, results. */ | |
1884 | for (bb = n_basic_blocks; --bb >= 0; ) | |
1885 | { | |
6308dae9 AS |
1886 | basic_block block = BASIC_BLOCK (bb); |
1887 | changed += coalesce_regs_in_copies (block, p, conflicts); | |
1888 | changed += | |
1889 | coalesce_regs_in_successor_phi_nodes (block, p, conflicts); | |
4e872036 AS |
1890 | } |
1891 | ||
1892 | conflict_graph_delete (conflicts); | |
1893 | } | |
1894 | while (changed > 0); | |
1895 | ||
1896 | return p; | |
1897 | } | |
1898 | ||
1899 | /* Mark the regs in a phi node. PTR is a phi expression or one of its | |
1900 | components (a REG or a CONST_INT). DATA is a reg set in which to | |
1901 | set all regs. Called from for_each_rtx. */ | |
1902 | ||
1903 | static int | |
1904 | mark_reg_in_phi (ptr, data) | |
1905 | rtx *ptr; | |
1906 | void *data; | |
1907 | { | |
1908 | rtx expr = *ptr; | |
1909 | regset set = (regset) data; | |
1910 | ||
1911 | switch (GET_CODE (expr)) | |
1912 | { | |
1913 | case REG: | |
1914 | SET_REGNO_REG_SET (set, REGNO (expr)); | |
1915 | /* Fall through. */ | |
1916 | case CONST_INT: | |
1917 | case PHI: | |
1918 | return 0; | |
1919 | default: | |
1920 | abort (); | |
1921 | } | |
1922 | } | |
1923 | ||
1924 | /* Mark in PHI_SET all pseudos that are used in a phi node -- either | |
1925 | set from a phi expression, or used as an argument in one. Also | |
1926 | mark regs that are the source or target of a reg copy. Uses | |
1927 | ssa_definition. */ | |
1928 | ||
1929 | static void | |
1930 | mark_phi_and_copy_regs (phi_set) | |
1931 | regset phi_set; | |
1932 | { | |
cdbca172 | 1933 | unsigned int reg; |
4e872036 AS |
1934 | |
1935 | /* Scan the definitions of all regs. */ | |
cdbca172 JO |
1936 | for (reg = 0; reg < VARRAY_SIZE (ssa_definition); ++reg) |
1937 | if (CONVERT_REGISTER_TO_SSA_P (reg)) | |
1938 | { | |
1939 | rtx insn = VARRAY_RTX (ssa_definition, reg); | |
1940 | rtx pattern; | |
1941 | rtx src; | |
1942 | ||
0b47e4c1 JL |
1943 | if (insn == NULL |
1944 | || (GET_CODE (insn) == NOTE | |
1945 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)) | |
cdbca172 JO |
1946 | continue; |
1947 | pattern = PATTERN (insn); | |
1948 | /* Sometimes we get PARALLEL insns. These aren't phi nodes or | |
1949 | copies. */ | |
1950 | if (GET_CODE (pattern) != SET) | |
1951 | continue; | |
1952 | src = SET_SRC (pattern); | |
1953 | ||
1954 | if (GET_CODE (src) == REG) | |
1955 | { | |
1956 | /* It's a reg copy. */ | |
1957 | SET_REGNO_REG_SET (phi_set, reg); | |
1958 | SET_REGNO_REG_SET (phi_set, REGNO (src)); | |
1959 | } | |
1960 | else if (GET_CODE (src) == PHI) | |
1961 | { | |
1962 | /* It's a phi node. Mark the reg being set. */ | |
1963 | SET_REGNO_REG_SET (phi_set, reg); | |
1964 | /* Mark the regs used in the phi function. */ | |
1965 | for_each_rtx (&src, mark_reg_in_phi, phi_set); | |
1966 | } | |
1967 | /* ... else nothing to do. */ | |
1968 | } | |
4e872036 | 1969 | } |
d9d4fb43 AS |
1970 | |
1971 | /* Rename regs in insn PTR that are equivalent. DATA is the register | |
1972 | partition which specifies equivalences. */ | |
1973 | ||
1974 | static int | |
1975 | rename_equivalent_regs_in_insn (ptr, data) | |
1976 | rtx *ptr; | |
1977 | void* data; | |
1978 | { | |
1979 | rtx x = *ptr; | |
1980 | partition reg_partition = (partition) data; | |
1981 | ||
1982 | if (x == NULL_RTX) | |
1983 | return 0; | |
1984 | ||
1985 | switch (GET_CODE (x)) | |
1986 | { | |
d9d4fb43 | 1987 | case REG: |
cdbca172 | 1988 | if (CONVERT_REGISTER_TO_SSA_P (REGNO (x))) |
d9d4fb43 | 1989 | { |
cdbca172 JO |
1990 | unsigned int regno = REGNO (x); |
1991 | unsigned int new_regno = partition_find (reg_partition, regno); | |
1992 | rtx canonical_element_rtx = ssa_rename_from_lookup (new_regno); | |
1993 | ||
1994 | if (canonical_element_rtx != NULL_RTX && | |
1995 | HARD_REGISTER_P (canonical_element_rtx)) | |
1996 | { | |
1997 | if (REGNO (canonical_element_rtx) != regno) | |
1998 | *ptr = canonical_element_rtx; | |
1999 | } | |
2000 | else if (regno != new_regno) | |
d9d4fb43 AS |
2001 | { |
2002 | rtx new_reg = regno_reg_rtx[new_regno]; | |
2003 | if (GET_MODE (x) != GET_MODE (new_reg)) | |
2004 | abort (); | |
2005 | *ptr = new_reg; | |
2006 | } | |
2007 | } | |
2008 | return -1; | |
2009 | ||
2010 | case PHI: | |
2011 | /* No need to rename the phi nodes. We'll check equivalence | |
2012 | when inserting copies. */ | |
2013 | return -1; | |
2014 | ||
2015 | default: | |
2016 | /* Anything else, continue traversing. */ | |
2017 | return 0; | |
2018 | } | |
2019 | } | |
2020 | ||
cdbca172 JO |
2021 | /* Record the register's canonical element stored in SRFP in the |
2022 | canonical_elements sbitmap packaged in DATA. This function is used | |
2023 | as a callback function for traversing ssa_rename_from. */ | |
2024 | ||
2025 | static int | |
2026 | record_canonical_element_1 (srfp, data) | |
2027 | void **srfp; | |
2028 | void *data; | |
2029 | { | |
2030 | unsigned int reg = ((ssa_rename_from_pair *) *srfp)->reg; | |
2031 | sbitmap canonical_elements = | |
2032 | ((struct ssa_rename_from_hash_table_data *) data)->canonical_elements; | |
2033 | partition reg_partition = | |
2034 | ((struct ssa_rename_from_hash_table_data *) data)->reg_partition; | |
2035 | ||
2036 | SET_BIT (canonical_elements, partition_find (reg_partition, reg)); | |
2037 | return 1; | |
2038 | } | |
2039 | ||
2040 | /* For each class in the REG_PARTITION corresponding to a particular | |
2041 | hard register and machine mode, check that there are no other | |
2042 | classes with the same hard register and machine mode. Returns | |
2043 | nonzero if this is the case, i.e., the partition is acceptable. */ | |
2044 | ||
2045 | static int | |
2046 | check_hard_regs_in_partition (reg_partition) | |
2047 | partition reg_partition; | |
2048 | { | |
2049 | /* CANONICAL_ELEMENTS has a nonzero bit if a class with the given register | |
2050 | number and machine mode has already been seen. This is a | |
2051 | problem with the partition. */ | |
2052 | sbitmap canonical_elements; | |
2053 | int element_index; | |
2054 | int already_seen[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]; | |
2055 | int reg; | |
2056 | int mach_mode; | |
2057 | ||
2058 | /* Collect a list of canonical elements. */ | |
2059 | canonical_elements = sbitmap_alloc (max_reg_num ()); | |
2060 | sbitmap_zero (canonical_elements); | |
2061 | ssa_rename_from_traverse (&record_canonical_element_1, | |
2062 | canonical_elements, reg_partition); | |
2063 | ||
2064 | /* We have not seen any hard register uses. */ | |
2065 | for (reg = 0; reg < FIRST_PSEUDO_REGISTER; ++reg) | |
2066 | for (mach_mode = 0; mach_mode < NUM_MACHINE_MODES; ++mach_mode) | |
2067 | already_seen[reg][mach_mode] = 0; | |
2068 | ||
2069 | /* Check for classes with the same hard register and machine mode. */ | |
2070 | EXECUTE_IF_SET_IN_SBITMAP (canonical_elements, 0, element_index, | |
2071 | { | |
2072 | rtx hard_reg_rtx = ssa_rename_from_lookup (element_index); | |
2073 | if (hard_reg_rtx != NULL_RTX && | |
2074 | HARD_REGISTER_P (hard_reg_rtx) && | |
2075 | already_seen[REGNO (hard_reg_rtx)][GET_MODE (hard_reg_rtx)] != 0) | |
2076 | /* Two distinct partition classes should be mapped to the same | |
2077 | hard register. */ | |
2078 | return 0; | |
2079 | }); | |
2080 | ||
2081 | sbitmap_free (canonical_elements); | |
2082 | ||
2083 | return 1; | |
2084 | } | |
2085 | ||
2086 | /* Rename regs that are equivalent in REG_PARTITION. Also collapse | |
2087 | any SEQUENCE insns. */ | |
d9d4fb43 AS |
2088 | |
2089 | static void | |
2090 | rename_equivalent_regs (reg_partition) | |
2091 | partition reg_partition; | |
2092 | { | |
2093 | int bb; | |
2094 | ||
2095 | for (bb = n_basic_blocks; --bb >= 0; ) | |
2096 | { | |
2097 | basic_block b = BASIC_BLOCK (bb); | |
2098 | rtx next = b->head; | |
2099 | rtx last = b->end; | |
2100 | rtx insn; | |
2101 | ||
2102 | do | |
2103 | { | |
2104 | insn = next; | |
2c3c49de | 2105 | if (INSN_P (insn)) |
d9d4fb43 AS |
2106 | { |
2107 | for_each_rtx (&PATTERN (insn), | |
2108 | rename_equivalent_regs_in_insn, | |
2109 | reg_partition); | |
2110 | for_each_rtx (®_NOTES (insn), | |
2111 | rename_equivalent_regs_in_insn, | |
2112 | reg_partition); | |
5397b155 GK |
2113 | |
2114 | if (GET_CODE (PATTERN (insn)) == SEQUENCE) | |
2115 | { | |
2116 | rtx s = PATTERN (insn); | |
2117 | int slen = XVECLEN (s, 0); | |
2118 | int i; | |
2119 | ||
2120 | if (slen <= 1) | |
2121 | abort(); | |
2122 | ||
7e1b6513 | 2123 | PATTERN (insn) = XVECEXP (s, 0, slen-1); |
5397b155 | 2124 | for (i = 0; i < slen - 1; i++) |
7e1b6513 | 2125 | emit_block_insn_before (XVECEXP (s, 0, i), insn, b); |
5397b155 | 2126 | } |
d9d4fb43 AS |
2127 | } |
2128 | ||
2129 | next = NEXT_INSN (insn); | |
2130 | } | |
2131 | while (insn != last); | |
2132 | } | |
2133 | } | |
2134 | ||
d9d4fb43 AS |
2135 | /* The main entry point for moving from SSA. */ |
2136 | ||
2137 | void | |
2138 | convert_from_ssa() | |
2139 | { | |
2140 | int bb; | |
2141 | partition reg_partition; | |
4e872036 | 2142 | rtx insns = get_insns (); |
cdbca172 | 2143 | |
fd9305ef JL |
2144 | /* Need global_live_at_{start,end} up to date. There should not be |
2145 | any significant dead code at this point, except perhaps dead | |
2146 | stores. So do not take the time to perform dead code elimination. | |
2147 | ||
5e93ca86 JL |
2148 | Register coalescing needs death notes, so generate them. */ |
2149 | life_analysis (insns, NULL, PROP_DEATH_NOTES); | |
4e872036 AS |
2150 | |
2151 | /* Figure out which regs in copies and phi nodes don't conflict and | |
2152 | therefore can be coalesced. */ | |
2153 | if (conservative_reg_partition) | |
2154 | reg_partition = compute_conservative_reg_partition (); | |
2155 | else | |
2156 | reg_partition = compute_coalesced_reg_partition (); | |
2157 | ||
cdbca172 JO |
2158 | if (!check_hard_regs_in_partition (reg_partition)) |
2159 | /* Two separate partitions should correspond to the same hard | |
2160 | register but do not. */ | |
2161 | abort (); | |
2162 | ||
d9d4fb43 AS |
2163 | rename_equivalent_regs (reg_partition); |
2164 | ||
2165 | /* Eliminate the PHI nodes. */ | |
2166 | for (bb = n_basic_blocks; --bb >= 0; ) | |
2167 | { | |
2168 | basic_block b = BASIC_BLOCK (bb); | |
2169 | edge e; | |
2170 | ||
2171 | for (e = b->pred; e; e = e->pred_next) | |
2172 | if (e->src != ENTRY_BLOCK_PTR) | |
2173 | eliminate_phi (e, reg_partition); | |
2174 | } | |
2175 | ||
2176 | partition_delete (reg_partition); | |
2177 | ||
2178 | /* Actually delete the PHI nodes. */ | |
2179 | for (bb = n_basic_blocks; --bb >= 0; ) | |
2180 | { | |
2181 | rtx insn = BLOCK_HEAD (bb); | |
d9d4fb43 | 2182 | |
589ca5cb | 2183 | while (1) |
d9d4fb43 | 2184 | { |
589ca5cb MM |
2185 | /* If this is a PHI node delete it. */ |
2186 | if (PHI_NODE_P (insn)) | |
2187 | { | |
2188 | if (insn == BLOCK_END (bb)) | |
2189 | BLOCK_END (bb) = PREV_INSN (insn); | |
2190 | insn = delete_insn (insn); | |
2191 | } | |
2192 | /* Since all the phi nodes come at the beginning of the | |
2193 | block, if we find an ordinary insn, we can stop looking | |
2194 | for more phi nodes. */ | |
2195 | else if (INSN_P (insn)) | |
2196 | break; | |
2197 | /* If we've reached the end of the block, stop. */ | |
2198 | else if (insn == BLOCK_END (bb)) | |
2199 | break; | |
2200 | else | |
2201 | insn = NEXT_INSN (insn); | |
d9d4fb43 | 2202 | } |
d9d4fb43 AS |
2203 | } |
2204 | ||
2205 | /* Commit all the copy nodes needed to convert out of SSA form. */ | |
2206 | commit_edge_insertions (); | |
2207 | ||
4e872036 AS |
2208 | in_ssa_form = 0; |
2209 | ||
d9d4fb43 | 2210 | count_or_remove_death_notes (NULL, 1); |
cdbca172 JO |
2211 | |
2212 | /* Deallocate the data structures. */ | |
2213 | VARRAY_FREE (ssa_definition); | |
cdbca172 | 2214 | ssa_rename_from_free (); |
d9d4fb43 | 2215 | } |
4e872036 AS |
2216 | |
2217 | /* Scan phi nodes in successors to BB. For each such phi node that | |
2218 | has a phi alternative value corresponding to BB, invoke FN. FN | |
2219 | is passed the entire phi node insn, the regno of the set | |
2220 | destination, the regno of the phi argument corresponding to BB, | |
2221 | and DATA. | |
2222 | ||
2223 | If FN ever returns non-zero, stops immediately and returns this | |
2224 | value. Otherwise, returns zero. */ | |
2225 | ||
2226 | int | |
2227 | for_each_successor_phi (bb, fn, data) | |
6308dae9 | 2228 | basic_block bb; |
4e872036 AS |
2229 | successor_phi_fn fn; |
2230 | void *data; | |
2231 | { | |
4e872036 AS |
2232 | edge e; |
2233 | ||
6308dae9 | 2234 | if (bb == EXIT_BLOCK_PTR) |
4e872036 | 2235 | return 0; |
4e872036 AS |
2236 | |
2237 | /* Scan outgoing edges. */ | |
6308dae9 | 2238 | for (e = bb->succ; e != NULL; e = e->succ_next) |
4e872036 AS |
2239 | { |
2240 | rtx insn; | |
2241 | ||
2242 | basic_block successor = e->dest; | |
6308dae9 AS |
2243 | if (successor == ENTRY_BLOCK_PTR |
2244 | || successor == EXIT_BLOCK_PTR) | |
4e872036 AS |
2245 | continue; |
2246 | ||
2247 | /* Advance to the first non-label insn of the successor block. */ | |
589ca5cb | 2248 | insn = first_insn_after_basic_block_note (successor); |
4e872036 AS |
2249 | |
2250 | if (insn == NULL) | |
2251 | continue; | |
2252 | ||
2253 | /* Scan phi nodes in the successor. */ | |
2254 | for ( ; PHI_NODE_P (insn); insn = NEXT_INSN (insn)) | |
2255 | { | |
2256 | int result; | |
2257 | rtx phi_set = PATTERN (insn); | |
6308dae9 | 2258 | rtx *alternative = phi_alternative (phi_set, bb->index); |
4e872036 AS |
2259 | rtx phi_src; |
2260 | ||
2261 | /* This phi function may not have an alternative | |
2262 | corresponding to the incoming edge, indicating the | |
2263 | assigned variable is not defined along the edge. */ | |
2264 | if (alternative == NULL) | |
2265 | continue; | |
2266 | phi_src = *alternative; | |
2267 | ||
2268 | /* Invoke the callback. */ | |
2269 | result = (*fn) (insn, REGNO (SET_DEST (phi_set)), | |
2270 | REGNO (phi_src), data); | |
2271 | ||
2272 | /* Terminate if requested. */ | |
2273 | if (result != 0) | |
2274 | return result; | |
2275 | } | |
2276 | } | |
2277 | ||
2278 | return 0; | |
2279 | } | |
cdbca172 JO |
2280 | |
2281 | /* Assuming the ssa_rename_from mapping has been established, yields | |
2282 | nonzero if 1) only one SSA register of REG1 and REG2 comes from a | |
2283 | hard register or 2) both SSA registers REG1 and REG2 come from | |
2284 | different hard registers. */ | |
2285 | ||
2286 | static int | |
2287 | conflicting_hard_regs_p (reg1, reg2) | |
2288 | int reg1; | |
2289 | int reg2; | |
2290 | { | |
2291 | int orig_reg1 = original_register (reg1); | |
2292 | int orig_reg2 = original_register (reg2); | |
2293 | if (HARD_REGISTER_NUM_P (orig_reg1) && HARD_REGISTER_NUM_P (orig_reg2) | |
2294 | && orig_reg1 != orig_reg2) | |
2295 | return 1; | |
2296 | if (HARD_REGISTER_NUM_P (orig_reg1) && !HARD_REGISTER_NUM_P (orig_reg2)) | |
2297 | return 1; | |
2298 | if (!HARD_REGISTER_NUM_P (orig_reg1) && HARD_REGISTER_NUM_P (orig_reg2)) | |
2299 | return 1; | |
2300 | ||
2301 | return 0; | |
2302 | } |