]> gcc.gnu.org Git - gcc.git/blame - gcc/rtlanal.c
Makefile.in (procopen.o): List the actual dependencies.
[gcc.git] / gcc / rtlanal.c
CommitLineData
2c88418c 1/* Analyze RTL for C-Compiler
5e5c9768 2 Copyright (C) 1987, 88, 92-98, 1999 Free Software Foundation, Inc.
2c88418c
RS
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
e99215a3
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
2c88418c
RS
20
21
22#include "config.h"
670ee920 23#include "system.h"
2c88418c
RS
24#include "rtl.h"
25
e9a25f70 26static int rtx_addr_can_trap_p PROTO((rtx));
0e05e8ea
JL
27static void reg_set_p_1 PROTO((rtx, rtx));
28static void reg_set_last_1 PROTO((rtx, rtx));
2c88418c 29
2a1777af
JL
30
31/* Forward declarations */
32static int jmp_uses_reg_or_mem PROTO((rtx));
33
2c88418c
RS
34/* Bit flags that specify the machine subtype we are compiling for.
35 Bits are tested using macros TARGET_... defined in the tm.h file
36 and set by `-m...' switches. Must be defined in rtlanal.c. */
37
38int target_flags;
39\f
40/* Return 1 if the value of X is unstable
41 (would be different at a different point in the program).
42 The frame pointer, arg pointer, etc. are considered stable
43 (within one function) and so is anything marked `unchanging'. */
44
45int
46rtx_unstable_p (x)
47 rtx x;
48{
49 register RTX_CODE code = GET_CODE (x);
50 register int i;
51 register char *fmt;
52
53 if (code == MEM)
54 return ! RTX_UNCHANGING_P (x);
55
56 if (code == QUEUED)
57 return 1;
58
59 if (code == CONST || code == CONST_INT)
60 return 0;
61
62 if (code == REG)
63 return ! (REGNO (x) == FRAME_POINTER_REGNUM
b3b6c9b3 64 || REGNO (x) == HARD_FRAME_POINTER_REGNUM
2c88418c
RS
65 || REGNO (x) == ARG_POINTER_REGNUM
66 || RTX_UNCHANGING_P (x));
67
68 fmt = GET_RTX_FORMAT (code);
69 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
70 if (fmt[i] == 'e')
71 if (rtx_unstable_p (XEXP (x, i)))
72 return 1;
73 return 0;
74}
75
76/* Return 1 if X has a value that can vary even between two
77 executions of the program. 0 means X can be compared reliably
78 against certain constants or near-constants.
79 The frame pointer and the arg pointer are considered constant. */
80
81int
82rtx_varies_p (x)
83 rtx x;
84{
85 register RTX_CODE code = GET_CODE (x);
86 register int i;
87 register char *fmt;
88
89 switch (code)
90 {
91 case MEM:
92 case QUEUED:
93 return 1;
94
95 case CONST:
96 case CONST_INT:
97 case CONST_DOUBLE:
98 case SYMBOL_REF:
99 case LABEL_REF:
100 return 0;
101
102 case REG:
103 /* Note that we have to test for the actual rtx used for the frame
104 and arg pointers and not just the register number in case we have
105 eliminated the frame and/or arg pointer and are using it
106 for pseudos. */
b3b6c9b3 107 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
e5e809f4 108 || x == arg_pointer_rtx || x == pic_offset_table_rtx);
2c88418c
RS
109
110 case LO_SUM:
111 /* The operand 0 of a LO_SUM is considered constant
112 (in fact is it related specifically to operand 1). */
113 return rtx_varies_p (XEXP (x, 1));
e9a25f70
JL
114
115 default:
116 break;
2c88418c
RS
117 }
118
119 fmt = GET_RTX_FORMAT (code);
120 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
121 if (fmt[i] == 'e')
122 if (rtx_varies_p (XEXP (x, i)))
123 return 1;
124 return 0;
125}
126
127/* Return 0 if the use of X as an address in a MEM can cause a trap. */
128
e9a25f70 129static int
2c88418c
RS
130rtx_addr_can_trap_p (x)
131 register rtx x;
132{
133 register enum rtx_code code = GET_CODE (x);
134
135 switch (code)
136 {
137 case SYMBOL_REF:
138 case LABEL_REF:
139 /* SYMBOL_REF is problematic due to the possible presence of
140 a #pragma weak, but to say that loads from symbols can trap is
141 *very* costly. It's not at all clear what's best here. For
142 now, we ignore the impact of #pragma weak. */
143 return 0;
144
145 case REG:
146 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
b3b6c9b3
DE
147 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
148 || x == stack_pointer_rtx || x == arg_pointer_rtx);
2c88418c
RS
149
150 case CONST:
151 return rtx_addr_can_trap_p (XEXP (x, 0));
152
153 case PLUS:
154 /* An address is assumed not to trap if it is an address that can't
155 trap plus a constant integer. */
156 return (rtx_addr_can_trap_p (XEXP (x, 0))
157 || GET_CODE (XEXP (x, 1)) != CONST_INT);
158
159 case LO_SUM:
160 return rtx_addr_can_trap_p (XEXP (x, 1));
e9a25f70
JL
161
162 default:
163 break;
2c88418c
RS
164 }
165
166 /* If it isn't one of the case above, it can cause a trap. */
167 return 1;
168}
169
170/* Return 1 if X refers to a memory location whose address
171 cannot be compared reliably with constant addresses,
172 or if X refers to a BLKmode memory object. */
173
174int
175rtx_addr_varies_p (x)
176 rtx x;
177{
178 register enum rtx_code code;
179 register int i;
180 register char *fmt;
181
182 if (x == 0)
183 return 0;
184
185 code = GET_CODE (x);
186 if (code == MEM)
187 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0));
188
189 fmt = GET_RTX_FORMAT (code);
190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
191 if (fmt[i] == 'e')
833c0b26
RK
192 {
193 if (rtx_addr_varies_p (XEXP (x, i)))
194 return 1;
195 }
196 else if (fmt[i] == 'E')
197 {
198 int j;
199 for (j = 0; j < XVECLEN (x, i); j++)
200 if (rtx_addr_varies_p (XVECEXP (x, i, j)))
201 return 1;
202 }
2c88418c
RS
203 return 0;
204}
205\f
206/* Return the value of the integer term in X, if one is apparent;
207 otherwise return 0.
208 Only obvious integer terms are detected.
209 This is used in cse.c with the `related_value' field.*/
210
c166a311 211HOST_WIDE_INT
2c88418c
RS
212get_integer_term (x)
213 rtx x;
214{
215 if (GET_CODE (x) == CONST)
216 x = XEXP (x, 0);
217
218 if (GET_CODE (x) == MINUS
219 && GET_CODE (XEXP (x, 1)) == CONST_INT)
220 return - INTVAL (XEXP (x, 1));
221 if (GET_CODE (x) == PLUS
222 && GET_CODE (XEXP (x, 1)) == CONST_INT)
223 return INTVAL (XEXP (x, 1));
224 return 0;
225}
226
227/* If X is a constant, return the value sans apparent integer term;
228 otherwise return 0.
229 Only obvious integer terms are detected. */
230
231rtx
232get_related_value (x)
233 rtx x;
234{
235 if (GET_CODE (x) != CONST)
236 return 0;
237 x = XEXP (x, 0);
238 if (GET_CODE (x) == PLUS
239 && GET_CODE (XEXP (x, 1)) == CONST_INT)
240 return XEXP (x, 0);
241 else if (GET_CODE (x) == MINUS
242 && GET_CODE (XEXP (x, 1)) == CONST_INT)
243 return XEXP (x, 0);
244 return 0;
245}
246\f
247/* Nonzero if register REG appears somewhere within IN.
248 Also works if REG is not a register; in this case it checks
249 for a subexpression of IN that is Lisp "equal" to REG. */
250
251int
252reg_mentioned_p (reg, in)
253 register rtx reg, in;
254{
255 register char *fmt;
256 register int i;
257 register enum rtx_code code;
258
259 if (in == 0)
260 return 0;
261
262 if (reg == in)
263 return 1;
264
265 if (GET_CODE (in) == LABEL_REF)
266 return reg == XEXP (in, 0);
267
268 code = GET_CODE (in);
269
270 switch (code)
271 {
272 /* Compare registers by number. */
273 case REG:
274 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg);
275
276 /* These codes have no constituent expressions
277 and are unique. */
278 case SCRATCH:
279 case CC0:
280 case PC:
281 return 0;
282
283 case CONST_INT:
284 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg);
285
286 case CONST_DOUBLE:
287 /* These are kept unique for a given value. */
288 return 0;
e9a25f70
JL
289
290 default:
291 break;
2c88418c
RS
292 }
293
294 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
295 return 1;
296
297 fmt = GET_RTX_FORMAT (code);
298
299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
300 {
301 if (fmt[i] == 'E')
302 {
303 register int j;
304 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
305 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
306 return 1;
307 }
308 else if (fmt[i] == 'e'
309 && reg_mentioned_p (reg, XEXP (in, i)))
310 return 1;
311 }
312 return 0;
313}
314\f
315/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
316 no CODE_LABEL insn. */
317
318int
319no_labels_between_p (beg, end)
320 rtx beg, end;
321{
322 register rtx p;
323 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
324 if (GET_CODE (p) == CODE_LABEL)
325 return 0;
326 return 1;
327}
328
3ec2b590
R
329/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
330 no JUMP_INSN insn. */
331
332int
333no_jumps_between_p (beg, end)
334 rtx beg, end;
335{
336 register rtx p;
337 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
338 if (GET_CODE (p) == JUMP_INSN)
339 return 0;
340 return 1;
341}
342
2c88418c
RS
343/* Nonzero if register REG is used in an insn between
344 FROM_INSN and TO_INSN (exclusive of those two). */
345
346int
347reg_used_between_p (reg, from_insn, to_insn)
348 rtx reg, from_insn, to_insn;
349{
350 register rtx insn;
351
352 if (from_insn == to_insn)
353 return 0;
354
355 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
356 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
357 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
358 || (GET_CODE (insn) == CALL_INSN
359 && (find_reg_fusage (insn, USE, reg)
360 || find_reg_fusage (insn, CLOBBER, reg)))))
2c88418c
RS
361 return 1;
362 return 0;
363}
364\f
365/* Nonzero if the old value of X, a register, is referenced in BODY. If X
366 is entirely replaced by a new value and the only use is as a SET_DEST,
367 we do not consider it a reference. */
368
369int
370reg_referenced_p (x, body)
371 rtx x;
372 rtx body;
373{
374 int i;
375
376 switch (GET_CODE (body))
377 {
378 case SET:
379 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
380 return 1;
381
382 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
383 of a REG that occupies all of the REG, the insn references X if
384 it is mentioned in the destination. */
385 if (GET_CODE (SET_DEST (body)) != CC0
386 && GET_CODE (SET_DEST (body)) != PC
387 && GET_CODE (SET_DEST (body)) != REG
388 && ! (GET_CODE (SET_DEST (body)) == SUBREG
389 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG
390 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
391 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
392 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
393 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
394 && reg_overlap_mentioned_p (x, SET_DEST (body)))
395 return 1;
e9a25f70 396 return 0;
2c88418c
RS
397
398 case ASM_OPERANDS:
399 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
400 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
401 return 1;
e9a25f70 402 return 0;
2c88418c
RS
403
404 case CALL:
405 case USE:
406 return reg_overlap_mentioned_p (x, body);
407
408 case TRAP_IF:
409 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
410
2ac4fed0
RK
411 case UNSPEC:
412 case UNSPEC_VOLATILE:
2c88418c
RS
413 case PARALLEL:
414 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
415 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
416 return 1;
e9a25f70
JL
417 return 0;
418
419 default:
420 return 0;
2c88418c 421 }
2c88418c
RS
422}
423
424/* Nonzero if register REG is referenced in an insn between
425 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do
0f41302f 426 not count. */
2c88418c
RS
427
428int
429reg_referenced_between_p (reg, from_insn, to_insn)
430 rtx reg, from_insn, to_insn;
431{
432 register rtx insn;
433
434 if (from_insn == to_insn)
435 return 0;
436
437 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
438 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
439 && (reg_referenced_p (reg, PATTERN (insn))
440 || (GET_CODE (insn) == CALL_INSN
441 && find_reg_fusage (insn, USE, reg))))
2c88418c
RS
442 return 1;
443 return 0;
444}
445\f
446/* Nonzero if register REG is set or clobbered in an insn between
447 FROM_INSN and TO_INSN (exclusive of those two). */
448
449int
450reg_set_between_p (reg, from_insn, to_insn)
451 rtx reg, from_insn, to_insn;
452{
453 register rtx insn;
454
455 if (from_insn == to_insn)
456 return 0;
457
458 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
459 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
84607dc1 460 && reg_set_p (reg, insn))
2c88418c
RS
461 return 1;
462 return 0;
463}
464
465/* Internals of reg_set_between_p. */
466
467static rtx reg_set_reg;
468static int reg_set_flag;
469
5f91c709
RK
470static void
471reg_set_p_1 (x, pat)
d6f4ec51
KG
472 rtx x;
473 rtx pat ATTRIBUTE_UNUSED;
2c88418c
RS
474{
475 /* We don't want to return 1 if X is a MEM that contains a register
476 within REG_SET_REG. */
477
478 if ((GET_CODE (x) != MEM)
479 && reg_overlap_mentioned_p (reg_set_reg, x))
480 reg_set_flag = 1;
481}
482
483int
484reg_set_p (reg, insn)
485 rtx reg, insn;
486{
487 rtx body = insn;
488
489 /* We can be passed an insn or part of one. If we are passed an insn,
490 check if a side-effect of the insn clobbers REG. */
491 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
492 {
493 if (FIND_REG_INC_NOTE (insn, reg)
494 || (GET_CODE (insn) == CALL_INSN
495 /* We'd like to test call_used_regs here, but rtlanal.c can't
496 reference that variable due to its use in genattrtab. So
8f3e7a26
RK
497 we'll just be more conservative.
498
499 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE
500 information holds all clobbered registers. */
2c88418c
RS
501 && ((GET_CODE (reg) == REG
502 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
8f3e7a26
RK
503 || GET_CODE (reg) == MEM
504 || find_reg_fusage (insn, CLOBBER, reg))))
2c88418c
RS
505 return 1;
506
507 body = PATTERN (insn);
508 }
509
510 reg_set_reg = reg;
511 reg_set_flag = 0;
512 note_stores (body, reg_set_p_1);
513 return reg_set_flag;
514}
515
a2e1a0bf
RH
516/* Similar to reg_set_between_p, but check all registers in X. Return 0
517 only if none of them are modified between START and END. Do not
518 consider non-registers one way or the other. */
519
520int
521regs_set_between_p (x, start, end)
522 rtx x;
523 rtx start, end;
524{
525 enum rtx_code code = GET_CODE (x);
526 char *fmt;
527 int i, j;
528
529 switch (code)
530 {
531 case CONST_INT:
532 case CONST_DOUBLE:
533 case CONST:
534 case SYMBOL_REF:
535 case LABEL_REF:
536 case PC:
537 case CC0:
538 return 0;
539
540 case REG:
541 return reg_set_between_p (x, start, end);
542
543 default:
544 break;
545 }
546
547 fmt = GET_RTX_FORMAT (code);
548 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
549 {
550 if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end))
551 return 1;
552
553 else if (fmt[i] == 'E')
554 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
555 if (regs_set_between_p (XVECEXP (x, i, j), start, end))
556 return 1;
557 }
558
559 return 0;
560}
561
2c88418c
RS
562/* Similar to reg_set_between_p, but check all registers in X. Return 0
563 only if none of them are modified between START and END. Return 1 if
564 X contains a MEM; this routine does not perform any memory aliasing. */
565
566int
567modified_between_p (x, start, end)
568 rtx x;
569 rtx start, end;
570{
571 enum rtx_code code = GET_CODE (x);
572 char *fmt;
f8163c92 573 int i, j;
2c88418c
RS
574
575 switch (code)
576 {
577 case CONST_INT:
578 case CONST_DOUBLE:
579 case CONST:
580 case SYMBOL_REF:
581 case LABEL_REF:
582 return 0;
583
584 case PC:
585 case CC0:
586 return 1;
587
588 case MEM:
589 /* If the memory is not constant, assume it is modified. If it is
590 constant, we still have to check the address. */
591 if (! RTX_UNCHANGING_P (x))
592 return 1;
593 break;
594
595 case REG:
596 return reg_set_between_p (x, start, end);
e9a25f70
JL
597
598 default:
599 break;
2c88418c
RS
600 }
601
602 fmt = GET_RTX_FORMAT (code);
603 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
f8163c92
RK
604 {
605 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
606 return 1;
607
608 if (fmt[i] == 'E')
609 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
610 if (modified_between_p (XVECEXP (x, i, j), start, end))
611 return 1;
612 }
613
614 return 0;
615}
616
617/* Similar to reg_set_p, but check all registers in X. Return 0 only if none
618 of them are modified in INSN. Return 1 if X contains a MEM; this routine
619 does not perform any memory aliasing. */
620
621int
622modified_in_p (x, insn)
623 rtx x;
624 rtx insn;
625{
626 enum rtx_code code = GET_CODE (x);
627 char *fmt;
628 int i, j;
629
630 switch (code)
631 {
632 case CONST_INT:
633 case CONST_DOUBLE:
634 case CONST:
635 case SYMBOL_REF:
636 case LABEL_REF:
637 return 0;
638
639 case PC:
640 case CC0:
2c88418c
RS
641 return 1;
642
f8163c92
RK
643 case MEM:
644 /* If the memory is not constant, assume it is modified. If it is
645 constant, we still have to check the address. */
646 if (! RTX_UNCHANGING_P (x))
647 return 1;
648 break;
649
650 case REG:
651 return reg_set_p (x, insn);
e9a25f70
JL
652
653 default:
654 break;
f8163c92
RK
655 }
656
657 fmt = GET_RTX_FORMAT (code);
658 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
659 {
660 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
661 return 1;
662
663 if (fmt[i] == 'E')
664 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
665 if (modified_in_p (XVECEXP (x, i, j), insn))
666 return 1;
667 }
668
2c88418c
RS
669 return 0;
670}
671\f
672/* Given an INSN, return a SET expression if this insn has only a single SET.
673 It may also have CLOBBERs, USEs, or SET whose output
674 will not be used, which we ignore. */
675
676rtx
677single_set (insn)
678 rtx insn;
679{
680 rtx set;
681 int i;
682
683 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
684 return 0;
685
686 if (GET_CODE (PATTERN (insn)) == SET)
687 return PATTERN (insn);
688
689 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
690 {
691 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++)
692 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
fb3ef382
RS
693 && (! find_reg_note (insn, REG_UNUSED,
694 SET_DEST (XVECEXP (PATTERN (insn), 0, i)))
695 || side_effects_p (XVECEXP (PATTERN (insn), 0, i))))
2c88418c
RS
696 {
697 if (set)
698 return 0;
699 else
700 set = XVECEXP (PATTERN (insn), 0, i);
701 }
702 return set;
703 }
704
705 return 0;
706}
941c63ac
JL
707
708/* Given an INSN, return nonzero if it has more than one SET, else return
709 zero. */
710
5f7d3786 711int
941c63ac
JL
712multiple_sets (insn)
713 rtx insn;
714{
cae8acdd 715 int found;
941c63ac
JL
716 int i;
717
718 /* INSN must be an insn. */
719 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
720 return 0;
721
722 /* Only a PARALLEL can have multiple SETs. */
723 if (GET_CODE (PATTERN (insn)) == PARALLEL)
724 {
725 for (i = 0, found = 0; i < XVECLEN (PATTERN (insn), 0); i++)
726 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET)
727 {
728 /* If we have already found a SET, then return now. */
729 if (found)
730 return 1;
731 else
732 found = 1;
733 }
734 }
735
736 /* Either zero or one SET. */
737 return 0;
738}
2c88418c
RS
739\f
740/* Return the last thing that X was assigned from before *PINSN. Verify that
741 the object is not modified up to VALID_TO. If it was, if we hit
742 a partial assignment to X, or hit a CODE_LABEL first, return X. If we
89d3d442
AM
743 found an assignment, update *PINSN to point to it.
744 ALLOW_HWREG is set to 1 if hardware registers are allowed to be the src. */
2c88418c
RS
745
746rtx
89d3d442 747find_last_value (x, pinsn, valid_to, allow_hwreg)
2c88418c
RS
748 rtx x;
749 rtx *pinsn;
750 rtx valid_to;
89d3d442 751 int allow_hwreg;
2c88418c
RS
752{
753 rtx p;
754
755 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL;
756 p = PREV_INSN (p))
757 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
758 {
759 rtx set = single_set (p);
c166a311 760 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
2c88418c
RS
761
762 if (set && rtx_equal_p (x, SET_DEST (set)))
763 {
764 rtx src = SET_SRC (set);
765
766 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
767 src = XEXP (note, 0);
768
769 if (! modified_between_p (src, PREV_INSN (p), valid_to)
770 /* Reject hard registers because we don't usually want
771 to use them; we'd rather use a pseudo. */
89d3d442
AM
772 && (! (GET_CODE (src) == REG
773 && REGNO (src) < FIRST_PSEUDO_REGISTER) || allow_hwreg))
2c88418c
RS
774 {
775 *pinsn = p;
776 return src;
777 }
778 }
779
780 /* If set in non-simple way, we don't have a value. */
781 if (reg_set_p (x, p))
782 break;
783 }
784
785 return x;
786}
787\f
788/* Return nonzero if register in range [REGNO, ENDREGNO)
789 appears either explicitly or implicitly in X
790 other than being stored into.
791
792 References contained within the substructure at LOC do not count.
793 LOC may be zero, meaning don't ignore anything. */
794
795int
796refers_to_regno_p (regno, endregno, x, loc)
797 int regno, endregno;
798 rtx x;
799 rtx *loc;
800{
801 register int i;
802 register RTX_CODE code;
803 register char *fmt;
804
805 repeat:
806 /* The contents of a REG_NONNEG note is always zero, so we must come here
807 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
808 if (x == 0)
809 return 0;
810
811 code = GET_CODE (x);
812
813 switch (code)
814 {
815 case REG:
816 i = REGNO (x);
f8163c92
RK
817
818 /* If we modifying the stack, frame, or argument pointer, it will
819 clobber a virtual register. In fact, we could be more precise,
820 but it isn't worth it. */
821 if ((i == STACK_POINTER_REGNUM
822#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
823 || i == ARG_POINTER_REGNUM
824#endif
825 || i == FRAME_POINTER_REGNUM)
826 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
827 return 1;
828
2c88418c
RS
829 return (endregno > i
830 && regno < i + (i < FIRST_PSEUDO_REGISTER
831 ? HARD_REGNO_NREGS (i, GET_MODE (x))
832 : 1));
833
834 case SUBREG:
835 /* If this is a SUBREG of a hard reg, we can see exactly which
836 registers are being modified. Otherwise, handle normally. */
837 if (GET_CODE (SUBREG_REG (x)) == REG
838 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
839 {
840 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
841 int inner_endregno
842 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
843 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
844
845 return endregno > inner_regno && regno < inner_endregno;
846 }
847 break;
848
849 case CLOBBER:
850 case SET:
851 if (&SET_DEST (x) != loc
852 /* Note setting a SUBREG counts as referring to the REG it is in for
853 a pseudo but not for hard registers since we can
854 treat each word individually. */
855 && ((GET_CODE (SET_DEST (x)) == SUBREG
856 && loc != &SUBREG_REG (SET_DEST (x))
857 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
858 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
859 && refers_to_regno_p (regno, endregno,
860 SUBREG_REG (SET_DEST (x)), loc))
861 || (GET_CODE (SET_DEST (x)) != REG
862 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
863 return 1;
864
865 if (code == CLOBBER || loc == &SET_SRC (x))
866 return 0;
867 x = SET_SRC (x);
868 goto repeat;
e9a25f70
JL
869
870 default:
871 break;
2c88418c
RS
872 }
873
874 /* X does not match, so try its subexpressions. */
875
876 fmt = GET_RTX_FORMAT (code);
877 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
878 {
879 if (fmt[i] == 'e' && loc != &XEXP (x, i))
880 {
881 if (i == 0)
882 {
883 x = XEXP (x, 0);
884 goto repeat;
885 }
886 else
887 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
888 return 1;
889 }
890 else if (fmt[i] == 'E')
891 {
892 register int j;
893 for (j = XVECLEN (x, i) - 1; j >=0; j--)
894 if (loc != &XVECEXP (x, i, j)
895 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
896 return 1;
897 }
898 }
899 return 0;
900}
901
902/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
903 we check if any register number in X conflicts with the relevant register
904 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
905 contains a MEM (we don't bother checking for memory addresses that can't
906 conflict because we expect this to be a rare case. */
907
908int
909reg_overlap_mentioned_p (x, in)
910 rtx x, in;
911{
912 int regno, endregno;
913
b98b49ac
JL
914 /* Overly conservative. */
915 if (GET_CODE (x) == STRICT_LOW_PART)
916 x = XEXP (x, 0);
917
918 /* If either argument is a constant, then modifying X can not affect IN. */
919 if (CONSTANT_P (x) || CONSTANT_P (in))
920 return 0;
921 else if (GET_CODE (x) == SUBREG)
2c88418c
RS
922 {
923 regno = REGNO (SUBREG_REG (x));
924 if (regno < FIRST_PSEUDO_REGISTER)
925 regno += SUBREG_WORD (x);
926 }
927 else if (GET_CODE (x) == REG)
928 regno = REGNO (x);
2c88418c
RS
929 else if (GET_CODE (x) == MEM)
930 {
931 char *fmt;
932 int i;
933
934 if (GET_CODE (in) == MEM)
935 return 1;
936
937 fmt = GET_RTX_FORMAT (GET_CODE (in));
938
939 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
940 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
941 return 1;
942
943 return 0;
944 }
945 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
946 || GET_CODE (x) == CC0)
947 return reg_mentioned_p (x, in);
c0222c21
DM
948 else if (GET_CODE (x) == PARALLEL
949 && GET_MODE (x) == BLKmode)
950 {
951 register int i;
952
953 /* If any register in here refers to it
954 we return true. */
955 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
956 if (reg_overlap_mentioned_p (SET_DEST (XVECEXP (x, 0, i)), in))
957 return 1;
958 return 0;
959 }
2c88418c
RS
960 else
961 abort ();
962
963 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
964 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
965
c166a311 966 return refers_to_regno_p (regno, endregno, in, NULL_PTR);
2c88418c
RS
967}
968\f
969/* Used for communications between the next few functions. */
970
971static int reg_set_last_unknown;
972static rtx reg_set_last_value;
973static int reg_set_last_first_regno, reg_set_last_last_regno;
974
975/* Called via note_stores from reg_set_last. */
976
977static void
978reg_set_last_1 (x, pat)
979 rtx x;
980 rtx pat;
981{
982 int first, last;
983
984 /* If X is not a register, or is not one in the range we care
985 about, ignore. */
986 if (GET_CODE (x) != REG)
987 return;
988
989 first = REGNO (x);
990 last = first + (first < FIRST_PSEUDO_REGISTER
991 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1);
992
993 if (first >= reg_set_last_last_regno
994 || last <= reg_set_last_first_regno)
995 return;
996
997 /* If this is a CLOBBER or is some complex LHS, or doesn't modify
998 exactly the registers we care about, show we don't know the value. */
999 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x
1000 || first != reg_set_last_first_regno
1001 || last != reg_set_last_last_regno)
1002 reg_set_last_unknown = 1;
1003 else
1004 reg_set_last_value = SET_SRC (pat);
1005}
1006
1007/* Return the last value to which REG was set prior to INSN. If we can't
1008 find it easily, return 0.
1009
4d9d7d9d
RK
1010 We only return a REG, SUBREG, or constant because it is too hard to
1011 check if a MEM remains unchanged. */
2c88418c
RS
1012
1013rtx
1014reg_set_last (x, insn)
1015 rtx x;
1016 rtx insn;
1017{
1018 rtx orig_insn = insn;
1019
1020 reg_set_last_first_regno = REGNO (x);
1021
1022 reg_set_last_last_regno
1023 = reg_set_last_first_regno
1024 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER
1025 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1);
1026
1027 reg_set_last_unknown = 0;
1028 reg_set_last_value = 0;
1029
1030 /* Scan backwards until reg_set_last_1 changed one of the above flags.
1031 Stop when we reach a label or X is a hard reg and we reach a
1032 CALL_INSN (if reg_set_last_last_regno is a hard reg).
1033
1034 If we find a set of X, ensure that its SET_SRC remains unchanged. */
1035
6b02c316
RS
1036 /* We compare with <= here, because reg_set_last_last_regno
1037 is actually the number of the first reg *not* in X. */
2c88418c
RS
1038 for (;
1039 insn && GET_CODE (insn) != CODE_LABEL
1040 && ! (GET_CODE (insn) == CALL_INSN
1041 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER);
1042 insn = PREV_INSN (insn))
1043 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1044 {
1045 note_stores (PATTERN (insn), reg_set_last_1);
1046 if (reg_set_last_unknown)
1047 return 0;
1048 else if (reg_set_last_value)
1049 {
1050 if (CONSTANT_P (reg_set_last_value)
4d9d7d9d
RK
1051 || ((GET_CODE (reg_set_last_value) == REG
1052 || GET_CODE (reg_set_last_value) == SUBREG)
2c88418c 1053 && ! reg_set_between_p (reg_set_last_value,
ce9c8df2 1054 insn, orig_insn)))
2c88418c
RS
1055 return reg_set_last_value;
1056 else
1057 return 0;
1058 }
1059 }
1060
1061 return 0;
1062}
1063\f
935ddcf5 1064/* This is 1 until after the rtl generation pass. */
2c88418c
RS
1065int rtx_equal_function_value_matters;
1066
1067/* Return 1 if X and Y are identical-looking rtx's.
1068 This is the Lisp function EQUAL for rtx arguments. */
1069
1070int
1071rtx_equal_p (x, y)
1072 rtx x, y;
1073{
1074 register int i;
1075 register int j;
1076 register enum rtx_code code;
1077 register char *fmt;
1078
1079 if (x == y)
1080 return 1;
1081 if (x == 0 || y == 0)
1082 return 0;
1083
1084 code = GET_CODE (x);
1085 /* Rtx's of different codes cannot be equal. */
1086 if (code != GET_CODE (y))
1087 return 0;
1088
1089 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1090 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1091
1092 if (GET_MODE (x) != GET_MODE (y))
1093 return 0;
1094
1095 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
1096
1097 if (code == REG)
1098 /* Until rtl generation is complete, don't consider a reference to the
1099 return register of the current function the same as the return from a
1100 called function. This eases the job of function integration. Once the
1101 distinction is no longer needed, they can be considered equivalent. */
1102 return (REGNO (x) == REGNO (y)
1103 && (! rtx_equal_function_value_matters
1104 || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y)));
1105 else if (code == LABEL_REF)
1106 return XEXP (x, 0) == XEXP (y, 0);
1107 else if (code == SYMBOL_REF)
1108 return XSTR (x, 0) == XSTR (y, 0);
1109 else if (code == SCRATCH || code == CONST_DOUBLE)
1110 return 0;
1111
1112 /* Compare the elements. If any pair of corresponding elements
1113 fail to match, return 0 for the whole things. */
1114
1115 fmt = GET_RTX_FORMAT (code);
1116 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1117 {
1118 switch (fmt[i])
1119 {
c166a311
CH
1120 case 'w':
1121 if (XWINT (x, i) != XWINT (y, i))
1122 return 0;
1123 break;
1124
2c88418c
RS
1125 case 'n':
1126 case 'i':
1127 if (XINT (x, i) != XINT (y, i))
1128 return 0;
1129 break;
1130
1131 case 'V':
1132 case 'E':
1133 /* Two vectors must have the same length. */
1134 if (XVECLEN (x, i) != XVECLEN (y, i))
1135 return 0;
1136
1137 /* And the corresponding elements must match. */
1138 for (j = 0; j < XVECLEN (x, i); j++)
1139 if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
1140 return 0;
1141 break;
1142
1143 case 'e':
1144 if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0)
1145 return 0;
1146 break;
1147
1148 case 'S':
1149 case 's':
1150 if (strcmp (XSTR (x, i), XSTR (y, i)))
1151 return 0;
1152 break;
1153
1154 case 'u':
1155 /* These are just backpointers, so they don't matter. */
1156 break;
1157
1158 case '0':
1159 break;
1160
1161 /* It is believed that rtx's at this level will never
1162 contain anything but integers and other rtx's,
1163 except for within LABEL_REFs and SYMBOL_REFs. */
1164 default:
1165 abort ();
1166 }
1167 }
1168 return 1;
1169}
1170\f
1171/* Call FUN on each register or MEM that is stored into or clobbered by X.
1172 (X would be the pattern of an insn).
1173 FUN receives two arguments:
1174 the REG, MEM, CC0 or PC being stored in or clobbered,
1175 the SET or CLOBBER rtx that does the store.
1176
1177 If the item being stored in or clobbered is a SUBREG of a hard register,
1178 the SUBREG will be passed. */
1179
1180void
1181note_stores (x, fun)
1182 register rtx x;
1183 void (*fun) ();
1184{
1185 if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER))
1186 {
1187 register rtx dest = SET_DEST (x);
1188 while ((GET_CODE (dest) == SUBREG
1189 && (GET_CODE (SUBREG_REG (dest)) != REG
1190 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1191 || GET_CODE (dest) == ZERO_EXTRACT
1192 || GET_CODE (dest) == SIGN_EXTRACT
1193 || GET_CODE (dest) == STRICT_LOW_PART)
1194 dest = XEXP (dest, 0);
86465af7
DM
1195
1196 if (GET_CODE (dest) == PARALLEL
1197 && GET_MODE (dest) == BLKmode)
1198 {
1199 register int i;
1200 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1201 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), x);
1202 }
1203 else
1204 (*fun) (dest, x);
2c88418c
RS
1205 }
1206 else if (GET_CODE (x) == PARALLEL)
1207 {
1208 register int i;
1209 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1210 {
1211 register rtx y = XVECEXP (x, 0, i);
1212 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER)
1213 {
1214 register rtx dest = SET_DEST (y);
1215 while ((GET_CODE (dest) == SUBREG
1216 && (GET_CODE (SUBREG_REG (dest)) != REG
1217 || (REGNO (SUBREG_REG (dest))
1218 >= FIRST_PSEUDO_REGISTER)))
1219 || GET_CODE (dest) == ZERO_EXTRACT
1220 || GET_CODE (dest) == SIGN_EXTRACT
1221 || GET_CODE (dest) == STRICT_LOW_PART)
1222 dest = XEXP (dest, 0);
86465af7
DM
1223 if (GET_CODE (dest) == PARALLEL
1224 && GET_MODE (dest) == BLKmode)
1225 {
1226 register int i;
1227 for (i = XVECLEN (dest, 0) - 1; i >= 0; i--)
1228 (*fun) (SET_DEST (XVECEXP (dest, 0, i)), y);
1229 }
1230 else
1231 (*fun) (dest, y);
2c88418c
RS
1232 }
1233 }
1234 }
1235}
1236\f
1237/* Return nonzero if X's old contents don't survive after INSN.
1238 This will be true if X is (cc0) or if X is a register and
1239 X dies in INSN or because INSN entirely sets X.
1240
1241 "Entirely set" means set directly and not through a SUBREG,
1242 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1243 Likewise, REG_INC does not count.
1244
1245 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1246 but for this use that makes no difference, since regs don't overlap
1247 during their lifetimes. Therefore, this function may be used
1248 at any time after deaths have been computed (in flow.c).
1249
1250 If REG is a hard reg that occupies multiple machine registers, this
1251 function will only return 1 if each of those registers will be replaced
1252 by INSN. */
1253
1254int
1255dead_or_set_p (insn, x)
1256 rtx insn;
1257 rtx x;
1258{
1259 register int regno, last_regno;
1260 register int i;
1261
1262 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1263 if (GET_CODE (x) == CC0)
1264 return 1;
1265
1266 if (GET_CODE (x) != REG)
1267 abort ();
1268
1269 regno = REGNO (x);
1270 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1271 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1);
1272
1273 for (i = regno; i <= last_regno; i++)
1274 if (! dead_or_set_regno_p (insn, i))
1275 return 0;
1276
1277 return 1;
1278}
1279
1280/* Utility function for dead_or_set_p to check an individual register. Also
1281 called from flow.c. */
1282
1283int
1284dead_or_set_regno_p (insn, test_regno)
1285 rtx insn;
1286 int test_regno;
1287{
1288 int regno, endregno;
1289 rtx link;
1290
6764d250
BS
1291 /* See if there is a death note for something that includes
1292 TEST_REGNO. */
1293 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2c88418c 1294 {
6764d250
BS
1295 if (REG_NOTE_KIND (link) != REG_DEAD
1296 || GET_CODE (XEXP (link, 0)) != REG)
1297 continue;
2c88418c 1298
6764d250
BS
1299 regno = REGNO (XEXP (link, 0));
1300 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1301 : regno + HARD_REGNO_NREGS (regno,
1302 GET_MODE (XEXP (link, 0))));
2c88418c 1303
6764d250
BS
1304 if (test_regno >= regno && test_regno < endregno)
1305 return 1;
2c88418c
RS
1306 }
1307
8f3e7a26
RK
1308 if (GET_CODE (insn) == CALL_INSN
1309 && find_regno_fusage (insn, CLOBBER, test_regno))
1310 return 1;
1311
2c88418c
RS
1312 if (GET_CODE (PATTERN (insn)) == SET)
1313 {
1314 rtx dest = SET_DEST (PATTERN (insn));
1315
1316 /* A value is totally replaced if it is the destination or the
1317 destination is a SUBREG of REGNO that does not change the number of
1318 words in it. */
6764d250 1319 if (GET_CODE (dest) == SUBREG
2c88418c
RS
1320 && (((GET_MODE_SIZE (GET_MODE (dest))
1321 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1322 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1323 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1324 dest = SUBREG_REG (dest);
1325
1326 if (GET_CODE (dest) != REG)
1327 return 0;
1328
1329 regno = REGNO (dest);
1330 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1331 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1332
1333 return (test_regno >= regno && test_regno < endregno);
1334 }
1335 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1336 {
1337 register int i;
1338
1339 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
1340 {
1341 rtx body = XVECEXP (PATTERN (insn), 0, i);
1342
1343 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1344 {
1345 rtx dest = SET_DEST (body);
1346
1347 if (GET_CODE (dest) == SUBREG
1348 && (((GET_MODE_SIZE (GET_MODE (dest))
1349 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1350 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1351 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1352 dest = SUBREG_REG (dest);
1353
1354 if (GET_CODE (dest) != REG)
1355 continue;
1356
1357 regno = REGNO (dest);
1358 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1359 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1360
1361 if (test_regno >= regno && test_regno < endregno)
1362 return 1;
1363 }
1364 }
1365 }
1366
1367 return 0;
1368}
1369
1370/* Return the reg-note of kind KIND in insn INSN, if there is one.
1371 If DATUM is nonzero, look for one whose datum is DATUM. */
1372
1373rtx
1374find_reg_note (insn, kind, datum)
1375 rtx insn;
1376 enum reg_note kind;
1377 rtx datum;
1378{
1379 register rtx link;
1380
ae78d276
MM
1381 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1382 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1383 return 0;
1384
2c88418c
RS
1385 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1386 if (REG_NOTE_KIND (link) == kind
1387 && (datum == 0 || datum == XEXP (link, 0)))
1388 return link;
1389 return 0;
1390}
1391
1392/* Return the reg-note of kind KIND in insn INSN which applies to register
99309f3b
RK
1393 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1394 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1395 it might be the case that the note overlaps REGNO. */
2c88418c
RS
1396
1397rtx
1398find_regno_note (insn, kind, regno)
1399 rtx insn;
1400 enum reg_note kind;
1401 int regno;
1402{
1403 register rtx link;
1404
ae78d276
MM
1405 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1406 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1407 return 0;
1408
2c88418c
RS
1409 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1410 if (REG_NOTE_KIND (link) == kind
1411 /* Verify that it is a register, so that scratch and MEM won't cause a
1412 problem here. */
1413 && GET_CODE (XEXP (link, 0)) == REG
99309f3b
RK
1414 && REGNO (XEXP (link, 0)) <= regno
1415 && ((REGNO (XEXP (link, 0))
1416 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1417 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
1418 GET_MODE (XEXP (link, 0)))))
1419 > regno))
2c88418c
RS
1420 return link;
1421 return 0;
1422}
8f3e7a26
RK
1423
1424/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1425 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1426
1427int
1428find_reg_fusage (insn, code, datum)
1429 rtx insn;
1430 enum rtx_code code;
1431 rtx datum;
1432{
1433 /* If it's not a CALL_INSN, it can't possibly have a
1434 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1435 if (GET_CODE (insn) != CALL_INSN)
1436 return 0;
1437
1438 if (! datum)
1439 abort();
1440
1441 if (GET_CODE (datum) != REG)
1442 {
1443 register rtx link;
1444
1445 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1446 link;
1447 link = XEXP (link, 1))
1448 if (GET_CODE (XEXP (link, 0)) == code
1449 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0))))
1450 return 1;
1451 }
1452 else
1453 {
1454 register int regno = REGNO (datum);
1455
1456 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1457 to pseudo registers, so don't bother checking. */
1458
1459 if (regno < FIRST_PSEUDO_REGISTER)
1460 {
1461 int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
1462 int i;
1463
1464 for (i = regno; i < end_regno; i++)
1465 if (find_regno_fusage (insn, code, i))
1466 return 1;
1467 }
1468 }
1469
1470 return 0;
1471}
1472
1473/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1474 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1475
1476int
1477find_regno_fusage (insn, code, regno)
1478 rtx insn;
1479 enum rtx_code code;
1480 int regno;
1481{
1482 register rtx link;
1483
1484 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1485 to pseudo registers, so don't bother checking. */
1486
1487 if (regno >= FIRST_PSEUDO_REGISTER
1488 || GET_CODE (insn) != CALL_INSN )
1489 return 0;
1490
1491 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1492 {
1493 register int regnote;
1494 register rtx op;
1495
1496 if (GET_CODE (op = XEXP (link, 0)) == code
1497 && GET_CODE (SET_DEST (op)) == REG
1498 && (regnote = REGNO (SET_DEST (op))) <= regno
1499 && regnote
1500 + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op)))
1501 > regno)
1502 return 1;
1503 }
1504
1505 return 0;
1506}
2c88418c
RS
1507\f
1508/* Remove register note NOTE from the REG_NOTES of INSN. */
1509
1510void
1511remove_note (insn, note)
1512 register rtx note;
1513 register rtx insn;
1514{
1515 register rtx link;
1516
1517 if (REG_NOTES (insn) == note)
1518 {
1519 REG_NOTES (insn) = XEXP (note, 1);
1520 return;
1521 }
1522
1523 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1524 if (XEXP (link, 1) == note)
1525 {
1526 XEXP (link, 1) = XEXP (note, 1);
1527 return;
1528 }
1529
1530 abort ();
1531}
1532\f
2b067faf
RS
1533/* Nonzero if X contains any volatile instructions. These are instructions
1534 which may cause unpredictable machine state instructions, and thus no
1535 instructions should be moved or combined across them. This includes
1536 only volatile asms and UNSPEC_VOLATILE instructions. */
1537
1538int
1539volatile_insn_p (x)
1540 rtx x;
1541{
1542 register RTX_CODE code;
1543
1544 code = GET_CODE (x);
1545 switch (code)
1546 {
1547 case LABEL_REF:
1548 case SYMBOL_REF:
1549 case CONST_INT:
1550 case CONST:
1551 case CONST_DOUBLE:
1552 case CC0:
1553 case PC:
1554 case REG:
1555 case SCRATCH:
1556 case CLOBBER:
1557 case ASM_INPUT:
1558 case ADDR_VEC:
1559 case ADDR_DIFF_VEC:
1560 case CALL:
1561 case MEM:
1562 return 0;
1563
1564 case UNSPEC_VOLATILE:
1565 /* case TRAP_IF: This isn't clear yet. */
1566 return 1;
1567
1568 case ASM_OPERANDS:
1569 if (MEM_VOLATILE_P (x))
1570 return 1;
e9a25f70
JL
1571
1572 default:
1573 break;
2b067faf
RS
1574 }
1575
1576 /* Recursively scan the operands of this expression. */
1577
1578 {
1579 register char *fmt = GET_RTX_FORMAT (code);
1580 register int i;
1581
1582 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1583 {
1584 if (fmt[i] == 'e')
1585 {
31001f72 1586 if (volatile_insn_p (XEXP (x, i)))
2b067faf
RS
1587 return 1;
1588 }
1589 if (fmt[i] == 'E')
1590 {
1591 register int j;
1592 for (j = 0; j < XVECLEN (x, i); j++)
31001f72 1593 if (volatile_insn_p (XVECEXP (x, i, j)))
2b067faf
RS
1594 return 1;
1595 }
1596 }
1597 }
1598 return 0;
1599}
1600
2c88418c 1601/* Nonzero if X contains any volatile memory references
2ac4fed0 1602 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2c88418c
RS
1603
1604int
1605volatile_refs_p (x)
1606 rtx x;
1607{
1608 register RTX_CODE code;
1609
1610 code = GET_CODE (x);
1611 switch (code)
1612 {
1613 case LABEL_REF:
1614 case SYMBOL_REF:
1615 case CONST_INT:
1616 case CONST:
1617 case CONST_DOUBLE:
1618 case CC0:
1619 case PC:
1620 case REG:
1621 case SCRATCH:
1622 case CLOBBER:
1623 case ASM_INPUT:
1624 case ADDR_VEC:
1625 case ADDR_DIFF_VEC:
1626 return 0;
1627
1628 case CALL:
2ac4fed0 1629 case UNSPEC_VOLATILE:
2c88418c
RS
1630 /* case TRAP_IF: This isn't clear yet. */
1631 return 1;
1632
1633 case MEM:
1634 case ASM_OPERANDS:
1635 if (MEM_VOLATILE_P (x))
1636 return 1;
e9a25f70
JL
1637
1638 default:
1639 break;
2c88418c
RS
1640 }
1641
1642 /* Recursively scan the operands of this expression. */
1643
1644 {
1645 register char *fmt = GET_RTX_FORMAT (code);
1646 register int i;
1647
1648 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1649 {
1650 if (fmt[i] == 'e')
1651 {
1652 if (volatile_refs_p (XEXP (x, i)))
1653 return 1;
1654 }
1655 if (fmt[i] == 'E')
1656 {
1657 register int j;
1658 for (j = 0; j < XVECLEN (x, i); j++)
1659 if (volatile_refs_p (XVECEXP (x, i, j)))
1660 return 1;
1661 }
1662 }
1663 }
1664 return 0;
1665}
1666
1667/* Similar to above, except that it also rejects register pre- and post-
1668 incrementing. */
1669
1670int
1671side_effects_p (x)
1672 rtx x;
1673{
1674 register RTX_CODE code;
1675
1676 code = GET_CODE (x);
1677 switch (code)
1678 {
1679 case LABEL_REF:
1680 case SYMBOL_REF:
1681 case CONST_INT:
1682 case CONST:
1683 case CONST_DOUBLE:
1684 case CC0:
1685 case PC:
1686 case REG:
1687 case SCRATCH:
1688 case ASM_INPUT:
1689 case ADDR_VEC:
1690 case ADDR_DIFF_VEC:
1691 return 0;
1692
1693 case CLOBBER:
1694 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
1695 when some combination can't be done. If we see one, don't think
1696 that we can simplify the expression. */
1697 return (GET_MODE (x) != VOIDmode);
1698
1699 case PRE_INC:
1700 case PRE_DEC:
1701 case POST_INC:
1702 case POST_DEC:
1703 case CALL:
2ac4fed0 1704 case UNSPEC_VOLATILE:
2c88418c
RS
1705 /* case TRAP_IF: This isn't clear yet. */
1706 return 1;
1707
1708 case MEM:
1709 case ASM_OPERANDS:
1710 if (MEM_VOLATILE_P (x))
1711 return 1;
e9a25f70
JL
1712
1713 default:
1714 break;
2c88418c
RS
1715 }
1716
1717 /* Recursively scan the operands of this expression. */
1718
1719 {
1720 register char *fmt = GET_RTX_FORMAT (code);
1721 register int i;
1722
1723 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1724 {
1725 if (fmt[i] == 'e')
1726 {
1727 if (side_effects_p (XEXP (x, i)))
1728 return 1;
1729 }
1730 if (fmt[i] == 'E')
1731 {
1732 register int j;
1733 for (j = 0; j < XVECLEN (x, i); j++)
1734 if (side_effects_p (XVECEXP (x, i, j)))
1735 return 1;
1736 }
1737 }
1738 }
1739 return 0;
1740}
1741\f
1742/* Return nonzero if evaluating rtx X might cause a trap. */
1743
1744int
1745may_trap_p (x)
1746 rtx x;
1747{
1748 int i;
1749 enum rtx_code code;
1750 char *fmt;
1751
1752 if (x == 0)
1753 return 0;
1754 code = GET_CODE (x);
1755 switch (code)
1756 {
1757 /* Handle these cases quickly. */
1758 case CONST_INT:
1759 case CONST_DOUBLE:
1760 case SYMBOL_REF:
1761 case LABEL_REF:
1762 case CONST:
1763 case PC:
1764 case CC0:
1765 case REG:
1766 case SCRATCH:
1767 return 0;
1768
1769 /* Conditional trap can trap! */
2ac4fed0 1770 case UNSPEC_VOLATILE:
2c88418c
RS
1771 case TRAP_IF:
1772 return 1;
1773
1774 /* Memory ref can trap unless it's a static var or a stack slot. */
1775 case MEM:
1776 return rtx_addr_can_trap_p (XEXP (x, 0));
1777
1778 /* Division by a non-constant might trap. */
1779 case DIV:
1780 case MOD:
1781 case UDIV:
1782 case UMOD:
e9a25f70
JL
1783 if (! CONSTANT_P (XEXP (x, 1))
1784 || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
2c88418c
RS
1785 return 1;
1786 /* This was const0_rtx, but by not using that,
1787 we can link this file into other programs. */
1788 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
1789 return 1;
e9a25f70
JL
1790 break;
1791
b278301b
RK
1792 case EXPR_LIST:
1793 /* An EXPR_LIST is used to represent a function call. This
1794 certainly may trap. */
1795 return 1;
e9a25f70 1796
2c88418c
RS
1797 default:
1798 /* Any floating arithmetic may trap. */
1799 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1800 return 1;
1801 }
1802
1803 fmt = GET_RTX_FORMAT (code);
1804 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1805 {
1806 if (fmt[i] == 'e')
1807 {
1808 if (may_trap_p (XEXP (x, i)))
1809 return 1;
1810 }
1811 else if (fmt[i] == 'E')
1812 {
1813 register int j;
1814 for (j = 0; j < XVECLEN (x, i); j++)
1815 if (may_trap_p (XVECEXP (x, i, j)))
1816 return 1;
1817 }
1818 }
1819 return 0;
1820}
1821\f
1822/* Return nonzero if X contains a comparison that is not either EQ or NE,
1823 i.e., an inequality. */
1824
1825int
1826inequality_comparisons_p (x)
1827 rtx x;
1828{
1829 register char *fmt;
1830 register int len, i;
1831 register enum rtx_code code = GET_CODE (x);
1832
1833 switch (code)
1834 {
1835 case REG:
1836 case SCRATCH:
1837 case PC:
1838 case CC0:
1839 case CONST_INT:
1840 case CONST_DOUBLE:
1841 case CONST:
1842 case LABEL_REF:
1843 case SYMBOL_REF:
1844 return 0;
1845
1846 case LT:
1847 case LTU:
1848 case GT:
1849 case GTU:
1850 case LE:
1851 case LEU:
1852 case GE:
1853 case GEU:
1854 return 1;
e9a25f70
JL
1855
1856 default:
1857 break;
2c88418c
RS
1858 }
1859
1860 len = GET_RTX_LENGTH (code);
1861 fmt = GET_RTX_FORMAT (code);
1862
1863 for (i = 0; i < len; i++)
1864 {
1865 if (fmt[i] == 'e')
1866 {
1867 if (inequality_comparisons_p (XEXP (x, i)))
1868 return 1;
1869 }
1870 else if (fmt[i] == 'E')
1871 {
1872 register int j;
1873 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1874 if (inequality_comparisons_p (XVECEXP (x, i, j)))
1875 return 1;
1876 }
1877 }
1878
1879 return 0;
1880}
1881\f
1ed0205e
VM
1882/* Replace any occurrence of FROM in X with TO. The function does
1883 not enter into CONST_DOUBLE for the replace.
2c88418c
RS
1884
1885 Note that copying is not done so X must not be shared unless all copies
1886 are to be modified. */
1887
1888rtx
1889replace_rtx (x, from, to)
1890 rtx x, from, to;
1891{
1892 register int i, j;
1893 register char *fmt;
1894
1ed0205e
VM
1895 /* The following prevents loops occurrence when we change MEM in
1896 CONST_DOUBLE onto the same CONST_DOUBLE. */
1897 if (x != 0 && GET_CODE (x) == CONST_DOUBLE)
1898 return x;
1899
2c88418c
RS
1900 if (x == from)
1901 return to;
1902
1903 /* Allow this function to make replacements in EXPR_LISTs. */
1904 if (x == 0)
1905 return 0;
1906
1907 fmt = GET_RTX_FORMAT (GET_CODE (x));
1908 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
1909 {
1910 if (fmt[i] == 'e')
1911 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
1912 else if (fmt[i] == 'E')
1913 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1914 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
1915 }
1916
1917 return x;
1918}
1919\f
1920/* Throughout the rtx X, replace many registers according to REG_MAP.
1921 Return the replacement for X (which may be X with altered contents).
1922 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
1923 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
1924
1925 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
1926 should not be mapped to pseudos or vice versa since validate_change
1927 is not called.
1928
1929 If REPLACE_DEST is 1, replacements are also done in destinations;
1930 otherwise, only sources are replaced. */
1931
1932rtx
1933replace_regs (x, reg_map, nregs, replace_dest)
1934 rtx x;
1935 rtx *reg_map;
1936 int nregs;
1937 int replace_dest;
1938{
1939 register enum rtx_code code;
1940 register int i;
1941 register char *fmt;
1942
1943 if (x == 0)
1944 return x;
1945
1946 code = GET_CODE (x);
1947 switch (code)
1948 {
1949 case SCRATCH:
1950 case PC:
1951 case CC0:
1952 case CONST_INT:
1953 case CONST_DOUBLE:
1954 case CONST:
1955 case SYMBOL_REF:
1956 case LABEL_REF:
1957 return x;
1958
1959 case REG:
1960 /* Verify that the register has an entry before trying to access it. */
1961 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
3eb8f14c
JW
1962 {
1963 /* SUBREGs can't be shared. Always return a copy to ensure that if
1964 this replacement occurs more than once then each instance will
1965 get distinct rtx. */
1966 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
1967 return copy_rtx (reg_map[REGNO (x)]);
1968 return reg_map[REGNO (x)];
1969 }
2c88418c
RS
1970 return x;
1971
1972 case SUBREG:
1973 /* Prevent making nested SUBREGs. */
1974 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs
1975 && reg_map[REGNO (SUBREG_REG (x))] != 0
1976 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
1977 {
1978 rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
1979 rtx map_inner = SUBREG_REG (map_val);
1980
1981 if (GET_MODE (x) == GET_MODE (map_inner))
1982 return map_inner;
1983 else
1984 {
1985 /* We cannot call gen_rtx here since we may be linked with
1986 genattrtab.c. */
1987 /* Let's try clobbering the incoming SUBREG and see
1988 if this is really safe. */
1989 SUBREG_REG (x) = map_inner;
1990 SUBREG_WORD (x) += SUBREG_WORD (map_val);
1991 return x;
1992#if 0
1993 rtx new = rtx_alloc (SUBREG);
1994 PUT_MODE (new, GET_MODE (x));
1995 SUBREG_REG (new) = map_inner;
1996 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val);
1997#endif
1998 }
1999 }
2000 break;
2001
2002 case SET:
2003 if (replace_dest)
2004 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
2005
2006 else if (GET_CODE (SET_DEST (x)) == MEM
2007 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
2008 /* Even if we are not to replace destinations, replace register if it
2009 is CONTAINED in destination (destination is memory or
2010 STRICT_LOW_PART). */
2011 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
2012 reg_map, nregs, 0);
2013 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
2014 /* Similarly, for ZERO_EXTRACT we replace all operands. */
2015 break;
2016
2017 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
2018 return x;
e9a25f70
JL
2019
2020 default:
2021 break;
2c88418c
RS
2022 }
2023
2024 fmt = GET_RTX_FORMAT (code);
2025 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2026 {
2027 if (fmt[i] == 'e')
2028 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
2029 if (fmt[i] == 'E')
2030 {
2031 register int j;
2032 for (j = 0; j < XVECLEN (x, i); j++)
2033 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
2034 nregs, replace_dest);
2035 }
2036 }
2037 return x;
2038}
2a1777af 2039
2a1777af
JL
2040/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is
2041 not in the constant pool and not in the condition of an IF_THEN_ELSE. */
2042
2043static int
2044jmp_uses_reg_or_mem (x)
2045 rtx x;
2046{
2047 enum rtx_code code = GET_CODE (x);
2048 int i, j;
2049 char *fmt;
2050
2051 switch (code)
2052 {
2053 case CONST:
2054 case LABEL_REF:
2055 case PC:
2056 return 0;
2057
2058 case REG:
2059 return 1;
2060
2061 case MEM:
2062 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
2063 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
2064
2065 case IF_THEN_ELSE:
2066 return (jmp_uses_reg_or_mem (XEXP (x, 1))
2067 || jmp_uses_reg_or_mem (XEXP (x, 2)));
2068
2069 case PLUS: case MINUS: case MULT:
2070 return (jmp_uses_reg_or_mem (XEXP (x, 0))
2071 || jmp_uses_reg_or_mem (XEXP (x, 1)));
1d300e19
KG
2072
2073 default:
2074 break;
2a1777af
JL
2075 }
2076
2077 fmt = GET_RTX_FORMAT (code);
2078 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2079 {
2080 if (fmt[i] == 'e'
2081 && jmp_uses_reg_or_mem (XEXP (x, i)))
2082 return 1;
2083
2084 if (fmt[i] == 'E')
2085 for (j = 0; j < XVECLEN (x, i); j++)
2086 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
2087 return 1;
2088 }
2089
2090 return 0;
2091}
2092
2093/* Return nonzero if INSN is an indirect jump (aka computed jump).
2094
2095 Tablejumps and casesi insns are not considered indirect jumps;
2096 we can recognize them by a (use (lael_ref)). */
2097
2098int
2099computed_jump_p (insn)
2100 rtx insn;
2101{
2102 int i;
2103 if (GET_CODE (insn) == JUMP_INSN)
2104 {
2105 rtx pat = PATTERN (insn);
2a1777af
JL
2106
2107 if (GET_CODE (pat) == PARALLEL)
2108 {
2109 int len = XVECLEN (pat, 0);
2110 int has_use_labelref = 0;
2111
2112 for (i = len - 1; i >= 0; i--)
2113 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
2114 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
2115 == LABEL_REF))
2116 has_use_labelref = 1;
2117
2118 if (! has_use_labelref)
2119 for (i = len - 1; i >= 0; i--)
2120 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
2121 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
8d7532d9 2122 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
2a1777af
JL
2123 return 1;
2124 }
2125 else if (GET_CODE (pat) == SET
2126 && SET_DEST (pat) == pc_rtx
2127 && jmp_uses_reg_or_mem (SET_SRC (pat)))
2128 return 1;
2129 }
2130 return 0;
2131}
ccc2d6d0
MM
2132
2133/* Traverse X via depth-first search, calling F for each
2134 sub-expression (including X itself). F is also passed the DATA.
2135 If F returns -1, do not traverse sub-expressions, but continue
2136 traversing the rest of the tree. If F ever returns any other
2137 non-zero value, stop the traversal, and return the value returned
2138 by F. Otherwise, return 0. This function does not traverse inside
2139 tree structure that contains RTX_EXPRs, or into sub-expressions
2140 whose format code is `0' since it is not known whether or not those
2141 codes are actually RTL.
2142
2143 This routine is very general, and could (should?) be used to
2144 implement many of the other routines in this file. */
2145
ae0b51ef
JL
2146int
2147for_each_rtx (x, f, data)
ef30399b 2148 rtx *x;
ccc2d6d0 2149 rtx_function f;
ef30399b 2150 void *data;
ccc2d6d0
MM
2151{
2152 int result;
2153 int length;
2154 char* format;
2155 int i;
2156
2157 /* Call F on X. */
2158 result = (*f)(x, data);
2159 if (result == -1)
2160 /* Do not traverse sub-expressions. */
2161 return 0;
2162 else if (result != 0)
2163 /* Stop the traversal. */
2164 return result;
2165
2166 if (*x == NULL_RTX)
2167 /* There are no sub-expressions. */
2168 return 0;
2169
2170 length = GET_RTX_LENGTH (GET_CODE (*x));
2171 format = GET_RTX_FORMAT (GET_CODE (*x));
2172
2173 for (i = 0; i < length; ++i)
2174 {
2175 switch (format[i])
2176 {
2177 case 'e':
2178 result = for_each_rtx (&XEXP (*x, i), f, data);
2179 if (result != 0)
2180 return result;
2181 break;
2182
2183 case 'V':
2184 case 'E':
2185 if (XVEC (*x, i) != 0)
2186 {
2187 int j;
2188 for (j = 0; j < XVECLEN (*x, i); ++j)
2189 {
2190 result = for_each_rtx (&XVECEXP (*x, i, j), f, data);
2191 if (result != 0)
2192 return result;
2193 }
2194 }
2195 break;
2196
2197 default:
2198 /* Nothing to do. */
2199 break;
2200 }
2201
2202 }
2203
2204 return 0;
2205}
3ec2b590 2206
777b1b71
RH
2207/* Searches X for any reference to REGNO, returning the rtx of the
2208 reference found if any. Otherwise, returns NULL_RTX. */
2209
2210rtx
2211regno_use_in (regno, x)
2212 int regno;
2213 rtx x;
2214{
2215 register char *fmt;
2216 int i, j;
2217 rtx tem;
2218
2219 if (GET_CODE (x) == REG && REGNO (x) == regno)
2220 return x;
2221
2222 fmt = GET_RTX_FORMAT (GET_CODE (x));
2223 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2224 {
2225 if (fmt[i] == 'e')
2226 {
2227 if ((tem = regno_use_in (regno, XEXP (x, i))))
2228 return tem;
2229 }
2230 else if (fmt[i] == 'E')
2231 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2232 if ((tem = regno_use_in (regno , XVECEXP (x, i, j))))
2233 return tem;
2234 }
2235
2236 return NULL_RTX;
2237}
This page took 1.429693 seconds and 5 git commands to generate.