]> gcc.gnu.org Git - gcc.git/blame - gcc/rtlanal.c
configure.in: Also look at $srcdir/gas/configure to find a gas version #.
[gcc.git] / gcc / rtlanal.c
CommitLineData
2c88418c 1/* Analyze RTL for C-Compiler
2e6a5989 2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
2c88418c
RS
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
e99215a3
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
2c88418c
RS
20
21
22#include "config.h"
670ee920 23#include "system.h"
2c88418c
RS
24#include "rtl.h"
25
e9a25f70 26static int rtx_addr_can_trap_p PROTO((rtx));
0e05e8ea
JL
27static void reg_set_p_1 PROTO((rtx, rtx));
28static void reg_set_last_1 PROTO((rtx, rtx));
2c88418c 29
2a1777af
JL
30
31/* Forward declarations */
32static int jmp_uses_reg_or_mem PROTO((rtx));
33
2c88418c
RS
34/* Bit flags that specify the machine subtype we are compiling for.
35 Bits are tested using macros TARGET_... defined in the tm.h file
36 and set by `-m...' switches. Must be defined in rtlanal.c. */
37
38int target_flags;
39\f
40/* Return 1 if the value of X is unstable
41 (would be different at a different point in the program).
42 The frame pointer, arg pointer, etc. are considered stable
43 (within one function) and so is anything marked `unchanging'. */
44
45int
46rtx_unstable_p (x)
47 rtx x;
48{
49 register RTX_CODE code = GET_CODE (x);
50 register int i;
51 register char *fmt;
52
53 if (code == MEM)
54 return ! RTX_UNCHANGING_P (x);
55
56 if (code == QUEUED)
57 return 1;
58
59 if (code == CONST || code == CONST_INT)
60 return 0;
61
62 if (code == REG)
63 return ! (REGNO (x) == FRAME_POINTER_REGNUM
b3b6c9b3 64 || REGNO (x) == HARD_FRAME_POINTER_REGNUM
2c88418c
RS
65 || REGNO (x) == ARG_POINTER_REGNUM
66 || RTX_UNCHANGING_P (x));
67
68 fmt = GET_RTX_FORMAT (code);
69 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
70 if (fmt[i] == 'e')
71 if (rtx_unstable_p (XEXP (x, i)))
72 return 1;
73 return 0;
74}
75
76/* Return 1 if X has a value that can vary even between two
77 executions of the program. 0 means X can be compared reliably
78 against certain constants or near-constants.
79 The frame pointer and the arg pointer are considered constant. */
80
81int
82rtx_varies_p (x)
83 rtx x;
84{
85 register RTX_CODE code = GET_CODE (x);
86 register int i;
87 register char *fmt;
88
89 switch (code)
90 {
91 case MEM:
92 case QUEUED:
93 return 1;
94
95 case CONST:
96 case CONST_INT:
97 case CONST_DOUBLE:
98 case SYMBOL_REF:
99 case LABEL_REF:
100 return 0;
101
102 case REG:
103 /* Note that we have to test for the actual rtx used for the frame
104 and arg pointers and not just the register number in case we have
105 eliminated the frame and/or arg pointer and are using it
106 for pseudos. */
b3b6c9b3 107 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
e5e809f4 108 || x == arg_pointer_rtx || x == pic_offset_table_rtx);
2c88418c
RS
109
110 case LO_SUM:
111 /* The operand 0 of a LO_SUM is considered constant
112 (in fact is it related specifically to operand 1). */
113 return rtx_varies_p (XEXP (x, 1));
e9a25f70
JL
114
115 default:
116 break;
2c88418c
RS
117 }
118
119 fmt = GET_RTX_FORMAT (code);
120 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
121 if (fmt[i] == 'e')
122 if (rtx_varies_p (XEXP (x, i)))
123 return 1;
124 return 0;
125}
126
127/* Return 0 if the use of X as an address in a MEM can cause a trap. */
128
e9a25f70 129static int
2c88418c
RS
130rtx_addr_can_trap_p (x)
131 register rtx x;
132{
133 register enum rtx_code code = GET_CODE (x);
134
135 switch (code)
136 {
137 case SYMBOL_REF:
138 case LABEL_REF:
139 /* SYMBOL_REF is problematic due to the possible presence of
140 a #pragma weak, but to say that loads from symbols can trap is
141 *very* costly. It's not at all clear what's best here. For
142 now, we ignore the impact of #pragma weak. */
143 return 0;
144
145 case REG:
146 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
b3b6c9b3
DE
147 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
148 || x == stack_pointer_rtx || x == arg_pointer_rtx);
2c88418c
RS
149
150 case CONST:
151 return rtx_addr_can_trap_p (XEXP (x, 0));
152
153 case PLUS:
154 /* An address is assumed not to trap if it is an address that can't
155 trap plus a constant integer. */
156 return (rtx_addr_can_trap_p (XEXP (x, 0))
157 || GET_CODE (XEXP (x, 1)) != CONST_INT);
158
159 case LO_SUM:
160 return rtx_addr_can_trap_p (XEXP (x, 1));
e9a25f70
JL
161
162 default:
163 break;
2c88418c
RS
164 }
165
166 /* If it isn't one of the case above, it can cause a trap. */
167 return 1;
168}
169
170/* Return 1 if X refers to a memory location whose address
171 cannot be compared reliably with constant addresses,
172 or if X refers to a BLKmode memory object. */
173
174int
175rtx_addr_varies_p (x)
176 rtx x;
177{
178 register enum rtx_code code;
179 register int i;
180 register char *fmt;
181
182 if (x == 0)
183 return 0;
184
185 code = GET_CODE (x);
186 if (code == MEM)
187 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0));
188
189 fmt = GET_RTX_FORMAT (code);
190 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
191 if (fmt[i] == 'e')
833c0b26
RK
192 {
193 if (rtx_addr_varies_p (XEXP (x, i)))
194 return 1;
195 }
196 else if (fmt[i] == 'E')
197 {
198 int j;
199 for (j = 0; j < XVECLEN (x, i); j++)
200 if (rtx_addr_varies_p (XVECEXP (x, i, j)))
201 return 1;
202 }
2c88418c
RS
203 return 0;
204}
205\f
206/* Return the value of the integer term in X, if one is apparent;
207 otherwise return 0.
208 Only obvious integer terms are detected.
209 This is used in cse.c with the `related_value' field.*/
210
c166a311 211HOST_WIDE_INT
2c88418c
RS
212get_integer_term (x)
213 rtx x;
214{
215 if (GET_CODE (x) == CONST)
216 x = XEXP (x, 0);
217
218 if (GET_CODE (x) == MINUS
219 && GET_CODE (XEXP (x, 1)) == CONST_INT)
220 return - INTVAL (XEXP (x, 1));
221 if (GET_CODE (x) == PLUS
222 && GET_CODE (XEXP (x, 1)) == CONST_INT)
223 return INTVAL (XEXP (x, 1));
224 return 0;
225}
226
227/* If X is a constant, return the value sans apparent integer term;
228 otherwise return 0.
229 Only obvious integer terms are detected. */
230
231rtx
232get_related_value (x)
233 rtx x;
234{
235 if (GET_CODE (x) != CONST)
236 return 0;
237 x = XEXP (x, 0);
238 if (GET_CODE (x) == PLUS
239 && GET_CODE (XEXP (x, 1)) == CONST_INT)
240 return XEXP (x, 0);
241 else if (GET_CODE (x) == MINUS
242 && GET_CODE (XEXP (x, 1)) == CONST_INT)
243 return XEXP (x, 0);
244 return 0;
245}
246\f
247/* Nonzero if register REG appears somewhere within IN.
248 Also works if REG is not a register; in this case it checks
249 for a subexpression of IN that is Lisp "equal" to REG. */
250
251int
252reg_mentioned_p (reg, in)
253 register rtx reg, in;
254{
255 register char *fmt;
256 register int i;
257 register enum rtx_code code;
258
259 if (in == 0)
260 return 0;
261
262 if (reg == in)
263 return 1;
264
265 if (GET_CODE (in) == LABEL_REF)
266 return reg == XEXP (in, 0);
267
268 code = GET_CODE (in);
269
270 switch (code)
271 {
272 /* Compare registers by number. */
273 case REG:
274 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg);
275
276 /* These codes have no constituent expressions
277 and are unique. */
278 case SCRATCH:
279 case CC0:
280 case PC:
281 return 0;
282
283 case CONST_INT:
284 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg);
285
286 case CONST_DOUBLE:
287 /* These are kept unique for a given value. */
288 return 0;
e9a25f70
JL
289
290 default:
291 break;
2c88418c
RS
292 }
293
294 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
295 return 1;
296
297 fmt = GET_RTX_FORMAT (code);
298
299 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
300 {
301 if (fmt[i] == 'E')
302 {
303 register int j;
304 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
305 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
306 return 1;
307 }
308 else if (fmt[i] == 'e'
309 && reg_mentioned_p (reg, XEXP (in, i)))
310 return 1;
311 }
312 return 0;
313}
314\f
315/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
316 no CODE_LABEL insn. */
317
318int
319no_labels_between_p (beg, end)
320 rtx beg, end;
321{
322 register rtx p;
323 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
324 if (GET_CODE (p) == CODE_LABEL)
325 return 0;
326 return 1;
327}
328
329/* Nonzero if register REG is used in an insn between
330 FROM_INSN and TO_INSN (exclusive of those two). */
331
332int
333reg_used_between_p (reg, from_insn, to_insn)
334 rtx reg, from_insn, to_insn;
335{
336 register rtx insn;
337
338 if (from_insn == to_insn)
339 return 0;
340
341 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
342 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
343 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
344 || (GET_CODE (insn) == CALL_INSN
345 && (find_reg_fusage (insn, USE, reg)
346 || find_reg_fusage (insn, CLOBBER, reg)))))
2c88418c
RS
347 return 1;
348 return 0;
349}
350\f
351/* Nonzero if the old value of X, a register, is referenced in BODY. If X
352 is entirely replaced by a new value and the only use is as a SET_DEST,
353 we do not consider it a reference. */
354
355int
356reg_referenced_p (x, body)
357 rtx x;
358 rtx body;
359{
360 int i;
361
362 switch (GET_CODE (body))
363 {
364 case SET:
365 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
366 return 1;
367
368 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
369 of a REG that occupies all of the REG, the insn references X if
370 it is mentioned in the destination. */
371 if (GET_CODE (SET_DEST (body)) != CC0
372 && GET_CODE (SET_DEST (body)) != PC
373 && GET_CODE (SET_DEST (body)) != REG
374 && ! (GET_CODE (SET_DEST (body)) == SUBREG
375 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG
376 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
377 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
378 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
379 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
380 && reg_overlap_mentioned_p (x, SET_DEST (body)))
381 return 1;
e9a25f70 382 return 0;
2c88418c
RS
383
384 case ASM_OPERANDS:
385 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
386 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
387 return 1;
e9a25f70 388 return 0;
2c88418c
RS
389
390 case CALL:
391 case USE:
392 return reg_overlap_mentioned_p (x, body);
393
394 case TRAP_IF:
395 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
396
2ac4fed0
RK
397 case UNSPEC:
398 case UNSPEC_VOLATILE:
2c88418c
RS
399 case PARALLEL:
400 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
401 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
402 return 1;
e9a25f70
JL
403 return 0;
404
405 default:
406 return 0;
2c88418c 407 }
2c88418c
RS
408}
409
410/* Nonzero if register REG is referenced in an insn between
411 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do
0f41302f 412 not count. */
2c88418c
RS
413
414int
415reg_referenced_between_p (reg, from_insn, to_insn)
416 rtx reg, from_insn, to_insn;
417{
418 register rtx insn;
419
420 if (from_insn == to_insn)
421 return 0;
422
423 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
424 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
425 && (reg_referenced_p (reg, PATTERN (insn))
426 || (GET_CODE (insn) == CALL_INSN
427 && find_reg_fusage (insn, USE, reg))))
2c88418c
RS
428 return 1;
429 return 0;
430}
431\f
432/* Nonzero if register REG is set or clobbered in an insn between
433 FROM_INSN and TO_INSN (exclusive of those two). */
434
435int
436reg_set_between_p (reg, from_insn, to_insn)
437 rtx reg, from_insn, to_insn;
438{
439 register rtx insn;
440
441 if (from_insn == to_insn)
442 return 0;
443
444 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
445 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
84607dc1 446 && reg_set_p (reg, insn))
2c88418c
RS
447 return 1;
448 return 0;
449}
450
451/* Internals of reg_set_between_p. */
452
453static rtx reg_set_reg;
454static int reg_set_flag;
455
5f91c709
RK
456static void
457reg_set_p_1 (x, pat)
d6f4ec51
KG
458 rtx x;
459 rtx pat ATTRIBUTE_UNUSED;
2c88418c
RS
460{
461 /* We don't want to return 1 if X is a MEM that contains a register
462 within REG_SET_REG. */
463
464 if ((GET_CODE (x) != MEM)
465 && reg_overlap_mentioned_p (reg_set_reg, x))
466 reg_set_flag = 1;
467}
468
469int
470reg_set_p (reg, insn)
471 rtx reg, insn;
472{
473 rtx body = insn;
474
475 /* We can be passed an insn or part of one. If we are passed an insn,
476 check if a side-effect of the insn clobbers REG. */
477 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
478 {
479 if (FIND_REG_INC_NOTE (insn, reg)
480 || (GET_CODE (insn) == CALL_INSN
481 /* We'd like to test call_used_regs here, but rtlanal.c can't
482 reference that variable due to its use in genattrtab. So
8f3e7a26
RK
483 we'll just be more conservative.
484
485 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE
486 information holds all clobbered registers. */
2c88418c
RS
487 && ((GET_CODE (reg) == REG
488 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
8f3e7a26
RK
489 || GET_CODE (reg) == MEM
490 || find_reg_fusage (insn, CLOBBER, reg))))
2c88418c
RS
491 return 1;
492
493 body = PATTERN (insn);
494 }
495
496 reg_set_reg = reg;
497 reg_set_flag = 0;
498 note_stores (body, reg_set_p_1);
499 return reg_set_flag;
500}
501
502/* Similar to reg_set_between_p, but check all registers in X. Return 0
503 only if none of them are modified between START and END. Return 1 if
504 X contains a MEM; this routine does not perform any memory aliasing. */
505
506int
507modified_between_p (x, start, end)
508 rtx x;
509 rtx start, end;
510{
511 enum rtx_code code = GET_CODE (x);
512 char *fmt;
f8163c92 513 int i, j;
2c88418c
RS
514
515 switch (code)
516 {
517 case CONST_INT:
518 case CONST_DOUBLE:
519 case CONST:
520 case SYMBOL_REF:
521 case LABEL_REF:
522 return 0;
523
524 case PC:
525 case CC0:
526 return 1;
527
528 case MEM:
529 /* If the memory is not constant, assume it is modified. If it is
530 constant, we still have to check the address. */
531 if (! RTX_UNCHANGING_P (x))
532 return 1;
533 break;
534
535 case REG:
536 return reg_set_between_p (x, start, end);
e9a25f70
JL
537
538 default:
539 break;
2c88418c
RS
540 }
541
542 fmt = GET_RTX_FORMAT (code);
543 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
f8163c92
RK
544 {
545 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
546 return 1;
547
548 if (fmt[i] == 'E')
549 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
550 if (modified_between_p (XVECEXP (x, i, j), start, end))
551 return 1;
552 }
553
554 return 0;
555}
556
557/* Similar to reg_set_p, but check all registers in X. Return 0 only if none
558 of them are modified in INSN. Return 1 if X contains a MEM; this routine
559 does not perform any memory aliasing. */
560
561int
562modified_in_p (x, insn)
563 rtx x;
564 rtx insn;
565{
566 enum rtx_code code = GET_CODE (x);
567 char *fmt;
568 int i, j;
569
570 switch (code)
571 {
572 case CONST_INT:
573 case CONST_DOUBLE:
574 case CONST:
575 case SYMBOL_REF:
576 case LABEL_REF:
577 return 0;
578
579 case PC:
580 case CC0:
2c88418c
RS
581 return 1;
582
f8163c92
RK
583 case MEM:
584 /* If the memory is not constant, assume it is modified. If it is
585 constant, we still have to check the address. */
586 if (! RTX_UNCHANGING_P (x))
587 return 1;
588 break;
589
590 case REG:
591 return reg_set_p (x, insn);
e9a25f70
JL
592
593 default:
594 break;
f8163c92
RK
595 }
596
597 fmt = GET_RTX_FORMAT (code);
598 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
599 {
600 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
601 return 1;
602
603 if (fmt[i] == 'E')
604 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
605 if (modified_in_p (XVECEXP (x, i, j), insn))
606 return 1;
607 }
608
2c88418c
RS
609 return 0;
610}
611\f
612/* Given an INSN, return a SET expression if this insn has only a single SET.
613 It may also have CLOBBERs, USEs, or SET whose output
614 will not be used, which we ignore. */
615
616rtx
617single_set (insn)
618 rtx insn;
619{
620 rtx set;
621 int i;
622
623 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
624 return 0;
625
626 if (GET_CODE (PATTERN (insn)) == SET)
627 return PATTERN (insn);
628
629 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
630 {
631 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++)
632 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
fb3ef382
RS
633 && (! find_reg_note (insn, REG_UNUSED,
634 SET_DEST (XVECEXP (PATTERN (insn), 0, i)))
635 || side_effects_p (XVECEXP (PATTERN (insn), 0, i))))
2c88418c
RS
636 {
637 if (set)
638 return 0;
639 else
640 set = XVECEXP (PATTERN (insn), 0, i);
641 }
642 return set;
643 }
644
645 return 0;
646}
647\f
648/* Return the last thing that X was assigned from before *PINSN. Verify that
649 the object is not modified up to VALID_TO. If it was, if we hit
650 a partial assignment to X, or hit a CODE_LABEL first, return X. If we
651 found an assignment, update *PINSN to point to it. */
652
653rtx
654find_last_value (x, pinsn, valid_to)
655 rtx x;
656 rtx *pinsn;
657 rtx valid_to;
658{
659 rtx p;
660
661 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL;
662 p = PREV_INSN (p))
663 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
664 {
665 rtx set = single_set (p);
c166a311 666 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
2c88418c
RS
667
668 if (set && rtx_equal_p (x, SET_DEST (set)))
669 {
670 rtx src = SET_SRC (set);
671
672 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
673 src = XEXP (note, 0);
674
675 if (! modified_between_p (src, PREV_INSN (p), valid_to)
676 /* Reject hard registers because we don't usually want
677 to use them; we'd rather use a pseudo. */
678 && ! (GET_CODE (src) == REG
679 && REGNO (src) < FIRST_PSEUDO_REGISTER))
680 {
681 *pinsn = p;
682 return src;
683 }
684 }
685
686 /* If set in non-simple way, we don't have a value. */
687 if (reg_set_p (x, p))
688 break;
689 }
690
691 return x;
692}
693\f
694/* Return nonzero if register in range [REGNO, ENDREGNO)
695 appears either explicitly or implicitly in X
696 other than being stored into.
697
698 References contained within the substructure at LOC do not count.
699 LOC may be zero, meaning don't ignore anything. */
700
701int
702refers_to_regno_p (regno, endregno, x, loc)
703 int regno, endregno;
704 rtx x;
705 rtx *loc;
706{
707 register int i;
708 register RTX_CODE code;
709 register char *fmt;
710
711 repeat:
712 /* The contents of a REG_NONNEG note is always zero, so we must come here
713 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
714 if (x == 0)
715 return 0;
716
717 code = GET_CODE (x);
718
719 switch (code)
720 {
721 case REG:
722 i = REGNO (x);
f8163c92
RK
723
724 /* If we modifying the stack, frame, or argument pointer, it will
725 clobber a virtual register. In fact, we could be more precise,
726 but it isn't worth it. */
727 if ((i == STACK_POINTER_REGNUM
728#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
729 || i == ARG_POINTER_REGNUM
730#endif
731 || i == FRAME_POINTER_REGNUM)
732 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
733 return 1;
734
2c88418c
RS
735 return (endregno > i
736 && regno < i + (i < FIRST_PSEUDO_REGISTER
737 ? HARD_REGNO_NREGS (i, GET_MODE (x))
738 : 1));
739
740 case SUBREG:
741 /* If this is a SUBREG of a hard reg, we can see exactly which
742 registers are being modified. Otherwise, handle normally. */
743 if (GET_CODE (SUBREG_REG (x)) == REG
744 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
745 {
746 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
747 int inner_endregno
748 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
749 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
750
751 return endregno > inner_regno && regno < inner_endregno;
752 }
753 break;
754
755 case CLOBBER:
756 case SET:
757 if (&SET_DEST (x) != loc
758 /* Note setting a SUBREG counts as referring to the REG it is in for
759 a pseudo but not for hard registers since we can
760 treat each word individually. */
761 && ((GET_CODE (SET_DEST (x)) == SUBREG
762 && loc != &SUBREG_REG (SET_DEST (x))
763 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
764 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
765 && refers_to_regno_p (regno, endregno,
766 SUBREG_REG (SET_DEST (x)), loc))
767 || (GET_CODE (SET_DEST (x)) != REG
768 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
769 return 1;
770
771 if (code == CLOBBER || loc == &SET_SRC (x))
772 return 0;
773 x = SET_SRC (x);
774 goto repeat;
e9a25f70
JL
775
776 default:
777 break;
2c88418c
RS
778 }
779
780 /* X does not match, so try its subexpressions. */
781
782 fmt = GET_RTX_FORMAT (code);
783 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
784 {
785 if (fmt[i] == 'e' && loc != &XEXP (x, i))
786 {
787 if (i == 0)
788 {
789 x = XEXP (x, 0);
790 goto repeat;
791 }
792 else
793 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
794 return 1;
795 }
796 else if (fmt[i] == 'E')
797 {
798 register int j;
799 for (j = XVECLEN (x, i) - 1; j >=0; j--)
800 if (loc != &XVECEXP (x, i, j)
801 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
802 return 1;
803 }
804 }
805 return 0;
806}
807
808/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
809 we check if any register number in X conflicts with the relevant register
810 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
811 contains a MEM (we don't bother checking for memory addresses that can't
812 conflict because we expect this to be a rare case. */
813
814int
815reg_overlap_mentioned_p (x, in)
816 rtx x, in;
817{
818 int regno, endregno;
819
820 if (GET_CODE (x) == SUBREG)
821 {
822 regno = REGNO (SUBREG_REG (x));
823 if (regno < FIRST_PSEUDO_REGISTER)
824 regno += SUBREG_WORD (x);
825 }
826 else if (GET_CODE (x) == REG)
827 regno = REGNO (x);
828 else if (CONSTANT_P (x))
829 return 0;
830 else if (GET_CODE (x) == MEM)
831 {
832 char *fmt;
833 int i;
834
835 if (GET_CODE (in) == MEM)
836 return 1;
837
838 fmt = GET_RTX_FORMAT (GET_CODE (in));
839
840 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
841 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
842 return 1;
843
844 return 0;
845 }
846 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
847 || GET_CODE (x) == CC0)
848 return reg_mentioned_p (x, in);
849 else
850 abort ();
851
852 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
853 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
854
c166a311 855 return refers_to_regno_p (regno, endregno, in, NULL_PTR);
2c88418c
RS
856}
857\f
858/* Used for communications between the next few functions. */
859
860static int reg_set_last_unknown;
861static rtx reg_set_last_value;
862static int reg_set_last_first_regno, reg_set_last_last_regno;
863
864/* Called via note_stores from reg_set_last. */
865
866static void
867reg_set_last_1 (x, pat)
868 rtx x;
869 rtx pat;
870{
871 int first, last;
872
873 /* If X is not a register, or is not one in the range we care
874 about, ignore. */
875 if (GET_CODE (x) != REG)
876 return;
877
878 first = REGNO (x);
879 last = first + (first < FIRST_PSEUDO_REGISTER
880 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1);
881
882 if (first >= reg_set_last_last_regno
883 || last <= reg_set_last_first_regno)
884 return;
885
886 /* If this is a CLOBBER or is some complex LHS, or doesn't modify
887 exactly the registers we care about, show we don't know the value. */
888 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x
889 || first != reg_set_last_first_regno
890 || last != reg_set_last_last_regno)
891 reg_set_last_unknown = 1;
892 else
893 reg_set_last_value = SET_SRC (pat);
894}
895
896/* Return the last value to which REG was set prior to INSN. If we can't
897 find it easily, return 0.
898
4d9d7d9d
RK
899 We only return a REG, SUBREG, or constant because it is too hard to
900 check if a MEM remains unchanged. */
2c88418c
RS
901
902rtx
903reg_set_last (x, insn)
904 rtx x;
905 rtx insn;
906{
907 rtx orig_insn = insn;
908
909 reg_set_last_first_regno = REGNO (x);
910
911 reg_set_last_last_regno
912 = reg_set_last_first_regno
913 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER
914 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1);
915
916 reg_set_last_unknown = 0;
917 reg_set_last_value = 0;
918
919 /* Scan backwards until reg_set_last_1 changed one of the above flags.
920 Stop when we reach a label or X is a hard reg and we reach a
921 CALL_INSN (if reg_set_last_last_regno is a hard reg).
922
923 If we find a set of X, ensure that its SET_SRC remains unchanged. */
924
6b02c316
RS
925 /* We compare with <= here, because reg_set_last_last_regno
926 is actually the number of the first reg *not* in X. */
2c88418c
RS
927 for (;
928 insn && GET_CODE (insn) != CODE_LABEL
929 && ! (GET_CODE (insn) == CALL_INSN
930 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER);
931 insn = PREV_INSN (insn))
932 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
933 {
934 note_stores (PATTERN (insn), reg_set_last_1);
935 if (reg_set_last_unknown)
936 return 0;
937 else if (reg_set_last_value)
938 {
939 if (CONSTANT_P (reg_set_last_value)
4d9d7d9d
RK
940 || ((GET_CODE (reg_set_last_value) == REG
941 || GET_CODE (reg_set_last_value) == SUBREG)
2c88418c 942 && ! reg_set_between_p (reg_set_last_value,
ce9c8df2 943 insn, orig_insn)))
2c88418c
RS
944 return reg_set_last_value;
945 else
946 return 0;
947 }
948 }
949
950 return 0;
951}
952\f
935ddcf5 953/* This is 1 until after the rtl generation pass. */
2c88418c
RS
954int rtx_equal_function_value_matters;
955
956/* Return 1 if X and Y are identical-looking rtx's.
957 This is the Lisp function EQUAL for rtx arguments. */
958
959int
960rtx_equal_p (x, y)
961 rtx x, y;
962{
963 register int i;
964 register int j;
965 register enum rtx_code code;
966 register char *fmt;
967
968 if (x == y)
969 return 1;
970 if (x == 0 || y == 0)
971 return 0;
972
973 code = GET_CODE (x);
974 /* Rtx's of different codes cannot be equal. */
975 if (code != GET_CODE (y))
976 return 0;
977
978 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
979 (REG:SI x) and (REG:HI x) are NOT equivalent. */
980
981 if (GET_MODE (x) != GET_MODE (y))
982 return 0;
983
984 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
985
986 if (code == REG)
987 /* Until rtl generation is complete, don't consider a reference to the
988 return register of the current function the same as the return from a
989 called function. This eases the job of function integration. Once the
990 distinction is no longer needed, they can be considered equivalent. */
991 return (REGNO (x) == REGNO (y)
992 && (! rtx_equal_function_value_matters
993 || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y)));
994 else if (code == LABEL_REF)
995 return XEXP (x, 0) == XEXP (y, 0);
996 else if (code == SYMBOL_REF)
997 return XSTR (x, 0) == XSTR (y, 0);
998 else if (code == SCRATCH || code == CONST_DOUBLE)
999 return 0;
1000
1001 /* Compare the elements. If any pair of corresponding elements
1002 fail to match, return 0 for the whole things. */
1003
1004 fmt = GET_RTX_FORMAT (code);
1005 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1006 {
1007 switch (fmt[i])
1008 {
c166a311
CH
1009 case 'w':
1010 if (XWINT (x, i) != XWINT (y, i))
1011 return 0;
1012 break;
1013
2c88418c
RS
1014 case 'n':
1015 case 'i':
1016 if (XINT (x, i) != XINT (y, i))
1017 return 0;
1018 break;
1019
1020 case 'V':
1021 case 'E':
1022 /* Two vectors must have the same length. */
1023 if (XVECLEN (x, i) != XVECLEN (y, i))
1024 return 0;
1025
1026 /* And the corresponding elements must match. */
1027 for (j = 0; j < XVECLEN (x, i); j++)
1028 if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
1029 return 0;
1030 break;
1031
1032 case 'e':
1033 if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0)
1034 return 0;
1035 break;
1036
1037 case 'S':
1038 case 's':
1039 if (strcmp (XSTR (x, i), XSTR (y, i)))
1040 return 0;
1041 break;
1042
1043 case 'u':
1044 /* These are just backpointers, so they don't matter. */
1045 break;
1046
1047 case '0':
1048 break;
1049
1050 /* It is believed that rtx's at this level will never
1051 contain anything but integers and other rtx's,
1052 except for within LABEL_REFs and SYMBOL_REFs. */
1053 default:
1054 abort ();
1055 }
1056 }
1057 return 1;
1058}
1059\f
1060/* Call FUN on each register or MEM that is stored into or clobbered by X.
1061 (X would be the pattern of an insn).
1062 FUN receives two arguments:
1063 the REG, MEM, CC0 or PC being stored in or clobbered,
1064 the SET or CLOBBER rtx that does the store.
1065
1066 If the item being stored in or clobbered is a SUBREG of a hard register,
1067 the SUBREG will be passed. */
1068
1069void
1070note_stores (x, fun)
1071 register rtx x;
1072 void (*fun) ();
1073{
1074 if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER))
1075 {
1076 register rtx dest = SET_DEST (x);
1077 while ((GET_CODE (dest) == SUBREG
1078 && (GET_CODE (SUBREG_REG (dest)) != REG
1079 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1080 || GET_CODE (dest) == ZERO_EXTRACT
1081 || GET_CODE (dest) == SIGN_EXTRACT
1082 || GET_CODE (dest) == STRICT_LOW_PART)
1083 dest = XEXP (dest, 0);
1084 (*fun) (dest, x);
1085 }
1086 else if (GET_CODE (x) == PARALLEL)
1087 {
1088 register int i;
1089 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1090 {
1091 register rtx y = XVECEXP (x, 0, i);
1092 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER)
1093 {
1094 register rtx dest = SET_DEST (y);
1095 while ((GET_CODE (dest) == SUBREG
1096 && (GET_CODE (SUBREG_REG (dest)) != REG
1097 || (REGNO (SUBREG_REG (dest))
1098 >= FIRST_PSEUDO_REGISTER)))
1099 || GET_CODE (dest) == ZERO_EXTRACT
1100 || GET_CODE (dest) == SIGN_EXTRACT
1101 || GET_CODE (dest) == STRICT_LOW_PART)
1102 dest = XEXP (dest, 0);
1103 (*fun) (dest, y);
1104 }
1105 }
1106 }
1107}
1108\f
1109/* Return nonzero if X's old contents don't survive after INSN.
1110 This will be true if X is (cc0) or if X is a register and
1111 X dies in INSN or because INSN entirely sets X.
1112
1113 "Entirely set" means set directly and not through a SUBREG,
1114 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1115 Likewise, REG_INC does not count.
1116
1117 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1118 but for this use that makes no difference, since regs don't overlap
1119 during their lifetimes. Therefore, this function may be used
1120 at any time after deaths have been computed (in flow.c).
1121
1122 If REG is a hard reg that occupies multiple machine registers, this
1123 function will only return 1 if each of those registers will be replaced
1124 by INSN. */
1125
1126int
1127dead_or_set_p (insn, x)
1128 rtx insn;
1129 rtx x;
1130{
1131 register int regno, last_regno;
1132 register int i;
1133
1134 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1135 if (GET_CODE (x) == CC0)
1136 return 1;
1137
1138 if (GET_CODE (x) != REG)
1139 abort ();
1140
1141 regno = REGNO (x);
1142 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1143 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1);
1144
1145 for (i = regno; i <= last_regno; i++)
1146 if (! dead_or_set_regno_p (insn, i))
1147 return 0;
1148
1149 return 1;
1150}
1151
1152/* Utility function for dead_or_set_p to check an individual register. Also
1153 called from flow.c. */
1154
1155int
1156dead_or_set_regno_p (insn, test_regno)
1157 rtx insn;
1158 int test_regno;
1159{
1160 int regno, endregno;
1161 rtx link;
1162
21ca87b8
MS
1163 /* REG_READ notes are not normally maintained after reload, so we
1164 ignore them if the are invalid. */
1165 if (! reload_completed
1166#ifdef PRESERVE_DEATH_INFO_REGNO_P
1167 || PRESERVE_DEATH_INFO_REGNO_P (test_regno)
1168#endif
1169 )
2c88418c 1170 {
21ca87b8
MS
1171 /* See if there is a death note for something that includes
1172 TEST_REGNO. */
1173 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1174 {
1175 if (REG_NOTE_KIND (link) != REG_DEAD
1176 || GET_CODE (XEXP (link, 0)) != REG)
1177 continue;
2c88418c 1178
21ca87b8
MS
1179 regno = REGNO (XEXP (link, 0));
1180 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1181 : regno + HARD_REGNO_NREGS (regno,
1182 GET_MODE (XEXP (link, 0))));
2c88418c 1183
21ca87b8
MS
1184 if (test_regno >= regno && test_regno < endregno)
1185 return 1;
1186 }
2c88418c
RS
1187 }
1188
8f3e7a26
RK
1189 if (GET_CODE (insn) == CALL_INSN
1190 && find_regno_fusage (insn, CLOBBER, test_regno))
1191 return 1;
1192
2c88418c
RS
1193 if (GET_CODE (PATTERN (insn)) == SET)
1194 {
1195 rtx dest = SET_DEST (PATTERN (insn));
1196
1197 /* A value is totally replaced if it is the destination or the
1198 destination is a SUBREG of REGNO that does not change the number of
1199 words in it. */
1200 if (GET_CODE (dest) == SUBREG
1201 && (((GET_MODE_SIZE (GET_MODE (dest))
1202 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1203 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1204 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1205 dest = SUBREG_REG (dest);
1206
1207 if (GET_CODE (dest) != REG)
1208 return 0;
1209
1210 regno = REGNO (dest);
1211 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1212 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1213
1214 return (test_regno >= regno && test_regno < endregno);
1215 }
1216 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1217 {
1218 register int i;
1219
1220 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
1221 {
1222 rtx body = XVECEXP (PATTERN (insn), 0, i);
1223
1224 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1225 {
1226 rtx dest = SET_DEST (body);
1227
1228 if (GET_CODE (dest) == SUBREG
1229 && (((GET_MODE_SIZE (GET_MODE (dest))
1230 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1231 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1232 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1233 dest = SUBREG_REG (dest);
1234
1235 if (GET_CODE (dest) != REG)
1236 continue;
1237
1238 regno = REGNO (dest);
1239 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1240 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1241
1242 if (test_regno >= regno && test_regno < endregno)
1243 return 1;
1244 }
1245 }
1246 }
1247
1248 return 0;
1249}
1250
1251/* Return the reg-note of kind KIND in insn INSN, if there is one.
1252 If DATUM is nonzero, look for one whose datum is DATUM. */
1253
1254rtx
1255find_reg_note (insn, kind, datum)
1256 rtx insn;
1257 enum reg_note kind;
1258 rtx datum;
1259{
1260 register rtx link;
1261
ae78d276
MM
1262 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1263 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1264 return 0;
1265
2c88418c
RS
1266 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1267 if (REG_NOTE_KIND (link) == kind
1268 && (datum == 0 || datum == XEXP (link, 0)))
1269 return link;
1270 return 0;
1271}
1272
1273/* Return the reg-note of kind KIND in insn INSN which applies to register
99309f3b
RK
1274 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1275 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1276 it might be the case that the note overlaps REGNO. */
2c88418c
RS
1277
1278rtx
1279find_regno_note (insn, kind, regno)
1280 rtx insn;
1281 enum reg_note kind;
1282 int regno;
1283{
1284 register rtx link;
1285
ae78d276
MM
1286 /* Ignore anything that is not an INSN, JUMP_INSN or CALL_INSN. */
1287 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
1288 return 0;
1289
2c88418c
RS
1290 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1291 if (REG_NOTE_KIND (link) == kind
1292 /* Verify that it is a register, so that scratch and MEM won't cause a
1293 problem here. */
1294 && GET_CODE (XEXP (link, 0)) == REG
99309f3b
RK
1295 && REGNO (XEXP (link, 0)) <= regno
1296 && ((REGNO (XEXP (link, 0))
1297 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1298 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
1299 GET_MODE (XEXP (link, 0)))))
1300 > regno))
2c88418c
RS
1301 return link;
1302 return 0;
1303}
8f3e7a26
RK
1304
1305/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1306 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1307
1308int
1309find_reg_fusage (insn, code, datum)
1310 rtx insn;
1311 enum rtx_code code;
1312 rtx datum;
1313{
1314 /* If it's not a CALL_INSN, it can't possibly have a
1315 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1316 if (GET_CODE (insn) != CALL_INSN)
1317 return 0;
1318
1319 if (! datum)
1320 abort();
1321
1322 if (GET_CODE (datum) != REG)
1323 {
1324 register rtx link;
1325
1326 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1327 link;
1328 link = XEXP (link, 1))
1329 if (GET_CODE (XEXP (link, 0)) == code
1330 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0))))
1331 return 1;
1332 }
1333 else
1334 {
1335 register int regno = REGNO (datum);
1336
1337 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1338 to pseudo registers, so don't bother checking. */
1339
1340 if (regno < FIRST_PSEUDO_REGISTER)
1341 {
1342 int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
1343 int i;
1344
1345 for (i = regno; i < end_regno; i++)
1346 if (find_regno_fusage (insn, code, i))
1347 return 1;
1348 }
1349 }
1350
1351 return 0;
1352}
1353
1354/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1355 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1356
1357int
1358find_regno_fusage (insn, code, regno)
1359 rtx insn;
1360 enum rtx_code code;
1361 int regno;
1362{
1363 register rtx link;
1364
1365 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1366 to pseudo registers, so don't bother checking. */
1367
1368 if (regno >= FIRST_PSEUDO_REGISTER
1369 || GET_CODE (insn) != CALL_INSN )
1370 return 0;
1371
1372 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1373 {
1374 register int regnote;
1375 register rtx op;
1376
1377 if (GET_CODE (op = XEXP (link, 0)) == code
1378 && GET_CODE (SET_DEST (op)) == REG
1379 && (regnote = REGNO (SET_DEST (op))) <= regno
1380 && regnote
1381 + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op)))
1382 > regno)
1383 return 1;
1384 }
1385
1386 return 0;
1387}
2c88418c
RS
1388\f
1389/* Remove register note NOTE from the REG_NOTES of INSN. */
1390
1391void
1392remove_note (insn, note)
1393 register rtx note;
1394 register rtx insn;
1395{
1396 register rtx link;
1397
1398 if (REG_NOTES (insn) == note)
1399 {
1400 REG_NOTES (insn) = XEXP (note, 1);
1401 return;
1402 }
1403
1404 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1405 if (XEXP (link, 1) == note)
1406 {
1407 XEXP (link, 1) = XEXP (note, 1);
1408 return;
1409 }
1410
1411 abort ();
1412}
1413\f
2b067faf
RS
1414/* Nonzero if X contains any volatile instructions. These are instructions
1415 which may cause unpredictable machine state instructions, and thus no
1416 instructions should be moved or combined across them. This includes
1417 only volatile asms and UNSPEC_VOLATILE instructions. */
1418
1419int
1420volatile_insn_p (x)
1421 rtx x;
1422{
1423 register RTX_CODE code;
1424
1425 code = GET_CODE (x);
1426 switch (code)
1427 {
1428 case LABEL_REF:
1429 case SYMBOL_REF:
1430 case CONST_INT:
1431 case CONST:
1432 case CONST_DOUBLE:
1433 case CC0:
1434 case PC:
1435 case REG:
1436 case SCRATCH:
1437 case CLOBBER:
1438 case ASM_INPUT:
1439 case ADDR_VEC:
1440 case ADDR_DIFF_VEC:
1441 case CALL:
1442 case MEM:
1443 return 0;
1444
1445 case UNSPEC_VOLATILE:
1446 /* case TRAP_IF: This isn't clear yet. */
1447 return 1;
1448
1449 case ASM_OPERANDS:
1450 if (MEM_VOLATILE_P (x))
1451 return 1;
e9a25f70
JL
1452
1453 default:
1454 break;
2b067faf
RS
1455 }
1456
1457 /* Recursively scan the operands of this expression. */
1458
1459 {
1460 register char *fmt = GET_RTX_FORMAT (code);
1461 register int i;
1462
1463 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1464 {
1465 if (fmt[i] == 'e')
1466 {
31001f72 1467 if (volatile_insn_p (XEXP (x, i)))
2b067faf
RS
1468 return 1;
1469 }
1470 if (fmt[i] == 'E')
1471 {
1472 register int j;
1473 for (j = 0; j < XVECLEN (x, i); j++)
31001f72 1474 if (volatile_insn_p (XVECEXP (x, i, j)))
2b067faf
RS
1475 return 1;
1476 }
1477 }
1478 }
1479 return 0;
1480}
1481
2c88418c 1482/* Nonzero if X contains any volatile memory references
2ac4fed0 1483 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2c88418c
RS
1484
1485int
1486volatile_refs_p (x)
1487 rtx x;
1488{
1489 register RTX_CODE code;
1490
1491 code = GET_CODE (x);
1492 switch (code)
1493 {
1494 case LABEL_REF:
1495 case SYMBOL_REF:
1496 case CONST_INT:
1497 case CONST:
1498 case CONST_DOUBLE:
1499 case CC0:
1500 case PC:
1501 case REG:
1502 case SCRATCH:
1503 case CLOBBER:
1504 case ASM_INPUT:
1505 case ADDR_VEC:
1506 case ADDR_DIFF_VEC:
1507 return 0;
1508
1509 case CALL:
2ac4fed0 1510 case UNSPEC_VOLATILE:
2c88418c
RS
1511 /* case TRAP_IF: This isn't clear yet. */
1512 return 1;
1513
1514 case MEM:
1515 case ASM_OPERANDS:
1516 if (MEM_VOLATILE_P (x))
1517 return 1;
e9a25f70
JL
1518
1519 default:
1520 break;
2c88418c
RS
1521 }
1522
1523 /* Recursively scan the operands of this expression. */
1524
1525 {
1526 register char *fmt = GET_RTX_FORMAT (code);
1527 register int i;
1528
1529 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1530 {
1531 if (fmt[i] == 'e')
1532 {
1533 if (volatile_refs_p (XEXP (x, i)))
1534 return 1;
1535 }
1536 if (fmt[i] == 'E')
1537 {
1538 register int j;
1539 for (j = 0; j < XVECLEN (x, i); j++)
1540 if (volatile_refs_p (XVECEXP (x, i, j)))
1541 return 1;
1542 }
1543 }
1544 }
1545 return 0;
1546}
1547
1548/* Similar to above, except that it also rejects register pre- and post-
1549 incrementing. */
1550
1551int
1552side_effects_p (x)
1553 rtx x;
1554{
1555 register RTX_CODE code;
1556
1557 code = GET_CODE (x);
1558 switch (code)
1559 {
1560 case LABEL_REF:
1561 case SYMBOL_REF:
1562 case CONST_INT:
1563 case CONST:
1564 case CONST_DOUBLE:
1565 case CC0:
1566 case PC:
1567 case REG:
1568 case SCRATCH:
1569 case ASM_INPUT:
1570 case ADDR_VEC:
1571 case ADDR_DIFF_VEC:
1572 return 0;
1573
1574 case CLOBBER:
1575 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
1576 when some combination can't be done. If we see one, don't think
1577 that we can simplify the expression. */
1578 return (GET_MODE (x) != VOIDmode);
1579
1580 case PRE_INC:
1581 case PRE_DEC:
1582 case POST_INC:
1583 case POST_DEC:
1584 case CALL:
2ac4fed0 1585 case UNSPEC_VOLATILE:
2c88418c
RS
1586 /* case TRAP_IF: This isn't clear yet. */
1587 return 1;
1588
1589 case MEM:
1590 case ASM_OPERANDS:
1591 if (MEM_VOLATILE_P (x))
1592 return 1;
e9a25f70
JL
1593
1594 default:
1595 break;
2c88418c
RS
1596 }
1597
1598 /* Recursively scan the operands of this expression. */
1599
1600 {
1601 register char *fmt = GET_RTX_FORMAT (code);
1602 register int i;
1603
1604 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1605 {
1606 if (fmt[i] == 'e')
1607 {
1608 if (side_effects_p (XEXP (x, i)))
1609 return 1;
1610 }
1611 if (fmt[i] == 'E')
1612 {
1613 register int j;
1614 for (j = 0; j < XVECLEN (x, i); j++)
1615 if (side_effects_p (XVECEXP (x, i, j)))
1616 return 1;
1617 }
1618 }
1619 }
1620 return 0;
1621}
1622\f
1623/* Return nonzero if evaluating rtx X might cause a trap. */
1624
1625int
1626may_trap_p (x)
1627 rtx x;
1628{
1629 int i;
1630 enum rtx_code code;
1631 char *fmt;
1632
1633 if (x == 0)
1634 return 0;
1635 code = GET_CODE (x);
1636 switch (code)
1637 {
1638 /* Handle these cases quickly. */
1639 case CONST_INT:
1640 case CONST_DOUBLE:
1641 case SYMBOL_REF:
1642 case LABEL_REF:
1643 case CONST:
1644 case PC:
1645 case CC0:
1646 case REG:
1647 case SCRATCH:
1648 return 0;
1649
1650 /* Conditional trap can trap! */
2ac4fed0 1651 case UNSPEC_VOLATILE:
2c88418c
RS
1652 case TRAP_IF:
1653 return 1;
1654
1655 /* Memory ref can trap unless it's a static var or a stack slot. */
1656 case MEM:
1657 return rtx_addr_can_trap_p (XEXP (x, 0));
1658
1659 /* Division by a non-constant might trap. */
1660 case DIV:
1661 case MOD:
1662 case UDIV:
1663 case UMOD:
e9a25f70
JL
1664 if (! CONSTANT_P (XEXP (x, 1))
1665 || GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
2c88418c
RS
1666 return 1;
1667 /* This was const0_rtx, but by not using that,
1668 we can link this file into other programs. */
1669 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
1670 return 1;
e9a25f70
JL
1671 break;
1672
b278301b
RK
1673 case EXPR_LIST:
1674 /* An EXPR_LIST is used to represent a function call. This
1675 certainly may trap. */
1676 return 1;
e9a25f70 1677
2c88418c
RS
1678 default:
1679 /* Any floating arithmetic may trap. */
1680 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1681 return 1;
1682 }
1683
1684 fmt = GET_RTX_FORMAT (code);
1685 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1686 {
1687 if (fmt[i] == 'e')
1688 {
1689 if (may_trap_p (XEXP (x, i)))
1690 return 1;
1691 }
1692 else if (fmt[i] == 'E')
1693 {
1694 register int j;
1695 for (j = 0; j < XVECLEN (x, i); j++)
1696 if (may_trap_p (XVECEXP (x, i, j)))
1697 return 1;
1698 }
1699 }
1700 return 0;
1701}
1702\f
1703/* Return nonzero if X contains a comparison that is not either EQ or NE,
1704 i.e., an inequality. */
1705
1706int
1707inequality_comparisons_p (x)
1708 rtx x;
1709{
1710 register char *fmt;
1711 register int len, i;
1712 register enum rtx_code code = GET_CODE (x);
1713
1714 switch (code)
1715 {
1716 case REG:
1717 case SCRATCH:
1718 case PC:
1719 case CC0:
1720 case CONST_INT:
1721 case CONST_DOUBLE:
1722 case CONST:
1723 case LABEL_REF:
1724 case SYMBOL_REF:
1725 return 0;
1726
1727 case LT:
1728 case LTU:
1729 case GT:
1730 case GTU:
1731 case LE:
1732 case LEU:
1733 case GE:
1734 case GEU:
1735 return 1;
e9a25f70
JL
1736
1737 default:
1738 break;
2c88418c
RS
1739 }
1740
1741 len = GET_RTX_LENGTH (code);
1742 fmt = GET_RTX_FORMAT (code);
1743
1744 for (i = 0; i < len; i++)
1745 {
1746 if (fmt[i] == 'e')
1747 {
1748 if (inequality_comparisons_p (XEXP (x, i)))
1749 return 1;
1750 }
1751 else if (fmt[i] == 'E')
1752 {
1753 register int j;
1754 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1755 if (inequality_comparisons_p (XVECEXP (x, i, j)))
1756 return 1;
1757 }
1758 }
1759
1760 return 0;
1761}
1762\f
1763/* Replace any occurrence of FROM in X with TO.
1764
1765 Note that copying is not done so X must not be shared unless all copies
1766 are to be modified. */
1767
1768rtx
1769replace_rtx (x, from, to)
1770 rtx x, from, to;
1771{
1772 register int i, j;
1773 register char *fmt;
1774
1775 if (x == from)
1776 return to;
1777
1778 /* Allow this function to make replacements in EXPR_LISTs. */
1779 if (x == 0)
1780 return 0;
1781
1782 fmt = GET_RTX_FORMAT (GET_CODE (x));
1783 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
1784 {
1785 if (fmt[i] == 'e')
1786 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
1787 else if (fmt[i] == 'E')
1788 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1789 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
1790 }
1791
1792 return x;
1793}
1794\f
1795/* Throughout the rtx X, replace many registers according to REG_MAP.
1796 Return the replacement for X (which may be X with altered contents).
1797 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
1798 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
1799
1800 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
1801 should not be mapped to pseudos or vice versa since validate_change
1802 is not called.
1803
1804 If REPLACE_DEST is 1, replacements are also done in destinations;
1805 otherwise, only sources are replaced. */
1806
1807rtx
1808replace_regs (x, reg_map, nregs, replace_dest)
1809 rtx x;
1810 rtx *reg_map;
1811 int nregs;
1812 int replace_dest;
1813{
1814 register enum rtx_code code;
1815 register int i;
1816 register char *fmt;
1817
1818 if (x == 0)
1819 return x;
1820
1821 code = GET_CODE (x);
1822 switch (code)
1823 {
1824 case SCRATCH:
1825 case PC:
1826 case CC0:
1827 case CONST_INT:
1828 case CONST_DOUBLE:
1829 case CONST:
1830 case SYMBOL_REF:
1831 case LABEL_REF:
1832 return x;
1833
1834 case REG:
1835 /* Verify that the register has an entry before trying to access it. */
1836 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
3eb8f14c
JW
1837 {
1838 /* SUBREGs can't be shared. Always return a copy to ensure that if
1839 this replacement occurs more than once then each instance will
1840 get distinct rtx. */
1841 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
1842 return copy_rtx (reg_map[REGNO (x)]);
1843 return reg_map[REGNO (x)];
1844 }
2c88418c
RS
1845 return x;
1846
1847 case SUBREG:
1848 /* Prevent making nested SUBREGs. */
1849 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs
1850 && reg_map[REGNO (SUBREG_REG (x))] != 0
1851 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
1852 {
1853 rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
1854 rtx map_inner = SUBREG_REG (map_val);
1855
1856 if (GET_MODE (x) == GET_MODE (map_inner))
1857 return map_inner;
1858 else
1859 {
1860 /* We cannot call gen_rtx here since we may be linked with
1861 genattrtab.c. */
1862 /* Let's try clobbering the incoming SUBREG and see
1863 if this is really safe. */
1864 SUBREG_REG (x) = map_inner;
1865 SUBREG_WORD (x) += SUBREG_WORD (map_val);
1866 return x;
1867#if 0
1868 rtx new = rtx_alloc (SUBREG);
1869 PUT_MODE (new, GET_MODE (x));
1870 SUBREG_REG (new) = map_inner;
1871 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val);
1872#endif
1873 }
1874 }
1875 break;
1876
1877 case SET:
1878 if (replace_dest)
1879 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
1880
1881 else if (GET_CODE (SET_DEST (x)) == MEM
1882 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
1883 /* Even if we are not to replace destinations, replace register if it
1884 is CONTAINED in destination (destination is memory or
1885 STRICT_LOW_PART). */
1886 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
1887 reg_map, nregs, 0);
1888 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
1889 /* Similarly, for ZERO_EXTRACT we replace all operands. */
1890 break;
1891
1892 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
1893 return x;
e9a25f70
JL
1894
1895 default:
1896 break;
2c88418c
RS
1897 }
1898
1899 fmt = GET_RTX_FORMAT (code);
1900 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1901 {
1902 if (fmt[i] == 'e')
1903 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
1904 if (fmt[i] == 'E')
1905 {
1906 register int j;
1907 for (j = 0; j < XVECLEN (x, i); j++)
1908 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
1909 nregs, replace_dest);
1910 }
1911 }
1912 return x;
1913}
2a1777af 1914
2a1777af
JL
1915/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is
1916 not in the constant pool and not in the condition of an IF_THEN_ELSE. */
1917
1918static int
1919jmp_uses_reg_or_mem (x)
1920 rtx x;
1921{
1922 enum rtx_code code = GET_CODE (x);
1923 int i, j;
1924 char *fmt;
1925
1926 switch (code)
1927 {
1928 case CONST:
1929 case LABEL_REF:
1930 case PC:
1931 return 0;
1932
1933 case REG:
1934 return 1;
1935
1936 case MEM:
1937 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
1938 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
1939
1940 case IF_THEN_ELSE:
1941 return (jmp_uses_reg_or_mem (XEXP (x, 1))
1942 || jmp_uses_reg_or_mem (XEXP (x, 2)));
1943
1944 case PLUS: case MINUS: case MULT:
1945 return (jmp_uses_reg_or_mem (XEXP (x, 0))
1946 || jmp_uses_reg_or_mem (XEXP (x, 1)));
1d300e19
KG
1947
1948 default:
1949 break;
2a1777af
JL
1950 }
1951
1952 fmt = GET_RTX_FORMAT (code);
1953 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1954 {
1955 if (fmt[i] == 'e'
1956 && jmp_uses_reg_or_mem (XEXP (x, i)))
1957 return 1;
1958
1959 if (fmt[i] == 'E')
1960 for (j = 0; j < XVECLEN (x, i); j++)
1961 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
1962 return 1;
1963 }
1964
1965 return 0;
1966}
1967
1968/* Return nonzero if INSN is an indirect jump (aka computed jump).
1969
1970 Tablejumps and casesi insns are not considered indirect jumps;
1971 we can recognize them by a (use (lael_ref)). */
1972
1973int
1974computed_jump_p (insn)
1975 rtx insn;
1976{
1977 int i;
1978 if (GET_CODE (insn) == JUMP_INSN)
1979 {
1980 rtx pat = PATTERN (insn);
2a1777af
JL
1981
1982 if (GET_CODE (pat) == PARALLEL)
1983 {
1984 int len = XVECLEN (pat, 0);
1985 int has_use_labelref = 0;
1986
1987 for (i = len - 1; i >= 0; i--)
1988 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
1989 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
1990 == LABEL_REF))
1991 has_use_labelref = 1;
1992
1993 if (! has_use_labelref)
1994 for (i = len - 1; i >= 0; i--)
1995 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
1996 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
8d7532d9 1997 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i))))
2a1777af
JL
1998 return 1;
1999 }
2000 else if (GET_CODE (pat) == SET
2001 && SET_DEST (pat) == pc_rtx
2002 && jmp_uses_reg_or_mem (SET_SRC (pat)))
2003 return 1;
2004 }
2005 return 0;
2006}
This page took 1.393461 seconds and 5 git commands to generate.