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jump.c (jmp_uses_reg_or_mem): Deleted unused function.
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2c88418c 1/* Analyze RTL for C-Compiler
833c0b26 2 Copyright (C) 1987, 88, 9-5, 1996 Free Software Foundation, Inc.
2c88418c
RS
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
e99215a3
RK
18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
2c88418c
RS
20
21
22#include "config.h"
23#include "rtl.h"
24
25void note_stores ();
26int reg_set_p ();
27
2a1777af
JL
28
29/* Forward declarations */
30static int jmp_uses_reg_or_mem PROTO((rtx));
31
2c88418c
RS
32/* Bit flags that specify the machine subtype we are compiling for.
33 Bits are tested using macros TARGET_... defined in the tm.h file
34 and set by `-m...' switches. Must be defined in rtlanal.c. */
35
36int target_flags;
37\f
38/* Return 1 if the value of X is unstable
39 (would be different at a different point in the program).
40 The frame pointer, arg pointer, etc. are considered stable
41 (within one function) and so is anything marked `unchanging'. */
42
43int
44rtx_unstable_p (x)
45 rtx x;
46{
47 register RTX_CODE code = GET_CODE (x);
48 register int i;
49 register char *fmt;
50
51 if (code == MEM)
52 return ! RTX_UNCHANGING_P (x);
53
54 if (code == QUEUED)
55 return 1;
56
57 if (code == CONST || code == CONST_INT)
58 return 0;
59
60 if (code == REG)
61 return ! (REGNO (x) == FRAME_POINTER_REGNUM
b3b6c9b3 62 || REGNO (x) == HARD_FRAME_POINTER_REGNUM
2c88418c
RS
63 || REGNO (x) == ARG_POINTER_REGNUM
64 || RTX_UNCHANGING_P (x));
65
66 fmt = GET_RTX_FORMAT (code);
67 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
68 if (fmt[i] == 'e')
69 if (rtx_unstable_p (XEXP (x, i)))
70 return 1;
71 return 0;
72}
73
74/* Return 1 if X has a value that can vary even between two
75 executions of the program. 0 means X can be compared reliably
76 against certain constants or near-constants.
77 The frame pointer and the arg pointer are considered constant. */
78
79int
80rtx_varies_p (x)
81 rtx x;
82{
83 register RTX_CODE code = GET_CODE (x);
84 register int i;
85 register char *fmt;
86
87 switch (code)
88 {
89 case MEM:
90 case QUEUED:
91 return 1;
92
93 case CONST:
94 case CONST_INT:
95 case CONST_DOUBLE:
96 case SYMBOL_REF:
97 case LABEL_REF:
98 return 0;
99
100 case REG:
101 /* Note that we have to test for the actual rtx used for the frame
102 and arg pointers and not just the register number in case we have
103 eliminated the frame and/or arg pointer and are using it
104 for pseudos. */
b3b6c9b3
DE
105 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
106 || x == arg_pointer_rtx);
2c88418c
RS
107
108 case LO_SUM:
109 /* The operand 0 of a LO_SUM is considered constant
110 (in fact is it related specifically to operand 1). */
111 return rtx_varies_p (XEXP (x, 1));
112 }
113
114 fmt = GET_RTX_FORMAT (code);
115 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
116 if (fmt[i] == 'e')
117 if (rtx_varies_p (XEXP (x, i)))
118 return 1;
119 return 0;
120}
121
122/* Return 0 if the use of X as an address in a MEM can cause a trap. */
123
124int
125rtx_addr_can_trap_p (x)
126 register rtx x;
127{
128 register enum rtx_code code = GET_CODE (x);
129
130 switch (code)
131 {
132 case SYMBOL_REF:
133 case LABEL_REF:
134 /* SYMBOL_REF is problematic due to the possible presence of
135 a #pragma weak, but to say that loads from symbols can trap is
136 *very* costly. It's not at all clear what's best here. For
137 now, we ignore the impact of #pragma weak. */
138 return 0;
139
140 case REG:
141 /* As in rtx_varies_p, we have to use the actual rtx, not reg number. */
b3b6c9b3
DE
142 return ! (x == frame_pointer_rtx || x == hard_frame_pointer_rtx
143 || x == stack_pointer_rtx || x == arg_pointer_rtx);
2c88418c
RS
144
145 case CONST:
146 return rtx_addr_can_trap_p (XEXP (x, 0));
147
148 case PLUS:
149 /* An address is assumed not to trap if it is an address that can't
150 trap plus a constant integer. */
151 return (rtx_addr_can_trap_p (XEXP (x, 0))
152 || GET_CODE (XEXP (x, 1)) != CONST_INT);
153
154 case LO_SUM:
155 return rtx_addr_can_trap_p (XEXP (x, 1));
156 }
157
158 /* If it isn't one of the case above, it can cause a trap. */
159 return 1;
160}
161
162/* Return 1 if X refers to a memory location whose address
163 cannot be compared reliably with constant addresses,
164 or if X refers to a BLKmode memory object. */
165
166int
167rtx_addr_varies_p (x)
168 rtx x;
169{
170 register enum rtx_code code;
171 register int i;
172 register char *fmt;
173
174 if (x == 0)
175 return 0;
176
177 code = GET_CODE (x);
178 if (code == MEM)
179 return GET_MODE (x) == BLKmode || rtx_varies_p (XEXP (x, 0));
180
181 fmt = GET_RTX_FORMAT (code);
182 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
183 if (fmt[i] == 'e')
833c0b26
RK
184 {
185 if (rtx_addr_varies_p (XEXP (x, i)))
186 return 1;
187 }
188 else if (fmt[i] == 'E')
189 {
190 int j;
191 for (j = 0; j < XVECLEN (x, i); j++)
192 if (rtx_addr_varies_p (XVECEXP (x, i, j)))
193 return 1;
194 }
2c88418c
RS
195 return 0;
196}
197\f
198/* Return the value of the integer term in X, if one is apparent;
199 otherwise return 0.
200 Only obvious integer terms are detected.
201 This is used in cse.c with the `related_value' field.*/
202
c166a311 203HOST_WIDE_INT
2c88418c
RS
204get_integer_term (x)
205 rtx x;
206{
207 if (GET_CODE (x) == CONST)
208 x = XEXP (x, 0);
209
210 if (GET_CODE (x) == MINUS
211 && GET_CODE (XEXP (x, 1)) == CONST_INT)
212 return - INTVAL (XEXP (x, 1));
213 if (GET_CODE (x) == PLUS
214 && GET_CODE (XEXP (x, 1)) == CONST_INT)
215 return INTVAL (XEXP (x, 1));
216 return 0;
217}
218
219/* If X is a constant, return the value sans apparent integer term;
220 otherwise return 0.
221 Only obvious integer terms are detected. */
222
223rtx
224get_related_value (x)
225 rtx x;
226{
227 if (GET_CODE (x) != CONST)
228 return 0;
229 x = XEXP (x, 0);
230 if (GET_CODE (x) == PLUS
231 && GET_CODE (XEXP (x, 1)) == CONST_INT)
232 return XEXP (x, 0);
233 else if (GET_CODE (x) == MINUS
234 && GET_CODE (XEXP (x, 1)) == CONST_INT)
235 return XEXP (x, 0);
236 return 0;
237}
238\f
239/* Nonzero if register REG appears somewhere within IN.
240 Also works if REG is not a register; in this case it checks
241 for a subexpression of IN that is Lisp "equal" to REG. */
242
243int
244reg_mentioned_p (reg, in)
245 register rtx reg, in;
246{
247 register char *fmt;
248 register int i;
249 register enum rtx_code code;
250
251 if (in == 0)
252 return 0;
253
254 if (reg == in)
255 return 1;
256
257 if (GET_CODE (in) == LABEL_REF)
258 return reg == XEXP (in, 0);
259
260 code = GET_CODE (in);
261
262 switch (code)
263 {
264 /* Compare registers by number. */
265 case REG:
266 return GET_CODE (reg) == REG && REGNO (in) == REGNO (reg);
267
268 /* These codes have no constituent expressions
269 and are unique. */
270 case SCRATCH:
271 case CC0:
272 case PC:
273 return 0;
274
275 case CONST_INT:
276 return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg);
277
278 case CONST_DOUBLE:
279 /* These are kept unique for a given value. */
280 return 0;
281 }
282
283 if (GET_CODE (reg) == code && rtx_equal_p (reg, in))
284 return 1;
285
286 fmt = GET_RTX_FORMAT (code);
287
288 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
289 {
290 if (fmt[i] == 'E')
291 {
292 register int j;
293 for (j = XVECLEN (in, i) - 1; j >= 0; j--)
294 if (reg_mentioned_p (reg, XVECEXP (in, i, j)))
295 return 1;
296 }
297 else if (fmt[i] == 'e'
298 && reg_mentioned_p (reg, XEXP (in, i)))
299 return 1;
300 }
301 return 0;
302}
303\f
304/* Return 1 if in between BEG and END, exclusive of BEG and END, there is
305 no CODE_LABEL insn. */
306
307int
308no_labels_between_p (beg, end)
309 rtx beg, end;
310{
311 register rtx p;
312 for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p))
313 if (GET_CODE (p) == CODE_LABEL)
314 return 0;
315 return 1;
316}
317
318/* Nonzero if register REG is used in an insn between
319 FROM_INSN and TO_INSN (exclusive of those two). */
320
321int
322reg_used_between_p (reg, from_insn, to_insn)
323 rtx reg, from_insn, to_insn;
324{
325 register rtx insn;
326
327 if (from_insn == to_insn)
328 return 0;
329
330 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
331 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
332 && (reg_overlap_mentioned_p (reg, PATTERN (insn))
333 || (GET_CODE (insn) == CALL_INSN
334 && (find_reg_fusage (insn, USE, reg)
335 || find_reg_fusage (insn, CLOBBER, reg)))))
2c88418c
RS
336 return 1;
337 return 0;
338}
339\f
340/* Nonzero if the old value of X, a register, is referenced in BODY. If X
341 is entirely replaced by a new value and the only use is as a SET_DEST,
342 we do not consider it a reference. */
343
344int
345reg_referenced_p (x, body)
346 rtx x;
347 rtx body;
348{
349 int i;
350
351 switch (GET_CODE (body))
352 {
353 case SET:
354 if (reg_overlap_mentioned_p (x, SET_SRC (body)))
355 return 1;
356
357 /* If the destination is anything other than CC0, PC, a REG or a SUBREG
358 of a REG that occupies all of the REG, the insn references X if
359 it is mentioned in the destination. */
360 if (GET_CODE (SET_DEST (body)) != CC0
361 && GET_CODE (SET_DEST (body)) != PC
362 && GET_CODE (SET_DEST (body)) != REG
363 && ! (GET_CODE (SET_DEST (body)) == SUBREG
364 && GET_CODE (SUBREG_REG (SET_DEST (body))) == REG
365 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (SET_DEST (body))))
366 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
367 == ((GET_MODE_SIZE (GET_MODE (SET_DEST (body)))
368 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
369 && reg_overlap_mentioned_p (x, SET_DEST (body)))
370 return 1;
371 break;
372
373 case ASM_OPERANDS:
374 for (i = ASM_OPERANDS_INPUT_LENGTH (body) - 1; i >= 0; i--)
375 if (reg_overlap_mentioned_p (x, ASM_OPERANDS_INPUT (body, i)))
376 return 1;
377 break;
378
379 case CALL:
380 case USE:
381 return reg_overlap_mentioned_p (x, body);
382
383 case TRAP_IF:
384 return reg_overlap_mentioned_p (x, TRAP_CONDITION (body));
385
2ac4fed0
RK
386 case UNSPEC:
387 case UNSPEC_VOLATILE:
2c88418c
RS
388 case PARALLEL:
389 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
390 if (reg_referenced_p (x, XVECEXP (body, 0, i)))
391 return 1;
392 break;
393 }
394
395 return 0;
396}
397
398/* Nonzero if register REG is referenced in an insn between
399 FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do
0f41302f 400 not count. */
2c88418c
RS
401
402int
403reg_referenced_between_p (reg, from_insn, to_insn)
404 rtx reg, from_insn, to_insn;
405{
406 register rtx insn;
407
408 if (from_insn == to_insn)
409 return 0;
410
411 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
412 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8f3e7a26
RK
413 && (reg_referenced_p (reg, PATTERN (insn))
414 || (GET_CODE (insn) == CALL_INSN
415 && find_reg_fusage (insn, USE, reg))))
2c88418c
RS
416 return 1;
417 return 0;
418}
419\f
420/* Nonzero if register REG is set or clobbered in an insn between
421 FROM_INSN and TO_INSN (exclusive of those two). */
422
423int
424reg_set_between_p (reg, from_insn, to_insn)
425 rtx reg, from_insn, to_insn;
426{
427 register rtx insn;
428
429 if (from_insn == to_insn)
430 return 0;
431
432 for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn))
433 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
84607dc1 434 && reg_set_p (reg, insn))
2c88418c
RS
435 return 1;
436 return 0;
437}
438
439/* Internals of reg_set_between_p. */
440
441static rtx reg_set_reg;
442static int reg_set_flag;
443
5f91c709
RK
444static void
445reg_set_p_1 (x, pat)
2c88418c
RS
446 rtx x;
447{
448 /* We don't want to return 1 if X is a MEM that contains a register
449 within REG_SET_REG. */
450
451 if ((GET_CODE (x) != MEM)
452 && reg_overlap_mentioned_p (reg_set_reg, x))
453 reg_set_flag = 1;
454}
455
456int
457reg_set_p (reg, insn)
458 rtx reg, insn;
459{
460 rtx body = insn;
461
462 /* We can be passed an insn or part of one. If we are passed an insn,
463 check if a side-effect of the insn clobbers REG. */
464 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
465 {
466 if (FIND_REG_INC_NOTE (insn, reg)
467 || (GET_CODE (insn) == CALL_INSN
468 /* We'd like to test call_used_regs here, but rtlanal.c can't
469 reference that variable due to its use in genattrtab. So
8f3e7a26
RK
470 we'll just be more conservative.
471
472 ??? Unless we could ensure that the CALL_INSN_FUNCTION_USAGE
473 information holds all clobbered registers. */
2c88418c
RS
474 && ((GET_CODE (reg) == REG
475 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
8f3e7a26
RK
476 || GET_CODE (reg) == MEM
477 || find_reg_fusage (insn, CLOBBER, reg))))
2c88418c
RS
478 return 1;
479
480 body = PATTERN (insn);
481 }
482
483 reg_set_reg = reg;
484 reg_set_flag = 0;
485 note_stores (body, reg_set_p_1);
486 return reg_set_flag;
487}
488
489/* Similar to reg_set_between_p, but check all registers in X. Return 0
490 only if none of them are modified between START and END. Return 1 if
491 X contains a MEM; this routine does not perform any memory aliasing. */
492
493int
494modified_between_p (x, start, end)
495 rtx x;
496 rtx start, end;
497{
498 enum rtx_code code = GET_CODE (x);
499 char *fmt;
f8163c92 500 int i, j;
2c88418c
RS
501
502 switch (code)
503 {
504 case CONST_INT:
505 case CONST_DOUBLE:
506 case CONST:
507 case SYMBOL_REF:
508 case LABEL_REF:
509 return 0;
510
511 case PC:
512 case CC0:
513 return 1;
514
515 case MEM:
516 /* If the memory is not constant, assume it is modified. If it is
517 constant, we still have to check the address. */
518 if (! RTX_UNCHANGING_P (x))
519 return 1;
520 break;
521
522 case REG:
523 return reg_set_between_p (x, start, end);
524 }
525
526 fmt = GET_RTX_FORMAT (code);
527 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
f8163c92
RK
528 {
529 if (fmt[i] == 'e' && modified_between_p (XEXP (x, i), start, end))
530 return 1;
531
532 if (fmt[i] == 'E')
533 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
534 if (modified_between_p (XVECEXP (x, i, j), start, end))
535 return 1;
536 }
537
538 return 0;
539}
540
541/* Similar to reg_set_p, but check all registers in X. Return 0 only if none
542 of them are modified in INSN. Return 1 if X contains a MEM; this routine
543 does not perform any memory aliasing. */
544
545int
546modified_in_p (x, insn)
547 rtx x;
548 rtx insn;
549{
550 enum rtx_code code = GET_CODE (x);
551 char *fmt;
552 int i, j;
553
554 switch (code)
555 {
556 case CONST_INT:
557 case CONST_DOUBLE:
558 case CONST:
559 case SYMBOL_REF:
560 case LABEL_REF:
561 return 0;
562
563 case PC:
564 case CC0:
2c88418c
RS
565 return 1;
566
f8163c92
RK
567 case MEM:
568 /* If the memory is not constant, assume it is modified. If it is
569 constant, we still have to check the address. */
570 if (! RTX_UNCHANGING_P (x))
571 return 1;
572 break;
573
574 case REG:
575 return reg_set_p (x, insn);
576 }
577
578 fmt = GET_RTX_FORMAT (code);
579 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
580 {
581 if (fmt[i] == 'e' && modified_in_p (XEXP (x, i), insn))
582 return 1;
583
584 if (fmt[i] == 'E')
585 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
586 if (modified_in_p (XVECEXP (x, i, j), insn))
587 return 1;
588 }
589
2c88418c
RS
590 return 0;
591}
592\f
593/* Given an INSN, return a SET expression if this insn has only a single SET.
594 It may also have CLOBBERs, USEs, or SET whose output
595 will not be used, which we ignore. */
596
597rtx
598single_set (insn)
599 rtx insn;
600{
601 rtx set;
602 int i;
603
604 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
605 return 0;
606
607 if (GET_CODE (PATTERN (insn)) == SET)
608 return PATTERN (insn);
609
610 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
611 {
612 for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++)
613 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
fb3ef382
RS
614 && (! find_reg_note (insn, REG_UNUSED,
615 SET_DEST (XVECEXP (PATTERN (insn), 0, i)))
616 || side_effects_p (XVECEXP (PATTERN (insn), 0, i))))
2c88418c
RS
617 {
618 if (set)
619 return 0;
620 else
621 set = XVECEXP (PATTERN (insn), 0, i);
622 }
623 return set;
624 }
625
626 return 0;
627}
628\f
629/* Return the last thing that X was assigned from before *PINSN. Verify that
630 the object is not modified up to VALID_TO. If it was, if we hit
631 a partial assignment to X, or hit a CODE_LABEL first, return X. If we
632 found an assignment, update *PINSN to point to it. */
633
634rtx
635find_last_value (x, pinsn, valid_to)
636 rtx x;
637 rtx *pinsn;
638 rtx valid_to;
639{
640 rtx p;
641
642 for (p = PREV_INSN (*pinsn); p && GET_CODE (p) != CODE_LABEL;
643 p = PREV_INSN (p))
644 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
645 {
646 rtx set = single_set (p);
c166a311 647 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX);
2c88418c
RS
648
649 if (set && rtx_equal_p (x, SET_DEST (set)))
650 {
651 rtx src = SET_SRC (set);
652
653 if (note && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
654 src = XEXP (note, 0);
655
656 if (! modified_between_p (src, PREV_INSN (p), valid_to)
657 /* Reject hard registers because we don't usually want
658 to use them; we'd rather use a pseudo. */
659 && ! (GET_CODE (src) == REG
660 && REGNO (src) < FIRST_PSEUDO_REGISTER))
661 {
662 *pinsn = p;
663 return src;
664 }
665 }
666
667 /* If set in non-simple way, we don't have a value. */
668 if (reg_set_p (x, p))
669 break;
670 }
671
672 return x;
673}
674\f
675/* Return nonzero if register in range [REGNO, ENDREGNO)
676 appears either explicitly or implicitly in X
677 other than being stored into.
678
679 References contained within the substructure at LOC do not count.
680 LOC may be zero, meaning don't ignore anything. */
681
682int
683refers_to_regno_p (regno, endregno, x, loc)
684 int regno, endregno;
685 rtx x;
686 rtx *loc;
687{
688 register int i;
689 register RTX_CODE code;
690 register char *fmt;
691
692 repeat:
693 /* The contents of a REG_NONNEG note is always zero, so we must come here
694 upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
695 if (x == 0)
696 return 0;
697
698 code = GET_CODE (x);
699
700 switch (code)
701 {
702 case REG:
703 i = REGNO (x);
f8163c92
RK
704
705 /* If we modifying the stack, frame, or argument pointer, it will
706 clobber a virtual register. In fact, we could be more precise,
707 but it isn't worth it. */
708 if ((i == STACK_POINTER_REGNUM
709#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
710 || i == ARG_POINTER_REGNUM
711#endif
712 || i == FRAME_POINTER_REGNUM)
713 && regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
714 return 1;
715
2c88418c
RS
716 return (endregno > i
717 && regno < i + (i < FIRST_PSEUDO_REGISTER
718 ? HARD_REGNO_NREGS (i, GET_MODE (x))
719 : 1));
720
721 case SUBREG:
722 /* If this is a SUBREG of a hard reg, we can see exactly which
723 registers are being modified. Otherwise, handle normally. */
724 if (GET_CODE (SUBREG_REG (x)) == REG
725 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
726 {
727 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
728 int inner_endregno
729 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
730 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
731
732 return endregno > inner_regno && regno < inner_endregno;
733 }
734 break;
735
736 case CLOBBER:
737 case SET:
738 if (&SET_DEST (x) != loc
739 /* Note setting a SUBREG counts as referring to the REG it is in for
740 a pseudo but not for hard registers since we can
741 treat each word individually. */
742 && ((GET_CODE (SET_DEST (x)) == SUBREG
743 && loc != &SUBREG_REG (SET_DEST (x))
744 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
745 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
746 && refers_to_regno_p (regno, endregno,
747 SUBREG_REG (SET_DEST (x)), loc))
748 || (GET_CODE (SET_DEST (x)) != REG
749 && refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
750 return 1;
751
752 if (code == CLOBBER || loc == &SET_SRC (x))
753 return 0;
754 x = SET_SRC (x);
755 goto repeat;
756 }
757
758 /* X does not match, so try its subexpressions. */
759
760 fmt = GET_RTX_FORMAT (code);
761 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
762 {
763 if (fmt[i] == 'e' && loc != &XEXP (x, i))
764 {
765 if (i == 0)
766 {
767 x = XEXP (x, 0);
768 goto repeat;
769 }
770 else
771 if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
772 return 1;
773 }
774 else if (fmt[i] == 'E')
775 {
776 register int j;
777 for (j = XVECLEN (x, i) - 1; j >=0; j--)
778 if (loc != &XVECEXP (x, i, j)
779 && refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
780 return 1;
781 }
782 }
783 return 0;
784}
785
786/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
787 we check if any register number in X conflicts with the relevant register
788 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
789 contains a MEM (we don't bother checking for memory addresses that can't
790 conflict because we expect this to be a rare case. */
791
792int
793reg_overlap_mentioned_p (x, in)
794 rtx x, in;
795{
796 int regno, endregno;
797
798 if (GET_CODE (x) == SUBREG)
799 {
800 regno = REGNO (SUBREG_REG (x));
801 if (regno < FIRST_PSEUDO_REGISTER)
802 regno += SUBREG_WORD (x);
803 }
804 else if (GET_CODE (x) == REG)
805 regno = REGNO (x);
806 else if (CONSTANT_P (x))
807 return 0;
808 else if (GET_CODE (x) == MEM)
809 {
810 char *fmt;
811 int i;
812
813 if (GET_CODE (in) == MEM)
814 return 1;
815
816 fmt = GET_RTX_FORMAT (GET_CODE (in));
817
818 for (i = GET_RTX_LENGTH (GET_CODE (in)) - 1; i >= 0; i--)
819 if (fmt[i] == 'e' && reg_overlap_mentioned_p (x, XEXP (in, i)))
820 return 1;
821
822 return 0;
823 }
824 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
825 || GET_CODE (x) == CC0)
826 return reg_mentioned_p (x, in);
827 else
828 abort ();
829
830 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
831 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
832
c166a311 833 return refers_to_regno_p (regno, endregno, in, NULL_PTR);
2c88418c
RS
834}
835\f
836/* Used for communications between the next few functions. */
837
838static int reg_set_last_unknown;
839static rtx reg_set_last_value;
840static int reg_set_last_first_regno, reg_set_last_last_regno;
841
842/* Called via note_stores from reg_set_last. */
843
844static void
845reg_set_last_1 (x, pat)
846 rtx x;
847 rtx pat;
848{
849 int first, last;
850
851 /* If X is not a register, or is not one in the range we care
852 about, ignore. */
853 if (GET_CODE (x) != REG)
854 return;
855
856 first = REGNO (x);
857 last = first + (first < FIRST_PSEUDO_REGISTER
858 ? HARD_REGNO_NREGS (first, GET_MODE (x)) : 1);
859
860 if (first >= reg_set_last_last_regno
861 || last <= reg_set_last_first_regno)
862 return;
863
864 /* If this is a CLOBBER or is some complex LHS, or doesn't modify
865 exactly the registers we care about, show we don't know the value. */
866 if (GET_CODE (pat) == CLOBBER || SET_DEST (pat) != x
867 || first != reg_set_last_first_regno
868 || last != reg_set_last_last_regno)
869 reg_set_last_unknown = 1;
870 else
871 reg_set_last_value = SET_SRC (pat);
872}
873
874/* Return the last value to which REG was set prior to INSN. If we can't
875 find it easily, return 0.
876
4d9d7d9d
RK
877 We only return a REG, SUBREG, or constant because it is too hard to
878 check if a MEM remains unchanged. */
2c88418c
RS
879
880rtx
881reg_set_last (x, insn)
882 rtx x;
883 rtx insn;
884{
885 rtx orig_insn = insn;
886
887 reg_set_last_first_regno = REGNO (x);
888
889 reg_set_last_last_regno
890 = reg_set_last_first_regno
891 + (reg_set_last_first_regno < FIRST_PSEUDO_REGISTER
892 ? HARD_REGNO_NREGS (reg_set_last_first_regno, GET_MODE (x)) : 1);
893
894 reg_set_last_unknown = 0;
895 reg_set_last_value = 0;
896
897 /* Scan backwards until reg_set_last_1 changed one of the above flags.
898 Stop when we reach a label or X is a hard reg and we reach a
899 CALL_INSN (if reg_set_last_last_regno is a hard reg).
900
901 If we find a set of X, ensure that its SET_SRC remains unchanged. */
902
6b02c316
RS
903 /* We compare with <= here, because reg_set_last_last_regno
904 is actually the number of the first reg *not* in X. */
2c88418c
RS
905 for (;
906 insn && GET_CODE (insn) != CODE_LABEL
907 && ! (GET_CODE (insn) == CALL_INSN
908 && reg_set_last_last_regno <= FIRST_PSEUDO_REGISTER);
909 insn = PREV_INSN (insn))
910 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
911 {
912 note_stores (PATTERN (insn), reg_set_last_1);
913 if (reg_set_last_unknown)
914 return 0;
915 else if (reg_set_last_value)
916 {
917 if (CONSTANT_P (reg_set_last_value)
4d9d7d9d
RK
918 || ((GET_CODE (reg_set_last_value) == REG
919 || GET_CODE (reg_set_last_value) == SUBREG)
2c88418c 920 && ! reg_set_between_p (reg_set_last_value,
ce9c8df2 921 insn, orig_insn)))
2c88418c
RS
922 return reg_set_last_value;
923 else
924 return 0;
925 }
926 }
927
928 return 0;
929}
930\f
935ddcf5 931/* This is 1 until after the rtl generation pass. */
2c88418c
RS
932int rtx_equal_function_value_matters;
933
934/* Return 1 if X and Y are identical-looking rtx's.
935 This is the Lisp function EQUAL for rtx arguments. */
936
937int
938rtx_equal_p (x, y)
939 rtx x, y;
940{
941 register int i;
942 register int j;
943 register enum rtx_code code;
944 register char *fmt;
945
946 if (x == y)
947 return 1;
948 if (x == 0 || y == 0)
949 return 0;
950
951 code = GET_CODE (x);
952 /* Rtx's of different codes cannot be equal. */
953 if (code != GET_CODE (y))
954 return 0;
955
956 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
957 (REG:SI x) and (REG:HI x) are NOT equivalent. */
958
959 if (GET_MODE (x) != GET_MODE (y))
960 return 0;
961
962 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
963
964 if (code == REG)
965 /* Until rtl generation is complete, don't consider a reference to the
966 return register of the current function the same as the return from a
967 called function. This eases the job of function integration. Once the
968 distinction is no longer needed, they can be considered equivalent. */
969 return (REGNO (x) == REGNO (y)
970 && (! rtx_equal_function_value_matters
971 || REG_FUNCTION_VALUE_P (x) == REG_FUNCTION_VALUE_P (y)));
972 else if (code == LABEL_REF)
973 return XEXP (x, 0) == XEXP (y, 0);
974 else if (code == SYMBOL_REF)
975 return XSTR (x, 0) == XSTR (y, 0);
976 else if (code == SCRATCH || code == CONST_DOUBLE)
977 return 0;
978
979 /* Compare the elements. If any pair of corresponding elements
980 fail to match, return 0 for the whole things. */
981
982 fmt = GET_RTX_FORMAT (code);
983 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
984 {
985 switch (fmt[i])
986 {
c166a311
CH
987 case 'w':
988 if (XWINT (x, i) != XWINT (y, i))
989 return 0;
990 break;
991
2c88418c
RS
992 case 'n':
993 case 'i':
994 if (XINT (x, i) != XINT (y, i))
995 return 0;
996 break;
997
998 case 'V':
999 case 'E':
1000 /* Two vectors must have the same length. */
1001 if (XVECLEN (x, i) != XVECLEN (y, i))
1002 return 0;
1003
1004 /* And the corresponding elements must match. */
1005 for (j = 0; j < XVECLEN (x, i); j++)
1006 if (rtx_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
1007 return 0;
1008 break;
1009
1010 case 'e':
1011 if (rtx_equal_p (XEXP (x, i), XEXP (y, i)) == 0)
1012 return 0;
1013 break;
1014
1015 case 'S':
1016 case 's':
1017 if (strcmp (XSTR (x, i), XSTR (y, i)))
1018 return 0;
1019 break;
1020
1021 case 'u':
1022 /* These are just backpointers, so they don't matter. */
1023 break;
1024
1025 case '0':
1026 break;
1027
1028 /* It is believed that rtx's at this level will never
1029 contain anything but integers and other rtx's,
1030 except for within LABEL_REFs and SYMBOL_REFs. */
1031 default:
1032 abort ();
1033 }
1034 }
1035 return 1;
1036}
1037\f
1038/* Call FUN on each register or MEM that is stored into or clobbered by X.
1039 (X would be the pattern of an insn).
1040 FUN receives two arguments:
1041 the REG, MEM, CC0 or PC being stored in or clobbered,
1042 the SET or CLOBBER rtx that does the store.
1043
1044 If the item being stored in or clobbered is a SUBREG of a hard register,
1045 the SUBREG will be passed. */
1046
1047void
1048note_stores (x, fun)
1049 register rtx x;
1050 void (*fun) ();
1051{
1052 if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER))
1053 {
1054 register rtx dest = SET_DEST (x);
1055 while ((GET_CODE (dest) == SUBREG
1056 && (GET_CODE (SUBREG_REG (dest)) != REG
1057 || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER))
1058 || GET_CODE (dest) == ZERO_EXTRACT
1059 || GET_CODE (dest) == SIGN_EXTRACT
1060 || GET_CODE (dest) == STRICT_LOW_PART)
1061 dest = XEXP (dest, 0);
1062 (*fun) (dest, x);
1063 }
1064 else if (GET_CODE (x) == PARALLEL)
1065 {
1066 register int i;
1067 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1068 {
1069 register rtx y = XVECEXP (x, 0, i);
1070 if (GET_CODE (y) == SET || GET_CODE (y) == CLOBBER)
1071 {
1072 register rtx dest = SET_DEST (y);
1073 while ((GET_CODE (dest) == SUBREG
1074 && (GET_CODE (SUBREG_REG (dest)) != REG
1075 || (REGNO (SUBREG_REG (dest))
1076 >= FIRST_PSEUDO_REGISTER)))
1077 || GET_CODE (dest) == ZERO_EXTRACT
1078 || GET_CODE (dest) == SIGN_EXTRACT
1079 || GET_CODE (dest) == STRICT_LOW_PART)
1080 dest = XEXP (dest, 0);
1081 (*fun) (dest, y);
1082 }
1083 }
1084 }
1085}
1086\f
1087/* Return nonzero if X's old contents don't survive after INSN.
1088 This will be true if X is (cc0) or if X is a register and
1089 X dies in INSN or because INSN entirely sets X.
1090
1091 "Entirely set" means set directly and not through a SUBREG,
1092 ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains.
1093 Likewise, REG_INC does not count.
1094
1095 REG may be a hard or pseudo reg. Renumbering is not taken into account,
1096 but for this use that makes no difference, since regs don't overlap
1097 during their lifetimes. Therefore, this function may be used
1098 at any time after deaths have been computed (in flow.c).
1099
1100 If REG is a hard reg that occupies multiple machine registers, this
1101 function will only return 1 if each of those registers will be replaced
1102 by INSN. */
1103
1104int
1105dead_or_set_p (insn, x)
1106 rtx insn;
1107 rtx x;
1108{
1109 register int regno, last_regno;
1110 register int i;
1111
1112 /* Can't use cc0_rtx below since this file is used by genattrtab.c. */
1113 if (GET_CODE (x) == CC0)
1114 return 1;
1115
1116 if (GET_CODE (x) != REG)
1117 abort ();
1118
1119 regno = REGNO (x);
1120 last_regno = (regno >= FIRST_PSEUDO_REGISTER ? regno
1121 : regno + HARD_REGNO_NREGS (regno, GET_MODE (x)) - 1);
1122
1123 for (i = regno; i <= last_regno; i++)
1124 if (! dead_or_set_regno_p (insn, i))
1125 return 0;
1126
1127 return 1;
1128}
1129
1130/* Utility function for dead_or_set_p to check an individual register. Also
1131 called from flow.c. */
1132
1133int
1134dead_or_set_regno_p (insn, test_regno)
1135 rtx insn;
1136 int test_regno;
1137{
1138 int regno, endregno;
1139 rtx link;
1140
1141 /* See if there is a death note for something that includes TEST_REGNO. */
1142 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1143 {
1144 if (REG_NOTE_KIND (link) != REG_DEAD || GET_CODE (XEXP (link, 0)) != REG)
1145 continue;
1146
1147 regno = REGNO (XEXP (link, 0));
1148 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1149 : regno + HARD_REGNO_NREGS (regno,
1150 GET_MODE (XEXP (link, 0))));
1151
1152 if (test_regno >= regno && test_regno < endregno)
1153 return 1;
1154 }
1155
8f3e7a26
RK
1156 if (GET_CODE (insn) == CALL_INSN
1157 && find_regno_fusage (insn, CLOBBER, test_regno))
1158 return 1;
1159
2c88418c
RS
1160 if (GET_CODE (PATTERN (insn)) == SET)
1161 {
1162 rtx dest = SET_DEST (PATTERN (insn));
1163
1164 /* A value is totally replaced if it is the destination or the
1165 destination is a SUBREG of REGNO that does not change the number of
1166 words in it. */
1167 if (GET_CODE (dest) == SUBREG
1168 && (((GET_MODE_SIZE (GET_MODE (dest))
1169 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1170 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1171 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1172 dest = SUBREG_REG (dest);
1173
1174 if (GET_CODE (dest) != REG)
1175 return 0;
1176
1177 regno = REGNO (dest);
1178 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1179 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1180
1181 return (test_regno >= regno && test_regno < endregno);
1182 }
1183 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
1184 {
1185 register int i;
1186
1187 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
1188 {
1189 rtx body = XVECEXP (PATTERN (insn), 0, i);
1190
1191 if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER)
1192 {
1193 rtx dest = SET_DEST (body);
1194
1195 if (GET_CODE (dest) == SUBREG
1196 && (((GET_MODE_SIZE (GET_MODE (dest))
1197 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1198 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
1199 + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
1200 dest = SUBREG_REG (dest);
1201
1202 if (GET_CODE (dest) != REG)
1203 continue;
1204
1205 regno = REGNO (dest);
1206 endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1
1207 : regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)));
1208
1209 if (test_regno >= regno && test_regno < endregno)
1210 return 1;
1211 }
1212 }
1213 }
1214
1215 return 0;
1216}
1217
1218/* Return the reg-note of kind KIND in insn INSN, if there is one.
1219 If DATUM is nonzero, look for one whose datum is DATUM. */
1220
1221rtx
1222find_reg_note (insn, kind, datum)
1223 rtx insn;
1224 enum reg_note kind;
1225 rtx datum;
1226{
1227 register rtx link;
1228
1229 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1230 if (REG_NOTE_KIND (link) == kind
1231 && (datum == 0 || datum == XEXP (link, 0)))
1232 return link;
1233 return 0;
1234}
1235
1236/* Return the reg-note of kind KIND in insn INSN which applies to register
99309f3b
RK
1237 number REGNO, if any. Return 0 if there is no such reg-note. Note that
1238 the REGNO of this NOTE need not be REGNO if REGNO is a hard register;
1239 it might be the case that the note overlaps REGNO. */
2c88418c
RS
1240
1241rtx
1242find_regno_note (insn, kind, regno)
1243 rtx insn;
1244 enum reg_note kind;
1245 int regno;
1246{
1247 register rtx link;
1248
1249 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1250 if (REG_NOTE_KIND (link) == kind
1251 /* Verify that it is a register, so that scratch and MEM won't cause a
1252 problem here. */
1253 && GET_CODE (XEXP (link, 0)) == REG
99309f3b
RK
1254 && REGNO (XEXP (link, 0)) <= regno
1255 && ((REGNO (XEXP (link, 0))
1256 + (REGNO (XEXP (link, 0)) >= FIRST_PSEUDO_REGISTER ? 1
1257 : HARD_REGNO_NREGS (REGNO (XEXP (link, 0)),
1258 GET_MODE (XEXP (link, 0)))))
1259 > regno))
2c88418c
RS
1260 return link;
1261 return 0;
1262}
8f3e7a26
RK
1263
1264/* Return true if DATUM, or any overlap of DATUM, of kind CODE is found
1265 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1266
1267int
1268find_reg_fusage (insn, code, datum)
1269 rtx insn;
1270 enum rtx_code code;
1271 rtx datum;
1272{
1273 /* If it's not a CALL_INSN, it can't possibly have a
1274 CALL_INSN_FUNCTION_USAGE field, so don't bother checking. */
1275 if (GET_CODE (insn) != CALL_INSN)
1276 return 0;
1277
1278 if (! datum)
1279 abort();
1280
1281 if (GET_CODE (datum) != REG)
1282 {
1283 register rtx link;
1284
1285 for (link = CALL_INSN_FUNCTION_USAGE (insn);
1286 link;
1287 link = XEXP (link, 1))
1288 if (GET_CODE (XEXP (link, 0)) == code
1289 && rtx_equal_p (datum, SET_DEST (XEXP (link, 0))))
1290 return 1;
1291 }
1292 else
1293 {
1294 register int regno = REGNO (datum);
1295
1296 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1297 to pseudo registers, so don't bother checking. */
1298
1299 if (regno < FIRST_PSEUDO_REGISTER)
1300 {
1301 int end_regno = regno + HARD_REGNO_NREGS (regno, GET_MODE (datum));
1302 int i;
1303
1304 for (i = regno; i < end_regno; i++)
1305 if (find_regno_fusage (insn, code, i))
1306 return 1;
1307 }
1308 }
1309
1310 return 0;
1311}
1312
1313/* Return true if REGNO, or any overlap of REGNO, of kind CODE is found
1314 in the CALL_INSN_FUNCTION_USAGE information of INSN. */
1315
1316int
1317find_regno_fusage (insn, code, regno)
1318 rtx insn;
1319 enum rtx_code code;
1320 int regno;
1321{
1322 register rtx link;
1323
1324 /* CALL_INSN_FUNCTION_USAGE information cannot contain references
1325 to pseudo registers, so don't bother checking. */
1326
1327 if (regno >= FIRST_PSEUDO_REGISTER
1328 || GET_CODE (insn) != CALL_INSN )
1329 return 0;
1330
1331 for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
1332 {
1333 register int regnote;
1334 register rtx op;
1335
1336 if (GET_CODE (op = XEXP (link, 0)) == code
1337 && GET_CODE (SET_DEST (op)) == REG
1338 && (regnote = REGNO (SET_DEST (op))) <= regno
1339 && regnote
1340 + HARD_REGNO_NREGS (regnote, GET_MODE (SET_DEST (op)))
1341 > regno)
1342 return 1;
1343 }
1344
1345 return 0;
1346}
2c88418c
RS
1347\f
1348/* Remove register note NOTE from the REG_NOTES of INSN. */
1349
1350void
1351remove_note (insn, note)
1352 register rtx note;
1353 register rtx insn;
1354{
1355 register rtx link;
1356
1357 if (REG_NOTES (insn) == note)
1358 {
1359 REG_NOTES (insn) = XEXP (note, 1);
1360 return;
1361 }
1362
1363 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1364 if (XEXP (link, 1) == note)
1365 {
1366 XEXP (link, 1) = XEXP (note, 1);
1367 return;
1368 }
1369
1370 abort ();
1371}
1372\f
2b067faf
RS
1373/* Nonzero if X contains any volatile instructions. These are instructions
1374 which may cause unpredictable machine state instructions, and thus no
1375 instructions should be moved or combined across them. This includes
1376 only volatile asms and UNSPEC_VOLATILE instructions. */
1377
1378int
1379volatile_insn_p (x)
1380 rtx x;
1381{
1382 register RTX_CODE code;
1383
1384 code = GET_CODE (x);
1385 switch (code)
1386 {
1387 case LABEL_REF:
1388 case SYMBOL_REF:
1389 case CONST_INT:
1390 case CONST:
1391 case CONST_DOUBLE:
1392 case CC0:
1393 case PC:
1394 case REG:
1395 case SCRATCH:
1396 case CLOBBER:
1397 case ASM_INPUT:
1398 case ADDR_VEC:
1399 case ADDR_DIFF_VEC:
1400 case CALL:
1401 case MEM:
1402 return 0;
1403
1404 case UNSPEC_VOLATILE:
1405 /* case TRAP_IF: This isn't clear yet. */
1406 return 1;
1407
1408 case ASM_OPERANDS:
1409 if (MEM_VOLATILE_P (x))
1410 return 1;
1411 }
1412
1413 /* Recursively scan the operands of this expression. */
1414
1415 {
1416 register char *fmt = GET_RTX_FORMAT (code);
1417 register int i;
1418
1419 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1420 {
1421 if (fmt[i] == 'e')
1422 {
31001f72 1423 if (volatile_insn_p (XEXP (x, i)))
2b067faf
RS
1424 return 1;
1425 }
1426 if (fmt[i] == 'E')
1427 {
1428 register int j;
1429 for (j = 0; j < XVECLEN (x, i); j++)
31001f72 1430 if (volatile_insn_p (XVECEXP (x, i, j)))
2b067faf
RS
1431 return 1;
1432 }
1433 }
1434 }
1435 return 0;
1436}
1437
2c88418c 1438/* Nonzero if X contains any volatile memory references
2ac4fed0 1439 UNSPEC_VOLATILE operations or volatile ASM_OPERANDS expressions. */
2c88418c
RS
1440
1441int
1442volatile_refs_p (x)
1443 rtx x;
1444{
1445 register RTX_CODE code;
1446
1447 code = GET_CODE (x);
1448 switch (code)
1449 {
1450 case LABEL_REF:
1451 case SYMBOL_REF:
1452 case CONST_INT:
1453 case CONST:
1454 case CONST_DOUBLE:
1455 case CC0:
1456 case PC:
1457 case REG:
1458 case SCRATCH:
1459 case CLOBBER:
1460 case ASM_INPUT:
1461 case ADDR_VEC:
1462 case ADDR_DIFF_VEC:
1463 return 0;
1464
1465 case CALL:
2ac4fed0 1466 case UNSPEC_VOLATILE:
2c88418c
RS
1467 /* case TRAP_IF: This isn't clear yet. */
1468 return 1;
1469
1470 case MEM:
1471 case ASM_OPERANDS:
1472 if (MEM_VOLATILE_P (x))
1473 return 1;
1474 }
1475
1476 /* Recursively scan the operands of this expression. */
1477
1478 {
1479 register char *fmt = GET_RTX_FORMAT (code);
1480 register int i;
1481
1482 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1483 {
1484 if (fmt[i] == 'e')
1485 {
1486 if (volatile_refs_p (XEXP (x, i)))
1487 return 1;
1488 }
1489 if (fmt[i] == 'E')
1490 {
1491 register int j;
1492 for (j = 0; j < XVECLEN (x, i); j++)
1493 if (volatile_refs_p (XVECEXP (x, i, j)))
1494 return 1;
1495 }
1496 }
1497 }
1498 return 0;
1499}
1500
1501/* Similar to above, except that it also rejects register pre- and post-
1502 incrementing. */
1503
1504int
1505side_effects_p (x)
1506 rtx x;
1507{
1508 register RTX_CODE code;
1509
1510 code = GET_CODE (x);
1511 switch (code)
1512 {
1513 case LABEL_REF:
1514 case SYMBOL_REF:
1515 case CONST_INT:
1516 case CONST:
1517 case CONST_DOUBLE:
1518 case CC0:
1519 case PC:
1520 case REG:
1521 case SCRATCH:
1522 case ASM_INPUT:
1523 case ADDR_VEC:
1524 case ADDR_DIFF_VEC:
1525 return 0;
1526
1527 case CLOBBER:
1528 /* Reject CLOBBER with a non-VOID mode. These are made by combine.c
1529 when some combination can't be done. If we see one, don't think
1530 that we can simplify the expression. */
1531 return (GET_MODE (x) != VOIDmode);
1532
1533 case PRE_INC:
1534 case PRE_DEC:
1535 case POST_INC:
1536 case POST_DEC:
1537 case CALL:
2ac4fed0 1538 case UNSPEC_VOLATILE:
2c88418c
RS
1539 /* case TRAP_IF: This isn't clear yet. */
1540 return 1;
1541
1542 case MEM:
1543 case ASM_OPERANDS:
1544 if (MEM_VOLATILE_P (x))
1545 return 1;
1546 }
1547
1548 /* Recursively scan the operands of this expression. */
1549
1550 {
1551 register char *fmt = GET_RTX_FORMAT (code);
1552 register int i;
1553
1554 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1555 {
1556 if (fmt[i] == 'e')
1557 {
1558 if (side_effects_p (XEXP (x, i)))
1559 return 1;
1560 }
1561 if (fmt[i] == 'E')
1562 {
1563 register int j;
1564 for (j = 0; j < XVECLEN (x, i); j++)
1565 if (side_effects_p (XVECEXP (x, i, j)))
1566 return 1;
1567 }
1568 }
1569 }
1570 return 0;
1571}
1572\f
1573/* Return nonzero if evaluating rtx X might cause a trap. */
1574
1575int
1576may_trap_p (x)
1577 rtx x;
1578{
1579 int i;
1580 enum rtx_code code;
1581 char *fmt;
1582
1583 if (x == 0)
1584 return 0;
1585 code = GET_CODE (x);
1586 switch (code)
1587 {
1588 /* Handle these cases quickly. */
1589 case CONST_INT:
1590 case CONST_DOUBLE:
1591 case SYMBOL_REF:
1592 case LABEL_REF:
1593 case CONST:
1594 case PC:
1595 case CC0:
1596 case REG:
1597 case SCRATCH:
1598 return 0;
1599
1600 /* Conditional trap can trap! */
2ac4fed0 1601 case UNSPEC_VOLATILE:
2c88418c
RS
1602 case TRAP_IF:
1603 return 1;
1604
1605 /* Memory ref can trap unless it's a static var or a stack slot. */
1606 case MEM:
1607 return rtx_addr_can_trap_p (XEXP (x, 0));
1608
1609 /* Division by a non-constant might trap. */
1610 case DIV:
1611 case MOD:
1612 case UDIV:
1613 case UMOD:
1614 if (! CONSTANT_P (XEXP (x, 1)))
1615 return 1;
1616 /* This was const0_rtx, but by not using that,
1617 we can link this file into other programs. */
1618 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) == 0)
1619 return 1;
b278301b
RK
1620 case EXPR_LIST:
1621 /* An EXPR_LIST is used to represent a function call. This
1622 certainly may trap. */
1623 return 1;
2c88418c
RS
1624 default:
1625 /* Any floating arithmetic may trap. */
1626 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1627 return 1;
1628 }
1629
1630 fmt = GET_RTX_FORMAT (code);
1631 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1632 {
1633 if (fmt[i] == 'e')
1634 {
1635 if (may_trap_p (XEXP (x, i)))
1636 return 1;
1637 }
1638 else if (fmt[i] == 'E')
1639 {
1640 register int j;
1641 for (j = 0; j < XVECLEN (x, i); j++)
1642 if (may_trap_p (XVECEXP (x, i, j)))
1643 return 1;
1644 }
1645 }
1646 return 0;
1647}
1648\f
1649/* Return nonzero if X contains a comparison that is not either EQ or NE,
1650 i.e., an inequality. */
1651
1652int
1653inequality_comparisons_p (x)
1654 rtx x;
1655{
1656 register char *fmt;
1657 register int len, i;
1658 register enum rtx_code code = GET_CODE (x);
1659
1660 switch (code)
1661 {
1662 case REG:
1663 case SCRATCH:
1664 case PC:
1665 case CC0:
1666 case CONST_INT:
1667 case CONST_DOUBLE:
1668 case CONST:
1669 case LABEL_REF:
1670 case SYMBOL_REF:
1671 return 0;
1672
1673 case LT:
1674 case LTU:
1675 case GT:
1676 case GTU:
1677 case LE:
1678 case LEU:
1679 case GE:
1680 case GEU:
1681 return 1;
1682 }
1683
1684 len = GET_RTX_LENGTH (code);
1685 fmt = GET_RTX_FORMAT (code);
1686
1687 for (i = 0; i < len; i++)
1688 {
1689 if (fmt[i] == 'e')
1690 {
1691 if (inequality_comparisons_p (XEXP (x, i)))
1692 return 1;
1693 }
1694 else if (fmt[i] == 'E')
1695 {
1696 register int j;
1697 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1698 if (inequality_comparisons_p (XVECEXP (x, i, j)))
1699 return 1;
1700 }
1701 }
1702
1703 return 0;
1704}
1705\f
1706/* Replace any occurrence of FROM in X with TO.
1707
1708 Note that copying is not done so X must not be shared unless all copies
1709 are to be modified. */
1710
1711rtx
1712replace_rtx (x, from, to)
1713 rtx x, from, to;
1714{
1715 register int i, j;
1716 register char *fmt;
1717
1718 if (x == from)
1719 return to;
1720
1721 /* Allow this function to make replacements in EXPR_LISTs. */
1722 if (x == 0)
1723 return 0;
1724
1725 fmt = GET_RTX_FORMAT (GET_CODE (x));
1726 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
1727 {
1728 if (fmt[i] == 'e')
1729 XEXP (x, i) = replace_rtx (XEXP (x, i), from, to);
1730 else if (fmt[i] == 'E')
1731 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1732 XVECEXP (x, i, j) = replace_rtx (XVECEXP (x, i, j), from, to);
1733 }
1734
1735 return x;
1736}
1737\f
1738/* Throughout the rtx X, replace many registers according to REG_MAP.
1739 Return the replacement for X (which may be X with altered contents).
1740 REG_MAP[R] is the replacement for register R, or 0 for don't replace.
1741 NREGS is the length of REG_MAP; regs >= NREGS are not mapped.
1742
1743 We only support REG_MAP entries of REG or SUBREG. Also, hard registers
1744 should not be mapped to pseudos or vice versa since validate_change
1745 is not called.
1746
1747 If REPLACE_DEST is 1, replacements are also done in destinations;
1748 otherwise, only sources are replaced. */
1749
1750rtx
1751replace_regs (x, reg_map, nregs, replace_dest)
1752 rtx x;
1753 rtx *reg_map;
1754 int nregs;
1755 int replace_dest;
1756{
1757 register enum rtx_code code;
1758 register int i;
1759 register char *fmt;
1760
1761 if (x == 0)
1762 return x;
1763
1764 code = GET_CODE (x);
1765 switch (code)
1766 {
1767 case SCRATCH:
1768 case PC:
1769 case CC0:
1770 case CONST_INT:
1771 case CONST_DOUBLE:
1772 case CONST:
1773 case SYMBOL_REF:
1774 case LABEL_REF:
1775 return x;
1776
1777 case REG:
1778 /* Verify that the register has an entry before trying to access it. */
1779 if (REGNO (x) < nregs && reg_map[REGNO (x)] != 0)
3eb8f14c
JW
1780 {
1781 /* SUBREGs can't be shared. Always return a copy to ensure that if
1782 this replacement occurs more than once then each instance will
1783 get distinct rtx. */
1784 if (GET_CODE (reg_map[REGNO (x)]) == SUBREG)
1785 return copy_rtx (reg_map[REGNO (x)]);
1786 return reg_map[REGNO (x)];
1787 }
2c88418c
RS
1788 return x;
1789
1790 case SUBREG:
1791 /* Prevent making nested SUBREGs. */
1792 if (GET_CODE (SUBREG_REG (x)) == REG && REGNO (SUBREG_REG (x)) < nregs
1793 && reg_map[REGNO (SUBREG_REG (x))] != 0
1794 && GET_CODE (reg_map[REGNO (SUBREG_REG (x))]) == SUBREG)
1795 {
1796 rtx map_val = reg_map[REGNO (SUBREG_REG (x))];
1797 rtx map_inner = SUBREG_REG (map_val);
1798
1799 if (GET_MODE (x) == GET_MODE (map_inner))
1800 return map_inner;
1801 else
1802 {
1803 /* We cannot call gen_rtx here since we may be linked with
1804 genattrtab.c. */
1805 /* Let's try clobbering the incoming SUBREG and see
1806 if this is really safe. */
1807 SUBREG_REG (x) = map_inner;
1808 SUBREG_WORD (x) += SUBREG_WORD (map_val);
1809 return x;
1810#if 0
1811 rtx new = rtx_alloc (SUBREG);
1812 PUT_MODE (new, GET_MODE (x));
1813 SUBREG_REG (new) = map_inner;
1814 SUBREG_WORD (new) = SUBREG_WORD (x) + SUBREG_WORD (map_val);
1815#endif
1816 }
1817 }
1818 break;
1819
1820 case SET:
1821 if (replace_dest)
1822 SET_DEST (x) = replace_regs (SET_DEST (x), reg_map, nregs, 0);
1823
1824 else if (GET_CODE (SET_DEST (x)) == MEM
1825 || GET_CODE (SET_DEST (x)) == STRICT_LOW_PART)
1826 /* Even if we are not to replace destinations, replace register if it
1827 is CONTAINED in destination (destination is memory or
1828 STRICT_LOW_PART). */
1829 XEXP (SET_DEST (x), 0) = replace_regs (XEXP (SET_DEST (x), 0),
1830 reg_map, nregs, 0);
1831 else if (GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
1832 /* Similarly, for ZERO_EXTRACT we replace all operands. */
1833 break;
1834
1835 SET_SRC (x) = replace_regs (SET_SRC (x), reg_map, nregs, 0);
1836 return x;
1837 }
1838
1839 fmt = GET_RTX_FORMAT (code);
1840 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1841 {
1842 if (fmt[i] == 'e')
1843 XEXP (x, i) = replace_regs (XEXP (x, i), reg_map, nregs, replace_dest);
1844 if (fmt[i] == 'E')
1845 {
1846 register int j;
1847 for (j = 0; j < XVECLEN (x, i); j++)
1848 XVECEXP (x, i, j) = replace_regs (XVECEXP (x, i, j), reg_map,
1849 nregs, replace_dest);
1850 }
1851 }
1852 return x;
1853}
2a1777af
JL
1854
1855
1856/* Return 1 if X, the SRC_SRC of SET of (pc) contain a REG or MEM that is
1857 not in the constant pool and not in the condition of an IF_THEN_ELSE. */
1858
1859static int
1860jmp_uses_reg_or_mem (x)
1861 rtx x;
1862{
1863 enum rtx_code code = GET_CODE (x);
1864 int i, j;
1865 char *fmt;
1866
1867 switch (code)
1868 {
1869 case CONST:
1870 case LABEL_REF:
1871 case PC:
1872 return 0;
1873
1874 case REG:
1875 return 1;
1876
1877 case MEM:
1878 return ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
1879 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)));
1880
1881 case IF_THEN_ELSE:
1882 return (jmp_uses_reg_or_mem (XEXP (x, 1))
1883 || jmp_uses_reg_or_mem (XEXP (x, 2)));
1884
1885 case PLUS: case MINUS: case MULT:
1886 return (jmp_uses_reg_or_mem (XEXP (x, 0))
1887 || jmp_uses_reg_or_mem (XEXP (x, 1)));
1888 }
1889
1890 fmt = GET_RTX_FORMAT (code);
1891 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1892 {
1893 if (fmt[i] == 'e'
1894 && jmp_uses_reg_or_mem (XEXP (x, i)))
1895 return 1;
1896
1897 if (fmt[i] == 'E')
1898 for (j = 0; j < XVECLEN (x, i); j++)
1899 if (jmp_uses_reg_or_mem (XVECEXP (x, i, j)))
1900 return 1;
1901 }
1902
1903 return 0;
1904}
1905
1906/* Return nonzero if INSN is an indirect jump (aka computed jump).
1907
1908 Tablejumps and casesi insns are not considered indirect jumps;
1909 we can recognize them by a (use (lael_ref)). */
1910
1911int
1912computed_jump_p (insn)
1913 rtx insn;
1914{
1915 int i;
1916 if (GET_CODE (insn) == JUMP_INSN)
1917 {
1918 rtx pat = PATTERN (insn);
1919 int computed_jump = 0;
1920
1921 if (GET_CODE (pat) == PARALLEL)
1922 {
1923 int len = XVECLEN (pat, 0);
1924 int has_use_labelref = 0;
1925
1926 for (i = len - 1; i >= 0; i--)
1927 if (GET_CODE (XVECEXP (pat, 0, i)) == USE
1928 && (GET_CODE (XEXP (XVECEXP (pat, 0, i), 0))
1929 == LABEL_REF))
1930 has_use_labelref = 1;
1931
1932 if (! has_use_labelref)
1933 for (i = len - 1; i >= 0; i--)
1934 if (GET_CODE (XVECEXP (pat, 0, i)) == SET
1935 && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx
1936 && jmp_uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, 1))))
1937 return 1;
1938 }
1939 else if (GET_CODE (pat) == SET
1940 && SET_DEST (pat) == pc_rtx
1941 && jmp_uses_reg_or_mem (SET_SRC (pat)))
1942 return 1;
1943 }
1944 return 0;
1945}
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