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eab89b90 1/* Search an insn for pseudo regs that must be in hard regs and are not.
f55b1d97 2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20
21/* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
27
28 Before processing the first insn of the function, call `init_reload'.
29
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
36
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
43
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
52
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
55
56NOTE SIDE EFFECTS:
57
58 find_reloads can alter the operands of the instruction it is called on.
59
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
63 better that way.
64
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
67
681 happens every time find_reloads is called.
692 happens only when REPLACE is 1, which is only when
70actually doing the reloads, not when just counting them.
71
72
73Using a reload register for several reloads in one insn:
74
75When an insn has reloads, it is considered as having three parts:
76the input reloads, the insn itself after reloading, and the output reloads.
77Reloads of values used in memory addresses are often needed for only one part.
78
79When this is so, reload_when_needed records which part needs the reload.
80Two reloads for different parts of the insn can share the same reload
81register.
82
83When a reload is used for addresses in multiple parts, or when it is
84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85a register with any other reload. */
86
87#define REG_OK_STRICT
88
89#include "config.h"
90#include "rtl.h"
91#include "insn-config.h"
92#include "insn-codes.h"
93#include "recog.h"
94#include "reload.h"
95#include "regs.h"
96#include "hard-reg-set.h"
97#include "flags.h"
98#include "real.h"
99
100#ifndef REGISTER_MOVE_COST
101#define REGISTER_MOVE_COST(x, y) 2
102#endif
103\f
104/* The variables set up by `find_reloads' are:
105
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
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116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
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134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
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140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
143 of the above).
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
147 or more reloads.
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
153int n_reloads;
154
155rtx reload_in[MAX_RELOADS];
156rtx reload_out[MAX_RELOADS];
157enum reg_class reload_reg_class[MAX_RELOADS];
158enum machine_mode reload_inmode[MAX_RELOADS];
159enum machine_mode reload_outmode[MAX_RELOADS];
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160rtx reload_reg_rtx[MAX_RELOADS];
161char reload_optional[MAX_RELOADS];
162int reload_inc[MAX_RELOADS];
163rtx reload_in_reg[MAX_RELOADS];
164char reload_nocombine[MAX_RELOADS];
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165int reload_opnum[MAX_RELOADS];
166enum reload_type reload_when_needed[MAX_RELOADS];
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167int reload_secondary_reload[MAX_RELOADS];
168int reload_secondary_p[MAX_RELOADS];
169enum insn_code reload_secondary_icode[MAX_RELOADS];
170
171/* All the "earlyclobber" operands of the current insn
172 are recorded here. */
173int n_earlyclobbers;
174rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
175
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176int reload_n_operands;
177
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178/* Replacing reloads.
179
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
184
185/* Nonzero means record the places to replace. */
186static int replace_reloads;
187
188/* Each replacement is recorded with a structure like this. */
189struct replacement
190{
191 rtx *where; /* Location to store in */
192 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what; /* which reload this is for */
195 enum machine_mode mode; /* mode it must have */
196};
197
198static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
199
200/* Number of replacements currently recorded. */
201static int n_replacements;
202
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203/* Used to track what is modified by an operand. */
204struct decomposition
205{
206 int reg_flag; /* Nonzero if referencing a register. */
207 int safe; /* Nonzero if this can't conflict with anything. */
208 rtx base; /* Base adddress for MEM. */
209 HOST_WIDE_INT start; /* Starting offset or register number. */
210 HOST_WIDE_INT end; /* Endinf offset or register number. */
211};
212
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213/* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
216static int n_memlocs;
217
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218#ifdef SECONDARY_MEMORY_NEEDED
219
220/* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
222
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223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
226 reload each. */
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227
228static rtx secondary_memlocs[NUM_MACHINE_MODES];
77545d45 229static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
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230#endif
231
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232/* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234static rtx this_insn;
235
236/* Nonzero if this instruction is a user-specified asm with operands. */
237static int this_insn_is_asm;
238
239/* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242static int hard_regs_live_known;
243
244/* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248static short *static_reload_reg_p;
249
250/* Set to 1 in subst_reg_equivs if it changes anything. */
251static int subst_reg_equivs_changed;
252
253/* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255static int output_reloadnum;
256
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257static enum reg_class find_secondary_reload PROTO((rtx, enum reg_class,
258 enum machine_mode, int,
259 enum insn_code *,
260 enum machine_mode *,
261 enum reg_class *,
262 enum insn_code *,
263 enum machine_mode *));
264static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class,
265 enum machine_mode, enum machine_mode,
266 int, int, int, enum reload_type));
267static void push_replacement PROTO((rtx *, int, enum machine_mode));
268static void combine_reloads PROTO((void));
269static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *,
270 enum reg_class, int));
271static int hard_reg_set_here_p PROTO((int, int, rtx));
272static struct decomposition decompose PROTO((rtx));
273static int immune_p PROTO((rtx, rtx, struct decomposition));
274static int alternative_allows_memconst PROTO((char *, int));
275static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int));
276static rtx make_memloc PROTO((rtx, int));
277static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *,
278 int, enum reload_type, int));
279static rtx subst_reg_equivs PROTO((rtx));
280static rtx subst_indexed_address PROTO((rtx));
281static int find_reloads_address_1 PROTO((rtx, int, rtx *, int,
282 enum reload_type,int));
283static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class,
284 enum machine_mode, int,
285 enum reload_type, int));
286static int find_inc_amount PROTO((rtx, rtx));
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287\f
288#ifdef HAVE_SECONDARY_RELOADS
289
290/* Determine if any secondary reloads are needed for loading (if IN_P is
291 non-zero) or storing (if IN_P is zero) X to or from a reload register of
292 register class RELOAD_CLASS in mode RELOAD_MODE.
293
294 Return the register class of a secondary reload register, or NO_REGS if
295 none. *PMODE is set to the mode that the register is required in.
296 If the reload register is needed as a scratch register instead of an
297 intermediate register, *PICODE is set to the insn_code of the insn to be
298 used to load or store the primary reload register; otherwise *PICODE
299 is set to CODE_FOR_nothing.
300
301 In some cases (such as storing MQ into an external memory location on
302 the RT), both an intermediate register and a scratch register. In that
303 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
304 register is returned, and the *PTERTIARY_... variables are set to describe
305 the scratch register. */
306
307static enum reg_class
308find_secondary_reload (x, reload_class, reload_mode, in_p, picode, pmode,
309 ptertiary_class, ptertiary_icode, ptertiary_mode)
310 rtx x;
311 enum reg_class reload_class;
312 enum machine_mode reload_mode;
313 int in_p;
314 enum insn_code *picode;
315 enum machine_mode *pmode;
316 enum reg_class *ptertiary_class;
317 enum insn_code *ptertiary_icode;
318 enum machine_mode *ptertiary_mode;
319{
320 enum reg_class class = NO_REGS;
321 enum machine_mode mode = reload_mode;
322 enum insn_code icode = CODE_FOR_nothing;
323 enum reg_class t_class = NO_REGS;
324 enum machine_mode t_mode = VOIDmode;
325 enum insn_code t_icode = CODE_FOR_nothing;
326
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327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
332
333 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem[REGNO (x)] != 0)
335 x = reg_equiv_mem[REGNO (x)];
336
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337#ifdef SECONDARY_INPUT_RELOAD_CLASS
338 if (in_p)
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
340#endif
341
342#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
343 if (! in_p)
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
345#endif
346
347 /* If we don't need any secondary registers, go away; the rest of the
348 values won't be used. */
349 if (class == NO_REGS)
350 return NO_REGS;
351
352 /* Get a possible insn to use. If the predicate doesn't accept X, don't
353 use the insn. */
354
355 icode = (in_p ? reload_in_optab[(int) reload_mode]
356 : reload_out_optab[(int) reload_mode]);
357
358 if (icode != CODE_FOR_nothing
359 && insn_operand_predicate[(int) icode][in_p]
360 && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode)))
361 icode = CODE_FOR_nothing;
362
363 /* If we will be using an insn, see if it can directly handle the reload
364 register we will be using. If it can, the secondary reload is for a
365 scratch register. If it can't, we will use the secondary reload for
366 an intermediate register and require a tertiary reload for the scratch
367 register. */
368
369 if (icode != CODE_FOR_nothing)
370 {
371 /* If IN_P is non-zero, the reload register will be the output in
372 operand 0. If IN_P is zero, the reload register will be the input
373 in operand 1. Outputs should have an initial "=", which we must
374 skip. */
375
d45cf215 376 char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p];
eab89b90 377 enum reg_class insn_class
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378 = (insn_letter == 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER (insn_letter));
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380
381 if (insn_class == NO_REGS
382 || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=')
383 /* The scratch register's constraint must start with "=&". */
384 || insn_operand_constraint[(int) icode][2][0] != '='
385 || insn_operand_constraint[(int) icode][2][1] != '&')
386 abort ();
387
388 if (reg_class_subset_p (reload_class, insn_class))
389 mode = insn_operand_mode[(int) icode][2];
390 else
391 {
d45cf215 392 char t_letter = insn_operand_constraint[(int) icode][2][2];
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393 class = insn_class;
394 t_mode = insn_operand_mode[(int) icode][2];
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395 t_class = (t_letter == 'r' ? GENERAL_REGS
396 : REG_CLASS_FROM_LETTER (t_letter));
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397 t_icode = icode;
398 icode = CODE_FOR_nothing;
399 }
400 }
401
402 *pmode = mode;
403 *picode = icode;
404 *ptertiary_class = t_class;
405 *ptertiary_mode = t_mode;
406 *ptertiary_icode = t_icode;
407
408 return class;
409}
410#endif /* HAVE_SECONDARY_RELOADS */
411\f
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412#ifdef SECONDARY_MEMORY_NEEDED
413
414/* Return a memory location that will be used to copy X in mode MODE.
415 If we haven't already made a location for this mode in this insn,
416 call find_reloads_address on the location being returned. */
417
418rtx
a8c9daeb 419get_secondary_mem (x, mode, opnum, type)
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420 rtx x;
421 enum machine_mode mode;
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422 int opnum;
423 enum reload_type type;
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424{
425 rtx loc;
426 int mem_valid;
427
428 /* If MODE is narrower than a word, widen it. This is required because
429 most machines that require these memory locations do not support
430 short load and stores from all registers (e.g., FP registers). We could
431 possibly conditionalize this, but we lose nothing by doing the wider
432 mode. */
433
434 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
435 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
436
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437 /* If we already have made a MEM for this operand in MODE, return it. */
438 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
439 return secondary_memlocs_elim[(int) mode][opnum];
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440
441 /* If this is the first time we've tried to get a MEM for this mode,
442 allocate a new one. `something_changed' in reload will get set
443 by noticing that the frame size has changed. */
444
445 if (secondary_memlocs[(int) mode] == 0)
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446 {
447#ifdef SECONDARY_MEMORY_NEEDED_RTX
448 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
449#else
450 secondary_memlocs[(int) mode]
451 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
452#endif
453 }
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454
455 /* Get a version of the address doing any eliminations needed. If that
456 didn't give us a new MEM, make a new one if it isn't valid. */
457
a8c9daeb 458 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
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459 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
460
461 if (! mem_valid && loc == secondary_memlocs[(int) mode])
462 loc = copy_rtx (loc);
463
464 /* The only time the call below will do anything is if the stack
465 offset is too large. In that case IND_LEVELS doesn't matter, so we
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466 can just pass a zero. Adjust the type to be the address of the
467 corresponding object. If the address was valid, save the eliminated
468 address. If it wasn't valid, we need to make a reload each time, so
469 don't save it. */
0dadecf6 470
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471 if (! mem_valid)
472 {
473 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
474 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
475 : RELOAD_OTHER);
8d618585 476
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477 find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0),
478 opnum, type, 0);
479 }
0dadecf6 480
77545d45 481 secondary_memlocs_elim[(int) mode][opnum] = loc;
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482 return loc;
483}
484
485/* Clear any secondary memory locations we've made. */
486
487void
488clear_secondary_mem ()
489{
77545d45 490 bzero (secondary_memlocs, sizeof secondary_memlocs);
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491}
492#endif /* SECONDARY_MEMORY_NEEDED */
493\f
a8c9daeb 494/* Record one reload that needs to be performed.
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495 IN is an rtx saying where the data are to be found before this instruction.
496 OUT says where they must be stored after the instruction.
497 (IN is zero for data not read, and OUT is zero for data not written.)
498 INLOC and OUTLOC point to the places in the instructions where
499 IN and OUT were found.
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500 If IN and OUT are both non-zero, it means the same register must be used
501 to reload both IN and OUT.
502
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503 CLASS is a register class required for the reloaded data.
504 INMODE is the machine mode that the instruction requires
505 for the reg that replaces IN and OUTMODE is likewise for OUT.
506
507 If IN is zero, then OUT's location and mode should be passed as
508 INLOC and INMODE.
509
510 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
511
512 OPTIONAL nonzero means this reload does not need to be performed:
513 it can be discarded if that is more convenient.
514
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515 OPNUM and TYPE say what the purpose of this reload is.
516
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517 The return value is the reload-number for this reload.
518
519 If both IN and OUT are nonzero, in some rare cases we might
520 want to make two separate reloads. (Actually we never do this now.)
521 Therefore, the reload-number for OUT is stored in
522 output_reloadnum when we return; the return value applies to IN.
523 Usually (presently always), when IN and OUT are nonzero,
524 the two reload-numbers are equal, but the caller should be careful to
525 distinguish them. */
526
527static int
528push_reload (in, out, inloc, outloc, class,
a8c9daeb 529 inmode, outmode, strict_low, optional, opnum, type)
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530 register rtx in, out;
531 rtx *inloc, *outloc;
532 enum reg_class class;
533 enum machine_mode inmode, outmode;
534 int strict_low;
535 int optional;
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536 int opnum;
537 enum reload_type type;
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538{
539 register int i;
540 int dont_share = 0;
541 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
542 int secondary_reload = -1;
543 enum insn_code secondary_icode = CODE_FOR_nothing;
544
545 /* Compare two RTX's. */
546#define MATCHES(x, y) \
547 (x == y || (x != 0 && (GET_CODE (x) == REG \
548 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
549 : rtx_equal_p (x, y) && ! side_effects_p (x))))
550
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551 /* Indicates if two reloads purposes are for similar enough things that we
552 can merge their reloads. */
553#define MERGABLE_RELOADS(when1, when2, op1, op2) \
554 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
555 || ((when1) == (when2) && (op1) == (op2)) \
556 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
557 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
558 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
559 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
560 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
561
562 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
563#define MERGE_TO_OTHER(when1, when2, op1, op2) \
564 ((when1) != (when2) \
565 || ! ((op1) == (op2) \
566 || (when1) == RELOAD_FOR_INPUT \
567 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
568 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
569
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570 /* INMODE and/or OUTMODE could be VOIDmode if no mode
571 has been specified for the operand. In that case,
572 use the operand's mode as the mode to reload. */
573 if (inmode == VOIDmode && in != 0)
574 inmode = GET_MODE (in);
575 if (outmode == VOIDmode && out != 0)
576 outmode = GET_MODE (out);
577
578 /* If IN is a pseudo register everywhere-equivalent to a constant, and
579 it is not in a hard register, reload straight from the constant,
580 since we want to get rid of such pseudo registers.
581 Often this is done earlier, but not always in find_reloads_address. */
582 if (in != 0 && GET_CODE (in) == REG)
583 {
584 register int regno = REGNO (in);
585
586 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
587 && reg_equiv_constant[regno] != 0)
588 in = reg_equiv_constant[regno];
589 }
590
591 /* Likewise for OUT. Of course, OUT will never be equivalent to
592 an actual constant, but it might be equivalent to a memory location
593 (in the case of a parameter). */
594 if (out != 0 && GET_CODE (out) == REG)
595 {
596 register int regno = REGNO (out);
597
598 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
599 && reg_equiv_constant[regno] != 0)
600 out = reg_equiv_constant[regno];
601 }
602
603 /* If we have a read-write operand with an address side-effect,
604 change either IN or OUT so the side-effect happens only once. */
605 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
606 {
607 if (GET_CODE (XEXP (in, 0)) == POST_INC
608 || GET_CODE (XEXP (in, 0)) == POST_DEC)
609 in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0));
610 if (GET_CODE (XEXP (in, 0)) == PRE_INC
611 || GET_CODE (XEXP (in, 0)) == PRE_DEC)
612 out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0));
613 }
614
615 /* If we are reloading a (SUBREG (MEM ...) ...) or (SUBREG constant ...),
616 really reload just the inside expression in its own mode.
617 If we have (SUBREG:M1 (REG:M2 ...) ...) with M1 wider than M2 and the
618 register is a pseudo, this will become the same as the above case.
86c31b2d 619 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
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RK
620 either M1 is not valid for R or M2 is wider than a word but we only
621 need one word to store an M2-sized quantity in R.
86c31b2d
RS
622 (However, if OUT is nonzero, we need to reload the reg *and*
623 the subreg, so do nothing here, and let following statement handle it.)
624
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RK
625 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
626 we can't handle it here because CONST_INT does not indicate a mode.
627
628 Similarly, we must reload the inside expression if we have a
df62f951
RK
629 STRICT_LOW_PART (presumably, in == out in the cas).
630
631 Also reload the inner expression if it does not require a secondary
632 reload but the SUBREG does. */
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RK
633
634 if (in != 0 && GET_CODE (in) == SUBREG
635 && (GET_CODE (SUBREG_REG (in)) != REG
636 || strict_low
637 || (GET_CODE (SUBREG_REG (in)) == REG
638 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER
639 && (GET_MODE_SIZE (inmode)
640 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))))
86c31b2d
RS
641 || (REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
642 /* The case where out is nonzero
643 is handled differently in the following statement. */
644 && (out == 0 || SUBREG_WORD (in) == 0)
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RK
645 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
646 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
647 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
648 > UNITS_PER_WORD)
649 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
650 / UNITS_PER_WORD)
651 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
df62f951
RK
652 GET_MODE (SUBREG_REG (in)))))))
653#ifdef SECONDARY_INPUT_RELOAD_CLASS
654 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
655 && (SECONDARY_INPUT_RELOAD_CLASS (class,
656 GET_MODE (SUBREG_REG (in)),
657 SUBREG_REG (in))
658 == NO_REGS))
659#endif
660 ))
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RK
661 {
662 in_subreg_loc = inloc;
663 inloc = &SUBREG_REG (in);
664 in = *inloc;
e05a9da8 665#if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
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RK
666 if (GET_CODE (in) == MEM)
667 /* This is supposed to happen only for paradoxical subregs made by
668 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
669 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
670 abort ();
e05a9da8 671#endif
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RK
672 inmode = GET_MODE (in);
673 }
674
86c31b2d
RS
675 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
676 either M1 is not valid for R or M2 is wider than a word but we only
677 need one word to store an M2-sized quantity in R.
678
679 However, we must reload the inner reg *as well as* the subreg in
680 that case. */
681
682 if (in != 0 && GET_CODE (in) == SUBREG
683 && GET_CODE (SUBREG_REG (in)) == REG
684 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
685 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode)
686 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
687 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
688 > UNITS_PER_WORD)
689 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
690 / UNITS_PER_WORD)
691 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
692 GET_MODE (SUBREG_REG (in)))))))
693 {
694 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR,
695 GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type);
696 }
697
698
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RK
699 /* Similarly for paradoxical and problematical SUBREGs on the output.
700 Note that there is no reason we need worry about the previous value
701 of SUBREG_REG (out); even if wider than out,
702 storing in a subreg is entitled to clobber it all
703 (except in the case of STRICT_LOW_PART,
704 and in that case the constraint should label it input-output.) */
705 if (out != 0 && GET_CODE (out) == SUBREG
706 && (GET_CODE (SUBREG_REG (out)) != REG
707 || strict_low
708 || (GET_CODE (SUBREG_REG (out)) == REG
709 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER
710 && (GET_MODE_SIZE (outmode)
711 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))
712 || (GET_CODE (SUBREG_REG (out)) == REG
713 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
714 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out)), outmode)
715 || (GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
716 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
717 > UNITS_PER_WORD)
718 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
719 / UNITS_PER_WORD)
720 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
df62f951
RK
721 GET_MODE (SUBREG_REG (out)))))))
722#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
723 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
724 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
725 GET_MODE (SUBREG_REG (out)),
726 SUBREG_REG (out))
727 == NO_REGS))
728#endif
729 ))
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RK
730 {
731 out_subreg_loc = outloc;
732 outloc = &SUBREG_REG (out);
e05a9da8
RS
733 out = *outloc;
734#if ! defined(BYTE_LOADS_ZERO_EXTEND) && ! defined(BYTE_LOADS_SIGN_EXTEND)
735 if (GET_CODE (out) == MEM
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RK
736 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
737 abort ();
e05a9da8 738#endif
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RK
739 outmode = GET_MODE (out);
740 }
741
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RK
742 /* If IN appears in OUT, we can't share any input-only reload for IN. */
743 if (in != 0 && out != 0 && GET_CODE (out) == MEM
744 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
bfa30b22 745 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
eab89b90
RK
746 dont_share = 1;
747
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RK
748 /* If IN is a SUBREG of a hard register, make a new REG. This
749 simplifies some of the cases below. */
750
751 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
752 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
753 in = gen_rtx (REG, GET_MODE (in),
754 REGNO (SUBREG_REG (in)) + SUBREG_WORD (in));
755
756 /* Similarly for OUT. */
757 if (out != 0 && GET_CODE (out) == SUBREG
758 && GET_CODE (SUBREG_REG (out)) == REG
759 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
760 out = gen_rtx (REG, GET_MODE (out),
761 REGNO (SUBREG_REG (out)) + SUBREG_WORD (out));
762
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RK
763 /* Narrow down the class of register wanted if that is
764 desirable on this machine for efficiency. */
765 if (in != 0)
766 class = PREFERRED_RELOAD_CLASS (in, class);
767
ac2a9454 768 /* Output reloads may need analogous treatment, different in detail. */
18a53b78
RS
769#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
770 if (out != 0)
771 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
772#endif
773
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RK
774 /* Make sure we use a class that can handle the actual pseudo
775 inside any subreg. For example, on the 386, QImode regs
776 can appear within SImode subregs. Although GENERAL_REGS
777 can handle SImode, QImode needs a smaller class. */
778#ifdef LIMIT_RELOAD_CLASS
779 if (in_subreg_loc)
780 class = LIMIT_RELOAD_CLASS (inmode, class);
781 else if (in != 0 && GET_CODE (in) == SUBREG)
782 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
783
784 if (out_subreg_loc)
785 class = LIMIT_RELOAD_CLASS (outmode, class);
786 if (out != 0 && GET_CODE (out) == SUBREG)
787 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
788#endif
789
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RK
790 /* Verify that this class is at least possible for the mode that
791 is specified. */
792 if (this_insn_is_asm)
793 {
794 enum machine_mode mode;
795 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
796 mode = inmode;
797 else
798 mode = outmode;
5488078f
RS
799 if (mode == VOIDmode)
800 {
801 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
802 mode = word_mode;
803 if (in != 0)
804 inmode = word_mode;
805 if (out != 0)
806 outmode = word_mode;
807 }
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RK
808 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
809 if (HARD_REGNO_MODE_OK (i, mode)
810 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
811 {
812 int nregs = HARD_REGNO_NREGS (i, mode);
813
814 int j;
815 for (j = 1; j < nregs; j++)
816 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
817 break;
818 if (j == nregs)
819 break;
820 }
821 if (i == FIRST_PSEUDO_REGISTER)
822 {
823 error_for_asm (this_insn, "impossible register constraint in `asm'");
824 class = ALL_REGS;
825 }
826 }
827
5488078f
RS
828 if (class == NO_REGS)
829 abort ();
830
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RK
831 /* We can use an existing reload if the class is right
832 and at least one of IN and OUT is a match
833 and the other is at worst neutral.
a8c9daeb
RK
834 (A zero compared against anything is neutral.)
835
836 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
837 for the same thing since that can cause us to need more reload registers
838 than we otherwise would. */
839
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RK
840 for (i = 0; i < n_reloads; i++)
841 if ((reg_class_subset_p (class, reload_reg_class[i])
842 || reg_class_subset_p (reload_reg_class[i], class))
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RK
843 /* If the existing reload has a register, it must fit our class. */
844 && (reload_reg_rtx[i] == 0
845 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
846 true_regnum (reload_reg_rtx[i])))
847 && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share
848 && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out)))
849 ||
850 (out != 0 && MATCHES (reload_out[i], out)
a8c9daeb
RK
851 && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in))))
852 && (reg_class_size[(int) class] == 1
853#ifdef SMALL_REGISTER_CLASSES
854 || 1
855#endif
856 )
857 && MERGABLE_RELOADS (type, reload_when_needed[i],
858 opnum, reload_opnum[i]))
eab89b90
RK
859 break;
860
861 /* Reloading a plain reg for input can match a reload to postincrement
862 that reg, since the postincrement's value is the right value.
863 Likewise, it can match a preincrement reload, since we regard
864 the preincrementation as happening before any ref in this insn
865 to that register. */
866 if (i == n_reloads)
867 for (i = 0; i < n_reloads; i++)
868 if ((reg_class_subset_p (class, reload_reg_class[i])
869 || reg_class_subset_p (reload_reg_class[i], class))
870 /* If the existing reload has a register, it must fit our class. */
871 && (reload_reg_rtx[i] == 0
872 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
873 true_regnum (reload_reg_rtx[i])))
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RK
874 && out == 0 && reload_out[i] == 0 && reload_in[i] != 0
875 && ((GET_CODE (in) == REG
876 && (GET_CODE (reload_in[i]) == POST_INC
877 || GET_CODE (reload_in[i]) == POST_DEC
878 || GET_CODE (reload_in[i]) == PRE_INC
879 || GET_CODE (reload_in[i]) == PRE_DEC)
880 && MATCHES (XEXP (reload_in[i], 0), in))
881 ||
882 (GET_CODE (reload_in[i]) == REG
883 && (GET_CODE (in) == POST_INC
884 || GET_CODE (in) == POST_DEC
885 || GET_CODE (in) == PRE_INC
886 || GET_CODE (in) == PRE_DEC)
a8c9daeb
RK
887 && MATCHES (XEXP (in, 0), reload_in[i])))
888 && (reg_class_size[(int) class] == 1
889#ifdef SMALL_REGISTER_CLASSES
890 || 1
891#endif
892 )
893 && MERGABLE_RELOADS (type, reload_when_needed[i],
894 opnum, reload_opnum[i]))
eab89b90
RK
895 {
896 /* Make sure reload_in ultimately has the increment,
897 not the plain register. */
898 if (GET_CODE (in) == REG)
899 in = reload_in[i];
900 break;
901 }
902
903 if (i == n_reloads)
904 {
905#ifdef HAVE_SECONDARY_RELOADS
906 enum reg_class secondary_class = NO_REGS;
907 enum reg_class secondary_out_class = NO_REGS;
908 enum machine_mode secondary_mode = inmode;
909 enum machine_mode secondary_out_mode = outmode;
910 enum insn_code secondary_icode;
911 enum insn_code secondary_out_icode = CODE_FOR_nothing;
912 enum reg_class tertiary_class = NO_REGS;
913 enum reg_class tertiary_out_class = NO_REGS;
914 enum machine_mode tertiary_mode;
915 enum machine_mode tertiary_out_mode;
916 enum insn_code tertiary_icode;
917 enum insn_code tertiary_out_icode = CODE_FOR_nothing;
918 int tertiary_reload = -1;
919
920 /* See if we need a secondary reload register to move between
921 CLASS and IN or CLASS and OUT. Get the modes and icodes to
922 use for each of them if so. */
923
924#ifdef SECONDARY_INPUT_RELOAD_CLASS
925 if (in != 0)
926 secondary_class
927 = find_secondary_reload (in, class, inmode, 1, &secondary_icode,
928 &secondary_mode, &tertiary_class,
929 &tertiary_icode, &tertiary_mode);
930#endif
931
932#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
933 if (out != 0 && GET_CODE (out) != SCRATCH)
934 secondary_out_class
935 = find_secondary_reload (out, class, outmode, 0,
936 &secondary_out_icode, &secondary_out_mode,
937 &tertiary_out_class, &tertiary_out_icode,
938 &tertiary_out_mode);
939#endif
940
941 /* We can only record one secondary and one tertiary reload. If both
942 IN and OUT need secondary reloads, we can only make an in-out
a8c9daeb
RK
943 reload if neither need an insn and if the classes are compatible.
944 If they aren't, all we can do is abort since making two separate
945 reloads is invalid. */
eab89b90
RK
946
947 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
948 && reg_class_subset_p (secondary_out_class, secondary_class))
949 secondary_class = secondary_out_class;
950
951 if (secondary_class != NO_REGS && secondary_out_class != NO_REGS
952 && (! reg_class_subset_p (secondary_class, secondary_out_class)
953 || secondary_icode != CODE_FOR_nothing
954 || secondary_out_icode != CODE_FOR_nothing))
a8c9daeb 955 abort ();
eab89b90
RK
956
957 /* If we need a secondary reload for OUT but not IN, copy the
958 information. */
959 if (secondary_class == NO_REGS && secondary_out_class != NO_REGS)
960 {
961 secondary_class = secondary_out_class;
962 secondary_icode = secondary_out_icode;
963 tertiary_class = tertiary_out_class;
964 tertiary_icode = tertiary_out_icode;
965 tertiary_mode = tertiary_out_mode;
966 }
967
968 if (secondary_class != NO_REGS)
969 {
a8c9daeb
RK
970 /* Secondary reloads don't conflict as badly as the primary object
971 being reload. Specifically, we can always treat them as
972 being for an input or output address and hence allowed to be
973 reused in the same manner such address components could be
974 reused. This is used as the reload_type for our secondary
975 reloads. */
976
977 enum reload_type secondary_type
978 = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
979 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
980 : type);
981
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RK
982 /* If we need a tertiary reload, see if we have one we can reuse
983 or else make one. */
984
985 if (tertiary_class != NO_REGS)
986 {
987 for (tertiary_reload = 0; tertiary_reload < n_reloads;
988 tertiary_reload++)
989 if (reload_secondary_p[tertiary_reload]
990 && (reg_class_subset_p (tertiary_class,
991 reload_reg_class[tertiary_reload])
992 || reg_class_subset_p (reload_reg_class[tertiary_reload],
993 tertiary_class))
994 && ((reload_inmode[tertiary_reload] == tertiary_mode)
995 || reload_inmode[tertiary_reload] == VOIDmode)
996 && ((reload_outmode[tertiary_reload] == tertiary_mode)
997 || reload_outmode[tertiary_reload] == VOIDmode)
998 && (reload_secondary_icode[tertiary_reload]
a8c9daeb
RK
999 == CODE_FOR_nothing)
1000 && (reg_class_size[(int) tertiary_class] == 1
1001#ifdef SMALL_REGISTER_CLASSES
1002 || 1
1003#endif
1004 )
1005 && MERGABLE_RELOADS (secondary_type,
1006 reload_when_needed[tertiary_reload],
1007 opnum, reload_opnum[tertiary_reload]))
eab89b90
RK
1008 {
1009 if (tertiary_mode != VOIDmode)
1010 reload_inmode[tertiary_reload] = tertiary_mode;
1011 if (tertiary_out_mode != VOIDmode)
1012 reload_outmode[tertiary_reload] = tertiary_mode;
1013 if (reg_class_subset_p (tertiary_class,
1014 reload_reg_class[tertiary_reload]))
1015 reload_reg_class[tertiary_reload] = tertiary_class;
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RK
1016 if (MERGE_TO_OTHER (secondary_type,
1017 reload_when_needed[tertiary_reload],
1018 opnum,
1019 reload_opnum[tertiary_reload]))
1020 reload_when_needed[tertiary_reload] = RELOAD_OTHER;
1021 reload_opnum[tertiary_reload]
1022 = MIN (reload_opnum[tertiary_reload], opnum);
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RK
1023 reload_optional[tertiary_reload] &= optional;
1024 reload_secondary_p[tertiary_reload] = 1;
1025 }
1026
1027 if (tertiary_reload == n_reloads)
1028 {
1029 /* We need to make a new tertiary reload for this register
1030 class. */
1031 reload_in[tertiary_reload] = reload_out[tertiary_reload] = 0;
1032 reload_reg_class[tertiary_reload] = tertiary_class;
1033 reload_inmode[tertiary_reload] = tertiary_mode;
1034 reload_outmode[tertiary_reload] = tertiary_mode;
1035 reload_reg_rtx[tertiary_reload] = 0;
1036 reload_optional[tertiary_reload] = optional;
1037 reload_inc[tertiary_reload] = 0;
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RK
1038 /* Maybe we could combine these, but it seems too tricky. */
1039 reload_nocombine[tertiary_reload] = 1;
1040 reload_in_reg[tertiary_reload] = 0;
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RK
1041 reload_opnum[tertiary_reload] = opnum;
1042 reload_when_needed[tertiary_reload] = secondary_type;
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RK
1043 reload_secondary_reload[tertiary_reload] = -1;
1044 reload_secondary_icode[tertiary_reload] = CODE_FOR_nothing;
1045 reload_secondary_p[tertiary_reload] = 1;
1046
1047 n_reloads++;
1048 i = n_reloads;
1049 }
1050 }
1051
1052 /* See if we can reuse an existing secondary reload. */
1053 for (secondary_reload = 0; secondary_reload < n_reloads;
1054 secondary_reload++)
1055 if (reload_secondary_p[secondary_reload]
1056 && (reg_class_subset_p (secondary_class,
1057 reload_reg_class[secondary_reload])
1058 || reg_class_subset_p (reload_reg_class[secondary_reload],
1059 secondary_class))
1060 && ((reload_inmode[secondary_reload] == secondary_mode)
1061 || reload_inmode[secondary_reload] == VOIDmode)
1062 && ((reload_outmode[secondary_reload] == secondary_out_mode)
1063 || reload_outmode[secondary_reload] == VOIDmode)
1064 && reload_secondary_reload[secondary_reload] == tertiary_reload
a8c9daeb
RK
1065 && reload_secondary_icode[secondary_reload] == tertiary_icode
1066 && (reg_class_size[(int) secondary_class] == 1
1067#ifdef SMALL_REGISTER_CLASSES
1068 || 1
1069#endif
1070 )
1071 && MERGABLE_RELOADS (secondary_type,
1072 reload_when_needed[secondary_reload],
1073 opnum, reload_opnum[secondary_reload]))
eab89b90
RK
1074 {
1075 if (secondary_mode != VOIDmode)
1076 reload_inmode[secondary_reload] = secondary_mode;
1077 if (secondary_out_mode != VOIDmode)
1078 reload_outmode[secondary_reload] = secondary_out_mode;
1079 if (reg_class_subset_p (secondary_class,
1080 reload_reg_class[secondary_reload]))
1081 reload_reg_class[secondary_reload] = secondary_class;
a8c9daeb
RK
1082 if (MERGE_TO_OTHER (secondary_type,
1083 reload_when_needed[secondary_reload],
1084 opnum, reload_opnum[secondary_reload]))
1085 reload_when_needed[secondary_reload] = RELOAD_OTHER;
1086 reload_opnum[secondary_reload]
1087 = MIN (reload_opnum[secondary_reload], opnum);
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RK
1088 reload_optional[secondary_reload] &= optional;
1089 reload_secondary_p[secondary_reload] = 1;
1090 }
1091
1092 if (secondary_reload == n_reloads)
1093 {
1094 /* We need to make a new secondary reload for this register
1095 class. */
1096 reload_in[secondary_reload] = reload_out[secondary_reload] = 0;
1097 reload_reg_class[secondary_reload] = secondary_class;
1098 reload_inmode[secondary_reload] = secondary_mode;
1099 reload_outmode[secondary_reload] = secondary_out_mode;
1100 reload_reg_rtx[secondary_reload] = 0;
1101 reload_optional[secondary_reload] = optional;
1102 reload_inc[secondary_reload] = 0;
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1103 /* Maybe we could combine these, but it seems too tricky. */
1104 reload_nocombine[secondary_reload] = 1;
1105 reload_in_reg[secondary_reload] = 0;
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1106 reload_opnum[secondary_reload] = opnum;
1107 reload_when_needed[secondary_reload] = secondary_type;
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RK
1108 reload_secondary_reload[secondary_reload] = tertiary_reload;
1109 reload_secondary_icode[secondary_reload] = tertiary_icode;
1110 reload_secondary_p[secondary_reload] = 1;
1111
1112 n_reloads++;
1113 i = n_reloads;
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RK
1114
1115#ifdef SECONDARY_MEMORY_NEEDED
1116 /* If we need a memory location to copy between the two
1117 reload regs, set it up now. */
1118
1119 if (in != 0 && secondary_icode == CODE_FOR_nothing
1120 && SECONDARY_MEMORY_NEEDED (secondary_class, class, inmode))
a8c9daeb 1121 get_secondary_mem (in, inmode, opnum, type);
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RK
1122
1123 if (out != 0 && secondary_icode == CODE_FOR_nothing
1124 && SECONDARY_MEMORY_NEEDED (class, secondary_class, outmode))
a8c9daeb 1125 get_secondary_mem (out, outmode, opnum, type);
0dadecf6 1126#endif
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1127 }
1128 }
1129#endif
1130
1131 /* We found no existing reload suitable for re-use.
1132 So add an additional reload. */
1133
1134 reload_in[i] = in;
1135 reload_out[i] = out;
1136 reload_reg_class[i] = class;
1137 reload_inmode[i] = inmode;
1138 reload_outmode[i] = outmode;
1139 reload_reg_rtx[i] = 0;
1140 reload_optional[i] = optional;
1141 reload_inc[i] = 0;
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1142 reload_nocombine[i] = 0;
1143 reload_in_reg[i] = inloc ? *inloc : 0;
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RK
1144 reload_opnum[i] = opnum;
1145 reload_when_needed[i] = type;
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1146 reload_secondary_reload[i] = secondary_reload;
1147 reload_secondary_icode[i] = secondary_icode;
1148 reload_secondary_p[i] = 0;
1149
1150 n_reloads++;
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RK
1151
1152#ifdef SECONDARY_MEMORY_NEEDED
1153 /* If a memory location is needed for the copy, make one. */
1154 if (in != 0 && GET_CODE (in) == REG
1155 && REGNO (in) < FIRST_PSEUDO_REGISTER
1156 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1157 class, inmode))
a8c9daeb 1158 get_secondary_mem (in, inmode, opnum, type);
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RK
1159
1160 if (out != 0 && GET_CODE (out) == REG
1161 && REGNO (out) < FIRST_PSEUDO_REGISTER
1162 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1163 outmode))
a8c9daeb 1164 get_secondary_mem (out, outmode, opnum, type);
0dadecf6 1165#endif
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RK
1166 }
1167 else
1168 {
1169 /* We are reusing an existing reload,
1170 but we may have additional information for it.
1171 For example, we may now have both IN and OUT
1172 while the old one may have just one of them. */
1173
1174 if (inmode != VOIDmode)
1175 reload_inmode[i] = inmode;
1176 if (outmode != VOIDmode)
1177 reload_outmode[i] = outmode;
1178 if (in != 0)
1179 reload_in[i] = in;
1180 if (out != 0)
1181 reload_out[i] = out;
1182 if (reg_class_subset_p (class, reload_reg_class[i]))
1183 reload_reg_class[i] = class;
1184 reload_optional[i] &= optional;
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RK
1185 if (MERGE_TO_OTHER (type, reload_when_needed[i],
1186 opnum, reload_opnum[i]))
1187 reload_when_needed[i] = RELOAD_OTHER;
1188 reload_opnum[i] = MIN (reload_opnum[i], opnum);
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RK
1189 }
1190
1191 /* If the ostensible rtx being reload differs from the rtx found
1192 in the location to substitute, this reload is not safe to combine
1193 because we cannot reliably tell whether it appears in the insn. */
1194
1195 if (in != 0 && in != *inloc)
1196 reload_nocombine[i] = 1;
1197
1198#if 0
1199 /* This was replaced by changes in find_reloads_address_1 and the new
1200 function inc_for_reload, which go with a new meaning of reload_inc. */
1201
1202 /* If this is an IN/OUT reload in an insn that sets the CC,
1203 it must be for an autoincrement. It doesn't work to store
1204 the incremented value after the insn because that would clobber the CC.
1205 So we must do the increment of the value reloaded from,
1206 increment it, store it back, then decrement again. */
1207 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1208 {
1209 out = 0;
1210 reload_out[i] = 0;
1211 reload_inc[i] = find_inc_amount (PATTERN (this_insn), in);
1212 /* If we did not find a nonzero amount-to-increment-by,
1213 that contradicts the belief that IN is being incremented
1214 in an address in this insn. */
1215 if (reload_inc[i] == 0)
1216 abort ();
1217 }
1218#endif
1219
1220 /* If we will replace IN and OUT with the reload-reg,
1221 record where they are located so that substitution need
1222 not do a tree walk. */
1223
1224 if (replace_reloads)
1225 {
1226 if (inloc != 0)
1227 {
1228 register struct replacement *r = &replacements[n_replacements++];
1229 r->what = i;
1230 r->subreg_loc = in_subreg_loc;
1231 r->where = inloc;
1232 r->mode = inmode;
1233 }
1234 if (outloc != 0 && outloc != inloc)
1235 {
1236 register struct replacement *r = &replacements[n_replacements++];
1237 r->what = i;
1238 r->where = outloc;
1239 r->subreg_loc = out_subreg_loc;
1240 r->mode = outmode;
1241 }
1242 }
1243
1244 /* If this reload is just being introduced and it has both
1245 an incoming quantity and an outgoing quantity that are
1246 supposed to be made to match, see if either one of the two
1247 can serve as the place to reload into.
1248
1249 If one of them is acceptable, set reload_reg_rtx[i]
1250 to that one. */
1251
1252 if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0)
1253 {
1254 reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc,
1255 reload_reg_class[i], i);
1256
1257 /* If the outgoing register already contains the same value
1258 as the incoming one, we can dispense with loading it.
1259 The easiest way to tell the caller that is to give a phony
1260 value for the incoming operand (same as outgoing one). */
1261 if (reload_reg_rtx[i] == out
1262 && (GET_CODE (in) == REG || CONSTANT_P (in))
1263 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1264 static_reload_reg_p, i, inmode))
1265 reload_in[i] = out;
1266 }
1267
1268 /* If this is an input reload and the operand contains a register that
1269 dies in this insn and is used nowhere else, see if it is the right class
1270 to be used for this reload. Use it if so. (This occurs most commonly
1271 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1272 this if it is also an output reload that mentions the register unless
1273 the output is a SUBREG that clobbers an entire register.
1274
1275 Note that the operand might be one of the spill regs, if it is a
1276 pseudo reg and we are in a block where spilling has not taken place.
1277 But if there is no spilling in this block, that is OK.
1278 An explicitly used hard reg cannot be a spill reg. */
1279
1280 if (reload_reg_rtx[i] == 0 && in != 0)
1281 {
1282 rtx note;
1283 int regno;
1284
1285 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1286 if (REG_NOTE_KIND (note) == REG_DEAD
1287 && GET_CODE (XEXP (note, 0)) == REG
1288 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1289 && reg_mentioned_p (XEXP (note, 0), in)
1290 && ! refers_to_regno_for_reload_p (regno,
1291 (regno
1292 + HARD_REGNO_NREGS (regno,
1293 inmode)),
1294 PATTERN (this_insn), inloc)
05b4ec4f
RS
1295 /* If this is also an output reload, IN cannot be used as
1296 the reload register if it is set in this insn unless IN
1297 is also OUT. */
1298 && (out == 0 || in == out
1299 || ! hard_reg_set_here_p (regno,
1300 (regno
1301 + HARD_REGNO_NREGS (regno,
1302 inmode)),
1303 PATTERN (this_insn)))
1304 /* ??? Why is this code so different from the previous?
1305 Is there any simple coherent way to describe the two together?
1306 What's going on here. */
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1307 && (in != out
1308 || (GET_CODE (in) == SUBREG
1309 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1310 / UNITS_PER_WORD)
1311 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1312 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1313 /* Make sure the operand fits in the reg that dies. */
1314 && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1315 && HARD_REGNO_MODE_OK (regno, inmode)
1316 && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0)))
1317 && HARD_REGNO_MODE_OK (regno, outmode)
1318 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno)
1319 && !fixed_regs[regno])
1320 {
1321 reload_reg_rtx[i] = gen_rtx (REG, inmode, regno);
1322 break;
1323 }
1324 }
1325
1326 if (out)
1327 output_reloadnum = i;
1328
1329 return i;
1330}
1331
1332/* Record an additional place we must replace a value
1333 for which we have already recorded a reload.
1334 RELOADNUM is the value returned by push_reload
1335 when the reload was recorded.
1336 This is used in insn patterns that use match_dup. */
1337
1338static void
1339push_replacement (loc, reloadnum, mode)
1340 rtx *loc;
1341 int reloadnum;
1342 enum machine_mode mode;
1343{
1344 if (replace_reloads)
1345 {
1346 register struct replacement *r = &replacements[n_replacements++];
1347 r->what = reloadnum;
1348 r->where = loc;
1349 r->subreg_loc = 0;
1350 r->mode = mode;
1351 }
1352}
1353\f
a8c9daeb
RK
1354/* Transfer all replacements that used to be in reload FROM to be in
1355 reload TO. */
1356
1357void
1358transfer_replacements (to, from)
1359 int to, from;
1360{
1361 int i;
1362
1363 for (i = 0; i < n_replacements; i++)
1364 if (replacements[i].what == from)
1365 replacements[i].what = to;
1366}
1367\f
eab89b90
RK
1368/* If there is only one output reload, and it is not for an earlyclobber
1369 operand, try to combine it with a (logically unrelated) input reload
1370 to reduce the number of reload registers needed.
1371
1372 This is safe if the input reload does not appear in
1373 the value being output-reloaded, because this implies
1374 it is not needed any more once the original insn completes.
1375
1376 If that doesn't work, see we can use any of the registers that
1377 die in this insn as a reload register. We can if it is of the right
1378 class and does not appear in the value being output-reloaded. */
1379
1380static void
1381combine_reloads ()
1382{
1383 int i;
1384 int output_reload = -1;
1385 rtx note;
1386
1387 /* Find the output reload; return unless there is exactly one
1388 and that one is mandatory. */
1389
1390 for (i = 0; i < n_reloads; i++)
1391 if (reload_out[i] != 0)
1392 {
1393 if (output_reload >= 0)
1394 return;
1395 output_reload = i;
1396 }
1397
1398 if (output_reload < 0 || reload_optional[output_reload])
1399 return;
1400
1401 /* An input-output reload isn't combinable. */
1402
1403 if (reload_in[output_reload] != 0)
1404 return;
1405
6dc42e49 1406 /* If this reload is for an earlyclobber operand, we can't do anything. */
eab89b90
RK
1407
1408 for (i = 0; i < n_earlyclobbers; i++)
1409 if (reload_out[output_reload] == reload_earlyclobbers[i])
1410 return;
1411
1412 /* Check each input reload; can we combine it? */
1413
1414 for (i = 0; i < n_reloads; i++)
1415 if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i]
1416 /* Life span of this reload must not extend past main insn. */
a8c9daeb
RK
1417 && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS
1418 && reload_when_needed[i] != RELOAD_OTHER
1419 && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i])
1420 == CLASS_MAX_NREGS (reload_reg_class[output_reload],
1421 reload_outmode[output_reload]))
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RK
1422 && reload_inc[i] == 0
1423 && reload_reg_rtx[i] == 0
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1424 /* Don't combine two reloads with different secondary reloads. */
1425 && (reload_secondary_reload[i] == reload_secondary_reload[output_reload]
1426 || reload_secondary_reload[i] == -1
1427 || reload_secondary_reload[output_reload] == -1)
a8c9daeb
RK
1428#ifdef SECONDARY_MEMORY_NEEDED
1429 /* Likewise for different secondary memory locations. */
77545d45
RK
1430 && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0
1431 || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0
1432 || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]],
1433 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]))
a8c9daeb
RK
1434#endif
1435#ifdef SMALL_REGISTER_CLASSES
1436 && reload_reg_class[i] == reload_reg_class[output_reload]
1437#else
eab89b90
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1438 && (reg_class_subset_p (reload_reg_class[i],
1439 reload_reg_class[output_reload])
1440 || reg_class_subset_p (reload_reg_class[output_reload],
1441 reload_reg_class[i]))
a8c9daeb 1442#endif
eab89b90
RK
1443 && (MATCHES (reload_in[i], reload_out[output_reload])
1444 /* Args reversed because the first arg seems to be
1445 the one that we imagine being modified
1446 while the second is the one that might be affected. */
bfa30b22
RK
1447 || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload],
1448 reload_in[i])
eab89b90
RK
1449 /* However, if the input is a register that appears inside
1450 the output, then we also can't share.
1451 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1452 If the same reload reg is used for both reg 69 and the
1453 result to be stored in memory, then that result
1454 will clobber the address of the memory ref. */
1455 && ! (GET_CODE (reload_in[i]) == REG
bfa30b22 1456 && reg_overlap_mentioned_for_reload_p (reload_in[i],
a8c9daeb
RK
1457 reload_out[output_reload]))))
1458 && (reg_class_size[(int) reload_reg_class[i]]
1459#ifdef SMALL_REGISTER_CLASSES
1460 || 1
1461#endif
1462 )
1463 /* We will allow making things slightly worse by combining an
1464 input and an output, but no worse than that. */
1465 && (reload_when_needed[i] == RELOAD_FOR_INPUT
1466 || reload_when_needed[i] == RELOAD_FOR_OUTPUT))
eab89b90
RK
1467 {
1468 int j;
1469
1470 /* We have found a reload to combine with! */
1471 reload_out[i] = reload_out[output_reload];
1472 reload_outmode[i] = reload_outmode[output_reload];
1473 /* Mark the old output reload as inoperative. */
1474 reload_out[output_reload] = 0;
1475 /* The combined reload is needed for the entire insn. */
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RK
1476 reload_when_needed[i] = RELOAD_OTHER;
1477 /* If the output reload had a secondary reload, copy it. */
1478 if (reload_secondary_reload[output_reload] != -1)
1479 reload_secondary_reload[i] = reload_secondary_reload[output_reload];
a8c9daeb
RK
1480#ifdef SECONDARY_MEMORY_NEEDED
1481 /* Copy any secondary MEM. */
77545d45
RK
1482 if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0)
1483 secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]]
1484 = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]];
a8c9daeb 1485#endif
eab89b90
RK
1486 /* If required, minimize the register class. */
1487 if (reg_class_subset_p (reload_reg_class[output_reload],
1488 reload_reg_class[i]))
1489 reload_reg_class[i] = reload_reg_class[output_reload];
1490
1491 /* Transfer all replacements from the old reload to the combined. */
1492 for (j = 0; j < n_replacements; j++)
1493 if (replacements[j].what == output_reload)
1494 replacements[j].what = i;
1495
1496 return;
1497 }
1498
1499 /* If this insn has only one operand that is modified or written (assumed
1500 to be the first), it must be the one corresponding to this reload. It
1501 is safe to use anything that dies in this insn for that output provided
1502 that it does not occur in the output (we already know it isn't an
1503 earlyclobber. If this is an asm insn, give up. */
1504
1505 if (INSN_CODE (this_insn) == -1)
1506 return;
1507
1508 for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++)
1509 if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '='
1510 || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+')
1511 return;
1512
1513 /* See if some hard register that dies in this insn and is not used in
1514 the output is the right class. Only works if the register we pick
1515 up can fully hold our output reload. */
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
1518 && GET_CODE (XEXP (note, 0)) == REG
bfa30b22
RK
1519 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1520 reload_out[output_reload])
eab89b90
RK
1521 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1522 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1523 && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]],
1524 REGNO (XEXP (note, 0)))
1525 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload])
1526 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1527 && ! fixed_regs[REGNO (XEXP (note, 0))])
1528 {
1529 reload_reg_rtx[output_reload] = gen_rtx (REG,
1530 reload_outmode[output_reload],
1531 REGNO (XEXP (note, 0)));
1532 return;
1533 }
1534}
1535\f
1536/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1537 See if one of IN and OUT is a register that may be used;
1538 this is desirable since a spill-register won't be needed.
1539 If so, return the register rtx that proves acceptable.
1540
1541 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1542 CLASS is the register class required for the reload.
1543
1544 If FOR_REAL is >= 0, it is the number of the reload,
1545 and in some cases when it can be discovered that OUT doesn't need
1546 to be computed, clear out reload_out[FOR_REAL].
1547
1548 If FOR_REAL is -1, this should not be done, because this call
1549 is just to see if a register can be found, not to find and install it. */
1550
1551static rtx
1552find_dummy_reload (real_in, real_out, inloc, outloc, class, for_real)
1553 rtx real_in, real_out;
1554 rtx *inloc, *outloc;
1555 enum reg_class class;
1556 int for_real;
1557{
1558 rtx in = real_in;
1559 rtx out = real_out;
1560 int in_offset = 0;
1561 int out_offset = 0;
1562 rtx value = 0;
1563
1564 /* If operands exceed a word, we can't use either of them
1565 unless they have the same size. */
1566 if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in))
1567 && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD
1568 || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD))
1569 return 0;
1570
1571 /* Find the inside of any subregs. */
1572 while (GET_CODE (out) == SUBREG)
1573 {
1574 out_offset = SUBREG_WORD (out);
1575 out = SUBREG_REG (out);
1576 }
1577 while (GET_CODE (in) == SUBREG)
1578 {
1579 in_offset = SUBREG_WORD (in);
1580 in = SUBREG_REG (in);
1581 }
1582
1583 /* Narrow down the reg class, the same way push_reload will;
1584 otherwise we might find a dummy now, but push_reload won't. */
1585 class = PREFERRED_RELOAD_CLASS (in, class);
1586
1587 /* See if OUT will do. */
1588 if (GET_CODE (out) == REG
1589 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1590 {
1591 register int regno = REGNO (out) + out_offset;
1592 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out));
d3b9996a 1593 rtx saved_rtx;
eab89b90
RK
1594
1595 /* When we consider whether the insn uses OUT,
1596 ignore references within IN. They don't prevent us
1597 from copying IN into OUT, because those refs would
1598 move into the insn that reloads IN.
1599
1600 However, we only ignore IN in its role as this reload.
1601 If the insn uses IN elsewhere and it contains OUT,
1602 that counts. We can't be sure it's the "same" operand
1603 so it might not go through this reload. */
d3b9996a 1604 saved_rtx = *inloc;
eab89b90
RK
1605 *inloc = const0_rtx;
1606
1607 if (regno < FIRST_PSEUDO_REGISTER
1608 /* A fixed reg that can overlap other regs better not be used
1609 for reloading in any way. */
1610#ifdef OVERLAPPING_REGNO_P
1611 && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))
1612#endif
1613 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1614 PATTERN (this_insn), outloc))
1615 {
1616 int i;
1617 for (i = 0; i < nwords; i++)
1618 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1619 regno + i))
1620 break;
1621
1622 if (i == nwords)
1623 {
1624 if (GET_CODE (real_out) == REG)
1625 value = real_out;
1626 else
1627 value = gen_rtx (REG, GET_MODE (real_out), regno);
1628 }
1629 }
1630
d3b9996a 1631 *inloc = saved_rtx;
eab89b90
RK
1632 }
1633
1634 /* Consider using IN if OUT was not acceptable
1635 or if OUT dies in this insn (like the quotient in a divmod insn).
1636 We can't use IN unless it is dies in this insn,
1637 which means we must know accurately which hard regs are live.
1638 Also, the result can't go in IN if IN is used within OUT. */
1639 if (hard_regs_live_known
1640 && GET_CODE (in) == REG
1641 && REGNO (in) < FIRST_PSEUDO_REGISTER
1642 && (value == 0
1643 || find_reg_note (this_insn, REG_UNUSED, real_out))
1644 && find_reg_note (this_insn, REG_DEAD, real_in)
1645 && !fixed_regs[REGNO (in)]
1646 && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out)))
1647 {
1648 register int regno = REGNO (in) + in_offset;
1649 int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in));
1650
fb3821f7 1651 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR)
eab89b90
RK
1652 && ! hard_reg_set_here_p (regno, regno + nwords,
1653 PATTERN (this_insn)))
1654 {
1655 int i;
1656 for (i = 0; i < nwords; i++)
1657 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1658 regno + i))
1659 break;
1660
1661 if (i == nwords)
1662 {
1663 /* If we were going to use OUT as the reload reg
1664 and changed our mind, it means OUT is a dummy that
1665 dies here. So don't bother copying value to it. */
1666 if (for_real >= 0 && value == real_out)
1667 reload_out[for_real] = 0;
1668 if (GET_CODE (real_in) == REG)
1669 value = real_in;
1670 else
1671 value = gen_rtx (REG, GET_MODE (real_in), regno);
1672 }
1673 }
1674 }
1675
1676 return value;
1677}
1678\f
1679/* This page contains subroutines used mainly for determining
1680 whether the IN or an OUT of a reload can serve as the
1681 reload register. */
1682
1683/* Return 1 if expression X alters a hard reg in the range
1684 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1685 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1686 X should be the body of an instruction. */
1687
1688static int
1689hard_reg_set_here_p (beg_regno, end_regno, x)
1690 register int beg_regno, end_regno;
1691 rtx x;
1692{
1693 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
1694 {
1695 register rtx op0 = SET_DEST (x);
1696 while (GET_CODE (op0) == SUBREG)
1697 op0 = SUBREG_REG (op0);
1698 if (GET_CODE (op0) == REG)
1699 {
1700 register int r = REGNO (op0);
1701 /* See if this reg overlaps range under consideration. */
1702 if (r < end_regno
1703 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
1704 return 1;
1705 }
1706 }
1707 else if (GET_CODE (x) == PARALLEL)
1708 {
1709 register int i = XVECLEN (x, 0) - 1;
1710 for (; i >= 0; i--)
1711 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
1712 return 1;
1713 }
1714
1715 return 0;
1716}
1717
1718/* Return 1 if ADDR is a valid memory address for mode MODE,
1719 and check that each pseudo reg has the proper kind of
1720 hard reg. */
1721
1722int
1723strict_memory_address_p (mode, addr)
1724 enum machine_mode mode;
1725 register rtx addr;
1726{
1727 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
1728 return 0;
1729
1730 win:
1731 return 1;
1732}
eab89b90
RK
1733\f
1734/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1735 if they are the same hard reg, and has special hacks for
1736 autoincrement and autodecrement.
1737 This is specifically intended for find_reloads to use
1738 in determining whether two operands match.
1739 X is the operand whose number is the lower of the two.
1740
1741 The value is 2 if Y contains a pre-increment that matches
1742 a non-incrementing address in X. */
1743
1744/* ??? To be completely correct, we should arrange to pass
1745 for X the output operand and for Y the input operand.
1746 For now, we assume that the output operand has the lower number
1747 because that is natural in (SET output (... input ...)). */
1748
1749int
1750operands_match_p (x, y)
1751 register rtx x, y;
1752{
1753 register int i;
1754 register RTX_CODE code = GET_CODE (x);
1755 register char *fmt;
1756 int success_2;
1757
1758 if (x == y)
1759 return 1;
1760 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
1761 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
1762 && GET_CODE (SUBREG_REG (y)) == REG)))
1763 {
1764 register int j;
1765
1766 if (code == SUBREG)
1767 {
1768 i = REGNO (SUBREG_REG (x));
1769 if (i >= FIRST_PSEUDO_REGISTER)
1770 goto slow;
1771 i += SUBREG_WORD (x);
1772 }
1773 else
1774 i = REGNO (x);
1775
1776 if (GET_CODE (y) == SUBREG)
1777 {
1778 j = REGNO (SUBREG_REG (y));
1779 if (j >= FIRST_PSEUDO_REGISTER)
1780 goto slow;
1781 j += SUBREG_WORD (y);
1782 }
1783 else
1784 j = REGNO (y);
1785
dca52d80
JW
1786 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1787 multiple hard register group, so that for example (reg:DI 0) and
1788 (reg:SI 1) will be considered the same register. */
1789 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1790 && i < FIRST_PSEUDO_REGISTER)
1791 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
1792 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1793 && j < FIRST_PSEUDO_REGISTER)
1794 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
1795
eab89b90
RK
1796 return i == j;
1797 }
1798 /* If two operands must match, because they are really a single
1799 operand of an assembler insn, then two postincrements are invalid
1800 because the assembler insn would increment only once.
1801 On the other hand, an postincrement matches ordinary indexing
1802 if the postincrement is the output operand. */
1803 if (code == POST_DEC || code == POST_INC)
1804 return operands_match_p (XEXP (x, 0), y);
1805 /* Two preincrements are invalid
1806 because the assembler insn would increment only once.
1807 On the other hand, an preincrement matches ordinary indexing
1808 if the preincrement is the input operand.
1809 In this case, return 2, since some callers need to do special
1810 things when this happens. */
1811 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC)
1812 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
1813
1814 slow:
1815
1816 /* Now we have disposed of all the cases
1817 in which different rtx codes can match. */
1818 if (code != GET_CODE (y))
1819 return 0;
1820 if (code == LABEL_REF)
1821 return XEXP (x, 0) == XEXP (y, 0);
1822 if (code == SYMBOL_REF)
1823 return XSTR (x, 0) == XSTR (y, 0);
1824
1825 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1826
1827 if (GET_MODE (x) != GET_MODE (y))
1828 return 0;
1829
1830 /* Compare the elements. If any pair of corresponding elements
1831 fail to match, return 0 for the whole things. */
1832
1833 success_2 = 0;
1834 fmt = GET_RTX_FORMAT (code);
1835 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1836 {
1837 int val;
1838 switch (fmt[i])
1839 {
fb3821f7
CH
1840 case 'w':
1841 if (XWINT (x, i) != XWINT (y, i))
1842 return 0;
1843 break;
1844
eab89b90
RK
1845 case 'i':
1846 if (XINT (x, i) != XINT (y, i))
1847 return 0;
1848 break;
1849
1850 case 'e':
1851 val = operands_match_p (XEXP (x, i), XEXP (y, i));
1852 if (val == 0)
1853 return 0;
1854 /* If any subexpression returns 2,
1855 we should return 2 if we are successful. */
1856 if (val == 2)
1857 success_2 = 1;
1858 break;
1859
1860 case '0':
1861 break;
1862
1863 /* It is believed that rtx's at this level will never
1864 contain anything but integers and other rtx's,
1865 except for within LABEL_REFs and SYMBOL_REFs. */
1866 default:
1867 abort ();
1868 }
1869 }
1870 return 1 + success_2;
1871}
1872\f
1873/* Return the number of times character C occurs in string S. */
1874
e4600702 1875int
eab89b90
RK
1876n_occurrences (c, s)
1877 char c;
1878 char *s;
1879{
1880 int n = 0;
1881 while (*s)
1882 n += (*s++ == c);
1883 return n;
1884}
1885\f
eab89b90
RK
1886/* Describe the range of registers or memory referenced by X.
1887 If X is a register, set REG_FLAG and put the first register
1888 number into START and the last plus one into END.
1889 If X is a memory reference, put a base address into BASE
1890 and a range of integer offsets into START and END.
1891 If X is pushing on the stack, we can assume it causes no trouble,
1892 so we set the SAFE field. */
1893
1894static struct decomposition
1895decompose (x)
1896 rtx x;
1897{
1898 struct decomposition val;
1899 int all_const = 0;
1900
1901 val.reg_flag = 0;
1902 val.safe = 0;
1903 if (GET_CODE (x) == MEM)
1904 {
1905 rtx base, offset = 0;
1906 rtx addr = XEXP (x, 0);
1907
1908 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
1909 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
1910 {
1911 val.base = XEXP (addr, 0);
1912 val.start = - GET_MODE_SIZE (GET_MODE (x));
1913 val.end = GET_MODE_SIZE (GET_MODE (x));
1914 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
1915 return val;
1916 }
1917
1918 if (GET_CODE (addr) == CONST)
1919 {
1920 addr = XEXP (addr, 0);
1921 all_const = 1;
1922 }
1923 if (GET_CODE (addr) == PLUS)
1924 {
1925 if (CONSTANT_P (XEXP (addr, 0)))
1926 {
1927 base = XEXP (addr, 1);
1928 offset = XEXP (addr, 0);
1929 }
1930 else if (CONSTANT_P (XEXP (addr, 1)))
1931 {
1932 base = XEXP (addr, 0);
1933 offset = XEXP (addr, 1);
1934 }
1935 }
1936
1937 if (offset == 0)
1938 {
1939 base = addr;
1940 offset = const0_rtx;
1941 }
1942 if (GET_CODE (offset) == CONST)
1943 offset = XEXP (offset, 0);
1944 if (GET_CODE (offset) == PLUS)
1945 {
1946 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
1947 {
1948 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1));
1949 offset = XEXP (offset, 0);
1950 }
1951 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
1952 {
1953 base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0));
1954 offset = XEXP (offset, 1);
1955 }
1956 else
1957 {
1958 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1959 offset = const0_rtx;
1960 }
1961 }
1962 else if (GET_CODE (offset) != CONST_INT)
1963 {
1964 base = gen_rtx (PLUS, GET_MODE (base), base, offset);
1965 offset = const0_rtx;
1966 }
1967
1968 if (all_const && GET_CODE (base) == PLUS)
1969 base = gen_rtx (CONST, GET_MODE (base), base);
1970
1971 if (GET_CODE (offset) != CONST_INT)
1972 abort ();
1973
1974 val.start = INTVAL (offset);
1975 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
1976 val.base = base;
1977 return val;
1978 }
1979 else if (GET_CODE (x) == REG)
1980 {
1981 val.reg_flag = 1;
1982 val.start = true_regnum (x);
1983 if (val.start < 0)
1984 {
1985 /* A pseudo with no hard reg. */
1986 val.start = REGNO (x);
1987 val.end = val.start + 1;
1988 }
1989 else
1990 /* A hard reg. */
1991 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
1992 }
1993 else if (GET_CODE (x) == SUBREG)
1994 {
1995 if (GET_CODE (SUBREG_REG (x)) != REG)
1996 /* This could be more precise, but it's good enough. */
1997 return decompose (SUBREG_REG (x));
1998 val.reg_flag = 1;
1999 val.start = true_regnum (x);
2000 if (val.start < 0)
2001 return decompose (SUBREG_REG (x));
2002 else
2003 /* A hard reg. */
2004 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2005 }
2006 else if (CONSTANT_P (x)
2007 /* This hasn't been assigned yet, so it can't conflict yet. */
2008 || GET_CODE (x) == SCRATCH)
2009 val.safe = 1;
2010 else
2011 abort ();
2012 return val;
2013}
2014
2015/* Return 1 if altering Y will not modify the value of X.
2016 Y is also described by YDATA, which should be decompose (Y). */
2017
2018static int
2019immune_p (x, y, ydata)
2020 rtx x, y;
2021 struct decomposition ydata;
2022{
2023 struct decomposition xdata;
2024
2025 if (ydata.reg_flag)
fb3821f7 2026 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR);
eab89b90
RK
2027 if (ydata.safe)
2028 return 1;
2029
2030 if (GET_CODE (y) != MEM)
2031 abort ();
2032 /* If Y is memory and X is not, Y can't affect X. */
2033 if (GET_CODE (x) != MEM)
2034 return 1;
2035
2036 xdata = decompose (x);
2037
2038 if (! rtx_equal_p (xdata.base, ydata.base))
2039 {
2040 /* If bases are distinct symbolic constants, there is no overlap. */
2041 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2042 return 1;
2043 /* Constants and stack slots never overlap. */
2044 if (CONSTANT_P (xdata.base)
2045 && (ydata.base == frame_pointer_rtx
2046 || ydata.base == stack_pointer_rtx))
2047 return 1;
2048 if (CONSTANT_P (ydata.base)
2049 && (xdata.base == frame_pointer_rtx
2050 || xdata.base == stack_pointer_rtx))
2051 return 1;
2052 /* If either base is variable, we don't know anything. */
2053 return 0;
2054 }
2055
2056
2057 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2058}
44ace968 2059
f72aed24 2060/* Similar, but calls decompose. */
44ace968
JW
2061
2062int
2063safe_from_earlyclobber (op, clobber)
2064 rtx op, clobber;
2065{
2066 struct decomposition early_data;
2067
2068 early_data = decompose (clobber);
2069 return immune_p (op, clobber, early_data);
2070}
eab89b90
RK
2071\f
2072/* Main entry point of this file: search the body of INSN
2073 for values that need reloading and record them with push_reload.
2074 REPLACE nonzero means record also where the values occur
2075 so that subst_reloads can be used.
2076
2077 IND_LEVELS says how many levels of indirection are supported by this
2078 machine; a value of zero means that a memory reference is not a valid
2079 memory address.
2080
2081 LIVE_KNOWN says we have valid information about which hard
2082 regs are live at each point in the program; this is true when
2083 we are called from global_alloc but false when stupid register
2084 allocation has been done.
2085
2086 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2087 which is nonnegative if the reg has been commandeered for reloading into.
2088 It is copied into STATIC_RELOAD_REG_P and referenced from there
2089 by various subroutines. */
2090
2091void
2092find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2093 rtx insn;
2094 int replace, ind_levels;
2095 int live_known;
2096 short *reload_reg_p;
2097{
eab89b90
RK
2098#ifdef REGISTER_CONSTRAINTS
2099
eab89b90 2100 register int insn_code_number;
a8c9daeb 2101 register int i, j;
eab89b90
RK
2102 int noperands;
2103 /* These are the constraints for the insn. We don't change them. */
2104 char *constraints1[MAX_RECOG_OPERANDS];
2105 /* These start out as the constraints for the insn
2106 and they are chewed up as we consider alternatives. */
2107 char *constraints[MAX_RECOG_OPERANDS];
2108 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2109 a register. */
2110 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2111 char pref_or_nothing[MAX_RECOG_OPERANDS];
2112 /* Nonzero for a MEM operand whose entire address needs a reload. */
2113 int address_reloaded[MAX_RECOG_OPERANDS];
a8c9daeb
RK
2114 /* Value of enum reload_type to use for operand. */
2115 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2116 /* Value of enum reload_type to use within address of operand. */
2117 enum reload_type address_type[MAX_RECOG_OPERANDS];
2118 /* Save the usage of each operand. */
2119 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
eab89b90
RK
2120 int no_input_reloads = 0, no_output_reloads = 0;
2121 int n_alternatives;
2122 int this_alternative[MAX_RECOG_OPERANDS];
2123 char this_alternative_win[MAX_RECOG_OPERANDS];
2124 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2125 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2126 int this_alternative_matches[MAX_RECOG_OPERANDS];
2127 int swapped;
2128 int goal_alternative[MAX_RECOG_OPERANDS];
2129 int this_alternative_number;
2130 int goal_alternative_number;
2131 int operand_reloadnum[MAX_RECOG_OPERANDS];
2132 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2133 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2134 char goal_alternative_win[MAX_RECOG_OPERANDS];
2135 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2136 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2137 int goal_alternative_swapped;
eab89b90
RK
2138 int best;
2139 int commutative;
2140 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2141 rtx substed_operand[MAX_RECOG_OPERANDS];
2142 rtx body = PATTERN (insn);
2143 rtx set = single_set (insn);
2144 int goal_earlyclobber, this_earlyclobber;
2145 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2146
2147 this_insn = insn;
2148 this_insn_is_asm = 0; /* Tentative. */
2149 n_reloads = 0;
2150 n_replacements = 0;
2151 n_memlocs = 0;
2152 n_earlyclobbers = 0;
2153 replace_reloads = replace;
2154 hard_regs_live_known = live_known;
2155 static_reload_reg_p = reload_reg_p;
2156
2157 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2158 neither are insns that SET cc0. Insns that use CC0 are not allowed
2159 to have any input reloads. */
2160 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2161 no_output_reloads = 1;
2162
2163#ifdef HAVE_cc0
2164 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2165 no_input_reloads = 1;
2166 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2167 no_output_reloads = 1;
2168#endif
2169
0dadecf6
RK
2170#ifdef SECONDARY_MEMORY_NEEDED
2171 /* The eliminated forms of any secondary memory locations are per-insn, so
2172 clear them out here. */
2173
2174 bzero (secondary_memlocs_elim, sizeof secondary_memlocs_elim);
2175#endif
2176
eab89b90
RK
2177 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2178 Make OPERANDS point to a vector of operand values.
2179 Make OPERAND_LOCS point to a vector of pointers to
2180 where the operands were found.
2181 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2182 constraint-strings for this insn.
2183 Return if the insn needs no reload processing. */
2184
2185 switch (GET_CODE (body))
2186 {
2187 case USE:
2188 case CLOBBER:
2189 case ASM_INPUT:
2190 case ADDR_VEC:
2191 case ADDR_DIFF_VEC:
2192 return;
2193
2194 case SET:
2195 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2196 is cheap to move between them. If it is not, there may not be an insn
2197 to do the copy, so we may need a reload. */
2198 if (GET_CODE (SET_DEST (body)) == REG
2199 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2200 && GET_CODE (SET_SRC (body)) == REG
2201 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2202 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2203 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2204 return;
2205 case PARALLEL:
2206 case ASM_OPERANDS:
a8c9daeb 2207 reload_n_operands = noperands = asm_noperands (body);
eab89b90
RK
2208 if (noperands >= 0)
2209 {
2210 /* This insn is an `asm' with operands. */
2211
2212 insn_code_number = -1;
2213 this_insn_is_asm = 1;
2214
2215 /* expand_asm_operands makes sure there aren't too many operands. */
2216 if (noperands > MAX_RECOG_OPERANDS)
2217 abort ();
2218
2219 /* Now get the operand values and constraints out of the insn. */
2220
2221 decode_asm_operands (body, recog_operand, recog_operand_loc,
2222 constraints, operand_mode);
2223 if (noperands > 0)
2224 {
2225 bcopy (constraints, constraints1, noperands * sizeof (char *));
2226 n_alternatives = n_occurrences (',', constraints[0]) + 1;
2227 for (i = 1; i < noperands; i++)
d45cf215 2228 if (n_alternatives != n_occurrences (',', constraints[i]) + 1)
eab89b90
RK
2229 {
2230 error_for_asm (insn, "operand constraints differ in number of alternatives");
2231 /* Avoid further trouble with this insn. */
2232 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
2233 n_reloads = 0;
2234 return;
2235 }
2236 }
2237 break;
2238 }
2239
2240 default:
2241 /* Ordinary insn: recognize it, get the operands via insn_extract
2242 and get the constraints. */
2243
2244 insn_code_number = recog_memoized (insn);
2245 if (insn_code_number < 0)
2246 fatal_insn_not_found (insn);
2247
a8c9daeb 2248 reload_n_operands = noperands = insn_n_operands[insn_code_number];
eab89b90
RK
2249 n_alternatives = insn_n_alternatives[insn_code_number];
2250 /* Just return "no reloads" if insn has no operands with constraints. */
2251 if (n_alternatives == 0)
2252 return;
2253 insn_extract (insn);
2254 for (i = 0; i < noperands; i++)
2255 {
2256 constraints[i] = constraints1[i]
2257 = insn_operand_constraint[insn_code_number][i];
2258 operand_mode[i] = insn_operand_mode[insn_code_number][i];
2259 }
2260 }
2261
2262 if (noperands == 0)
2263 return;
2264
2265 commutative = -1;
2266
2267 /* If we will need to know, later, whether some pair of operands
2268 are the same, we must compare them now and save the result.
2269 Reloading the base and index registers will clobber them
2270 and afterward they will fail to match. */
2271
2272 for (i = 0; i < noperands; i++)
2273 {
2274 register char *p;
2275 register int c;
2276
2277 substed_operand[i] = recog_operand[i];
2278 p = constraints[i];
2279
a8c9daeb
RK
2280 modified[i] = RELOAD_READ;
2281
2282 /* Scan this operand's constraint to see if it is an output operand,
2283 an in-out operand, is commutative, or should match another. */
eab89b90
RK
2284
2285 while (c = *p++)
a8c9daeb
RK
2286 {
2287 if (c == '=')
2288 modified[i] = RELOAD_WRITE;
2289 else if (c == '+')
2290 modified[i] = RELOAD_READ_WRITE;
2291 else if (c == '%')
2292 {
2293 /* The last operand should not be marked commutative. */
2294 if (i == noperands - 1)
2295 {
2296 if (this_insn_is_asm)
2297 warning_for_asm (this_insn,
2298 "`%%' constraint used with last operand");
2299 else
2300 abort ();
2301 }
2302 else
2303 commutative = i;
2304 }
2305 else if (c >= '0' && c <= '9')
2306 {
2307 c -= '0';
2308 operands_match[c][i]
2309 = operands_match_p (recog_operand[c], recog_operand[i]);
ea9c5b9e 2310
a8c9daeb
RK
2311 /* An operand may not match itself. */
2312 if (c == i)
2313 {
2314 if (this_insn_is_asm)
2315 warning_for_asm (this_insn,
2316 "operand %d has constraint %d", i, c);
2317 else
2318 abort ();
2319 }
ea9c5b9e 2320
a8c9daeb
RK
2321 /* If C can be commuted with C+1, and C might need to match I,
2322 then C+1 might also need to match I. */
2323 if (commutative >= 0)
2324 {
2325 if (c == commutative || c == commutative + 1)
2326 {
2327 int other = c + (c == commutative ? 1 : -1);
2328 operands_match[other][i]
2329 = operands_match_p (recog_operand[other], recog_operand[i]);
2330 }
2331 if (i == commutative || i == commutative + 1)
2332 {
2333 int other = i + (i == commutative ? 1 : -1);
2334 operands_match[c][other]
2335 = operands_match_p (recog_operand[c], recog_operand[other]);
2336 }
2337 /* Note that C is supposed to be less than I.
2338 No need to consider altering both C and I because in
2339 that case we would alter one into the other. */
2340 }
2341 }
2342 }
eab89b90
RK
2343 }
2344
2345 /* Examine each operand that is a memory reference or memory address
2346 and reload parts of the addresses into index registers.
eab89b90
RK
2347 Also here any references to pseudo regs that didn't get hard regs
2348 but are equivalent to constants get replaced in the insn itself
2349 with those constants. Nobody will ever see them again.
2350
2351 Finally, set up the preferred classes of each operand. */
2352
2353 for (i = 0; i < noperands; i++)
2354 {
2355 register RTX_CODE code = GET_CODE (recog_operand[i]);
a8c9daeb 2356
eab89b90 2357 address_reloaded[i] = 0;
a8c9daeb
RK
2358 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2359 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2360 : RELOAD_OTHER);
2361 address_type[i]
2362 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2363 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2364 : RELOAD_OTHER);
eab89b90
RK
2365
2366 if (constraints[i][0] == 'p')
2367 {
fb3821f7 2368 find_reloads_address (VOIDmode, NULL_PTR,
eab89b90 2369 recog_operand[i], recog_operand_loc[i],
a8c9daeb 2370 i, operand_type[i], ind_levels);
eab89b90
RK
2371 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2372 }
2373 else if (code == MEM)
2374 {
2375 if (find_reloads_address (GET_MODE (recog_operand[i]),
2376 recog_operand_loc[i],
2377 XEXP (recog_operand[i], 0),
2378 &XEXP (recog_operand[i], 0),
a8c9daeb 2379 i, address_type[i], ind_levels))
eab89b90
RK
2380 address_reloaded[i] = 1;
2381 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2382 }
2383 else if (code == SUBREG)
2384 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]
a8c9daeb
RK
2385 = find_reloads_toplev (recog_operand[i], i, address_type[i],
2386 ind_levels,
eab89b90
RK
2387 set != 0
2388 && &SET_DEST (set) == recog_operand_loc[i]);
2389 else if (code == REG)
2390 {
2391 /* This is equivalent to calling find_reloads_toplev.
2392 The code is duplicated for speed.
2393 When we find a pseudo always equivalent to a constant,
2394 we replace it by the constant. We must be sure, however,
2395 that we don't try to replace it in the insn in which it
2396 is being set. */
2397 register int regno = REGNO (recog_operand[i]);
2398 if (reg_equiv_constant[regno] != 0
2399 && (set == 0 || &SET_DEST (set) != recog_operand_loc[i]))
2400 substed_operand[i] = recog_operand[i]
2401 = reg_equiv_constant[regno];
2402#if 0 /* This might screw code in reload1.c to delete prior output-reload
2403 that feeds this insn. */
2404 if (reg_equiv_mem[regno] != 0)
2405 substed_operand[i] = recog_operand[i]
2406 = reg_equiv_mem[regno];
2407#endif
2408 if (reg_equiv_address[regno] != 0)
2409 {
2410 /* If reg_equiv_address is not a constant address, copy it,
2411 since it may be shared. */
2412 rtx address = reg_equiv_address[regno];
2413
2414 if (rtx_varies_p (address))
2415 address = copy_rtx (address);
2416
2417 /* If this is an output operand, we must output a CLOBBER
a8c9daeb
RK
2418 after INSN so find_equiv_reg knows REGNO is being written.
2419 Mark this insn specially, do we can put our output reloads
2420 after it. */
2421
2422 if (modified[i] != RELOAD_READ)
2423 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode,
2424 recog_operand[i]),
2425 insn),
2426 DImode);
eab89b90
RK
2427
2428 *recog_operand_loc[i] = recog_operand[i]
2429 = gen_rtx (MEM, GET_MODE (recog_operand[i]), address);
2430 RTX_UNCHANGING_P (recog_operand[i])
2431 = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
2432 find_reloads_address (GET_MODE (recog_operand[i]),
130659a4 2433 recog_operand_loc[i],
eab89b90
RK
2434 XEXP (recog_operand[i], 0),
2435 &XEXP (recog_operand[i], 0),
a8c9daeb 2436 i, address_type[i], ind_levels);
eab89b90
RK
2437 substed_operand[i] = recog_operand[i] = *recog_operand_loc[i];
2438 }
2439 }
aaf9712e
RS
2440 /* If the operand is still a register (we didn't replace it with an
2441 equivalent), get the preferred class to reload it into. */
2442 code = GET_CODE (recog_operand[i]);
2443 preferred_class[i]
91f9a6ed 2444 = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER)
aaf9712e
RS
2445 ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS);
2446 pref_or_nothing[i]
91f9a6ed 2447 = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER
e4600702 2448 && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS);
eab89b90
RK
2449 }
2450
2451 /* If this is simply a copy from operand 1 to operand 0, merge the
2452 preferred classes for the operands. */
2453 if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set)
2454 && recog_operand[1] == SET_SRC (set))
2455 {
2456 preferred_class[0] = preferred_class[1]
2457 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2458 pref_or_nothing[0] |= pref_or_nothing[1];
2459 pref_or_nothing[1] |= pref_or_nothing[0];
2460 }
2461
2462 /* Now see what we need for pseudo-regs that didn't get hard regs
2463 or got the wrong kind of hard reg. For this, we must consider
2464 all the operands together against the register constraints. */
2465
2466 best = MAX_RECOG_OPERANDS + 300;
2467
2468 swapped = 0;
2469 goal_alternative_swapped = 0;
2470 try_swapped:
2471
2472 /* The constraints are made of several alternatives.
2473 Each operand's constraint looks like foo,bar,... with commas
2474 separating the alternatives. The first alternatives for all
2475 operands go together, the second alternatives go together, etc.
2476
2477 First loop over alternatives. */
2478
2479 for (this_alternative_number = 0;
2480 this_alternative_number < n_alternatives;
2481 this_alternative_number++)
2482 {
2483 /* Loop over operands for one constraint alternative. */
2484 /* LOSERS counts those that don't fit this alternative
2485 and would require loading. */
2486 int losers = 0;
2487 /* BAD is set to 1 if it some operand can't fit this alternative
2488 even after reloading. */
2489 int bad = 0;
2490 /* REJECT is a count of how undesirable this alternative says it is
2491 if any reloading is required. If the alternative matches exactly
2492 then REJECT is ignored, but otherwise it gets this much
2493 counted against it in addition to the reloading needed. Each
2494 ? counts three times here since we want the disparaging caused by
2495 a bad register class to only count 1/3 as much. */
2496 int reject = 0;
2497
2498 this_earlyclobber = 0;
2499
2500 for (i = 0; i < noperands; i++)
2501 {
2502 register char *p = constraints[i];
2503 register int win = 0;
2504 /* 0 => this operand can be reloaded somehow for this alternative */
2505 int badop = 1;
2506 /* 0 => this operand can be reloaded if the alternative allows regs. */
2507 int winreg = 0;
2508 int c;
2509 register rtx operand = recog_operand[i];
2510 int offset = 0;
2511 /* Nonzero means this is a MEM that must be reloaded into a reg
2512 regardless of what the constraint says. */
2513 int force_reload = 0;
2514 int offmemok = 0;
2515 int earlyclobber = 0;
2516
2517 /* If the operand is a SUBREG, extract
2518 the REG or MEM (or maybe even a constant) within.
2519 (Constants can occur as a result of reg_equiv_constant.) */
2520
2521 while (GET_CODE (operand) == SUBREG)
2522 {
2523 offset += SUBREG_WORD (operand);
2524 operand = SUBREG_REG (operand);
2525 /* Force reload if this is not a register or if there may may
2526 be a problem accessing the register in the outer mode. */
2527 if (GET_CODE (operand) != REG
46da6b3a
RK
2528#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
2529 /* ??? The comment below clearly does not match the code.
3934c98b
RS
2530 What the code below actually does is set force_reload
2531 for a paradoxical subreg of a pseudo. rms and kenner
2532 can't see the point of doing this. */
eab89b90
RK
2533 /* Nonparadoxical subreg of a pseudoreg.
2534 Don't to load the full width if on this machine
46da6b3a 2535 we expected the fetch to extend. */
eab89b90
RK
2536 || ((GET_MODE_SIZE (operand_mode[i])
2537 > GET_MODE_SIZE (GET_MODE (operand)))
2538 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
46da6b3a 2539#endif
eab89b90
RK
2540 /* Subreg of a hard reg which can't handle the subreg's mode
2541 or which would handle that mode in the wrong number of
2542 registers for subregging to work. */
2543 || (REGNO (operand) < FIRST_PSEUDO_REGISTER
2544 && (! HARD_REGNO_MODE_OK (REGNO (operand),
2545 operand_mode[i])
2546 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2547 && (GET_MODE_SIZE (GET_MODE (operand))
2548 > UNITS_PER_WORD)
2549 && ((GET_MODE_SIZE (GET_MODE (operand))
2550 / UNITS_PER_WORD)
2551 != HARD_REGNO_NREGS (REGNO (operand),
2552 GET_MODE (operand)))))))
2553 force_reload = 1;
2554 }
2555
2556 this_alternative[i] = (int) NO_REGS;
2557 this_alternative_win[i] = 0;
2558 this_alternative_offmemok[i] = 0;
2559 this_alternative_earlyclobber[i] = 0;
2560 this_alternative_matches[i] = -1;
2561
2562 /* An empty constraint or empty alternative
2563 allows anything which matched the pattern. */
2564 if (*p == 0 || *p == ',')
2565 win = 1, badop = 0;
2566
2567 /* Scan this alternative's specs for this operand;
2568 set WIN if the operand fits any letter in this alternative.
2569 Otherwise, clear BADOP if this operand could
2570 fit some letter after reloads,
2571 or set WINREG if this operand could fit after reloads
2572 provided the constraint allows some registers. */
2573
2574 while (*p && (c = *p++) != ',')
2575 switch (c)
2576 {
2577 case '=':
eab89b90 2578 case '+':
eab89b90
RK
2579 case '*':
2580 break;
2581
2582 case '%':
42add480
TW
2583 /* The last operand should not be marked commutative. */
2584 if (i != noperands - 1)
2585 commutative = i;
eab89b90
RK
2586 break;
2587
2588 case '?':
2589 reject += 3;
2590 break;
2591
2592 case '!':
2593 reject = 300;
2594 break;
2595
2596 case '#':
2597 /* Ignore rest of this alternative as far as
2598 reloading is concerned. */
2599 while (*p && *p != ',') p++;
2600 break;
2601
2602 case '0':
2603 case '1':
2604 case '2':
2605 case '3':
2606 case '4':
2607 c -= '0';
2608 this_alternative_matches[i] = c;
2609 /* We are supposed to match a previous operand.
2610 If we do, we win if that one did.
2611 If we do not, count both of the operands as losers.
2612 (This is too conservative, since most of the time
2613 only a single reload insn will be needed to make
2614 the two operands win. As a result, this alternative
2615 may be rejected when it is actually desirable.) */
2616 if ((swapped && (c != commutative || i != commutative + 1))
2617 /* If we are matching as if two operands were swapped,
2618 also pretend that operands_match had been computed
2619 with swapped.
2620 But if I is the second of those and C is the first,
2621 don't exchange them, because operands_match is valid
2622 only on one side of its diagonal. */
2623 ? (operands_match
2624 [(c == commutative || c == commutative + 1)
2625 ? 2*commutative + 1 - c : c]
2626 [(i == commutative || i == commutative + 1)
2627 ? 2*commutative + 1 - i : i])
2628 : operands_match[c][i])
2629 win = this_alternative_win[c];
2630 else
2631 {
2632 /* Operands don't match. */
2633 rtx value;
2634 /* Retroactively mark the operand we had to match
2635 as a loser, if it wasn't already. */
2636 if (this_alternative_win[c])
2637 losers++;
2638 this_alternative_win[c] = 0;
2639 if (this_alternative[c] == (int) NO_REGS)
2640 bad = 1;
2641 /* But count the pair only once in the total badness of
2642 this alternative, if the pair can be a dummy reload. */
2643 value
2644 = find_dummy_reload (recog_operand[i], recog_operand[c],
2645 recog_operand_loc[i], recog_operand_loc[c],
2646 this_alternative[c], -1);
2647
2648 if (value != 0)
2649 losers--;
2650 }
2651 /* This can be fixed with reloads if the operand
2652 we are supposed to match can be fixed with reloads. */
2653 badop = 0;
2654 this_alternative[i] = this_alternative[c];
2655 break;
2656
2657 case 'p':
2658 /* All necessary reloads for an address_operand
2659 were handled in find_reloads_address. */
2660 this_alternative[i] = (int) ALL_REGS;
2661 win = 1;
2662 break;
2663
2664 case 'm':
2665 if (force_reload)
2666 break;
2667 if (GET_CODE (operand) == MEM
2668 || (GET_CODE (operand) == REG
2669 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2670 && reg_renumber[REGNO (operand)] < 0))
2671 win = 1;
2672 if (CONSTANT_P (operand))
2673 badop = 0;
2674 break;
2675
2676 case '<':
2677 if (GET_CODE (operand) == MEM
2678 && ! address_reloaded[i]
2679 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
2680 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
2681 win = 1;
2682 break;
2683
2684 case '>':
2685 if (GET_CODE (operand) == MEM
2686 && ! address_reloaded[i]
2687 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
2688 || GET_CODE (XEXP (operand, 0)) == POST_INC))
2689 win = 1;
2690 break;
2691
2692 /* Memory operand whose address is not offsettable. */
2693 case 'V':
2694 if (force_reload)
2695 break;
2696 if (GET_CODE (operand) == MEM
2697 && ! (ind_levels ? offsettable_memref_p (operand)
2698 : offsettable_nonstrict_memref_p (operand))
2699 /* Certain mem addresses will become offsettable
2700 after they themselves are reloaded. This is important;
2701 we don't want our own handling of unoffsettables
2702 to override the handling of reg_equiv_address. */
2703 && !(GET_CODE (XEXP (operand, 0)) == REG
2704 && (ind_levels == 0
2705 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
2706 win = 1;
2707 break;
2708
2709 /* Memory operand whose address is offsettable. */
2710 case 'o':
2711 if (force_reload)
2712 break;
2713 if ((GET_CODE (operand) == MEM
2714 /* If IND_LEVELS, find_reloads_address won't reload a
2715 pseudo that didn't get a hard reg, so we have to
2716 reject that case. */
2717 && (ind_levels ? offsettable_memref_p (operand)
2718 : offsettable_nonstrict_memref_p (operand)))
2719 /* Certain mem addresses will become offsettable
2720 after they themselves are reloaded. This is important;
2721 we don't want our own handling of unoffsettables
2722 to override the handling of reg_equiv_address. */
2723 || (GET_CODE (operand) == MEM
2724 && GET_CODE (XEXP (operand, 0)) == REG
2725 && (ind_levels == 0
2726 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))
2727 || (GET_CODE (operand) == REG
2728 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
2729 && reg_renumber[REGNO (operand)] < 0))
2730 win = 1;
2731 if (CONSTANT_P (operand) || GET_CODE (operand) == MEM)
2732 badop = 0;
2733 offmemok = 1;
2734 break;
2735
2736 case '&':
2737 /* Output operand that is stored before the need for the
2738 input operands (and their index registers) is over. */
2739 earlyclobber = 1, this_earlyclobber = 1;
2740 break;
2741
2742 case 'E':
2743 /* Match any floating double constant, but only if
2744 we can examine the bits of it reliably. */
2745 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
fb3821f7 2746 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
eab89b90
RK
2747 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
2748 break;
2749 if (GET_CODE (operand) == CONST_DOUBLE)
2750 win = 1;
2751 break;
2752
2753 case 'F':
2754 if (GET_CODE (operand) == CONST_DOUBLE)
2755 win = 1;
2756 break;
2757
2758 case 'G':
2759 case 'H':
2760 if (GET_CODE (operand) == CONST_DOUBLE
2761 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
2762 win = 1;
2763 break;
2764
2765 case 's':
2766 if (GET_CODE (operand) == CONST_INT
2767 || (GET_CODE (operand) == CONST_DOUBLE
2768 && GET_MODE (operand) == VOIDmode))
2769 break;
2770 case 'i':
2771 if (CONSTANT_P (operand)
2772#ifdef LEGITIMATE_PIC_OPERAND_P
2773 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
2774#endif
2775 )
2776 win = 1;
2777 break;
2778
2779 case 'n':
2780 if (GET_CODE (operand) == CONST_INT
2781 || (GET_CODE (operand) == CONST_DOUBLE
2782 && GET_MODE (operand) == VOIDmode))
2783 win = 1;
2784 break;
2785
2786 case 'I':
2787 case 'J':
2788 case 'K':
2789 case 'L':
2790 case 'M':
2791 case 'N':
2792 case 'O':
2793 case 'P':
2794 if (GET_CODE (operand) == CONST_INT
2795 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
2796 win = 1;
2797 break;
2798
2799 case 'X':
2800 win = 1;
2801 break;
2802
2803 case 'g':
2804 if (! force_reload
2805 /* A PLUS is never a valid operand, but reload can make
2806 it from a register when eliminating registers. */
2807 && GET_CODE (operand) != PLUS
2808 /* A SCRATCH is not a valid operand. */
2809 && GET_CODE (operand) != SCRATCH
2810#ifdef LEGITIMATE_PIC_OPERAND_P
2811 && (! CONSTANT_P (operand)
2812 || ! flag_pic
2813 || LEGITIMATE_PIC_OPERAND_P (operand))
2814#endif
2815 && (GENERAL_REGS == ALL_REGS
2816 || GET_CODE (operand) != REG
2817 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
2818 && reg_renumber[REGNO (operand)] < 0)))
2819 win = 1;
2820 /* Drop through into 'r' case */
2821
2822 case 'r':
2823 this_alternative[i]
2824 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
2825 goto reg;
2826
2827#ifdef EXTRA_CONSTRAINT
2828 case 'Q':
2829 case 'R':
2830 case 'S':
2831 case 'T':
2832 case 'U':
2833 if (EXTRA_CONSTRAINT (operand, c))
2834 win = 1;
2835 break;
2836#endif
2837
2838 default:
2839 this_alternative[i]
2840 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
2841
2842 reg:
2843 if (GET_MODE (operand) == BLKmode)
2844 break;
2845 winreg = 1;
2846 if (GET_CODE (operand) == REG
2847 && reg_fits_class_p (operand, this_alternative[i],
2848 offset, GET_MODE (recog_operand[i])))
2849 win = 1;
2850 break;
2851 }
2852
2853 constraints[i] = p;
2854
2855 /* If this operand could be handled with a reg,
2856 and some reg is allowed, then this operand can be handled. */
2857 if (winreg && this_alternative[i] != (int) NO_REGS)
2858 badop = 0;
2859
2860 /* Record which operands fit this alternative. */
2861 this_alternative_earlyclobber[i] = earlyclobber;
2862 if (win && ! force_reload)
2863 this_alternative_win[i] = 1;
2864 else
2865 {
2866 this_alternative_offmemok[i] = offmemok;
2867 losers++;
2868 if (badop)
2869 bad = 1;
2870 /* Alternative loses if it has no regs for a reg operand. */
2871 if (GET_CODE (operand) == REG
2872 && this_alternative[i] == (int) NO_REGS
2873 && this_alternative_matches[i] < 0)
2874 bad = 1;
2875
2876 /* Alternative loses if it requires a type of reload not
2877 permitted for this insn. We can always reload SCRATCH
2878 and objects with a REG_UNUSED note. */
a8c9daeb
RK
2879 if (GET_CODE (operand) != SCRATCH
2880 && modified[i] != RELOAD_READ && no_output_reloads
eab89b90
RK
2881 && ! find_reg_note (insn, REG_UNUSED, operand))
2882 bad = 1;
2883 else if (modified[i] != RELOAD_WRITE && no_input_reloads)
2884 bad = 1;
2885
2886 /* We prefer to reload pseudos over reloading other things,
2887 since such reloads may be able to be eliminated later.
2888 If we are reloading a SCRATCH, we won't be generating any
2889 insns, just using a register, so it is also preferred.
2890 So bump REJECT in other cases. */
2891 if (GET_CODE (operand) != REG && GET_CODE (operand) != SCRATCH)
2892 reject++;
2893 }
2894
2895 /* If this operand is a pseudo register that didn't get a hard
2896 reg and this alternative accepts some register, see if the
2897 class that we want is a subset of the preferred class for this
2898 register. If not, but it intersects that class, use the
2899 preferred class instead. If it does not intersect the preferred
2900 class, show that usage of this alternative should be discouraged;
2901 it will be discouraged more still if the register is `preferred
2902 or nothing'. We do this because it increases the chance of
2903 reusing our spill register in a later insn and avoiding a pair
2904 of memory stores and loads.
2905
2906 Don't bother with this if this alternative will accept this
2907 operand.
2908
5aa14fee
RS
2909 Don't do this for a multiword operand, if
2910 we have to worry about small classes, because making reg groups
2911 harder to allocate is asking for trouble.
2912
eab89b90
RK
2913 Don't do this if the preferred class has only one register
2914 because we might otherwise exhaust the class. */
2915
2916
2917 if (! win && this_alternative[i] != (int) NO_REGS
5aa14fee
RS
2918#ifdef SMALL_REGISTER_CLASSES
2919 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2920#endif
eab89b90
RK
2921 && reg_class_size[(int) preferred_class[i]] > 1)
2922 {
2923 if (! reg_class_subset_p (this_alternative[i],
2924 preferred_class[i]))
2925 {
2926 /* Since we don't have a way of forming the intersection,
2927 we just do something special if the preferred class
2928 is a subset of the class we have; that's the most
2929 common case anyway. */
2930 if (reg_class_subset_p (preferred_class[i],
2931 this_alternative[i]))
2932 this_alternative[i] = (int) preferred_class[i];
2933 else
2934 reject += (1 + pref_or_nothing[i]);
2935 }
2936 }
2937 }
2938
2939 /* Now see if any output operands that are marked "earlyclobber"
2940 in this alternative conflict with any input operands
2941 or any memory addresses. */
2942
2943 for (i = 0; i < noperands; i++)
2944 if (this_alternative_earlyclobber[i]
2945 && this_alternative_win[i])
2946 {
2947 struct decomposition early_data;
eab89b90
RK
2948
2949 early_data = decompose (recog_operand[i]);
2950
2951 if (modified[i] == RELOAD_READ)
2952 {
2953 if (this_insn_is_asm)
2954 warning_for_asm (this_insn,
2955 "`&' constraint used with input operand");
2956 else
2957 abort ();
2958 continue;
2959 }
2960
2961 if (this_alternative[i] == NO_REGS)
2962 {
2963 this_alternative_earlyclobber[i] = 0;
2964 if (this_insn_is_asm)
2965 error_for_asm (this_insn,
2966 "`&' constraint used with no register class");
2967 else
2968 abort ();
2969 }
2970
2971 for (j = 0; j < noperands; j++)
2972 /* Is this an input operand or a memory ref? */
2973 if ((GET_CODE (recog_operand[j]) == MEM
2974 || modified[j] != RELOAD_WRITE)
2975 && j != i
2976 /* Ignore things like match_operator operands. */
2977 && *constraints1[j] != 0
2978 /* Don't count an input operand that is constrained to match
2979 the early clobber operand. */
2980 && ! (this_alternative_matches[j] == i
2981 && rtx_equal_p (recog_operand[i], recog_operand[j]))
2982 /* Is it altered by storing the earlyclobber operand? */
2983 && !immune_p (recog_operand[j], recog_operand[i], early_data))
2984 {
2985 /* If the output is in a single-reg class,
2986 it's costly to reload it, so reload the input instead. */
2987 if (reg_class_size[this_alternative[i]] == 1
2988 && (GET_CODE (recog_operand[j]) == REG
2989 || GET_CODE (recog_operand[j]) == SUBREG))
2990 {
2991 losers++;
2992 this_alternative_win[j] = 0;
2993 }
2994 else
2995 break;
2996 }
2997 /* If an earlyclobber operand conflicts with something,
2998 it must be reloaded, so request this and count the cost. */
2999 if (j != noperands)
3000 {
3001 losers++;
3002 this_alternative_win[i] = 0;
3003 for (j = 0; j < noperands; j++)
3004 if (this_alternative_matches[j] == i
3005 && this_alternative_win[j])
3006 {
3007 this_alternative_win[j] = 0;
3008 losers++;
3009 }
3010 }
3011 }
3012
3013 /* If one alternative accepts all the operands, no reload required,
3014 choose that alternative; don't consider the remaining ones. */
3015 if (losers == 0)
3016 {
3017 /* Unswap these so that they are never swapped at `finish'. */
3018 if (commutative >= 0)
3019 {
3020 recog_operand[commutative] = substed_operand[commutative];
3021 recog_operand[commutative + 1]
3022 = substed_operand[commutative + 1];
3023 }
3024 for (i = 0; i < noperands; i++)
3025 {
3026 goal_alternative_win[i] = 1;
3027 goal_alternative[i] = this_alternative[i];
3028 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3029 goal_alternative_matches[i] = this_alternative_matches[i];
3030 goal_alternative_earlyclobber[i]
3031 = this_alternative_earlyclobber[i];
3032 }
3033 goal_alternative_number = this_alternative_number;
3034 goal_alternative_swapped = swapped;
3035 goal_earlyclobber = this_earlyclobber;
3036 goto finish;
3037 }
3038
3039 /* REJECT, set by the ! and ? constraint characters and when a register
3040 would be reloaded into a non-preferred class, discourages the use of
3041 this alternative for a reload goal. REJECT is incremented by three
3042 for each ? and one for each non-preferred class. */
3043 losers = losers * 3 + reject;
3044
3045 /* If this alternative can be made to work by reloading,
3046 and it needs less reloading than the others checked so far,
3047 record it as the chosen goal for reloading. */
3048 if (! bad && best > losers)
3049 {
3050 for (i = 0; i < noperands; i++)
3051 {
3052 goal_alternative[i] = this_alternative[i];
3053 goal_alternative_win[i] = this_alternative_win[i];
3054 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3055 goal_alternative_matches[i] = this_alternative_matches[i];
3056 goal_alternative_earlyclobber[i]
3057 = this_alternative_earlyclobber[i];
3058 }
3059 goal_alternative_swapped = swapped;
3060 best = losers;
3061 goal_alternative_number = this_alternative_number;
3062 goal_earlyclobber = this_earlyclobber;
3063 }
3064 }
3065
3066 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3067 then we need to try each alternative twice,
3068 the second time matching those two operands
3069 as if we had exchanged them.
3070 To do this, really exchange them in operands.
3071
3072 If we have just tried the alternatives the second time,
3073 return operands to normal and drop through. */
3074
3075 if (commutative >= 0)
3076 {
3077 swapped = !swapped;
3078 if (swapped)
3079 {
3080 register enum reg_class tclass;
3081 register int t;
3082
3083 recog_operand[commutative] = substed_operand[commutative + 1];
3084 recog_operand[commutative + 1] = substed_operand[commutative];
3085
3086 tclass = preferred_class[commutative];
3087 preferred_class[commutative] = preferred_class[commutative + 1];
3088 preferred_class[commutative + 1] = tclass;
3089
3090 t = pref_or_nothing[commutative];
3091 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3092 pref_or_nothing[commutative + 1] = t;
3093
3094 bcopy (constraints1, constraints, noperands * sizeof (char *));
3095 goto try_swapped;
3096 }
3097 else
3098 {
3099 recog_operand[commutative] = substed_operand[commutative];
3100 recog_operand[commutative + 1] = substed_operand[commutative + 1];
3101 }
3102 }
3103
3104 /* The operands don't meet the constraints.
3105 goal_alternative describes the alternative
3106 that we could reach by reloading the fewest operands.
3107 Reload so as to fit it. */
3108
3109 if (best == MAX_RECOG_OPERANDS + 300)
3110 {
3111 /* No alternative works with reloads?? */
3112 if (insn_code_number >= 0)
3113 abort ();
3114 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3115 /* Avoid further trouble with this insn. */
3116 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3117 n_reloads = 0;
3118 return;
3119 }
3120
3121 /* Jump to `finish' from above if all operands are valid already.
3122 In that case, goal_alternative_win is all 1. */
3123 finish:
3124
3125 /* Right now, for any pair of operands I and J that are required to match,
3126 with I < J,
3127 goal_alternative_matches[J] is I.
3128 Set up goal_alternative_matched as the inverse function:
3129 goal_alternative_matched[I] = J. */
3130
3131 for (i = 0; i < noperands; i++)
3132 goal_alternative_matched[i] = -1;
3133
3134 for (i = 0; i < noperands; i++)
3135 if (! goal_alternative_win[i]
3136 && goal_alternative_matches[i] >= 0)
3137 goal_alternative_matched[goal_alternative_matches[i]] = i;
3138
3139 /* If the best alternative is with operands 1 and 2 swapped,
a8c9daeb
RK
3140 consider them swapped before reporting the reloads. Update the
3141 operand numbers of any reloads already pushed. */
eab89b90
RK
3142
3143 if (goal_alternative_swapped)
3144 {
3145 register rtx tem;
3146
3147 tem = substed_operand[commutative];
3148 substed_operand[commutative] = substed_operand[commutative + 1];
3149 substed_operand[commutative + 1] = tem;
3150 tem = recog_operand[commutative];
3151 recog_operand[commutative] = recog_operand[commutative + 1];
3152 recog_operand[commutative + 1] = tem;
a8c9daeb
RK
3153
3154 for (i = 0; i < n_reloads; i++)
3155 {
3156 if (reload_opnum[i] == commutative)
3157 reload_opnum[i] = commutative + 1;
3158 else if (reload_opnum[i] == commutative + 1)
3159 reload_opnum[i] = commutative;
3160 }
eab89b90
RK
3161 }
3162
3163 /* Perform whatever substitutions on the operands we are supposed
3164 to make due to commutativity or replacement of registers
3165 with equivalent constants or memory slots. */
3166
3167 for (i = 0; i < noperands; i++)
3168 {
3169 *recog_operand_loc[i] = substed_operand[i];
3170 /* While we are looping on operands, initialize this. */
3171 operand_reloadnum[i] = -1;
a8c9daeb
RK
3172
3173 /* If this is an earlyclobber operand, we need to widen the scope.
3174 The reload must remain valid from the start of the insn being
3175 reloaded until after the operand is stored into its destination.
3176 We approximate this with RELOAD_OTHER even though we know that we
3177 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3178
3179 One special case that is worth checking is when we have an
3180 output that is earlyclobber but isn't used past the insn (typically
3181 a SCRATCH). In this case, we only need have the reload live
3182 through the insn itself, but not for any of our input or output
3183 reloads.
3184
3185 In any case, anything needed to address this operand can remain
3186 however they were previously categorized. */
3187
3188 if (goal_alternative_earlyclobber[i])
3189 operand_type[i]
3190 = (find_reg_note (insn, REG_UNUSED, recog_operand[i])
3191 ? RELOAD_FOR_INSN : RELOAD_OTHER);
eab89b90
RK
3192 }
3193
3194 /* Any constants that aren't allowed and can't be reloaded
3195 into registers are here changed into memory references. */
3196 for (i = 0; i < noperands; i++)
3197 if (! goal_alternative_win[i]
3198 && CONSTANT_P (recog_operand[i])
3199 && (PREFERRED_RELOAD_CLASS (recog_operand[i],
3200 (enum reg_class) goal_alternative[i])
3201 == NO_REGS)
3202 && operand_mode[i] != VOIDmode)
3203 {
3204 *recog_operand_loc[i] = recog_operand[i]
3205 = find_reloads_toplev (force_const_mem (operand_mode[i],
3206 recog_operand[i]),
a8c9daeb 3207 i, address_type[i], ind_levels, 0);
eab89b90
RK
3208 if (alternative_allows_memconst (constraints1[i],
3209 goal_alternative_number))
3210 goal_alternative_win[i] = 1;
3211 }
3212
3213 /* Now record reloads for all the operands that need them. */
3214 for (i = 0; i < noperands; i++)
3215 if (! goal_alternative_win[i])
3216 {
3217 /* Operands that match previous ones have already been handled. */
3218 if (goal_alternative_matches[i] >= 0)
3219 ;
3220 /* Handle an operand with a nonoffsettable address
3221 appearing where an offsettable address will do
3222 by reloading the address into a base register. */
3223 else if (goal_alternative_matched[i] == -1
3224 && goal_alternative_offmemok[i]
3225 && GET_CODE (recog_operand[i]) == MEM)
3226 {
3227 operand_reloadnum[i]
fb3821f7
CH
3228 = push_reload (XEXP (recog_operand[i], 0), NULL_RTX,
3229 &XEXP (recog_operand[i], 0), NULL_PTR,
eab89b90 3230 BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)),
a8c9daeb 3231 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
eab89b90
RK
3232 reload_inc[operand_reloadnum[i]]
3233 = GET_MODE_SIZE (GET_MODE (recog_operand[i]));
a8c9daeb
RK
3234
3235 /* If this operand is an output, we will have made any
3236 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3237 now we are treating part of the operand as an input, so
3238 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3239
3240 if (operand_type[i] == RELOAD_FOR_OUTPUT)
3241 for (j = 0; j < n_reloads; j++)
3242 if (reload_opnum[j] == i
3243 && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3244 reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS;
eab89b90
RK
3245 }
3246 else if (goal_alternative_matched[i] == -1)
3247 operand_reloadnum[i] =
3248 push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3249 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
a8c9daeb
RK
3250 (modified[i] != RELOAD_WRITE ?
3251 recog_operand_loc[i] : 0),
eab89b90
RK
3252 modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0,
3253 (enum reg_class) goal_alternative[i],
a8c9daeb
RK
3254 (modified[i] == RELOAD_WRITE
3255 ? VOIDmode : operand_mode[i]),
3256 (modified[i] == RELOAD_READ
3257 ? VOIDmode : operand_mode[i]),
eab89b90
RK
3258 (insn_code_number < 0 ? 0
3259 : insn_operand_strict_low[insn_code_number][i]),
a8c9daeb 3260 0, i, operand_type[i]);
eab89b90
RK
3261 /* In a matching pair of operands, one must be input only
3262 and the other must be output only.
3263 Pass the input operand as IN and the other as OUT. */
3264 else if (modified[i] == RELOAD_READ
3265 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3266 {
3267 operand_reloadnum[i]
3268 = push_reload (recog_operand[i],
3269 recog_operand[goal_alternative_matched[i]],
3270 recog_operand_loc[i],
3271 recog_operand_loc[goal_alternative_matched[i]],
3272 (enum reg_class) goal_alternative[i],
3273 operand_mode[i],
3274 operand_mode[goal_alternative_matched[i]],
a8c9daeb 3275 0, 0, i, RELOAD_OTHER);
eab89b90
RK
3276 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3277 }
3278 else if (modified[i] == RELOAD_WRITE
3279 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3280 {
3281 operand_reloadnum[goal_alternative_matched[i]]
3282 = push_reload (recog_operand[goal_alternative_matched[i]],
3283 recog_operand[i],
3284 recog_operand_loc[goal_alternative_matched[i]],
3285 recog_operand_loc[i],
3286 (enum reg_class) goal_alternative[i],
3287 operand_mode[goal_alternative_matched[i]],
3288 operand_mode[i],
a8c9daeb 3289 0, 0, i, RELOAD_OTHER);
eab89b90
RK
3290 operand_reloadnum[i] = output_reloadnum;
3291 }
3292 else if (insn_code_number >= 0)
3293 abort ();
3294 else
3295 {
3296 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3297 /* Avoid further trouble with this insn. */
3298 PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
3299 n_reloads = 0;
3300 return;
3301 }
3302 }
3303 else if (goal_alternative_matched[i] < 0
3304 && goal_alternative_matches[i] < 0
3305 && optimize)
3306 {
a8c9daeb 3307 /* For each non-matching operand that's a MEM or a pseudo-register
eab89b90
RK
3308 that didn't get a hard register, make an optional reload.
3309 This may get done even if the insn needs no reloads otherwise. */
a8c9daeb
RK
3310
3311 rtx operand = recog_operand[i];
3312
eab89b90
RK
3313 while (GET_CODE (operand) == SUBREG)
3314 operand = XEXP (operand, 0);
a8c9daeb
RK
3315 if ((GET_CODE (operand) == MEM
3316 || (GET_CODE (operand) == REG
3317 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
eab89b90 3318 && (enum reg_class) goal_alternative[i] != NO_REGS
a8c9daeb
RK
3319 && ! no_input_reloads
3320 /* Optional output reloads don't do anything and we mustn't
3321 make in-out reloads on insns that are not permitted output
3322 reloads. */
eab89b90 3323 && (modified[i] == RELOAD_READ
a8c9daeb 3324 || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads)))
eab89b90
RK
3325 operand_reloadnum[i]
3326 = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0,
3327 modified[i] != RELOAD_READ ? recog_operand[i] : 0,
a8c9daeb
RK
3328 (modified[i] != RELOAD_WRITE
3329 ? recog_operand_loc[i] : 0),
3330 (modified[i] != RELOAD_READ
3331 ? recog_operand_loc[i] : 0),
eab89b90 3332 (enum reg_class) goal_alternative[i],
a8c9daeb
RK
3333 (modified[i] == RELOAD_WRITE
3334 ? VOIDmode : operand_mode[i]),
3335 (modified[i] == RELOAD_READ
3336 ? VOIDmode : operand_mode[i]),
eab89b90
RK
3337 (insn_code_number < 0 ? 0
3338 : insn_operand_strict_low[insn_code_number][i]),
a8c9daeb 3339 1, i, operand_type[i]);
eab89b90 3340 }
a8c9daeb
RK
3341 else if (goal_alternative_matches[i] >= 0
3342 && goal_alternative_win[goal_alternative_matches[i]]
3343 && modified[i] == RELOAD_READ
3344 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3345 && ! no_input_reloads && ! no_output_reloads
3346 && optimize)
3347 {
3348 /* Similarly, make an optional reload for a pair of matching
3349 objects that are in MEM or a pseudo that didn't get a hard reg. */
eab89b90 3350
a8c9daeb
RK
3351 rtx operand = recog_operand[i];
3352
3353 while (GET_CODE (operand) == SUBREG)
3354 operand = XEXP (operand, 0);
3355 if ((GET_CODE (operand) == MEM
3356 || (GET_CODE (operand) == REG
3357 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3358 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3359 != NO_REGS))
3360 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3361 = push_reload (recog_operand[goal_alternative_matches[i]],
3362 recog_operand[i],
3363 recog_operand_loc[goal_alternative_matches[i]],
3364 recog_operand_loc[i],
3365 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3366 operand_mode[goal_alternative_matches[i]],
3367 operand_mode[i],
3368 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3369 }
3370
eab89b90
RK
3371 /* Record the values of the earlyclobber operands for the caller. */
3372 if (goal_earlyclobber)
3373 for (i = 0; i < noperands; i++)
3374 if (goal_alternative_earlyclobber[i])
3375 reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i];
3376
3377 /* If this insn pattern contains any MATCH_DUP's, make sure that
3378 they will be substituted if the operands they match are substituted.
3379 Also do now any substitutions we already did on the operands.
3380
3381 Don't do this if we aren't making replacements because we might be
3382 propagating things allocated by frame pointer elimination into places
3383 it doesn't expect. */
3384
3385 if (insn_code_number >= 0 && replace)
3386 for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--)
3387 {
3388 int opno = recog_dup_num[i];
3389 *recog_dup_loc[i] = *recog_operand_loc[opno];
3390 if (operand_reloadnum[opno] >= 0)
3391 push_replacement (recog_dup_loc[i], operand_reloadnum[opno],
3392 insn_operand_mode[insn_code_number][opno]);
3393 }
3394
3395#if 0
3396 /* This loses because reloading of prior insns can invalidate the equivalence
3397 (or at least find_equiv_reg isn't smart enough to find it any more),
3398 causing this insn to need more reload regs than it needed before.
3399 It may be too late to make the reload regs available.
3400 Now this optimization is done safely in choose_reload_regs. */
3401
3402 /* For each reload of a reg into some other class of reg,
3403 search for an existing equivalent reg (same value now) in the right class.
3404 We can use it as long as we don't need to change its contents. */
3405 for (i = 0; i < n_reloads; i++)
3406 if (reload_reg_rtx[i] == 0
3407 && reload_in[i] != 0
3408 && GET_CODE (reload_in[i]) == REG
3409 && reload_out[i] == 0)
3410 {
3411 reload_reg_rtx[i]
3412 = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1,
3413 static_reload_reg_p, 0, reload_inmode[i]);
3414 /* Prevent generation of insn to load the value
3415 because the one we found already has the value. */
3416 if (reload_reg_rtx[i])
3417 reload_in[i] = reload_reg_rtx[i];
3418 }
3419#endif
3420
a8c9daeb
RK
3421 /* Perhaps an output reload can be combined with another
3422 to reduce needs by one. */
3423 if (!goal_earlyclobber)
3424 combine_reloads ();
3425
3426 /* If we have a pair of reloads for parts of an address, they are reloading
3427 the same object, the operands themselves were not reloaded, and they
3428 are for two operands that are supposed to match, merge the reloads and
3429 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3430
3431 for (i = 0; i < n_reloads; i++)
3432 {
3433 int k;
3434
3435 for (j = i + 1; j < n_reloads; j++)
3436 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3437 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3438 && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS
3439 || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS)
3440 && rtx_equal_p (reload_in[i], reload_in[j])
3441 && (operand_reloadnum[reload_opnum[i]] < 0
3442 || reload_optional[operand_reloadnum[reload_opnum[i]]])
3443 && (operand_reloadnum[reload_opnum[j]] < 0
3444 || reload_optional[operand_reloadnum[reload_opnum[j]]])
3445 && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j]
3446 || (goal_alternative_matches[reload_opnum[j]]
3447 == reload_opnum[i])))
3448 {
3449 for (k = 0; k < n_replacements; k++)
3450 if (replacements[k].what == j)
3451 replacements[k].what = i;
3452
3453 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3454 reload_in[j] = 0;
3455 }
3456 }
3457
3458 /* Scan all the reloads and update their type.
3459 If a reload is for the address of an operand and we didn't reload
3460 that operand, change the type. Similarly, change the operand number
3461 of a reload when two operands match. If a reload is optional, treat it
3462 as though the operand isn't reloaded.
3463
3464 ??? This latter case is somewhat odd because if we do the optional
3465 reload, it means the object is hanging around. Thus we need only
3466 do the address reload if the optional reload was NOT done.
3467
3468 Change secondary reloads to be the address type of their operand, not
3469 the normal type.
3470
3471 If an operand's reload is now RELOAD_OTHER, change any
3472 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3473 RELOAD_FOR_OTHER_ADDRESS. */
3474
3475 for (i = 0; i < n_reloads; i++)
3476 {
3477 if (reload_secondary_p[i]
3478 && reload_when_needed[i] == operand_type[reload_opnum[i]])
3479 reload_when_needed[i] = address_type[reload_opnum[i]];
3480
3481 if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3482 || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS)
3483 && (operand_reloadnum[reload_opnum[i]] < 0
3484 || reload_optional[operand_reloadnum[reload_opnum[i]]]))
3485 reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS;
3486
3487 if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS
3488 && operand_reloadnum[reload_opnum[i]] >= 0
3489 && (reload_when_needed[operand_reloadnum[reload_opnum[i]]]
3490 == RELOAD_OTHER))
3491 reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS;
3492
3493 if (goal_alternative_matches[reload_opnum[i]] >= 0)
3494 reload_opnum[i] = goal_alternative_matches[reload_opnum[i]];
3495 }
3496
3497 /* See if we have any reloads that are now allowed to be merged
3498 because we've changed when the reload is needed to
3499 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3500 check for the most common cases. */
3501
3502 for (i = 0; i < n_reloads; i++)
3503 if (reload_in[i] != 0 && reload_out[i] == 0
3504 && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS
3505 || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS))
3506 for (j = 0; j < n_reloads; j++)
3507 if (i != j && reload_in[j] != 0 && reload_out[j] == 0
3508 && reload_when_needed[j] == reload_when_needed[i]
73f67895
RS
3509 && MATCHES (reload_in[i], reload_in[j])
3510 && reload_reg_class[i] == reload_reg_class[j]
3511 && !reload_nocombine[i] && !reload_nocombine[j])
a8c9daeb
RK
3512 {
3513 reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]);
3514 transfer_replacements (i, j);
3515 reload_in[j] = 0;
3516 }
3517
eab89b90
RK
3518#else /* no REGISTER_CONSTRAINTS */
3519 int noperands;
3520 int insn_code_number;
3521 int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */
3522 register int i;
3523 rtx body = PATTERN (insn);
3524
3525 n_reloads = 0;
3526 n_replacements = 0;
3527 n_earlyclobbers = 0;
3528 replace_reloads = replace;
3529 this_insn = insn;
3530
3531 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3532 Store the operand values in RECOG_OPERAND and the locations
3533 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3534 Return if the insn needs no reload processing. */
3535
3536 switch (GET_CODE (body))
3537 {
3538 case USE:
3539 case CLOBBER:
3540 case ASM_INPUT:
3541 case ADDR_VEC:
3542 case ADDR_DIFF_VEC:
3543 return;
3544
3545 case PARALLEL:
3546 case SET:
3547 noperands = asm_noperands (body);
3548 if (noperands >= 0)
3549 {
3550 /* This insn is an `asm' with operands.
3551 First, find out how many operands, and allocate space. */
3552
3553 insn_code_number = -1;
3554 /* ??? This is a bug! ???
3555 Give up and delete this insn if it has too many operands. */
3556 if (noperands > MAX_RECOG_OPERANDS)
3557 abort ();
3558
3559 /* Now get the operand values out of the insn. */
3560
fb3821f7
CH
3561 decode_asm_operands (body, recog_operand, recog_operand_loc,
3562 NULL_PTR, NULL_PTR);
eab89b90
RK
3563 break;
3564 }
3565
3566 default:
3567 /* Ordinary insn: recognize it, allocate space for operands and
3568 constraints, and get them out via insn_extract. */
3569
3570 insn_code_number = recog_memoized (insn);
3571 noperands = insn_n_operands[insn_code_number];
3572 insn_extract (insn);
3573 }
3574
3575 if (noperands == 0)
3576 return;
3577
3578 for (i = 0; i < noperands; i++)
3579 {
3580 register RTX_CODE code = GET_CODE (recog_operand[i]);
3581 int is_set_dest = GET_CODE (body) == SET && (i == 0);
3582
3583 if (insn_code_number >= 0)
3584 if (insn_operand_address_p[insn_code_number][i])
fb3821f7 3585 find_reloads_address (VOIDmode, NULL_PTR,
eab89b90 3586 recog_operand[i], recog_operand_loc[i],
a8c9daeb
RK
3587 i, RELOAD_FOR_INPUT, ind_levels);
3588
3589 /* In these cases, we can't tell if the operand is an input
3590 or an output, so be conservative. In practice it won't be
3591 problem. */
3592
eab89b90
RK
3593 if (code == MEM)
3594 find_reloads_address (GET_MODE (recog_operand[i]),
3595 recog_operand_loc[i],
3596 XEXP (recog_operand[i], 0),
3597 &XEXP (recog_operand[i], 0),
a8c9daeb 3598 i, RELOAD_OTHER, ind_levels);
eab89b90
RK
3599 if (code == SUBREG)
3600 recog_operand[i] = *recog_operand_loc[i]
a8c9daeb
RK
3601 = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER,
3602 ind_levels, is_set_dest);
eab89b90
RK
3603 if (code == REG)
3604 {
3605 register int regno = REGNO (recog_operand[i]);
3606 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3607 recog_operand[i] = *recog_operand_loc[i]
3608 = reg_equiv_constant[regno];
3609#if 0 /* This might screw code in reload1.c to delete prior output-reload
3610 that feeds this insn. */
3611 if (reg_equiv_mem[regno] != 0)
3612 recog_operand[i] = *recog_operand_loc[i]
3613 = reg_equiv_mem[regno];
3614#endif
3615 }
eab89b90
RK
3616 }
3617
3618 /* Perhaps an output reload can be combined with another
3619 to reduce needs by one. */
3620 if (!goal_earlyclobber)
3621 combine_reloads ();
a8c9daeb 3622#endif /* no REGISTER_CONSTRAINTS */
eab89b90
RK
3623}
3624
3625/* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3626 accepts a memory operand with constant address. */
3627
3628static int
3629alternative_allows_memconst (constraint, altnum)
3630 char *constraint;
3631 int altnum;
3632{
3633 register int c;
3634 /* Skip alternatives before the one requested. */
3635 while (altnum > 0)
3636 {
3637 while (*constraint++ != ',');
3638 altnum--;
3639 }
3640 /* Scan the requested alternative for 'm' or 'o'.
3641 If one of them is present, this alternative accepts memory constants. */
3642 while ((c = *constraint++) && c != ',' && c != '#')
3643 if (c == 'm' || c == 'o')
3644 return 1;
3645 return 0;
3646}
3647\f
3648/* Scan X for memory references and scan the addresses for reloading.
3649 Also checks for references to "constant" regs that we want to eliminate
3650 and replaces them with the values they stand for.
6dc42e49 3651 We may alter X destructively if it contains a reference to such.
eab89b90
RK
3652 If X is just a constant reg, we return the equivalent value
3653 instead of X.
3654
3655 IND_LEVELS says how many levels of indirect addressing this machine
3656 supports.
3657
a8c9daeb
RK
3658 OPNUM and TYPE identify the purpose of the reload.
3659
eab89b90
RK
3660 IS_SET_DEST is true if X is the destination of a SET, which is not
3661 appropriate to be replaced by a constant. */
3662
3663static rtx
a8c9daeb 3664find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest)
eab89b90 3665 rtx x;
a8c9daeb
RK
3666 int opnum;
3667 enum reload_type type;
eab89b90
RK
3668 int ind_levels;
3669 int is_set_dest;
3670{
3671 register RTX_CODE code = GET_CODE (x);
3672
3673 register char *fmt = GET_RTX_FORMAT (code);
3674 register int i;
3675
3676 if (code == REG)
3677 {
3678 /* This code is duplicated for speed in find_reloads. */
3679 register int regno = REGNO (x);
3680 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
3681 x = reg_equiv_constant[regno];
3682#if 0
3683/* This creates (subreg (mem...)) which would cause an unnecessary
3684 reload of the mem. */
3685 else if (reg_equiv_mem[regno] != 0)
3686 x = reg_equiv_mem[regno];
3687#endif
3688 else if (reg_equiv_address[regno] != 0)
3689 {
3690 /* If reg_equiv_address varies, it may be shared, so copy it. */
3691 rtx addr = reg_equiv_address[regno];
3692
3693 if (rtx_varies_p (addr))
3694 addr = copy_rtx (addr);
3695
3696 x = gen_rtx (MEM, GET_MODE (x), addr);
3697 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
fb3821f7 3698 find_reloads_address (GET_MODE (x), NULL_PTR,
eab89b90 3699 XEXP (x, 0),
a8c9daeb 3700 &XEXP (x, 0), opnum, type, ind_levels);
eab89b90
RK
3701 }
3702 return x;
3703 }
3704 if (code == MEM)
3705 {
3706 rtx tem = x;
3707 find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
a8c9daeb 3708 opnum, type, ind_levels);
eab89b90
RK
3709 return tem;
3710 }
3711
3712 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
3713 {
3714 /* Check for SUBREG containing a REG that's equivalent to a constant.
3715 If the constant has a known value, truncate it right now.
3716 Similarly if we are extracting a single-word of a multi-word
3717 constant. If the constant is symbolic, allow it to be substituted
3718 normally. push_reload will strip the subreg later. If the
3719 constant is VOIDmode, abort because we will lose the mode of
3720 the register (this should never happen because one of the cases
3721 above should handle it). */
3722
3723 register int regno = REGNO (SUBREG_REG (x));
3724 rtx tem;
3725
3726 if (subreg_lowpart_p (x)
3727 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3728 && reg_equiv_constant[regno] != 0
3729 && (tem = gen_lowpart_common (GET_MODE (x),
3730 reg_equiv_constant[regno])) != 0)
3731 return tem;
3732
3733 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
3734 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3735 && reg_equiv_constant[regno] != 0
3736 && (tem = operand_subword (reg_equiv_constant[regno],
3737 SUBREG_WORD (x), 0,
3738 GET_MODE (SUBREG_REG (x)))) != 0)
3739 return tem;
3740
3741 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
3742 && reg_equiv_constant[regno] != 0
3743 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
3744 abort ();
3745
3746 /* If the subreg contains a reg that will be converted to a mem,
3747 convert the subreg to a narrower memref now.
3748 Otherwise, we would get (subreg (mem ...) ...),
3749 which would force reload of the mem.
3750
3751 We also need to do this if there is an equivalent MEM that is
3752 not offsettable. In that case, alter_subreg would produce an
3753 invalid address on big-endian machines.
3754
46da6b3a 3755 For machines that extend byte loads, we must not reload using
eab89b90
RK
3756 a wider mode if we have a paradoxical SUBREG. find_reloads will
3757 force a reload in that case. So we should not do anything here. */
3758
3759 else if (regno >= FIRST_PSEUDO_REGISTER
46da6b3a 3760#if defined(BYTE_LOADS_ZERO_EXTEND) || defined(BYTE_LOADS_SIGN_EXTEND)
eab89b90
RK
3761 && (GET_MODE_SIZE (GET_MODE (x))
3762 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3763#endif
3764 && (reg_equiv_address[regno] != 0
3765 || (reg_equiv_mem[regno] != 0
f2fbfe92
JL
3766 && (! strict_memory_address_p (GET_MODE (x),
3767 XEXP (reg_equiv_mem[regno], 0))
3768 || ! offsettable_memref_p (reg_equiv_mem[regno])))))
eab89b90
RK
3769 {
3770 int offset = SUBREG_WORD (x) * UNITS_PER_WORD;
3771 rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno]
3772 : XEXP (reg_equiv_mem[regno], 0));
3773#if BYTES_BIG_ENDIAN
3774 int size;
3775 size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
3776 offset += MIN (size, UNITS_PER_WORD);
3777 size = GET_MODE_SIZE (GET_MODE (x));
3778 offset -= MIN (size, UNITS_PER_WORD);
3779#endif
3780 addr = plus_constant (addr, offset);
3781 x = gen_rtx (MEM, GET_MODE (x), addr);
3782 RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
fb3821f7 3783 find_reloads_address (GET_MODE (x), NULL_PTR,
eab89b90 3784 XEXP (x, 0),
a8c9daeb 3785 &XEXP (x, 0), opnum, type, ind_levels);
eab89b90
RK
3786 }
3787
3788 }
3789
3790 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3791 {
3792 if (fmt[i] == 'e')
a8c9daeb 3793 XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type,
eab89b90
RK
3794 ind_levels, is_set_dest);
3795 }
3796 return x;
3797}
3798
dbf85761
RS
3799/* Return a mem ref for the memory equivalent of reg REGNO.
3800 This mem ref is not shared with anything. */
3801
eab89b90
RK
3802static rtx
3803make_memloc (ad, regno)
3804 rtx ad;
3805 int regno;
3806{
3807 register int i;
3808 rtx tem = reg_equiv_address[regno];
dbf85761
RS
3809
3810#if 0 /* We cannot safely reuse a memloc made here;
3811 if the pseudo appears twice, and its mem needs a reload,
3812 it gets two separate reloads assigned, but it only
3813 gets substituted with the second of them;
3814 then it can get used before that reload reg gets loaded up. */
eab89b90
RK
3815 for (i = 0; i < n_memlocs; i++)
3816 if (rtx_equal_p (tem, XEXP (memlocs[i], 0)))
3817 return memlocs[i];
dbf85761 3818#endif
eab89b90
RK
3819
3820 /* If TEM might contain a pseudo, we must copy it to avoid
3821 modifying it when we do the substitution for the reload. */
3822 if (rtx_varies_p (tem))
3823 tem = copy_rtx (tem);
3824
3825 tem = gen_rtx (MEM, GET_MODE (ad), tem);
3826 RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]);
3827 memlocs[n_memlocs++] = tem;
3828 return tem;
3829}
3830
3831/* Record all reloads needed for handling memory address AD
3832 which appears in *LOC in a memory reference to mode MODE
3833 which itself is found in location *MEMREFLOC.
3834 Note that we take shortcuts assuming that no multi-reg machine mode
3835 occurs as part of an address.
3836
a8c9daeb 3837 OPNUM and TYPE specify the purpose of this reload.
eab89b90
RK
3838
3839 IND_LEVELS says how many levels of indirect addressing this machine
3840 supports.
3841
3842 Value is nonzero if this address is reloaded or replaced as a whole.
3843 This is interesting to the caller if the address is an autoincrement.
3844
3845 Note that there is no verification that the address will be valid after
3846 this routine does its work. Instead, we rely on the fact that the address
3847 was valid when reload started. So we need only undo things that reload
3848 could have broken. These are wrong register types, pseudos not allocated
3849 to a hard register, and frame pointer elimination. */
3850
3851static int
a8c9daeb 3852find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels)
eab89b90
RK
3853 enum machine_mode mode;
3854 rtx *memrefloc;
3855 rtx ad;
3856 rtx *loc;
a8c9daeb
RK
3857 int opnum;
3858 enum reload_type type;
eab89b90
RK
3859 int ind_levels;
3860{
3861 register int regno;
3862 rtx tem;
3863
3864 /* If the address is a register, see if it is a legitimate address and
3865 reload if not. We first handle the cases where we need not reload
3866 or where we must reload in a non-standard way. */
3867
3868 if (GET_CODE (ad) == REG)
3869 {
3870 regno = REGNO (ad);
3871
3872 if (reg_equiv_constant[regno] != 0
3873 && strict_memory_address_p (mode, reg_equiv_constant[regno]))
3874 {
3875 *loc = ad = reg_equiv_constant[regno];
3876 return 1;
3877 }
3878
3879 else if (reg_equiv_address[regno] != 0)
3880 {
3881 tem = make_memloc (ad, regno);
fb3821f7 3882 find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0),
a8c9daeb 3883 &XEXP (tem, 0), opnum, type, ind_levels);
fb3821f7 3884 push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
eab89b90 3885 GET_MODE (ad), VOIDmode, 0, 0,
a8c9daeb 3886 opnum, type);
eab89b90
RK
3887 return 1;
3888 }
3889
b39555b4 3890 /* We can avoid a reload if the register's equivalent memory expression
c1875d66
RS
3891 is valid as an indirect memory address.
3892 But not all addresses are valid in a mem used as an indirect address:
3893 only reg or reg+constant. */
b39555b4
RS
3894
3895 else if (reg_equiv_mem[regno] != 0 && ind_levels > 0
c1875d66
RS
3896 && strict_memory_address_p (mode, reg_equiv_mem[regno])
3897 && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG
3898 || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS
3899 && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG
3900 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)))))
b39555b4 3901 return 0;
eab89b90
RK
3902
3903 /* The only remaining case where we can avoid a reload is if this is a
3904 hard register that is valid as a base register and which is not the
3905 subject of a CLOBBER in this insn. */
3906
3907 else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno)
3908 && ! regno_clobbered_p (regno, this_insn))
3909 return 0;
3910
3911 /* If we do not have one of the cases above, we must do the reload. */
fb3821f7 3912 push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS,
a8c9daeb 3913 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
3914 return 1;
3915 }
3916
3917 if (strict_memory_address_p (mode, ad))
3918 {
3919 /* The address appears valid, so reloads are not needed.
3920 But the address may contain an eliminable register.
3921 This can happen because a machine with indirect addressing
3922 may consider a pseudo register by itself a valid address even when
3923 it has failed to get a hard reg.
3924 So do a tree-walk to find and eliminate all such regs. */
3925
3926 /* But first quickly dispose of a common case. */
3927 if (GET_CODE (ad) == PLUS
3928 && GET_CODE (XEXP (ad, 1)) == CONST_INT
3929 && GET_CODE (XEXP (ad, 0)) == REG
3930 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
3931 return 0;
3932
3933 subst_reg_equivs_changed = 0;
3934 *loc = subst_reg_equivs (ad);
3935
3936 if (! subst_reg_equivs_changed)
3937 return 0;
3938
3939 /* Check result for validity after substitution. */
3940 if (strict_memory_address_p (mode, ad))
3941 return 0;
3942 }
3943
3944 /* The address is not valid. We have to figure out why. One possibility
3945 is that it is itself a MEM. This can happen when the frame pointer is
3946 being eliminated, a pseudo is not allocated to a hard register, and the
3947 offset between the frame and stack pointers is not its initial value.
d45cf215 3948 In that case the pseudo will have been replaced by a MEM referring to
eab89b90
RK
3949 the stack pointer. */
3950 if (GET_CODE (ad) == MEM)
3951 {
3952 /* First ensure that the address in this MEM is valid. Then, unless
3953 indirect addresses are valid, reload the MEM into a register. */
3954 tem = ad;
3955 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
a8c9daeb 3956 opnum, type, ind_levels == 0 ? 0 : ind_levels - 1);
d2555454
RS
3957
3958 /* If tem was changed, then we must create a new memory reference to
3959 hold it and store it back into memrefloc. */
3960 if (tem != ad && memrefloc)
ca3e4a2f 3961 {
ca3e4a2f 3962 *memrefloc = copy_rtx (*memrefloc);
3c80f7ed 3963 copy_replacements (tem, XEXP (*memrefloc, 0));
ca3e4a2f 3964 loc = &XEXP (*memrefloc, 0);
ca3e4a2f 3965 }
d2555454 3966
eab89b90
RK
3967 /* Check similar cases as for indirect addresses as above except
3968 that we can allow pseudos and a MEM since they should have been
3969 taken care of above. */
3970
3971 if (ind_levels == 0
3972 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
3973 || GET_CODE (XEXP (tem, 0)) == MEM
3974 || ! (GET_CODE (XEXP (tem, 0)) == REG
3975 || (GET_CODE (XEXP (tem, 0)) == PLUS
3976 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
3977 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
3978 {
3979 /* Must use TEM here, not AD, since it is the one that will
3980 have any subexpressions reloaded, if needed. */
fb3821f7 3981 push_reload (tem, NULL_RTX, loc, NULL_PTR,
eab89b90 3982 BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0,
a8c9daeb 3983 0, opnum, type);
eab89b90
RK
3984 return 1;
3985 }
3986 else
3987 return 0;
3988 }
3989
3990 /* If we have address of a stack slot but it's not valid
3991 (displacement is too large), compute the sum in a register. */
3992 else if (GET_CODE (ad) == PLUS
3993 && (XEXP (ad, 0) == frame_pointer_rtx
3994#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3995 || XEXP (ad, 0) == arg_pointer_rtx
3996#endif
3997 || XEXP (ad, 0) == stack_pointer_rtx)
3998 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
3999 {
4000 /* Unshare the MEM rtx so we can safely alter it. */
4001 if (memrefloc)
4002 {
4003 rtx oldref = *memrefloc;
4004 *memrefloc = copy_rtx (*memrefloc);
4005 loc = &XEXP (*memrefloc, 0);
eab89b90
RK
4006 }
4007 if (double_reg_address_ok)
4008 {
4009 /* Unshare the sum as well. */
4010 *loc = ad = copy_rtx (ad);
4011 /* Reload the displacement into an index reg.
4012 We assume the frame pointer or arg pointer is a base reg. */
4013 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
a8c9daeb
RK
4014 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4015 type, ind_levels);
eab89b90
RK
4016 }
4017 else
4018 {
4019 /* If the sum of two regs is not necessarily valid,
4020 reload the sum into a base reg.
4021 That will at least work. */
4022 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode,
a8c9daeb 4023 opnum, type, ind_levels);
eab89b90
RK
4024 }
4025 return 1;
4026 }
4027
4028 /* If we have an indexed stack slot, there are three possible reasons why
4029 it might be invalid: The index might need to be reloaded, the address
4030 might have been made by frame pointer elimination and hence have a
4031 constant out of range, or both reasons might apply.
4032
4033 We can easily check for an index needing reload, but even if that is the
4034 case, we might also have an invalid constant. To avoid making the
4035 conservative assumption and requiring two reloads, we see if this address
4036 is valid when not interpreted strictly. If it is, the only problem is
4037 that the index needs a reload and find_reloads_address_1 will take care
4038 of it.
4039
4040 There is still a case when we might generate an extra reload,
4041 however. In certain cases eliminate_regs will return a MEM for a REG
4042 (see the code there for details). In those cases, memory_address_p
4043 applied to our address will return 0 so we will think that our offset
4044 must be too large. But it might indeed be valid and the only problem
4045 is that a MEM is present where a REG should be. This case should be
4046 very rare and there doesn't seem to be any way to avoid it.
4047
4048 If we decide to do something here, it must be that
4049 `double_reg_address_ok' is true and that this address rtl was made by
4050 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4051 rework the sum so that the reload register will be added to the index.
4052 This is safe because we know the address isn't shared.
4053
4054 We check for fp/ap/sp as both the first and second operand of the
4055 innermost PLUS. */
4056
4057 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4058 && GET_CODE (XEXP (ad, 0)) == PLUS
4059 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4060#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4061 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4062#endif
4063 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4064 && ! memory_address_p (mode, ad))
4065 {
4066 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4067 plus_constant (XEXP (XEXP (ad, 0), 0),
4068 INTVAL (XEXP (ad, 1))),
4069 XEXP (XEXP (ad, 0), 1));
4070 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
a8c9daeb
RK
4071 GET_MODE (ad), opnum, type, ind_levels);
4072 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
eab89b90
RK
4073
4074 return 1;
4075 }
4076
4077 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4078 && GET_CODE (XEXP (ad, 0)) == PLUS
4079 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4080#if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4081 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4082#endif
4083 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4084 && ! memory_address_p (mode, ad))
4085 {
4086 *loc = ad = gen_rtx (PLUS, GET_MODE (ad),
4087 plus_constant (XEXP (XEXP (ad, 0), 1),
4088 INTVAL (XEXP (ad, 1))),
4089 XEXP (XEXP (ad, 0), 0));
4090 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS,
a8c9daeb
RK
4091 GET_MODE (ad), opnum, type, ind_levels);
4092 find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0);
eab89b90
RK
4093
4094 return 1;
4095 }
4096
4097 /* See if address becomes valid when an eliminable register
4098 in a sum is replaced. */
4099
4100 tem = ad;
4101 if (GET_CODE (ad) == PLUS)
4102 tem = subst_indexed_address (ad);
4103 if (tem != ad && strict_memory_address_p (mode, tem))
4104 {
4105 /* Ok, we win that way. Replace any additional eliminable
4106 registers. */
4107
4108 subst_reg_equivs_changed = 0;
4109 tem = subst_reg_equivs (tem);
4110
4111 /* Make sure that didn't make the address invalid again. */
4112
4113 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4114 {
4115 *loc = tem;
4116 return 0;
4117 }
4118 }
4119
4120 /* If constants aren't valid addresses, reload the constant address
4121 into a register. */
191b18e9 4122 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
eab89b90
RK
4123 {
4124 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4125 Unshare it so we can safely alter it. */
4126 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4127 && CONSTANT_POOL_ADDRESS_P (ad))
4128 {
4129 rtx oldref = *memrefloc;
4130 *memrefloc = copy_rtx (*memrefloc);
4131 loc = &XEXP (*memrefloc, 0);
eab89b90
RK
4132 }
4133
a8c9daeb 4134 find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type,
eab89b90
RK
4135 ind_levels);
4136 return 1;
4137 }
4138
a8c9daeb 4139 return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels);
eab89b90
RK
4140}
4141\f
4142/* Find all pseudo regs appearing in AD
4143 that are eliminable in favor of equivalent values
4144 and do not have hard regs; replace them by their equivalents. */
4145
4146static rtx
4147subst_reg_equivs (ad)
4148 rtx ad;
4149{
4150 register RTX_CODE code = GET_CODE (ad);
4151 register int i;
4152 register char *fmt;
4153
4154 switch (code)
4155 {
4156 case HIGH:
4157 case CONST_INT:
4158 case CONST:
4159 case CONST_DOUBLE:
4160 case SYMBOL_REF:
4161 case LABEL_REF:
4162 case PC:
4163 case CC0:
4164 return ad;
4165
4166 case REG:
4167 {
4168 register int regno = REGNO (ad);
4169
4170 if (reg_equiv_constant[regno] != 0)
4171 {
4172 subst_reg_equivs_changed = 1;
4173 return reg_equiv_constant[regno];
4174 }
4175 }
4176 return ad;
4177
4178 case PLUS:
4179 /* Quickly dispose of a common case. */
4180 if (XEXP (ad, 0) == frame_pointer_rtx
4181 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4182 return ad;
4183 }
4184
4185 fmt = GET_RTX_FORMAT (code);
4186 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4187 if (fmt[i] == 'e')
4188 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i));
4189 return ad;
4190}
4191\f
4192/* Compute the sum of X and Y, making canonicalizations assumed in an
4193 address, namely: sum constant integers, surround the sum of two
4194 constants with a CONST, put the constant as the second operand, and
4195 group the constant on the outermost sum.
4196
4197 This routine assumes both inputs are already in canonical form. */
4198
4199rtx
4200form_sum (x, y)
4201 rtx x, y;
4202{
4203 rtx tem;
2c0623e8
RK
4204 enum machine_mode mode = GET_MODE (x);
4205
4206 if (mode == VOIDmode)
4207 mode = GET_MODE (y);
4208
4209 if (mode == VOIDmode)
4210 mode = Pmode;
eab89b90
RK
4211
4212 if (GET_CODE (x) == CONST_INT)
4213 return plus_constant (y, INTVAL (x));
4214 else if (GET_CODE (y) == CONST_INT)
4215 return plus_constant (x, INTVAL (y));
4216 else if (CONSTANT_P (x))
4217 tem = x, x = y, y = tem;
4218
4219 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
4220 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
4221
4222 /* Note that if the operands of Y are specified in the opposite
4223 order in the recursive calls below, infinite recursion will occur. */
4224 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
4225 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
4226
4227 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4228 constant will have been placed second. */
4229 if (CONSTANT_P (x) && CONSTANT_P (y))
4230 {
4231 if (GET_CODE (x) == CONST)
4232 x = XEXP (x, 0);
4233 if (GET_CODE (y) == CONST)
4234 y = XEXP (y, 0);
4235
2c0623e8 4236 return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y));
eab89b90
RK
4237 }
4238
2c0623e8 4239 return gen_rtx (PLUS, mode, x, y);
eab89b90
RK
4240}
4241\f
4242/* If ADDR is a sum containing a pseudo register that should be
4243 replaced with a constant (from reg_equiv_constant),
4244 return the result of doing so, and also apply the associative
4245 law so that the result is more likely to be a valid address.
4246 (But it is not guaranteed to be one.)
4247
4248 Note that at most one register is replaced, even if more are
4249 replaceable. Also, we try to put the result into a canonical form
4250 so it is more likely to be a valid address.
4251
4252 In all other cases, return ADDR. */
4253
4254static rtx
4255subst_indexed_address (addr)
4256 rtx addr;
4257{
4258 rtx op0 = 0, op1 = 0, op2 = 0;
4259 rtx tem;
4260 int regno;
4261
4262 if (GET_CODE (addr) == PLUS)
4263 {
4264 /* Try to find a register to replace. */
4265 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
4266 if (GET_CODE (op0) == REG
4267 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
4268 && reg_renumber[regno] < 0
4269 && reg_equiv_constant[regno] != 0)
4270 op0 = reg_equiv_constant[regno];
4271 else if (GET_CODE (op1) == REG
4272 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
4273 && reg_renumber[regno] < 0
4274 && reg_equiv_constant[regno] != 0)
4275 op1 = reg_equiv_constant[regno];
4276 else if (GET_CODE (op0) == PLUS
4277 && (tem = subst_indexed_address (op0)) != op0)
4278 op0 = tem;
4279 else if (GET_CODE (op1) == PLUS
4280 && (tem = subst_indexed_address (op1)) != op1)
4281 op1 = tem;
4282 else
4283 return addr;
4284
4285 /* Pick out up to three things to add. */
4286 if (GET_CODE (op1) == PLUS)
4287 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
4288 else if (GET_CODE (op0) == PLUS)
4289 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4290
4291 /* Compute the sum. */
4292 if (op2 != 0)
4293 op1 = form_sum (op1, op2);
4294 if (op1 != 0)
4295 op0 = form_sum (op0, op1);
4296
4297 return op0;
4298 }
4299 return addr;
4300}
4301\f
4302/* Record the pseudo registers we must reload into hard registers
4303 in a subexpression of a would-be memory address, X.
4304 (This function is not called if the address we find is strictly valid.)
4305 CONTEXT = 1 means we are considering regs as index regs,
4306 = 0 means we are considering them as base regs.
4307
a8c9daeb 4308 OPNUM and TYPE specify the purpose of any reloads made.
eab89b90
RK
4309
4310 IND_LEVELS says how many levels of indirect addressing are
4311 supported at this point in the address.
4312
4313 We return nonzero if X, as a whole, is reloaded or replaced. */
4314
4315/* Note that we take shortcuts assuming that no multi-reg machine mode
4316 occurs as part of an address.
4317 Also, this is not fully machine-customizable; it works for machines
4318 such as vaxes and 68000's and 32000's, but other possible machines
4319 could have addressing modes that this does not handle right. */
4320
4321static int
a8c9daeb 4322find_reloads_address_1 (x, context, loc, opnum, type, ind_levels)
eab89b90
RK
4323 rtx x;
4324 int context;
4325 rtx *loc;
a8c9daeb
RK
4326 int opnum;
4327 enum reload_type type;
eab89b90
RK
4328 int ind_levels;
4329{
4330 register RTX_CODE code = GET_CODE (x);
4331
4332 if (code == PLUS)
4333 {
4334 register rtx op0 = XEXP (x, 0);
4335 register rtx op1 = XEXP (x, 1);
4336 register RTX_CODE code0 = GET_CODE (op0);
4337 register RTX_CODE code1 = GET_CODE (op1);
4338 if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM)
4339 {
a8c9daeb
RK
4340 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4341 ind_levels);
4342 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4343 ind_levels);
eab89b90
RK
4344 }
4345 else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM)
4346 {
a8c9daeb
RK
4347 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4348 ind_levels);
4349 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4350 ind_levels);
eab89b90
RK
4351 }
4352 else if (code0 == CONST_INT || code0 == CONST
4353 || code0 == SYMBOL_REF || code0 == LABEL_REF)
a8c9daeb 4354 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type, ind_levels);
eab89b90
RK
4355 else if (code1 == CONST_INT || code1 == CONST
4356 || code1 == SYMBOL_REF || code1 == LABEL_REF)
a8c9daeb 4357 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type, ind_levels);
eab89b90
RK
4358 else if (code0 == REG && code1 == REG)
4359 {
4360 if (REG_OK_FOR_INDEX_P (op0)
4361 && REG_OK_FOR_BASE_P (op1))
4362 return 0;
4363 else if (REG_OK_FOR_INDEX_P (op1)
4364 && REG_OK_FOR_BASE_P (op0))
4365 return 0;
4366 else if (REG_OK_FOR_BASE_P (op1))
a8c9daeb
RK
4367 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4368 ind_levels);
eab89b90 4369 else if (REG_OK_FOR_BASE_P (op0))
a8c9daeb
RK
4370 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4371 ind_levels);
eab89b90 4372 else if (REG_OK_FOR_INDEX_P (op1))
a8c9daeb
RK
4373 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4374 ind_levels);
eab89b90 4375 else if (REG_OK_FOR_INDEX_P (op0))
a8c9daeb
RK
4376 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4377 ind_levels);
eab89b90
RK
4378 else
4379 {
a8c9daeb 4380 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
eab89b90 4381 ind_levels);
a8c9daeb 4382 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
eab89b90
RK
4383 ind_levels);
4384 }
4385 }
4386 else if (code0 == REG)
4387 {
a8c9daeb
RK
4388 find_reloads_address_1 (op0, 1, &XEXP (x, 0), opnum, type,
4389 ind_levels);
4390 find_reloads_address_1 (op1, 0, &XEXP (x, 1), opnum, type,
4391 ind_levels);
eab89b90
RK
4392 }
4393 else if (code1 == REG)
4394 {
a8c9daeb
RK
4395 find_reloads_address_1 (op1, 1, &XEXP (x, 1), opnum, type,
4396 ind_levels);
4397 find_reloads_address_1 (op0, 0, &XEXP (x, 0), opnum, type,
4398 ind_levels);
eab89b90
RK
4399 }
4400 }
4401 else if (code == POST_INC || code == POST_DEC
4402 || code == PRE_INC || code == PRE_DEC)
4403 {
4404 if (GET_CODE (XEXP (x, 0)) == REG)
4405 {
4406 register int regno = REGNO (XEXP (x, 0));
4407 int value = 0;
4408 rtx x_orig = x;
4409
4410 /* A register that is incremented cannot be constant! */
4411 if (regno >= FIRST_PSEUDO_REGISTER
4412 && reg_equiv_constant[regno] != 0)
4413 abort ();
4414
4415 /* Handle a register that is equivalent to a memory location
4416 which cannot be addressed directly. */
4417 if (reg_equiv_address[regno] != 0)
4418 {
4419 rtx tem = make_memloc (XEXP (x, 0), regno);
4420 /* First reload the memory location's address. */
4421 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
a8c9daeb 4422 &XEXP (tem, 0), opnum, type, ind_levels);
eab89b90
RK
4423 /* Put this inside a new increment-expression. */
4424 x = gen_rtx (GET_CODE (x), GET_MODE (x), tem);
4425 /* Proceed to reload that, as if it contained a register. */
4426 }
4427
4428 /* If we have a hard register that is ok as an index,
4429 don't make a reload. If an autoincrement of a nice register
4430 isn't "valid", it must be that no autoincrement is "valid".
4431 If that is true and something made an autoincrement anyway,
4432 this must be a special context where one is allowed.
4433 (For example, a "push" instruction.)
4434 We can't improve this address, so leave it alone. */
4435
4436 /* Otherwise, reload the autoincrement into a suitable hard reg
4437 and record how much to increment by. */
4438
4439 if (reg_renumber[regno] >= 0)
4440 regno = reg_renumber[regno];
4441 if ((regno >= FIRST_PSEUDO_REGISTER
4442 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4443 : REGNO_OK_FOR_BASE_P (regno))))
4444 {
4445 register rtx link;
4446
4447 int reloadnum
fb3821f7 4448 = push_reload (x, NULL_RTX, loc, NULL_PTR,
eab89b90 4449 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb
RK
4450 GET_MODE (x), GET_MODE (x), VOIDmode, 0,
4451 opnum, type);
eab89b90
RK
4452 reload_inc[reloadnum]
4453 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
4454
4455 value = 1;
4456
4457#ifdef AUTO_INC_DEC
4458 /* Update the REG_INC notes. */
4459
4460 for (link = REG_NOTES (this_insn);
4461 link; link = XEXP (link, 1))
4462 if (REG_NOTE_KIND (link) == REG_INC
4463 && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0)))
4464 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4465#endif
4466 }
4467 return value;
4468 }
4469 else if (GET_CODE (XEXP (x, 0)) == MEM)
4470 {
4471 /* This is probably the result of a substitution, by eliminate_regs,
4472 of an equivalent address for a pseudo that was not allocated to a
4473 hard register. Verify that the specified address is valid and
4474 reload it into a register. */
4475 rtx tem = XEXP (x, 0);
4476 register rtx link;
4477 int reloadnum;
4478
4479 /* Since we know we are going to reload this item, don't decrement
4480 for the indirection level.
4481
4482 Note that this is actually conservative: it would be slightly
4483 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4484 reload1.c here. */
4485 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
4486 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
a8c9daeb 4487 opnum, type, ind_levels);
eab89b90 4488
fb3821f7 4489 reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR,
eab89b90 4490 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb 4491 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4492 reload_inc[reloadnum]
4493 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
4494
4495 link = FIND_REG_INC_NOTE (this_insn, tem);
4496 if (link != 0)
4497 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
4498
4499 return 1;
4500 }
4501 }
4502 else if (code == MEM)
4503 {
4504 /* This is probably the result of a substitution, by eliminate_regs,
4505 of an equivalent address for a pseudo that was not allocated to a
4506 hard register. Verify that the specified address is valid and reload
4507 it into a register.
4508
4509 Since we know we are going to reload this item, don't decrement
4510 for the indirection level.
4511
4512 Note that this is actually conservative: it would be slightly more
4513 efficient to use the value of SPILL_INDIRECT_LEVELS from
4514 reload1.c here. */
4515
4516 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
a8c9daeb 4517 opnum, type, ind_levels);
eab89b90 4518
fb3821f7 4519 push_reload (*loc, NULL_RTX, loc, NULL_PTR,
eab89b90 4520 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb 4521 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4522 return 1;
4523 }
4524 else if (code == REG)
4525 {
4526 register int regno = REGNO (x);
4527
4528 if (reg_equiv_constant[regno] != 0)
4529 {
58c8c593
RK
4530 find_reloads_address_part (reg_equiv_constant[regno], loc,
4531 (context ? INDEX_REG_CLASS
4532 : BASE_REG_CLASS),
a8c9daeb 4533 GET_MODE (x), opnum, type, ind_levels);
eab89b90
RK
4534 return 1;
4535 }
4536
4537#if 0 /* This might screw code in reload1.c to delete prior output-reload
4538 that feeds this insn. */
4539 if (reg_equiv_mem[regno] != 0)
4540 {
fb3821f7 4541 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR,
eab89b90 4542 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb 4543 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4544 return 1;
4545 }
4546#endif
4547 if (reg_equiv_address[regno] != 0)
4548 {
4549 x = make_memloc (x, regno);
4550 find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0),
a8c9daeb 4551 opnum, type, ind_levels);
eab89b90
RK
4552 }
4553
4554 if (reg_renumber[regno] >= 0)
4555 regno = reg_renumber[regno];
4556 if ((regno >= FIRST_PSEUDO_REGISTER
4557 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
4558 : REGNO_OK_FOR_BASE_P (regno))))
4559 {
fb3821f7 4560 push_reload (x, NULL_RTX, loc, NULL_PTR,
eab89b90 4561 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb 4562 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4563 return 1;
4564 }
4565
4566 /* If a register appearing in an address is the subject of a CLOBBER
4567 in this insn, reload it into some other register to be safe.
4568 The CLOBBER is supposed to make the register unavailable
4569 from before this insn to after it. */
4570 if (regno_clobbered_p (regno, this_insn))
4571 {
fb3821f7 4572 push_reload (x, NULL_RTX, loc, NULL_PTR,
eab89b90 4573 context ? INDEX_REG_CLASS : BASE_REG_CLASS,
a8c9daeb 4574 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4575 return 1;
4576 }
4577 }
4578 else
4579 {
4580 register char *fmt = GET_RTX_FORMAT (code);
4581 register int i;
4582 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4583 {
4584 if (fmt[i] == 'e')
4585 find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i),
a8c9daeb 4586 opnum, type, ind_levels);
eab89b90
RK
4587 }
4588 }
4589
4590 return 0;
4591}
4592\f
4593/* X, which is found at *LOC, is a part of an address that needs to be
4594 reloaded into a register of class CLASS. If X is a constant, or if
4595 X is a PLUS that contains a constant, check that the constant is a
4596 legitimate operand and that we are supposed to be able to load
4597 it into the register.
4598
4599 If not, force the constant into memory and reload the MEM instead.
4600
4601 MODE is the mode to use, in case X is an integer constant.
4602
a8c9daeb 4603 OPNUM and TYPE describe the purpose of any reloads made.
eab89b90
RK
4604
4605 IND_LEVELS says how many levels of indirect addressing this machine
4606 supports. */
4607
4608static void
a8c9daeb 4609find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
eab89b90
RK
4610 rtx x;
4611 rtx *loc;
4612 enum reg_class class;
4613 enum machine_mode mode;
a8c9daeb
RK
4614 int opnum;
4615 enum reload_type type;
eab89b90
RK
4616 int ind_levels;
4617{
4618 if (CONSTANT_P (x)
4619 && (! LEGITIMATE_CONSTANT_P (x)
4620 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
4621 {
4622 rtx tem = x = force_const_mem (mode, x);
4623 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
a8c9daeb 4624 opnum, type, ind_levels);
eab89b90
RK
4625 }
4626
4627 else if (GET_CODE (x) == PLUS
4628 && CONSTANT_P (XEXP (x, 1))
4629 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
4630 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
4631 {
4632 rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
4633
4634 x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem);
4635 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
a8c9daeb 4636 opnum, type, ind_levels);
eab89b90
RK
4637 }
4638
fb3821f7 4639 push_reload (x, NULL_RTX, loc, NULL_PTR, class,
a8c9daeb 4640 mode, VOIDmode, 0, 0, opnum, type);
eab89b90
RK
4641}
4642\f
a8c9daeb 4643/* Substitute into the current INSN the registers into which we have reloaded
eab89b90
RK
4644 the things that need reloading. The array `replacements'
4645 says contains the locations of all pointers that must be changed
4646 and says what to replace them with.
4647
4648 Return the rtx that X translates into; usually X, but modified. */
4649
4650void
4651subst_reloads ()
4652{
4653 register int i;
4654
4655 for (i = 0; i < n_replacements; i++)
4656 {
4657 register struct replacement *r = &replacements[i];
4658 register rtx reloadreg = reload_reg_rtx[r->what];
4659 if (reloadreg)
4660 {
4661 /* Encapsulate RELOADREG so its machine mode matches what
4662 used to be there. */
4663 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
dca52d80 4664 reloadreg = gen_lowpart_common (r->mode, reloadreg);
eab89b90
RK
4665
4666 /* If we are putting this into a SUBREG and RELOADREG is a
4667 SUBREG, we would be making nested SUBREGs, so we have to fix
4668 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4669
4670 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
4671 {
4672 if (GET_MODE (*r->subreg_loc)
4673 == GET_MODE (SUBREG_REG (reloadreg)))
4674 *r->subreg_loc = SUBREG_REG (reloadreg);
4675 else
4676 {
4677 *r->where = SUBREG_REG (reloadreg);
4678 SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg);
4679 }
4680 }
4681 else
4682 *r->where = reloadreg;
4683 }
4684 /* If reload got no reg and isn't optional, something's wrong. */
4685 else if (! reload_optional[r->what])
4686 abort ();
4687 }
4688}
4689\f
4690/* Make a copy of any replacements being done into X and move those copies
4691 to locations in Y, a copy of X. We only look at the highest level of
4692 the RTL. */
4693
4694void
4695copy_replacements (x, y)
4696 rtx x;
4697 rtx y;
4698{
4699 int i, j;
4700 enum rtx_code code = GET_CODE (x);
4701 char *fmt = GET_RTX_FORMAT (code);
4702 struct replacement *r;
4703
4704 /* We can't support X being a SUBREG because we might then need to know its
4705 location if something inside it was replaced. */
4706 if (code == SUBREG)
4707 abort ();
4708
4709 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4710 if (fmt[i] == 'e')
4711 for (j = 0; j < n_replacements; j++)
4712 {
4713 if (replacements[j].subreg_loc == &XEXP (x, i))
4714 {
4715 r = &replacements[n_replacements++];
4716 r->where = replacements[j].where;
4717 r->subreg_loc = &XEXP (y, i);
4718 r->what = replacements[j].what;
4719 r->mode = replacements[j].mode;
4720 }
4721 else if (replacements[j].where == &XEXP (x, i))
4722 {
4723 r = &replacements[n_replacements++];
4724 r->where = &XEXP (y, i);
4725 r->subreg_loc = 0;
4726 r->what = replacements[j].what;
4727 r->mode = replacements[j].mode;
4728 }
4729 }
4730}
4731\f
af929c62
RK
4732/* If LOC was scheduled to be replaced by something, return the replacement.
4733 Otherwise, return *LOC. */
4734
4735rtx
4736find_replacement (loc)
4737 rtx *loc;
4738{
4739 struct replacement *r;
4740
4741 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
4742 {
4743 rtx reloadreg = reload_reg_rtx[r->what];
4744
4745 if (reloadreg && r->where == loc)
4746 {
4747 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
4748 reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg));
4749
4750 return reloadreg;
4751 }
4752 else if (reloadreg && r->subreg_loc == loc)
4753 {
4754 /* RELOADREG must be either a REG or a SUBREG.
4755
4756 ??? Is it actually still ever a SUBREG? If so, why? */
4757
4758 if (GET_CODE (reloadreg) == REG)
4759 return gen_rtx (REG, GET_MODE (*loc),
4760 REGNO (reloadreg) + SUBREG_WORD (*loc));
4761 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
4762 return reloadreg;
4763 else
4764 return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg),
4765 SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc));
4766 }
4767 }
4768
4769 return *loc;
4770}
4771\f
eab89b90
RK
4772/* Return nonzero if register in range [REGNO, ENDREGNO)
4773 appears either explicitly or implicitly in X
4774 other than being stored into.
4775
4776 References contained within the substructure at LOC do not count.
4777 LOC may be zero, meaning don't ignore anything.
4778
4779 This is similar to refers_to_regno_p in rtlanal.c except that we
4780 look at equivalences for pseudos that didn't get hard registers. */
4781
4782int
4783refers_to_regno_for_reload_p (regno, endregno, x, loc)
4784 int regno, endregno;
4785 rtx x;
4786 rtx *loc;
4787{
4788 register int i;
4789 register RTX_CODE code;
4790 register char *fmt;
4791
4792 if (x == 0)
4793 return 0;
4794
4795 repeat:
4796 code = GET_CODE (x);
4797
4798 switch (code)
4799 {
4800 case REG:
4801 i = REGNO (x);
4802
4803a34a
RK
4803 /* If this is a pseudo, a hard register must not have been allocated.
4804 X must therefore either be a constant or be in memory. */
4805 if (i >= FIRST_PSEUDO_REGISTER)
4806 {
4807 if (reg_equiv_memory_loc[i])
4808 return refers_to_regno_for_reload_p (regno, endregno,
fb3821f7
CH
4809 reg_equiv_memory_loc[i],
4810 NULL_PTR);
4803a34a
RK
4811
4812 if (reg_equiv_constant[i])
4813 return 0;
4814
4815 abort ();
4816 }
eab89b90
RK
4817
4818 return (endregno > i
4819 && regno < i + (i < FIRST_PSEUDO_REGISTER
4820 ? HARD_REGNO_NREGS (i, GET_MODE (x))
4821 : 1));
4822
4823 case SUBREG:
4824 /* If this is a SUBREG of a hard reg, we can see exactly which
4825 registers are being modified. Otherwise, handle normally. */
4826 if (GET_CODE (SUBREG_REG (x)) == REG
4827 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
4828 {
4829 int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
4830 int inner_endregno
4831 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
4832 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4833
4834 return endregno > inner_regno && regno < inner_endregno;
4835 }
4836 break;
4837
4838 case CLOBBER:
4839 case SET:
4840 if (&SET_DEST (x) != loc
4841 /* Note setting a SUBREG counts as referring to the REG it is in for
4842 a pseudo but not for hard registers since we can
4843 treat each word individually. */
4844 && ((GET_CODE (SET_DEST (x)) == SUBREG
4845 && loc != &SUBREG_REG (SET_DEST (x))
4846 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
4847 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
4848 && refers_to_regno_for_reload_p (regno, endregno,
4849 SUBREG_REG (SET_DEST (x)),
4850 loc))
4851 || (GET_CODE (SET_DEST (x)) != REG
4852 && refers_to_regno_for_reload_p (regno, endregno,
4853 SET_DEST (x), loc))))
4854 return 1;
4855
4856 if (code == CLOBBER || loc == &SET_SRC (x))
4857 return 0;
4858 x = SET_SRC (x);
4859 goto repeat;
4860 }
4861
4862 /* X does not match, so try its subexpressions. */
4863
4864 fmt = GET_RTX_FORMAT (code);
4865 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4866 {
4867 if (fmt[i] == 'e' && loc != &XEXP (x, i))
4868 {
4869 if (i == 0)
4870 {
4871 x = XEXP (x, 0);
4872 goto repeat;
4873 }
4874 else
4875 if (refers_to_regno_for_reload_p (regno, endregno,
4876 XEXP (x, i), loc))
4877 return 1;
4878 }
4879 else if (fmt[i] == 'E')
4880 {
4881 register int j;
4882 for (j = XVECLEN (x, i) - 1; j >=0; j--)
4883 if (loc != &XVECEXP (x, i, j)
4884 && refers_to_regno_for_reload_p (regno, endregno,
4885 XVECEXP (x, i, j), loc))
4886 return 1;
4887 }
4888 }
4889 return 0;
4890}
bfa30b22
RK
4891
4892/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
4893 we check if any register number in X conflicts with the relevant register
4894 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
4895 contains a MEM (we don't bother checking for memory addresses that can't
4896 conflict because we expect this to be a rare case.
4897
4898 This function is similar to reg_overlap_mention_p in rtlanal.c except
4899 that we look at equivalences for pseudos that didn't get hard registers. */
4900
4901int
4902reg_overlap_mentioned_for_reload_p (x, in)
4903 rtx x, in;
4904{
4905 int regno, endregno;
4906
4907 if (GET_CODE (x) == SUBREG)
4908 {
4909 regno = REGNO (SUBREG_REG (x));
4910 if (regno < FIRST_PSEUDO_REGISTER)
4911 regno += SUBREG_WORD (x);
4912 }
4913 else if (GET_CODE (x) == REG)
4914 {
4915 regno = REGNO (x);
4803a34a
RK
4916
4917 /* If this is a pseudo, it must not have been assigned a hard register.
4918 Therefore, it must either be in memory or be a constant. */
4919
4920 if (regno >= FIRST_PSEUDO_REGISTER)
4921 {
4922 if (reg_equiv_memory_loc[regno])
4923 return refers_to_mem_for_reload_p (in);
4924 else if (reg_equiv_constant[regno])
4925 return 0;
4926 abort ();
4927 }
bfa30b22
RK
4928 }
4929 else if (CONSTANT_P (x))
4930 return 0;
4931 else if (GET_CODE (x) == MEM)
4803a34a 4932 return refers_to_mem_for_reload_p (in);
bfa30b22
RK
4933 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
4934 || GET_CODE (x) == CC0)
4935 return reg_mentioned_p (x, in);
4936 else
4937 abort ();
4938
4939 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
4940 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
4941
fb3821f7 4942 return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR);
bfa30b22 4943}
4803a34a
RK
4944
4945/* Return nonzero if anything in X contains a MEM. Look also for pseudo
4946 registers. */
4947
4948int
4949refers_to_mem_for_reload_p (x)
4950 rtx x;
4951{
4952 char *fmt;
4953 int i;
4954
4955 if (GET_CODE (x) == MEM)
4956 return 1;
4957
4958 if (GET_CODE (x) == REG)
4959 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
4960 && reg_equiv_memory_loc[REGNO (x)]);
4961
4962 fmt = GET_RTX_FORMAT (GET_CODE (x));
4963 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4964 if (fmt[i] == 'e'
4965 && (GET_CODE (XEXP (x, i)) == MEM
4966 || refers_to_mem_for_reload_p (XEXP (x, i))))
4967 return 1;
4968
4969 return 0;
4970}
eab89b90 4971\f
eab89b90
RK
4972/* Check the insns before INSN to see if there is a suitable register
4973 containing the same value as GOAL.
4974 If OTHER is -1, look for a register in class CLASS.
4975 Otherwise, just see if register number OTHER shares GOAL's value.
4976
4977 Return an rtx for the register found, or zero if none is found.
4978
4979 If RELOAD_REG_P is (short *)1,
4980 we reject any hard reg that appears in reload_reg_rtx
4981 because such a hard reg is also needed coming into this insn.
4982
4983 If RELOAD_REG_P is any other nonzero value,
4984 it is a vector indexed by hard reg number
4985 and we reject any hard reg whose element in the vector is nonnegative
4986 as well as any that appears in reload_reg_rtx.
4987
4988 If GOAL is zero, then GOALREG is a register number; we look
4989 for an equivalent for that register.
4990
4991 MODE is the machine mode of the value we want an equivalence for.
4992 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
4993
4994 This function is used by jump.c as well as in the reload pass.
4995
4996 If GOAL is the sum of the stack pointer and a constant, we treat it
4997 as if it were a constant except that sp is required to be unchanging. */
4998
4999rtx
5000find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
5001 register rtx goal;
5002 rtx insn;
5003 enum reg_class class;
5004 register int other;
5005 short *reload_reg_p;
5006 int goalreg;
5007 enum machine_mode mode;
5008{
5009 register rtx p = insn;
f55b1d97 5010 rtx goaltry, valtry, value, where;
eab89b90
RK
5011 register rtx pat;
5012 register int regno = -1;
5013 int valueno;
5014 int goal_mem = 0;
5015 int goal_const = 0;
5016 int goal_mem_addr_varies = 0;
5017 int need_stable_sp = 0;
5018 int nregs;
5019 int valuenregs;
5020
5021 if (goal == 0)
5022 regno = goalreg;
5023 else if (GET_CODE (goal) == REG)
5024 regno = REGNO (goal);
5025 else if (GET_CODE (goal) == MEM)
5026 {
5027 enum rtx_code code = GET_CODE (XEXP (goal, 0));
5028 if (MEM_VOLATILE_P (goal))
5029 return 0;
5030 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
5031 return 0;
5032 /* An address with side effects must be reexecuted. */
5033 switch (code)
5034 {
5035 case POST_INC:
5036 case PRE_INC:
5037 case POST_DEC:
5038 case PRE_DEC:
5039 return 0;
5040 }
5041 goal_mem = 1;
5042 }
5043 else if (CONSTANT_P (goal))
5044 goal_const = 1;
5045 else if (GET_CODE (goal) == PLUS
5046 && XEXP (goal, 0) == stack_pointer_rtx
5047 && CONSTANT_P (XEXP (goal, 1)))
5048 goal_const = need_stable_sp = 1;
5049 else
5050 return 0;
5051
5052 /* On some machines, certain regs must always be rejected
5053 because they don't behave the way ordinary registers do. */
5054
5055#ifdef OVERLAPPING_REGNO_P
5056 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5057 && OVERLAPPING_REGNO_P (regno))
5058 return 0;
5059#endif
5060
5061 /* Scan insns back from INSN, looking for one that copies
5062 a value into or out of GOAL.
5063 Stop and give up if we reach a label. */
5064
5065 while (1)
5066 {
5067 p = PREV_INSN (p);
5068 if (p == 0 || GET_CODE (p) == CODE_LABEL)
5069 return 0;
5070 if (GET_CODE (p) == INSN
5071 /* If we don't want spill regs ... */
a8c9daeb
RK
5072 && (! (reload_reg_p != 0
5073 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
eab89b90
RK
5074 /* ... then ignore insns introduced by reload; they aren't useful
5075 and can cause results in reload_as_needed to be different
5076 from what they were when calculating the need for spills.
5077 If we notice an input-reload insn here, we will reject it below,
5078 but it might hide a usable equivalent. That makes bad code.
5079 It may even abort: perhaps no reg was spilled for this insn
5080 because it was assumed we would find that equivalent. */
5081 || INSN_UID (p) < reload_first_uid))
5082 {
e8094962 5083 rtx tem;
eab89b90
RK
5084 pat = single_set (p);
5085 /* First check for something that sets some reg equal to GOAL. */
5086 if (pat != 0
5087 && ((regno >= 0
5088 && true_regnum (SET_SRC (pat)) == regno
5089 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5090 ||
5091 (regno >= 0
5092 && true_regnum (SET_DEST (pat)) == regno
5093 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
5094 ||
5095 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
5096 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
5097 || (goal_mem
5098 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
5099 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
5100 || (goal_mem
5101 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
e8094962
RK
5102 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
5103 /* If we are looking for a constant,
5104 and something equivalent to that constant was copied
5105 into a reg, we can use that reg. */
fb3821f7
CH
5106 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5107 NULL_RTX))
e8094962 5108 && rtx_equal_p (XEXP (tem, 0), goal)
95d3562b 5109 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
fb3821f7
CH
5110 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5111 NULL_RTX))
e8094962
RK
5112 && GET_CODE (SET_DEST (pat)) == REG
5113 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5114 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5115 && GET_CODE (goal) == CONST_INT
f55b1d97
RK
5116 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0,
5117 VOIDmode))
5118 && rtx_equal_p (goal, goaltry)
e8094962
RK
5119 && (valtry = operand_subword (SET_DEST (pat), 0, 0,
5120 VOIDmode))
95d3562b 5121 && (valueno = true_regnum (valtry)) >= 0)
fb3821f7
CH
5122 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
5123 NULL_RTX))
e8094962
RK
5124 && GET_CODE (SET_DEST (pat)) == REG
5125 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
5126 && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT
5127 && GET_CODE (goal) == CONST_INT
f55b1d97
RK
5128 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
5129 VOIDmode))
5130 && rtx_equal_p (goal, goaltry)
e8094962
RK
5131 && (valtry
5132 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
95d3562b 5133 && (valueno = true_regnum (valtry)) >= 0)))
eab89b90
RK
5134 if (other >= 0
5135 ? valueno == other
5136 : ((unsigned) valueno < FIRST_PSEUDO_REGISTER
5137 && TEST_HARD_REG_BIT (reg_class_contents[(int) class],
5138 valueno)))
5139 {
5140 value = valtry;
5141 where = p;
5142 break;
5143 }
5144 }
5145 }
5146
5147 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5148 (or copying VALUE into GOAL, if GOAL is also a register).
5149 Now verify that VALUE is really valid. */
5150
5151 /* VALUENO is the register number of VALUE; a hard register. */
5152
5153 /* Don't try to re-use something that is killed in this insn. We want
5154 to be able to trust REG_UNUSED notes. */
5155 if (find_reg_note (where, REG_UNUSED, value))
5156 return 0;
5157
5158 /* If we propose to get the value from the stack pointer or if GOAL is
5159 a MEM based on the stack pointer, we need a stable SP. */
5160 if (valueno == STACK_POINTER_REGNUM
bfa30b22
RK
5161 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
5162 goal)))
eab89b90
RK
5163 need_stable_sp = 1;
5164
5165 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5166 if (GET_MODE (value) != mode)
5167 return 0;
5168
5169 /* Reject VALUE if it was loaded from GOAL
5170 and is also a register that appears in the address of GOAL. */
5171
5172 if (goal_mem && value == SET_DEST (PATTERN (where))
bfa30b22
RK
5173 && refers_to_regno_for_reload_p (valueno,
5174 (valueno
5175 + HARD_REGNO_NREGS (valueno, mode)),
fb3821f7 5176 goal, NULL_PTR))
eab89b90
RK
5177 return 0;
5178
5179 /* Reject registers that overlap GOAL. */
5180
5181 if (!goal_mem && !goal_const
5182 && regno + HARD_REGNO_NREGS (regno, mode) > valueno
5183 && regno < valueno + HARD_REGNO_NREGS (valueno, mode))
5184 return 0;
5185
5186 /* Reject VALUE if it is one of the regs reserved for reloads.
5187 Reload1 knows how to reuse them anyway, and it would get
5188 confused if we allocated one without its knowledge.
5189 (Now that insns introduced by reload are ignored above,
5190 this case shouldn't happen, but I'm not positive.) */
5191
a8c9daeb 5192 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1
eab89b90
RK
5193 && reload_reg_p[valueno] >= 0)
5194 return 0;
5195
5196 /* On some machines, certain regs must always be rejected
5197 because they don't behave the way ordinary registers do. */
5198
5199#ifdef OVERLAPPING_REGNO_P
5200 if (OVERLAPPING_REGNO_P (valueno))
5201 return 0;
5202#endif
5203
5204 nregs = HARD_REGNO_NREGS (regno, mode);
5205 valuenregs = HARD_REGNO_NREGS (valueno, mode);
5206
5207 /* Reject VALUE if it is a register being used for an input reload
5208 even if it is not one of those reserved. */
5209
5210 if (reload_reg_p != 0)
5211 {
5212 int i;
5213 for (i = 0; i < n_reloads; i++)
5214 if (reload_reg_rtx[i] != 0 && reload_in[i])
5215 {
5216 int regno1 = REGNO (reload_reg_rtx[i]);
5217 int nregs1 = HARD_REGNO_NREGS (regno1,
5218 GET_MODE (reload_reg_rtx[i]));
5219 if (regno1 < valueno + valuenregs
5220 && regno1 + nregs1 > valueno)
5221 return 0;
5222 }
5223 }
5224
5225 if (goal_mem)
54b5ffe9
RS
5226 /* We must treat frame pointer as varying here,
5227 since it can vary--in a nonlocal goto as generated by expand_goto. */
5228 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
eab89b90
RK
5229
5230 /* Now verify that the values of GOAL and VALUE remain unaltered
5231 until INSN is reached. */
5232
5233 p = insn;
5234 while (1)
5235 {
5236 p = PREV_INSN (p);
5237 if (p == where)
5238 return value;
5239
5240 /* Don't trust the conversion past a function call
5241 if either of the two is in a call-clobbered register, or memory. */
5242 if (GET_CODE (p) == CALL_INSN
5243 && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5244 && call_used_regs[regno])
5245 ||
5246 (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5247 && call_used_regs[valueno])
5248 ||
5249 goal_mem
5250 || need_stable_sp))
5251 return 0;
5252
5253#ifdef INSN_CLOBBERS_REGNO_P
5254 if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER
5255 && INSN_CLOBBERS_REGNO_P (p, valueno))
5256 || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER
5257 && INSN_CLOBBERS_REGNO_P (p, regno)))
5258 return 0;
5259#endif
5260
5261 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
5262 {
5263 /* If this insn P stores in either GOAL or VALUE, return 0.
5264 If GOAL is a memory ref and this insn writes memory, return 0.
5265 If GOAL is a memory ref and its address is not constant,
5266 and this insn P changes a register used in GOAL, return 0. */
5267
5268 pat = PATTERN (p);
5269 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
5270 {
5271 register rtx dest = SET_DEST (pat);
5272 while (GET_CODE (dest) == SUBREG
5273 || GET_CODE (dest) == ZERO_EXTRACT
5274 || GET_CODE (dest) == SIGN_EXTRACT
5275 || GET_CODE (dest) == STRICT_LOW_PART)
5276 dest = XEXP (dest, 0);
5277 if (GET_CODE (dest) == REG)
5278 {
5279 register int xregno = REGNO (dest);
5280 int xnregs;
5281 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5282 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5283 else
5284 xnregs = 1;
5285 if (xregno < regno + nregs && xregno + xnregs > regno)
5286 return 0;
5287 if (xregno < valueno + valuenregs
5288 && xregno + xnregs > valueno)
5289 return 0;
5290 if (goal_mem_addr_varies
bfa30b22 5291 && reg_overlap_mentioned_for_reload_p (dest, goal))
eab89b90
RK
5292 return 0;
5293 }
5294 else if (goal_mem && GET_CODE (dest) == MEM
5295 && ! push_operand (dest, GET_MODE (dest)))
5296 return 0;
5297 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
5298 return 0;
5299 }
5300 else if (GET_CODE (pat) == PARALLEL)
5301 {
5302 register int i;
5303 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
5304 {
5305 register rtx v1 = XVECEXP (pat, 0, i);
5306 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
5307 {
5308 register rtx dest = SET_DEST (v1);
5309 while (GET_CODE (dest) == SUBREG
5310 || GET_CODE (dest) == ZERO_EXTRACT
5311 || GET_CODE (dest) == SIGN_EXTRACT
5312 || GET_CODE (dest) == STRICT_LOW_PART)
5313 dest = XEXP (dest, 0);
5314 if (GET_CODE (dest) == REG)
5315 {
5316 register int xregno = REGNO (dest);
5317 int xnregs;
5318 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
5319 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
5320 else
5321 xnregs = 1;
5322 if (xregno < regno + nregs
5323 && xregno + xnregs > regno)
5324 return 0;
5325 if (xregno < valueno + valuenregs
5326 && xregno + xnregs > valueno)
5327 return 0;
5328 if (goal_mem_addr_varies
bfa30b22
RK
5329 && reg_overlap_mentioned_for_reload_p (dest,
5330 goal))
eab89b90
RK
5331 return 0;
5332 }
5333 else if (goal_mem && GET_CODE (dest) == MEM
5334 && ! push_operand (dest, GET_MODE (dest)))
5335 return 0;
5336 else if (need_stable_sp
5337 && push_operand (dest, GET_MODE (dest)))
5338 return 0;
5339 }
5340 }
5341 }
5342
5343#ifdef AUTO_INC_DEC
5344 /* If this insn auto-increments or auto-decrements
5345 either regno or valueno, return 0 now.
5346 If GOAL is a memory ref and its address is not constant,
5347 and this insn P increments a register used in GOAL, return 0. */
5348 {
5349 register rtx link;
5350
5351 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
5352 if (REG_NOTE_KIND (link) == REG_INC
5353 && GET_CODE (XEXP (link, 0)) == REG)
5354 {
5355 register int incno = REGNO (XEXP (link, 0));
5356 if (incno < regno + nregs && incno >= regno)
5357 return 0;
5358 if (incno < valueno + valuenregs && incno >= valueno)
5359 return 0;
5360 if (goal_mem_addr_varies
bfa30b22
RK
5361 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
5362 goal))
eab89b90
RK
5363 return 0;
5364 }
5365 }
5366#endif
5367 }
5368 }
5369}
5370\f
5371/* Find a place where INCED appears in an increment or decrement operator
5372 within X, and return the amount INCED is incremented or decremented by.
5373 The value is always positive. */
5374
5375static int
5376find_inc_amount (x, inced)
5377 rtx x, inced;
5378{
5379 register enum rtx_code code = GET_CODE (x);
5380 register char *fmt;
5381 register int i;
5382
5383 if (code == MEM)
5384 {
5385 register rtx addr = XEXP (x, 0);
5386 if ((GET_CODE (addr) == PRE_DEC
5387 || GET_CODE (addr) == POST_DEC
5388 || GET_CODE (addr) == PRE_INC
5389 || GET_CODE (addr) == POST_INC)
5390 && XEXP (addr, 0) == inced)
5391 return GET_MODE_SIZE (GET_MODE (x));
5392 }
5393
5394 fmt = GET_RTX_FORMAT (code);
5395 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5396 {
5397 if (fmt[i] == 'e')
5398 {
5399 register int tem = find_inc_amount (XEXP (x, i), inced);
5400 if (tem != 0)
5401 return tem;
5402 }
5403 if (fmt[i] == 'E')
5404 {
5405 register int j;
5406 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
5407 {
5408 register int tem = find_inc_amount (XVECEXP (x, i, j), inced);
5409 if (tem != 0)
5410 return tem;
5411 }
5412 }
5413 }
5414
5415 return 0;
5416}
5417\f
5418/* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5419
5420int
5421regno_clobbered_p (regno, insn)
5422 int regno;
5423 rtx insn;
5424{
5425 if (GET_CODE (PATTERN (insn)) == CLOBBER
5426 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
5427 return REGNO (XEXP (PATTERN (insn), 0)) == regno;
5428
5429 if (GET_CODE (PATTERN (insn)) == PARALLEL)
5430 {
5431 int i = XVECLEN (PATTERN (insn), 0) - 1;
5432
5433 for (; i >= 0; i--)
5434 {
5435 rtx elt = XVECEXP (PATTERN (insn), 0, i);
5436 if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG
5437 && REGNO (XEXP (elt, 0)) == regno)
5438 return 1;
5439 }
5440 }
5441
5442 return 0;
5443}
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