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c3bcc836 | 1 | /* Define per-register tables for data flow info and register allocation. |
39379e67 | 2 | Copyright (C) 1987, 1993, 1994, 1995, 1997 Free Software Foundation, Inc. |
c3bcc836 RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
c3bcc836 RK |
20 | |
21 | ||
22 | ||
23 | #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] | |
24 | ||
25 | /* Get the number of consecutive hard regs required to hold the REG rtx R. | |
26 | When something may be an explicit hard reg, REG_SIZE is the only | |
27 | valid way to get this value. You cannot get it from the regno. */ | |
28 | ||
29 | #define REG_SIZE(R) \ | |
30 | ((mode_size[(int) GET_MODE (R)] + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
31 | ||
31031edd JL |
32 | #ifndef SMALL_REGISTER_CLASSES |
33 | #define SMALL_REGISTER_CLASSES 0 | |
34 | #endif | |
35 | ||
c3bcc836 RK |
36 | /* Maximum register number used in this function, plus one. */ |
37 | ||
38 | extern int max_regno; | |
39 | ||
40 | /* Maximum number of SCRATCH rtx's in each block of this function. */ | |
41 | ||
42 | extern int max_scratch; | |
43 | ||
b1f21e0a MM |
44 | /* Register information indexed by register number */ |
45 | typedef struct reg_info_def { | |
46 | /* fields set by reg_scan */ | |
47 | int first_uid; /* UID of first insn to use (REG n) */ | |
48 | int last_uid; /* UID of last insn to use (REG n) */ | |
49 | int last_note_uid; /* UID of last note to use (REG n) */ | |
50 | ||
51 | /* fields set by both reg_scan and flow_analysis */ | |
52 | int sets; /* # of times (REG n) is set */ | |
53 | ||
54 | /* fields set by flow_analysis */ | |
55 | int refs; /* # of times (REG n) is used or set */ | |
56 | int deaths; /* # of times (REG n) dies */ | |
57 | int live_length; /* # of instructions (REG n) is live */ | |
58 | int calls_crossed; /* # of calls (REG n) is live across */ | |
59 | int basic_block; /* # of basic blocks (REG n) is used in */ | |
60 | char changes_size; /* whether (SUBREG (REG n)) changes size */ | |
61 | } reg_info; | |
62 | ||
63 | extern reg_info *reg_n_info; | |
64 | ||
a494747c MM |
65 | extern unsigned int reg_n_max; |
66 | ||
67 | /* Check for REG_N_xxx macros being in bound, return N for use as an | |
68 | index. */ | |
69 | #ifdef ENABLE_CHECKING | |
70 | #define REG_N_CHECK(N) \ | |
71 | ((((unsigned)(N) < (unsigned)reg_n_max) \ | |
72 | ? 0 : (fatal ("Register %d out of bounds", (N)), 0)), (N)) | |
73 | #else | |
74 | #define REG_N_CHECK(N) (N) | |
75 | #endif | |
76 | ||
c3bcc836 RK |
77 | /* Indexed by n, gives number of times (REG n) is used or set. |
78 | References within loops may be counted more times. */ | |
79 | ||
a494747c | 80 | #define REG_N_REFS(N) (reg_n_info[REG_N_CHECK (N)].refs) |
c3bcc836 | 81 | |
b1f21e0a MM |
82 | /* Indexed by n, gives number of times (REG n) is set. |
83 | ??? both regscan and flow allocate space for this. We should settle | |
84 | on just copy. */ | |
c3bcc836 | 85 | |
a494747c | 86 | #define REG_N_SETS(N) (reg_n_info[REG_N_CHECK (N)].sets) |
c3bcc836 RK |
87 | |
88 | /* Indexed by N, gives number of insns in which register N dies. | |
89 | Note that if register N is live around loops, it can die | |
90 | in transitions between basic blocks, and that is not counted here. | |
91 | So this is only a reliable indicator of how many regions of life there are | |
92 | for registers that are contained in one basic block. */ | |
93 | ||
a494747c | 94 | #define REG_N_DEATHS(N) (reg_n_info[REG_N_CHECK (N)].deaths) |
c3bcc836 | 95 | |
9faa82d8 | 96 | /* Indexed by N; says whether a pseudo register N was ever used |
ffceec83 RK |
97 | within a SUBREG that changes the size of the reg. Some machines prohibit |
98 | such objects to be in certain (usually floating-point) registers. */ | |
99 | ||
a494747c | 100 | #define REG_CHANGES_SIZE(N) (reg_n_info[REG_N_CHECK (N)].changes_size) |
ffceec83 | 101 | |
c3bcc836 RK |
102 | /* Get the number of consecutive words required to hold pseudo-reg N. */ |
103 | ||
104 | #define PSEUDO_REGNO_SIZE(N) \ | |
105 | ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ | |
106 | / UNITS_PER_WORD) | |
107 | ||
108 | /* Get the number of bytes required to hold pseudo-reg N. */ | |
109 | ||
110 | #define PSEUDO_REGNO_BYTES(N) \ | |
111 | GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) | |
112 | ||
113 | /* Get the machine mode of pseudo-reg N. */ | |
114 | ||
115 | #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) | |
116 | ||
117 | /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ | |
118 | ||
a494747c | 119 | #define REG_N_CALLS_CROSSED(N) (reg_n_info[REG_N_CHECK (N)].calls_crossed) |
c3bcc836 RK |
120 | |
121 | /* Total number of instructions at which (REG n) is live. | |
122 | The larger this is, the less priority (REG n) gets for | |
123 | allocation in a hard register (in global-alloc). | |
124 | This is set in flow.c and remains valid for the rest of the compilation | |
125 | of the function; it is used to control register allocation. | |
126 | ||
127 | local-alloc.c may alter this number to change the priority. | |
128 | ||
129 | Negative values are special. | |
130 | -1 is used to mark a pseudo reg which has a constant or memory equivalent | |
131 | and is used infrequently enough that it should not get a hard register. | |
132 | -2 is used to mark a pseudo reg for a parameter, when a frame pointer | |
cfb2c0b1 | 133 | is not required. global.c makes an allocno for this but does |
c3bcc836 RK |
134 | not try to assign a hard register to it. */ |
135 | ||
a494747c | 136 | #define REG_LIVE_LENGTH(N) (reg_n_info[REG_N_CHECK (N)].live_length) |
c3bcc836 RK |
137 | |
138 | /* Vector of substitutions of register numbers, | |
b1f21e0a MM |
139 | used to map pseudo regs into hardware regs. |
140 | ||
141 | This can't be folded into reg_n_info without changing all of the | |
142 | machine dependent directories, since the reload functions | |
39379e67 | 143 | in the machine dependent files access it. */ |
c3bcc836 RK |
144 | |
145 | extern short *reg_renumber; | |
146 | ||
147 | /* Vector indexed by hardware reg | |
148 | saying whether that reg is ever used. */ | |
149 | ||
150 | extern char regs_ever_live[FIRST_PSEUDO_REGISTER]; | |
151 | ||
152 | /* Vector indexed by hardware reg giving its name. */ | |
153 | ||
154 | extern char *reg_names[FIRST_PSEUDO_REGISTER]; | |
155 | ||
04569dfb DE |
156 | /* For each hard register, the widest mode object that it can contain. |
157 | This will be a MODE_INT mode if the register can hold integers. Otherwise | |
158 | it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the | |
159 | register. */ | |
160 | ||
161 | extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; | |
162 | ||
c3bcc836 RK |
163 | /* Vector indexed by regno; gives uid of first insn using that reg. |
164 | This is computed by reg_scan for use by cse and loop. | |
165 | It is sometimes adjusted for subsequent changes during loop, | |
166 | but not adjusted by cse even if cse invalidates it. */ | |
167 | ||
a494747c | 168 | #define REGNO_FIRST_UID(N) (reg_n_info[REG_N_CHECK (N)].first_uid) |
c3bcc836 RK |
169 | |
170 | /* Vector indexed by regno; gives uid of last insn using that reg. | |
171 | This is computed by reg_scan for use by cse and loop. | |
172 | It is sometimes adjusted for subsequent changes during loop, | |
173 | but not adjusted by cse even if cse invalidates it. | |
174 | This is harmless since cse won't scan through a loop end. */ | |
175 | ||
a494747c | 176 | #define REGNO_LAST_UID(N) (reg_n_info[REG_N_CHECK (N)].last_uid) |
c3bcc836 | 177 | |
2cb547d8 RS |
178 | /* Similar, but includes insns that mention the reg in their notes. */ |
179 | ||
a494747c | 180 | #define REGNO_LAST_NOTE_UID(N) (reg_n_info[REG_N_CHECK (N)].last_note_uid) |
2cb547d8 | 181 | |
40f954f6 RK |
182 | /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. |
183 | After rtl generation, it is 1 plus the largest register number used. */ | |
184 | ||
185 | extern int reg_rtx_no; | |
186 | ||
c3bcc836 RK |
187 | /* Vector indexed by regno; contains 1 for a register is considered a pointer. |
188 | Reloading, etc. will use a pointer register rather than a non-pointer | |
189 | as the base register in an address, when there is a choice of two regs. */ | |
190 | ||
191 | extern char *regno_pointer_flag; | |
192 | #define REGNO_POINTER_FLAG(REGNO) regno_pointer_flag[REGNO] | |
40f954f6 RK |
193 | extern int regno_pointer_flag_length; |
194 | ||
c3bcc836 RK |
195 | /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers |
196 | that have to go in the same hard reg. */ | |
197 | extern rtx regs_may_share; | |
198 | ||
199 | /* Vector mapping pseudo regno into the REG rtx for that register. | |
200 | This is computed by reg_scan. */ | |
201 | ||
202 | extern rtx *regno_reg_rtx; | |
203 | ||
204 | /* Flag set by local-alloc or global-alloc if they decide to allocate | |
205 | something in a call-clobbered register. */ | |
206 | ||
207 | extern int caller_save_needed; | |
208 | ||
209 | /* Predicate to decide whether to give a hard reg to a pseudo which | |
210 | is referenced REFS times and would need to be saved and restored | |
211 | around a call CALLS times. */ | |
212 | ||
213 | #ifndef CALLER_SAVE_PROFITABLE | |
214 | #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) | |
215 | #endif | |
a65b6597 | 216 | |
6cad67d2 JL |
217 | /* On most machines a register class is likely to be spilled if it |
218 | only has one register. */ | |
219 | #ifndef CLASS_LIKELY_SPILLED_P | |
220 | #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1) | |
221 | #endif | |
222 | ||
a65b6597 RK |
223 | /* Allocated in local_alloc. */ |
224 | ||
225 | /* A list of SCRATCH rtl allocated by local-alloc. */ | |
226 | extern rtx *scratch_list; | |
227 | /* The basic block in which each SCRATCH is used. */ | |
228 | extern int *scratch_block; | |
229 | /* The length of the arrays pointed to by scratch_block and scratch_list. */ | |
230 | extern int scratch_list_length; | |
b1f21e0a MM |
231 | |
232 | /* Allocate reg_n_info tables */ | |
39379e67 | 233 | extern void allocate_reg_info PROTO((int, int, int)); |