[gcc.git] / gcc / regs.h

/* Define per-register tables for data flow info and register allocation.
   Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
   1999, 2000, 2003, 2004 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under
the terms of the GNU General Public License as published by the Free
Software Foundation; either version 2, or (at your option) any later
version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY
WARRANTY; without even the implied warranty of MERCHANTABILITY or
FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING.  If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA.  */

#ifndef GCC_REGS_H
#define GCC_REGS_H

#include "varray.h"
#include "hard-reg-set.h"
#include "basic-block.h"

#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]

/* When you only have the mode of a pseudo register before it has a hard
   register chosen for it, this reports the size of each hard register
   a pseudo in such a mode would get allocated to.  A target may
   override this.  */

#ifndef REGMODE_NATURAL_SIZE
#define REGMODE_NATURAL_SIZE(MODE)	UNITS_PER_WORD
#endif

#ifndef SMALL_REGISTER_CLASSES
#define SMALL_REGISTER_CLASSES 0
#endif

/* Maximum register number used in this function, plus one.  */

extern int max_regno;

/* Register information indexed by register number */
typedef struct reg_info_def
{				/* fields set by reg_scan */
  int first_uid;		/* UID of first insn to use (REG n) */
  int last_uid;			/* UID of last insn to use (REG n) */
  int last_note_uid;		/* UID of last note to use (REG n) */

				/* fields set by reg_scan & flow_analysis */
  int sets;			/* # of times (REG n) is set */

				/* fields set by flow_analysis */
  int refs;			/* # of times (REG n) is used or set */
  int freq;			/* # estimated frequency (REG n) is used or set */
  int deaths;			/* # of times (REG n) dies */
  int live_length;		/* # of instructions (REG n) is live */
  int calls_crossed;		/* # of calls (REG n) is live across */
  int basic_block;		/* # of basic blocks (REG n) is used in */
  char changes_mode;		/* whether (SUBREG (REG n)) exists and
				   is illegal.  */
} reg_info;

extern varray_type reg_n_info;

extern bitmap_head subregs_of_mode;

/* Indexed by n, gives number of times (REG n) is used or set.  */

#define REG_N_REFS(N) (VARRAY_REG (reg_n_info, N)->refs)

/* Estimate frequency of references to register N.  */

#define REG_FREQ(N) (VARRAY_REG (reg_n_info, N)->freq)

/* The weights for each insn varries from 0 to REG_FREQ_BASE.
   This constant does not need to be high, as in infrequently executed
   regions we want to count instructions equivalently to optimize for
   size instead of speed.  */
#define REG_FREQ_MAX 1000

/* Compute register frequency from the BB frequency.  When optimizing for size,
   or profile driven feedback is available and the function is never executed,
   frequency is always equivalent.  Otherwise rescale the basic block
   frequency.  */
#define REG_FREQ_FROM_BB(bb) (optimize_size				      \
			      || (flag_branch_probabilities		      \
				  && !ENTRY_BLOCK_PTR->count)		      \
			      ? REG_FREQ_MAX				      \
			      : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
			      : 1)

/* Indexed by n, gives number of times (REG n) is set.
   ??? both regscan and flow allocate space for this.  We should settle
   on just copy.  */

#define REG_N_SETS(N) (VARRAY_REG (reg_n_info, N)->sets)

/* Indexed by N, gives number of insns in which register N dies.
   Note that if register N is live around loops, it can die
   in transitions between basic blocks, and that is not counted here.
   So this is only a reliable indicator of how many regions of life there are
   for registers that are contained in one basic block.  */

#define REG_N_DEATHS(N) (VARRAY_REG (reg_n_info, N)->deaths)

/* Get the number of consecutive words required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_SIZE(N) \
  ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1)		\
   / UNITS_PER_WORD)

/* Get the number of bytes required to hold pseudo-reg N.  */

#define PSEUDO_REGNO_BYTES(N) \
  GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))

/* Get the machine mode of pseudo-reg N.  */

#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])

/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live.  */

#define REG_N_CALLS_CROSSED(N) (VARRAY_REG (reg_n_info, N)->calls_crossed)

/* Total number of instructions at which (REG n) is live.
   The larger this is, the less priority (REG n) gets for
   allocation in a hard register (in global-alloc).
   This is set in flow.c and remains valid for the rest of the compilation
   of the function; it is used to control register allocation.

   local-alloc.c may alter this number to change the priority.

   Negative values are special.
   -1 is used to mark a pseudo reg which has a constant or memory equivalent
   and is used infrequently enough that it should not get a hard register.
   -2 is used to mark a pseudo reg for a parameter, when a frame pointer
   is not required.  global.c makes an allocno for this but does
   not try to assign a hard register to it.  */

#define REG_LIVE_LENGTH(N) (VARRAY_REG (reg_n_info, N)->live_length)

/* Vector of substitutions of register numbers,
   used to map pseudo regs into hardware regs.

   This can't be folded into reg_n_info without changing all of the
   machine dependent directories, since the reload functions
   in the machine dependent files access it.  */

extern short *reg_renumber;

/* Vector indexed by hardware reg saying whether that reg is ever used.  */

extern char regs_ever_live[FIRST_PSEUDO_REGISTER];

/* Like regs_ever_live, but saying whether reg is set by asm statements.  */

extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];

/* Vector indexed by machine mode saying whether there are regs of that mode.  */

extern bool have_regs_of_mode [MAX_MACHINE_MODE];

/* For each hard register, the widest mode object that it can contain.
   This will be a MODE_INT mode if the register can hold integers.  Otherwise
   it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
   register.  */

extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];

/* Vector indexed by regno; gives uid of first insn using that reg.
   This is computed by reg_scan for use by cse and loop.
   It is sometimes adjusted for subsequent changes during loop,
   but not adjusted by cse even if cse invalidates it.  */

#define REGNO_FIRST_UID(N) (VARRAY_REG (reg_n_info, N)->first_uid)

/* Vector indexed by regno; gives uid of last insn using that reg.
   This is computed by reg_scan for use by cse and loop.
   It is sometimes adjusted for subsequent changes during loop,
   but not adjusted by cse even if cse invalidates it.
   This is harmless since cse won't scan through a loop end.  */

#define REGNO_LAST_UID(N) (VARRAY_REG (reg_n_info, N)->last_uid)

/* Similar, but includes insns that mention the reg in their notes.  */

#define REGNO_LAST_NOTE_UID(N) (VARRAY_REG (reg_n_info, N)->last_note_uid)

/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
   that have to go in the same hard reg.  */
extern rtx regs_may_share;

/* Flag set by local-alloc or global-alloc if they decide to allocate
   something in a call-clobbered register.  */

extern int caller_save_needed;

/* Predicate to decide whether to give a hard reg to a pseudo which
   is referenced REFS times and would need to be saved and restored
   around a call CALLS times.  */

#ifndef CALLER_SAVE_PROFITABLE
#define CALLER_SAVE_PROFITABLE(REFS, CALLS)  (4 * (CALLS) < (REFS))
#endif

/* On most machines a register class is likely to be spilled if it
   only has one register.  */
#ifndef CLASS_LIKELY_SPILLED_P
#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
#endif

/* Select a register mode required for caller save of hard regno REGNO.  */
#ifndef HARD_REGNO_CALLER_SAVE_MODE
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
  choose_hard_reg_mode (REGNO, NREGS, false)
#endif

/* Registers that get partially clobbered by a call in a given mode.
   These must not be call used registers.  */
#ifndef HARD_REGNO_CALL_PART_CLOBBERED
#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
#endif

/* Allocate reg_n_info tables */
extern void allocate_reg_info (size_t, int, int);

/* Specify number of hard registers given machine mode occupy.  */
extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];

#endif /* GCC_REGS_H */
Commit	Line	Data
c3bcc836	1	/* Define per-register tables for data flow info and register allocation.
af841dbd	2	Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
e146f815	3	1999, 2000, 2003, 2004 Free Software Foundation, Inc.
c3bcc836	4
1322177d	5	This file is part of GCC.
c3bcc836	6
1322177d LB	7	GCC is free software; you can redistribute it and/or modify it under
	8	the terms of the GNU General Public License as published by the Free
	9	Software Foundation; either version 2, or (at your option) any later
	10	version.
c3bcc836	11
1322177d LB	12	GCC is distributed in the hope that it will be useful, but WITHOUT ANY
	13	WARRANTY; without even the implied warranty of MERCHANTABILITY or
	14	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	15	for more details.
c3bcc836 RK	16
c3bcc836 RK	17	You should have received a copy of the GNU General Public License
1322177d LB	18	along with GCC; see the file COPYING. If not, write to the Free
	19	Software Foundation, 59 Temple Place - Suite 330, Boston, MA
	20	02111-1307, USA. */
c3bcc836	21
6de9cd9a DN	22	#ifndef GCC_REGS_H
6de9cd9a DN	23	#define GCC_REGS_H
c3bcc836	24
6feacd09	25	#include "varray.h"
cff9f8d5 AH	26	#include "hard-reg-set.h"
cff9f8d5 AH	27	#include "basic-block.h"
c3bcc836 RK	28
	29	#define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
	30
ddef6bc7 JJ	31	/* When you only have the mode of a pseudo register before it has a hard
ddef6bc7 JJ	32	register chosen for it, this reports the size of each hard register
ec8e621d KG	33	a pseudo in such a mode would get allocated to. A target may
ec8e621d KG	34	override this. */
ddef6bc7 JJ	35
	36	#ifndef REGMODE_NATURAL_SIZE
	37	#define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
	38	#endif
c3bcc836	39
31031edd JL	40	#ifndef SMALL_REGISTER_CLASSES
	41	#define SMALL_REGISTER_CLASSES 0
	42	#endif
	43
c3bcc836 RK	44	/* Maximum register number used in this function, plus one. */
	45
	46	extern int max_regno;
	47
b1f21e0a	48	/* Register information indexed by register number */
d4b60170 RK	49	typedef struct reg_info_def
d4b60170 RK	50	{ /* fields set by reg_scan */
b1f21e0a MM	51	int first_uid; /* UID of first insn to use (REG n) */
	52	int last_uid; /* UID of last insn to use (REG n) */
	53	int last_note_uid; /* UID of last note to use (REG n) */
	54
d4b60170	55	/* fields set by reg_scan & flow_analysis */
b1f21e0a MM	56	int sets; /* # of times (REG n) is set */
	57
	58	/* fields set by flow_analysis */
	59	int refs; /* # of times (REG n) is used or set */
b2aec5c0	60	int freq; /* # estimated frequency (REG n) is used or set */
b1f21e0a MM	61	int deaths; /* # of times (REG n) dies */
	62	int live_length; /* # of instructions (REG n) is live */
	63	int calls_crossed; /* # of calls (REG n) is live across */
	64	int basic_block; /* # of basic blocks (REG n) is used in */
0c20a65f	65	char changes_mode; /* whether (SUBREG (REG n)) exists and
02188693	66	is illegal. */
b1f21e0a MM	67	} reg_info;
b1f21e0a MM	68
6feacd09	69	extern varray_type reg_n_info;
b1f21e0a	70
10a3fdd9	71	extern bitmap_head subregs_of_mode;
cff9f8d5	72
b2aec5c0	73	/* Indexed by n, gives number of times (REG n) is used or set. */
c3bcc836	74
6feacd09	75	#define REG_N_REFS(N) (VARRAY_REG (reg_n_info, N)->refs)
c3bcc836	76
b2aec5c0 JH	77	/* Estimate frequency of references to register N. */
	78
	79	#define REG_FREQ(N) (VARRAY_REG (reg_n_info, N)->freq)
	80
0c20a65f	81	/* The weights for each insn varries from 0 to REG_FREQ_BASE.
a08b2604 JH	82	This constant does not need to be high, as in infrequently executed
	83	regions we want to count instructions equivalently to optimize for
	84	size instead of speed. */
	85	#define REG_FREQ_MAX 1000
	86
	87	/* Compute register frequency from the BB frequency. When optimizing for size,
	88	or profile driven feedback is available and the function is never executed,
	89	frequency is always equivalent. Otherwise rescale the basic block
	90	frequency. */
	91	#define REG_FREQ_FROM_BB(bb) (optimize_size \
	92	\|\| (flag_branch_probabilities \
	93	&& !ENTRY_BLOCK_PTR->count) \
	94	? REG_FREQ_MAX \
	95	: ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	96	? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
	97	: 1)
	98
b1f21e0a MM	99	/* Indexed by n, gives number of times (REG n) is set.
	100	??? both regscan and flow allocate space for this. We should settle
	101	on just copy. */
c3bcc836	102
6feacd09	103	#define REG_N_SETS(N) (VARRAY_REG (reg_n_info, N)->sets)
c3bcc836 RK	104
	105	/* Indexed by N, gives number of insns in which register N dies.
	106	Note that if register N is live around loops, it can die
	107	in transitions between basic blocks, and that is not counted here.
	108	So this is only a reliable indicator of how many regions of life there are
	109	for registers that are contained in one basic block. */
	110
6feacd09	111	#define REG_N_DEATHS(N) (VARRAY_REG (reg_n_info, N)->deaths)
c3bcc836 RK	112
	113	/* Get the number of consecutive words required to hold pseudo-reg N. */
	114
	115	#define PSEUDO_REGNO_SIZE(N) \
	116	((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
	117	/ UNITS_PER_WORD)
	118
	119	/* Get the number of bytes required to hold pseudo-reg N. */
	120
	121	#define PSEUDO_REGNO_BYTES(N) \
	122	GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
	123
	124	/* Get the machine mode of pseudo-reg N. */
	125
	126	#define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
	127
	128	/* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
	129
6feacd09	130	#define REG_N_CALLS_CROSSED(N) (VARRAY_REG (reg_n_info, N)->calls_crossed)
c3bcc836 RK	131
	132	/* Total number of instructions at which (REG n) is live.
	133	The larger this is, the less priority (REG n) gets for
	134	allocation in a hard register (in global-alloc).
	135	This is set in flow.c and remains valid for the rest of the compilation
	136	of the function; it is used to control register allocation.
	137
	138	local-alloc.c may alter this number to change the priority.
	139
	140	Negative values are special.
	141	-1 is used to mark a pseudo reg which has a constant or memory equivalent
	142	and is used infrequently enough that it should not get a hard register.
	143	-2 is used to mark a pseudo reg for a parameter, when a frame pointer
cfb2c0b1	144	is not required. global.c makes an allocno for this but does
c3bcc836 RK	145	not try to assign a hard register to it. */
c3bcc836 RK	146
6feacd09	147	#define REG_LIVE_LENGTH(N) (VARRAY_REG (reg_n_info, N)->live_length)
c3bcc836 RK	148
c3bcc836 RK	149	/* Vector of substitutions of register numbers,
b1f21e0a MM	150	used to map pseudo regs into hardware regs.
	151
	152	This can't be folded into reg_n_info without changing all of the
	153	machine dependent directories, since the reload functions
39379e67	154	in the machine dependent files access it. */
c3bcc836 RK	155
	156	extern short *reg_renumber;
	157
df2ef49b	158	/* Vector indexed by hardware reg saying whether that reg is ever used. */
c3bcc836 RK	159
	160	extern char regs_ever_live[FIRST_PSEUDO_REGISTER];
	161
df2ef49b AM	162	/* Like regs_ever_live, but saying whether reg is set by asm statements. */
	163
	164	extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
	165
26277d41 PB	166	/* Vector indexed by machine mode saying whether there are regs of that mode. */
	167
	168	extern bool have_regs_of_mode [MAX_MACHINE_MODE];
	169
04569dfb DE	170	/* For each hard register, the widest mode object that it can contain.
	171	This will be a MODE_INT mode if the register can hold integers. Otherwise
	172	it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
	173	register. */
	174
	175	extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
	176
c3bcc836 RK	177	/* Vector indexed by regno; gives uid of first insn using that reg.
	178	This is computed by reg_scan for use by cse and loop.
	179	It is sometimes adjusted for subsequent changes during loop,
	180	but not adjusted by cse even if cse invalidates it. */
	181
6feacd09	182	#define REGNO_FIRST_UID(N) (VARRAY_REG (reg_n_info, N)->first_uid)
c3bcc836 RK	183
	184	/* Vector indexed by regno; gives uid of last insn using that reg.
	185	This is computed by reg_scan for use by cse and loop.
	186	It is sometimes adjusted for subsequent changes during loop,
	187	but not adjusted by cse even if cse invalidates it.
	188	This is harmless since cse won't scan through a loop end. */
	189
6feacd09	190	#define REGNO_LAST_UID(N) (VARRAY_REG (reg_n_info, N)->last_uid)
c3bcc836	191
2cb547d8 RS	192	/* Similar, but includes insns that mention the reg in their notes. */
2cb547d8 RS	193
6feacd09	194	#define REGNO_LAST_NOTE_UID(N) (VARRAY_REG (reg_n_info, N)->last_note_uid)
2cb547d8	195
c3bcc836 RK	196	/* List made of EXPR_LIST rtx's which gives pairs of pseudo registers
	197	that have to go in the same hard reg. */
	198	extern rtx regs_may_share;
	199
c3bcc836 RK	200	/* Flag set by local-alloc or global-alloc if they decide to allocate
	201	something in a call-clobbered register. */
	202
	203	extern int caller_save_needed;
	204
	205	/* Predicate to decide whether to give a hard reg to a pseudo which
	206	is referenced REFS times and would need to be saved and restored
	207	around a call CALLS times. */
	208
	209	#ifndef CALLER_SAVE_PROFITABLE
	210	#define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
	211	#endif
a65b6597	212
6cad67d2 JL	213	/* On most machines a register class is likely to be spilled if it
	214	only has one register. */
	215	#ifndef CLASS_LIKELY_SPILLED_P
	216	#define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1)
	217	#endif
	218
8d5c8167 JL	219	/* Select a register mode required for caller save of hard regno REGNO. */
8d5c8167 JL	220	#ifndef HARD_REGNO_CALLER_SAVE_MODE
787dc842	221	#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
fee226d2	222	choose_hard_reg_mode (REGNO, NREGS, false)
8d5c8167 JL	223	#endif
8d5c8167 JL	224
0c20a65f	225	/* Registers that get partially clobbered by a call in a given mode.
1e326708 MH	226	These must not be call used registers. */
	227	#ifndef HARD_REGNO_CALL_PART_CLOBBERED
	228	#define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
	229	#endif
	230
b1f21e0a	231	/* Allocate reg_n_info tables */
0c20a65f	232	extern void allocate_reg_info (size_t, int, int);
66fd46b6 JH	233
	234	/* Specify number of hard registers given machine mode occupy. */
	235	extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
6de9cd9a DN	236
6de9cd9a DN	237	#endif /* GCC_REGS_H */