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Commit | Line | Data |
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7b82b5da | 1 | /* Register renaming for the GNU compiler. |
684bcee5 | 2 | Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
7b82b5da | 3 | |
1322177d | 4 | This file is part of GCC. |
7b82b5da | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
7b82b5da SC |
8 | the Free Software Foundation; either version 2, or (at your option) |
9 | any later version. | |
10 | ||
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
7b82b5da SC |
15 | |
16 | You should have received a copy of the GNU General Public License | |
1322177d LB |
17 | along with GCC; see the file COPYING. If not, write to the Free |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
7b82b5da SC |
20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
4977bab6 ZW |
23 | #include "coretypes.h" |
24 | #include "tm.h" | |
7b82b5da | 25 | #include "rtl.h" |
541f7d56 | 26 | #include "tm_p.h" |
7b82b5da SC |
27 | #include "insn-config.h" |
28 | #include "regs.h" | |
541f7d56 BS |
29 | #include "hard-reg-set.h" |
30 | #include "basic-block.h" | |
31 | #include "reload.h" | |
7b82b5da SC |
32 | #include "output.h" |
33 | #include "function.h" | |
34 | #include "recog.h" | |
541f7d56 | 35 | #include "flags.h" |
8582c27b | 36 | #include "toplev.h" |
541f7d56 BS |
37 | #include "obstack.h" |
38 | ||
7b82b5da SC |
39 | static const char *const reg_class_names[] = REG_CLASS_NAMES; |
40 | ||
541f7d56 | 41 | struct du_chain |
7b82b5da | 42 | { |
541f7d56 BS |
43 | struct du_chain *next_chain; |
44 | struct du_chain *next_use; | |
7b82b5da | 45 | |
541f7d56 BS |
46 | rtx insn; |
47 | rtx *loc; | |
e3a64162 | 48 | ENUM_BITFIELD(reg_class) cl : 16; |
541f7d56 | 49 | unsigned int need_caller_save_reg:1; |
fe08a886 | 50 | unsigned int earlyclobber:1; |
541f7d56 | 51 | }; |
7b82b5da | 52 | |
541f7d56 BS |
53 | enum scan_actions |
54 | { | |
541f7d56 BS |
55 | terminate_all_read, |
56 | terminate_overlapping_read, | |
57 | terminate_write, | |
58 | terminate_dead, | |
59 | mark_read, | |
60 | mark_write | |
61 | }; | |
62 | ||
63 | static const char * const scan_actions_name[] = | |
64 | { | |
541f7d56 BS |
65 | "terminate_all_read", |
66 | "terminate_overlapping_read", | |
67 | "terminate_write", | |
68 | "terminate_dead", | |
69 | "mark_read", | |
70 | "mark_write" | |
71 | }; | |
72 | ||
73 | static struct obstack rename_obstack; | |
74 | ||
0c20a65f AJ |
75 | static void do_replace (struct du_chain *, int); |
76 | static void scan_rtx_reg (rtx, rtx *, enum reg_class, | |
77 | enum scan_actions, enum op_type, int); | |
78 | static void scan_rtx_address (rtx, rtx *, enum reg_class, | |
79 | enum scan_actions, enum machine_mode); | |
80 | static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, | |
81 | enum op_type, int); | |
82 | static struct du_chain *build_def_use (basic_block); | |
83 | static void dump_def_use_chain (struct du_chain *); | |
84 | static void note_sets (rtx, rtx, void *); | |
85 | static void clear_dead_regs (HARD_REG_SET *, enum machine_mode, rtx); | |
86 | static void merge_overlapping_regs (basic_block, HARD_REG_SET *, | |
87 | struct du_chain *); | |
fe08a886 BS |
88 | |
89 | /* Called through note_stores from update_life. Find sets of registers, and | |
90 | record them in *DATA (which is actually a HARD_REG_SET *). */ | |
91 | ||
92 | static void | |
0c20a65f | 93 | note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data) |
fe08a886 BS |
94 | { |
95 | HARD_REG_SET *pset = (HARD_REG_SET *) data; | |
96 | unsigned int regno; | |
97 | int nregs; | |
f8cfc6aa | 98 | if (!REG_P (x)) |
fe08a886 BS |
99 | return; |
100 | regno = REGNO (x); | |
66fd46b6 | 101 | nregs = hard_regno_nregs[regno][GET_MODE (x)]; |
3d17d93d AO |
102 | |
103 | /* There must not be pseudos at this point. */ | |
41374e13 | 104 | gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); |
3d17d93d | 105 | |
fe08a886 BS |
106 | while (nregs-- > 0) |
107 | SET_HARD_REG_BIT (*pset, regno + nregs); | |
108 | } | |
109 | ||
110 | /* Clear all registers from *PSET for which a note of kind KIND can be found | |
111 | in the list NOTES. */ | |
112 | ||
113 | static void | |
0c20a65f | 114 | clear_dead_regs (HARD_REG_SET *pset, enum machine_mode kind, rtx notes) |
fe08a886 BS |
115 | { |
116 | rtx note; | |
117 | for (note = notes; note; note = XEXP (note, 1)) | |
118 | if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0))) | |
119 | { | |
120 | rtx reg = XEXP (note, 0); | |
121 | unsigned int regno = REGNO (reg); | |
66fd46b6 | 122 | int nregs = hard_regno_nregs[regno][GET_MODE (reg)]; |
3d17d93d AO |
123 | |
124 | /* There must not be pseudos at this point. */ | |
41374e13 | 125 | gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); |
3d17d93d | 126 | |
fe08a886 BS |
127 | while (nregs-- > 0) |
128 | CLEAR_HARD_REG_BIT (*pset, regno + nregs); | |
129 | } | |
130 | } | |
131 | ||
132 | /* For a def-use chain CHAIN in basic block B, find which registers overlap | |
133 | its lifetime and set the corresponding bits in *PSET. */ | |
134 | ||
135 | static void | |
0c20a65f AJ |
136 | merge_overlapping_regs (basic_block b, HARD_REG_SET *pset, |
137 | struct du_chain *chain) | |
fe08a886 BS |
138 | { |
139 | struct du_chain *t = chain; | |
140 | rtx insn; | |
141 | HARD_REG_SET live; | |
142 | ||
143 | REG_SET_TO_HARD_REG_SET (live, b->global_live_at_start); | |
a813c111 | 144 | insn = BB_HEAD (b); |
fe08a886 BS |
145 | while (t) |
146 | { | |
147 | /* Search forward until the next reference to the register to be | |
148 | renamed. */ | |
149 | while (insn != t->insn) | |
150 | { | |
151 | if (INSN_P (insn)) | |
152 | { | |
153 | clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn)); | |
154 | note_stores (PATTERN (insn), note_sets, (void *) &live); | |
155 | /* Only record currently live regs if we are inside the | |
156 | reg's live range. */ | |
157 | if (t != chain) | |
158 | IOR_HARD_REG_SET (*pset, live); | |
3b03c671 | 159 | clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn)); |
fe08a886 BS |
160 | } |
161 | insn = NEXT_INSN (insn); | |
162 | } | |
163 | ||
164 | IOR_HARD_REG_SET (*pset, live); | |
165 | ||
166 | /* For the last reference, also merge in all registers set in the | |
167 | same insn. | |
168 | @@@ We only have take earlyclobbered sets into account. */ | |
169 | if (! t->next_use) | |
170 | note_stores (PATTERN (insn), note_sets, (void *) pset); | |
171 | ||
172 | t = t->next_use; | |
173 | } | |
174 | } | |
175 | ||
176 | /* Perform register renaming on the current function. */ | |
7b82b5da | 177 | |
541f7d56 | 178 | void |
0c20a65f | 179 | regrename_optimize (void) |
541f7d56 | 180 | { |
fe08a886 BS |
181 | int tick[FIRST_PSEUDO_REGISTER]; |
182 | int this_tick = 0; | |
e0082a72 | 183 | basic_block bb; |
541f7d56 | 184 | char *first_obj; |
7b82b5da | 185 | |
fe08a886 BS |
186 | memset (tick, 0, sizeof tick); |
187 | ||
541f7d56 | 188 | gcc_obstack_init (&rename_obstack); |
703ad42b | 189 | first_obj = obstack_alloc (&rename_obstack, 0); |
7b82b5da | 190 | |
e0082a72 | 191 | FOR_EACH_BB (bb) |
541f7d56 | 192 | { |
541f7d56 | 193 | struct du_chain *all_chains = 0; |
541f7d56 BS |
194 | HARD_REG_SET unavailable; |
195 | HARD_REG_SET regs_seen; | |
7b82b5da | 196 | |
541f7d56 | 197 | CLEAR_HARD_REG_SET (unavailable); |
7b82b5da | 198 | |
c263766c RH |
199 | if (dump_file) |
200 | fprintf (dump_file, "\nBasic block %d:\n", bb->index); | |
7b82b5da | 201 | |
fe08a886 | 202 | all_chains = build_def_use (bb); |
7b82b5da | 203 | |
c263766c | 204 | if (dump_file) |
541f7d56 | 205 | dump_def_use_chain (all_chains); |
7b82b5da | 206 | |
fe08a886 | 207 | CLEAR_HARD_REG_SET (unavailable); |
541f7d56 BS |
208 | /* Don't clobber traceback for noreturn functions. */ |
209 | if (frame_pointer_needed) | |
210 | { | |
65599eb4 | 211 | int i; |
3b03c671 | 212 | |
66fd46b6 | 213 | for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;) |
65599eb4 | 214 | SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i); |
3b03c671 | 215 | |
541f7d56 | 216 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
66fd46b6 | 217 | for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;) |
65599eb4 | 218 | SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i); |
541f7d56 BS |
219 | #endif |
220 | } | |
7b82b5da | 221 | |
541f7d56 BS |
222 | CLEAR_HARD_REG_SET (regs_seen); |
223 | while (all_chains) | |
224 | { | |
62551c66 | 225 | int new_reg, best_new_reg; |
541f7d56 BS |
226 | int n_uses; |
227 | struct du_chain *this = all_chains; | |
228 | struct du_chain *tmp, *last; | |
229 | HARD_REG_SET this_unavailable; | |
4e812700 | 230 | int reg = REGNO (*this->loc); |
85941a0a | 231 | int i; |
7b82b5da | 232 | |
541f7d56 | 233 | all_chains = this->next_chain; |
3b03c671 | 234 | |
62551c66 JH |
235 | best_new_reg = reg; |
236 | ||
fe08a886 | 237 | #if 0 /* This just disables optimization opportunities. */ |
541f7d56 BS |
238 | /* Only rename once we've seen the reg more than once. */ |
239 | if (! TEST_HARD_REG_BIT (regs_seen, reg)) | |
1a43c33f | 240 | { |
541f7d56 BS |
241 | SET_HARD_REG_BIT (regs_seen, reg); |
242 | continue; | |
243 | } | |
fe08a886 | 244 | #endif |
1a43c33f | 245 | |
f4d578da BS |
246 | if (fixed_regs[reg] || global_regs[reg] |
247 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
248 | || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) | |
249 | #else | |
250 | || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) | |
251 | #endif | |
252 | ) | |
541f7d56 | 253 | continue; |
1a43c33f | 254 | |
541f7d56 | 255 | COPY_HARD_REG_SET (this_unavailable, unavailable); |
1a43c33f | 256 | |
541f7d56 BS |
257 | /* Find last entry on chain (which has the need_caller_save bit), |
258 | count number of uses, and narrow the set of registers we can | |
259 | use for renaming. */ | |
260 | n_uses = 0; | |
261 | for (last = this; last->next_use; last = last->next_use) | |
262 | { | |
263 | n_uses++; | |
264 | IOR_COMPL_HARD_REG_SET (this_unavailable, | |
e3a64162 | 265 | reg_class_contents[last->cl]); |
1a43c33f | 266 | } |
541f7d56 BS |
267 | if (n_uses < 1) |
268 | continue; | |
7b82b5da | 269 | |
541f7d56 | 270 | IOR_COMPL_HARD_REG_SET (this_unavailable, |
e3a64162 | 271 | reg_class_contents[last->cl]); |
7b82b5da | 272 | |
fe08a886 | 273 | if (this->need_caller_save_reg) |
541f7d56 BS |
274 | IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); |
275 | ||
fe08a886 BS |
276 | merge_overlapping_regs (bb, &this_unavailable, this); |
277 | ||
541f7d56 BS |
278 | /* Now potential_regs is a reasonable approximation, let's |
279 | have a closer look at each register still in there. */ | |
4e812700 | 280 | for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) |
1a43c33f | 281 | { |
66fd46b6 | 282 | int nregs = hard_regno_nregs[new_reg][GET_MODE (*this->loc)]; |
4e812700 | 283 | |
85941a0a | 284 | for (i = nregs - 1; i >= 0; --i) |
fe08a886 BS |
285 | if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) |
286 | || fixed_regs[new_reg + i] | |
287 | || global_regs[new_reg + i] | |
85941a0a | 288 | /* Can't use regs which aren't saved by the prologue. */ |
fe08a886 BS |
289 | || (! regs_ever_live[new_reg + i] |
290 | && ! call_used_regs[new_reg + i]) | |
b2a8b026 | 291 | #ifdef LEAF_REGISTERS |
3b03c671 | 292 | /* We can't use a non-leaf register if we're in a |
b2a8b026 | 293 | leaf function. */ |
3b03c671 | 294 | || (current_function_is_leaf |
b2a8b026 MM |
295 | && !LEAF_REGISTERS[new_reg + i]) |
296 | #endif | |
541f7d56 | 297 | #ifdef HARD_REGNO_RENAME_OK |
fe08a886 | 298 | || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) |
541f7d56 | 299 | #endif |
85941a0a RH |
300 | ) |
301 | break; | |
302 | if (i >= 0) | |
541f7d56 | 303 | continue; |
1a43c33f | 304 | |
85941a0a RH |
305 | /* See whether it accepts all modes that occur in |
306 | definition and uses. */ | |
541f7d56 | 307 | for (tmp = this; tmp; tmp = tmp->next_use) |
66df7a98 AO |
308 | if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) |
309 | || (tmp->need_caller_save_reg | |
310 | && ! (HARD_REGNO_CALL_PART_CLOBBERED | |
311 | (reg, GET_MODE (*tmp->loc))) | |
312 | && (HARD_REGNO_CALL_PART_CLOBBERED | |
313 | (new_reg, GET_MODE (*tmp->loc))))) | |
541f7d56 BS |
314 | break; |
315 | if (! tmp) | |
fe08a886 | 316 | { |
62551c66 | 317 | if (tick[best_new_reg] > tick[new_reg]) |
fe08a886 BS |
318 | best_new_reg = new_reg; |
319 | } | |
1a43c33f | 320 | } |
7b82b5da | 321 | |
c263766c | 322 | if (dump_file) |
541f7d56 | 323 | { |
c263766c | 324 | fprintf (dump_file, "Register %s in insn %d", |
541f7d56 BS |
325 | reg_names[reg], INSN_UID (last->insn)); |
326 | if (last->need_caller_save_reg) | |
c263766c | 327 | fprintf (dump_file, " crosses a call"); |
3b03c671 | 328 | } |
1a43c33f | 329 | |
62551c66 | 330 | if (best_new_reg == reg) |
541f7d56 | 331 | { |
62551c66 | 332 | tick[reg] = ++this_tick; |
c263766c RH |
333 | if (dump_file) |
334 | fprintf (dump_file, "; no available better choice\n"); | |
7b82b5da | 335 | continue; |
541f7d56 | 336 | } |
7b82b5da | 337 | |
fe08a886 | 338 | do_replace (this, best_new_reg); |
62551c66 | 339 | tick[best_new_reg] = ++this_tick; |
ead61c1d | 340 | regs_ever_live[best_new_reg] = 1; |
1a43c33f | 341 | |
c263766c RH |
342 | if (dump_file) |
343 | fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); | |
541f7d56 | 344 | } |
1a43c33f | 345 | |
541f7d56 BS |
346 | obstack_free (&rename_obstack, first_obj); |
347 | } | |
1a43c33f | 348 | |
541f7d56 | 349 | obstack_free (&rename_obstack, NULL); |
7b82b5da | 350 | |
c263766c RH |
351 | if (dump_file) |
352 | fputc ('\n', dump_file); | |
7b82b5da | 353 | |
541f7d56 BS |
354 | count_or_remove_death_notes (NULL, 1); |
355 | update_life_info (NULL, UPDATE_LIFE_LOCAL, | |
736b64dd | 356 | PROP_DEATH_NOTES); |
7b82b5da SC |
357 | } |
358 | ||
7b82b5da | 359 | static void |
0c20a65f | 360 | do_replace (struct du_chain *chain, int reg) |
7b82b5da | 361 | { |
541f7d56 | 362 | while (chain) |
7b82b5da | 363 | { |
08394eef | 364 | unsigned int regno = ORIGINAL_REGNO (*chain->loc); |
d1d3c9a6 JH |
365 | struct reg_attrs * attr = REG_ATTRS (*chain->loc); |
366 | ||
08394eef | 367 | *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); |
f4d578da BS |
368 | if (regno >= FIRST_PSEUDO_REGISTER) |
369 | ORIGINAL_REGNO (*chain->loc) = regno; | |
d1d3c9a6 | 370 | REG_ATTRS (*chain->loc) = attr; |
541f7d56 | 371 | chain = chain->next_use; |
7b82b5da | 372 | } |
7b82b5da SC |
373 | } |
374 | ||
7b82b5da | 375 | |
541f7d56 BS |
376 | static struct du_chain *open_chains; |
377 | static struct du_chain *closed_chains; | |
378 | ||
379 | static void | |
e3a64162 | 380 | scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 381 | enum scan_actions action, enum op_type type, int earlyclobber) |
7b82b5da | 382 | { |
541f7d56 BS |
383 | struct du_chain **p; |
384 | rtx x = *loc; | |
385 | enum machine_mode mode = GET_MODE (x); | |
386 | int this_regno = REGNO (x); | |
66fd46b6 | 387 | int this_nregs = hard_regno_nregs[this_regno][mode]; |
541f7d56 | 388 | |
541f7d56 | 389 | if (action == mark_write) |
7b82b5da | 390 | { |
541f7d56 | 391 | if (type == OP_OUT) |
7b82b5da | 392 | { |
703ad42b KG |
393 | struct du_chain *this |
394 | = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); | |
541f7d56 BS |
395 | this->next_use = 0; |
396 | this->next_chain = open_chains; | |
397 | this->loc = loc; | |
398 | this->insn = insn; | |
e3a64162 | 399 | this->cl = cl; |
541f7d56 | 400 | this->need_caller_save_reg = 0; |
fe08a886 | 401 | this->earlyclobber = earlyclobber; |
541f7d56 | 402 | open_chains = this; |
7b82b5da | 403 | } |
541f7d56 | 404 | return; |
7b82b5da | 405 | } |
1a43c33f | 406 | |
541f7d56 BS |
407 | if ((type == OP_OUT && action != terminate_write) |
408 | || (type != OP_OUT && action == terminate_write)) | |
409 | return; | |
5fa41e13 | 410 | |
541f7d56 | 411 | for (p = &open_chains; *p;) |
5fa41e13 | 412 | { |
541f7d56 | 413 | struct du_chain *this = *p; |
541f7d56 | 414 | |
695e4773 GS |
415 | /* Check if the chain has been terminated if it has then skip to |
416 | the next chain. | |
541f7d56 | 417 | |
695e4773 GS |
418 | This can happen when we've already appended the location to |
419 | the chain in Step 3, but are trying to hide in-out operands | |
420 | from terminate_write in Step 5. */ | |
5fa41e13 | 421 | |
695e4773 GS |
422 | if (*this->loc == cc0_rtx) |
423 | p = &this->next_chain; | |
424 | else | |
3b03c671 | 425 | { |
695e4773 | 426 | int regno = REGNO (*this->loc); |
66fd46b6 | 427 | int nregs = hard_regno_nregs[regno][GET_MODE (*this->loc)]; |
695e4773 GS |
428 | int exact_match = (regno == this_regno && nregs == this_nregs); |
429 | ||
430 | if (regno + nregs <= this_regno | |
431 | || this_regno + this_nregs <= regno) | |
a125d855 RH |
432 | { |
433 | p = &this->next_chain; | |
434 | continue; | |
435 | } | |
436 | ||
437 | if (action == mark_read) | |
541f7d56 | 438 | { |
41374e13 | 439 | gcc_assert (exact_match); |
695e4773 | 440 | |
3b03c671 | 441 | /* ??? Class NO_REGS can happen if the md file makes use of |
a125d855 RH |
442 | EXTRA_CONSTRAINTS to match registers. Which is arguably |
443 | wrong, but there we are. Since we know not what this may | |
444 | be replaced with, terminate the chain. */ | |
e3a64162 | 445 | if (cl != NO_REGS) |
a125d855 | 446 | { |
703ad42b | 447 | this = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); |
fe08a886 | 448 | this->next_use = 0; |
a125d855 RH |
449 | this->next_chain = (*p)->next_chain; |
450 | this->loc = loc; | |
451 | this->insn = insn; | |
e3a64162 | 452 | this->cl = cl; |
a125d855 | 453 | this->need_caller_save_reg = 0; |
fe08a886 BS |
454 | while (*p) |
455 | p = &(*p)->next_use; | |
a125d855 RH |
456 | *p = this; |
457 | return; | |
458 | } | |
541f7d56 | 459 | } |
a125d855 RH |
460 | |
461 | if (action != terminate_overlapping_read || ! exact_match) | |
541f7d56 | 462 | { |
695e4773 GS |
463 | struct du_chain *next = this->next_chain; |
464 | ||
465 | /* Whether the terminated chain can be used for renaming | |
466 | depends on the action and this being an exact match. | |
467 | In either case, we remove this element from open_chains. */ | |
468 | ||
469 | if ((action == terminate_dead || action == terminate_write) | |
470 | && exact_match) | |
471 | { | |
472 | this->next_chain = closed_chains; | |
473 | closed_chains = this; | |
c263766c RH |
474 | if (dump_file) |
475 | fprintf (dump_file, | |
695e4773 GS |
476 | "Closing chain %s at insn %d (%s)\n", |
477 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
478 | scan_actions_name[(int) action]); | |
479 | } | |
480 | else | |
481 | { | |
c263766c RH |
482 | if (dump_file) |
483 | fprintf (dump_file, | |
695e4773 GS |
484 | "Discarding chain %s at insn %d (%s)\n", |
485 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
486 | scan_actions_name[(int) action]); | |
487 | } | |
488 | *p = next; | |
541f7d56 | 489 | } |
695e4773 GS |
490 | else |
491 | p = &this->next_chain; | |
541f7d56 | 492 | } |
541f7d56 | 493 | } |
7b82b5da SC |
494 | } |
495 | ||
e3a64162 | 496 | /* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
541f7d56 | 497 | BASE_REG_CLASS depending on how the register is being considered. */ |
7b82b5da | 498 | |
4ca0f257 | 499 | static void |
e3a64162 | 500 | scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 501 | enum scan_actions action, enum machine_mode mode) |
7b82b5da | 502 | { |
541f7d56 BS |
503 | rtx x = *loc; |
504 | RTX_CODE code = GET_CODE (x); | |
505 | const char *fmt; | |
506 | int i, j; | |
7b82b5da | 507 | |
541f7d56 BS |
508 | if (action == mark_write) |
509 | return; | |
7b82b5da | 510 | |
541f7d56 | 511 | switch (code) |
7b82b5da | 512 | { |
541f7d56 BS |
513 | case PLUS: |
514 | { | |
515 | rtx orig_op0 = XEXP (x, 0); | |
516 | rtx orig_op1 = XEXP (x, 1); | |
517 | RTX_CODE code0 = GET_CODE (orig_op0); | |
518 | RTX_CODE code1 = GET_CODE (orig_op1); | |
519 | rtx op0 = orig_op0; | |
520 | rtx op1 = orig_op1; | |
521 | rtx *locI = NULL; | |
522 | rtx *locB = NULL; | |
888d2cd6 | 523 | rtx *locB_reg = NULL; |
541f7d56 BS |
524 | |
525 | if (GET_CODE (op0) == SUBREG) | |
526 | { | |
527 | op0 = SUBREG_REG (op0); | |
528 | code0 = GET_CODE (op0); | |
529 | } | |
7b82b5da | 530 | |
541f7d56 BS |
531 | if (GET_CODE (op1) == SUBREG) |
532 | { | |
533 | op1 = SUBREG_REG (op1); | |
534 | code1 = GET_CODE (op1); | |
535 | } | |
7b82b5da | 536 | |
541f7d56 BS |
537 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE |
538 | || code0 == ZERO_EXTEND || code1 == MEM) | |
539 | { | |
540 | locI = &XEXP (x, 0); | |
541 | locB = &XEXP (x, 1); | |
542 | } | |
543 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
544 | || code1 == ZERO_EXTEND || code0 == MEM) | |
545 | { | |
546 | locI = &XEXP (x, 1); | |
547 | locB = &XEXP (x, 0); | |
548 | } | |
549 | else if (code0 == CONST_INT || code0 == CONST | |
550 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
551 | locB = &XEXP (x, 1); | |
552 | else if (code1 == CONST_INT || code1 == CONST | |
553 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
554 | locB = &XEXP (x, 0); | |
555 | else if (code0 == REG && code1 == REG) | |
556 | { | |
557 | int index_op; | |
558 | ||
559 | if (REG_OK_FOR_INDEX_P (op0) | |
888d2cd6 | 560 | && REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) |
541f7d56 BS |
561 | index_op = 0; |
562 | else if (REG_OK_FOR_INDEX_P (op1) | |
888d2cd6 | 563 | && REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) |
541f7d56 | 564 | index_op = 1; |
888d2cd6 | 565 | else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) |
541f7d56 | 566 | index_op = 0; |
888d2cd6 | 567 | else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) |
541f7d56 BS |
568 | index_op = 1; |
569 | else if (REG_OK_FOR_INDEX_P (op1)) | |
570 | index_op = 1; | |
571 | else | |
572 | index_op = 0; | |
573 | ||
574 | locI = &XEXP (x, index_op); | |
888d2cd6 | 575 | locB_reg = &XEXP (x, !index_op); |
541f7d56 BS |
576 | } |
577 | else if (code0 == REG) | |
578 | { | |
579 | locI = &XEXP (x, 0); | |
580 | locB = &XEXP (x, 1); | |
581 | } | |
582 | else if (code1 == REG) | |
583 | { | |
584 | locI = &XEXP (x, 1); | |
585 | locB = &XEXP (x, 0); | |
586 | } | |
7b82b5da | 587 | |
541f7d56 | 588 | if (locI) |
85941a0a | 589 | scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); |
541f7d56 | 590 | if (locB) |
3dcc68a4 | 591 | scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode); |
888d2cd6 DJ |
592 | if (locB_reg) |
593 | scan_rtx_address (insn, locB_reg, MODE_BASE_REG_REG_CLASS (mode), | |
594 | action, mode); | |
541f7d56 BS |
595 | return; |
596 | } | |
7b82b5da | 597 | |
541f7d56 BS |
598 | case POST_INC: |
599 | case POST_DEC: | |
600 | case POST_MODIFY: | |
601 | case PRE_INC: | |
602 | case PRE_DEC: | |
603 | case PRE_MODIFY: | |
604 | #ifndef AUTO_INC_DEC | |
ce73761f RH |
605 | /* If the target doesn't claim to handle autoinc, this must be |
606 | something special, like a stack push. Kill this chain. */ | |
607 | action = terminate_all_read; | |
541f7d56 BS |
608 | #endif |
609 | break; | |
7b82b5da | 610 | |
541f7d56 | 611 | case MEM: |
3dcc68a4 NC |
612 | scan_rtx_address (insn, &XEXP (x, 0), |
613 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 614 | GET_MODE (x)); |
541f7d56 | 615 | return; |
1a43c33f | 616 | |
541f7d56 | 617 | case REG: |
e3a64162 | 618 | scan_rtx_reg (insn, loc, cl, action, OP_IN, 0); |
4ca0f257 | 619 | return; |
1a43c33f | 620 | |
541f7d56 BS |
621 | default: |
622 | break; | |
4ca0f257 | 623 | } |
541f7d56 BS |
624 | |
625 | fmt = GET_RTX_FORMAT (code); | |
626 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
4ca0f257 | 627 | { |
541f7d56 | 628 | if (fmt[i] == 'e') |
e3a64162 | 629 | scan_rtx_address (insn, &XEXP (x, i), cl, action, mode); |
541f7d56 BS |
630 | else if (fmt[i] == 'E') |
631 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 632 | scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode); |
4ca0f257 | 633 | } |
7b82b5da SC |
634 | } |
635 | ||
541f7d56 | 636 | static void |
e3a64162 | 637 | scan_rtx (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 638 | enum scan_actions action, enum op_type type, int earlyclobber) |
7b82b5da | 639 | { |
541f7d56 BS |
640 | const char *fmt; |
641 | rtx x = *loc; | |
642 | enum rtx_code code = GET_CODE (x); | |
643 | int i, j; | |
7b82b5da | 644 | |
541f7d56 BS |
645 | code = GET_CODE (x); |
646 | switch (code) | |
7b82b5da | 647 | { |
541f7d56 BS |
648 | case CONST: |
649 | case CONST_INT: | |
650 | case CONST_DOUBLE: | |
69ef87e2 | 651 | case CONST_VECTOR: |
541f7d56 BS |
652 | case SYMBOL_REF: |
653 | case LABEL_REF: | |
654 | case CC0: | |
655 | case PC: | |
656 | return; | |
055be976 | 657 | |
541f7d56 | 658 | case REG: |
e3a64162 | 659 | scan_rtx_reg (insn, loc, cl, action, type, earlyclobber); |
541f7d56 | 660 | return; |
7b82b5da | 661 | |
541f7d56 | 662 | case MEM: |
3dcc68a4 NC |
663 | scan_rtx_address (insn, &XEXP (x, 0), |
664 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 665 | GET_MODE (x)); |
541f7d56 | 666 | return; |
7b82b5da | 667 | |
541f7d56 | 668 | case SET: |
e3a64162 | 669 | scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0); |
4e5813dd RS |
670 | scan_rtx (insn, &SET_DEST (x), cl, action, |
671 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); | |
541f7d56 | 672 | return; |
7b82b5da | 673 | |
541f7d56 | 674 | case STRICT_LOW_PART: |
e3a64162 | 675 | scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT, earlyclobber); |
541f7d56 | 676 | return; |
7b82b5da | 677 | |
541f7d56 | 678 | case ZERO_EXTRACT: |
3b03c671 | 679 | case SIGN_EXTRACT: |
e3a64162 | 680 | scan_rtx (insn, &XEXP (x, 0), cl, action, |
fe08a886 | 681 | type == OP_IN ? OP_IN : OP_INOUT, earlyclobber); |
e3a64162 BI |
682 | scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN, 0); |
683 | scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN, 0); | |
541f7d56 | 684 | return; |
7b82b5da | 685 | |
541f7d56 BS |
686 | case POST_INC: |
687 | case PRE_INC: | |
688 | case POST_DEC: | |
689 | case PRE_DEC: | |
690 | case POST_MODIFY: | |
691 | case PRE_MODIFY: | |
692 | /* Should only happen inside MEM. */ | |
41374e13 | 693 | gcc_unreachable (); |
541f7d56 BS |
694 | |
695 | case CLOBBER: | |
4e5813dd RS |
696 | scan_rtx (insn, &SET_DEST (x), cl, action, |
697 | GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); | |
541f7d56 | 698 | return; |
7b82b5da | 699 | |
541f7d56 | 700 | case EXPR_LIST: |
e3a64162 | 701 | scan_rtx (insn, &XEXP (x, 0), cl, action, type, 0); |
541f7d56 | 702 | if (XEXP (x, 1)) |
e3a64162 | 703 | scan_rtx (insn, &XEXP (x, 1), cl, action, type, 0); |
541f7d56 | 704 | return; |
7b82b5da | 705 | |
541f7d56 BS |
706 | default: |
707 | break; | |
708 | } | |
7b82b5da | 709 | |
541f7d56 BS |
710 | fmt = GET_RTX_FORMAT (code); |
711 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7b82b5da SC |
712 | { |
713 | if (fmt[i] == 'e') | |
e3a64162 | 714 | scan_rtx (insn, &XEXP (x, i), cl, action, type, 0); |
7b82b5da SC |
715 | else if (fmt[i] == 'E') |
716 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 717 | scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type, 0); |
7b82b5da | 718 | } |
7b82b5da SC |
719 | } |
720 | ||
3eae4643 | 721 | /* Build def/use chain. */ |
7b82b5da | 722 | |
541f7d56 | 723 | static struct du_chain * |
0c20a65f | 724 | build_def_use (basic_block bb) |
7b82b5da | 725 | { |
541f7d56 | 726 | rtx insn; |
1a43c33f | 727 | |
541f7d56 | 728 | open_chains = closed_chains = NULL; |
1a43c33f | 729 | |
a813c111 | 730 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
541f7d56 BS |
731 | { |
732 | if (INSN_P (insn)) | |
733 | { | |
734 | int n_ops; | |
735 | rtx note; | |
736 | rtx old_operands[MAX_RECOG_OPERANDS]; | |
737 | rtx old_dups[MAX_DUP_OPERANDS]; | |
ea475b23 | 738 | int i, icode; |
541f7d56 BS |
739 | int alt; |
740 | int predicated; | |
741 | ||
541f7d56 BS |
742 | /* Process the insn, determining its effect on the def-use |
743 | chains. We perform the following steps with the register | |
744 | references in the insn: | |
745 | (1) Any read that overlaps an open chain, but doesn't exactly | |
746 | match, causes that chain to be closed. We can't deal | |
747 | with overlaps yet. | |
748 | (2) Any read outside an operand causes any chain it overlaps | |
749 | with to be closed, since we can't replace it. | |
750 | (3) Any read inside an operand is added if there's already | |
751 | an open chain for it. | |
752 | (4) For any REG_DEAD note we find, close open chains that | |
753 | overlap it. | |
754 | (5) For any write we find, close open chains that overlap it. | |
755 | (6) For any write we find in an operand, make a new chain. | |
756 | (7) For any REG_UNUSED, close any chains we just opened. */ | |
757 | ||
2ed1f154 | 758 | icode = recog_memoized (insn); |
541f7d56 | 759 | extract_insn (insn); |
4be9e9cb | 760 | if (! constrain_operands (1)) |
3b03c671 | 761 | fatal_insn_not_found (insn); |
541f7d56 BS |
762 | preprocess_constraints (); |
763 | alt = which_alternative; | |
764 | n_ops = recog_data.n_operands; | |
765 | ||
766 | /* Simplify the code below by rewriting things to reflect | |
767 | matching constraints. Also promote OP_OUT to OP_INOUT | |
768 | in predicated instructions. */ | |
769 | ||
770 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
771 | for (i = 0; i < n_ops; ++i) | |
7b82b5da | 772 | { |
541f7d56 BS |
773 | int matches = recog_op_alt[i][alt].matches; |
774 | if (matches >= 0) | |
e3a64162 | 775 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
541f7d56 BS |
776 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
777 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
778 | recog_data.operand_type[i] = OP_INOUT; | |
7b82b5da | 779 | } |
1a43c33f | 780 | |
541f7d56 BS |
781 | /* Step 1: Close chains for which we have overlapping reads. */ |
782 | for (i = 0; i < n_ops; i++) | |
783 | scan_rtx (insn, recog_data.operand_loc[i], | |
784 | NO_REGS, terminate_overlapping_read, | |
fe08a886 | 785 | recog_data.operand_type[i], 0); |
1a43c33f | 786 | |
541f7d56 | 787 | /* Step 2: Close chains for which we have reads outside operands. |
3b03c671 | 788 | We do this by munging all operands into CC0, and closing |
541f7d56 | 789 | everything remaining. */ |
7b82b5da | 790 | |
541f7d56 | 791 | for (i = 0; i < n_ops; i++) |
1a43c33f | 792 | { |
541f7d56 BS |
793 | old_operands[i] = recog_data.operand[i]; |
794 | /* Don't squash match_operator or match_parallel here, since | |
3b03c671 | 795 | we don't know that all of the contained registers are |
541f7d56 BS |
796 | reachable by proper operands. */ |
797 | if (recog_data.constraints[i][0] == '\0') | |
798 | continue; | |
799 | *recog_data.operand_loc[i] = cc0_rtx; | |
800 | } | |
801 | for (i = 0; i < recog_data.n_dups; i++) | |
802 | { | |
ea475b23 JJ |
803 | int dup_num = recog_data.dup_num[i]; |
804 | ||
541f7d56 BS |
805 | old_dups[i] = *recog_data.dup_loc[i]; |
806 | *recog_data.dup_loc[i] = cc0_rtx; | |
ea475b23 JJ |
807 | |
808 | /* For match_dup of match_operator or match_parallel, share | |
809 | them, so that we don't miss changes in the dup. */ | |
810 | if (icode >= 0 | |
811 | && insn_data[icode].operand[dup_num].eliminable == 0) | |
812 | old_dups[i] = recog_data.operand[dup_num]; | |
1a43c33f | 813 | } |
1a43c33f | 814 | |
fe08a886 BS |
815 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read, |
816 | OP_IN, 0); | |
1a43c33f | 817 | |
541f7d56 BS |
818 | for (i = 0; i < recog_data.n_dups; i++) |
819 | *recog_data.dup_loc[i] = old_dups[i]; | |
820 | for (i = 0; i < n_ops; i++) | |
821 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 822 | |
541f7d56 | 823 | /* Step 2B: Can't rename function call argument registers. */ |
4b4bf941 | 824 | if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn)) |
541f7d56 | 825 | scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), |
fe08a886 | 826 | NO_REGS, terminate_all_read, OP_IN, 0); |
7b82b5da | 827 | |
3ada20ee RH |
828 | /* Step 2C: Can't rename asm operands that were originally |
829 | hard registers. */ | |
830 | if (asm_noperands (PATTERN (insn)) > 0) | |
831 | for (i = 0; i < n_ops; i++) | |
832 | { | |
833 | rtx *loc = recog_data.operand_loc[i]; | |
834 | rtx op = *loc; | |
835 | ||
f8cfc6aa | 836 | if (REG_P (op) |
3ada20ee RH |
837 | && REGNO (op) == ORIGINAL_REGNO (op) |
838 | && (recog_data.operand_type[i] == OP_IN | |
839 | || recog_data.operand_type[i] == OP_INOUT)) | |
840 | scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0); | |
841 | } | |
842 | ||
541f7d56 BS |
843 | /* Step 3: Append to chains for reads inside operands. */ |
844 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
845 | { | |
846 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
847 | rtx *loc = (i < n_ops | |
848 | ? recog_data.operand_loc[opn] | |
849 | : recog_data.dup_loc[i - n_ops]); | |
e3a64162 | 850 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
541f7d56 BS |
851 | enum op_type type = recog_data.operand_type[opn]; |
852 | ||
853 | /* Don't scan match_operand here, since we've no reg class | |
854 | information to pass down. Any operands that we could | |
855 | substitute in will be represented elsewhere. */ | |
856 | if (recog_data.constraints[opn][0] == '\0') | |
857 | continue; | |
7b82b5da | 858 | |
541f7d56 | 859 | if (recog_op_alt[opn][alt].is_address) |
e3a64162 | 860 | scan_rtx_address (insn, loc, cl, mark_read, VOIDmode); |
541f7d56 | 861 | else |
e3a64162 | 862 | scan_rtx (insn, loc, cl, mark_read, type, 0); |
541f7d56 | 863 | } |
7b82b5da | 864 | |
6fb85418 BS |
865 | /* Step 4: Close chains for registers that die here. |
866 | Also record updates for REG_INC notes. */ | |
541f7d56 | 867 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
6fb85418 BS |
868 | { |
869 | if (REG_NOTE_KIND (note) == REG_DEAD) | |
fe08a886 BS |
870 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
871 | OP_IN, 0); | |
6fb85418 | 872 | else if (REG_NOTE_KIND (note) == REG_INC) |
fe08a886 BS |
873 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, |
874 | OP_INOUT, 0); | |
6fb85418 | 875 | } |
1a43c33f | 876 | |
541f7d56 BS |
877 | /* Step 4B: If this is a call, any chain live at this point |
878 | requires a caller-saved reg. */ | |
4b4bf941 | 879 | if (CALL_P (insn)) |
541f7d56 BS |
880 | { |
881 | struct du_chain *p; | |
882 | for (p = open_chains; p; p = p->next_chain) | |
fe08a886 | 883 | p->need_caller_save_reg = 1; |
541f7d56 | 884 | } |
7b82b5da | 885 | |
541f7d56 BS |
886 | /* Step 5: Close open chains that overlap writes. Similar to |
887 | step 2, we hide in-out operands, since we do not want to | |
888 | close these chains. */ | |
7b82b5da | 889 | |
541f7d56 BS |
890 | for (i = 0; i < n_ops; i++) |
891 | { | |
892 | old_operands[i] = recog_data.operand[i]; | |
893 | if (recog_data.operand_type[i] == OP_INOUT) | |
894 | *recog_data.operand_loc[i] = cc0_rtx; | |
895 | } | |
896 | for (i = 0; i < recog_data.n_dups; i++) | |
897 | { | |
898 | int opn = recog_data.dup_num[i]; | |
899 | old_dups[i] = *recog_data.dup_loc[i]; | |
900 | if (recog_data.operand_type[opn] == OP_INOUT) | |
901 | *recog_data.dup_loc[i] = cc0_rtx; | |
902 | } | |
7b82b5da | 903 | |
fe08a886 | 904 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0); |
7b82b5da | 905 | |
541f7d56 BS |
906 | for (i = 0; i < recog_data.n_dups; i++) |
907 | *recog_data.dup_loc[i] = old_dups[i]; | |
908 | for (i = 0; i < n_ops; i++) | |
909 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 910 | |
541f7d56 BS |
911 | /* Step 6: Begin new chains for writes inside operands. */ |
912 | /* ??? Many targets have output constraints on the SET_DEST | |
913 | of a call insn, which is stupid, since these are certainly | |
3ada20ee RH |
914 | ABI defined hard registers. Don't change calls at all. |
915 | Similarly take special care for asm statement that originally | |
916 | referenced hard registers. */ | |
917 | if (asm_noperands (PATTERN (insn)) > 0) | |
918 | { | |
919 | for (i = 0; i < n_ops; i++) | |
920 | if (recog_data.operand_type[i] == OP_OUT) | |
921 | { | |
922 | rtx *loc = recog_data.operand_loc[i]; | |
923 | rtx op = *loc; | |
e3a64162 | 924 | enum reg_class cl = recog_op_alt[i][alt].cl; |
3ada20ee | 925 | |
f8cfc6aa | 926 | if (REG_P (op) |
3b03c671 | 927 | && REGNO (op) == ORIGINAL_REGNO (op)) |
3ada20ee RH |
928 | continue; |
929 | ||
e3a64162 | 930 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
3ada20ee RH |
931 | recog_op_alt[i][alt].earlyclobber); |
932 | } | |
933 | } | |
4b4bf941 | 934 | else if (!CALL_P (insn)) |
541f7d56 BS |
935 | for (i = 0; i < n_ops + recog_data.n_dups; i++) |
936 | { | |
937 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
938 | rtx *loc = (i < n_ops | |
939 | ? recog_data.operand_loc[opn] | |
940 | : recog_data.dup_loc[i - n_ops]); | |
e3a64162 | 941 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
541f7d56 BS |
942 | |
943 | if (recog_data.operand_type[opn] == OP_OUT) | |
e3a64162 | 944 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
fe08a886 | 945 | recog_op_alt[opn][alt].earlyclobber); |
541f7d56 | 946 | } |
7b82b5da | 947 | |
541f7d56 BS |
948 | /* Step 7: Close chains for registers that were never |
949 | really used here. */ | |
950 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
951 | if (REG_NOTE_KIND (note) == REG_UNUSED) | |
fe08a886 BS |
952 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
953 | OP_IN, 0); | |
541f7d56 | 954 | } |
a813c111 | 955 | if (insn == BB_END (bb)) |
541f7d56 BS |
956 | break; |
957 | } | |
7b82b5da | 958 | |
541f7d56 BS |
959 | /* Since we close every chain when we find a REG_DEAD note, anything that |
960 | is still open lives past the basic block, so it can't be renamed. */ | |
961 | return closed_chains; | |
962 | } | |
7b82b5da | 963 | |
c263766c | 964 | /* Dump all def/use chains in CHAINS to DUMP_FILE. They are |
541f7d56 | 965 | printed in reverse order as that's how we build them. */ |
7b82b5da | 966 | |
541f7d56 | 967 | static void |
0c20a65f | 968 | dump_def_use_chain (struct du_chain *chains) |
541f7d56 BS |
969 | { |
970 | while (chains) | |
1a43c33f | 971 | { |
541f7d56 BS |
972 | struct du_chain *this = chains; |
973 | int r = REGNO (*this->loc); | |
66fd46b6 | 974 | int nregs = hard_regno_nregs[r][GET_MODE (*this->loc)]; |
c263766c | 975 | fprintf (dump_file, "Register %s (%d):", reg_names[r], nregs); |
541f7d56 BS |
976 | while (this) |
977 | { | |
c263766c | 978 | fprintf (dump_file, " %d [%s]", INSN_UID (this->insn), |
e3a64162 | 979 | reg_class_names[this->cl]); |
541f7d56 BS |
980 | this = this->next_use; |
981 | } | |
c263766c | 982 | fprintf (dump_file, "\n"); |
541f7d56 | 983 | chains = chains->next_chain; |
1a43c33f | 984 | } |
7b82b5da | 985 | } |
8582c27b RH |
986 | \f |
987 | /* The following code does forward propagation of hard register copies. | |
988 | The object is to eliminate as many dependencies as possible, so that | |
989 | we have the most scheduling freedom. As a side effect, we also clean | |
3b03c671 | 990 | up some silly register allocation decisions made by reload. This |
8582c27b RH |
991 | code may be obsoleted by a new register allocator. */ |
992 | ||
993 | /* For each register, we have a list of registers that contain the same | |
3b03c671 | 994 | value. The OLDEST_REGNO field points to the head of the list, and |
8582c27b RH |
995 | the NEXT_REGNO field runs through the list. The MODE field indicates |
996 | what mode the data is known to be in; this field is VOIDmode when the | |
997 | register is not known to contain valid data. */ | |
998 | ||
999 | struct value_data_entry | |
1000 | { | |
1001 | enum machine_mode mode; | |
1002 | unsigned int oldest_regno; | |
1003 | unsigned int next_regno; | |
1004 | }; | |
1005 | ||
1006 | struct value_data | |
1007 | { | |
1008 | struct value_data_entry e[FIRST_PSEUDO_REGISTER]; | |
752ae914 | 1009 | unsigned int max_value_regs; |
8582c27b RH |
1010 | }; |
1011 | ||
d64d5e80 DJ |
1012 | static void kill_value_one_regno (unsigned, struct value_data *); |
1013 | static void kill_value_regno (unsigned, unsigned, struct value_data *); | |
0c20a65f AJ |
1014 | static void kill_value (rtx, struct value_data *); |
1015 | static void set_value_regno (unsigned, enum machine_mode, struct value_data *); | |
1016 | static void init_value_data (struct value_data *); | |
1017 | static void kill_clobbered_value (rtx, rtx, void *); | |
1018 | static void kill_set_value (rtx, rtx, void *); | |
1019 | static int kill_autoinc_value (rtx *, void *); | |
1020 | static void copy_value (rtx, rtx, struct value_data *); | |
1021 | static bool mode_change_ok (enum machine_mode, enum machine_mode, | |
1022 | unsigned int); | |
1023 | static rtx maybe_mode_change (enum machine_mode, enum machine_mode, | |
1024 | enum machine_mode, unsigned int, unsigned int); | |
1025 | static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *); | |
1026 | static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx, | |
1027 | struct value_data *); | |
1028 | static bool replace_oldest_value_addr (rtx *, enum reg_class, | |
1029 | enum machine_mode, rtx, | |
1030 | struct value_data *); | |
1031 | static bool replace_oldest_value_mem (rtx, rtx, struct value_data *); | |
1032 | static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *); | |
1033 | extern void debug_value_data (struct value_data *); | |
8582c27b | 1034 | #ifdef ENABLE_CHECKING |
0c20a65f | 1035 | static void validate_value_data (struct value_data *); |
8582c27b RH |
1036 | #endif |
1037 | ||
d64d5e80 DJ |
1038 | /* Kill register REGNO. This involves removing it from any value |
1039 | lists, and resetting the value mode to VOIDmode. This is only a | |
1040 | helper function; it does not handle any hard registers overlapping | |
1041 | with REGNO. */ | |
8582c27b RH |
1042 | |
1043 | static void | |
d64d5e80 | 1044 | kill_value_one_regno (unsigned int regno, struct value_data *vd) |
8582c27b RH |
1045 | { |
1046 | unsigned int i, next; | |
1047 | ||
1048 | if (vd->e[regno].oldest_regno != regno) | |
1049 | { | |
1050 | for (i = vd->e[regno].oldest_regno; | |
1051 | vd->e[i].next_regno != regno; | |
1052 | i = vd->e[i].next_regno) | |
1053 | continue; | |
3de23727 | 1054 | vd->e[i].next_regno = vd->e[regno].next_regno; |
8582c27b RH |
1055 | } |
1056 | else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM) | |
1057 | { | |
1058 | for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno) | |
3b03c671 | 1059 | vd->e[i].oldest_regno = next; |
8582c27b RH |
1060 | } |
1061 | ||
1062 | vd->e[regno].mode = VOIDmode; | |
1063 | vd->e[regno].oldest_regno = regno; | |
1064 | vd->e[regno].next_regno = INVALID_REGNUM; | |
1065 | ||
1066 | #ifdef ENABLE_CHECKING | |
1067 | validate_value_data (vd); | |
1068 | #endif | |
1069 | } | |
1070 | ||
d64d5e80 DJ |
1071 | /* Kill the value in register REGNO for NREGS, and any other registers |
1072 | whose values overlap. */ | |
1073 | ||
1074 | static void | |
753d0efa AP |
1075 | kill_value_regno (unsigned int regno, unsigned int nregs, |
1076 | struct value_data *vd) | |
d64d5e80 DJ |
1077 | { |
1078 | unsigned int j; | |
1079 | ||
1080 | /* Kill the value we're told to kill. */ | |
1081 | for (j = 0; j < nregs; ++j) | |
1082 | kill_value_one_regno (regno + j, vd); | |
1083 | ||
1084 | /* Kill everything that overlapped what we're told to kill. */ | |
1085 | if (regno < vd->max_value_regs) | |
1086 | j = 0; | |
1087 | else | |
1088 | j = regno - vd->max_value_regs; | |
1089 | for (; j < regno; ++j) | |
1090 | { | |
1091 | unsigned int i, n; | |
1092 | if (vd->e[j].mode == VOIDmode) | |
1093 | continue; | |
1094 | n = hard_regno_nregs[j][vd->e[j].mode]; | |
1095 | if (j + n > regno) | |
1096 | for (i = 0; i < n; ++i) | |
1097 | kill_value_one_regno (j + i, vd); | |
1098 | } | |
1099 | } | |
1100 | ||
1101 | /* Kill X. This is a convenience function wrapping kill_value_regno | |
3de23727 | 1102 | so that we mind the mode the register is in. */ |
8582c27b RH |
1103 | |
1104 | static void | |
0c20a65f | 1105 | kill_value (rtx x, struct value_data *vd) |
8582c27b | 1106 | { |
8686336f JH |
1107 | /* SUBREGS are supposed to have been eliminated by now. But some |
1108 | ports, e.g. i386 sse, use them to smuggle vector type information | |
1109 | through to instruction selection. Each such SUBREG should simplify, | |
1eeeb6a4 | 1110 | so if we get a NULL we've done something wrong elsewhere. */ |
8686336f JH |
1111 | |
1112 | if (GET_CODE (x) == SUBREG) | |
1113 | x = simplify_subreg (GET_MODE (x), SUBREG_REG (x), | |
1114 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
8582c27b | 1115 | if (REG_P (x)) |
3de23727 RH |
1116 | { |
1117 | unsigned int regno = REGNO (x); | |
66fd46b6 | 1118 | unsigned int n = hard_regno_nregs[regno][GET_MODE (x)]; |
752ae914 | 1119 | |
d64d5e80 | 1120 | kill_value_regno (regno, n, vd); |
3de23727 | 1121 | } |
8582c27b RH |
1122 | } |
1123 | ||
752ae914 RH |
1124 | /* Remember that REGNO is valid in MODE. */ |
1125 | ||
1126 | static void | |
0c20a65f AJ |
1127 | set_value_regno (unsigned int regno, enum machine_mode mode, |
1128 | struct value_data *vd) | |
752ae914 RH |
1129 | { |
1130 | unsigned int nregs; | |
1131 | ||
1132 | vd->e[regno].mode = mode; | |
1133 | ||
66fd46b6 | 1134 | nregs = hard_regno_nregs[regno][mode]; |
752ae914 RH |
1135 | if (nregs > vd->max_value_regs) |
1136 | vd->max_value_regs = nregs; | |
1137 | } | |
1138 | ||
8582c27b RH |
1139 | /* Initialize VD such that there are no known relationships between regs. */ |
1140 | ||
1141 | static void | |
0c20a65f | 1142 | init_value_data (struct value_data *vd) |
8582c27b RH |
1143 | { |
1144 | int i; | |
1145 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1146 | { | |
1147 | vd->e[i].mode = VOIDmode; | |
1148 | vd->e[i].oldest_regno = i; | |
1149 | vd->e[i].next_regno = INVALID_REGNUM; | |
1150 | } | |
752ae914 | 1151 | vd->max_value_regs = 0; |
8582c27b RH |
1152 | } |
1153 | ||
1154 | /* Called through note_stores. If X is clobbered, kill its value. */ | |
1155 | ||
1156 | static void | |
0c20a65f | 1157 | kill_clobbered_value (rtx x, rtx set, void *data) |
8582c27b RH |
1158 | { |
1159 | struct value_data *vd = data; | |
1160 | if (GET_CODE (set) == CLOBBER) | |
1161 | kill_value (x, vd); | |
1162 | } | |
1163 | ||
3b03c671 | 1164 | /* Called through note_stores. If X is set, not clobbered, kill its |
8582c27b RH |
1165 | current value and install it as the root of its own value list. */ |
1166 | ||
1167 | static void | |
0c20a65f | 1168 | kill_set_value (rtx x, rtx set, void *data) |
8582c27b RH |
1169 | { |
1170 | struct value_data *vd = data; | |
c43a12b5 | 1171 | if (GET_CODE (set) != CLOBBER) |
8582c27b | 1172 | { |
3de23727 | 1173 | kill_value (x, vd); |
c43a12b5 | 1174 | if (REG_P (x)) |
3b03c671 | 1175 | set_value_regno (REGNO (x), GET_MODE (x), vd); |
8582c27b RH |
1176 | } |
1177 | } | |
1178 | ||
1179 | /* Called through for_each_rtx. Kill any register used as the base of an | |
1180 | auto-increment expression, and install that register as the root of its | |
1181 | own value list. */ | |
1182 | ||
1183 | static int | |
0c20a65f | 1184 | kill_autoinc_value (rtx *px, void *data) |
8582c27b RH |
1185 | { |
1186 | rtx x = *px; | |
1187 | struct value_data *vd = data; | |
1188 | ||
ec8e098d | 1189 | if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) |
8582c27b | 1190 | { |
3de23727 RH |
1191 | x = XEXP (x, 0); |
1192 | kill_value (x, vd); | |
752ae914 | 1193 | set_value_regno (REGNO (x), Pmode, vd); |
8582c27b RH |
1194 | return -1; |
1195 | } | |
1196 | ||
1197 | return 0; | |
1198 | } | |
1199 | ||
1200 | /* Assert that SRC has been copied to DEST. Adjust the data structures | |
1201 | to reflect that SRC contains an older copy of the shared value. */ | |
1202 | ||
1203 | static void | |
0c20a65f | 1204 | copy_value (rtx dest, rtx src, struct value_data *vd) |
8582c27b RH |
1205 | { |
1206 | unsigned int dr = REGNO (dest); | |
1207 | unsigned int sr = REGNO (src); | |
21e16bd6 | 1208 | unsigned int dn, sn; |
8582c27b RH |
1209 | unsigned int i; |
1210 | ||
1211 | /* ??? At present, it's possible to see noop sets. It'd be nice if | |
1212 | this were cleaned up beforehand... */ | |
1213 | if (sr == dr) | |
1214 | return; | |
1215 | ||
1216 | /* Do not propagate copies to the stack pointer, as that can leave | |
88cad84b | 1217 | memory accesses with no scheduling dependency on the stack update. */ |
8582c27b RH |
1218 | if (dr == STACK_POINTER_REGNUM) |
1219 | return; | |
1220 | ||
1221 | /* Likewise with the frame pointer, if we're using one. */ | |
1222 | if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM) | |
1223 | return; | |
1224 | ||
21e16bd6 | 1225 | /* If SRC and DEST overlap, don't record anything. */ |
66fd46b6 JH |
1226 | dn = hard_regno_nregs[dr][GET_MODE (dest)]; |
1227 | sn = hard_regno_nregs[sr][GET_MODE (dest)]; | |
21e16bd6 RH |
1228 | if ((dr > sr && dr < sr + sn) |
1229 | || (sr > dr && sr < dr + dn)) | |
1230 | return; | |
1231 | ||
8582c27b RH |
1232 | /* If SRC had no assigned mode (i.e. we didn't know it was live) |
1233 | assign it now and assume the value came from an input argument | |
1234 | or somesuch. */ | |
1235 | if (vd->e[sr].mode == VOIDmode) | |
752ae914 | 1236 | set_value_regno (sr, vd->e[dr].mode, vd); |
8582c27b | 1237 | |
27d30956 | 1238 | /* If we are narrowing the input to a smaller number of hard regs, |
dbf65c2f R |
1239 | and it is in big endian, we are really extracting a high part. |
1240 | Since we generally associate a low part of a value with the value itself, | |
1241 | we must not do the same for the high part. | |
1242 | Note we can still get low parts for the same mode combination through | |
1243 | a two-step copy involving differently sized hard regs. | |
1244 | Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each: | |
1245 | (set (reg:DI r0) (reg:DI fr0)) | |
1246 | (set (reg:SI fr2) (reg:SI r0)) | |
1247 | loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while: | |
1248 | (set (reg:SI fr2) (reg:SI fr0)) | |
1249 | loads the high part of (reg:DI fr0) into fr2. | |
1250 | ||
1251 | We can't properly represent the latter case in our tables, so don't | |
1252 | record anything then. */ | |
66fd46b6 | 1253 | else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode] |
dbf65c2f R |
1254 | && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD |
1255 | ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)) | |
1256 | return; | |
1257 | ||
42bd17b7 RH |
1258 | /* If SRC had been assigned a mode narrower than the copy, we can't |
1259 | link DEST into the chain, because not all of the pieces of the | |
1260 | copy came from oldest_regno. */ | |
66fd46b6 | 1261 | else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]) |
42bd17b7 RH |
1262 | return; |
1263 | ||
8582c27b RH |
1264 | /* Link DR at the end of the value chain used by SR. */ |
1265 | ||
1266 | vd->e[dr].oldest_regno = vd->e[sr].oldest_regno; | |
1267 | ||
1268 | for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno) | |
1269 | continue; | |
1270 | vd->e[i].next_regno = dr; | |
1271 | ||
1272 | #ifdef ENABLE_CHECKING | |
1273 | validate_value_data (vd); | |
1274 | #endif | |
1275 | } | |
1276 | ||
8610ba70 RH |
1277 | /* Return true if a mode change from ORIG to NEW is allowed for REGNO. */ |
1278 | ||
1279 | static bool | |
0c20a65f AJ |
1280 | mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode, |
1281 | unsigned int regno ATTRIBUTE_UNUSED) | |
8610ba70 RH |
1282 | { |
1283 | if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode)) | |
1284 | return false; | |
1285 | ||
cff9f8d5 AH |
1286 | #ifdef CANNOT_CHANGE_MODE_CLASS |
1287 | return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode); | |
8610ba70 RH |
1288 | #endif |
1289 | ||
1290 | return true; | |
1291 | } | |
1292 | ||
61dde664 R |
1293 | /* Register REGNO was originally set in ORIG_MODE. It - or a copy of it - |
1294 | was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed | |
1295 | in NEW_MODE. | |
1296 | Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */ | |
1297 | ||
1298 | static rtx | |
0c20a65f AJ |
1299 | maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode, |
1300 | enum machine_mode new_mode, unsigned int regno, | |
1301 | unsigned int copy_regno ATTRIBUTE_UNUSED) | |
61dde664 R |
1302 | { |
1303 | if (orig_mode == new_mode) | |
1304 | return gen_rtx_raw_REG (new_mode, regno); | |
1305 | else if (mode_change_ok (orig_mode, new_mode, regno)) | |
1306 | { | |
66fd46b6 JH |
1307 | int copy_nregs = hard_regno_nregs[copy_regno][copy_mode]; |
1308 | int use_nregs = hard_regno_nregs[copy_regno][new_mode]; | |
61dde664 R |
1309 | int copy_offset |
1310 | = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs); | |
1311 | int offset | |
1312 | = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset; | |
1313 | int byteoffset = offset % UNITS_PER_WORD; | |
1314 | int wordoffset = offset - byteoffset; | |
1315 | ||
1316 | offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) | |
1317 | + (BYTES_BIG_ENDIAN ? byteoffset : 0)); | |
1318 | return gen_rtx_raw_REG (new_mode, | |
1319 | regno + subreg_regno_offset (regno, orig_mode, | |
1320 | offset, | |
1321 | new_mode)); | |
1322 | } | |
1323 | return NULL_RTX; | |
1324 | } | |
1325 | ||
8582c27b | 1326 | /* Find the oldest copy of the value contained in REGNO that is in |
e3a64162 | 1327 | register class CL and has mode MODE. If found, return an rtx |
8582c27b RH |
1328 | of that oldest register, otherwise return NULL. */ |
1329 | ||
1330 | static rtx | |
e3a64162 | 1331 | find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd) |
8582c27b | 1332 | { |
3ada20ee RH |
1333 | unsigned int regno = REGNO (reg); |
1334 | enum machine_mode mode = GET_MODE (reg); | |
8582c27b RH |
1335 | unsigned int i; |
1336 | ||
57d1019b RH |
1337 | /* If we are accessing REG in some mode other that what we set it in, |
1338 | make sure that the replacement is valid. In particular, consider | |
1339 | (set (reg:DI r11) (...)) | |
1340 | (set (reg:SI r9) (reg:SI r11)) | |
1341 | (set (reg:SI r10) (...)) | |
1342 | (set (...) (reg:DI r9)) | |
1343 | Replacing r9 with r11 is invalid. */ | |
1344 | if (mode != vd->e[regno].mode) | |
1345 | { | |
66fd46b6 JH |
1346 | if (hard_regno_nregs[regno][mode] |
1347 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
57d1019b RH |
1348 | return NULL_RTX; |
1349 | } | |
1350 | ||
8582c27b | 1351 | for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) |
cffa2189 R |
1352 | { |
1353 | enum machine_mode oldmode = vd->e[i].mode; | |
61dde664 | 1354 | rtx new; |
684bcee5 | 1355 | unsigned int last; |
cffa2189 | 1356 | |
66fd46b6 | 1357 | for (last = i; last < i + hard_regno_nregs[i][mode]; last++) |
e3a64162 | 1358 | if (!TEST_HARD_REG_BIT (reg_class_contents[cl], last)) |
684bcee5 RE |
1359 | return NULL_RTX; |
1360 | ||
abbe8578 KH |
1361 | new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno); |
1362 | if (new) | |
684bcee5 RE |
1363 | { |
1364 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg); | |
1365 | REG_ATTRS (new) = REG_ATTRS (reg); | |
1366 | return new; | |
1367 | } | |
cffa2189 | 1368 | } |
8582c27b RH |
1369 | |
1370 | return NULL_RTX; | |
1371 | } | |
1372 | ||
1373 | /* If possible, replace the register at *LOC with the oldest register | |
e3a64162 | 1374 | in register class CL. Return true if successfully replaced. */ |
8582c27b RH |
1375 | |
1376 | static bool | |
e3a64162 | 1377 | replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn, |
0c20a65f | 1378 | struct value_data *vd) |
8582c27b | 1379 | { |
e3a64162 | 1380 | rtx new = find_oldest_value_reg (cl, *loc, vd); |
8582c27b RH |
1381 | if (new) |
1382 | { | |
c263766c RH |
1383 | if (dump_file) |
1384 | fprintf (dump_file, "insn %u: replaced reg %u with %u\n", | |
8582c27b RH |
1385 | INSN_UID (insn), REGNO (*loc), REGNO (new)); |
1386 | ||
1387 | *loc = new; | |
1388 | return true; | |
1389 | } | |
1390 | return false; | |
1391 | } | |
1392 | ||
1393 | /* Similar to replace_oldest_value_reg, but *LOC contains an address. | |
e3a64162 | 1394 | Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
8582c27b RH |
1395 | BASE_REG_CLASS depending on how the register is being considered. */ |
1396 | ||
1397 | static bool | |
e3a64162 | 1398 | replace_oldest_value_addr (rtx *loc, enum reg_class cl, |
0c20a65f AJ |
1399 | enum machine_mode mode, rtx insn, |
1400 | struct value_data *vd) | |
8582c27b RH |
1401 | { |
1402 | rtx x = *loc; | |
1403 | RTX_CODE code = GET_CODE (x); | |
1404 | const char *fmt; | |
1405 | int i, j; | |
1406 | bool changed = false; | |
1407 | ||
1408 | switch (code) | |
1409 | { | |
1410 | case PLUS: | |
1411 | { | |
1412 | rtx orig_op0 = XEXP (x, 0); | |
1413 | rtx orig_op1 = XEXP (x, 1); | |
1414 | RTX_CODE code0 = GET_CODE (orig_op0); | |
1415 | RTX_CODE code1 = GET_CODE (orig_op1); | |
1416 | rtx op0 = orig_op0; | |
1417 | rtx op1 = orig_op1; | |
1418 | rtx *locI = NULL; | |
1419 | rtx *locB = NULL; | |
888d2cd6 | 1420 | rtx *locB_reg = NULL; |
8582c27b RH |
1421 | |
1422 | if (GET_CODE (op0) == SUBREG) | |
1423 | { | |
1424 | op0 = SUBREG_REG (op0); | |
1425 | code0 = GET_CODE (op0); | |
1426 | } | |
1427 | ||
1428 | if (GET_CODE (op1) == SUBREG) | |
1429 | { | |
1430 | op1 = SUBREG_REG (op1); | |
1431 | code1 = GET_CODE (op1); | |
1432 | } | |
1433 | ||
1434 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE | |
1435 | || code0 == ZERO_EXTEND || code1 == MEM) | |
1436 | { | |
1437 | locI = &XEXP (x, 0); | |
1438 | locB = &XEXP (x, 1); | |
1439 | } | |
1440 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
1441 | || code1 == ZERO_EXTEND || code0 == MEM) | |
1442 | { | |
1443 | locI = &XEXP (x, 1); | |
1444 | locB = &XEXP (x, 0); | |
1445 | } | |
1446 | else if (code0 == CONST_INT || code0 == CONST | |
1447 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
1448 | locB = &XEXP (x, 1); | |
1449 | else if (code1 == CONST_INT || code1 == CONST | |
1450 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
1451 | locB = &XEXP (x, 0); | |
1452 | else if (code0 == REG && code1 == REG) | |
1453 | { | |
1454 | int index_op; | |
1455 | ||
1456 | if (REG_OK_FOR_INDEX_P (op0) | |
888d2cd6 | 1457 | && REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) |
8582c27b RH |
1458 | index_op = 0; |
1459 | else if (REG_OK_FOR_INDEX_P (op1) | |
888d2cd6 | 1460 | && REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) |
8582c27b | 1461 | index_op = 1; |
888d2cd6 | 1462 | else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) |
8582c27b | 1463 | index_op = 0; |
888d2cd6 | 1464 | else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) |
8582c27b RH |
1465 | index_op = 1; |
1466 | else if (REG_OK_FOR_INDEX_P (op1)) | |
1467 | index_op = 1; | |
1468 | else | |
1469 | index_op = 0; | |
1470 | ||
1471 | locI = &XEXP (x, index_op); | |
888d2cd6 | 1472 | locB_reg = &XEXP (x, !index_op); |
8582c27b RH |
1473 | } |
1474 | else if (code0 == REG) | |
1475 | { | |
1476 | locI = &XEXP (x, 0); | |
1477 | locB = &XEXP (x, 1); | |
1478 | } | |
1479 | else if (code1 == REG) | |
1480 | { | |
1481 | locI = &XEXP (x, 1); | |
1482 | locB = &XEXP (x, 0); | |
1483 | } | |
1484 | ||
1485 | if (locI) | |
1486 | changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode, | |
3b03c671 | 1487 | insn, vd); |
8582c27b | 1488 | if (locB) |
3dcc68a4 NC |
1489 | changed |= replace_oldest_value_addr (locB, |
1490 | MODE_BASE_REG_CLASS (mode), | |
1491 | mode, insn, vd); | |
888d2cd6 DJ |
1492 | if (locB_reg) |
1493 | changed |= replace_oldest_value_addr (locB_reg, | |
1494 | MODE_BASE_REG_REG_CLASS (mode), | |
1495 | mode, insn, vd); | |
8582c27b RH |
1496 | return changed; |
1497 | } | |
1498 | ||
1499 | case POST_INC: | |
1500 | case POST_DEC: | |
1501 | case POST_MODIFY: | |
1502 | case PRE_INC: | |
1503 | case PRE_DEC: | |
1504 | case PRE_MODIFY: | |
1505 | return false; | |
1506 | ||
1507 | case MEM: | |
1508 | return replace_oldest_value_mem (x, insn, vd); | |
1509 | ||
1510 | case REG: | |
e3a64162 | 1511 | return replace_oldest_value_reg (loc, cl, insn, vd); |
8582c27b RH |
1512 | |
1513 | default: | |
1514 | break; | |
1515 | } | |
1516 | ||
1517 | fmt = GET_RTX_FORMAT (code); | |
1518 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1519 | { | |
1520 | if (fmt[i] == 'e') | |
e3a64162 | 1521 | changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, |
8582c27b RH |
1522 | insn, vd); |
1523 | else if (fmt[i] == 'E') | |
1524 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 1525 | changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl, |
3b03c671 | 1526 | mode, insn, vd); |
8582c27b RH |
1527 | } |
1528 | ||
1529 | return changed; | |
1530 | } | |
1531 | ||
1532 | /* Similar to replace_oldest_value_reg, but X contains a memory. */ | |
1533 | ||
1534 | static bool | |
0c20a65f | 1535 | replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd) |
8582c27b | 1536 | { |
3dcc68a4 NC |
1537 | return replace_oldest_value_addr (&XEXP (x, 0), |
1538 | MODE_BASE_REG_CLASS (GET_MODE (x)), | |
8582c27b RH |
1539 | GET_MODE (x), insn, vd); |
1540 | } | |
1541 | ||
1542 | /* Perform the forward copy propagation on basic block BB. */ | |
1543 | ||
1544 | static bool | |
0c20a65f | 1545 | copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) |
8582c27b RH |
1546 | { |
1547 | bool changed = false; | |
1548 | rtx insn; | |
1549 | ||
a813c111 | 1550 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
8582c27b RH |
1551 | { |
1552 | int n_ops, i, alt, predicated; | |
3ada20ee | 1553 | bool is_asm; |
8582c27b RH |
1554 | rtx set; |
1555 | ||
1556 | if (! INSN_P (insn)) | |
1557 | { | |
a813c111 | 1558 | if (insn == BB_END (bb)) |
8582c27b RH |
1559 | break; |
1560 | else | |
1561 | continue; | |
1562 | } | |
1563 | ||
1564 | set = single_set (insn); | |
1565 | extract_insn (insn); | |
4be9e9cb | 1566 | if (! constrain_operands (1)) |
3b03c671 | 1567 | fatal_insn_not_found (insn); |
8582c27b RH |
1568 | preprocess_constraints (); |
1569 | alt = which_alternative; | |
1570 | n_ops = recog_data.n_operands; | |
3ada20ee | 1571 | is_asm = asm_noperands (PATTERN (insn)) >= 0; |
8582c27b RH |
1572 | |
1573 | /* Simplify the code below by rewriting things to reflect | |
1574 | matching constraints. Also promote OP_OUT to OP_INOUT | |
1575 | in predicated instructions. */ | |
1576 | ||
1577 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
1578 | for (i = 0; i < n_ops; ++i) | |
1579 | { | |
1580 | int matches = recog_op_alt[i][alt].matches; | |
1581 | if (matches >= 0) | |
e3a64162 | 1582 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
8582c27b RH |
1583 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
1584 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
1585 | recog_data.operand_type[i] = OP_INOUT; | |
1586 | } | |
1587 | ||
1588 | /* For each earlyclobber operand, zap the value data. */ | |
1589 | for (i = 0; i < n_ops; i++) | |
1590 | if (recog_op_alt[i][alt].earlyclobber) | |
1591 | kill_value (recog_data.operand[i], vd); | |
1592 | ||
1593 | /* Within asms, a clobber cannot overlap inputs or outputs. | |
1594 | I wouldn't think this were true for regular insns, but | |
1595 | scan_rtx treats them like that... */ | |
1596 | note_stores (PATTERN (insn), kill_clobbered_value, vd); | |
1597 | ||
1598 | /* Kill all auto-incremented values. */ | |
1599 | /* ??? REG_INC is useless, since stack pushes aren't done that way. */ | |
1600 | for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd); | |
1601 | ||
752ae914 RH |
1602 | /* Kill all early-clobbered operands. */ |
1603 | for (i = 0; i < n_ops; i++) | |
1604 | if (recog_op_alt[i][alt].earlyclobber) | |
1605 | kill_value (recog_data.operand[i], vd); | |
1606 | ||
8582c27b RH |
1607 | /* Special-case plain move instructions, since we may well |
1608 | be able to do the move from a different register class. */ | |
1609 | if (set && REG_P (SET_SRC (set))) | |
1610 | { | |
3ada20ee RH |
1611 | rtx src = SET_SRC (set); |
1612 | unsigned int regno = REGNO (src); | |
1613 | enum machine_mode mode = GET_MODE (src); | |
8582c27b RH |
1614 | unsigned int i; |
1615 | rtx new; | |
1616 | ||
57d1019b RH |
1617 | /* If we are accessing SRC in some mode other that what we |
1618 | set it in, make sure that the replacement is valid. */ | |
1619 | if (mode != vd->e[regno].mode) | |
1620 | { | |
66fd46b6 JH |
1621 | if (hard_regno_nregs[regno][mode] |
1622 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
57d1019b RH |
1623 | goto no_move_special_case; |
1624 | } | |
1625 | ||
8582c27b RH |
1626 | /* If the destination is also a register, try to find a source |
1627 | register in the same class. */ | |
1628 | if (REG_P (SET_DEST (set))) | |
1629 | { | |
3ada20ee | 1630 | new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd); |
8582c27b RH |
1631 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) |
1632 | { | |
c263766c RH |
1633 | if (dump_file) |
1634 | fprintf (dump_file, | |
8582c27b RH |
1635 | "insn %u: replaced reg %u with %u\n", |
1636 | INSN_UID (insn), regno, REGNO (new)); | |
3b03c671 | 1637 | changed = true; |
8582c27b RH |
1638 | goto did_replacement; |
1639 | } | |
1640 | } | |
1641 | ||
1642 | /* Otherwise, try all valid registers and see if its valid. */ | |
1643 | for (i = vd->e[regno].oldest_regno; i != regno; | |
1644 | i = vd->e[i].next_regno) | |
61dde664 R |
1645 | { |
1646 | new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode, | |
1647 | mode, i, regno); | |
1648 | if (new != NULL_RTX) | |
1649 | { | |
1650 | if (validate_change (insn, &SET_SRC (set), new, 0)) | |
1651 | { | |
1652 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src); | |
d1d3c9a6 | 1653 | REG_ATTRS (new) = REG_ATTRS (src); |
c263766c RH |
1654 | if (dump_file) |
1655 | fprintf (dump_file, | |
61dde664 R |
1656 | "insn %u: replaced reg %u with %u\n", |
1657 | INSN_UID (insn), regno, REGNO (new)); | |
1658 | changed = true; | |
1659 | goto did_replacement; | |
1660 | } | |
1661 | } | |
1662 | } | |
8582c27b | 1663 | } |
57d1019b | 1664 | no_move_special_case: |
8582c27b RH |
1665 | |
1666 | /* For each input operand, replace a hard register with the | |
1667 | eldest live copy that's in an appropriate register class. */ | |
1668 | for (i = 0; i < n_ops; i++) | |
1669 | { | |
1670 | bool replaced = false; | |
1671 | ||
1672 | /* Don't scan match_operand here, since we've no reg class | |
1673 | information to pass down. Any operands that we could | |
1674 | substitute in will be represented elsewhere. */ | |
1675 | if (recog_data.constraints[i][0] == '\0') | |
1676 | continue; | |
1677 | ||
3ada20ee | 1678 | /* Don't replace in asms intentionally referencing hard regs. */ |
f8cfc6aa | 1679 | if (is_asm && REG_P (recog_data.operand[i]) |
3ada20ee RH |
1680 | && (REGNO (recog_data.operand[i]) |
1681 | == ORIGINAL_REGNO (recog_data.operand[i]))) | |
1682 | continue; | |
1683 | ||
8582c27b RH |
1684 | if (recog_data.operand_type[i] == OP_IN) |
1685 | { | |
1686 | if (recog_op_alt[i][alt].is_address) | |
1687 | replaced | |
1688 | = replace_oldest_value_addr (recog_data.operand_loc[i], | |
e3a64162 | 1689 | recog_op_alt[i][alt].cl, |
8582c27b RH |
1690 | VOIDmode, insn, vd); |
1691 | else if (REG_P (recog_data.operand[i])) | |
1692 | replaced | |
1693 | = replace_oldest_value_reg (recog_data.operand_loc[i], | |
e3a64162 | 1694 | recog_op_alt[i][alt].cl, |
8582c27b | 1695 | insn, vd); |
3c0cb5de | 1696 | else if (MEM_P (recog_data.operand[i])) |
8582c27b RH |
1697 | replaced = replace_oldest_value_mem (recog_data.operand[i], |
1698 | insn, vd); | |
1699 | } | |
3c0cb5de | 1700 | else if (MEM_P (recog_data.operand[i])) |
8582c27b | 1701 | replaced = replace_oldest_value_mem (recog_data.operand[i], |
3b03c671 | 1702 | insn, vd); |
8582c27b RH |
1703 | |
1704 | /* If we performed any replacement, update match_dups. */ | |
1705 | if (replaced) | |
1706 | { | |
1707 | int j; | |
1708 | rtx new; | |
1709 | ||
1710 | changed = true; | |
1711 | ||
1712 | new = *recog_data.operand_loc[i]; | |
1713 | recog_data.operand[i] = new; | |
1714 | for (j = 0; j < recog_data.n_dups; j++) | |
1715 | if (recog_data.dup_num[j] == i) | |
1716 | *recog_data.dup_loc[j] = new; | |
1717 | } | |
1718 | } | |
1719 | ||
1720 | did_replacement: | |
1721 | /* Clobber call-clobbered registers. */ | |
4b4bf941 | 1722 | if (CALL_P (insn)) |
8582c27b RH |
1723 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1724 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
d64d5e80 | 1725 | kill_value_regno (i, 1, vd); |
8582c27b RH |
1726 | |
1727 | /* Notice stores. */ | |
1728 | note_stores (PATTERN (insn), kill_set_value, vd); | |
1729 | ||
1730 | /* Notice copies. */ | |
1731 | if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))) | |
1732 | copy_value (SET_DEST (set), SET_SRC (set), vd); | |
1733 | ||
a813c111 | 1734 | if (insn == BB_END (bb)) |
8582c27b RH |
1735 | break; |
1736 | } | |
1737 | ||
1738 | return changed; | |
1739 | } | |
1740 | ||
1741 | /* Main entry point for the forward copy propagation optimization. */ | |
1742 | ||
1743 | void | |
0c20a65f | 1744 | copyprop_hardreg_forward (void) |
8582c27b | 1745 | { |
8582c27b | 1746 | struct value_data *all_vd; |
3de23727 | 1747 | bool need_refresh; |
90710901 | 1748 | basic_block bb; |
8582c27b | 1749 | |
3de23727 | 1750 | need_refresh = false; |
8582c27b | 1751 | |
d55bc081 | 1752 | all_vd = xmalloc (sizeof (struct value_data) * last_basic_block); |
8582c27b | 1753 | |
90710901 KH |
1754 | /* Clear all BB_VISITED flags. We use BB_VISITED flags to indicate |
1755 | whether we have processed a given basic block or not. Note that | |
1756 | we never put BB_VISITED flag on ENTRY_BLOCK_PTR throughout this | |
1757 | function because we want to call init_value_data for all | |
1758 | successors of ENTRY_BLOCK_PTR. */ | |
1759 | FOR_ALL_BB (bb) | |
1760 | bb->flags &= ~BB_VISITED; | |
1761 | ||
e0082a72 | 1762 | FOR_EACH_BB (bb) |
8582c27b | 1763 | { |
90710901 KH |
1764 | bb->flags |= BB_VISITED; |
1765 | ||
8582c27b RH |
1766 | /* If a block has a single predecessor, that we've already |
1767 | processed, begin with the value data that was live at | |
1768 | the end of the predecessor block. */ | |
d91edf86 | 1769 | /* ??? Ought to use more intelligent queuing of blocks. */ |
628f6a4e | 1770 | if (EDGE_COUNT (bb->preds) == 1 |
90710901 KH |
1771 | && ((EDGE_PRED (bb, 0)->src->flags & BB_VISITED) != 0) |
1772 | && ! (EDGE_PRED (bb, 0)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))) | |
628f6a4e | 1773 | all_vd[bb->index] = all_vd[EDGE_PRED (bb, 0)->src->index]; |
8582c27b | 1774 | else |
e0082a72 | 1775 | init_value_data (all_vd + bb->index); |
8582c27b | 1776 | |
e0082a72 | 1777 | if (copyprop_hardreg_forward_1 (bb, all_vd + bb->index)) |
3de23727 | 1778 | need_refresh = true; |
8582c27b RH |
1779 | } |
1780 | ||
90710901 KH |
1781 | /* Clear BB_VISITED flag on each basic block. We do not need to |
1782 | clear the one on ENTRY_BLOCK_PTR because it's already cleared | |
1783 | above. */ | |
1784 | FOR_EACH_BB (bb) | |
1785 | bb->flags &= ~BB_VISITED; | |
1786 | ||
8582c27b RH |
1787 | if (need_refresh) |
1788 | { | |
c263766c RH |
1789 | if (dump_file) |
1790 | fputs ("\n\n", dump_file); | |
8582c27b | 1791 | |
3de23727 RH |
1792 | /* ??? Irritatingly, delete_noop_moves does not take a set of blocks |
1793 | to scan, so we have to do a life update with no initial set of | |
1794 | blocks Just In Case. */ | |
827c06b6 | 1795 | delete_noop_moves (); |
3de23727 | 1796 | update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, |
8582c27b RH |
1797 | PROP_DEATH_NOTES |
1798 | | PROP_SCAN_DEAD_CODE | |
1799 | | PROP_KILL_DEAD_CODE); | |
1800 | } | |
1801 | ||
8582c27b RH |
1802 | free (all_vd); |
1803 | } | |
1804 | ||
1805 | /* Dump the value chain data to stderr. */ | |
1806 | ||
1807 | void | |
0c20a65f | 1808 | debug_value_data (struct value_data *vd) |
8582c27b RH |
1809 | { |
1810 | HARD_REG_SET set; | |
1811 | unsigned int i, j; | |
1812 | ||
1813 | CLEAR_HARD_REG_SET (set); | |
1814 | ||
1815 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1816 | if (vd->e[i].oldest_regno == i) | |
1817 | { | |
1818 | if (vd->e[i].mode == VOIDmode) | |
1819 | { | |
1820 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1821 | fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n", | |
1822 | i, vd->e[i].next_regno); | |
1823 | continue; | |
1824 | } | |
1825 | ||
1826 | SET_HARD_REG_BIT (set, i); | |
1827 | fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode)); | |
1828 | ||
1829 | for (j = vd->e[i].next_regno; | |
1830 | j != INVALID_REGNUM; | |
1831 | j = vd->e[j].next_regno) | |
1832 | { | |
57d1019b | 1833 | if (TEST_HARD_REG_BIT (set, j)) |
8582c27b RH |
1834 | { |
1835 | fprintf (stderr, "[%u] Loop in regno chain\n", j); | |
1836 | return; | |
1837 | } | |
1838 | ||
1839 | if (vd->e[j].oldest_regno != i) | |
1840 | { | |
1841 | fprintf (stderr, "[%u] Bad oldest_regno (%u)\n", | |
1842 | j, vd->e[j].oldest_regno); | |
1843 | return; | |
1844 | } | |
1845 | SET_HARD_REG_BIT (set, j); | |
1846 | fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode)); | |
1847 | } | |
1848 | fputc ('\n', stderr); | |
1849 | } | |
1850 | ||
1851 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1852 | if (! TEST_HARD_REG_BIT (set, i) | |
1853 | && (vd->e[i].mode != VOIDmode | |
1854 | || vd->e[i].oldest_regno != i | |
1855 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1856 | fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n", | |
1857 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1858 | vd->e[i].next_regno); | |
1859 | } | |
1860 | ||
1861 | #ifdef ENABLE_CHECKING | |
1862 | static void | |
0c20a65f | 1863 | validate_value_data (struct value_data *vd) |
8582c27b RH |
1864 | { |
1865 | HARD_REG_SET set; | |
1866 | unsigned int i, j; | |
1867 | ||
1868 | CLEAR_HARD_REG_SET (set); | |
1869 | ||
1870 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1871 | if (vd->e[i].oldest_regno == i) | |
1872 | { | |
1873 | if (vd->e[i].mode == VOIDmode) | |
1874 | { | |
1875 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1876 | internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)", | |
1877 | i, vd->e[i].next_regno); | |
1878 | continue; | |
1879 | } | |
1880 | ||
1881 | SET_HARD_REG_BIT (set, i); | |
1882 | ||
1883 | for (j = vd->e[i].next_regno; | |
1884 | j != INVALID_REGNUM; | |
1885 | j = vd->e[j].next_regno) | |
1886 | { | |
1887 | if (TEST_HARD_REG_BIT (set, j)) | |
1888 | internal_error ("validate_value_data: Loop in regno chain (%u)", | |
1889 | j); | |
1890 | if (vd->e[j].oldest_regno != i) | |
1891 | internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)", | |
1892 | j, vd->e[j].oldest_regno); | |
1893 | ||
1894 | SET_HARD_REG_BIT (set, j); | |
1895 | } | |
1896 | } | |
1897 | ||
1898 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1899 | if (! TEST_HARD_REG_BIT (set, i) | |
1900 | && (vd->e[i].mode != VOIDmode | |
1901 | || vd->e[i].oldest_regno != i | |
1902 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1903 | internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)", | |
1904 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1905 | vd->e[i].next_regno); | |
1906 | } | |
1907 | #endif |