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Commit | Line | Data |
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7b82b5da | 1 | /* Register renaming for the GNU compiler. |
f4f4d0f8 | 2 | Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc. |
7b82b5da | 3 | |
1322177d | 4 | This file is part of GCC. |
7b82b5da | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
7b82b5da SC |
8 | the Free Software Foundation; either version 2, or (at your option) |
9 | any later version. | |
10 | ||
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
7b82b5da SC |
15 | |
16 | You should have received a copy of the GNU General Public License | |
1322177d LB |
17 | along with GCC; see the file COPYING. If not, write to the Free |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
7b82b5da | 20 | |
541f7d56 BS |
21 | #define REG_OK_STRICT |
22 | ||
7b82b5da SC |
23 | #include "config.h" |
24 | #include "system.h" | |
7b82b5da | 25 | #include "rtl.h" |
541f7d56 | 26 | #include "tm_p.h" |
7b82b5da SC |
27 | #include "insn-config.h" |
28 | #include "regs.h" | |
541f7d56 BS |
29 | #include "hard-reg-set.h" |
30 | #include "basic-block.h" | |
31 | #include "reload.h" | |
7b82b5da SC |
32 | #include "output.h" |
33 | #include "function.h" | |
34 | #include "recog.h" | |
541f7d56 | 35 | #include "flags.h" |
8582c27b | 36 | #include "toplev.h" |
541f7d56 BS |
37 | #include "obstack.h" |
38 | ||
541f7d56 BS |
39 | #ifndef REG_MODE_OK_FOR_BASE_P |
40 | #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) | |
41 | #endif | |
7b82b5da SC |
42 | |
43 | static const char *const reg_class_names[] = REG_CLASS_NAMES; | |
44 | ||
541f7d56 | 45 | struct du_chain |
7b82b5da | 46 | { |
541f7d56 BS |
47 | struct du_chain *next_chain; |
48 | struct du_chain *next_use; | |
7b82b5da | 49 | |
541f7d56 BS |
50 | rtx insn; |
51 | rtx *loc; | |
52 | enum reg_class class; | |
53 | unsigned int need_caller_save_reg:1; | |
fe08a886 | 54 | unsigned int earlyclobber:1; |
541f7d56 | 55 | }; |
7b82b5da | 56 | |
541f7d56 BS |
57 | enum scan_actions |
58 | { | |
541f7d56 BS |
59 | terminate_all_read, |
60 | terminate_overlapping_read, | |
61 | terminate_write, | |
62 | terminate_dead, | |
63 | mark_read, | |
64 | mark_write | |
65 | }; | |
66 | ||
67 | static const char * const scan_actions_name[] = | |
68 | { | |
541f7d56 BS |
69 | "terminate_all_read", |
70 | "terminate_overlapping_read", | |
71 | "terminate_write", | |
72 | "terminate_dead", | |
73 | "mark_read", | |
74 | "mark_write" | |
75 | }; | |
76 | ||
77 | static struct obstack rename_obstack; | |
78 | ||
79 | static void do_replace PARAMS ((struct du_chain *, int)); | |
80 | static void scan_rtx_reg PARAMS ((rtx, rtx *, enum reg_class, | |
fe08a886 | 81 | enum scan_actions, enum op_type, int)); |
541f7d56 | 82 | static void scan_rtx_address PARAMS ((rtx, rtx *, enum reg_class, |
85941a0a | 83 | enum scan_actions, enum machine_mode)); |
541f7d56 | 84 | static void scan_rtx PARAMS ((rtx, rtx *, enum reg_class, |
fe08a886 BS |
85 | enum scan_actions, enum op_type, int)); |
86 | static struct du_chain *build_def_use PARAMS ((basic_block)); | |
541f7d56 | 87 | static void dump_def_use_chain PARAMS ((struct du_chain *)); |
fe08a886 BS |
88 | static void note_sets PARAMS ((rtx, rtx, void *)); |
89 | static void clear_dead_regs PARAMS ((HARD_REG_SET *, enum machine_mode, rtx)); | |
90 | static void merge_overlapping_regs PARAMS ((basic_block, HARD_REG_SET *, | |
91 | struct du_chain *)); | |
92 | ||
93 | /* Called through note_stores from update_life. Find sets of registers, and | |
94 | record them in *DATA (which is actually a HARD_REG_SET *). */ | |
95 | ||
96 | static void | |
97 | note_sets (x, set, data) | |
98 | rtx x; | |
99 | rtx set ATTRIBUTE_UNUSED; | |
100 | void *data; | |
101 | { | |
102 | HARD_REG_SET *pset = (HARD_REG_SET *) data; | |
103 | unsigned int regno; | |
104 | int nregs; | |
105 | if (GET_CODE (x) != REG) | |
106 | return; | |
107 | regno = REGNO (x); | |
108 | nregs = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
3d17d93d AO |
109 | |
110 | /* There must not be pseudos at this point. */ | |
111 | if (regno + nregs > FIRST_PSEUDO_REGISTER) | |
112 | abort (); | |
113 | ||
fe08a886 BS |
114 | while (nregs-- > 0) |
115 | SET_HARD_REG_BIT (*pset, regno + nregs); | |
116 | } | |
117 | ||
118 | /* Clear all registers from *PSET for which a note of kind KIND can be found | |
119 | in the list NOTES. */ | |
120 | ||
121 | static void | |
122 | clear_dead_regs (pset, kind, notes) | |
123 | HARD_REG_SET *pset; | |
124 | enum machine_mode kind; | |
125 | rtx notes; | |
126 | { | |
127 | rtx note; | |
128 | for (note = notes; note; note = XEXP (note, 1)) | |
129 | if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0))) | |
130 | { | |
131 | rtx reg = XEXP (note, 0); | |
132 | unsigned int regno = REGNO (reg); | |
133 | int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
3d17d93d AO |
134 | |
135 | /* There must not be pseudos at this point. */ | |
136 | if (regno + nregs > FIRST_PSEUDO_REGISTER) | |
137 | abort (); | |
138 | ||
fe08a886 BS |
139 | while (nregs-- > 0) |
140 | CLEAR_HARD_REG_BIT (*pset, regno + nregs); | |
141 | } | |
142 | } | |
143 | ||
144 | /* For a def-use chain CHAIN in basic block B, find which registers overlap | |
145 | its lifetime and set the corresponding bits in *PSET. */ | |
146 | ||
147 | static void | |
148 | merge_overlapping_regs (b, pset, chain) | |
149 | basic_block b; | |
150 | HARD_REG_SET *pset; | |
151 | struct du_chain *chain; | |
152 | { | |
153 | struct du_chain *t = chain; | |
154 | rtx insn; | |
155 | HARD_REG_SET live; | |
156 | ||
157 | REG_SET_TO_HARD_REG_SET (live, b->global_live_at_start); | |
158 | insn = b->head; | |
159 | while (t) | |
160 | { | |
161 | /* Search forward until the next reference to the register to be | |
162 | renamed. */ | |
163 | while (insn != t->insn) | |
164 | { | |
165 | if (INSN_P (insn)) | |
166 | { | |
167 | clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn)); | |
168 | note_stores (PATTERN (insn), note_sets, (void *) &live); | |
169 | /* Only record currently live regs if we are inside the | |
170 | reg's live range. */ | |
171 | if (t != chain) | |
172 | IOR_HARD_REG_SET (*pset, live); | |
3b03c671 | 173 | clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn)); |
fe08a886 BS |
174 | } |
175 | insn = NEXT_INSN (insn); | |
176 | } | |
177 | ||
178 | IOR_HARD_REG_SET (*pset, live); | |
179 | ||
180 | /* For the last reference, also merge in all registers set in the | |
181 | same insn. | |
182 | @@@ We only have take earlyclobbered sets into account. */ | |
183 | if (! t->next_use) | |
184 | note_stores (PATTERN (insn), note_sets, (void *) pset); | |
185 | ||
186 | t = t->next_use; | |
187 | } | |
188 | } | |
189 | ||
190 | /* Perform register renaming on the current function. */ | |
7b82b5da | 191 | |
541f7d56 BS |
192 | void |
193 | regrename_optimize () | |
194 | { | |
fe08a886 BS |
195 | int tick[FIRST_PSEUDO_REGISTER]; |
196 | int this_tick = 0; | |
e0082a72 | 197 | basic_block bb; |
541f7d56 | 198 | char *first_obj; |
7b82b5da | 199 | |
fe08a886 BS |
200 | memset (tick, 0, sizeof tick); |
201 | ||
541f7d56 BS |
202 | gcc_obstack_init (&rename_obstack); |
203 | first_obj = (char *) obstack_alloc (&rename_obstack, 0); | |
7b82b5da | 204 | |
e0082a72 | 205 | FOR_EACH_BB (bb) |
541f7d56 | 206 | { |
541f7d56 | 207 | struct du_chain *all_chains = 0; |
541f7d56 BS |
208 | HARD_REG_SET unavailable; |
209 | HARD_REG_SET regs_seen; | |
7b82b5da | 210 | |
541f7d56 | 211 | CLEAR_HARD_REG_SET (unavailable); |
7b82b5da | 212 | |
541f7d56 | 213 | if (rtl_dump_file) |
e0082a72 | 214 | fprintf (rtl_dump_file, "\nBasic block %d:\n", bb->index); |
7b82b5da | 215 | |
fe08a886 | 216 | all_chains = build_def_use (bb); |
7b82b5da | 217 | |
541f7d56 BS |
218 | if (rtl_dump_file) |
219 | dump_def_use_chain (all_chains); | |
7b82b5da | 220 | |
fe08a886 | 221 | CLEAR_HARD_REG_SET (unavailable); |
541f7d56 BS |
222 | /* Don't clobber traceback for noreturn functions. */ |
223 | if (frame_pointer_needed) | |
224 | { | |
65599eb4 | 225 | int i; |
3b03c671 | 226 | |
65599eb4 DC |
227 | for (i = HARD_REGNO_NREGS (FRAME_POINTER_REGNUM, Pmode); i--;) |
228 | SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i); | |
3b03c671 | 229 | |
541f7d56 | 230 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
65599eb4 DC |
231 | for (i = HARD_REGNO_NREGS (HARD_FRAME_POINTER_REGNUM, Pmode); i--;) |
232 | SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i); | |
541f7d56 BS |
233 | #endif |
234 | } | |
7b82b5da | 235 | |
541f7d56 BS |
236 | CLEAR_HARD_REG_SET (regs_seen); |
237 | while (all_chains) | |
238 | { | |
fe08a886 | 239 | int new_reg, best_new_reg = -1; |
541f7d56 BS |
240 | int n_uses; |
241 | struct du_chain *this = all_chains; | |
242 | struct du_chain *tmp, *last; | |
243 | HARD_REG_SET this_unavailable; | |
4e812700 | 244 | int reg = REGNO (*this->loc); |
85941a0a | 245 | int i; |
7b82b5da | 246 | |
541f7d56 | 247 | all_chains = this->next_chain; |
3b03c671 | 248 | |
fe08a886 | 249 | #if 0 /* This just disables optimization opportunities. */ |
541f7d56 BS |
250 | /* Only rename once we've seen the reg more than once. */ |
251 | if (! TEST_HARD_REG_BIT (regs_seen, reg)) | |
1a43c33f | 252 | { |
541f7d56 BS |
253 | SET_HARD_REG_BIT (regs_seen, reg); |
254 | continue; | |
255 | } | |
fe08a886 | 256 | #endif |
1a43c33f | 257 | |
f4d578da BS |
258 | if (fixed_regs[reg] || global_regs[reg] |
259 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
260 | || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) | |
261 | #else | |
262 | || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) | |
263 | #endif | |
264 | ) | |
541f7d56 | 265 | continue; |
1a43c33f | 266 | |
541f7d56 | 267 | COPY_HARD_REG_SET (this_unavailable, unavailable); |
1a43c33f | 268 | |
541f7d56 BS |
269 | /* Find last entry on chain (which has the need_caller_save bit), |
270 | count number of uses, and narrow the set of registers we can | |
271 | use for renaming. */ | |
272 | n_uses = 0; | |
273 | for (last = this; last->next_use; last = last->next_use) | |
274 | { | |
275 | n_uses++; | |
276 | IOR_COMPL_HARD_REG_SET (this_unavailable, | |
277 | reg_class_contents[last->class]); | |
1a43c33f | 278 | } |
541f7d56 BS |
279 | if (n_uses < 1) |
280 | continue; | |
7b82b5da | 281 | |
541f7d56 BS |
282 | IOR_COMPL_HARD_REG_SET (this_unavailable, |
283 | reg_class_contents[last->class]); | |
7b82b5da | 284 | |
fe08a886 | 285 | if (this->need_caller_save_reg) |
541f7d56 BS |
286 | IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); |
287 | ||
fe08a886 BS |
288 | merge_overlapping_regs (bb, &this_unavailable, this); |
289 | ||
541f7d56 BS |
290 | /* Now potential_regs is a reasonable approximation, let's |
291 | have a closer look at each register still in there. */ | |
4e812700 | 292 | for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) |
1a43c33f | 293 | { |
4e812700 RH |
294 | int nregs = HARD_REGNO_NREGS (new_reg, GET_MODE (*this->loc)); |
295 | ||
85941a0a | 296 | for (i = nregs - 1; i >= 0; --i) |
fe08a886 BS |
297 | if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) |
298 | || fixed_regs[new_reg + i] | |
299 | || global_regs[new_reg + i] | |
85941a0a | 300 | /* Can't use regs which aren't saved by the prologue. */ |
fe08a886 BS |
301 | || (! regs_ever_live[new_reg + i] |
302 | && ! call_used_regs[new_reg + i]) | |
b2a8b026 | 303 | #ifdef LEAF_REGISTERS |
3b03c671 | 304 | /* We can't use a non-leaf register if we're in a |
b2a8b026 | 305 | leaf function. */ |
3b03c671 | 306 | || (current_function_is_leaf |
b2a8b026 MM |
307 | && !LEAF_REGISTERS[new_reg + i]) |
308 | #endif | |
541f7d56 | 309 | #ifdef HARD_REGNO_RENAME_OK |
fe08a886 | 310 | || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) |
541f7d56 | 311 | #endif |
85941a0a RH |
312 | ) |
313 | break; | |
314 | if (i >= 0) | |
541f7d56 | 315 | continue; |
1a43c33f | 316 | |
85941a0a RH |
317 | /* See whether it accepts all modes that occur in |
318 | definition and uses. */ | |
541f7d56 | 319 | for (tmp = this; tmp; tmp = tmp->next_use) |
66df7a98 AO |
320 | if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) |
321 | || (tmp->need_caller_save_reg | |
322 | && ! (HARD_REGNO_CALL_PART_CLOBBERED | |
323 | (reg, GET_MODE (*tmp->loc))) | |
324 | && (HARD_REGNO_CALL_PART_CLOBBERED | |
325 | (new_reg, GET_MODE (*tmp->loc))))) | |
541f7d56 BS |
326 | break; |
327 | if (! tmp) | |
fe08a886 BS |
328 | { |
329 | if (best_new_reg == -1 | |
330 | || tick[best_new_reg] > tick[new_reg]) | |
331 | best_new_reg = new_reg; | |
332 | } | |
1a43c33f | 333 | } |
7b82b5da | 334 | |
541f7d56 BS |
335 | if (rtl_dump_file) |
336 | { | |
337 | fprintf (rtl_dump_file, "Register %s in insn %d", | |
338 | reg_names[reg], INSN_UID (last->insn)); | |
339 | if (last->need_caller_save_reg) | |
340 | fprintf (rtl_dump_file, " crosses a call"); | |
3b03c671 | 341 | } |
1a43c33f | 342 | |
fe08a886 | 343 | if (best_new_reg == -1) |
541f7d56 BS |
344 | { |
345 | if (rtl_dump_file) | |
346 | fprintf (rtl_dump_file, "; no available registers\n"); | |
7b82b5da | 347 | continue; |
541f7d56 | 348 | } |
7b82b5da | 349 | |
fe08a886 BS |
350 | do_replace (this, best_new_reg); |
351 | tick[best_new_reg] = this_tick++; | |
1a43c33f | 352 | |
541f7d56 | 353 | if (rtl_dump_file) |
fe08a886 | 354 | fprintf (rtl_dump_file, ", renamed as %s\n", reg_names[best_new_reg]); |
541f7d56 | 355 | } |
1a43c33f | 356 | |
541f7d56 BS |
357 | obstack_free (&rename_obstack, first_obj); |
358 | } | |
1a43c33f | 359 | |
541f7d56 | 360 | obstack_free (&rename_obstack, NULL); |
7b82b5da | 361 | |
541f7d56 BS |
362 | if (rtl_dump_file) |
363 | fputc ('\n', rtl_dump_file); | |
7b82b5da | 364 | |
541f7d56 BS |
365 | count_or_remove_death_notes (NULL, 1); |
366 | update_life_info (NULL, UPDATE_LIFE_LOCAL, | |
367 | PROP_REG_INFO | PROP_DEATH_NOTES); | |
7b82b5da SC |
368 | } |
369 | ||
7b82b5da | 370 | static void |
541f7d56 BS |
371 | do_replace (chain, reg) |
372 | struct du_chain *chain; | |
373 | int reg; | |
7b82b5da | 374 | { |
541f7d56 | 375 | while (chain) |
7b82b5da | 376 | { |
08394eef BS |
377 | unsigned int regno = ORIGINAL_REGNO (*chain->loc); |
378 | *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); | |
f4d578da BS |
379 | if (regno >= FIRST_PSEUDO_REGISTER) |
380 | ORIGINAL_REGNO (*chain->loc) = regno; | |
541f7d56 | 381 | chain = chain->next_use; |
7b82b5da | 382 | } |
7b82b5da SC |
383 | } |
384 | ||
7b82b5da | 385 | |
541f7d56 BS |
386 | static struct du_chain *open_chains; |
387 | static struct du_chain *closed_chains; | |
388 | ||
389 | static void | |
fe08a886 | 390 | scan_rtx_reg (insn, loc, class, action, type, earlyclobber) |
541f7d56 BS |
391 | rtx insn; |
392 | rtx *loc; | |
393 | enum reg_class class; | |
394 | enum scan_actions action; | |
395 | enum op_type type; | |
fe08a886 | 396 | int earlyclobber; |
7b82b5da | 397 | { |
541f7d56 BS |
398 | struct du_chain **p; |
399 | rtx x = *loc; | |
400 | enum machine_mode mode = GET_MODE (x); | |
401 | int this_regno = REGNO (x); | |
402 | int this_nregs = HARD_REGNO_NREGS (this_regno, mode); | |
403 | ||
541f7d56 | 404 | if (action == mark_write) |
7b82b5da | 405 | { |
541f7d56 | 406 | if (type == OP_OUT) |
7b82b5da | 407 | { |
541f7d56 BS |
408 | struct du_chain *this = (struct du_chain *) |
409 | obstack_alloc (&rename_obstack, sizeof (struct du_chain)); | |
410 | this->next_use = 0; | |
411 | this->next_chain = open_chains; | |
412 | this->loc = loc; | |
413 | this->insn = insn; | |
414 | this->class = class; | |
415 | this->need_caller_save_reg = 0; | |
fe08a886 | 416 | this->earlyclobber = earlyclobber; |
541f7d56 | 417 | open_chains = this; |
7b82b5da | 418 | } |
541f7d56 | 419 | return; |
7b82b5da | 420 | } |
1a43c33f | 421 | |
541f7d56 BS |
422 | if ((type == OP_OUT && action != terminate_write) |
423 | || (type != OP_OUT && action == terminate_write)) | |
424 | return; | |
5fa41e13 | 425 | |
541f7d56 | 426 | for (p = &open_chains; *p;) |
5fa41e13 | 427 | { |
541f7d56 | 428 | struct du_chain *this = *p; |
541f7d56 | 429 | |
695e4773 GS |
430 | /* Check if the chain has been terminated if it has then skip to |
431 | the next chain. | |
541f7d56 | 432 | |
695e4773 GS |
433 | This can happen when we've already appended the location to |
434 | the chain in Step 3, but are trying to hide in-out operands | |
435 | from terminate_write in Step 5. */ | |
5fa41e13 | 436 | |
695e4773 GS |
437 | if (*this->loc == cc0_rtx) |
438 | p = &this->next_chain; | |
439 | else | |
3b03c671 | 440 | { |
695e4773 GS |
441 | int regno = REGNO (*this->loc); |
442 | int nregs = HARD_REGNO_NREGS (regno, GET_MODE (*this->loc)); | |
443 | int exact_match = (regno == this_regno && nregs == this_nregs); | |
444 | ||
445 | if (regno + nregs <= this_regno | |
446 | || this_regno + this_nregs <= regno) | |
a125d855 RH |
447 | { |
448 | p = &this->next_chain; | |
449 | continue; | |
450 | } | |
451 | ||
452 | if (action == mark_read) | |
541f7d56 | 453 | { |
695e4773 GS |
454 | if (! exact_match) |
455 | abort (); | |
695e4773 | 456 | |
3b03c671 | 457 | /* ??? Class NO_REGS can happen if the md file makes use of |
a125d855 RH |
458 | EXTRA_CONSTRAINTS to match registers. Which is arguably |
459 | wrong, but there we are. Since we know not what this may | |
460 | be replaced with, terminate the chain. */ | |
461 | if (class != NO_REGS) | |
462 | { | |
463 | this = (struct du_chain *) | |
464 | obstack_alloc (&rename_obstack, sizeof (struct du_chain)); | |
fe08a886 | 465 | this->next_use = 0; |
a125d855 RH |
466 | this->next_chain = (*p)->next_chain; |
467 | this->loc = loc; | |
468 | this->insn = insn; | |
469 | this->class = class; | |
470 | this->need_caller_save_reg = 0; | |
fe08a886 BS |
471 | while (*p) |
472 | p = &(*p)->next_use; | |
a125d855 RH |
473 | *p = this; |
474 | return; | |
475 | } | |
541f7d56 | 476 | } |
a125d855 RH |
477 | |
478 | if (action != terminate_overlapping_read || ! exact_match) | |
541f7d56 | 479 | { |
695e4773 GS |
480 | struct du_chain *next = this->next_chain; |
481 | ||
482 | /* Whether the terminated chain can be used for renaming | |
483 | depends on the action and this being an exact match. | |
484 | In either case, we remove this element from open_chains. */ | |
485 | ||
486 | if ((action == terminate_dead || action == terminate_write) | |
487 | && exact_match) | |
488 | { | |
489 | this->next_chain = closed_chains; | |
490 | closed_chains = this; | |
491 | if (rtl_dump_file) | |
492 | fprintf (rtl_dump_file, | |
493 | "Closing chain %s at insn %d (%s)\n", | |
494 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
495 | scan_actions_name[(int) action]); | |
496 | } | |
497 | else | |
498 | { | |
499 | if (rtl_dump_file) | |
500 | fprintf (rtl_dump_file, | |
501 | "Discarding chain %s at insn %d (%s)\n", | |
502 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
503 | scan_actions_name[(int) action]); | |
504 | } | |
505 | *p = next; | |
541f7d56 | 506 | } |
695e4773 GS |
507 | else |
508 | p = &this->next_chain; | |
541f7d56 | 509 | } |
541f7d56 | 510 | } |
7b82b5da SC |
511 | } |
512 | ||
541f7d56 BS |
513 | /* Adapted from find_reloads_address_1. CLASS is INDEX_REG_CLASS or |
514 | BASE_REG_CLASS depending on how the register is being considered. */ | |
7b82b5da | 515 | |
4ca0f257 | 516 | static void |
85941a0a | 517 | scan_rtx_address (insn, loc, class, action, mode) |
7b82b5da | 518 | rtx insn; |
541f7d56 BS |
519 | rtx *loc; |
520 | enum reg_class class; | |
521 | enum scan_actions action; | |
85941a0a | 522 | enum machine_mode mode; |
7b82b5da | 523 | { |
541f7d56 BS |
524 | rtx x = *loc; |
525 | RTX_CODE code = GET_CODE (x); | |
526 | const char *fmt; | |
527 | int i, j; | |
7b82b5da | 528 | |
541f7d56 BS |
529 | if (action == mark_write) |
530 | return; | |
7b82b5da | 531 | |
541f7d56 | 532 | switch (code) |
7b82b5da | 533 | { |
541f7d56 BS |
534 | case PLUS: |
535 | { | |
536 | rtx orig_op0 = XEXP (x, 0); | |
537 | rtx orig_op1 = XEXP (x, 1); | |
538 | RTX_CODE code0 = GET_CODE (orig_op0); | |
539 | RTX_CODE code1 = GET_CODE (orig_op1); | |
540 | rtx op0 = orig_op0; | |
541 | rtx op1 = orig_op1; | |
542 | rtx *locI = NULL; | |
543 | rtx *locB = NULL; | |
544 | ||
545 | if (GET_CODE (op0) == SUBREG) | |
546 | { | |
547 | op0 = SUBREG_REG (op0); | |
548 | code0 = GET_CODE (op0); | |
549 | } | |
7b82b5da | 550 | |
541f7d56 BS |
551 | if (GET_CODE (op1) == SUBREG) |
552 | { | |
553 | op1 = SUBREG_REG (op1); | |
554 | code1 = GET_CODE (op1); | |
555 | } | |
7b82b5da | 556 | |
541f7d56 BS |
557 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE |
558 | || code0 == ZERO_EXTEND || code1 == MEM) | |
559 | { | |
560 | locI = &XEXP (x, 0); | |
561 | locB = &XEXP (x, 1); | |
562 | } | |
563 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
564 | || code1 == ZERO_EXTEND || code0 == MEM) | |
565 | { | |
566 | locI = &XEXP (x, 1); | |
567 | locB = &XEXP (x, 0); | |
568 | } | |
569 | else if (code0 == CONST_INT || code0 == CONST | |
570 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
571 | locB = &XEXP (x, 1); | |
572 | else if (code1 == CONST_INT || code1 == CONST | |
573 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
574 | locB = &XEXP (x, 0); | |
575 | else if (code0 == REG && code1 == REG) | |
576 | { | |
577 | int index_op; | |
578 | ||
579 | if (REG_OK_FOR_INDEX_P (op0) | |
580 | && REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
581 | index_op = 0; | |
582 | else if (REG_OK_FOR_INDEX_P (op1) | |
583 | && REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
584 | index_op = 1; | |
585 | else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
586 | index_op = 0; | |
587 | else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
588 | index_op = 1; | |
589 | else if (REG_OK_FOR_INDEX_P (op1)) | |
590 | index_op = 1; | |
591 | else | |
592 | index_op = 0; | |
593 | ||
594 | locI = &XEXP (x, index_op); | |
595 | locB = &XEXP (x, !index_op); | |
596 | } | |
597 | else if (code0 == REG) | |
598 | { | |
599 | locI = &XEXP (x, 0); | |
600 | locB = &XEXP (x, 1); | |
601 | } | |
602 | else if (code1 == REG) | |
603 | { | |
604 | locI = &XEXP (x, 1); | |
605 | locB = &XEXP (x, 0); | |
606 | } | |
7b82b5da | 607 | |
541f7d56 | 608 | if (locI) |
85941a0a | 609 | scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); |
541f7d56 | 610 | if (locB) |
3dcc68a4 | 611 | scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode); |
541f7d56 BS |
612 | return; |
613 | } | |
7b82b5da | 614 | |
541f7d56 BS |
615 | case POST_INC: |
616 | case POST_DEC: | |
617 | case POST_MODIFY: | |
618 | case PRE_INC: | |
619 | case PRE_DEC: | |
620 | case PRE_MODIFY: | |
621 | #ifndef AUTO_INC_DEC | |
ce73761f RH |
622 | /* If the target doesn't claim to handle autoinc, this must be |
623 | something special, like a stack push. Kill this chain. */ | |
624 | action = terminate_all_read; | |
541f7d56 BS |
625 | #endif |
626 | break; | |
7b82b5da | 627 | |
541f7d56 | 628 | case MEM: |
3dcc68a4 NC |
629 | scan_rtx_address (insn, &XEXP (x, 0), |
630 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 631 | GET_MODE (x)); |
541f7d56 | 632 | return; |
1a43c33f | 633 | |
541f7d56 | 634 | case REG: |
fe08a886 | 635 | scan_rtx_reg (insn, loc, class, action, OP_IN, 0); |
4ca0f257 | 636 | return; |
1a43c33f | 637 | |
541f7d56 BS |
638 | default: |
639 | break; | |
4ca0f257 | 640 | } |
541f7d56 BS |
641 | |
642 | fmt = GET_RTX_FORMAT (code); | |
643 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
4ca0f257 | 644 | { |
541f7d56 | 645 | if (fmt[i] == 'e') |
85941a0a | 646 | scan_rtx_address (insn, &XEXP (x, i), class, action, mode); |
541f7d56 BS |
647 | else if (fmt[i] == 'E') |
648 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
85941a0a | 649 | scan_rtx_address (insn, &XVECEXP (x, i, j), class, action, mode); |
4ca0f257 | 650 | } |
7b82b5da SC |
651 | } |
652 | ||
541f7d56 | 653 | static void |
fe08a886 | 654 | scan_rtx (insn, loc, class, action, type, earlyclobber) |
7b82b5da | 655 | rtx insn; |
541f7d56 BS |
656 | rtx *loc; |
657 | enum reg_class class; | |
658 | enum scan_actions action; | |
659 | enum op_type type; | |
fe08a886 | 660 | int earlyclobber; |
7b82b5da | 661 | { |
541f7d56 BS |
662 | const char *fmt; |
663 | rtx x = *loc; | |
664 | enum rtx_code code = GET_CODE (x); | |
665 | int i, j; | |
7b82b5da | 666 | |
541f7d56 BS |
667 | code = GET_CODE (x); |
668 | switch (code) | |
7b82b5da | 669 | { |
541f7d56 BS |
670 | case CONST: |
671 | case CONST_INT: | |
672 | case CONST_DOUBLE: | |
69ef87e2 | 673 | case CONST_VECTOR: |
541f7d56 BS |
674 | case SYMBOL_REF: |
675 | case LABEL_REF: | |
676 | case CC0: | |
677 | case PC: | |
678 | return; | |
055be976 | 679 | |
541f7d56 | 680 | case REG: |
fe08a886 | 681 | scan_rtx_reg (insn, loc, class, action, type, earlyclobber); |
541f7d56 | 682 | return; |
7b82b5da | 683 | |
541f7d56 | 684 | case MEM: |
3dcc68a4 NC |
685 | scan_rtx_address (insn, &XEXP (x, 0), |
686 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 687 | GET_MODE (x)); |
541f7d56 | 688 | return; |
7b82b5da | 689 | |
541f7d56 | 690 | case SET: |
fe08a886 BS |
691 | scan_rtx (insn, &SET_SRC (x), class, action, OP_IN, 0); |
692 | scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 0); | |
541f7d56 | 693 | return; |
7b82b5da | 694 | |
541f7d56 | 695 | case STRICT_LOW_PART: |
fe08a886 | 696 | scan_rtx (insn, &XEXP (x, 0), class, action, OP_INOUT, earlyclobber); |
541f7d56 | 697 | return; |
7b82b5da | 698 | |
541f7d56 | 699 | case ZERO_EXTRACT: |
3b03c671 | 700 | case SIGN_EXTRACT: |
541f7d56 | 701 | scan_rtx (insn, &XEXP (x, 0), class, action, |
fe08a886 BS |
702 | type == OP_IN ? OP_IN : OP_INOUT, earlyclobber); |
703 | scan_rtx (insn, &XEXP (x, 1), class, action, OP_IN, 0); | |
704 | scan_rtx (insn, &XEXP (x, 2), class, action, OP_IN, 0); | |
541f7d56 | 705 | return; |
7b82b5da | 706 | |
541f7d56 BS |
707 | case POST_INC: |
708 | case PRE_INC: | |
709 | case POST_DEC: | |
710 | case PRE_DEC: | |
711 | case POST_MODIFY: | |
712 | case PRE_MODIFY: | |
713 | /* Should only happen inside MEM. */ | |
714 | abort (); | |
715 | ||
716 | case CLOBBER: | |
fe08a886 | 717 | scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 1); |
541f7d56 | 718 | return; |
7b82b5da | 719 | |
541f7d56 | 720 | case EXPR_LIST: |
fe08a886 | 721 | scan_rtx (insn, &XEXP (x, 0), class, action, type, 0); |
541f7d56 | 722 | if (XEXP (x, 1)) |
fe08a886 | 723 | scan_rtx (insn, &XEXP (x, 1), class, action, type, 0); |
541f7d56 | 724 | return; |
7b82b5da | 725 | |
541f7d56 BS |
726 | default: |
727 | break; | |
728 | } | |
7b82b5da | 729 | |
541f7d56 BS |
730 | fmt = GET_RTX_FORMAT (code); |
731 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7b82b5da SC |
732 | { |
733 | if (fmt[i] == 'e') | |
fe08a886 | 734 | scan_rtx (insn, &XEXP (x, i), class, action, type, 0); |
7b82b5da SC |
735 | else if (fmt[i] == 'E') |
736 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
fe08a886 | 737 | scan_rtx (insn, &XVECEXP (x, i, j), class, action, type, 0); |
7b82b5da | 738 | } |
7b82b5da SC |
739 | } |
740 | ||
541f7d56 | 741 | /* Build def/use chain */ |
7b82b5da | 742 | |
541f7d56 | 743 | static struct du_chain * |
fe08a886 | 744 | build_def_use (bb) |
541f7d56 | 745 | basic_block bb; |
7b82b5da | 746 | { |
541f7d56 | 747 | rtx insn; |
1a43c33f | 748 | |
541f7d56 | 749 | open_chains = closed_chains = NULL; |
1a43c33f | 750 | |
541f7d56 BS |
751 | for (insn = bb->head; ; insn = NEXT_INSN (insn)) |
752 | { | |
753 | if (INSN_P (insn)) | |
754 | { | |
755 | int n_ops; | |
756 | rtx note; | |
757 | rtx old_operands[MAX_RECOG_OPERANDS]; | |
758 | rtx old_dups[MAX_DUP_OPERANDS]; | |
ea475b23 | 759 | int i, icode; |
541f7d56 BS |
760 | int alt; |
761 | int predicated; | |
762 | ||
541f7d56 BS |
763 | /* Process the insn, determining its effect on the def-use |
764 | chains. We perform the following steps with the register | |
765 | references in the insn: | |
766 | (1) Any read that overlaps an open chain, but doesn't exactly | |
767 | match, causes that chain to be closed. We can't deal | |
768 | with overlaps yet. | |
769 | (2) Any read outside an operand causes any chain it overlaps | |
770 | with to be closed, since we can't replace it. | |
771 | (3) Any read inside an operand is added if there's already | |
772 | an open chain for it. | |
773 | (4) For any REG_DEAD note we find, close open chains that | |
774 | overlap it. | |
775 | (5) For any write we find, close open chains that overlap it. | |
776 | (6) For any write we find in an operand, make a new chain. | |
777 | (7) For any REG_UNUSED, close any chains we just opened. */ | |
778 | ||
2ed1f154 | 779 | icode = recog_memoized (insn); |
541f7d56 | 780 | extract_insn (insn); |
4be9e9cb | 781 | if (! constrain_operands (1)) |
3b03c671 | 782 | fatal_insn_not_found (insn); |
541f7d56 BS |
783 | preprocess_constraints (); |
784 | alt = which_alternative; | |
785 | n_ops = recog_data.n_operands; | |
786 | ||
787 | /* Simplify the code below by rewriting things to reflect | |
788 | matching constraints. Also promote OP_OUT to OP_INOUT | |
789 | in predicated instructions. */ | |
790 | ||
791 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
792 | for (i = 0; i < n_ops; ++i) | |
7b82b5da | 793 | { |
541f7d56 BS |
794 | int matches = recog_op_alt[i][alt].matches; |
795 | if (matches >= 0) | |
796 | recog_op_alt[i][alt].class = recog_op_alt[matches][alt].class; | |
797 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 | |
798 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
799 | recog_data.operand_type[i] = OP_INOUT; | |
7b82b5da | 800 | } |
1a43c33f | 801 | |
541f7d56 BS |
802 | /* Step 1: Close chains for which we have overlapping reads. */ |
803 | for (i = 0; i < n_ops; i++) | |
804 | scan_rtx (insn, recog_data.operand_loc[i], | |
805 | NO_REGS, terminate_overlapping_read, | |
fe08a886 | 806 | recog_data.operand_type[i], 0); |
1a43c33f | 807 | |
541f7d56 | 808 | /* Step 2: Close chains for which we have reads outside operands. |
3b03c671 | 809 | We do this by munging all operands into CC0, and closing |
541f7d56 | 810 | everything remaining. */ |
7b82b5da | 811 | |
541f7d56 | 812 | for (i = 0; i < n_ops; i++) |
1a43c33f | 813 | { |
541f7d56 BS |
814 | old_operands[i] = recog_data.operand[i]; |
815 | /* Don't squash match_operator or match_parallel here, since | |
3b03c671 | 816 | we don't know that all of the contained registers are |
541f7d56 BS |
817 | reachable by proper operands. */ |
818 | if (recog_data.constraints[i][0] == '\0') | |
819 | continue; | |
820 | *recog_data.operand_loc[i] = cc0_rtx; | |
821 | } | |
822 | for (i = 0; i < recog_data.n_dups; i++) | |
823 | { | |
ea475b23 JJ |
824 | int dup_num = recog_data.dup_num[i]; |
825 | ||
541f7d56 BS |
826 | old_dups[i] = *recog_data.dup_loc[i]; |
827 | *recog_data.dup_loc[i] = cc0_rtx; | |
ea475b23 JJ |
828 | |
829 | /* For match_dup of match_operator or match_parallel, share | |
830 | them, so that we don't miss changes in the dup. */ | |
831 | if (icode >= 0 | |
832 | && insn_data[icode].operand[dup_num].eliminable == 0) | |
833 | old_dups[i] = recog_data.operand[dup_num]; | |
1a43c33f | 834 | } |
1a43c33f | 835 | |
fe08a886 BS |
836 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read, |
837 | OP_IN, 0); | |
1a43c33f | 838 | |
541f7d56 BS |
839 | for (i = 0; i < recog_data.n_dups; i++) |
840 | *recog_data.dup_loc[i] = old_dups[i]; | |
841 | for (i = 0; i < n_ops; i++) | |
842 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 843 | |
541f7d56 BS |
844 | /* Step 2B: Can't rename function call argument registers. */ |
845 | if (GET_CODE (insn) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (insn)) | |
846 | scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), | |
fe08a886 | 847 | NO_REGS, terminate_all_read, OP_IN, 0); |
7b82b5da | 848 | |
3ada20ee RH |
849 | /* Step 2C: Can't rename asm operands that were originally |
850 | hard registers. */ | |
851 | if (asm_noperands (PATTERN (insn)) > 0) | |
852 | for (i = 0; i < n_ops; i++) | |
853 | { | |
854 | rtx *loc = recog_data.operand_loc[i]; | |
855 | rtx op = *loc; | |
856 | ||
857 | if (GET_CODE (op) == REG | |
858 | && REGNO (op) == ORIGINAL_REGNO (op) | |
859 | && (recog_data.operand_type[i] == OP_IN | |
860 | || recog_data.operand_type[i] == OP_INOUT)) | |
861 | scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0); | |
862 | } | |
863 | ||
541f7d56 BS |
864 | /* Step 3: Append to chains for reads inside operands. */ |
865 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
866 | { | |
867 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
868 | rtx *loc = (i < n_ops | |
869 | ? recog_data.operand_loc[opn] | |
870 | : recog_data.dup_loc[i - n_ops]); | |
871 | enum reg_class class = recog_op_alt[opn][alt].class; | |
872 | enum op_type type = recog_data.operand_type[opn]; | |
873 | ||
874 | /* Don't scan match_operand here, since we've no reg class | |
875 | information to pass down. Any operands that we could | |
876 | substitute in will be represented elsewhere. */ | |
877 | if (recog_data.constraints[opn][0] == '\0') | |
878 | continue; | |
7b82b5da | 879 | |
541f7d56 | 880 | if (recog_op_alt[opn][alt].is_address) |
85941a0a | 881 | scan_rtx_address (insn, loc, class, mark_read, VOIDmode); |
541f7d56 | 882 | else |
fe08a886 | 883 | scan_rtx (insn, loc, class, mark_read, type, 0); |
541f7d56 | 884 | } |
7b82b5da | 885 | |
6fb85418 BS |
886 | /* Step 4: Close chains for registers that die here. |
887 | Also record updates for REG_INC notes. */ | |
541f7d56 | 888 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
6fb85418 BS |
889 | { |
890 | if (REG_NOTE_KIND (note) == REG_DEAD) | |
fe08a886 BS |
891 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
892 | OP_IN, 0); | |
6fb85418 | 893 | else if (REG_NOTE_KIND (note) == REG_INC) |
fe08a886 BS |
894 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, |
895 | OP_INOUT, 0); | |
6fb85418 | 896 | } |
1a43c33f | 897 | |
541f7d56 BS |
898 | /* Step 4B: If this is a call, any chain live at this point |
899 | requires a caller-saved reg. */ | |
900 | if (GET_CODE (insn) == CALL_INSN) | |
901 | { | |
902 | struct du_chain *p; | |
903 | for (p = open_chains; p; p = p->next_chain) | |
fe08a886 | 904 | p->need_caller_save_reg = 1; |
541f7d56 | 905 | } |
7b82b5da | 906 | |
541f7d56 BS |
907 | /* Step 5: Close open chains that overlap writes. Similar to |
908 | step 2, we hide in-out operands, since we do not want to | |
909 | close these chains. */ | |
7b82b5da | 910 | |
541f7d56 BS |
911 | for (i = 0; i < n_ops; i++) |
912 | { | |
913 | old_operands[i] = recog_data.operand[i]; | |
914 | if (recog_data.operand_type[i] == OP_INOUT) | |
915 | *recog_data.operand_loc[i] = cc0_rtx; | |
916 | } | |
917 | for (i = 0; i < recog_data.n_dups; i++) | |
918 | { | |
919 | int opn = recog_data.dup_num[i]; | |
920 | old_dups[i] = *recog_data.dup_loc[i]; | |
921 | if (recog_data.operand_type[opn] == OP_INOUT) | |
922 | *recog_data.dup_loc[i] = cc0_rtx; | |
923 | } | |
7b82b5da | 924 | |
fe08a886 | 925 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0); |
7b82b5da | 926 | |
541f7d56 BS |
927 | for (i = 0; i < recog_data.n_dups; i++) |
928 | *recog_data.dup_loc[i] = old_dups[i]; | |
929 | for (i = 0; i < n_ops; i++) | |
930 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 931 | |
541f7d56 BS |
932 | /* Step 6: Begin new chains for writes inside operands. */ |
933 | /* ??? Many targets have output constraints on the SET_DEST | |
934 | of a call insn, which is stupid, since these are certainly | |
3ada20ee RH |
935 | ABI defined hard registers. Don't change calls at all. |
936 | Similarly take special care for asm statement that originally | |
937 | referenced hard registers. */ | |
938 | if (asm_noperands (PATTERN (insn)) > 0) | |
939 | { | |
940 | for (i = 0; i < n_ops; i++) | |
941 | if (recog_data.operand_type[i] == OP_OUT) | |
942 | { | |
943 | rtx *loc = recog_data.operand_loc[i]; | |
944 | rtx op = *loc; | |
945 | enum reg_class class = recog_op_alt[i][alt].class; | |
946 | ||
947 | if (GET_CODE (op) == REG | |
3b03c671 | 948 | && REGNO (op) == ORIGINAL_REGNO (op)) |
3ada20ee RH |
949 | continue; |
950 | ||
951 | scan_rtx (insn, loc, class, mark_write, OP_OUT, | |
952 | recog_op_alt[i][alt].earlyclobber); | |
953 | } | |
954 | } | |
955 | else if (GET_CODE (insn) != CALL_INSN) | |
541f7d56 BS |
956 | for (i = 0; i < n_ops + recog_data.n_dups; i++) |
957 | { | |
958 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
959 | rtx *loc = (i < n_ops | |
960 | ? recog_data.operand_loc[opn] | |
961 | : recog_data.dup_loc[i - n_ops]); | |
962 | enum reg_class class = recog_op_alt[opn][alt].class; | |
963 | ||
964 | if (recog_data.operand_type[opn] == OP_OUT) | |
fe08a886 BS |
965 | scan_rtx (insn, loc, class, mark_write, OP_OUT, |
966 | recog_op_alt[opn][alt].earlyclobber); | |
541f7d56 | 967 | } |
7b82b5da | 968 | |
541f7d56 BS |
969 | /* Step 7: Close chains for registers that were never |
970 | really used here. */ | |
971 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
972 | if (REG_NOTE_KIND (note) == REG_UNUSED) | |
fe08a886 BS |
973 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
974 | OP_IN, 0); | |
541f7d56 BS |
975 | } |
976 | if (insn == bb->end) | |
977 | break; | |
978 | } | |
7b82b5da | 979 | |
541f7d56 BS |
980 | /* Since we close every chain when we find a REG_DEAD note, anything that |
981 | is still open lives past the basic block, so it can't be renamed. */ | |
982 | return closed_chains; | |
983 | } | |
7b82b5da | 984 | |
541f7d56 BS |
985 | /* Dump all def/use chains in CHAINS to RTL_DUMP_FILE. They are |
986 | printed in reverse order as that's how we build them. */ | |
7b82b5da | 987 | |
541f7d56 BS |
988 | static void |
989 | dump_def_use_chain (chains) | |
990 | struct du_chain *chains; | |
991 | { | |
992 | while (chains) | |
1a43c33f | 993 | { |
541f7d56 BS |
994 | struct du_chain *this = chains; |
995 | int r = REGNO (*this->loc); | |
996 | int nregs = HARD_REGNO_NREGS (r, GET_MODE (*this->loc)); | |
997 | fprintf (rtl_dump_file, "Register %s (%d):", reg_names[r], nregs); | |
998 | while (this) | |
999 | { | |
1000 | fprintf (rtl_dump_file, " %d [%s]", INSN_UID (this->insn), | |
1001 | reg_class_names[this->class]); | |
1002 | this = this->next_use; | |
1003 | } | |
1004 | fprintf (rtl_dump_file, "\n"); | |
1005 | chains = chains->next_chain; | |
1a43c33f | 1006 | } |
7b82b5da | 1007 | } |
8582c27b RH |
1008 | \f |
1009 | /* The following code does forward propagation of hard register copies. | |
1010 | The object is to eliminate as many dependencies as possible, so that | |
1011 | we have the most scheduling freedom. As a side effect, we also clean | |
3b03c671 | 1012 | up some silly register allocation decisions made by reload. This |
8582c27b RH |
1013 | code may be obsoleted by a new register allocator. */ |
1014 | ||
1015 | /* For each register, we have a list of registers that contain the same | |
3b03c671 | 1016 | value. The OLDEST_REGNO field points to the head of the list, and |
8582c27b RH |
1017 | the NEXT_REGNO field runs through the list. The MODE field indicates |
1018 | what mode the data is known to be in; this field is VOIDmode when the | |
1019 | register is not known to contain valid data. */ | |
1020 | ||
1021 | struct value_data_entry | |
1022 | { | |
1023 | enum machine_mode mode; | |
1024 | unsigned int oldest_regno; | |
1025 | unsigned int next_regno; | |
1026 | }; | |
1027 | ||
1028 | struct value_data | |
1029 | { | |
1030 | struct value_data_entry e[FIRST_PSEUDO_REGISTER]; | |
752ae914 | 1031 | unsigned int max_value_regs; |
8582c27b RH |
1032 | }; |
1033 | ||
1034 | static void kill_value_regno PARAMS ((unsigned, struct value_data *)); | |
1035 | static void kill_value PARAMS ((rtx, struct value_data *)); | |
752ae914 RH |
1036 | static void set_value_regno PARAMS ((unsigned, enum machine_mode, |
1037 | struct value_data *)); | |
8582c27b RH |
1038 | static void init_value_data PARAMS ((struct value_data *)); |
1039 | static void kill_clobbered_value PARAMS ((rtx, rtx, void *)); | |
1040 | static void kill_set_value PARAMS ((rtx, rtx, void *)); | |
1041 | static int kill_autoinc_value PARAMS ((rtx *, void *)); | |
1042 | static void copy_value PARAMS ((rtx, rtx, struct value_data *)); | |
8610ba70 RH |
1043 | static bool mode_change_ok PARAMS ((enum machine_mode, enum machine_mode, |
1044 | unsigned int)); | |
61dde664 R |
1045 | static rtx maybe_mode_change PARAMS ((enum machine_mode, enum machine_mode, |
1046 | enum machine_mode, unsigned int, | |
1047 | unsigned int)); | |
3ada20ee RH |
1048 | static rtx find_oldest_value_reg PARAMS ((enum reg_class, rtx, |
1049 | struct value_data *)); | |
8582c27b RH |
1050 | static bool replace_oldest_value_reg PARAMS ((rtx *, enum reg_class, rtx, |
1051 | struct value_data *)); | |
1052 | static bool replace_oldest_value_addr PARAMS ((rtx *, enum reg_class, | |
1053 | enum machine_mode, rtx, | |
1054 | struct value_data *)); | |
1055 | static bool replace_oldest_value_mem PARAMS ((rtx, rtx, struct value_data *)); | |
1056 | static bool copyprop_hardreg_forward_1 PARAMS ((basic_block, | |
3b03c671 | 1057 | struct value_data *)); |
8582c27b RH |
1058 | extern void debug_value_data PARAMS ((struct value_data *)); |
1059 | #ifdef ENABLE_CHECKING | |
1060 | static void validate_value_data PARAMS ((struct value_data *)); | |
1061 | #endif | |
1062 | ||
1063 | /* Kill register REGNO. This involves removing it from any value lists, | |
1064 | and resetting the value mode to VOIDmode. */ | |
1065 | ||
1066 | static void | |
1067 | kill_value_regno (regno, vd) | |
1068 | unsigned int regno; | |
1069 | struct value_data *vd; | |
1070 | { | |
1071 | unsigned int i, next; | |
1072 | ||
1073 | if (vd->e[regno].oldest_regno != regno) | |
1074 | { | |
1075 | for (i = vd->e[regno].oldest_regno; | |
1076 | vd->e[i].next_regno != regno; | |
1077 | i = vd->e[i].next_regno) | |
1078 | continue; | |
3de23727 | 1079 | vd->e[i].next_regno = vd->e[regno].next_regno; |
8582c27b RH |
1080 | } |
1081 | else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM) | |
1082 | { | |
1083 | for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno) | |
3b03c671 | 1084 | vd->e[i].oldest_regno = next; |
8582c27b RH |
1085 | } |
1086 | ||
1087 | vd->e[regno].mode = VOIDmode; | |
1088 | vd->e[regno].oldest_regno = regno; | |
1089 | vd->e[regno].next_regno = INVALID_REGNUM; | |
1090 | ||
1091 | #ifdef ENABLE_CHECKING | |
1092 | validate_value_data (vd); | |
1093 | #endif | |
1094 | } | |
1095 | ||
1096 | /* Kill X. This is a convenience function for kill_value_regno | |
3de23727 | 1097 | so that we mind the mode the register is in. */ |
8582c27b RH |
1098 | |
1099 | static void | |
1100 | kill_value (x, vd) | |
1101 | rtx x; | |
1102 | struct value_data *vd; | |
1103 | { | |
8686336f JH |
1104 | /* SUBREGS are supposed to have been eliminated by now. But some |
1105 | ports, e.g. i386 sse, use them to smuggle vector type information | |
1106 | through to instruction selection. Each such SUBREG should simplify, | |
1eeeb6a4 | 1107 | so if we get a NULL we've done something wrong elsewhere. */ |
8686336f JH |
1108 | |
1109 | if (GET_CODE (x) == SUBREG) | |
1110 | x = simplify_subreg (GET_MODE (x), SUBREG_REG (x), | |
1111 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
8582c27b | 1112 | if (REG_P (x)) |
3de23727 RH |
1113 | { |
1114 | unsigned int regno = REGNO (x); | |
1115 | unsigned int n = HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
752ae914 | 1116 | unsigned int i, j; |
3de23727 | 1117 | |
752ae914 | 1118 | /* Kill the value we're told to kill. */ |
3de23727 RH |
1119 | for (i = 0; i < n; ++i) |
1120 | kill_value_regno (regno + i, vd); | |
752ae914 RH |
1121 | |
1122 | /* Kill everything that overlapped what we're told to kill. */ | |
1123 | if (regno < vd->max_value_regs) | |
1124 | j = 0; | |
1125 | else | |
1126 | j = regno - vd->max_value_regs; | |
1127 | for (; j < regno; ++j) | |
1128 | { | |
1129 | if (vd->e[j].mode == VOIDmode) | |
1130 | continue; | |
2b672c08 | 1131 | n = HARD_REGNO_NREGS (j, vd->e[j].mode); |
752ae914 RH |
1132 | if (j + n > regno) |
1133 | for (i = 0; i < n; ++i) | |
1134 | kill_value_regno (j + i, vd); | |
1135 | } | |
3de23727 | 1136 | } |
8582c27b RH |
1137 | } |
1138 | ||
752ae914 RH |
1139 | /* Remember that REGNO is valid in MODE. */ |
1140 | ||
1141 | static void | |
1142 | set_value_regno (regno, mode, vd) | |
1143 | unsigned int regno; | |
1144 | enum machine_mode mode; | |
1145 | struct value_data *vd; | |
1146 | { | |
1147 | unsigned int nregs; | |
1148 | ||
1149 | vd->e[regno].mode = mode; | |
1150 | ||
1151 | nregs = HARD_REGNO_NREGS (regno, mode); | |
1152 | if (nregs > vd->max_value_regs) | |
1153 | vd->max_value_regs = nregs; | |
1154 | } | |
1155 | ||
8582c27b RH |
1156 | /* Initialize VD such that there are no known relationships between regs. */ |
1157 | ||
1158 | static void | |
1159 | init_value_data (vd) | |
1160 | struct value_data *vd; | |
1161 | { | |
1162 | int i; | |
1163 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1164 | { | |
1165 | vd->e[i].mode = VOIDmode; | |
1166 | vd->e[i].oldest_regno = i; | |
1167 | vd->e[i].next_regno = INVALID_REGNUM; | |
1168 | } | |
752ae914 | 1169 | vd->max_value_regs = 0; |
8582c27b RH |
1170 | } |
1171 | ||
1172 | /* Called through note_stores. If X is clobbered, kill its value. */ | |
1173 | ||
1174 | static void | |
1175 | kill_clobbered_value (x, set, data) | |
1176 | rtx x; | |
1177 | rtx set; | |
1178 | void *data; | |
1179 | { | |
1180 | struct value_data *vd = data; | |
1181 | if (GET_CODE (set) == CLOBBER) | |
1182 | kill_value (x, vd); | |
1183 | } | |
1184 | ||
3b03c671 | 1185 | /* Called through note_stores. If X is set, not clobbered, kill its |
8582c27b RH |
1186 | current value and install it as the root of its own value list. */ |
1187 | ||
1188 | static void | |
1189 | kill_set_value (x, set, data) | |
1190 | rtx x; | |
1191 | rtx set; | |
1192 | void *data; | |
1193 | { | |
1194 | struct value_data *vd = data; | |
c43a12b5 | 1195 | if (GET_CODE (set) != CLOBBER) |
8582c27b | 1196 | { |
3de23727 | 1197 | kill_value (x, vd); |
c43a12b5 | 1198 | if (REG_P (x)) |
3b03c671 | 1199 | set_value_regno (REGNO (x), GET_MODE (x), vd); |
8582c27b RH |
1200 | } |
1201 | } | |
1202 | ||
1203 | /* Called through for_each_rtx. Kill any register used as the base of an | |
1204 | auto-increment expression, and install that register as the root of its | |
1205 | own value list. */ | |
1206 | ||
1207 | static int | |
1208 | kill_autoinc_value (px, data) | |
1209 | rtx *px; | |
1210 | void *data; | |
1211 | { | |
1212 | rtx x = *px; | |
1213 | struct value_data *vd = data; | |
1214 | ||
1215 | if (GET_RTX_CLASS (GET_CODE (x)) == 'a') | |
1216 | { | |
3de23727 RH |
1217 | x = XEXP (x, 0); |
1218 | kill_value (x, vd); | |
752ae914 | 1219 | set_value_regno (REGNO (x), Pmode, vd); |
8582c27b RH |
1220 | return -1; |
1221 | } | |
1222 | ||
1223 | return 0; | |
1224 | } | |
1225 | ||
1226 | /* Assert that SRC has been copied to DEST. Adjust the data structures | |
1227 | to reflect that SRC contains an older copy of the shared value. */ | |
1228 | ||
1229 | static void | |
1230 | copy_value (dest, src, vd) | |
1231 | rtx dest; | |
1232 | rtx src; | |
1233 | struct value_data *vd; | |
1234 | { | |
1235 | unsigned int dr = REGNO (dest); | |
1236 | unsigned int sr = REGNO (src); | |
21e16bd6 | 1237 | unsigned int dn, sn; |
8582c27b RH |
1238 | unsigned int i; |
1239 | ||
1240 | /* ??? At present, it's possible to see noop sets. It'd be nice if | |
1241 | this were cleaned up beforehand... */ | |
1242 | if (sr == dr) | |
1243 | return; | |
1244 | ||
1245 | /* Do not propagate copies to the stack pointer, as that can leave | |
1246 | memory accesses with no scheduling dependancy on the stack update. */ | |
1247 | if (dr == STACK_POINTER_REGNUM) | |
1248 | return; | |
1249 | ||
1250 | /* Likewise with the frame pointer, if we're using one. */ | |
1251 | if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM) | |
1252 | return; | |
1253 | ||
21e16bd6 RH |
1254 | /* If SRC and DEST overlap, don't record anything. */ |
1255 | dn = HARD_REGNO_NREGS (dr, GET_MODE (dest)); | |
1256 | sn = HARD_REGNO_NREGS (sr, GET_MODE (dest)); | |
1257 | if ((dr > sr && dr < sr + sn) | |
1258 | || (sr > dr && sr < dr + dn)) | |
1259 | return; | |
1260 | ||
8582c27b RH |
1261 | /* If SRC had no assigned mode (i.e. we didn't know it was live) |
1262 | assign it now and assume the value came from an input argument | |
1263 | or somesuch. */ | |
1264 | if (vd->e[sr].mode == VOIDmode) | |
752ae914 | 1265 | set_value_regno (sr, vd->e[dr].mode, vd); |
8582c27b | 1266 | |
27d30956 | 1267 | /* If we are narrowing the input to a smaller number of hard regs, |
dbf65c2f R |
1268 | and it is in big endian, we are really extracting a high part. |
1269 | Since we generally associate a low part of a value with the value itself, | |
1270 | we must not do the same for the high part. | |
1271 | Note we can still get low parts for the same mode combination through | |
1272 | a two-step copy involving differently sized hard regs. | |
1273 | Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each: | |
1274 | (set (reg:DI r0) (reg:DI fr0)) | |
1275 | (set (reg:SI fr2) (reg:SI r0)) | |
1276 | loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while: | |
1277 | (set (reg:SI fr2) (reg:SI fr0)) | |
1278 | loads the high part of (reg:DI fr0) into fr2. | |
1279 | ||
1280 | We can't properly represent the latter case in our tables, so don't | |
1281 | record anything then. */ | |
1282 | else if (sn < (unsigned int) HARD_REGNO_NREGS (sr, vd->e[sr].mode) | |
1283 | && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD | |
1284 | ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)) | |
1285 | return; | |
1286 | ||
42bd17b7 RH |
1287 | /* If SRC had been assigned a mode narrower than the copy, we can't |
1288 | link DEST into the chain, because not all of the pieces of the | |
1289 | copy came from oldest_regno. */ | |
1290 | else if (sn > (unsigned int) HARD_REGNO_NREGS (sr, vd->e[sr].mode)) | |
1291 | return; | |
1292 | ||
8582c27b RH |
1293 | /* Link DR at the end of the value chain used by SR. */ |
1294 | ||
1295 | vd->e[dr].oldest_regno = vd->e[sr].oldest_regno; | |
1296 | ||
1297 | for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno) | |
1298 | continue; | |
1299 | vd->e[i].next_regno = dr; | |
1300 | ||
1301 | #ifdef ENABLE_CHECKING | |
1302 | validate_value_data (vd); | |
1303 | #endif | |
1304 | } | |
1305 | ||
8610ba70 RH |
1306 | /* Return true if a mode change from ORIG to NEW is allowed for REGNO. */ |
1307 | ||
1308 | static bool | |
1309 | mode_change_ok (orig_mode, new_mode, regno) | |
1310 | enum machine_mode orig_mode, new_mode; | |
88f92c0f | 1311 | unsigned int regno ATTRIBUTE_UNUSED; |
8610ba70 RH |
1312 | { |
1313 | if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode)) | |
1314 | return false; | |
1315 | ||
1316 | #ifdef CLASS_CANNOT_CHANGE_MODE | |
1317 | if (TEST_HARD_REG_BIT (reg_class_contents[CLASS_CANNOT_CHANGE_MODE], regno) | |
1318 | && CLASS_CANNOT_CHANGE_MODE_P (orig_mode, new_mode)) | |
1319 | return false; | |
1320 | #endif | |
1321 | ||
1322 | return true; | |
1323 | } | |
1324 | ||
61dde664 R |
1325 | /* Register REGNO was originally set in ORIG_MODE. It - or a copy of it - |
1326 | was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed | |
1327 | in NEW_MODE. | |
1328 | Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */ | |
1329 | ||
1330 | static rtx | |
1331 | maybe_mode_change (orig_mode, copy_mode, new_mode, regno, copy_regno) | |
1332 | enum machine_mode orig_mode, copy_mode, new_mode; | |
1333 | unsigned int regno, copy_regno; | |
1334 | { | |
1335 | if (orig_mode == new_mode) | |
1336 | return gen_rtx_raw_REG (new_mode, regno); | |
1337 | else if (mode_change_ok (orig_mode, new_mode, regno)) | |
1338 | { | |
1339 | int copy_nregs = HARD_REGNO_NREGS (copy_regno, copy_mode); | |
1340 | int use_nregs = HARD_REGNO_NREGS (copy_regno, new_mode); | |
1341 | int copy_offset | |
1342 | = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs); | |
1343 | int offset | |
1344 | = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset; | |
1345 | int byteoffset = offset % UNITS_PER_WORD; | |
1346 | int wordoffset = offset - byteoffset; | |
1347 | ||
1348 | offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) | |
1349 | + (BYTES_BIG_ENDIAN ? byteoffset : 0)); | |
1350 | return gen_rtx_raw_REG (new_mode, | |
1351 | regno + subreg_regno_offset (regno, orig_mode, | |
1352 | offset, | |
1353 | new_mode)); | |
1354 | } | |
1355 | return NULL_RTX; | |
1356 | } | |
1357 | ||
8582c27b RH |
1358 | /* Find the oldest copy of the value contained in REGNO that is in |
1359 | register class CLASS and has mode MODE. If found, return an rtx | |
1360 | of that oldest register, otherwise return NULL. */ | |
1361 | ||
1362 | static rtx | |
3ada20ee | 1363 | find_oldest_value_reg (class, reg, vd) |
8582c27b | 1364 | enum reg_class class; |
3ada20ee | 1365 | rtx reg; |
8582c27b RH |
1366 | struct value_data *vd; |
1367 | { | |
3ada20ee RH |
1368 | unsigned int regno = REGNO (reg); |
1369 | enum machine_mode mode = GET_MODE (reg); | |
8582c27b RH |
1370 | unsigned int i; |
1371 | ||
57d1019b RH |
1372 | /* If we are accessing REG in some mode other that what we set it in, |
1373 | make sure that the replacement is valid. In particular, consider | |
1374 | (set (reg:DI r11) (...)) | |
1375 | (set (reg:SI r9) (reg:SI r11)) | |
1376 | (set (reg:SI r10) (...)) | |
1377 | (set (...) (reg:DI r9)) | |
1378 | Replacing r9 with r11 is invalid. */ | |
1379 | if (mode != vd->e[regno].mode) | |
1380 | { | |
1381 | if (HARD_REGNO_NREGS (regno, mode) | |
1382 | > HARD_REGNO_NREGS (regno, vd->e[regno].mode)) | |
1383 | return NULL_RTX; | |
1384 | } | |
1385 | ||
8582c27b | 1386 | for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) |
cffa2189 R |
1387 | { |
1388 | enum machine_mode oldmode = vd->e[i].mode; | |
61dde664 | 1389 | rtx new; |
cffa2189 | 1390 | |
8610ba70 | 1391 | if (TEST_HARD_REG_BIT (reg_class_contents[class], i) |
61dde664 R |
1392 | && (new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, |
1393 | regno))) | |
3ada20ee | 1394 | { |
3ada20ee RH |
1395 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg); |
1396 | return new; | |
1397 | } | |
cffa2189 | 1398 | } |
8582c27b RH |
1399 | |
1400 | return NULL_RTX; | |
1401 | } | |
1402 | ||
1403 | /* If possible, replace the register at *LOC with the oldest register | |
1404 | in register class CLASS. Return true if successfully replaced. */ | |
1405 | ||
1406 | static bool | |
1407 | replace_oldest_value_reg (loc, class, insn, vd) | |
1408 | rtx *loc; | |
1409 | enum reg_class class; | |
1410 | rtx insn; | |
1411 | struct value_data *vd; | |
1412 | { | |
3ada20ee | 1413 | rtx new = find_oldest_value_reg (class, *loc, vd); |
8582c27b RH |
1414 | if (new) |
1415 | { | |
1416 | if (rtl_dump_file) | |
1417 | fprintf (rtl_dump_file, "insn %u: replaced reg %u with %u\n", | |
1418 | INSN_UID (insn), REGNO (*loc), REGNO (new)); | |
1419 | ||
1420 | *loc = new; | |
1421 | return true; | |
1422 | } | |
1423 | return false; | |
1424 | } | |
1425 | ||
1426 | /* Similar to replace_oldest_value_reg, but *LOC contains an address. | |
1427 | Adapted from find_reloads_address_1. CLASS is INDEX_REG_CLASS or | |
1428 | BASE_REG_CLASS depending on how the register is being considered. */ | |
1429 | ||
1430 | static bool | |
1431 | replace_oldest_value_addr (loc, class, mode, insn, vd) | |
1432 | rtx *loc; | |
1433 | enum reg_class class; | |
1434 | enum machine_mode mode; | |
1435 | rtx insn; | |
1436 | struct value_data *vd; | |
1437 | { | |
1438 | rtx x = *loc; | |
1439 | RTX_CODE code = GET_CODE (x); | |
1440 | const char *fmt; | |
1441 | int i, j; | |
1442 | bool changed = false; | |
1443 | ||
1444 | switch (code) | |
1445 | { | |
1446 | case PLUS: | |
1447 | { | |
1448 | rtx orig_op0 = XEXP (x, 0); | |
1449 | rtx orig_op1 = XEXP (x, 1); | |
1450 | RTX_CODE code0 = GET_CODE (orig_op0); | |
1451 | RTX_CODE code1 = GET_CODE (orig_op1); | |
1452 | rtx op0 = orig_op0; | |
1453 | rtx op1 = orig_op1; | |
1454 | rtx *locI = NULL; | |
1455 | rtx *locB = NULL; | |
1456 | ||
1457 | if (GET_CODE (op0) == SUBREG) | |
1458 | { | |
1459 | op0 = SUBREG_REG (op0); | |
1460 | code0 = GET_CODE (op0); | |
1461 | } | |
1462 | ||
1463 | if (GET_CODE (op1) == SUBREG) | |
1464 | { | |
1465 | op1 = SUBREG_REG (op1); | |
1466 | code1 = GET_CODE (op1); | |
1467 | } | |
1468 | ||
1469 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE | |
1470 | || code0 == ZERO_EXTEND || code1 == MEM) | |
1471 | { | |
1472 | locI = &XEXP (x, 0); | |
1473 | locB = &XEXP (x, 1); | |
1474 | } | |
1475 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
1476 | || code1 == ZERO_EXTEND || code0 == MEM) | |
1477 | { | |
1478 | locI = &XEXP (x, 1); | |
1479 | locB = &XEXP (x, 0); | |
1480 | } | |
1481 | else if (code0 == CONST_INT || code0 == CONST | |
1482 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
1483 | locB = &XEXP (x, 1); | |
1484 | else if (code1 == CONST_INT || code1 == CONST | |
1485 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
1486 | locB = &XEXP (x, 0); | |
1487 | else if (code0 == REG && code1 == REG) | |
1488 | { | |
1489 | int index_op; | |
1490 | ||
1491 | if (REG_OK_FOR_INDEX_P (op0) | |
1492 | && REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
1493 | index_op = 0; | |
1494 | else if (REG_OK_FOR_INDEX_P (op1) | |
1495 | && REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
1496 | index_op = 1; | |
1497 | else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
1498 | index_op = 0; | |
1499 | else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
1500 | index_op = 1; | |
1501 | else if (REG_OK_FOR_INDEX_P (op1)) | |
1502 | index_op = 1; | |
1503 | else | |
1504 | index_op = 0; | |
1505 | ||
1506 | locI = &XEXP (x, index_op); | |
1507 | locB = &XEXP (x, !index_op); | |
1508 | } | |
1509 | else if (code0 == REG) | |
1510 | { | |
1511 | locI = &XEXP (x, 0); | |
1512 | locB = &XEXP (x, 1); | |
1513 | } | |
1514 | else if (code1 == REG) | |
1515 | { | |
1516 | locI = &XEXP (x, 1); | |
1517 | locB = &XEXP (x, 0); | |
1518 | } | |
1519 | ||
1520 | if (locI) | |
1521 | changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode, | |
3b03c671 | 1522 | insn, vd); |
8582c27b | 1523 | if (locB) |
3dcc68a4 NC |
1524 | changed |= replace_oldest_value_addr (locB, |
1525 | MODE_BASE_REG_CLASS (mode), | |
1526 | mode, insn, vd); | |
8582c27b RH |
1527 | return changed; |
1528 | } | |
1529 | ||
1530 | case POST_INC: | |
1531 | case POST_DEC: | |
1532 | case POST_MODIFY: | |
1533 | case PRE_INC: | |
1534 | case PRE_DEC: | |
1535 | case PRE_MODIFY: | |
1536 | return false; | |
1537 | ||
1538 | case MEM: | |
1539 | return replace_oldest_value_mem (x, insn, vd); | |
1540 | ||
1541 | case REG: | |
1542 | return replace_oldest_value_reg (loc, class, insn, vd); | |
1543 | ||
1544 | default: | |
1545 | break; | |
1546 | } | |
1547 | ||
1548 | fmt = GET_RTX_FORMAT (code); | |
1549 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1550 | { | |
1551 | if (fmt[i] == 'e') | |
1552 | changed |= replace_oldest_value_addr (&XEXP (x, i), class, mode, | |
1553 | insn, vd); | |
1554 | else if (fmt[i] == 'E') | |
1555 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
1556 | changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), class, | |
3b03c671 | 1557 | mode, insn, vd); |
8582c27b RH |
1558 | } |
1559 | ||
1560 | return changed; | |
1561 | } | |
1562 | ||
1563 | /* Similar to replace_oldest_value_reg, but X contains a memory. */ | |
1564 | ||
1565 | static bool | |
1566 | replace_oldest_value_mem (x, insn, vd) | |
1567 | rtx x; | |
1568 | rtx insn; | |
1569 | struct value_data *vd; | |
1570 | { | |
3dcc68a4 NC |
1571 | return replace_oldest_value_addr (&XEXP (x, 0), |
1572 | MODE_BASE_REG_CLASS (GET_MODE (x)), | |
8582c27b RH |
1573 | GET_MODE (x), insn, vd); |
1574 | } | |
1575 | ||
1576 | /* Perform the forward copy propagation on basic block BB. */ | |
1577 | ||
1578 | static bool | |
1579 | copyprop_hardreg_forward_1 (bb, vd) | |
1580 | basic_block bb; | |
1581 | struct value_data *vd; | |
1582 | { | |
1583 | bool changed = false; | |
1584 | rtx insn; | |
1585 | ||
1586 | for (insn = bb->head; ; insn = NEXT_INSN (insn)) | |
1587 | { | |
1588 | int n_ops, i, alt, predicated; | |
3ada20ee | 1589 | bool is_asm; |
8582c27b RH |
1590 | rtx set; |
1591 | ||
1592 | if (! INSN_P (insn)) | |
1593 | { | |
1594 | if (insn == bb->end) | |
1595 | break; | |
1596 | else | |
1597 | continue; | |
1598 | } | |
1599 | ||
1600 | set = single_set (insn); | |
1601 | extract_insn (insn); | |
4be9e9cb | 1602 | if (! constrain_operands (1)) |
3b03c671 | 1603 | fatal_insn_not_found (insn); |
8582c27b RH |
1604 | preprocess_constraints (); |
1605 | alt = which_alternative; | |
1606 | n_ops = recog_data.n_operands; | |
3ada20ee | 1607 | is_asm = asm_noperands (PATTERN (insn)) >= 0; |
8582c27b RH |
1608 | |
1609 | /* Simplify the code below by rewriting things to reflect | |
1610 | matching constraints. Also promote OP_OUT to OP_INOUT | |
1611 | in predicated instructions. */ | |
1612 | ||
1613 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
1614 | for (i = 0; i < n_ops; ++i) | |
1615 | { | |
1616 | int matches = recog_op_alt[i][alt].matches; | |
1617 | if (matches >= 0) | |
1618 | recog_op_alt[i][alt].class = recog_op_alt[matches][alt].class; | |
1619 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 | |
1620 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
1621 | recog_data.operand_type[i] = OP_INOUT; | |
1622 | } | |
1623 | ||
1624 | /* For each earlyclobber operand, zap the value data. */ | |
1625 | for (i = 0; i < n_ops; i++) | |
1626 | if (recog_op_alt[i][alt].earlyclobber) | |
1627 | kill_value (recog_data.operand[i], vd); | |
1628 | ||
1629 | /* Within asms, a clobber cannot overlap inputs or outputs. | |
1630 | I wouldn't think this were true for regular insns, but | |
1631 | scan_rtx treats them like that... */ | |
1632 | note_stores (PATTERN (insn), kill_clobbered_value, vd); | |
1633 | ||
1634 | /* Kill all auto-incremented values. */ | |
1635 | /* ??? REG_INC is useless, since stack pushes aren't done that way. */ | |
1636 | for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd); | |
1637 | ||
752ae914 RH |
1638 | /* Kill all early-clobbered operands. */ |
1639 | for (i = 0; i < n_ops; i++) | |
1640 | if (recog_op_alt[i][alt].earlyclobber) | |
1641 | kill_value (recog_data.operand[i], vd); | |
1642 | ||
8582c27b RH |
1643 | /* Special-case plain move instructions, since we may well |
1644 | be able to do the move from a different register class. */ | |
1645 | if (set && REG_P (SET_SRC (set))) | |
1646 | { | |
3ada20ee RH |
1647 | rtx src = SET_SRC (set); |
1648 | unsigned int regno = REGNO (src); | |
1649 | enum machine_mode mode = GET_MODE (src); | |
8582c27b RH |
1650 | unsigned int i; |
1651 | rtx new; | |
1652 | ||
57d1019b RH |
1653 | /* If we are accessing SRC in some mode other that what we |
1654 | set it in, make sure that the replacement is valid. */ | |
1655 | if (mode != vd->e[regno].mode) | |
1656 | { | |
1657 | if (HARD_REGNO_NREGS (regno, mode) | |
1658 | > HARD_REGNO_NREGS (regno, vd->e[regno].mode)) | |
1659 | goto no_move_special_case; | |
1660 | } | |
1661 | ||
8582c27b RH |
1662 | /* If the destination is also a register, try to find a source |
1663 | register in the same class. */ | |
1664 | if (REG_P (SET_DEST (set))) | |
1665 | { | |
3ada20ee | 1666 | new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd); |
8582c27b RH |
1667 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) |
1668 | { | |
1669 | if (rtl_dump_file) | |
1670 | fprintf (rtl_dump_file, | |
1671 | "insn %u: replaced reg %u with %u\n", | |
1672 | INSN_UID (insn), regno, REGNO (new)); | |
3b03c671 | 1673 | changed = true; |
8582c27b RH |
1674 | goto did_replacement; |
1675 | } | |
1676 | } | |
1677 | ||
1678 | /* Otherwise, try all valid registers and see if its valid. */ | |
1679 | for (i = vd->e[regno].oldest_regno; i != regno; | |
1680 | i = vd->e[i].next_regno) | |
61dde664 R |
1681 | { |
1682 | new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode, | |
1683 | mode, i, regno); | |
1684 | if (new != NULL_RTX) | |
1685 | { | |
1686 | if (validate_change (insn, &SET_SRC (set), new, 0)) | |
1687 | { | |
1688 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src); | |
1689 | if (rtl_dump_file) | |
1690 | fprintf (rtl_dump_file, | |
1691 | "insn %u: replaced reg %u with %u\n", | |
1692 | INSN_UID (insn), regno, REGNO (new)); | |
1693 | changed = true; | |
1694 | goto did_replacement; | |
1695 | } | |
1696 | } | |
1697 | } | |
8582c27b | 1698 | } |
57d1019b | 1699 | no_move_special_case: |
8582c27b RH |
1700 | |
1701 | /* For each input operand, replace a hard register with the | |
1702 | eldest live copy that's in an appropriate register class. */ | |
1703 | for (i = 0; i < n_ops; i++) | |
1704 | { | |
1705 | bool replaced = false; | |
1706 | ||
1707 | /* Don't scan match_operand here, since we've no reg class | |
1708 | information to pass down. Any operands that we could | |
1709 | substitute in will be represented elsewhere. */ | |
1710 | if (recog_data.constraints[i][0] == '\0') | |
1711 | continue; | |
1712 | ||
3ada20ee RH |
1713 | /* Don't replace in asms intentionally referencing hard regs. */ |
1714 | if (is_asm && GET_CODE (recog_data.operand[i]) == REG | |
1715 | && (REGNO (recog_data.operand[i]) | |
1716 | == ORIGINAL_REGNO (recog_data.operand[i]))) | |
1717 | continue; | |
1718 | ||
8582c27b RH |
1719 | if (recog_data.operand_type[i] == OP_IN) |
1720 | { | |
1721 | if (recog_op_alt[i][alt].is_address) | |
1722 | replaced | |
1723 | = replace_oldest_value_addr (recog_data.operand_loc[i], | |
1724 | recog_op_alt[i][alt].class, | |
1725 | VOIDmode, insn, vd); | |
1726 | else if (REG_P (recog_data.operand[i])) | |
1727 | replaced | |
1728 | = replace_oldest_value_reg (recog_data.operand_loc[i], | |
1729 | recog_op_alt[i][alt].class, | |
1730 | insn, vd); | |
1731 | else if (GET_CODE (recog_data.operand[i]) == MEM) | |
1732 | replaced = replace_oldest_value_mem (recog_data.operand[i], | |
1733 | insn, vd); | |
1734 | } | |
1735 | else if (GET_CODE (recog_data.operand[i]) == MEM) | |
1736 | replaced = replace_oldest_value_mem (recog_data.operand[i], | |
3b03c671 | 1737 | insn, vd); |
8582c27b RH |
1738 | |
1739 | /* If we performed any replacement, update match_dups. */ | |
1740 | if (replaced) | |
1741 | { | |
1742 | int j; | |
1743 | rtx new; | |
1744 | ||
1745 | changed = true; | |
1746 | ||
1747 | new = *recog_data.operand_loc[i]; | |
1748 | recog_data.operand[i] = new; | |
1749 | for (j = 0; j < recog_data.n_dups; j++) | |
1750 | if (recog_data.dup_num[j] == i) | |
1751 | *recog_data.dup_loc[j] = new; | |
1752 | } | |
1753 | } | |
1754 | ||
1755 | did_replacement: | |
1756 | /* Clobber call-clobbered registers. */ | |
1757 | if (GET_CODE (insn) == CALL_INSN) | |
1758 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1759 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
1760 | kill_value_regno (i, vd); | |
1761 | ||
1762 | /* Notice stores. */ | |
1763 | note_stores (PATTERN (insn), kill_set_value, vd); | |
1764 | ||
1765 | /* Notice copies. */ | |
1766 | if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))) | |
1767 | copy_value (SET_DEST (set), SET_SRC (set), vd); | |
1768 | ||
1769 | if (insn == bb->end) | |
1770 | break; | |
1771 | } | |
1772 | ||
1773 | return changed; | |
1774 | } | |
1775 | ||
1776 | /* Main entry point for the forward copy propagation optimization. */ | |
1777 | ||
1778 | void | |
1779 | copyprop_hardreg_forward () | |
1780 | { | |
8582c27b | 1781 | struct value_data *all_vd; |
3de23727 | 1782 | bool need_refresh; |
d950dee3 | 1783 | basic_block bb, bbp = 0; |
8582c27b | 1784 | |
3de23727 | 1785 | need_refresh = false; |
8582c27b | 1786 | |
d55bc081 | 1787 | all_vd = xmalloc (sizeof (struct value_data) * last_basic_block); |
8582c27b | 1788 | |
e0082a72 | 1789 | FOR_EACH_BB (bb) |
8582c27b | 1790 | { |
8582c27b RH |
1791 | /* If a block has a single predecessor, that we've already |
1792 | processed, begin with the value data that was live at | |
1793 | the end of the predecessor block. */ | |
1794 | /* ??? Ought to use more intelligent queueing of blocks. */ | |
e0082a72 ZD |
1795 | if (bb->pred) |
1796 | for (bbp = bb; bbp && bbp != bb->pred->src; bbp = bbp->prev_bb); | |
8582c27b | 1797 | if (bb->pred |
3b03c671 | 1798 | && ! bb->pred->pred_next |
22c56562 | 1799 | && ! (bb->pred->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)) |
e0082a72 ZD |
1800 | && bb->pred->src != ENTRY_BLOCK_PTR |
1801 | && bbp) | |
1802 | all_vd[bb->index] = all_vd[bb->pred->src->index]; | |
8582c27b | 1803 | else |
e0082a72 | 1804 | init_value_data (all_vd + bb->index); |
8582c27b | 1805 | |
e0082a72 | 1806 | if (copyprop_hardreg_forward_1 (bb, all_vd + bb->index)) |
3de23727 | 1807 | need_refresh = true; |
8582c27b RH |
1808 | } |
1809 | ||
1810 | if (need_refresh) | |
1811 | { | |
1812 | if (rtl_dump_file) | |
1813 | fputs ("\n\n", rtl_dump_file); | |
1814 | ||
3de23727 RH |
1815 | /* ??? Irritatingly, delete_noop_moves does not take a set of blocks |
1816 | to scan, so we have to do a life update with no initial set of | |
1817 | blocks Just In Case. */ | |
1818 | delete_noop_moves (get_insns ()); | |
1819 | update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, | |
8582c27b RH |
1820 | PROP_DEATH_NOTES |
1821 | | PROP_SCAN_DEAD_CODE | |
1822 | | PROP_KILL_DEAD_CODE); | |
1823 | } | |
1824 | ||
8582c27b RH |
1825 | free (all_vd); |
1826 | } | |
1827 | ||
1828 | /* Dump the value chain data to stderr. */ | |
1829 | ||
1830 | void | |
1831 | debug_value_data (vd) | |
1832 | struct value_data *vd; | |
1833 | { | |
1834 | HARD_REG_SET set; | |
1835 | unsigned int i, j; | |
1836 | ||
1837 | CLEAR_HARD_REG_SET (set); | |
1838 | ||
1839 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1840 | if (vd->e[i].oldest_regno == i) | |
1841 | { | |
1842 | if (vd->e[i].mode == VOIDmode) | |
1843 | { | |
1844 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1845 | fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n", | |
1846 | i, vd->e[i].next_regno); | |
1847 | continue; | |
1848 | } | |
1849 | ||
1850 | SET_HARD_REG_BIT (set, i); | |
1851 | fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode)); | |
1852 | ||
1853 | for (j = vd->e[i].next_regno; | |
1854 | j != INVALID_REGNUM; | |
1855 | j = vd->e[j].next_regno) | |
1856 | { | |
57d1019b | 1857 | if (TEST_HARD_REG_BIT (set, j)) |
8582c27b RH |
1858 | { |
1859 | fprintf (stderr, "[%u] Loop in regno chain\n", j); | |
1860 | return; | |
1861 | } | |
1862 | ||
1863 | if (vd->e[j].oldest_regno != i) | |
1864 | { | |
1865 | fprintf (stderr, "[%u] Bad oldest_regno (%u)\n", | |
1866 | j, vd->e[j].oldest_regno); | |
1867 | return; | |
1868 | } | |
1869 | SET_HARD_REG_BIT (set, j); | |
1870 | fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode)); | |
1871 | } | |
1872 | fputc ('\n', stderr); | |
1873 | } | |
1874 | ||
1875 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1876 | if (! TEST_HARD_REG_BIT (set, i) | |
1877 | && (vd->e[i].mode != VOIDmode | |
1878 | || vd->e[i].oldest_regno != i | |
1879 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1880 | fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n", | |
1881 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1882 | vd->e[i].next_regno); | |
1883 | } | |
1884 | ||
1885 | #ifdef ENABLE_CHECKING | |
1886 | static void | |
1887 | validate_value_data (vd) | |
1888 | struct value_data *vd; | |
1889 | { | |
1890 | HARD_REG_SET set; | |
1891 | unsigned int i, j; | |
1892 | ||
1893 | CLEAR_HARD_REG_SET (set); | |
1894 | ||
1895 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1896 | if (vd->e[i].oldest_regno == i) | |
1897 | { | |
1898 | if (vd->e[i].mode == VOIDmode) | |
1899 | { | |
1900 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1901 | internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)", | |
1902 | i, vd->e[i].next_regno); | |
1903 | continue; | |
1904 | } | |
1905 | ||
1906 | SET_HARD_REG_BIT (set, i); | |
1907 | ||
1908 | for (j = vd->e[i].next_regno; | |
1909 | j != INVALID_REGNUM; | |
1910 | j = vd->e[j].next_regno) | |
1911 | { | |
1912 | if (TEST_HARD_REG_BIT (set, j)) | |
1913 | internal_error ("validate_value_data: Loop in regno chain (%u)", | |
1914 | j); | |
1915 | if (vd->e[j].oldest_regno != i) | |
1916 | internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)", | |
1917 | j, vd->e[j].oldest_regno); | |
1918 | ||
1919 | SET_HARD_REG_BIT (set, j); | |
1920 | } | |
1921 | } | |
1922 | ||
1923 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1924 | if (! TEST_HARD_REG_BIT (set, i) | |
1925 | && (vd->e[i].mode != VOIDmode | |
1926 | || vd->e[i].oldest_regno != i | |
1927 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1928 | internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)", | |
1929 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1930 | vd->e[i].next_regno); | |
1931 | } | |
1932 | #endif |