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7b82b5da 1/* Register renaming for the GNU compiler.
f4f4d0f8 2 Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc.
7b82b5da 3
1322177d 4 This file is part of GCC.
7b82b5da 5
1322177d
LB
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
7b82b5da
SC
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
1322177d
LB
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
7b82b5da
SC
15
16 You should have received a copy of the GNU General Public License
1322177d
LB
17 along with GCC; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
7b82b5da 20
541f7d56
BS
21#define REG_OK_STRICT
22
7b82b5da
SC
23#include "config.h"
24#include "system.h"
7b82b5da 25#include "rtl.h"
541f7d56 26#include "tm_p.h"
7b82b5da
SC
27#include "insn-config.h"
28#include "regs.h"
541f7d56
BS
29#include "hard-reg-set.h"
30#include "basic-block.h"
31#include "reload.h"
7b82b5da
SC
32#include "output.h"
33#include "function.h"
34#include "recog.h"
541f7d56 35#include "flags.h"
8582c27b 36#include "toplev.h"
541f7d56
BS
37#include "obstack.h"
38
39#define obstack_chunk_alloc xmalloc
40#define obstack_chunk_free free
41
42#ifndef REGNO_MODE_OK_FOR_BASE_P
43#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
44#endif
45
46#ifndef REG_MODE_OK_FOR_BASE_P
47#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
48#endif
7b82b5da
SC
49
50static const char *const reg_class_names[] = REG_CLASS_NAMES;
51
541f7d56 52struct du_chain
7b82b5da 53{
541f7d56
BS
54 struct du_chain *next_chain;
55 struct du_chain *next_use;
7b82b5da 56
541f7d56
BS
57 rtx insn;
58 rtx *loc;
59 enum reg_class class;
60 unsigned int need_caller_save_reg:1;
fe08a886 61 unsigned int earlyclobber:1;
541f7d56 62};
7b82b5da 63
541f7d56
BS
64enum scan_actions
65{
541f7d56
BS
66 terminate_all_read,
67 terminate_overlapping_read,
68 terminate_write,
69 terminate_dead,
70 mark_read,
71 mark_write
72};
73
74static const char * const scan_actions_name[] =
75{
541f7d56
BS
76 "terminate_all_read",
77 "terminate_overlapping_read",
78 "terminate_write",
79 "terminate_dead",
80 "mark_read",
81 "mark_write"
82};
83
84static struct obstack rename_obstack;
85
86static void do_replace PARAMS ((struct du_chain *, int));
87static void scan_rtx_reg PARAMS ((rtx, rtx *, enum reg_class,
fe08a886 88 enum scan_actions, enum op_type, int));
541f7d56 89static void scan_rtx_address PARAMS ((rtx, rtx *, enum reg_class,
85941a0a 90 enum scan_actions, enum machine_mode));
541f7d56 91static void scan_rtx PARAMS ((rtx, rtx *, enum reg_class,
fe08a886
BS
92 enum scan_actions, enum op_type, int));
93static struct du_chain *build_def_use PARAMS ((basic_block));
541f7d56 94static void dump_def_use_chain PARAMS ((struct du_chain *));
fe08a886
BS
95static void note_sets PARAMS ((rtx, rtx, void *));
96static void clear_dead_regs PARAMS ((HARD_REG_SET *, enum machine_mode, rtx));
97static void merge_overlapping_regs PARAMS ((basic_block, HARD_REG_SET *,
98 struct du_chain *));
99
100/* Called through note_stores from update_life. Find sets of registers, and
101 record them in *DATA (which is actually a HARD_REG_SET *). */
102
103static void
104note_sets (x, set, data)
105 rtx x;
106 rtx set ATTRIBUTE_UNUSED;
107 void *data;
108{
109 HARD_REG_SET *pset = (HARD_REG_SET *) data;
110 unsigned int regno;
111 int nregs;
112 if (GET_CODE (x) != REG)
113 return;
114 regno = REGNO (x);
115 nregs = HARD_REGNO_NREGS (regno, GET_MODE (x));
3d17d93d
AO
116
117 /* There must not be pseudos at this point. */
118 if (regno + nregs > FIRST_PSEUDO_REGISTER)
119 abort ();
120
fe08a886
BS
121 while (nregs-- > 0)
122 SET_HARD_REG_BIT (*pset, regno + nregs);
123}
124
125/* Clear all registers from *PSET for which a note of kind KIND can be found
126 in the list NOTES. */
127
128static void
129clear_dead_regs (pset, kind, notes)
130 HARD_REG_SET *pset;
131 enum machine_mode kind;
132 rtx notes;
133{
134 rtx note;
135 for (note = notes; note; note = XEXP (note, 1))
136 if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0)))
137 {
138 rtx reg = XEXP (note, 0);
139 unsigned int regno = REGNO (reg);
140 int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg));
3d17d93d
AO
141
142 /* There must not be pseudos at this point. */
143 if (regno + nregs > FIRST_PSEUDO_REGISTER)
144 abort ();
145
fe08a886
BS
146 while (nregs-- > 0)
147 CLEAR_HARD_REG_BIT (*pset, regno + nregs);
148 }
149}
150
151/* For a def-use chain CHAIN in basic block B, find which registers overlap
152 its lifetime and set the corresponding bits in *PSET. */
153
154static void
155merge_overlapping_regs (b, pset, chain)
156 basic_block b;
157 HARD_REG_SET *pset;
158 struct du_chain *chain;
159{
160 struct du_chain *t = chain;
161 rtx insn;
162 HARD_REG_SET live;
163
164 REG_SET_TO_HARD_REG_SET (live, b->global_live_at_start);
165 insn = b->head;
166 while (t)
167 {
168 /* Search forward until the next reference to the register to be
169 renamed. */
170 while (insn != t->insn)
171 {
172 if (INSN_P (insn))
173 {
174 clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn));
175 note_stores (PATTERN (insn), note_sets, (void *) &live);
176 /* Only record currently live regs if we are inside the
177 reg's live range. */
178 if (t != chain)
179 IOR_HARD_REG_SET (*pset, live);
180 clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn));
181 }
182 insn = NEXT_INSN (insn);
183 }
184
185 IOR_HARD_REG_SET (*pset, live);
186
187 /* For the last reference, also merge in all registers set in the
188 same insn.
189 @@@ We only have take earlyclobbered sets into account. */
190 if (! t->next_use)
191 note_stores (PATTERN (insn), note_sets, (void *) pset);
192
193 t = t->next_use;
194 }
195}
196
197/* Perform register renaming on the current function. */
7b82b5da 198
541f7d56
BS
199void
200regrename_optimize ()
201{
fe08a886
BS
202 int tick[FIRST_PSEUDO_REGISTER];
203 int this_tick = 0;
541f7d56
BS
204 int b;
205 char *first_obj;
7b82b5da 206
fe08a886
BS
207 memset (tick, 0, sizeof tick);
208
541f7d56
BS
209 gcc_obstack_init (&rename_obstack);
210 first_obj = (char *) obstack_alloc (&rename_obstack, 0);
7b82b5da 211
541f7d56
BS
212 for (b = 0; b < n_basic_blocks; b++)
213 {
214 basic_block bb = BASIC_BLOCK (b);
215 struct du_chain *all_chains = 0;
541f7d56
BS
216 HARD_REG_SET unavailable;
217 HARD_REG_SET regs_seen;
7b82b5da 218
541f7d56 219 CLEAR_HARD_REG_SET (unavailable);
7b82b5da 220
541f7d56
BS
221 if (rtl_dump_file)
222 fprintf (rtl_dump_file, "\nBasic block %d:\n", b);
7b82b5da 223
fe08a886 224 all_chains = build_def_use (bb);
7b82b5da 225
541f7d56
BS
226 if (rtl_dump_file)
227 dump_def_use_chain (all_chains);
7b82b5da 228
fe08a886 229 CLEAR_HARD_REG_SET (unavailable);
541f7d56
BS
230 /* Don't clobber traceback for noreturn functions. */
231 if (frame_pointer_needed)
232 {
65599eb4
DC
233 int i;
234
235 for (i = HARD_REGNO_NREGS (FRAME_POINTER_REGNUM, Pmode); i--;)
236 SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i);
237
541f7d56 238#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
65599eb4
DC
239 for (i = HARD_REGNO_NREGS (HARD_FRAME_POINTER_REGNUM, Pmode); i--;)
240 SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i);
541f7d56
BS
241#endif
242 }
7b82b5da 243
541f7d56
BS
244 CLEAR_HARD_REG_SET (regs_seen);
245 while (all_chains)
246 {
fe08a886 247 int new_reg, best_new_reg = -1;
541f7d56
BS
248 int n_uses;
249 struct du_chain *this = all_chains;
250 struct du_chain *tmp, *last;
251 HARD_REG_SET this_unavailable;
4e812700 252 int reg = REGNO (*this->loc);
85941a0a 253 int i;
7b82b5da 254
541f7d56 255 all_chains = this->next_chain;
fe08a886
BS
256
257#if 0 /* This just disables optimization opportunities. */
541f7d56
BS
258 /* Only rename once we've seen the reg more than once. */
259 if (! TEST_HARD_REG_BIT (regs_seen, reg))
1a43c33f 260 {
541f7d56
BS
261 SET_HARD_REG_BIT (regs_seen, reg);
262 continue;
263 }
fe08a886 264#endif
1a43c33f 265
f4d578da
BS
266 if (fixed_regs[reg] || global_regs[reg]
267#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
268 || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM)
269#else
270 || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM)
271#endif
272 )
541f7d56 273 continue;
1a43c33f 274
541f7d56 275 COPY_HARD_REG_SET (this_unavailable, unavailable);
1a43c33f 276
541f7d56
BS
277 /* Find last entry on chain (which has the need_caller_save bit),
278 count number of uses, and narrow the set of registers we can
279 use for renaming. */
280 n_uses = 0;
281 for (last = this; last->next_use; last = last->next_use)
282 {
283 n_uses++;
284 IOR_COMPL_HARD_REG_SET (this_unavailable,
285 reg_class_contents[last->class]);
1a43c33f 286 }
541f7d56
BS
287 if (n_uses < 1)
288 continue;
7b82b5da 289
541f7d56
BS
290 IOR_COMPL_HARD_REG_SET (this_unavailable,
291 reg_class_contents[last->class]);
7b82b5da 292
fe08a886 293 if (this->need_caller_save_reg)
541f7d56
BS
294 IOR_HARD_REG_SET (this_unavailable, call_used_reg_set);
295
fe08a886
BS
296 merge_overlapping_regs (bb, &this_unavailable, this);
297
541f7d56
BS
298 /* Now potential_regs is a reasonable approximation, let's
299 have a closer look at each register still in there. */
4e812700 300 for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++)
1a43c33f 301 {
4e812700
RH
302 int nregs = HARD_REGNO_NREGS (new_reg, GET_MODE (*this->loc));
303
85941a0a 304 for (i = nregs - 1; i >= 0; --i)
fe08a886
BS
305 if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i)
306 || fixed_regs[new_reg + i]
307 || global_regs[new_reg + i]
85941a0a 308 /* Can't use regs which aren't saved by the prologue. */
fe08a886
BS
309 || (! regs_ever_live[new_reg + i]
310 && ! call_used_regs[new_reg + i])
b2a8b026
MM
311#ifdef LEAF_REGISTERS
312 /* We can't use a non-leaf register if we're in a
313 leaf function. */
314 || (current_function_is_leaf
315 && !LEAF_REGISTERS[new_reg + i])
316#endif
541f7d56 317#ifdef HARD_REGNO_RENAME_OK
fe08a886 318 || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i)
541f7d56 319#endif
85941a0a
RH
320 )
321 break;
322 if (i >= 0)
541f7d56 323 continue;
1a43c33f 324
85941a0a
RH
325 /* See whether it accepts all modes that occur in
326 definition and uses. */
541f7d56 327 for (tmp = this; tmp; tmp = tmp->next_use)
66df7a98
AO
328 if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc))
329 || (tmp->need_caller_save_reg
330 && ! (HARD_REGNO_CALL_PART_CLOBBERED
331 (reg, GET_MODE (*tmp->loc)))
332 && (HARD_REGNO_CALL_PART_CLOBBERED
333 (new_reg, GET_MODE (*tmp->loc)))))
541f7d56
BS
334 break;
335 if (! tmp)
fe08a886
BS
336 {
337 if (best_new_reg == -1
338 || tick[best_new_reg] > tick[new_reg])
339 best_new_reg = new_reg;
340 }
1a43c33f 341 }
7b82b5da 342
541f7d56
BS
343 if (rtl_dump_file)
344 {
345 fprintf (rtl_dump_file, "Register %s in insn %d",
346 reg_names[reg], INSN_UID (last->insn));
347 if (last->need_caller_save_reg)
348 fprintf (rtl_dump_file, " crosses a call");
349 }
1a43c33f 350
fe08a886 351 if (best_new_reg == -1)
541f7d56
BS
352 {
353 if (rtl_dump_file)
354 fprintf (rtl_dump_file, "; no available registers\n");
7b82b5da 355 continue;
541f7d56 356 }
7b82b5da 357
fe08a886
BS
358 do_replace (this, best_new_reg);
359 tick[best_new_reg] = this_tick++;
1a43c33f 360
541f7d56 361 if (rtl_dump_file)
fe08a886 362 fprintf (rtl_dump_file, ", renamed as %s\n", reg_names[best_new_reg]);
541f7d56 363 }
1a43c33f 364
541f7d56
BS
365 obstack_free (&rename_obstack, first_obj);
366 }
1a43c33f 367
541f7d56 368 obstack_free (&rename_obstack, NULL);
7b82b5da 369
541f7d56
BS
370 if (rtl_dump_file)
371 fputc ('\n', rtl_dump_file);
7b82b5da 372
541f7d56
BS
373 count_or_remove_death_notes (NULL, 1);
374 update_life_info (NULL, UPDATE_LIFE_LOCAL,
375 PROP_REG_INFO | PROP_DEATH_NOTES);
7b82b5da
SC
376}
377
7b82b5da 378static void
541f7d56
BS
379do_replace (chain, reg)
380 struct du_chain *chain;
381 int reg;
7b82b5da 382{
541f7d56 383 while (chain)
7b82b5da 384 {
08394eef
BS
385 unsigned int regno = ORIGINAL_REGNO (*chain->loc);
386 *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg);
f4d578da
BS
387 if (regno >= FIRST_PSEUDO_REGISTER)
388 ORIGINAL_REGNO (*chain->loc) = regno;
541f7d56 389 chain = chain->next_use;
7b82b5da 390 }
7b82b5da
SC
391}
392
7b82b5da 393
541f7d56
BS
394static struct du_chain *open_chains;
395static struct du_chain *closed_chains;
396
397static void
fe08a886 398scan_rtx_reg (insn, loc, class, action, type, earlyclobber)
541f7d56
BS
399 rtx insn;
400 rtx *loc;
401 enum reg_class class;
402 enum scan_actions action;
403 enum op_type type;
fe08a886 404 int earlyclobber;
7b82b5da 405{
541f7d56
BS
406 struct du_chain **p;
407 rtx x = *loc;
408 enum machine_mode mode = GET_MODE (x);
409 int this_regno = REGNO (x);
410 int this_nregs = HARD_REGNO_NREGS (this_regno, mode);
411
541f7d56 412 if (action == mark_write)
7b82b5da 413 {
541f7d56 414 if (type == OP_OUT)
7b82b5da 415 {
541f7d56
BS
416 struct du_chain *this = (struct du_chain *)
417 obstack_alloc (&rename_obstack, sizeof (struct du_chain));
418 this->next_use = 0;
419 this->next_chain = open_chains;
420 this->loc = loc;
421 this->insn = insn;
422 this->class = class;
423 this->need_caller_save_reg = 0;
fe08a886 424 this->earlyclobber = earlyclobber;
541f7d56 425 open_chains = this;
7b82b5da 426 }
541f7d56 427 return;
7b82b5da 428 }
1a43c33f 429
541f7d56
BS
430 if ((type == OP_OUT && action != terminate_write)
431 || (type != OP_OUT && action == terminate_write))
432 return;
5fa41e13 433
541f7d56 434 for (p = &open_chains; *p;)
5fa41e13 435 {
541f7d56 436 struct du_chain *this = *p;
541f7d56 437
695e4773
GS
438 /* Check if the chain has been terminated if it has then skip to
439 the next chain.
541f7d56 440
695e4773
GS
441 This can happen when we've already appended the location to
442 the chain in Step 3, but are trying to hide in-out operands
443 from terminate_write in Step 5. */
5fa41e13 444
695e4773
GS
445 if (*this->loc == cc0_rtx)
446 p = &this->next_chain;
447 else
448 {
449 int regno = REGNO (*this->loc);
450 int nregs = HARD_REGNO_NREGS (regno, GET_MODE (*this->loc));
451 int exact_match = (regno == this_regno && nregs == this_nregs);
452
453 if (regno + nregs <= this_regno
454 || this_regno + this_nregs <= regno)
a125d855
RH
455 {
456 p = &this->next_chain;
457 continue;
458 }
459
460 if (action == mark_read)
541f7d56 461 {
695e4773
GS
462 if (! exact_match)
463 abort ();
695e4773 464
a125d855
RH
465 /* ??? Class NO_REGS can happen if the md file makes use of
466 EXTRA_CONSTRAINTS to match registers. Which is arguably
467 wrong, but there we are. Since we know not what this may
468 be replaced with, terminate the chain. */
469 if (class != NO_REGS)
470 {
471 this = (struct du_chain *)
472 obstack_alloc (&rename_obstack, sizeof (struct du_chain));
fe08a886 473 this->next_use = 0;
a125d855
RH
474 this->next_chain = (*p)->next_chain;
475 this->loc = loc;
476 this->insn = insn;
477 this->class = class;
478 this->need_caller_save_reg = 0;
fe08a886
BS
479 while (*p)
480 p = &(*p)->next_use;
a125d855
RH
481 *p = this;
482 return;
483 }
541f7d56 484 }
a125d855
RH
485
486 if (action != terminate_overlapping_read || ! exact_match)
541f7d56 487 {
695e4773
GS
488 struct du_chain *next = this->next_chain;
489
490 /* Whether the terminated chain can be used for renaming
491 depends on the action and this being an exact match.
492 In either case, we remove this element from open_chains. */
493
494 if ((action == terminate_dead || action == terminate_write)
495 && exact_match)
496 {
497 this->next_chain = closed_chains;
498 closed_chains = this;
499 if (rtl_dump_file)
500 fprintf (rtl_dump_file,
501 "Closing chain %s at insn %d (%s)\n",
502 reg_names[REGNO (*this->loc)], INSN_UID (insn),
503 scan_actions_name[(int) action]);
504 }
505 else
506 {
507 if (rtl_dump_file)
508 fprintf (rtl_dump_file,
509 "Discarding chain %s at insn %d (%s)\n",
510 reg_names[REGNO (*this->loc)], INSN_UID (insn),
511 scan_actions_name[(int) action]);
512 }
513 *p = next;
541f7d56 514 }
695e4773
GS
515 else
516 p = &this->next_chain;
541f7d56 517 }
541f7d56 518 }
7b82b5da
SC
519}
520
541f7d56
BS
521/* Adapted from find_reloads_address_1. CLASS is INDEX_REG_CLASS or
522 BASE_REG_CLASS depending on how the register is being considered. */
7b82b5da 523
4ca0f257 524static void
85941a0a 525scan_rtx_address (insn, loc, class, action, mode)
7b82b5da 526 rtx insn;
541f7d56
BS
527 rtx *loc;
528 enum reg_class class;
529 enum scan_actions action;
85941a0a 530 enum machine_mode mode;
7b82b5da 531{
541f7d56
BS
532 rtx x = *loc;
533 RTX_CODE code = GET_CODE (x);
534 const char *fmt;
535 int i, j;
7b82b5da 536
541f7d56
BS
537 if (action == mark_write)
538 return;
7b82b5da 539
541f7d56 540 switch (code)
7b82b5da 541 {
541f7d56
BS
542 case PLUS:
543 {
544 rtx orig_op0 = XEXP (x, 0);
545 rtx orig_op1 = XEXP (x, 1);
546 RTX_CODE code0 = GET_CODE (orig_op0);
547 RTX_CODE code1 = GET_CODE (orig_op1);
548 rtx op0 = orig_op0;
549 rtx op1 = orig_op1;
550 rtx *locI = NULL;
551 rtx *locB = NULL;
552
553 if (GET_CODE (op0) == SUBREG)
554 {
555 op0 = SUBREG_REG (op0);
556 code0 = GET_CODE (op0);
557 }
7b82b5da 558
541f7d56
BS
559 if (GET_CODE (op1) == SUBREG)
560 {
561 op1 = SUBREG_REG (op1);
562 code1 = GET_CODE (op1);
563 }
7b82b5da 564
541f7d56
BS
565 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
566 || code0 == ZERO_EXTEND || code1 == MEM)
567 {
568 locI = &XEXP (x, 0);
569 locB = &XEXP (x, 1);
570 }
571 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
572 || code1 == ZERO_EXTEND || code0 == MEM)
573 {
574 locI = &XEXP (x, 1);
575 locB = &XEXP (x, 0);
576 }
577 else if (code0 == CONST_INT || code0 == CONST
578 || code0 == SYMBOL_REF || code0 == LABEL_REF)
579 locB = &XEXP (x, 1);
580 else if (code1 == CONST_INT || code1 == CONST
581 || code1 == SYMBOL_REF || code1 == LABEL_REF)
582 locB = &XEXP (x, 0);
583 else if (code0 == REG && code1 == REG)
584 {
585 int index_op;
586
587 if (REG_OK_FOR_INDEX_P (op0)
588 && REG_MODE_OK_FOR_BASE_P (op1, mode))
589 index_op = 0;
590 else if (REG_OK_FOR_INDEX_P (op1)
591 && REG_MODE_OK_FOR_BASE_P (op0, mode))
592 index_op = 1;
593 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
594 index_op = 0;
595 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
596 index_op = 1;
597 else if (REG_OK_FOR_INDEX_P (op1))
598 index_op = 1;
599 else
600 index_op = 0;
601
602 locI = &XEXP (x, index_op);
603 locB = &XEXP (x, !index_op);
604 }
605 else if (code0 == REG)
606 {
607 locI = &XEXP (x, 0);
608 locB = &XEXP (x, 1);
609 }
610 else if (code1 == REG)
611 {
612 locI = &XEXP (x, 1);
613 locB = &XEXP (x, 0);
614 }
7b82b5da 615
541f7d56 616 if (locI)
85941a0a 617 scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode);
541f7d56 618 if (locB)
3dcc68a4 619 scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode);
541f7d56
BS
620 return;
621 }
7b82b5da 622
541f7d56
BS
623 case POST_INC:
624 case POST_DEC:
625 case POST_MODIFY:
626 case PRE_INC:
627 case PRE_DEC:
628 case PRE_MODIFY:
629#ifndef AUTO_INC_DEC
ce73761f
RH
630 /* If the target doesn't claim to handle autoinc, this must be
631 something special, like a stack push. Kill this chain. */
632 action = terminate_all_read;
541f7d56
BS
633#endif
634 break;
7b82b5da 635
541f7d56 636 case MEM:
3dcc68a4
NC
637 scan_rtx_address (insn, &XEXP (x, 0),
638 MODE_BASE_REG_CLASS (GET_MODE (x)), action,
85941a0a 639 GET_MODE (x));
541f7d56 640 return;
1a43c33f 641
541f7d56 642 case REG:
fe08a886 643 scan_rtx_reg (insn, loc, class, action, OP_IN, 0);
4ca0f257 644 return;
1a43c33f 645
541f7d56
BS
646 default:
647 break;
4ca0f257 648 }
541f7d56
BS
649
650 fmt = GET_RTX_FORMAT (code);
651 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4ca0f257 652 {
541f7d56 653 if (fmt[i] == 'e')
85941a0a 654 scan_rtx_address (insn, &XEXP (x, i), class, action, mode);
541f7d56
BS
655 else if (fmt[i] == 'E')
656 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
85941a0a 657 scan_rtx_address (insn, &XVECEXP (x, i, j), class, action, mode);
4ca0f257 658 }
7b82b5da
SC
659}
660
541f7d56 661static void
fe08a886 662scan_rtx (insn, loc, class, action, type, earlyclobber)
7b82b5da 663 rtx insn;
541f7d56
BS
664 rtx *loc;
665 enum reg_class class;
666 enum scan_actions action;
667 enum op_type type;
fe08a886 668 int earlyclobber;
7b82b5da 669{
541f7d56
BS
670 const char *fmt;
671 rtx x = *loc;
672 enum rtx_code code = GET_CODE (x);
673 int i, j;
7b82b5da 674
541f7d56
BS
675 code = GET_CODE (x);
676 switch (code)
7b82b5da 677 {
541f7d56
BS
678 case CONST:
679 case CONST_INT:
680 case CONST_DOUBLE:
681 case SYMBOL_REF:
682 case LABEL_REF:
683 case CC0:
684 case PC:
685 return;
055be976 686
541f7d56 687 case REG:
fe08a886 688 scan_rtx_reg (insn, loc, class, action, type, earlyclobber);
541f7d56 689 return;
7b82b5da 690
541f7d56 691 case MEM:
3dcc68a4
NC
692 scan_rtx_address (insn, &XEXP (x, 0),
693 MODE_BASE_REG_CLASS (GET_MODE (x)), action,
85941a0a 694 GET_MODE (x));
541f7d56 695 return;
7b82b5da 696
541f7d56 697 case SET:
fe08a886
BS
698 scan_rtx (insn, &SET_SRC (x), class, action, OP_IN, 0);
699 scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 0);
541f7d56 700 return;
7b82b5da 701
541f7d56 702 case STRICT_LOW_PART:
fe08a886 703 scan_rtx (insn, &XEXP (x, 0), class, action, OP_INOUT, earlyclobber);
541f7d56 704 return;
7b82b5da 705
541f7d56
BS
706 case ZERO_EXTRACT:
707 case SIGN_EXTRACT:
708 scan_rtx (insn, &XEXP (x, 0), class, action,
fe08a886
BS
709 type == OP_IN ? OP_IN : OP_INOUT, earlyclobber);
710 scan_rtx (insn, &XEXP (x, 1), class, action, OP_IN, 0);
711 scan_rtx (insn, &XEXP (x, 2), class, action, OP_IN, 0);
541f7d56 712 return;
7b82b5da 713
541f7d56
BS
714 case POST_INC:
715 case PRE_INC:
716 case POST_DEC:
717 case PRE_DEC:
718 case POST_MODIFY:
719 case PRE_MODIFY:
720 /* Should only happen inside MEM. */
721 abort ();
722
723 case CLOBBER:
fe08a886 724 scan_rtx (insn, &SET_DEST (x), class, action, OP_OUT, 1);
541f7d56 725 return;
7b82b5da 726
541f7d56 727 case EXPR_LIST:
fe08a886 728 scan_rtx (insn, &XEXP (x, 0), class, action, type, 0);
541f7d56 729 if (XEXP (x, 1))
fe08a886 730 scan_rtx (insn, &XEXP (x, 1), class, action, type, 0);
541f7d56 731 return;
7b82b5da 732
541f7d56
BS
733 default:
734 break;
735 }
7b82b5da 736
541f7d56
BS
737 fmt = GET_RTX_FORMAT (code);
738 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7b82b5da
SC
739 {
740 if (fmt[i] == 'e')
fe08a886 741 scan_rtx (insn, &XEXP (x, i), class, action, type, 0);
7b82b5da
SC
742 else if (fmt[i] == 'E')
743 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
fe08a886 744 scan_rtx (insn, &XVECEXP (x, i, j), class, action, type, 0);
7b82b5da 745 }
7b82b5da
SC
746}
747
541f7d56 748/* Build def/use chain */
7b82b5da 749
541f7d56 750static struct du_chain *
fe08a886 751build_def_use (bb)
541f7d56 752 basic_block bb;
7b82b5da 753{
541f7d56 754 rtx insn;
1a43c33f 755
541f7d56 756 open_chains = closed_chains = NULL;
1a43c33f 757
541f7d56
BS
758 for (insn = bb->head; ; insn = NEXT_INSN (insn))
759 {
760 if (INSN_P (insn))
761 {
762 int n_ops;
763 rtx note;
764 rtx old_operands[MAX_RECOG_OPERANDS];
765 rtx old_dups[MAX_DUP_OPERANDS];
766 int i;
767 int alt;
768 int predicated;
769
541f7d56
BS
770 /* Process the insn, determining its effect on the def-use
771 chains. We perform the following steps with the register
772 references in the insn:
773 (1) Any read that overlaps an open chain, but doesn't exactly
774 match, causes that chain to be closed. We can't deal
775 with overlaps yet.
776 (2) Any read outside an operand causes any chain it overlaps
777 with to be closed, since we can't replace it.
778 (3) Any read inside an operand is added if there's already
779 an open chain for it.
780 (4) For any REG_DEAD note we find, close open chains that
781 overlap it.
782 (5) For any write we find, close open chains that overlap it.
783 (6) For any write we find in an operand, make a new chain.
784 (7) For any REG_UNUSED, close any chains we just opened. */
785
786 extract_insn (insn);
787 constrain_operands (1);
788 preprocess_constraints ();
789 alt = which_alternative;
790 n_ops = recog_data.n_operands;
791
792 /* Simplify the code below by rewriting things to reflect
793 matching constraints. Also promote OP_OUT to OP_INOUT
794 in predicated instructions. */
795
796 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
797 for (i = 0; i < n_ops; ++i)
7b82b5da 798 {
541f7d56
BS
799 int matches = recog_op_alt[i][alt].matches;
800 if (matches >= 0)
801 recog_op_alt[i][alt].class = recog_op_alt[matches][alt].class;
802 if (matches >= 0 || recog_op_alt[i][alt].matched >= 0
803 || (predicated && recog_data.operand_type[i] == OP_OUT))
804 recog_data.operand_type[i] = OP_INOUT;
7b82b5da 805 }
1a43c33f 806
541f7d56
BS
807 /* Step 1: Close chains for which we have overlapping reads. */
808 for (i = 0; i < n_ops; i++)
809 scan_rtx (insn, recog_data.operand_loc[i],
810 NO_REGS, terminate_overlapping_read,
fe08a886 811 recog_data.operand_type[i], 0);
1a43c33f 812
541f7d56
BS
813 /* Step 2: Close chains for which we have reads outside operands.
814 We do this by munging all operands into CC0, and closing
815 everything remaining. */
7b82b5da 816
541f7d56 817 for (i = 0; i < n_ops; i++)
1a43c33f 818 {
541f7d56
BS
819 old_operands[i] = recog_data.operand[i];
820 /* Don't squash match_operator or match_parallel here, since
821 we don't know that all of the contained registers are
822 reachable by proper operands. */
823 if (recog_data.constraints[i][0] == '\0')
824 continue;
825 *recog_data.operand_loc[i] = cc0_rtx;
826 }
827 for (i = 0; i < recog_data.n_dups; i++)
828 {
829 old_dups[i] = *recog_data.dup_loc[i];
830 *recog_data.dup_loc[i] = cc0_rtx;
1a43c33f 831 }
1a43c33f 832
fe08a886
BS
833 scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read,
834 OP_IN, 0);
1a43c33f 835
541f7d56
BS
836 for (i = 0; i < recog_data.n_dups; i++)
837 *recog_data.dup_loc[i] = old_dups[i];
838 for (i = 0; i < n_ops; i++)
839 *recog_data.operand_loc[i] = old_operands[i];
7b82b5da 840
541f7d56
BS
841 /* Step 2B: Can't rename function call argument registers. */
842 if (GET_CODE (insn) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (insn))
843 scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn),
fe08a886 844 NO_REGS, terminate_all_read, OP_IN, 0);
7b82b5da 845
3ada20ee
RH
846 /* Step 2C: Can't rename asm operands that were originally
847 hard registers. */
848 if (asm_noperands (PATTERN (insn)) > 0)
849 for (i = 0; i < n_ops; i++)
850 {
851 rtx *loc = recog_data.operand_loc[i];
852 rtx op = *loc;
853
854 if (GET_CODE (op) == REG
855 && REGNO (op) == ORIGINAL_REGNO (op)
856 && (recog_data.operand_type[i] == OP_IN
857 || recog_data.operand_type[i] == OP_INOUT))
858 scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0);
859 }
860
541f7d56
BS
861 /* Step 3: Append to chains for reads inside operands. */
862 for (i = 0; i < n_ops + recog_data.n_dups; i++)
863 {
864 int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
865 rtx *loc = (i < n_ops
866 ? recog_data.operand_loc[opn]
867 : recog_data.dup_loc[i - n_ops]);
868 enum reg_class class = recog_op_alt[opn][alt].class;
869 enum op_type type = recog_data.operand_type[opn];
870
871 /* Don't scan match_operand here, since we've no reg class
872 information to pass down. Any operands that we could
873 substitute in will be represented elsewhere. */
874 if (recog_data.constraints[opn][0] == '\0')
875 continue;
7b82b5da 876
541f7d56 877 if (recog_op_alt[opn][alt].is_address)
85941a0a 878 scan_rtx_address (insn, loc, class, mark_read, VOIDmode);
541f7d56 879 else
fe08a886 880 scan_rtx (insn, loc, class, mark_read, type, 0);
541f7d56 881 }
7b82b5da 882
6fb85418
BS
883 /* Step 4: Close chains for registers that die here.
884 Also record updates for REG_INC notes. */
541f7d56 885 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
6fb85418
BS
886 {
887 if (REG_NOTE_KIND (note) == REG_DEAD)
fe08a886
BS
888 scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead,
889 OP_IN, 0);
6fb85418 890 else if (REG_NOTE_KIND (note) == REG_INC)
fe08a886
BS
891 scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read,
892 OP_INOUT, 0);
6fb85418 893 }
1a43c33f 894
541f7d56
BS
895 /* Step 4B: If this is a call, any chain live at this point
896 requires a caller-saved reg. */
897 if (GET_CODE (insn) == CALL_INSN)
898 {
899 struct du_chain *p;
900 for (p = open_chains; p; p = p->next_chain)
fe08a886 901 p->need_caller_save_reg = 1;
541f7d56 902 }
7b82b5da 903
541f7d56
BS
904 /* Step 5: Close open chains that overlap writes. Similar to
905 step 2, we hide in-out operands, since we do not want to
906 close these chains. */
7b82b5da 907
541f7d56
BS
908 for (i = 0; i < n_ops; i++)
909 {
910 old_operands[i] = recog_data.operand[i];
911 if (recog_data.operand_type[i] == OP_INOUT)
912 *recog_data.operand_loc[i] = cc0_rtx;
913 }
914 for (i = 0; i < recog_data.n_dups; i++)
915 {
916 int opn = recog_data.dup_num[i];
917 old_dups[i] = *recog_data.dup_loc[i];
918 if (recog_data.operand_type[opn] == OP_INOUT)
919 *recog_data.dup_loc[i] = cc0_rtx;
920 }
7b82b5da 921
fe08a886 922 scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0);
7b82b5da 923
541f7d56
BS
924 for (i = 0; i < recog_data.n_dups; i++)
925 *recog_data.dup_loc[i] = old_dups[i];
926 for (i = 0; i < n_ops; i++)
927 *recog_data.operand_loc[i] = old_operands[i];
7b82b5da 928
541f7d56
BS
929 /* Step 6: Begin new chains for writes inside operands. */
930 /* ??? Many targets have output constraints on the SET_DEST
931 of a call insn, which is stupid, since these are certainly
3ada20ee
RH
932 ABI defined hard registers. Don't change calls at all.
933 Similarly take special care for asm statement that originally
934 referenced hard registers. */
935 if (asm_noperands (PATTERN (insn)) > 0)
936 {
937 for (i = 0; i < n_ops; i++)
938 if (recog_data.operand_type[i] == OP_OUT)
939 {
940 rtx *loc = recog_data.operand_loc[i];
941 rtx op = *loc;
942 enum reg_class class = recog_op_alt[i][alt].class;
943
944 if (GET_CODE (op) == REG
945 && REGNO (op) == ORIGINAL_REGNO (op))
946 continue;
947
948 scan_rtx (insn, loc, class, mark_write, OP_OUT,
949 recog_op_alt[i][alt].earlyclobber);
950 }
951 }
952 else if (GET_CODE (insn) != CALL_INSN)
541f7d56
BS
953 for (i = 0; i < n_ops + recog_data.n_dups; i++)
954 {
955 int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops];
956 rtx *loc = (i < n_ops
957 ? recog_data.operand_loc[opn]
958 : recog_data.dup_loc[i - n_ops]);
959 enum reg_class class = recog_op_alt[opn][alt].class;
960
961 if (recog_data.operand_type[opn] == OP_OUT)
fe08a886
BS
962 scan_rtx (insn, loc, class, mark_write, OP_OUT,
963 recog_op_alt[opn][alt].earlyclobber);
541f7d56 964 }
7b82b5da 965
541f7d56
BS
966 /* Step 7: Close chains for registers that were never
967 really used here. */
968 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
969 if (REG_NOTE_KIND (note) == REG_UNUSED)
fe08a886
BS
970 scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead,
971 OP_IN, 0);
541f7d56
BS
972 }
973 if (insn == bb->end)
974 break;
975 }
7b82b5da 976
541f7d56
BS
977 /* Since we close every chain when we find a REG_DEAD note, anything that
978 is still open lives past the basic block, so it can't be renamed. */
979 return closed_chains;
980}
7b82b5da 981
541f7d56
BS
982/* Dump all def/use chains in CHAINS to RTL_DUMP_FILE. They are
983 printed in reverse order as that's how we build them. */
7b82b5da 984
541f7d56
BS
985static void
986dump_def_use_chain (chains)
987 struct du_chain *chains;
988{
989 while (chains)
1a43c33f 990 {
541f7d56
BS
991 struct du_chain *this = chains;
992 int r = REGNO (*this->loc);
993 int nregs = HARD_REGNO_NREGS (r, GET_MODE (*this->loc));
994 fprintf (rtl_dump_file, "Register %s (%d):", reg_names[r], nregs);
995 while (this)
996 {
997 fprintf (rtl_dump_file, " %d [%s]", INSN_UID (this->insn),
998 reg_class_names[this->class]);
999 this = this->next_use;
1000 }
1001 fprintf (rtl_dump_file, "\n");
1002 chains = chains->next_chain;
1a43c33f 1003 }
7b82b5da 1004}
8582c27b
RH
1005\f
1006/* The following code does forward propagation of hard register copies.
1007 The object is to eliminate as many dependencies as possible, so that
1008 we have the most scheduling freedom. As a side effect, we also clean
1009 up some silly register allocation decisions made by reload. This
1010 code may be obsoleted by a new register allocator. */
1011
1012/* For each register, we have a list of registers that contain the same
1013 value. The OLDEST_REGNO field points to the head of the list, and
1014 the NEXT_REGNO field runs through the list. The MODE field indicates
1015 what mode the data is known to be in; this field is VOIDmode when the
1016 register is not known to contain valid data. */
1017
1018struct value_data_entry
1019{
1020 enum machine_mode mode;
1021 unsigned int oldest_regno;
1022 unsigned int next_regno;
1023};
1024
1025struct value_data
1026{
1027 struct value_data_entry e[FIRST_PSEUDO_REGISTER];
752ae914 1028 unsigned int max_value_regs;
8582c27b
RH
1029};
1030
1031static void kill_value_regno PARAMS ((unsigned, struct value_data *));
1032static void kill_value PARAMS ((rtx, struct value_data *));
752ae914
RH
1033static void set_value_regno PARAMS ((unsigned, enum machine_mode,
1034 struct value_data *));
8582c27b
RH
1035static void init_value_data PARAMS ((struct value_data *));
1036static void kill_clobbered_value PARAMS ((rtx, rtx, void *));
1037static void kill_set_value PARAMS ((rtx, rtx, void *));
1038static int kill_autoinc_value PARAMS ((rtx *, void *));
1039static void copy_value PARAMS ((rtx, rtx, struct value_data *));
8610ba70
RH
1040static bool mode_change_ok PARAMS ((enum machine_mode, enum machine_mode,
1041 unsigned int));
3ada20ee
RH
1042static rtx find_oldest_value_reg PARAMS ((enum reg_class, rtx,
1043 struct value_data *));
8582c27b
RH
1044static bool replace_oldest_value_reg PARAMS ((rtx *, enum reg_class, rtx,
1045 struct value_data *));
1046static bool replace_oldest_value_addr PARAMS ((rtx *, enum reg_class,
1047 enum machine_mode, rtx,
1048 struct value_data *));
1049static bool replace_oldest_value_mem PARAMS ((rtx, rtx, struct value_data *));
1050static bool copyprop_hardreg_forward_1 PARAMS ((basic_block,
1051 struct value_data *));
1052extern void debug_value_data PARAMS ((struct value_data *));
1053#ifdef ENABLE_CHECKING
1054static void validate_value_data PARAMS ((struct value_data *));
1055#endif
1056
1057/* Kill register REGNO. This involves removing it from any value lists,
1058 and resetting the value mode to VOIDmode. */
1059
1060static void
1061kill_value_regno (regno, vd)
1062 unsigned int regno;
1063 struct value_data *vd;
1064{
1065 unsigned int i, next;
1066
1067 if (vd->e[regno].oldest_regno != regno)
1068 {
1069 for (i = vd->e[regno].oldest_regno;
1070 vd->e[i].next_regno != regno;
1071 i = vd->e[i].next_regno)
1072 continue;
3de23727 1073 vd->e[i].next_regno = vd->e[regno].next_regno;
8582c27b
RH
1074 }
1075 else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM)
1076 {
1077 for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno)
1078 vd->e[i].oldest_regno = next;
1079 }
1080
1081 vd->e[regno].mode = VOIDmode;
1082 vd->e[regno].oldest_regno = regno;
1083 vd->e[regno].next_regno = INVALID_REGNUM;
1084
1085#ifdef ENABLE_CHECKING
1086 validate_value_data (vd);
1087#endif
1088}
1089
1090/* Kill X. This is a convenience function for kill_value_regno
3de23727 1091 so that we mind the mode the register is in. */
8582c27b
RH
1092
1093static void
1094kill_value (x, vd)
1095 rtx x;
1096 struct value_data *vd;
1097{
8686336f
JH
1098 /* SUBREGS are supposed to have been eliminated by now. But some
1099 ports, e.g. i386 sse, use them to smuggle vector type information
1100 through to instruction selection. Each such SUBREG should simplify,
1101 so if we get a NULL we've done something wrong elsewhere. */
1102
1103 if (GET_CODE (x) == SUBREG)
1104 x = simplify_subreg (GET_MODE (x), SUBREG_REG (x),
1105 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
8582c27b 1106 if (REG_P (x))
3de23727
RH
1107 {
1108 unsigned int regno = REGNO (x);
1109 unsigned int n = HARD_REGNO_NREGS (regno, GET_MODE (x));
752ae914 1110 unsigned int i, j;
3de23727 1111
752ae914 1112 /* Kill the value we're told to kill. */
3de23727
RH
1113 for (i = 0; i < n; ++i)
1114 kill_value_regno (regno + i, vd);
752ae914
RH
1115
1116 /* Kill everything that overlapped what we're told to kill. */
1117 if (regno < vd->max_value_regs)
1118 j = 0;
1119 else
1120 j = regno - vd->max_value_regs;
1121 for (; j < regno; ++j)
1122 {
1123 if (vd->e[j].mode == VOIDmode)
1124 continue;
2b672c08 1125 n = HARD_REGNO_NREGS (j, vd->e[j].mode);
752ae914
RH
1126 if (j + n > regno)
1127 for (i = 0; i < n; ++i)
1128 kill_value_regno (j + i, vd);
1129 }
3de23727 1130 }
8582c27b
RH
1131}
1132
752ae914
RH
1133/* Remember that REGNO is valid in MODE. */
1134
1135static void
1136set_value_regno (regno, mode, vd)
1137 unsigned int regno;
1138 enum machine_mode mode;
1139 struct value_data *vd;
1140{
1141 unsigned int nregs;
1142
1143 vd->e[regno].mode = mode;
1144
1145 nregs = HARD_REGNO_NREGS (regno, mode);
1146 if (nregs > vd->max_value_regs)
1147 vd->max_value_regs = nregs;
1148}
1149
8582c27b
RH
1150/* Initialize VD such that there are no known relationships between regs. */
1151
1152static void
1153init_value_data (vd)
1154 struct value_data *vd;
1155{
1156 int i;
1157 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1158 {
1159 vd->e[i].mode = VOIDmode;
1160 vd->e[i].oldest_regno = i;
1161 vd->e[i].next_regno = INVALID_REGNUM;
1162 }
752ae914 1163 vd->max_value_regs = 0;
8582c27b
RH
1164}
1165
1166/* Called through note_stores. If X is clobbered, kill its value. */
1167
1168static void
1169kill_clobbered_value (x, set, data)
1170 rtx x;
1171 rtx set;
1172 void *data;
1173{
1174 struct value_data *vd = data;
1175 if (GET_CODE (set) == CLOBBER)
1176 kill_value (x, vd);
1177}
1178
1179/* Called through note_stores. If X is set, not clobbered, kill its
1180 current value and install it as the root of its own value list. */
1181
1182static void
1183kill_set_value (x, set, data)
1184 rtx x;
1185 rtx set;
1186 void *data;
1187{
1188 struct value_data *vd = data;
1189 if (GET_CODE (set) != CLOBBER && REG_P (x))
1190 {
3de23727 1191 kill_value (x, vd);
752ae914 1192 set_value_regno (REGNO (x), GET_MODE (x), vd);
8582c27b
RH
1193 }
1194}
1195
1196/* Called through for_each_rtx. Kill any register used as the base of an
1197 auto-increment expression, and install that register as the root of its
1198 own value list. */
1199
1200static int
1201kill_autoinc_value (px, data)
1202 rtx *px;
1203 void *data;
1204{
1205 rtx x = *px;
1206 struct value_data *vd = data;
1207
1208 if (GET_RTX_CLASS (GET_CODE (x)) == 'a')
1209 {
3de23727
RH
1210 x = XEXP (x, 0);
1211 kill_value (x, vd);
752ae914 1212 set_value_regno (REGNO (x), Pmode, vd);
8582c27b
RH
1213 return -1;
1214 }
1215
1216 return 0;
1217}
1218
1219/* Assert that SRC has been copied to DEST. Adjust the data structures
1220 to reflect that SRC contains an older copy of the shared value. */
1221
1222static void
1223copy_value (dest, src, vd)
1224 rtx dest;
1225 rtx src;
1226 struct value_data *vd;
1227{
1228 unsigned int dr = REGNO (dest);
1229 unsigned int sr = REGNO (src);
21e16bd6 1230 unsigned int dn, sn;
8582c27b
RH
1231 unsigned int i;
1232
1233 /* ??? At present, it's possible to see noop sets. It'd be nice if
1234 this were cleaned up beforehand... */
1235 if (sr == dr)
1236 return;
1237
1238 /* Do not propagate copies to the stack pointer, as that can leave
1239 memory accesses with no scheduling dependancy on the stack update. */
1240 if (dr == STACK_POINTER_REGNUM)
1241 return;
1242
1243 /* Likewise with the frame pointer, if we're using one. */
1244 if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM)
1245 return;
1246
21e16bd6
RH
1247 /* If SRC and DEST overlap, don't record anything. */
1248 dn = HARD_REGNO_NREGS (dr, GET_MODE (dest));
1249 sn = HARD_REGNO_NREGS (sr, GET_MODE (dest));
1250 if ((dr > sr && dr < sr + sn)
1251 || (sr > dr && sr < dr + dn))
1252 return;
1253
8582c27b
RH
1254 /* If SRC had no assigned mode (i.e. we didn't know it was live)
1255 assign it now and assume the value came from an input argument
1256 or somesuch. */
1257 if (vd->e[sr].mode == VOIDmode)
752ae914 1258 set_value_regno (sr, vd->e[dr].mode, vd);
8582c27b 1259
42bd17b7
RH
1260 /* If SRC had been assigned a mode narrower than the copy, we can't
1261 link DEST into the chain, because not all of the pieces of the
1262 copy came from oldest_regno. */
1263 else if (sn > (unsigned int) HARD_REGNO_NREGS (sr, vd->e[sr].mode))
1264 return;
1265
8582c27b
RH
1266 /* Link DR at the end of the value chain used by SR. */
1267
1268 vd->e[dr].oldest_regno = vd->e[sr].oldest_regno;
1269
1270 for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno)
1271 continue;
1272 vd->e[i].next_regno = dr;
1273
1274#ifdef ENABLE_CHECKING
1275 validate_value_data (vd);
1276#endif
1277}
1278
8610ba70
RH
1279/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */
1280
1281static bool
1282mode_change_ok (orig_mode, new_mode, regno)
1283 enum machine_mode orig_mode, new_mode;
88f92c0f 1284 unsigned int regno ATTRIBUTE_UNUSED;
8610ba70
RH
1285{
1286 if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode))
1287 return false;
1288
1289#ifdef CLASS_CANNOT_CHANGE_MODE
1290 if (TEST_HARD_REG_BIT (reg_class_contents[CLASS_CANNOT_CHANGE_MODE], regno)
1291 && CLASS_CANNOT_CHANGE_MODE_P (orig_mode, new_mode))
1292 return false;
1293#endif
1294
1295 return true;
1296}
1297
8582c27b
RH
1298/* Find the oldest copy of the value contained in REGNO that is in
1299 register class CLASS and has mode MODE. If found, return an rtx
1300 of that oldest register, otherwise return NULL. */
1301
1302static rtx
3ada20ee 1303find_oldest_value_reg (class, reg, vd)
8582c27b 1304 enum reg_class class;
3ada20ee 1305 rtx reg;
8582c27b
RH
1306 struct value_data *vd;
1307{
3ada20ee
RH
1308 unsigned int regno = REGNO (reg);
1309 enum machine_mode mode = GET_MODE (reg);
8582c27b
RH
1310 unsigned int i;
1311
57d1019b
RH
1312 /* If we are accessing REG in some mode other that what we set it in,
1313 make sure that the replacement is valid. In particular, consider
1314 (set (reg:DI r11) (...))
1315 (set (reg:SI r9) (reg:SI r11))
1316 (set (reg:SI r10) (...))
1317 (set (...) (reg:DI r9))
1318 Replacing r9 with r11 is invalid. */
1319 if (mode != vd->e[regno].mode)
1320 {
1321 if (HARD_REGNO_NREGS (regno, mode)
1322 > HARD_REGNO_NREGS (regno, vd->e[regno].mode))
1323 return NULL_RTX;
1324 }
1325
8582c27b 1326 for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno)
8610ba70
RH
1327 if (TEST_HARD_REG_BIT (reg_class_contents[class], i)
1328 && (vd->e[i].mode == mode
c4abb293 1329 || mode_change_ok (vd->e[i].mode, mode, i)))
3ada20ee 1330 {
dd0a18c0 1331 rtx new = gen_rtx_raw_REG (mode, i);
3ada20ee
RH
1332 ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg);
1333 return new;
1334 }
8582c27b
RH
1335
1336 return NULL_RTX;
1337}
1338
1339/* If possible, replace the register at *LOC with the oldest register
1340 in register class CLASS. Return true if successfully replaced. */
1341
1342static bool
1343replace_oldest_value_reg (loc, class, insn, vd)
1344 rtx *loc;
1345 enum reg_class class;
1346 rtx insn;
1347 struct value_data *vd;
1348{
3ada20ee 1349 rtx new = find_oldest_value_reg (class, *loc, vd);
8582c27b
RH
1350 if (new)
1351 {
1352 if (rtl_dump_file)
1353 fprintf (rtl_dump_file, "insn %u: replaced reg %u with %u\n",
1354 INSN_UID (insn), REGNO (*loc), REGNO (new));
1355
1356 *loc = new;
1357 return true;
1358 }
1359 return false;
1360}
1361
1362/* Similar to replace_oldest_value_reg, but *LOC contains an address.
1363 Adapted from find_reloads_address_1. CLASS is INDEX_REG_CLASS or
1364 BASE_REG_CLASS depending on how the register is being considered. */
1365
1366static bool
1367replace_oldest_value_addr (loc, class, mode, insn, vd)
1368 rtx *loc;
1369 enum reg_class class;
1370 enum machine_mode mode;
1371 rtx insn;
1372 struct value_data *vd;
1373{
1374 rtx x = *loc;
1375 RTX_CODE code = GET_CODE (x);
1376 const char *fmt;
1377 int i, j;
1378 bool changed = false;
1379
1380 switch (code)
1381 {
1382 case PLUS:
1383 {
1384 rtx orig_op0 = XEXP (x, 0);
1385 rtx orig_op1 = XEXP (x, 1);
1386 RTX_CODE code0 = GET_CODE (orig_op0);
1387 RTX_CODE code1 = GET_CODE (orig_op1);
1388 rtx op0 = orig_op0;
1389 rtx op1 = orig_op1;
1390 rtx *locI = NULL;
1391 rtx *locB = NULL;
1392
1393 if (GET_CODE (op0) == SUBREG)
1394 {
1395 op0 = SUBREG_REG (op0);
1396 code0 = GET_CODE (op0);
1397 }
1398
1399 if (GET_CODE (op1) == SUBREG)
1400 {
1401 op1 = SUBREG_REG (op1);
1402 code1 = GET_CODE (op1);
1403 }
1404
1405 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
1406 || code0 == ZERO_EXTEND || code1 == MEM)
1407 {
1408 locI = &XEXP (x, 0);
1409 locB = &XEXP (x, 1);
1410 }
1411 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
1412 || code1 == ZERO_EXTEND || code0 == MEM)
1413 {
1414 locI = &XEXP (x, 1);
1415 locB = &XEXP (x, 0);
1416 }
1417 else if (code0 == CONST_INT || code0 == CONST
1418 || code0 == SYMBOL_REF || code0 == LABEL_REF)
1419 locB = &XEXP (x, 1);
1420 else if (code1 == CONST_INT || code1 == CONST
1421 || code1 == SYMBOL_REF || code1 == LABEL_REF)
1422 locB = &XEXP (x, 0);
1423 else if (code0 == REG && code1 == REG)
1424 {
1425 int index_op;
1426
1427 if (REG_OK_FOR_INDEX_P (op0)
1428 && REG_MODE_OK_FOR_BASE_P (op1, mode))
1429 index_op = 0;
1430 else if (REG_OK_FOR_INDEX_P (op1)
1431 && REG_MODE_OK_FOR_BASE_P (op0, mode))
1432 index_op = 1;
1433 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
1434 index_op = 0;
1435 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
1436 index_op = 1;
1437 else if (REG_OK_FOR_INDEX_P (op1))
1438 index_op = 1;
1439 else
1440 index_op = 0;
1441
1442 locI = &XEXP (x, index_op);
1443 locB = &XEXP (x, !index_op);
1444 }
1445 else if (code0 == REG)
1446 {
1447 locI = &XEXP (x, 0);
1448 locB = &XEXP (x, 1);
1449 }
1450 else if (code1 == REG)
1451 {
1452 locI = &XEXP (x, 1);
1453 locB = &XEXP (x, 0);
1454 }
1455
1456 if (locI)
1457 changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode,
1458 insn, vd);
1459 if (locB)
3dcc68a4
NC
1460 changed |= replace_oldest_value_addr (locB,
1461 MODE_BASE_REG_CLASS (mode),
1462 mode, insn, vd);
8582c27b
RH
1463 return changed;
1464 }
1465
1466 case POST_INC:
1467 case POST_DEC:
1468 case POST_MODIFY:
1469 case PRE_INC:
1470 case PRE_DEC:
1471 case PRE_MODIFY:
1472 return false;
1473
1474 case MEM:
1475 return replace_oldest_value_mem (x, insn, vd);
1476
1477 case REG:
1478 return replace_oldest_value_reg (loc, class, insn, vd);
1479
1480 default:
1481 break;
1482 }
1483
1484 fmt = GET_RTX_FORMAT (code);
1485 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1486 {
1487 if (fmt[i] == 'e')
1488 changed |= replace_oldest_value_addr (&XEXP (x, i), class, mode,
1489 insn, vd);
1490 else if (fmt[i] == 'E')
1491 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1492 changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), class,
1493 mode, insn, vd);
1494 }
1495
1496 return changed;
1497}
1498
1499/* Similar to replace_oldest_value_reg, but X contains a memory. */
1500
1501static bool
1502replace_oldest_value_mem (x, insn, vd)
1503 rtx x;
1504 rtx insn;
1505 struct value_data *vd;
1506{
3dcc68a4
NC
1507 return replace_oldest_value_addr (&XEXP (x, 0),
1508 MODE_BASE_REG_CLASS (GET_MODE (x)),
8582c27b
RH
1509 GET_MODE (x), insn, vd);
1510}
1511
1512/* Perform the forward copy propagation on basic block BB. */
1513
1514static bool
1515copyprop_hardreg_forward_1 (bb, vd)
1516 basic_block bb;
1517 struct value_data *vd;
1518{
1519 bool changed = false;
1520 rtx insn;
1521
1522 for (insn = bb->head; ; insn = NEXT_INSN (insn))
1523 {
1524 int n_ops, i, alt, predicated;
3ada20ee 1525 bool is_asm;
8582c27b
RH
1526 rtx set;
1527
1528 if (! INSN_P (insn))
1529 {
1530 if (insn == bb->end)
1531 break;
1532 else
1533 continue;
1534 }
1535
1536 set = single_set (insn);
1537 extract_insn (insn);
1538 constrain_operands (1);
1539 preprocess_constraints ();
1540 alt = which_alternative;
1541 n_ops = recog_data.n_operands;
3ada20ee 1542 is_asm = asm_noperands (PATTERN (insn)) >= 0;
8582c27b
RH
1543
1544 /* Simplify the code below by rewriting things to reflect
1545 matching constraints. Also promote OP_OUT to OP_INOUT
1546 in predicated instructions. */
1547
1548 predicated = GET_CODE (PATTERN (insn)) == COND_EXEC;
1549 for (i = 0; i < n_ops; ++i)
1550 {
1551 int matches = recog_op_alt[i][alt].matches;
1552 if (matches >= 0)
1553 recog_op_alt[i][alt].class = recog_op_alt[matches][alt].class;
1554 if (matches >= 0 || recog_op_alt[i][alt].matched >= 0
1555 || (predicated && recog_data.operand_type[i] == OP_OUT))
1556 recog_data.operand_type[i] = OP_INOUT;
1557 }
1558
1559 /* For each earlyclobber operand, zap the value data. */
1560 for (i = 0; i < n_ops; i++)
1561 if (recog_op_alt[i][alt].earlyclobber)
1562 kill_value (recog_data.operand[i], vd);
1563
1564 /* Within asms, a clobber cannot overlap inputs or outputs.
1565 I wouldn't think this were true for regular insns, but
1566 scan_rtx treats them like that... */
1567 note_stores (PATTERN (insn), kill_clobbered_value, vd);
1568
1569 /* Kill all auto-incremented values. */
1570 /* ??? REG_INC is useless, since stack pushes aren't done that way. */
1571 for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd);
1572
752ae914
RH
1573 /* Kill all early-clobbered operands. */
1574 for (i = 0; i < n_ops; i++)
1575 if (recog_op_alt[i][alt].earlyclobber)
1576 kill_value (recog_data.operand[i], vd);
1577
8582c27b
RH
1578 /* Special-case plain move instructions, since we may well
1579 be able to do the move from a different register class. */
1580 if (set && REG_P (SET_SRC (set)))
1581 {
3ada20ee
RH
1582 rtx src = SET_SRC (set);
1583 unsigned int regno = REGNO (src);
1584 enum machine_mode mode = GET_MODE (src);
8582c27b
RH
1585 unsigned int i;
1586 rtx new;
1587
57d1019b
RH
1588 /* If we are accessing SRC in some mode other that what we
1589 set it in, make sure that the replacement is valid. */
1590 if (mode != vd->e[regno].mode)
1591 {
1592 if (HARD_REGNO_NREGS (regno, mode)
1593 > HARD_REGNO_NREGS (regno, vd->e[regno].mode))
1594 goto no_move_special_case;
1595 }
1596
8582c27b
RH
1597 /* If the destination is also a register, try to find a source
1598 register in the same class. */
1599 if (REG_P (SET_DEST (set)))
1600 {
3ada20ee 1601 new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd);
8582c27b
RH
1602 if (new && validate_change (insn, &SET_SRC (set), new, 0))
1603 {
1604 if (rtl_dump_file)
1605 fprintf (rtl_dump_file,
1606 "insn %u: replaced reg %u with %u\n",
1607 INSN_UID (insn), regno, REGNO (new));
1608 changed = true;
1609 goto did_replacement;
1610 }
1611 }
1612
1613 /* Otherwise, try all valid registers and see if its valid. */
1614 for (i = vd->e[regno].oldest_regno; i != regno;
1615 i = vd->e[i].next_regno)
c4abb293
RH
1616 if (vd->e[i].mode == mode
1617 || mode_change_ok (vd->e[i].mode, mode, i))
8582c27b 1618 {
dd0a18c0 1619 new = gen_rtx_raw_REG (mode, i);
8582c27b
RH
1620 if (validate_change (insn, &SET_SRC (set), new, 0))
1621 {
3ada20ee 1622 ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src);
8582c27b
RH
1623 if (rtl_dump_file)
1624 fprintf (rtl_dump_file,
1625 "insn %u: replaced reg %u with %u\n",
1626 INSN_UID (insn), regno, REGNO (new));
1627 changed = true;
1628 goto did_replacement;
1629 }
1630 }
1631 }
57d1019b 1632 no_move_special_case:
8582c27b
RH
1633
1634 /* For each input operand, replace a hard register with the
1635 eldest live copy that's in an appropriate register class. */
1636 for (i = 0; i < n_ops; i++)
1637 {
1638 bool replaced = false;
1639
1640 /* Don't scan match_operand here, since we've no reg class
1641 information to pass down. Any operands that we could
1642 substitute in will be represented elsewhere. */
1643 if (recog_data.constraints[i][0] == '\0')
1644 continue;
1645
3ada20ee
RH
1646 /* Don't replace in asms intentionally referencing hard regs. */
1647 if (is_asm && GET_CODE (recog_data.operand[i]) == REG
1648 && (REGNO (recog_data.operand[i])
1649 == ORIGINAL_REGNO (recog_data.operand[i])))
1650 continue;
1651
8582c27b
RH
1652 if (recog_data.operand_type[i] == OP_IN)
1653 {
1654 if (recog_op_alt[i][alt].is_address)
1655 replaced
1656 = replace_oldest_value_addr (recog_data.operand_loc[i],
1657 recog_op_alt[i][alt].class,
1658 VOIDmode, insn, vd);
1659 else if (REG_P (recog_data.operand[i]))
1660 replaced
1661 = replace_oldest_value_reg (recog_data.operand_loc[i],
1662 recog_op_alt[i][alt].class,
1663 insn, vd);
1664 else if (GET_CODE (recog_data.operand[i]) == MEM)
1665 replaced = replace_oldest_value_mem (recog_data.operand[i],
1666 insn, vd);
1667 }
1668 else if (GET_CODE (recog_data.operand[i]) == MEM)
1669 replaced = replace_oldest_value_mem (recog_data.operand[i],
1670 insn, vd);
1671
1672 /* If we performed any replacement, update match_dups. */
1673 if (replaced)
1674 {
1675 int j;
1676 rtx new;
1677
1678 changed = true;
1679
1680 new = *recog_data.operand_loc[i];
1681 recog_data.operand[i] = new;
1682 for (j = 0; j < recog_data.n_dups; j++)
1683 if (recog_data.dup_num[j] == i)
1684 *recog_data.dup_loc[j] = new;
1685 }
1686 }
1687
1688 did_replacement:
1689 /* Clobber call-clobbered registers. */
1690 if (GET_CODE (insn) == CALL_INSN)
1691 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1692 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1693 kill_value_regno (i, vd);
1694
1695 /* Notice stores. */
1696 note_stores (PATTERN (insn), kill_set_value, vd);
1697
1698 /* Notice copies. */
1699 if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set)))
1700 copy_value (SET_DEST (set), SET_SRC (set), vd);
1701
1702 if (insn == bb->end)
1703 break;
1704 }
1705
1706 return changed;
1707}
1708
1709/* Main entry point for the forward copy propagation optimization. */
1710
1711void
1712copyprop_hardreg_forward ()
1713{
8582c27b 1714 struct value_data *all_vd;
3de23727
RH
1715 bool need_refresh;
1716 int b;
8582c27b 1717
3de23727 1718 need_refresh = false;
8582c27b
RH
1719
1720 all_vd = xmalloc (sizeof (struct value_data) * n_basic_blocks);
1721
1722 for (b = 0; b < n_basic_blocks; b++)
1723 {
1724 basic_block bb = BASIC_BLOCK (b);
1725
1726 /* If a block has a single predecessor, that we've already
1727 processed, begin with the value data that was live at
1728 the end of the predecessor block. */
1729 /* ??? Ought to use more intelligent queueing of blocks. */
1730 if (bb->pred
1731 && ! bb->pred->pred_next
22c56562 1732 && ! (bb->pred->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))
8582c27b
RH
1733 && bb->pred->src->index != ENTRY_BLOCK
1734 && bb->pred->src->index < b)
1735 all_vd[b] = all_vd[bb->pred->src->index];
1736 else
1737 init_value_data (all_vd + b);
1738
1739 if (copyprop_hardreg_forward_1 (bb, all_vd + b))
3de23727 1740 need_refresh = true;
8582c27b
RH
1741 }
1742
1743 if (need_refresh)
1744 {
1745 if (rtl_dump_file)
1746 fputs ("\n\n", rtl_dump_file);
1747
3de23727
RH
1748 /* ??? Irritatingly, delete_noop_moves does not take a set of blocks
1749 to scan, so we have to do a life update with no initial set of
1750 blocks Just In Case. */
1751 delete_noop_moves (get_insns ());
1752 update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES,
8582c27b
RH
1753 PROP_DEATH_NOTES
1754 | PROP_SCAN_DEAD_CODE
1755 | PROP_KILL_DEAD_CODE);
1756 }
1757
8582c27b
RH
1758 free (all_vd);
1759}
1760
1761/* Dump the value chain data to stderr. */
1762
1763void
1764debug_value_data (vd)
1765 struct value_data *vd;
1766{
1767 HARD_REG_SET set;
1768 unsigned int i, j;
1769
1770 CLEAR_HARD_REG_SET (set);
1771
1772 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1773 if (vd->e[i].oldest_regno == i)
1774 {
1775 if (vd->e[i].mode == VOIDmode)
1776 {
1777 if (vd->e[i].next_regno != INVALID_REGNUM)
1778 fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n",
1779 i, vd->e[i].next_regno);
1780 continue;
1781 }
1782
1783 SET_HARD_REG_BIT (set, i);
1784 fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode));
1785
1786 for (j = vd->e[i].next_regno;
1787 j != INVALID_REGNUM;
1788 j = vd->e[j].next_regno)
1789 {
57d1019b 1790 if (TEST_HARD_REG_BIT (set, j))
8582c27b
RH
1791 {
1792 fprintf (stderr, "[%u] Loop in regno chain\n", j);
1793 return;
1794 }
1795
1796 if (vd->e[j].oldest_regno != i)
1797 {
1798 fprintf (stderr, "[%u] Bad oldest_regno (%u)\n",
1799 j, vd->e[j].oldest_regno);
1800 return;
1801 }
1802 SET_HARD_REG_BIT (set, j);
1803 fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode));
1804 }
1805 fputc ('\n', stderr);
1806 }
1807
1808 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1809 if (! TEST_HARD_REG_BIT (set, i)
1810 && (vd->e[i].mode != VOIDmode
1811 || vd->e[i].oldest_regno != i
1812 || vd->e[i].next_regno != INVALID_REGNUM))
1813 fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n",
1814 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1815 vd->e[i].next_regno);
1816}
1817
1818#ifdef ENABLE_CHECKING
1819static void
1820validate_value_data (vd)
1821 struct value_data *vd;
1822{
1823 HARD_REG_SET set;
1824 unsigned int i, j;
1825
1826 CLEAR_HARD_REG_SET (set);
1827
1828 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1829 if (vd->e[i].oldest_regno == i)
1830 {
1831 if (vd->e[i].mode == VOIDmode)
1832 {
1833 if (vd->e[i].next_regno != INVALID_REGNUM)
1834 internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)",
1835 i, vd->e[i].next_regno);
1836 continue;
1837 }
1838
1839 SET_HARD_REG_BIT (set, i);
1840
1841 for (j = vd->e[i].next_regno;
1842 j != INVALID_REGNUM;
1843 j = vd->e[j].next_regno)
1844 {
1845 if (TEST_HARD_REG_BIT (set, j))
1846 internal_error ("validate_value_data: Loop in regno chain (%u)",
1847 j);
1848 if (vd->e[j].oldest_regno != i)
1849 internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)",
1850 j, vd->e[j].oldest_regno);
1851
1852 SET_HARD_REG_BIT (set, j);
1853 }
1854 }
1855
1856 for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i)
1857 if (! TEST_HARD_REG_BIT (set, i)
1858 && (vd->e[i].mode != VOIDmode
1859 || vd->e[i].oldest_regno != i
1860 || vd->e[i].next_regno != INVALID_REGNUM))
1861 internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)",
1862 i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno,
1863 vd->e[i].next_regno);
1864}
1865#endif
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