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7b82b5da | 1 | /* Register renaming for the GNU compiler. |
684bcee5 | 2 | Copyright (C) 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. |
7b82b5da | 3 | |
1322177d | 4 | This file is part of GCC. |
7b82b5da | 5 | |
1322177d LB |
6 | GCC is free software; you can redistribute it and/or modify it |
7 | under the terms of the GNU General Public License as published by | |
7b82b5da SC |
8 | the Free Software Foundation; either version 2, or (at your option) |
9 | any later version. | |
10 | ||
1322177d LB |
11 | GCC is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
7b82b5da SC |
15 | |
16 | You should have received a copy of the GNU General Public License | |
1322177d LB |
17 | along with GCC; see the file COPYING. If not, write to the Free |
18 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
19 | 02111-1307, USA. */ | |
7b82b5da SC |
20 | |
21 | #include "config.h" | |
22 | #include "system.h" | |
4977bab6 ZW |
23 | #include "coretypes.h" |
24 | #include "tm.h" | |
7b82b5da | 25 | #include "rtl.h" |
541f7d56 | 26 | #include "tm_p.h" |
7b82b5da SC |
27 | #include "insn-config.h" |
28 | #include "regs.h" | |
541f7d56 BS |
29 | #include "hard-reg-set.h" |
30 | #include "basic-block.h" | |
31 | #include "reload.h" | |
7b82b5da SC |
32 | #include "output.h" |
33 | #include "function.h" | |
34 | #include "recog.h" | |
541f7d56 | 35 | #include "flags.h" |
8582c27b | 36 | #include "toplev.h" |
541f7d56 BS |
37 | #include "obstack.h" |
38 | ||
541f7d56 BS |
39 | #ifndef REG_MODE_OK_FOR_BASE_P |
40 | #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO) | |
41 | #endif | |
7b82b5da SC |
42 | |
43 | static const char *const reg_class_names[] = REG_CLASS_NAMES; | |
44 | ||
541f7d56 | 45 | struct du_chain |
7b82b5da | 46 | { |
541f7d56 BS |
47 | struct du_chain *next_chain; |
48 | struct du_chain *next_use; | |
7b82b5da | 49 | |
541f7d56 BS |
50 | rtx insn; |
51 | rtx *loc; | |
e3a64162 | 52 | ENUM_BITFIELD(reg_class) cl : 16; |
541f7d56 | 53 | unsigned int need_caller_save_reg:1; |
fe08a886 | 54 | unsigned int earlyclobber:1; |
541f7d56 | 55 | }; |
7b82b5da | 56 | |
541f7d56 BS |
57 | enum scan_actions |
58 | { | |
541f7d56 BS |
59 | terminate_all_read, |
60 | terminate_overlapping_read, | |
61 | terminate_write, | |
62 | terminate_dead, | |
63 | mark_read, | |
64 | mark_write | |
65 | }; | |
66 | ||
67 | static const char * const scan_actions_name[] = | |
68 | { | |
541f7d56 BS |
69 | "terminate_all_read", |
70 | "terminate_overlapping_read", | |
71 | "terminate_write", | |
72 | "terminate_dead", | |
73 | "mark_read", | |
74 | "mark_write" | |
75 | }; | |
76 | ||
77 | static struct obstack rename_obstack; | |
78 | ||
0c20a65f AJ |
79 | static void do_replace (struct du_chain *, int); |
80 | static void scan_rtx_reg (rtx, rtx *, enum reg_class, | |
81 | enum scan_actions, enum op_type, int); | |
82 | static void scan_rtx_address (rtx, rtx *, enum reg_class, | |
83 | enum scan_actions, enum machine_mode); | |
84 | static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, | |
85 | enum op_type, int); | |
86 | static struct du_chain *build_def_use (basic_block); | |
87 | static void dump_def_use_chain (struct du_chain *); | |
88 | static void note_sets (rtx, rtx, void *); | |
89 | static void clear_dead_regs (HARD_REG_SET *, enum machine_mode, rtx); | |
90 | static void merge_overlapping_regs (basic_block, HARD_REG_SET *, | |
91 | struct du_chain *); | |
fe08a886 BS |
92 | |
93 | /* Called through note_stores from update_life. Find sets of registers, and | |
94 | record them in *DATA (which is actually a HARD_REG_SET *). */ | |
95 | ||
96 | static void | |
0c20a65f | 97 | note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data) |
fe08a886 BS |
98 | { |
99 | HARD_REG_SET *pset = (HARD_REG_SET *) data; | |
100 | unsigned int regno; | |
101 | int nregs; | |
f8cfc6aa | 102 | if (!REG_P (x)) |
fe08a886 BS |
103 | return; |
104 | regno = REGNO (x); | |
66fd46b6 | 105 | nregs = hard_regno_nregs[regno][GET_MODE (x)]; |
3d17d93d AO |
106 | |
107 | /* There must not be pseudos at this point. */ | |
108 | if (regno + nregs > FIRST_PSEUDO_REGISTER) | |
109 | abort (); | |
110 | ||
fe08a886 BS |
111 | while (nregs-- > 0) |
112 | SET_HARD_REG_BIT (*pset, regno + nregs); | |
113 | } | |
114 | ||
115 | /* Clear all registers from *PSET for which a note of kind KIND can be found | |
116 | in the list NOTES. */ | |
117 | ||
118 | static void | |
0c20a65f | 119 | clear_dead_regs (HARD_REG_SET *pset, enum machine_mode kind, rtx notes) |
fe08a886 BS |
120 | { |
121 | rtx note; | |
122 | for (note = notes; note; note = XEXP (note, 1)) | |
123 | if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0))) | |
124 | { | |
125 | rtx reg = XEXP (note, 0); | |
126 | unsigned int regno = REGNO (reg); | |
66fd46b6 | 127 | int nregs = hard_regno_nregs[regno][GET_MODE (reg)]; |
3d17d93d AO |
128 | |
129 | /* There must not be pseudos at this point. */ | |
130 | if (regno + nregs > FIRST_PSEUDO_REGISTER) | |
131 | abort (); | |
132 | ||
fe08a886 BS |
133 | while (nregs-- > 0) |
134 | CLEAR_HARD_REG_BIT (*pset, regno + nregs); | |
135 | } | |
136 | } | |
137 | ||
138 | /* For a def-use chain CHAIN in basic block B, find which registers overlap | |
139 | its lifetime and set the corresponding bits in *PSET. */ | |
140 | ||
141 | static void | |
0c20a65f AJ |
142 | merge_overlapping_regs (basic_block b, HARD_REG_SET *pset, |
143 | struct du_chain *chain) | |
fe08a886 BS |
144 | { |
145 | struct du_chain *t = chain; | |
146 | rtx insn; | |
147 | HARD_REG_SET live; | |
148 | ||
149 | REG_SET_TO_HARD_REG_SET (live, b->global_live_at_start); | |
a813c111 | 150 | insn = BB_HEAD (b); |
fe08a886 BS |
151 | while (t) |
152 | { | |
153 | /* Search forward until the next reference to the register to be | |
154 | renamed. */ | |
155 | while (insn != t->insn) | |
156 | { | |
157 | if (INSN_P (insn)) | |
158 | { | |
159 | clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn)); | |
160 | note_stores (PATTERN (insn), note_sets, (void *) &live); | |
161 | /* Only record currently live regs if we are inside the | |
162 | reg's live range. */ | |
163 | if (t != chain) | |
164 | IOR_HARD_REG_SET (*pset, live); | |
3b03c671 | 165 | clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn)); |
fe08a886 BS |
166 | } |
167 | insn = NEXT_INSN (insn); | |
168 | } | |
169 | ||
170 | IOR_HARD_REG_SET (*pset, live); | |
171 | ||
172 | /* For the last reference, also merge in all registers set in the | |
173 | same insn. | |
174 | @@@ We only have take earlyclobbered sets into account. */ | |
175 | if (! t->next_use) | |
176 | note_stores (PATTERN (insn), note_sets, (void *) pset); | |
177 | ||
178 | t = t->next_use; | |
179 | } | |
180 | } | |
181 | ||
182 | /* Perform register renaming on the current function. */ | |
7b82b5da | 183 | |
541f7d56 | 184 | void |
0c20a65f | 185 | regrename_optimize (void) |
541f7d56 | 186 | { |
fe08a886 BS |
187 | int tick[FIRST_PSEUDO_REGISTER]; |
188 | int this_tick = 0; | |
e0082a72 | 189 | basic_block bb; |
541f7d56 | 190 | char *first_obj; |
7b82b5da | 191 | |
fe08a886 BS |
192 | memset (tick, 0, sizeof tick); |
193 | ||
541f7d56 | 194 | gcc_obstack_init (&rename_obstack); |
703ad42b | 195 | first_obj = obstack_alloc (&rename_obstack, 0); |
7b82b5da | 196 | |
e0082a72 | 197 | FOR_EACH_BB (bb) |
541f7d56 | 198 | { |
541f7d56 | 199 | struct du_chain *all_chains = 0; |
541f7d56 BS |
200 | HARD_REG_SET unavailable; |
201 | HARD_REG_SET regs_seen; | |
7b82b5da | 202 | |
541f7d56 | 203 | CLEAR_HARD_REG_SET (unavailable); |
7b82b5da | 204 | |
c263766c RH |
205 | if (dump_file) |
206 | fprintf (dump_file, "\nBasic block %d:\n", bb->index); | |
7b82b5da | 207 | |
fe08a886 | 208 | all_chains = build_def_use (bb); |
7b82b5da | 209 | |
c263766c | 210 | if (dump_file) |
541f7d56 | 211 | dump_def_use_chain (all_chains); |
7b82b5da | 212 | |
fe08a886 | 213 | CLEAR_HARD_REG_SET (unavailable); |
541f7d56 BS |
214 | /* Don't clobber traceback for noreturn functions. */ |
215 | if (frame_pointer_needed) | |
216 | { | |
65599eb4 | 217 | int i; |
3b03c671 | 218 | |
66fd46b6 | 219 | for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;) |
65599eb4 | 220 | SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i); |
3b03c671 | 221 | |
541f7d56 | 222 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
66fd46b6 | 223 | for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;) |
65599eb4 | 224 | SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i); |
541f7d56 BS |
225 | #endif |
226 | } | |
7b82b5da | 227 | |
541f7d56 BS |
228 | CLEAR_HARD_REG_SET (regs_seen); |
229 | while (all_chains) | |
230 | { | |
62551c66 | 231 | int new_reg, best_new_reg; |
541f7d56 BS |
232 | int n_uses; |
233 | struct du_chain *this = all_chains; | |
234 | struct du_chain *tmp, *last; | |
235 | HARD_REG_SET this_unavailable; | |
4e812700 | 236 | int reg = REGNO (*this->loc); |
85941a0a | 237 | int i; |
7b82b5da | 238 | |
541f7d56 | 239 | all_chains = this->next_chain; |
3b03c671 | 240 | |
62551c66 JH |
241 | best_new_reg = reg; |
242 | ||
fe08a886 | 243 | #if 0 /* This just disables optimization opportunities. */ |
541f7d56 BS |
244 | /* Only rename once we've seen the reg more than once. */ |
245 | if (! TEST_HARD_REG_BIT (regs_seen, reg)) | |
1a43c33f | 246 | { |
541f7d56 BS |
247 | SET_HARD_REG_BIT (regs_seen, reg); |
248 | continue; | |
249 | } | |
fe08a886 | 250 | #endif |
1a43c33f | 251 | |
f4d578da BS |
252 | if (fixed_regs[reg] || global_regs[reg] |
253 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM | |
254 | || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) | |
255 | #else | |
256 | || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) | |
257 | #endif | |
258 | ) | |
541f7d56 | 259 | continue; |
1a43c33f | 260 | |
541f7d56 | 261 | COPY_HARD_REG_SET (this_unavailable, unavailable); |
1a43c33f | 262 | |
541f7d56 BS |
263 | /* Find last entry on chain (which has the need_caller_save bit), |
264 | count number of uses, and narrow the set of registers we can | |
265 | use for renaming. */ | |
266 | n_uses = 0; | |
267 | for (last = this; last->next_use; last = last->next_use) | |
268 | { | |
269 | n_uses++; | |
270 | IOR_COMPL_HARD_REG_SET (this_unavailable, | |
e3a64162 | 271 | reg_class_contents[last->cl]); |
1a43c33f | 272 | } |
541f7d56 BS |
273 | if (n_uses < 1) |
274 | continue; | |
7b82b5da | 275 | |
541f7d56 | 276 | IOR_COMPL_HARD_REG_SET (this_unavailable, |
e3a64162 | 277 | reg_class_contents[last->cl]); |
7b82b5da | 278 | |
fe08a886 | 279 | if (this->need_caller_save_reg) |
541f7d56 BS |
280 | IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); |
281 | ||
fe08a886 BS |
282 | merge_overlapping_regs (bb, &this_unavailable, this); |
283 | ||
541f7d56 BS |
284 | /* Now potential_regs is a reasonable approximation, let's |
285 | have a closer look at each register still in there. */ | |
4e812700 | 286 | for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) |
1a43c33f | 287 | { |
66fd46b6 | 288 | int nregs = hard_regno_nregs[new_reg][GET_MODE (*this->loc)]; |
4e812700 | 289 | |
85941a0a | 290 | for (i = nregs - 1; i >= 0; --i) |
fe08a886 BS |
291 | if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) |
292 | || fixed_regs[new_reg + i] | |
293 | || global_regs[new_reg + i] | |
85941a0a | 294 | /* Can't use regs which aren't saved by the prologue. */ |
fe08a886 BS |
295 | || (! regs_ever_live[new_reg + i] |
296 | && ! call_used_regs[new_reg + i]) | |
b2a8b026 | 297 | #ifdef LEAF_REGISTERS |
3b03c671 | 298 | /* We can't use a non-leaf register if we're in a |
b2a8b026 | 299 | leaf function. */ |
3b03c671 | 300 | || (current_function_is_leaf |
b2a8b026 MM |
301 | && !LEAF_REGISTERS[new_reg + i]) |
302 | #endif | |
541f7d56 | 303 | #ifdef HARD_REGNO_RENAME_OK |
fe08a886 | 304 | || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) |
541f7d56 | 305 | #endif |
85941a0a RH |
306 | ) |
307 | break; | |
308 | if (i >= 0) | |
541f7d56 | 309 | continue; |
1a43c33f | 310 | |
85941a0a RH |
311 | /* See whether it accepts all modes that occur in |
312 | definition and uses. */ | |
541f7d56 | 313 | for (tmp = this; tmp; tmp = tmp->next_use) |
66df7a98 AO |
314 | if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) |
315 | || (tmp->need_caller_save_reg | |
316 | && ! (HARD_REGNO_CALL_PART_CLOBBERED | |
317 | (reg, GET_MODE (*tmp->loc))) | |
318 | && (HARD_REGNO_CALL_PART_CLOBBERED | |
319 | (new_reg, GET_MODE (*tmp->loc))))) | |
541f7d56 BS |
320 | break; |
321 | if (! tmp) | |
fe08a886 | 322 | { |
62551c66 | 323 | if (tick[best_new_reg] > tick[new_reg]) |
fe08a886 BS |
324 | best_new_reg = new_reg; |
325 | } | |
1a43c33f | 326 | } |
7b82b5da | 327 | |
c263766c | 328 | if (dump_file) |
541f7d56 | 329 | { |
c263766c | 330 | fprintf (dump_file, "Register %s in insn %d", |
541f7d56 BS |
331 | reg_names[reg], INSN_UID (last->insn)); |
332 | if (last->need_caller_save_reg) | |
c263766c | 333 | fprintf (dump_file, " crosses a call"); |
3b03c671 | 334 | } |
1a43c33f | 335 | |
62551c66 | 336 | if (best_new_reg == reg) |
541f7d56 | 337 | { |
62551c66 | 338 | tick[reg] = ++this_tick; |
c263766c RH |
339 | if (dump_file) |
340 | fprintf (dump_file, "; no available better choice\n"); | |
7b82b5da | 341 | continue; |
541f7d56 | 342 | } |
7b82b5da | 343 | |
fe08a886 | 344 | do_replace (this, best_new_reg); |
62551c66 | 345 | tick[best_new_reg] = ++this_tick; |
ead61c1d | 346 | regs_ever_live[best_new_reg] = 1; |
1a43c33f | 347 | |
c263766c RH |
348 | if (dump_file) |
349 | fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); | |
541f7d56 | 350 | } |
1a43c33f | 351 | |
541f7d56 BS |
352 | obstack_free (&rename_obstack, first_obj); |
353 | } | |
1a43c33f | 354 | |
541f7d56 | 355 | obstack_free (&rename_obstack, NULL); |
7b82b5da | 356 | |
c263766c RH |
357 | if (dump_file) |
358 | fputc ('\n', dump_file); | |
7b82b5da | 359 | |
541f7d56 BS |
360 | count_or_remove_death_notes (NULL, 1); |
361 | update_life_info (NULL, UPDATE_LIFE_LOCAL, | |
736b64dd | 362 | PROP_DEATH_NOTES); |
7b82b5da SC |
363 | } |
364 | ||
7b82b5da | 365 | static void |
0c20a65f | 366 | do_replace (struct du_chain *chain, int reg) |
7b82b5da | 367 | { |
541f7d56 | 368 | while (chain) |
7b82b5da | 369 | { |
08394eef | 370 | unsigned int regno = ORIGINAL_REGNO (*chain->loc); |
d1d3c9a6 JH |
371 | struct reg_attrs * attr = REG_ATTRS (*chain->loc); |
372 | ||
08394eef | 373 | *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); |
f4d578da BS |
374 | if (regno >= FIRST_PSEUDO_REGISTER) |
375 | ORIGINAL_REGNO (*chain->loc) = regno; | |
d1d3c9a6 | 376 | REG_ATTRS (*chain->loc) = attr; |
541f7d56 | 377 | chain = chain->next_use; |
7b82b5da | 378 | } |
7b82b5da SC |
379 | } |
380 | ||
7b82b5da | 381 | |
541f7d56 BS |
382 | static struct du_chain *open_chains; |
383 | static struct du_chain *closed_chains; | |
384 | ||
385 | static void | |
e3a64162 | 386 | scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 387 | enum scan_actions action, enum op_type type, int earlyclobber) |
7b82b5da | 388 | { |
541f7d56 BS |
389 | struct du_chain **p; |
390 | rtx x = *loc; | |
391 | enum machine_mode mode = GET_MODE (x); | |
392 | int this_regno = REGNO (x); | |
66fd46b6 | 393 | int this_nregs = hard_regno_nregs[this_regno][mode]; |
541f7d56 | 394 | |
541f7d56 | 395 | if (action == mark_write) |
7b82b5da | 396 | { |
541f7d56 | 397 | if (type == OP_OUT) |
7b82b5da | 398 | { |
703ad42b KG |
399 | struct du_chain *this |
400 | = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); | |
541f7d56 BS |
401 | this->next_use = 0; |
402 | this->next_chain = open_chains; | |
403 | this->loc = loc; | |
404 | this->insn = insn; | |
e3a64162 | 405 | this->cl = cl; |
541f7d56 | 406 | this->need_caller_save_reg = 0; |
fe08a886 | 407 | this->earlyclobber = earlyclobber; |
541f7d56 | 408 | open_chains = this; |
7b82b5da | 409 | } |
541f7d56 | 410 | return; |
7b82b5da | 411 | } |
1a43c33f | 412 | |
541f7d56 BS |
413 | if ((type == OP_OUT && action != terminate_write) |
414 | || (type != OP_OUT && action == terminate_write)) | |
415 | return; | |
5fa41e13 | 416 | |
541f7d56 | 417 | for (p = &open_chains; *p;) |
5fa41e13 | 418 | { |
541f7d56 | 419 | struct du_chain *this = *p; |
541f7d56 | 420 | |
695e4773 GS |
421 | /* Check if the chain has been terminated if it has then skip to |
422 | the next chain. | |
541f7d56 | 423 | |
695e4773 GS |
424 | This can happen when we've already appended the location to |
425 | the chain in Step 3, but are trying to hide in-out operands | |
426 | from terminate_write in Step 5. */ | |
5fa41e13 | 427 | |
695e4773 GS |
428 | if (*this->loc == cc0_rtx) |
429 | p = &this->next_chain; | |
430 | else | |
3b03c671 | 431 | { |
695e4773 | 432 | int regno = REGNO (*this->loc); |
66fd46b6 | 433 | int nregs = hard_regno_nregs[regno][GET_MODE (*this->loc)]; |
695e4773 GS |
434 | int exact_match = (regno == this_regno && nregs == this_nregs); |
435 | ||
436 | if (regno + nregs <= this_regno | |
437 | || this_regno + this_nregs <= regno) | |
a125d855 RH |
438 | { |
439 | p = &this->next_chain; | |
440 | continue; | |
441 | } | |
442 | ||
443 | if (action == mark_read) | |
541f7d56 | 444 | { |
695e4773 GS |
445 | if (! exact_match) |
446 | abort (); | |
695e4773 | 447 | |
3b03c671 | 448 | /* ??? Class NO_REGS can happen if the md file makes use of |
a125d855 RH |
449 | EXTRA_CONSTRAINTS to match registers. Which is arguably |
450 | wrong, but there we are. Since we know not what this may | |
451 | be replaced with, terminate the chain. */ | |
e3a64162 | 452 | if (cl != NO_REGS) |
a125d855 | 453 | { |
703ad42b | 454 | this = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); |
fe08a886 | 455 | this->next_use = 0; |
a125d855 RH |
456 | this->next_chain = (*p)->next_chain; |
457 | this->loc = loc; | |
458 | this->insn = insn; | |
e3a64162 | 459 | this->cl = cl; |
a125d855 | 460 | this->need_caller_save_reg = 0; |
fe08a886 BS |
461 | while (*p) |
462 | p = &(*p)->next_use; | |
a125d855 RH |
463 | *p = this; |
464 | return; | |
465 | } | |
541f7d56 | 466 | } |
a125d855 RH |
467 | |
468 | if (action != terminate_overlapping_read || ! exact_match) | |
541f7d56 | 469 | { |
695e4773 GS |
470 | struct du_chain *next = this->next_chain; |
471 | ||
472 | /* Whether the terminated chain can be used for renaming | |
473 | depends on the action and this being an exact match. | |
474 | In either case, we remove this element from open_chains. */ | |
475 | ||
476 | if ((action == terminate_dead || action == terminate_write) | |
477 | && exact_match) | |
478 | { | |
479 | this->next_chain = closed_chains; | |
480 | closed_chains = this; | |
c263766c RH |
481 | if (dump_file) |
482 | fprintf (dump_file, | |
695e4773 GS |
483 | "Closing chain %s at insn %d (%s)\n", |
484 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
485 | scan_actions_name[(int) action]); | |
486 | } | |
487 | else | |
488 | { | |
c263766c RH |
489 | if (dump_file) |
490 | fprintf (dump_file, | |
695e4773 GS |
491 | "Discarding chain %s at insn %d (%s)\n", |
492 | reg_names[REGNO (*this->loc)], INSN_UID (insn), | |
493 | scan_actions_name[(int) action]); | |
494 | } | |
495 | *p = next; | |
541f7d56 | 496 | } |
695e4773 GS |
497 | else |
498 | p = &this->next_chain; | |
541f7d56 | 499 | } |
541f7d56 | 500 | } |
7b82b5da SC |
501 | } |
502 | ||
e3a64162 | 503 | /* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
541f7d56 | 504 | BASE_REG_CLASS depending on how the register is being considered. */ |
7b82b5da | 505 | |
4ca0f257 | 506 | static void |
e3a64162 | 507 | scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 508 | enum scan_actions action, enum machine_mode mode) |
7b82b5da | 509 | { |
541f7d56 BS |
510 | rtx x = *loc; |
511 | RTX_CODE code = GET_CODE (x); | |
512 | const char *fmt; | |
513 | int i, j; | |
7b82b5da | 514 | |
541f7d56 BS |
515 | if (action == mark_write) |
516 | return; | |
7b82b5da | 517 | |
541f7d56 | 518 | switch (code) |
7b82b5da | 519 | { |
541f7d56 BS |
520 | case PLUS: |
521 | { | |
522 | rtx orig_op0 = XEXP (x, 0); | |
523 | rtx orig_op1 = XEXP (x, 1); | |
524 | RTX_CODE code0 = GET_CODE (orig_op0); | |
525 | RTX_CODE code1 = GET_CODE (orig_op1); | |
526 | rtx op0 = orig_op0; | |
527 | rtx op1 = orig_op1; | |
528 | rtx *locI = NULL; | |
529 | rtx *locB = NULL; | |
530 | ||
531 | if (GET_CODE (op0) == SUBREG) | |
532 | { | |
533 | op0 = SUBREG_REG (op0); | |
534 | code0 = GET_CODE (op0); | |
535 | } | |
7b82b5da | 536 | |
541f7d56 BS |
537 | if (GET_CODE (op1) == SUBREG) |
538 | { | |
539 | op1 = SUBREG_REG (op1); | |
540 | code1 = GET_CODE (op1); | |
541 | } | |
7b82b5da | 542 | |
541f7d56 BS |
543 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE |
544 | || code0 == ZERO_EXTEND || code1 == MEM) | |
545 | { | |
546 | locI = &XEXP (x, 0); | |
547 | locB = &XEXP (x, 1); | |
548 | } | |
549 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
550 | || code1 == ZERO_EXTEND || code0 == MEM) | |
551 | { | |
552 | locI = &XEXP (x, 1); | |
553 | locB = &XEXP (x, 0); | |
554 | } | |
555 | else if (code0 == CONST_INT || code0 == CONST | |
556 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
557 | locB = &XEXP (x, 1); | |
558 | else if (code1 == CONST_INT || code1 == CONST | |
559 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
560 | locB = &XEXP (x, 0); | |
561 | else if (code0 == REG && code1 == REG) | |
562 | { | |
563 | int index_op; | |
564 | ||
565 | if (REG_OK_FOR_INDEX_P (op0) | |
566 | && REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
567 | index_op = 0; | |
568 | else if (REG_OK_FOR_INDEX_P (op1) | |
569 | && REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
570 | index_op = 1; | |
571 | else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
572 | index_op = 0; | |
573 | else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
574 | index_op = 1; | |
575 | else if (REG_OK_FOR_INDEX_P (op1)) | |
576 | index_op = 1; | |
577 | else | |
578 | index_op = 0; | |
579 | ||
580 | locI = &XEXP (x, index_op); | |
581 | locB = &XEXP (x, !index_op); | |
582 | } | |
583 | else if (code0 == REG) | |
584 | { | |
585 | locI = &XEXP (x, 0); | |
586 | locB = &XEXP (x, 1); | |
587 | } | |
588 | else if (code1 == REG) | |
589 | { | |
590 | locI = &XEXP (x, 1); | |
591 | locB = &XEXP (x, 0); | |
592 | } | |
7b82b5da | 593 | |
541f7d56 | 594 | if (locI) |
85941a0a | 595 | scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); |
541f7d56 | 596 | if (locB) |
3dcc68a4 | 597 | scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode); |
541f7d56 BS |
598 | return; |
599 | } | |
7b82b5da | 600 | |
541f7d56 BS |
601 | case POST_INC: |
602 | case POST_DEC: | |
603 | case POST_MODIFY: | |
604 | case PRE_INC: | |
605 | case PRE_DEC: | |
606 | case PRE_MODIFY: | |
607 | #ifndef AUTO_INC_DEC | |
ce73761f RH |
608 | /* If the target doesn't claim to handle autoinc, this must be |
609 | something special, like a stack push. Kill this chain. */ | |
610 | action = terminate_all_read; | |
541f7d56 BS |
611 | #endif |
612 | break; | |
7b82b5da | 613 | |
541f7d56 | 614 | case MEM: |
3dcc68a4 NC |
615 | scan_rtx_address (insn, &XEXP (x, 0), |
616 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 617 | GET_MODE (x)); |
541f7d56 | 618 | return; |
1a43c33f | 619 | |
541f7d56 | 620 | case REG: |
e3a64162 | 621 | scan_rtx_reg (insn, loc, cl, action, OP_IN, 0); |
4ca0f257 | 622 | return; |
1a43c33f | 623 | |
541f7d56 BS |
624 | default: |
625 | break; | |
4ca0f257 | 626 | } |
541f7d56 BS |
627 | |
628 | fmt = GET_RTX_FORMAT (code); | |
629 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
4ca0f257 | 630 | { |
541f7d56 | 631 | if (fmt[i] == 'e') |
e3a64162 | 632 | scan_rtx_address (insn, &XEXP (x, i), cl, action, mode); |
541f7d56 BS |
633 | else if (fmt[i] == 'E') |
634 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 635 | scan_rtx_address (insn, &XVECEXP (x, i, j), cl, action, mode); |
4ca0f257 | 636 | } |
7b82b5da SC |
637 | } |
638 | ||
541f7d56 | 639 | static void |
e3a64162 | 640 | scan_rtx (rtx insn, rtx *loc, enum reg_class cl, |
0c20a65f | 641 | enum scan_actions action, enum op_type type, int earlyclobber) |
7b82b5da | 642 | { |
541f7d56 BS |
643 | const char *fmt; |
644 | rtx x = *loc; | |
645 | enum rtx_code code = GET_CODE (x); | |
646 | int i, j; | |
7b82b5da | 647 | |
541f7d56 BS |
648 | code = GET_CODE (x); |
649 | switch (code) | |
7b82b5da | 650 | { |
541f7d56 BS |
651 | case CONST: |
652 | case CONST_INT: | |
653 | case CONST_DOUBLE: | |
69ef87e2 | 654 | case CONST_VECTOR: |
541f7d56 BS |
655 | case SYMBOL_REF: |
656 | case LABEL_REF: | |
657 | case CC0: | |
658 | case PC: | |
659 | return; | |
055be976 | 660 | |
541f7d56 | 661 | case REG: |
e3a64162 | 662 | scan_rtx_reg (insn, loc, cl, action, type, earlyclobber); |
541f7d56 | 663 | return; |
7b82b5da | 664 | |
541f7d56 | 665 | case MEM: |
3dcc68a4 NC |
666 | scan_rtx_address (insn, &XEXP (x, 0), |
667 | MODE_BASE_REG_CLASS (GET_MODE (x)), action, | |
85941a0a | 668 | GET_MODE (x)); |
541f7d56 | 669 | return; |
7b82b5da | 670 | |
541f7d56 | 671 | case SET: |
e3a64162 BI |
672 | scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0); |
673 | scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 0); | |
541f7d56 | 674 | return; |
7b82b5da | 675 | |
541f7d56 | 676 | case STRICT_LOW_PART: |
e3a64162 | 677 | scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT, earlyclobber); |
541f7d56 | 678 | return; |
7b82b5da | 679 | |
541f7d56 | 680 | case ZERO_EXTRACT: |
3b03c671 | 681 | case SIGN_EXTRACT: |
e3a64162 | 682 | scan_rtx (insn, &XEXP (x, 0), cl, action, |
fe08a886 | 683 | type == OP_IN ? OP_IN : OP_INOUT, earlyclobber); |
e3a64162 BI |
684 | scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN, 0); |
685 | scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN, 0); | |
541f7d56 | 686 | return; |
7b82b5da | 687 | |
541f7d56 BS |
688 | case POST_INC: |
689 | case PRE_INC: | |
690 | case POST_DEC: | |
691 | case PRE_DEC: | |
692 | case POST_MODIFY: | |
693 | case PRE_MODIFY: | |
694 | /* Should only happen inside MEM. */ | |
695 | abort (); | |
696 | ||
697 | case CLOBBER: | |
e3a64162 | 698 | scan_rtx (insn, &SET_DEST (x), cl, action, OP_OUT, 1); |
541f7d56 | 699 | return; |
7b82b5da | 700 | |
541f7d56 | 701 | case EXPR_LIST: |
e3a64162 | 702 | scan_rtx (insn, &XEXP (x, 0), cl, action, type, 0); |
541f7d56 | 703 | if (XEXP (x, 1)) |
e3a64162 | 704 | scan_rtx (insn, &XEXP (x, 1), cl, action, type, 0); |
541f7d56 | 705 | return; |
7b82b5da | 706 | |
541f7d56 BS |
707 | default: |
708 | break; | |
709 | } | |
7b82b5da | 710 | |
541f7d56 BS |
711 | fmt = GET_RTX_FORMAT (code); |
712 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
7b82b5da SC |
713 | { |
714 | if (fmt[i] == 'e') | |
e3a64162 | 715 | scan_rtx (insn, &XEXP (x, i), cl, action, type, 0); |
7b82b5da SC |
716 | else if (fmt[i] == 'E') |
717 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 718 | scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type, 0); |
7b82b5da | 719 | } |
7b82b5da SC |
720 | } |
721 | ||
3eae4643 | 722 | /* Build def/use chain. */ |
7b82b5da | 723 | |
541f7d56 | 724 | static struct du_chain * |
0c20a65f | 725 | build_def_use (basic_block bb) |
7b82b5da | 726 | { |
541f7d56 | 727 | rtx insn; |
1a43c33f | 728 | |
541f7d56 | 729 | open_chains = closed_chains = NULL; |
1a43c33f | 730 | |
a813c111 | 731 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
541f7d56 BS |
732 | { |
733 | if (INSN_P (insn)) | |
734 | { | |
735 | int n_ops; | |
736 | rtx note; | |
737 | rtx old_operands[MAX_RECOG_OPERANDS]; | |
738 | rtx old_dups[MAX_DUP_OPERANDS]; | |
ea475b23 | 739 | int i, icode; |
541f7d56 BS |
740 | int alt; |
741 | int predicated; | |
742 | ||
541f7d56 BS |
743 | /* Process the insn, determining its effect on the def-use |
744 | chains. We perform the following steps with the register | |
745 | references in the insn: | |
746 | (1) Any read that overlaps an open chain, but doesn't exactly | |
747 | match, causes that chain to be closed. We can't deal | |
748 | with overlaps yet. | |
749 | (2) Any read outside an operand causes any chain it overlaps | |
750 | with to be closed, since we can't replace it. | |
751 | (3) Any read inside an operand is added if there's already | |
752 | an open chain for it. | |
753 | (4) For any REG_DEAD note we find, close open chains that | |
754 | overlap it. | |
755 | (5) For any write we find, close open chains that overlap it. | |
756 | (6) For any write we find in an operand, make a new chain. | |
757 | (7) For any REG_UNUSED, close any chains we just opened. */ | |
758 | ||
2ed1f154 | 759 | icode = recog_memoized (insn); |
541f7d56 | 760 | extract_insn (insn); |
4be9e9cb | 761 | if (! constrain_operands (1)) |
3b03c671 | 762 | fatal_insn_not_found (insn); |
541f7d56 BS |
763 | preprocess_constraints (); |
764 | alt = which_alternative; | |
765 | n_ops = recog_data.n_operands; | |
766 | ||
767 | /* Simplify the code below by rewriting things to reflect | |
768 | matching constraints. Also promote OP_OUT to OP_INOUT | |
769 | in predicated instructions. */ | |
770 | ||
771 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
772 | for (i = 0; i < n_ops; ++i) | |
7b82b5da | 773 | { |
541f7d56 BS |
774 | int matches = recog_op_alt[i][alt].matches; |
775 | if (matches >= 0) | |
e3a64162 | 776 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
541f7d56 BS |
777 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
778 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
779 | recog_data.operand_type[i] = OP_INOUT; | |
7b82b5da | 780 | } |
1a43c33f | 781 | |
541f7d56 BS |
782 | /* Step 1: Close chains for which we have overlapping reads. */ |
783 | for (i = 0; i < n_ops; i++) | |
784 | scan_rtx (insn, recog_data.operand_loc[i], | |
785 | NO_REGS, terminate_overlapping_read, | |
fe08a886 | 786 | recog_data.operand_type[i], 0); |
1a43c33f | 787 | |
541f7d56 | 788 | /* Step 2: Close chains for which we have reads outside operands. |
3b03c671 | 789 | We do this by munging all operands into CC0, and closing |
541f7d56 | 790 | everything remaining. */ |
7b82b5da | 791 | |
541f7d56 | 792 | for (i = 0; i < n_ops; i++) |
1a43c33f | 793 | { |
541f7d56 BS |
794 | old_operands[i] = recog_data.operand[i]; |
795 | /* Don't squash match_operator or match_parallel here, since | |
3b03c671 | 796 | we don't know that all of the contained registers are |
541f7d56 BS |
797 | reachable by proper operands. */ |
798 | if (recog_data.constraints[i][0] == '\0') | |
799 | continue; | |
800 | *recog_data.operand_loc[i] = cc0_rtx; | |
801 | } | |
802 | for (i = 0; i < recog_data.n_dups; i++) | |
803 | { | |
ea475b23 JJ |
804 | int dup_num = recog_data.dup_num[i]; |
805 | ||
541f7d56 BS |
806 | old_dups[i] = *recog_data.dup_loc[i]; |
807 | *recog_data.dup_loc[i] = cc0_rtx; | |
ea475b23 JJ |
808 | |
809 | /* For match_dup of match_operator or match_parallel, share | |
810 | them, so that we don't miss changes in the dup. */ | |
811 | if (icode >= 0 | |
812 | && insn_data[icode].operand[dup_num].eliminable == 0) | |
813 | old_dups[i] = recog_data.operand[dup_num]; | |
1a43c33f | 814 | } |
1a43c33f | 815 | |
fe08a886 BS |
816 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read, |
817 | OP_IN, 0); | |
1a43c33f | 818 | |
541f7d56 BS |
819 | for (i = 0; i < recog_data.n_dups; i++) |
820 | *recog_data.dup_loc[i] = old_dups[i]; | |
821 | for (i = 0; i < n_ops; i++) | |
822 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 823 | |
541f7d56 | 824 | /* Step 2B: Can't rename function call argument registers. */ |
4b4bf941 | 825 | if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn)) |
541f7d56 | 826 | scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), |
fe08a886 | 827 | NO_REGS, terminate_all_read, OP_IN, 0); |
7b82b5da | 828 | |
3ada20ee RH |
829 | /* Step 2C: Can't rename asm operands that were originally |
830 | hard registers. */ | |
831 | if (asm_noperands (PATTERN (insn)) > 0) | |
832 | for (i = 0; i < n_ops; i++) | |
833 | { | |
834 | rtx *loc = recog_data.operand_loc[i]; | |
835 | rtx op = *loc; | |
836 | ||
f8cfc6aa | 837 | if (REG_P (op) |
3ada20ee RH |
838 | && REGNO (op) == ORIGINAL_REGNO (op) |
839 | && (recog_data.operand_type[i] == OP_IN | |
840 | || recog_data.operand_type[i] == OP_INOUT)) | |
841 | scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0); | |
842 | } | |
843 | ||
541f7d56 BS |
844 | /* Step 3: Append to chains for reads inside operands. */ |
845 | for (i = 0; i < n_ops + recog_data.n_dups; i++) | |
846 | { | |
847 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
848 | rtx *loc = (i < n_ops | |
849 | ? recog_data.operand_loc[opn] | |
850 | : recog_data.dup_loc[i - n_ops]); | |
e3a64162 | 851 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
541f7d56 BS |
852 | enum op_type type = recog_data.operand_type[opn]; |
853 | ||
854 | /* Don't scan match_operand here, since we've no reg class | |
855 | information to pass down. Any operands that we could | |
856 | substitute in will be represented elsewhere. */ | |
857 | if (recog_data.constraints[opn][0] == '\0') | |
858 | continue; | |
7b82b5da | 859 | |
541f7d56 | 860 | if (recog_op_alt[opn][alt].is_address) |
e3a64162 | 861 | scan_rtx_address (insn, loc, cl, mark_read, VOIDmode); |
541f7d56 | 862 | else |
e3a64162 | 863 | scan_rtx (insn, loc, cl, mark_read, type, 0); |
541f7d56 | 864 | } |
7b82b5da | 865 | |
6fb85418 BS |
866 | /* Step 4: Close chains for registers that die here. |
867 | Also record updates for REG_INC notes. */ | |
541f7d56 | 868 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) |
6fb85418 BS |
869 | { |
870 | if (REG_NOTE_KIND (note) == REG_DEAD) | |
fe08a886 BS |
871 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
872 | OP_IN, 0); | |
6fb85418 | 873 | else if (REG_NOTE_KIND (note) == REG_INC) |
fe08a886 BS |
874 | scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, |
875 | OP_INOUT, 0); | |
6fb85418 | 876 | } |
1a43c33f | 877 | |
541f7d56 BS |
878 | /* Step 4B: If this is a call, any chain live at this point |
879 | requires a caller-saved reg. */ | |
4b4bf941 | 880 | if (CALL_P (insn)) |
541f7d56 BS |
881 | { |
882 | struct du_chain *p; | |
883 | for (p = open_chains; p; p = p->next_chain) | |
fe08a886 | 884 | p->need_caller_save_reg = 1; |
541f7d56 | 885 | } |
7b82b5da | 886 | |
541f7d56 BS |
887 | /* Step 5: Close open chains that overlap writes. Similar to |
888 | step 2, we hide in-out operands, since we do not want to | |
889 | close these chains. */ | |
7b82b5da | 890 | |
541f7d56 BS |
891 | for (i = 0; i < n_ops; i++) |
892 | { | |
893 | old_operands[i] = recog_data.operand[i]; | |
894 | if (recog_data.operand_type[i] == OP_INOUT) | |
895 | *recog_data.operand_loc[i] = cc0_rtx; | |
896 | } | |
897 | for (i = 0; i < recog_data.n_dups; i++) | |
898 | { | |
899 | int opn = recog_data.dup_num[i]; | |
900 | old_dups[i] = *recog_data.dup_loc[i]; | |
901 | if (recog_data.operand_type[opn] == OP_INOUT) | |
902 | *recog_data.dup_loc[i] = cc0_rtx; | |
903 | } | |
7b82b5da | 904 | |
fe08a886 | 905 | scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0); |
7b82b5da | 906 | |
541f7d56 BS |
907 | for (i = 0; i < recog_data.n_dups; i++) |
908 | *recog_data.dup_loc[i] = old_dups[i]; | |
909 | for (i = 0; i < n_ops; i++) | |
910 | *recog_data.operand_loc[i] = old_operands[i]; | |
7b82b5da | 911 | |
541f7d56 BS |
912 | /* Step 6: Begin new chains for writes inside operands. */ |
913 | /* ??? Many targets have output constraints on the SET_DEST | |
914 | of a call insn, which is stupid, since these are certainly | |
3ada20ee RH |
915 | ABI defined hard registers. Don't change calls at all. |
916 | Similarly take special care for asm statement that originally | |
917 | referenced hard registers. */ | |
918 | if (asm_noperands (PATTERN (insn)) > 0) | |
919 | { | |
920 | for (i = 0; i < n_ops; i++) | |
921 | if (recog_data.operand_type[i] == OP_OUT) | |
922 | { | |
923 | rtx *loc = recog_data.operand_loc[i]; | |
924 | rtx op = *loc; | |
e3a64162 | 925 | enum reg_class cl = recog_op_alt[i][alt].cl; |
3ada20ee | 926 | |
f8cfc6aa | 927 | if (REG_P (op) |
3b03c671 | 928 | && REGNO (op) == ORIGINAL_REGNO (op)) |
3ada20ee RH |
929 | continue; |
930 | ||
e3a64162 | 931 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
3ada20ee RH |
932 | recog_op_alt[i][alt].earlyclobber); |
933 | } | |
934 | } | |
4b4bf941 | 935 | else if (!CALL_P (insn)) |
541f7d56 BS |
936 | for (i = 0; i < n_ops + recog_data.n_dups; i++) |
937 | { | |
938 | int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; | |
939 | rtx *loc = (i < n_ops | |
940 | ? recog_data.operand_loc[opn] | |
941 | : recog_data.dup_loc[i - n_ops]); | |
e3a64162 | 942 | enum reg_class cl = recog_op_alt[opn][alt].cl; |
541f7d56 BS |
943 | |
944 | if (recog_data.operand_type[opn] == OP_OUT) | |
e3a64162 | 945 | scan_rtx (insn, loc, cl, mark_write, OP_OUT, |
fe08a886 | 946 | recog_op_alt[opn][alt].earlyclobber); |
541f7d56 | 947 | } |
7b82b5da | 948 | |
541f7d56 BS |
949 | /* Step 7: Close chains for registers that were never |
950 | really used here. */ | |
951 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
952 | if (REG_NOTE_KIND (note) == REG_UNUSED) | |
fe08a886 BS |
953 | scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, |
954 | OP_IN, 0); | |
541f7d56 | 955 | } |
a813c111 | 956 | if (insn == BB_END (bb)) |
541f7d56 BS |
957 | break; |
958 | } | |
7b82b5da | 959 | |
541f7d56 BS |
960 | /* Since we close every chain when we find a REG_DEAD note, anything that |
961 | is still open lives past the basic block, so it can't be renamed. */ | |
962 | return closed_chains; | |
963 | } | |
7b82b5da | 964 | |
c263766c | 965 | /* Dump all def/use chains in CHAINS to DUMP_FILE. They are |
541f7d56 | 966 | printed in reverse order as that's how we build them. */ |
7b82b5da | 967 | |
541f7d56 | 968 | static void |
0c20a65f | 969 | dump_def_use_chain (struct du_chain *chains) |
541f7d56 BS |
970 | { |
971 | while (chains) | |
1a43c33f | 972 | { |
541f7d56 BS |
973 | struct du_chain *this = chains; |
974 | int r = REGNO (*this->loc); | |
66fd46b6 | 975 | int nregs = hard_regno_nregs[r][GET_MODE (*this->loc)]; |
c263766c | 976 | fprintf (dump_file, "Register %s (%d):", reg_names[r], nregs); |
541f7d56 BS |
977 | while (this) |
978 | { | |
c263766c | 979 | fprintf (dump_file, " %d [%s]", INSN_UID (this->insn), |
e3a64162 | 980 | reg_class_names[this->cl]); |
541f7d56 BS |
981 | this = this->next_use; |
982 | } | |
c263766c | 983 | fprintf (dump_file, "\n"); |
541f7d56 | 984 | chains = chains->next_chain; |
1a43c33f | 985 | } |
7b82b5da | 986 | } |
8582c27b RH |
987 | \f |
988 | /* The following code does forward propagation of hard register copies. | |
989 | The object is to eliminate as many dependencies as possible, so that | |
990 | we have the most scheduling freedom. As a side effect, we also clean | |
3b03c671 | 991 | up some silly register allocation decisions made by reload. This |
8582c27b RH |
992 | code may be obsoleted by a new register allocator. */ |
993 | ||
994 | /* For each register, we have a list of registers that contain the same | |
3b03c671 | 995 | value. The OLDEST_REGNO field points to the head of the list, and |
8582c27b RH |
996 | the NEXT_REGNO field runs through the list. The MODE field indicates |
997 | what mode the data is known to be in; this field is VOIDmode when the | |
998 | register is not known to contain valid data. */ | |
999 | ||
1000 | struct value_data_entry | |
1001 | { | |
1002 | enum machine_mode mode; | |
1003 | unsigned int oldest_regno; | |
1004 | unsigned int next_regno; | |
1005 | }; | |
1006 | ||
1007 | struct value_data | |
1008 | { | |
1009 | struct value_data_entry e[FIRST_PSEUDO_REGISTER]; | |
752ae914 | 1010 | unsigned int max_value_regs; |
8582c27b RH |
1011 | }; |
1012 | ||
d64d5e80 DJ |
1013 | static void kill_value_one_regno (unsigned, struct value_data *); |
1014 | static void kill_value_regno (unsigned, unsigned, struct value_data *); | |
0c20a65f AJ |
1015 | static void kill_value (rtx, struct value_data *); |
1016 | static void set_value_regno (unsigned, enum machine_mode, struct value_data *); | |
1017 | static void init_value_data (struct value_data *); | |
1018 | static void kill_clobbered_value (rtx, rtx, void *); | |
1019 | static void kill_set_value (rtx, rtx, void *); | |
1020 | static int kill_autoinc_value (rtx *, void *); | |
1021 | static void copy_value (rtx, rtx, struct value_data *); | |
1022 | static bool mode_change_ok (enum machine_mode, enum machine_mode, | |
1023 | unsigned int); | |
1024 | static rtx maybe_mode_change (enum machine_mode, enum machine_mode, | |
1025 | enum machine_mode, unsigned int, unsigned int); | |
1026 | static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *); | |
1027 | static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx, | |
1028 | struct value_data *); | |
1029 | static bool replace_oldest_value_addr (rtx *, enum reg_class, | |
1030 | enum machine_mode, rtx, | |
1031 | struct value_data *); | |
1032 | static bool replace_oldest_value_mem (rtx, rtx, struct value_data *); | |
1033 | static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *); | |
1034 | extern void debug_value_data (struct value_data *); | |
8582c27b | 1035 | #ifdef ENABLE_CHECKING |
0c20a65f | 1036 | static void validate_value_data (struct value_data *); |
8582c27b RH |
1037 | #endif |
1038 | ||
d64d5e80 DJ |
1039 | /* Kill register REGNO. This involves removing it from any value |
1040 | lists, and resetting the value mode to VOIDmode. This is only a | |
1041 | helper function; it does not handle any hard registers overlapping | |
1042 | with REGNO. */ | |
8582c27b RH |
1043 | |
1044 | static void | |
d64d5e80 | 1045 | kill_value_one_regno (unsigned int regno, struct value_data *vd) |
8582c27b RH |
1046 | { |
1047 | unsigned int i, next; | |
1048 | ||
1049 | if (vd->e[regno].oldest_regno != regno) | |
1050 | { | |
1051 | for (i = vd->e[regno].oldest_regno; | |
1052 | vd->e[i].next_regno != regno; | |
1053 | i = vd->e[i].next_regno) | |
1054 | continue; | |
3de23727 | 1055 | vd->e[i].next_regno = vd->e[regno].next_regno; |
8582c27b RH |
1056 | } |
1057 | else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM) | |
1058 | { | |
1059 | for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno) | |
3b03c671 | 1060 | vd->e[i].oldest_regno = next; |
8582c27b RH |
1061 | } |
1062 | ||
1063 | vd->e[regno].mode = VOIDmode; | |
1064 | vd->e[regno].oldest_regno = regno; | |
1065 | vd->e[regno].next_regno = INVALID_REGNUM; | |
1066 | ||
1067 | #ifdef ENABLE_CHECKING | |
1068 | validate_value_data (vd); | |
1069 | #endif | |
1070 | } | |
1071 | ||
d64d5e80 DJ |
1072 | /* Kill the value in register REGNO for NREGS, and any other registers |
1073 | whose values overlap. */ | |
1074 | ||
1075 | static void | |
1076 | kill_value_regno (regno, nregs, vd) | |
1077 | unsigned int regno; | |
1078 | unsigned int nregs; | |
1079 | struct value_data *vd; | |
1080 | { | |
1081 | unsigned int j; | |
1082 | ||
1083 | /* Kill the value we're told to kill. */ | |
1084 | for (j = 0; j < nregs; ++j) | |
1085 | kill_value_one_regno (regno + j, vd); | |
1086 | ||
1087 | /* Kill everything that overlapped what we're told to kill. */ | |
1088 | if (regno < vd->max_value_regs) | |
1089 | j = 0; | |
1090 | else | |
1091 | j = regno - vd->max_value_regs; | |
1092 | for (; j < regno; ++j) | |
1093 | { | |
1094 | unsigned int i, n; | |
1095 | if (vd->e[j].mode == VOIDmode) | |
1096 | continue; | |
1097 | n = hard_regno_nregs[j][vd->e[j].mode]; | |
1098 | if (j + n > regno) | |
1099 | for (i = 0; i < n; ++i) | |
1100 | kill_value_one_regno (j + i, vd); | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | /* Kill X. This is a convenience function wrapping kill_value_regno | |
3de23727 | 1105 | so that we mind the mode the register is in. */ |
8582c27b RH |
1106 | |
1107 | static void | |
0c20a65f | 1108 | kill_value (rtx x, struct value_data *vd) |
8582c27b | 1109 | { |
8686336f JH |
1110 | /* SUBREGS are supposed to have been eliminated by now. But some |
1111 | ports, e.g. i386 sse, use them to smuggle vector type information | |
1112 | through to instruction selection. Each such SUBREG should simplify, | |
1eeeb6a4 | 1113 | so if we get a NULL we've done something wrong elsewhere. */ |
8686336f JH |
1114 | |
1115 | if (GET_CODE (x) == SUBREG) | |
1116 | x = simplify_subreg (GET_MODE (x), SUBREG_REG (x), | |
1117 | GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); | |
8582c27b | 1118 | if (REG_P (x)) |
3de23727 RH |
1119 | { |
1120 | unsigned int regno = REGNO (x); | |
66fd46b6 | 1121 | unsigned int n = hard_regno_nregs[regno][GET_MODE (x)]; |
752ae914 | 1122 | |
d64d5e80 | 1123 | kill_value_regno (regno, n, vd); |
3de23727 | 1124 | } |
8582c27b RH |
1125 | } |
1126 | ||
752ae914 RH |
1127 | /* Remember that REGNO is valid in MODE. */ |
1128 | ||
1129 | static void | |
0c20a65f AJ |
1130 | set_value_regno (unsigned int regno, enum machine_mode mode, |
1131 | struct value_data *vd) | |
752ae914 RH |
1132 | { |
1133 | unsigned int nregs; | |
1134 | ||
1135 | vd->e[regno].mode = mode; | |
1136 | ||
66fd46b6 | 1137 | nregs = hard_regno_nregs[regno][mode]; |
752ae914 RH |
1138 | if (nregs > vd->max_value_regs) |
1139 | vd->max_value_regs = nregs; | |
1140 | } | |
1141 | ||
8582c27b RH |
1142 | /* Initialize VD such that there are no known relationships between regs. */ |
1143 | ||
1144 | static void | |
0c20a65f | 1145 | init_value_data (struct value_data *vd) |
8582c27b RH |
1146 | { |
1147 | int i; | |
1148 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1149 | { | |
1150 | vd->e[i].mode = VOIDmode; | |
1151 | vd->e[i].oldest_regno = i; | |
1152 | vd->e[i].next_regno = INVALID_REGNUM; | |
1153 | } | |
752ae914 | 1154 | vd->max_value_regs = 0; |
8582c27b RH |
1155 | } |
1156 | ||
1157 | /* Called through note_stores. If X is clobbered, kill its value. */ | |
1158 | ||
1159 | static void | |
0c20a65f | 1160 | kill_clobbered_value (rtx x, rtx set, void *data) |
8582c27b RH |
1161 | { |
1162 | struct value_data *vd = data; | |
1163 | if (GET_CODE (set) == CLOBBER) | |
1164 | kill_value (x, vd); | |
1165 | } | |
1166 | ||
3b03c671 | 1167 | /* Called through note_stores. If X is set, not clobbered, kill its |
8582c27b RH |
1168 | current value and install it as the root of its own value list. */ |
1169 | ||
1170 | static void | |
0c20a65f | 1171 | kill_set_value (rtx x, rtx set, void *data) |
8582c27b RH |
1172 | { |
1173 | struct value_data *vd = data; | |
c43a12b5 | 1174 | if (GET_CODE (set) != CLOBBER) |
8582c27b | 1175 | { |
3de23727 | 1176 | kill_value (x, vd); |
c43a12b5 | 1177 | if (REG_P (x)) |
3b03c671 | 1178 | set_value_regno (REGNO (x), GET_MODE (x), vd); |
8582c27b RH |
1179 | } |
1180 | } | |
1181 | ||
1182 | /* Called through for_each_rtx. Kill any register used as the base of an | |
1183 | auto-increment expression, and install that register as the root of its | |
1184 | own value list. */ | |
1185 | ||
1186 | static int | |
0c20a65f | 1187 | kill_autoinc_value (rtx *px, void *data) |
8582c27b RH |
1188 | { |
1189 | rtx x = *px; | |
1190 | struct value_data *vd = data; | |
1191 | ||
ec8e098d | 1192 | if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) |
8582c27b | 1193 | { |
3de23727 RH |
1194 | x = XEXP (x, 0); |
1195 | kill_value (x, vd); | |
752ae914 | 1196 | set_value_regno (REGNO (x), Pmode, vd); |
8582c27b RH |
1197 | return -1; |
1198 | } | |
1199 | ||
1200 | return 0; | |
1201 | } | |
1202 | ||
1203 | /* Assert that SRC has been copied to DEST. Adjust the data structures | |
1204 | to reflect that SRC contains an older copy of the shared value. */ | |
1205 | ||
1206 | static void | |
0c20a65f | 1207 | copy_value (rtx dest, rtx src, struct value_data *vd) |
8582c27b RH |
1208 | { |
1209 | unsigned int dr = REGNO (dest); | |
1210 | unsigned int sr = REGNO (src); | |
21e16bd6 | 1211 | unsigned int dn, sn; |
8582c27b RH |
1212 | unsigned int i; |
1213 | ||
1214 | /* ??? At present, it's possible to see noop sets. It'd be nice if | |
1215 | this were cleaned up beforehand... */ | |
1216 | if (sr == dr) | |
1217 | return; | |
1218 | ||
1219 | /* Do not propagate copies to the stack pointer, as that can leave | |
88cad84b | 1220 | memory accesses with no scheduling dependency on the stack update. */ |
8582c27b RH |
1221 | if (dr == STACK_POINTER_REGNUM) |
1222 | return; | |
1223 | ||
1224 | /* Likewise with the frame pointer, if we're using one. */ | |
1225 | if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM) | |
1226 | return; | |
1227 | ||
21e16bd6 | 1228 | /* If SRC and DEST overlap, don't record anything. */ |
66fd46b6 JH |
1229 | dn = hard_regno_nregs[dr][GET_MODE (dest)]; |
1230 | sn = hard_regno_nregs[sr][GET_MODE (dest)]; | |
21e16bd6 RH |
1231 | if ((dr > sr && dr < sr + sn) |
1232 | || (sr > dr && sr < dr + dn)) | |
1233 | return; | |
1234 | ||
8582c27b RH |
1235 | /* If SRC had no assigned mode (i.e. we didn't know it was live) |
1236 | assign it now and assume the value came from an input argument | |
1237 | or somesuch. */ | |
1238 | if (vd->e[sr].mode == VOIDmode) | |
752ae914 | 1239 | set_value_regno (sr, vd->e[dr].mode, vd); |
8582c27b | 1240 | |
27d30956 | 1241 | /* If we are narrowing the input to a smaller number of hard regs, |
dbf65c2f R |
1242 | and it is in big endian, we are really extracting a high part. |
1243 | Since we generally associate a low part of a value with the value itself, | |
1244 | we must not do the same for the high part. | |
1245 | Note we can still get low parts for the same mode combination through | |
1246 | a two-step copy involving differently sized hard regs. | |
1247 | Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each: | |
1248 | (set (reg:DI r0) (reg:DI fr0)) | |
1249 | (set (reg:SI fr2) (reg:SI r0)) | |
1250 | loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while: | |
1251 | (set (reg:SI fr2) (reg:SI fr0)) | |
1252 | loads the high part of (reg:DI fr0) into fr2. | |
1253 | ||
1254 | We can't properly represent the latter case in our tables, so don't | |
1255 | record anything then. */ | |
66fd46b6 | 1256 | else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode] |
dbf65c2f R |
1257 | && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD |
1258 | ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)) | |
1259 | return; | |
1260 | ||
42bd17b7 RH |
1261 | /* If SRC had been assigned a mode narrower than the copy, we can't |
1262 | link DEST into the chain, because not all of the pieces of the | |
1263 | copy came from oldest_regno. */ | |
66fd46b6 | 1264 | else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]) |
42bd17b7 RH |
1265 | return; |
1266 | ||
8582c27b RH |
1267 | /* Link DR at the end of the value chain used by SR. */ |
1268 | ||
1269 | vd->e[dr].oldest_regno = vd->e[sr].oldest_regno; | |
1270 | ||
1271 | for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno) | |
1272 | continue; | |
1273 | vd->e[i].next_regno = dr; | |
1274 | ||
1275 | #ifdef ENABLE_CHECKING | |
1276 | validate_value_data (vd); | |
1277 | #endif | |
1278 | } | |
1279 | ||
8610ba70 RH |
1280 | /* Return true if a mode change from ORIG to NEW is allowed for REGNO. */ |
1281 | ||
1282 | static bool | |
0c20a65f AJ |
1283 | mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode, |
1284 | unsigned int regno ATTRIBUTE_UNUSED) | |
8610ba70 RH |
1285 | { |
1286 | if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode)) | |
1287 | return false; | |
1288 | ||
cff9f8d5 AH |
1289 | #ifdef CANNOT_CHANGE_MODE_CLASS |
1290 | return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode); | |
8610ba70 RH |
1291 | #endif |
1292 | ||
1293 | return true; | |
1294 | } | |
1295 | ||
61dde664 R |
1296 | /* Register REGNO was originally set in ORIG_MODE. It - or a copy of it - |
1297 | was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed | |
1298 | in NEW_MODE. | |
1299 | Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */ | |
1300 | ||
1301 | static rtx | |
0c20a65f AJ |
1302 | maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode, |
1303 | enum machine_mode new_mode, unsigned int regno, | |
1304 | unsigned int copy_regno ATTRIBUTE_UNUSED) | |
61dde664 R |
1305 | { |
1306 | if (orig_mode == new_mode) | |
1307 | return gen_rtx_raw_REG (new_mode, regno); | |
1308 | else if (mode_change_ok (orig_mode, new_mode, regno)) | |
1309 | { | |
66fd46b6 JH |
1310 | int copy_nregs = hard_regno_nregs[copy_regno][copy_mode]; |
1311 | int use_nregs = hard_regno_nregs[copy_regno][new_mode]; | |
61dde664 R |
1312 | int copy_offset |
1313 | = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs); | |
1314 | int offset | |
1315 | = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset; | |
1316 | int byteoffset = offset % UNITS_PER_WORD; | |
1317 | int wordoffset = offset - byteoffset; | |
1318 | ||
1319 | offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) | |
1320 | + (BYTES_BIG_ENDIAN ? byteoffset : 0)); | |
1321 | return gen_rtx_raw_REG (new_mode, | |
1322 | regno + subreg_regno_offset (regno, orig_mode, | |
1323 | offset, | |
1324 | new_mode)); | |
1325 | } | |
1326 | return NULL_RTX; | |
1327 | } | |
1328 | ||
8582c27b | 1329 | /* Find the oldest copy of the value contained in REGNO that is in |
e3a64162 | 1330 | register class CL and has mode MODE. If found, return an rtx |
8582c27b RH |
1331 | of that oldest register, otherwise return NULL. */ |
1332 | ||
1333 | static rtx | |
e3a64162 | 1334 | find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd) |
8582c27b | 1335 | { |
3ada20ee RH |
1336 | unsigned int regno = REGNO (reg); |
1337 | enum machine_mode mode = GET_MODE (reg); | |
8582c27b RH |
1338 | unsigned int i; |
1339 | ||
57d1019b RH |
1340 | /* If we are accessing REG in some mode other that what we set it in, |
1341 | make sure that the replacement is valid. In particular, consider | |
1342 | (set (reg:DI r11) (...)) | |
1343 | (set (reg:SI r9) (reg:SI r11)) | |
1344 | (set (reg:SI r10) (...)) | |
1345 | (set (...) (reg:DI r9)) | |
1346 | Replacing r9 with r11 is invalid. */ | |
1347 | if (mode != vd->e[regno].mode) | |
1348 | { | |
66fd46b6 JH |
1349 | if (hard_regno_nregs[regno][mode] |
1350 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
57d1019b RH |
1351 | return NULL_RTX; |
1352 | } | |
1353 | ||
8582c27b | 1354 | for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) |
cffa2189 R |
1355 | { |
1356 | enum machine_mode oldmode = vd->e[i].mode; | |
61dde664 | 1357 | rtx new; |
684bcee5 | 1358 | unsigned int last; |
cffa2189 | 1359 | |
66fd46b6 | 1360 | for (last = i; last < i + hard_regno_nregs[i][mode]; last++) |
e3a64162 | 1361 | if (!TEST_HARD_REG_BIT (reg_class_contents[cl], last)) |
684bcee5 RE |
1362 | return NULL_RTX; |
1363 | ||
abbe8578 KH |
1364 | new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno); |
1365 | if (new) | |
684bcee5 RE |
1366 | { |
1367 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg); | |
1368 | REG_ATTRS (new) = REG_ATTRS (reg); | |
1369 | return new; | |
1370 | } | |
cffa2189 | 1371 | } |
8582c27b RH |
1372 | |
1373 | return NULL_RTX; | |
1374 | } | |
1375 | ||
1376 | /* If possible, replace the register at *LOC with the oldest register | |
e3a64162 | 1377 | in register class CL. Return true if successfully replaced. */ |
8582c27b RH |
1378 | |
1379 | static bool | |
e3a64162 | 1380 | replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn, |
0c20a65f | 1381 | struct value_data *vd) |
8582c27b | 1382 | { |
e3a64162 | 1383 | rtx new = find_oldest_value_reg (cl, *loc, vd); |
8582c27b RH |
1384 | if (new) |
1385 | { | |
c263766c RH |
1386 | if (dump_file) |
1387 | fprintf (dump_file, "insn %u: replaced reg %u with %u\n", | |
8582c27b RH |
1388 | INSN_UID (insn), REGNO (*loc), REGNO (new)); |
1389 | ||
1390 | *loc = new; | |
1391 | return true; | |
1392 | } | |
1393 | return false; | |
1394 | } | |
1395 | ||
1396 | /* Similar to replace_oldest_value_reg, but *LOC contains an address. | |
e3a64162 | 1397 | Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or |
8582c27b RH |
1398 | BASE_REG_CLASS depending on how the register is being considered. */ |
1399 | ||
1400 | static bool | |
e3a64162 | 1401 | replace_oldest_value_addr (rtx *loc, enum reg_class cl, |
0c20a65f AJ |
1402 | enum machine_mode mode, rtx insn, |
1403 | struct value_data *vd) | |
8582c27b RH |
1404 | { |
1405 | rtx x = *loc; | |
1406 | RTX_CODE code = GET_CODE (x); | |
1407 | const char *fmt; | |
1408 | int i, j; | |
1409 | bool changed = false; | |
1410 | ||
1411 | switch (code) | |
1412 | { | |
1413 | case PLUS: | |
1414 | { | |
1415 | rtx orig_op0 = XEXP (x, 0); | |
1416 | rtx orig_op1 = XEXP (x, 1); | |
1417 | RTX_CODE code0 = GET_CODE (orig_op0); | |
1418 | RTX_CODE code1 = GET_CODE (orig_op1); | |
1419 | rtx op0 = orig_op0; | |
1420 | rtx op1 = orig_op1; | |
1421 | rtx *locI = NULL; | |
1422 | rtx *locB = NULL; | |
1423 | ||
1424 | if (GET_CODE (op0) == SUBREG) | |
1425 | { | |
1426 | op0 = SUBREG_REG (op0); | |
1427 | code0 = GET_CODE (op0); | |
1428 | } | |
1429 | ||
1430 | if (GET_CODE (op1) == SUBREG) | |
1431 | { | |
1432 | op1 = SUBREG_REG (op1); | |
1433 | code1 = GET_CODE (op1); | |
1434 | } | |
1435 | ||
1436 | if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE | |
1437 | || code0 == ZERO_EXTEND || code1 == MEM) | |
1438 | { | |
1439 | locI = &XEXP (x, 0); | |
1440 | locB = &XEXP (x, 1); | |
1441 | } | |
1442 | else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE | |
1443 | || code1 == ZERO_EXTEND || code0 == MEM) | |
1444 | { | |
1445 | locI = &XEXP (x, 1); | |
1446 | locB = &XEXP (x, 0); | |
1447 | } | |
1448 | else if (code0 == CONST_INT || code0 == CONST | |
1449 | || code0 == SYMBOL_REF || code0 == LABEL_REF) | |
1450 | locB = &XEXP (x, 1); | |
1451 | else if (code1 == CONST_INT || code1 == CONST | |
1452 | || code1 == SYMBOL_REF || code1 == LABEL_REF) | |
1453 | locB = &XEXP (x, 0); | |
1454 | else if (code0 == REG && code1 == REG) | |
1455 | { | |
1456 | int index_op; | |
1457 | ||
1458 | if (REG_OK_FOR_INDEX_P (op0) | |
1459 | && REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
1460 | index_op = 0; | |
1461 | else if (REG_OK_FOR_INDEX_P (op1) | |
1462 | && REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
1463 | index_op = 1; | |
1464 | else if (REG_MODE_OK_FOR_BASE_P (op1, mode)) | |
1465 | index_op = 0; | |
1466 | else if (REG_MODE_OK_FOR_BASE_P (op0, mode)) | |
1467 | index_op = 1; | |
1468 | else if (REG_OK_FOR_INDEX_P (op1)) | |
1469 | index_op = 1; | |
1470 | else | |
1471 | index_op = 0; | |
1472 | ||
1473 | locI = &XEXP (x, index_op); | |
1474 | locB = &XEXP (x, !index_op); | |
1475 | } | |
1476 | else if (code0 == REG) | |
1477 | { | |
1478 | locI = &XEXP (x, 0); | |
1479 | locB = &XEXP (x, 1); | |
1480 | } | |
1481 | else if (code1 == REG) | |
1482 | { | |
1483 | locI = &XEXP (x, 1); | |
1484 | locB = &XEXP (x, 0); | |
1485 | } | |
1486 | ||
1487 | if (locI) | |
1488 | changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode, | |
3b03c671 | 1489 | insn, vd); |
8582c27b | 1490 | if (locB) |
3dcc68a4 NC |
1491 | changed |= replace_oldest_value_addr (locB, |
1492 | MODE_BASE_REG_CLASS (mode), | |
1493 | mode, insn, vd); | |
8582c27b RH |
1494 | return changed; |
1495 | } | |
1496 | ||
1497 | case POST_INC: | |
1498 | case POST_DEC: | |
1499 | case POST_MODIFY: | |
1500 | case PRE_INC: | |
1501 | case PRE_DEC: | |
1502 | case PRE_MODIFY: | |
1503 | return false; | |
1504 | ||
1505 | case MEM: | |
1506 | return replace_oldest_value_mem (x, insn, vd); | |
1507 | ||
1508 | case REG: | |
e3a64162 | 1509 | return replace_oldest_value_reg (loc, cl, insn, vd); |
8582c27b RH |
1510 | |
1511 | default: | |
1512 | break; | |
1513 | } | |
1514 | ||
1515 | fmt = GET_RTX_FORMAT (code); | |
1516 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1517 | { | |
1518 | if (fmt[i] == 'e') | |
e3a64162 | 1519 | changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, |
8582c27b RH |
1520 | insn, vd); |
1521 | else if (fmt[i] == 'E') | |
1522 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
e3a64162 | 1523 | changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl, |
3b03c671 | 1524 | mode, insn, vd); |
8582c27b RH |
1525 | } |
1526 | ||
1527 | return changed; | |
1528 | } | |
1529 | ||
1530 | /* Similar to replace_oldest_value_reg, but X contains a memory. */ | |
1531 | ||
1532 | static bool | |
0c20a65f | 1533 | replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd) |
8582c27b | 1534 | { |
3dcc68a4 NC |
1535 | return replace_oldest_value_addr (&XEXP (x, 0), |
1536 | MODE_BASE_REG_CLASS (GET_MODE (x)), | |
8582c27b RH |
1537 | GET_MODE (x), insn, vd); |
1538 | } | |
1539 | ||
1540 | /* Perform the forward copy propagation on basic block BB. */ | |
1541 | ||
1542 | static bool | |
0c20a65f | 1543 | copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) |
8582c27b RH |
1544 | { |
1545 | bool changed = false; | |
1546 | rtx insn; | |
1547 | ||
a813c111 | 1548 | for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) |
8582c27b RH |
1549 | { |
1550 | int n_ops, i, alt, predicated; | |
3ada20ee | 1551 | bool is_asm; |
8582c27b RH |
1552 | rtx set; |
1553 | ||
1554 | if (! INSN_P (insn)) | |
1555 | { | |
a813c111 | 1556 | if (insn == BB_END (bb)) |
8582c27b RH |
1557 | break; |
1558 | else | |
1559 | continue; | |
1560 | } | |
1561 | ||
1562 | set = single_set (insn); | |
1563 | extract_insn (insn); | |
4be9e9cb | 1564 | if (! constrain_operands (1)) |
3b03c671 | 1565 | fatal_insn_not_found (insn); |
8582c27b RH |
1566 | preprocess_constraints (); |
1567 | alt = which_alternative; | |
1568 | n_ops = recog_data.n_operands; | |
3ada20ee | 1569 | is_asm = asm_noperands (PATTERN (insn)) >= 0; |
8582c27b RH |
1570 | |
1571 | /* Simplify the code below by rewriting things to reflect | |
1572 | matching constraints. Also promote OP_OUT to OP_INOUT | |
1573 | in predicated instructions. */ | |
1574 | ||
1575 | predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; | |
1576 | for (i = 0; i < n_ops; ++i) | |
1577 | { | |
1578 | int matches = recog_op_alt[i][alt].matches; | |
1579 | if (matches >= 0) | |
e3a64162 | 1580 | recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; |
8582c27b RH |
1581 | if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 |
1582 | || (predicated && recog_data.operand_type[i] == OP_OUT)) | |
1583 | recog_data.operand_type[i] = OP_INOUT; | |
1584 | } | |
1585 | ||
1586 | /* For each earlyclobber operand, zap the value data. */ | |
1587 | for (i = 0; i < n_ops; i++) | |
1588 | if (recog_op_alt[i][alt].earlyclobber) | |
1589 | kill_value (recog_data.operand[i], vd); | |
1590 | ||
1591 | /* Within asms, a clobber cannot overlap inputs or outputs. | |
1592 | I wouldn't think this were true for regular insns, but | |
1593 | scan_rtx treats them like that... */ | |
1594 | note_stores (PATTERN (insn), kill_clobbered_value, vd); | |
1595 | ||
1596 | /* Kill all auto-incremented values. */ | |
1597 | /* ??? REG_INC is useless, since stack pushes aren't done that way. */ | |
1598 | for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd); | |
1599 | ||
752ae914 RH |
1600 | /* Kill all early-clobbered operands. */ |
1601 | for (i = 0; i < n_ops; i++) | |
1602 | if (recog_op_alt[i][alt].earlyclobber) | |
1603 | kill_value (recog_data.operand[i], vd); | |
1604 | ||
8582c27b RH |
1605 | /* Special-case plain move instructions, since we may well |
1606 | be able to do the move from a different register class. */ | |
1607 | if (set && REG_P (SET_SRC (set))) | |
1608 | { | |
3ada20ee RH |
1609 | rtx src = SET_SRC (set); |
1610 | unsigned int regno = REGNO (src); | |
1611 | enum machine_mode mode = GET_MODE (src); | |
8582c27b RH |
1612 | unsigned int i; |
1613 | rtx new; | |
1614 | ||
57d1019b RH |
1615 | /* If we are accessing SRC in some mode other that what we |
1616 | set it in, make sure that the replacement is valid. */ | |
1617 | if (mode != vd->e[regno].mode) | |
1618 | { | |
66fd46b6 JH |
1619 | if (hard_regno_nregs[regno][mode] |
1620 | > hard_regno_nregs[regno][vd->e[regno].mode]) | |
57d1019b RH |
1621 | goto no_move_special_case; |
1622 | } | |
1623 | ||
8582c27b RH |
1624 | /* If the destination is also a register, try to find a source |
1625 | register in the same class. */ | |
1626 | if (REG_P (SET_DEST (set))) | |
1627 | { | |
3ada20ee | 1628 | new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd); |
8582c27b RH |
1629 | if (new && validate_change (insn, &SET_SRC (set), new, 0)) |
1630 | { | |
c263766c RH |
1631 | if (dump_file) |
1632 | fprintf (dump_file, | |
8582c27b RH |
1633 | "insn %u: replaced reg %u with %u\n", |
1634 | INSN_UID (insn), regno, REGNO (new)); | |
3b03c671 | 1635 | changed = true; |
8582c27b RH |
1636 | goto did_replacement; |
1637 | } | |
1638 | } | |
1639 | ||
1640 | /* Otherwise, try all valid registers and see if its valid. */ | |
1641 | for (i = vd->e[regno].oldest_regno; i != regno; | |
1642 | i = vd->e[i].next_regno) | |
61dde664 R |
1643 | { |
1644 | new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode, | |
1645 | mode, i, regno); | |
1646 | if (new != NULL_RTX) | |
1647 | { | |
1648 | if (validate_change (insn, &SET_SRC (set), new, 0)) | |
1649 | { | |
1650 | ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src); | |
d1d3c9a6 | 1651 | REG_ATTRS (new) = REG_ATTRS (src); |
c263766c RH |
1652 | if (dump_file) |
1653 | fprintf (dump_file, | |
61dde664 R |
1654 | "insn %u: replaced reg %u with %u\n", |
1655 | INSN_UID (insn), regno, REGNO (new)); | |
1656 | changed = true; | |
1657 | goto did_replacement; | |
1658 | } | |
1659 | } | |
1660 | } | |
8582c27b | 1661 | } |
57d1019b | 1662 | no_move_special_case: |
8582c27b RH |
1663 | |
1664 | /* For each input operand, replace a hard register with the | |
1665 | eldest live copy that's in an appropriate register class. */ | |
1666 | for (i = 0; i < n_ops; i++) | |
1667 | { | |
1668 | bool replaced = false; | |
1669 | ||
1670 | /* Don't scan match_operand here, since we've no reg class | |
1671 | information to pass down. Any operands that we could | |
1672 | substitute in will be represented elsewhere. */ | |
1673 | if (recog_data.constraints[i][0] == '\0') | |
1674 | continue; | |
1675 | ||
3ada20ee | 1676 | /* Don't replace in asms intentionally referencing hard regs. */ |
f8cfc6aa | 1677 | if (is_asm && REG_P (recog_data.operand[i]) |
3ada20ee RH |
1678 | && (REGNO (recog_data.operand[i]) |
1679 | == ORIGINAL_REGNO (recog_data.operand[i]))) | |
1680 | continue; | |
1681 | ||
8582c27b RH |
1682 | if (recog_data.operand_type[i] == OP_IN) |
1683 | { | |
1684 | if (recog_op_alt[i][alt].is_address) | |
1685 | replaced | |
1686 | = replace_oldest_value_addr (recog_data.operand_loc[i], | |
e3a64162 | 1687 | recog_op_alt[i][alt].cl, |
8582c27b RH |
1688 | VOIDmode, insn, vd); |
1689 | else if (REG_P (recog_data.operand[i])) | |
1690 | replaced | |
1691 | = replace_oldest_value_reg (recog_data.operand_loc[i], | |
e3a64162 | 1692 | recog_op_alt[i][alt].cl, |
8582c27b | 1693 | insn, vd); |
3c0cb5de | 1694 | else if (MEM_P (recog_data.operand[i])) |
8582c27b RH |
1695 | replaced = replace_oldest_value_mem (recog_data.operand[i], |
1696 | insn, vd); | |
1697 | } | |
3c0cb5de | 1698 | else if (MEM_P (recog_data.operand[i])) |
8582c27b | 1699 | replaced = replace_oldest_value_mem (recog_data.operand[i], |
3b03c671 | 1700 | insn, vd); |
8582c27b RH |
1701 | |
1702 | /* If we performed any replacement, update match_dups. */ | |
1703 | if (replaced) | |
1704 | { | |
1705 | int j; | |
1706 | rtx new; | |
1707 | ||
1708 | changed = true; | |
1709 | ||
1710 | new = *recog_data.operand_loc[i]; | |
1711 | recog_data.operand[i] = new; | |
1712 | for (j = 0; j < recog_data.n_dups; j++) | |
1713 | if (recog_data.dup_num[j] == i) | |
1714 | *recog_data.dup_loc[j] = new; | |
1715 | } | |
1716 | } | |
1717 | ||
1718 | did_replacement: | |
1719 | /* Clobber call-clobbered registers. */ | |
4b4bf941 | 1720 | if (CALL_P (insn)) |
8582c27b RH |
1721 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
1722 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
d64d5e80 | 1723 | kill_value_regno (i, 1, vd); |
8582c27b RH |
1724 | |
1725 | /* Notice stores. */ | |
1726 | note_stores (PATTERN (insn), kill_set_value, vd); | |
1727 | ||
1728 | /* Notice copies. */ | |
1729 | if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))) | |
1730 | copy_value (SET_DEST (set), SET_SRC (set), vd); | |
1731 | ||
a813c111 | 1732 | if (insn == BB_END (bb)) |
8582c27b RH |
1733 | break; |
1734 | } | |
1735 | ||
1736 | return changed; | |
1737 | } | |
1738 | ||
1739 | /* Main entry point for the forward copy propagation optimization. */ | |
1740 | ||
1741 | void | |
0c20a65f | 1742 | copyprop_hardreg_forward (void) |
8582c27b | 1743 | { |
8582c27b | 1744 | struct value_data *all_vd; |
3de23727 | 1745 | bool need_refresh; |
d950dee3 | 1746 | basic_block bb, bbp = 0; |
8582c27b | 1747 | |
3de23727 | 1748 | need_refresh = false; |
8582c27b | 1749 | |
d55bc081 | 1750 | all_vd = xmalloc (sizeof (struct value_data) * last_basic_block); |
8582c27b | 1751 | |
e0082a72 | 1752 | FOR_EACH_BB (bb) |
8582c27b | 1753 | { |
8582c27b RH |
1754 | /* If a block has a single predecessor, that we've already |
1755 | processed, begin with the value data that was live at | |
1756 | the end of the predecessor block. */ | |
d91edf86 | 1757 | /* ??? Ought to use more intelligent queuing of blocks. */ |
e0082a72 ZD |
1758 | if (bb->pred) |
1759 | for (bbp = bb; bbp && bbp != bb->pred->src; bbp = bbp->prev_bb); | |
8582c27b | 1760 | if (bb->pred |
3b03c671 | 1761 | && ! bb->pred->pred_next |
22c56562 | 1762 | && ! (bb->pred->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)) |
e0082a72 ZD |
1763 | && bb->pred->src != ENTRY_BLOCK_PTR |
1764 | && bbp) | |
1765 | all_vd[bb->index] = all_vd[bb->pred->src->index]; | |
8582c27b | 1766 | else |
e0082a72 | 1767 | init_value_data (all_vd + bb->index); |
8582c27b | 1768 | |
e0082a72 | 1769 | if (copyprop_hardreg_forward_1 (bb, all_vd + bb->index)) |
3de23727 | 1770 | need_refresh = true; |
8582c27b RH |
1771 | } |
1772 | ||
1773 | if (need_refresh) | |
1774 | { | |
c263766c RH |
1775 | if (dump_file) |
1776 | fputs ("\n\n", dump_file); | |
8582c27b | 1777 | |
3de23727 RH |
1778 | /* ??? Irritatingly, delete_noop_moves does not take a set of blocks |
1779 | to scan, so we have to do a life update with no initial set of | |
1780 | blocks Just In Case. */ | |
827c06b6 | 1781 | delete_noop_moves (); |
3de23727 | 1782 | update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, |
8582c27b RH |
1783 | PROP_DEATH_NOTES |
1784 | | PROP_SCAN_DEAD_CODE | |
1785 | | PROP_KILL_DEAD_CODE); | |
1786 | } | |
1787 | ||
8582c27b RH |
1788 | free (all_vd); |
1789 | } | |
1790 | ||
1791 | /* Dump the value chain data to stderr. */ | |
1792 | ||
1793 | void | |
0c20a65f | 1794 | debug_value_data (struct value_data *vd) |
8582c27b RH |
1795 | { |
1796 | HARD_REG_SET set; | |
1797 | unsigned int i, j; | |
1798 | ||
1799 | CLEAR_HARD_REG_SET (set); | |
1800 | ||
1801 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1802 | if (vd->e[i].oldest_regno == i) | |
1803 | { | |
1804 | if (vd->e[i].mode == VOIDmode) | |
1805 | { | |
1806 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1807 | fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n", | |
1808 | i, vd->e[i].next_regno); | |
1809 | continue; | |
1810 | } | |
1811 | ||
1812 | SET_HARD_REG_BIT (set, i); | |
1813 | fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode)); | |
1814 | ||
1815 | for (j = vd->e[i].next_regno; | |
1816 | j != INVALID_REGNUM; | |
1817 | j = vd->e[j].next_regno) | |
1818 | { | |
57d1019b | 1819 | if (TEST_HARD_REG_BIT (set, j)) |
8582c27b RH |
1820 | { |
1821 | fprintf (stderr, "[%u] Loop in regno chain\n", j); | |
1822 | return; | |
1823 | } | |
1824 | ||
1825 | if (vd->e[j].oldest_regno != i) | |
1826 | { | |
1827 | fprintf (stderr, "[%u] Bad oldest_regno (%u)\n", | |
1828 | j, vd->e[j].oldest_regno); | |
1829 | return; | |
1830 | } | |
1831 | SET_HARD_REG_BIT (set, j); | |
1832 | fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode)); | |
1833 | } | |
1834 | fputc ('\n', stderr); | |
1835 | } | |
1836 | ||
1837 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1838 | if (! TEST_HARD_REG_BIT (set, i) | |
1839 | && (vd->e[i].mode != VOIDmode | |
1840 | || vd->e[i].oldest_regno != i | |
1841 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1842 | fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n", | |
1843 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1844 | vd->e[i].next_regno); | |
1845 | } | |
1846 | ||
1847 | #ifdef ENABLE_CHECKING | |
1848 | static void | |
0c20a65f | 1849 | validate_value_data (struct value_data *vd) |
8582c27b RH |
1850 | { |
1851 | HARD_REG_SET set; | |
1852 | unsigned int i, j; | |
1853 | ||
1854 | CLEAR_HARD_REG_SET (set); | |
1855 | ||
1856 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1857 | if (vd->e[i].oldest_regno == i) | |
1858 | { | |
1859 | if (vd->e[i].mode == VOIDmode) | |
1860 | { | |
1861 | if (vd->e[i].next_regno != INVALID_REGNUM) | |
1862 | internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)", | |
1863 | i, vd->e[i].next_regno); | |
1864 | continue; | |
1865 | } | |
1866 | ||
1867 | SET_HARD_REG_BIT (set, i); | |
1868 | ||
1869 | for (j = vd->e[i].next_regno; | |
1870 | j != INVALID_REGNUM; | |
1871 | j = vd->e[j].next_regno) | |
1872 | { | |
1873 | if (TEST_HARD_REG_BIT (set, j)) | |
1874 | internal_error ("validate_value_data: Loop in regno chain (%u)", | |
1875 | j); | |
1876 | if (vd->e[j].oldest_regno != i) | |
1877 | internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)", | |
1878 | j, vd->e[j].oldest_regno); | |
1879 | ||
1880 | SET_HARD_REG_BIT (set, j); | |
1881 | } | |
1882 | } | |
1883 | ||
1884 | for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) | |
1885 | if (! TEST_HARD_REG_BIT (set, i) | |
1886 | && (vd->e[i].mode != VOIDmode | |
1887 | || vd->e[i].oldest_regno != i | |
1888 | || vd->e[i].next_regno != INVALID_REGNUM)) | |
1889 | internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)", | |
1890 | i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, | |
1891 | vd->e[i].next_regno); | |
1892 | } | |
1893 | #endif |