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Commit | Line | Data |
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8c660648 | 1 | /* Move registers around to reduce number of move instructions needed. |
184bb750 | 2 | Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc. |
8c660648 JL |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* This module looks for cases where matching constraints would force | |
22 | an instruction to need a reload, and this reload would be a register | |
23 | to register move. It then attempts to change the registers used by the | |
24 | instruction to avoid the move instruction. */ | |
25 | ||
26 | #include "config.h" | |
670ee920 | 27 | #include "system.h" |
789f983a | 28 | #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */ |
8c660648 JL |
29 | #include "insn-config.h" |
30 | #include "recog.h" | |
31 | #include "output.h" | |
32 | #include "reload.h" | |
33 | #include "regs.h" | |
184bb750 R |
34 | #include "hard-reg-set.h" |
35 | #include "flags.h" | |
36 | #include "expr.h" | |
37 | #include "insn-flags.h" | |
ddc8bed2 | 38 | #include "basic-block.h" |
2e107e9e | 39 | #include "toplev.h" |
184bb750 | 40 | |
1230327b R |
41 | static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx)); |
42 | static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx)); | |
184bb750 | 43 | static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx)); |
1a29f703 | 44 | static rtx gen_add3_insn PROTO((rtx, rtx, rtx)); |
ddc8bed2 MM |
45 | static void copy_src_to_dest PROTO((rtx, rtx, rtx, int)); |
46 | static int *regmove_bb_head; | |
8c660648 | 47 | |
184bb750 R |
48 | struct match { |
49 | int with[MAX_RECOG_OPERANDS]; | |
50 | enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS]; | |
51 | int commutative[MAX_RECOG_OPERANDS]; | |
52 | int early_clobber[MAX_RECOG_OPERANDS]; | |
53 | }; | |
54 | ||
d06eab0d | 55 | #ifdef AUTO_INC_DEC |
0e05e8ea | 56 | static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int)); |
d06eab0d | 57 | #endif |
184bb750 R |
58 | static int find_matches PROTO((rtx, struct match *)); |
59 | static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *)) | |
60 | ; | |
61 | static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx)); | |
8c660648 | 62 | static int stable_but_for_p PROTO((rtx, rtx, rtx)); |
3bb806ed | 63 | static int regclass_compatible_p PROTO((int, int)); |
184bb750 | 64 | static int loop_depth; |
8c660648 | 65 | |
3bb806ed R |
66 | /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without |
67 | causing too much register allocation problems. */ | |
68 | static int | |
69 | regclass_compatible_p (class0, class1) | |
70 | int class0, class1; | |
71 | { | |
72 | return (class0 == class1 | |
73 | || (reg_class_subset_p (class0, class1) | |
74 | && ! CLASS_LIKELY_SPILLED_P (class0)) | |
75 | || (reg_class_subset_p (class1, class0) | |
76 | && ! CLASS_LIKELY_SPILLED_P (class1))); | |
77 | } | |
78 | ||
1a29f703 R |
79 | /* Generate and return an insn body to add r1 and c, |
80 | storing the result in r0. */ | |
81 | static rtx | |
82 | gen_add3_insn (r0, r1, c) | |
83 | rtx r0, r1, c; | |
84 | { | |
85 | int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code; | |
86 | ||
87 | if (icode == CODE_FOR_nothing | |
88 | || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0]) | |
89 | || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1]) | |
90 | || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2])) | |
91 | return NULL_RTX; | |
92 | ||
93 | return (GEN_FCN (icode) (r0, r1, c)); | |
94 | } | |
95 | ||
184bb750 | 96 | #ifdef AUTO_INC_DEC |
8c660648 JL |
97 | |
98 | /* INC_INSN is an instruction that adds INCREMENT to REG. | |
99 | Try to fold INC_INSN as a post/pre in/decrement into INSN. | |
100 | Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src. | |
101 | Return nonzero for success. */ | |
102 | static int | |
103 | try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) | |
104 | rtx reg, insn, inc_insn ,inc_insn_set; | |
105 | HOST_WIDE_INT increment; | |
106 | int pre; | |
107 | { | |
108 | enum rtx_code inc_code; | |
109 | ||
110 | rtx pset = single_set (insn); | |
111 | if (pset) | |
112 | { | |
113 | /* Can't use the size of SET_SRC, we might have something like | |
114 | (sign_extend:SI (mem:QI ... */ | |
115 | rtx use = find_use_as_address (pset, reg, 0); | |
116 | if (use != 0 && use != (rtx) 1) | |
117 | { | |
118 | int size = GET_MODE_SIZE (GET_MODE (use)); | |
119 | if (0 | |
120 | #ifdef HAVE_POST_INCREMENT | |
121 | || (pre == 0 && (inc_code = POST_INC, increment == size)) | |
122 | #endif | |
123 | #ifdef HAVE_PRE_INCREMENT | |
124 | || (pre == 1 && (inc_code = PRE_INC, increment == size)) | |
125 | #endif | |
126 | #ifdef HAVE_POST_DECREMENT | |
127 | || (pre == 0 && (inc_code = POST_DEC, increment == -size)) | |
128 | #endif | |
129 | #ifdef HAVE_PRE_DECREMENT | |
130 | || (pre == 1 && (inc_code = PRE_DEC, increment == -size)) | |
131 | #endif | |
184bb750 R |
132 | ) |
133 | { | |
134 | if (inc_insn_set) | |
135 | validate_change | |
136 | (inc_insn, | |
137 | &SET_SRC (inc_insn_set), | |
8c660648 | 138 | XEXP (SET_SRC (inc_insn_set), 0), 1); |
184bb750 | 139 | validate_change (insn, &XEXP (use, 0), |
38a448ca | 140 | gen_rtx_fmt_e (inc_code, Pmode, reg), 1); |
184bb750 R |
141 | if (apply_change_group ()) |
142 | { | |
143 | REG_NOTES (insn) | |
38a448ca RH |
144 | = gen_rtx_EXPR_LIST (REG_INC, |
145 | reg, REG_NOTES (insn)); | |
184bb750 R |
146 | if (! inc_insn_set) |
147 | { | |
148 | PUT_CODE (inc_insn, NOTE); | |
149 | NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED; | |
150 | NOTE_SOURCE_FILE (inc_insn) = 0; | |
151 | } | |
8c660648 | 152 | return 1; |
184bb750 R |
153 | } |
154 | } | |
155 | } | |
156 | } | |
157 | return 0; | |
158 | } | |
159 | #endif /* AUTO_INC_DEC */ | |
160 | ||
161 | static int *regno_src_regno; | |
162 | ||
163 | /* Indicate how good a choice REG (which appears as a source) is to replace | |
164 | a destination register with. The higher the returned value, the better | |
165 | the choice. The main objective is to avoid using a register that is | |
166 | a candidate for tying to a hard register, since the output might in | |
167 | turn be a candidate to be tied to a different hard register. */ | |
168 | int | |
169 | replacement_quality(reg) | |
170 | rtx reg; | |
171 | { | |
172 | int src_regno; | |
173 | ||
174 | /* Bad if this isn't a register at all. */ | |
175 | if (GET_CODE (reg) != REG) | |
176 | return 0; | |
177 | ||
178 | /* If this register is not meant to get a hard register, | |
179 | it is a poor choice. */ | |
180 | if (REG_LIVE_LENGTH (REGNO (reg)) < 0) | |
181 | return 0; | |
182 | ||
183 | src_regno = regno_src_regno[REGNO (reg)]; | |
184 | ||
185 | /* If it was not copied from another register, it is fine. */ | |
186 | if (src_regno < 0) | |
187 | return 3; | |
188 | ||
189 | /* Copied from a hard register? */ | |
190 | if (src_regno < FIRST_PSEUDO_REGISTER) | |
191 | return 1; | |
192 | ||
193 | /* Copied from a pseudo register - not as bad as from a hard register, | |
194 | yet still cumbersome, since the register live length will be lengthened | |
195 | when the registers get tied. */ | |
196 | return 2; | |
197 | } | |
198 | ||
1230327b R |
199 | /* INSN is a copy from SRC to DEST, both registers, and SRC does not die |
200 | in INSN. | |
201 | ||
202 | Search forward to see if SRC dies before either it or DEST is modified, | |
203 | but don't scan past the end of a basic block. If so, we can replace SRC | |
204 | with DEST and let SRC die in INSN. | |
205 | ||
206 | This will reduce the number of registers live in that range and may enable | |
207 | DEST to be tied to SRC, thus often saving one register in addition to a | |
208 | register-register copy. */ | |
209 | ||
210 | static int | |
211 | optimize_reg_copy_1 (insn, dest, src) | |
212 | rtx insn; | |
213 | rtx dest; | |
214 | rtx src; | |
215 | { | |
216 | rtx p, q; | |
217 | rtx note; | |
218 | rtx dest_death = 0; | |
219 | int sregno = REGNO (src); | |
220 | int dregno = REGNO (dest); | |
221 | ||
222 | /* We don't want to mess with hard regs if register classes are small. */ | |
223 | if (sregno == dregno | |
224 | || (SMALL_REGISTER_CLASSES | |
225 | && (sregno < FIRST_PSEUDO_REGISTER | |
226 | || dregno < FIRST_PSEUDO_REGISTER)) | |
227 | /* We don't see all updates to SP if they are in an auto-inc memory | |
228 | reference, so we must disallow this optimization on them. */ | |
229 | || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM) | |
230 | return 0; | |
231 | ||
232 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
233 | { | |
234 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
235 | || (GET_CODE (p) == NOTE | |
236 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
237 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
238 | break; | |
239 | ||
7bf825d2 JW |
240 | /* ??? We can't scan past the end of a basic block without updating |
241 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
242 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
243 | an EH region. There is no easy way to tell, so we just always break | |
244 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
245 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
246 | break; | |
247 | ||
1230327b R |
248 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
249 | continue; | |
250 | ||
251 | if (reg_set_p (src, p) || reg_set_p (dest, p) | |
252 | /* Don't change a USE of a register. */ | |
253 | || (GET_CODE (PATTERN (p)) == USE | |
254 | && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) | |
255 | break; | |
256 | ||
257 | /* See if all of SRC dies in P. This test is slightly more | |
258 | conservative than it needs to be. */ | |
259 | if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0 | |
260 | && GET_MODE (XEXP (note, 0)) == GET_MODE (src)) | |
261 | { | |
262 | int failed = 0; | |
263 | int length = 0; | |
264 | int d_length = 0; | |
265 | int n_calls = 0; | |
266 | int d_n_calls = 0; | |
267 | ||
268 | /* We can do the optimization. Scan forward from INSN again, | |
269 | replacing regs as we go. Set FAILED if a replacement can't | |
270 | be done. In that case, we can't move the death note for SRC. | |
271 | This should be rare. */ | |
272 | ||
273 | /* Set to stop at next insn. */ | |
274 | for (q = next_real_insn (insn); | |
275 | q != next_real_insn (p); | |
276 | q = next_real_insn (q)) | |
277 | { | |
278 | if (reg_overlap_mentioned_p (src, PATTERN (q))) | |
279 | { | |
280 | /* If SRC is a hard register, we might miss some | |
281 | overlapping registers with validate_replace_rtx, | |
282 | so we would have to undo it. We can't if DEST is | |
283 | present in the insn, so fail in that combination | |
284 | of cases. */ | |
285 | if (sregno < FIRST_PSEUDO_REGISTER | |
286 | && reg_mentioned_p (dest, PATTERN (q))) | |
287 | failed = 1; | |
288 | ||
289 | /* Replace all uses and make sure that the register | |
290 | isn't still present. */ | |
291 | else if (validate_replace_rtx (src, dest, q) | |
292 | && (sregno >= FIRST_PSEUDO_REGISTER | |
293 | || ! reg_overlap_mentioned_p (src, | |
294 | PATTERN (q)))) | |
295 | { | |
296 | /* We assume that a register is used exactly once per | |
7b31b7d9 JL |
297 | insn in the REG_N_REFS updates below. If this is not |
298 | correct, no great harm is done. | |
299 | ||
300 | ||
301 | We do not undo this substitution if something later | |
302 | fails. Therefore, we must update the other REG_N_* | |
303 | counters now to keep them accurate. */ | |
1230327b | 304 | if (sregno >= FIRST_PSEUDO_REGISTER) |
7b31b7d9 JL |
305 | { |
306 | REG_N_REFS (sregno) -= loop_depth; | |
307 | ||
308 | if (REG_LIVE_LENGTH (sregno) >= 0) | |
309 | { | |
310 | REG_LIVE_LENGTH (sregno) -= length; | |
311 | /* REG_LIVE_LENGTH is only an approximation after | |
312 | combine if sched is not run, so make sure that | |
313 | we still have a reasonable value. */ | |
314 | if (REG_LIVE_LENGTH (sregno) < 2) | |
315 | REG_LIVE_LENGTH (sregno) = 2; | |
316 | } | |
317 | ||
318 | REG_N_CALLS_CROSSED (sregno) -= n_calls; | |
319 | } | |
320 | ||
1230327b | 321 | if (dregno >= FIRST_PSEUDO_REGISTER) |
7b31b7d9 JL |
322 | { |
323 | REG_N_REFS (dregno) += loop_depth; | |
324 | ||
325 | if (REG_LIVE_LENGTH (dregno) >= 0) | |
326 | REG_LIVE_LENGTH (dregno) += d_length; | |
327 | ||
328 | REG_N_CALLS_CROSSED (dregno) += d_n_calls; | |
329 | } | |
330 | ||
331 | /* We've done a substitution, clear the counters. */ | |
332 | length = 0; | |
333 | d_length = 0; | |
334 | n_calls = 0; | |
335 | d_n_calls = 0; | |
1230327b R |
336 | } |
337 | else | |
338 | { | |
339 | validate_replace_rtx (dest, src, q); | |
340 | failed = 1; | |
341 | } | |
342 | } | |
343 | ||
344 | /* Count the insns and CALL_INSNs passed. If we passed the | |
345 | death note of DEST, show increased live length. */ | |
346 | length++; | |
347 | if (dest_death) | |
348 | d_length++; | |
349 | ||
350 | /* If the insn in which SRC dies is a CALL_INSN, don't count it | |
351 | as a call that has been crossed. Otherwise, count it. */ | |
352 | if (q != p && GET_CODE (q) == CALL_INSN) | |
353 | { | |
354 | n_calls++; | |
355 | if (dest_death) | |
356 | d_n_calls++; | |
357 | } | |
358 | ||
359 | /* If DEST dies here, remove the death note and save it for | |
360 | later. Make sure ALL of DEST dies here; again, this is | |
361 | overly conservative. */ | |
362 | if (dest_death == 0 | |
363 | && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0) | |
364 | { | |
365 | if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest)) | |
366 | failed = 1, dest_death = 0; | |
367 | else | |
368 | remove_note (q, dest_death); | |
369 | } | |
370 | } | |
371 | ||
372 | if (! failed) | |
373 | { | |
374 | if (sregno >= FIRST_PSEUDO_REGISTER) | |
375 | { | |
376 | if (REG_LIVE_LENGTH (sregno) >= 0) | |
377 | { | |
378 | REG_LIVE_LENGTH (sregno) -= length; | |
379 | /* REG_LIVE_LENGTH is only an approximation after | |
380 | combine if sched is not run, so make sure that we | |
381 | still have a reasonable value. */ | |
382 | if (REG_LIVE_LENGTH (sregno) < 2) | |
383 | REG_LIVE_LENGTH (sregno) = 2; | |
384 | } | |
385 | ||
386 | REG_N_CALLS_CROSSED (sregno) -= n_calls; | |
387 | } | |
388 | ||
389 | if (dregno >= FIRST_PSEUDO_REGISTER) | |
390 | { | |
391 | if (REG_LIVE_LENGTH (dregno) >= 0) | |
392 | REG_LIVE_LENGTH (dregno) += d_length; | |
393 | ||
394 | REG_N_CALLS_CROSSED (dregno) += d_n_calls; | |
395 | } | |
396 | ||
397 | /* Move death note of SRC from P to INSN. */ | |
398 | remove_note (p, note); | |
399 | XEXP (note, 1) = REG_NOTES (insn); | |
400 | REG_NOTES (insn) = note; | |
401 | } | |
402 | ||
403 | /* Put death note of DEST on P if we saw it die. */ | |
404 | if (dest_death) | |
405 | { | |
406 | XEXP (dest_death, 1) = REG_NOTES (p); | |
407 | REG_NOTES (p) = dest_death; | |
408 | } | |
409 | ||
410 | return ! failed; | |
411 | } | |
412 | ||
413 | /* If SRC is a hard register which is set or killed in some other | |
414 | way, we can't do this optimization. */ | |
415 | else if (sregno < FIRST_PSEUDO_REGISTER | |
416 | && dead_or_set_p (p, src)) | |
417 | break; | |
418 | } | |
419 | return 0; | |
420 | } | |
421 | \f | |
422 | /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have | |
423 | a sequence of insns that modify DEST followed by an insn that sets | |
424 | SRC to DEST in which DEST dies, with no prior modification of DEST. | |
425 | (There is no need to check if the insns in between actually modify | |
426 | DEST. We should not have cases where DEST is not modified, but | |
427 | the optimization is safe if no such modification is detected.) | |
428 | In that case, we can replace all uses of DEST, starting with INSN and | |
429 | ending with the set of SRC to DEST, with SRC. We do not do this | |
430 | optimization if a CALL_INSN is crossed unless SRC already crosses a | |
431 | call or if DEST dies before the copy back to SRC. | |
432 | ||
433 | It is assumed that DEST and SRC are pseudos; it is too complicated to do | |
434 | this for hard registers since the substitutions we may make might fail. */ | |
435 | ||
436 | static void | |
437 | optimize_reg_copy_2 (insn, dest, src) | |
438 | rtx insn; | |
439 | rtx dest; | |
440 | rtx src; | |
441 | { | |
442 | rtx p, q; | |
443 | rtx set; | |
444 | int sregno = REGNO (src); | |
445 | int dregno = REGNO (dest); | |
446 | ||
447 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
448 | { | |
449 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
450 | || (GET_CODE (p) == NOTE | |
451 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
452 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
453 | break; | |
454 | ||
7bf825d2 JW |
455 | /* ??? We can't scan past the end of a basic block without updating |
456 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
457 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
458 | an EH region. There is no easy way to tell, so we just always break | |
459 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
460 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
461 | break; | |
462 | ||
1230327b R |
463 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
464 | continue; | |
465 | ||
466 | set = single_set (p); | |
467 | if (set && SET_SRC (set) == dest && SET_DEST (set) == src | |
468 | && find_reg_note (p, REG_DEAD, dest)) | |
469 | { | |
470 | /* We can do the optimization. Scan forward from INSN again, | |
471 | replacing regs as we go. */ | |
472 | ||
473 | /* Set to stop at next insn. */ | |
474 | for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q)) | |
475 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
476 | { | |
477 | if (reg_mentioned_p (dest, PATTERN (q))) | |
478 | { | |
479 | PATTERN (q) = replace_rtx (PATTERN (q), dest, src); | |
480 | ||
481 | /* We assume that a register is used exactly once per | |
482 | insn in the updates below. If this is not correct, | |
483 | no great harm is done. */ | |
484 | REG_N_REFS (dregno) -= loop_depth; | |
485 | REG_N_REFS (sregno) += loop_depth; | |
486 | } | |
487 | ||
488 | ||
489 | if (GET_CODE (q) == CALL_INSN) | |
490 | { | |
491 | REG_N_CALLS_CROSSED (dregno)--; | |
492 | REG_N_CALLS_CROSSED (sregno)++; | |
493 | } | |
494 | } | |
495 | ||
496 | remove_note (p, find_reg_note (p, REG_DEAD, dest)); | |
497 | REG_N_DEATHS (dregno)--; | |
498 | remove_note (insn, find_reg_note (insn, REG_DEAD, src)); | |
499 | REG_N_DEATHS (sregno)--; | |
500 | return; | |
501 | } | |
502 | ||
503 | if (reg_set_p (src, p) | |
504 | || find_reg_note (p, REG_DEAD, dest) | |
505 | || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0)) | |
506 | break; | |
507 | } | |
508 | } | |
184bb750 R |
509 | /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST. |
510 | Look if SRC dies there, and if it is only set once, by loading | |
511 | it from memory. If so, try to encorporate the zero/sign extension | |
512 | into the memory read, change SRC to the mode of DEST, and alter | |
513 | the remaining accesses to use the appropriate SUBREG. This allows | |
514 | SRC and DEST to be tied later. */ | |
515 | static void | |
516 | optimize_reg_copy_3 (insn, dest, src) | |
517 | rtx insn; | |
518 | rtx dest; | |
519 | rtx src; | |
520 | { | |
521 | rtx src_reg = XEXP (src, 0); | |
522 | int src_no = REGNO (src_reg); | |
523 | int dst_no = REGNO (dest); | |
524 | rtx p, set, subreg; | |
525 | enum machine_mode old_mode; | |
526 | ||
527 | if (src_no < FIRST_PSEUDO_REGISTER | |
528 | || dst_no < FIRST_PSEUDO_REGISTER | |
529 | || ! find_reg_note (insn, REG_DEAD, src_reg) | |
530 | || REG_N_SETS (src_no) != 1) | |
531 | return; | |
532 | for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p)) | |
533 | { | |
7bf825d2 JW |
534 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN |
535 | || (GET_CODE (p) == NOTE | |
536 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
537 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
538 | return; | |
539 | ||
540 | /* ??? We can't scan past the end of a basic block without updating | |
541 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
542 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
543 | an EH region. There is no easy way to tell, so we just always break | |
544 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
545 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
546 | return; | |
547 | ||
184bb750 R |
548 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
549 | continue; | |
184bb750 R |
550 | } |
551 | if (! (set = single_set (p)) | |
552 | || GET_CODE (SET_SRC (set)) != MEM | |
553 | || SET_DEST (set) != src_reg) | |
554 | return; | |
555 | old_mode = GET_MODE (src_reg); | |
556 | PUT_MODE (src_reg, GET_MODE (src)); | |
557 | XEXP (src, 0) = SET_SRC (set); | |
e757da5e JL |
558 | |
559 | /* Include this change in the group so that it's easily undone if | |
560 | one of the changes in the group is invalid. */ | |
561 | validate_change (p, &SET_SRC (set), src, 1); | |
562 | ||
563 | /* Now walk forward making additional replacements. We want to be able | |
564 | to undo all the changes if a later substitution fails. */ | |
38a448ca | 565 | subreg = gen_rtx_SUBREG (old_mode, src_reg, 0); |
184bb750 R |
566 | while (p = NEXT_INSN (p), p != insn) |
567 | { | |
568 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') | |
569 | continue; | |
e757da5e JL |
570 | |
571 | /* Make a tenative change. */ | |
572 | validate_replace_rtx_group (src_reg, subreg, p); | |
573 | } | |
574 | ||
575 | validate_replace_rtx_group (src, src_reg, insn); | |
576 | ||
577 | /* Now see if all the changes are valid. */ | |
578 | if (! apply_change_group ()) | |
579 | { | |
580 | /* One or more changes were no good. Back out everything. */ | |
581 | PUT_MODE (src_reg, old_mode); | |
582 | XEXP (src, 0) = src_reg; | |
184bb750 | 583 | } |
184bb750 R |
584 | } |
585 | ||
ddc8bed2 MM |
586 | \f |
587 | /* If we were not able to update the users of src to use dest directly, try | |
588 | instead moving the value to dest directly before the operation. */ | |
589 | ||
cab634f2 | 590 | static void |
ddc8bed2 MM |
591 | copy_src_to_dest (insn, src, dest, loop_depth) |
592 | rtx insn; | |
593 | rtx src; | |
594 | rtx dest; | |
29a4c5ed | 595 | int loop_depth; |
ddc8bed2 MM |
596 | { |
597 | rtx seq; | |
598 | rtx link; | |
599 | rtx next; | |
600 | rtx set; | |
601 | rtx move_insn; | |
602 | rtx *p_insn_notes; | |
603 | rtx *p_move_notes; | |
ddc8bed2 MM |
604 | int src_regno; |
605 | int dest_regno; | |
606 | int bb; | |
607 | int insn_uid; | |
608 | int move_uid; | |
609 | ||
610 | /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant | |
611 | or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is | |
612 | parameter when there is no frame pointer that is not allocated a register. | |
613 | For now, we just reject them, rather than incrementing the live length. */ | |
614 | ||
3ac3da71 MM |
615 | if (GET_CODE (src) == REG |
616 | && REG_LIVE_LENGTH (REGNO (src)) > 0 | |
617 | && GET_CODE (dest) == REG | |
618 | && REG_LIVE_LENGTH (REGNO (dest)) > 0 | |
ddc8bed2 MM |
619 | && (set = single_set (insn)) != NULL_RTX |
620 | && !reg_mentioned_p (dest, SET_SRC (set)) | |
ddc8bed2 MM |
621 | && validate_replace_rtx (src, dest, insn)) |
622 | { | |
623 | /* Generate the src->dest move. */ | |
624 | start_sequence (); | |
625 | emit_move_insn (dest, src); | |
626 | seq = gen_sequence (); | |
627 | end_sequence (); | |
628 | emit_insn_before (seq, insn); | |
629 | move_insn = PREV_INSN (insn); | |
630 | p_move_notes = ®_NOTES (move_insn); | |
631 | p_insn_notes = ®_NOTES (insn); | |
632 | ||
633 | /* Move any notes mentioning src to the move instruction */ | |
634 | for (link = REG_NOTES (insn); link != NULL_RTX; link = next) | |
635 | { | |
636 | next = XEXP (link, 1); | |
637 | if (XEXP (link, 0) == src) | |
638 | { | |
639 | *p_move_notes = link; | |
640 | p_move_notes = &XEXP (link, 1); | |
641 | } | |
642 | else | |
643 | { | |
644 | *p_insn_notes = link; | |
645 | p_insn_notes = &XEXP (link, 1); | |
646 | } | |
647 | } | |
648 | ||
649 | *p_move_notes = NULL_RTX; | |
650 | *p_insn_notes = NULL_RTX; | |
651 | ||
652 | /* Is the insn the head of a basic block? If so extend it */ | |
653 | insn_uid = INSN_UID (insn); | |
654 | move_uid = INSN_UID (move_insn); | |
655 | bb = regmove_bb_head[insn_uid]; | |
656 | if (bb >= 0) | |
657 | { | |
658 | basic_block_head[bb] = move_insn; | |
659 | regmove_bb_head[insn_uid] = -1; | |
660 | } | |
661 | ||
662 | /* Update the various register tables. */ | |
663 | dest_regno = REGNO (dest); | |
664 | REG_N_SETS (dest_regno) += loop_depth; | |
665 | REG_N_REFS (dest_regno) += loop_depth; | |
666 | REG_LIVE_LENGTH (dest_regno)++; | |
667 | if (REGNO_FIRST_UID (dest_regno) == insn_uid) | |
668 | REGNO_FIRST_UID (dest_regno) = move_uid; | |
669 | ||
670 | src_regno = REGNO (src); | |
671 | if (! find_reg_note (move_insn, REG_DEAD, src)) | |
672 | REG_LIVE_LENGTH (src_regno)++; | |
673 | ||
674 | if (REGNO_FIRST_UID (src_regno) == insn_uid) | |
675 | REGNO_FIRST_UID (src_regno) = move_uid; | |
676 | ||
677 | if (REGNO_LAST_UID (src_regno) == insn_uid) | |
678 | REGNO_LAST_UID (src_regno) = move_uid; | |
679 | ||
680 | if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid) | |
681 | REGNO_LAST_NOTE_UID (src_regno) = move_uid; | |
682 | } | |
683 | } | |
684 | ||
685 | \f | |
184bb750 R |
686 | /* Return whether REG is set in only one location, and is set to a |
687 | constant, but is set in a different basic block from INSN (an | |
688 | instructions which uses REG). In this case REG is equivalent to a | |
689 | constant, and we don't want to break that equivalence, because that | |
690 | may increase register pressure and make reload harder. If REG is | |
691 | set in the same basic block as INSN, we don't worry about it, | |
692 | because we'll probably need a register anyhow (??? but what if REG | |
693 | is used in a different basic block as well as this one?). FIRST is | |
694 | the first insn in the function. */ | |
695 | ||
696 | static int | |
697 | reg_is_remote_constant_p (reg, insn, first) | |
698 | rtx reg; | |
699 | rtx insn; | |
700 | rtx first; | |
701 | { | |
702 | register rtx p; | |
703 | ||
704 | if (REG_N_SETS (REGNO (reg)) != 1) | |
705 | return 0; | |
706 | ||
707 | /* Look for the set. */ | |
708 | for (p = LOG_LINKS (insn); p; p = XEXP (p, 1)) | |
709 | { | |
710 | rtx s; | |
711 | ||
712 | if (REG_NOTE_KIND (p) != 0) | |
713 | continue; | |
714 | s = single_set (XEXP (p, 0)); | |
715 | if (s != 0 | |
716 | && GET_CODE (SET_DEST (s)) == REG | |
717 | && REGNO (SET_DEST (s)) == REGNO (reg)) | |
718 | { | |
719 | /* The register is set in the same basic block. */ | |
720 | return 0; | |
721 | } | |
722 | } | |
723 | ||
724 | for (p = first; p && p != insn; p = NEXT_INSN (p)) | |
725 | { | |
726 | rtx s; | |
727 | ||
728 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') | |
729 | continue; | |
730 | s = single_set (p); | |
731 | if (s != 0 | |
732 | && GET_CODE (SET_DEST (s)) == REG | |
733 | && REGNO (SET_DEST (s)) == REGNO (reg)) | |
734 | { | |
735 | /* This is the instruction which sets REG. If there is a | |
736 | REG_EQUAL note, then REG is equivalent to a constant. */ | |
737 | if (find_reg_note (p, REG_EQUAL, NULL_RTX)) | |
738 | return 1; | |
739 | return 0; | |
740 | } | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
b1a7d591 JW |
746 | /* INSN is adding a CONST_INT to a REG. We search backwards looking for |
747 | another add immediate instruction with the same source and dest registers, | |
748 | and if we find one, we change INSN to an increment, and return 1. If | |
749 | no changes are made, we return 0. | |
750 | ||
751 | This changes | |
752 | (set (reg100) (plus reg1 offset1)) | |
753 | ... | |
754 | (set (reg100) (plus reg1 offset2)) | |
755 | to | |
756 | (set (reg100) (plus reg1 offset1)) | |
757 | ... | |
758 | (set (reg100) (plus reg100 offset2-offset1)) */ | |
759 | ||
760 | /* ??? What does this comment mean? */ | |
184bb750 R |
761 | /* cse disrupts preincrement / postdecrement squences when it finds a |
762 | hard register as ultimate source, like the frame pointer. */ | |
b1a7d591 | 763 | |
7bf825d2 JW |
764 | int |
765 | fixup_match_2 (insn, dst, src, offset, regmove_dump_file) | |
184bb750 R |
766 | rtx insn, dst, src, offset; |
767 | FILE *regmove_dump_file; | |
768 | { | |
769 | rtx p, dst_death = 0; | |
770 | int length, num_calls = 0; | |
771 | ||
772 | /* If SRC dies in INSN, we'd have to move the death note. This is | |
773 | considered to be very unlikely, so we just skip the optimization | |
774 | in this case. */ | |
775 | if (find_regno_note (insn, REG_DEAD, REGNO (src))) | |
776 | return 0; | |
777 | ||
778 | /* Scan backward to find the first instruction that sets DST. */ | |
779 | ||
780 | for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
781 | { | |
782 | rtx pset; | |
783 | ||
784 | if (GET_CODE (p) == CODE_LABEL | |
785 | || GET_CODE (p) == JUMP_INSN | |
786 | || (GET_CODE (p) == NOTE | |
787 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
788 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
789 | break; | |
790 | ||
7bf825d2 JW |
791 | /* ??? We can't scan past the end of a basic block without updating |
792 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
793 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
794 | an EH region. There is no easy way to tell, so we just always break | |
795 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
796 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
797 | break; | |
798 | ||
184bb750 R |
799 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
800 | continue; | |
801 | ||
7bf825d2 JW |
802 | if (find_regno_note (p, REG_DEAD, REGNO (dst))) |
803 | dst_death = p; | |
804 | if (! dst_death) | |
805 | length++; | |
184bb750 R |
806 | |
807 | pset = single_set (p); | |
808 | if (pset && SET_DEST (pset) == dst | |
809 | && GET_CODE (SET_SRC (pset)) == PLUS | |
810 | && XEXP (SET_SRC (pset), 0) == src | |
811 | && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT) | |
812 | { | |
813 | HOST_WIDE_INT newconst | |
814 | = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1)); | |
1a29f703 R |
815 | rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst)); |
816 | ||
817 | if (add && validate_change (insn, &PATTERN (insn), add, 0)) | |
184bb750 R |
818 | { |
819 | /* Remove the death note for DST from DST_DEATH. */ | |
820 | if (dst_death) | |
821 | { | |
822 | remove_death (REGNO (dst), dst_death); | |
823 | REG_LIVE_LENGTH (REGNO (dst)) += length; | |
824 | REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls; | |
825 | } | |
826 | ||
827 | REG_N_REFS (REGNO (dst)) += loop_depth; | |
828 | REG_N_REFS (REGNO (src)) -= loop_depth; | |
829 | ||
830 | if (regmove_dump_file) | |
831 | fprintf (regmove_dump_file, | |
832 | "Fixed operand of insn %d.\n", | |
833 | INSN_UID (insn)); | |
834 | ||
835 | #ifdef AUTO_INC_DEC | |
836 | for (p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
837 | { | |
838 | if (GET_CODE (p) == CODE_LABEL | |
839 | || GET_CODE (p) == JUMP_INSN | |
840 | || (GET_CODE (p) == NOTE | |
841 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
842 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
843 | break; | |
e27a5106 JL |
844 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
845 | continue; | |
184bb750 R |
846 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) |
847 | { | |
848 | if (try_auto_increment (p, insn, 0, dst, newconst, 0)) | |
849 | return 1; | |
850 | break; | |
851 | } | |
852 | } | |
853 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
854 | { | |
855 | if (GET_CODE (p) == CODE_LABEL | |
856 | || GET_CODE (p) == JUMP_INSN | |
857 | || (GET_CODE (p) == NOTE | |
858 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
859 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
860 | break; | |
8543c01e R |
861 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
862 | continue; | |
184bb750 R |
863 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) |
864 | { | |
865 | try_auto_increment (p, insn, 0, dst, newconst, 1); | |
866 | break; | |
867 | } | |
868 | } | |
869 | #endif | |
870 | return 1; | |
871 | } | |
8c660648 | 872 | } |
184bb750 R |
873 | |
874 | if (reg_set_p (dst, PATTERN (p))) | |
875 | break; | |
876 | ||
877 | /* If we have passed a call instruction, and the | |
878 | pseudo-reg SRC is not already live across a call, | |
879 | then don't perform the optimization. */ | |
880 | /* reg_set_p is overly conservative for CALL_INSNS, thinks that all | |
881 | hard regs are clobbered. Thus, we only use it for src for | |
882 | non-call insns. */ | |
883 | if (GET_CODE (p) == CALL_INSN) | |
884 | { | |
885 | if (! dst_death) | |
886 | num_calls++; | |
887 | ||
888 | if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) | |
889 | break; | |
890 | ||
891 | if (call_used_regs [REGNO (dst)] | |
892 | || find_reg_fusage (p, CLOBBER, dst)) | |
893 | break; | |
894 | } | |
895 | else if (reg_set_p (src, PATTERN (p))) | |
896 | break; | |
8c660648 | 897 | } |
184bb750 | 898 | |
8c660648 JL |
899 | return 0; |
900 | } | |
8c660648 JL |
901 | |
902 | void | |
903 | regmove_optimize (f, nregs, regmove_dump_file) | |
904 | rtx f; | |
905 | int nregs; | |
906 | FILE *regmove_dump_file; | |
907 | { | |
8c660648 | 908 | rtx insn; |
184bb750 | 909 | struct match match; |
8c660648 | 910 | int pass; |
3bb806ed | 911 | int i; |
ddc8bed2 | 912 | rtx copy_src, copy_dst; |
184bb750 | 913 | |
3bb806ed R |
914 | regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs); |
915 | for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1; | |
8c660648 | 916 | |
ddc8bed2 | 917 | regmove_bb_head = (int *)alloca (sizeof (int) * (get_max_uid () + 1)); |
9616dd8d | 918 | for (i = get_max_uid (); i >= 0; i--) regmove_bb_head[i] = -1; |
ddc8bed2 MM |
919 | for (i = 0; i < n_basic_blocks; i++) |
920 | regmove_bb_head[INSN_UID (basic_block_head[i])] = i; | |
921 | ||
8c660648 JL |
922 | /* A forward/backward pass. Replace output operands with input operands. */ |
923 | ||
184bb750 R |
924 | loop_depth = 1; |
925 | ||
926 | for (pass = 0; pass <= 2; pass++) | |
8c660648 | 927 | { |
184bb750 R |
928 | if (! flag_regmove && pass >= flag_expensive_optimizations) |
929 | return; | |
930 | ||
8c660648 JL |
931 | if (regmove_dump_file) |
932 | fprintf (regmove_dump_file, "Starting %s pass...\n", | |
933 | pass ? "backward" : "forward"); | |
934 | ||
935 | for (insn = pass ? get_last_insn () : f; insn; | |
936 | insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn)) | |
937 | { | |
184bb750 R |
938 | rtx set; |
939 | int insn_code_number; | |
940 | int operand_number, match_number; | |
941 | ||
942 | if (GET_CODE (insn) == NOTE) | |
8c660648 | 943 | { |
184bb750 R |
944 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) |
945 | loop_depth++; | |
946 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
947 | loop_depth--; | |
948 | } | |
8c660648 | 949 | |
184bb750 R |
950 | set = single_set (insn); |
951 | if (! set) | |
952 | continue; | |
8c660648 | 953 | |
184bb750 R |
954 | if (flag_expensive_optimizations && ! pass |
955 | && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND | |
956 | || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) | |
957 | && GET_CODE (XEXP (SET_SRC (set), 0)) == REG | |
958 | && GET_CODE (SET_DEST(set)) == REG) | |
959 | optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); | |
960 | ||
961 | if (flag_expensive_optimizations && ! pass | |
962 | && GET_CODE (SET_SRC (set)) == REG | |
963 | && GET_CODE (SET_DEST(set)) == REG) | |
964 | { | |
965 | /* If this is a register-register copy where SRC is not dead, | |
966 | see if we can optimize it. If this optimization succeeds, | |
967 | it will become a copy where SRC is dead. */ | |
968 | if ((find_reg_note (insn, REG_DEAD, SET_SRC (set)) | |
969 | || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set))) | |
970 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) | |
8c660648 | 971 | { |
184bb750 R |
972 | /* Similarly for a pseudo-pseudo copy when SRC is dead. */ |
973 | if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) | |
974 | optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set)); | |
975 | if (regno_src_regno[REGNO (SET_DEST (set))] < 0 | |
976 | && SET_SRC (set) != SET_DEST (set)) | |
8c660648 | 977 | { |
184bb750 R |
978 | int srcregno = REGNO (SET_SRC(set)); |
979 | if (regno_src_regno[srcregno] >= 0) | |
980 | srcregno = regno_src_regno[srcregno]; | |
981 | regno_src_regno[REGNO (SET_DEST (set))] = srcregno; | |
8c660648 JL |
982 | } |
983 | } | |
184bb750 R |
984 | } |
985 | #ifdef REGISTER_CONSTRAINTS | |
986 | insn_code_number | |
987 | = find_matches (insn, &match); | |
988 | ||
989 | if (insn_code_number < 0) | |
990 | continue; | |
991 | ||
992 | /* Now scan through the operands looking for a source operand | |
993 | which is supposed to match the destination operand. | |
994 | Then scan forward for an instruction which uses the dest | |
995 | operand. | |
996 | If it dies there, then replace the dest in both operands with | |
997 | the source operand. */ | |
998 | ||
999 | for (operand_number = 0; | |
1000 | operand_number < insn_n_operands[insn_code_number]; | |
1001 | operand_number++) | |
1002 | { | |
5e9defae | 1003 | rtx src, dst, src_subreg; |
184bb750 R |
1004 | enum reg_class src_class, dst_class; |
1005 | ||
1006 | match_number = match.with[operand_number]; | |
1007 | ||
1008 | /* Nothing to do if the two operands aren't supposed to match. */ | |
1009 | if (match_number < 0) | |
1010 | continue; | |
1011 | ||
1012 | src = recog_operand[operand_number]; | |
1013 | dst = recog_operand[match_number]; | |
1014 | ||
1015 | if (GET_CODE (src) != REG) | |
1016 | continue; | |
1017 | ||
1018 | src_subreg = src; | |
1019 | if (GET_CODE (dst) == SUBREG | |
1020 | && GET_MODE_SIZE (GET_MODE (dst)) | |
1021 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst)))) | |
1022 | { | |
1023 | src_subreg | |
38a448ca RH |
1024 | = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)), |
1025 | src, SUBREG_WORD (dst)); | |
184bb750 R |
1026 | dst = SUBREG_REG (dst); |
1027 | } | |
1028 | if (GET_CODE (dst) != REG | |
1029 | || REGNO (dst) < FIRST_PSEUDO_REGISTER) | |
1030 | continue; | |
1031 | ||
1032 | if (REGNO (src) < FIRST_PSEUDO_REGISTER) | |
1033 | { | |
1034 | if (match.commutative[operand_number] < operand_number) | |
1035 | regno_src_regno[REGNO (dst)] = REGNO (src); | |
1036 | continue; | |
1037 | } | |
1038 | ||
1039 | if (REG_LIVE_LENGTH (REGNO (src)) < 0) | |
1040 | continue; | |
1041 | ||
1042 | /* operand_number/src must be a read-only operand, and | |
1043 | match_operand/dst must be a write-only operand. */ | |
1044 | if (match.use[operand_number] != READ | |
1045 | || match.use[match_number] != WRITE) | |
1046 | continue; | |
1047 | ||
1048 | if (match.early_clobber[match_number] | |
1049 | && count_occurrences (PATTERN (insn), src) > 1) | |
1050 | continue; | |
1051 | ||
1052 | /* Make sure match_operand is the destination. */ | |
1053 | if (recog_operand[match_number] != SET_DEST (set)) | |
1054 | continue; | |
1055 | ||
1056 | /* If the operands already match, then there is nothing to do. */ | |
1057 | /* But in the commutative case, we might find a better match. */ | |
1058 | if (operands_match_p (src, dst) | |
1059 | || (match.commutative[operand_number] >= 0 | |
1060 | && operands_match_p (recog_operand[match.commutative | |
1061 | [operand_number]], dst) | |
1062 | && (replacement_quality (recog_operand[match.commutative | |
1063 | [operand_number]]) | |
1064 | >= replacement_quality (src)))) | |
1065 | continue; | |
1066 | ||
1067 | src_class = reg_preferred_class (REGNO (src)); | |
1068 | dst_class = reg_preferred_class (REGNO (dst)); | |
3bb806ed | 1069 | if (! regclass_compatible_p (src_class, dst_class)) |
184bb750 R |
1070 | continue; |
1071 | ||
1072 | if (fixup_match_1 (insn, set, src, src_subreg, dst, pass, | |
1073 | operand_number, match_number, | |
1074 | regmove_dump_file)) | |
1075 | break; | |
8c660648 JL |
1076 | } |
1077 | } | |
1078 | } | |
1079 | ||
1080 | /* A backward pass. Replace input operands with output operands. */ | |
1081 | ||
1082 | if (regmove_dump_file) | |
1083 | fprintf (regmove_dump_file, "Starting backward pass...\n"); | |
1084 | ||
184bb750 R |
1085 | loop_depth = 1; |
1086 | ||
8c660648 JL |
1087 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) |
1088 | { | |
184bb750 R |
1089 | if (GET_CODE (insn) == NOTE) |
1090 | { | |
1091 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
1092 | loop_depth++; | |
1093 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1094 | loop_depth--; | |
1095 | } | |
8c660648 JL |
1096 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
1097 | { | |
184bb750 | 1098 | int insn_code_number = find_matches (insn, &match); |
8c660648 | 1099 | int operand_number, match_number; |
ddc8bed2 | 1100 | int success = 0; |
8c660648 JL |
1101 | |
1102 | if (insn_code_number < 0) | |
1103 | continue; | |
1104 | ||
8c660648 JL |
1105 | /* Now scan through the operands looking for a destination operand |
1106 | which is supposed to match a source operand. | |
1107 | Then scan backward for an instruction which sets the source | |
1108 | operand. If safe, then replace the source operand with the | |
1109 | dest operand in both instructions. */ | |
1110 | ||
ddc8bed2 MM |
1111 | copy_src = NULL_RTX; |
1112 | copy_dst = NULL_RTX; | |
8c660648 JL |
1113 | for (operand_number = 0; |
1114 | operand_number < insn_n_operands[insn_code_number]; | |
1115 | operand_number++) | |
1116 | { | |
184bb750 R |
1117 | rtx set, p, src, dst; |
1118 | rtx src_note, dst_note; | |
184bb750 R |
1119 | int num_calls = 0; |
1120 | enum reg_class src_class, dst_class; | |
1121 | int length; | |
8c660648 | 1122 | |
184bb750 | 1123 | match_number = match.with[operand_number]; |
8c660648 | 1124 | |
184bb750 R |
1125 | /* Nothing to do if the two operands aren't supposed to match. */ |
1126 | if (match_number < 0) | |
1127 | continue; | |
8c660648 | 1128 | |
184bb750 R |
1129 | dst = recog_operand[match_number]; |
1130 | src = recog_operand[operand_number]; | |
8c660648 | 1131 | |
184bb750 R |
1132 | if (GET_CODE (src) != REG) |
1133 | continue; | |
8c660648 | 1134 | |
184bb750 R |
1135 | if (GET_CODE (dst) != REG |
1136 | || REGNO (dst) < FIRST_PSEUDO_REGISTER | |
1137 | || REG_LIVE_LENGTH (REGNO (dst)) < 0) | |
1138 | continue; | |
8c660648 | 1139 | |
184bb750 R |
1140 | /* If the operands already match, then there is nothing to do. */ |
1141 | if (operands_match_p (src, dst) | |
1142 | || (match.commutative[operand_number] >= 0 | |
1143 | && operands_match_p (recog_operand[match.commutative[operand_number]], dst))) | |
1144 | continue; | |
8c660648 | 1145 | |
184bb750 R |
1146 | set = single_set (insn); |
1147 | if (! set) | |
1148 | continue; | |
8c660648 | 1149 | |
184bb750 R |
1150 | /* match_number/dst must be a write-only operand, and |
1151 | operand_operand/src must be a read-only operand. */ | |
1152 | if (match.use[operand_number] != READ | |
1153 | || match.use[match_number] != WRITE) | |
1154 | continue; | |
8c660648 | 1155 | |
184bb750 R |
1156 | if (match.early_clobber[match_number] |
1157 | && count_occurrences (PATTERN (insn), src) > 1) | |
1158 | continue; | |
8c660648 | 1159 | |
184bb750 R |
1160 | /* Make sure match_number is the destination. */ |
1161 | if (recog_operand[match_number] != SET_DEST (set)) | |
1162 | continue; | |
8c660648 | 1163 | |
184bb750 R |
1164 | if (REGNO (src) < FIRST_PSEUDO_REGISTER) |
1165 | { | |
1166 | if (GET_CODE (SET_SRC (set)) == PLUS | |
1167 | && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT | |
1168 | && XEXP (SET_SRC (set), 0) == src | |
1169 | && fixup_match_2 (insn, dst, src, | |
1170 | XEXP (SET_SRC (set), 1), | |
1171 | regmove_dump_file)) | |
1172 | break; | |
1173 | continue; | |
1174 | } | |
1175 | src_class = reg_preferred_class (REGNO (src)); | |
1176 | dst_class = reg_preferred_class (REGNO (dst)); | |
3bb806ed | 1177 | if (! regclass_compatible_p (src_class, dst_class)) |
ddc8bed2 MM |
1178 | { |
1179 | if (!copy_src) | |
1180 | { | |
1181 | copy_src = src; | |
1182 | copy_dst = dst; | |
1183 | } | |
1184 | continue; | |
1185 | } | |
8c660648 | 1186 | |
184bb750 R |
1187 | /* Can not modify an earlier insn to set dst if this insn |
1188 | uses an old value in the source. */ | |
1189 | if (reg_overlap_mentioned_p (dst, SET_SRC (set))) | |
ddc8bed2 MM |
1190 | { |
1191 | if (!copy_src) | |
1192 | { | |
1193 | copy_src = src; | |
1194 | copy_dst = dst; | |
1195 | } | |
1196 | continue; | |
1197 | } | |
1198 | ||
1199 | if (! (src_note = find_reg_note (insn, REG_DEAD, src))) | |
1200 | { | |
1201 | if (!copy_src) | |
1202 | { | |
1203 | copy_src = src; | |
1204 | copy_dst = dst; | |
1205 | } | |
1206 | continue; | |
1207 | } | |
8c660648 | 1208 | |
8c660648 | 1209 | |
184bb750 R |
1210 | /* If src is set once in a different basic block, |
1211 | and is set equal to a constant, then do not use | |
1212 | it for this optimization, as this would make it | |
1213 | no longer equivalent to a constant. */ | |
ddc8bed2 MM |
1214 | |
1215 | if (reg_is_remote_constant_p (src, insn, f)) | |
1216 | { | |
1217 | if (!copy_src) | |
1218 | { | |
1219 | copy_src = src; | |
1220 | copy_dst = dst; | |
1221 | } | |
1222 | continue; | |
1223 | } | |
1224 | ||
1225 | ||
1226 | if (regmove_dump_file) | |
1227 | fprintf (regmove_dump_file, | |
1228 | "Could fix operand %d of insn %d matching operand %d.\n", | |
1229 | operand_number, INSN_UID (insn), match_number); | |
8c660648 | 1230 | |
184bb750 R |
1231 | /* Scan backward to find the first instruction that uses |
1232 | the input operand. If the operand is set here, then | |
1233 | replace it in both instructions with match_number. */ | |
1234 | ||
1235 | for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
1236 | { | |
1237 | rtx pset; | |
1238 | ||
1239 | if (GET_CODE (p) == CODE_LABEL | |
1240 | || GET_CODE (p) == JUMP_INSN | |
1241 | || (GET_CODE (p) == NOTE | |
1242 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
1243 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
1244 | break; | |
1245 | ||
7bf825d2 JW |
1246 | /* ??? We can't scan past the end of a basic block without |
1247 | updating the register lifetime info | |
1248 | (REG_DEAD/basic_block_live_at_start). | |
1249 | A CALL_INSN might be the last insn of a basic block, if | |
1250 | it is inside an EH region. There is no easy way to tell, | |
1251 | so we just always break when we see a CALL_INSN if | |
1252 | flag_exceptions is nonzero. */ | |
1253 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
1254 | break; | |
1255 | ||
184bb750 R |
1256 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
1257 | continue; | |
8c660648 | 1258 | |
184bb750 | 1259 | length++; |
8c660648 | 1260 | |
184bb750 R |
1261 | /* ??? See if all of SRC is set in P. This test is much |
1262 | more conservative than it needs to be. */ | |
1263 | pset = single_set (p); | |
1264 | if (pset && SET_DEST (pset) == src) | |
1265 | { | |
1266 | /* We use validate_replace_rtx, in case there | |
1267 | are multiple identical source operands. All of | |
1268 | them have to be changed at the same time. */ | |
1269 | if (validate_replace_rtx (src, dst, insn)) | |
8c660648 | 1270 | { |
184bb750 R |
1271 | if (validate_change (p, &SET_DEST (pset), |
1272 | dst, 0)) | |
1273 | success = 1; | |
1274 | else | |
8c660648 | 1275 | { |
184bb750 R |
1276 | /* Change all source operands back. |
1277 | This modifies the dst as a side-effect. */ | |
1278 | validate_replace_rtx (dst, src, insn); | |
1279 | /* Now make sure the dst is right. */ | |
1280 | validate_change (insn, | |
1281 | recog_operand_loc[match_number], | |
1282 | dst, 0); | |
8c660648 | 1283 | } |
8c660648 | 1284 | } |
184bb750 R |
1285 | break; |
1286 | } | |
1287 | ||
1288 | if (reg_overlap_mentioned_p (src, PATTERN (p)) | |
1289 | || reg_overlap_mentioned_p (dst, PATTERN (p))) | |
1290 | break; | |
8c660648 | 1291 | |
184bb750 R |
1292 | /* If we have passed a call instruction, and the |
1293 | pseudo-reg DST is not already live across a call, | |
1294 | then don't perform the optimization. */ | |
1295 | if (GET_CODE (p) == CALL_INSN) | |
1296 | { | |
1297 | num_calls++; | |
1298 | ||
1299 | if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0) | |
8c660648 | 1300 | break; |
184bb750 R |
1301 | } |
1302 | } | |
8c660648 | 1303 | |
184bb750 R |
1304 | if (success) |
1305 | { | |
1306 | int dstno, srcno; | |
8c660648 | 1307 | |
184bb750 R |
1308 | /* Remove the death note for SRC from INSN. */ |
1309 | remove_note (insn, src_note); | |
1310 | /* Move the death note for SRC to P if it is used | |
1311 | there. */ | |
1312 | if (reg_overlap_mentioned_p (src, PATTERN (p))) | |
1313 | { | |
1314 | XEXP (src_note, 1) = REG_NOTES (p); | |
1315 | REG_NOTES (p) = src_note; | |
8c660648 | 1316 | } |
184bb750 R |
1317 | /* If there is a REG_DEAD note for DST on P, then remove |
1318 | it, because DST is now set there. */ | |
5e9defae | 1319 | if ((dst_note = find_reg_note (p, REG_DEAD, dst))) |
184bb750 R |
1320 | remove_note (p, dst_note); |
1321 | ||
1322 | dstno = REGNO (dst); | |
1323 | srcno = REGNO (src); | |
1324 | ||
1325 | REG_N_SETS (dstno)++; | |
1326 | REG_N_SETS (srcno)--; | |
8c660648 | 1327 | |
184bb750 R |
1328 | REG_N_CALLS_CROSSED (dstno) += num_calls; |
1329 | REG_N_CALLS_CROSSED (srcno) -= num_calls; | |
1330 | ||
1331 | REG_LIVE_LENGTH (dstno) += length; | |
1332 | if (REG_LIVE_LENGTH (srcno) >= 0) | |
8c660648 | 1333 | { |
184bb750 R |
1334 | REG_LIVE_LENGTH (srcno) -= length; |
1335 | /* REG_LIVE_LENGTH is only an approximation after | |
1336 | combine if sched is not run, so make sure that we | |
1337 | still have a reasonable value. */ | |
1338 | if (REG_LIVE_LENGTH (srcno) < 2) | |
1339 | REG_LIVE_LENGTH (srcno) = 2; | |
1340 | } | |
8c660648 | 1341 | |
184bb750 R |
1342 | /* We assume that a register is used exactly once per |
1343 | insn in the updates above. If this is not correct, | |
1344 | no great harm is done. */ | |
8c660648 | 1345 | |
184bb750 R |
1346 | REG_N_REFS (dstno) += 2 * loop_depth; |
1347 | REG_N_REFS (srcno) -= 2 * loop_depth; | |
8c660648 | 1348 | |
184bb750 R |
1349 | /* If that was the only time src was set, |
1350 | and src was not live at the start of the | |
1351 | function, we know that we have no more | |
1352 | references to src; clear REG_N_REFS so it | |
1353 | won't make reload do any work. */ | |
1354 | if (REG_N_SETS (REGNO (src)) == 0 | |
1355 | && ! regno_uninitialized (REGNO (src))) | |
1356 | REG_N_REFS (REGNO (src)) = 0; | |
8c660648 | 1357 | |
184bb750 R |
1358 | if (regmove_dump_file) |
1359 | fprintf (regmove_dump_file, | |
1360 | "Fixed operand %d of insn %d matching operand %d.\n", | |
1361 | operand_number, INSN_UID (insn), match_number); | |
8c660648 | 1362 | |
184bb750 | 1363 | break; |
8c660648 JL |
1364 | } |
1365 | } | |
ddc8bed2 MM |
1366 | |
1367 | /* If we weren't able to replace any of the alternatives, try an | |
1368 | alternative appoach of copying the source to the destination. */ | |
1369 | if (!success && copy_src != NULL_RTX) | |
1370 | copy_src_to_dest (insn, copy_src, copy_dst, loop_depth); | |
1371 | ||
8c660648 JL |
1372 | } |
1373 | } | |
1374 | #endif /* REGISTER_CONSTRAINTS */ | |
1375 | } | |
1376 | ||
b1a7d591 JW |
1377 | /* Returns the INSN_CODE for INSN if its pattern has matching constraints for |
1378 | any operand. Returns -1 if INSN can't be recognized, or if the alternative | |
1379 | can't be determined. | |
1380 | ||
1381 | Initialize the info in MATCHP based on the constraints. */ | |
184bb750 R |
1382 | |
1383 | static int | |
1384 | find_matches (insn, matchp) | |
1385 | rtx insn; | |
1386 | struct match *matchp; | |
1387 | { | |
1388 | int likely_spilled[MAX_RECOG_OPERANDS]; | |
1389 | int operand_number; | |
1390 | int insn_code_number = recog_memoized (insn); | |
1391 | int any_matches = 0; | |
1392 | ||
1393 | if (insn_code_number < 0) | |
1394 | return -1; | |
1395 | ||
1396 | insn_extract (insn); | |
1397 | if (! constrain_operands (insn_code_number, 0)) | |
1398 | return -1; | |
1399 | ||
1400 | /* Must initialize this before main loop, because the code for | |
1401 | the commutative case may set matches for operands other than | |
1402 | the current one. */ | |
1403 | for (operand_number = insn_n_operands[insn_code_number]; | |
1404 | --operand_number >= 0; ) | |
1405 | matchp->with[operand_number] = matchp->commutative[operand_number] = -1; | |
1406 | ||
1407 | for (operand_number = 0; operand_number < insn_n_operands[insn_code_number]; | |
1408 | operand_number++) | |
1409 | { | |
184bb750 R |
1410 | char *p, c; |
1411 | int i = 0; | |
1412 | ||
1413 | p = insn_operand_constraint[insn_code_number][operand_number]; | |
1414 | ||
1415 | likely_spilled[operand_number] = 0; | |
1416 | matchp->use[operand_number] = READ; | |
c485e6a0 | 1417 | matchp->early_clobber[operand_number] = 0; |
184bb750 R |
1418 | if (*p == '=') |
1419 | matchp->use[operand_number] = WRITE; | |
1420 | else if (*p == '+') | |
1421 | matchp->use[operand_number] = READWRITE; | |
1422 | ||
1423 | for (;*p && i < which_alternative; p++) | |
1424 | if (*p == ',') | |
1425 | i++; | |
1426 | ||
1427 | while ((c = *p++) != '\0' && c != ',') | |
1428 | switch (c) | |
1429 | { | |
1430 | case '=': | |
1431 | break; | |
1432 | case '+': | |
1433 | break; | |
1434 | case '&': | |
1435 | matchp->early_clobber[operand_number] = 1; | |
1436 | break; | |
1437 | case '%': | |
1438 | matchp->commutative[operand_number] = operand_number + 1; | |
1439 | matchp->commutative[operand_number + 1] = operand_number; | |
1440 | break; | |
1441 | case '0': case '1': case '2': case '3': case '4': | |
1442 | case '5': case '6': case '7': case '8': case '9': | |
1443 | c -= '0'; | |
27d7e05d | 1444 | if (c < operand_number && likely_spilled[(unsigned char) c]) |
184bb750 R |
1445 | break; |
1446 | matchp->with[operand_number] = c; | |
1447 | any_matches = 1; | |
1448 | if (matchp->commutative[operand_number] >= 0) | |
1449 | matchp->with[matchp->commutative[operand_number]] = c; | |
1450 | break; | |
1451 | case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h': | |
1452 | case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u': | |
1453 | case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B': | |
1454 | case 'C': case 'D': case 'W': case 'Y': case 'Z': | |
1455 | if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c))) | |
1456 | likely_spilled[operand_number] = 1; | |
1457 | break; | |
1458 | } | |
1459 | } | |
1460 | return any_matches ? insn_code_number : -1; | |
1461 | } | |
1462 | ||
1463 | /* Try to replace output operand DST in SET, with input operand SRC. SET is | |
1464 | the only set in INSN. INSN has just been recgnized and constrained. | |
1465 | SRC is operand number OPERAND_NUMBER in INSN. | |
1466 | DST is operand number MATCH_NUMBER in INSN. | |
1467 | If BACKWARD is nonzero, we have been called in a backward pass. | |
1468 | Return nonzero for success. */ | |
1469 | static int | |
1470 | fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, | |
1471 | match_number, regmove_dump_file) | |
1472 | rtx insn, set, src, src_subreg, dst; | |
1473 | int backward, operand_number, match_number; | |
1474 | FILE *regmove_dump_file; | |
1475 | { | |
1476 | rtx p; | |
1477 | rtx post_inc = 0, post_inc_set = 0, search_end = 0; | |
1478 | int success = 0; | |
1479 | int num_calls = 0, s_num_calls = 0; | |
1480 | enum rtx_code code = NOTE; | |
1481 | HOST_WIDE_INT insn_const, newconst; | |
1482 | rtx overlap = 0; /* need to move insn ? */ | |
1483 | rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note; | |
1484 | int length, s_length, true_loop_depth; | |
1485 | ||
1486 | if (! src_note) | |
1487 | { | |
1488 | /* Look for (set (regX) (op regA constX)) | |
1489 | (set (regY) (op regA constY)) | |
1490 | and change that to | |
1491 | (set (regA) (op regA constX)). | |
1492 | (set (regY) (op regA constY-constX)). | |
1493 | This works for add and shift operations, if | |
1494 | regA is dead after or set by the second insn. */ | |
1495 | ||
1496 | code = GET_CODE (SET_SRC (set)); | |
1497 | if ((code == PLUS || code == LSHIFTRT | |
1498 | || code == ASHIFT || code == ASHIFTRT) | |
1499 | && XEXP (SET_SRC (set), 0) == src | |
1500 | && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT) | |
1501 | insn_const = INTVAL (XEXP (SET_SRC (set), 1)); | |
1502 | else if (! stable_but_for_p (SET_SRC (set), src, dst)) | |
1503 | return 0; | |
1504 | else | |
1505 | /* We might find a src_note while scanning. */ | |
1506 | code = NOTE; | |
1507 | } | |
1508 | ||
1509 | if (regmove_dump_file) | |
1510 | fprintf (regmove_dump_file, | |
1511 | "Could fix operand %d of insn %d matching operand %d.\n", | |
1512 | operand_number, INSN_UID (insn), match_number); | |
1513 | ||
1514 | /* If SRC is equivalent to a constant set in a different basic block, | |
1515 | then do not use it for this optimization. We want the equivalence | |
1516 | so that if we have to reload this register, we can reload the | |
1517 | constant, rather than extending the lifespan of the register. */ | |
1518 | if (reg_is_remote_constant_p (src, insn, get_insns ())) | |
1519 | return 0; | |
1520 | ||
1521 | /* Scan forward to find the next instruction that | |
1522 | uses the output operand. If the operand dies here, | |
1523 | then replace it in both instructions with | |
1524 | operand_number. */ | |
1525 | ||
1526 | for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
1527 | { | |
1528 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
1529 | || (GET_CODE (p) == NOTE | |
1530 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
1531 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
1532 | break; | |
1533 | ||
7bf825d2 JW |
1534 | /* ??? We can't scan past the end of a basic block without updating |
1535 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
1536 | A CALL_INSN might be the last insn of a basic block, if it is | |
1537 | inside an EH region. There is no easy way to tell, so we just | |
1538 | always break when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
1539 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
1540 | break; | |
1541 | ||
184bb750 R |
1542 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
1543 | continue; | |
1544 | ||
1545 | length++; | |
1546 | if (src_note) | |
1547 | s_length++; | |
1548 | ||
1549 | if (reg_set_p (src, p) || reg_set_p (dst, p) | |
1550 | || (GET_CODE (PATTERN (p)) == USE | |
1551 | && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) | |
1552 | break; | |
1553 | ||
1554 | /* See if all of DST dies in P. This test is | |
1555 | slightly more conservative than it needs to be. */ | |
1556 | if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst))) | |
1557 | && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst))) | |
1558 | { | |
1559 | if (! src_note) | |
1560 | { | |
1561 | rtx q; | |
1562 | rtx set2; | |
1563 | ||
1564 | /* If an optimization is done, the value of SRC while P | |
1565 | is executed will be changed. Check that this is OK. */ | |
1566 | if (reg_overlap_mentioned_p (src, PATTERN (p))) | |
1567 | break; | |
1568 | for (q = p; q; q = NEXT_INSN (q)) | |
1569 | { | |
1570 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN | |
1571 | || (GET_CODE (q) == NOTE | |
1572 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1573 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
1574 | { | |
1575 | q = 0; | |
1576 | break; | |
1577 | } | |
7bf825d2 JW |
1578 | |
1579 | /* ??? We can't scan past the end of a basic block without | |
1580 | updating the register lifetime info | |
1581 | (REG_DEAD/basic_block_live_at_start). | |
1582 | A CALL_INSN might be the last insn of a basic block, if | |
1583 | it is inside an EH region. There is no easy way to tell, | |
1584 | so we just always break when we see a CALL_INSN if | |
1585 | flag_exceptions is nonzero. */ | |
a1ecb5ca | 1586 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1587 | { |
1588 | q = 0; | |
1589 | break; | |
1590 | } | |
1591 | ||
184bb750 R |
1592 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1593 | continue; | |
1594 | if (reg_overlap_mentioned_p (src, PATTERN (q)) | |
1595 | || reg_set_p (src, q)) | |
1596 | break; | |
1597 | } | |
1598 | if (q) | |
1599 | set2 = single_set (q); | |
1600 | if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code | |
1601 | || XEXP (SET_SRC (set2), 0) != src | |
1602 | || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT | |
1603 | || (SET_DEST (set2) != src | |
1604 | && ! find_reg_note (q, REG_DEAD, src))) | |
1605 | { | |
1606 | /* If this is a PLUS, we can still save a register by doing | |
1607 | src += insn_const; | |
1608 | P; | |
1609 | src -= insn_const; . | |
1610 | This also gives opportunities for subsequent | |
1611 | optimizations in the backward pass, so do it there. */ | |
1612 | if (code == PLUS && backward | |
3bb806ed R |
1613 | /* Don't do this if we can likely tie DST to SET_DEST |
1614 | of P later; we can't do this tying here if we got a | |
1615 | hard register. */ | |
1616 | && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst)) | |
1617 | && single_set (p) | |
1618 | && GET_CODE (SET_DEST (single_set (p))) == REG | |
1619 | && (REGNO (SET_DEST (single_set (p))) | |
1620 | < FIRST_PSEUDO_REGISTER)) | |
184bb750 R |
1621 | #ifdef HAVE_cc0 |
1622 | /* We may not emit an insn directly | |
1623 | after P if the latter sets CC0. */ | |
1624 | && ! sets_cc0_p (PATTERN (p)) | |
1625 | #endif | |
1626 | ) | |
1627 | ||
1628 | { | |
1629 | search_end = q; | |
1630 | q = insn; | |
1631 | set2 = set; | |
1632 | newconst = -insn_const; | |
1633 | code = MINUS; | |
1634 | } | |
1635 | else | |
1636 | break; | |
1637 | } | |
1638 | else | |
1639 | { | |
1640 | newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const; | |
1641 | /* Reject out of range shifts. */ | |
1642 | if (code != PLUS | |
1643 | && (newconst < 0 | |
1644 | || (newconst | |
1645 | >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2)))))) | |
1646 | break; | |
1647 | if (code == PLUS) | |
1648 | { | |
1649 | post_inc = q; | |
1650 | if (SET_DEST (set2) != src) | |
1651 | post_inc_set = set2; | |
1652 | } | |
1653 | } | |
1654 | /* We use 1 as last argument to validate_change so that all | |
1655 | changes are accepted or rejected together by apply_change_group | |
1656 | when it is called by validate_replace_rtx . */ | |
1657 | validate_change (q, &XEXP (SET_SRC (set2), 1), | |
1658 | GEN_INT (newconst), 1); | |
1659 | } | |
1660 | validate_change (insn, recog_operand_loc[match_number], src, 1); | |
1661 | if (validate_replace_rtx (dst, src_subreg, p)) | |
1662 | success = 1; | |
1663 | break; | |
1664 | } | |
1665 | ||
1666 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) | |
1667 | break; | |
1668 | if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p))) | |
1669 | { | |
1670 | /* INSN was already checked to be movable when | |
1671 | we found no REG_DEAD note for src on it. */ | |
1672 | overlap = p; | |
1673 | src_note = find_reg_note (p, REG_DEAD, src); | |
1674 | } | |
1675 | ||
1676 | /* If we have passed a call instruction, and the pseudo-reg SRC is not | |
1677 | already live across a call, then don't perform the optimization. */ | |
1678 | if (GET_CODE (p) == CALL_INSN) | |
1679 | { | |
1680 | if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) | |
1681 | break; | |
1682 | ||
1683 | num_calls++; | |
1684 | ||
1685 | if (src_note) | |
1686 | s_num_calls++; | |
1687 | ||
1688 | } | |
1689 | } | |
1690 | ||
1691 | if (! success) | |
1692 | return 0; | |
1693 | ||
1694 | true_loop_depth = backward ? 2 - loop_depth : loop_depth; | |
1695 | ||
1696 | /* Remove the death note for DST from P. */ | |
1697 | remove_note (p, dst_note); | |
1698 | if (code == MINUS) | |
1699 | { | |
1700 | post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p); | |
1701 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) | |
1702 | if (search_end | |
1703 | && try_auto_increment (search_end, post_inc, 0, src, newconst, 1)) | |
1704 | post_inc = 0; | |
1705 | #endif | |
1706 | validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0); | |
1707 | REG_N_SETS (REGNO (src))++; | |
1708 | REG_N_REFS (REGNO (src)) += true_loop_depth; | |
1709 | REG_LIVE_LENGTH (REGNO (src))++; | |
1710 | } | |
1711 | if (overlap) | |
1712 | { | |
1713 | /* The lifetime of src and dest overlap, | |
1714 | but we can change this by moving insn. */ | |
1715 | rtx pat = PATTERN (insn); | |
1716 | if (src_note) | |
1717 | remove_note (overlap, src_note); | |
1718 | #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) | |
1719 | if (code == PLUS | |
1720 | && try_auto_increment (overlap, insn, 0, src, insn_const, 0)) | |
1721 | insn = overlap; | |
1722 | else | |
1723 | #endif | |
1724 | { | |
1725 | rtx notes = REG_NOTES (insn); | |
1726 | ||
1727 | emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn); | |
1728 | PUT_CODE (insn, NOTE); | |
1729 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1730 | NOTE_SOURCE_FILE (insn) = 0; | |
1731 | /* emit_insn_after_with_line_notes has no | |
1732 | return value, so search for the new insn. */ | |
1733 | for (insn = p; PATTERN (insn) != pat; ) | |
1734 | insn = PREV_INSN (insn); | |
1735 | ||
1736 | REG_NOTES (insn) = notes; | |
1737 | } | |
1738 | } | |
1739 | /* Sometimes we'd generate src = const; src += n; | |
1740 | if so, replace the instruction that set src | |
1741 | in the first place. */ | |
1742 | ||
1743 | if (! overlap && (code == PLUS || code == MINUS)) | |
1744 | { | |
1745 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
1746 | rtx q, set2; | |
1747 | int num_calls2 = 0, s_length2 = 0; | |
1748 | ||
1749 | if (note && CONSTANT_P (XEXP (note, 0))) | |
1750 | { | |
1751 | for (q = PREV_INSN (insn); q; q = PREV_INSN(q)) | |
1752 | { | |
7bf825d2 JW |
1753 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN |
1754 | || (GET_CODE (q) == NOTE | |
1755 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1756 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
184bb750 R |
1757 | { |
1758 | q = 0; | |
1759 | break; | |
1760 | } | |
7bf825d2 JW |
1761 | |
1762 | /* ??? We can't scan past the end of a basic block without | |
1763 | updating the register lifetime info | |
1764 | (REG_DEAD/basic_block_live_at_start). | |
1765 | A CALL_INSN might be the last insn of a basic block, if | |
1766 | it is inside an EH region. There is no easy way to tell, | |
1767 | so we just always break when we see a CALL_INSN if | |
1768 | flag_exceptions is nonzero. */ | |
a1ecb5ca | 1769 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1770 | { |
1771 | q = 0; | |
1772 | break; | |
1773 | } | |
1774 | ||
184bb750 R |
1775 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1776 | continue; | |
1777 | s_length2++; | |
1778 | if (reg_set_p (src, q)) | |
1779 | { | |
1780 | set2 = single_set (q); | |
1781 | break; | |
1782 | } | |
1783 | if (reg_overlap_mentioned_p (src, PATTERN (q))) | |
1784 | { | |
1785 | q = 0; | |
1786 | break; | |
1787 | } | |
1788 | if (GET_CODE (p) == CALL_INSN) | |
1789 | num_calls2++; | |
1790 | } | |
1791 | if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2)) | |
1792 | && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0)) | |
1793 | { | |
1794 | PUT_CODE (q, NOTE); | |
1795 | NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED; | |
1796 | NOTE_SOURCE_FILE (q) = 0; | |
1797 | REG_N_SETS (REGNO (src))--; | |
1798 | REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2; | |
1799 | REG_N_REFS (REGNO (src)) -= true_loop_depth; | |
1800 | REG_LIVE_LENGTH (REGNO (src)) -= s_length2; | |
1801 | insn_const = 0; | |
1802 | } | |
1803 | } | |
1804 | } | |
1a56b81f AS |
1805 | |
1806 | /* Don't remove this seemingly useless if, it is needed to pair with the | |
1807 | else in the next two conditionally included code blocks. */ | |
1808 | if (0) | |
1809 | {;} | |
184bb750 R |
1810 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) |
1811 | else if ((code == PLUS || code == MINUS) && insn_const | |
1812 | && try_auto_increment (p, insn, 0, src, insn_const, 1)) | |
1813 | insn = p; | |
1814 | #endif | |
1815 | #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) | |
1816 | else if (post_inc | |
1817 | && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0)) | |
1818 | post_inc = 0; | |
1819 | #endif | |
1820 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) | |
1821 | /* If post_inc still prevails, try to find an | |
1822 | insn where it can be used as a pre-in/decrement. | |
1823 | If code is MINUS, this was already tried. */ | |
1824 | if (post_inc && code == PLUS | |
1825 | /* Check that newconst is likely to be usable | |
1826 | in a pre-in/decrement before starting the search. */ | |
1827 | && (0 | |
1828 | #if defined (HAVE_PRE_INCREMENT) | |
1829 | || (newconst > 0 && newconst <= MOVE_MAX) | |
1830 | #endif | |
1831 | #if defined (HAVE_PRE_DECREMENT) | |
1832 | || (newconst < 0 && newconst >= -MOVE_MAX) | |
1833 | #endif | |
1834 | ) && exact_log2 (newconst)) | |
1835 | { | |
1836 | rtx q, inc_dest; | |
1837 | ||
1838 | inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src; | |
51723711 | 1839 | for (q = post_inc; (q = NEXT_INSN (q)); ) |
184bb750 R |
1840 | { |
1841 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN | |
1842 | || (GET_CODE (q) == NOTE | |
1843 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1844 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
1845 | break; | |
7bf825d2 JW |
1846 | |
1847 | /* ??? We can't scan past the end of a basic block without updating | |
1848 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
1849 | A CALL_INSN might be the last insn of a basic block, if it | |
1850 | is inside an EH region. There is no easy way to tell so we | |
1851 | just always break when we see a CALL_INSN if flag_exceptions | |
1852 | is nonzero. */ | |
a1ecb5ca | 1853 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1854 | break; |
1855 | ||
184bb750 R |
1856 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1857 | continue; | |
1858 | if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q)) | |
1859 | || reg_set_p (src, q))) | |
1860 | break; | |
1861 | if (reg_set_p (inc_dest, q)) | |
1862 | break; | |
1863 | if (reg_overlap_mentioned_p (inc_dest, PATTERN (q))) | |
1864 | { | |
1865 | try_auto_increment (q, post_inc, | |
1866 | post_inc_set, inc_dest, newconst, 1); | |
1867 | break; | |
1868 | } | |
1869 | } | |
1870 | } | |
1871 | #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */ | |
1872 | /* Move the death note for DST to INSN if it is used | |
1873 | there. */ | |
1874 | if (reg_overlap_mentioned_p (dst, PATTERN (insn))) | |
1875 | { | |
1876 | XEXP (dst_note, 1) = REG_NOTES (insn); | |
1877 | REG_NOTES (insn) = dst_note; | |
1878 | } | |
1879 | ||
1880 | if (src_note) | |
1881 | { | |
1882 | /* Move the death note for SRC from INSN to P. */ | |
1883 | if (! overlap) | |
1884 | remove_note (insn, src_note); | |
1885 | XEXP (src_note, 1) = REG_NOTES (p); | |
1886 | REG_NOTES (p) = src_note; | |
1887 | ||
1888 | REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls; | |
1889 | } | |
1890 | ||
1891 | REG_N_SETS (REGNO (src))++; | |
1892 | REG_N_SETS (REGNO (dst))--; | |
1893 | ||
1894 | REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls; | |
1895 | ||
1896 | REG_LIVE_LENGTH (REGNO (src)) += s_length; | |
1897 | if (REG_LIVE_LENGTH (REGNO (dst)) >= 0) | |
1898 | { | |
1899 | REG_LIVE_LENGTH (REGNO (dst)) -= length; | |
1900 | /* REG_LIVE_LENGTH is only an approximation after | |
1901 | combine if sched is not run, so make sure that we | |
1902 | still have a reasonable value. */ | |
1903 | if (REG_LIVE_LENGTH (REGNO (dst)) < 2) | |
1904 | REG_LIVE_LENGTH (REGNO (dst)) = 2; | |
1905 | } | |
1906 | ||
1907 | /* We assume that a register is used exactly once per | |
1908 | insn in the updates above. If this is not correct, | |
1909 | no great harm is done. */ | |
1910 | ||
1911 | REG_N_REFS (REGNO (src)) += 2 * true_loop_depth; | |
1912 | REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth; | |
1913 | ||
1914 | /* If that was the only time dst was set, | |
1915 | and dst was not live at the start of the | |
1916 | function, we know that we have no more | |
1917 | references to dst; clear REG_N_REFS so it | |
1918 | won't make reload do any work. */ | |
1919 | if (REG_N_SETS (REGNO (dst)) == 0 | |
1920 | && ! regno_uninitialized (REGNO (dst))) | |
1921 | REG_N_REFS (REGNO (dst)) = 0; | |
1922 | ||
1923 | if (regmove_dump_file) | |
1924 | fprintf (regmove_dump_file, | |
1925 | "Fixed operand %d of insn %d matching operand %d.\n", | |
1926 | operand_number, INSN_UID (insn), match_number); | |
1927 | return 1; | |
1928 | } | |
1929 | ||
1930 | ||
8c660648 JL |
1931 | /* return nonzero if X is stable but for mentioning SRC or mentioning / |
1932 | changing DST . If in doubt, presume it is unstable. */ | |
1933 | static int | |
1934 | stable_but_for_p (x, src, dst) | |
1935 | rtx x, src, dst; | |
1936 | { | |
1937 | RTX_CODE code = GET_CODE (x); | |
1938 | switch (GET_RTX_CLASS (code)) | |
1939 | { | |
1940 | case '<': case '1': case 'c': case '2': case 'b': case '3': | |
1941 | { | |
1942 | int i; | |
1943 | char *fmt = GET_RTX_FORMAT (code); | |
1944 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1945 | if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst)) | |
1946 | return 0; | |
1947 | return 1; | |
1948 | } | |
1949 | case 'o': | |
1950 | if (x == src || x == dst) | |
1951 | return 1; | |
1952 | /* fall through */ | |
1953 | default: | |
1954 | return ! rtx_unstable_p (x); | |
1955 | } | |
1956 | } | |
184bb750 | 1957 | |
b1a7d591 JW |
1958 | /* Test if regmove seems profitable for this target. Regmove is useful only |
1959 | if some common patterns are two address, i.e. require matching constraints, | |
1960 | so we check that condition here. */ | |
1961 | ||
184bb750 R |
1962 | int |
1963 | regmove_profitable_p () | |
1964 | { | |
1965 | #ifdef REGISTER_CONSTRAINTS | |
1966 | struct match match; | |
1967 | enum machine_mode mode; | |
1968 | optab tstoptab = add_optab; | |
1969 | do /* check add_optab and ashl_optab */ | |
1970 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
1971 | mode = GET_MODE_WIDER_MODE (mode)) | |
1972 | { | |
1973 | int icode = (int) tstoptab->handlers[(int) mode].insn_code; | |
1974 | rtx reg0, reg1, reg2, pat; | |
1975 | int i; | |
1976 | ||
1977 | if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing) | |
1978 | continue; | |
1979 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1980 | if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)) | |
1981 | break; | |
1982 | if (i + 2 >= FIRST_PSEUDO_REGISTER) | |
1983 | break; | |
38a448ca RH |
1984 | reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i); |
1985 | reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1); | |
1986 | reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2); | |
184bb750 R |
1987 | if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode) |
1988 | || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode) | |
1989 | || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode)) | |
1990 | break; | |
1991 | pat = GEN_FCN (icode) (reg0, reg1, reg2); | |
1992 | if (! pat) | |
1993 | continue; | |
1994 | if (GET_CODE (pat) == SEQUENCE) | |
1995 | pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1); | |
1996 | else | |
1997 | pat = make_insn_raw (pat); | |
1998 | if (! single_set (pat) | |
1999 | || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code) | |
2000 | /* Unexpected complexity; don't need to handle this unless | |
2001 | we find a machine where this occurs and regmove should | |
2002 | be enabled. */ | |
2003 | break; | |
2004 | if (find_matches (pat, &match) >= 0) | |
2005 | return 1; | |
2006 | break; | |
2007 | } | |
2008 | while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1)); | |
2009 | #endif /* REGISTER_CONSTRAINTS */ | |
2010 | return 0; | |
2011 | } |