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Commit | Line | Data |
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8c660648 | 1 | /* Move registers around to reduce number of move instructions needed. |
184bb750 | 2 | Copyright (C) 1987, 88, 89, 92-97, 1998 Free Software Foundation, Inc. |
8c660648 JL |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | ||
21 | /* This module looks for cases where matching constraints would force | |
22 | an instruction to need a reload, and this reload would be a register | |
23 | to register move. It then attempts to change the registers used by the | |
24 | instruction to avoid the move instruction. */ | |
25 | ||
26 | #include "config.h" | |
27 | #ifdef __STDC__ | |
28 | #include <stdarg.h> | |
29 | #else | |
30 | #include <varargs.h> | |
31 | #endif | |
32 | ||
670ee920 KG |
33 | /* stdio.h must precede rtl.h for FFS. */ |
34 | #include "system.h" | |
8c660648 JL |
35 | |
36 | #include "rtl.h" | |
37 | #include "insn-config.h" | |
38 | #include "recog.h" | |
39 | #include "output.h" | |
40 | #include "reload.h" | |
41 | #include "regs.h" | |
184bb750 R |
42 | #include "hard-reg-set.h" |
43 | #include "flags.h" | |
44 | #include "expr.h" | |
45 | #include "insn-flags.h" | |
ddc8bed2 | 46 | #include "basic-block.h" |
184bb750 | 47 | |
1230327b R |
48 | static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx)); |
49 | static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx)); | |
184bb750 | 50 | static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx)); |
1a29f703 | 51 | static rtx gen_add3_insn PROTO((rtx, rtx, rtx)); |
ddc8bed2 MM |
52 | static void copy_src_to_dest PROTO((rtx, rtx, rtx, int)); |
53 | static int *regmove_bb_head; | |
8c660648 | 54 | |
184bb750 R |
55 | struct match { |
56 | int with[MAX_RECOG_OPERANDS]; | |
57 | enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS]; | |
58 | int commutative[MAX_RECOG_OPERANDS]; | |
59 | int early_clobber[MAX_RECOG_OPERANDS]; | |
60 | }; | |
61 | ||
d06eab0d | 62 | #ifdef AUTO_INC_DEC |
0e05e8ea | 63 | static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int)); |
d06eab0d | 64 | #endif |
184bb750 R |
65 | static int find_matches PROTO((rtx, struct match *)); |
66 | static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *)) | |
67 | ; | |
68 | static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx)); | |
8c660648 | 69 | static int stable_but_for_p PROTO((rtx, rtx, rtx)); |
184bb750 | 70 | static int loop_depth; |
8c660648 | 71 | |
1a29f703 R |
72 | /* Generate and return an insn body to add r1 and c, |
73 | storing the result in r0. */ | |
74 | static rtx | |
75 | gen_add3_insn (r0, r1, c) | |
76 | rtx r0, r1, c; | |
77 | { | |
78 | int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code; | |
79 | ||
80 | if (icode == CODE_FOR_nothing | |
81 | || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0]) | |
82 | || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1]) | |
83 | || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2])) | |
84 | return NULL_RTX; | |
85 | ||
86 | return (GEN_FCN (icode) (r0, r1, c)); | |
87 | } | |
88 | ||
184bb750 | 89 | #ifdef AUTO_INC_DEC |
8c660648 JL |
90 | |
91 | /* INC_INSN is an instruction that adds INCREMENT to REG. | |
92 | Try to fold INC_INSN as a post/pre in/decrement into INSN. | |
93 | Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src. | |
94 | Return nonzero for success. */ | |
95 | static int | |
96 | try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) | |
97 | rtx reg, insn, inc_insn ,inc_insn_set; | |
98 | HOST_WIDE_INT increment; | |
99 | int pre; | |
100 | { | |
101 | enum rtx_code inc_code; | |
102 | ||
103 | rtx pset = single_set (insn); | |
104 | if (pset) | |
105 | { | |
106 | /* Can't use the size of SET_SRC, we might have something like | |
107 | (sign_extend:SI (mem:QI ... */ | |
108 | rtx use = find_use_as_address (pset, reg, 0); | |
109 | if (use != 0 && use != (rtx) 1) | |
110 | { | |
111 | int size = GET_MODE_SIZE (GET_MODE (use)); | |
112 | if (0 | |
113 | #ifdef HAVE_POST_INCREMENT | |
114 | || (pre == 0 && (inc_code = POST_INC, increment == size)) | |
115 | #endif | |
116 | #ifdef HAVE_PRE_INCREMENT | |
117 | || (pre == 1 && (inc_code = PRE_INC, increment == size)) | |
118 | #endif | |
119 | #ifdef HAVE_POST_DECREMENT | |
120 | || (pre == 0 && (inc_code = POST_DEC, increment == -size)) | |
121 | #endif | |
122 | #ifdef HAVE_PRE_DECREMENT | |
123 | || (pre == 1 && (inc_code = PRE_DEC, increment == -size)) | |
124 | #endif | |
184bb750 R |
125 | ) |
126 | { | |
127 | if (inc_insn_set) | |
128 | validate_change | |
129 | (inc_insn, | |
130 | &SET_SRC (inc_insn_set), | |
8c660648 | 131 | XEXP (SET_SRC (inc_insn_set), 0), 1); |
184bb750 | 132 | validate_change (insn, &XEXP (use, 0), |
38a448ca | 133 | gen_rtx_fmt_e (inc_code, Pmode, reg), 1); |
184bb750 R |
134 | if (apply_change_group ()) |
135 | { | |
136 | REG_NOTES (insn) | |
38a448ca RH |
137 | = gen_rtx_EXPR_LIST (REG_INC, |
138 | reg, REG_NOTES (insn)); | |
184bb750 R |
139 | if (! inc_insn_set) |
140 | { | |
141 | PUT_CODE (inc_insn, NOTE); | |
142 | NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED; | |
143 | NOTE_SOURCE_FILE (inc_insn) = 0; | |
144 | } | |
8c660648 | 145 | return 1; |
184bb750 R |
146 | } |
147 | } | |
148 | } | |
149 | } | |
150 | return 0; | |
151 | } | |
152 | #endif /* AUTO_INC_DEC */ | |
153 | ||
154 | static int *regno_src_regno; | |
155 | ||
156 | /* Indicate how good a choice REG (which appears as a source) is to replace | |
157 | a destination register with. The higher the returned value, the better | |
158 | the choice. The main objective is to avoid using a register that is | |
159 | a candidate for tying to a hard register, since the output might in | |
160 | turn be a candidate to be tied to a different hard register. */ | |
161 | int | |
162 | replacement_quality(reg) | |
163 | rtx reg; | |
164 | { | |
165 | int src_regno; | |
166 | ||
167 | /* Bad if this isn't a register at all. */ | |
168 | if (GET_CODE (reg) != REG) | |
169 | return 0; | |
170 | ||
171 | /* If this register is not meant to get a hard register, | |
172 | it is a poor choice. */ | |
173 | if (REG_LIVE_LENGTH (REGNO (reg)) < 0) | |
174 | return 0; | |
175 | ||
176 | src_regno = regno_src_regno[REGNO (reg)]; | |
177 | ||
178 | /* If it was not copied from another register, it is fine. */ | |
179 | if (src_regno < 0) | |
180 | return 3; | |
181 | ||
182 | /* Copied from a hard register? */ | |
183 | if (src_regno < FIRST_PSEUDO_REGISTER) | |
184 | return 1; | |
185 | ||
186 | /* Copied from a pseudo register - not as bad as from a hard register, | |
187 | yet still cumbersome, since the register live length will be lengthened | |
188 | when the registers get tied. */ | |
189 | return 2; | |
190 | } | |
191 | ||
1230327b R |
192 | /* INSN is a copy from SRC to DEST, both registers, and SRC does not die |
193 | in INSN. | |
194 | ||
195 | Search forward to see if SRC dies before either it or DEST is modified, | |
196 | but don't scan past the end of a basic block. If so, we can replace SRC | |
197 | with DEST and let SRC die in INSN. | |
198 | ||
199 | This will reduce the number of registers live in that range and may enable | |
200 | DEST to be tied to SRC, thus often saving one register in addition to a | |
201 | register-register copy. */ | |
202 | ||
203 | static int | |
204 | optimize_reg_copy_1 (insn, dest, src) | |
205 | rtx insn; | |
206 | rtx dest; | |
207 | rtx src; | |
208 | { | |
209 | rtx p, q; | |
210 | rtx note; | |
211 | rtx dest_death = 0; | |
212 | int sregno = REGNO (src); | |
213 | int dregno = REGNO (dest); | |
214 | ||
215 | /* We don't want to mess with hard regs if register classes are small. */ | |
216 | if (sregno == dregno | |
217 | || (SMALL_REGISTER_CLASSES | |
218 | && (sregno < FIRST_PSEUDO_REGISTER | |
219 | || dregno < FIRST_PSEUDO_REGISTER)) | |
220 | /* We don't see all updates to SP if they are in an auto-inc memory | |
221 | reference, so we must disallow this optimization on them. */ | |
222 | || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM) | |
223 | return 0; | |
224 | ||
225 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
226 | { | |
227 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
228 | || (GET_CODE (p) == NOTE | |
229 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
230 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
231 | break; | |
232 | ||
7bf825d2 JW |
233 | /* ??? We can't scan past the end of a basic block without updating |
234 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
235 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
236 | an EH region. There is no easy way to tell, so we just always break | |
237 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
238 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
239 | break; | |
240 | ||
1230327b R |
241 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
242 | continue; | |
243 | ||
244 | if (reg_set_p (src, p) || reg_set_p (dest, p) | |
245 | /* Don't change a USE of a register. */ | |
246 | || (GET_CODE (PATTERN (p)) == USE | |
247 | && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) | |
248 | break; | |
249 | ||
250 | /* See if all of SRC dies in P. This test is slightly more | |
251 | conservative than it needs to be. */ | |
252 | if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0 | |
253 | && GET_MODE (XEXP (note, 0)) == GET_MODE (src)) | |
254 | { | |
255 | int failed = 0; | |
256 | int length = 0; | |
257 | int d_length = 0; | |
258 | int n_calls = 0; | |
259 | int d_n_calls = 0; | |
260 | ||
261 | /* We can do the optimization. Scan forward from INSN again, | |
262 | replacing regs as we go. Set FAILED if a replacement can't | |
263 | be done. In that case, we can't move the death note for SRC. | |
264 | This should be rare. */ | |
265 | ||
266 | /* Set to stop at next insn. */ | |
267 | for (q = next_real_insn (insn); | |
268 | q != next_real_insn (p); | |
269 | q = next_real_insn (q)) | |
270 | { | |
271 | if (reg_overlap_mentioned_p (src, PATTERN (q))) | |
272 | { | |
273 | /* If SRC is a hard register, we might miss some | |
274 | overlapping registers with validate_replace_rtx, | |
275 | so we would have to undo it. We can't if DEST is | |
276 | present in the insn, so fail in that combination | |
277 | of cases. */ | |
278 | if (sregno < FIRST_PSEUDO_REGISTER | |
279 | && reg_mentioned_p (dest, PATTERN (q))) | |
280 | failed = 1; | |
281 | ||
282 | /* Replace all uses and make sure that the register | |
283 | isn't still present. */ | |
284 | else if (validate_replace_rtx (src, dest, q) | |
285 | && (sregno >= FIRST_PSEUDO_REGISTER | |
286 | || ! reg_overlap_mentioned_p (src, | |
287 | PATTERN (q)))) | |
288 | { | |
289 | /* We assume that a register is used exactly once per | |
290 | insn in the updates below. If this is not correct, | |
291 | no great harm is done. */ | |
292 | if (sregno >= FIRST_PSEUDO_REGISTER) | |
293 | REG_N_REFS (sregno) -= loop_depth; | |
294 | if (dregno >= FIRST_PSEUDO_REGISTER) | |
295 | REG_N_REFS (dregno) += loop_depth; | |
296 | } | |
297 | else | |
298 | { | |
299 | validate_replace_rtx (dest, src, q); | |
300 | failed = 1; | |
301 | } | |
302 | } | |
303 | ||
304 | /* Count the insns and CALL_INSNs passed. If we passed the | |
305 | death note of DEST, show increased live length. */ | |
306 | length++; | |
307 | if (dest_death) | |
308 | d_length++; | |
309 | ||
310 | /* If the insn in which SRC dies is a CALL_INSN, don't count it | |
311 | as a call that has been crossed. Otherwise, count it. */ | |
312 | if (q != p && GET_CODE (q) == CALL_INSN) | |
313 | { | |
314 | n_calls++; | |
315 | if (dest_death) | |
316 | d_n_calls++; | |
317 | } | |
318 | ||
319 | /* If DEST dies here, remove the death note and save it for | |
320 | later. Make sure ALL of DEST dies here; again, this is | |
321 | overly conservative. */ | |
322 | if (dest_death == 0 | |
323 | && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0) | |
324 | { | |
325 | if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest)) | |
326 | failed = 1, dest_death = 0; | |
327 | else | |
328 | remove_note (q, dest_death); | |
329 | } | |
330 | } | |
331 | ||
332 | if (! failed) | |
333 | { | |
334 | if (sregno >= FIRST_PSEUDO_REGISTER) | |
335 | { | |
336 | if (REG_LIVE_LENGTH (sregno) >= 0) | |
337 | { | |
338 | REG_LIVE_LENGTH (sregno) -= length; | |
339 | /* REG_LIVE_LENGTH is only an approximation after | |
340 | combine if sched is not run, so make sure that we | |
341 | still have a reasonable value. */ | |
342 | if (REG_LIVE_LENGTH (sregno) < 2) | |
343 | REG_LIVE_LENGTH (sregno) = 2; | |
344 | } | |
345 | ||
346 | REG_N_CALLS_CROSSED (sregno) -= n_calls; | |
347 | } | |
348 | ||
349 | if (dregno >= FIRST_PSEUDO_REGISTER) | |
350 | { | |
351 | if (REG_LIVE_LENGTH (dregno) >= 0) | |
352 | REG_LIVE_LENGTH (dregno) += d_length; | |
353 | ||
354 | REG_N_CALLS_CROSSED (dregno) += d_n_calls; | |
355 | } | |
356 | ||
357 | /* Move death note of SRC from P to INSN. */ | |
358 | remove_note (p, note); | |
359 | XEXP (note, 1) = REG_NOTES (insn); | |
360 | REG_NOTES (insn) = note; | |
361 | } | |
362 | ||
363 | /* Put death note of DEST on P if we saw it die. */ | |
364 | if (dest_death) | |
365 | { | |
366 | XEXP (dest_death, 1) = REG_NOTES (p); | |
367 | REG_NOTES (p) = dest_death; | |
368 | } | |
369 | ||
370 | return ! failed; | |
371 | } | |
372 | ||
373 | /* If SRC is a hard register which is set or killed in some other | |
374 | way, we can't do this optimization. */ | |
375 | else if (sregno < FIRST_PSEUDO_REGISTER | |
376 | && dead_or_set_p (p, src)) | |
377 | break; | |
378 | } | |
379 | return 0; | |
380 | } | |
381 | \f | |
382 | /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have | |
383 | a sequence of insns that modify DEST followed by an insn that sets | |
384 | SRC to DEST in which DEST dies, with no prior modification of DEST. | |
385 | (There is no need to check if the insns in between actually modify | |
386 | DEST. We should not have cases where DEST is not modified, but | |
387 | the optimization is safe if no such modification is detected.) | |
388 | In that case, we can replace all uses of DEST, starting with INSN and | |
389 | ending with the set of SRC to DEST, with SRC. We do not do this | |
390 | optimization if a CALL_INSN is crossed unless SRC already crosses a | |
391 | call or if DEST dies before the copy back to SRC. | |
392 | ||
393 | It is assumed that DEST and SRC are pseudos; it is too complicated to do | |
394 | this for hard registers since the substitutions we may make might fail. */ | |
395 | ||
396 | static void | |
397 | optimize_reg_copy_2 (insn, dest, src) | |
398 | rtx insn; | |
399 | rtx dest; | |
400 | rtx src; | |
401 | { | |
402 | rtx p, q; | |
403 | rtx set; | |
404 | int sregno = REGNO (src); | |
405 | int dregno = REGNO (dest); | |
406 | ||
407 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
408 | { | |
409 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
410 | || (GET_CODE (p) == NOTE | |
411 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
412 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
413 | break; | |
414 | ||
7bf825d2 JW |
415 | /* ??? We can't scan past the end of a basic block without updating |
416 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
417 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
418 | an EH region. There is no easy way to tell, so we just always break | |
419 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
420 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
421 | break; | |
422 | ||
1230327b R |
423 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
424 | continue; | |
425 | ||
426 | set = single_set (p); | |
427 | if (set && SET_SRC (set) == dest && SET_DEST (set) == src | |
428 | && find_reg_note (p, REG_DEAD, dest)) | |
429 | { | |
430 | /* We can do the optimization. Scan forward from INSN again, | |
431 | replacing regs as we go. */ | |
432 | ||
433 | /* Set to stop at next insn. */ | |
434 | for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q)) | |
435 | if (GET_RTX_CLASS (GET_CODE (q)) == 'i') | |
436 | { | |
437 | if (reg_mentioned_p (dest, PATTERN (q))) | |
438 | { | |
439 | PATTERN (q) = replace_rtx (PATTERN (q), dest, src); | |
440 | ||
441 | /* We assume that a register is used exactly once per | |
442 | insn in the updates below. If this is not correct, | |
443 | no great harm is done. */ | |
444 | REG_N_REFS (dregno) -= loop_depth; | |
445 | REG_N_REFS (sregno) += loop_depth; | |
446 | } | |
447 | ||
448 | ||
449 | if (GET_CODE (q) == CALL_INSN) | |
450 | { | |
451 | REG_N_CALLS_CROSSED (dregno)--; | |
452 | REG_N_CALLS_CROSSED (sregno)++; | |
453 | } | |
454 | } | |
455 | ||
456 | remove_note (p, find_reg_note (p, REG_DEAD, dest)); | |
457 | REG_N_DEATHS (dregno)--; | |
458 | remove_note (insn, find_reg_note (insn, REG_DEAD, src)); | |
459 | REG_N_DEATHS (sregno)--; | |
460 | return; | |
461 | } | |
462 | ||
463 | if (reg_set_p (src, p) | |
464 | || find_reg_note (p, REG_DEAD, dest) | |
465 | || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0)) | |
466 | break; | |
467 | } | |
468 | } | |
184bb750 R |
469 | /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST. |
470 | Look if SRC dies there, and if it is only set once, by loading | |
471 | it from memory. If so, try to encorporate the zero/sign extension | |
472 | into the memory read, change SRC to the mode of DEST, and alter | |
473 | the remaining accesses to use the appropriate SUBREG. This allows | |
474 | SRC and DEST to be tied later. */ | |
475 | static void | |
476 | optimize_reg_copy_3 (insn, dest, src) | |
477 | rtx insn; | |
478 | rtx dest; | |
479 | rtx src; | |
480 | { | |
481 | rtx src_reg = XEXP (src, 0); | |
482 | int src_no = REGNO (src_reg); | |
483 | int dst_no = REGNO (dest); | |
484 | rtx p, set, subreg; | |
485 | enum machine_mode old_mode; | |
486 | ||
487 | if (src_no < FIRST_PSEUDO_REGISTER | |
488 | || dst_no < FIRST_PSEUDO_REGISTER | |
489 | || ! find_reg_note (insn, REG_DEAD, src_reg) | |
490 | || REG_N_SETS (src_no) != 1) | |
491 | return; | |
492 | for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p)) | |
493 | { | |
7bf825d2 JW |
494 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN |
495 | || (GET_CODE (p) == NOTE | |
496 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
497 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
498 | return; | |
499 | ||
500 | /* ??? We can't scan past the end of a basic block without updating | |
501 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
502 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
503 | an EH region. There is no easy way to tell, so we just always break | |
504 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
505 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
506 | return; | |
507 | ||
184bb750 R |
508 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
509 | continue; | |
184bb750 R |
510 | } |
511 | if (! (set = single_set (p)) | |
512 | || GET_CODE (SET_SRC (set)) != MEM | |
513 | || SET_DEST (set) != src_reg) | |
514 | return; | |
515 | old_mode = GET_MODE (src_reg); | |
516 | PUT_MODE (src_reg, GET_MODE (src)); | |
517 | XEXP (src, 0) = SET_SRC (set); | |
518 | if (! validate_change (p, &SET_SRC (set), src, 0)) | |
519 | { | |
520 | PUT_MODE (src_reg, old_mode); | |
521 | XEXP (src, 0) = src_reg; | |
522 | return; | |
523 | } | |
38a448ca | 524 | subreg = gen_rtx_SUBREG (old_mode, src_reg, 0); |
184bb750 R |
525 | while (p = NEXT_INSN (p), p != insn) |
526 | { | |
527 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') | |
528 | continue; | |
529 | validate_replace_rtx (src_reg, subreg, p); | |
530 | } | |
531 | validate_replace_rtx (src, src_reg, insn); | |
532 | } | |
533 | ||
ddc8bed2 MM |
534 | \f |
535 | /* If we were not able to update the users of src to use dest directly, try | |
536 | instead moving the value to dest directly before the operation. */ | |
537 | ||
cab634f2 | 538 | static void |
ddc8bed2 MM |
539 | copy_src_to_dest (insn, src, dest, loop_depth) |
540 | rtx insn; | |
541 | rtx src; | |
542 | rtx dest; | |
29a4c5ed | 543 | int loop_depth; |
ddc8bed2 MM |
544 | { |
545 | rtx seq; | |
546 | rtx link; | |
547 | rtx next; | |
548 | rtx set; | |
549 | rtx move_insn; | |
550 | rtx *p_insn_notes; | |
551 | rtx *p_move_notes; | |
552 | int i; | |
553 | int src_regno; | |
554 | int dest_regno; | |
555 | int bb; | |
556 | int insn_uid; | |
557 | int move_uid; | |
558 | ||
559 | /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant | |
560 | or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is | |
561 | parameter when there is no frame pointer that is not allocated a register. | |
562 | For now, we just reject them, rather than incrementing the live length. */ | |
563 | ||
3ac3da71 MM |
564 | if (GET_CODE (src) == REG |
565 | && REG_LIVE_LENGTH (REGNO (src)) > 0 | |
566 | && GET_CODE (dest) == REG | |
567 | && REG_LIVE_LENGTH (REGNO (dest)) > 0 | |
ddc8bed2 MM |
568 | && (set = single_set (insn)) != NULL_RTX |
569 | && !reg_mentioned_p (dest, SET_SRC (set)) | |
ddc8bed2 MM |
570 | && validate_replace_rtx (src, dest, insn)) |
571 | { | |
572 | /* Generate the src->dest move. */ | |
573 | start_sequence (); | |
574 | emit_move_insn (dest, src); | |
575 | seq = gen_sequence (); | |
576 | end_sequence (); | |
577 | emit_insn_before (seq, insn); | |
578 | move_insn = PREV_INSN (insn); | |
579 | p_move_notes = ®_NOTES (move_insn); | |
580 | p_insn_notes = ®_NOTES (insn); | |
581 | ||
582 | /* Move any notes mentioning src to the move instruction */ | |
583 | for (link = REG_NOTES (insn); link != NULL_RTX; link = next) | |
584 | { | |
585 | next = XEXP (link, 1); | |
586 | if (XEXP (link, 0) == src) | |
587 | { | |
588 | *p_move_notes = link; | |
589 | p_move_notes = &XEXP (link, 1); | |
590 | } | |
591 | else | |
592 | { | |
593 | *p_insn_notes = link; | |
594 | p_insn_notes = &XEXP (link, 1); | |
595 | } | |
596 | } | |
597 | ||
598 | *p_move_notes = NULL_RTX; | |
599 | *p_insn_notes = NULL_RTX; | |
600 | ||
601 | /* Is the insn the head of a basic block? If so extend it */ | |
602 | insn_uid = INSN_UID (insn); | |
603 | move_uid = INSN_UID (move_insn); | |
604 | bb = regmove_bb_head[insn_uid]; | |
605 | if (bb >= 0) | |
606 | { | |
607 | basic_block_head[bb] = move_insn; | |
608 | regmove_bb_head[insn_uid] = -1; | |
609 | } | |
610 | ||
611 | /* Update the various register tables. */ | |
612 | dest_regno = REGNO (dest); | |
613 | REG_N_SETS (dest_regno) += loop_depth; | |
614 | REG_N_REFS (dest_regno) += loop_depth; | |
615 | REG_LIVE_LENGTH (dest_regno)++; | |
616 | if (REGNO_FIRST_UID (dest_regno) == insn_uid) | |
617 | REGNO_FIRST_UID (dest_regno) = move_uid; | |
618 | ||
619 | src_regno = REGNO (src); | |
620 | if (! find_reg_note (move_insn, REG_DEAD, src)) | |
621 | REG_LIVE_LENGTH (src_regno)++; | |
622 | ||
623 | if (REGNO_FIRST_UID (src_regno) == insn_uid) | |
624 | REGNO_FIRST_UID (src_regno) = move_uid; | |
625 | ||
626 | if (REGNO_LAST_UID (src_regno) == insn_uid) | |
627 | REGNO_LAST_UID (src_regno) = move_uid; | |
628 | ||
629 | if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid) | |
630 | REGNO_LAST_NOTE_UID (src_regno) = move_uid; | |
631 | } | |
632 | } | |
633 | ||
634 | \f | |
184bb750 R |
635 | /* Return whether REG is set in only one location, and is set to a |
636 | constant, but is set in a different basic block from INSN (an | |
637 | instructions which uses REG). In this case REG is equivalent to a | |
638 | constant, and we don't want to break that equivalence, because that | |
639 | may increase register pressure and make reload harder. If REG is | |
640 | set in the same basic block as INSN, we don't worry about it, | |
641 | because we'll probably need a register anyhow (??? but what if REG | |
642 | is used in a different basic block as well as this one?). FIRST is | |
643 | the first insn in the function. */ | |
644 | ||
645 | static int | |
646 | reg_is_remote_constant_p (reg, insn, first) | |
647 | rtx reg; | |
648 | rtx insn; | |
649 | rtx first; | |
650 | { | |
651 | register rtx p; | |
652 | ||
653 | if (REG_N_SETS (REGNO (reg)) != 1) | |
654 | return 0; | |
655 | ||
656 | /* Look for the set. */ | |
657 | for (p = LOG_LINKS (insn); p; p = XEXP (p, 1)) | |
658 | { | |
659 | rtx s; | |
660 | ||
661 | if (REG_NOTE_KIND (p) != 0) | |
662 | continue; | |
663 | s = single_set (XEXP (p, 0)); | |
664 | if (s != 0 | |
665 | && GET_CODE (SET_DEST (s)) == REG | |
666 | && REGNO (SET_DEST (s)) == REGNO (reg)) | |
667 | { | |
668 | /* The register is set in the same basic block. */ | |
669 | return 0; | |
670 | } | |
671 | } | |
672 | ||
673 | for (p = first; p && p != insn; p = NEXT_INSN (p)) | |
674 | { | |
675 | rtx s; | |
676 | ||
677 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') | |
678 | continue; | |
679 | s = single_set (p); | |
680 | if (s != 0 | |
681 | && GET_CODE (SET_DEST (s)) == REG | |
682 | && REGNO (SET_DEST (s)) == REGNO (reg)) | |
683 | { | |
684 | /* This is the instruction which sets REG. If there is a | |
685 | REG_EQUAL note, then REG is equivalent to a constant. */ | |
686 | if (find_reg_note (p, REG_EQUAL, NULL_RTX)) | |
687 | return 1; | |
688 | return 0; | |
689 | } | |
690 | } | |
691 | ||
692 | return 0; | |
693 | } | |
694 | ||
b1a7d591 JW |
695 | /* INSN is adding a CONST_INT to a REG. We search backwards looking for |
696 | another add immediate instruction with the same source and dest registers, | |
697 | and if we find one, we change INSN to an increment, and return 1. If | |
698 | no changes are made, we return 0. | |
699 | ||
700 | This changes | |
701 | (set (reg100) (plus reg1 offset1)) | |
702 | ... | |
703 | (set (reg100) (plus reg1 offset2)) | |
704 | to | |
705 | (set (reg100) (plus reg1 offset1)) | |
706 | ... | |
707 | (set (reg100) (plus reg100 offset2-offset1)) */ | |
708 | ||
709 | /* ??? What does this comment mean? */ | |
184bb750 R |
710 | /* cse disrupts preincrement / postdecrement squences when it finds a |
711 | hard register as ultimate source, like the frame pointer. */ | |
b1a7d591 | 712 | |
7bf825d2 JW |
713 | int |
714 | fixup_match_2 (insn, dst, src, offset, regmove_dump_file) | |
184bb750 R |
715 | rtx insn, dst, src, offset; |
716 | FILE *regmove_dump_file; | |
717 | { | |
718 | rtx p, dst_death = 0; | |
719 | int length, num_calls = 0; | |
720 | ||
721 | /* If SRC dies in INSN, we'd have to move the death note. This is | |
722 | considered to be very unlikely, so we just skip the optimization | |
723 | in this case. */ | |
724 | if (find_regno_note (insn, REG_DEAD, REGNO (src))) | |
725 | return 0; | |
726 | ||
727 | /* Scan backward to find the first instruction that sets DST. */ | |
728 | ||
729 | for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
730 | { | |
731 | rtx pset; | |
732 | ||
733 | if (GET_CODE (p) == CODE_LABEL | |
734 | || GET_CODE (p) == JUMP_INSN | |
735 | || (GET_CODE (p) == NOTE | |
736 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
737 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
738 | break; | |
739 | ||
7bf825d2 JW |
740 | /* ??? We can't scan past the end of a basic block without updating |
741 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
742 | A CALL_INSN might be the last insn of a basic block, if it is inside | |
743 | an EH region. There is no easy way to tell, so we just always break | |
744 | when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
745 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
746 | break; | |
747 | ||
184bb750 R |
748 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
749 | continue; | |
750 | ||
7bf825d2 JW |
751 | if (find_regno_note (p, REG_DEAD, REGNO (dst))) |
752 | dst_death = p; | |
753 | if (! dst_death) | |
754 | length++; | |
184bb750 R |
755 | |
756 | pset = single_set (p); | |
757 | if (pset && SET_DEST (pset) == dst | |
758 | && GET_CODE (SET_SRC (pset)) == PLUS | |
759 | && XEXP (SET_SRC (pset), 0) == src | |
760 | && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT) | |
761 | { | |
762 | HOST_WIDE_INT newconst | |
763 | = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1)); | |
1a29f703 R |
764 | rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst)); |
765 | ||
766 | if (add && validate_change (insn, &PATTERN (insn), add, 0)) | |
184bb750 R |
767 | { |
768 | /* Remove the death note for DST from DST_DEATH. */ | |
769 | if (dst_death) | |
770 | { | |
771 | remove_death (REGNO (dst), dst_death); | |
772 | REG_LIVE_LENGTH (REGNO (dst)) += length; | |
773 | REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls; | |
774 | } | |
775 | ||
776 | REG_N_REFS (REGNO (dst)) += loop_depth; | |
777 | REG_N_REFS (REGNO (src)) -= loop_depth; | |
778 | ||
779 | if (regmove_dump_file) | |
780 | fprintf (regmove_dump_file, | |
781 | "Fixed operand of insn %d.\n", | |
782 | INSN_UID (insn)); | |
783 | ||
784 | #ifdef AUTO_INC_DEC | |
785 | for (p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
786 | { | |
787 | if (GET_CODE (p) == CODE_LABEL | |
788 | || GET_CODE (p) == JUMP_INSN | |
789 | || (GET_CODE (p) == NOTE | |
790 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
791 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
792 | break; | |
793 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) | |
794 | { | |
795 | if (try_auto_increment (p, insn, 0, dst, newconst, 0)) | |
796 | return 1; | |
797 | break; | |
798 | } | |
799 | } | |
800 | for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
801 | { | |
802 | if (GET_CODE (p) == CODE_LABEL | |
803 | || GET_CODE (p) == JUMP_INSN | |
804 | || (GET_CODE (p) == NOTE | |
805 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
806 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
807 | break; | |
808 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) | |
809 | { | |
810 | try_auto_increment (p, insn, 0, dst, newconst, 1); | |
811 | break; | |
812 | } | |
813 | } | |
814 | #endif | |
815 | return 1; | |
816 | } | |
8c660648 | 817 | } |
184bb750 R |
818 | |
819 | if (reg_set_p (dst, PATTERN (p))) | |
820 | break; | |
821 | ||
822 | /* If we have passed a call instruction, and the | |
823 | pseudo-reg SRC is not already live across a call, | |
824 | then don't perform the optimization. */ | |
825 | /* reg_set_p is overly conservative for CALL_INSNS, thinks that all | |
826 | hard regs are clobbered. Thus, we only use it for src for | |
827 | non-call insns. */ | |
828 | if (GET_CODE (p) == CALL_INSN) | |
829 | { | |
830 | if (! dst_death) | |
831 | num_calls++; | |
832 | ||
833 | if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) | |
834 | break; | |
835 | ||
836 | if (call_used_regs [REGNO (dst)] | |
837 | || find_reg_fusage (p, CLOBBER, dst)) | |
838 | break; | |
839 | } | |
840 | else if (reg_set_p (src, PATTERN (p))) | |
841 | break; | |
8c660648 | 842 | } |
184bb750 | 843 | |
8c660648 JL |
844 | return 0; |
845 | } | |
8c660648 JL |
846 | |
847 | void | |
848 | regmove_optimize (f, nregs, regmove_dump_file) | |
849 | rtx f; | |
850 | int nregs; | |
851 | FILE *regmove_dump_file; | |
852 | { | |
8c660648 | 853 | rtx insn; |
184bb750 | 854 | struct match match; |
8c660648 | 855 | int pass; |
184bb750 | 856 | int maxregnum = max_reg_num (), i; |
ddc8bed2 | 857 | rtx copy_src, copy_dst; |
184bb750 R |
858 | |
859 | regno_src_regno = (int *)alloca (sizeof *regno_src_regno * maxregnum); | |
860 | for (i = maxregnum; --i >= 0; ) regno_src_regno[i] = -1; | |
8c660648 | 861 | |
ddc8bed2 MM |
862 | regmove_bb_head = (int *)alloca (sizeof (int) * (get_max_uid () + 1)); |
863 | for (i = get_max_uid (); --i >= 0; ) regmove_bb_head[i] = -1; | |
864 | for (i = 0; i < n_basic_blocks; i++) | |
865 | regmove_bb_head[INSN_UID (basic_block_head[i])] = i; | |
866 | ||
8c660648 JL |
867 | /* A forward/backward pass. Replace output operands with input operands. */ |
868 | ||
184bb750 R |
869 | loop_depth = 1; |
870 | ||
871 | for (pass = 0; pass <= 2; pass++) | |
8c660648 | 872 | { |
184bb750 R |
873 | if (! flag_regmove && pass >= flag_expensive_optimizations) |
874 | return; | |
875 | ||
8c660648 JL |
876 | if (regmove_dump_file) |
877 | fprintf (regmove_dump_file, "Starting %s pass...\n", | |
878 | pass ? "backward" : "forward"); | |
879 | ||
880 | for (insn = pass ? get_last_insn () : f; insn; | |
881 | insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn)) | |
882 | { | |
184bb750 R |
883 | rtx set; |
884 | int insn_code_number; | |
885 | int operand_number, match_number; | |
886 | ||
887 | if (GET_CODE (insn) == NOTE) | |
8c660648 | 888 | { |
184bb750 R |
889 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) |
890 | loop_depth++; | |
891 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
892 | loop_depth--; | |
893 | } | |
8c660648 | 894 | |
184bb750 R |
895 | set = single_set (insn); |
896 | if (! set) | |
897 | continue; | |
8c660648 | 898 | |
184bb750 R |
899 | if (flag_expensive_optimizations && ! pass |
900 | && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND | |
901 | || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) | |
902 | && GET_CODE (XEXP (SET_SRC (set), 0)) == REG | |
903 | && GET_CODE (SET_DEST(set)) == REG) | |
904 | optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); | |
905 | ||
906 | if (flag_expensive_optimizations && ! pass | |
907 | && GET_CODE (SET_SRC (set)) == REG | |
908 | && GET_CODE (SET_DEST(set)) == REG) | |
909 | { | |
910 | /* If this is a register-register copy where SRC is not dead, | |
911 | see if we can optimize it. If this optimization succeeds, | |
912 | it will become a copy where SRC is dead. */ | |
913 | if ((find_reg_note (insn, REG_DEAD, SET_SRC (set)) | |
914 | || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set))) | |
915 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) | |
8c660648 | 916 | { |
184bb750 R |
917 | /* Similarly for a pseudo-pseudo copy when SRC is dead. */ |
918 | if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) | |
919 | optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set)); | |
920 | if (regno_src_regno[REGNO (SET_DEST (set))] < 0 | |
921 | && SET_SRC (set) != SET_DEST (set)) | |
8c660648 | 922 | { |
184bb750 R |
923 | int srcregno = REGNO (SET_SRC(set)); |
924 | if (regno_src_regno[srcregno] >= 0) | |
925 | srcregno = regno_src_regno[srcregno]; | |
926 | regno_src_regno[REGNO (SET_DEST (set))] = srcregno; | |
8c660648 JL |
927 | } |
928 | } | |
184bb750 R |
929 | } |
930 | #ifdef REGISTER_CONSTRAINTS | |
931 | insn_code_number | |
932 | = find_matches (insn, &match); | |
933 | ||
934 | if (insn_code_number < 0) | |
935 | continue; | |
936 | ||
937 | /* Now scan through the operands looking for a source operand | |
938 | which is supposed to match the destination operand. | |
939 | Then scan forward for an instruction which uses the dest | |
940 | operand. | |
941 | If it dies there, then replace the dest in both operands with | |
942 | the source operand. */ | |
943 | ||
944 | for (operand_number = 0; | |
945 | operand_number < insn_n_operands[insn_code_number]; | |
946 | operand_number++) | |
947 | { | |
5e9defae | 948 | rtx src, dst, src_subreg; |
184bb750 R |
949 | enum reg_class src_class, dst_class; |
950 | ||
951 | match_number = match.with[operand_number]; | |
952 | ||
953 | /* Nothing to do if the two operands aren't supposed to match. */ | |
954 | if (match_number < 0) | |
955 | continue; | |
956 | ||
957 | src = recog_operand[operand_number]; | |
958 | dst = recog_operand[match_number]; | |
959 | ||
960 | if (GET_CODE (src) != REG) | |
961 | continue; | |
962 | ||
963 | src_subreg = src; | |
964 | if (GET_CODE (dst) == SUBREG | |
965 | && GET_MODE_SIZE (GET_MODE (dst)) | |
966 | >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst)))) | |
967 | { | |
968 | src_subreg | |
38a448ca RH |
969 | = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)), |
970 | src, SUBREG_WORD (dst)); | |
184bb750 R |
971 | dst = SUBREG_REG (dst); |
972 | } | |
973 | if (GET_CODE (dst) != REG | |
974 | || REGNO (dst) < FIRST_PSEUDO_REGISTER) | |
975 | continue; | |
976 | ||
977 | if (REGNO (src) < FIRST_PSEUDO_REGISTER) | |
978 | { | |
979 | if (match.commutative[operand_number] < operand_number) | |
980 | regno_src_regno[REGNO (dst)] = REGNO (src); | |
981 | continue; | |
982 | } | |
983 | ||
984 | if (REG_LIVE_LENGTH (REGNO (src)) < 0) | |
985 | continue; | |
986 | ||
987 | /* operand_number/src must be a read-only operand, and | |
988 | match_operand/dst must be a write-only operand. */ | |
989 | if (match.use[operand_number] != READ | |
990 | || match.use[match_number] != WRITE) | |
991 | continue; | |
992 | ||
993 | if (match.early_clobber[match_number] | |
994 | && count_occurrences (PATTERN (insn), src) > 1) | |
995 | continue; | |
996 | ||
997 | /* Make sure match_operand is the destination. */ | |
998 | if (recog_operand[match_number] != SET_DEST (set)) | |
999 | continue; | |
1000 | ||
1001 | /* If the operands already match, then there is nothing to do. */ | |
1002 | /* But in the commutative case, we might find a better match. */ | |
1003 | if (operands_match_p (src, dst) | |
1004 | || (match.commutative[operand_number] >= 0 | |
1005 | && operands_match_p (recog_operand[match.commutative | |
1006 | [operand_number]], dst) | |
1007 | && (replacement_quality (recog_operand[match.commutative | |
1008 | [operand_number]]) | |
1009 | >= replacement_quality (src)))) | |
1010 | continue; | |
1011 | ||
1012 | src_class = reg_preferred_class (REGNO (src)); | |
1013 | dst_class = reg_preferred_class (REGNO (dst)); | |
1014 | if (src_class != dst_class | |
1015 | && (! reg_class_subset_p (src_class, dst_class) | |
1016 | || CLASS_LIKELY_SPILLED_P (src_class)) | |
1017 | && (! reg_class_subset_p (dst_class, src_class) | |
1018 | || CLASS_LIKELY_SPILLED_P (dst_class))) | |
1019 | continue; | |
1020 | ||
1021 | if (fixup_match_1 (insn, set, src, src_subreg, dst, pass, | |
1022 | operand_number, match_number, | |
1023 | regmove_dump_file)) | |
1024 | break; | |
8c660648 JL |
1025 | } |
1026 | } | |
1027 | } | |
1028 | ||
1029 | /* A backward pass. Replace input operands with output operands. */ | |
1030 | ||
1031 | if (regmove_dump_file) | |
1032 | fprintf (regmove_dump_file, "Starting backward pass...\n"); | |
1033 | ||
184bb750 R |
1034 | loop_depth = 1; |
1035 | ||
8c660648 JL |
1036 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) |
1037 | { | |
184bb750 R |
1038 | if (GET_CODE (insn) == NOTE) |
1039 | { | |
1040 | if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) | |
1041 | loop_depth++; | |
1042 | else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) | |
1043 | loop_depth--; | |
1044 | } | |
8c660648 JL |
1045 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
1046 | { | |
184bb750 | 1047 | int insn_code_number = find_matches (insn, &match); |
8c660648 | 1048 | int operand_number, match_number; |
ddc8bed2 | 1049 | int success = 0; |
8c660648 JL |
1050 | |
1051 | if (insn_code_number < 0) | |
1052 | continue; | |
1053 | ||
8c660648 JL |
1054 | /* Now scan through the operands looking for a destination operand |
1055 | which is supposed to match a source operand. | |
1056 | Then scan backward for an instruction which sets the source | |
1057 | operand. If safe, then replace the source operand with the | |
1058 | dest operand in both instructions. */ | |
1059 | ||
ddc8bed2 MM |
1060 | copy_src = NULL_RTX; |
1061 | copy_dst = NULL_RTX; | |
8c660648 JL |
1062 | for (operand_number = 0; |
1063 | operand_number < insn_n_operands[insn_code_number]; | |
1064 | operand_number++) | |
1065 | { | |
184bb750 R |
1066 | rtx set, p, src, dst; |
1067 | rtx src_note, dst_note; | |
184bb750 R |
1068 | int num_calls = 0; |
1069 | enum reg_class src_class, dst_class; | |
1070 | int length; | |
8c660648 | 1071 | |
184bb750 | 1072 | match_number = match.with[operand_number]; |
8c660648 | 1073 | |
184bb750 R |
1074 | /* Nothing to do if the two operands aren't supposed to match. */ |
1075 | if (match_number < 0) | |
1076 | continue; | |
8c660648 | 1077 | |
184bb750 R |
1078 | dst = recog_operand[match_number]; |
1079 | src = recog_operand[operand_number]; | |
8c660648 | 1080 | |
184bb750 R |
1081 | if (GET_CODE (src) != REG) |
1082 | continue; | |
8c660648 | 1083 | |
184bb750 R |
1084 | if (GET_CODE (dst) != REG |
1085 | || REGNO (dst) < FIRST_PSEUDO_REGISTER | |
1086 | || REG_LIVE_LENGTH (REGNO (dst)) < 0) | |
1087 | continue; | |
8c660648 | 1088 | |
184bb750 R |
1089 | /* If the operands already match, then there is nothing to do. */ |
1090 | if (operands_match_p (src, dst) | |
1091 | || (match.commutative[operand_number] >= 0 | |
1092 | && operands_match_p (recog_operand[match.commutative[operand_number]], dst))) | |
1093 | continue; | |
8c660648 | 1094 | |
184bb750 R |
1095 | set = single_set (insn); |
1096 | if (! set) | |
1097 | continue; | |
8c660648 | 1098 | |
184bb750 R |
1099 | /* match_number/dst must be a write-only operand, and |
1100 | operand_operand/src must be a read-only operand. */ | |
1101 | if (match.use[operand_number] != READ | |
1102 | || match.use[match_number] != WRITE) | |
1103 | continue; | |
8c660648 | 1104 | |
184bb750 R |
1105 | if (match.early_clobber[match_number] |
1106 | && count_occurrences (PATTERN (insn), src) > 1) | |
1107 | continue; | |
8c660648 | 1108 | |
184bb750 R |
1109 | /* Make sure match_number is the destination. */ |
1110 | if (recog_operand[match_number] != SET_DEST (set)) | |
1111 | continue; | |
8c660648 | 1112 | |
184bb750 R |
1113 | if (REGNO (src) < FIRST_PSEUDO_REGISTER) |
1114 | { | |
1115 | if (GET_CODE (SET_SRC (set)) == PLUS | |
1116 | && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT | |
1117 | && XEXP (SET_SRC (set), 0) == src | |
1118 | && fixup_match_2 (insn, dst, src, | |
1119 | XEXP (SET_SRC (set), 1), | |
1120 | regmove_dump_file)) | |
1121 | break; | |
1122 | continue; | |
1123 | } | |
1124 | src_class = reg_preferred_class (REGNO (src)); | |
1125 | dst_class = reg_preferred_class (REGNO (dst)); | |
1126 | if (src_class != dst_class | |
1127 | && (! reg_class_subset_p (src_class, dst_class) | |
1128 | || CLASS_LIKELY_SPILLED_P (src_class)) | |
1129 | && (! reg_class_subset_p (dst_class, src_class) | |
1130 | || CLASS_LIKELY_SPILLED_P (dst_class))) | |
ddc8bed2 MM |
1131 | { |
1132 | if (!copy_src) | |
1133 | { | |
1134 | copy_src = src; | |
1135 | copy_dst = dst; | |
1136 | } | |
1137 | continue; | |
1138 | } | |
8c660648 | 1139 | |
184bb750 R |
1140 | /* Can not modify an earlier insn to set dst if this insn |
1141 | uses an old value in the source. */ | |
1142 | if (reg_overlap_mentioned_p (dst, SET_SRC (set))) | |
ddc8bed2 MM |
1143 | { |
1144 | if (!copy_src) | |
1145 | { | |
1146 | copy_src = src; | |
1147 | copy_dst = dst; | |
1148 | } | |
1149 | continue; | |
1150 | } | |
1151 | ||
1152 | if (! (src_note = find_reg_note (insn, REG_DEAD, src))) | |
1153 | { | |
1154 | if (!copy_src) | |
1155 | { | |
1156 | copy_src = src; | |
1157 | copy_dst = dst; | |
1158 | } | |
1159 | continue; | |
1160 | } | |
8c660648 | 1161 | |
8c660648 | 1162 | |
184bb750 R |
1163 | /* If src is set once in a different basic block, |
1164 | and is set equal to a constant, then do not use | |
1165 | it for this optimization, as this would make it | |
1166 | no longer equivalent to a constant. */ | |
ddc8bed2 MM |
1167 | |
1168 | if (reg_is_remote_constant_p (src, insn, f)) | |
1169 | { | |
1170 | if (!copy_src) | |
1171 | { | |
1172 | copy_src = src; | |
1173 | copy_dst = dst; | |
1174 | } | |
1175 | continue; | |
1176 | } | |
1177 | ||
1178 | ||
1179 | if (regmove_dump_file) | |
1180 | fprintf (regmove_dump_file, | |
1181 | "Could fix operand %d of insn %d matching operand %d.\n", | |
1182 | operand_number, INSN_UID (insn), match_number); | |
8c660648 | 1183 | |
184bb750 R |
1184 | /* Scan backward to find the first instruction that uses |
1185 | the input operand. If the operand is set here, then | |
1186 | replace it in both instructions with match_number. */ | |
1187 | ||
1188 | for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) | |
1189 | { | |
1190 | rtx pset; | |
1191 | ||
1192 | if (GET_CODE (p) == CODE_LABEL | |
1193 | || GET_CODE (p) == JUMP_INSN | |
1194 | || (GET_CODE (p) == NOTE | |
1195 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
1196 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
1197 | break; | |
1198 | ||
7bf825d2 JW |
1199 | /* ??? We can't scan past the end of a basic block without |
1200 | updating the register lifetime info | |
1201 | (REG_DEAD/basic_block_live_at_start). | |
1202 | A CALL_INSN might be the last insn of a basic block, if | |
1203 | it is inside an EH region. There is no easy way to tell, | |
1204 | so we just always break when we see a CALL_INSN if | |
1205 | flag_exceptions is nonzero. */ | |
1206 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
1207 | break; | |
1208 | ||
184bb750 R |
1209 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
1210 | continue; | |
8c660648 | 1211 | |
184bb750 | 1212 | length++; |
8c660648 | 1213 | |
184bb750 R |
1214 | /* ??? See if all of SRC is set in P. This test is much |
1215 | more conservative than it needs to be. */ | |
1216 | pset = single_set (p); | |
1217 | if (pset && SET_DEST (pset) == src) | |
1218 | { | |
1219 | /* We use validate_replace_rtx, in case there | |
1220 | are multiple identical source operands. All of | |
1221 | them have to be changed at the same time. */ | |
1222 | if (validate_replace_rtx (src, dst, insn)) | |
8c660648 | 1223 | { |
184bb750 R |
1224 | if (validate_change (p, &SET_DEST (pset), |
1225 | dst, 0)) | |
1226 | success = 1; | |
1227 | else | |
8c660648 | 1228 | { |
184bb750 R |
1229 | /* Change all source operands back. |
1230 | This modifies the dst as a side-effect. */ | |
1231 | validate_replace_rtx (dst, src, insn); | |
1232 | /* Now make sure the dst is right. */ | |
1233 | validate_change (insn, | |
1234 | recog_operand_loc[match_number], | |
1235 | dst, 0); | |
8c660648 | 1236 | } |
8c660648 | 1237 | } |
184bb750 R |
1238 | break; |
1239 | } | |
1240 | ||
1241 | if (reg_overlap_mentioned_p (src, PATTERN (p)) | |
1242 | || reg_overlap_mentioned_p (dst, PATTERN (p))) | |
1243 | break; | |
8c660648 | 1244 | |
184bb750 R |
1245 | /* If we have passed a call instruction, and the |
1246 | pseudo-reg DST is not already live across a call, | |
1247 | then don't perform the optimization. */ | |
1248 | if (GET_CODE (p) == CALL_INSN) | |
1249 | { | |
1250 | num_calls++; | |
1251 | ||
1252 | if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0) | |
8c660648 | 1253 | break; |
184bb750 R |
1254 | } |
1255 | } | |
8c660648 | 1256 | |
184bb750 R |
1257 | if (success) |
1258 | { | |
1259 | int dstno, srcno; | |
8c660648 | 1260 | |
184bb750 R |
1261 | /* Remove the death note for SRC from INSN. */ |
1262 | remove_note (insn, src_note); | |
1263 | /* Move the death note for SRC to P if it is used | |
1264 | there. */ | |
1265 | if (reg_overlap_mentioned_p (src, PATTERN (p))) | |
1266 | { | |
1267 | XEXP (src_note, 1) = REG_NOTES (p); | |
1268 | REG_NOTES (p) = src_note; | |
8c660648 | 1269 | } |
184bb750 R |
1270 | /* If there is a REG_DEAD note for DST on P, then remove |
1271 | it, because DST is now set there. */ | |
5e9defae | 1272 | if ((dst_note = find_reg_note (p, REG_DEAD, dst))) |
184bb750 R |
1273 | remove_note (p, dst_note); |
1274 | ||
1275 | dstno = REGNO (dst); | |
1276 | srcno = REGNO (src); | |
1277 | ||
1278 | REG_N_SETS (dstno)++; | |
1279 | REG_N_SETS (srcno)--; | |
8c660648 | 1280 | |
184bb750 R |
1281 | REG_N_CALLS_CROSSED (dstno) += num_calls; |
1282 | REG_N_CALLS_CROSSED (srcno) -= num_calls; | |
1283 | ||
1284 | REG_LIVE_LENGTH (dstno) += length; | |
1285 | if (REG_LIVE_LENGTH (srcno) >= 0) | |
8c660648 | 1286 | { |
184bb750 R |
1287 | REG_LIVE_LENGTH (srcno) -= length; |
1288 | /* REG_LIVE_LENGTH is only an approximation after | |
1289 | combine if sched is not run, so make sure that we | |
1290 | still have a reasonable value. */ | |
1291 | if (REG_LIVE_LENGTH (srcno) < 2) | |
1292 | REG_LIVE_LENGTH (srcno) = 2; | |
1293 | } | |
8c660648 | 1294 | |
184bb750 R |
1295 | /* We assume that a register is used exactly once per |
1296 | insn in the updates above. If this is not correct, | |
1297 | no great harm is done. */ | |
8c660648 | 1298 | |
184bb750 R |
1299 | REG_N_REFS (dstno) += 2 * loop_depth; |
1300 | REG_N_REFS (srcno) -= 2 * loop_depth; | |
8c660648 | 1301 | |
184bb750 R |
1302 | /* If that was the only time src was set, |
1303 | and src was not live at the start of the | |
1304 | function, we know that we have no more | |
1305 | references to src; clear REG_N_REFS so it | |
1306 | won't make reload do any work. */ | |
1307 | if (REG_N_SETS (REGNO (src)) == 0 | |
1308 | && ! regno_uninitialized (REGNO (src))) | |
1309 | REG_N_REFS (REGNO (src)) = 0; | |
8c660648 | 1310 | |
184bb750 R |
1311 | if (regmove_dump_file) |
1312 | fprintf (regmove_dump_file, | |
1313 | "Fixed operand %d of insn %d matching operand %d.\n", | |
1314 | operand_number, INSN_UID (insn), match_number); | |
8c660648 | 1315 | |
184bb750 | 1316 | break; |
8c660648 JL |
1317 | } |
1318 | } | |
ddc8bed2 MM |
1319 | |
1320 | /* If we weren't able to replace any of the alternatives, try an | |
1321 | alternative appoach of copying the source to the destination. */ | |
1322 | if (!success && copy_src != NULL_RTX) | |
1323 | copy_src_to_dest (insn, copy_src, copy_dst, loop_depth); | |
1324 | ||
8c660648 JL |
1325 | } |
1326 | } | |
1327 | #endif /* REGISTER_CONSTRAINTS */ | |
1328 | } | |
1329 | ||
b1a7d591 JW |
1330 | /* Returns the INSN_CODE for INSN if its pattern has matching constraints for |
1331 | any operand. Returns -1 if INSN can't be recognized, or if the alternative | |
1332 | can't be determined. | |
1333 | ||
1334 | Initialize the info in MATCHP based on the constraints. */ | |
184bb750 R |
1335 | |
1336 | static int | |
1337 | find_matches (insn, matchp) | |
1338 | rtx insn; | |
1339 | struct match *matchp; | |
1340 | { | |
1341 | int likely_spilled[MAX_RECOG_OPERANDS]; | |
1342 | int operand_number; | |
1343 | int insn_code_number = recog_memoized (insn); | |
1344 | int any_matches = 0; | |
1345 | ||
1346 | if (insn_code_number < 0) | |
1347 | return -1; | |
1348 | ||
1349 | insn_extract (insn); | |
1350 | if (! constrain_operands (insn_code_number, 0)) | |
1351 | return -1; | |
1352 | ||
1353 | /* Must initialize this before main loop, because the code for | |
1354 | the commutative case may set matches for operands other than | |
1355 | the current one. */ | |
1356 | for (operand_number = insn_n_operands[insn_code_number]; | |
1357 | --operand_number >= 0; ) | |
1358 | matchp->with[operand_number] = matchp->commutative[operand_number] = -1; | |
1359 | ||
1360 | for (operand_number = 0; operand_number < insn_n_operands[insn_code_number]; | |
1361 | operand_number++) | |
1362 | { | |
184bb750 R |
1363 | char *p, c; |
1364 | int i = 0; | |
1365 | ||
1366 | p = insn_operand_constraint[insn_code_number][operand_number]; | |
1367 | ||
1368 | likely_spilled[operand_number] = 0; | |
1369 | matchp->use[operand_number] = READ; | |
c485e6a0 | 1370 | matchp->early_clobber[operand_number] = 0; |
184bb750 R |
1371 | if (*p == '=') |
1372 | matchp->use[operand_number] = WRITE; | |
1373 | else if (*p == '+') | |
1374 | matchp->use[operand_number] = READWRITE; | |
1375 | ||
1376 | for (;*p && i < which_alternative; p++) | |
1377 | if (*p == ',') | |
1378 | i++; | |
1379 | ||
1380 | while ((c = *p++) != '\0' && c != ',') | |
1381 | switch (c) | |
1382 | { | |
1383 | case '=': | |
1384 | break; | |
1385 | case '+': | |
1386 | break; | |
1387 | case '&': | |
1388 | matchp->early_clobber[operand_number] = 1; | |
1389 | break; | |
1390 | case '%': | |
1391 | matchp->commutative[operand_number] = operand_number + 1; | |
1392 | matchp->commutative[operand_number + 1] = operand_number; | |
1393 | break; | |
1394 | case '0': case '1': case '2': case '3': case '4': | |
1395 | case '5': case '6': case '7': case '8': case '9': | |
1396 | c -= '0'; | |
27d7e05d | 1397 | if (c < operand_number && likely_spilled[(unsigned char) c]) |
184bb750 R |
1398 | break; |
1399 | matchp->with[operand_number] = c; | |
1400 | any_matches = 1; | |
1401 | if (matchp->commutative[operand_number] >= 0) | |
1402 | matchp->with[matchp->commutative[operand_number]] = c; | |
1403 | break; | |
1404 | case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h': | |
1405 | case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u': | |
1406 | case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B': | |
1407 | case 'C': case 'D': case 'W': case 'Y': case 'Z': | |
1408 | if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER (c))) | |
1409 | likely_spilled[operand_number] = 1; | |
1410 | break; | |
1411 | } | |
1412 | } | |
1413 | return any_matches ? insn_code_number : -1; | |
1414 | } | |
1415 | ||
1416 | /* Try to replace output operand DST in SET, with input operand SRC. SET is | |
1417 | the only set in INSN. INSN has just been recgnized and constrained. | |
1418 | SRC is operand number OPERAND_NUMBER in INSN. | |
1419 | DST is operand number MATCH_NUMBER in INSN. | |
1420 | If BACKWARD is nonzero, we have been called in a backward pass. | |
1421 | Return nonzero for success. */ | |
1422 | static int | |
1423 | fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, | |
1424 | match_number, regmove_dump_file) | |
1425 | rtx insn, set, src, src_subreg, dst; | |
1426 | int backward, operand_number, match_number; | |
1427 | FILE *regmove_dump_file; | |
1428 | { | |
1429 | rtx p; | |
1430 | rtx post_inc = 0, post_inc_set = 0, search_end = 0; | |
1431 | int success = 0; | |
1432 | int num_calls = 0, s_num_calls = 0; | |
1433 | enum rtx_code code = NOTE; | |
1434 | HOST_WIDE_INT insn_const, newconst; | |
1435 | rtx overlap = 0; /* need to move insn ? */ | |
1436 | rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note; | |
1437 | int length, s_length, true_loop_depth; | |
1438 | ||
1439 | if (! src_note) | |
1440 | { | |
1441 | /* Look for (set (regX) (op regA constX)) | |
1442 | (set (regY) (op regA constY)) | |
1443 | and change that to | |
1444 | (set (regA) (op regA constX)). | |
1445 | (set (regY) (op regA constY-constX)). | |
1446 | This works for add and shift operations, if | |
1447 | regA is dead after or set by the second insn. */ | |
1448 | ||
1449 | code = GET_CODE (SET_SRC (set)); | |
1450 | if ((code == PLUS || code == LSHIFTRT | |
1451 | || code == ASHIFT || code == ASHIFTRT) | |
1452 | && XEXP (SET_SRC (set), 0) == src | |
1453 | && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT) | |
1454 | insn_const = INTVAL (XEXP (SET_SRC (set), 1)); | |
1455 | else if (! stable_but_for_p (SET_SRC (set), src, dst)) | |
1456 | return 0; | |
1457 | else | |
1458 | /* We might find a src_note while scanning. */ | |
1459 | code = NOTE; | |
1460 | } | |
1461 | ||
1462 | if (regmove_dump_file) | |
1463 | fprintf (regmove_dump_file, | |
1464 | "Could fix operand %d of insn %d matching operand %d.\n", | |
1465 | operand_number, INSN_UID (insn), match_number); | |
1466 | ||
1467 | /* If SRC is equivalent to a constant set in a different basic block, | |
1468 | then do not use it for this optimization. We want the equivalence | |
1469 | so that if we have to reload this register, we can reload the | |
1470 | constant, rather than extending the lifespan of the register. */ | |
1471 | if (reg_is_remote_constant_p (src, insn, get_insns ())) | |
1472 | return 0; | |
1473 | ||
1474 | /* Scan forward to find the next instruction that | |
1475 | uses the output operand. If the operand dies here, | |
1476 | then replace it in both instructions with | |
1477 | operand_number. */ | |
1478 | ||
1479 | for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) | |
1480 | { | |
1481 | if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN | |
1482 | || (GET_CODE (p) == NOTE | |
1483 | && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG | |
1484 | || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) | |
1485 | break; | |
1486 | ||
7bf825d2 JW |
1487 | /* ??? We can't scan past the end of a basic block without updating |
1488 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
1489 | A CALL_INSN might be the last insn of a basic block, if it is | |
1490 | inside an EH region. There is no easy way to tell, so we just | |
1491 | always break when we see a CALL_INSN if flag_exceptions is nonzero. */ | |
1492 | if (flag_exceptions && GET_CODE (p) == CALL_INSN) | |
1493 | break; | |
1494 | ||
184bb750 R |
1495 | if (GET_RTX_CLASS (GET_CODE (p)) != 'i') |
1496 | continue; | |
1497 | ||
1498 | length++; | |
1499 | if (src_note) | |
1500 | s_length++; | |
1501 | ||
1502 | if (reg_set_p (src, p) || reg_set_p (dst, p) | |
1503 | || (GET_CODE (PATTERN (p)) == USE | |
1504 | && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) | |
1505 | break; | |
1506 | ||
1507 | /* See if all of DST dies in P. This test is | |
1508 | slightly more conservative than it needs to be. */ | |
1509 | if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst))) | |
1510 | && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst))) | |
1511 | { | |
1512 | if (! src_note) | |
1513 | { | |
1514 | rtx q; | |
1515 | rtx set2; | |
1516 | ||
1517 | /* If an optimization is done, the value of SRC while P | |
1518 | is executed will be changed. Check that this is OK. */ | |
1519 | if (reg_overlap_mentioned_p (src, PATTERN (p))) | |
1520 | break; | |
1521 | for (q = p; q; q = NEXT_INSN (q)) | |
1522 | { | |
1523 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN | |
1524 | || (GET_CODE (q) == NOTE | |
1525 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1526 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
1527 | { | |
1528 | q = 0; | |
1529 | break; | |
1530 | } | |
7bf825d2 JW |
1531 | |
1532 | /* ??? We can't scan past the end of a basic block without | |
1533 | updating the register lifetime info | |
1534 | (REG_DEAD/basic_block_live_at_start). | |
1535 | A CALL_INSN might be the last insn of a basic block, if | |
1536 | it is inside an EH region. There is no easy way to tell, | |
1537 | so we just always break when we see a CALL_INSN if | |
1538 | flag_exceptions is nonzero. */ | |
a1ecb5ca | 1539 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1540 | { |
1541 | q = 0; | |
1542 | break; | |
1543 | } | |
1544 | ||
184bb750 R |
1545 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1546 | continue; | |
1547 | if (reg_overlap_mentioned_p (src, PATTERN (q)) | |
1548 | || reg_set_p (src, q)) | |
1549 | break; | |
1550 | } | |
1551 | if (q) | |
1552 | set2 = single_set (q); | |
1553 | if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code | |
1554 | || XEXP (SET_SRC (set2), 0) != src | |
1555 | || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT | |
1556 | || (SET_DEST (set2) != src | |
1557 | && ! find_reg_note (q, REG_DEAD, src))) | |
1558 | { | |
1559 | /* If this is a PLUS, we can still save a register by doing | |
1560 | src += insn_const; | |
1561 | P; | |
1562 | src -= insn_const; . | |
1563 | This also gives opportunities for subsequent | |
1564 | optimizations in the backward pass, so do it there. */ | |
1565 | if (code == PLUS && backward | |
1566 | #ifdef HAVE_cc0 | |
1567 | /* We may not emit an insn directly | |
1568 | after P if the latter sets CC0. */ | |
1569 | && ! sets_cc0_p (PATTERN (p)) | |
1570 | #endif | |
1571 | ) | |
1572 | ||
1573 | { | |
1574 | search_end = q; | |
1575 | q = insn; | |
1576 | set2 = set; | |
1577 | newconst = -insn_const; | |
1578 | code = MINUS; | |
1579 | } | |
1580 | else | |
1581 | break; | |
1582 | } | |
1583 | else | |
1584 | { | |
1585 | newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const; | |
1586 | /* Reject out of range shifts. */ | |
1587 | if (code != PLUS | |
1588 | && (newconst < 0 | |
1589 | || (newconst | |
1590 | >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2)))))) | |
1591 | break; | |
1592 | if (code == PLUS) | |
1593 | { | |
1594 | post_inc = q; | |
1595 | if (SET_DEST (set2) != src) | |
1596 | post_inc_set = set2; | |
1597 | } | |
1598 | } | |
1599 | /* We use 1 as last argument to validate_change so that all | |
1600 | changes are accepted or rejected together by apply_change_group | |
1601 | when it is called by validate_replace_rtx . */ | |
1602 | validate_change (q, &XEXP (SET_SRC (set2), 1), | |
1603 | GEN_INT (newconst), 1); | |
1604 | } | |
1605 | validate_change (insn, recog_operand_loc[match_number], src, 1); | |
1606 | if (validate_replace_rtx (dst, src_subreg, p)) | |
1607 | success = 1; | |
1608 | break; | |
1609 | } | |
1610 | ||
1611 | if (reg_overlap_mentioned_p (dst, PATTERN (p))) | |
1612 | break; | |
1613 | if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p))) | |
1614 | { | |
1615 | /* INSN was already checked to be movable when | |
1616 | we found no REG_DEAD note for src on it. */ | |
1617 | overlap = p; | |
1618 | src_note = find_reg_note (p, REG_DEAD, src); | |
1619 | } | |
1620 | ||
1621 | /* If we have passed a call instruction, and the pseudo-reg SRC is not | |
1622 | already live across a call, then don't perform the optimization. */ | |
1623 | if (GET_CODE (p) == CALL_INSN) | |
1624 | { | |
1625 | if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) | |
1626 | break; | |
1627 | ||
1628 | num_calls++; | |
1629 | ||
1630 | if (src_note) | |
1631 | s_num_calls++; | |
1632 | ||
1633 | } | |
1634 | } | |
1635 | ||
1636 | if (! success) | |
1637 | return 0; | |
1638 | ||
1639 | true_loop_depth = backward ? 2 - loop_depth : loop_depth; | |
1640 | ||
1641 | /* Remove the death note for DST from P. */ | |
1642 | remove_note (p, dst_note); | |
1643 | if (code == MINUS) | |
1644 | { | |
1645 | post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p); | |
1646 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) | |
1647 | if (search_end | |
1648 | && try_auto_increment (search_end, post_inc, 0, src, newconst, 1)) | |
1649 | post_inc = 0; | |
1650 | #endif | |
1651 | validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0); | |
1652 | REG_N_SETS (REGNO (src))++; | |
1653 | REG_N_REFS (REGNO (src)) += true_loop_depth; | |
1654 | REG_LIVE_LENGTH (REGNO (src))++; | |
1655 | } | |
1656 | if (overlap) | |
1657 | { | |
1658 | /* The lifetime of src and dest overlap, | |
1659 | but we can change this by moving insn. */ | |
1660 | rtx pat = PATTERN (insn); | |
1661 | if (src_note) | |
1662 | remove_note (overlap, src_note); | |
1663 | #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) | |
1664 | if (code == PLUS | |
1665 | && try_auto_increment (overlap, insn, 0, src, insn_const, 0)) | |
1666 | insn = overlap; | |
1667 | else | |
1668 | #endif | |
1669 | { | |
1670 | rtx notes = REG_NOTES (insn); | |
1671 | ||
1672 | emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn); | |
1673 | PUT_CODE (insn, NOTE); | |
1674 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1675 | NOTE_SOURCE_FILE (insn) = 0; | |
1676 | /* emit_insn_after_with_line_notes has no | |
1677 | return value, so search for the new insn. */ | |
1678 | for (insn = p; PATTERN (insn) != pat; ) | |
1679 | insn = PREV_INSN (insn); | |
1680 | ||
1681 | REG_NOTES (insn) = notes; | |
1682 | } | |
1683 | } | |
1684 | /* Sometimes we'd generate src = const; src += n; | |
1685 | if so, replace the instruction that set src | |
1686 | in the first place. */ | |
1687 | ||
1688 | if (! overlap && (code == PLUS || code == MINUS)) | |
1689 | { | |
1690 | rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); | |
1691 | rtx q, set2; | |
1692 | int num_calls2 = 0, s_length2 = 0; | |
1693 | ||
1694 | if (note && CONSTANT_P (XEXP (note, 0))) | |
1695 | { | |
1696 | for (q = PREV_INSN (insn); q; q = PREV_INSN(q)) | |
1697 | { | |
7bf825d2 JW |
1698 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN |
1699 | || (GET_CODE (q) == NOTE | |
1700 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1701 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
184bb750 R |
1702 | { |
1703 | q = 0; | |
1704 | break; | |
1705 | } | |
7bf825d2 JW |
1706 | |
1707 | /* ??? We can't scan past the end of a basic block without | |
1708 | updating the register lifetime info | |
1709 | (REG_DEAD/basic_block_live_at_start). | |
1710 | A CALL_INSN might be the last insn of a basic block, if | |
1711 | it is inside an EH region. There is no easy way to tell, | |
1712 | so we just always break when we see a CALL_INSN if | |
1713 | flag_exceptions is nonzero. */ | |
a1ecb5ca | 1714 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1715 | { |
1716 | q = 0; | |
1717 | break; | |
1718 | } | |
1719 | ||
184bb750 R |
1720 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1721 | continue; | |
1722 | s_length2++; | |
1723 | if (reg_set_p (src, q)) | |
1724 | { | |
1725 | set2 = single_set (q); | |
1726 | break; | |
1727 | } | |
1728 | if (reg_overlap_mentioned_p (src, PATTERN (q))) | |
1729 | { | |
1730 | q = 0; | |
1731 | break; | |
1732 | } | |
1733 | if (GET_CODE (p) == CALL_INSN) | |
1734 | num_calls2++; | |
1735 | } | |
1736 | if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2)) | |
1737 | && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0)) | |
1738 | { | |
1739 | PUT_CODE (q, NOTE); | |
1740 | NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED; | |
1741 | NOTE_SOURCE_FILE (q) = 0; | |
1742 | REG_N_SETS (REGNO (src))--; | |
1743 | REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2; | |
1744 | REG_N_REFS (REGNO (src)) -= true_loop_depth; | |
1745 | REG_LIVE_LENGTH (REGNO (src)) -= s_length2; | |
1746 | insn_const = 0; | |
1747 | } | |
1748 | } | |
1749 | } | |
1a56b81f AS |
1750 | |
1751 | /* Don't remove this seemingly useless if, it is needed to pair with the | |
1752 | else in the next two conditionally included code blocks. */ | |
1753 | if (0) | |
1754 | {;} | |
184bb750 R |
1755 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) |
1756 | else if ((code == PLUS || code == MINUS) && insn_const | |
1757 | && try_auto_increment (p, insn, 0, src, insn_const, 1)) | |
1758 | insn = p; | |
1759 | #endif | |
1760 | #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT) | |
1761 | else if (post_inc | |
1762 | && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0)) | |
1763 | post_inc = 0; | |
1764 | #endif | |
1765 | #if defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) | |
1766 | /* If post_inc still prevails, try to find an | |
1767 | insn where it can be used as a pre-in/decrement. | |
1768 | If code is MINUS, this was already tried. */ | |
1769 | if (post_inc && code == PLUS | |
1770 | /* Check that newconst is likely to be usable | |
1771 | in a pre-in/decrement before starting the search. */ | |
1772 | && (0 | |
1773 | #if defined (HAVE_PRE_INCREMENT) | |
1774 | || (newconst > 0 && newconst <= MOVE_MAX) | |
1775 | #endif | |
1776 | #if defined (HAVE_PRE_DECREMENT) | |
1777 | || (newconst < 0 && newconst >= -MOVE_MAX) | |
1778 | #endif | |
1779 | ) && exact_log2 (newconst)) | |
1780 | { | |
1781 | rtx q, inc_dest; | |
1782 | ||
1783 | inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src; | |
51723711 | 1784 | for (q = post_inc; (q = NEXT_INSN (q)); ) |
184bb750 R |
1785 | { |
1786 | if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN | |
1787 | || (GET_CODE (q) == NOTE | |
1788 | && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG | |
1789 | || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) | |
1790 | break; | |
7bf825d2 JW |
1791 | |
1792 | /* ??? We can't scan past the end of a basic block without updating | |
1793 | the register lifetime info (REG_DEAD/basic_block_live_at_start). | |
1794 | A CALL_INSN might be the last insn of a basic block, if it | |
1795 | is inside an EH region. There is no easy way to tell so we | |
1796 | just always break when we see a CALL_INSN if flag_exceptions | |
1797 | is nonzero. */ | |
a1ecb5ca | 1798 | if (flag_exceptions && GET_CODE (q) == CALL_INSN) |
7bf825d2 JW |
1799 | break; |
1800 | ||
184bb750 R |
1801 | if (GET_RTX_CLASS (GET_CODE (q)) != 'i') |
1802 | continue; | |
1803 | if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q)) | |
1804 | || reg_set_p (src, q))) | |
1805 | break; | |
1806 | if (reg_set_p (inc_dest, q)) | |
1807 | break; | |
1808 | if (reg_overlap_mentioned_p (inc_dest, PATTERN (q))) | |
1809 | { | |
1810 | try_auto_increment (q, post_inc, | |
1811 | post_inc_set, inc_dest, newconst, 1); | |
1812 | break; | |
1813 | } | |
1814 | } | |
1815 | } | |
1816 | #endif /* defined (HAVE_PRE_INCREMENT) || defined (HAVE_PRE_DECREMENT) */ | |
1817 | /* Move the death note for DST to INSN if it is used | |
1818 | there. */ | |
1819 | if (reg_overlap_mentioned_p (dst, PATTERN (insn))) | |
1820 | { | |
1821 | XEXP (dst_note, 1) = REG_NOTES (insn); | |
1822 | REG_NOTES (insn) = dst_note; | |
1823 | } | |
1824 | ||
1825 | if (src_note) | |
1826 | { | |
1827 | /* Move the death note for SRC from INSN to P. */ | |
1828 | if (! overlap) | |
1829 | remove_note (insn, src_note); | |
1830 | XEXP (src_note, 1) = REG_NOTES (p); | |
1831 | REG_NOTES (p) = src_note; | |
1832 | ||
1833 | REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls; | |
1834 | } | |
1835 | ||
1836 | REG_N_SETS (REGNO (src))++; | |
1837 | REG_N_SETS (REGNO (dst))--; | |
1838 | ||
1839 | REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls; | |
1840 | ||
1841 | REG_LIVE_LENGTH (REGNO (src)) += s_length; | |
1842 | if (REG_LIVE_LENGTH (REGNO (dst)) >= 0) | |
1843 | { | |
1844 | REG_LIVE_LENGTH (REGNO (dst)) -= length; | |
1845 | /* REG_LIVE_LENGTH is only an approximation after | |
1846 | combine if sched is not run, so make sure that we | |
1847 | still have a reasonable value. */ | |
1848 | if (REG_LIVE_LENGTH (REGNO (dst)) < 2) | |
1849 | REG_LIVE_LENGTH (REGNO (dst)) = 2; | |
1850 | } | |
1851 | ||
1852 | /* We assume that a register is used exactly once per | |
1853 | insn in the updates above. If this is not correct, | |
1854 | no great harm is done. */ | |
1855 | ||
1856 | REG_N_REFS (REGNO (src)) += 2 * true_loop_depth; | |
1857 | REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth; | |
1858 | ||
1859 | /* If that was the only time dst was set, | |
1860 | and dst was not live at the start of the | |
1861 | function, we know that we have no more | |
1862 | references to dst; clear REG_N_REFS so it | |
1863 | won't make reload do any work. */ | |
1864 | if (REG_N_SETS (REGNO (dst)) == 0 | |
1865 | && ! regno_uninitialized (REGNO (dst))) | |
1866 | REG_N_REFS (REGNO (dst)) = 0; | |
1867 | ||
1868 | if (regmove_dump_file) | |
1869 | fprintf (regmove_dump_file, | |
1870 | "Fixed operand %d of insn %d matching operand %d.\n", | |
1871 | operand_number, INSN_UID (insn), match_number); | |
1872 | return 1; | |
1873 | } | |
1874 | ||
1875 | ||
8c660648 JL |
1876 | /* return nonzero if X is stable but for mentioning SRC or mentioning / |
1877 | changing DST . If in doubt, presume it is unstable. */ | |
1878 | static int | |
1879 | stable_but_for_p (x, src, dst) | |
1880 | rtx x, src, dst; | |
1881 | { | |
1882 | RTX_CODE code = GET_CODE (x); | |
1883 | switch (GET_RTX_CLASS (code)) | |
1884 | { | |
1885 | case '<': case '1': case 'c': case '2': case 'b': case '3': | |
1886 | { | |
1887 | int i; | |
1888 | char *fmt = GET_RTX_FORMAT (code); | |
1889 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1890 | if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst)) | |
1891 | return 0; | |
1892 | return 1; | |
1893 | } | |
1894 | case 'o': | |
1895 | if (x == src || x == dst) | |
1896 | return 1; | |
1897 | /* fall through */ | |
1898 | default: | |
1899 | return ! rtx_unstable_p (x); | |
1900 | } | |
1901 | } | |
184bb750 | 1902 | |
b1a7d591 JW |
1903 | /* Test if regmove seems profitable for this target. Regmove is useful only |
1904 | if some common patterns are two address, i.e. require matching constraints, | |
1905 | so we check that condition here. */ | |
1906 | ||
184bb750 R |
1907 | int |
1908 | regmove_profitable_p () | |
1909 | { | |
1910 | #ifdef REGISTER_CONSTRAINTS | |
1911 | struct match match; | |
1912 | enum machine_mode mode; | |
1913 | optab tstoptab = add_optab; | |
1914 | do /* check add_optab and ashl_optab */ | |
1915 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
1916 | mode = GET_MODE_WIDER_MODE (mode)) | |
1917 | { | |
1918 | int icode = (int) tstoptab->handlers[(int) mode].insn_code; | |
1919 | rtx reg0, reg1, reg2, pat; | |
1920 | int i; | |
1921 | ||
1922 | if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing) | |
1923 | continue; | |
1924 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1925 | if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)) | |
1926 | break; | |
1927 | if (i + 2 >= FIRST_PSEUDO_REGISTER) | |
1928 | break; | |
38a448ca RH |
1929 | reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i); |
1930 | reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1); | |
1931 | reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2); | |
184bb750 R |
1932 | if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode) |
1933 | || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode) | |
1934 | || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode)) | |
1935 | break; | |
1936 | pat = GEN_FCN (icode) (reg0, reg1, reg2); | |
1937 | if (! pat) | |
1938 | continue; | |
1939 | if (GET_CODE (pat) == SEQUENCE) | |
1940 | pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1); | |
1941 | else | |
1942 | pat = make_insn_raw (pat); | |
1943 | if (! single_set (pat) | |
1944 | || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code) | |
1945 | /* Unexpected complexity; don't need to handle this unless | |
1946 | we find a machine where this occurs and regmove should | |
1947 | be enabled. */ | |
1948 | break; | |
1949 | if (find_matches (pat, &match) >= 0) | |
1950 | return 1; | |
1951 | break; | |
1952 | } | |
1953 | while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1)); | |
1954 | #endif /* REGISTER_CONSTRAINTS */ | |
1955 | return 0; | |
1956 | } |