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48227150 | 1 | /* Register to Stack convert for GNU compiler. |
af841dbd JL |
2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
3 | 1999, 2000 Free Software Foundation, Inc. | |
48227150 | 4 | |
a05924f9 | 5 | This file is part of GNU CC. |
48227150 | 6 | |
a05924f9 JH |
7 | GNU CC is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
48227150 | 11 | |
a05924f9 JH |
12 | GNU CC is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
48227150 | 16 | |
a05924f9 JH |
17 | You should have received a copy of the GNU General Public License |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
48227150 JVA |
21 | |
22 | /* This pass converts stack-like registers from the "flat register | |
23 | file" model that gcc uses, to a stack convention that the 387 uses. | |
24 | ||
25 | * The form of the input: | |
26 | ||
27 | On input, the function consists of insn that have had their | |
28 | registers fully allocated to a set of "virtual" registers. Note that | |
29 | the word "virtual" is used differently here than elsewhere in gcc: for | |
30 | each virtual stack reg, there is a hard reg, but the mapping between | |
31 | them is not known until this pass is run. On output, hard register | |
32 | numbers have been substituted, and various pop and exchange insns have | |
33 | been emitted. The hard register numbers and the virtual register | |
34 | numbers completely overlap - before this pass, all stack register | |
114cbee6 | 35 | numbers are virtual, and afterward they are all hard. |
48227150 JVA |
36 | |
37 | The virtual registers can be manipulated normally by gcc, and their | |
38 | semantics are the same as for normal registers. After the hard | |
39 | register numbers are substituted, the semantics of an insn containing | |
40 | stack-like regs are not the same as for an insn with normal regs: for | |
41 | instance, it is not safe to delete an insn that appears to be a no-op | |
42 | move. In general, no insn containing hard regs should be changed | |
43 | after this pass is done. | |
44 | ||
45 | * The form of the output: | |
46 | ||
47 | After this pass, hard register numbers represent the distance from | |
48 | the current top of stack to the desired register. A reference to | |
49 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
50 | represents the register just below that, and so forth. Also, REG_DEAD | |
51 | notes indicate whether or not a stack register should be popped. | |
52 | ||
53 | A "swap" insn looks like a parallel of two patterns, where each | |
54 | pattern is a SET: one sets A to B, the other B to A. | |
55 | ||
56 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
57 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
58 | will replace the existing stack top, not push a new value. | |
59 | ||
60 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
61 | SET_SRC is REG or MEM. | |
62 | ||
3f5cfed6 | 63 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
48227150 JVA |
64 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
65 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
66 | ||
67 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
68 | the top of the register stack. If there is no REG_DEAD note, then the | |
69 | insn represents a "dup" or a push of the current top of stack onto the | |
70 | stack. | |
71 | ||
72 | * Methodology: | |
73 | ||
74 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
75 | deleted and recreated from scratch. REG_DEAD is never created for a | |
76 | SET_DEST, only REG_UNUSED. | |
77 | ||
114cbee6 | 78 | * asm_operands: |
48227150 | 79 | |
114cbee6 RS |
80 | There are several rules on the usage of stack-like regs in |
81 | asm_operands insns. These rules apply only to the operands that are | |
82 | stack-like regs: | |
83 | ||
84 | 1. Given a set of input regs that die in an asm_operands, it is | |
85 | necessary to know which are implicitly popped by the asm, and | |
86 | which must be explicitly popped by gcc. | |
87 | ||
88 | An input reg that is implicitly popped by the asm must be | |
89 | explicitly clobbered, unless it is constrained to match an | |
90 | output operand. | |
91 | ||
92 | 2. For any input reg that is implicitly popped by an asm, it is | |
93 | necessary to know how to adjust the stack to compensate for the pop. | |
94 | If any non-popped input is closer to the top of the reg-stack than | |
95 | the implicitly popped reg, it would not be possible to know what the | |
96 | stack looked like - it's not clear how the rest of the stack "slides | |
97 | up". | |
98 | ||
99 | All implicitly popped input regs must be closer to the top of | |
100 | the reg-stack than any input that is not implicitly popped. | |
101 | ||
102 | 3. It is possible that if an input dies in an insn, reload might | |
103 | use the input reg for an output reload. Consider this example: | |
104 | ||
105 | asm ("foo" : "=t" (a) : "f" (b)); | |
106 | ||
107 | This asm says that input B is not popped by the asm, and that | |
108 | the asm pushes a result onto the reg-stack, ie, the stack is one | |
109 | deeper after the asm than it was before. But, it is possible that | |
110 | reload will think that it can use the same reg for both the input and | |
111 | the output, if input B dies in this insn. | |
112 | ||
113 | If any input operand uses the "f" constraint, all output reg | |
114 | constraints must use the "&" earlyclobber. | |
115 | ||
116 | The asm above would be written as | |
117 | ||
118 | asm ("foo" : "=&t" (a) : "f" (b)); | |
119 | ||
120 | 4. Some operands need to be in particular places on the stack. All | |
121 | output operands fall in this category - there is no other way to | |
122 | know which regs the outputs appear in unless the user indicates | |
123 | this in the constraints. | |
124 | ||
125 | Output operands must specifically indicate which reg an output | |
126 | appears in after an asm. "=f" is not allowed: the operand | |
127 | constraints must select a class with a single reg. | |
128 | ||
129 | 5. Output operands may not be "inserted" between existing stack regs. | |
130 | Since no 387 opcode uses a read/write operand, all output operands | |
131 | are dead before the asm_operands, and are pushed by the asm_operands. | |
132 | It makes no sense to push anywhere but the top of the reg-stack. | |
133 | ||
134 | Output operands must start at the top of the reg-stack: output | |
135 | operands may not "skip" a reg. | |
136 | ||
137 | 6. Some asm statements may need extra stack space for internal | |
138 | calculations. This can be guaranteed by clobbering stack registers | |
139 | unrelated to the inputs and outputs. | |
140 | ||
141 | Here are a couple of reasonable asms to want to write. This asm | |
142 | takes one input, which is internally popped, and produces two outputs. | |
143 | ||
144 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
145 | ||
146 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
147 | and replaces them with one output. The user must code the "st(1)" | |
148 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
149 | ||
150 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
151 | ||
a05924f9 | 152 | */ |
48227150 | 153 | \f |
48227150 | 154 | #include "config.h" |
670ee920 | 155 | #include "system.h" |
48227150 JVA |
156 | #include "tree.h" |
157 | #include "rtl.h" | |
6baf1cc8 | 158 | #include "tm_p.h" |
49ad7cfa | 159 | #include "function.h" |
114cbee6 | 160 | #include "insn-config.h" |
48227150 JVA |
161 | #include "regs.h" |
162 | #include "hard-reg-set.h" | |
163 | #include "flags.h" | |
841fc5a1 | 164 | #include "insn-flags.h" |
10f0ad3d | 165 | #include "toplev.h" |
e075ae69 | 166 | #include "recog.h" |
a05924f9 JH |
167 | #include "output.h" |
168 | #include "basic-block.h" | |
21b2cd73 | 169 | #include "varray.h" |
48227150 JVA |
170 | |
171 | #ifdef STACK_REGS | |
172 | ||
173 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
174 | ||
48227150 JVA |
175 | /* This is the basic stack record. TOP is an index into REG[] such |
176 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
177 | ||
eca31501 JVA |
178 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
179 | consists of placing each live reg in array `reg' and setting `top' | |
180 | appropriately. | |
181 | ||
182 | REG_SET indicates which registers are live. */ | |
48227150 JVA |
183 | |
184 | typedef struct stack_def | |
185 | { | |
186 | int top; /* index to top stack element */ | |
187 | HARD_REG_SET reg_set; /* set of live registers */ | |
188 | char reg[REG_STACK_SIZE]; /* register - stack mapping */ | |
189 | } *stack; | |
190 | ||
a05924f9 JH |
191 | /* This is used to carry information about basic blocks. It is |
192 | attached to the AUX field of the standard CFG block. */ | |
48227150 | 193 | |
a05924f9 JH |
194 | typedef struct block_info_def |
195 | { | |
196 | struct stack_def stack_in; /* Input stack configuration. */ | |
197 | HARD_REG_SET out_reg_set; /* Stack regs live on output. */ | |
198 | int done; /* True if block already converted. */ | |
199 | } *block_info; | |
48227150 | 200 | |
a05924f9 | 201 | #define BLOCK_INFO(B) ((block_info) (B)->aux) |
48227150 | 202 | |
a05924f9 JH |
203 | /* Passed to change_stack to indicate where to emit insns. */ |
204 | enum emit_where | |
205 | { | |
206 | EMIT_AFTER, | |
207 | EMIT_BEFORE | |
208 | }; | |
48227150 | 209 | |
21b2cd73 JH |
210 | /* We use this array to cache info about insns, because otherwise we |
211 | spend too much time in stack_regs_mentioned_p. | |
212 | ||
213 | Indexed by insn UIDs. A value of zero is uninitialized, one indicates | |
214 | the insn uses stack registers, two indicates the insn does not use | |
215 | stack registers. */ | |
216 | static varray_type stack_regs_mentioned_data; | |
217 | ||
a05924f9 JH |
218 | /* The block we're currently working on. */ |
219 | static basic_block current_block; | |
220 | ||
48227150 | 221 | /* This is the register file for all register after conversion */ |
99a59310 RK |
222 | static rtx |
223 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
224 | ||
225 | #define FP_MODE_REG(regno,mode) \ | |
226 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)]) | |
48227150 | 227 | |
a05924f9 JH |
228 | /* Used to initialize uninitialized registers. */ |
229 | static rtx nan; | |
48227150 | 230 | |
48227150 JVA |
231 | /* Forward declarations */ |
232 | ||
957e4763 KG |
233 | static int stack_regs_mentioned_p PARAMS ((rtx pat)); |
234 | static void straighten_stack PARAMS ((rtx, stack)); | |
235 | static void pop_stack PARAMS ((stack, int)); | |
236 | static rtx *get_true_reg PARAMS ((rtx *)); | |
237 | ||
238 | static int check_asm_stack_operands PARAMS ((rtx)); | |
239 | static int get_asm_operand_n_inputs PARAMS ((rtx)); | |
240 | static rtx stack_result PARAMS ((tree)); | |
241 | static void replace_reg PARAMS ((rtx *, int)); | |
242 | static void remove_regno_note PARAMS ((rtx, enum reg_note, int)); | |
243 | static int get_hard_regnum PARAMS ((stack, rtx)); | |
244 | static void delete_insn_for_stacker PARAMS ((rtx)); | |
245 | static rtx emit_pop_insn PARAMS ((rtx, stack, rtx, | |
a05924f9 | 246 | enum emit_where)); |
957e4763 KG |
247 | static void emit_swap_insn PARAMS ((rtx, stack, rtx)); |
248 | static void move_for_stack_reg PARAMS ((rtx, stack, rtx)); | |
249 | static int swap_rtx_condition_1 PARAMS ((rtx)); | |
250 | static int swap_rtx_condition PARAMS ((rtx)); | |
251 | static void compare_for_stack_reg PARAMS ((rtx, stack, rtx)); | |
252 | static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx)); | |
253 | static void subst_asm_stack_regs PARAMS ((rtx, stack)); | |
254 | static void subst_stack_regs PARAMS ((rtx, stack)); | |
255 | static void change_stack PARAMS ((rtx, stack, stack, | |
a05924f9 | 256 | enum emit_where)); |
957e4763 KG |
257 | static int convert_regs_entry PARAMS ((void)); |
258 | static void convert_regs_exit PARAMS ((void)); | |
259 | static int convert_regs_1 PARAMS ((FILE *, basic_block)); | |
260 | static int convert_regs_2 PARAMS ((FILE *, basic_block)); | |
261 | static int convert_regs PARAMS ((FILE *)); | |
262 | static void print_stack PARAMS ((FILE *, stack)); | |
c6991660 KG |
263 | static rtx next_flags_user PARAMS ((rtx)); |
264 | static void record_label_references PARAMS ((rtx, rtx)); | |
21b2cd73 | 265 | \f |
e075ae69 | 266 | /* Return non-zero if any stack register is mentioned somewhere within PAT. */ |
21b2cd73 JH |
267 | |
268 | static int | |
e075ae69 RH |
269 | stack_regs_mentioned_p (pat) |
270 | rtx pat; | |
21b2cd73 | 271 | { |
e075ae69 RH |
272 | register const char *fmt; |
273 | register int i; | |
274 | ||
275 | if (STACK_REG_P (pat)) | |
276 | return 1; | |
277 | ||
278 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
279 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
21b2cd73 | 280 | { |
e075ae69 RH |
281 | if (fmt[i] == 'E') |
282 | { | |
283 | register int j; | |
284 | ||
285 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
286 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
287 | return 1; | |
288 | } | |
289 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
290 | return 1; | |
21b2cd73 | 291 | } |
e075ae69 | 292 | |
21b2cd73 JH |
293 | return 0; |
294 | } | |
295 | ||
e075ae69 | 296 | /* Return nonzero if INSN mentions stacked registers, else return zero. */ |
21b2cd73 JH |
297 | |
298 | int | |
299 | stack_regs_mentioned (insn) | |
300 | rtx insn; | |
301 | { | |
e075ae69 RH |
302 | unsigned int uid, max; |
303 | int test; | |
304 | ||
21b2cd73 JH |
305 | if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') |
306 | return 0; | |
e075ae69 | 307 | |
21b2cd73 | 308 | uid = INSN_UID (insn); |
e075ae69 RH |
309 | max = VARRAY_SIZE (stack_regs_mentioned_data); |
310 | if (uid >= max) | |
311 | { | |
312 | /* Allocate some extra size to avoid too many reallocs, but | |
313 | do not grow too quickly. */ | |
314 | max = uid + uid / 20; | |
315 | VARRAY_GROW (stack_regs_mentioned_data, max); | |
316 | } | |
317 | ||
318 | test = VARRAY_CHAR (stack_regs_mentioned_data, uid); | |
319 | if (test == 0) | |
320 | { | |
321 | /* This insn has yet to be examined. Do so now. */ | |
322 | test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2; | |
323 | VARRAY_CHAR (stack_regs_mentioned_data, uid) = test; | |
324 | } | |
325 | ||
326 | return test == 1; | |
21b2cd73 | 327 | } |
e075ae69 RH |
328 | \f |
329 | static rtx ix86_flags_rtx; | |
21b2cd73 | 330 | |
e075ae69 RH |
331 | static rtx |
332 | next_flags_user (insn) | |
333 | rtx insn; | |
334 | { | |
335 | /* Search forward looking for the first use of this value. | |
336 | Stop at block boundaries. */ | |
337 | /* ??? This really cries for BLOCK_END! */ | |
338 | ||
339 | while (1) | |
340 | { | |
341 | insn = NEXT_INSN (insn); | |
342 | if (!insn) | |
343 | return NULL_RTX; | |
344 | ||
345 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
346 | && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn))) | |
347 | return insn; | |
348 | ||
349 | if (GET_CODE (insn) == JUMP_INSN | |
350 | || GET_CODE (insn) == CODE_LABEL | |
351 | || GET_CODE (insn) == CALL_INSN) | |
352 | return NULL_RTX; | |
353 | } | |
354 | } | |
48227150 | 355 | \f |
99a59310 RK |
356 | /* Reorganise the stack into ascending numbers, |
357 | after this insn. */ | |
358 | ||
359 | static void | |
360 | straighten_stack (insn, regstack) | |
361 | rtx insn; | |
362 | stack regstack; | |
363 | { | |
364 | struct stack_def temp_stack; | |
365 | int top; | |
366 | ||
8feb7351 JL |
367 | /* If there is only a single register on the stack, then the stack is |
368 | already in increasing order and no reorganization is needed. | |
369 | ||
370 | Similarly if the stack is empty. */ | |
371 | if (regstack->top <= 0) | |
372 | return; | |
373 | ||
d25cf633 | 374 | COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set); |
99a59310 RK |
375 | |
376 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
e075ae69 | 377 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; |
99a59310 | 378 | |
a05924f9 | 379 | change_stack (insn, regstack, &temp_stack, EMIT_AFTER); |
99a59310 | 380 | } |
7aa74e4c SC |
381 | |
382 | /* Pop a register from the stack */ | |
383 | ||
384 | static void | |
385 | pop_stack (regstack, regno) | |
386 | stack regstack; | |
387 | int regno; | |
388 | { | |
389 | int top = regstack->top; | |
390 | ||
391 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
392 | regstack->top--; | |
393 | /* If regno was not at the top of stack then adjust stack */ | |
394 | if (regstack->reg [top] != regno) | |
395 | { | |
396 | int i; | |
397 | for (i = regstack->top; i >= 0; i--) | |
398 | if (regstack->reg [i] == regno) | |
399 | { | |
400 | int j; | |
401 | for (j = i; j < top; j++) | |
402 | regstack->reg [j] = regstack->reg [j + 1]; | |
403 | break; | |
404 | } | |
405 | } | |
406 | } | |
99a59310 | 407 | \f |
48227150 JVA |
408 | /* Convert register usage from "flat" register file usage to a "stack |
409 | register file. FIRST is the first insn in the function, FILE is the | |
410 | dump file, if used. | |
411 | ||
e218fc41 | 412 | Construct a CFG and run life analysis. Then convert each insn one |
a05924f9 JH |
413 | by one. Run a last jump_optimize pass, if optimizing, to eliminate |
414 | code duplication created when the converter inserts pop insns on | |
415 | the edges. */ | |
48227150 JVA |
416 | |
417 | void | |
418 | reg_to_stack (first, file) | |
419 | rtx first; | |
420 | FILE *file; | |
421 | { | |
a05924f9 JH |
422 | int i; |
423 | int max_uid; | |
a05924f9 JH |
424 | block_info bi; |
425 | ||
426 | /* See if there is something to do. Flow analysis is quite | |
427 | expensive so we might save some compilation time. */ | |
428 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
429 | if (regs_ever_live[i]) | |
430 | break; | |
431 | if (i > LAST_STACK_REG) | |
432 | return; | |
99a59310 | 433 | |
e218fc41 RH |
434 | /* Ok, floating point instructions exist. If not optimizing, |
435 | build the CFG and run life analysis. */ | |
19d3c25c | 436 | find_basic_blocks (first, max_reg_num (), file); |
dcc6c741 RH |
437 | count_or_remove_death_notes (NULL, 1); |
438 | life_analysis (first, max_reg_num (), file, 0); | |
48227150 | 439 | |
a05924f9 | 440 | /* Set up block info for each basic block. */ |
ff154f78 | 441 | bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi)); |
a05924f9 JH |
442 | for (i = n_basic_blocks - 1; i >= 0; --i) |
443 | BASIC_BLOCK (i)->aux = bi + i; | |
444 | EXIT_BLOCK_PTR->aux = bi + n_basic_blocks; | |
48227150 | 445 | |
a05924f9 JH |
446 | /* Create the replacement registers up front. */ |
447 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
21b2cd73 | 448 | { |
a05924f9 JH |
449 | enum machine_mode mode; |
450 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); | |
451 | mode != VOIDmode; | |
452 | mode = GET_MODE_WIDER_MODE (mode)) | |
453 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
454 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); | |
455 | mode != VOIDmode; | |
456 | mode = GET_MODE_WIDER_MODE (mode)) | |
457 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); | |
21b2cd73 | 458 | } |
48227150 | 459 | |
a05924f9 | 460 | ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG); |
48227150 | 461 | |
a05924f9 | 462 | /* A QNaN for initializing uninitialized variables. |
48227150 | 463 | |
a05924f9 JH |
464 | ??? We can't load from constant memory in PIC mode, because |
465 | we're insertting these instructions before the prologue and | |
466 | the PIC register hasn't been set up. In that case, fall back | |
467 | on zero, which we can get from `ldz'. */ | |
48227150 | 468 | |
a05924f9 JH |
469 | if (flag_pic) |
470 | nan = CONST0_RTX (SFmode); | |
471 | else | |
472 | { | |
473 | nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000)); | |
474 | nan = force_const_mem (SFmode, nan); | |
475 | } | |
48227150 | 476 | |
a05924f9 JH |
477 | /* Allocate a cache for stack_regs_mentioned. */ |
478 | max_uid = get_max_uid (); | |
479 | VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1, | |
480 | "stack_regs_mentioned cache"); | |
48227150 | 481 | |
a05924f9 JH |
482 | if (convert_regs (file) && optimize) |
483 | { | |
484 | jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS, | |
485 | !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN); | |
a05924f9 | 486 | } |
21b2cd73 | 487 | |
ff154f78 | 488 | /* Clean up. */ |
21b2cd73 | 489 | VARRAY_FREE (stack_regs_mentioned_data); |
ff154f78 | 490 | free (bi); |
48227150 JVA |
491 | } |
492 | \f | |
493 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the | |
494 | label's chain of references, and note which insn contains each | |
0f41302f | 495 | reference. */ |
48227150 JVA |
496 | |
497 | static void | |
498 | record_label_references (insn, pat) | |
499 | rtx insn, pat; | |
500 | { | |
501 | register enum rtx_code code = GET_CODE (pat); | |
502 | register int i; | |
6f7d635c | 503 | register const char *fmt; |
48227150 JVA |
504 | |
505 | if (code == LABEL_REF) | |
506 | { | |
507 | register rtx label = XEXP (pat, 0); | |
508 | register rtx ref; | |
509 | ||
510 | if (GET_CODE (label) != CODE_LABEL) | |
511 | abort (); | |
512 | ||
0f41302f MS |
513 | /* If this is an undefined label, LABEL_REFS (label) contains |
514 | garbage. */ | |
13684373 RK |
515 | if (INSN_UID (label) == 0) |
516 | return; | |
517 | ||
0f41302f | 518 | /* Don't make a duplicate in the code_label's chain. */ |
48227150 | 519 | |
9f5cad05 JVA |
520 | for (ref = LABEL_REFS (label); |
521 | ref && ref != label; | |
522 | ref = LABEL_NEXTREF (ref)) | |
48227150 JVA |
523 | if (CONTAINING_INSN (ref) == insn) |
524 | return; | |
525 | ||
526 | CONTAINING_INSN (pat) = insn; | |
527 | LABEL_NEXTREF (pat) = LABEL_REFS (label); | |
528 | LABEL_REFS (label) = pat; | |
529 | ||
530 | return; | |
531 | } | |
532 | ||
533 | fmt = GET_RTX_FORMAT (code); | |
534 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
535 | { | |
536 | if (fmt[i] == 'e') | |
537 | record_label_references (insn, XEXP (pat, i)); | |
538 | if (fmt[i] == 'E') | |
539 | { | |
540 | register int j; | |
541 | for (j = 0; j < XVECLEN (pat, i); j++) | |
542 | record_label_references (insn, XVECEXP (pat, i, j)); | |
543 | } | |
544 | } | |
545 | } | |
546 | \f | |
547 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
548 | REG, possible enclosed by a conversion rtx, return the inner part of | |
0f41302f | 549 | PAT that stopped the search. */ |
48227150 JVA |
550 | |
551 | static rtx * | |
552 | get_true_reg (pat) | |
553 | rtx *pat; | |
554 | { | |
99a59310 | 555 | for (;;) |
e075ae69 | 556 | switch (GET_CODE (*pat)) |
99a59310 | 557 | { |
e075ae69 RH |
558 | case SUBREG: |
559 | /* Eliminate FP subregister accesses in favour of the | |
560 | actual FP register in use. */ | |
561 | { | |
562 | rtx subreg; | |
563 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
99a59310 RK |
564 | { |
565 | *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat), | |
566 | GET_MODE (subreg)); | |
e075ae69 | 567 | default: |
99a59310 RK |
568 | return pat; |
569 | } | |
e075ae69 RH |
570 | } |
571 | case FLOAT: | |
572 | case FIX: | |
573 | case FLOAT_EXTEND: | |
574 | pat = & XEXP (*pat, 0); | |
99a59310 | 575 | } |
48227150 | 576 | } |
48227150 | 577 | \f |
a05924f9 | 578 | /* There are many rules that an asm statement for stack-like regs must |
114cbee6 | 579 | follow. Those rules are explained at the top of this file: the rule |
0f41302f | 580 | numbers below refer to that explanation. */ |
114cbee6 | 581 | |
a05924f9 JH |
582 | static int |
583 | check_asm_stack_operands (insn) | |
114cbee6 | 584 | rtx insn; |
114cbee6 RS |
585 | { |
586 | int i; | |
114cbee6 RS |
587 | int n_clobbers; |
588 | int malformed_asm = 0; | |
589 | rtx body = PATTERN (insn); | |
590 | ||
a05924f9 JH |
591 | char reg_used_as_output[FIRST_PSEUDO_REGISTER]; |
592 | char implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
f62a15e3 | 593 | int alt; |
114cbee6 | 594 | |
a544cfd2 | 595 | rtx *clobber_reg = 0; |
f62a15e3 | 596 | int n_inputs, n_outputs; |
114cbee6 | 597 | |
0e7d0eb9 | 598 | /* Find out what the constraints require. If no constraint |
854dfdff | 599 | alternative matches, this asm is malformed. */ |
f62a15e3 BS |
600 | extract_insn (insn); |
601 | constrain_operands (1); | |
602 | alt = which_alternative; | |
603 | ||
604 | preprocess_constraints (); | |
605 | ||
606 | n_inputs = get_asm_operand_n_inputs (body); | |
1ccbefce | 607 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
608 | |
609 | if (alt < 0) | |
610 | { | |
611 | malformed_asm = 1; | |
612 | /* Avoid further trouble with this insn. */ | |
613 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); | |
a05924f9 | 614 | return 0; |
f62a15e3 | 615 | } |
114cbee6 | 616 | |
0f41302f | 617 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
618 | for (i = 0; i < recog_data.n_operands; i++) |
619 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
620 | && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) | |
621 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
622 | |
623 | /* Set up CLOBBER_REG. */ | |
624 | ||
625 | n_clobbers = 0; | |
114cbee6 RS |
626 | |
627 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 628 | { |
2a92c071 | 629 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); |
114cbee6 | 630 | |
3f5cfed6 JVA |
631 | for (i = 0; i < XVECLEN (body, 0); i++) |
632 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
633 | { | |
634 | rtx clobber = XVECEXP (body, 0, i); | |
635 | rtx reg = XEXP (clobber, 0); | |
114cbee6 | 636 | |
3f5cfed6 JVA |
637 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
638 | reg = SUBREG_REG (reg); | |
639 | ||
640 | if (STACK_REG_P (reg)) | |
641 | { | |
642 | clobber_reg[n_clobbers] = reg; | |
643 | n_clobbers++; | |
644 | } | |
645 | } | |
646 | } | |
114cbee6 RS |
647 | |
648 | /* Enforce rule #4: Output operands must specifically indicate which | |
649 | reg an output appears in after an asm. "=f" is not allowed: the | |
650 | operand constraints must select a class with a single reg. | |
651 | ||
652 | Also enforce rule #5: Output operands must start at the top of | |
0f41302f | 653 | the reg-stack: output operands may not "skip" a reg. */ |
114cbee6 | 654 | |
a05924f9 | 655 | memset (reg_used_as_output, 0, sizeof (reg_used_as_output)); |
114cbee6 | 656 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 657 | if (STACK_REG_P (recog_data.operand[i])) |
9c318306 | 658 | { |
f62a15e3 | 659 | if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1) |
9c318306 MH |
660 | { |
661 | error_for_asm (insn, "Output constraint %d must specify a single register", i); | |
662 | malformed_asm = 1; | |
663 | } | |
664 | else | |
1ccbefce | 665 | reg_used_as_output[REGNO (recog_data.operand[i])] = 1; |
9c318306 | 666 | } |
114cbee6 RS |
667 | |
668 | ||
669 | /* Search for first non-popped reg. */ | |
670 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
671 | if (! reg_used_as_output[i]) | |
672 | break; | |
673 | ||
674 | /* If there are any other popped regs, that's an error. */ | |
675 | for (; i < LAST_STACK_REG + 1; i++) | |
676 | if (reg_used_as_output[i]) | |
677 | break; | |
678 | ||
679 | if (i != LAST_STACK_REG + 1) | |
680 | { | |
681 | error_for_asm (insn, "Output regs must be grouped at top of stack"); | |
682 | malformed_asm = 1; | |
683 | } | |
684 | ||
685 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
686 | to the top of the reg-stack than any input that is not implicitly | |
0f41302f | 687 | popped. */ |
114cbee6 | 688 | |
a05924f9 | 689 | memset (implicitly_dies, 0, sizeof (implicitly_dies)); |
f62a15e3 | 690 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 691 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
692 | { |
693 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 694 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
695 | int j; |
696 | ||
697 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 698 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
699 | break; |
700 | ||
f62a15e3 | 701 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
1ccbefce | 702 | implicitly_dies[REGNO (recog_data.operand[i])] = 1; |
114cbee6 RS |
703 | } |
704 | ||
705 | /* Search for first non-popped reg. */ | |
706 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
707 | if (! implicitly_dies[i]) | |
708 | break; | |
709 | ||
710 | /* If there are any other popped regs, that's an error. */ | |
711 | for (; i < LAST_STACK_REG + 1; i++) | |
712 | if (implicitly_dies[i]) | |
713 | break; | |
714 | ||
715 | if (i != LAST_STACK_REG + 1) | |
716 | { | |
717 | error_for_asm (insn, | |
718 | "Implicitly popped regs must be grouped at top of stack"); | |
719 | malformed_asm = 1; | |
720 | } | |
721 | ||
722 | /* Enfore rule #3: If any input operand uses the "f" constraint, all | |
723 | output constraints must use the "&" earlyclobber. | |
724 | ||
a05924f9 | 725 | ??? Detect this more deterministically by having constrain_asm_operands |
0f41302f | 726 | record any earlyclobber. */ |
114cbee6 | 727 | |
f62a15e3 BS |
728 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
729 | if (recog_op_alt[i][alt].matches == -1) | |
114cbee6 RS |
730 | { |
731 | int j; | |
732 | ||
733 | for (j = 0; j < n_outputs; j++) | |
1ccbefce | 734 | if (operands_match_p (recog_data.operand[j], recog_data.operand[i])) |
114cbee6 RS |
735 | { |
736 | error_for_asm (insn, | |
737 | "Output operand %d must use `&' constraint", j); | |
738 | malformed_asm = 1; | |
739 | } | |
740 | } | |
741 | ||
742 | if (malformed_asm) | |
743 | { | |
744 | /* Avoid further trouble with this insn. */ | |
38a448ca | 745 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
a05924f9 | 746 | return 0; |
0e7d0eb9 | 747 | } |
48227150 | 748 | |
a05924f9 | 749 | return 1; |
48227150 JVA |
750 | } |
751 | \f | |
114cbee6 RS |
752 | /* Calculate the number of inputs and outputs in BODY, an |
753 | asm_operands. N_OPERANDS is the total number of operands, and | |
754 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
0f41302f | 755 | placed. */ |
114cbee6 | 756 | |
f62a15e3 BS |
757 | static int |
758 | get_asm_operand_n_inputs (body) | |
114cbee6 | 759 | rtx body; |
114cbee6 RS |
760 | { |
761 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) | |
f62a15e3 | 762 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); |
114cbee6 RS |
763 | |
764 | else if (GET_CODE (body) == ASM_OPERANDS) | |
f62a15e3 | 765 | return ASM_OPERANDS_INPUT_LENGTH (body); |
114cbee6 RS |
766 | |
767 | else if (GET_CODE (body) == PARALLEL | |
768 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) | |
f62a15e3 | 769 | return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); |
114cbee6 RS |
770 | |
771 | else if (GET_CODE (body) == PARALLEL | |
772 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) | |
f62a15e3 | 773 | return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); |
114cbee6 | 774 | |
f62a15e3 | 775 | abort (); |
114cbee6 | 776 | } |
0ab759e4 | 777 | |
96237362 | 778 | /* If current function returns its result in an fp stack register, |
9f9ed50a | 779 | return the REG. Otherwise, return 0. */ |
96237362 | 780 | |
99a59310 RK |
781 | static rtx |
782 | stack_result (decl) | |
96237362 RS |
783 | tree decl; |
784 | { | |
f099b1c9 | 785 | rtx result; |
96237362 | 786 | |
f099b1c9 JL |
787 | /* If the value is supposed to be returned in memory, then clearly |
788 | it is not returned in a stack register. */ | |
789 | if (aggregate_value_p (DECL_RESULT (decl))) | |
790 | return 0; | |
791 | ||
792 | result = DECL_RTL (DECL_RESULT (decl)); | |
793 | /* ?!? What is this code supposed to do? Can this code actually | |
794 | trigger if we kick out aggregates above? */ | |
96237362 | 795 | if (result != 0 |
9f9ed50a RK |
796 | && ! (GET_CODE (result) == REG |
797 | && REGNO (result) < FIRST_PSEUDO_REGISTER)) | |
96237362 RS |
798 | { |
799 | #ifdef FUNCTION_OUTGOING_VALUE | |
800 | result | |
801 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
802 | #else | |
803 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
804 | #endif | |
805 | } | |
806 | ||
9f9ed50a | 807 | return result != 0 && STACK_REG_P (result) ? result : 0; |
96237362 | 808 | } |
48227150 | 809 | \f |
48227150 | 810 | |
e075ae69 RH |
811 | /* |
812 | * This section deals with stack register substitution, and forms the second | |
813 | * pass over the RTL. | |
814 | */ | |
48227150 JVA |
815 | |
816 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
0f41302f | 817 | the desired hard REGNO. */ |
48227150 JVA |
818 | |
819 | static void | |
820 | replace_reg (reg, regno) | |
821 | rtx *reg; | |
822 | int regno; | |
823 | { | |
824 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG | |
825 | || ! STACK_REG_P (*reg)) | |
826 | abort (); | |
827 | ||
99a59310 | 828 | switch (GET_MODE_CLASS (GET_MODE (*reg))) |
e075ae69 RH |
829 | { |
830 | default: abort (); | |
831 | case MODE_FLOAT: | |
832 | case MODE_COMPLEX_FLOAT:; | |
833 | } | |
7d0e3dd4 | 834 | |
99a59310 | 835 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
48227150 JVA |
836 | } |
837 | ||
838 | /* Remove a note of type NOTE, which must be found, for register | |
0f41302f | 839 | number REGNO from INSN. Remove only one such note. */ |
48227150 JVA |
840 | |
841 | static void | |
842 | remove_regno_note (insn, note, regno) | |
843 | rtx insn; | |
844 | enum reg_note note; | |
845 | int regno; | |
846 | { | |
847 | register rtx *note_link, this; | |
848 | ||
849 | note_link = ®_NOTES(insn); | |
850 | for (this = *note_link; this; this = XEXP (this, 1)) | |
851 | if (REG_NOTE_KIND (this) == note | |
852 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
853 | { | |
854 | *note_link = XEXP (this, 1); | |
855 | return; | |
856 | } | |
857 | else | |
858 | note_link = &XEXP (this, 1); | |
859 | ||
860 | abort (); | |
861 | } | |
862 | ||
863 | /* Find the hard register number of virtual register REG in REGSTACK. | |
864 | The hard register number is relative to the top of the stack. -1 is | |
0f41302f | 865 | returned if the register is not found. */ |
48227150 JVA |
866 | |
867 | static int | |
868 | get_hard_regnum (regstack, reg) | |
869 | stack regstack; | |
870 | rtx reg; | |
871 | { | |
872 | int i; | |
873 | ||
874 | if (! STACK_REG_P (reg)) | |
875 | abort (); | |
876 | ||
877 | for (i = regstack->top; i >= 0; i--) | |
878 | if (regstack->reg[i] == REGNO (reg)) | |
879 | break; | |
880 | ||
881 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
882 | } | |
883 | ||
884 | /* Delete INSN from the RTL. Mark the insn, but don't remove it from | |
885 | the chain of insns. Doing so could confuse block_begin and block_end | |
0f41302f | 886 | if this were the only insn in the block. */ |
48227150 JVA |
887 | |
888 | static void | |
889 | delete_insn_for_stacker (insn) | |
890 | rtx insn; | |
891 | { | |
892 | PUT_CODE (insn, NOTE); | |
893 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
894 | NOTE_SOURCE_FILE (insn) = 0; | |
48227150 JVA |
895 | } |
896 | \f | |
897 | /* Emit an insn to pop virtual register REG before or after INSN. | |
898 | REGSTACK is the stack state after INSN and is updated to reflect this | |
e075ae69 RH |
899 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn |
900 | is represented as a SET whose destination is the register to be popped | |
901 | and source is the top of stack. A death note for the top of stack | |
0f41302f | 902 | cases the movdf pattern to pop. */ |
48227150 JVA |
903 | |
904 | static rtx | |
a05924f9 | 905 | emit_pop_insn (insn, regstack, reg, where) |
48227150 JVA |
906 | rtx insn; |
907 | stack regstack; | |
908 | rtx reg; | |
a05924f9 | 909 | enum emit_where where; |
48227150 JVA |
910 | { |
911 | rtx pop_insn, pop_rtx; | |
912 | int hard_regno; | |
913 | ||
914 | hard_regno = get_hard_regnum (regstack, reg); | |
915 | ||
916 | if (hard_regno < FIRST_STACK_REG) | |
917 | abort (); | |
918 | ||
e075ae69 RH |
919 | pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
920 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
48227150 | 921 | |
a05924f9 JH |
922 | if (where == EMIT_AFTER) |
923 | pop_insn = emit_block_insn_after (pop_rtx, insn, current_block); | |
924 | else | |
925 | pop_insn = emit_block_insn_before (pop_rtx, insn, current_block); | |
48227150 | 926 | |
c5c76735 JL |
927 | REG_NOTES (pop_insn) |
928 | = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode), | |
929 | REG_NOTES (pop_insn)); | |
48227150 JVA |
930 | |
931 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
932 | = regstack->reg[regstack->top]; | |
933 | regstack->top -= 1; | |
934 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
935 | ||
936 | return pop_insn; | |
937 | } | |
938 | \f | |
a05924f9 JH |
939 | /* Emit an insn before or after INSN to swap virtual register REG with |
940 | the top of stack. REGSTACK is the stack state before the swap, and | |
941 | is updated to reflect the swap. A swap insn is represented as a | |
942 | PARALLEL of two patterns: each pattern moves one reg to the other. | |
48227150 | 943 | |
0f41302f | 944 | If REG is already at the top of the stack, no insn is emitted. */ |
48227150 JVA |
945 | |
946 | static void | |
eca31501 | 947 | emit_swap_insn (insn, regstack, reg) |
48227150 JVA |
948 | rtx insn; |
949 | stack regstack; | |
eca31501 | 950 | rtx reg; |
48227150 | 951 | { |
eca31501 | 952 | int hard_regno; |
a05924f9 | 953 | rtx swap_rtx; |
eca31501 JVA |
954 | int tmp, other_reg; /* swap regno temps */ |
955 | rtx i1; /* the stack-reg insn prior to INSN */ | |
956 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
48227150 | 957 | |
eca31501 JVA |
958 | hard_regno = get_hard_regnum (regstack, reg); |
959 | ||
960 | if (hard_regno < FIRST_STACK_REG) | |
961 | abort (); | |
48227150 JVA |
962 | if (hard_regno == FIRST_STACK_REG) |
963 | return; | |
964 | ||
eca31501 | 965 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
48227150 | 966 | |
eca31501 JVA |
967 | tmp = regstack->reg[other_reg]; |
968 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
48227150 | 969 | regstack->reg[regstack->top] = tmp; |
48227150 | 970 | |
a05924f9 JH |
971 | /* Find the previous insn involving stack regs, but don't pass a |
972 | block boundary. */ | |
973 | i1 = NULL; | |
974 | if (current_block && insn != current_block->head) | |
eca31501 | 975 | { |
a05924f9 | 976 | rtx tmp = PREV_INSN (insn); |
3a6cc978 ZW |
977 | rtx limit = PREV_INSN (current_block->head); |
978 | while (tmp != limit) | |
a05924f9 JH |
979 | { |
980 | if (GET_CODE (tmp) == CODE_LABEL | |
981 | || (GET_CODE (tmp) == NOTE | |
982 | && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BASIC_BLOCK) | |
983 | || (GET_CODE (tmp) == INSN | |
984 | && stack_regs_mentioned (tmp))) | |
985 | { | |
986 | i1 = tmp; | |
987 | break; | |
988 | } | |
989 | tmp = PREV_INSN (tmp); | |
990 | } | |
991 | } | |
992 | ||
993 | if (i1 != NULL_RTX | |
994 | && (i1set = single_set (i1)) != NULL_RTX) | |
995 | { | |
996 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); | |
eca31501 | 997 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); |
48227150 | 998 | |
eca31501 | 999 | /* If the previous register stack push was from the reg we are to |
0f41302f | 1000 | swap with, omit the swap. */ |
eca31501 JVA |
1001 | |
1002 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG | |
1003 | && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1 | |
1004 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1005 | return; | |
1006 | ||
1007 | /* If the previous insn wrote to the reg we are to swap with, | |
1008 | omit the swap. */ | |
1009 | ||
1010 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno | |
1011 | && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG | |
1012 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1013 | return; | |
1014 | } | |
1015 | ||
e075ae69 RH |
1016 | swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode), |
1017 | FP_MODE_REG (FIRST_STACK_REG, XFmode)); | |
a05924f9 JH |
1018 | |
1019 | if (i1) | |
1020 | emit_block_insn_after (swap_rtx, i1, current_block); | |
1021 | else if (current_block) | |
3a6cc978 | 1022 | emit_block_insn_before (swap_rtx, current_block->head, current_block); |
a05924f9 JH |
1023 | else |
1024 | emit_insn_before (swap_rtx, insn); | |
48227150 JVA |
1025 | } |
1026 | \f | |
1027 | /* Handle a move to or from a stack register in PAT, which is in INSN. | |
0f41302f | 1028 | REGSTACK is the current stack. */ |
48227150 JVA |
1029 | |
1030 | static void | |
1031 | move_for_stack_reg (insn, regstack, pat) | |
1032 | rtx insn; | |
1033 | stack regstack; | |
1034 | rtx pat; | |
1035 | { | |
99a59310 RK |
1036 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
1037 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
1038 | rtx src, dest; | |
48227150 JVA |
1039 | rtx note; |
1040 | ||
99a59310 RK |
1041 | src = *psrc; dest = *pdest; |
1042 | ||
1043 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
48227150 JVA |
1044 | { |
1045 | /* Write from one stack reg to another. If SRC dies here, then | |
0f41302f | 1046 | just change the register mapping and delete the insn. */ |
48227150 | 1047 | |
99a59310 | 1048 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1049 | if (note) |
1050 | { | |
1051 | int i; | |
1052 | ||
0f41302f | 1053 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
99a59310 | 1054 | if (REGNO (src) == REGNO (dest)) |
48227150 JVA |
1055 | abort (); |
1056 | ||
1057 | for (i = regstack->top; i >= 0; i--) | |
99a59310 | 1058 | if (regstack->reg[i] == REGNO (src)) |
48227150 JVA |
1059 | break; |
1060 | ||
0f41302f | 1061 | /* The source must be live, and the dest must be dead. */ |
99a59310 | 1062 | if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1063 | abort (); |
1064 | ||
1065 | /* It is possible that the dest is unused after this insn. | |
0f41302f | 1066 | If so, just pop the src. */ |
48227150 | 1067 | |
99a59310 | 1068 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
48227150 | 1069 | { |
a05924f9 | 1070 | emit_pop_insn (insn, regstack, src, EMIT_AFTER); |
48227150 JVA |
1071 | |
1072 | delete_insn_for_stacker (insn); | |
1073 | return; | |
1074 | } | |
1075 | ||
99a59310 | 1076 | regstack->reg[i] = REGNO (dest); |
48227150 | 1077 | |
99a59310 RK |
1078 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
1079 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
48227150 JVA |
1080 | |
1081 | delete_insn_for_stacker (insn); | |
1082 | ||
1083 | return; | |
1084 | } | |
1085 | ||
0f41302f | 1086 | /* The source reg does not die. */ |
48227150 JVA |
1087 | |
1088 | /* If this appears to be a no-op move, delete it, or else it | |
1089 | will confuse the machine description output patterns. But if | |
1090 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
0f41302f | 1091 | for REG_UNUSED will not work for deleted insns. */ |
48227150 | 1092 | |
99a59310 | 1093 | if (REGNO (src) == REGNO (dest)) |
48227150 | 1094 | { |
99a59310 | 1095 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
a05924f9 | 1096 | emit_pop_insn (insn, regstack, dest, EMIT_AFTER); |
48227150 JVA |
1097 | |
1098 | delete_insn_for_stacker (insn); | |
1099 | return; | |
1100 | } | |
1101 | ||
1102 | /* The destination ought to be dead */ | |
99a59310 | 1103 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1104 | abort (); |
1105 | ||
99a59310 | 1106 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
48227150 | 1107 | |
99a59310 RK |
1108 | regstack->reg[++regstack->top] = REGNO (dest); |
1109 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1110 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1111 | } |
99a59310 | 1112 | else if (STACK_REG_P (src)) |
48227150 JVA |
1113 | { |
1114 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1115 | only top of stack may be saved, emit an exchange first if | |
0f41302f | 1116 | needs be. */ |
48227150 | 1117 | |
99a59310 | 1118 | emit_swap_insn (insn, regstack, src); |
48227150 | 1119 | |
99a59310 | 1120 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1121 | if (note) |
1122 | { | |
1123 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1124 | regstack->top--; | |
99a59310 | 1125 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
48227150 | 1126 | } |
314d1f3c | 1127 | else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1) |
b40b8b06 JVA |
1128 | { |
1129 | /* A 387 cannot write an XFmode value to a MEM without | |
1130 | clobbering the source reg. The output code can handle | |
1131 | this by reading back the value from the MEM. | |
1132 | But it is more efficient to use a temp register if one is | |
1133 | available. Push the source value here if the register | |
1134 | stack is not full, and then write the value to memory via | |
1135 | a pop. */ | |
1136 | rtx push_rtx, push_insn; | |
99a59310 | 1137 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode); |
b40b8b06 JVA |
1138 | |
1139 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); | |
1140 | push_insn = emit_insn_before (push_rtx, insn); | |
38a448ca RH |
1141 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, |
1142 | REG_NOTES (insn)); | |
b40b8b06 | 1143 | } |
48227150 | 1144 | |
99a59310 | 1145 | replace_reg (psrc, FIRST_STACK_REG); |
48227150 | 1146 | } |
99a59310 | 1147 | else if (STACK_REG_P (dest)) |
48227150 JVA |
1148 | { |
1149 | /* Load from MEM, or possibly integer REG or constant, into the | |
1150 | stack regs. The actual target is always the top of the | |
1151 | stack. The stack mapping is changed to reflect that DEST is | |
1152 | now at top of stack. */ | |
1153 | ||
1154 | /* The destination ought to be dead */ | |
99a59310 | 1155 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1156 | abort (); |
1157 | ||
1158 | if (regstack->top >= REG_STACK_SIZE) | |
1159 | abort (); | |
1160 | ||
99a59310 RK |
1161 | regstack->reg[++regstack->top] = REGNO (dest); |
1162 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1163 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 JVA |
1164 | } |
1165 | else | |
1166 | abort (); | |
1167 | } | |
1168 | \f | |
e075ae69 RH |
1169 | /* Swap the condition on a branch, if there is one. Return true if we |
1170 | found a condition to swap. False if the condition was not used as | |
1171 | such. */ | |
1172 | ||
1173 | static int | |
1174 | swap_rtx_condition_1 (pat) | |
eca31501 JVA |
1175 | rtx pat; |
1176 | { | |
6f7d635c | 1177 | register const char *fmt; |
e075ae69 | 1178 | register int i, r = 0; |
eca31501 JVA |
1179 | |
1180 | if (GET_RTX_CLASS (GET_CODE (pat)) == '<') | |
1181 | { | |
1182 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
e075ae69 | 1183 | r = 1; |
eca31501 | 1184 | } |
e075ae69 | 1185 | else |
eca31501 | 1186 | { |
e075ae69 RH |
1187 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1188 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
eca31501 | 1189 | { |
e075ae69 RH |
1190 | if (fmt[i] == 'E') |
1191 | { | |
1192 | register int j; | |
eca31501 | 1193 | |
e075ae69 RH |
1194 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
1195 | r |= swap_rtx_condition_1 (XVECEXP (pat, i, j)); | |
1196 | } | |
1197 | else if (fmt[i] == 'e') | |
1198 | r |= swap_rtx_condition_1 (XEXP (pat, i)); | |
eca31501 | 1199 | } |
eca31501 | 1200 | } |
e075ae69 RH |
1201 | |
1202 | return r; | |
1203 | } | |
1204 | ||
1205 | static int | |
1206 | swap_rtx_condition (insn) | |
1207 | rtx insn; | |
1208 | { | |
1209 | rtx pat = PATTERN (insn); | |
1210 | ||
1211 | /* We're looking for a single set to cc0 or an HImode temporary. */ | |
1212 | ||
1213 | if (GET_CODE (pat) == SET | |
1214 | && GET_CODE (SET_DEST (pat)) == REG | |
1215 | && REGNO (SET_DEST (pat)) == FLAGS_REG) | |
1216 | { | |
1217 | insn = next_flags_user (insn); | |
1218 | if (insn == NULL_RTX) | |
1219 | return 0; | |
1220 | pat = PATTERN (insn); | |
1221 | } | |
1222 | ||
1223 | /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're | |
1224 | not doing anything with the cc value right now. We may be able to | |
1225 | search for one though. */ | |
1226 | ||
1227 | if (GET_CODE (pat) == SET | |
1228 | && GET_CODE (SET_SRC (pat)) == UNSPEC | |
1229 | && XINT (SET_SRC (pat), 1) == 9) | |
1230 | { | |
1231 | rtx dest = SET_DEST (pat); | |
1232 | ||
1233 | /* Search forward looking for the first use of this value. | |
1234 | Stop at block boundaries. */ | |
1235 | /* ??? This really cries for BLOCK_END! */ | |
1236 | while (1) | |
1237 | { | |
1238 | insn = NEXT_INSN (insn); | |
1239 | if (insn == NULL_RTX) | |
1240 | return 0; | |
1241 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1242 | && reg_mentioned_p (dest, insn)) | |
1243 | break; | |
1244 | if (GET_CODE (insn) == JUMP_INSN) | |
1245 | return 0; | |
1246 | if (GET_CODE (insn) == CODE_LABEL) | |
1247 | return 0; | |
1248 | } | |
1249 | ||
1250 | /* So we've found the insn using this value. If it is anything | |
1251 | other than sahf, aka unspec 10, or the value does not die | |
1252 | (meaning we'd have to search further), then we must give up. */ | |
1253 | pat = PATTERN (insn); | |
1254 | if (GET_CODE (pat) != SET | |
1255 | || GET_CODE (SET_SRC (pat)) != UNSPEC | |
1256 | || XINT (SET_SRC (pat), 1) != 10 | |
1257 | || ! dead_or_set_p (insn, dest)) | |
1258 | return 0; | |
1259 | ||
1260 | /* Now we are prepared to handle this as a normal cc0 setter. */ | |
1261 | insn = next_flags_user (insn); | |
1262 | if (insn == NULL_RTX) | |
1263 | return 0; | |
1264 | pat = PATTERN (insn); | |
1265 | } | |
1266 | ||
1267 | return swap_rtx_condition_1 (pat); | |
eca31501 JVA |
1268 | } |
1269 | ||
48227150 JVA |
1270 | /* Handle a comparison. Special care needs to be taken to avoid |
1271 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
1272 | ||
e075ae69 | 1273 | Also, a pop insn may need to be emitted. The 387 does have an |
48227150 JVA |
1274 | `fcompp' insn that can pop two regs, but it is sometimes too expensive |
1275 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
e075ae69 | 1276 | set up. */ |
48227150 JVA |
1277 | |
1278 | static void | |
e075ae69 | 1279 | compare_for_stack_reg (insn, regstack, pat_src) |
48227150 JVA |
1280 | rtx insn; |
1281 | stack regstack; | |
e075ae69 | 1282 | rtx pat_src; |
48227150 JVA |
1283 | { |
1284 | rtx *src1, *src2; | |
1285 | rtx src1_note, src2_note; | |
e075ae69 | 1286 | rtx flags_user; |
914ec131 | 1287 | |
e075ae69 RH |
1288 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1289 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1290 | flags_user = next_flags_user (insn); | |
48227150 | 1291 | |
eca31501 | 1292 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
0f41302f | 1293 | registers that die in this insn - move those to stack top first. */ |
e075ae69 RH |
1294 | if ((! STACK_REG_P (*src1) |
1295 | || (STACK_REG_P (*src2) | |
1296 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
1297 | && swap_rtx_condition (insn)) | |
eca31501 | 1298 | { |
e075ae69 RH |
1299 | rtx temp; |
1300 | temp = XEXP (pat_src, 0); | |
1301 | XEXP (pat_src, 0) = XEXP (pat_src, 1); | |
1302 | XEXP (pat_src, 1) = temp; | |
48227150 | 1303 | |
e075ae69 RH |
1304 | src1 = get_true_reg (&XEXP (pat_src, 0)); |
1305 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
dc78213e | 1306 | |
b9342cdf | 1307 | INSN_CODE (insn) = -1; |
eca31501 | 1308 | } |
48227150 | 1309 | |
0f41302f | 1310 | /* We will fix any death note later. */ |
48227150 JVA |
1311 | |
1312 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1313 | ||
1314 | if (STACK_REG_P (*src2)) | |
1315 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1316 | else | |
eca31501 | 1317 | src2_note = NULL_RTX; |
48227150 | 1318 | |
e075ae69 | 1319 | emit_swap_insn (insn, regstack, *src1); |
48227150 JVA |
1320 | |
1321 | replace_reg (src1, FIRST_STACK_REG); | |
1322 | ||
1323 | if (STACK_REG_P (*src2)) | |
e075ae69 | 1324 | replace_reg (src2, get_hard_regnum (regstack, *src2)); |
48227150 JVA |
1325 | |
1326 | if (src1_note) | |
1327 | { | |
7aa74e4c | 1328 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
48227150 | 1329 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
48227150 JVA |
1330 | } |
1331 | ||
1332 | /* If the second operand dies, handle that. But if the operands are | |
1333 | the same stack register, don't bother, because only one death is | |
0f41302f | 1334 | needed, and it was just handled. */ |
48227150 JVA |
1335 | |
1336 | if (src2_note | |
eca31501 | 1337 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
48227150 JVA |
1338 | && REGNO (*src1) == REGNO (*src2))) |
1339 | { | |
1340 | /* As a special case, two regs may die in this insn if src2 is | |
1341 | next to top of stack and the top of stack also dies. Since | |
1342 | we have already popped src1, "next to top of stack" is really | |
0f41302f | 1343 | at top (FIRST_STACK_REG) now. */ |
48227150 JVA |
1344 | |
1345 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
1346 | && src1_note) | |
1347 | { | |
7aa74e4c | 1348 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
48227150 | 1349 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
48227150 JVA |
1350 | } |
1351 | else | |
1352 | { | |
e075ae69 RH |
1353 | /* The 386 can only represent death of the first operand in |
1354 | the case handled above. In all other cases, emit a separate | |
1355 | pop and remove the death note from here. */ | |
1356 | ||
1357 | /* link_cc0_insns (insn); */ | |
1358 | ||
1359 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); | |
48227150 | 1360 | |
e075ae69 | 1361 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), |
a05924f9 | 1362 | EMIT_AFTER); |
48227150 JVA |
1363 | } |
1364 | } | |
1365 | } | |
1366 | \f | |
1367 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
0f41302f | 1368 | is the current register layout. */ |
48227150 JVA |
1369 | |
1370 | static void | |
1371 | subst_stack_regs_pat (insn, regstack, pat) | |
1372 | rtx insn; | |
1373 | stack regstack; | |
1374 | rtx pat; | |
1375 | { | |
1376 | rtx *dest, *src; | |
48227150 | 1377 | |
a05924f9 JH |
1378 | switch (GET_CODE (pat)) |
1379 | { | |
1380 | case USE: | |
1381 | /* Deaths in USE insns can happen in non optimizing compilation. | |
1382 | Handle them by popping the dying register. */ | |
1383 | src = get_true_reg (&XEXP (pat, 0)); | |
1384 | if (STACK_REG_P (*src) | |
1385 | && find_regno_note (insn, REG_DEAD, REGNO (*src))) | |
1386 | { | |
eedf2f55 | 1387 | emit_pop_insn (insn, regstack, *src, EMIT_AFTER); |
a05924f9 JH |
1388 | return; |
1389 | } | |
eedf2f55 | 1390 | /* ??? Uninitialized USE should not happen. */ |
a05924f9 | 1391 | else if (get_hard_regnum (regstack, *src) == -1) |
eedf2f55 | 1392 | abort(); |
a05924f9 | 1393 | break; |
48227150 | 1394 | |
a05924f9 JH |
1395 | case CLOBBER: |
1396 | { | |
1397 | rtx note; | |
48227150 | 1398 | |
a05924f9 JH |
1399 | dest = get_true_reg (&XEXP (pat, 0)); |
1400 | if (STACK_REG_P (*dest)) | |
1401 | { | |
1402 | note = find_reg_note (insn, REG_DEAD, *dest); | |
bd695e1e RH |
1403 | |
1404 | if (pat != PATTERN (insn)) | |
1405 | { | |
1406 | /* The fix_truncdi_1 pattern wants to be able to allocate | |
1407 | it's own scratch register. It does this by clobbering | |
1408 | an fp reg so that it is assured of an empty reg-stack | |
1409 | register. If the register is live, kill it now. | |
1410 | Remove the DEAD/UNUSED note so we don't try to kill it | |
1411 | later too. */ | |
1412 | ||
1413 | if (note) | |
1414 | emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE); | |
1415 | else | |
1416 | { | |
1417 | note = find_reg_note (insn, REG_UNUSED, *dest); | |
1418 | if (!note) | |
1419 | abort (); | |
1420 | } | |
1421 | remove_note (insn, note); | |
1422 | replace_reg (dest, LAST_STACK_REG); | |
1423 | } | |
a05924f9 JH |
1424 | else |
1425 | { | |
bd695e1e RH |
1426 | /* A top-level clobber with no REG_DEAD, and no hard-regnum |
1427 | indicates an uninitialized value. Because reload removed | |
1428 | all other clobbers, this must be due to a function | |
1429 | returning without a value. Load up a NaN. */ | |
1430 | ||
1431 | if (! note | |
1432 | && get_hard_regnum (regstack, *dest) == -1) | |
1433 | { | |
1434 | pat = gen_rtx_SET (VOIDmode, | |
1435 | FP_MODE_REG (REGNO (*dest), SFmode), | |
1436 | nan); | |
1437 | PATTERN (insn) = pat; | |
1438 | move_for_stack_reg (insn, regstack, pat); | |
1439 | } | |
a05924f9 | 1440 | } |
a05924f9 | 1441 | } |
48227150 | 1442 | break; |
a05924f9 | 1443 | } |
48227150 | 1444 | |
a05924f9 JH |
1445 | case SET: |
1446 | { | |
1447 | rtx *src1 = (rtx *) NULL_PTR, *src2; | |
1448 | rtx src1_note, src2_note; | |
1449 | rtx pat_src; | |
1450 | ||
1451 | dest = get_true_reg (&SET_DEST (pat)); | |
1452 | src = get_true_reg (&SET_SRC (pat)); | |
1453 | pat_src = SET_SRC (pat); | |
1454 | ||
1455 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ | |
1456 | if (STACK_REG_P (*src) | |
1457 | || (STACK_REG_P (*dest) | |
1458 | && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM | |
1459 | || GET_CODE (*src) == CONST_DOUBLE))) | |
1460 | { | |
1461 | move_for_stack_reg (insn, regstack, pat); | |
1462 | break; | |
1463 | } | |
48227150 | 1464 | |
a05924f9 JH |
1465 | switch (GET_CODE (pat_src)) |
1466 | { | |
1467 | case COMPARE: | |
1468 | compare_for_stack_reg (insn, regstack, pat_src); | |
1469 | break; | |
48227150 | 1470 | |
a05924f9 JH |
1471 | case CALL: |
1472 | { | |
1473 | int count; | |
1474 | for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); | |
1475 | --count >= 0;) | |
1476 | { | |
1477 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
1478 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
1479 | } | |
1480 | } | |
1481 | replace_reg (dest, FIRST_STACK_REG); | |
1482 | break; | |
48227150 | 1483 | |
a05924f9 JH |
1484 | case REG: |
1485 | /* This is a `tstM2' case. */ | |
1486 | if (*dest != cc0_rtx) | |
1487 | abort (); | |
1488 | src1 = src; | |
48227150 | 1489 | |
a05924f9 | 1490 | /* Fall through. */ |
48227150 | 1491 | |
a05924f9 JH |
1492 | case FLOAT_TRUNCATE: |
1493 | case SQRT: | |
1494 | case ABS: | |
1495 | case NEG: | |
1496 | /* These insns only operate on the top of the stack. DEST might | |
1497 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
1498 | possible that the tstM case results in a REG_DEAD note on the | |
1499 | source. */ | |
48227150 | 1500 | |
a05924f9 JH |
1501 | if (src1 == 0) |
1502 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
48227150 | 1503 | |
a05924f9 | 1504 | emit_swap_insn (insn, regstack, *src1); |
48227150 | 1505 | |
a05924f9 | 1506 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
48227150 | 1507 | |
a05924f9 JH |
1508 | if (STACK_REG_P (*dest)) |
1509 | replace_reg (dest, FIRST_STACK_REG); | |
48227150 | 1510 | |
a05924f9 JH |
1511 | if (src1_note) |
1512 | { | |
1513 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1514 | regstack->top--; | |
1515 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1516 | } | |
48227150 | 1517 | |
a05924f9 JH |
1518 | replace_reg (src1, FIRST_STACK_REG); |
1519 | break; | |
48227150 | 1520 | |
a05924f9 JH |
1521 | case MINUS: |
1522 | case DIV: | |
1523 | /* On i386, reversed forms of subM3 and divM3 exist for | |
1524 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
1525 | can be used. */ | |
1526 | case MULT: | |
1527 | case PLUS: | |
1528 | /* These insns can accept the top of stack as a destination | |
1529 | from a stack reg or mem, or can use the top of stack as a | |
1530 | source and some other stack register (possibly top of stack) | |
1531 | as a destination. */ | |
1532 | ||
1533 | src1 = get_true_reg (&XEXP (pat_src, 0)); | |
1534 | src2 = get_true_reg (&XEXP (pat_src, 1)); | |
1535 | ||
1536 | /* We will fix any death note later. */ | |
1537 | ||
1538 | if (STACK_REG_P (*src1)) | |
1539 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
1540 | else | |
1541 | src1_note = NULL_RTX; | |
1542 | if (STACK_REG_P (*src2)) | |
1543 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
1544 | else | |
1545 | src2_note = NULL_RTX; | |
48227150 | 1546 | |
a05924f9 JH |
1547 | /* If either operand is not a stack register, then the dest |
1548 | must be top of stack. */ | |
48227150 | 1549 | |
a05924f9 | 1550 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) |
eca31501 | 1551 | emit_swap_insn (insn, regstack, *dest); |
a05924f9 JH |
1552 | else |
1553 | { | |
1554 | /* Both operands are REG. If neither operand is already | |
1555 | at the top of stack, choose to make the one that is the dest | |
1556 | the new top of stack. */ | |
48227150 | 1557 | |
a05924f9 | 1558 | int src1_hard_regnum, src2_hard_regnum; |
48227150 | 1559 | |
a05924f9 JH |
1560 | src1_hard_regnum = get_hard_regnum (regstack, *src1); |
1561 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
1562 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) | |
1563 | abort (); | |
48227150 | 1564 | |
a05924f9 JH |
1565 | if (src1_hard_regnum != FIRST_STACK_REG |
1566 | && src2_hard_regnum != FIRST_STACK_REG) | |
1567 | emit_swap_insn (insn, regstack, *dest); | |
48227150 | 1568 | } |
a05924f9 JH |
1569 | |
1570 | if (STACK_REG_P (*src1)) | |
1571 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1572 | if (STACK_REG_P (*src2)) | |
1573 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
1574 | ||
1575 | if (src1_note) | |
48227150 | 1576 | { |
a05924f9 | 1577 | rtx src1_reg = XEXP (src1_note, 0); |
48227150 | 1578 | |
a05924f9 JH |
1579 | /* If the register that dies is at the top of stack, then |
1580 | the destination is somewhere else - merely substitute it. | |
1581 | But if the reg that dies is not at top of stack, then | |
1582 | move the top of stack to the dead reg, as though we had | |
1583 | done the insn and then a store-with-pop. */ | |
48227150 | 1584 | |
a05924f9 JH |
1585 | if (REGNO (src1_reg) == regstack->reg[regstack->top]) |
1586 | { | |
1587 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1588 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1589 | } | |
1590 | else | |
1591 | { | |
1592 | int regno = get_hard_regnum (regstack, src1_reg); | |
48227150 | 1593 | |
a05924f9 JH |
1594 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
1595 | replace_reg (dest, regno); | |
1596 | ||
1597 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1598 | = regstack->reg[regstack->top]; | |
1599 | } | |
1600 | ||
1601 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1602 | REGNO (XEXP (src1_note, 0))); | |
1603 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1604 | regstack->top--; | |
1605 | } | |
1606 | else if (src2_note) | |
48227150 | 1607 | { |
a05924f9 JH |
1608 | rtx src2_reg = XEXP (src2_note, 0); |
1609 | if (REGNO (src2_reg) == regstack->reg[regstack->top]) | |
1610 | { | |
1611 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1612 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
1613 | } | |
1614 | else | |
1615 | { | |
1616 | int regno = get_hard_regnum (regstack, src2_reg); | |
1617 | ||
1618 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1619 | replace_reg (dest, regno); | |
1620 | ||
1621 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
1622 | = regstack->reg[regstack->top]; | |
1623 | } | |
1624 | ||
1625 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
1626 | REGNO (XEXP (src2_note, 0))); | |
1627 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
1628 | regstack->top--; | |
48227150 JVA |
1629 | } |
1630 | else | |
1631 | { | |
48227150 | 1632 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); |
a05924f9 | 1633 | replace_reg (dest, get_hard_regnum (regstack, *dest)); |
48227150 | 1634 | } |
caa6ec8d JH |
1635 | |
1636 | /* Keep operand 1 maching with destination. */ | |
1637 | if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c' | |
1638 | && REG_P (*src1) && REG_P (*src2) | |
1639 | && REGNO (*src1) != REGNO (*dest)) | |
1640 | { | |
1641 | rtx tmp = *src1; | |
1642 | *src1 = *src2; | |
1643 | *src2 = tmp; | |
1644 | } | |
a05924f9 | 1645 | break; |
48227150 | 1646 | |
a05924f9 JH |
1647 | case UNSPEC: |
1648 | switch (XINT (pat_src, 1)) | |
1649 | { | |
1650 | case 1: /* sin */ | |
1651 | case 2: /* cos */ | |
1652 | /* These insns only operate on the top of the stack. */ | |
0e7d0eb9 | 1653 | |
a05924f9 | 1654 | src1 = get_true_reg (&XVECEXP (pat_src, 0, 0)); |
0e7d0eb9 | 1655 | |
a05924f9 | 1656 | emit_swap_insn (insn, regstack, *src1); |
0e7d0eb9 | 1657 | |
a05924f9 | 1658 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
0e7d0eb9 | 1659 | |
a05924f9 JH |
1660 | if (STACK_REG_P (*dest)) |
1661 | replace_reg (dest, FIRST_STACK_REG); | |
0e7d0eb9 | 1662 | |
a05924f9 JH |
1663 | if (src1_note) |
1664 | { | |
1665 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
1666 | regstack->top--; | |
1667 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
1668 | } | |
0e7d0eb9 | 1669 | |
a05924f9 JH |
1670 | replace_reg (src1, FIRST_STACK_REG); |
1671 | break; | |
0e7d0eb9 | 1672 | |
a05924f9 JH |
1673 | case 10: |
1674 | /* (unspec [(unspec [(compare ..)] 9)] 10) | |
1675 | Unspec 9 is fnstsw; unspec 10 is sahf. The combination | |
1676 | matches the PPRO fcomi instruction. */ | |
0e7d0eb9 | 1677 | |
a05924f9 JH |
1678 | pat_src = XVECEXP (pat_src, 0, 0); |
1679 | if (GET_CODE (pat_src) != UNSPEC | |
1680 | || XINT (pat_src, 1) != 9) | |
1681 | abort (); | |
1682 | /* FALLTHRU */ | |
e075ae69 | 1683 | |
a05924f9 JH |
1684 | case 9: |
1685 | /* (unspec [(compare ..)] 9) */ | |
1686 | /* Combined fcomp+fnstsw generated for doing well with | |
1687 | CSE. When optimizing this would have been broken | |
1688 | up before now. */ | |
e075ae69 | 1689 | |
a05924f9 JH |
1690 | pat_src = XVECEXP (pat_src, 0, 0); |
1691 | if (GET_CODE (pat_src) != COMPARE) | |
1692 | abort (); | |
e075ae69 | 1693 | |
a05924f9 JH |
1694 | compare_for_stack_reg (insn, regstack, pat_src); |
1695 | break; | |
e075ae69 | 1696 | |
a05924f9 JH |
1697 | default: |
1698 | abort (); | |
1699 | } | |
e075ae69 RH |
1700 | break; |
1701 | ||
a05924f9 JH |
1702 | case IF_THEN_ELSE: |
1703 | /* This insn requires the top of stack to be the destination. */ | |
0e7d0eb9 | 1704 | |
a05924f9 JH |
1705 | /* If the comparison operator is an FP comparison operator, |
1706 | it is handled correctly by compare_for_stack_reg () who | |
1707 | will move the destination to the top of stack. But if the | |
1708 | comparison operator is not an FP comparison operator, we | |
1709 | have to handle it here. */ | |
1710 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG | |
1711 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
1712 | emit_swap_insn (insn, regstack, *dest); | |
4e97601f | 1713 | |
a05924f9 JH |
1714 | src1 = get_true_reg (&XEXP (pat_src, 1)); |
1715 | src2 = get_true_reg (&XEXP (pat_src, 2)); | |
49fa02d9 | 1716 | |
a05924f9 JH |
1717 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); |
1718 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
4e97601f | 1719 | |
a05924f9 JH |
1720 | { |
1721 | rtx src_note [3]; | |
1722 | int i; | |
4e97601f | 1723 | |
a05924f9 JH |
1724 | src_note[0] = 0; |
1725 | src_note[1] = src1_note; | |
1726 | src_note[2] = src2_note; | |
54552651 | 1727 | |
a05924f9 JH |
1728 | if (STACK_REG_P (*src1)) |
1729 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
1730 | if (STACK_REG_P (*src2)) | |
1731 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
4e97601f | 1732 | |
a05924f9 JH |
1733 | for (i = 1; i <= 2; i++) |
1734 | if (src_note [i]) | |
4e97601f | 1735 | { |
a05924f9 JH |
1736 | int regno = REGNO (XEXP (src_note[i], 0)); |
1737 | ||
1738 | /* If the register that dies is not at the top of | |
1739 | stack, then move the top of stack to the dead reg */ | |
1740 | if (regno != regstack->reg[regstack->top]) | |
1741 | { | |
1742 | remove_regno_note (insn, REG_DEAD, regno); | |
1743 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
1744 | EMIT_AFTER); | |
1745 | } | |
1746 | else | |
1747 | { | |
1748 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
1749 | replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG); | |
1750 | regstack->top--; | |
1751 | } | |
4e97601f | 1752 | } |
a05924f9 | 1753 | } |
4e97601f | 1754 | |
a05924f9 JH |
1755 | /* Make dest the top of stack. Add dest to regstack if |
1756 | not present. */ | |
1757 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) | |
1758 | regstack->reg[++regstack->top] = REGNO (*dest); | |
1759 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
1760 | replace_reg (dest, FIRST_STACK_REG); | |
1761 | break; | |
914ec131 | 1762 | |
a05924f9 JH |
1763 | default: |
1764 | abort (); | |
1765 | } | |
4e97601f | 1766 | break; |
48227150 | 1767 | } |
a05924f9 JH |
1768 | |
1769 | default: | |
1770 | break; | |
1771 | } | |
48227150 JVA |
1772 | } |
1773 | \f | |
114cbee6 RS |
1774 | /* Substitute hard regnums for any stack regs in INSN, which has |
1775 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
f62a15e3 | 1776 | before the insn, and is updated with changes made here. |
114cbee6 RS |
1777 | |
1778 | There are several requirements and assumptions about the use of | |
1779 | stack-like regs in asm statements. These rules are enforced by | |
1780 | record_asm_stack_regs; see comments there for details. Any | |
1781 | asm_operands left in the RTL at this point may be assume to meet the | |
561cf7b1 | 1782 | requirements, since record_asm_stack_regs removes any problem asm. */ |
114cbee6 | 1783 | |
561cf7b1 | 1784 | static void |
f62a15e3 | 1785 | subst_asm_stack_regs (insn, regstack) |
114cbee6 RS |
1786 | rtx insn; |
1787 | stack regstack; | |
114cbee6 | 1788 | { |
114cbee6 | 1789 | rtx body = PATTERN (insn); |
f62a15e3 | 1790 | int alt; |
114cbee6 RS |
1791 | |
1792 | rtx *note_reg; /* Array of note contents */ | |
1793 | rtx **note_loc; /* Address of REG field of each note */ | |
1794 | enum reg_note *note_kind; /* The type of each note */ | |
1795 | ||
a544cfd2 KG |
1796 | rtx *clobber_reg = 0; |
1797 | rtx **clobber_loc = 0; | |
114cbee6 RS |
1798 | |
1799 | struct stack_def temp_stack; | |
1800 | int n_notes; | |
1801 | int n_clobbers; | |
1802 | rtx note; | |
1803 | int i; | |
f62a15e3 | 1804 | int n_inputs, n_outputs; |
114cbee6 | 1805 | |
a05924f9 JH |
1806 | if (! check_asm_stack_operands (insn)) |
1807 | return; | |
1808 | ||
114cbee6 RS |
1809 | /* Find out what the constraints required. If no constraint |
1810 | alternative matches, that is a compiler bug: we should have caught | |
a05924f9 | 1811 | such an insn in check_asm_stack_operands. */ |
f62a15e3 BS |
1812 | extract_insn (insn); |
1813 | constrain_operands (1); | |
1814 | alt = which_alternative; | |
1815 | ||
1816 | preprocess_constraints (); | |
114cbee6 | 1817 | |
f62a15e3 | 1818 | n_inputs = get_asm_operand_n_inputs (body); |
1ccbefce | 1819 | n_outputs = recog_data.n_operands - n_inputs; |
f62a15e3 BS |
1820 | |
1821 | if (alt < 0) | |
114cbee6 RS |
1822 | abort (); |
1823 | ||
0f41302f | 1824 | /* Strip SUBREGs here to make the following code simpler. */ |
1ccbefce RH |
1825 | for (i = 0; i < recog_data.n_operands; i++) |
1826 | if (GET_CODE (recog_data.operand[i]) == SUBREG | |
1827 | && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG) | |
114cbee6 | 1828 | { |
1ccbefce RH |
1829 | recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]); |
1830 | recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]); | |
114cbee6 RS |
1831 | } |
1832 | ||
1833 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
1834 | ||
1835 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1836 | i++; | |
1837 | ||
1838 | note_reg = (rtx *) alloca (i * sizeof (rtx)); | |
1839 | note_loc = (rtx **) alloca (i * sizeof (rtx *)); | |
1840 | note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); | |
1841 | ||
1842 | n_notes = 0; | |
1843 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1844 | { | |
1845 | rtx reg = XEXP (note, 0); | |
1846 | rtx *loc = & XEXP (note, 0); | |
1847 | ||
1848 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
1849 | { | |
1850 | loc = & SUBREG_REG (reg); | |
1851 | reg = SUBREG_REG (reg); | |
1852 | } | |
1853 | ||
1854 | if (STACK_REG_P (reg) | |
1855 | && (REG_NOTE_KIND (note) == REG_DEAD | |
1856 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
1857 | { | |
1858 | note_reg[n_notes] = reg; | |
1859 | note_loc[n_notes] = loc; | |
1860 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
1861 | n_notes++; | |
1862 | } | |
1863 | } | |
1864 | ||
1865 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
1866 | ||
1867 | n_clobbers = 0; | |
114cbee6 RS |
1868 | |
1869 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 | 1870 | { |
2a92c071 GS |
1871 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx)); |
1872 | clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
114cbee6 | 1873 | |
3f5cfed6 JVA |
1874 | for (i = 0; i < XVECLEN (body, 0); i++) |
1875 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
1876 | { | |
1877 | rtx clobber = XVECEXP (body, 0, i); | |
1878 | rtx reg = XEXP (clobber, 0); | |
1879 | rtx *loc = & XEXP (clobber, 0); | |
114cbee6 | 1880 | |
3f5cfed6 JVA |
1881 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
1882 | { | |
1883 | loc = & SUBREG_REG (reg); | |
1884 | reg = SUBREG_REG (reg); | |
1885 | } | |
1886 | ||
1887 | if (STACK_REG_P (reg)) | |
1888 | { | |
1889 | clobber_reg[n_clobbers] = reg; | |
1890 | clobber_loc[n_clobbers] = loc; | |
1891 | n_clobbers++; | |
1892 | } | |
1893 | } | |
1894 | } | |
114cbee6 | 1895 | |
a05924f9 | 1896 | temp_stack = *regstack; |
114cbee6 RS |
1897 | |
1898 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
1899 | ||
f62a15e3 | 1900 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 1901 | if (STACK_REG_P (recog_data.operand[i]) |
f62a15e3 BS |
1902 | && reg_class_subset_p (recog_op_alt[i][alt].class, |
1903 | FLOAT_REGS) | |
1904 | && recog_op_alt[i][alt].class != FLOAT_REGS) | |
114cbee6 RS |
1905 | { |
1906 | /* If an operand needs to be in a particular reg in | |
1907 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
1ccbefce RH |
1908 | these constraints are for single register classes, and |
1909 | reload guaranteed that operand[i] is already in that class, | |
1910 | we can just use REGNO (recog_data.operand[i]) to know which | |
1911 | actual reg this operand needs to be in. */ | |
114cbee6 | 1912 | |
1ccbefce | 1913 | int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]); |
114cbee6 RS |
1914 | |
1915 | if (regno < 0) | |
1916 | abort (); | |
1917 | ||
1ccbefce | 1918 | if (regno != REGNO (recog_data.operand[i])) |
114cbee6 | 1919 | { |
1ccbefce RH |
1920 | /* recog_data.operand[i] is not in the right place. Find |
1921 | it and swap it with whatever is already in I's place. | |
1922 | K is where recog_data.operand[i] is now. J is where it | |
1923 | should be. */ | |
114cbee6 RS |
1924 | int j, k, temp; |
1925 | ||
1926 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
1927 | j = (temp_stack.top | |
1ccbefce | 1928 | - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG)); |
114cbee6 RS |
1929 | |
1930 | temp = temp_stack.reg[k]; | |
1931 | temp_stack.reg[k] = temp_stack.reg[j]; | |
1932 | temp_stack.reg[j] = temp; | |
1933 | } | |
1934 | } | |
1935 | ||
a05924f9 | 1936 | /* Emit insns before INSN to make sure the reg-stack is in the right |
114cbee6 RS |
1937 | order. */ |
1938 | ||
a05924f9 | 1939 | change_stack (insn, regstack, &temp_stack, EMIT_BEFORE); |
114cbee6 RS |
1940 | |
1941 | /* Make the needed input register substitutions. Do death notes and | |
0f41302f | 1942 | clobbers too, because these are for inputs, not outputs. */ |
114cbee6 | 1943 | |
f62a15e3 | 1944 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 1945 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 | 1946 | { |
1ccbefce | 1947 | int regnum = get_hard_regnum (regstack, recog_data.operand[i]); |
114cbee6 RS |
1948 | |
1949 | if (regnum < 0) | |
1950 | abort (); | |
1951 | ||
1ccbefce | 1952 | replace_reg (recog_data.operand_loc[i], regnum); |
114cbee6 RS |
1953 | } |
1954 | ||
1955 | for (i = 0; i < n_notes; i++) | |
1956 | if (note_kind[i] == REG_DEAD) | |
1957 | { | |
1958 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
1959 | ||
1960 | if (regnum < 0) | |
1961 | abort (); | |
1962 | ||
1963 | replace_reg (note_loc[i], regnum); | |
1964 | } | |
1965 | ||
1966 | for (i = 0; i < n_clobbers; i++) | |
1967 | { | |
1968 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
1969 | Don't try to replace it in that case. */ | |
1970 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
1971 | ||
1972 | if (regnum >= 0) | |
1973 | { | |
1974 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
1975 | that these regs can't be MODE_INT and will abort. Just put | |
1976 | the right reg there without calling replace_reg. */ | |
1977 | ||
99a59310 | 1978 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
114cbee6 RS |
1979 | } |
1980 | } | |
1981 | ||
0f41302f | 1982 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
114cbee6 | 1983 | |
f62a15e3 | 1984 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 1985 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
1986 | { |
1987 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 1988 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
1989 | int j; |
1990 | ||
1991 | for (j = 0; j < n_clobbers; j++) | |
1ccbefce | 1992 | if (operands_match_p (clobber_reg[j], recog_data.operand[i])) |
114cbee6 RS |
1993 | break; |
1994 | ||
f62a15e3 | 1995 | if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0) |
114cbee6 | 1996 | { |
1ccbefce RH |
1997 | /* recog_data.operand[i] might not be at the top of stack. |
1998 | But that's OK, because all we need to do is pop the | |
1999 | right number of regs off of the top of the reg-stack. | |
2000 | record_asm_stack_regs guaranteed that all implicitly | |
2001 | popped regs were grouped at the top of the reg-stack. */ | |
114cbee6 RS |
2002 | |
2003 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2004 | regstack->reg[regstack->top]); | |
2005 | regstack->top--; | |
2006 | } | |
2007 | } | |
2008 | ||
2009 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2010 | Note that there isn't any need to substitute register numbers. | |
0f41302f | 2011 | ??? Explain why this is true. */ |
114cbee6 RS |
2012 | |
2013 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2014 | { | |
2015 | /* See if there is an output for this hard reg. */ | |
2016 | int j; | |
2017 | ||
2018 | for (j = 0; j < n_outputs; j++) | |
1ccbefce RH |
2019 | if (STACK_REG_P (recog_data.operand[j]) |
2020 | && REGNO (recog_data.operand[j]) == i) | |
114cbee6 RS |
2021 | { |
2022 | regstack->reg[++regstack->top] = i; | |
2023 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2024 | break; | |
2025 | } | |
2026 | } | |
2027 | ||
2028 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2029 | input that the asm didn't implicitly pop. If the asm didn't | |
3f5cfed6 | 2030 | implicitly pop an input reg, that reg will still be live. |
114cbee6 RS |
2031 | |
2032 | Note that we can't use find_regno_note here: the register numbers | |
2033 | in the death notes have already been substituted. */ | |
2034 | ||
3f5cfed6 | 2035 | for (i = 0; i < n_outputs; i++) |
1ccbefce | 2036 | if (STACK_REG_P (recog_data.operand[i])) |
3f5cfed6 JVA |
2037 | { |
2038 | int j; | |
2039 | ||
2040 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2041 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 JVA |
2042 | && note_kind[j] == REG_UNUSED) |
2043 | { | |
1ccbefce | 2044 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2045 | EMIT_AFTER); |
3f5cfed6 JVA |
2046 | break; |
2047 | } | |
2048 | } | |
2049 | ||
f62a15e3 | 2050 | for (i = n_outputs; i < n_outputs + n_inputs; i++) |
1ccbefce | 2051 | if (STACK_REG_P (recog_data.operand[i])) |
114cbee6 RS |
2052 | { |
2053 | int j; | |
2054 | ||
2055 | for (j = 0; j < n_notes; j++) | |
1ccbefce | 2056 | if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j]) |
3f5cfed6 | 2057 | && note_kind[j] == REG_DEAD |
f62a15e3 | 2058 | && TEST_HARD_REG_BIT (regstack->reg_set, |
1ccbefce | 2059 | REGNO (recog_data.operand[i]))) |
114cbee6 | 2060 | { |
1ccbefce | 2061 | insn = emit_pop_insn (insn, regstack, recog_data.operand[i], |
a05924f9 | 2062 | EMIT_AFTER); |
114cbee6 RS |
2063 | break; |
2064 | } | |
2065 | } | |
2066 | } | |
2067 | \f | |
48227150 JVA |
2068 | /* Substitute stack hard reg numbers for stack virtual registers in |
2069 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2070 | current stack content. Insns may be emitted as needed to arrange the | |
561cf7b1 | 2071 | stack for the 387 based on the contents of the insn. */ |
f37eb5cb | 2072 | |
561cf7b1 | 2073 | static void |
48227150 JVA |
2074 | subst_stack_regs (insn, regstack) |
2075 | rtx insn; | |
2076 | stack regstack; | |
2077 | { | |
2078 | register rtx *note_link, note; | |
2079 | register int i; | |
2080 | ||
99a59310 | 2081 | if (GET_CODE (insn) == CALL_INSN) |
e075ae69 RH |
2082 | { |
2083 | int top = regstack->top; | |
48227150 | 2084 | |
e075ae69 RH |
2085 | /* If there are any floating point parameters to be passed in |
2086 | registers for this call, make sure they are in the right | |
2087 | order. */ | |
48227150 | 2088 | |
e075ae69 RH |
2089 | if (top >= 0) |
2090 | { | |
2091 | straighten_stack (PREV_INSN (insn), regstack); | |
99a59310 | 2092 | |
e075ae69 | 2093 | /* Now mark the arguments as dead after the call. */ |
99a59310 | 2094 | |
e075ae69 RH |
2095 | while (regstack->top >= 0) |
2096 | { | |
2097 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2098 | regstack->top--; | |
2099 | } | |
2100 | } | |
2101 | } | |
48227150 JVA |
2102 | |
2103 | /* Do the actual substitution if any stack regs are mentioned. | |
2104 | Since we only record whether entire insn mentions stack regs, and | |
2105 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2106 | we must check each pattern in a parallel here. A call_value_pop could | |
0f41302f | 2107 | fail otherwise. */ |
48227150 | 2108 | |
21b2cd73 | 2109 | if (stack_regs_mentioned (insn)) |
48227150 | 2110 | { |
f62a15e3 | 2111 | int n_operands = asm_noperands (PATTERN (insn)); |
114cbee6 RS |
2112 | if (n_operands >= 0) |
2113 | { | |
2114 | /* This insn is an `asm' with operands. Decode the operands, | |
2115 | decide how many are inputs, and do register substitution. | |
0f41302f | 2116 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
114cbee6 | 2117 | |
f62a15e3 | 2118 | subst_asm_stack_regs (insn, regstack); |
561cf7b1 | 2119 | return; |
114cbee6 RS |
2120 | } |
2121 | ||
48227150 | 2122 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
c166a311 | 2123 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
48227150 JVA |
2124 | { |
2125 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
e075ae69 RH |
2126 | subst_stack_regs_pat (insn, regstack, |
2127 | XVECEXP (PATTERN (insn), 0, i)); | |
48227150 JVA |
2128 | } |
2129 | else | |
2130 | subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
2131 | } | |
2132 | ||
2133 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
0f41302f | 2134 | REG_UNUSED will already have been dealt with, so just return. */ |
48227150 | 2135 | |
2289ec9d | 2136 | if (GET_CODE (insn) == NOTE) |
561cf7b1 | 2137 | return; |
48227150 JVA |
2138 | |
2139 | /* If there is a REG_UNUSED note on a stack register on this insn, | |
2140 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2141 | since the form of the newly emitted pop insn references the reg, | |
0f41302f | 2142 | making it no longer `unset'. */ |
48227150 JVA |
2143 | |
2144 | note_link = ®_NOTES(insn); | |
2145 | for (note = *note_link; note; note = XEXP (note, 1)) | |
2146 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2147 | { | |
2148 | *note_link = XEXP (note, 1); | |
a05924f9 | 2149 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER); |
48227150 JVA |
2150 | } |
2151 | else | |
2152 | note_link = &XEXP (note, 1); | |
2153 | } | |
2154 | \f | |
2155 | /* Change the organization of the stack so that it fits a new basic | |
2156 | block. Some registers might have to be popped, but there can never be | |
2157 | a register live in the new block that is not now live. | |
2158 | ||
a05924f9 JH |
2159 | Insert any needed insns before or after INSN, as indicated by |
2160 | WHERE. OLD is the original stack layout, and NEW is the desired | |
2161 | form. OLD is updated to reflect the code emitted, ie, it will be | |
2162 | the same as NEW upon return. | |
48227150 JVA |
2163 | |
2164 | This function will not preserve block_end[]. But that information | |
0f41302f | 2165 | is no longer needed once this has executed. */ |
48227150 JVA |
2166 | |
2167 | static void | |
a05924f9 | 2168 | change_stack (insn, old, new, where) |
48227150 JVA |
2169 | rtx insn; |
2170 | stack old; | |
2171 | stack new; | |
a05924f9 | 2172 | enum emit_where where; |
48227150 JVA |
2173 | { |
2174 | int reg; | |
a05924f9 | 2175 | int update_end = 0; |
48227150 | 2176 | |
a05924f9 JH |
2177 | /* We will be inserting new insns "backwards". If we are to insert |
2178 | after INSN, find the next insn, and insert before it. */ | |
48227150 | 2179 | |
a05924f9 JH |
2180 | if (where == EMIT_AFTER) |
2181 | { | |
2182 | if (current_block && current_block->end == insn) | |
2183 | update_end = 1; | |
2184 | insn = NEXT_INSN (insn); | |
2185 | } | |
48227150 | 2186 | |
0f41302f | 2187 | /* Pop any registers that are not needed in the new block. */ |
48227150 JVA |
2188 | |
2189 | for (reg = old->top; reg >= 0; reg--) | |
2190 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
99a59310 | 2191 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), |
a05924f9 | 2192 | EMIT_BEFORE); |
48227150 JVA |
2193 | |
2194 | if (new->top == -2) | |
2195 | { | |
2196 | /* If the new block has never been processed, then it can inherit | |
0f41302f | 2197 | the old stack order. */ |
48227150 JVA |
2198 | |
2199 | new->top = old->top; | |
a05924f9 | 2200 | memcpy (new->reg, old->reg, sizeof (new->reg)); |
48227150 JVA |
2201 | } |
2202 | else | |
2203 | { | |
2204 | /* This block has been entered before, and we must match the | |
0f41302f | 2205 | previously selected stack order. */ |
48227150 JVA |
2206 | |
2207 | /* By now, the only difference should be the order of the stack, | |
0f41302f | 2208 | not their depth or liveliness. */ |
48227150 JVA |
2209 | |
2210 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
48227150 | 2211 | abort (); |
48227150 | 2212 | win: |
48227150 JVA |
2213 | if (old->top != new->top) |
2214 | abort (); | |
2215 | ||
80832cf2 HB |
2216 | /* If the stack is not empty (new->top != -1), loop here emitting |
2217 | swaps until the stack is correct. | |
2218 | ||
2219 | The worst case number of swaps emitted is N + 2, where N is the | |
48227150 JVA |
2220 | depth of the stack. In some cases, the reg at the top of |
2221 | stack may be correct, but swapped anyway in order to fix | |
2222 | other regs. But since we never swap any other reg away from | |
0f41302f | 2223 | its correct slot, this algorithm will converge. */ |
48227150 | 2224 | |
80832cf2 HB |
2225 | if (new->top != -1) |
2226 | do | |
2227 | { | |
2228 | /* Swap the reg at top of stack into the position it is | |
2229 | supposed to be in, until the correct top of stack appears. */ | |
48227150 | 2230 | |
80832cf2 HB |
2231 | while (old->reg[old->top] != new->reg[new->top]) |
2232 | { | |
2233 | for (reg = new->top; reg >= 0; reg--) | |
2234 | if (new->reg[reg] == old->reg[old->top]) | |
2235 | break; | |
48227150 | 2236 | |
80832cf2 HB |
2237 | if (reg == -1) |
2238 | abort (); | |
48227150 | 2239 | |
80832cf2 HB |
2240 | emit_swap_insn (insn, old, |
2241 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2242 | } | |
48227150 | 2243 | |
80832cf2 | 2244 | /* See if any regs remain incorrect. If so, bring an |
48227150 | 2245 | incorrect reg to the top of stack, and let the while loop |
0f41302f | 2246 | above fix it. */ |
48227150 | 2247 | |
80832cf2 HB |
2248 | for (reg = new->top; reg >= 0; reg--) |
2249 | if (new->reg[reg] != old->reg[reg]) | |
2250 | { | |
2251 | emit_swap_insn (insn, old, | |
2252 | FP_MODE_REG (old->reg[reg], DFmode)); | |
2253 | break; | |
2254 | } | |
2255 | } while (reg >= 0); | |
48227150 | 2256 | |
0f41302f | 2257 | /* At this point there must be no differences. */ |
48227150 JVA |
2258 | |
2259 | for (reg = old->top; reg >= 0; reg--) | |
2260 | if (old->reg[reg] != new->reg[reg]) | |
2261 | abort (); | |
2262 | } | |
a05924f9 JH |
2263 | |
2264 | if (update_end) | |
2265 | current_block->end = PREV_INSN (insn); | |
48227150 JVA |
2266 | } |
2267 | \f | |
a05924f9 | 2268 | /* Print stack configuration. */ |
48227150 JVA |
2269 | |
2270 | static void | |
a05924f9 JH |
2271 | print_stack (file, s) |
2272 | FILE *file; | |
2273 | stack s; | |
48227150 | 2274 | { |
a05924f9 JH |
2275 | if (! file) |
2276 | return; | |
48227150 | 2277 | |
a05924f9 JH |
2278 | if (s->top == -2) |
2279 | fprintf (file, "uninitialized\n"); | |
2280 | else if (s->top == -1) | |
2281 | fprintf (file, "empty\n"); | |
2282 | else | |
e075ae69 | 2283 | { |
a05924f9 JH |
2284 | int i; |
2285 | fputs ("[ ", file); | |
2286 | for (i = 0; i <= s->top; ++i) | |
2287 | fprintf (file, "%d ", s->reg[i]); | |
2288 | fputs ("]\n", file); | |
e075ae69 | 2289 | } |
a05924f9 JH |
2290 | } |
2291 | \f | |
2292 | /* This function was doing life analysis. We now let the regular live | |
2293 | code do it's job, so we only need to check some extra invariants | |
2294 | that reg-stack expects. Primary among these being that all registers | |
2295 | are initialized before use. | |
48227150 | 2296 | |
a05924f9 JH |
2297 | The function returns true when code was emitted to CFG edges and |
2298 | commit_edge_insertions needs to be called. */ | |
48227150 | 2299 | |
a05924f9 JH |
2300 | static int |
2301 | convert_regs_entry () | |
2302 | { | |
2303 | int inserted = 0, i; | |
2304 | edge e; | |
48227150 | 2305 | |
a05924f9 | 2306 | for (i = n_basic_blocks - 1; i >= 0; --i) |
48227150 | 2307 | { |
a05924f9 JH |
2308 | basic_block block = BASIC_BLOCK (i); |
2309 | block_info bi = BLOCK_INFO (block); | |
2310 | int reg; | |
2311 | ||
2312 | /* Set current register status at last instruction `uninitialized'. */ | |
2313 | bi->stack_in.top = -2; | |
2314 | ||
2315 | /* Copy live_at_end and live_at_start into temporaries. */ | |
2316 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) | |
48227150 | 2317 | { |
a05924f9 JH |
2318 | if (REGNO_REG_SET_P (block->global_live_at_end, reg)) |
2319 | SET_HARD_REG_BIT (bi->out_reg_set, reg); | |
2320 | if (REGNO_REG_SET_P (block->global_live_at_start, reg)) | |
2321 | SET_HARD_REG_BIT (bi->stack_in.reg_set, reg); | |
48227150 JVA |
2322 | } |
2323 | } | |
48227150 | 2324 | |
a05924f9 JH |
2325 | /* Load something into each stack register live at function entry. |
2326 | Such live registers can be caused by uninitialized variables or | |
2327 | functions not returning values on all paths. In order to keep | |
2328 | the push/pop code happy, and to not scrog the register stack, we | |
2329 | must put something in these registers. Use a QNaN. | |
48227150 | 2330 | |
a05924f9 JH |
2331 | Note that we are insertting converted code here. This code is |
2332 | never seen by the convert_regs pass. */ | |
48227150 | 2333 | |
a05924f9 JH |
2334 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) |
2335 | { | |
2336 | basic_block block = e->dest; | |
2337 | block_info bi = BLOCK_INFO (block); | |
2338 | int reg, top = -1; | |
48227150 | 2339 | |
a05924f9 JH |
2340 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) |
2341 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2342 | { | |
2343 | rtx init; | |
48227150 | 2344 | |
a05924f9 | 2345 | bi->stack_in.reg[++top] = reg; |
48227150 | 2346 | |
a05924f9 JH |
2347 | init = gen_rtx_SET (VOIDmode, |
2348 | FP_MODE_REG (FIRST_STACK_REG, SFmode), | |
2349 | nan); | |
2350 | insert_insn_on_edge (init, e); | |
2351 | inserted = 1; | |
2352 | } | |
48227150 | 2353 | |
a05924f9 JH |
2354 | bi->stack_in.top = top; |
2355 | } | |
48227150 | 2356 | |
a05924f9 JH |
2357 | return inserted; |
2358 | } | |
48227150 | 2359 | |
a05924f9 JH |
2360 | /* Construct the desired stack for function exit. This will either |
2361 | be `empty', or the function return value at top-of-stack. */ | |
48227150 | 2362 | |
a05924f9 JH |
2363 | static void |
2364 | convert_regs_exit () | |
2365 | { | |
2366 | int value_reg_low, value_reg_high; | |
2367 | stack output_stack; | |
2368 | rtx retvalue; | |
48227150 | 2369 | |
a05924f9 JH |
2370 | retvalue = stack_result (current_function_decl); |
2371 | value_reg_low = value_reg_high = -1; | |
2372 | if (retvalue) | |
2373 | { | |
2374 | value_reg_low = REGNO (retvalue); | |
2375 | value_reg_high = value_reg_low | |
2376 | + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; | |
2377 | } | |
48227150 | 2378 | |
a05924f9 JH |
2379 | output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in; |
2380 | if (value_reg_low == -1) | |
2381 | output_stack->top = -1; | |
2382 | else | |
2383 | { | |
2384 | int reg; | |
48227150 | 2385 | |
a05924f9 JH |
2386 | output_stack->top = value_reg_high - value_reg_low; |
2387 | for (reg = value_reg_low; reg <= value_reg_high; ++reg) | |
2388 | { | |
2389 | output_stack->reg[reg - value_reg_low] = reg; | |
2390 | SET_HARD_REG_BIT (output_stack->reg_set, reg); | |
2391 | } | |
2392 | } | |
48227150 | 2393 | } |
48227150 | 2394 | |
a05924f9 JH |
2395 | /* Convert stack register references in one block. */ |
2396 | ||
2397 | static int | |
2398 | convert_regs_1 (file, block) | |
2399 | FILE *file; | |
2400 | basic_block block; | |
48227150 | 2401 | { |
a05924f9 JH |
2402 | struct stack_def regstack, tmpstack; |
2403 | block_info bi = BLOCK_INFO (block); | |
2404 | int inserted, reg; | |
2405 | rtx insn, next; | |
2406 | edge e; | |
48227150 | 2407 | |
a05924f9 JH |
2408 | current_block = block; |
2409 | ||
2410 | if (file) | |
48227150 | 2411 | { |
a05924f9 JH |
2412 | fprintf (file, "\nBasic block %d\nInput stack: ", block->index); |
2413 | print_stack (file, &bi->stack_in); | |
2414 | } | |
48227150 | 2415 | |
a05924f9 JH |
2416 | /* Process all insns in this block. Keep track of NEXT so that we |
2417 | don't process insns emitted while substituting in INSN. */ | |
2418 | next = block->head; | |
2419 | regstack = bi->stack_in; | |
2420 | do | |
2421 | { | |
2422 | insn = next; | |
2423 | next = NEXT_INSN (insn); | |
48227150 | 2424 | |
a05924f9 JH |
2425 | /* Ensure we have not missed a block boundary. */ |
2426 | if (next == NULL) | |
2427 | abort (); | |
2428 | if (insn == block->end) | |
2429 | next = NULL; | |
2430 | ||
2431 | /* Don't bother processing unless there is a stack reg | |
2432 | mentioned or if it's a CALL_INSN. */ | |
2433 | if (stack_regs_mentioned (insn) | |
2434 | || GET_CODE (insn) == CALL_INSN) | |
2435 | { | |
2436 | if (file) | |
2437 | { | |
2438 | fprintf (file, " insn %d input stack: ", | |
2439 | INSN_UID (insn)); | |
2440 | print_stack (file, ®stack); | |
2441 | } | |
2442 | subst_stack_regs (insn, ®stack); | |
48227150 | 2443 | } |
a05924f9 JH |
2444 | } |
2445 | while (next); | |
48227150 | 2446 | |
a05924f9 JH |
2447 | if (file) |
2448 | { | |
2449 | fprintf (file, "Expected live registers ["); | |
2450 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2451 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)) | |
2452 | fprintf (file, " %d", reg); | |
2453 | fprintf (file, " ]\nOutput stack: "); | |
2454 | print_stack (file, ®stack); | |
2455 | } | |
48227150 | 2456 | |
a05924f9 JH |
2457 | insn = block->end; |
2458 | if (GET_CODE (insn) == JUMP_INSN) | |
2459 | insn = PREV_INSN (insn); | |
2460 | ||
2461 | /* If the function is declared to return a value, but it returns one | |
2462 | in only some cases, some registers might come live here. Emit | |
2463 | necessary moves for them. */ | |
2464 | ||
2465 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg) | |
2466 | { | |
2467 | if (TEST_HARD_REG_BIT (bi->out_reg_set, reg) | |
2468 | && ! TEST_HARD_REG_BIT (regstack.reg_set, reg)) | |
48227150 | 2469 | { |
a05924f9 | 2470 | rtx set; |
48227150 | 2471 | |
a05924f9 JH |
2472 | if (file) |
2473 | { | |
2474 | fprintf (file, "Emitting insn initializing reg %d\n", | |
2475 | reg); | |
2476 | } | |
48227150 | 2477 | |
a05924f9 JH |
2478 | set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), |
2479 | nan); | |
2480 | insn = emit_block_insn_after (set, insn, block); | |
2481 | subst_stack_regs (insn, ®stack); | |
2482 | } | |
2483 | } | |
48227150 | 2484 | |
a05924f9 JH |
2485 | /* Something failed if the stack lives don't match. */ |
2486 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win); | |
2487 | abort (); | |
2488 | win: | |
48227150 | 2489 | |
a05924f9 JH |
2490 | /* Adjust the stack of this block on exit to match the stack of the |
2491 | target block, or copy stack info into the stack of the successor | |
2492 | of the successor hasn't been processed yet. */ | |
2493 | inserted = 0; | |
2494 | for (e = block->succ; e ; e = e->succ_next) | |
2495 | { | |
2496 | basic_block target = e->dest; | |
2497 | stack target_stack = &BLOCK_INFO (target)->stack_in; | |
48227150 | 2498 | |
a05924f9 JH |
2499 | if (file) |
2500 | fprintf (file, "Edge to block %d: ", target->index); | |
48227150 | 2501 | |
a05924f9 JH |
2502 | if (target_stack->top == -2) |
2503 | { | |
2504 | /* The target block hasn't had a stack order selected. | |
2505 | We need merely ensure that no pops are needed. */ | |
2506 | for (reg = regstack.top; reg >= 0; --reg) | |
2507 | if (! TEST_HARD_REG_BIT (target_stack->reg_set, | |
2508 | regstack.reg[reg])) | |
2509 | break; | |
48227150 | 2510 | |
a05924f9 JH |
2511 | if (reg == -1) |
2512 | { | |
2513 | if (file) | |
2514 | fprintf (file, "new block; copying stack position\n"); | |
48227150 | 2515 | |
a05924f9 JH |
2516 | /* change_stack kills values in regstack. */ |
2517 | tmpstack = regstack; | |
48227150 | 2518 | |
a05924f9 JH |
2519 | change_stack (block->end, &tmpstack, |
2520 | target_stack, EMIT_AFTER); | |
2521 | continue; | |
2522 | } | |
48227150 | 2523 | |
a05924f9 JH |
2524 | if (file) |
2525 | fprintf (file, "new block; pops needed\n"); | |
2526 | } | |
2527 | else | |
2528 | { | |
2529 | if (target_stack->top == regstack.top) | |
2530 | { | |
2531 | for (reg = target_stack->top; reg >= 0; --reg) | |
2532 | if (target_stack->reg[reg] != regstack.reg[reg]) | |
2533 | break; | |
48227150 | 2534 | |
a05924f9 JH |
2535 | if (reg == -1) |
2536 | { | |
2537 | if (file) | |
2538 | fprintf (file, "no changes needed\n"); | |
2539 | continue; | |
2540 | } | |
2541 | } | |
48227150 | 2542 | |
a05924f9 JH |
2543 | if (file) |
2544 | { | |
2545 | fprintf (file, "correcting stack to "); | |
2546 | print_stack (file, target_stack); | |
2547 | } | |
2548 | } | |
48227150 | 2549 | |
f6d20486 RH |
2550 | /* Care for EH edges specially. The normal return path may return |
2551 | a value in st(0), but the EH path will not, and there's no need | |
2552 | to add popping code to the edge. */ | |
2553 | if (e->flags & EDGE_EH) | |
2554 | { | |
2555 | /* Assert that the lifetimes are as we expect -- one value | |
2556 | live at st(0) on the end of the source block, and no | |
2557 | values live at the beginning of the destination block. */ | |
2558 | HARD_REG_SET tmp; | |
2559 | ||
2560 | CLEAR_HARD_REG_SET (tmp); | |
a6028d44 | 2561 | GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1); |
f6d20486 RH |
2562 | abort(); |
2563 | eh1: | |
2564 | ||
2565 | SET_HARD_REG_BIT (tmp, FIRST_STACK_REG); | |
a6028d44 | 2566 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2); |
f6d20486 | 2567 | abort(); |
a6028d44 RH |
2568 | eh2: |
2569 | ||
2570 | target_stack->top = -1; | |
f6d20486 RH |
2571 | } |
2572 | ||
a05924f9 JH |
2573 | /* It is better to output directly to the end of the block |
2574 | instead of to the edge, because emit_swap can do minimal | |
2575 | insn scheduling. We can do this when there is only one | |
2576 | edge out, and it is not abnormal. */ | |
f6d20486 RH |
2577 | else if (block->succ->succ_next == NULL |
2578 | && ! (e->flags & EDGE_ABNORMAL)) | |
e075ae69 | 2579 | { |
a05924f9 JH |
2580 | /* change_stack kills values in regstack. */ |
2581 | tmpstack = regstack; | |
2582 | ||
2583 | change_stack (block->end, &tmpstack, target_stack, | |
2584 | (GET_CODE (block->end) == JUMP_INSN | |
2585 | ? EMIT_BEFORE : EMIT_AFTER)); | |
e075ae69 | 2586 | } |
a05924f9 JH |
2587 | else |
2588 | { | |
2589 | rtx seq, after; | |
2590 | ||
f6d20486 RH |
2591 | /* We don't support abnormal edges. Global takes care to |
2592 | avoid any live register across them, so we should never | |
2593 | have to insert instructions on such edges. */ | |
a05924f9 JH |
2594 | if (e->flags & EDGE_ABNORMAL) |
2595 | abort (); | |
2596 | ||
2597 | current_block = NULL; | |
2598 | start_sequence (); | |
2599 | ||
2600 | /* ??? change_stack needs some point to emit insns after. | |
2601 | Also needed to keep gen_sequence from returning a | |
2602 | pattern as opposed to a sequence, which would lose | |
2603 | REG_DEAD notes. */ | |
2604 | after = emit_note (NULL, NOTE_INSN_DELETED); | |
2605 | ||
2606 | tmpstack = regstack; | |
2607 | change_stack (after, &tmpstack, target_stack, EMIT_BEFORE); | |
99a59310 | 2608 | |
a05924f9 JH |
2609 | seq = gen_sequence (); |
2610 | end_sequence (); | |
2611 | ||
2612 | insert_insn_on_edge (seq, e); | |
2613 | inserted = 1; | |
2614 | current_block = block; | |
2615 | } | |
e075ae69 | 2616 | } |
a05924f9 JH |
2617 | |
2618 | return inserted; | |
48227150 | 2619 | } |
48227150 | 2620 | |
a05924f9 JH |
2621 | /* Convert registers in all blocks reachable from BLOCK. */ |
2622 | ||
2623 | static int | |
2624 | convert_regs_2 (file, block) | |
48227150 | 2625 | FILE *file; |
a05924f9 | 2626 | basic_block block; |
48227150 | 2627 | { |
a05924f9 JH |
2628 | basic_block *stack, *sp; |
2629 | int inserted; | |
48227150 | 2630 | |
ff154f78 | 2631 | stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks); |
a05924f9 | 2632 | sp = stack; |
48227150 | 2633 | |
a05924f9 JH |
2634 | *sp++ = block; |
2635 | BLOCK_INFO (block)->done = 1; | |
48227150 | 2636 | |
a05924f9 JH |
2637 | inserted = 0; |
2638 | do | |
2639 | { | |
2640 | edge e; | |
48227150 | 2641 | |
a05924f9 JH |
2642 | block = *--sp; |
2643 | inserted |= convert_regs_1 (file, block); | |
48227150 | 2644 | |
a05924f9 JH |
2645 | for (e = block->succ; e ; e = e->succ_next) |
2646 | if (! BLOCK_INFO (e->dest)->done) | |
2647 | { | |
2648 | *sp++ = e->dest; | |
2649 | BLOCK_INFO (e->dest)->done = 1; | |
2650 | } | |
48227150 | 2651 | } |
a05924f9 JH |
2652 | while (sp != stack); |
2653 | ||
2654 | return inserted; | |
48227150 | 2655 | } |
841fc5a1 | 2656 | |
a05924f9 JH |
2657 | /* Traverse all basic blocks in a function, converting the register |
2658 | references in each insn from the "flat" register file that gcc uses, | |
2659 | to the stack-like registers the 387 uses. */ | |
2660 | ||
2661 | static int | |
2662 | convert_regs (file) | |
48227150 JVA |
2663 | FILE *file; |
2664 | { | |
a05924f9 JH |
2665 | int inserted, i; |
2666 | edge e; | |
48227150 | 2667 | |
a05924f9 JH |
2668 | /* Initialize uninitialized registers on function entry. */ |
2669 | inserted = convert_regs_entry (); | |
48227150 | 2670 | |
a05924f9 JH |
2671 | /* Construct the desired stack for function exit. */ |
2672 | convert_regs_exit (); | |
2673 | BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1; | |
48227150 | 2674 | |
a05924f9 JH |
2675 | /* ??? Future: process inner loops first, and give them arbitrary |
2676 | initial stacks which emit_swap_insn can modify. This ought to | |
2677 | prevent double fxch that aften appears at the head of a loop. */ | |
48227150 | 2678 | |
a05924f9 JH |
2679 | /* Process all blocks reachable from all entry points. */ |
2680 | for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next) | |
2681 | inserted |= convert_regs_2 (file, e->dest); | |
2682 | ||
2683 | /* ??? Process all unreachable blocks. Though there's no excuse | |
2684 | for keeping these even when not optimizing. */ | |
2685 | for (i = 0; i < n_basic_blocks; ++i) | |
2686 | { | |
2687 | basic_block b = BASIC_BLOCK (i); | |
2688 | block_info bi = BLOCK_INFO (b); | |
48227150 | 2689 | |
a05924f9 | 2690 | if (! bi->done) |
48227150 | 2691 | { |
a05924f9 | 2692 | int reg; |
48227150 | 2693 | |
a05924f9 JH |
2694 | /* Create an arbitrary input stack. */ |
2695 | bi->stack_in.top = -1; | |
2696 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg) | |
2697 | if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg)) | |
2698 | bi->stack_in.reg[++bi->stack_in.top] = reg; | |
48227150 | 2699 | |
a05924f9 JH |
2700 | inserted |= convert_regs_2 (file, b); |
2701 | } | |
2702 | } | |
48227150 | 2703 | |
a05924f9 JH |
2704 | if (inserted) |
2705 | commit_edge_insertions (); | |
48227150 | 2706 | |
a05924f9 JH |
2707 | if (file) |
2708 | fputc ('\n', file); | |
48227150 | 2709 | |
a05924f9 | 2710 | return inserted; |
48227150 | 2711 | } |
48227150 | 2712 | #endif /* STACK_REGS */ |