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48227150 | 1 | /* Register to Stack convert for GNU compiler. |
2e6a5989 | 2 | Copyright (C) 1992, 93-97, 1998 Free Software Foundation, Inc. |
48227150 JVA |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
e99215a3 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
48227150 JVA |
20 | |
21 | /* This pass converts stack-like registers from the "flat register | |
22 | file" model that gcc uses, to a stack convention that the 387 uses. | |
23 | ||
24 | * The form of the input: | |
25 | ||
26 | On input, the function consists of insn that have had their | |
27 | registers fully allocated to a set of "virtual" registers. Note that | |
28 | the word "virtual" is used differently here than elsewhere in gcc: for | |
29 | each virtual stack reg, there is a hard reg, but the mapping between | |
30 | them is not known until this pass is run. On output, hard register | |
31 | numbers have been substituted, and various pop and exchange insns have | |
32 | been emitted. The hard register numbers and the virtual register | |
33 | numbers completely overlap - before this pass, all stack register | |
114cbee6 | 34 | numbers are virtual, and afterward they are all hard. |
48227150 JVA |
35 | |
36 | The virtual registers can be manipulated normally by gcc, and their | |
37 | semantics are the same as for normal registers. After the hard | |
38 | register numbers are substituted, the semantics of an insn containing | |
39 | stack-like regs are not the same as for an insn with normal regs: for | |
40 | instance, it is not safe to delete an insn that appears to be a no-op | |
41 | move. In general, no insn containing hard regs should be changed | |
42 | after this pass is done. | |
43 | ||
44 | * The form of the output: | |
45 | ||
46 | After this pass, hard register numbers represent the distance from | |
47 | the current top of stack to the desired register. A reference to | |
48 | FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, | |
49 | represents the register just below that, and so forth. Also, REG_DEAD | |
50 | notes indicate whether or not a stack register should be popped. | |
51 | ||
52 | A "swap" insn looks like a parallel of two patterns, where each | |
53 | pattern is a SET: one sets A to B, the other B to A. | |
54 | ||
55 | A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG | |
56 | and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, | |
57 | will replace the existing stack top, not push a new value. | |
58 | ||
59 | A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose | |
60 | SET_SRC is REG or MEM. | |
61 | ||
3f5cfed6 | 62 | The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG |
48227150 JVA |
63 | appears ambiguous. As a special case, the presence of a REG_DEAD note |
64 | for FIRST_STACK_REG differentiates between a load insn and a pop. | |
65 | ||
66 | If a REG_DEAD is present, the insn represents a "pop" that discards | |
67 | the top of the register stack. If there is no REG_DEAD note, then the | |
68 | insn represents a "dup" or a push of the current top of stack onto the | |
69 | stack. | |
70 | ||
71 | * Methodology: | |
72 | ||
73 | Existing REG_DEAD and REG_UNUSED notes for stack registers are | |
74 | deleted and recreated from scratch. REG_DEAD is never created for a | |
75 | SET_DEST, only REG_UNUSED. | |
76 | ||
77 | Before life analysis, the mode of each insn is set based on whether | |
78 | or not any stack registers are mentioned within that insn. VOIDmode | |
79 | means that no regs are mentioned anyway, and QImode means that at | |
80 | least one pattern within the insn mentions stack registers. This | |
81 | information is valid until after reg_to_stack returns, and is used | |
82 | from jump_optimize. | |
83 | ||
114cbee6 | 84 | * asm_operands: |
48227150 | 85 | |
114cbee6 RS |
86 | There are several rules on the usage of stack-like regs in |
87 | asm_operands insns. These rules apply only to the operands that are | |
88 | stack-like regs: | |
89 | ||
90 | 1. Given a set of input regs that die in an asm_operands, it is | |
91 | necessary to know which are implicitly popped by the asm, and | |
92 | which must be explicitly popped by gcc. | |
93 | ||
94 | An input reg that is implicitly popped by the asm must be | |
95 | explicitly clobbered, unless it is constrained to match an | |
96 | output operand. | |
97 | ||
98 | 2. For any input reg that is implicitly popped by an asm, it is | |
99 | necessary to know how to adjust the stack to compensate for the pop. | |
100 | If any non-popped input is closer to the top of the reg-stack than | |
101 | the implicitly popped reg, it would not be possible to know what the | |
102 | stack looked like - it's not clear how the rest of the stack "slides | |
103 | up". | |
104 | ||
105 | All implicitly popped input regs must be closer to the top of | |
106 | the reg-stack than any input that is not implicitly popped. | |
107 | ||
108 | 3. It is possible that if an input dies in an insn, reload might | |
109 | use the input reg for an output reload. Consider this example: | |
110 | ||
111 | asm ("foo" : "=t" (a) : "f" (b)); | |
112 | ||
113 | This asm says that input B is not popped by the asm, and that | |
114 | the asm pushes a result onto the reg-stack, ie, the stack is one | |
115 | deeper after the asm than it was before. But, it is possible that | |
116 | reload will think that it can use the same reg for both the input and | |
117 | the output, if input B dies in this insn. | |
118 | ||
119 | If any input operand uses the "f" constraint, all output reg | |
120 | constraints must use the "&" earlyclobber. | |
121 | ||
122 | The asm above would be written as | |
123 | ||
124 | asm ("foo" : "=&t" (a) : "f" (b)); | |
125 | ||
126 | 4. Some operands need to be in particular places on the stack. All | |
127 | output operands fall in this category - there is no other way to | |
128 | know which regs the outputs appear in unless the user indicates | |
129 | this in the constraints. | |
130 | ||
131 | Output operands must specifically indicate which reg an output | |
132 | appears in after an asm. "=f" is not allowed: the operand | |
133 | constraints must select a class with a single reg. | |
134 | ||
135 | 5. Output operands may not be "inserted" between existing stack regs. | |
136 | Since no 387 opcode uses a read/write operand, all output operands | |
137 | are dead before the asm_operands, and are pushed by the asm_operands. | |
138 | It makes no sense to push anywhere but the top of the reg-stack. | |
139 | ||
140 | Output operands must start at the top of the reg-stack: output | |
141 | operands may not "skip" a reg. | |
142 | ||
143 | 6. Some asm statements may need extra stack space for internal | |
144 | calculations. This can be guaranteed by clobbering stack registers | |
145 | unrelated to the inputs and outputs. | |
146 | ||
147 | Here are a couple of reasonable asms to want to write. This asm | |
148 | takes one input, which is internally popped, and produces two outputs. | |
149 | ||
150 | asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); | |
151 | ||
152 | This asm takes two inputs, which are popped by the fyl2xp1 opcode, | |
153 | and replaces them with one output. The user must code the "st(1)" | |
154 | clobber for reg-stack.c to know that fyl2xp1 pops both inputs. | |
155 | ||
156 | asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); | |
157 | ||
158 | */ | |
48227150 | 159 | \f |
48227150 | 160 | #include "config.h" |
670ee920 | 161 | #include "system.h" |
48227150 JVA |
162 | #include "tree.h" |
163 | #include "rtl.h" | |
114cbee6 | 164 | #include "insn-config.h" |
48227150 JVA |
165 | #include "regs.h" |
166 | #include "hard-reg-set.h" | |
167 | #include "flags.h" | |
841fc5a1 | 168 | #include "insn-flags.h" |
48227150 JVA |
169 | |
170 | #ifdef STACK_REGS | |
171 | ||
172 | #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) | |
173 | ||
48227150 JVA |
174 | /* This is the basic stack record. TOP is an index into REG[] such |
175 | that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. | |
176 | ||
eca31501 JVA |
177 | If TOP is -2, REG[] is not yet initialized. Stack initialization |
178 | consists of placing each live reg in array `reg' and setting `top' | |
179 | appropriately. | |
180 | ||
181 | REG_SET indicates which registers are live. */ | |
48227150 JVA |
182 | |
183 | typedef struct stack_def | |
184 | { | |
185 | int top; /* index to top stack element */ | |
186 | HARD_REG_SET reg_set; /* set of live registers */ | |
187 | char reg[REG_STACK_SIZE]; /* register - stack mapping */ | |
188 | } *stack; | |
189 | ||
190 | /* highest instruction uid */ | |
191 | static int max_uid = 0; | |
192 | ||
193 | /* Number of basic blocks in the current function. */ | |
194 | static int blocks; | |
195 | ||
196 | /* Element N is first insn in basic block N. | |
197 | This info lasts until we finish compiling the function. */ | |
198 | static rtx *block_begin; | |
199 | ||
200 | /* Element N is last insn in basic block N. | |
201 | This info lasts until we finish compiling the function. */ | |
202 | static rtx *block_end; | |
203 | ||
204 | /* Element N is nonzero if control can drop into basic block N */ | |
205 | static char *block_drops_in; | |
206 | ||
207 | /* Element N says all about the stack at entry block N */ | |
208 | static stack block_stack_in; | |
209 | ||
210 | /* Element N says all about the stack life at the end of block N */ | |
211 | static HARD_REG_SET *block_out_reg_set; | |
212 | ||
213 | /* This is where the BLOCK_NUM values are really stored. This is set | |
214 | up by find_blocks and used there and in life_analysis. It can be used | |
215 | later, but only to look up an insn that is the head or tail of some | |
216 | block. life_analysis and the stack register conversion process can | |
0f41302f | 217 | add insns within a block. */ |
1815bfc2 | 218 | static int *block_number; |
48227150 JVA |
219 | |
220 | /* This is the register file for all register after conversion */ | |
99a59310 RK |
221 | static rtx |
222 | FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE]; | |
223 | ||
224 | #define FP_MODE_REG(regno,mode) \ | |
225 | (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)]) | |
48227150 | 226 | |
48227150 | 227 | /* Get the basic block number of an insn. See note at block_number |
0f41302f | 228 | definition are validity of this information. */ |
48227150 JVA |
229 | |
230 | #define BLOCK_NUM(INSN) \ | |
a269864e RK |
231 | ((INSN_UID (INSN) > max_uid) \ |
232 | ? (abort() , -1) : block_number[INSN_UID (INSN)]) | |
48227150 | 233 | |
0ab759e4 | 234 | extern rtx forced_labels; |
48227150 | 235 | |
48227150 JVA |
236 | /* Forward declarations */ |
237 | ||
841fc5a1 RK |
238 | static void mark_regs_pat PROTO((rtx, HARD_REG_SET *)); |
239 | static void straighten_stack PROTO((rtx, stack)); | |
240 | static void record_label_references PROTO((rtx, rtx)); | |
241 | static rtx *get_true_reg PROTO((rtx *)); | |
242 | static int constrain_asm_operands PROTO((int, rtx *, char **, int *, | |
243 | enum reg_class *)); | |
244 | ||
245 | static void record_asm_reg_life PROTO((rtx,stack, rtx *, char **, | |
246 | int, int)); | |
247 | static void record_reg_life_pat PROTO((rtx, HARD_REG_SET *, | |
248 | HARD_REG_SET *, int)); | |
69d4ca36 | 249 | static void get_asm_operand_lengths PROTO((rtx, int, int *, int *)); |
841fc5a1 RK |
250 | static void record_reg_life PROTO((rtx, int, stack)); |
251 | static void find_blocks PROTO((rtx)); | |
252 | static int uses_reg_or_mem PROTO((rtx)); | |
253 | static rtx stack_result PROTO((tree)); | |
254 | static void stack_reg_life_analysis PROTO((rtx, HARD_REG_SET *)); | |
255 | static void replace_reg PROTO((rtx *, int)); | |
256 | static void remove_regno_note PROTO((rtx, enum reg_note, int)); | |
257 | static int get_hard_regnum PROTO((stack, rtx)); | |
258 | static void delete_insn_for_stacker PROTO((rtx)); | |
259 | static rtx emit_pop_insn PROTO((rtx, stack, rtx, rtx (*) ())); | |
260 | static void emit_swap_insn PROTO((rtx, stack, rtx)); | |
261 | static void move_for_stack_reg PROTO((rtx, stack, rtx)); | |
262 | static void swap_rtx_condition PROTO((rtx)); | |
263 | static void compare_for_stack_reg PROTO((rtx, stack, rtx)); | |
264 | static void subst_stack_regs_pat PROTO((rtx, stack, rtx)); | |
265 | static void subst_asm_stack_regs PROTO((rtx, stack, rtx *, rtx **, | |
266 | char **, int, int)); | |
267 | static void subst_stack_regs PROTO((rtx, stack)); | |
268 | static void change_stack PROTO((rtx, stack, stack, rtx (*) ())); | |
269 | ||
270 | static void goto_block_pat PROTO((rtx, stack, rtx)); | |
271 | static void convert_regs PROTO((void)); | |
272 | static void print_blocks PROTO((FILE *, rtx, rtx)); | |
273 | static void dump_stack_info PROTO((FILE *)); | |
48227150 | 274 | \f |
99a59310 RK |
275 | /* Mark all registers needed for this pattern. */ |
276 | ||
277 | static void | |
278 | mark_regs_pat (pat, set) | |
279 | rtx pat; | |
280 | HARD_REG_SET *set; | |
281 | { | |
282 | enum machine_mode mode; | |
283 | register int regno; | |
284 | register int count; | |
285 | ||
286 | if (GET_CODE (pat) == SUBREG) | |
287 | { | |
288 | mode = GET_MODE (pat); | |
289 | regno = SUBREG_WORD (pat); | |
290 | regno += REGNO (SUBREG_REG (pat)); | |
291 | } | |
292 | else | |
293 | regno = REGNO (pat), mode = GET_MODE (pat); | |
294 | ||
295 | for (count = HARD_REGNO_NREGS (regno, mode); | |
296 | count; count--, regno++) | |
297 | SET_HARD_REG_BIT (*set, regno); | |
298 | } | |
299 | \f | |
300 | /* Reorganise the stack into ascending numbers, | |
301 | after this insn. */ | |
302 | ||
303 | static void | |
304 | straighten_stack (insn, regstack) | |
305 | rtx insn; | |
306 | stack regstack; | |
307 | { | |
308 | struct stack_def temp_stack; | |
309 | int top; | |
310 | ||
311 | temp_stack.reg_set = regstack->reg_set; | |
312 | ||
313 | for (top = temp_stack.top = regstack->top; top >= 0; top--) | |
314 | temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top; | |
315 | ||
316 | change_stack (insn, regstack, &temp_stack, emit_insn_after); | |
317 | } | |
7aa74e4c SC |
318 | |
319 | /* Pop a register from the stack */ | |
320 | ||
321 | static void | |
322 | pop_stack (regstack, regno) | |
323 | stack regstack; | |
324 | int regno; | |
325 | { | |
326 | int top = regstack->top; | |
327 | ||
328 | CLEAR_HARD_REG_BIT (regstack->reg_set, regno); | |
329 | regstack->top--; | |
330 | /* If regno was not at the top of stack then adjust stack */ | |
331 | if (regstack->reg [top] != regno) | |
332 | { | |
333 | int i; | |
334 | for (i = regstack->top; i >= 0; i--) | |
335 | if (regstack->reg [i] == regno) | |
336 | { | |
337 | int j; | |
338 | for (j = i; j < top; j++) | |
339 | regstack->reg [j] = regstack->reg [j + 1]; | |
340 | break; | |
341 | } | |
342 | } | |
343 | } | |
99a59310 | 344 | \f |
d45cf215 | 345 | /* Return non-zero if any stack register is mentioned somewhere within PAT. */ |
48227150 | 346 | |
d45cf215 | 347 | int |
48227150 | 348 | stack_regs_mentioned_p (pat) |
0e7d0eb9 | 349 | rtx pat; |
48227150 JVA |
350 | { |
351 | register char *fmt; | |
352 | register int i; | |
353 | ||
354 | if (STACK_REG_P (pat)) | |
355 | return 1; | |
356 | ||
357 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
358 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
359 | { | |
360 | if (fmt[i] == 'E') | |
361 | { | |
362 | register int j; | |
363 | ||
364 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
365 | if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) | |
366 | return 1; | |
367 | } | |
368 | else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) | |
369 | return 1; | |
370 | } | |
371 | ||
372 | return 0; | |
373 | } | |
374 | \f | |
375 | /* Convert register usage from "flat" register file usage to a "stack | |
376 | register file. FIRST is the first insn in the function, FILE is the | |
377 | dump file, if used. | |
378 | ||
379 | First compute the beginning and end of each basic block. Do a | |
380 | register life analysis on the stack registers, recording the result | |
381 | for the head and tail of each basic block. The convert each insn one | |
382 | by one. Run a last jump_optimize() pass, if optimizing, to eliminate | |
383 | any cross-jumping created when the converter inserts pop insns.*/ | |
384 | ||
385 | void | |
386 | reg_to_stack (first, file) | |
387 | rtx first; | |
388 | FILE *file; | |
389 | { | |
390 | register rtx insn; | |
391 | register int i; | |
392 | int stack_reg_seen = 0; | |
7d0e3dd4 | 393 | enum machine_mode mode; |
99a59310 | 394 | HARD_REG_SET stackentry; |
48227150 | 395 | |
99a59310 | 396 | CLEAR_HARD_REG_SET (stackentry); |
48227150 | 397 | |
99a59310 | 398 | { |
69d4ca36 | 399 | static int initialised; |
99a59310 RK |
400 | if (!initialised) |
401 | { | |
402 | #if 0 | |
403 | initialised = 1; /* This array can not have been previously | |
404 | initialised, because the rtx's are | |
405 | thrown away between compilations of | |
406 | functions. */ | |
407 | #endif | |
408 | for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) | |
409 | { | |
410 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
411 | mode = GET_MODE_WIDER_MODE (mode)) | |
38a448ca | 412 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); |
99a59310 RK |
413 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode; |
414 | mode = GET_MODE_WIDER_MODE (mode)) | |
38a448ca | 415 | FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i); |
99a59310 RK |
416 | } |
417 | } | |
418 | } | |
48227150 JVA |
419 | |
420 | /* Count the basic blocks. Also find maximum insn uid. */ | |
421 | { | |
02fa1284 | 422 | register RTX_CODE prev_code = BARRIER; |
48227150 | 423 | register RTX_CODE code; |
69d4ca36 | 424 | register int before_function_beg = 1; |
48227150 JVA |
425 | |
426 | max_uid = 0; | |
427 | blocks = 0; | |
428 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
429 | { | |
430 | /* Note that this loop must select the same block boundaries | |
0ab759e4 RK |
431 | as code in find_blocks. Also note that this code is not the |
432 | same as that used in flow.c. */ | |
48227150 JVA |
433 | |
434 | if (INSN_UID (insn) > max_uid) | |
435 | max_uid = INSN_UID (insn); | |
436 | ||
437 | code = GET_CODE (insn); | |
438 | ||
439 | if (code == CODE_LABEL | |
440 | || (prev_code != INSN | |
441 | && prev_code != CALL_INSN | |
442 | && prev_code != CODE_LABEL | |
0ab759e4 | 443 | && GET_RTX_CLASS (code) == 'i')) |
48227150 JVA |
444 | blocks++; |
445 | ||
99a59310 RK |
446 | if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) |
447 | before_function_beg = 0; | |
448 | ||
48227150 | 449 | /* Remember whether or not this insn mentions an FP regs. |
0f41302f | 450 | Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */ |
48227150 | 451 | |
99a59310 | 452 | if (GET_RTX_CLASS (code) == 'i' |
48227150 JVA |
453 | && stack_regs_mentioned_p (PATTERN (insn))) |
454 | { | |
455 | stack_reg_seen = 1; | |
456 | PUT_MODE (insn, QImode); | |
99a59310 RK |
457 | |
458 | /* Note any register passing parameters. */ | |
459 | ||
460 | if (before_function_beg && code == INSN | |
461 | && GET_CODE (PATTERN (insn)) == USE) | |
0f41302f | 462 | record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0, |
99a59310 | 463 | &stackentry, 1); |
48227150 JVA |
464 | } |
465 | else | |
466 | PUT_MODE (insn, VOIDmode); | |
467 | ||
0ab759e4 RK |
468 | if (code == CODE_LABEL) |
469 | LABEL_REFS (insn) = insn; /* delete old chain */ | |
470 | ||
48227150 JVA |
471 | if (code != NOTE) |
472 | prev_code = code; | |
473 | } | |
474 | } | |
475 | ||
476 | /* If no stack register reference exists in this insn, there isn't | |
477 | anything to convert. */ | |
478 | ||
479 | if (! stack_reg_seen) | |
480 | return; | |
481 | ||
0f41302f | 482 | /* If there are stack registers, there must be at least one block. */ |
48227150 JVA |
483 | |
484 | if (! blocks) | |
485 | abort (); | |
486 | ||
487 | /* Allocate some tables that last till end of compiling this function | |
0f41302f | 488 | and some needed only in find_blocks and life_analysis. */ |
48227150 JVA |
489 | |
490 | block_begin = (rtx *) alloca (blocks * sizeof (rtx)); | |
491 | block_end = (rtx *) alloca (blocks * sizeof (rtx)); | |
492 | block_drops_in = (char *) alloca (blocks); | |
493 | ||
494 | block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def)); | |
495 | block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET)); | |
a269864e RK |
496 | bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def)); |
497 | bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET)); | |
48227150 | 498 | |
1815bfc2 | 499 | block_number = (int *) alloca ((max_uid + 1) * sizeof (int)); |
48227150 JVA |
500 | |
501 | find_blocks (first); | |
99a59310 | 502 | stack_reg_life_analysis (first, &stackentry); |
48227150 JVA |
503 | |
504 | /* Dump the life analysis debug information before jump | |
505 | optimization, as that will destroy the LABEL_REFS we keep the | |
0f41302f | 506 | information in. */ |
48227150 JVA |
507 | |
508 | if (file) | |
509 | dump_stack_info (file); | |
510 | ||
511 | convert_regs (); | |
512 | ||
513 | if (optimize) | |
514 | jump_optimize (first, 2, 0, 0); | |
515 | } | |
516 | \f | |
517 | /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the | |
518 | label's chain of references, and note which insn contains each | |
0f41302f | 519 | reference. */ |
48227150 JVA |
520 | |
521 | static void | |
522 | record_label_references (insn, pat) | |
523 | rtx insn, pat; | |
524 | { | |
525 | register enum rtx_code code = GET_CODE (pat); | |
526 | register int i; | |
527 | register char *fmt; | |
528 | ||
529 | if (code == LABEL_REF) | |
530 | { | |
531 | register rtx label = XEXP (pat, 0); | |
532 | register rtx ref; | |
533 | ||
534 | if (GET_CODE (label) != CODE_LABEL) | |
535 | abort (); | |
536 | ||
0f41302f MS |
537 | /* If this is an undefined label, LABEL_REFS (label) contains |
538 | garbage. */ | |
13684373 RK |
539 | if (INSN_UID (label) == 0) |
540 | return; | |
541 | ||
0f41302f | 542 | /* Don't make a duplicate in the code_label's chain. */ |
48227150 | 543 | |
9f5cad05 JVA |
544 | for (ref = LABEL_REFS (label); |
545 | ref && ref != label; | |
546 | ref = LABEL_NEXTREF (ref)) | |
48227150 JVA |
547 | if (CONTAINING_INSN (ref) == insn) |
548 | return; | |
549 | ||
550 | CONTAINING_INSN (pat) = insn; | |
551 | LABEL_NEXTREF (pat) = LABEL_REFS (label); | |
552 | LABEL_REFS (label) = pat; | |
553 | ||
554 | return; | |
555 | } | |
556 | ||
557 | fmt = GET_RTX_FORMAT (code); | |
558 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
559 | { | |
560 | if (fmt[i] == 'e') | |
561 | record_label_references (insn, XEXP (pat, i)); | |
562 | if (fmt[i] == 'E') | |
563 | { | |
564 | register int j; | |
565 | for (j = 0; j < XVECLEN (pat, i); j++) | |
566 | record_label_references (insn, XVECEXP (pat, i, j)); | |
567 | } | |
568 | } | |
569 | } | |
570 | \f | |
571 | /* Return a pointer to the REG expression within PAT. If PAT is not a | |
572 | REG, possible enclosed by a conversion rtx, return the inner part of | |
0f41302f | 573 | PAT that stopped the search. */ |
48227150 JVA |
574 | |
575 | static rtx * | |
576 | get_true_reg (pat) | |
577 | rtx *pat; | |
578 | { | |
99a59310 RK |
579 | for (;;) |
580 | switch (GET_CODE (*pat)) | |
581 | { | |
582 | case SUBREG: | |
583 | /* eliminate FP subregister accesses in favour of the | |
0f41302f | 584 | actual FP register in use. */ |
99a59310 RK |
585 | { |
586 | rtx subreg; | |
587 | if (FP_REG_P (subreg = SUBREG_REG (*pat))) | |
588 | { | |
589 | *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat), | |
590 | GET_MODE (subreg)); | |
591 | default: | |
592 | return pat; | |
593 | } | |
594 | } | |
595 | case FLOAT: | |
596 | case FIX: | |
597 | case FLOAT_EXTEND: | |
598 | pat = & XEXP (*pat, 0); | |
599 | } | |
48227150 | 600 | } |
48227150 | 601 | \f |
114cbee6 RS |
602 | /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands. |
603 | N_OPERANDS is the total number of operands. Return which alternative | |
604 | matched, or -1 is no alternative matches. | |
605 | ||
606 | OPERAND_MATCHES is an array which indicates which operand this | |
607 | operand matches due to the constraints, or -1 if no match is required. | |
608 | If two operands match by coincidence, but are not required to match by | |
609 | the constraints, -1 is returned. | |
610 | ||
611 | OPERAND_CLASS is an array which indicates the smallest class | |
612 | required by the constraints. If the alternative that matches calls | |
613 | for some class `class', and the operand matches a subclass of `class', | |
614 | OPERAND_CLASS is set to `class' as required by the constraints, not to | |
615 | the subclass. If an alternative allows more than one class, | |
616 | OPERAND_CLASS is set to the smallest class that is a union of the | |
0f41302f | 617 | allowed classes. */ |
114cbee6 RS |
618 | |
619 | static int | |
620 | constrain_asm_operands (n_operands, operands, operand_constraints, | |
621 | operand_matches, operand_class) | |
622 | int n_operands; | |
623 | rtx *operands; | |
624 | char **operand_constraints; | |
625 | int *operand_matches; | |
626 | enum reg_class *operand_class; | |
627 | { | |
628 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); | |
629 | char *q; | |
630 | int this_alternative, this_operand; | |
631 | int n_alternatives; | |
632 | int j; | |
633 | ||
634 | for (j = 0; j < n_operands; j++) | |
635 | constraints[j] = operand_constraints[j]; | |
636 | ||
637 | /* Compute the number of alternatives in the operands. reload has | |
638 | already guaranteed that all operands have the same number of | |
639 | alternatives. */ | |
640 | ||
641 | n_alternatives = 1; | |
642 | for (q = constraints[0]; *q; q++) | |
643 | n_alternatives += (*q == ','); | |
644 | ||
645 | this_alternative = 0; | |
646 | while (this_alternative < n_alternatives) | |
647 | { | |
648 | int lose = 0; | |
649 | int i; | |
650 | ||
651 | /* No operands match, no narrow class requirements yet. */ | |
652 | for (i = 0; i < n_operands; i++) | |
653 | { | |
654 | operand_matches[i] = -1; | |
655 | operand_class[i] = NO_REGS; | |
656 | } | |
657 | ||
658 | for (this_operand = 0; this_operand < n_operands; this_operand++) | |
659 | { | |
660 | rtx op = operands[this_operand]; | |
661 | enum machine_mode mode = GET_MODE (op); | |
662 | char *p = constraints[this_operand]; | |
663 | int offset = 0; | |
664 | int win = 0; | |
665 | int c; | |
666 | ||
667 | if (GET_CODE (op) == SUBREG) | |
668 | { | |
669 | if (GET_CODE (SUBREG_REG (op)) == REG | |
670 | && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) | |
671 | offset = SUBREG_WORD (op); | |
672 | op = SUBREG_REG (op); | |
673 | } | |
674 | ||
675 | /* An empty constraint or empty alternative | |
676 | allows anything which matched the pattern. */ | |
677 | if (*p == 0 || *p == ',') | |
678 | win = 1; | |
679 | ||
680 | while (*p && (c = *p++) != ',') | |
681 | switch (c) | |
682 | { | |
683 | case '=': | |
684 | case '+': | |
685 | case '?': | |
114cbee6 RS |
686 | case '&': |
687 | case '!': | |
688 | case '*': | |
689 | case '%': | |
0f41302f | 690 | /* Ignore these. */ |
114cbee6 RS |
691 | break; |
692 | ||
c1c35f17 | 693 | case '#': |
0f41302f | 694 | /* Ignore rest of this alternative. */ |
c1c35f17 JVA |
695 | while (*p && *p != ',') p++; |
696 | break; | |
697 | ||
114cbee6 RS |
698 | case '0': |
699 | case '1': | |
700 | case '2': | |
701 | case '3': | |
702 | case '4': | |
703 | case '5': | |
704 | /* This operand must be the same as a previous one. | |
705 | This kind of constraint is used for instructions such | |
706 | as add when they take only two operands. | |
707 | ||
0f41302f | 708 | Note that the lower-numbered operand is passed first. */ |
114cbee6 RS |
709 | |
710 | if (operands_match_p (operands[c - '0'], | |
711 | operands[this_operand])) | |
712 | { | |
713 | operand_matches[this_operand] = c - '0'; | |
714 | win = 1; | |
715 | } | |
716 | break; | |
717 | ||
718 | case 'p': | |
719 | /* p is used for address_operands. Since this is an asm, | |
0f41302f | 720 | just to make sure that the operand is valid for Pmode. */ |
114cbee6 RS |
721 | |
722 | if (strict_memory_address_p (Pmode, op)) | |
723 | win = 1; | |
724 | break; | |
725 | ||
726 | case 'g': | |
727 | /* Anything goes unless it is a REG and really has a hard reg | |
728 | but the hard reg is not in the class GENERAL_REGS. */ | |
729 | if (GENERAL_REGS == ALL_REGS | |
730 | || GET_CODE (op) != REG | |
731 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode)) | |
732 | { | |
733 | if (GET_CODE (op) == REG) | |
734 | operand_class[this_operand] | |
735 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; | |
736 | win = 1; | |
737 | } | |
738 | break; | |
739 | ||
740 | case 'r': | |
741 | if (GET_CODE (op) == REG | |
742 | && (GENERAL_REGS == ALL_REGS | |
743 | || reg_fits_class_p (op, GENERAL_REGS, offset, mode))) | |
744 | { | |
745 | operand_class[this_operand] | |
746 | = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; | |
747 | win = 1; | |
748 | } | |
749 | break; | |
750 | ||
751 | case 'X': | |
752 | /* This is used for a MATCH_SCRATCH in the cases when we | |
0f41302f | 753 | don't actually need anything. So anything goes any time. */ |
114cbee6 RS |
754 | win = 1; |
755 | break; | |
756 | ||
757 | case 'm': | |
758 | if (GET_CODE (op) == MEM) | |
759 | win = 1; | |
760 | break; | |
761 | ||
762 | case '<': | |
763 | if (GET_CODE (op) == MEM | |
764 | && (GET_CODE (XEXP (op, 0)) == PRE_DEC | |
765 | || GET_CODE (XEXP (op, 0)) == POST_DEC)) | |
766 | win = 1; | |
767 | break; | |
768 | ||
769 | case '>': | |
770 | if (GET_CODE (op) == MEM | |
771 | && (GET_CODE (XEXP (op, 0)) == PRE_INC | |
772 | || GET_CODE (XEXP (op, 0)) == POST_INC)) | |
773 | win = 1; | |
774 | break; | |
775 | ||
776 | case 'E': | |
777 | /* Match any CONST_DOUBLE, but only if | |
778 | we can examine the bits of it reliably. */ | |
779 | if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT | |
c166a311 | 780 | || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) |
114cbee6 RS |
781 | && GET_CODE (op) != VOIDmode && ! flag_pretend_float) |
782 | break; | |
783 | if (GET_CODE (op) == CONST_DOUBLE) | |
784 | win = 1; | |
785 | break; | |
786 | ||
787 | case 'F': | |
788 | if (GET_CODE (op) == CONST_DOUBLE) | |
789 | win = 1; | |
790 | break; | |
791 | ||
792 | case 'G': | |
793 | case 'H': | |
794 | if (GET_CODE (op) == CONST_DOUBLE | |
795 | && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) | |
796 | win = 1; | |
797 | break; | |
798 | ||
799 | case 's': | |
800 | if (GET_CODE (op) == CONST_INT | |
801 | || (GET_CODE (op) == CONST_DOUBLE | |
802 | && GET_MODE (op) == VOIDmode)) | |
803 | break; | |
804 | /* Fall through */ | |
805 | case 'i': | |
806 | if (CONSTANT_P (op)) | |
807 | win = 1; | |
808 | break; | |
809 | ||
810 | case 'n': | |
811 | if (GET_CODE (op) == CONST_INT | |
812 | || (GET_CODE (op) == CONST_DOUBLE | |
813 | && GET_MODE (op) == VOIDmode)) | |
814 | win = 1; | |
815 | break; | |
816 | ||
817 | case 'I': | |
818 | case 'J': | |
819 | case 'K': | |
820 | case 'L': | |
821 | case 'M': | |
822 | case 'N': | |
823 | case 'O': | |
824 | case 'P': | |
825 | if (GET_CODE (op) == CONST_INT | |
826 | && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) | |
827 | win = 1; | |
828 | break; | |
829 | ||
830 | #ifdef EXTRA_CONSTRAINT | |
831 | case 'Q': | |
832 | case 'R': | |
833 | case 'S': | |
834 | case 'T': | |
835 | case 'U': | |
836 | if (EXTRA_CONSTRAINT (op, c)) | |
837 | win = 1; | |
838 | break; | |
839 | #endif | |
840 | ||
841 | case 'V': | |
842 | if (GET_CODE (op) == MEM && ! offsettable_memref_p (op)) | |
843 | win = 1; | |
844 | break; | |
845 | ||
846 | case 'o': | |
847 | if (offsettable_memref_p (op)) | |
848 | win = 1; | |
849 | break; | |
850 | ||
851 | default: | |
852 | if (GET_CODE (op) == REG | |
853 | && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c), | |
854 | offset, mode)) | |
855 | { | |
856 | operand_class[this_operand] | |
857 | = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)]; | |
858 | win = 1; | |
859 | } | |
860 | } | |
861 | ||
862 | constraints[this_operand] = p; | |
863 | /* If this operand did not win somehow, | |
864 | this alternative loses. */ | |
865 | if (! win) | |
866 | lose = 1; | |
867 | } | |
868 | /* This alternative won; the operands are ok. | |
869 | Change whichever operands this alternative says to change. */ | |
870 | if (! lose) | |
871 | break; | |
872 | ||
873 | this_alternative++; | |
874 | } | |
875 | ||
876 | /* For operands constrained to match another operand, copy the other | |
0f41302f | 877 | operand's class to this operand's class. */ |
114cbee6 RS |
878 | for (j = 0; j < n_operands; j++) |
879 | if (operand_matches[j] >= 0) | |
880 | operand_class[j] = operand_class[operand_matches[j]]; | |
881 | ||
882 | return this_alternative == n_alternatives ? -1 : this_alternative; | |
883 | } | |
884 | \f | |
885 | /* Record the life info of each stack reg in INSN, updating REGSTACK. | |
886 | N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS | |
887 | is an array of the constraint strings used in the asm statement. | |
888 | OPERANDS is an array of all operands for the insn, and is assumed to | |
889 | contain all output operands, then all inputs operands. | |
890 | ||
891 | There are many rules that an asm statement for stack-like regs must | |
892 | follow. Those rules are explained at the top of this file: the rule | |
0f41302f | 893 | numbers below refer to that explanation. */ |
114cbee6 RS |
894 | |
895 | static void | |
896 | record_asm_reg_life (insn, regstack, operands, constraints, | |
897 | n_inputs, n_outputs) | |
898 | rtx insn; | |
899 | stack regstack; | |
900 | rtx *operands; | |
901 | char **constraints; | |
902 | int n_inputs, n_outputs; | |
903 | { | |
904 | int i; | |
905 | int n_operands = n_inputs + n_outputs; | |
906 | int first_input = n_outputs; | |
907 | int n_clobbers; | |
908 | int malformed_asm = 0; | |
909 | rtx body = PATTERN (insn); | |
910 | ||
911 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); | |
912 | ||
913 | enum reg_class *operand_class | |
914 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); | |
915 | ||
916 | int reg_used_as_output[FIRST_PSEUDO_REGISTER]; | |
917 | int implicitly_dies[FIRST_PSEUDO_REGISTER]; | |
918 | ||
919 | rtx *clobber_reg; | |
920 | ||
0e7d0eb9 | 921 | /* Find out what the constraints require. If no constraint |
854dfdff | 922 | alternative matches, this asm is malformed. */ |
114cbee6 RS |
923 | i = constrain_asm_operands (n_operands, operands, constraints, |
924 | operand_matches, operand_class); | |
925 | if (i < 0) | |
854dfdff | 926 | malformed_asm = 1; |
114cbee6 | 927 | |
0f41302f | 928 | /* Strip SUBREGs here to make the following code simpler. */ |
114cbee6 RS |
929 | for (i = 0; i < n_operands; i++) |
930 | if (GET_CODE (operands[i]) == SUBREG | |
931 | && GET_CODE (SUBREG_REG (operands[i])) == REG) | |
932 | operands[i] = SUBREG_REG (operands[i]); | |
933 | ||
934 | /* Set up CLOBBER_REG. */ | |
935 | ||
936 | n_clobbers = 0; | |
114cbee6 RS |
937 | |
938 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 JVA |
939 | { |
940 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
114cbee6 | 941 | |
3f5cfed6 JVA |
942 | for (i = 0; i < XVECLEN (body, 0); i++) |
943 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
944 | { | |
945 | rtx clobber = XVECEXP (body, 0, i); | |
946 | rtx reg = XEXP (clobber, 0); | |
114cbee6 | 947 | |
3f5cfed6 JVA |
948 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
949 | reg = SUBREG_REG (reg); | |
950 | ||
951 | if (STACK_REG_P (reg)) | |
952 | { | |
953 | clobber_reg[n_clobbers] = reg; | |
954 | n_clobbers++; | |
955 | } | |
956 | } | |
957 | } | |
114cbee6 RS |
958 | |
959 | /* Enforce rule #4: Output operands must specifically indicate which | |
960 | reg an output appears in after an asm. "=f" is not allowed: the | |
961 | operand constraints must select a class with a single reg. | |
962 | ||
963 | Also enforce rule #5: Output operands must start at the top of | |
0f41302f | 964 | the reg-stack: output operands may not "skip" a reg. */ |
114cbee6 | 965 | |
a269864e | 966 | bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output)); |
114cbee6 RS |
967 | for (i = 0; i < n_outputs; i++) |
968 | if (STACK_REG_P (operands[i])) | |
9c318306 MH |
969 | { |
970 | if (reg_class_size[(int) operand_class[i]] != 1) | |
971 | { | |
972 | error_for_asm (insn, "Output constraint %d must specify a single register", i); | |
973 | malformed_asm = 1; | |
974 | } | |
975 | else | |
976 | reg_used_as_output[REGNO (operands[i])] = 1; | |
977 | } | |
114cbee6 RS |
978 | |
979 | ||
980 | /* Search for first non-popped reg. */ | |
981 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
982 | if (! reg_used_as_output[i]) | |
983 | break; | |
984 | ||
985 | /* If there are any other popped regs, that's an error. */ | |
986 | for (; i < LAST_STACK_REG + 1; i++) | |
987 | if (reg_used_as_output[i]) | |
988 | break; | |
989 | ||
990 | if (i != LAST_STACK_REG + 1) | |
991 | { | |
992 | error_for_asm (insn, "Output regs must be grouped at top of stack"); | |
993 | malformed_asm = 1; | |
994 | } | |
995 | ||
996 | /* Enforce rule #2: All implicitly popped input regs must be closer | |
997 | to the top of the reg-stack than any input that is not implicitly | |
0f41302f | 998 | popped. */ |
114cbee6 | 999 | |
a269864e | 1000 | bzero ((char *) implicitly_dies, sizeof (implicitly_dies)); |
114cbee6 RS |
1001 | for (i = first_input; i < first_input + n_inputs; i++) |
1002 | if (STACK_REG_P (operands[i])) | |
1003 | { | |
1004 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 1005 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
1006 | int j; |
1007 | ||
1008 | for (j = 0; j < n_clobbers; j++) | |
1009 | if (operands_match_p (clobber_reg[j], operands[i])) | |
1010 | break; | |
1011 | ||
1012 | if (j < n_clobbers || operand_matches[i] >= 0) | |
1013 | implicitly_dies[REGNO (operands[i])] = 1; | |
1014 | } | |
1015 | ||
1016 | /* Search for first non-popped reg. */ | |
1017 | for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) | |
1018 | if (! implicitly_dies[i]) | |
1019 | break; | |
1020 | ||
1021 | /* If there are any other popped regs, that's an error. */ | |
1022 | for (; i < LAST_STACK_REG + 1; i++) | |
1023 | if (implicitly_dies[i]) | |
1024 | break; | |
1025 | ||
1026 | if (i != LAST_STACK_REG + 1) | |
1027 | { | |
1028 | error_for_asm (insn, | |
1029 | "Implicitly popped regs must be grouped at top of stack"); | |
1030 | malformed_asm = 1; | |
1031 | } | |
1032 | ||
1033 | /* Enfore rule #3: If any input operand uses the "f" constraint, all | |
1034 | output constraints must use the "&" earlyclobber. | |
1035 | ||
1036 | ??? Detect this more deterministically by having constraint_asm_operands | |
0f41302f | 1037 | record any earlyclobber. */ |
114cbee6 RS |
1038 | |
1039 | for (i = first_input; i < first_input + n_inputs; i++) | |
1040 | if (operand_matches[i] == -1) | |
1041 | { | |
1042 | int j; | |
1043 | ||
1044 | for (j = 0; j < n_outputs; j++) | |
1045 | if (operands_match_p (operands[j], operands[i])) | |
1046 | { | |
1047 | error_for_asm (insn, | |
1048 | "Output operand %d must use `&' constraint", j); | |
1049 | malformed_asm = 1; | |
1050 | } | |
1051 | } | |
1052 | ||
1053 | if (malformed_asm) | |
1054 | { | |
1055 | /* Avoid further trouble with this insn. */ | |
38a448ca | 1056 | PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx); |
114cbee6 RS |
1057 | PUT_MODE (insn, VOIDmode); |
1058 | return; | |
1059 | } | |
1060 | ||
1061 | /* Process all outputs */ | |
1062 | for (i = 0; i < n_outputs; i++) | |
1063 | { | |
1064 | rtx op = operands[i]; | |
1065 | ||
1066 | if (! STACK_REG_P (op)) | |
9c318306 MH |
1067 | { |
1068 | if (stack_regs_mentioned_p (op)) | |
1069 | abort (); | |
1070 | else | |
1071 | continue; | |
1072 | } | |
114cbee6 RS |
1073 | |
1074 | /* Each destination is dead before this insn. If the | |
1075 | destination is not used after this insn, record this with | |
1076 | REG_UNUSED. */ | |
1077 | ||
1078 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))) | |
38a448ca RH |
1079 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op, |
1080 | REG_NOTES (insn)); | |
114cbee6 RS |
1081 | |
1082 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op)); | |
1083 | } | |
1084 | ||
1085 | /* Process all inputs */ | |
1086 | for (i = first_input; i < first_input + n_inputs; i++) | |
1087 | { | |
1088 | if (! STACK_REG_P (operands[i])) | |
9c318306 MH |
1089 | { |
1090 | if (stack_regs_mentioned_p (operands[i])) | |
1091 | abort (); | |
1092 | else | |
1093 | continue; | |
1094 | } | |
114cbee6 RS |
1095 | |
1096 | /* If an input is dead after the insn, record a death note. | |
1097 | But don't record a death note if there is already a death note, | |
1098 | or if the input is also an output. */ | |
1099 | ||
1100 | if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])) | |
1101 | && operand_matches[i] == -1 | |
eca31501 | 1102 | && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX) |
38a448ca RH |
1103 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, operands[i], |
1104 | REG_NOTES (insn)); | |
114cbee6 RS |
1105 | |
1106 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])); | |
1107 | } | |
1108 | } | |
1109 | ||
0e7d0eb9 JVA |
1110 | /* Scan PAT, which is part of INSN, and record registers appearing in |
1111 | a SET_DEST in DEST, and other registers in SRC. | |
48227150 JVA |
1112 | |
1113 | This function does not know about SET_DESTs that are both input and | |
0f41302f | 1114 | output (such as ZERO_EXTRACT) - this cannot happen on a 387. */ |
48227150 | 1115 | |
99a59310 RK |
1116 | static void |
1117 | record_reg_life_pat (pat, src, dest, douse) | |
48227150 | 1118 | rtx pat; |
0e7d0eb9 | 1119 | HARD_REG_SET *src, *dest; |
99a59310 | 1120 | int douse; |
48227150 | 1121 | { |
0e7d0eb9 JVA |
1122 | register char *fmt; |
1123 | register int i; | |
48227150 | 1124 | |
99a59310 | 1125 | if (STACK_REG_P (pat) |
2e53329b | 1126 | || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat)))) |
48227150 | 1127 | { |
0e7d0eb9 | 1128 | if (src) |
99a59310 | 1129 | mark_regs_pat (pat, src); |
48227150 | 1130 | |
0e7d0eb9 | 1131 | if (dest) |
99a59310 | 1132 | mark_regs_pat (pat, dest); |
48227150 | 1133 | |
0e7d0eb9 | 1134 | return; |
48227150 | 1135 | } |
48227150 | 1136 | |
0e7d0eb9 | 1137 | if (GET_CODE (pat) == SET) |
48227150 | 1138 | { |
99a59310 RK |
1139 | record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0); |
1140 | record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0); | |
0e7d0eb9 JVA |
1141 | return; |
1142 | } | |
48227150 | 1143 | |
0f41302f | 1144 | /* We don't need to consider either of these cases. */ |
9c318306 | 1145 | if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER) |
0e7d0eb9 | 1146 | return; |
48227150 | 1147 | |
0e7d0eb9 JVA |
1148 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); |
1149 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
1150 | { | |
1151 | if (fmt[i] == 'E') | |
1152 | { | |
1153 | register int j; | |
48227150 | 1154 | |
0e7d0eb9 | 1155 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) |
99a59310 | 1156 | record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0); |
0e7d0eb9 JVA |
1157 | } |
1158 | else if (fmt[i] == 'e') | |
99a59310 | 1159 | record_reg_life_pat (XEXP (pat, i), src, dest, 0); |
48227150 JVA |
1160 | } |
1161 | } | |
1162 | \f | |
114cbee6 RS |
1163 | /* Calculate the number of inputs and outputs in BODY, an |
1164 | asm_operands. N_OPERANDS is the total number of operands, and | |
1165 | N_INPUTS and N_OUTPUTS are pointers to ints into which the results are | |
0f41302f | 1166 | placed. */ |
114cbee6 RS |
1167 | |
1168 | static void | |
1169 | get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs) | |
1170 | rtx body; | |
1171 | int n_operands; | |
1172 | int *n_inputs, *n_outputs; | |
1173 | { | |
1174 | if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) | |
1175 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); | |
1176 | ||
1177 | else if (GET_CODE (body) == ASM_OPERANDS) | |
1178 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body); | |
1179 | ||
1180 | else if (GET_CODE (body) == PARALLEL | |
1181 | && GET_CODE (XVECEXP (body, 0, 0)) == SET) | |
1182 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); | |
1183 | ||
1184 | else if (GET_CODE (body) == PARALLEL | |
1185 | && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) | |
1186 | *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); | |
1187 | else | |
1188 | abort (); | |
1189 | ||
1190 | *n_outputs = n_operands - *n_inputs; | |
1191 | } | |
1192 | \f | |
48227150 JVA |
1193 | /* Scan INSN, which is in BLOCK, and record the life & death of stack |
1194 | registers in REGSTACK. This function is called to process insns from | |
1195 | the last insn in a block to the first. The actual scanning is done in | |
1196 | record_reg_life_pat. | |
1197 | ||
1198 | If a register is live after a CALL_INSN, but is not a value return | |
1199 | register for that CALL_INSN, then code is emitted to initialize that | |
1200 | register. The block_end[] data is kept accurate. | |
1201 | ||
1202 | Existing death and unset notes for stack registers are deleted | |
0f41302f | 1203 | before processing the insn. */ |
48227150 JVA |
1204 | |
1205 | static void | |
1206 | record_reg_life (insn, block, regstack) | |
1207 | rtx insn; | |
1208 | int block; | |
1209 | stack regstack; | |
1210 | { | |
1211 | rtx note, *note_link; | |
114cbee6 | 1212 | int n_operands; |
48227150 JVA |
1213 | |
1214 | if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) | |
1215 | || INSN_DELETED_P (insn)) | |
1216 | return; | |
1217 | ||
1218 | /* Strip death notes for stack regs from this insn */ | |
1219 | ||
1220 | note_link = ®_NOTES(insn); | |
1221 | for (note = *note_link; note; note = XEXP (note, 1)) | |
1222 | if (STACK_REG_P (XEXP (note, 0)) | |
1223 | && (REG_NOTE_KIND (note) == REG_DEAD | |
1224 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
1225 | *note_link = XEXP (note, 1); | |
1226 | else | |
1227 | note_link = &XEXP (note, 1); | |
1228 | ||
0f41302f | 1229 | /* Process all patterns in the insn. */ |
48227150 | 1230 | |
114cbee6 RS |
1231 | n_operands = asm_noperands (PATTERN (insn)); |
1232 | if (n_operands >= 0) | |
1233 | { | |
1234 | /* This insn is an `asm' with operands. Decode the operands, | |
0f41302f | 1235 | decide how many are inputs, and record the life information. */ |
114cbee6 RS |
1236 | |
1237 | rtx operands[MAX_RECOG_OPERANDS]; | |
1238 | rtx body = PATTERN (insn); | |
1239 | int n_inputs, n_outputs; | |
1240 | char **constraints = (char **) alloca (n_operands * sizeof (char *)); | |
1241 | ||
c166a311 | 1242 | decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR); |
114cbee6 RS |
1243 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); |
1244 | record_asm_reg_life (insn, regstack, operands, constraints, | |
1245 | n_inputs, n_outputs); | |
1246 | return; | |
1247 | } | |
1248 | ||
48227150 | 1249 | { |
0e7d0eb9 JVA |
1250 | HARD_REG_SET src, dest; |
1251 | int regno; | |
48227150 | 1252 | |
0e7d0eb9 JVA |
1253 | CLEAR_HARD_REG_SET (src); |
1254 | CLEAR_HARD_REG_SET (dest); | |
0e7d0eb9 | 1255 | |
99a59310 RK |
1256 | if (GET_CODE (insn) == CALL_INSN) |
1257 | for (note = CALL_INSN_FUNCTION_USAGE (insn); | |
1258 | note; | |
1259 | note = XEXP (note, 1)) | |
1260 | if (GET_CODE (XEXP (note, 0)) == USE) | |
1261 | record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0); | |
1262 | ||
8a0c27ee | 1263 | record_reg_life_pat (PATTERN (insn), &src, &dest, 0); |
0e7d0eb9 JVA |
1264 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
1265 | if (! TEST_HARD_REG_BIT (regstack->reg_set, regno)) | |
1266 | { | |
1267 | if (TEST_HARD_REG_BIT (src, regno) | |
1268 | && ! TEST_HARD_REG_BIT (dest, regno)) | |
38a448ca RH |
1269 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, |
1270 | FP_MODE_REG (regno, DFmode), | |
1271 | REG_NOTES (insn)); | |
c8608706 | 1272 | else if (TEST_HARD_REG_BIT (dest, regno)) |
38a448ca RH |
1273 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, |
1274 | FP_MODE_REG (regno, DFmode), | |
1275 | REG_NOTES (insn)); | |
0e7d0eb9 JVA |
1276 | } |
1277 | ||
99a59310 RK |
1278 | if (GET_CODE (insn) == CALL_INSN) |
1279 | { | |
1280 | int reg; | |
48227150 | 1281 | |
99a59310 RK |
1282 | /* There might be a reg that is live after a function call. |
1283 | Initialize it to zero so that the program does not crash. See | |
0f41302f | 1284 | comment towards the end of stack_reg_life_analysis(). */ |
48227150 | 1285 | |
99a59310 RK |
1286 | for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++) |
1287 | if (! TEST_HARD_REG_BIT (dest, reg) | |
1288 | && TEST_HARD_REG_BIT (regstack->reg_set, reg)) | |
1289 | { | |
1290 | rtx init, pat; | |
48227150 | 1291 | |
99a59310 RK |
1292 | /* The insn will use virtual register numbers, and so |
1293 | convert_regs is expected to process these. But BLOCK_NUM | |
1294 | cannot be used on these insns, because they do not appear in | |
0f41302f | 1295 | block_number[]. */ |
48227150 | 1296 | |
38a448ca RH |
1297 | pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode), |
1298 | CONST0_RTX (DFmode)); | |
99a59310 RK |
1299 | init = emit_insn_after (pat, insn); |
1300 | PUT_MODE (init, QImode); | |
48227150 | 1301 | |
99a59310 | 1302 | CLEAR_HARD_REG_BIT (regstack->reg_set, reg); |
48227150 | 1303 | |
99a59310 | 1304 | /* If the CALL_INSN was the end of a block, move the |
0f41302f | 1305 | block_end to point to the new insn. */ |
48227150 | 1306 | |
99a59310 RK |
1307 | if (block_end[block] == insn) |
1308 | block_end[block] = init; | |
1309 | } | |
48227150 | 1310 | |
99a59310 RK |
1311 | /* Some regs do not survive a CALL */ |
1312 | AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set); | |
1313 | } | |
48227150 | 1314 | |
99a59310 RK |
1315 | AND_COMPL_HARD_REG_SET (regstack->reg_set, dest); |
1316 | IOR_HARD_REG_SET (regstack->reg_set, src); | |
48227150 JVA |
1317 | } |
1318 | } | |
1319 | \f | |
1320 | /* Find all basic blocks of the function, which starts with FIRST. | |
0f41302f | 1321 | For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */ |
48227150 JVA |
1322 | |
1323 | static void | |
1324 | find_blocks (first) | |
1325 | rtx first; | |
1326 | { | |
1327 | register rtx insn; | |
1328 | register int block; | |
02fa1284 | 1329 | register RTX_CODE prev_code = BARRIER; |
48227150 | 1330 | register RTX_CODE code; |
0ab759e4 | 1331 | rtx label_value_list = 0; |
48227150 JVA |
1332 | |
1333 | /* Record where all the blocks start and end. | |
0f41302f | 1334 | Record which basic blocks control can drop in to. */ |
48227150 JVA |
1335 | |
1336 | block = -1; | |
1337 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
1338 | { | |
1339 | /* Note that this loop must select the same block boundaries | |
0ab759e4 RK |
1340 | as code in reg_to_stack, but that these are not the same |
1341 | as those selected in flow.c. */ | |
48227150 JVA |
1342 | |
1343 | code = GET_CODE (insn); | |
1344 | ||
1345 | if (code == CODE_LABEL | |
1346 | || (prev_code != INSN | |
1347 | && prev_code != CALL_INSN | |
1348 | && prev_code != CODE_LABEL | |
0ab759e4 | 1349 | && GET_RTX_CLASS (code) == 'i')) |
48227150 JVA |
1350 | { |
1351 | block_begin[++block] = insn; | |
1352 | block_end[block] = insn; | |
1353 | block_drops_in[block] = prev_code != BARRIER; | |
1354 | } | |
0ab759e4 | 1355 | else if (GET_RTX_CLASS (code) == 'i') |
48227150 JVA |
1356 | block_end[block] = insn; |
1357 | ||
0ab759e4 RK |
1358 | if (GET_RTX_CLASS (code) == 'i') |
1359 | { | |
1360 | rtx note; | |
1361 | ||
1362 | /* Make a list of all labels referred to other than by jumps. */ | |
1363 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1364 | if (REG_NOTE_KIND (note) == REG_LABEL) | |
38a448ca RH |
1365 | label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0), |
1366 | label_value_list); | |
0ab759e4 | 1367 | } |
48227150 | 1368 | |
a269864e | 1369 | block_number[INSN_UID (insn)] = block; |
48227150 JVA |
1370 | |
1371 | if (code != NOTE) | |
1372 | prev_code = code; | |
1373 | } | |
1374 | ||
1375 | if (block + 1 != blocks) | |
1376 | abort (); | |
1377 | ||
6dc42e49 | 1378 | /* generate all label references to the corresponding jump insn */ |
48227150 JVA |
1379 | for (block = 0; block < blocks; block++) |
1380 | { | |
1381 | insn = block_end[block]; | |
1382 | ||
1383 | if (GET_CODE (insn) == JUMP_INSN) | |
0ab759e4 | 1384 | { |
8c8e6faa JL |
1385 | rtx pat = PATTERN (insn); |
1386 | rtx x; | |
0ab759e4 | 1387 | |
2a1777af | 1388 | if (computed_jump_p (insn)) |
0ab759e4 RK |
1389 | { |
1390 | for (x = label_value_list; x; x = XEXP (x, 1)) | |
1391 | record_label_references (insn, | |
38a448ca RH |
1392 | gen_rtx_LABEL_REF (VOIDmode, |
1393 | XEXP (x, 0))); | |
0ab759e4 RK |
1394 | |
1395 | for (x = forced_labels; x; x = XEXP (x, 1)) | |
1396 | record_label_references (insn, | |
38a448ca RH |
1397 | gen_rtx_LABEL_REF (VOIDmode, |
1398 | XEXP (x, 0))); | |
0ab759e4 RK |
1399 | } |
1400 | ||
1401 | record_label_references (insn, pat); | |
1402 | } | |
1403 | } | |
1404 | } | |
1405 | ||
1406 | /* Return 1 if X contain a REG or MEM that is not in the constant pool. */ | |
1407 | ||
1408 | static int | |
1409 | uses_reg_or_mem (x) | |
1410 | rtx x; | |
1411 | { | |
1412 | enum rtx_code code = GET_CODE (x); | |
1413 | int i, j; | |
1414 | char *fmt; | |
1415 | ||
1416 | if (code == REG | |
1417 | || (code == MEM | |
1418 | && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF | |
1419 | && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))))) | |
1420 | return 1; | |
1421 | ||
1422 | fmt = GET_RTX_FORMAT (code); | |
1423 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1424 | { | |
1425 | if (fmt[i] == 'e' | |
1426 | && uses_reg_or_mem (XEXP (x, i))) | |
1427 | return 1; | |
1428 | ||
1429 | if (fmt[i] == 'E') | |
1430 | for (j = 0; j < XVECLEN (x, i); j++) | |
1431 | if (uses_reg_or_mem (XVECEXP (x, i, j))) | |
1432 | return 1; | |
48227150 | 1433 | } |
0ab759e4 RK |
1434 | |
1435 | return 0; | |
48227150 | 1436 | } |
96237362 RS |
1437 | |
1438 | /* If current function returns its result in an fp stack register, | |
9f9ed50a | 1439 | return the REG. Otherwise, return 0. */ |
96237362 | 1440 | |
99a59310 RK |
1441 | static rtx |
1442 | stack_result (decl) | |
96237362 RS |
1443 | tree decl; |
1444 | { | |
1445 | rtx result = DECL_RTL (DECL_RESULT (decl)); | |
1446 | ||
1447 | if (result != 0 | |
9f9ed50a RK |
1448 | && ! (GET_CODE (result) == REG |
1449 | && REGNO (result) < FIRST_PSEUDO_REGISTER)) | |
96237362 RS |
1450 | { |
1451 | #ifdef FUNCTION_OUTGOING_VALUE | |
1452 | result | |
1453 | = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
1454 | #else | |
1455 | result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); | |
1456 | #endif | |
1457 | } | |
1458 | ||
9f9ed50a | 1459 | return result != 0 && STACK_REG_P (result) ? result : 0; |
96237362 | 1460 | } |
48227150 JVA |
1461 | \f |
1462 | /* Determine the which registers are live at the start of each basic | |
1463 | block of the function whose first insn is FIRST. | |
1464 | ||
1465 | First, if the function returns a real_type, mark the function | |
1466 | return type as live at each return point, as the RTL may not give any | |
1467 | hint that the register is live. | |
1468 | ||
1469 | Then, start with the last block and work back to the first block. | |
1470 | Similarly, work backwards within each block, insn by insn, recording | |
99a59310 | 1471 | which regs are dead and which are used (and therefore live) in the |
48227150 JVA |
1472 | hard reg set of block_stack_in[]. |
1473 | ||
1474 | After processing each basic block, if there is a label at the start | |
1475 | of the block, propagate the live registers to all jumps to this block. | |
1476 | ||
1477 | As a special case, if there are regs live in this block, that are | |
1478 | not live in a block containing a jump to this label, and the block | |
1479 | containing the jump has already been processed, we must propagate this | |
1480 | block's entry register life back to the block containing the jump, and | |
1481 | restart life analysis from there. | |
1482 | ||
1483 | In the worst case, this function may traverse the insns | |
1484 | REG_STACK_SIZE times. This is necessary, since a jump towards the end | |
1485 | of the insns may not know that a reg is live at a target that is early | |
1486 | in the insns. So we back up and start over with the new reg live. | |
1487 | ||
1488 | If there are registers that are live at the start of the function, | |
1489 | insns are emitted to initialize these registers. Something similar is | |
0f41302f | 1490 | done after CALL_INSNs in record_reg_life. */ |
48227150 JVA |
1491 | |
1492 | static void | |
99a59310 | 1493 | stack_reg_life_analysis (first, stackentry) |
48227150 | 1494 | rtx first; |
99a59310 | 1495 | HARD_REG_SET *stackentry; |
48227150 JVA |
1496 | { |
1497 | int reg, block; | |
1498 | struct stack_def regstack; | |
1499 | ||
99a59310 RK |
1500 | { |
1501 | rtx retvalue; | |
48227150 | 1502 | |
9c318306 | 1503 | if ((retvalue = stack_result (current_function_decl))) |
99a59310 | 1504 | { |
0f41302f | 1505 | /* Find all RETURN insns and mark them. */ |
0e7d0eb9 | 1506 | |
99a59310 RK |
1507 | for (block = blocks - 1; --block >= 0;) |
1508 | if (GET_CODE (block_end[block]) == JUMP_INSN | |
1509 | && GET_CODE (PATTERN (block_end[block])) == RETURN) | |
1510 | mark_regs_pat (retvalue, block_out_reg_set+block); | |
48227150 | 1511 | |
99a59310 | 1512 | /* Mark off the end of last block if we "fall off" the end of the |
0f41302f | 1513 | function into the epilogue. */ |
48227150 | 1514 | |
99a59310 RK |
1515 | if (GET_CODE (block_end[blocks-1]) != JUMP_INSN |
1516 | || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN) | |
1517 | mark_regs_pat (retvalue, block_out_reg_set+blocks-1); | |
1518 | } | |
1519 | } | |
48227150 JVA |
1520 | |
1521 | /* now scan all blocks backward for stack register use */ | |
1522 | ||
1523 | block = blocks - 1; | |
1524 | while (block >= 0) | |
1525 | { | |
1526 | register rtx insn, prev; | |
1527 | ||
1528 | /* current register status at last instruction */ | |
1529 | ||
1530 | COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]); | |
1531 | ||
1532 | prev = block_end[block]; | |
1533 | do | |
1534 | { | |
1535 | insn = prev; | |
1536 | prev = PREV_INSN (insn); | |
1537 | ||
1538 | /* If the insn is a CALL_INSN, we need to ensure that | |
1539 | everything dies. But otherwise don't process unless there | |
0f41302f | 1540 | are some stack regs present. */ |
48227150 JVA |
1541 | |
1542 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) | |
1543 | record_reg_life (insn, block, ®stack); | |
1544 | ||
1545 | } while (insn != block_begin[block]); | |
1546 | ||
1547 | /* Set the state at the start of the block. Mark that no | |
0f41302f | 1548 | register mapping information known yet. */ |
48227150 JVA |
1549 | |
1550 | COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set); | |
1551 | block_stack_in[block].top = -2; | |
1552 | ||
1553 | /* If there is a label, propagate our register life to all jumps | |
0f41302f | 1554 | to this label. */ |
48227150 JVA |
1555 | |
1556 | if (GET_CODE (insn) == CODE_LABEL) | |
1557 | { | |
1558 | register rtx label; | |
1559 | int must_restart = 0; | |
1560 | ||
1561 | for (label = LABEL_REFS (insn); label != insn; | |
1562 | label = LABEL_NEXTREF (label)) | |
1563 | { | |
1564 | int jump_block = BLOCK_NUM (CONTAINING_INSN (label)); | |
1565 | ||
1566 | if (jump_block < block) | |
1567 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], | |
1568 | block_stack_in[block].reg_set); | |
1569 | else | |
1570 | { | |
1571 | /* The block containing the jump has already been | |
1572 | processed. If there are registers that were not known | |
1573 | to be live then, but are live now, we must back up | |
1574 | and restart life analysis from that point with the new | |
0f41302f | 1575 | life information. */ |
48227150 JVA |
1576 | |
1577 | GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set, | |
1578 | block_out_reg_set[jump_block], | |
1579 | win); | |
1580 | ||
1581 | IOR_HARD_REG_SET (block_out_reg_set[jump_block], | |
1582 | block_stack_in[block].reg_set); | |
1583 | ||
1584 | block = jump_block; | |
1585 | must_restart = 1; | |
1586 | ||
1587 | win: | |
1588 | ; | |
1589 | } | |
1590 | } | |
1591 | if (must_restart) | |
1592 | continue; | |
1593 | } | |
1594 | ||
1595 | if (block_drops_in[block]) | |
1596 | IOR_HARD_REG_SET (block_out_reg_set[block-1], | |
1597 | block_stack_in[block].reg_set); | |
1598 | ||
1599 | block -= 1; | |
1600 | } | |
1601 | ||
48227150 JVA |
1602 | /* If any reg is live at the start of the first block of a |
1603 | function, then we must guarantee that the reg holds some value by | |
1604 | generating our own "load" of that register. Otherwise a 387 would | |
0f41302f | 1605 | fault trying to access an empty register. */ |
48227150 | 1606 | |
48227150 | 1607 | /* Load zero into each live register. The fact that a register |
99a59310 RK |
1608 | appears live at the function start necessarily implies an error |
1609 | in the user program: it means that (unless the offending code is *never* | |
1610 | executed) this program is using uninitialised floating point | |
1611 | variables. In order to keep broken code like this happy, we initialise | |
1612 | those variables with zero. | |
48227150 JVA |
1613 | |
1614 | Note that we are inserting virtual register references here: | |
1615 | these insns must be processed by convert_regs later. Also, these | |
0f41302f | 1616 | insns will not be in block_number, so BLOCK_NUM() will fail for them. */ |
48227150 JVA |
1617 | |
1618 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) | |
99a59310 RK |
1619 | if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg) |
1620 | && ! TEST_HARD_REG_BIT (*stackentry, reg)) | |
48227150 JVA |
1621 | { |
1622 | rtx init_rtx; | |
1623 | ||
38a448ca RH |
1624 | init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode), |
1625 | CONST0_RTX (DFmode)); | |
48227150 JVA |
1626 | block_begin[0] = emit_insn_after (init_rtx, first); |
1627 | PUT_MODE (block_begin[0], QImode); | |
1628 | ||
1629 | CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg); | |
1630 | } | |
48227150 JVA |
1631 | } |
1632 | \f | |
1633 | /***************************************************************************** | |
d45cf215 | 1634 | This section deals with stack register substitution, and forms the second |
48227150 JVA |
1635 | pass over the RTL. |
1636 | *****************************************************************************/ | |
1637 | ||
1638 | /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for | |
0f41302f | 1639 | the desired hard REGNO. */ |
48227150 JVA |
1640 | |
1641 | static void | |
1642 | replace_reg (reg, regno) | |
1643 | rtx *reg; | |
1644 | int regno; | |
1645 | { | |
1646 | if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG | |
1647 | || ! STACK_REG_P (*reg)) | |
1648 | abort (); | |
1649 | ||
99a59310 RK |
1650 | switch (GET_MODE_CLASS (GET_MODE (*reg))) |
1651 | { | |
1652 | default: abort (); | |
1653 | case MODE_FLOAT: | |
1654 | case MODE_COMPLEX_FLOAT:; | |
1655 | } | |
7d0e3dd4 | 1656 | |
99a59310 | 1657 | *reg = FP_MODE_REG (regno, GET_MODE (*reg)); |
48227150 JVA |
1658 | } |
1659 | ||
1660 | /* Remove a note of type NOTE, which must be found, for register | |
0f41302f | 1661 | number REGNO from INSN. Remove only one such note. */ |
48227150 JVA |
1662 | |
1663 | static void | |
1664 | remove_regno_note (insn, note, regno) | |
1665 | rtx insn; | |
1666 | enum reg_note note; | |
1667 | int regno; | |
1668 | { | |
1669 | register rtx *note_link, this; | |
1670 | ||
1671 | note_link = ®_NOTES(insn); | |
1672 | for (this = *note_link; this; this = XEXP (this, 1)) | |
1673 | if (REG_NOTE_KIND (this) == note | |
1674 | && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) | |
1675 | { | |
1676 | *note_link = XEXP (this, 1); | |
1677 | return; | |
1678 | } | |
1679 | else | |
1680 | note_link = &XEXP (this, 1); | |
1681 | ||
1682 | abort (); | |
1683 | } | |
1684 | ||
1685 | /* Find the hard register number of virtual register REG in REGSTACK. | |
1686 | The hard register number is relative to the top of the stack. -1 is | |
0f41302f | 1687 | returned if the register is not found. */ |
48227150 JVA |
1688 | |
1689 | static int | |
1690 | get_hard_regnum (regstack, reg) | |
1691 | stack regstack; | |
1692 | rtx reg; | |
1693 | { | |
1694 | int i; | |
1695 | ||
1696 | if (! STACK_REG_P (reg)) | |
1697 | abort (); | |
1698 | ||
1699 | for (i = regstack->top; i >= 0; i--) | |
1700 | if (regstack->reg[i] == REGNO (reg)) | |
1701 | break; | |
1702 | ||
1703 | return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; | |
1704 | } | |
1705 | ||
1706 | /* Delete INSN from the RTL. Mark the insn, but don't remove it from | |
1707 | the chain of insns. Doing so could confuse block_begin and block_end | |
0f41302f | 1708 | if this were the only insn in the block. */ |
48227150 JVA |
1709 | |
1710 | static void | |
1711 | delete_insn_for_stacker (insn) | |
1712 | rtx insn; | |
1713 | { | |
1714 | PUT_CODE (insn, NOTE); | |
1715 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1716 | NOTE_SOURCE_FILE (insn) = 0; | |
48227150 JVA |
1717 | } |
1718 | \f | |
1719 | /* Emit an insn to pop virtual register REG before or after INSN. | |
1720 | REGSTACK is the stack state after INSN and is updated to reflect this | |
1721 | pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn | |
1722 | is represented as a SET whose destination is the register to be popped | |
1723 | and source is the top of stack. A death note for the top of stack | |
0f41302f | 1724 | cases the movdf pattern to pop. */ |
48227150 JVA |
1725 | |
1726 | static rtx | |
1727 | emit_pop_insn (insn, regstack, reg, when) | |
1728 | rtx insn; | |
1729 | stack regstack; | |
1730 | rtx reg; | |
1731 | rtx (*when)(); | |
1732 | { | |
1733 | rtx pop_insn, pop_rtx; | |
1734 | int hard_regno; | |
1735 | ||
1736 | hard_regno = get_hard_regnum (regstack, reg); | |
1737 | ||
1738 | if (hard_regno < FIRST_STACK_REG) | |
1739 | abort (); | |
1740 | ||
38a448ca RH |
1741 | pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode), |
1742 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
48227150 JVA |
1743 | |
1744 | pop_insn = (*when) (pop_rtx, insn); | |
0f41302f | 1745 | /* ??? This used to be VOIDmode, but that seems wrong. */ |
eca31501 | 1746 | PUT_MODE (pop_insn, QImode); |
48227150 | 1747 | |
38a448ca RH |
1748 | REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD, |
1749 | FP_MODE_REG (FIRST_STACK_REG, DFmode), | |
1750 | REG_NOTES (pop_insn)); | |
48227150 JVA |
1751 | |
1752 | regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] | |
1753 | = regstack->reg[regstack->top]; | |
1754 | regstack->top -= 1; | |
1755 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); | |
1756 | ||
1757 | return pop_insn; | |
1758 | } | |
1759 | \f | |
1760 | /* Emit an insn before or after INSN to swap virtual register REG with the | |
1761 | top of stack. WHEN should be `emit_insn_before' or `emit_insn_before' | |
1762 | REGSTACK is the stack state before the swap, and is updated to reflect | |
1763 | the swap. A swap insn is represented as a PARALLEL of two patterns: | |
1764 | each pattern moves one reg to the other. | |
1765 | ||
0f41302f | 1766 | If REG is already at the top of the stack, no insn is emitted. */ |
48227150 JVA |
1767 | |
1768 | static void | |
eca31501 | 1769 | emit_swap_insn (insn, regstack, reg) |
48227150 JVA |
1770 | rtx insn; |
1771 | stack regstack; | |
eca31501 | 1772 | rtx reg; |
48227150 | 1773 | { |
eca31501 | 1774 | int hard_regno; |
48227150 JVA |
1775 | rtx gen_swapdf(); |
1776 | rtx swap_rtx, swap_insn; | |
eca31501 JVA |
1777 | int tmp, other_reg; /* swap regno temps */ |
1778 | rtx i1; /* the stack-reg insn prior to INSN */ | |
1779 | rtx i1set = NULL_RTX; /* the SET rtx within I1 */ | |
48227150 | 1780 | |
eca31501 JVA |
1781 | hard_regno = get_hard_regnum (regstack, reg); |
1782 | ||
1783 | if (hard_regno < FIRST_STACK_REG) | |
1784 | abort (); | |
48227150 JVA |
1785 | if (hard_regno == FIRST_STACK_REG) |
1786 | return; | |
1787 | ||
eca31501 | 1788 | other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); |
48227150 | 1789 | |
eca31501 JVA |
1790 | tmp = regstack->reg[other_reg]; |
1791 | regstack->reg[other_reg] = regstack->reg[regstack->top]; | |
48227150 | 1792 | regstack->reg[regstack->top] = tmp; |
48227150 | 1793 | |
eca31501 JVA |
1794 | /* Find the previous insn involving stack regs, but don't go past |
1795 | any labels, calls or jumps. */ | |
1796 | i1 = prev_nonnote_insn (insn); | |
1797 | while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode) | |
1798 | i1 = prev_nonnote_insn (i1); | |
48227150 | 1799 | |
eca31501 JVA |
1800 | if (i1) |
1801 | i1set = single_set (i1); | |
48227150 | 1802 | |
eca31501 JVA |
1803 | if (i1set) |
1804 | { | |
eca31501 JVA |
1805 | rtx i1src = *get_true_reg (&SET_SRC (i1set)); |
1806 | rtx i1dest = *get_true_reg (&SET_DEST (i1set)); | |
48227150 | 1807 | |
eca31501 | 1808 | /* If the previous register stack push was from the reg we are to |
0f41302f | 1809 | swap with, omit the swap. */ |
eca31501 JVA |
1810 | |
1811 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG | |
1812 | && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1 | |
1813 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1814 | return; | |
1815 | ||
1816 | /* If the previous insn wrote to the reg we are to swap with, | |
1817 | omit the swap. */ | |
1818 | ||
1819 | if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno | |
1820 | && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG | |
1821 | && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) | |
1822 | return; | |
1823 | } | |
1824 | ||
6ec87b9d JVA |
1825 | if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1))) |
1826 | { | |
1827 | i1 = next_nonnote_insn (i1); | |
1828 | if (i1 == insn) | |
1829 | abort (); | |
1830 | } | |
fabf7750 | 1831 | |
99a59310 RK |
1832 | swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode), |
1833 | FP_MODE_REG (FIRST_STACK_REG, DFmode)); | |
eca31501 | 1834 | swap_insn = emit_insn_after (swap_rtx, i1); |
0f41302f | 1835 | /* ??? This used to be VOIDmode, but that seems wrong. */ |
eca31501 | 1836 | PUT_MODE (swap_insn, QImode); |
48227150 JVA |
1837 | } |
1838 | \f | |
1839 | /* Handle a move to or from a stack register in PAT, which is in INSN. | |
0f41302f | 1840 | REGSTACK is the current stack. */ |
48227150 JVA |
1841 | |
1842 | static void | |
1843 | move_for_stack_reg (insn, regstack, pat) | |
1844 | rtx insn; | |
1845 | stack regstack; | |
1846 | rtx pat; | |
1847 | { | |
99a59310 RK |
1848 | rtx *psrc = get_true_reg (&SET_SRC (pat)); |
1849 | rtx *pdest = get_true_reg (&SET_DEST (pat)); | |
1850 | rtx src, dest; | |
48227150 JVA |
1851 | rtx note; |
1852 | ||
99a59310 RK |
1853 | src = *psrc; dest = *pdest; |
1854 | ||
1855 | if (STACK_REG_P (src) && STACK_REG_P (dest)) | |
48227150 JVA |
1856 | { |
1857 | /* Write from one stack reg to another. If SRC dies here, then | |
0f41302f | 1858 | just change the register mapping and delete the insn. */ |
48227150 | 1859 | |
99a59310 | 1860 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1861 | if (note) |
1862 | { | |
1863 | int i; | |
1864 | ||
0f41302f | 1865 | /* If this is a no-op move, there must not be a REG_DEAD note. */ |
99a59310 | 1866 | if (REGNO (src) == REGNO (dest)) |
48227150 JVA |
1867 | abort (); |
1868 | ||
1869 | for (i = regstack->top; i >= 0; i--) | |
99a59310 | 1870 | if (regstack->reg[i] == REGNO (src)) |
48227150 JVA |
1871 | break; |
1872 | ||
0f41302f | 1873 | /* The source must be live, and the dest must be dead. */ |
99a59310 | 1874 | if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1875 | abort (); |
1876 | ||
1877 | /* It is possible that the dest is unused after this insn. | |
0f41302f | 1878 | If so, just pop the src. */ |
48227150 | 1879 | |
99a59310 | 1880 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
48227150 | 1881 | { |
99a59310 | 1882 | emit_pop_insn (insn, regstack, src, emit_insn_after); |
48227150 JVA |
1883 | |
1884 | delete_insn_for_stacker (insn); | |
1885 | return; | |
1886 | } | |
1887 | ||
99a59310 | 1888 | regstack->reg[i] = REGNO (dest); |
48227150 | 1889 | |
99a59310 RK |
1890 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); |
1891 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); | |
48227150 JVA |
1892 | |
1893 | delete_insn_for_stacker (insn); | |
1894 | ||
1895 | return; | |
1896 | } | |
1897 | ||
0f41302f | 1898 | /* The source reg does not die. */ |
48227150 JVA |
1899 | |
1900 | /* If this appears to be a no-op move, delete it, or else it | |
1901 | will confuse the machine description output patterns. But if | |
1902 | it is REG_UNUSED, we must pop the reg now, as per-insn processing | |
0f41302f | 1903 | for REG_UNUSED will not work for deleted insns. */ |
48227150 | 1904 | |
99a59310 | 1905 | if (REGNO (src) == REGNO (dest)) |
48227150 | 1906 | { |
99a59310 RK |
1907 | if (find_regno_note (insn, REG_UNUSED, REGNO (dest))) |
1908 | emit_pop_insn (insn, regstack, dest, emit_insn_after); | |
48227150 JVA |
1909 | |
1910 | delete_insn_for_stacker (insn); | |
1911 | return; | |
1912 | } | |
1913 | ||
1914 | /* The destination ought to be dead */ | |
99a59310 | 1915 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1916 | abort (); |
1917 | ||
99a59310 | 1918 | replace_reg (psrc, get_hard_regnum (regstack, src)); |
48227150 | 1919 | |
99a59310 RK |
1920 | regstack->reg[++regstack->top] = REGNO (dest); |
1921 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1922 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 | 1923 | } |
99a59310 | 1924 | else if (STACK_REG_P (src)) |
48227150 JVA |
1925 | { |
1926 | /* Save from a stack reg to MEM, or possibly integer reg. Since | |
1927 | only top of stack may be saved, emit an exchange first if | |
0f41302f | 1928 | needs be. */ |
48227150 | 1929 | |
99a59310 | 1930 | emit_swap_insn (insn, regstack, src); |
48227150 | 1931 | |
99a59310 | 1932 | note = find_regno_note (insn, REG_DEAD, REGNO (src)); |
48227150 JVA |
1933 | if (note) |
1934 | { | |
1935 | replace_reg (&XEXP (note, 0), FIRST_STACK_REG); | |
1936 | regstack->top--; | |
99a59310 | 1937 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src)); |
48227150 | 1938 | } |
314d1f3c | 1939 | else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1) |
b40b8b06 JVA |
1940 | { |
1941 | /* A 387 cannot write an XFmode value to a MEM without | |
1942 | clobbering the source reg. The output code can handle | |
1943 | this by reading back the value from the MEM. | |
1944 | But it is more efficient to use a temp register if one is | |
1945 | available. Push the source value here if the register | |
1946 | stack is not full, and then write the value to memory via | |
1947 | a pop. */ | |
1948 | rtx push_rtx, push_insn; | |
99a59310 | 1949 | rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode); |
b40b8b06 JVA |
1950 | |
1951 | push_rtx = gen_movxf (top_stack_reg, top_stack_reg); | |
1952 | push_insn = emit_insn_before (push_rtx, insn); | |
1953 | PUT_MODE (push_insn, QImode); | |
38a448ca RH |
1954 | REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg, |
1955 | REG_NOTES (insn)); | |
b40b8b06 | 1956 | } |
48227150 | 1957 | |
99a59310 | 1958 | replace_reg (psrc, FIRST_STACK_REG); |
48227150 | 1959 | } |
99a59310 | 1960 | else if (STACK_REG_P (dest)) |
48227150 JVA |
1961 | { |
1962 | /* Load from MEM, or possibly integer REG or constant, into the | |
1963 | stack regs. The actual target is always the top of the | |
1964 | stack. The stack mapping is changed to reflect that DEST is | |
1965 | now at top of stack. */ | |
1966 | ||
1967 | /* The destination ought to be dead */ | |
99a59310 | 1968 | if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG) |
48227150 JVA |
1969 | abort (); |
1970 | ||
1971 | if (regstack->top >= REG_STACK_SIZE) | |
1972 | abort (); | |
1973 | ||
99a59310 RK |
1974 | regstack->reg[++regstack->top] = REGNO (dest); |
1975 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest)); | |
1976 | replace_reg (pdest, FIRST_STACK_REG); | |
48227150 JVA |
1977 | } |
1978 | else | |
1979 | abort (); | |
1980 | } | |
1981 | \f | |
841fc5a1 | 1982 | static void |
eca31501 JVA |
1983 | swap_rtx_condition (pat) |
1984 | rtx pat; | |
1985 | { | |
1986 | register char *fmt; | |
1987 | register int i; | |
1988 | ||
1989 | if (GET_RTX_CLASS (GET_CODE (pat)) == '<') | |
1990 | { | |
1991 | PUT_CODE (pat, swap_condition (GET_CODE (pat))); | |
1992 | return; | |
1993 | } | |
1994 | ||
1995 | fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
1996 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
1997 | { | |
1998 | if (fmt[i] == 'E') | |
1999 | { | |
2000 | register int j; | |
2001 | ||
2002 | for (j = XVECLEN (pat, i) - 1; j >= 0; j--) | |
2003 | swap_rtx_condition (XVECEXP (pat, i, j)); | |
2004 | } | |
2005 | else if (fmt[i] == 'e') | |
2006 | swap_rtx_condition (XEXP (pat, i)); | |
2007 | } | |
2008 | } | |
2009 | ||
48227150 JVA |
2010 | /* Handle a comparison. Special care needs to be taken to avoid |
2011 | causing comparisons that a 387 cannot do correctly, such as EQ. | |
2012 | ||
2013 | Also, a pop insn may need to be emitted. The 387 does have an | |
2014 | `fcompp' insn that can pop two regs, but it is sometimes too expensive | |
2015 | to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to | |
0f41302f | 2016 | set up. */ |
48227150 JVA |
2017 | |
2018 | static void | |
2019 | compare_for_stack_reg (insn, regstack, pat) | |
2020 | rtx insn; | |
2021 | stack regstack; | |
2022 | rtx pat; | |
2023 | { | |
2024 | rtx *src1, *src2; | |
2025 | rtx src1_note, src2_note; | |
4e97601f | 2026 | rtx cc0_user; |
914ec131 | 2027 | int have_cmove; |
48227150 JVA |
2028 | |
2029 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
2030 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
4e97601f SC |
2031 | cc0_user = next_cc0_user (insn); |
2032 | ||
2033 | /* If the insn that uses cc0 is a conditional move, then the destination | |
2034 | must be the top of stack */ | |
2035 | if (GET_CODE (PATTERN (cc0_user)) == SET | |
2036 | && SET_DEST (PATTERN (cc0_user)) != pc_rtx | |
2037 | && GET_CODE (SET_SRC (PATTERN (cc0_user))) == IF_THEN_ELSE) | |
2038 | { | |
69d4ca36 | 2039 | rtx *dest; |
4e97601f SC |
2040 | |
2041 | dest = get_true_reg (&SET_DEST (PATTERN (cc0_user))); | |
914ec131 SC |
2042 | |
2043 | have_cmove = 1; | |
2044 | if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG | |
2045 | && REGNO (*dest) != regstack->reg[regstack->top]) | |
4e97601f SC |
2046 | { |
2047 | emit_swap_insn (insn, regstack, *dest); | |
2048 | } | |
2049 | } | |
914ec131 SC |
2050 | else |
2051 | have_cmove = 0; | |
48227150 | 2052 | |
eca31501 | 2053 | /* ??? If fxch turns out to be cheaper than fstp, give priority to |
0f41302f | 2054 | registers that die in this insn - move those to stack top first. */ |
eca31501 JVA |
2055 | if (! STACK_REG_P (*src1) |
2056 | || (STACK_REG_P (*src2) | |
2057 | && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) | |
2058 | { | |
2059 | rtx temp, next; | |
48227150 | 2060 | |
dc78213e JVA |
2061 | temp = XEXP (SET_SRC (pat), 0); |
2062 | XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1); | |
2063 | XEXP (SET_SRC (pat), 1) = temp; | |
2064 | ||
2065 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
2066 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
eca31501 JVA |
2067 | |
2068 | next = next_cc0_user (insn); | |
2069 | if (next == NULL_RTX) | |
2070 | abort (); | |
2071 | ||
2072 | swap_rtx_condition (PATTERN (next)); | |
2073 | INSN_CODE (next) = -1; | |
b9342cdf | 2074 | INSN_CODE (insn) = -1; |
eca31501 | 2075 | } |
48227150 | 2076 | |
0f41302f | 2077 | /* We will fix any death note later. */ |
48227150 JVA |
2078 | |
2079 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2080 | ||
2081 | if (STACK_REG_P (*src2)) | |
2082 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
2083 | else | |
eca31501 | 2084 | src2_note = NULL_RTX; |
48227150 | 2085 | |
914ec131 SC |
2086 | if (! have_cmove) |
2087 | emit_swap_insn (insn, regstack, *src1); | |
48227150 JVA |
2088 | |
2089 | replace_reg (src1, FIRST_STACK_REG); | |
2090 | ||
2091 | if (STACK_REG_P (*src2)) | |
2092 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
2093 | ||
2094 | if (src1_note) | |
2095 | { | |
7aa74e4c | 2096 | pop_stack (regstack, REGNO (XEXP (src1_note, 0))); |
48227150 | 2097 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); |
48227150 JVA |
2098 | } |
2099 | ||
2100 | /* If the second operand dies, handle that. But if the operands are | |
2101 | the same stack register, don't bother, because only one death is | |
0f41302f | 2102 | needed, and it was just handled. */ |
48227150 JVA |
2103 | |
2104 | if (src2_note | |
eca31501 | 2105 | && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) |
48227150 JVA |
2106 | && REGNO (*src1) == REGNO (*src2))) |
2107 | { | |
2108 | /* As a special case, two regs may die in this insn if src2 is | |
2109 | next to top of stack and the top of stack also dies. Since | |
2110 | we have already popped src1, "next to top of stack" is really | |
0f41302f | 2111 | at top (FIRST_STACK_REG) now. */ |
48227150 JVA |
2112 | |
2113 | if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG | |
2114 | && src1_note) | |
2115 | { | |
7aa74e4c | 2116 | pop_stack (regstack, REGNO (XEXP (src2_note, 0))); |
48227150 | 2117 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); |
48227150 JVA |
2118 | } |
2119 | else | |
2120 | { | |
2121 | /* The 386 can only represent death of the first operand in | |
2122 | the case handled above. In all other cases, emit a separate | |
0f41302f | 2123 | pop and remove the death note from here. */ |
48227150 | 2124 | |
c572e5ba JVA |
2125 | link_cc0_insns (insn); |
2126 | ||
48227150 JVA |
2127 | remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); |
2128 | ||
2129 | emit_pop_insn (insn, regstack, XEXP (src2_note, 0), | |
2130 | emit_insn_after); | |
2131 | } | |
2132 | } | |
2133 | } | |
2134 | \f | |
2135 | /* Substitute new registers in PAT, which is part of INSN. REGSTACK | |
0f41302f | 2136 | is the current register layout. */ |
48227150 JVA |
2137 | |
2138 | static void | |
2139 | subst_stack_regs_pat (insn, regstack, pat) | |
2140 | rtx insn; | |
2141 | stack regstack; | |
2142 | rtx pat; | |
2143 | { | |
2144 | rtx *dest, *src; | |
eca31501 | 2145 | rtx *src1 = (rtx *) NULL_PTR, *src2; |
48227150 JVA |
2146 | rtx src1_note, src2_note; |
2147 | ||
2148 | if (GET_CODE (pat) != SET) | |
2149 | return; | |
2150 | ||
2151 | dest = get_true_reg (&SET_DEST (pat)); | |
2152 | src = get_true_reg (&SET_SRC (pat)); | |
2153 | ||
0f41302f | 2154 | /* See if this is a `movM' pattern, and handle elsewhere if so. */ |
48227150 JVA |
2155 | |
2156 | if (*dest != cc0_rtx | |
2157 | && (STACK_REG_P (*src) | |
2158 | || (STACK_REG_P (*dest) | |
2159 | && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM | |
2160 | || GET_CODE (*src) == CONST_DOUBLE)))) | |
2161 | move_for_stack_reg (insn, regstack, pat); | |
2162 | else | |
2163 | switch (GET_CODE (SET_SRC (pat))) | |
2164 | { | |
2165 | case COMPARE: | |
2166 | compare_for_stack_reg (insn, regstack, pat); | |
2167 | break; | |
2168 | ||
2169 | case CALL: | |
99a59310 RK |
2170 | { |
2171 | int count; | |
2172 | for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest)); | |
2173 | --count >= 0;) | |
2174 | { | |
2175 | regstack->reg[++regstack->top] = REGNO (*dest) + count; | |
2176 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count); | |
2177 | } | |
2178 | } | |
48227150 JVA |
2179 | replace_reg (dest, FIRST_STACK_REG); |
2180 | break; | |
2181 | ||
2182 | case REG: | |
0f41302f | 2183 | /* This is a `tstM2' case. */ |
48227150 JVA |
2184 | if (*dest != cc0_rtx) |
2185 | abort (); | |
2186 | ||
2187 | src1 = src; | |
2188 | ||
0f41302f | 2189 | /* Fall through. */ |
48227150 | 2190 | |
b9342cdf | 2191 | case FLOAT_TRUNCATE: |
48227150 JVA |
2192 | case SQRT: |
2193 | case ABS: | |
2194 | case NEG: | |
2195 | /* These insns only operate on the top of the stack. DEST might | |
2196 | be cc0_rtx if we're processing a tstM pattern. Also, it's | |
2197 | possible that the tstM case results in a REG_DEAD note on the | |
2198 | source. */ | |
2199 | ||
2200 | if (src1 == 0) | |
2201 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
2202 | ||
eca31501 | 2203 | emit_swap_insn (insn, regstack, *src1); |
48227150 JVA |
2204 | |
2205 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2206 | ||
2207 | if (STACK_REG_P (*dest)) | |
2208 | replace_reg (dest, FIRST_STACK_REG); | |
2209 | ||
2210 | if (src1_note) | |
2211 | { | |
2212 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
2213 | regstack->top--; | |
2214 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
2215 | } | |
2216 | ||
2217 | replace_reg (src1, FIRST_STACK_REG); | |
2218 | ||
2219 | break; | |
2220 | ||
2221 | case MINUS: | |
2222 | case DIV: | |
2223 | /* On i386, reversed forms of subM3 and divM3 exist for | |
2224 | MODE_FLOAT, so the same code that works for addM3 and mulM3 | |
0f41302f | 2225 | can be used. */ |
48227150 JVA |
2226 | case MULT: |
2227 | case PLUS: | |
2228 | /* These insns can accept the top of stack as a destination | |
2229 | from a stack reg or mem, or can use the top of stack as a | |
2230 | source and some other stack register (possibly top of stack) | |
0f41302f | 2231 | as a destination. */ |
48227150 JVA |
2232 | |
2233 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); | |
2234 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
2235 | ||
0f41302f | 2236 | /* We will fix any death note later. */ |
48227150 JVA |
2237 | |
2238 | if (STACK_REG_P (*src1)) | |
2239 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2240 | else | |
eca31501 | 2241 | src1_note = NULL_RTX; |
48227150 JVA |
2242 | if (STACK_REG_P (*src2)) |
2243 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
2244 | else | |
eca31501 | 2245 | src2_note = NULL_RTX; |
48227150 JVA |
2246 | |
2247 | /* If either operand is not a stack register, then the dest | |
0f41302f | 2248 | must be top of stack. */ |
48227150 JVA |
2249 | |
2250 | if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) | |
eca31501 | 2251 | emit_swap_insn (insn, regstack, *dest); |
48227150 JVA |
2252 | else |
2253 | { | |
2254 | /* Both operands are REG. If neither operand is already | |
2255 | at the top of stack, choose to make the one that is the dest | |
eca31501 | 2256 | the new top of stack. */ |
48227150 JVA |
2257 | |
2258 | int src1_hard_regnum, src2_hard_regnum; | |
2259 | ||
2260 | src1_hard_regnum = get_hard_regnum (regstack, *src1); | |
2261 | src2_hard_regnum = get_hard_regnum (regstack, *src2); | |
2262 | if (src1_hard_regnum == -1 || src2_hard_regnum == -1) | |
2263 | abort (); | |
2264 | ||
2265 | if (src1_hard_regnum != FIRST_STACK_REG | |
2266 | && src2_hard_regnum != FIRST_STACK_REG) | |
eca31501 | 2267 | emit_swap_insn (insn, regstack, *dest); |
48227150 JVA |
2268 | } |
2269 | ||
2270 | if (STACK_REG_P (*src1)) | |
2271 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
2272 | if (STACK_REG_P (*src2)) | |
2273 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
2274 | ||
2275 | if (src1_note) | |
2276 | { | |
2277 | /* If the register that dies is at the top of stack, then | |
2278 | the destination is somewhere else - merely substitute it. | |
2279 | But if the reg that dies is not at top of stack, then | |
2280 | move the top of stack to the dead reg, as though we had | |
0f41302f | 2281 | done the insn and then a store-with-pop. */ |
48227150 JVA |
2282 | |
2283 | if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top]) | |
2284 | { | |
2285 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2286 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2287 | } | |
2288 | else | |
2289 | { | |
2290 | int regno = get_hard_regnum (regstack, XEXP (src1_note, 0)); | |
2291 | ||
2292 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2293 | replace_reg (dest, regno); | |
2294 | ||
2295 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
2296 | = regstack->reg[regstack->top]; | |
2297 | } | |
2298 | ||
2299 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2300 | REGNO (XEXP (src1_note, 0))); | |
2301 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
2302 | regstack->top--; | |
2303 | } | |
2304 | else if (src2_note) | |
2305 | { | |
2306 | if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top]) | |
2307 | { | |
2308 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2309 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2310 | } | |
2311 | else | |
2312 | { | |
2313 | int regno = get_hard_regnum (regstack, XEXP (src2_note, 0)); | |
2314 | ||
2315 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2316 | replace_reg (dest, regno); | |
2317 | ||
2318 | regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] | |
2319 | = regstack->reg[regstack->top]; | |
2320 | } | |
2321 | ||
2322 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2323 | REGNO (XEXP (src2_note, 0))); | |
2324 | replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); | |
2325 | regstack->top--; | |
2326 | } | |
2327 | else | |
2328 | { | |
2329 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2330 | replace_reg (dest, get_hard_regnum (regstack, *dest)); | |
2331 | } | |
2332 | ||
2333 | break; | |
2334 | ||
0e7d0eb9 JVA |
2335 | case UNSPEC: |
2336 | switch (XINT (SET_SRC (pat), 1)) | |
2337 | { | |
2338 | case 1: /* sin */ | |
2339 | case 2: /* cos */ | |
2340 | /* These insns only operate on the top of the stack. */ | |
2341 | ||
2342 | src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0)); | |
2343 | ||
eca31501 | 2344 | emit_swap_insn (insn, regstack, *src1); |
0e7d0eb9 JVA |
2345 | |
2346 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2347 | ||
2348 | if (STACK_REG_P (*dest)) | |
2349 | replace_reg (dest, FIRST_STACK_REG); | |
2350 | ||
2351 | if (src1_note) | |
2352 | { | |
2353 | replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); | |
2354 | regstack->top--; | |
2355 | CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); | |
2356 | } | |
2357 | ||
2358 | replace_reg (src1, FIRST_STACK_REG); | |
2359 | ||
2360 | break; | |
2361 | ||
2362 | default: | |
2363 | abort (); | |
2364 | } | |
2365 | break; | |
2366 | ||
4e97601f SC |
2367 | case IF_THEN_ELSE: |
2368 | /* This insn requires the top of stack to be the destination. */ | |
2369 | ||
2370 | src1 = get_true_reg (&XEXP (SET_SRC (pat), 1)); | |
2371 | src2 = get_true_reg (&XEXP (SET_SRC (pat), 2)); | |
2372 | ||
2373 | src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); | |
2374 | src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); | |
2375 | ||
2376 | { | |
54552651 | 2377 | rtx src_note [3]; |
4e97601f SC |
2378 | int i; |
2379 | ||
54552651 JW |
2380 | src_note[0] = 0; |
2381 | src_note[1] = src1_note; | |
2382 | src_note[2] = src2_note; | |
2383 | ||
4e97601f SC |
2384 | if (STACK_REG_P (*src1)) |
2385 | replace_reg (src1, get_hard_regnum (regstack, *src1)); | |
2386 | if (STACK_REG_P (*src2)) | |
2387 | replace_reg (src2, get_hard_regnum (regstack, *src2)); | |
2388 | ||
2389 | for (i = 1; i <= 2; i++) | |
2390 | if (src_note [i]) | |
2391 | { | |
4e97601f SC |
2392 | /* If the register that dies is not at the top of stack, then |
2393 | move the top of stack to the dead reg */ | |
2394 | if (REGNO (XEXP (src_note[i], 0)) | |
2395 | != regstack->reg[regstack->top]) | |
2396 | { | |
2397 | remove_regno_note (insn, REG_DEAD, | |
2398 | REGNO (XEXP (src_note [i], 0))); | |
2399 | emit_pop_insn (insn, regstack, XEXP (src_note[i], 0), | |
2400 | emit_insn_after); | |
2401 | } | |
2402 | else | |
2403 | { | |
2404 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2405 | REGNO (XEXP (src_note[i], 0))); | |
2406 | replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG); | |
2407 | regstack->top--; | |
2408 | } | |
4e97601f | 2409 | } |
4e97601f SC |
2410 | } |
2411 | ||
914ec131 SC |
2412 | /* Make dest the top of stack. Add dest to regstack if not present. */ |
2413 | if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG) | |
2414 | regstack->reg[++regstack->top] = REGNO (*dest); | |
2415 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); | |
2416 | replace_reg (dest, FIRST_STACK_REG); | |
2417 | ||
4e97601f SC |
2418 | break; |
2419 | ||
48227150 JVA |
2420 | default: |
2421 | abort (); | |
2422 | } | |
2423 | } | |
2424 | \f | |
114cbee6 RS |
2425 | /* Substitute hard regnums for any stack regs in INSN, which has |
2426 | N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info | |
6dc42e49 | 2427 | before the insn, and is updated with changes made here. CONSTRAINTS is |
114cbee6 RS |
2428 | an array of the constraint strings used in the asm statement. |
2429 | ||
2430 | OPERANDS is an array of the operands, and OPERANDS_LOC is a | |
2431 | parallel array of where the operands were found. The output operands | |
6dc42e49 | 2432 | all precede the input operands. |
114cbee6 RS |
2433 | |
2434 | There are several requirements and assumptions about the use of | |
2435 | stack-like regs in asm statements. These rules are enforced by | |
2436 | record_asm_stack_regs; see comments there for details. Any | |
2437 | asm_operands left in the RTL at this point may be assume to meet the | |
2438 | requirements, since record_asm_stack_regs removes any problem asm. */ | |
2439 | ||
2440 | static void | |
2441 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints, | |
2442 | n_inputs, n_outputs) | |
2443 | rtx insn; | |
2444 | stack regstack; | |
2445 | rtx *operands, **operands_loc; | |
2446 | char **constraints; | |
2447 | int n_inputs, n_outputs; | |
2448 | { | |
2449 | int n_operands = n_inputs + n_outputs; | |
2450 | int first_input = n_outputs; | |
2451 | rtx body = PATTERN (insn); | |
2452 | ||
2453 | int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); | |
2454 | enum reg_class *operand_class | |
2455 | = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); | |
2456 | ||
2457 | rtx *note_reg; /* Array of note contents */ | |
2458 | rtx **note_loc; /* Address of REG field of each note */ | |
2459 | enum reg_note *note_kind; /* The type of each note */ | |
2460 | ||
2461 | rtx *clobber_reg; | |
2462 | rtx **clobber_loc; | |
2463 | ||
2464 | struct stack_def temp_stack; | |
2465 | int n_notes; | |
2466 | int n_clobbers; | |
2467 | rtx note; | |
2468 | int i; | |
2469 | ||
2470 | /* Find out what the constraints required. If no constraint | |
2471 | alternative matches, that is a compiler bug: we should have caught | |
2472 | such an insn during the life analysis pass (and reload should have | |
0f41302f | 2473 | caught it regardless). */ |
114cbee6 RS |
2474 | |
2475 | i = constrain_asm_operands (n_operands, operands, constraints, | |
2476 | operand_matches, operand_class); | |
2477 | if (i < 0) | |
2478 | abort (); | |
2479 | ||
0f41302f | 2480 | /* Strip SUBREGs here to make the following code simpler. */ |
114cbee6 RS |
2481 | for (i = 0; i < n_operands; i++) |
2482 | if (GET_CODE (operands[i]) == SUBREG | |
2483 | && GET_CODE (SUBREG_REG (operands[i])) == REG) | |
2484 | { | |
2485 | operands_loc[i] = & SUBREG_REG (operands[i]); | |
2486 | operands[i] = SUBREG_REG (operands[i]); | |
2487 | } | |
2488 | ||
2489 | /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ | |
2490 | ||
2491 | for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2492 | i++; | |
2493 | ||
2494 | note_reg = (rtx *) alloca (i * sizeof (rtx)); | |
2495 | note_loc = (rtx **) alloca (i * sizeof (rtx *)); | |
2496 | note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); | |
2497 | ||
2498 | n_notes = 0; | |
2499 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
2500 | { | |
2501 | rtx reg = XEXP (note, 0); | |
2502 | rtx *loc = & XEXP (note, 0); | |
2503 | ||
2504 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) | |
2505 | { | |
2506 | loc = & SUBREG_REG (reg); | |
2507 | reg = SUBREG_REG (reg); | |
2508 | } | |
2509 | ||
2510 | if (STACK_REG_P (reg) | |
2511 | && (REG_NOTE_KIND (note) == REG_DEAD | |
2512 | || REG_NOTE_KIND (note) == REG_UNUSED)) | |
2513 | { | |
2514 | note_reg[n_notes] = reg; | |
2515 | note_loc[n_notes] = loc; | |
2516 | note_kind[n_notes] = REG_NOTE_KIND (note); | |
2517 | n_notes++; | |
2518 | } | |
2519 | } | |
2520 | ||
2521 | /* Set up CLOBBER_REG and CLOBBER_LOC. */ | |
2522 | ||
2523 | n_clobbers = 0; | |
114cbee6 RS |
2524 | |
2525 | if (GET_CODE (body) == PARALLEL) | |
3f5cfed6 JVA |
2526 | { |
2527 | clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); | |
2528 | clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **)); | |
114cbee6 | 2529 | |
3f5cfed6 JVA |
2530 | for (i = 0; i < XVECLEN (body, 0); i++) |
2531 | if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) | |
2532 | { | |
2533 | rtx clobber = XVECEXP (body, 0, i); | |
2534 | rtx reg = XEXP (clobber, 0); | |
2535 | rtx *loc = & XEXP (clobber, 0); | |
114cbee6 | 2536 | |
3f5cfed6 JVA |
2537 | if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) |
2538 | { | |
2539 | loc = & SUBREG_REG (reg); | |
2540 | reg = SUBREG_REG (reg); | |
2541 | } | |
2542 | ||
2543 | if (STACK_REG_P (reg)) | |
2544 | { | |
2545 | clobber_reg[n_clobbers] = reg; | |
2546 | clobber_loc[n_clobbers] = loc; | |
2547 | n_clobbers++; | |
2548 | } | |
2549 | } | |
2550 | } | |
114cbee6 | 2551 | |
a269864e | 2552 | bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack)); |
114cbee6 RS |
2553 | |
2554 | /* Put the input regs into the desired place in TEMP_STACK. */ | |
2555 | ||
2556 | for (i = first_input; i < first_input + n_inputs; i++) | |
2557 | if (STACK_REG_P (operands[i]) | |
2558 | && reg_class_subset_p (operand_class[i], FLOAT_REGS) | |
2559 | && operand_class[i] != FLOAT_REGS) | |
2560 | { | |
2561 | /* If an operand needs to be in a particular reg in | |
2562 | FLOAT_REGS, the constraint was either 't' or 'u'. Since | |
2563 | these constraints are for single register classes, and reload | |
2564 | guaranteed that operand[i] is already in that class, we can | |
2565 | just use REGNO (operands[i]) to know which actual reg this | |
0f41302f | 2566 | operand needs to be in. */ |
114cbee6 RS |
2567 | |
2568 | int regno = get_hard_regnum (&temp_stack, operands[i]); | |
2569 | ||
2570 | if (regno < 0) | |
2571 | abort (); | |
2572 | ||
2573 | if (regno != REGNO (operands[i])) | |
2574 | { | |
2575 | /* operands[i] is not in the right place. Find it | |
2576 | and swap it with whatever is already in I's place. | |
2577 | K is where operands[i] is now. J is where it should | |
0f41302f | 2578 | be. */ |
114cbee6 RS |
2579 | int j, k, temp; |
2580 | ||
2581 | k = temp_stack.top - (regno - FIRST_STACK_REG); | |
2582 | j = (temp_stack.top | |
2583 | - (REGNO (operands[i]) - FIRST_STACK_REG)); | |
2584 | ||
2585 | temp = temp_stack.reg[k]; | |
2586 | temp_stack.reg[k] = temp_stack.reg[j]; | |
2587 | temp_stack.reg[j] = temp; | |
2588 | } | |
2589 | } | |
2590 | ||
2591 | /* emit insns before INSN to make sure the reg-stack is in the right | |
2592 | order. */ | |
2593 | ||
2594 | change_stack (insn, regstack, &temp_stack, emit_insn_before); | |
2595 | ||
2596 | /* Make the needed input register substitutions. Do death notes and | |
0f41302f | 2597 | clobbers too, because these are for inputs, not outputs. */ |
114cbee6 RS |
2598 | |
2599 | for (i = first_input; i < first_input + n_inputs; i++) | |
2600 | if (STACK_REG_P (operands[i])) | |
2601 | { | |
2602 | int regnum = get_hard_regnum (regstack, operands[i]); | |
2603 | ||
2604 | if (regnum < 0) | |
2605 | abort (); | |
2606 | ||
2607 | replace_reg (operands_loc[i], regnum); | |
2608 | } | |
2609 | ||
2610 | for (i = 0; i < n_notes; i++) | |
2611 | if (note_kind[i] == REG_DEAD) | |
2612 | { | |
2613 | int regnum = get_hard_regnum (regstack, note_reg[i]); | |
2614 | ||
2615 | if (regnum < 0) | |
2616 | abort (); | |
2617 | ||
2618 | replace_reg (note_loc[i], regnum); | |
2619 | } | |
2620 | ||
2621 | for (i = 0; i < n_clobbers; i++) | |
2622 | { | |
2623 | /* It's OK for a CLOBBER to reference a reg that is not live. | |
2624 | Don't try to replace it in that case. */ | |
2625 | int regnum = get_hard_regnum (regstack, clobber_reg[i]); | |
2626 | ||
2627 | if (regnum >= 0) | |
2628 | { | |
2629 | /* Sigh - clobbers always have QImode. But replace_reg knows | |
2630 | that these regs can't be MODE_INT and will abort. Just put | |
2631 | the right reg there without calling replace_reg. */ | |
2632 | ||
99a59310 | 2633 | *clobber_loc[i] = FP_MODE_REG (regnum, DFmode); |
114cbee6 RS |
2634 | } |
2635 | } | |
2636 | ||
0f41302f | 2637 | /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ |
114cbee6 RS |
2638 | |
2639 | for (i = first_input; i < first_input + n_inputs; i++) | |
2640 | if (STACK_REG_P (operands[i])) | |
2641 | { | |
2642 | /* An input reg is implicitly popped if it is tied to an | |
0f41302f | 2643 | output, or if there is a CLOBBER for it. */ |
114cbee6 RS |
2644 | int j; |
2645 | ||
2646 | for (j = 0; j < n_clobbers; j++) | |
2647 | if (operands_match_p (clobber_reg[j], operands[i])) | |
2648 | break; | |
2649 | ||
2650 | if (j < n_clobbers || operand_matches[i] >= 0) | |
2651 | { | |
2652 | /* operands[i] might not be at the top of stack. But that's OK, | |
2653 | because all we need to do is pop the right number of regs | |
2654 | off of the top of the reg-stack. record_asm_stack_regs | |
2655 | guaranteed that all implicitly popped regs were grouped | |
2656 | at the top of the reg-stack. */ | |
2657 | ||
2658 | CLEAR_HARD_REG_BIT (regstack->reg_set, | |
2659 | regstack->reg[regstack->top]); | |
2660 | regstack->top--; | |
2661 | } | |
2662 | } | |
2663 | ||
2664 | /* Now add to REGSTACK any outputs that the asm implicitly pushed. | |
2665 | Note that there isn't any need to substitute register numbers. | |
0f41302f | 2666 | ??? Explain why this is true. */ |
114cbee6 RS |
2667 | |
2668 | for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) | |
2669 | { | |
2670 | /* See if there is an output for this hard reg. */ | |
2671 | int j; | |
2672 | ||
2673 | for (j = 0; j < n_outputs; j++) | |
2674 | if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i) | |
2675 | { | |
2676 | regstack->reg[++regstack->top] = i; | |
2677 | SET_HARD_REG_BIT (regstack->reg_set, i); | |
2678 | break; | |
2679 | } | |
2680 | } | |
2681 | ||
2682 | /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD | |
2683 | input that the asm didn't implicitly pop. If the asm didn't | |
3f5cfed6 | 2684 | implicitly pop an input reg, that reg will still be live. |
114cbee6 RS |
2685 | |
2686 | Note that we can't use find_regno_note here: the register numbers | |
2687 | in the death notes have already been substituted. */ | |
2688 | ||
3f5cfed6 JVA |
2689 | for (i = 0; i < n_outputs; i++) |
2690 | if (STACK_REG_P (operands[i])) | |
2691 | { | |
2692 | int j; | |
2693 | ||
2694 | for (j = 0; j < n_notes; j++) | |
2695 | if (REGNO (operands[i]) == REGNO (note_reg[j]) | |
2696 | && note_kind[j] == REG_UNUSED) | |
2697 | { | |
2698 | insn = emit_pop_insn (insn, regstack, operands[i], | |
2699 | emit_insn_after); | |
2700 | break; | |
2701 | } | |
2702 | } | |
2703 | ||
2704 | for (i = first_input; i < first_input + n_inputs; i++) | |
114cbee6 RS |
2705 | if (STACK_REG_P (operands[i])) |
2706 | { | |
2707 | int j; | |
2708 | ||
2709 | for (j = 0; j < n_notes; j++) | |
2710 | if (REGNO (operands[i]) == REGNO (note_reg[j]) | |
3f5cfed6 JVA |
2711 | && note_kind[j] == REG_DEAD |
2712 | && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))) | |
114cbee6 RS |
2713 | { |
2714 | insn = emit_pop_insn (insn, regstack, operands[i], | |
2715 | emit_insn_after); | |
2716 | break; | |
2717 | } | |
2718 | } | |
2719 | } | |
2720 | \f | |
48227150 JVA |
2721 | /* Substitute stack hard reg numbers for stack virtual registers in |
2722 | INSN. Non-stack register numbers are not changed. REGSTACK is the | |
2723 | current stack content. Insns may be emitted as needed to arrange the | |
0f41302f | 2724 | stack for the 387 based on the contents of the insn. */ |
48227150 JVA |
2725 | |
2726 | static void | |
2727 | subst_stack_regs (insn, regstack) | |
2728 | rtx insn; | |
2729 | stack regstack; | |
2730 | { | |
2731 | register rtx *note_link, note; | |
2732 | register int i; | |
914ec131 | 2733 | rtx head, jump, pat, cipat; |
114cbee6 | 2734 | int n_operands; |
48227150 | 2735 | |
99a59310 RK |
2736 | if (GET_CODE (insn) == CALL_INSN) |
2737 | { | |
2738 | int top = regstack->top; | |
48227150 | 2739 | |
99a59310 RK |
2740 | /* If there are any floating point parameters to be passed in |
2741 | registers for this call, make sure they are in the right | |
2742 | order. */ | |
48227150 | 2743 | |
99a59310 RK |
2744 | if (top >= 0) |
2745 | { | |
2746 | straighten_stack (PREV_INSN (insn), regstack); | |
2747 | ||
2748 | /* Now mark the arguments as dead after the call. */ | |
2749 | ||
2750 | while (regstack->top >= 0) | |
2751 | { | |
2752 | CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top); | |
2753 | regstack->top--; | |
2754 | } | |
2755 | } | |
2756 | } | |
48227150 JVA |
2757 | |
2758 | /* Do the actual substitution if any stack regs are mentioned. | |
2759 | Since we only record whether entire insn mentions stack regs, and | |
2760 | subst_stack_regs_pat only works for patterns that contain stack regs, | |
2761 | we must check each pattern in a parallel here. A call_value_pop could | |
0f41302f | 2762 | fail otherwise. */ |
48227150 JVA |
2763 | |
2764 | if (GET_MODE (insn) == QImode) | |
2765 | { | |
114cbee6 RS |
2766 | n_operands = asm_noperands (PATTERN (insn)); |
2767 | if (n_operands >= 0) | |
2768 | { | |
2769 | /* This insn is an `asm' with operands. Decode the operands, | |
2770 | decide how many are inputs, and do register substitution. | |
0f41302f | 2771 | Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ |
114cbee6 RS |
2772 | |
2773 | rtx operands[MAX_RECOG_OPERANDS]; | |
2774 | rtx *operands_loc[MAX_RECOG_OPERANDS]; | |
2775 | rtx body = PATTERN (insn); | |
2776 | int n_inputs, n_outputs; | |
2777 | char **constraints | |
2778 | = (char **) alloca (n_operands * sizeof (char *)); | |
2779 | ||
c166a311 CH |
2780 | decode_asm_operands (body, operands, operands_loc, |
2781 | constraints, NULL_PTR); | |
114cbee6 RS |
2782 | get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); |
2783 | subst_asm_stack_regs (insn, regstack, operands, operands_loc, | |
2784 | constraints, n_inputs, n_outputs); | |
2785 | return; | |
2786 | } | |
2787 | ||
48227150 | 2788 | if (GET_CODE (PATTERN (insn)) == PARALLEL) |
c166a311 | 2789 | for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) |
48227150 JVA |
2790 | { |
2791 | if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) | |
2792 | subst_stack_regs_pat (insn, regstack, | |
2793 | XVECEXP (PATTERN (insn), 0, i)); | |
2794 | } | |
2795 | else | |
2796 | subst_stack_regs_pat (insn, regstack, PATTERN (insn)); | |
2797 | } | |
2798 | ||
2799 | /* subst_stack_regs_pat may have deleted a no-op insn. If so, any | |
0f41302f | 2800 | REG_UNUSED will already have been dealt with, so just return. */ |
48227150 | 2801 | |
2289ec9d | 2802 | if (GET_CODE (insn) == NOTE) |
48227150 JVA |
2803 | return; |
2804 | ||
914ec131 SC |
2805 | /* If we are reached by a computed goto which sets this same stack register, |
2806 | then pop this stack register, but maintain regstack. */ | |
2807 | ||
2808 | pat = single_set (insn); | |
2809 | if (pat != 0 | |
2810 | && INSN_UID (insn) <= max_uid | |
2811 | && GET_CODE (block_begin[BLOCK_NUM(insn)]) == CODE_LABEL | |
2812 | && GET_CODE (pat) == SET && STACK_REG_P (SET_DEST (pat))) | |
2813 | for (head = block_begin[BLOCK_NUM(insn)], jump = LABEL_REFS (head); | |
2814 | jump != head; | |
2815 | jump = LABEL_NEXTREF (jump)) | |
2816 | { | |
2817 | cipat = single_set (CONTAINING_INSN (jump)); | |
2818 | if (cipat != 0 | |
2819 | && GET_CODE (cipat) == SET | |
2820 | && SET_DEST (cipat) == pc_rtx | |
2821 | && uses_reg_or_mem (SET_SRC (cipat)) | |
2822 | && INSN_UID (CONTAINING_INSN (jump)) <= max_uid) | |
2823 | { | |
2824 | int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
2825 | if (TEST_HARD_REG_BIT (block_out_reg_set[from_block], | |
2826 | REGNO (SET_DEST (pat)))) | |
2827 | { | |
2828 | struct stack_def old; | |
2829 | bcopy (regstack->reg, old.reg, sizeof (old.reg)); | |
2830 | emit_pop_insn (insn, regstack, SET_DEST (pat), emit_insn_before); | |
2831 | regstack->top += 1; | |
2832 | bcopy (old.reg, regstack->reg, sizeof (old.reg)); | |
2833 | SET_HARD_REG_BIT (regstack->reg_set, REGNO (SET_DEST (pat))); | |
2834 | } | |
2835 | } | |
2836 | } | |
2837 | ||
48227150 JVA |
2838 | /* If there is a REG_UNUSED note on a stack register on this insn, |
2839 | the indicated reg must be popped. The REG_UNUSED note is removed, | |
2840 | since the form of the newly emitted pop insn references the reg, | |
0f41302f | 2841 | making it no longer `unset'. */ |
48227150 JVA |
2842 | |
2843 | note_link = ®_NOTES(insn); | |
2844 | for (note = *note_link; note; note = XEXP (note, 1)) | |
2845 | if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) | |
2846 | { | |
2847 | *note_link = XEXP (note, 1); | |
114cbee6 | 2848 | insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after); |
48227150 JVA |
2849 | } |
2850 | else | |
2851 | note_link = &XEXP (note, 1); | |
2852 | } | |
2853 | \f | |
2854 | /* Change the organization of the stack so that it fits a new basic | |
2855 | block. Some registers might have to be popped, but there can never be | |
2856 | a register live in the new block that is not now live. | |
2857 | ||
114cbee6 RS |
2858 | Insert any needed insns before or after INSN. WHEN is emit_insn_before |
2859 | or emit_insn_after. OLD is the original stack layout, and NEW is | |
2860 | the desired form. OLD is updated to reflect the code emitted, ie, it | |
2861 | will be the same as NEW upon return. | |
48227150 JVA |
2862 | |
2863 | This function will not preserve block_end[]. But that information | |
0f41302f | 2864 | is no longer needed once this has executed. */ |
48227150 JVA |
2865 | |
2866 | static void | |
114cbee6 | 2867 | change_stack (insn, old, new, when) |
48227150 JVA |
2868 | rtx insn; |
2869 | stack old; | |
2870 | stack new; | |
114cbee6 | 2871 | rtx (*when)(); |
48227150 JVA |
2872 | { |
2873 | int reg; | |
2874 | ||
114cbee6 RS |
2875 | /* We will be inserting new insns "backwards", by calling emit_insn_before. |
2876 | If we are to insert after INSN, find the next insn, and insert before | |
2877 | it. */ | |
48227150 | 2878 | |
114cbee6 RS |
2879 | if (when == emit_insn_after) |
2880 | insn = NEXT_INSN (insn); | |
48227150 | 2881 | |
0f41302f | 2882 | /* Pop any registers that are not needed in the new block. */ |
48227150 JVA |
2883 | |
2884 | for (reg = old->top; reg >= 0; reg--) | |
2885 | if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) | |
99a59310 | 2886 | emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode), |
48227150 JVA |
2887 | emit_insn_before); |
2888 | ||
2889 | if (new->top == -2) | |
2890 | { | |
2891 | /* If the new block has never been processed, then it can inherit | |
0f41302f | 2892 | the old stack order. */ |
48227150 JVA |
2893 | |
2894 | new->top = old->top; | |
2895 | bcopy (old->reg, new->reg, sizeof (new->reg)); | |
2896 | } | |
2897 | else | |
2898 | { | |
2899 | /* This block has been entered before, and we must match the | |
0f41302f | 2900 | previously selected stack order. */ |
48227150 JVA |
2901 | |
2902 | /* By now, the only difference should be the order of the stack, | |
0f41302f | 2903 | not their depth or liveliness. */ |
48227150 JVA |
2904 | |
2905 | GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); | |
2906 | ||
2907 | abort (); | |
2908 | ||
2909 | win: | |
2910 | ||
2911 | if (old->top != new->top) | |
2912 | abort (); | |
2913 | ||
2914 | /* Loop here emitting swaps until the stack is correct. The | |
2915 | worst case number of swaps emitted is N + 2, where N is the | |
2916 | depth of the stack. In some cases, the reg at the top of | |
2917 | stack may be correct, but swapped anyway in order to fix | |
2918 | other regs. But since we never swap any other reg away from | |
0f41302f | 2919 | its correct slot, this algorithm will converge. */ |
48227150 JVA |
2920 | |
2921 | do | |
2922 | { | |
2923 | /* Swap the reg at top of stack into the position it is | |
0f41302f | 2924 | supposed to be in, until the correct top of stack appears. */ |
48227150 JVA |
2925 | |
2926 | while (old->reg[old->top] != new->reg[new->top]) | |
2927 | { | |
2928 | for (reg = new->top; reg >= 0; reg--) | |
2929 | if (new->reg[reg] == old->reg[old->top]) | |
2930 | break; | |
2931 | ||
2932 | if (reg == -1) | |
2933 | abort (); | |
2934 | ||
7d0e3dd4 | 2935 | emit_swap_insn (insn, old, |
99a59310 | 2936 | FP_MODE_REG (old->reg[reg], DFmode)); |
48227150 JVA |
2937 | } |
2938 | ||
2939 | /* See if any regs remain incorrect. If so, bring an | |
2940 | incorrect reg to the top of stack, and let the while loop | |
0f41302f | 2941 | above fix it. */ |
48227150 JVA |
2942 | |
2943 | for (reg = new->top; reg >= 0; reg--) | |
2944 | if (new->reg[reg] != old->reg[reg]) | |
2945 | { | |
7d0e3dd4 | 2946 | emit_swap_insn (insn, old, |
99a59310 | 2947 | FP_MODE_REG (old->reg[reg], DFmode)); |
48227150 JVA |
2948 | break; |
2949 | } | |
2950 | } while (reg >= 0); | |
2951 | ||
0f41302f | 2952 | /* At this point there must be no differences. */ |
48227150 JVA |
2953 | |
2954 | for (reg = old->top; reg >= 0; reg--) | |
2955 | if (old->reg[reg] != new->reg[reg]) | |
2956 | abort (); | |
2957 | } | |
2958 | } | |
2959 | \f | |
2960 | /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is | |
2961 | found, ensure that a jump from INSN to the code_label to which the | |
2962 | label_ref points ends up with the same stack as that at the | |
2963 | code_label. Do this by inserting insns just before the code_label to | |
2964 | pop and rotate the stack until it is in the correct order. REGSTACK | |
2965 | is the order of the register stack in INSN. | |
2966 | ||
2967 | Any code that is emitted here must not be later processed as part | |
0f41302f | 2968 | of any block, as it will already contain hard register numbers. */ |
48227150 JVA |
2969 | |
2970 | static void | |
2971 | goto_block_pat (insn, regstack, pat) | |
2972 | rtx insn; | |
2973 | stack regstack; | |
2974 | rtx pat; | |
2975 | { | |
2976 | rtx label; | |
2977 | rtx new_jump, new_label, new_barrier; | |
2978 | rtx *ref; | |
2979 | stack label_stack; | |
2980 | struct stack_def temp_stack; | |
2981 | int reg; | |
2982 | ||
99a59310 RK |
2983 | switch (GET_CODE (pat)) |
2984 | { | |
2985 | case RETURN: | |
2986 | straighten_stack (PREV_INSN (insn), regstack); | |
2987 | return; | |
2988 | default: | |
2989 | { | |
48227150 JVA |
2990 | int i, j; |
2991 | char *fmt = GET_RTX_FORMAT (GET_CODE (pat)); | |
2992 | ||
2993 | for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) | |
2994 | { | |
2995 | if (fmt[i] == 'e') | |
2996 | goto_block_pat (insn, regstack, XEXP (pat, i)); | |
2997 | if (fmt[i] == 'E') | |
2998 | for (j = 0; j < XVECLEN (pat, i); j++) | |
2999 | goto_block_pat (insn, regstack, XVECEXP (pat, i, j)); | |
3000 | } | |
3001 | return; | |
99a59310 RK |
3002 | } |
3003 | case LABEL_REF:; | |
3004 | } | |
48227150 JVA |
3005 | |
3006 | label = XEXP (pat, 0); | |
3007 | if (GET_CODE (label) != CODE_LABEL) | |
3008 | abort (); | |
3009 | ||
0f41302f | 3010 | /* First, see if in fact anything needs to be done to the stack at all. */ |
6d7d084a RK |
3011 | if (INSN_UID (label) <= 0) |
3012 | return; | |
48227150 JVA |
3013 | |
3014 | label_stack = &block_stack_in[BLOCK_NUM (label)]; | |
3015 | ||
3016 | if (label_stack->top == -2) | |
3017 | { | |
3018 | /* If the target block hasn't had a stack order selected, then | |
0f41302f | 3019 | we need merely ensure that no pops are needed. */ |
48227150 JVA |
3020 | |
3021 | for (reg = regstack->top; reg >= 0; reg--) | |
3022 | if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg])) | |
3023 | break; | |
3024 | ||
3025 | if (reg == -1) | |
3026 | { | |
0f41302f | 3027 | /* change_stack will not emit any code in this case. */ |
48227150 | 3028 | |
114cbee6 | 3029 | change_stack (label, regstack, label_stack, emit_insn_after); |
48227150 JVA |
3030 | return; |
3031 | } | |
3032 | } | |
3033 | else if (label_stack->top == regstack->top) | |
3034 | { | |
3035 | for (reg = label_stack->top; reg >= 0; reg--) | |
3036 | if (label_stack->reg[reg] != regstack->reg[reg]) | |
3037 | break; | |
3038 | ||
3039 | if (reg == -1) | |
3040 | return; | |
3041 | } | |
3042 | ||
3043 | /* At least one insn will need to be inserted before label. Insert | |
3044 | a jump around the code we are about to emit. Emit a label for the new | |
3045 | code, and point the original insn at this new label. We can't use | |
3046 | redirect_jump here, because we're using fld[4] of the code labels as | |
0f41302f | 3047 | LABEL_REF chains, no NUSES counters. */ |
48227150 JVA |
3048 | |
3049 | new_jump = emit_jump_insn_before (gen_jump (label), label); | |
3050 | record_label_references (new_jump, PATTERN (new_jump)); | |
3051 | JUMP_LABEL (new_jump) = label; | |
3052 | ||
3053 | new_barrier = emit_barrier_after (new_jump); | |
3054 | ||
3055 | new_label = gen_label_rtx (); | |
3056 | emit_label_after (new_label, new_barrier); | |
3057 | LABEL_REFS (new_label) = new_label; | |
3058 | ||
3059 | /* The old label_ref will no longer point to the code_label if now uses, | |
0f41302f | 3060 | so strip the label_ref from the code_label's chain of references. */ |
48227150 JVA |
3061 | |
3062 | for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref)) | |
3063 | if (*ref == pat) | |
3064 | break; | |
3065 | ||
3066 | if (*ref == label) | |
3067 | abort (); | |
3068 | ||
3069 | *ref = LABEL_NEXTREF (*ref); | |
3070 | ||
3071 | XEXP (pat, 0) = new_label; | |
3072 | record_label_references (insn, PATTERN (insn)); | |
3073 | ||
3074 | if (JUMP_LABEL (insn) == label) | |
3075 | JUMP_LABEL (insn) = new_label; | |
3076 | ||
0f41302f | 3077 | /* Now emit the needed code. */ |
48227150 JVA |
3078 | |
3079 | temp_stack = *regstack; | |
3080 | ||
114cbee6 | 3081 | change_stack (new_label, &temp_stack, label_stack, emit_insn_after); |
48227150 JVA |
3082 | } |
3083 | \f | |
3084 | /* Traverse all basic blocks in a function, converting the register | |
d45cf215 | 3085 | references in each insn from the "flat" register file that gcc uses, to |
0f41302f | 3086 | the stack-like registers the 387 uses. */ |
48227150 JVA |
3087 | |
3088 | static void | |
3089 | convert_regs () | |
3090 | { | |
3091 | register int block, reg; | |
3092 | register rtx insn, next; | |
3093 | struct stack_def regstack; | |
3094 | ||
3095 | for (block = 0; block < blocks; block++) | |
3096 | { | |
3097 | if (block_stack_in[block].top == -2) | |
3098 | { | |
3099 | /* This block has not been previously encountered. Choose a | |
3100 | default mapping for any stack regs live on entry */ | |
3101 | ||
3102 | block_stack_in[block].top = -1; | |
3103 | ||
3104 | for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) | |
3105 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg)) | |
3106 | block_stack_in[block].reg[++block_stack_in[block].top] = reg; | |
3107 | } | |
3108 | ||
3109 | /* Process all insns in this block. Keep track of `next' here, | |
3110 | so that we don't process any insns emitted while making | |
0f41302f | 3111 | substitutions in INSN. */ |
48227150 JVA |
3112 | |
3113 | next = block_begin[block]; | |
3114 | regstack = block_stack_in[block]; | |
3115 | do | |
3116 | { | |
3117 | insn = next; | |
3118 | next = NEXT_INSN (insn); | |
3119 | ||
3120 | /* Don't bother processing unless there is a stack reg | |
99a59310 | 3121 | mentioned or if it's a CALL_INSN (register passing of |
0f41302f | 3122 | floating point values). */ |
48227150 JVA |
3123 | |
3124 | if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) | |
3125 | subst_stack_regs (insn, ®stack); | |
3126 | ||
3127 | } while (insn != block_end[block]); | |
3128 | ||
0f41302f | 3129 | /* Something failed if the stack life doesn't match. */ |
48227150 JVA |
3130 | |
3131 | GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win); | |
3132 | ||
3133 | abort (); | |
3134 | ||
3135 | win: | |
3136 | ||
3137 | /* Adjust the stack of this block on exit to match the stack of | |
3138 | the target block, or copy stack information into stack of | |
3139 | jump target if the target block's stack order hasn't been set | |
0f41302f | 3140 | yet. */ |
48227150 JVA |
3141 | |
3142 | if (GET_CODE (insn) == JUMP_INSN) | |
3143 | goto_block_pat (insn, ®stack, PATTERN (insn)); | |
3144 | ||
0f41302f | 3145 | /* Likewise handle the case where we fall into the next block. */ |
48227150 JVA |
3146 | |
3147 | if ((block < blocks - 1) && block_drops_in[block+1]) | |
114cbee6 RS |
3148 | change_stack (insn, ®stack, &block_stack_in[block+1], |
3149 | emit_insn_after); | |
48227150 JVA |
3150 | } |
3151 | ||
3152 | /* If the last basic block is the end of a loop, and that loop has | |
3153 | regs live at its start, then the last basic block will have regs live | |
0f41302f | 3154 | at its end that need to be popped before the function returns. */ |
48227150 | 3155 | |
99a59310 RK |
3156 | { |
3157 | int value_reg_low, value_reg_high; | |
3158 | value_reg_low = value_reg_high = -1; | |
3159 | { | |
3160 | rtx retvalue; | |
9c318306 | 3161 | if ((retvalue = stack_result (current_function_decl))) |
99a59310 RK |
3162 | { |
3163 | value_reg_low = REGNO (retvalue); | |
3164 | value_reg_high = value_reg_low + | |
3165 | HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1; | |
3166 | } | |
3167 | ||
3168 | } | |
3169 | for (reg = regstack.top; reg >= 0; reg--) | |
db3cf6fb MS |
3170 | if (regstack.reg[reg] < value_reg_low |
3171 | || regstack.reg[reg] > value_reg_high) | |
99a59310 RK |
3172 | insn = emit_pop_insn (insn, ®stack, |
3173 | FP_MODE_REG (regstack.reg[reg], DFmode), | |
48227150 | 3174 | emit_insn_after); |
99a59310 RK |
3175 | } |
3176 | straighten_stack (insn, ®stack); | |
48227150 JVA |
3177 | } |
3178 | \f | |
3179 | /* Check expression PAT, which is in INSN, for label references. if | |
0f41302f | 3180 | one is found, print the block number of destination to FILE. */ |
48227150 JVA |
3181 | |
3182 | static void | |
3183 | print_blocks (file, insn, pat) | |
3184 | FILE *file; | |
3185 | rtx insn, pat; | |
3186 | { | |
3187 | register RTX_CODE code = GET_CODE (pat); | |
3188 | register int i; | |
3189 | register char *fmt; | |
3190 | ||
3191 | if (code == LABEL_REF) | |
3192 | { | |
3193 | register rtx label = XEXP (pat, 0); | |
3194 | ||
3195 | if (GET_CODE (label) != CODE_LABEL) | |
3196 | abort (); | |
3197 | ||
3198 | fprintf (file, " %d", BLOCK_NUM (label)); | |
3199 | ||
3200 | return; | |
3201 | } | |
3202 | ||
3203 | fmt = GET_RTX_FORMAT (code); | |
3204 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
3205 | { | |
3206 | if (fmt[i] == 'e') | |
3207 | print_blocks (file, insn, XEXP (pat, i)); | |
3208 | if (fmt[i] == 'E') | |
3209 | { | |
3210 | register int j; | |
3211 | for (j = 0; j < XVECLEN (pat, i); j++) | |
3212 | print_blocks (file, insn, XVECEXP (pat, i, j)); | |
3213 | } | |
3214 | } | |
3215 | } | |
3216 | \f | |
3217 | /* Write information about stack registers and stack blocks into FILE. | |
3218 | This is part of making a debugging dump. */ | |
841fc5a1 | 3219 | |
48227150 JVA |
3220 | static void |
3221 | dump_stack_info (file) | |
3222 | FILE *file; | |
3223 | { | |
3224 | register int block; | |
3225 | ||
3226 | fprintf (file, "\n%d stack blocks.\n", blocks); | |
3227 | for (block = 0; block < blocks; block++) | |
3228 | { | |
3229 | register rtx head, jump, end; | |
3230 | register int regno; | |
3231 | ||
3232 | fprintf (file, "\nStack block %d: first insn %d, last %d.\n", | |
3233 | block, INSN_UID (block_begin[block]), | |
3234 | INSN_UID (block_end[block])); | |
3235 | ||
3236 | head = block_begin[block]; | |
3237 | ||
3238 | fprintf (file, "Reached from blocks: "); | |
3239 | if (GET_CODE (head) == CODE_LABEL) | |
3240 | for (jump = LABEL_REFS (head); | |
3241 | jump != head; | |
3242 | jump = LABEL_NEXTREF (jump)) | |
3243 | { | |
3244 | register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); | |
3245 | fprintf (file, " %d", from_block); | |
3246 | } | |
3247 | if (block_drops_in[block]) | |
3248 | fprintf (file, " previous"); | |
3249 | ||
3250 | fprintf (file, "\nlive stack registers on block entry: "); | |
99a59310 | 3251 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
48227150 JVA |
3252 | { |
3253 | if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno)) | |
3254 | fprintf (file, "%d ", regno); | |
3255 | } | |
3256 | ||
3257 | fprintf (file, "\nlive stack registers on block exit: "); | |
99a59310 | 3258 | for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) |
48227150 JVA |
3259 | { |
3260 | if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno)) | |
3261 | fprintf (file, "%d ", regno); | |
3262 | } | |
3263 | ||
3264 | end = block_end[block]; | |
3265 | ||
3266 | fprintf (file, "\nJumps to blocks: "); | |
3267 | if (GET_CODE (end) == JUMP_INSN) | |
3268 | print_blocks (file, end, PATTERN (end)); | |
3269 | ||
3270 | if (block + 1 < blocks && block_drops_in[block+1]) | |
3271 | fprintf (file, " next"); | |
3272 | else if (block + 1 == blocks | |
3273 | || (GET_CODE (end) == JUMP_INSN | |
3274 | && GET_CODE (PATTERN (end)) == RETURN)) | |
3275 | fprintf (file, " return"); | |
3276 | ||
3277 | fprintf (file, "\n"); | |
3278 | } | |
3279 | } | |
48227150 | 3280 | #endif /* STACK_REGS */ |