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1/* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010, 2011, 2012
3 Free Software Foundation, Inc.
4 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22#include "lra.h"
23#include "bitmap.h"
24#include "recog.h"
25#include "insn-attr.h"
26#include "insn-codes.h"
27
a202e609 28#define lra_assert(c) gcc_checking_assert (c)
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29
30/* The parameter used to prevent infinite reloading for an insn. Each
31 insn operands might require a reload and, if it is a memory, its
32 base and index registers might require a reload too. */
33#define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
34
35/* Return the hard register which given pseudo REGNO assigned to.
36 Negative value means that the register got memory or we don't know
37 allocation yet. */
38static inline int
39lra_get_regno_hard_regno (int regno)
40{
41 resize_reg_info ();
42 return reg_renumber[regno];
43}
44
45typedef struct lra_live_range *lra_live_range_t;
46
47/* The structure describes program points where a given pseudo lives.
48 The live ranges can be used to find conflicts with other pseudos.
49 If the live ranges of two pseudos are intersected, the pseudos are
50 in conflict. */
51struct lra_live_range
52{
53 /* Pseudo regno whose live range is described by given
54 structure. */
55 int regno;
56 /* Program point range. */
57 int start, finish;
58 /* Next structure describing program points where the pseudo
59 lives. */
60 lra_live_range_t next;
61 /* Pointer to structures with the same start. */
62 lra_live_range_t start_next;
63};
64
65typedef struct lra_copy *lra_copy_t;
66
67/* Copy between pseudos which affects assigning hard registers. */
68struct lra_copy
69{
70 /* True if regno1 is the destination of the copy. */
71 bool regno1_dest_p;
72 /* Execution frequency of the copy. */
73 int freq;
74 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
75 int regno1, regno2;
76 /* Next copy with correspondingly REGNO1 and REGNO2. */
77 lra_copy_t regno1_next, regno2_next;
78};
79
80/* Common info about a register (pseudo or hard register). */
81struct lra_reg
82{
83 /* Bitmap of UIDs of insns (including debug insns) referring the
84 reg. */
85 bitmap_head insn_bitmap;
86 /* The following fields are defined only for pseudos. */
87 /* Hard registers with which the pseudo conflicts. */
88 HARD_REG_SET conflict_hard_regs;
89 /* We assign hard registers to reload pseudos which can occur in few
90 places. So two hard register preferences are enough for them.
91 The following fields define the preferred hard registers. If
92 there are no such hard registers the first field value is
93 negative. If there is only one preferred hard register, the 2nd
94 field is negative. */
95 int preferred_hard_regno1, preferred_hard_regno2;
96 /* Profits to use the corresponding preferred hard registers. If
97 the both hard registers defined, the first hard register has not
98 less profit than the second one. */
99 int preferred_hard_regno_profit1, preferred_hard_regno_profit2;
100#ifdef STACK_REGS
101 /* True if the pseudo should not be assigned to a stack register. */
102 bool no_stack_p;
103#endif
104#ifdef ENABLE_CHECKING
105 /* True if the pseudo crosses a call. It is setup in lra-lives.c
106 and used to check that the pseudo crossing a call did not get a
107 call used hard register. */
108 bool call_p;
109#endif
110 /* Number of references and execution frequencies of the register in
111 *non-debug* insns. */
112 int nrefs, freq;
113 int last_reload;
114 /* Regno used to undo the inheritance. It can be non-zero only
115 between couple of inheritance and undo inheritance passes. */
116 int restore_regno;
117 /* Value holding by register. If the pseudos have the same value
118 they do not conflict. */
119 int val;
120 /* These members are set up in lra-lives.c and updated in
121 lra-coalesce.c. */
122 /* The biggest size mode in which each pseudo reg is referred in
123 whole function (possibly via subreg). */
124 enum machine_mode biggest_mode;
125 /* Live ranges of the pseudo. */
126 lra_live_range_t live_ranges;
127 /* This member is set up in lra-lives.c for subsequent
128 assignments. */
129 lra_copy_t copies;
130};
131
132/* References to the common info about each register. */
133extern struct lra_reg *lra_reg_info;
134
135/* Static info about each insn operand (common for all insns with the
136 same ICODE). Warning: if the structure definition is changed, the
137 initializer for debug_operand_data in lra.c should be changed
138 too. */
139struct lra_operand_data
140{
141 /* The machine description constraint string of the operand. */
142 const char *constraint;
143 /* It is taken only from machine description (which is different
144 from recog_data.operand_mode) and can be of VOIDmode. */
145 ENUM_BITFIELD(machine_mode) mode : 16;
146 /* The type of the operand (in/out/inout). */
147 ENUM_BITFIELD (op_type) type : 8;
148 /* Through if accessed through STRICT_LOW. */
149 unsigned int strict_low : 1;
150 /* True if the operand is an operator. */
151 unsigned int is_operator : 1;
152 /* True if there is an early clobber alternative for this operand.
153 This field is set up every time when corresponding
154 operand_alternative in lra_static_insn_data is set up. */
155 unsigned int early_clobber : 1;
156 /* True if the operand is an address. */
157 unsigned int is_address : 1;
158};
159
160/* Info about register occurrence in an insn. */
161struct lra_insn_reg
162{
163 /* The biggest mode through which the insn refers to the register
164 occurrence (remember the register can be accessed through a
165 subreg in the insn). */
166 ENUM_BITFIELD(machine_mode) biggest_mode : 16;
167 /* The type of the corresponding operand which is the register. */
168 ENUM_BITFIELD (op_type) type : 8;
169 /* True if the reg is accessed through a subreg and the subreg is
170 just a part of the register. */
171 unsigned int subreg_p : 1;
172 /* True if there is an early clobber alternative for this
173 operand. */
174 unsigned int early_clobber : 1;
175 /* The corresponding regno of the register. */
176 int regno;
177 /* Next reg info of the same insn. */
178 struct lra_insn_reg *next;
179};
180
181/* Static part (common info for insns with the same ICODE) of LRA
182 internal insn info. It exists in at most one exemplar for each
183 non-negative ICODE. There is only one exception. Each asm insn has
184 own structure. Warning: if the structure definition is changed,
185 the initializer for debug_insn_static_data in lra.c should be
186 changed too. */
187struct lra_static_insn_data
188{
189 /* Static info about each insn operand. */
190 struct lra_operand_data *operand;
191 /* Each duplication refers to the number of the corresponding
192 operand which is duplicated. */
193 int *dup_num;
194 /* The number of an operand marked as commutative, -1 otherwise. */
195 int commutative;
196 /* Number of operands, duplications, and alternatives of the
197 insn. */
198 char n_operands;
199 char n_dups;
200 char n_alternatives;
201 /* Insns in machine description (or clobbers in asm) may contain
202 explicit hard regs which are not operands. The following list
203 describes such hard registers. */
204 struct lra_insn_reg *hard_regs;
205 /* Array [n_alternatives][n_operand] of static constraint info for
206 given operand in given alternative. This info can be changed if
207 the target reg info is changed. */
208 struct operand_alternative *operand_alternative;
209};
210
211/* LRA internal info about an insn (LRA internal insn
212 representation). */
213struct lra_insn_recog_data
214{
215 /* The insn code. */
216 int icode;
217 /* The insn itself. */
218 rtx insn;
219 /* Common data for insns with the same ICODE. Asm insns (their
220 ICODE is negative) do not share such structures. */
221 struct lra_static_insn_data *insn_static_data;
222 /* Two arrays of size correspondingly equal to the operand and the
223 duplication numbers: */
224 rtx **operand_loc; /* The operand locations, NULL if no operands. */
225 rtx **dup_loc; /* The dup locations, NULL if no dups. */
226 /* Number of hard registers implicitly used in given call insn. The
227 value can be NULL or points to array of the hard register numbers
228 ending with a negative value. */
229 int *arg_hard_regs;
230#ifdef HAVE_ATTR_enabled
231 /* Alternative enabled for the insn. NULL for debug insns. */
232 bool *alternative_enabled_p;
233#endif
234 /* The alternative should be used for the insn, -1 if invalid, or we
235 should try to use any alternative, or the insn is a debug
236 insn. */
237 int used_insn_alternative;
238 /* The following member value is always NULL for a debug insn. */
239 struct lra_insn_reg *regs;
240};
241
242typedef struct lra_insn_recog_data *lra_insn_recog_data_t;
243
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244/* Whether the clobber is used temporary in LRA. */
245#define LRA_TEMP_CLOBBER_P(x) \
246 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
247
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248/* lra.c: */
249
250extern FILE *lra_dump_file;
251
252extern bool lra_reg_spill_p;
253
254extern HARD_REG_SET lra_no_alloc_regs;
255
256extern int lra_insn_recog_data_len;
257extern lra_insn_recog_data_t *lra_insn_recog_data;
258
259extern int lra_curr_reload_num;
260
261extern void lra_push_insn (rtx);
262extern void lra_push_insn_by_uid (unsigned int);
263extern void lra_push_insn_and_update_insn_regno_info (rtx);
264extern rtx lra_pop_insn (void);
265extern unsigned int lra_insn_stack_length (void);
266
267extern rtx lra_create_new_reg_with_unique_value (enum machine_mode, rtx,
268 enum reg_class, const char *);
269extern void lra_set_regno_unique_value (int);
270extern void lra_invalidate_insn_data (rtx);
271extern void lra_set_insn_deleted (rtx);
272extern void lra_delete_dead_insn (rtx);
273extern void lra_emit_add (rtx, rtx, rtx);
274extern void lra_emit_move (rtx, rtx);
275extern void lra_update_dups (lra_insn_recog_data_t, signed char *);
276
277extern void lra_process_new_insns (rtx, rtx, rtx, const char *);
278
279extern lra_insn_recog_data_t lra_set_insn_recog_data (rtx);
280extern lra_insn_recog_data_t lra_update_insn_recog_data (rtx);
281extern void lra_set_used_insn_alternative (rtx, int);
282extern void lra_set_used_insn_alternative_by_uid (int, int);
283
284extern void lra_invalidate_insn_regno_info (rtx);
285extern void lra_update_insn_regno_info (rtx);
286extern struct lra_insn_reg *lra_get_insn_regs (int);
287
288extern void lra_free_copies (void);
289extern void lra_create_copy (int, int, int);
290extern lra_copy_t lra_get_copy (int);
291extern bool lra_former_scratch_p (int);
292extern bool lra_former_scratch_operand_p (rtx, int);
293
294extern int lra_constraint_new_regno_start;
295extern bitmap_head lra_inheritance_pseudos;
296extern bitmap_head lra_split_regs;
297extern bitmap_head lra_optional_reload_pseudos;
298extern int lra_constraint_new_insn_uid_start;
299
300/* lra-constraints.c: */
301
302extern int lra_constraint_offset (int, enum machine_mode);
303
304extern int lra_constraint_iter;
305extern int lra_constraint_iter_after_spill;
306extern bool lra_risky_transformations_p;
307extern int lra_inheritance_iter;
308extern int lra_undo_inheritance_iter;
309extern bool lra_constraints (bool);
310extern void lra_constraints_init (void);
311extern void lra_constraints_finish (void);
312extern void lra_inheritance (void);
313extern bool lra_undo_inheritance (void);
314
315/* lra-lives.c: */
316
317extern int lra_live_max_point;
318extern int *lra_point_freq;
319
320extern int lra_hard_reg_usage[FIRST_PSEUDO_REGISTER];
321
322extern int lra_live_range_iter;
323extern void lra_create_live_ranges (bool);
324extern lra_live_range_t lra_copy_live_range_list (lra_live_range_t);
325extern lra_live_range_t lra_merge_live_ranges (lra_live_range_t,
326 lra_live_range_t);
327extern bool lra_intersected_live_ranges_p (lra_live_range_t,
328 lra_live_range_t);
329extern void lra_print_live_range_list (FILE *, lra_live_range_t);
330extern void lra_debug_live_range_list (lra_live_range_t);
331extern void lra_debug_pseudo_live_ranges (int);
332extern void lra_debug_live_ranges (void);
333extern void lra_clear_live_ranges (void);
334extern void lra_live_ranges_init (void);
335extern void lra_live_ranges_finish (void);
336extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
337
338/* lra-assigns.c: */
339
340extern void lra_setup_reg_renumber (int, int, bool);
341extern bool lra_assign (void);
342
343
344/* lra-coalesce.c: */
345
346extern int lra_coalesce_iter;
347extern bool lra_coalesce (void);
348
349/* lra-spills.c: */
350
351extern bool lra_need_for_spills_p (void);
352extern void lra_spill (void);
c5cd5a7e 353extern void lra_final_code_change (void);
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354
355
356/* lra-elimination.c: */
357
358extern void lra_debug_elim_table (void);
359extern int lra_get_elimination_hard_regno (int);
360extern rtx lra_eliminate_regs_1 (rtx, enum machine_mode, bool, bool, bool);
361extern void lra_eliminate (bool);
362
363extern void lra_eliminate_reg_if_possible (rtx *);
364
365\f
366
367/* Update insn operands which are duplication of NOP operand. The
368 insn is represented by its LRA internal representation ID. */
369static inline void
370lra_update_dup (lra_insn_recog_data_t id, int nop)
371{
372 int i;
373 struct lra_static_insn_data *static_id = id->insn_static_data;
374
375 for (i = 0; i < static_id->n_dups; i++)
376 if (static_id->dup_num[i] == nop)
377 *id->dup_loc[i] = *id->operand_loc[nop];
378}
379
380/* Process operator duplications in insn with ID. We do it after the
381 operands processing. Generally speaking, we could do this probably
382 simultaneously with operands processing because a common practice
383 is to enumerate the operators after their operands. */
384static inline void
385lra_update_operator_dups (lra_insn_recog_data_t id)
386{
387 int i;
388 struct lra_static_insn_data *static_id = id->insn_static_data;
389
390 for (i = 0; i < static_id->n_dups; i++)
391 {
392 int ndup = static_id->dup_num[i];
393
394 if (static_id->operand[ndup].is_operator)
395 *id->dup_loc[i] = *id->operand_loc[ndup];
396 }
397}
398
399/* Return info about INSN. Set up the info if it is not done yet. */
400static inline lra_insn_recog_data_t
401lra_get_insn_recog_data (rtx insn)
402{
403 lra_insn_recog_data_t data;
404 unsigned int uid = INSN_UID (insn);
405
406 if (lra_insn_recog_data_len > (int) uid
407 && (data = lra_insn_recog_data[uid]) != NULL)
408 {
409 /* Check that we did not change insn without updating the insn
410 info. */
411 lra_assert (data->insn == insn
412 && (INSN_CODE (insn) < 0
413 || data->icode == INSN_CODE (insn)));
414 return data;
415 }
416 return lra_set_insn_recog_data (insn);
417}
418
419\f
420
421struct target_lra_int
422{
423 /* Map INSN_UID -> the operand alternative data (NULL if unknown).
424 We assume that this data is valid until register info is changed
425 because classes in the data can be changed. */
426 struct operand_alternative *x_op_alt_data[LAST_INSN_CODE];
427};
428
429extern struct target_lra_int default_target_lra_int;
430#if SWITCHABLE_TARGET
431extern struct target_lra_int *this_target_lra_int;
432#else
433#define this_target_lra_int (&default_target_lra_int)
434#endif
435
436#define op_alt_data (this_target_lra_int->x_op_alt_data)
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