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Remove a layer of indirection from hash_table
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cb20f7e8 1/* RTL-level loop invariant motion.
23a5b65a 2 Copyright (C) 2004-2014 Free Software Foundation, Inc.
cb20f7e8 3
5e962776 4This file is part of GCC.
cb20f7e8 5
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6GCC is free software; you can redistribute it and/or modify it
7under the terms of the GNU General Public License as published by the
9dcd6f09 8Free Software Foundation; either version 3, or (at your option) any
5e962776 9later version.
cb20f7e8 10
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11GCC is distributed in the hope that it will be useful, but WITHOUT
12ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
cb20f7e8 15
5e962776 16You should have received a copy of the GNU General Public License
9dcd6f09
NC
17along with GCC; see the file COPYING3. If not see
18<http://www.gnu.org/licenses/>. */
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19
20/* This implements the loop invariant motion pass. It is very simple
4a8cae83
SB
21 (no calls, no loads/stores, etc.). This should be sufficient to cleanup
22 things like address arithmetics -- other more complicated invariants should
23 be eliminated on GIMPLE either in tree-ssa-loop-im.c or in tree-ssa-pre.c.
cb20f7e8 24
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25 We proceed loop by loop -- it is simpler than trying to handle things
26 globally and should not lose much. First we inspect all sets inside loop
27 and create a dependency graph on insns (saying "to move this insn, you must
28 also move the following insns").
29
30 We then need to determine what to move. We estimate the number of registers
31 used and move as many invariants as possible while we still have enough free
32 registers. We prefer the expensive invariants.
cb20f7e8 33
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34 Then we move the selected invariants out of the loop, creating a new
35 temporaries for them if necessary. */
36
37#include "config.h"
38#include "system.h"
39#include "coretypes.h"
40#include "tm.h"
1833192f 41#include "hard-reg-set.h"
5e962776 42#include "rtl.h"
3912d291 43#include "tm_p.h"
7932a3db 44#include "obstack.h"
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45#include "basic-block.h"
46#include "cfgloop.h"
47#include "expr.h"
1052bd54 48#include "recog.h"
1a17bd35 49#include "target.h"
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50#include "function.h"
51#include "flags.h"
52#include "df.h"
4a8fb1a1 53#include "hash-table.h"
28749cfb 54#include "except.h"
b1fb9f56 55#include "params.h"
1833192f
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56#include "regs.h"
57#include "ira.h"
7ee2468b 58#include "dumpfile.h"
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59
60/* The data stored for the loop. */
61
62struct loop_data
63{
64 struct loop *outermost_exit; /* The outermost exit of the loop. */
65 bool has_call; /* True if the loop contains a call. */
1833192f 66 /* Maximal register pressure inside loop for given register class
1756cb66 67 (defined only for the pressure classes). */
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68 int max_reg_pressure[N_REG_CLASSES];
69 /* Loop regs referenced and live pseudo-registers. */
70 bitmap_head regs_ref;
71 bitmap_head regs_live;
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72};
73
74#define LOOP_DATA(LOOP) ((struct loop_data *) (LOOP)->aux)
75
76/* The description of an use. */
77
78struct use
79{
80 rtx *pos; /* Position of the use. */
81 rtx insn; /* The insn in that the use occurs. */
1bfdbb29 82 unsigned addr_use_p; /* Whether the use occurs in an address. */
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83 struct use *next; /* Next use in the list. */
84};
85
86/* The description of a def. */
87
88struct def
89{
90 struct use *uses; /* The list of uses that are uniquely reached
91 by it. */
92 unsigned n_uses; /* Number of such uses. */
1bfdbb29 93 unsigned n_addr_uses; /* Number of uses in addresses. */
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94 unsigned invno; /* The corresponding invariant. */
95};
96
97/* The data stored for each invariant. */
98
99struct invariant
100{
101 /* The number of the invariant. */
102 unsigned invno;
103
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104 /* The number of the invariant with the same value. */
105 unsigned eqto;
106
107 /* If we moved the invariant out of the loop, the register that contains its
108 value. */
109 rtx reg;
5e962776 110
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111 /* If we moved the invariant out of the loop, the original regno
112 that contained its value. */
113 int orig_regno;
114
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115 /* The definition of the invariant. */
116 struct def *def;
117
118 /* The insn in that it is defined. */
119 rtx insn;
120
121 /* Whether it is always executed. */
122 bool always_executed;
123
124 /* Whether to move the invariant. */
125 bool move;
126
1bfdbb29
PB
127 /* Whether the invariant is cheap when used as an address. */
128 bool cheap_address;
129
cb20f7e8 130 /* Cost of the invariant. */
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131 unsigned cost;
132
133 /* The invariants it depends on. */
134 bitmap depends_on;
135
136 /* Used for detecting already visited invariants during determining
137 costs of movements. */
138 unsigned stamp;
139};
140
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141/* Currently processed loop. */
142static struct loop *curr_loop;
143
6fb5fa3c
DB
144/* Table of invariants indexed by the df_ref uid field. */
145
146static unsigned int invariant_table_size = 0;
147static struct invariant ** invariant_table;
148
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149/* Entry for hash table of invariant expressions. */
150
151struct invariant_expr_entry
152{
153 /* The invariant. */
154 struct invariant *inv;
155
156 /* Its value. */
157 rtx expr;
158
159 /* Its mode. */
160 enum machine_mode mode;
161
162 /* Its hash. */
163 hashval_t hash;
164};
165
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166/* The actual stamp for marking already visited invariants during determining
167 costs of movements. */
168
169static unsigned actual_stamp;
170
edd954e6
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171typedef struct invariant *invariant_p;
172
edd954e6 173
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174/* The invariants. */
175
9771b263 176static vec<invariant_p> invariants;
5e962776 177
6fb5fa3c 178/* Check the size of the invariant table and realloc if necessary. */
cb20f7e8 179
b8698a0f 180static void
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DB
181check_invariant_table_size (void)
182{
c3284718 183 if (invariant_table_size < DF_DEFS_TABLE_SIZE ())
6fb5fa3c
DB
184 {
185 unsigned int new_size = DF_DEFS_TABLE_SIZE () + (DF_DEFS_TABLE_SIZE () / 4);
d3bfe4de 186 invariant_table = XRESIZEVEC (struct invariant *, invariant_table, new_size);
b8698a0f 187 memset (&invariant_table[invariant_table_size], 0,
92cfe9d5 188 (new_size - invariant_table_size) * sizeof (struct invariant *));
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DB
189 invariant_table_size = new_size;
190 }
191}
cb20f7e8 192
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193/* Test for possibility of invariantness of X. */
194
195static bool
196check_maybe_invariant (rtx x)
197{
198 enum rtx_code code = GET_CODE (x);
199 int i, j;
200 const char *fmt;
201
202 switch (code)
203 {
d8116890 204 CASE_CONST_ANY:
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205 case SYMBOL_REF:
206 case CONST:
207 case LABEL_REF:
208 return true;
209
210 case PC:
211 case CC0:
212 case UNSPEC_VOLATILE:
213 case CALL:
214 return false;
215
216 case REG:
217 return true;
218
219 case MEM:
220 /* Load/store motion is done elsewhere. ??? Perhaps also add it here?
221 It should not be hard, and might be faster than "elsewhere". */
222
223 /* Just handle the most trivial case where we load from an unchanging
224 location (most importantly, pic tables). */
66f91b93 225 if (MEM_READONLY_P (x) && !MEM_VOLATILE_P (x))
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226 break;
227
228 return false;
229
230 case ASM_OPERANDS:
231 /* Don't mess with insns declared volatile. */
232 if (MEM_VOLATILE_P (x))
233 return false;
234 break;
235
236 default:
237 break;
238 }
239
240 fmt = GET_RTX_FORMAT (code);
241 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
242 {
243 if (fmt[i] == 'e')
244 {
245 if (!check_maybe_invariant (XEXP (x, i)))
246 return false;
247 }
248 else if (fmt[i] == 'E')
249 {
250 for (j = 0; j < XVECLEN (x, i); j++)
251 if (!check_maybe_invariant (XVECEXP (x, i, j)))
252 return false;
253 }
254 }
255
256 return true;
257}
258
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259/* Returns the invariant definition for USE, or NULL if USE is not
260 invariant. */
261
262static struct invariant *
57512f53 263invariant_for_use (df_ref use)
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264{
265 struct df_link *defs;
57512f53 266 df_ref def;
50e94c7e 267 basic_block bb = DF_REF_BB (use), def_bb;
1052bd54 268
57512f53 269 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
b6c9b9bc
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270 return NULL;
271
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272 defs = DF_REF_CHAIN (use);
273 if (!defs || defs->next)
274 return NULL;
275 def = defs->ref;
6fb5fa3c 276 check_invariant_table_size ();
c3284718 277 if (!invariant_table[DF_REF_ID (def)])
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278 return NULL;
279
280 def_bb = DF_REF_BB (def);
281 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
282 return NULL;
c3284718 283 return invariant_table[DF_REF_ID (def)];
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284}
285
286/* Computes hash value for invariant expression X in INSN. */
287
288static hashval_t
289hash_invariant_expr_1 (rtx insn, rtx x)
290{
291 enum rtx_code code = GET_CODE (x);
292 int i, j;
293 const char *fmt;
294 hashval_t val = code;
295 int do_not_record_p;
57512f53 296 df_ref use;
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297 struct invariant *inv;
298
299 switch (code)
300 {
d8116890 301 CASE_CONST_ANY:
1052bd54
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302 case SYMBOL_REF:
303 case CONST:
304 case LABEL_REF:
305 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
306
307 case REG:
6fb5fa3c 308 use = df_find_use (insn, x);
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309 if (!use)
310 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
311 inv = invariant_for_use (use);
312 if (!inv)
313 return hash_rtx (x, GET_MODE (x), &do_not_record_p, NULL, false);
314
315 gcc_assert (inv->eqto != ~0u);
316 return inv->eqto;
317
318 default:
319 break;
320 }
321
322 fmt = GET_RTX_FORMAT (code);
323 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
324 {
325 if (fmt[i] == 'e')
326 val ^= hash_invariant_expr_1 (insn, XEXP (x, i));
327 else if (fmt[i] == 'E')
328 {
329 for (j = 0; j < XVECLEN (x, i); j++)
330 val ^= hash_invariant_expr_1 (insn, XVECEXP (x, i, j));
331 }
8e1409e8
ZD
332 else if (fmt[i] == 'i' || fmt[i] == 'n')
333 val ^= XINT (x, i);
1052bd54
ZD
334 }
335
336 return val;
337}
338
339/* Returns true if the invariant expressions E1 and E2 used in insns INSN1
340 and INSN2 have always the same value. */
341
342static bool
343invariant_expr_equal_p (rtx insn1, rtx e1, rtx insn2, rtx e2)
344{
345 enum rtx_code code = GET_CODE (e1);
346 int i, j;
347 const char *fmt;
57512f53 348 df_ref use1, use2;
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349 struct invariant *inv1 = NULL, *inv2 = NULL;
350 rtx sub1, sub2;
351
352 /* If mode of only one of the operands is VOIDmode, it is not equivalent to
353 the other one. If both are VOIDmode, we rely on the caller of this
354 function to verify that their modes are the same. */
355 if (code != GET_CODE (e2) || GET_MODE (e1) != GET_MODE (e2))
356 return false;
357
358 switch (code)
359 {
d8116890 360 CASE_CONST_ANY:
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361 case SYMBOL_REF:
362 case CONST:
363 case LABEL_REF:
364 return rtx_equal_p (e1, e2);
365
366 case REG:
6fb5fa3c
DB
367 use1 = df_find_use (insn1, e1);
368 use2 = df_find_use (insn2, e2);
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369 if (use1)
370 inv1 = invariant_for_use (use1);
371 if (use2)
372 inv2 = invariant_for_use (use2);
373
374 if (!inv1 && !inv2)
375 return rtx_equal_p (e1, e2);
376
377 if (!inv1 || !inv2)
378 return false;
379
380 gcc_assert (inv1->eqto != ~0u);
381 gcc_assert (inv2->eqto != ~0u);
382 return inv1->eqto == inv2->eqto;
383
384 default:
385 break;
386 }
387
388 fmt = GET_RTX_FORMAT (code);
389 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
390 {
391 if (fmt[i] == 'e')
392 {
393 sub1 = XEXP (e1, i);
394 sub2 = XEXP (e2, i);
395
396 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
397 return false;
398 }
399
400 else if (fmt[i] == 'E')
401 {
402 if (XVECLEN (e1, i) != XVECLEN (e2, i))
403 return false;
404
405 for (j = 0; j < XVECLEN (e1, i); j++)
406 {
407 sub1 = XVECEXP (e1, i, j);
408 sub2 = XVECEXP (e2, i, j);
409
410 if (!invariant_expr_equal_p (insn1, sub1, insn2, sub2))
411 return false;
412 }
413 }
8e1409e8
ZD
414 else if (fmt[i] == 'i' || fmt[i] == 'n')
415 {
416 if (XINT (e1, i) != XINT (e2, i))
417 return false;
418 }
419 /* Unhandled type of subexpression, we fail conservatively. */
420 else
421 return false;
1052bd54
ZD
422 }
423
424 return true;
425}
426
4a8fb1a1 427struct invariant_expr_hasher : typed_free_remove <invariant_expr_entry>
1052bd54 428{
4a8fb1a1
LC
429 typedef invariant_expr_entry value_type;
430 typedef invariant_expr_entry compare_type;
431 static inline hashval_t hash (const value_type *);
432 static inline bool equal (const value_type *, const compare_type *);
433};
434
435/* Returns hash value for invariant expression entry ENTRY. */
1052bd54 436
4a8fb1a1
LC
437inline hashval_t
438invariant_expr_hasher::hash (const value_type *entry)
439{
1052bd54
ZD
440 return entry->hash;
441}
442
4a8fb1a1 443/* Compares invariant expression entries ENTRY1 and ENTRY2. */
1052bd54 444
4a8fb1a1
LC
445inline bool
446invariant_expr_hasher::equal (const value_type *entry1,
447 const compare_type *entry2)
1052bd54 448{
1052bd54
ZD
449 if (entry1->mode != entry2->mode)
450 return 0;
451
452 return invariant_expr_equal_p (entry1->inv->insn, entry1->expr,
453 entry2->inv->insn, entry2->expr);
454}
455
c203e8a7 456typedef hash_table<invariant_expr_hasher> invariant_htab_type;
4a8fb1a1 457
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458/* Checks whether invariant with value EXPR in machine mode MODE is
459 recorded in EQ. If this is the case, return the invariant. Otherwise
460 insert INV to the table for this expression and return INV. */
461
462static struct invariant *
c203e8a7 463find_or_insert_inv (invariant_htab_type *eq, rtx expr, enum machine_mode mode,
1052bd54
ZD
464 struct invariant *inv)
465{
466 hashval_t hash = hash_invariant_expr_1 (inv->insn, expr);
467 struct invariant_expr_entry *entry;
468 struct invariant_expr_entry pentry;
4a8fb1a1 469 invariant_expr_entry **slot;
1052bd54
ZD
470
471 pentry.expr = expr;
472 pentry.inv = inv;
473 pentry.mode = mode;
c203e8a7 474 slot = eq->find_slot_with_hash (&pentry, hash, INSERT);
4a8fb1a1 475 entry = *slot;
1052bd54
ZD
476
477 if (entry)
478 return entry->inv;
479
5ed6ace5 480 entry = XNEW (struct invariant_expr_entry);
1052bd54
ZD
481 entry->inv = inv;
482 entry->expr = expr;
483 entry->mode = mode;
484 entry->hash = hash;
485 *slot = entry;
486
487 return inv;
488}
489
490/* Finds invariants identical to INV and records the equivalence. EQ is the
491 hash table of the invariants. */
492
493static void
c203e8a7 494find_identical_invariants (invariant_htab_type *eq, struct invariant *inv)
1052bd54
ZD
495{
496 unsigned depno;
497 bitmap_iterator bi;
498 struct invariant *dep;
499 rtx expr, set;
500 enum machine_mode mode;
501
502 if (inv->eqto != ~0u)
503 return;
504
505 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
506 {
9771b263 507 dep = invariants[depno];
1052bd54
ZD
508 find_identical_invariants (eq, dep);
509 }
510
511 set = single_set (inv->insn);
512 expr = SET_SRC (set);
513 mode = GET_MODE (expr);
514 if (mode == VOIDmode)
515 mode = GET_MODE (SET_DEST (set));
516 inv->eqto = find_or_insert_inv (eq, expr, mode, inv)->invno;
517
518 if (dump_file && inv->eqto != inv->invno)
519 fprintf (dump_file,
e755fcf5 520 "Invariant %d is equivalent to invariant %d.\n",
1052bd54
ZD
521 inv->invno, inv->eqto);
522}
523
524/* Find invariants with the same value and record the equivalences. */
525
526static void
527merge_identical_invariants (void)
528{
529 unsigned i;
530 struct invariant *inv;
c203e8a7 531 invariant_htab_type eq (invariants.length ());
1052bd54 532
9771b263 533 FOR_EACH_VEC_ELT (invariants, i, inv)
c203e8a7 534 find_identical_invariants (&eq, inv);
1052bd54
ZD
535}
536
5e962776
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537/* Determines the basic blocks inside LOOP that are always executed and
538 stores their bitmap to ALWAYS_REACHED. MAY_EXIT is a bitmap of
539 basic blocks that may either exit the loop, or contain the call that
540 does not have to return. BODY is body of the loop obtained by
541 get_loop_body_in_dom_order. */
542
543static void
544compute_always_reached (struct loop *loop, basic_block *body,
545 bitmap may_exit, bitmap always_reached)
546{
547 unsigned i;
548
549 for (i = 0; i < loop->num_nodes; i++)
550 {
551 if (dominated_by_p (CDI_DOMINATORS, loop->latch, body[i]))
552 bitmap_set_bit (always_reached, i);
553
554 if (bitmap_bit_p (may_exit, i))
555 return;
556 }
557}
558
559/* Finds exits out of the LOOP with body BODY. Marks blocks in that we may
560 exit the loop by cfg edge to HAS_EXIT and MAY_EXIT. In MAY_EXIT
561 additionally mark blocks that may exit due to a call. */
562
563static void
564find_exits (struct loop *loop, basic_block *body,
565 bitmap may_exit, bitmap has_exit)
566{
567 unsigned i;
628f6a4e 568 edge_iterator ei;
5e962776
ZD
569 edge e;
570 struct loop *outermost_exit = loop, *aexit;
571 bool has_call = false;
572 rtx insn;
573
574 for (i = 0; i < loop->num_nodes; i++)
575 {
576 if (body[i]->loop_father == loop)
577 {
578 FOR_BB_INSNS (body[i], insn)
579 {
4b4bf941 580 if (CALL_P (insn)
becfd6e5
KZ
581 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
582 || !RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
583 {
584 has_call = true;
585 bitmap_set_bit (may_exit, i);
586 break;
587 }
588 }
589
628f6a4e 590 FOR_EACH_EDGE (e, ei, body[i]->succs)
5e962776
ZD
591 {
592 if (flow_bb_inside_loop_p (loop, e->dest))
593 continue;
594
595 bitmap_set_bit (may_exit, i);
596 bitmap_set_bit (has_exit, i);
597 outermost_exit = find_common_loop (outermost_exit,
598 e->dest->loop_father);
599 }
600 continue;
601 }
cb20f7e8 602
5e962776
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603 /* Use the data stored for the subloop to decide whether we may exit
604 through it. It is sufficient to do this for header of the loop,
605 as other basic blocks inside it must be dominated by it. */
606 if (body[i]->loop_father->header != body[i])
607 continue;
608
609 if (LOOP_DATA (body[i]->loop_father)->has_call)
610 {
611 has_call = true;
612 bitmap_set_bit (may_exit, i);
613 }
614 aexit = LOOP_DATA (body[i]->loop_father)->outermost_exit;
615 if (aexit != loop)
616 {
617 bitmap_set_bit (may_exit, i);
618 bitmap_set_bit (has_exit, i);
619
620 if (flow_loop_nested_p (aexit, outermost_exit))
621 outermost_exit = aexit;
622 }
623 }
624
1833192f
VM
625 if (loop->aux == NULL)
626 {
627 loop->aux = xcalloc (1, sizeof (struct loop_data));
628 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
629 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
630 }
5e962776
ZD
631 LOOP_DATA (loop)->outermost_exit = outermost_exit;
632 LOOP_DATA (loop)->has_call = has_call;
633}
634
635/* Check whether we may assign a value to X from a register. */
636
637static bool
638may_assign_reg_p (rtx x)
639{
bd361d85 640 return (GET_MODE (x) != VOIDmode
4b06592a 641 && GET_MODE (x) != BLKmode
bd361d85 642 && can_copy_p (GET_MODE (x))
a7f4ccb1
SB
643 && (!REG_P (x)
644 || !HARD_REGISTER_P (x)
645 || REGNO_REG_CLASS (REGNO (x)) != NO_REGS));
5e962776
ZD
646}
647
cb20f7e8
ZD
648/* Finds definitions that may correspond to invariants in LOOP with body
649 BODY. */
5e962776
ZD
650
651static void
7be64667 652find_defs (struct loop *loop)
5e962776 653{
7b19209f
SB
654 if (dump_file)
655 {
656 fprintf (dump_file,
657 "*****starting processing of loop %d ******\n",
658 loop->num);
659 }
660
6fb5fa3c
DB
661 df_remove_problem (df_chain);
662 df_process_deferred_rescans ();
663 df_chain_add_problem (DF_UD_CHAIN);
7b19209f 664 df_set_flags (DF_RD_PRUNE_DEAD_DEFS);
7be64667 665 df_analyze_loop (loop);
7b19209f 666 check_invariant_table_size ();
6fb5fa3c
DB
667
668 if (dump_file)
669 {
ffd640ed 670 df_dump_region (dump_file);
7b19209f
SB
671 fprintf (dump_file,
672 "*****ending processing of loop %d ******\n",
673 loop->num);
6fb5fa3c 674 }
5e962776
ZD
675}
676
677/* Creates a new invariant for definition DEF in INSN, depending on invariants
678 in DEPENDS_ON. ALWAYS_EXECUTED is true if the insn is always executed,
1052bd54
ZD
679 unless the program ends due to a function call. The newly created invariant
680 is returned. */
5e962776 681
1052bd54 682static struct invariant *
5e962776
ZD
683create_new_invariant (struct def *def, rtx insn, bitmap depends_on,
684 bool always_executed)
685{
5ed6ace5 686 struct invariant *inv = XNEW (struct invariant);
5e962776 687 rtx set = single_set (insn);
f40751dd 688 bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
5e962776
ZD
689
690 inv->def = def;
691 inv->always_executed = always_executed;
692 inv->depends_on = depends_on;
693
694 /* If the set is simple, usually by moving it we move the whole store out of
695 the loop. Otherwise we save only cost of the computation. */
696 if (def)
1bfdbb29 697 {
d51102f3 698 inv->cost = set_rtx_cost (set, speed);
1578e910
MM
699 /* ??? Try to determine cheapness of address computation. Unfortunately
700 the address cost is only a relative measure, we can't really compare
701 it with any absolute number, but only with other address costs.
702 But here we don't have any other addresses, so compare with a magic
703 number anyway. It has to be large enough to not regress PR33928
704 (by avoiding to move reg+8,reg+16,reg+24 invariants), but small
705 enough to not regress 410.bwaves either (by still moving reg+reg
706 invariants).
707 See http://gcc.gnu.org/ml/gcc-patches/2009-10/msg01210.html . */
1bfdbb29 708 inv->cheap_address = address_cost (SET_SRC (set), word_mode,
09e881c9 709 ADDR_SPACE_GENERIC, speed) < 3;
1bfdbb29 710 }
5e962776 711 else
1bfdbb29 712 {
5e8f01f4 713 inv->cost = set_src_cost (SET_SRC (set), speed);
1bfdbb29
PB
714 inv->cheap_address = false;
715 }
5e962776
ZD
716
717 inv->move = false;
1052bd54 718 inv->reg = NULL_RTX;
1833192f 719 inv->orig_regno = -1;
5e962776
ZD
720 inv->stamp = 0;
721 inv->insn = insn;
722
9771b263 723 inv->invno = invariants.length ();
1052bd54 724 inv->eqto = ~0u;
5e962776
ZD
725 if (def)
726 def->invno = inv->invno;
9771b263 727 invariants.safe_push (inv);
5e962776
ZD
728
729 if (dump_file)
730 {
731 fprintf (dump_file,
732 "Set in insn %d is invariant (%d), cost %d, depends on ",
733 INSN_UID (insn), inv->invno, inv->cost);
734 dump_bitmap (dump_file, inv->depends_on);
735 }
1052bd54
ZD
736
737 return inv;
5e962776
ZD
738}
739
740/* Record USE at DEF. */
741
742static void
1bfdbb29 743record_use (struct def *def, df_ref use)
5e962776 744{
5ed6ace5 745 struct use *u = XNEW (struct use);
5e962776 746
1bfdbb29
PB
747 u->pos = DF_REF_REAL_LOC (use);
748 u->insn = DF_REF_INSN (use);
749 u->addr_use_p = (DF_REF_TYPE (use) == DF_REF_REG_MEM_LOAD
3e807ffc 750 || DF_REF_TYPE (use) == DF_REF_REG_MEM_STORE);
5e962776
ZD
751 u->next = def->uses;
752 def->uses = u;
753 def->n_uses++;
1bfdbb29
PB
754 if (u->addr_use_p)
755 def->n_addr_uses++;
5e962776
ZD
756}
757
6fb5fa3c
DB
758/* Finds the invariants USE depends on and store them to the DEPENDS_ON
759 bitmap. Returns true if all dependencies of USE are known to be
b6c9b9bc 760 loop invariants, false otherwise. */
5e962776
ZD
761
762static bool
57512f53 763check_dependency (basic_block bb, df_ref use, bitmap depends_on)
5e962776 764{
57512f53 765 df_ref def;
6fb5fa3c 766 basic_block def_bb;
4d779342 767 struct df_link *defs;
5e962776 768 struct def *def_data;
1052bd54 769 struct invariant *inv;
b8698a0f 770
57512f53 771 if (DF_REF_FLAGS (use) & DF_REF_READ_WRITE)
6fb5fa3c 772 return false;
b8698a0f 773
6fb5fa3c
DB
774 defs = DF_REF_CHAIN (use);
775 if (!defs)
1a17bd35
EB
776 {
777 unsigned int regno = DF_REF_REGNO (use);
778
779 /* If this is the use of an uninitialized argument register that is
780 likely to be spilled, do not move it lest this might extend its
781 lifetime and cause reload to die. This can occur for a call to
782 a function taking complex number arguments and moving the insns
783 preparing the arguments without moving the call itself wouldn't
784 gain much in practice. */
785 if ((DF_REF_FLAGS (use) & DF_HARD_REG_LIVE)
786 && FUNCTION_ARG_REGNO_P (regno)
787 && targetm.class_likely_spilled_p (REGNO_REG_CLASS (regno)))
788 return false;
789
790 return true;
791 }
b8698a0f 792
6fb5fa3c
DB
793 if (defs->next)
794 return false;
b8698a0f 795
6fb5fa3c
DB
796 def = defs->ref;
797 check_invariant_table_size ();
c3284718 798 inv = invariant_table[DF_REF_ID (def)];
6fb5fa3c
DB
799 if (!inv)
800 return false;
b8698a0f 801
6fb5fa3c
DB
802 def_data = inv->def;
803 gcc_assert (def_data != NULL);
b8698a0f 804
6fb5fa3c
DB
805 def_bb = DF_REF_BB (def);
806 /* Note that in case bb == def_bb, we know that the definition
807 dominates insn, because def has invariant_table[DF_REF_ID(def)]
808 defined and we process the insns in the basic block bb
809 sequentially. */
810 if (!dominated_by_p (CDI_DOMINATORS, bb, def_bb))
811 return false;
b8698a0f 812
6fb5fa3c
DB
813 bitmap_set_bit (depends_on, def_data->invno);
814 return true;
815}
1052bd54 816
1052bd54 817
6fb5fa3c
DB
818/* Finds the invariants INSN depends on and store them to the DEPENDS_ON
819 bitmap. Returns true if all dependencies of INSN are known to be
820 loop invariants, false otherwise. */
5e962776 821
6fb5fa3c
DB
822static bool
823check_dependencies (rtx insn, bitmap depends_on)
824{
50e94c7e 825 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 826 df_ref use;
6fb5fa3c 827 basic_block bb = BLOCK_FOR_INSN (insn);
5e962776 828
bfac633a
RS
829 FOR_EACH_INSN_INFO_USE (use, insn_info)
830 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 831 return false;
bfac633a
RS
832 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
833 if (!check_dependency (bb, use, depends_on))
6fb5fa3c 834 return false;
b8698a0f 835
5e962776
ZD
836 return true;
837}
838
2c97f472
ZC
839/* Pre-check candidate DEST to skip the one which can not make a valid insn
840 during move_invariant_reg. SIMPLE is to skip HARD_REGISTER. */
841static bool
842pre_check_invariant_p (bool simple, rtx dest)
843{
844 if (simple && REG_P (dest) && DF_REG_DEF_COUNT (REGNO (dest)) > 1)
845 {
846 df_ref use;
847 rtx ref;
848 unsigned int i = REGNO (dest);
849 struct df_insn_info *insn_info;
850 df_ref def_rec;
851
852 for (use = DF_REG_USE_CHAIN (i); use; use = DF_REF_NEXT_REG (use))
853 {
854 ref = DF_REF_INSN (use);
855 insn_info = DF_INSN_INFO_GET (ref);
856
857 FOR_EACH_INSN_INFO_DEF (def_rec, insn_info)
858 if (DF_REF_REGNO (def_rec) == i)
859 {
860 /* Multi definitions at this stage, most likely are due to
861 instruction constraints, which requires both read and write
862 on the same register. Since move_invariant_reg is not
863 powerful enough to handle such cases, just ignore the INV
864 and leave the chance to others. */
865 return false;
866 }
867 }
868 }
869 return true;
870}
871
5e962776
ZD
872/* Finds invariant in INSN. ALWAYS_REACHED is true if the insn is always
873 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 874 unless the program ends due to a function call. */
5e962776
ZD
875
876static void
cb20f7e8 877find_invariant_insn (rtx insn, bool always_reached, bool always_executed)
5e962776 878{
57512f53 879 df_ref ref;
5e962776
ZD
880 struct def *def;
881 bitmap depends_on;
882 rtx set, dest;
883 bool simple = true;
1052bd54 884 struct invariant *inv;
5e962776 885
00f70f98
ZD
886#ifdef HAVE_cc0
887 /* We can't move a CC0 setter without the user. */
888 if (sets_cc0_p (insn))
889 return;
890#endif
891
5e962776
ZD
892 set = single_set (insn);
893 if (!set)
894 return;
895 dest = SET_DEST (set);
896
2ca202e7 897 if (!REG_P (dest)
5e962776
ZD
898 || HARD_REGISTER_P (dest))
899 simple = false;
900
2c97f472
ZC
901 if (!may_assign_reg_p (dest)
902 || !pre_check_invariant_p (simple, dest)
a7f4ccb1 903 || !check_maybe_invariant (SET_SRC (set)))
5e962776
ZD
904 return;
905
28749cfb
ZD
906 /* If the insn can throw exception, we cannot move it at all without changing
907 cfg. */
908 if (can_throw_internal (insn))
909 return;
5e962776 910
28749cfb 911 /* We cannot make trapping insn executed, unless it was executed before. */
48e8382e 912 if (may_trap_or_fault_p (PATTERN (insn)) && !always_reached)
28749cfb 913 return;
5e962776 914
8bdbfff5 915 depends_on = BITMAP_ALLOC (NULL);
cb20f7e8 916 if (!check_dependencies (insn, depends_on))
5e962776 917 {
8bdbfff5 918 BITMAP_FREE (depends_on);
5e962776
ZD
919 return;
920 }
921
922 if (simple)
5ed6ace5 923 def = XCNEW (struct def);
5e962776
ZD
924 else
925 def = NULL;
926
1052bd54
ZD
927 inv = create_new_invariant (def, insn, depends_on, always_executed);
928
929 if (simple)
930 {
6fb5fa3c
DB
931 ref = df_find_def (insn, dest);
932 check_invariant_table_size ();
c3284718 933 invariant_table[DF_REF_ID (ref)] = inv;
1052bd54 934 }
5e962776
ZD
935}
936
cb20f7e8 937/* Record registers used in INSN that have a unique invariant definition. */
5e962776
ZD
938
939static void
cb20f7e8 940record_uses (rtx insn)
5e962776 941{
50e94c7e 942 struct df_insn_info *insn_info = DF_INSN_INFO_GET (insn);
bfac633a 943 df_ref use;
1052bd54
ZD
944 struct invariant *inv;
945
bfac633a 946 FOR_EACH_INSN_INFO_USE (use, insn_info)
6fb5fa3c 947 {
6fb5fa3c
DB
948 inv = invariant_for_use (use);
949 if (inv)
1bfdbb29 950 record_use (inv->def, use);
6fb5fa3c 951 }
bfac633a 952 FOR_EACH_INSN_INFO_EQ_USE (use, insn_info)
5e962776 953 {
1052bd54
ZD
954 inv = invariant_for_use (use);
955 if (inv)
1bfdbb29 956 record_use (inv->def, use);
5e962776
ZD
957 }
958}
959
960/* Finds invariants in INSN. ALWAYS_REACHED is true if the insn is always
961 executed. ALWAYS_EXECUTED is true if the insn is always executed,
cb20f7e8 962 unless the program ends due to a function call. */
5e962776
ZD
963
964static void
cb20f7e8 965find_invariants_insn (rtx insn, bool always_reached, bool always_executed)
5e962776 966{
cb20f7e8
ZD
967 find_invariant_insn (insn, always_reached, always_executed);
968 record_uses (insn);
5e962776
ZD
969}
970
971/* Finds invariants in basic block BB. ALWAYS_REACHED is true if the
972 basic block is always executed. ALWAYS_EXECUTED is true if the basic
973 block is always executed, unless the program ends due to a function
cb20f7e8 974 call. */
5e962776
ZD
975
976static void
cb20f7e8 977find_invariants_bb (basic_block bb, bool always_reached, bool always_executed)
5e962776
ZD
978{
979 rtx insn;
980
981 FOR_BB_INSNS (bb, insn)
982 {
b5b8b0ac 983 if (!NONDEBUG_INSN_P (insn))
5e962776
ZD
984 continue;
985
cb20f7e8 986 find_invariants_insn (insn, always_reached, always_executed);
5e962776
ZD
987
988 if (always_reached
4b4bf941 989 && CALL_P (insn)
becfd6e5
KZ
990 && (RTL_LOOPING_CONST_OR_PURE_CALL_P (insn)
991 || ! RTL_CONST_OR_PURE_CALL_P (insn)))
5e962776
ZD
992 always_reached = false;
993 }
994}
995
996/* Finds invariants in LOOP with body BODY. ALWAYS_REACHED is the bitmap of
997 basic blocks in BODY that are always executed. ALWAYS_EXECUTED is the
998 bitmap of basic blocks in BODY that are always executed unless the program
cb20f7e8 999 ends due to a function call. */
5e962776
ZD
1000
1001static void
1002find_invariants_body (struct loop *loop, basic_block *body,
cb20f7e8 1003 bitmap always_reached, bitmap always_executed)
5e962776
ZD
1004{
1005 unsigned i;
1006
1007 for (i = 0; i < loop->num_nodes; i++)
1008 find_invariants_bb (body[i],
1009 bitmap_bit_p (always_reached, i),
cb20f7e8 1010 bitmap_bit_p (always_executed, i));
5e962776
ZD
1011}
1012
cb20f7e8 1013/* Finds invariants in LOOP. */
5e962776
ZD
1014
1015static void
cb20f7e8 1016find_invariants (struct loop *loop)
5e962776 1017{
8bdbfff5
NS
1018 bitmap may_exit = BITMAP_ALLOC (NULL);
1019 bitmap always_reached = BITMAP_ALLOC (NULL);
1020 bitmap has_exit = BITMAP_ALLOC (NULL);
1021 bitmap always_executed = BITMAP_ALLOC (NULL);
5e962776
ZD
1022 basic_block *body = get_loop_body_in_dom_order (loop);
1023
1024 find_exits (loop, body, may_exit, has_exit);
1025 compute_always_reached (loop, body, may_exit, always_reached);
1026 compute_always_reached (loop, body, has_exit, always_executed);
1027
7be64667 1028 find_defs (loop);
cb20f7e8 1029 find_invariants_body (loop, body, always_reached, always_executed);
1052bd54 1030 merge_identical_invariants ();
5e962776 1031
8bdbfff5
NS
1032 BITMAP_FREE (always_reached);
1033 BITMAP_FREE (always_executed);
1034 BITMAP_FREE (may_exit);
1035 BITMAP_FREE (has_exit);
5e962776
ZD
1036 free (body);
1037}
1038
1039/* Frees a list of uses USE. */
1040
1041static void
1042free_use_list (struct use *use)
1043{
1044 struct use *next;
1045
1046 for (; use; use = next)
1047 {
1048 next = use->next;
1049 free (use);
1050 }
1051}
1052
1756cb66 1053/* Return pressure class and number of hard registers (through *NREGS)
1833192f
VM
1054 for destination of INSN. */
1055static enum reg_class
1756cb66 1056get_pressure_class_and_nregs (rtx insn, int *nregs)
1833192f
VM
1057{
1058 rtx reg;
1756cb66 1059 enum reg_class pressure_class;
1833192f 1060 rtx set = single_set (insn);
b8698a0f 1061
1833192f
VM
1062 /* Considered invariant insns have only one set. */
1063 gcc_assert (set != NULL_RTX);
1064 reg = SET_DEST (set);
1065 if (GET_CODE (reg) == SUBREG)
1066 reg = SUBREG_REG (reg);
1067 if (MEM_P (reg))
1068 {
1069 *nregs = 0;
1756cb66 1070 pressure_class = NO_REGS;
1833192f
VM
1071 }
1072 else
1073 {
1074 if (! REG_P (reg))
1075 reg = NULL_RTX;
1076 if (reg == NULL_RTX)
1756cb66 1077 pressure_class = GENERAL_REGS;
1833192f 1078 else
1756cb66
VM
1079 {
1080 pressure_class = reg_allocno_class (REGNO (reg));
1081 pressure_class = ira_pressure_class_translate[pressure_class];
1082 }
1083 *nregs
1084 = ira_reg_class_max_nregs[pressure_class][GET_MODE (SET_SRC (set))];
1833192f 1085 }
1756cb66 1086 return pressure_class;
1833192f
VM
1087}
1088
5e962776
ZD
1089/* Calculates cost and number of registers needed for moving invariant INV
1090 out of the loop and stores them to *COST and *REGS_NEEDED. */
1091
1092static void
1093get_inv_cost (struct invariant *inv, int *comp_cost, unsigned *regs_needed)
1094{
1833192f
VM
1095 int i, acomp_cost;
1096 unsigned aregs_needed[N_REG_CLASSES];
5e962776
ZD
1097 unsigned depno;
1098 struct invariant *dep;
87c476a2 1099 bitmap_iterator bi;
5e962776 1100
1052bd54 1101 /* Find the representative of the class of the equivalent invariants. */
9771b263 1102 inv = invariants[inv->eqto];
1052bd54 1103
5e962776 1104 *comp_cost = 0;
1833192f
VM
1105 if (! flag_ira_loop_pressure)
1106 regs_needed[0] = 0;
1107 else
1108 {
1756cb66
VM
1109 for (i = 0; i < ira_pressure_classes_num; i++)
1110 regs_needed[ira_pressure_classes[i]] = 0;
1833192f
VM
1111 }
1112
5e962776
ZD
1113 if (inv->move
1114 || inv->stamp == actual_stamp)
1115 return;
1116 inv->stamp = actual_stamp;
1117
1833192f
VM
1118 if (! flag_ira_loop_pressure)
1119 regs_needed[0]++;
1120 else
1121 {
1122 int nregs;
1756cb66 1123 enum reg_class pressure_class;
1833192f 1124
1756cb66
VM
1125 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1126 regs_needed[pressure_class] += nregs;
1833192f
VM
1127 }
1128
1bfdbb29
PB
1129 if (!inv->cheap_address
1130 || inv->def->n_addr_uses < inv->def->n_uses)
1131 (*comp_cost) += inv->cost;
5e962776 1132
3d8504ac
RS
1133#ifdef STACK_REGS
1134 {
1135 /* Hoisting constant pool constants into stack regs may cost more than
1136 just single register. On x87, the balance is affected both by the
c0220ea4 1137 small number of FP registers, and by its register stack organization,
3d8504ac
RS
1138 that forces us to add compensation code in and around the loop to
1139 shuffle the operands to the top of stack before use, and pop them
1140 from the stack after the loop finishes.
1141
1142 To model this effect, we increase the number of registers needed for
1143 stack registers by two: one register push, and one register pop.
1144 This usually has the effect that FP constant loads from the constant
1145 pool are not moved out of the loop.
1146
1147 Note that this also means that dependent invariants can not be moved.
1148 However, the primary purpose of this pass is to move loop invariant
1149 address arithmetic out of loops, and address arithmetic that depends
1150 on floating point constants is unlikely to ever occur. */
1151 rtx set = single_set (inv->insn);
1152 if (set
1833192f
VM
1153 && IS_STACK_MODE (GET_MODE (SET_SRC (set)))
1154 && constant_pool_constant_p (SET_SRC (set)))
1155 {
1156 if (flag_ira_loop_pressure)
1756cb66 1157 regs_needed[ira_stack_reg_pressure_class] += 2;
1833192f
VM
1158 else
1159 regs_needed[0] += 2;
1160 }
3d8504ac
RS
1161 }
1162#endif
1163
87c476a2 1164 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, depno, bi)
5e962776 1165 {
1833192f
VM
1166 bool check_p;
1167
9771b263 1168 dep = invariants[depno];
5e962776 1169
61fc05c7
ZC
1170 /* If DEP is moved out of the loop, it is not a depends_on any more. */
1171 if (dep->move)
1172 continue;
1173
1833192f 1174 get_inv_cost (dep, &acomp_cost, aregs_needed);
5e962776 1175
1833192f
VM
1176 if (! flag_ira_loop_pressure)
1177 check_p = aregs_needed[0] != 0;
1178 else
1179 {
1756cb66
VM
1180 for (i = 0; i < ira_pressure_classes_num; i++)
1181 if (aregs_needed[ira_pressure_classes[i]] != 0)
1833192f 1182 break;
1756cb66 1183 check_p = i < ira_pressure_classes_num;
1833192f
VM
1184 }
1185 if (check_p
5e962776
ZD
1186 /* We need to check always_executed, since if the original value of
1187 the invariant may be preserved, we may need to keep it in a
1188 separate register. TODO check whether the register has an
1189 use outside of the loop. */
1190 && dep->always_executed
1191 && !dep->def->uses->next)
1192 {
1193 /* If this is a single use, after moving the dependency we will not
1194 need a new register. */
1833192f
VM
1195 if (! flag_ira_loop_pressure)
1196 aregs_needed[0]--;
1197 else
1198 {
1199 int nregs;
1756cb66 1200 enum reg_class pressure_class;
1833192f 1201
1756cb66
VM
1202 pressure_class = get_pressure_class_and_nregs (inv->insn, &nregs);
1203 aregs_needed[pressure_class] -= nregs;
1833192f 1204 }
5e962776
ZD
1205 }
1206
1833192f
VM
1207 if (! flag_ira_loop_pressure)
1208 regs_needed[0] += aregs_needed[0];
1209 else
1210 {
1756cb66
VM
1211 for (i = 0; i < ira_pressure_classes_num; i++)
1212 regs_needed[ira_pressure_classes[i]]
1213 += aregs_needed[ira_pressure_classes[i]];
1833192f 1214 }
5e962776 1215 (*comp_cost) += acomp_cost;
87c476a2 1216 }
5e962776
ZD
1217}
1218
1219/* Calculates gain for eliminating invariant INV. REGS_USED is the number
a154b43a
ZD
1220 of registers used in the loop, NEW_REGS is the number of new variables
1221 already added due to the invariant motion. The number of registers needed
bec922f0
SL
1222 for it is stored in *REGS_NEEDED. SPEED and CALL_P are flags passed
1223 through to estimate_reg_pressure_cost. */
5e962776
ZD
1224
1225static int
1226gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
bec922f0
SL
1227 unsigned *new_regs, unsigned regs_used,
1228 bool speed, bool call_p)
5e962776
ZD
1229{
1230 int comp_cost, size_cost;
1231
5e962776
ZD
1232 actual_stamp++;
1233
1833192f
VM
1234 get_inv_cost (inv, &comp_cost, regs_needed);
1235
1236 if (! flag_ira_loop_pressure)
1237 {
1238 size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
bec922f0 1239 regs_used, speed, call_p)
1833192f 1240 - estimate_reg_pressure_cost (new_regs[0],
bec922f0 1241 regs_used, speed, call_p));
1833192f
VM
1242 }
1243 else
1244 {
1245 int i;
1756cb66 1246 enum reg_class pressure_class;
1833192f 1247
1756cb66 1248 for (i = 0; i < ira_pressure_classes_num; i++)
1833192f 1249 {
1756cb66
VM
1250 pressure_class = ira_pressure_classes[i];
1251 if ((int) new_regs[pressure_class]
1252 + (int) regs_needed[pressure_class]
1253 + LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1833192f 1254 + IRA_LOOP_RESERVED_REGS
f508f827 1255 > ira_class_hard_regs_num[pressure_class])
1833192f
VM
1256 break;
1257 }
1756cb66 1258 if (i < ira_pressure_classes_num)
1833192f
VM
1259 /* There will be register pressure excess and we want not to
1260 make this loop invariant motion. All loop invariants with
1261 non-positive gains will be rejected in function
1262 find_invariants_to_move. Therefore we return the negative
1263 number here.
1264
1265 One could think that this rejects also expensive loop
1266 invariant motions and this will hurt code performance.
1267 However numerous experiments with different heuristics
1268 taking invariant cost into account did not confirm this
1269 assumption. There are possible explanations for this
1270 result:
1271 o probably all expensive invariants were already moved out
1272 of the loop by PRE and gimple invariant motion pass.
1273 o expensive invariant execution will be hidden by insn
1274 scheduling or OOO processor hardware because usually such
1275 invariants have a lot of freedom to be executed
1276 out-of-order.
1277 Another reason for ignoring invariant cost vs spilling cost
1278 heuristics is also in difficulties to evaluate accurately
1279 spill cost at this stage. */
1280 return -1;
1281 else
1282 size_cost = 0;
1283 }
5e962776
ZD
1284
1285 return comp_cost - size_cost;
1286}
1287
1288/* Finds invariant with best gain for moving. Returns the gain, stores
1289 the invariant in *BEST and number of registers needed for it to
a154b43a
ZD
1290 *REGS_NEEDED. REGS_USED is the number of registers used in the loop.
1291 NEW_REGS is the number of new variables already added due to invariant
1292 motion. */
5e962776
ZD
1293
1294static int
1295best_gain_for_invariant (struct invariant **best, unsigned *regs_needed,
bec922f0
SL
1296 unsigned *new_regs, unsigned regs_used,
1297 bool speed, bool call_p)
5e962776
ZD
1298{
1299 struct invariant *inv;
1833192f
VM
1300 int i, gain = 0, again;
1301 unsigned aregs_needed[N_REG_CLASSES], invno;
5e962776 1302
9771b263 1303 FOR_EACH_VEC_ELT (invariants, invno, inv)
5e962776 1304 {
5e962776
ZD
1305 if (inv->move)
1306 continue;
1307
1052bd54
ZD
1308 /* Only consider the "representatives" of equivalent invariants. */
1309 if (inv->eqto != inv->invno)
1310 continue;
1311
1833192f 1312 again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used,
bec922f0 1313 speed, call_p);
5e962776
ZD
1314 if (again > gain)
1315 {
1316 gain = again;
1317 *best = inv;
1833192f
VM
1318 if (! flag_ira_loop_pressure)
1319 regs_needed[0] = aregs_needed[0];
1320 else
1321 {
1756cb66
VM
1322 for (i = 0; i < ira_pressure_classes_num; i++)
1323 regs_needed[ira_pressure_classes[i]]
1324 = aregs_needed[ira_pressure_classes[i]];
1833192f 1325 }
5e962776
ZD
1326 }
1327 }
1328
1329 return gain;
1330}
1331
1332/* Marks invariant INVNO and all its dependencies for moving. */
1333
1334static void
1833192f 1335set_move_mark (unsigned invno, int gain)
5e962776 1336{
9771b263 1337 struct invariant *inv = invariants[invno];
87c476a2 1338 bitmap_iterator bi;
5e962776 1339
1052bd54 1340 /* Find the representative of the class of the equivalent invariants. */
9771b263 1341 inv = invariants[inv->eqto];
1052bd54 1342
5e962776
ZD
1343 if (inv->move)
1344 return;
1345 inv->move = true;
1346
1347 if (dump_file)
1833192f
VM
1348 {
1349 if (gain >= 0)
1350 fprintf (dump_file, "Decided to move invariant %d -- gain %d\n",
1351 invno, gain);
1352 else
1353 fprintf (dump_file, "Decided to move dependent invariant %d\n",
1354 invno);
1355 };
5e962776 1356
87c476a2
ZD
1357 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, invno, bi)
1358 {
1833192f 1359 set_move_mark (invno, -1);
87c476a2 1360 }
5e962776
ZD
1361}
1362
cb20f7e8 1363/* Determines which invariants to move. */
5e962776
ZD
1364
1365static void
bec922f0 1366find_invariants_to_move (bool speed, bool call_p)
5e962776 1367{
1833192f
VM
1368 int gain;
1369 unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES];
5e962776
ZD
1370 struct invariant *inv = NULL;
1371
9771b263 1372 if (!invariants.length ())
5e962776
ZD
1373 return;
1374
1833192f 1375 if (flag_ira_loop_pressure)
b8698a0f 1376 /* REGS_USED is actually never used when the flag is on. */
1833192f
VM
1377 regs_used = 0;
1378 else
1379 /* We do not really do a good job in estimating number of
1380 registers used; we put some initial bound here to stand for
1381 induction variables etc. that we do not detect. */
5e962776 1382 {
1833192f
VM
1383 unsigned int n_regs = DF_REG_SIZE (df);
1384
1385 regs_used = 2;
b8698a0f 1386
1833192f 1387 for (i = 0; i < n_regs; i++)
5e962776 1388 {
1833192f
VM
1389 if (!DF_REGNO_FIRST_DEF (i) && DF_REGNO_LAST_USE (i))
1390 {
1391 /* This is a value that is used but not changed inside loop. */
1392 regs_used++;
1393 }
5e962776
ZD
1394 }
1395 }
1396
1833192f
VM
1397 if (! flag_ira_loop_pressure)
1398 new_regs[0] = regs_needed[0] = 0;
1399 else
5e962776 1400 {
1756cb66
VM
1401 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1402 new_regs[ira_pressure_classes[i]] = 0;
1833192f
VM
1403 }
1404 while ((gain = best_gain_for_invariant (&inv, regs_needed,
bec922f0
SL
1405 new_regs, regs_used,
1406 speed, call_p)) > 0)
1833192f
VM
1407 {
1408 set_move_mark (inv->invno, gain);
1409 if (! flag_ira_loop_pressure)
1410 new_regs[0] += regs_needed[0];
1411 else
1412 {
1756cb66
VM
1413 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1414 new_regs[ira_pressure_classes[i]]
1415 += regs_needed[ira_pressure_classes[i]];
1833192f 1416 }
5e962776
ZD
1417 }
1418}
1419
43ba743c
EB
1420/* Replace the uses, reached by the definition of invariant INV, by REG.
1421
1422 IN_GROUP is nonzero if this is part of a group of changes that must be
1423 performed as a group. In that case, the changes will be stored. The
1424 function `apply_change_group' will validate and apply the changes. */
1425
1426static int
1427replace_uses (struct invariant *inv, rtx reg, bool in_group)
1428{
1429 /* Replace the uses we know to be dominated. It saves work for copy
1430 propagation, and also it is necessary so that dependent invariants
1431 are computed right. */
1432 if (inv->def)
1433 {
1434 struct use *use;
1435 for (use = inv->def->uses; use; use = use->next)
1436 validate_change (use->insn, use->pos, reg, true);
1437
1438 /* If we aren't part of a larger group, apply the changes now. */
1439 if (!in_group)
1440 return apply_change_group ();
1441 }
1442
1443 return 1;
1444}
1445
ba946209
ZD
1446/* Move invariant INVNO out of the LOOP. Returns true if this succeeds, false
1447 otherwise. */
1448
1449static bool
cb20f7e8 1450move_invariant_reg (struct loop *loop, unsigned invno)
5e962776 1451{
9771b263
DN
1452 struct invariant *inv = invariants[invno];
1453 struct invariant *repr = invariants[inv->eqto];
5e962776
ZD
1454 unsigned i;
1455 basic_block preheader = loop_preheader_edge (loop)->src;
90b1c344 1456 rtx reg, set, dest, note;
87c476a2 1457 bitmap_iterator bi;
43ba743c 1458 int regno = -1;
5e962776 1459
ba946209
ZD
1460 if (inv->reg)
1461 return true;
1462 if (!repr->move)
1463 return false;
43ba743c 1464
1052bd54
ZD
1465 /* If this is a representative of the class of equivalent invariants,
1466 really move the invariant. Otherwise just replace its use with
1467 the register used for the representative. */
1468 if (inv == repr)
5e962776 1469 {
1052bd54 1470 if (inv->depends_on)
5e962776 1471 {
1052bd54
ZD
1472 EXECUTE_IF_SET_IN_BITMAP (inv->depends_on, 0, i, bi)
1473 {
ba946209
ZD
1474 if (!move_invariant_reg (loop, i))
1475 goto fail;
1052bd54 1476 }
87c476a2 1477 }
5e962776 1478
1052bd54 1479 /* Move the set out of the loop. If the set is always executed (we could
43ba743c
EB
1480 omit this condition if we know that the register is unused outside of
1481 the loop, but it does not seem worth finding out) and it has no uses
1482 that would not be dominated by it, we may just move it (TODO).
1483 Otherwise we need to create a temporary register. */
1052bd54 1484 set = single_set (inv->insn);
1833192f
VM
1485 reg = dest = SET_DEST (set);
1486 if (GET_CODE (reg) == SUBREG)
1487 reg = SUBREG_REG (reg);
1488 if (REG_P (reg))
1489 regno = REGNO (reg);
1490
46b71b03 1491 reg = gen_reg_rtx_and_attrs (dest);
1052bd54 1492
90b1c344 1493 /* Try replacing the destination by a new pseudoregister. */
43ba743c
EB
1494 validate_change (inv->insn, &SET_DEST (set), reg, true);
1495
1496 /* As well as all the dominated uses. */
1497 replace_uses (inv, reg, true);
1498
1499 /* And validate all the changes. */
1500 if (!apply_change_group ())
90b1c344 1501 goto fail;
90b1c344
ZD
1502
1503 emit_insn_after (gen_move_insn (dest, reg), inv->insn);
1504 reorder_insns (inv->insn, inv->insn, BB_END (preheader));
1505
82fa5f8a
L
1506 /* If there is a REG_EQUAL note on the insn we just moved, and the
1507 insn is in a basic block that is not always executed or the note
1508 contains something for which we don't know the invariant status,
1509 the note may no longer be valid after we move the insn. Note that
1510 uses in REG_EQUAL notes are taken into account in the computation
1511 of invariants, so it is safe to retain the note even if it contains
1512 register references for which we know the invariant status. */
1513 if ((note = find_reg_note (inv->insn, REG_EQUAL, NULL_RTX))
1514 && (!inv->always_executed
1515 || !check_maybe_invariant (XEXP (note, 0))))
90b1c344 1516 remove_note (inv->insn, note);
b644b211
SB
1517 }
1518 else
1519 {
ba946209
ZD
1520 if (!move_invariant_reg (loop, repr->invno))
1521 goto fail;
1052bd54 1522 reg = repr->reg;
1833192f 1523 regno = repr->orig_regno;
43ba743c
EB
1524 if (!replace_uses (inv, reg, false))
1525 goto fail;
1052bd54 1526 set = single_set (inv->insn);
4d779342
DB
1527 emit_insn_after (gen_move_insn (SET_DEST (set), reg), inv->insn);
1528 delete_insn (inv->insn);
b644b211 1529 }
5e962776 1530
1052bd54 1531 inv->reg = reg;
1833192f 1532 inv->orig_regno = regno;
1052bd54 1533
ba946209
ZD
1534 return true;
1535
1536fail:
1537 /* If we failed, clear move flag, so that we do not try to move inv
1538 again. */
1539 if (dump_file)
1540 fprintf (dump_file, "Failed to move invariant %d\n", invno);
1541 inv->move = false;
1542 inv->reg = NULL_RTX;
1833192f 1543 inv->orig_regno = -1;
6fb5fa3c 1544
ba946209 1545 return false;
5e962776
ZD
1546}
1547
1548/* Move selected invariant out of the LOOP. Newly created regs are marked
cb20f7e8 1549 in TEMPORARY_REGS. */
5e962776
ZD
1550
1551static void
cb20f7e8 1552move_invariants (struct loop *loop)
5e962776
ZD
1553{
1554 struct invariant *inv;
1555 unsigned i;
1556
9771b263 1557 FOR_EACH_VEC_ELT (invariants, i, inv)
1052bd54 1558 move_invariant_reg (loop, i);
1833192f
VM
1559 if (flag_ira_loop_pressure && resize_reg_info ())
1560 {
9771b263 1561 FOR_EACH_VEC_ELT (invariants, i, inv)
1833192f
VM
1562 if (inv->reg != NULL_RTX)
1563 {
1564 if (inv->orig_regno >= 0)
1565 setup_reg_classes (REGNO (inv->reg),
1566 reg_preferred_class (inv->orig_regno),
1567 reg_alternate_class (inv->orig_regno),
1756cb66 1568 reg_allocno_class (inv->orig_regno));
1833192f
VM
1569 else
1570 setup_reg_classes (REGNO (inv->reg),
1571 GENERAL_REGS, NO_REGS, GENERAL_REGS);
1572 }
1573 }
5e962776
ZD
1574}
1575
1576/* Initializes invariant motion data. */
1577
1578static void
1579init_inv_motion_data (void)
1580{
1581 actual_stamp = 1;
1582
9771b263 1583 invariants.create (100);
5e962776
ZD
1584}
1585
cb20f7e8 1586/* Frees the data allocated by invariant motion. */
5e962776
ZD
1587
1588static void
cb20f7e8 1589free_inv_motion_data (void)
5e962776
ZD
1590{
1591 unsigned i;
1592 struct def *def;
1593 struct invariant *inv;
1594
6fb5fa3c
DB
1595 check_invariant_table_size ();
1596 for (i = 0; i < DF_DEFS_TABLE_SIZE (); i++)
5e962776 1597 {
6fb5fa3c
DB
1598 inv = invariant_table[i];
1599 if (inv)
1600 {
1601 def = inv->def;
1602 gcc_assert (def != NULL);
b8698a0f 1603
6fb5fa3c
DB
1604 free_use_list (def->uses);
1605 free (def);
1606 invariant_table[i] = NULL;
1607 }
5e962776
ZD
1608 }
1609
9771b263 1610 FOR_EACH_VEC_ELT (invariants, i, inv)
5e962776 1611 {
8bdbfff5 1612 BITMAP_FREE (inv->depends_on);
5e962776
ZD
1613 free (inv);
1614 }
9771b263 1615 invariants.release ();
5e962776
ZD
1616}
1617
cb20f7e8 1618/* Move the invariants out of the LOOP. */
5e962776
ZD
1619
1620static void
cb20f7e8 1621move_single_loop_invariants (struct loop *loop)
5e962776
ZD
1622{
1623 init_inv_motion_data ();
1624
cb20f7e8 1625 find_invariants (loop);
bec922f0
SL
1626 find_invariants_to_move (optimize_loop_for_speed_p (loop),
1627 LOOP_DATA (loop)->has_call);
cb20f7e8 1628 move_invariants (loop);
5e962776 1629
cb20f7e8 1630 free_inv_motion_data ();
5e962776
ZD
1631}
1632
1633/* Releases the auxiliary data for LOOP. */
1634
1635static void
1636free_loop_data (struct loop *loop)
1637{
1638 struct loop_data *data = LOOP_DATA (loop);
eb149440
RG
1639 if (!data)
1640 return;
5e962776 1641
1833192f
VM
1642 bitmap_clear (&LOOP_DATA (loop)->regs_ref);
1643 bitmap_clear (&LOOP_DATA (loop)->regs_live);
5e962776
ZD
1644 free (data);
1645 loop->aux = NULL;
1646}
1647
1833192f
VM
1648\f
1649
1650/* Registers currently living. */
1651static bitmap_head curr_regs_live;
1652
1756cb66 1653/* Current reg pressure for each pressure class. */
1833192f
VM
1654static int curr_reg_pressure[N_REG_CLASSES];
1655
1656/* Record all regs that are set in any one insn. Communication from
1657 mark_reg_{store,clobber} and global_conflicts. Asm can refer to
1658 all hard-registers. */
1659static rtx regs_set[(FIRST_PSEUDO_REGISTER > MAX_RECOG_OPERANDS
1660 ? FIRST_PSEUDO_REGISTER : MAX_RECOG_OPERANDS) * 2];
1661/* Number of regs stored in the previous array. */
1662static int n_regs_set;
1663
1756cb66 1664/* Return pressure class and number of needed hard registers (through
b8698a0f 1665 *NREGS) of register REGNO. */
1833192f 1666static enum reg_class
1756cb66 1667get_regno_pressure_class (int regno, int *nregs)
1833192f
VM
1668{
1669 if (regno >= FIRST_PSEUDO_REGISTER)
1670 {
1756cb66 1671 enum reg_class pressure_class;
1833192f 1672
1756cb66
VM
1673 pressure_class = reg_allocno_class (regno);
1674 pressure_class = ira_pressure_class_translate[pressure_class];
1675 *nregs
1676 = ira_reg_class_max_nregs[pressure_class][PSEUDO_REGNO_MODE (regno)];
1677 return pressure_class;
1833192f
VM
1678 }
1679 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)
1680 && ! TEST_HARD_REG_BIT (eliminable_regset, regno))
1681 {
1682 *nregs = 1;
1756cb66 1683 return ira_pressure_class_translate[REGNO_REG_CLASS (regno)];
1833192f
VM
1684 }
1685 else
1686 {
1687 *nregs = 0;
1688 return NO_REGS;
1689 }
1690}
1691
1692/* Increase (if INCR_P) or decrease current register pressure for
1693 register REGNO. */
1694static void
1695change_pressure (int regno, bool incr_p)
1696{
1697 int nregs;
1756cb66 1698 enum reg_class pressure_class;
1833192f 1699
1756cb66 1700 pressure_class = get_regno_pressure_class (regno, &nregs);
1833192f 1701 if (! incr_p)
1756cb66 1702 curr_reg_pressure[pressure_class] -= nregs;
1833192f
VM
1703 else
1704 {
1756cb66
VM
1705 curr_reg_pressure[pressure_class] += nregs;
1706 if (LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1707 < curr_reg_pressure[pressure_class])
1708 LOOP_DATA (curr_loop)->max_reg_pressure[pressure_class]
1709 = curr_reg_pressure[pressure_class];
1833192f
VM
1710 }
1711}
1712
1713/* Mark REGNO birth. */
1714static void
1715mark_regno_live (int regno)
1716{
1717 struct loop *loop;
1718
1719 for (loop = curr_loop;
1720 loop != current_loops->tree_root;
1721 loop = loop_outer (loop))
1722 bitmap_set_bit (&LOOP_DATA (loop)->regs_live, regno);
fcaa4ca4 1723 if (!bitmap_set_bit (&curr_regs_live, regno))
1833192f 1724 return;
1833192f
VM
1725 change_pressure (regno, true);
1726}
1727
1728/* Mark REGNO death. */
1729static void
1730mark_regno_death (int regno)
1731{
fcaa4ca4 1732 if (! bitmap_clear_bit (&curr_regs_live, regno))
1833192f 1733 return;
1833192f
VM
1734 change_pressure (regno, false);
1735}
1736
1737/* Mark setting register REG. */
1738static void
1739mark_reg_store (rtx reg, const_rtx setter ATTRIBUTE_UNUSED,
1740 void *data ATTRIBUTE_UNUSED)
1741{
1742 int regno;
1743
1744 if (GET_CODE (reg) == SUBREG)
1745 reg = SUBREG_REG (reg);
1746
1747 if (! REG_P (reg))
1748 return;
1749
1750 regs_set[n_regs_set++] = reg;
1751
1752 regno = REGNO (reg);
1753
1754 if (regno >= FIRST_PSEUDO_REGISTER)
1755 mark_regno_live (regno);
1756 else
1757 {
1758 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)];
1759
1760 while (regno < last)
1761 {
1762 mark_regno_live (regno);
1763 regno++;
1764 }
1765 }
1766}
1767
1768/* Mark clobbering register REG. */
1769static void
1770mark_reg_clobber (rtx reg, const_rtx setter, void *data)
1771{
1772 if (GET_CODE (setter) == CLOBBER)
1773 mark_reg_store (reg, setter, data);
1774}
1775
1776/* Mark register REG death. */
1777static void
1778mark_reg_death (rtx reg)
1779{
1780 int regno = REGNO (reg);
1781
1782 if (regno >= FIRST_PSEUDO_REGISTER)
1783 mark_regno_death (regno);
1784 else
1785 {
1786 int last = regno + hard_regno_nregs[regno][GET_MODE (reg)];
1787
1788 while (regno < last)
1789 {
1790 mark_regno_death (regno);
1791 regno++;
1792 }
1793 }
1794}
1795
1796/* Mark occurrence of registers in X for the current loop. */
1797static void
1798mark_ref_regs (rtx x)
1799{
1800 RTX_CODE code;
1801 int i;
1802 const char *fmt;
1803
1804 if (!x)
1805 return;
1806
1807 code = GET_CODE (x);
1808 if (code == REG)
1809 {
1810 struct loop *loop;
b8698a0f 1811
1833192f
VM
1812 for (loop = curr_loop;
1813 loop != current_loops->tree_root;
1814 loop = loop_outer (loop))
1815 bitmap_set_bit (&LOOP_DATA (loop)->regs_ref, REGNO (x));
1816 return;
1817 }
1818
1819 fmt = GET_RTX_FORMAT (code);
1820 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1821 if (fmt[i] == 'e')
1822 mark_ref_regs (XEXP (x, i));
1823 else if (fmt[i] == 'E')
1824 {
1825 int j;
b8698a0f 1826
1833192f
VM
1827 for (j = 0; j < XVECLEN (x, i); j++)
1828 mark_ref_regs (XVECEXP (x, i, j));
1829 }
1830}
1831
1832/* Calculate register pressure in the loops. */
1833static void
1834calculate_loop_reg_pressure (void)
1835{
1836 int i;
1837 unsigned int j;
1838 bitmap_iterator bi;
1839 basic_block bb;
1840 rtx insn, link;
1841 struct loop *loop, *parent;
1833192f 1842
f0bd40b1 1843 FOR_EACH_LOOP (loop, 0)
1833192f
VM
1844 if (loop->aux == NULL)
1845 {
1846 loop->aux = xcalloc (1, sizeof (struct loop_data));
1847 bitmap_initialize (&LOOP_DATA (loop)->regs_ref, &reg_obstack);
1848 bitmap_initialize (&LOOP_DATA (loop)->regs_live, &reg_obstack);
1849 }
8d49e7ef 1850 ira_setup_eliminable_regset ();
1833192f 1851 bitmap_initialize (&curr_regs_live, &reg_obstack);
11cd3bed 1852 FOR_EACH_BB_FN (bb, cfun)
1833192f
VM
1853 {
1854 curr_loop = bb->loop_father;
1855 if (curr_loop == current_loops->tree_root)
1856 continue;
1857
1858 for (loop = curr_loop;
1859 loop != current_loops->tree_root;
1860 loop = loop_outer (loop))
1861 bitmap_ior_into (&LOOP_DATA (loop)->regs_live, DF_LR_IN (bb));
1862
1863 bitmap_copy (&curr_regs_live, DF_LR_IN (bb));
1756cb66
VM
1864 for (i = 0; i < ira_pressure_classes_num; i++)
1865 curr_reg_pressure[ira_pressure_classes[i]] = 0;
1833192f
VM
1866 EXECUTE_IF_SET_IN_BITMAP (&curr_regs_live, 0, j, bi)
1867 change_pressure (j, true);
1868
1869 FOR_BB_INSNS (bb, insn)
1870 {
dd8c071d 1871 if (! NONDEBUG_INSN_P (insn))
1833192f
VM
1872 continue;
1873
1874 mark_ref_regs (PATTERN (insn));
1875 n_regs_set = 0;
1876 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
b8698a0f 1877
1833192f 1878 /* Mark any registers dead after INSN as dead now. */
b8698a0f 1879
1833192f
VM
1880 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1881 if (REG_NOTE_KIND (link) == REG_DEAD)
1882 mark_reg_death (XEXP (link, 0));
b8698a0f 1883
1833192f
VM
1884 /* Mark any registers set in INSN as live,
1885 and mark them as conflicting with all other live regs.
1886 Clobbers are processed again, so they conflict with
1887 the registers that are set. */
b8698a0f 1888
1833192f 1889 note_stores (PATTERN (insn), mark_reg_store, NULL);
b8698a0f 1890
1833192f
VM
1891#ifdef AUTO_INC_DEC
1892 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
1893 if (REG_NOTE_KIND (link) == REG_INC)
1894 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
1895#endif
1896 while (n_regs_set-- > 0)
1897 {
1898 rtx note = find_regno_note (insn, REG_UNUSED,
1899 REGNO (regs_set[n_regs_set]));
1900 if (! note)
1901 continue;
b8698a0f 1902
1833192f
VM
1903 mark_reg_death (XEXP (note, 0));
1904 }
1905 }
1906 }
1907 bitmap_clear (&curr_regs_live);
1908 if (flag_ira_region == IRA_REGION_MIXED
1909 || flag_ira_region == IRA_REGION_ALL)
f0bd40b1 1910 FOR_EACH_LOOP (loop, 0)
1833192f
VM
1911 {
1912 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
1913 if (! bitmap_bit_p (&LOOP_DATA (loop)->regs_ref, j))
1914 {
1756cb66 1915 enum reg_class pressure_class;
1833192f
VM
1916 int nregs;
1917
1756cb66
VM
1918 pressure_class = get_regno_pressure_class (j, &nregs);
1919 LOOP_DATA (loop)->max_reg_pressure[pressure_class] -= nregs;
1833192f
VM
1920 }
1921 }
1922 if (dump_file == NULL)
1923 return;
f0bd40b1 1924 FOR_EACH_LOOP (loop, 0)
1833192f
VM
1925 {
1926 parent = loop_outer (loop);
1927 fprintf (dump_file, "\n Loop %d (parent %d, header bb%d, depth %d)\n",
1928 loop->num, (parent == NULL ? -1 : parent->num),
1929 loop->header->index, loop_depth (loop));
1930 fprintf (dump_file, "\n ref. regnos:");
1931 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_ref, 0, j, bi)
1932 fprintf (dump_file, " %d", j);
1933 fprintf (dump_file, "\n live regnos:");
1934 EXECUTE_IF_SET_IN_BITMAP (&LOOP_DATA (loop)->regs_live, 0, j, bi)
1935 fprintf (dump_file, " %d", j);
1936 fprintf (dump_file, "\n Pressure:");
1756cb66 1937 for (i = 0; (int) i < ira_pressure_classes_num; i++)
1833192f 1938 {
1756cb66 1939 enum reg_class pressure_class;
b8698a0f 1940
1756cb66
VM
1941 pressure_class = ira_pressure_classes[i];
1942 if (LOOP_DATA (loop)->max_reg_pressure[pressure_class] == 0)
1833192f 1943 continue;
1756cb66
VM
1944 fprintf (dump_file, " %s=%d", reg_class_names[pressure_class],
1945 LOOP_DATA (loop)->max_reg_pressure[pressure_class]);
1833192f
VM
1946 }
1947 fprintf (dump_file, "\n");
1948 }
1949}
1950
1951\f
1952
d73be268 1953/* Move the invariants out of the loops. */
5e962776
ZD
1954
1955void
d73be268 1956move_loop_invariants (void)
5e962776
ZD
1957{
1958 struct loop *loop;
cb20f7e8 1959
1833192f
VM
1960 if (flag_ira_loop_pressure)
1961 {
1962 df_analyze ();
1756cb66 1963 regstat_init_n_sets_and_refs ();
b11f0116 1964 ira_set_pseudo_classes (true, dump_file);
1833192f 1965 calculate_loop_reg_pressure ();
1756cb66 1966 regstat_free_n_sets_and_refs ();
1833192f 1967 }
6fb5fa3c 1968 df_set_flags (DF_EQ_NOTES + DF_DEFER_INSN_RESCAN);
5e962776 1969 /* Process the loops, innermost first. */
f0bd40b1 1970 FOR_EACH_LOOP (loop, LI_FROM_INNERMOST)
5e962776 1971 {
1833192f 1972 curr_loop = loop;
b1fb9f56
JJ
1973 /* move_single_loop_invariants for very large loops
1974 is time consuming and might need a lot of memory. */
1975 if (loop->num_nodes <= (unsigned) LOOP_INVARIANT_MAX_BBS_IN_LOOP)
1976 move_single_loop_invariants (loop);
5e962776
ZD
1977 }
1978
f0bd40b1 1979 FOR_EACH_LOOP (loop, 0)
42fd6772
ZD
1980 {
1981 free_loop_data (loop);
1982 }
5e962776 1983
1833192f
VM
1984 if (flag_ira_loop_pressure)
1985 /* There is no sense to keep this info because it was most
1986 probably outdated by subsequent passes. */
1987 free_reg_info ();
6fb5fa3c
DB
1988 free (invariant_table);
1989 invariant_table = NULL;
1990 invariant_table_size = 0;
a7f4ccb1
SB
1991
1992#ifdef ENABLE_CHECKING
1993 verify_flow_info ();
1994#endif
5e962776 1995}
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