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15a63be1 1/* Optimize jump instructions, for GNU compiler.
c85f7c16 2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
15a63be1
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20
21
22/* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54#include "config.h"
670ee920 55#include "system.h"
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56#include "rtl.h"
57#include "flags.h"
58#include "hard-reg-set.h"
59#include "regs.h"
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60#include "insn-config.h"
61#include "insn-flags.h"
e9a25f70 62#include "recog.h"
3c86a619 63#include "expr.h"
15a63be1 64#include "real.h"
6adb4e3a 65#include "except.h"
2e107e9e 66#include "toplev.h"
15a63be1
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67
68/* ??? Eventually must record somehow the labels used by jumps
69 from nested functions. */
70/* Pre-record the next or previous real insn for each label?
71 No, this pass is very fast anyway. */
72/* Condense consecutive labels?
73 This would make life analysis faster, maybe. */
74/* Optimize jump y; x: ... y: jumpif... x?
75 Don't know if it is worth bothering with. */
76/* Optimize two cases of conditional jump to conditional jump?
77 This can never delete any instruction or make anything dead,
78 or even change what is live at any point.
79 So perhaps let combiner do it. */
80
81/* Vector indexed by uid.
82 For each CODE_LABEL, index by its uid to get first unconditional jump
83 that jumps to the label.
84 For each JUMP_INSN, index by its uid to get the next unconditional jump
85 that jumps to the same label.
86 Element 0 is the start of a chain of all return insns.
87 (It is safe to use element 0 because insn uid 0 is not used. */
88
89static rtx *jump_chain;
90
91/* List of labels referred to from initializers.
92 These can never be deleted. */
93rtx forced_labels;
94
95/* Maximum index in jump_chain. */
96
97static int max_jump_chain;
98
99/* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
101int can_reach_end;
102
103/* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
0f41302f 107 case. */
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108
109static int cross_jump_death_matters = 0;
110
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111static int duplicate_loop_exit_test PROTO((rtx));
112static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
113static void do_cross_jump PROTO((rtx, rtx, rtx));
114static int jump_back_p PROTO((rtx, rtx));
115static int tension_vector_labels PROTO((rtx, int));
116static void mark_jump_label PROTO((rtx, rtx, int));
117static void delete_computation PROTO((rtx));
118static void delete_from_jump_chain PROTO((rtx));
119static int delete_labelref_insn PROTO((rtx, rtx, int));
e009aaf3 120static void mark_modified_reg PROTO((rtx, rtx));
8cd2aff2 121static void redirect_tablejump PROTO((rtx, rtx));
7a87758d 122#ifndef HAVE_cc0
956d6950 123static rtx find_insert_position PROTO((rtx, rtx));
7a87758d 124#endif
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125\f
126/* Delete no-op jumps and optimize jumps to jumps
127 and jumps around jumps.
128 Delete unused labels and unreachable code.
129
130 If CROSS_JUMP is 1, detect matching code
131 before a jump and its destination and unify them.
132 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
133
134 If NOOP_MOVES is nonzero, delete no-op move insns.
135
136 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
137 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
138
139 If `optimize' is zero, don't change any code,
140 just determine whether control drops off the end of the function.
141 This case occurs when we have -W and not -O.
142 It works because `delete_insn' checks the value of `optimize'
143 and refrains from actually deleting when that is 0. */
144
145void
146jump_optimize (f, cross_jump, noop_moves, after_regscan)
147 rtx f;
148 int cross_jump;
149 int noop_moves;
150 int after_regscan;
151{
484c3924 152 register rtx insn, next, note;
15a63be1 153 int changed;
a87ef323 154 int old_max_reg;
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155 int first = 1;
156 int max_uid = 0;
157 rtx last_insn;
158
159 cross_jump_death_matters = (cross_jump == 2);
160
484c3924
RK
161 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
162 notes whose labels don't occur in the insn any more. */
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163
164 for (insn = f; insn; insn = NEXT_INSN (insn))
165 {
166 if (GET_CODE (insn) == CODE_LABEL)
167 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
168 else if (GET_CODE (insn) == JUMP_INSN)
169 JUMP_LABEL (insn) = 0;
484c3924
RK
170 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
171 for (note = REG_NOTES (insn); note; note = next)
172 {
173 next = XEXP (note, 1);
174 if (REG_NOTE_KIND (note) == REG_LABEL
175 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
176 remove_note (insn, note);
177 }
178
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RK
179 if (INSN_UID (insn) > max_uid)
180 max_uid = INSN_UID (insn);
181 }
182
183 max_uid++;
184
185 /* Delete insns following barriers, up to next label. */
186
187 for (insn = f; insn;)
188 {
189 if (GET_CODE (insn) == BARRIER)
190 {
191 insn = NEXT_INSN (insn);
192 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
193 {
194 if (GET_CODE (insn) == NOTE
195 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
196 insn = NEXT_INSN (insn);
197 else
198 insn = delete_insn (insn);
199 }
200 /* INSN is now the code_label. */
201 }
202 else
203 insn = NEXT_INSN (insn);
204 }
205
206 /* Leave some extra room for labels and duplicate exit test insns
207 we make. */
208 max_jump_chain = max_uid * 14 / 10;
209 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
4c9a05bc 210 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
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211
212 /* Mark the label each jump jumps to.
213 Combine consecutive labels, and count uses of labels.
214
215 For each label, make a chain (using `jump_chain')
216 of all the *unconditional* jumps that jump to it;
217 also make a chain of all returns. */
218
219 for (insn = f; insn; insn = NEXT_INSN (insn))
ac9b3c97 220 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
15a63be1
RK
221 {
222 mark_jump_label (PATTERN (insn), insn, cross_jump);
ac9b3c97 223 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
15a63be1
RK
224 {
225 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
226 {
227 jump_chain[INSN_UID (insn)]
228 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
229 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
230 }
231 if (GET_CODE (PATTERN (insn)) == RETURN)
232 {
233 jump_chain[INSN_UID (insn)] = jump_chain[0];
234 jump_chain[0] = insn;
235 }
236 }
237 }
238
239 /* Keep track of labels used from static data;
240 they cannot ever be deleted. */
241
242 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
243 LABEL_NUSES (XEXP (insn, 0))++;
244
6adb4e3a
MS
245 check_exception_handler_labels ();
246
247 /* Keep track of labels used for marking handlers for exception
248 regions; they cannot usually be deleted. */
249
250 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
251 LABEL_NUSES (XEXP (insn, 0))++;
252
253 exception_optimize ();
254
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RK
255 /* Delete all labels already not referenced.
256 Also find the last insn. */
257
258 last_insn = 0;
259 for (insn = f; insn; )
260 {
261 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
262 insn = delete_insn (insn);
263 else
264 {
265 last_insn = insn;
266 insn = NEXT_INSN (insn);
267 }
268 }
269
270 if (!optimize)
271 {
272 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
273 If so record that this function can drop off the end. */
274
275 insn = last_insn;
276 {
277 int n_labels = 1;
278 while (insn
279 /* One label can follow the end-note: the return label. */
280 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
281 /* Ordinary insns can follow it if returning a structure. */
282 || GET_CODE (insn) == INSN
283 /* If machine uses explicit RETURN insns, no epilogue,
284 then one of them follows the note. */
285 || (GET_CODE (insn) == JUMP_INSN
286 && GET_CODE (PATTERN (insn)) == RETURN)
60374599
DE
287 /* A barrier can follow the return insn. */
288 || GET_CODE (insn) == BARRIER
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289 /* Other kinds of notes can follow also. */
290 || (GET_CODE (insn) == NOTE
291 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
292 insn = PREV_INSN (insn);
293 }
294
295 /* Report if control can fall through at the end of the function. */
296 if (insn && GET_CODE (insn) == NOTE
297 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
298 && ! INSN_DELETED_P (insn))
299 can_reach_end = 1;
300
301 /* Zero the "deleted" flag of all the "deleted" insns. */
302 for (insn = f; insn; insn = NEXT_INSN (insn))
303 INSN_DELETED_P (insn) = 0;
81fc4f5c
JL
304
305 /* Show that the jump chain is not valid. */
306 jump_chain = 0;
15a63be1
RK
307 return;
308 }
309
310#ifdef HAVE_return
311 if (HAVE_return)
312 {
313 /* If we fall through to the epilogue, see if we can insert a RETURN insn
314 in front of it. If the machine allows it at this point (we might be
315 after reload for a leaf routine), it will improve optimization for it
316 to be there. */
317 insn = get_last_insn ();
318 while (insn && GET_CODE (insn) == NOTE)
319 insn = PREV_INSN (insn);
320
321 if (insn && GET_CODE (insn) != BARRIER)
322 {
323 emit_jump_insn (gen_return ());
324 emit_barrier ();
325 }
326 }
327#endif
328
329 if (noop_moves)
330 for (insn = f; insn; )
331 {
2156dfe3 332 next = NEXT_INSN (insn);
15a63be1
RK
333
334 if (GET_CODE (insn) == INSN)
335 {
336 register rtx body = PATTERN (insn);
337
338/* Combine stack_adjusts with following push_insns. */
339#ifdef PUSH_ROUNDING
340 if (GET_CODE (body) == SET
341 && SET_DEST (body) == stack_pointer_rtx
342 && GET_CODE (SET_SRC (body)) == PLUS
343 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
344 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
345 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
346 {
347 rtx p;
348 rtx stack_adjust_insn = insn;
349 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
350 int total_pushed = 0;
351 int pushes = 0;
352
353 /* Find all successive push insns. */
354 p = insn;
355 /* Don't convert more than three pushes;
356 that starts adding too many displaced addresses
357 and the whole thing starts becoming a losing
358 proposition. */
359 while (pushes < 3)
360 {
361 rtx pbody, dest;
362 p = next_nonnote_insn (p);
363 if (p == 0 || GET_CODE (p) != INSN)
364 break;
365 pbody = PATTERN (p);
366 if (GET_CODE (pbody) != SET)
367 break;
368 dest = SET_DEST (pbody);
369 /* Allow a no-op move between the adjust and the push. */
370 if (GET_CODE (dest) == REG
371 && GET_CODE (SET_SRC (pbody)) == REG
372 && REGNO (dest) == REGNO (SET_SRC (pbody)))
373 continue;
374 if (! (GET_CODE (dest) == MEM
375 && GET_CODE (XEXP (dest, 0)) == POST_INC
376 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
377 break;
378 pushes++;
1ad4c71a 379 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
15a63be1
RK
380 > stack_adjust_amount)
381 break;
1ad4c71a 382 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
15a63be1
RK
383 }
384
385 /* Discard the amount pushed from the stack adjust;
386 maybe eliminate it entirely. */
387 if (total_pushed >= stack_adjust_amount)
388 {
344a8220 389 delete_computation (stack_adjust_insn);
15a63be1
RK
390 total_pushed = stack_adjust_amount;
391 }
392 else
393 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
5f4f0e22 394 = GEN_INT (stack_adjust_amount - total_pushed);
15a63be1
RK
395
396 /* Change the appropriate push insns to ordinary stores. */
397 p = insn;
398 while (total_pushed > 0)
399 {
400 rtx pbody, dest;
401 p = next_nonnote_insn (p);
402 if (GET_CODE (p) != INSN)
403 break;
404 pbody = PATTERN (p);
689fcba8 405 if (GET_CODE (pbody) != SET)
15a63be1
RK
406 break;
407 dest = SET_DEST (pbody);
689fcba8
DM
408 /* Allow a no-op move between the adjust and the push. */
409 if (GET_CODE (dest) == REG
410 && GET_CODE (SET_SRC (pbody)) == REG
411 && REGNO (dest) == REGNO (SET_SRC (pbody)))
412 continue;
15a63be1
RK
413 if (! (GET_CODE (dest) == MEM
414 && GET_CODE (XEXP (dest, 0)) == POST_INC
415 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
416 break;
1ad4c71a 417 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
15a63be1
RK
418 /* If this push doesn't fully fit in the space
419 of the stack adjust that we deleted,
420 make another stack adjust here for what we
421 didn't use up. There should be peepholes
422 to recognize the resulting sequence of insns. */
423 if (total_pushed < 0)
424 {
425 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
5f4f0e22 426 GEN_INT (- total_pushed)),
15a63be1
RK
427 p);
428 break;
429 }
430 XEXP (dest, 0)
431 = plus_constant (stack_pointer_rtx, total_pushed);
432 }
433 }
434#endif
435
436 /* Detect and delete no-op move instructions
437 resulting from not allocating a parameter in a register. */
438
439 if (GET_CODE (body) == SET
440 && (SET_DEST (body) == SET_SRC (body)
441 || (GET_CODE (SET_DEST (body)) == MEM
442 && GET_CODE (SET_SRC (body)) == MEM
443 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
444 && ! (GET_CODE (SET_DEST (body)) == MEM
445 && MEM_VOLATILE_P (SET_DEST (body)))
446 && ! (GET_CODE (SET_SRC (body)) == MEM
447 && MEM_VOLATILE_P (SET_SRC (body))))
344a8220 448 delete_computation (insn);
15a63be1
RK
449
450 /* Detect and ignore no-op move instructions
451 resulting from smart or fortuitous register allocation. */
452
453 else if (GET_CODE (body) == SET)
454 {
455 int sreg = true_regnum (SET_SRC (body));
456 int dreg = true_regnum (SET_DEST (body));
457
458 if (sreg == dreg && sreg >= 0)
459 delete_insn (insn);
460 else if (sreg >= 0 && dreg >= 0)
461 {
462 rtx trial;
5f4f0e22
CH
463 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
464 sreg, NULL_PTR, dreg,
15a63be1
RK
465 GET_MODE (SET_SRC (body)));
466
db3cf6fb
MS
467 if (tem != 0
468 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
15a63be1
RK
469 {
470 /* DREG may have been the target of a REG_DEAD note in
471 the insn which makes INSN redundant. If so, reorg
472 would still think it is dead. So search for such a
473 note and delete it if we find it. */
59df2b2b
RK
474 if (! find_regno_note (insn, REG_UNUSED, dreg))
475 for (trial = prev_nonnote_insn (insn);
476 trial && GET_CODE (trial) != CODE_LABEL;
477 trial = prev_nonnote_insn (trial))
478 if (find_regno_note (trial, REG_DEAD, dreg))
479 {
480 remove_death (dreg, trial);
481 break;
482 }
483#ifdef PRESERVE_DEATH_INFO_REGNO_P
484 /* Deleting insn could lose a death-note for SREG
485 so don't do it if final needs accurate
486 death-notes. */
487 if (PRESERVE_DEATH_INFO_REGNO_P (sreg)
488 && (trial = find_regno_note (insn, REG_DEAD, sreg)))
489 {
490 /* Change this into a USE so that we won't emit
491 code for it, but still can keep the note. */
492 PATTERN (insn)
38a448ca 493 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
d8db8192 494 INSN_CODE (insn) = -1;
59df2b2b
RK
495 /* Remove all reg notes but the REG_DEAD one. */
496 REG_NOTES (insn) = trial;
497 XEXP (trial, 1) = NULL_RTX;
498 }
499 else
500#endif
15a63be1
RK
501 delete_insn (insn);
502 }
503 }
504 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
5f4f0e22
CH
505 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
506 NULL_PTR, 0,
507 GET_MODE (SET_DEST (body))))
15a63be1
RK
508 {
509 /* This handles the case where we have two consecutive
510 assignments of the same constant to pseudos that didn't
511 get a hard reg. Each SET from the constant will be
512 converted into a SET of the spill register and an
513 output reload will be made following it. This produces
514 two loads of the same constant into the same spill
515 register. */
516
517 rtx in_insn = insn;
518
519 /* Look back for a death note for the first reg.
520 If there is one, it is no longer accurate. */
521 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
522 {
523 if ((GET_CODE (in_insn) == INSN
524 || GET_CODE (in_insn) == JUMP_INSN)
525 && find_regno_note (in_insn, REG_DEAD, dreg))
526 {
527 remove_death (dreg, in_insn);
528 break;
529 }
530 in_insn = PREV_INSN (in_insn);
531 }
532
533 /* Delete the second load of the value. */
534 delete_insn (insn);
535 }
536 }
537 else if (GET_CODE (body) == PARALLEL)
538 {
539 /* If each part is a set between two identical registers or
0f41302f 540 a USE or CLOBBER, delete the insn. */
15a63be1
RK
541 int i, sreg, dreg;
542 rtx tem;
543
544 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
545 {
546 tem = XVECEXP (body, 0, i);
547 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
548 continue;
549
550 if (GET_CODE (tem) != SET
551 || (sreg = true_regnum (SET_SRC (tem))) < 0
552 || (dreg = true_regnum (SET_DEST (tem))) < 0
553 || dreg != sreg)
554 break;
555 }
556
557 if (i < 0)
558 delete_insn (insn);
559 }
15a63be1 560 /* Also delete insns to store bit fields if they are no-ops. */
f76b9db2
ILT
561 /* Not worth the hair to detect this in the big-endian case. */
562 else if (! BYTES_BIG_ENDIAN
563 && GET_CODE (body) == SET
15a63be1
RK
564 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
565 && XEXP (SET_DEST (body), 2) == const0_rtx
566 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
567 && ! (GET_CODE (SET_SRC (body)) == MEM
568 && MEM_VOLATILE_P (SET_SRC (body))))
569 delete_insn (insn);
15a63be1
RK
570 }
571 insn = next;
572 }
573
2156dfe3
RK
574 /* If we haven't yet gotten to reload and we have just run regscan,
575 delete any insn that sets a register that isn't used elsewhere.
576 This helps some of the optimizations below by having less insns
577 being jumped around. */
578
579 if (! reload_completed && after_regscan)
580 for (insn = f; insn; insn = next)
581 {
582 rtx set = single_set (insn);
583
584 next = NEXT_INSN (insn);
585
586 if (set && GET_CODE (SET_DEST (set)) == REG
587 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
b1f21e0a 588 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
b803fb99
RS
589 /* We use regno_last_note_uid so as not to delete the setting
590 of a reg that's used in notes. A subsequent optimization
591 might arrange to use that reg for real. */
b1f21e0a 592 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
d008e26c
RK
593 && ! side_effects_p (SET_SRC (set))
594 && ! find_reg_note (insn, REG_RETVAL, 0))
2156dfe3
RK
595 delete_insn (insn);
596 }
597
15a63be1
RK
598 /* Now iterate optimizing jumps until nothing changes over one pass. */
599 changed = 1;
a87ef323 600 old_max_reg = max_reg_num ();
15a63be1
RK
601 while (changed)
602 {
15a63be1
RK
603 changed = 0;
604
605 for (insn = f; insn; insn = next)
606 {
607 rtx reallabelprev;
2156dfe3 608 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
15a63be1 609 rtx nlabel;
c16ddde3 610 int this_is_simplejump, this_is_condjump, reversep = 0;
3480bb98 611 int this_is_condjump_in_parallel;
a87ef323 612
15a63be1
RK
613#if 0
614 /* If NOT the first iteration, if this is the last jump pass
615 (just before final), do the special peephole optimizations.
616 Avoiding the first iteration gives ordinary jump opts
617 a chance to work before peephole opts. */
618
619 if (reload_completed && !first && !flag_no_peephole)
620 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
621 peephole (insn);
622#endif
623
624 /* That could have deleted some insns after INSN, so check now
625 what the following insn is. */
626
627 next = NEXT_INSN (insn);
628
629 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
630 jump. Try to optimize by duplicating the loop exit test if so.
631 This is only safe immediately after regscan, because it uses
632 the values of regno_first_uid and regno_last_uid. */
633 if (after_regscan && GET_CODE (insn) == NOTE
634 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
635 && (temp1 = next_nonnote_insn (insn)) != 0
636 && simplejump_p (temp1))
637 {
638 temp = PREV_INSN (insn);
639 if (duplicate_loop_exit_test (insn))
640 {
641 changed = 1;
642 next = NEXT_INSN (temp);
643 continue;
644 }
645 }
646
647 if (GET_CODE (insn) != JUMP_INSN)
648 continue;
649
650 this_is_simplejump = simplejump_p (insn);
651 this_is_condjump = condjump_p (insn);
3480bb98 652 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
15a63be1
RK
653
654 /* Tension the labels in dispatch tables. */
655
656 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
657 changed |= tension_vector_labels (PATTERN (insn), 0);
658 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
659 changed |= tension_vector_labels (PATTERN (insn), 1);
660
661 /* If a dispatch table always goes to the same place,
662 get rid of it and replace the insn that uses it. */
663
664 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
665 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
666 {
667 int i;
668 rtx pat = PATTERN (insn);
669 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
670 int len = XVECLEN (pat, diff_vec_p);
671 rtx dispatch = prev_real_insn (insn);
672
673 for (i = 0; i < len; i++)
674 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
675 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
676 break;
677 if (i == len
0546e268 678 && dispatch != 0
15a63be1
RK
679 && GET_CODE (dispatch) == JUMP_INSN
680 && JUMP_LABEL (dispatch) != 0
681 /* Don't mess with a casesi insn. */
682 && !(GET_CODE (PATTERN (dispatch)) == SET
683 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
684 == IF_THEN_ELSE))
685 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
686 {
687 redirect_tablejump (dispatch,
688 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
689 changed = 1;
690 }
691 }
692
693 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
694
695 /* If a jump references the end of the function, try to turn
696 it into a RETURN insn, possibly a conditional one. */
697 if (JUMP_LABEL (insn)
8e318904
JL
698 && (next_active_insn (JUMP_LABEL (insn)) == 0
699 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
700 == RETURN))
5f4f0e22 701 changed |= redirect_jump (insn, NULL_RTX);
15a63be1
RK
702
703 /* Detect jump to following insn. */
704 if (reallabelprev == insn && condjump_p (insn))
705 {
cd423ead 706 next = next_real_insn (JUMP_LABEL (insn));
15a63be1
RK
707 delete_jump (insn);
708 changed = 1;
709 continue;
710 }
711
d45cf215 712 /* If we have an unconditional jump preceded by a USE, try to put
15a63be1
RK
713 the USE before the target and jump there. This simplifies many
714 of the optimizations below since we don't have to worry about
715 dealing with these USE insns. We only do this if the label
716 being branch to already has the identical USE or if code
717 never falls through to that label. */
718
719 if (this_is_simplejump
720 && (temp = prev_nonnote_insn (insn)) != 0
721 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
722 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
723 && (GET_CODE (temp1) == BARRIER
724 || (GET_CODE (temp1) == INSN
9740123d
JW
725 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
726 /* Don't do this optimization if we have a loop containing only
727 the USE instruction, and the loop start label has a usage
728 count of 1. This is because we will redo this optimization
729 everytime through the outer loop, and jump opt will never
730 exit. */
731 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
732 && temp2 == JUMP_LABEL (insn)
733 && LABEL_NUSES (temp2) == 1))
15a63be1
RK
734 {
735 if (GET_CODE (temp1) == BARRIER)
736 {
2156dfe3 737 emit_insn_after (PATTERN (temp), temp1);
15a63be1
RK
738 temp1 = NEXT_INSN (temp1);
739 }
15a63be1 740
2156dfe3 741 delete_insn (temp);
15a63be1
RK
742 redirect_jump (insn, get_label_before (temp1));
743 reallabelprev = prev_real_insn (temp1);
744 changed = 1;
745 }
746
747 /* Simplify if (...) x = a; else x = b; by converting it
748 to x = b; if (...) x = a;
749 if B is sufficiently simple, the test doesn't involve X,
750 and nothing in the test modifies B or X.
751
752 If we have small register classes, we also can't do this if X
753 is a hard register.
754
755 If the "x = b;" insn has any REG_NOTES, we don't do this because
756 of the possibility that we are running after CSE and there is a
757 REG_EQUAL note that is only valid if the branch has already been
758 taken. If we move the insn with the REG_EQUAL note, we may
759 fold the comparison to always be false in a later CSE pass.
760 (We could also delete the REG_NOTES when moving the insn, but it
761 seems simpler to not move it.) An exception is that we can move
762 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
763 value is the same as "b".
764
765 INSN is the branch over the `else' part.
766
767 We set:
768
d45cf215 769 TEMP to the jump insn preceding "x = a;"
15a63be1
RK
770 TEMP1 to X
771 TEMP2 to the insn that sets "x = b;"
2156dfe3
RK
772 TEMP3 to the insn that sets "x = a;"
773 TEMP4 to the set of "x = b"; */
15a63be1
RK
774
775 if (this_is_simplejump
776 && (temp3 = prev_active_insn (insn)) != 0
777 && GET_CODE (temp3) == INSN
2156dfe3
RK
778 && (temp4 = single_set (temp3)) != 0
779 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
f95182a4
ILT
780 && (! SMALL_REGISTER_CLASSES
781 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
15a63be1
RK
782 && (temp2 = next_active_insn (insn)) != 0
783 && GET_CODE (temp2) == INSN
2156dfe3
RK
784 && (temp4 = single_set (temp2)) != 0
785 && rtx_equal_p (SET_DEST (temp4), temp1)
0bef9b8d
RH
786 && ! side_effects_p (SET_SRC (temp4))
787 && ! may_trap_p (SET_SRC (temp4))
15a63be1
RK
788 && (REG_NOTES (temp2) == 0
789 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
790 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
791 && XEXP (REG_NOTES (temp2), 1) == 0
792 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
2156dfe3 793 SET_SRC (temp4))))
15a63be1
RK
794 && (temp = prev_active_insn (temp3)) != 0
795 && condjump_p (temp) && ! simplejump_p (temp)
796 /* TEMP must skip over the "x = a;" insn */
797 && prev_real_insn (JUMP_LABEL (temp)) == insn
798 && no_labels_between_p (insn, JUMP_LABEL (temp))
799 /* There must be no other entries to the "x = b;" insn. */
800 && no_labels_between_p (JUMP_LABEL (temp), temp2)
801 /* INSN must either branch to the insn after TEMP2 or the insn
802 after TEMP2 must branch to the same place as INSN. */
803 && (reallabelprev == temp2
2156dfe3
RK
804 || ((temp5 = next_active_insn (temp2)) != 0
805 && simplejump_p (temp5)
806 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
15a63be1
RK
807 {
808 /* The test expression, X, may be a complicated test with
809 multiple branches. See if we can find all the uses of
810 the label that TEMP branches to without hitting a CALL_INSN
811 or a jump to somewhere else. */
812 rtx target = JUMP_LABEL (temp);
813 int nuses = LABEL_NUSES (target);
51723711
KG
814 rtx p;
815#ifdef HAVE_cc0
816 rtx q;
817#endif
15a63be1
RK
818
819 /* Set P to the first jump insn that goes around "x = a;". */
820 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
821 {
822 if (GET_CODE (p) == JUMP_INSN)
823 {
824 if (condjump_p (p) && ! simplejump_p (p)
825 && JUMP_LABEL (p) == target)
826 {
827 nuses--;
828 if (nuses == 0)
829 break;
830 }
831 else
832 break;
833 }
834 else if (GET_CODE (p) == CALL_INSN)
835 break;
836 }
837
838#ifdef HAVE_cc0
839 /* We cannot insert anything between a set of cc and its use
840 so if P uses cc0, we must back up to the previous insn. */
841 q = prev_nonnote_insn (p);
842 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
843 && sets_cc0_p (PATTERN (q)))
844 p = q;
845#endif
846
847 if (p)
848 p = PREV_INSN (p);
849
850 /* If we found all the uses and there was no data conflict, we
851 can move the assignment unless we can branch into the middle
852 from somewhere. */
853 if (nuses == 0 && p
854 && no_labels_between_p (p, insn)
855 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
856 && ! reg_set_between_p (temp1, p, temp3)
2156dfe3 857 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
8127f74f
JW
858 || ! modified_between_p (SET_SRC (temp4), p, temp2))
859 /* Verify that registers used by the jump are not clobbered
860 by the instruction being moved. */
861 && ! modified_between_p (PATTERN (temp), temp2,
862 NEXT_INSN (temp2)))
15a63be1 863 {
2156dfe3
RK
864 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
865 delete_insn (temp2);
15a63be1
RK
866
867 /* Set NEXT to an insn that we know won't go away. */
868 next = next_active_insn (insn);
869
870 /* Delete the jump around the set. Note that we must do
871 this before we redirect the test jumps so that it won't
872 delete the code immediately following the assignment
873 we moved (which might be a jump). */
874
875 delete_insn (insn);
876
877 /* We either have two consecutive labels or a jump to
878 a jump, so adjust all the JUMP_INSNs to branch to where
879 INSN branches to. */
880 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
881 if (GET_CODE (p) == JUMP_INSN)
882 redirect_jump (p, target);
883
884 changed = 1;
885 continue;
886 }
887 }
888
66bd9361
JW
889 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
890 to x = a; if (...) goto l; x = b;
891 if A is sufficiently simple, the test doesn't involve X,
892 and nothing in the test modifies A or X.
893
894 If we have small register classes, we also can't do this if X
895 is a hard register.
896
897 If the "x = a;" insn has any REG_NOTES, we don't do this because
898 of the possibility that we are running after CSE and there is a
899 REG_EQUAL note that is only valid if the branch has already been
900 taken. If we move the insn with the REG_EQUAL note, we may
901 fold the comparison to always be false in a later CSE pass.
902 (We could also delete the REG_NOTES when moving the insn, but it
903 seems simpler to not move it.) An exception is that we can move
904 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
905 value is the same as "a".
906
907 INSN is the goto.
908
909 We set:
910
911 TEMP to the jump insn preceding "x = a;"
912 TEMP1 to X
913 TEMP2 to the insn that sets "x = b;"
914 TEMP3 to the insn that sets "x = a;"
915 TEMP4 to the set of "x = a"; */
916
917 if (this_is_simplejump
918 && (temp2 = next_active_insn (insn)) != 0
919 && GET_CODE (temp2) == INSN
920 && (temp4 = single_set (temp2)) != 0
921 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
f95182a4
ILT
922 && (! SMALL_REGISTER_CLASSES
923 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
66bd9361
JW
924 && (temp3 = prev_active_insn (insn)) != 0
925 && GET_CODE (temp3) == INSN
926 && (temp4 = single_set (temp3)) != 0
927 && rtx_equal_p (SET_DEST (temp4), temp1)
0bef9b8d
RH
928 && ! side_effects_p (SET_SRC (temp4))
929 && ! may_trap_p (SET_SRC (temp4))
66bd9361
JW
930 && (REG_NOTES (temp3) == 0
931 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
932 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
933 && XEXP (REG_NOTES (temp3), 1) == 0
934 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
935 SET_SRC (temp4))))
936 && (temp = prev_active_insn (temp3)) != 0
937 && condjump_p (temp) && ! simplejump_p (temp)
938 /* TEMP must skip over the "x = a;" insn */
939 && prev_real_insn (JUMP_LABEL (temp)) == insn
940 && no_labels_between_p (temp, insn))
941 {
942 rtx prev_label = JUMP_LABEL (temp);
943 rtx insert_after = prev_nonnote_insn (temp);
944
945#ifdef HAVE_cc0
946 /* We cannot insert anything between a set of cc and its use. */
947 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
948 && sets_cc0_p (PATTERN (insert_after)))
949 insert_after = prev_nonnote_insn (insert_after);
950#endif
951 ++LABEL_NUSES (prev_label);
952
953 if (insert_after
954 && no_labels_between_p (insert_after, temp)
7a7233ff 955 && ! reg_referenced_between_p (temp1, insert_after, temp3)
04bd0246
DE
956 && ! reg_referenced_between_p (temp1, temp3,
957 NEXT_INSN (temp2))
66bd9361 958 && ! reg_set_between_p (temp1, insert_after, temp)
0bef9b8d 959 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
8127f74f
JW
960 /* Verify that registers used by the jump are not clobbered
961 by the instruction being moved. */
962 && ! modified_between_p (PATTERN (temp), temp3,
963 NEXT_INSN (temp3))
66bd9361
JW
964 && invert_jump (temp, JUMP_LABEL (insn)))
965 {
966 emit_insn_after_with_line_notes (PATTERN (temp3),
967 insert_after, temp3);
968 delete_insn (temp3);
969 delete_insn (insn);
970 /* Set NEXT to an insn that we know won't go away. */
971 next = temp2;
972 changed = 1;
973 }
974 if (prev_label && --LABEL_NUSES (prev_label) == 0)
975 delete_insn (prev_label);
976 if (changed)
977 continue;
978 }
979
2156dfe3
RK
980#ifndef HAVE_cc0
981 /* If we have if (...) x = exp; and branches are expensive,
982 EXP is a single insn, does not have any side effects, cannot
983 trap, and is not too costly, convert this to
984 t = exp; if (...) x = t;
985
986 Don't do this when we have CC0 because it is unlikely to help
987 and we'd need to worry about where to place the new insn and
988 the potential for conflicts. We also can't do this when we have
989 notes on the insn for the same reason as above.
990
991 We set:
992
993 TEMP to the "x = exp;" insn.
f903b91f 994 TEMP1 to the single set in the "x = exp;" insn.
2156dfe3
RK
995 TEMP2 to "x". */
996
997 if (! reload_completed
998 && this_is_condjump && ! this_is_simplejump
999 && BRANCH_COST >= 3
1000 && (temp = next_nonnote_insn (insn)) != 0
a8fc41af 1001 && GET_CODE (temp) == INSN
2156dfe3
RK
1002 && REG_NOTES (temp) == 0
1003 && (reallabelprev == temp
1004 || ((temp2 = next_active_insn (temp)) != 0
1005 && simplejump_p (temp2)
1006 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1007 && (temp1 = single_set (temp)) != 0
1008 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
f95182a4
ILT
1009 && (! SMALL_REGISTER_CLASSES
1010 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
2156dfe3
RK
1011 && GET_CODE (SET_SRC (temp1)) != REG
1012 && GET_CODE (SET_SRC (temp1)) != SUBREG
1013 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1014 && ! side_effects_p (SET_SRC (temp1))
1015 && ! may_trap_p (SET_SRC (temp1))
97fa962f 1016 && rtx_cost (SET_SRC (temp1), SET) < 10)
2156dfe3
RK
1017 {
1018 rtx new = gen_reg_rtx (GET_MODE (temp2));
1019
956d6950
JL
1020 if ((temp3 = find_insert_position (insn, temp))
1021 && validate_change (temp, &SET_DEST (temp1), new, 0))
2156dfe3
RK
1022 {
1023 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1024 emit_insn_after_with_line_notes (PATTERN (temp),
956d6950 1025 PREV_INSN (temp3), temp);
2156dfe3 1026 delete_insn (temp);
5954c8a8 1027 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
f903b91f
DM
1028
1029 if (after_regscan)
1030 {
1031 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
1032 old_max_reg = max_reg_num ();
1033 }
2156dfe3
RK
1034 }
1035 }
1036
1037 /* Similarly, if it takes two insns to compute EXP but they
1038 have the same destination. Here TEMP3 will be the second
1039 insn and TEMP4 the SET from that insn. */
1040
1041 if (! reload_completed
1042 && this_is_condjump && ! this_is_simplejump
1043 && BRANCH_COST >= 4
1044 && (temp = next_nonnote_insn (insn)) != 0
a8fc41af 1045 && GET_CODE (temp) == INSN
2156dfe3
RK
1046 && REG_NOTES (temp) == 0
1047 && (temp3 = next_nonnote_insn (temp)) != 0
a8fc41af 1048 && GET_CODE (temp3) == INSN
2156dfe3
RK
1049 && REG_NOTES (temp3) == 0
1050 && (reallabelprev == temp3
1051 || ((temp2 = next_active_insn (temp3)) != 0
1052 && simplejump_p (temp2)
1053 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1054 && (temp1 = single_set (temp)) != 0
1055 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1056 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
f95182a4
ILT
1057 && (! SMALL_REGISTER_CLASSES
1058 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
2156dfe3
RK
1059 && ! side_effects_p (SET_SRC (temp1))
1060 && ! may_trap_p (SET_SRC (temp1))
97fa962f 1061 && rtx_cost (SET_SRC (temp1), SET) < 10
2156dfe3
RK
1062 && (temp4 = single_set (temp3)) != 0
1063 && rtx_equal_p (SET_DEST (temp4), temp2)
1064 && ! side_effects_p (SET_SRC (temp4))
1065 && ! may_trap_p (SET_SRC (temp4))
97fa962f 1066 && rtx_cost (SET_SRC (temp4), SET) < 10)
2156dfe3
RK
1067 {
1068 rtx new = gen_reg_rtx (GET_MODE (temp2));
1069
956d6950
JL
1070 if ((temp5 = find_insert_position (insn, temp))
1071 && (temp6 = find_insert_position (insn, temp3))
1072 && validate_change (temp, &SET_DEST (temp1), new, 0))
2156dfe3 1073 {
956d6950
JL
1074 /* Use the earliest of temp5 and temp6. */
1075 if (temp5 != insn)
1076 temp6 = temp5;
2156dfe3
RK
1077 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1078 emit_insn_after_with_line_notes (PATTERN (temp),
956d6950 1079 PREV_INSN (temp6), temp);
2156dfe3
RK
1080 emit_insn_after_with_line_notes
1081 (replace_rtx (PATTERN (temp3), temp2, new),
956d6950 1082 PREV_INSN (temp6), temp3);
2156dfe3
RK
1083 delete_insn (temp);
1084 delete_insn (temp3);
5954c8a8 1085 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
f903b91f
DM
1086
1087 if (after_regscan)
1088 {
1089 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1090 old_max_reg = max_reg_num ();
1091 }
2156dfe3
RK
1092 }
1093 }
1094
1095 /* Finally, handle the case where two insns are used to
1096 compute EXP but a temporary register is used. Here we must
0f41302f 1097 ensure that the temporary register is not used anywhere else. */
2156dfe3
RK
1098
1099 if (! reload_completed
1100 && after_regscan
1101 && this_is_condjump && ! this_is_simplejump
1102 && BRANCH_COST >= 4
1103 && (temp = next_nonnote_insn (insn)) != 0
a8fc41af 1104 && GET_CODE (temp) == INSN
2156dfe3
RK
1105 && REG_NOTES (temp) == 0
1106 && (temp3 = next_nonnote_insn (temp)) != 0
a8fc41af 1107 && GET_CODE (temp3) == INSN
2156dfe3
RK
1108 && REG_NOTES (temp3) == 0
1109 && (reallabelprev == temp3
1110 || ((temp2 = next_active_insn (temp3)) != 0
1111 && simplejump_p (temp2)
1112 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1113 && (temp1 = single_set (temp)) != 0
c03c4711
RK
1114 && (temp5 = SET_DEST (temp1),
1115 (GET_CODE (temp5) == REG
1116 || (GET_CODE (temp5) == SUBREG
1117 && (temp5 = SUBREG_REG (temp5),
1118 GET_CODE (temp5) == REG))))
2156dfe3 1119 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
b1f21e0a
MM
1120 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1121 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
2156dfe3
RK
1122 && ! side_effects_p (SET_SRC (temp1))
1123 && ! may_trap_p (SET_SRC (temp1))
97fa962f 1124 && rtx_cost (SET_SRC (temp1), SET) < 10
2156dfe3
RK
1125 && (temp4 = single_set (temp3)) != 0
1126 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1127 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
f95182a4
ILT
1128 && (! SMALL_REGISTER_CLASSES
1129 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
2156dfe3
RK
1130 && rtx_equal_p (SET_DEST (temp4), temp2)
1131 && ! side_effects_p (SET_SRC (temp4))
1132 && ! may_trap_p (SET_SRC (temp4))
97fa962f 1133 && rtx_cost (SET_SRC (temp4), SET) < 10)
2156dfe3
RK
1134 {
1135 rtx new = gen_reg_rtx (GET_MODE (temp2));
1136
956d6950
JL
1137 if ((temp5 = find_insert_position (insn, temp))
1138 && (temp6 = find_insert_position (insn, temp3))
1139 && validate_change (temp3, &SET_DEST (temp4), new, 0))
2156dfe3 1140 {
956d6950
JL
1141 /* Use the earliest of temp5 and temp6. */
1142 if (temp5 != insn)
1143 temp6 = temp5;
2156dfe3
RK
1144 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1145 emit_insn_after_with_line_notes (PATTERN (temp),
956d6950 1146 PREV_INSN (temp6), temp);
2156dfe3 1147 emit_insn_after_with_line_notes (PATTERN (temp3),
956d6950 1148 PREV_INSN (temp6), temp3);
2156dfe3
RK
1149 delete_insn (temp);
1150 delete_insn (temp3);
5954c8a8 1151 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
f903b91f
DM
1152
1153 if (after_regscan)
1154 {
1155 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1156 old_max_reg = max_reg_num ();
1157 }
2156dfe3
RK
1158 }
1159 }
1160#endif /* HAVE_cc0 */
1161
7209f1f9
DE
1162 /* Try to use a conditional move (if the target has them), or a
1163 store-flag insn. The general case is:
1164
1165 1) x = a; if (...) x = b; and
1166 2) if (...) x = b;
1167
1168 If the jump would be faster, the machine should not have defined
1169 the movcc or scc insns!. These cases are often made by the
3915de94 1170 previous optimization.
15a63be1 1171
7209f1f9
DE
1172 The second case is treated as x = x; if (...) x = b;.
1173
15a63be1
RK
1174 INSN here is the jump around the store. We set:
1175
1176 TEMP to the "x = b;" insn.
1177 TEMP1 to X.
7209f1f9 1178 TEMP2 to B.
15a63be1
RK
1179 TEMP3 to A (X in the second case).
1180 TEMP4 to the condition being tested.
1181 TEMP5 to the earliest insn used to find the condition. */
1182
1183 if (/* We can't do this after reload has completed. */
1184 ! reload_completed
1185 && this_is_condjump && ! this_is_simplejump
1186 /* Set TEMP to the "x = b;" insn. */
1187 && (temp = next_nonnote_insn (insn)) != 0
1188 && GET_CODE (temp) == INSN
1189 && GET_CODE (PATTERN (temp)) == SET
1190 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
f95182a4
ILT
1191 && (! SMALL_REGISTER_CLASSES
1192 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
0bef9b8d
RH
1193 && ! side_effects_p (temp2 = SET_SRC (PATTERN (temp)))
1194 && ! may_trap_p (temp2)
2156dfe3
RK
1195 /* Allow either form, but prefer the former if both apply.
1196 There is no point in using the old value of TEMP1 if
1197 it is a register, since cse will alias them. It can
1198 lose if the old value were a hard register since CSE
c85f7c16
JL
1199 won't replace hard registers. Avoid using TEMP3 if
1200 small register classes and it is a hard register. */
1201 && (((temp3 = reg_set_last (temp1, insn)) != 0
1202 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1203 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
7209f1f9
DE
1204 /* Make the latter case look like x = x; if (...) x = b; */
1205 || (temp3 = temp1, 1))
15a63be1
RK
1206 /* INSN must either branch to the insn after TEMP or the insn
1207 after TEMP must branch to the same place as INSN. */
1208 && (reallabelprev == temp
1209 || ((temp4 = next_active_insn (temp)) != 0
1210 && simplejump_p (temp4)
1211 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1212 && (temp4 = get_condition (insn, &temp5)) != 0
7124e1e5
RS
1213 /* We must be comparing objects whose modes imply the size.
1214 We could handle BLKmode if (1) emit_store_flag could
1215 and (2) we could find the size reliably. */
1216 && GET_MODE (XEXP (temp4, 0)) != BLKmode
04d23d7c
RK
1217 /* Even if branches are cheap, the store_flag optimization
1218 can win when the operation to be performed can be
1219 expressed directly. */
2156dfe3
RK
1220#ifdef HAVE_cc0
1221 /* If the previous insn sets CC0 and something else, we can't
1222 do this since we are going to delete that insn. */
1223
1224 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1225 && GET_CODE (temp6) == INSN
01ca1b91
RK
1226 && (sets_cc0_p (PATTERN (temp6)) == -1
1227 || (sets_cc0_p (PATTERN (temp6)) == 1
1228 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
2156dfe3
RK
1229#endif
1230 )
15a63be1 1231 {
7209f1f9
DE
1232#ifdef HAVE_conditional_move
1233 /* First try a conditional move. */
1234 {
1235 enum rtx_code code = GET_CODE (temp4);
1236 rtx var = temp1;
1237 rtx cond0, cond1, aval, bval;
1238 rtx target;
1239
1240 /* Copy the compared variables into cond0 and cond1, so that
1241 any side effects performed in or after the old comparison,
1242 will not affect our compare which will come later. */
1243 /* ??? Is it possible to just use the comparison in the jump
1244 insn? After all, we're going to delete it. We'd have
1245 to modify emit_conditional_move to take a comparison rtx
1246 instead or write a new function. */
1247 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1248 /* We want the target to be able to simplify comparisons with
1249 zero (and maybe other constants as well), so don't create
1250 pseudos for them. There's no need to either. */
1251 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1252 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1253 cond1 = XEXP (temp4, 1);
1254 else
1255 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1256
1257 aval = temp3;
1258 bval = temp2;
1259
1260 start_sequence ();
1261 target = emit_conditional_move (var, code,
1262 cond0, cond1, VOIDmode,
1263 aval, bval, GET_MODE (var),
1264 (code == LTU || code == GEU
1265 || code == LEU || code == GTU));
1266
1267 if (target)
1268 {
f903b91f 1269 rtx seq1,seq2,last;
7209f1f9
DE
1270
1271 /* Save the conditional move sequence but don't emit it
1272 yet. On some machines, like the alpha, it is possible
1273 that temp5 == insn, so next generate the sequence that
1274 saves the compared values and then emit both
1275 sequences ensuring seq1 occurs before seq2. */
1276 seq2 = get_insns ();
1277 end_sequence ();
1278
1279 /* Now that we can't fail, generate the copy insns that
1280 preserve the compared values. */
1281 start_sequence ();
1282 emit_move_insn (cond0, XEXP (temp4, 0));
1283 if (cond1 != XEXP (temp4, 1))
1284 emit_move_insn (cond1, XEXP (temp4, 1));
1285 seq1 = get_insns ();
1286 end_sequence ();
1287
1288 emit_insns_before (seq1, temp5);
777e434c
RK
1289 /* Insert conditional move after insn, to be sure that
1290 the jump and a possible compare won't be separated */
f903b91f 1291 last = emit_insns_after (seq2, insn);
7209f1f9
DE
1292
1293 /* ??? We can also delete the insn that sets X to A.
1294 Flow will do it too though. */
1295 delete_insn (temp);
1296 next = NEXT_INSN (insn);
1297 delete_jump (insn);
f903b91f
DM
1298
1299 if (after_regscan)
1300 {
1301 reg_scan_update (seq1, NEXT_INSN (last), old_max_reg);
1302 old_max_reg = max_reg_num ();
1303 }
1304
7209f1f9
DE
1305 changed = 1;
1306 continue;
1307 }
1308 else
2156dfe3 1309 end_sequence ();
7209f1f9
DE
1310 }
1311#endif
2156dfe3 1312
7209f1f9
DE
1313 /* That didn't work, try a store-flag insn.
1314
1315 We further divide the cases into:
1316
1317 1) x = a; if (...) x = b; and either A or B is zero,
1318 2) if (...) x = 0; and jumps are expensive,
1319 3) x = a; if (...) x = b; and A and B are constants where all
1320 the set bits in A are also set in B and jumps are expensive,
1321 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1322 more expensive, and
1323 5) if (...) x = b; if jumps are even more expensive. */
1324
1325 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1326 && ((GET_CODE (temp3) == CONST_INT)
1327 /* Make the latter case look like
1328 x = x; if (...) x = 0; */
1329 || (temp3 = temp1,
1330 ((BRANCH_COST >= 2
1331 && temp2 == const0_rtx)
1332 || BRANCH_COST >= 3)))
1333 /* If B is zero, OK; if A is zero, can only do (1) if we
1334 can reverse the condition. See if (3) applies possibly
1335 by reversing the condition. Prefer reversing to (4) when
1336 branches are very expensive. */
04d23d7c
RK
1337 && (((BRANCH_COST >= 2
1338 || STORE_FLAG_VALUE == -1
1339 || (STORE_FLAG_VALUE == 1
1340 /* Check that the mask is a power of two,
1341 so that it can probably be generated
1342 with a shift. */
702d7434 1343 && GET_CODE (temp3) == CONST_INT
04d23d7c
RK
1344 && exact_log2 (INTVAL (temp3)) >= 0))
1345 && (reversep = 0, temp2 == const0_rtx))
1346 || ((BRANCH_COST >= 2
1347 || STORE_FLAG_VALUE == -1
1348 || (STORE_FLAG_VALUE == 1
702d7434 1349 && GET_CODE (temp2) == CONST_INT
04d23d7c
RK
1350 && exact_log2 (INTVAL (temp2)) >= 0))
1351 && temp3 == const0_rtx
7209f1f9
DE
1352 && (reversep = can_reverse_comparison_p (temp4, insn)))
1353 || (BRANCH_COST >= 2
1354 && GET_CODE (temp2) == CONST_INT
1355 && GET_CODE (temp3) == CONST_INT
1356 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1357 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1358 && (reversep = can_reverse_comparison_p (temp4,
1359 insn)))))
1360 || BRANCH_COST >= 3)
1361 )
1362 {
1363 enum rtx_code code = GET_CODE (temp4);
1364 rtx uval, cval, var = temp1;
1365 int normalizep;
1366 rtx target;
1367
1368 /* If necessary, reverse the condition. */
1369 if (reversep)
1370 code = reverse_condition (code), uval = temp2, cval = temp3;
1371 else
1372 uval = temp3, cval = temp2;
1373
1374 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1375 is the constant 1, it is best to just compute the result
1376 directly. If UVAL is constant and STORE_FLAG_VALUE
1377 includes all of its bits, it is best to compute the flag
1378 value unnormalized and `and' it with UVAL. Otherwise,
1379 normalize to -1 and `and' with UVAL. */
1380 normalizep = (cval != const0_rtx ? -1
1381 : (uval == const1_rtx ? 1
1382 : (GET_CODE (uval) == CONST_INT
1383 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1384 ? 0 : -1));
1385
1386 /* We will be putting the store-flag insn immediately in
1387 front of the comparison that was originally being done,
1388 so we know all the variables in TEMP4 will be valid.
1389 However, this might be in front of the assignment of
1390 A to VAR. If it is, it would clobber the store-flag
1391 we will be emitting.
1392
1393 Therefore, emit into a temporary which will be copied to
1394 VAR immediately after TEMP. */
2156dfe3
RK
1395
1396 start_sequence ();
7209f1f9
DE
1397 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1398 XEXP (temp4, 0), XEXP (temp4, 1),
1399 VOIDmode,
1400 (code == LTU || code == LEU
1401 || code == GEU || code == GTU),
1402 normalizep);
1403 if (target)
3915de94 1404 {
7209f1f9
DE
1405 rtx seq;
1406 rtx before = insn;
3915de94 1407
7209f1f9
DE
1408 seq = get_insns ();
1409 end_sequence ();
3915de94 1410
7209f1f9
DE
1411 /* Put the store-flag insns in front of the first insn
1412 used to compute the condition to ensure that we
1413 use the same values of them as the current
1414 comparison. However, the remainder of the insns we
1415 generate will be placed directly in front of the
1416 jump insn, in case any of the pseudos we use
1417 are modified earlier. */
3915de94 1418
7209f1f9 1419 emit_insns_before (seq, temp5);
3915de94 1420
7209f1f9
DE
1421 start_sequence ();
1422
1423 /* Both CVAL and UVAL are non-zero. */
1424 if (cval != const0_rtx && uval != const0_rtx)
c71ebae3 1425 {
7209f1f9
DE
1426 rtx tem1, tem2;
1427
1428 tem1 = expand_and (uval, target, NULL_RTX);
1429 if (GET_CODE (cval) == CONST_INT
1430 && GET_CODE (uval) == CONST_INT
1431 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1432 tem2 = cval;
1433 else
1434 {
1435 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1436 target, NULL_RTX, 0);
1437 tem2 = expand_and (cval, tem2,
1438 (GET_CODE (tem2) == REG
1439 ? tem2 : 0));
1440 }
1441
1442 /* If we usually make new pseudos, do so here. This
1443 turns out to help machines that have conditional
1444 move insns. */
1445 /* ??? Conditional moves have already been handled.
1446 This may be obsolete. */
1447
1448 if (flag_expensive_optimizations)
1449 target = 0;
1450
1451 target = expand_binop (GET_MODE (var), ior_optab,
1452 tem1, tem2, target,
1453 1, OPTAB_WIDEN);
c71ebae3 1454 }
7209f1f9
DE
1455 else if (normalizep != 1)
1456 {
1457 /* We know that either CVAL or UVAL is zero. If
1458 UVAL is zero, negate TARGET and `and' with CVAL.
1459 Otherwise, `and' with UVAL. */
1460 if (uval == const0_rtx)
1461 {
1462 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1463 target, NULL_RTX, 0);
1464 uval = cval;
1465 }
c71ebae3 1466
7209f1f9
DE
1467 target = expand_and (uval, target,
1468 (GET_CODE (target) == REG
1469 && ! preserve_subexpressions_p ()
1470 ? target : NULL_RTX));
1471 }
3915de94 1472
7209f1f9
DE
1473 emit_move_insn (var, target);
1474 seq = get_insns ();
1475 end_sequence ();
01ca1b91 1476#ifdef HAVE_cc0
7209f1f9
DE
1477 /* If INSN uses CC0, we must not separate it from the
1478 insn that sets cc0. */
1479 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1480 before = prev_nonnote_insn (before);
01ca1b91 1481#endif
7209f1f9 1482 emit_insns_before (seq, before);
01ca1b91 1483
7209f1f9
DE
1484 delete_insn (temp);
1485 next = NEXT_INSN (insn);
1486 delete_jump (insn);
f903b91f
DM
1487
1488 if (after_regscan)
1489 {
1490 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1491 old_max_reg = max_reg_num ();
1492 }
1493
7209f1f9
DE
1494 changed = 1;
1495 continue;
1496 }
1497 else
1498 end_sequence ();
15a63be1 1499 }
15a63be1
RK
1500 }
1501
1502 /* If branches are expensive, convert
1503 if (foo) bar++; to bar += (foo != 0);
1504 and similarly for "bar--;"
1505
1506 INSN is the conditional branch around the arithmetic. We set:
1507
1508 TEMP is the arithmetic insn.
6dc42e49 1509 TEMP1 is the SET doing the arithmetic.
15a63be1
RK
1510 TEMP2 is the operand being incremented or decremented.
1511 TEMP3 to the condition being tested.
1512 TEMP4 to the earliest insn used to find the condition. */
1513
a8d916d3 1514 if ((BRANCH_COST >= 2
48f16828 1515#ifdef HAVE_incscc
a8d916d3 1516 || HAVE_incscc
48f16828
RK
1517#endif
1518#ifdef HAVE_decscc
d3907945 1519 || HAVE_decscc
a8d916d3
JL
1520#endif
1521 )
15a63be1
RK
1522 && ! reload_completed
1523 && this_is_condjump && ! this_is_simplejump
1524 && (temp = next_nonnote_insn (insn)) != 0
1525 && (temp1 = single_set (temp)) != 0
1526 && (temp2 = SET_DEST (temp1),
1527 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1528 && GET_CODE (SET_SRC (temp1)) == PLUS
1529 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1530 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1531 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
8743ede9
RK
1532 && ! side_effects_p (temp2)
1533 && ! may_trap_p (temp2)
15a63be1
RK
1534 /* INSN must either branch to the insn after TEMP or the insn
1535 after TEMP must branch to the same place as INSN. */
1536 && (reallabelprev == temp
1537 || ((temp3 = next_active_insn (temp)) != 0
1538 && simplejump_p (temp3)
1539 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1540 && (temp3 = get_condition (insn, &temp4)) != 0
7124e1e5
RS
1541 /* We must be comparing objects whose modes imply the size.
1542 We could handle BLKmode if (1) emit_store_flag could
1543 and (2) we could find the size reliably. */
1544 && GET_MODE (XEXP (temp3, 0)) != BLKmode
15a63be1
RK
1545 && can_reverse_comparison_p (temp3, insn))
1546 {
626d0d1d 1547 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
15a63be1
RK
1548 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1549
1550 start_sequence ();
1551
626d0d1d
RK
1552 /* It must be the case that TEMP2 is not modified in the range
1553 [TEMP4, INSN). The one exception we make is if the insn
1554 before INSN sets TEMP2 to something which is also unchanged
1555 in that range. In that case, we can move the initialization
1556 into our sequence. */
1557
1558 if ((temp5 = prev_active_insn (insn)) != 0
19f5ce60 1559 && no_labels_between_p (temp5, insn)
626d0d1d
RK
1560 && GET_CODE (temp5) == INSN
1561 && (temp6 = single_set (temp5)) != 0
1562 && rtx_equal_p (temp2, SET_DEST (temp6))
1563 && (CONSTANT_P (SET_SRC (temp6))
1564 || GET_CODE (SET_SRC (temp6)) == REG
1565 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1566 {
1567 emit_insn (PATTERN (temp5));
1568 init_insn = temp5;
1569 init = SET_SRC (temp6);
1570 }
1571
1572 if (CONSTANT_P (init)
1573 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1574 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1575 XEXP (temp3, 0), XEXP (temp3, 1),
1576 VOIDmode,
1577 (code == LTU || code == LEU
1578 || code == GTU || code == GEU), 1);
15a63be1
RK
1579
1580 /* If we can do the store-flag, do the addition or
1581 subtraction. */
1582
1583 if (target)
1584 target = expand_binop (GET_MODE (temp2),
1585 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1586 ? add_optab : sub_optab),
58f066d1 1587 temp2, target, temp2, 0, OPTAB_WIDEN);
15a63be1
RK
1588
1589 if (target != 0)
1590 {
1591 /* Put the result back in temp2 in case it isn't already.
1592 Then replace the jump, possible a CC0-setting insn in
1593 front of the jump, and TEMP, with the sequence we have
1594 made. */
1595
1596 if (target != temp2)
1597 emit_move_insn (temp2, target);
1598
1599 seq = get_insns ();
1600 end_sequence ();
1601
1602 emit_insns_before (seq, temp4);
1603 delete_insn (temp);
626d0d1d
RK
1604
1605 if (init_insn)
1606 delete_insn (init_insn);
1607
15a63be1
RK
1608 next = NEXT_INSN (insn);
1609#ifdef HAVE_cc0
1610 delete_insn (prev_nonnote_insn (insn));
1611#endif
1612 delete_insn (insn);
f903b91f
DM
1613
1614 if (after_regscan)
1615 {
1616 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1617 old_max_reg = max_reg_num ();
1618 }
1619
15a63be1
RK
1620 changed = 1;
1621 continue;
1622 }
1623 else
1624 end_sequence ();
1625 }
1626
1627 /* Simplify if (...) x = 1; else {...} if (x) ...
1628 We recognize this case scanning backwards as well.
1629
1630 TEMP is the assignment to x;
1631 TEMP1 is the label at the head of the second if. */
1632 /* ?? This should call get_condition to find the values being
1633 compared, instead of looking for a COMPARE insn when HAVE_cc0
1634 is not defined. This would allow it to work on the m88k. */
1635 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1636 is not defined and the condition is tested by a separate compare
1637 insn. This is because the code below assumes that the result
1638 of the compare dies in the following branch.
1639
1640 Not only that, but there might be other insns between the
1641 compare and branch whose results are live. Those insns need
1642 to be executed.
1643
1644 A way to fix this is to move the insns at JUMP_LABEL (insn)
1645 to before INSN. If we are running before flow, they will
1646 be deleted if they aren't needed. But this doesn't work
1647 well after flow.
1648
1649 This is really a special-case of jump threading, anyway. The
1650 right thing to do is to replace this and jump threading with
1651 much simpler code in cse.
1652
1653 This code has been turned off in the non-cc0 case in the
1654 meantime. */
1655
1656#ifdef HAVE_cc0
1657 else if (this_is_simplejump
1658 /* Safe to skip USE and CLOBBER insns here
1659 since they will not be deleted. */
1660 && (temp = prev_active_insn (insn))
1661 && no_labels_between_p (temp, insn)
1662 && GET_CODE (temp) == INSN
1663 && GET_CODE (PATTERN (temp)) == SET
1664 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1665 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1666 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1667 /* If we find that the next value tested is `x'
1668 (TEMP1 is the insn where this happens), win. */
1669 && GET_CODE (temp1) == INSN
1670 && GET_CODE (PATTERN (temp1)) == SET
1671#ifdef HAVE_cc0
1672 /* Does temp1 `tst' the value of x? */
1673 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1674 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1675 && (temp1 = next_nonnote_insn (temp1))
1676#else
1677 /* Does temp1 compare the value of x against zero? */
1678 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1679 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1680 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1681 == SET_DEST (PATTERN (temp)))
1682 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1683 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1684#endif
1685 && condjump_p (temp1))
1686 {
1687 /* Get the if_then_else from the condjump. */
1688 rtx choice = SET_SRC (PATTERN (temp1));
1689 if (GET_CODE (choice) == IF_THEN_ELSE)
1690 {
1691 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1692 rtx val = SET_SRC (PATTERN (temp));
1693 rtx cond
1694 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1695 val, const0_rtx);
1696 rtx ultimate;
1697
1698 if (cond == const_true_rtx)
1699 ultimate = XEXP (choice, 1);
1700 else if (cond == const0_rtx)
1701 ultimate = XEXP (choice, 2);
1702 else
1703 ultimate = 0;
1704
1705 if (ultimate == pc_rtx)
1706 ultimate = get_label_after (temp1);
1707 else if (ultimate && GET_CODE (ultimate) != RETURN)
1708 ultimate = XEXP (ultimate, 0);
1709
9e390837 1710 if (ultimate && JUMP_LABEL(insn) != ultimate)
15a63be1
RK
1711 changed |= redirect_jump (insn, ultimate);
1712 }
1713 }
1714#endif
1715
1716#if 0
1717 /* @@ This needs a bit of work before it will be right.
1718
1719 Any type of comparison can be accepted for the first and
1720 second compare. When rewriting the first jump, we must
1721 compute the what conditions can reach label3, and use the
1722 appropriate code. We can not simply reverse/swap the code
1723 of the first jump. In some cases, the second jump must be
1724 rewritten also.
1725
1726 For example,
1727 < == converts to > ==
1728 < != converts to == >
1729 etc.
1730
1731 If the code is written to only accept an '==' test for the second
1732 compare, then all that needs to be done is to swap the condition
1733 of the first branch.
1734
1735 It is questionable whether we want this optimization anyways,
1736 since if the user wrote code like this because he/she knew that
6dc42e49 1737 the jump to label1 is taken most of the time, then rewriting
15a63be1
RK
1738 this gives slower code. */
1739 /* @@ This should call get_condition to find the values being
1740 compared, instead of looking for a COMPARE insn when HAVE_cc0
1741 is not defined. This would allow it to work on the m88k. */
1742 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1743 is not defined and the condition is tested by a separate compare
1744 insn. This is because the code below assumes that the result
1745 of the compare dies in the following branch. */
1746
1747 /* Simplify test a ~= b
1748 condjump label1;
1749 test a == b
1750 condjump label2;
1751 jump label3;
1752 label1:
1753
1754 rewriting as
1755 test a ~~= b
1756 condjump label3
1757 test a == b
1758 condjump label2
1759 label1:
1760
1761 where ~= is an inequality, e.g. >, and ~~= is the swapped
1762 inequality, e.g. <.
1763
1764 We recognize this case scanning backwards.
1765
1766 TEMP is the conditional jump to `label2';
1767 TEMP1 is the test for `a == b';
1768 TEMP2 is the conditional jump to `label1';
1769 TEMP3 is the test for `a ~= b'. */
1770 else if (this_is_simplejump
1771 && (temp = prev_active_insn (insn))
1772 && no_labels_between_p (temp, insn)
1773 && condjump_p (temp)
1774 && (temp1 = prev_active_insn (temp))
1775 && no_labels_between_p (temp1, temp)
1776 && GET_CODE (temp1) == INSN
1777 && GET_CODE (PATTERN (temp1)) == SET
1778#ifdef HAVE_cc0
1779 && sets_cc0_p (PATTERN (temp1)) == 1
1780#else
1781 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1782 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1783 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1784#endif
1785 && (temp2 = prev_active_insn (temp1))
1786 && no_labels_between_p (temp2, temp1)
1787 && condjump_p (temp2)
1788 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1789 && (temp3 = prev_active_insn (temp2))
1790 && no_labels_between_p (temp3, temp2)
1791 && GET_CODE (PATTERN (temp3)) == SET
1792 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1793 SET_DEST (PATTERN (temp1)))
1794 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1795 SET_SRC (PATTERN (temp3)))
1796 && ! inequality_comparisons_p (PATTERN (temp))
1797 && inequality_comparisons_p (PATTERN (temp2)))
1798 {
1799 rtx fallthrough_label = JUMP_LABEL (temp2);
1800
1801 ++LABEL_NUSES (fallthrough_label);
1802 if (swap_jump (temp2, JUMP_LABEL (insn)))
1803 {
1804 delete_insn (insn);
1805 changed = 1;
1806 }
1807
1808 if (--LABEL_NUSES (fallthrough_label) == 0)
1809 delete_insn (fallthrough_label);
1810 }
1811#endif
1812 /* Simplify if (...) {... x = 1;} if (x) ...
1813
1814 We recognize this case backwards.
1815
1816 TEMP is the test of `x';
1817 TEMP1 is the assignment to `x' at the end of the
1818 previous statement. */
1819 /* @@ This should call get_condition to find the values being
1820 compared, instead of looking for a COMPARE insn when HAVE_cc0
1821 is not defined. This would allow it to work on the m88k. */
1822 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1823 is not defined and the condition is tested by a separate compare
1824 insn. This is because the code below assumes that the result
1825 of the compare dies in the following branch. */
2d20b9df
RS
1826
1827 /* ??? This has to be turned off. The problem is that the
1828 unconditional jump might indirectly end up branching to the
1829 label between TEMP1 and TEMP. We can't detect this, in general,
1830 since it may become a jump to there after further optimizations.
1831 If that jump is done, it will be deleted, so we will retry
1832 this optimization in the next pass, thus an infinite loop.
1833
1834 The present code prevents this by putting the jump after the
1835 label, but this is not logically correct. */
1836#if 0
15a63be1
RK
1837 else if (this_is_condjump
1838 /* Safe to skip USE and CLOBBER insns here
1839 since they will not be deleted. */
1840 && (temp = prev_active_insn (insn))
1841 && no_labels_between_p (temp, insn)
1842 && GET_CODE (temp) == INSN
1843 && GET_CODE (PATTERN (temp)) == SET
1844#ifdef HAVE_cc0
1845 && sets_cc0_p (PATTERN (temp)) == 1
1846 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1847#else
1848 /* Temp must be a compare insn, we can not accept a register
1849 to register move here, since it may not be simply a
1850 tst insn. */
1851 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1852 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1853 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1854 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1855 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1856#endif
1857 /* May skip USE or CLOBBER insns here
1858 for checking for opportunity, since we
1859 take care of them later. */
1860 && (temp1 = prev_active_insn (temp))
1861 && GET_CODE (temp1) == INSN
1862 && GET_CODE (PATTERN (temp1)) == SET
1863#ifdef HAVE_cc0
1864 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1865#else
1866 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1867 == SET_DEST (PATTERN (temp1)))
1868#endif
1869 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1870 /* If this isn't true, cse will do the job. */
1871 && ! no_labels_between_p (temp1, temp))
1872 {
1873 /* Get the if_then_else from the condjump. */
1874 rtx choice = SET_SRC (PATTERN (insn));
1875 if (GET_CODE (choice) == IF_THEN_ELSE
1876 && (GET_CODE (XEXP (choice, 0)) == EQ
1877 || GET_CODE (XEXP (choice, 0)) == NE))
1878 {
1879 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1880 rtx last_insn;
1881 rtx ultimate;
1882 rtx p;
1883
1884 /* Get the place that condjump will jump to
1885 if it is reached from here. */
1886 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1887 == want_nonzero)
1888 ultimate = XEXP (choice, 1);
1889 else
1890 ultimate = XEXP (choice, 2);
1891 /* Get it as a CODE_LABEL. */
1892 if (ultimate == pc_rtx)
1893 ultimate = get_label_after (insn);
1894 else
1895 /* Get the label out of the LABEL_REF. */
1896 ultimate = XEXP (ultimate, 0);
1897
2d20b9df
RS
1898 /* Insert the jump immediately before TEMP, specifically
1899 after the label that is between TEMP1 and TEMP. */
1900 last_insn = PREV_INSN (temp);
15a63be1
RK
1901
1902 /* If we would be branching to the next insn, the jump
1903 would immediately be deleted and the re-inserted in
1904 a subsequent pass over the code. So don't do anything
1905 in that case. */
1906 if (next_active_insn (last_insn)
1907 != next_active_insn (ultimate))
1908 {
1909 emit_barrier_after (last_insn);
1910 p = emit_jump_insn_after (gen_jump (ultimate),
1911 last_insn);
1912 JUMP_LABEL (p) = ultimate;
1913 ++LABEL_NUSES (ultimate);
1914 if (INSN_UID (ultimate) < max_jump_chain
1915 && INSN_CODE (p) < max_jump_chain)
1916 {
1917 jump_chain[INSN_UID (p)]
1918 = jump_chain[INSN_UID (ultimate)];
1919 jump_chain[INSN_UID (ultimate)] = p;
1920 }
1921 changed = 1;
1922 continue;
1923 }
1924 }
1925 }
2d20b9df 1926#endif
15a63be1
RK
1927 /* Detect a conditional jump going to the same place
1928 as an immediately following unconditional jump. */
1929 else if (this_is_condjump
1930 && (temp = next_active_insn (insn)) != 0
1931 && simplejump_p (temp)
1932 && (next_active_insn (JUMP_LABEL (insn))
1933 == next_active_insn (JUMP_LABEL (temp))))
1934 {
f6a6a1b3
DE
1935 rtx tem = temp;
1936
1937 /* ??? Optional. Disables some optimizations, but makes
1938 gcov output more accurate with -O. */
1939 if (flag_test_coverage && !reload_completed)
1940 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1941 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1942 break;
1943
1944 if (tem == temp)
1945 {
1946 delete_jump (insn);
1947 changed = 1;
1948 continue;
1949 }
15a63be1 1950 }
e0cd0770
JC
1951#ifdef HAVE_trap
1952 /* Detect a conditional jump jumping over an unconditional trap. */
1953 else if (HAVE_trap
1954 && this_is_condjump && ! this_is_simplejump
1955 && reallabelprev != 0
1956 && GET_CODE (reallabelprev) == INSN
1957 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1958 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1959 && prev_active_insn (reallabelprev) == insn
1960 && no_labels_between_p (insn, reallabelprev)
1961 && (temp2 = get_condition (insn, &temp4))
1962 && can_reverse_comparison_p (temp2, insn))
1963 {
1964 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1965 XEXP (temp2, 0), XEXP (temp2, 1),
1966 TRAP_CODE (PATTERN (reallabelprev)));
1967
1968 if (new)
1969 {
1970 emit_insn_before (new, temp4);
1971 delete_insn (reallabelprev);
1972 delete_jump (insn);
1973 changed = 1;
1974 continue;
1975 }
1976 }
1977 /* Detect a jump jumping to an unconditional trap. */
1978 else if (HAVE_trap && this_is_condjump
1979 && (temp = next_active_insn (JUMP_LABEL (insn)))
1980 && GET_CODE (temp) == INSN
1981 && GET_CODE (PATTERN (temp)) == TRAP_IF
1982 && (this_is_simplejump
1983 || (temp2 = get_condition (insn, &temp4))))
1984 {
1985 rtx tc = TRAP_CONDITION (PATTERN (temp));
1986
1987 if (tc == const_true_rtx
1988 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1989 {
1990 rtx new;
1991 /* Replace an unconditional jump to a trap with a trap. */
1992 if (this_is_simplejump)
1993 {
1994 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1995 delete_jump (insn);
1996 changed = 1;
1997 continue;
1998 }
1999 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
2000 XEXP (temp2, 1),
2001 TRAP_CODE (PATTERN (temp)));
2002 if (new)
2003 {
2004 emit_insn_before (new, temp4);
2005 delete_jump (insn);
2006 changed = 1;
2007 continue;
2008 }
2009 }
2010 /* If the trap condition and jump condition are mutually
2011 exclusive, redirect the jump to the following insn. */
2012 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
2013 && ! this_is_simplejump
2014 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
2015 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
2016 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
2017 && redirect_jump (insn, get_label_after (temp)))
2018 {
2019 changed = 1;
2020 continue;
2021 }
2022 }
2023#endif
2024
15a63be1
RK
2025 /* Detect a conditional jump jumping over an unconditional jump. */
2026
3480bb98
JL
2027 else if ((this_is_condjump || this_is_condjump_in_parallel)
2028 && ! this_is_simplejump
15a63be1
RK
2029 && reallabelprev != 0
2030 && GET_CODE (reallabelprev) == JUMP_INSN
2031 && prev_active_insn (reallabelprev) == insn
2032 && no_labels_between_p (insn, reallabelprev)
2033 && simplejump_p (reallabelprev))
2034 {
2035 /* When we invert the unconditional jump, we will be
2036 decrementing the usage count of its old label.
2037 Make sure that we don't delete it now because that
2038 might cause the following code to be deleted. */
2039 rtx prev_uses = prev_nonnote_insn (reallabelprev);
2040 rtx prev_label = JUMP_LABEL (insn);
2041
e26a82e4
JW
2042 if (prev_label)
2043 ++LABEL_NUSES (prev_label);
15a63be1
RK
2044
2045 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
2046 {
2047 /* It is very likely that if there are USE insns before
2048 this jump, they hold REG_DEAD notes. These REG_DEAD
2049 notes are no longer valid due to this optimization,
2050 and will cause the life-analysis that following passes
2051 (notably delayed-branch scheduling) to think that
2052 these registers are dead when they are not.
2053
2054 To prevent this trouble, we just remove the USE insns
2055 from the insn chain. */
2056
2057 while (prev_uses && GET_CODE (prev_uses) == INSN
2058 && GET_CODE (PATTERN (prev_uses)) == USE)
2059 {
2060 rtx useless = prev_uses;
2061 prev_uses = prev_nonnote_insn (prev_uses);
2062 delete_insn (useless);
2063 }
2064
2065 delete_insn (reallabelprev);
2066 next = insn;
2067 changed = 1;
2068 }
2069
2070 /* We can now safely delete the label if it is unreferenced
2071 since the delete_insn above has deleted the BARRIER. */
e26a82e4 2072 if (prev_label && --LABEL_NUSES (prev_label) == 0)
15a63be1
RK
2073 delete_insn (prev_label);
2074 continue;
2075 }
2076 else
2077 {
2078 /* Detect a jump to a jump. */
2079
2080 nlabel = follow_jumps (JUMP_LABEL (insn));
2081 if (nlabel != JUMP_LABEL (insn)
2082 && redirect_jump (insn, nlabel))
2083 {
2084 changed = 1;
2085 next = insn;
2086 }
2087
2088 /* Look for if (foo) bar; else break; */
2089 /* The insns look like this:
2090 insn = condjump label1;
2091 ...range1 (some insns)...
2092 jump label2;
2093 label1:
2094 ...range2 (some insns)...
2095 jump somewhere unconditionally
2096 label2: */
2097 {
2098 rtx label1 = next_label (insn);
2099 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2100 /* Don't do this optimization on the first round, so that
2101 jump-around-a-jump gets simplified before we ask here
2102 whether a jump is unconditional.
2103
2104 Also don't do it when we are called after reload since
2105 it will confuse reorg. */
2106 if (! first
2107 && (reload_completed ? ! flag_delayed_branch : 1)
2108 /* Make sure INSN is something we can invert. */
2109 && condjump_p (insn)
2110 && label1 != 0
2111 && JUMP_LABEL (insn) == label1
2112 && LABEL_NUSES (label1) == 1
2113 && GET_CODE (range1end) == JUMP_INSN
2114 && simplejump_p (range1end))
2115 {
2116 rtx label2 = next_label (label1);
2117 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2118 if (range1end != range2end
2119 && JUMP_LABEL (range1end) == label2
2120 && GET_CODE (range2end) == JUMP_INSN
2121 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2122 /* Invert the jump condition, so we
2123 still execute the same insns in each case. */
2124 && invert_jump (insn, label1))
2125 {
2126 rtx range1beg = next_active_insn (insn);
2127 rtx range2beg = next_active_insn (label1);
2128 rtx range1after, range2after;
2129 rtx range1before, range2before;
f0e1b9a9 2130 rtx rangenext;
15a63be1 2131
1f109a14
JW
2132 /* Include in each range any notes before it, to be
2133 sure that we get the line number note if any, even
2134 if there are other notes here. */
0e690bdb 2135 while (PREV_INSN (range1beg)
1f109a14 2136 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
0e690bdb
RS
2137 range1beg = PREV_INSN (range1beg);
2138
2139 while (PREV_INSN (range2beg)
1f109a14 2140 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
0e690bdb
RS
2141 range2beg = PREV_INSN (range2beg);
2142
15a63be1
RK
2143 /* Don't move NOTEs for blocks or loops; shift them
2144 outside the ranges, where they'll stay put. */
915f619f
JW
2145 range1beg = squeeze_notes (range1beg, range1end);
2146 range2beg = squeeze_notes (range2beg, range2end);
15a63be1
RK
2147
2148 /* Get current surrounds of the 2 ranges. */
2149 range1before = PREV_INSN (range1beg);
2150 range2before = PREV_INSN (range2beg);
2151 range1after = NEXT_INSN (range1end);
2152 range2after = NEXT_INSN (range2end);
2153
2154 /* Splice range2 where range1 was. */
2155 NEXT_INSN (range1before) = range2beg;
2156 PREV_INSN (range2beg) = range1before;
2157 NEXT_INSN (range2end) = range1after;
2158 PREV_INSN (range1after) = range2end;
2159 /* Splice range1 where range2 was. */
2160 NEXT_INSN (range2before) = range1beg;
2161 PREV_INSN (range1beg) = range2before;
2162 NEXT_INSN (range1end) = range2after;
2163 PREV_INSN (range2after) = range1end;
f0e1b9a9
RE
2164
2165 /* Check for a loop end note between the end of
2166 range2, and the next code label. If there is one,
2167 then what we have really seen is
2168 if (foo) break; end_of_loop;
2169 and moved the break sequence outside the loop.
2170 We must move the LOOP_END note to where the
2171 loop really ends now, or we will confuse loop
ca188f16
JW
2172 optimization. Stop if we find a LOOP_BEG note
2173 first, since we don't want to move the LOOP_END
2174 note in that case. */
f0e1b9a9
RE
2175 for (;range2after != label2; range2after = rangenext)
2176 {
2177 rangenext = NEXT_INSN (range2after);
ca188f16 2178 if (GET_CODE (range2after) == NOTE)
f0e1b9a9 2179 {
ca188f16
JW
2180 if (NOTE_LINE_NUMBER (range2after)
2181 == NOTE_INSN_LOOP_END)
2182 {
2183 NEXT_INSN (PREV_INSN (range2after))
2184 = rangenext;
2185 PREV_INSN (rangenext)
2186 = PREV_INSN (range2after);
2187 PREV_INSN (range2after)
2188 = PREV_INSN (range1beg);
2189 NEXT_INSN (range2after) = range1beg;
2190 NEXT_INSN (PREV_INSN (range1beg))
2191 = range2after;
2192 PREV_INSN (range1beg) = range2after;
2193 }
2194 else if (NOTE_LINE_NUMBER (range2after)
2195 == NOTE_INSN_LOOP_BEG)
2196 break;
f0e1b9a9
RE
2197 }
2198 }
15a63be1
RK
2199 changed = 1;
2200 continue;
2201 }
2202 }
2203 }
2204
2205 /* Now that the jump has been tensioned,
2206 try cross jumping: check for identical code
0f41302f 2207 before the jump and before its target label. */
15a63be1
RK
2208
2209 /* First, cross jumping of conditional jumps: */
2210
2211 if (cross_jump && condjump_p (insn))
2212 {
2213 rtx newjpos, newlpos;
2214 rtx x = prev_real_insn (JUMP_LABEL (insn));
2215
2216 /* A conditional jump may be crossjumped
2217 only if the place it jumps to follows
2218 an opposing jump that comes back here. */
2219
2220 if (x != 0 && ! jump_back_p (x, insn))
2221 /* We have no opposing jump;
2222 cannot cross jump this insn. */
2223 x = 0;
2224
2225 newjpos = 0;
2226 /* TARGET is nonzero if it is ok to cross jump
2227 to code before TARGET. If so, see if matches. */
2228 if (x != 0)
2229 find_cross_jump (insn, x, 2,
2230 &newjpos, &newlpos);
2231
2232 if (newjpos != 0)
2233 {
2234 do_cross_jump (insn, newjpos, newlpos);
2235 /* Make the old conditional jump
2236 into an unconditional one. */
2237 SET_SRC (PATTERN (insn))
38a448ca 2238 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
15a63be1
RK
2239 INSN_CODE (insn) = -1;
2240 emit_barrier_after (insn);
2241 /* Add to jump_chain unless this is a new label
0f41302f 2242 whose UID is too large. */
15a63be1
RK
2243 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2244 {
2245 jump_chain[INSN_UID (insn)]
2246 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2247 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2248 }
2249 changed = 1;
2250 next = insn;
2251 }
2252 }
2253
2254 /* Cross jumping of unconditional jumps:
2255 a few differences. */
2256
2257 if (cross_jump && simplejump_p (insn))
2258 {
2259 rtx newjpos, newlpos;
2260 rtx target;
2261
2262 newjpos = 0;
2263
2264 /* TARGET is nonzero if it is ok to cross jump
2265 to code before TARGET. If so, see if matches. */
2266 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2267 &newjpos, &newlpos);
2268
2269 /* If cannot cross jump to code before the label,
2270 see if we can cross jump to another jump to
2271 the same label. */
2272 /* Try each other jump to this label. */
2273 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2274 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2275 target != 0 && newjpos == 0;
2276 target = jump_chain[INSN_UID (target)])
2277 if (target != insn
2278 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2279 /* Ignore TARGET if it's deleted. */
2280 && ! INSN_DELETED_P (target))
2281 find_cross_jump (insn, target, 2,
2282 &newjpos, &newlpos);
2283
2284 if (newjpos != 0)
2285 {
2286 do_cross_jump (insn, newjpos, newlpos);
2287 changed = 1;
2288 next = insn;
2289 }
2290 }
2291
2292 /* This code was dead in the previous jump.c! */
2293 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2294 {
2295 /* Return insns all "jump to the same place"
2296 so we can cross-jump between any two of them. */
2297
2298 rtx newjpos, newlpos, target;
2299
2300 newjpos = 0;
2301
2302 /* If cannot cross jump to code before the label,
2303 see if we can cross jump to another jump to
2304 the same label. */
2305 /* Try each other jump to this label. */
2306 for (target = jump_chain[0];
2307 target != 0 && newjpos == 0;
2308 target = jump_chain[INSN_UID (target)])
2309 if (target != insn
2310 && ! INSN_DELETED_P (target)
2311 && GET_CODE (PATTERN (target)) == RETURN)
2312 find_cross_jump (insn, target, 2,
2313 &newjpos, &newlpos);
2314
2315 if (newjpos != 0)
2316 {
2317 do_cross_jump (insn, newjpos, newlpos);
2318 changed = 1;
2319 next = insn;
2320 }
2321 }
2322 }
2323 }
2324
2325 first = 0;
2326 }
2327
2328 /* Delete extraneous line number notes.
2329 Note that two consecutive notes for different lines are not really
2330 extraneous. There should be some indication where that line belonged,
2331 even if it became empty. */
2332
2333 {
2334 rtx last_note = 0;
2335
2336 for (insn = f; insn; insn = NEXT_INSN (insn))
2337 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2338 {
2339 /* Delete this note if it is identical to previous note. */
2340 if (last_note
2341 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2342 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2343 {
2344 delete_insn (insn);
2345 continue;
2346 }
2347
2348 last_note = insn;
2349 }
2350 }
2351
683e6ccd
RK
2352#ifdef HAVE_return
2353 if (HAVE_return)
2354 {
2355 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2356 in front of it. If the machine allows it at this point (we might be
2357 after reload for a leaf routine), it will improve optimization for it
2358 to be there. We do this both here and at the start of this pass since
2359 the RETURN might have been deleted by some of our optimizations. */
2360 insn = get_last_insn ();
2361 while (insn && GET_CODE (insn) == NOTE)
2362 insn = PREV_INSN (insn);
2363
2364 if (insn && GET_CODE (insn) != BARRIER)
2365 {
2366 emit_jump_insn (gen_return ());
2367 emit_barrier ();
2368 }
2369 }
2370#endif
2371
15a63be1
RK
2372 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2373 If so, delete it, and record that this function can drop off the end. */
2374
2375 insn = last_insn;
2376 {
2377 int n_labels = 1;
2378 while (insn
2379 /* One label can follow the end-note: the return label. */
2380 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2381 /* Ordinary insns can follow it if returning a structure. */
2382 || GET_CODE (insn) == INSN
2383 /* If machine uses explicit RETURN insns, no epilogue,
2384 then one of them follows the note. */
2385 || (GET_CODE (insn) == JUMP_INSN
2386 && GET_CODE (PATTERN (insn)) == RETURN)
60374599
DE
2387 /* A barrier can follow the return insn. */
2388 || GET_CODE (insn) == BARRIER
15a63be1
RK
2389 /* Other kinds of notes can follow also. */
2390 || (GET_CODE (insn) == NOTE
2391 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2392 insn = PREV_INSN (insn);
2393 }
2394
2395 /* Report if control can fall through at the end of the function. */
2396 if (insn && GET_CODE (insn) == NOTE
2397 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2398 {
2399 can_reach_end = 1;
2400 delete_insn (insn);
2401 }
2402
2403 /* Show JUMP_CHAIN no longer valid. */
2404 jump_chain = 0;
2405}
2406\f
2407/* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2408 jump. Assume that this unconditional jump is to the exit test code. If
2409 the code is sufficiently simple, make a copy of it before INSN,
2410 followed by a jump to the exit of the loop. Then delete the unconditional
2411 jump after INSN.
2412
15a63be1
RK
2413 Return 1 if we made the change, else 0.
2414
2415 This is only safe immediately after a regscan pass because it uses the
2416 values of regno_first_uid and regno_last_uid. */
2417
2418static int
2419duplicate_loop_exit_test (loop_start)
2420 rtx loop_start;
2421{
e33477be 2422 rtx insn, set, reg, p, link;
9c066566 2423 rtx copy = 0;
15a63be1
RK
2424 int num_insns = 0;
2425 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2426 rtx lastexit;
2427 int max_reg = max_reg_num ();
2428 rtx *reg_map = 0;
2429
2430 /* Scan the exit code. We do not perform this optimization if any insn:
2431
2432 is a CALL_INSN
2433 is a CODE_LABEL
2434 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2435 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2436 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2437 are not valid
752e74f9
JL
2438
2439
2440 We also do not do this if we find an insn with ASM_OPERANDS. While
2441 this restriction should not be necessary, copying an insn with
2442 ASM_OPERANDS can confuse asm_noperands in some cases.
15a63be1
RK
2443
2444 Also, don't do this if the exit code is more than 20 insns. */
2445
2446 for (insn = exitcode;
2447 insn
2448 && ! (GET_CODE (insn) == NOTE
2449 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2450 insn = NEXT_INSN (insn))
2451 {
2452 switch (GET_CODE (insn))
2453 {
2454 case CODE_LABEL:
2455 case CALL_INSN:
2456 return 0;
2457 case NOTE:
fe464caf
RK
2458 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2459 a jump immediately after the loop start that branches outside
2460 the loop but within an outer loop, near the exit test.
2461 If we copied this exit test and created a phony
2462 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2463 before the exit test look like these could be safely moved
2464 out of the loop even if they actually may be never executed.
2465 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2466
15a63be1 2467 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
fe464caf 2468 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
15a63be1 2469 return 0;
93de5c31
MM
2470
2471 if (optimize < 2
2472 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2473 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2474 /* If we were to duplicate this code, we would not move
2475 the BLOCK notes, and so debugging the moved code would
2476 be difficult. Thus, we only move the code with -O2 or
2477 higher. */
2478 return 0;
2479
15a63be1
RK
2480 break;
2481 case JUMP_INSN:
2482 case INSN:
2483 if (++num_insns > 20
5f4f0e22 2484 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
752e74f9 2485 || find_reg_note (insn, REG_LIBCALL, NULL_RTX)
1eb6762b 2486 || asm_noperands (PATTERN (insn)) > 0)
15a63be1
RK
2487 return 0;
2488 break;
e9a25f70
JL
2489 default:
2490 break;
15a63be1
RK
2491 }
2492 }
2493
2494 /* Unless INSN is zero, we can do the optimization. */
2495 if (insn == 0)
2496 return 0;
2497
2498 lastexit = insn;
2499
2500 /* See if any insn sets a register only used in the loop exit code and
2501 not a user variable. If so, replace it with a new register. */
2502 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2503 if (GET_CODE (insn) == INSN
2504 && (set = single_set (insn)) != 0
e33477be
RK
2505 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2506 || (GET_CODE (reg) == SUBREG
2507 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2508 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
b1f21e0a 2509 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
15a63be1
RK
2510 {
2511 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
b1f21e0a 2512 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
15a63be1
RK
2513 break;
2514
2515 if (p != lastexit)
2516 {
2517 /* We can do the replacement. Allocate reg_map if this is the
2518 first replacement we found. */
2519 if (reg_map == 0)
2520 {
2521 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
4c9a05bc 2522 bzero ((char *) reg_map, max_reg * sizeof (rtx));
15a63be1
RK
2523 }
2524
e33477be 2525 REG_LOOP_TEST_P (reg) = 1;
15a63be1 2526
e33477be 2527 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
15a63be1
RK
2528 }
2529 }
2530
2531 /* Now copy each insn. */
2532 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2533 switch (GET_CODE (insn))
2534 {
2535 case BARRIER:
2536 copy = emit_barrier_before (loop_start);
2537 break;
2538 case NOTE:
2539 /* Only copy line-number notes. */
2540 if (NOTE_LINE_NUMBER (insn) >= 0)
2541 {
2542 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2543 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2544 }
2545 break;
2546
2547 case INSN:
2548 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2549 if (reg_map)
2550 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2551
2552 mark_jump_label (PATTERN (copy), copy, 0);
2553
2554 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2555 make them. */
2556 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2557 if (REG_NOTE_KIND (link) != REG_LABEL)
2558 REG_NOTES (copy)
38a448ca
RH
2559 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2560 XEXP (link, 0),
2561 REG_NOTES (copy)));
15a63be1
RK
2562 if (reg_map && REG_NOTES (copy))
2563 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2564 break;
2565
2566 case JUMP_INSN:
2567 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2568 if (reg_map)
2569 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2570 mark_jump_label (PATTERN (copy), copy, 0);
2571 if (REG_NOTES (insn))
2572 {
2573 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2574 if (reg_map)
2575 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2576 }
2577
2578 /* If this is a simple jump, add it to the jump chain. */
2579
2580 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2581 && simplejump_p (copy))
2582 {
2583 jump_chain[INSN_UID (copy)]
2584 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2585 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2586 }
2587 break;
2588
2589 default:
2590 abort ();
2591 }
2592
2593 /* Now clean up by emitting a jump to the end label and deleting the jump
2594 at the start of the loop. */
9c066566 2595 if (! copy || GET_CODE (copy) != BARRIER)
15a63be1
RK
2596 {
2597 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2598 loop_start);
2599 mark_jump_label (PATTERN (copy), copy, 0);
2600 if (INSN_UID (copy) < max_jump_chain
2601 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2602 {
2603 jump_chain[INSN_UID (copy)]
2604 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2605 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2606 }
2607 emit_barrier_before (loop_start);
2608 }
2609
15a63be1
RK
2610 /* Mark the exit code as the virtual top of the converted loop. */
2611 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2612
cd423ead
RK
2613 delete_insn (next_nonnote_insn (loop_start));
2614
15a63be1
RK
2615 return 1;
2616}
2617\f
2618/* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
915f619f
JW
2619 loop-end notes between START and END out before START. Assume that
2620 END is not such a note. START may be such a note. Returns the value
2621 of the new starting insn, which may be different if the original start
2622 was such a note. */
15a63be1 2623
915f619f 2624rtx
15a63be1
RK
2625squeeze_notes (start, end)
2626 rtx start, end;
2627{
2628 rtx insn;
2629 rtx next;
2630
2631 for (insn = start; insn != end; insn = next)
2632 {
2633 next = NEXT_INSN (insn);
2634 if (GET_CODE (insn) == NOTE
2635 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2636 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2637 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2638 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2639 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2640 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2641 {
915f619f
JW
2642 if (insn == start)
2643 start = next;
2644 else
2645 {
2646 rtx prev = PREV_INSN (insn);
2647 PREV_INSN (insn) = PREV_INSN (start);
2648 NEXT_INSN (insn) = start;
2649 NEXT_INSN (PREV_INSN (insn)) = insn;
2650 PREV_INSN (NEXT_INSN (insn)) = insn;
2651 NEXT_INSN (prev) = next;
2652 PREV_INSN (next) = prev;
2653 }
15a63be1
RK
2654 }
2655 }
915f619f
JW
2656
2657 return start;
15a63be1
RK
2658}
2659\f
2660/* Compare the instructions before insn E1 with those before E2
2661 to find an opportunity for cross jumping.
2662 (This means detecting identical sequences of insns followed by
2663 jumps to the same place, or followed by a label and a jump
2664 to that label, and replacing one with a jump to the other.)
2665
2666 Assume E1 is a jump that jumps to label E2
2667 (that is not always true but it might as well be).
2668 Find the longest possible equivalent sequences
2669 and store the first insns of those sequences into *F1 and *F2.
2670 Store zero there if no equivalent preceding instructions are found.
2671
2672 We give up if we find a label in stream 1.
2673 Actually we could transfer that label into stream 2. */
2674
2675static void
2676find_cross_jump (e1, e2, minimum, f1, f2)
2677 rtx e1, e2;
2678 int minimum;
2679 rtx *f1, *f2;
2680{
2681 register rtx i1 = e1, i2 = e2;
2682 register rtx p1, p2;
2683 int lose = 0;
2684
2685 rtx last1 = 0, last2 = 0;
2686 rtx afterlast1 = 0, afterlast2 = 0;
15a63be1
RK
2687
2688 *f1 = 0;
2689 *f2 = 0;
2690
2691 while (1)
2692 {
2693 i1 = prev_nonnote_insn (i1);
2694
2695 i2 = PREV_INSN (i2);
2696 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2697 i2 = PREV_INSN (i2);
2698
2699 if (i1 == 0)
2700 break;
2701
2702 /* Don't allow the range of insns preceding E1 or E2
2703 to include the other (E2 or E1). */
2704 if (i2 == e1 || i1 == e2)
2705 break;
2706
2707 /* If we will get to this code by jumping, those jumps will be
2708 tensioned to go directly to the new label (before I2),
2709 so this cross-jumping won't cost extra. So reduce the minimum. */
2710 if (GET_CODE (i1) == CODE_LABEL)
2711 {
2712 --minimum;
2713 break;
2714 }
2715
2716 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2717 break;
2718
2719 p1 = PATTERN (i1);
2720 p2 = PATTERN (i2);
2721
4d367579
DE
2722 /* If this is a CALL_INSN, compare register usage information.
2723 If we don't check this on stack register machines, the two
2724 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2725 numbers of stack registers in the same basic block.
2726 If we don't check this on machines with delay slots, a delay slot may
2727 be filled that clobbers a parameter expected by the subroutine.
47b0bb94 2728
4d367579
DE
2729 ??? We take the simple route for now and assume that if they're
2730 equal, they were constructed identically. */
2731
2732 if (GET_CODE (i1) == CALL_INSN
2733 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2734 CALL_INSN_FUNCTION_USAGE (i2)))
2735 lose = 1;
2736
2737#ifdef STACK_REGS
15a63be1
RK
2738 /* If cross_jump_death_matters is not 0, the insn's mode
2739 indicates whether or not the insn contains any stack-like
0f41302f 2740 regs. */
15a63be1 2741
47b0bb94 2742 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
15a63be1
RK
2743 {
2744 /* If register stack conversion has already been done, then
2745 death notes must also be compared before it is certain that
0f41302f 2746 the two instruction streams match. */
15a63be1
RK
2747
2748 rtx note;
2749 HARD_REG_SET i1_regset, i2_regset;
2750
2751 CLEAR_HARD_REG_SET (i1_regset);
2752 CLEAR_HARD_REG_SET (i2_regset);
2753
2754 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2755 if (REG_NOTE_KIND (note) == REG_DEAD
2756 && STACK_REG_P (XEXP (note, 0)))
2757 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2758
2759 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2760 if (REG_NOTE_KIND (note) == REG_DEAD
2761 && STACK_REG_P (XEXP (note, 0)))
2762 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2763
2764 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2765
2766 lose = 1;
2767
2768 done:
2769 ;
2770 }
2771#endif
2772
44c389e4
JW
2773 /* Don't allow old-style asm or volatile extended asms to be accepted
2774 for cross jumping purposes. It is conceptually correct to allow
2775 them, since cross-jumping preserves the dynamic instruction order
2776 even though it is changing the static instruction order. However,
2777 if an asm is being used to emit an assembler pseudo-op, such as
2778 the MIPS `.set reorder' pseudo-op, then the static instruction order
2779 matters and it must be preserved. */
2780 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2781 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2782 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2783 lose = 1;
2784
2785 if (lose || GET_CODE (p1) != GET_CODE (p2)
15a63be1
RK
2786 || ! rtx_renumbered_equal_p (p1, p2))
2787 {
2788 /* The following code helps take care of G++ cleanups. */
2789 rtx equiv1;
2790 rtx equiv2;
2791
2792 if (!lose && GET_CODE (p1) == GET_CODE (p2)
5f4f0e22
CH
2793 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2794 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2795 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2796 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
15a63be1
RK
2797 /* If the equivalences are not to a constant, they may
2798 reference pseudos that no longer exist, so we can't
2799 use them. */
2800 && CONSTANT_P (XEXP (equiv1, 0))
2801 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2802 {
2803 rtx s1 = single_set (i1);
2804 rtx s2 = single_set (i2);
2805 if (s1 != 0 && s2 != 0
2806 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2807 {
2808 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2809 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2810 if (! rtx_renumbered_equal_p (p1, p2))
2811 cancel_changes (0);
2812 else if (apply_change_group ())
2813 goto win;
2814 }
2815 }
2816
2817 /* Insns fail to match; cross jumping is limited to the following
2818 insns. */
2819
2820#ifdef HAVE_cc0
2821 /* Don't allow the insn after a compare to be shared by
2822 cross-jumping unless the compare is also shared.
2823 Here, if either of these non-matching insns is a compare,
2824 exclude the following insn from possible cross-jumping. */
2825 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2826 last1 = afterlast1, last2 = afterlast2, ++minimum;
2827#endif
2828
2829 /* If cross-jumping here will feed a jump-around-jump
2830 optimization, this jump won't cost extra, so reduce
2831 the minimum. */
2832 if (GET_CODE (i1) == JUMP_INSN
2833 && JUMP_LABEL (i1)
2834 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2835 --minimum;
2836 break;
2837 }
2838
2839 win:
2840 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2841 {
2842 /* Ok, this insn is potentially includable in a cross-jump here. */
2843 afterlast1 = last1, afterlast2 = last2;
2844 last1 = i1, last2 = i2, --minimum;
2845 }
2846 }
2847
15a63be1
RK
2848 if (minimum <= 0 && last1 != 0 && last1 != e1)
2849 *f1 = last1, *f2 = last2;
2850}
2851
2852static void
2853do_cross_jump (insn, newjpos, newlpos)
2854 rtx insn, newjpos, newlpos;
2855{
2856 /* Find an existing label at this point
2857 or make a new one if there is none. */
2858 register rtx label = get_label_before (newlpos);
2859
2860 /* Make the same jump insn jump to the new point. */
2861 if (GET_CODE (PATTERN (insn)) == RETURN)
2862 {
2863 /* Remove from jump chain of returns. */
2864 delete_from_jump_chain (insn);
2865 /* Change the insn. */
2866 PATTERN (insn) = gen_jump (label);
2867 INSN_CODE (insn) = -1;
2868 JUMP_LABEL (insn) = label;
2869 LABEL_NUSES (label)++;
2870 /* Add to new the jump chain. */
2871 if (INSN_UID (label) < max_jump_chain
2872 && INSN_UID (insn) < max_jump_chain)
2873 {
2874 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2875 jump_chain[INSN_UID (label)] = insn;
2876 }
2877 }
2878 else
2879 redirect_jump (insn, label);
2880
2881 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2882 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2883 the NEWJPOS stream. */
2884
2885 while (newjpos != insn)
2886 {
2887 rtx lnote;
2888
2889 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2890 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2891 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2892 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2893 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2894 remove_note (newlpos, lnote);
2895
2896 delete_insn (newjpos);
2897 newjpos = next_real_insn (newjpos);
2898 newlpos = next_real_insn (newlpos);
2899 }
2900}
2901\f
2902/* Return the label before INSN, or put a new label there. */
2903
2904rtx
2905get_label_before (insn)
2906 rtx insn;
2907{
2908 rtx label;
2909
2910 /* Find an existing label at this point
2911 or make a new one if there is none. */
2912 label = prev_nonnote_insn (insn);
2913
2914 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2915 {
2916 rtx prev = PREV_INSN (insn);
2917
15a63be1
RK
2918 label = gen_label_rtx ();
2919 emit_label_after (label, prev);
2920 LABEL_NUSES (label) = 0;
2921 }
2922 return label;
2923}
2924
2925/* Return the label after INSN, or put a new label there. */
2926
2927rtx
2928get_label_after (insn)
2929 rtx insn;
2930{
2931 rtx label;
2932
2933 /* Find an existing label at this point
2934 or make a new one if there is none. */
2935 label = next_nonnote_insn (insn);
2936
2937 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2938 {
15a63be1
RK
2939 label = gen_label_rtx ();
2940 emit_label_after (label, insn);
2941 LABEL_NUSES (label) = 0;
2942 }
2943 return label;
2944}
2945\f
2946/* Return 1 if INSN is a jump that jumps to right after TARGET
2947 only on the condition that TARGET itself would drop through.
2948 Assumes that TARGET is a conditional jump. */
2949
2950static int
2951jump_back_p (insn, target)
2952 rtx insn, target;
2953{
2954 rtx cinsn, ctarget;
2955 enum rtx_code codei, codet;
2956
2957 if (simplejump_p (insn) || ! condjump_p (insn)
2958 || simplejump_p (target)
2959 || target != prev_real_insn (JUMP_LABEL (insn)))
2960 return 0;
2961
2962 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2963 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2964
2965 codei = GET_CODE (cinsn);
2966 codet = GET_CODE (ctarget);
2967
2968 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2969 {
2970 if (! can_reverse_comparison_p (cinsn, insn))
2971 return 0;
2972 codei = reverse_condition (codei);
2973 }
2974
2975 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2976 {
2977 if (! can_reverse_comparison_p (ctarget, target))
2978 return 0;
2979 codet = reverse_condition (codet);
2980 }
2981
2982 return (codei == codet
2983 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2984 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2985}
2986\f
2987/* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2988 return non-zero if it is safe to reverse this comparison. It is if our
2989 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2990 this is known to be an integer comparison. */
2991
2992int
2993can_reverse_comparison_p (comparison, insn)
2994 rtx comparison;
2995 rtx insn;
2996{
2997 rtx arg0;
2998
2999 /* If this is not actually a comparison, we can't reverse it. */
3000 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3001 return 0;
3002
3003 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3004 /* If this is an NE comparison, it is safe to reverse it to an EQ
3005 comparison and vice versa, even for floating point. If no operands
3006 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3007 always false and NE is always true, so the reversal is also valid. */
9b2e59ad 3008 || flag_fast_math
15a63be1
RK
3009 || GET_CODE (comparison) == NE
3010 || GET_CODE (comparison) == EQ)
3011 return 1;
3012
3013 arg0 = XEXP (comparison, 0);
3014
3015 /* Make sure ARG0 is one of the actual objects being compared. If we
3016 can't do this, we can't be sure the comparison can be reversed.
3017
3018 Handle cc0 and a MODE_CC register. */
3019 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3020#ifdef HAVE_cc0
3021 || arg0 == cc0_rtx
3022#endif
3023 )
3024 {
3025 rtx prev = prev_nonnote_insn (insn);
3026 rtx set = single_set (prev);
3027
3028 if (set == 0 || SET_DEST (set) != arg0)
3029 return 0;
3030
3031 arg0 = SET_SRC (set);
3032
3033 if (GET_CODE (arg0) == COMPARE)
3034 arg0 = XEXP (arg0, 0);
3035 }
3036
3037 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3038 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3039 return (GET_CODE (arg0) == CONST_INT
3040 || (GET_MODE (arg0) != VOIDmode
3041 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3042 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3043}
3044
3045/* Given an rtx-code for a comparison, return the code
3046 for the negated comparison.
3047 WATCH OUT! reverse_condition is not safe to use on a jump
3048 that might be acting on the results of an IEEE floating point comparison,
3049 because of the special treatment of non-signaling nans in comparisons.
3050 Use can_reverse_comparison_p to be sure. */
3051
3052enum rtx_code
3053reverse_condition (code)
3054 enum rtx_code code;
3055{
3056 switch (code)
3057 {
3058 case EQ:
3059 return NE;
3060
3061 case NE:
3062 return EQ;
3063
3064 case GT:
3065 return LE;
3066
3067 case GE:
3068 return LT;
3069
3070 case LT:
3071 return GE;
3072
3073 case LE:
3074 return GT;
3075
3076 case GTU:
3077 return LEU;
3078
3079 case GEU:
3080 return LTU;
3081
3082 case LTU:
3083 return GEU;
3084
3085 case LEU:
3086 return GTU;
3087
3088 default:
3089 abort ();
3090 return UNKNOWN;
3091 }
3092}
3093
3094/* Similar, but return the code when two operands of a comparison are swapped.
3095 This IS safe for IEEE floating-point. */
3096
3097enum rtx_code
3098swap_condition (code)
3099 enum rtx_code code;
3100{
3101 switch (code)
3102 {
3103 case EQ:
3104 case NE:
3105 return code;
3106
3107 case GT:
3108 return LT;
3109
3110 case GE:
3111 return LE;
3112
3113 case LT:
3114 return GT;
3115
3116 case LE:
3117 return GE;
3118
3119 case GTU:
3120 return LTU;
3121
3122 case GEU:
3123 return LEU;
3124
3125 case LTU:
3126 return GTU;
3127
3128 case LEU:
3129 return GEU;
3130
3131 default:
3132 abort ();
3133 return UNKNOWN;
3134 }
3135}
3136
3137/* Given a comparison CODE, return the corresponding unsigned comparison.
3138 If CODE is an equality comparison or already an unsigned comparison,
3139 CODE is returned. */
3140
3141enum rtx_code
3142unsigned_condition (code)
3143 enum rtx_code code;
3144{
3145 switch (code)
3146 {
3147 case EQ:
3148 case NE:
3149 case GTU:
3150 case GEU:
3151 case LTU:
3152 case LEU:
3153 return code;
3154
3155 case GT:
3156 return GTU;
3157
3158 case GE:
3159 return GEU;
3160
3161 case LT:
3162 return LTU;
3163
3164 case LE:
3165 return LEU;
3166
3167 default:
3168 abort ();
3169 }
3170}
3171
3172/* Similarly, return the signed version of a comparison. */
3173
3174enum rtx_code
3175signed_condition (code)
3176 enum rtx_code code;
3177{
3178 switch (code)
3179 {
3180 case EQ:
3181 case NE:
3182 case GT:
3183 case GE:
3184 case LT:
3185 case LE:
3186 return code;
3187
3188 case GTU:
3189 return GT;
3190
3191 case GEU:
3192 return GE;
3193
3194 case LTU:
3195 return LT;
3196
3197 case LEU:
3198 return LE;
3199
3200 default:
3201 abort ();
3202 }
3203}
3204\f
3205/* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3206 truth of CODE1 implies the truth of CODE2. */
3207
3208int
3209comparison_dominates_p (code1, code2)
3210 enum rtx_code code1, code2;
3211{
3212 if (code1 == code2)
3213 return 1;
3214
3215 switch (code1)
3216 {
3217 case EQ:
3218 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3219 return 1;
3220 break;
3221
3222 case LT:
b0c38416 3223 if (code2 == LE || code2 == NE)
15a63be1
RK
3224 return 1;
3225 break;
3226
3227 case GT:
b0c38416 3228 if (code2 == GE || code2 == NE)
15a63be1
RK
3229 return 1;
3230 break;
3231
3232 case LTU:
b0c38416 3233 if (code2 == LEU || code2 == NE)
15a63be1
RK
3234 return 1;
3235 break;
3236
3237 case GTU:
b0c38416 3238 if (code2 == GEU || code2 == NE)
15a63be1
RK
3239 return 1;
3240 break;
e9a25f70
JL
3241
3242 default:
3243 break;
15a63be1
RK
3244 }
3245
3246 return 0;
3247}
3248\f
3249/* Return 1 if INSN is an unconditional jump and nothing else. */
3250
3251int
3252simplejump_p (insn)
3253 rtx insn;
3254{
3255 return (GET_CODE (insn) == JUMP_INSN
3256 && GET_CODE (PATTERN (insn)) == SET
3257 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3258 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3259}
3260
3261/* Return nonzero if INSN is a (possibly) conditional jump
3262 and nothing more. */
3263
3264int
3265condjump_p (insn)
3266 rtx insn;
3267{
3268 register rtx x = PATTERN (insn);
3480bb98
JL
3269 if (GET_CODE (x) != SET)
3270 return 0;
3271 if (GET_CODE (SET_DEST (x)) != PC)
3272 return 0;
3273 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3274 return 1;
3275 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3276 return 0;
3277 if (XEXP (SET_SRC (x), 2) == pc_rtx
3278 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3279 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3280 return 1;
3281 if (XEXP (SET_SRC (x), 1) == pc_rtx
3282 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3283 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3284 return 1;
3285 return 0;
3286}
3287
3288/* Return nonzero if INSN is a (possibly) conditional jump
3289 and nothing more. */
3290
3291int
3292condjump_in_parallel_p (insn)
3293 rtx insn;
3294{
3295 register rtx x = PATTERN (insn);
3296
3297 if (GET_CODE (x) != PARALLEL)
3298 return 0;
3299 else
3300 x = XVECEXP (x, 0, 0);
3301
15a63be1
RK
3302 if (GET_CODE (x) != SET)
3303 return 0;
3304 if (GET_CODE (SET_DEST (x)) != PC)
3305 return 0;
3306 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3307 return 1;
3308 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3309 return 0;
3310 if (XEXP (SET_SRC (x), 2) == pc_rtx
3311 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3312 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3313 return 1;
3314 if (XEXP (SET_SRC (x), 1) == pc_rtx
3315 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3316 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3317 return 1;
3318 return 0;
3319}
3320
3321/* Return 1 if X is an RTX that does nothing but set the condition codes
3322 and CLOBBER or USE registers.
3323 Return -1 if X does explicitly set the condition codes,
3324 but also does other things. */
3325
3326int
3327sets_cc0_p (x)
3328 rtx x;
3329{
3330#ifdef HAVE_cc0
3331 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3332 return 1;
3333 if (GET_CODE (x) == PARALLEL)
3334 {
3335 int i;
3336 int sets_cc0 = 0;
3337 int other_things = 0;
3338 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3339 {
3340 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3341 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3342 sets_cc0 = 1;
3343 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3344 other_things = 1;
3345 }
3346 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3347 }
3348 return 0;
3349#else
3350 abort ();
3351#endif
3352}
3353\f
3354/* Follow any unconditional jump at LABEL;
3355 return the ultimate label reached by any such chain of jumps.
3356 If LABEL is not followed by a jump, return LABEL.
2d20b9df
RS
3357 If the chain loops or we can't find end, return LABEL,
3358 since that tells caller to avoid changing the insn.
15a63be1
RK
3359
3360 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3361 a USE or CLOBBER. */
3362
3363rtx
3364follow_jumps (label)
3365 rtx label;
3366{
3367 register rtx insn;
3368 register rtx next;
3369 register rtx value = label;
3370 register int depth;
3371
3372 for (depth = 0;
3373 (depth < 10
3374 && (insn = next_active_insn (value)) != 0
3375 && GET_CODE (insn) == JUMP_INSN
a9cc9061
JL
3376 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3377 || GET_CODE (PATTERN (insn)) == RETURN)
15a63be1
RK
3378 && (next = NEXT_INSN (insn))
3379 && GET_CODE (next) == BARRIER);
3380 depth++)
3381 {
3382 /* Don't chain through the insn that jumps into a loop
3383 from outside the loop,
3384 since that would create multiple loop entry jumps
3385 and prevent loop optimization. */
3386 rtx tem;
3387 if (!reload_completed)
3388 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3389 if (GET_CODE (tem) == NOTE
f6a6a1b3
DE
3390 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3391 /* ??? Optional. Disables some optimizations, but makes
3392 gcov output more accurate with -O. */
3393 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
15a63be1
RK
3394 return value;
3395
3396 /* If we have found a cycle, make the insn jump to itself. */
3397 if (JUMP_LABEL (insn) == label)
2d20b9df 3398 return label;
b209b3c5
JVA
3399
3400 tem = next_active_insn (JUMP_LABEL (insn));
3401 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3402 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3403 break;
3404
15a63be1
RK
3405 value = JUMP_LABEL (insn);
3406 }
2d20b9df
RS
3407 if (depth == 10)
3408 return label;
15a63be1
RK
3409 return value;
3410}
3411
3412/* Assuming that field IDX of X is a vector of label_refs,
3413 replace each of them by the ultimate label reached by it.
3414 Return nonzero if a change is made.
3415 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3416
3417static int
3418tension_vector_labels (x, idx)
3419 register rtx x;
3420 register int idx;
3421{
3422 int changed = 0;
3423 register int i;
3424 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3425 {
3426 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3427 register rtx nlabel = follow_jumps (olabel);
3428 if (nlabel && nlabel != olabel)
3429 {
3430 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3431 ++LABEL_NUSES (nlabel);
3432 if (--LABEL_NUSES (olabel) == 0)
3433 delete_insn (olabel);
3434 changed = 1;
3435 }
3436 }
3437 return changed;
3438}
3439\f
3440/* Find all CODE_LABELs referred to in X, and increment their use counts.
3441 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3442 in INSN, then store one of them in JUMP_LABEL (INSN).
3443 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3444 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3445 Also, when there are consecutive labels, canonicalize on the last of them.
3446
3447 Note that two labels separated by a loop-beginning note
3448 must be kept distinct if we have not yet done loop-optimization,
3449 because the gap between them is where loop-optimize
3450 will want to move invariant code to. CROSS_JUMP tells us
3451 that loop-optimization is done with.
3452
3453 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3454 two labels distinct if they are separated by only USE or CLOBBER insns. */
3455
3456static void
3457mark_jump_label (x, insn, cross_jump)
3458 register rtx x;
3459 rtx insn;
3460 int cross_jump;
3461{
3462 register RTX_CODE code = GET_CODE (x);
3463 register int i;
3464 register char *fmt;
3465
3466 switch (code)
3467 {
3468 case PC:
3469 case CC0:
3470 case REG:
3471 case SUBREG:
3472 case CONST_INT:
3473 case SYMBOL_REF:
3474 case CONST_DOUBLE:
3475 case CLOBBER:
3476 case CALL:
3477 return;
3478
d7ea4cf6
RK
3479 case MEM:
3480 /* If this is a constant-pool reference, see if it is a label. */
3481 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3482 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3483 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3484 break;
3485
15a63be1
RK
3486 case LABEL_REF:
3487 {
5c5e36c5
RK
3488 rtx label = XEXP (x, 0);
3489 rtx olabel = label;
3490 rtx note;
3491 rtx next;
3492
15a63be1
RK
3493 if (GET_CODE (label) != CODE_LABEL)
3494 abort ();
5c5e36c5 3495
705f26cf
RS
3496 /* Ignore references to labels of containing functions. */
3497 if (LABEL_REF_NONLOCAL_P (x))
3498 break;
5c5e36c5 3499
15a63be1
RK
3500 /* If there are other labels following this one,
3501 replace it with the last of the consecutive labels. */
3502 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3503 {
3504 if (GET_CODE (next) == CODE_LABEL)
3505 label = next;
3506 else if (cross_jump && GET_CODE (next) == INSN
3507 && (GET_CODE (PATTERN (next)) == USE
3508 || GET_CODE (PATTERN (next)) == CLOBBER))
3509 continue;
3510 else if (GET_CODE (next) != NOTE)
3511 break;
3512 else if (! cross_jump
3513 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
f6a6a1b3
DE
3514 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3515 /* ??? Optional. Disables some optimizations, but
3516 makes gcov output more accurate with -O. */
3517 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
15a63be1
RK
3518 break;
3519 }
5c5e36c5 3520
15a63be1 3521 XEXP (x, 0) = label;
ac9b3c97
R
3522 if (! insn || ! INSN_DELETED_P (insn))
3523 ++LABEL_NUSES (label);
5c5e36c5 3524
15a63be1
RK
3525 if (insn)
3526 {
3527 if (GET_CODE (insn) == JUMP_INSN)
3528 JUMP_LABEL (insn) = label;
5c5e36c5
RK
3529
3530 /* If we've changed OLABEL and we had a REG_LABEL note
3531 for it, update it as well. */
3532 else if (label != olabel
3533 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3534 XEXP (note, 0) = label;
3535
3536 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3537 is one. */
0e690bdb 3538 else if (! find_reg_note (insn, REG_LABEL, label))
15a63be1 3539 {
e105f02c
JL
3540 /* This code used to ignore labels which refered to dispatch
3541 tables to avoid flow.c generating worse code.
3542
3543 However, in the presense of global optimizations like
3544 gcse which call find_basic_blocks without calling
3545 life_analysis, not recording such labels will lead
3546 to compiler aborts because of inconsistencies in the
3547 flow graph. So we go ahead and record the label.
3548
3549 It may also be the case that the optimization argument
3550 is no longer valid because of the more accurate cfg
3551 we build in find_basic_blocks -- it no longer pessimizes
3552 code when it finds a REG_LABEL note. */
3553 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3554 REG_NOTES (insn));
15a63be1
RK
3555 }
3556 }
3557 return;
3558 }
3559
3560 /* Do walk the labels in a vector, but not the first operand of an
3561 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3562 case ADDR_VEC:
3563 case ADDR_DIFF_VEC:
ac9b3c97
R
3564 if (! INSN_DELETED_P (insn))
3565 {
3566 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
15a63be1 3567
ac9b3c97
R
3568 for (i = 0; i < XVECLEN (x, eltnum); i++)
3569 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3570 }
e9a25f70
JL
3571 return;
3572
3573 default:
3574 break;
15a63be1
RK
3575 }
3576
3577 fmt = GET_RTX_FORMAT (code);
3578 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3579 {
3580 if (fmt[i] == 'e')
3581 mark_jump_label (XEXP (x, i), insn, cross_jump);
3582 else if (fmt[i] == 'E')
3583 {
3584 register int j;
3585 for (j = 0; j < XVECLEN (x, i); j++)
3586 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3587 }
3588 }
3589}
3590
3591/* If all INSN does is set the pc, delete it,
3592 and delete the insn that set the condition codes for it
3593 if that's what the previous thing was. */
3594
3595void
3596delete_jump (insn)
3597 rtx insn;
3598{
3e5478ea
RK
3599 register rtx set = single_set (insn);
3600
3601 if (set && GET_CODE (SET_DEST (set)) == PC)
3602 delete_computation (insn);
3603}
3604
3605/* Delete INSN and recursively delete insns that compute values used only
3606 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3607 If we are running before flow.c, we need do nothing since flow.c will
3608 delete dead code. We also can't know if the registers being used are
3609 dead or not at this point.
3610
3611 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3612 nothing other than set a register that dies in this insn, we can delete
3613 that insn as well.
3614
3615 On machines with CC0, if CC0 is used in this insn, we may be able to
3616 delete the insn that set it. */
3617
8cd2aff2 3618static void
3e5478ea
RK
3619delete_computation (insn)
3620 rtx insn;
3621{
3622 rtx note, next;
15a63be1 3623
15a63be1 3624#ifdef HAVE_cc0
2fb95912 3625 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3e5478ea 3626 {
77472c5a 3627 rtx prev = prev_nonnote_insn (insn);
15a63be1
RK
3628 /* We assume that at this stage
3629 CC's are always set explicitly
3630 and always immediately before the jump that
3631 will use them. So if the previous insn
3632 exists to set the CC's, delete it
3633 (unless it performs auto-increments, etc.). */
3634 if (prev && GET_CODE (prev) == INSN
3635 && sets_cc0_p (PATTERN (prev)))
3636 {
3637 if (sets_cc0_p (PATTERN (prev)) > 0
5f4f0e22 3638 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3e5478ea 3639 delete_computation (prev);
15a63be1
RK
3640 else
3641 /* Otherwise, show that cc0 won't be used. */
38a448ca
RH
3642 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3643 cc0_rtx, REG_NOTES (prev));
15a63be1 3644 }
77472c5a 3645 }
3e5478ea 3646#endif
15a63be1 3647
77472c5a
TW
3648 for (note = REG_NOTES (insn); note; note = next)
3649 {
3650 rtx our_prev;
15a63be1 3651
77472c5a 3652 next = XEXP (note, 1);
15a63be1 3653
77472c5a
TW
3654 if (REG_NOTE_KIND (note) != REG_DEAD
3655 /* Verify that the REG_NOTE is legitimate. */
3656 || GET_CODE (XEXP (note, 0)) != REG)
3657 continue;
15a63be1 3658
77472c5a
TW
3659 for (our_prev = prev_nonnote_insn (insn);
3660 our_prev && GET_CODE (our_prev) == INSN;
3661 our_prev = prev_nonnote_insn (our_prev))
3662 {
3663 /* If we reach a SEQUENCE, it is too complex to try to
3664 do anything with it, so give up. */
3665 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3666 break;
15a63be1 3667
77472c5a
TW
3668 if (GET_CODE (PATTERN (our_prev)) == USE
3669 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3670 /* reorg creates USEs that look like this. We leave them
3671 alone because reorg needs them for its own purposes. */
3672 break;
15a63be1 3673
77472c5a
TW
3674 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3675 {
3676 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3677 break;
15a63be1 3678
77472c5a
TW
3679 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3680 {
3681 /* If we find a SET of something else, we can't
3682 delete the insn. */
15a63be1 3683
77472c5a 3684 int i;
15a63be1 3685
77472c5a
TW
3686 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3687 {
3688 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
15a63be1 3689
77472c5a
TW
3690 if (GET_CODE (part) == SET
3691 && SET_DEST (part) != XEXP (note, 0))
3692 break;
3693 }
15a63be1 3694
77472c5a
TW
3695 if (i == XVECLEN (PATTERN (our_prev), 0))
3696 delete_computation (our_prev);
3697 }
3698 else if (GET_CODE (PATTERN (our_prev)) == SET
3699 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3700 delete_computation (our_prev);
3701
3702 break;
3703 }
3704
3705 /* If OUR_PREV references the register that dies here, it is an
3706 additional use. Hence any prior SET isn't dead. However, this
3707 insn becomes the new place for the REG_DEAD note. */
3708 if (reg_overlap_mentioned_p (XEXP (note, 0),
3709 PATTERN (our_prev)))
3710 {
3711 XEXP (note, 1) = REG_NOTES (our_prev);
3712 REG_NOTES (our_prev) = note;
3713 break;
3714 }
3715 }
15a63be1 3716 }
3e5478ea 3717
77472c5a 3718 delete_insn (insn);
15a63be1
RK
3719}
3720\f
3721/* Delete insn INSN from the chain of insns and update label ref counts.
3722 May delete some following insns as a consequence; may even delete
3723 a label elsewhere and insns that follow it.
3724
3725 Returns the first insn after INSN that was not deleted. */
3726
3727rtx
3728delete_insn (insn)
3729 register rtx insn;
3730{
3731 register rtx next = NEXT_INSN (insn);
3732 register rtx prev = PREV_INSN (insn);
196cedd0
RS
3733 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3734 register int dont_really_delete = 0;
15a63be1
RK
3735
3736 while (next && INSN_DELETED_P (next))
3737 next = NEXT_INSN (next);
3738
3739 /* This insn is already deleted => return first following nondeleted. */
3740 if (INSN_DELETED_P (insn))
3741 return next;
3742
196cedd0
RS
3743 /* Don't delete user-declared labels. Convert them to special NOTEs
3744 instead. */
9571f079
RK
3745 if (was_code_label && LABEL_NAME (insn) != 0
3746 && optimize && ! dont_really_delete)
196cedd0
RS
3747 {
3748 PUT_CODE (insn, NOTE);
3749 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3750 NOTE_SOURCE_FILE (insn) = 0;
3751 dont_really_delete = 1;
3752 }
3753 else
3754 /* Mark this insn as deleted. */
3755 INSN_DELETED_P (insn) = 1;
15a63be1
RK
3756
3757 /* If this is an unconditional jump, delete it from the jump chain. */
3758 if (simplejump_p (insn))
3759 delete_from_jump_chain (insn);
3760
3761 /* If instruction is followed by a barrier,
3762 delete the barrier too. */
3763
3764 if (next != 0 && GET_CODE (next) == BARRIER)
3765 {
3766 INSN_DELETED_P (next) = 1;
3767 next = NEXT_INSN (next);
3768 }
3769
3770 /* Patch out INSN (and the barrier if any) */
3771
196cedd0 3772 if (optimize && ! dont_really_delete)
15a63be1
RK
3773 {
3774 if (prev)
3775 {
3776 NEXT_INSN (prev) = next;
3777 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3778 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3779 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3780 }
3781
3782 if (next)
3783 {
3784 PREV_INSN (next) = prev;
3785 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3786 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3787 }
3788
3789 if (prev && NEXT_INSN (prev) == 0)
3790 set_last_insn (prev);
3791 }
3792
3793 /* If deleting a jump, decrement the count of the label,
3794 and delete the label if it is now unused. */
3795
3796 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3797 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3798 {
3799 /* This can delete NEXT or PREV,
3800 either directly if NEXT is JUMP_LABEL (INSN),
3801 or indirectly through more levels of jumps. */
3802 delete_insn (JUMP_LABEL (insn));
3803 /* I feel a little doubtful about this loop,
3804 but I see no clean and sure alternative way
3805 to find the first insn after INSN that is not now deleted.
3806 I hope this works. */
3807 while (next && INSN_DELETED_P (next))
3808 next = NEXT_INSN (next);
3809 return next;
3810 }
3811
3c7d7a4a
DE
3812 /* Likewise if we're deleting a dispatch table. */
3813
3814 if (GET_CODE (insn) == JUMP_INSN
3815 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3816 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3817 {
3818 rtx pat = PATTERN (insn);
3819 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3820 int len = XVECLEN (pat, diff_vec_p);
3821
3822 for (i = 0; i < len; i++)
3823 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3824 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3825 while (next && INSN_DELETED_P (next))
3826 next = NEXT_INSN (next);
3827 return next;
3828 }
3829
15a63be1
RK
3830 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3831 prev = PREV_INSN (prev);
3832
3833 /* If INSN was a label and a dispatch table follows it,
3834 delete the dispatch table. The tablejump must have gone already.
3835 It isn't useful to fall through into a table. */
3836
196cedd0 3837 if (was_code_label
15a63be1
RK
3838 && NEXT_INSN (insn) != 0
3839 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3840 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3841 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3842 next = delete_insn (NEXT_INSN (insn));
3843
3844 /* If INSN was a label, delete insns following it if now unreachable. */
3845
196cedd0 3846 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
15a63be1
RK
3847 {
3848 register RTX_CODE code;
3849 while (next != 0
8cd2aff2 3850 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
4134d7fc 3851 || code == NOTE || code == BARRIER
2e1dbf22 3852 || (code == CODE_LABEL && INSN_DELETED_P (next))))
15a63be1
RK
3853 {
3854 if (code == NOTE
3855 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3856 next = NEXT_INSN (next);
2e1dbf22
RS
3857 /* Keep going past other deleted labels to delete what follows. */
3858 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3859 next = NEXT_INSN (next);
15a63be1
RK
3860 else
3861 /* Note: if this deletes a jump, it can cause more
3862 deletion of unreachable code, after a different label.
3863 As long as the value from this recursive call is correct,
3864 this invocation functions correctly. */
3865 next = delete_insn (next);
3866 }
3867 }
3868
3869 return next;
3870}
3871
3872/* Advance from INSN till reaching something not deleted
3873 then return that. May return INSN itself. */
3874
3875rtx
3876next_nondeleted_insn (insn)
3877 rtx insn;
3878{
3879 while (INSN_DELETED_P (insn))
3880 insn = NEXT_INSN (insn);
3881 return insn;
3882}
3883\f
3884/* Delete a range of insns from FROM to TO, inclusive.
3885 This is for the sake of peephole optimization, so assume
3886 that whatever these insns do will still be done by a new
3887 peephole insn that will replace them. */
3888
3889void
3890delete_for_peephole (from, to)
3891 register rtx from, to;
3892{
3893 register rtx insn = from;
3894
3895 while (1)
3896 {
3897 register rtx next = NEXT_INSN (insn);
3898 register rtx prev = PREV_INSN (insn);
3899
3900 if (GET_CODE (insn) != NOTE)
3901 {
3902 INSN_DELETED_P (insn) = 1;
3903
3904 /* Patch this insn out of the chain. */
3905 /* We don't do this all at once, because we
3906 must preserve all NOTEs. */
3907 if (prev)
3908 NEXT_INSN (prev) = next;
3909
3910 if (next)
3911 PREV_INSN (next) = prev;
3912 }
3913
3914 if (insn == to)
3915 break;
3916 insn = next;
3917 }
3918
3919 /* Note that if TO is an unconditional jump
3920 we *do not* delete the BARRIER that follows,
3921 since the peephole that replaces this sequence
3922 is also an unconditional jump in that case. */
3923}
3924\f
3925/* Invert the condition of the jump JUMP, and make it jump
3926 to label NLABEL instead of where it jumps now. */
3927
3928int
3929invert_jump (jump, nlabel)
3930 rtx jump, nlabel;
3931{
15a63be1
RK
3932 /* We have to either invert the condition and change the label or
3933 do neither. Either operation could fail. We first try to invert
3934 the jump. If that succeeds, we try changing the label. If that fails,
3935 we invert the jump back to what it was. */
3936
3937 if (! invert_exp (PATTERN (jump), jump))
3938 return 0;
3939
3940 if (redirect_jump (jump, nlabel))
f6a6a1b3
DE
3941 {
3942 if (flag_branch_probabilities)
3943 {
3944 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3945
3946 /* An inverted jump means that a probability taken becomes a
3947 probability not taken. Subtract the branch probability from the
3948 probability base to convert it back to a taken probability.
3949 (We don't flip the probability on a branch that's never taken. */
3950 if (note && XINT (XEXP (note, 0), 0) >= 0)
3951 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3952 }
3953
3954 return 1;
3955 }
15a63be1
RK
3956
3957 if (! invert_exp (PATTERN (jump), jump))
3958 /* This should just be putting it back the way it was. */
3959 abort ();
3960
3961 return 0;
3962}
3963
3964/* Invert the jump condition of rtx X contained in jump insn, INSN.
3965
3966 Return 1 if we can do so, 0 if we cannot find a way to do so that
3967 matches a pattern. */
3968
4214a505 3969int
15a63be1
RK
3970invert_exp (x, insn)
3971 rtx x;
3972 rtx insn;
3973{
3974 register RTX_CODE code;
3975 register int i;
3976 register char *fmt;
3977
3978 code = GET_CODE (x);
3979
3980 if (code == IF_THEN_ELSE)
3981 {
3982 register rtx comp = XEXP (x, 0);
3983 register rtx tem;
3984
3985 /* We can do this in two ways: The preferable way, which can only
3986 be done if this is not an integer comparison, is to reverse
3987 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3988 of the IF_THEN_ELSE. If we can't do either, fail. */
3989
3990 if (can_reverse_comparison_p (comp, insn)
3991 && validate_change (insn, &XEXP (x, 0),
38a448ca
RH
3992 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3993 GET_MODE (comp), XEXP (comp, 0),
3994 XEXP (comp, 1)), 0))
15a63be1
RK
3995 return 1;
3996
3997 tem = XEXP (x, 1);
3998 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
3999 validate_change (insn, &XEXP (x, 2), tem, 1);
4000 return apply_change_group ();
4001 }
4002
4003 fmt = GET_RTX_FORMAT (code);
4004 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4005 {
4006 if (fmt[i] == 'e')
4007 if (! invert_exp (XEXP (x, i), insn))
4008 return 0;
4009 if (fmt[i] == 'E')
4010 {
4011 register int j;
4012 for (j = 0; j < XVECLEN (x, i); j++)
4013 if (!invert_exp (XVECEXP (x, i, j), insn))
4014 return 0;
4015 }
4016 }
4017
4018 return 1;
4019}
4020\f
4021/* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4022 If the old jump target label is unused as a result,
4023 it and the code following it may be deleted.
4024
4025 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4026 RETURN insn.
4027
4028 The return value will be 1 if the change was made, 0 if it wasn't (this
4029 can only occur for NLABEL == 0). */
4030
4031int
4032redirect_jump (jump, nlabel)
4033 rtx jump, nlabel;
4034{
4035 register rtx olabel = JUMP_LABEL (jump);
4036
4037 if (nlabel == olabel)
4038 return 1;
4039
4040 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4041 return 0;
4042
4043 /* If this is an unconditional branch, delete it from the jump_chain of
4044 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4045 have UID's in range and JUMP_CHAIN is valid). */
4046 if (jump_chain && (simplejump_p (jump)
4047 || GET_CODE (PATTERN (jump)) == RETURN))
4048 {
4049 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4050
4051 delete_from_jump_chain (jump);
2d20b9df
RS
4052 if (label_index < max_jump_chain
4053 && INSN_UID (jump) < max_jump_chain)
15a63be1
RK
4054 {
4055 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4056 jump_chain[label_index] = jump;
4057 }
4058 }
4059
4060 JUMP_LABEL (jump) = nlabel;
4061 if (nlabel)
4062 ++LABEL_NUSES (nlabel);
4063
4064 if (olabel && --LABEL_NUSES (olabel) == 0)
4065 delete_insn (olabel);
4066
4067 return 1;
4068}
4069
4070/* Delete the instruction JUMP from any jump chain it might be on. */
4071
4072static void
4073delete_from_jump_chain (jump)
4074 rtx jump;
4075{
4076 int index;
4077 rtx olabel = JUMP_LABEL (jump);
4078
4079 /* Handle unconditional jumps. */
4080 if (jump_chain && olabel != 0
4081 && INSN_UID (olabel) < max_jump_chain
4082 && simplejump_p (jump))
4083 index = INSN_UID (olabel);
4084 /* Handle return insns. */
4085 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4086 index = 0;
4087 else return;
4088
4089 if (jump_chain[index] == jump)
4090 jump_chain[index] = jump_chain[INSN_UID (jump)];
4091 else
4092 {
4093 rtx insn;
4094
4095 for (insn = jump_chain[index];
4096 insn != 0;
4097 insn = jump_chain[INSN_UID (insn)])
4098 if (jump_chain[INSN_UID (insn)] == jump)
4099 {
4100 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4101 break;
4102 }
4103 }
4104}
4105
4106/* If NLABEL is nonzero, throughout the rtx at LOC,
4107 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4108 zero, alter (RETURN) to (LABEL_REF NLABEL).
4109
4110 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4111 validity with validate_change. Convert (set (pc) (label_ref olabel))
4112 to (return).
4113
4114 Return 0 if we found a change we would like to make but it is invalid.
4115 Otherwise, return 1. */
4116
4214a505 4117int
15a63be1
RK
4118redirect_exp (loc, olabel, nlabel, insn)
4119 rtx *loc;
4120 rtx olabel, nlabel;
4121 rtx insn;
4122{
4123 register rtx x = *loc;
4124 register RTX_CODE code = GET_CODE (x);
4125 register int i;
4126 register char *fmt;
4127
4128 if (code == LABEL_REF)
4129 {
4130 if (XEXP (x, 0) == olabel)
4131 {
4132 if (nlabel)
4133 XEXP (x, 0) = nlabel;
4134 else
38a448ca 4135 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
15a63be1
RK
4136 return 1;
4137 }
4138 }
4139 else if (code == RETURN && olabel == 0)
4140 {
38a448ca 4141 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
15a63be1 4142 if (loc == &PATTERN (insn))
38a448ca 4143 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
15a63be1
RK
4144 return validate_change (insn, loc, x, 0);
4145 }
4146
4147 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4148 && GET_CODE (SET_SRC (x)) == LABEL_REF
4149 && XEXP (SET_SRC (x), 0) == olabel)
38a448ca 4150 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
15a63be1
RK
4151
4152 fmt = GET_RTX_FORMAT (code);
4153 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4154 {
4155 if (fmt[i] == 'e')
4156 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4157 return 0;
4158 if (fmt[i] == 'E')
4159 {
4160 register int j;
4161 for (j = 0; j < XVECLEN (x, i); j++)
4162 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4163 return 0;
4164 }
4165 }
4166
4167 return 1;
4168}
4169\f
4170/* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4171
4172 If the old jump target label (before the dispatch table) becomes unused,
4173 it and the dispatch table may be deleted. In that case, find the insn
6dc42e49 4174 before the jump references that label and delete it and logical successors
15a63be1
RK
4175 too. */
4176
8cd2aff2 4177static void
15a63be1
RK
4178redirect_tablejump (jump, nlabel)
4179 rtx jump, nlabel;
4180{
4181 register rtx olabel = JUMP_LABEL (jump);
4182
4183 /* Add this jump to the jump_chain of NLABEL. */
4184 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4185 && INSN_UID (jump) < max_jump_chain)
4186 {
4187 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4188 jump_chain[INSN_UID (nlabel)] = jump;
4189 }
4190
4191 PATTERN (jump) = gen_jump (nlabel);
4192 JUMP_LABEL (jump) = nlabel;
4193 ++LABEL_NUSES (nlabel);
4194 INSN_CODE (jump) = -1;
4195
4196 if (--LABEL_NUSES (olabel) == 0)
4197 {
4198 delete_labelref_insn (jump, olabel, 0);
4199 delete_insn (olabel);
4200 }
4201}
4202
4203/* Find the insn referencing LABEL that is a logical predecessor of INSN.
4204 If we found one, delete it and then delete this insn if DELETE_THIS is
4205 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4206
4207static int
4208delete_labelref_insn (insn, label, delete_this)
4209 rtx insn, label;
4210 int delete_this;
4211{
4212 int deleted = 0;
4213 rtx link;
4214
4215 if (GET_CODE (insn) != NOTE
4216 && reg_mentioned_p (label, PATTERN (insn)))
4217 {
4218 if (delete_this)
4219 {
4220 delete_insn (insn);
4221 deleted = 1;
4222 }
4223 else
4224 return 1;
4225 }
4226
4227 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4228 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4229 {
4230 if (delete_this)
4231 {
4232 delete_insn (insn);
4233 deleted = 1;
4234 }
4235 else
4236 return 1;
4237 }
4238
4239 return deleted;
4240}
4241\f
4242/* Like rtx_equal_p except that it considers two REGs as equal
4fe73cc1
RK
4243 if they renumber to the same value and considers two commutative
4244 operations to be the same if the order of the operands has been
8fc001f9
JL
4245 reversed.
4246
4247 ??? Addition is not commutative on the PA due to the weird implicit
4248 space register selection rules for memory addresses. Therefore, we
4249 don't consider a + b == b + a.
4250
4251 We could/should make this test a little tighter. Possibly only
4252 disabling it on the PA via some backend macro or only disabling this
4253 case when the PLUS is inside a MEM. */
15a63be1
RK
4254
4255int
4256rtx_renumbered_equal_p (x, y)
4257 rtx x, y;
4258{
4259 register int i;
4260 register RTX_CODE code = GET_CODE (x);
4261 register char *fmt;
4262
4263 if (x == y)
4264 return 1;
4fe73cc1 4265
15a63be1
RK
4266 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4267 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4268 && GET_CODE (SUBREG_REG (y)) == REG)))
4269 {
4fe73cc1
RK
4270 int reg_x = -1, reg_y = -1;
4271 int word_x = 0, word_y = 0;
15a63be1
RK
4272
4273 if (GET_MODE (x) != GET_MODE (y))
4274 return 0;
4275
4276 /* If we haven't done any renumbering, don't
4277 make any assumptions. */
4278 if (reg_renumber == 0)
4279 return rtx_equal_p (x, y);
4280
4281 if (code == SUBREG)
4282 {
4fe73cc1
RK
4283 reg_x = REGNO (SUBREG_REG (x));
4284 word_x = SUBREG_WORD (x);
4285
4286 if (reg_renumber[reg_x] >= 0)
4287 {
4288 reg_x = reg_renumber[reg_x] + word_x;
4289 word_x = 0;
4290 }
15a63be1 4291 }
4fe73cc1 4292
15a63be1
RK
4293 else
4294 {
4fe73cc1
RK
4295 reg_x = REGNO (x);
4296 if (reg_renumber[reg_x] >= 0)
4297 reg_x = reg_renumber[reg_x];
15a63be1 4298 }
4fe73cc1 4299
15a63be1
RK
4300 if (GET_CODE (y) == SUBREG)
4301 {
4fe73cc1
RK
4302 reg_y = REGNO (SUBREG_REG (y));
4303 word_y = SUBREG_WORD (y);
4304
4305 if (reg_renumber[reg_y] >= 0)
4306 {
4307 reg_y = reg_renumber[reg_y];
4308 word_y = 0;
4309 }
15a63be1 4310 }
4fe73cc1 4311
15a63be1
RK
4312 else
4313 {
4fe73cc1
RK
4314 reg_y = REGNO (y);
4315 if (reg_renumber[reg_y] >= 0)
4316 reg_y = reg_renumber[reg_y];
15a63be1 4317 }
4fe73cc1
RK
4318
4319 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
15a63be1 4320 }
4fe73cc1 4321
15a63be1
RK
4322 /* Now we have disposed of all the cases
4323 in which different rtx codes can match. */
4324 if (code != GET_CODE (y))
4325 return 0;
4fe73cc1 4326
15a63be1
RK
4327 switch (code)
4328 {
4329 case PC:
4330 case CC0:
4331 case ADDR_VEC:
4332 case ADDR_DIFF_VEC:
4333 return 0;
4334
4335 case CONST_INT:
38b3167e 4336 return INTVAL (x) == INTVAL (y);
15a63be1
RK
4337
4338 case LABEL_REF:
705f26cf
RS
4339 /* We can't assume nonlocal labels have their following insns yet. */
4340 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4341 return XEXP (x, 0) == XEXP (y, 0);
4fe73cc1 4342
15a63be1
RK
4343 /* Two label-refs are equivalent if they point at labels
4344 in the same position in the instruction stream. */
4345 return (next_real_insn (XEXP (x, 0))
4346 == next_real_insn (XEXP (y, 0)));
4347
4348 case SYMBOL_REF:
4349 return XSTR (x, 0) == XSTR (y, 0);
e9a25f70
JL
4350
4351 default:
4352 break;
15a63be1
RK
4353 }
4354
4355 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4356
4357 if (GET_MODE (x) != GET_MODE (y))
4358 return 0;
4359
4fe73cc1 4360 /* For commutative operations, the RTX match if the operand match in any
8fc001f9
JL
4361 order. Also handle the simple binary and unary cases without a loop.
4362
4363 ??? Don't consider PLUS a commutative operator; see comments above. */
4364 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4365 && code != PLUS)
4fe73cc1
RK
4366 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4367 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4368 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4369 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4370 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4371 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4372 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4373 else if (GET_RTX_CLASS (code) == '1')
4374 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4375
15a63be1
RK
4376 /* Compare the elements. If any pair of corresponding elements
4377 fail to match, return 0 for the whole things. */
4378
4379 fmt = GET_RTX_FORMAT (code);
4380 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4381 {
4382 register int j;
4383 switch (fmt[i])
4384 {
5f4f0e22
CH
4385 case 'w':
4386 if (XWINT (x, i) != XWINT (y, i))
4387 return 0;
4388 break;
4389
15a63be1
RK
4390 case 'i':
4391 if (XINT (x, i) != XINT (y, i))
4392 return 0;
4393 break;
4394
4395 case 's':
4396 if (strcmp (XSTR (x, i), XSTR (y, i)))
4397 return 0;
4398 break;
4399
4400 case 'e':
4401 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4402 return 0;
4403 break;
4404
4405 case 'u':
4406 if (XEXP (x, i) != XEXP (y, i))
4407 return 0;
4408 /* fall through. */
4409 case '0':
4410 break;
4411
4412 case 'E':
4413 if (XVECLEN (x, i) != XVECLEN (y, i))
4414 return 0;
4415 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4416 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4417 return 0;
4418 break;
4419
4420 default:
4421 abort ();
4422 }
4423 }
4424 return 1;
4425}
4426\f
4427/* If X is a hard register or equivalent to one or a subregister of one,
4428 return the hard register number. If X is a pseudo register that was not
4429 assigned a hard register, return the pseudo register number. Otherwise,
4430 return -1. Any rtx is valid for X. */
4431
4432int
4433true_regnum (x)
4434 rtx x;
4435{
4436 if (GET_CODE (x) == REG)
4437 {
4438 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4439 return reg_renumber[REGNO (x)];
4440 return REGNO (x);
4441 }
4442 if (GET_CODE (x) == SUBREG)
4443 {
4444 int base = true_regnum (SUBREG_REG (x));
4445 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4446 return SUBREG_WORD (x) + base;
4447 }
4448 return -1;
4449}
4450\f
4451/* Optimize code of the form:
4452
4453 for (x = a[i]; x; ...)
4454 ...
4455 for (x = a[i]; x; ...)
4456 ...
4457 foo:
4458
4459 Loop optimize will change the above code into
4460
4461 if (x = a[i])
4462 for (;;)
4463 { ...; if (! (x = ...)) break; }
4464 if (x = a[i])
4465 for (;;)
4466 { ...; if (! (x = ...)) break; }
4467 foo:
4468
4469 In general, if the first test fails, the program can branch
4470 directly to `foo' and skip the second try which is doomed to fail.
4471 We run this after loop optimization and before flow analysis. */
4472
4473/* When comparing the insn patterns, we track the fact that different
4474 pseudo-register numbers may have been used in each computation.
4475 The following array stores an equivalence -- same_regs[I] == J means
4476 that pseudo register I was used in the first set of tests in a context
4477 where J was used in the second set. We also count the number of such
4478 pending equivalences. If nonzero, the expressions really aren't the
4479 same. */
4480
7ee8a9d5 4481static int *same_regs;
15a63be1
RK
4482
4483static int num_same_regs;
4484
4485/* Track any registers modified between the target of the first jump and
4486 the second jump. They never compare equal. */
4487
4488static char *modified_regs;
4489
4490/* Record if memory was modified. */
4491
4492static int modified_mem;
4493
4494/* Called via note_stores on each insn between the target of the first
4495 branch and the second branch. It marks any changed registers. */
4496
4497static void
4498mark_modified_reg (dest, x)
4499 rtx dest;
487a6e06 4500 rtx x ATTRIBUTE_UNUSED;
15a63be1
RK
4501{
4502 int regno, i;
4503
4504 if (GET_CODE (dest) == SUBREG)
4505 dest = SUBREG_REG (dest);
4506
4507 if (GET_CODE (dest) == MEM)
4508 modified_mem = 1;
4509
4510 if (GET_CODE (dest) != REG)
4511 return;
4512
4513 regno = REGNO (dest);
4514 if (regno >= FIRST_PSEUDO_REGISTER)
4515 modified_regs[regno] = 1;
4516 else
4517 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4518 modified_regs[regno + i] = 1;
4519}
4520
4521/* F is the first insn in the chain of insns. */
4522
4523void
aa38b201 4524thread_jumps (f, max_reg, flag_before_loop)
15a63be1
RK
4525 rtx f;
4526 int max_reg;
aa38b201 4527 int flag_before_loop;
15a63be1
RK
4528{
4529 /* Basic algorithm is to find a conditional branch,
4530 the label it may branch to, and the branch after
4531 that label. If the two branches test the same condition,
4532 walk back from both branch paths until the insn patterns
4533 differ, or code labels are hit. If we make it back to
4534 the target of the first branch, then we know that the first branch
4535 will either always succeed or always fail depending on the relative
4536 senses of the two branches. So adjust the first branch accordingly
4537 in this case. */
4538
4539 rtx label, b1, b2, t1, t2;
4540 enum rtx_code code1, code2;
4541 rtx b1op0, b1op1, b2op0, b2op1;
4542 int changed = 1;
4543 int i;
7ee8a9d5 4544 int *all_reset;
15a63be1
RK
4545
4546 /* Allocate register tables and quick-reset table. */
4547 modified_regs = (char *) alloca (max_reg * sizeof (char));
7ee8a9d5
RK
4548 same_regs = (int *) alloca (max_reg * sizeof (int));
4549 all_reset = (int *) alloca (max_reg * sizeof (int));
15a63be1
RK
4550 for (i = 0; i < max_reg; i++)
4551 all_reset[i] = -1;
4552
4553 while (changed)
4554 {
4555 changed = 0;
4556
4557 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4558 {
4559 /* Get to a candidate branch insn. */
4560 if (GET_CODE (b1) != JUMP_INSN
4561 || ! condjump_p (b1) || simplejump_p (b1)
4562 || JUMP_LABEL (b1) == 0)
4563 continue;
4564
4565 bzero (modified_regs, max_reg * sizeof (char));
4566 modified_mem = 0;
4567
4c9a05bc
RK
4568 bcopy ((char *) all_reset, (char *) same_regs,
4569 max_reg * sizeof (int));
15a63be1
RK
4570 num_same_regs = 0;
4571
4572 label = JUMP_LABEL (b1);
4573
4574 /* Look for a branch after the target. Record any registers and
4575 memory modified between the target and the branch. Stop when we
4576 get to a label since we can't know what was changed there. */
4577 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4578 {
4579 if (GET_CODE (b2) == CODE_LABEL)
4580 break;
4581
4582 else if (GET_CODE (b2) == JUMP_INSN)
4583 {
4584 /* If this is an unconditional jump and is the only use of
4585 its target label, we can follow it. */
4586 if (simplejump_p (b2)
4587 && JUMP_LABEL (b2) != 0
4588 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4589 {
4590 b2 = JUMP_LABEL (b2);
4591 continue;
4592 }
4593 else
4594 break;
4595 }
4596
4597 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4598 continue;
4599
4600 if (GET_CODE (b2) == CALL_INSN)
4601 {
4602 modified_mem = 1;
4603 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4604 if (call_used_regs[i] && ! fixed_regs[i]
4605 && i != STACK_POINTER_REGNUM
4606 && i != FRAME_POINTER_REGNUM
cbe23927 4607 && i != HARD_FRAME_POINTER_REGNUM
15a63be1
RK
4608 && i != ARG_POINTER_REGNUM)
4609 modified_regs[i] = 1;
4610 }
4611
4612 note_stores (PATTERN (b2), mark_modified_reg);
4613 }
4614
4615 /* Check the next candidate branch insn from the label
4616 of the first. */
4617 if (b2 == 0
4618 || GET_CODE (b2) != JUMP_INSN
4619 || b2 == b1
4620 || ! condjump_p (b2)
4621 || simplejump_p (b2))
4622 continue;
4623
4624 /* Get the comparison codes and operands, reversing the
4625 codes if appropriate. If we don't have comparison codes,
4626 we can't do anything. */
4627 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4628 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4629 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4630 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4631 code1 = reverse_condition (code1);
4632
4633 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4634 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4635 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4636 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4637 code2 = reverse_condition (code2);
4638
4639 /* If they test the same things and knowing that B1 branches
4640 tells us whether or not B2 branches, check if we
4641 can thread the branch. */
4642 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4643 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4644 && (comparison_dominates_p (code1, code2)
cc5e1642
R
4645 || (comparison_dominates_p (code1, reverse_condition (code2))
4646 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4647 0),
4648 b1))))
15a63be1
RK
4649 {
4650 t1 = prev_nonnote_insn (b1);
4651 t2 = prev_nonnote_insn (b2);
4652
4653 while (t1 != 0 && t2 != 0)
4654 {
15a63be1
RK
4655 if (t2 == label)
4656 {
4657 /* We have reached the target of the first branch.
4658 If there are no pending register equivalents,
4659 we know that this branch will either always
4660 succeed (if the senses of the two branches are
4661 the same) or always fail (if not). */
4662 rtx new_label;
4663
4664 if (num_same_regs != 0)
4665 break;
4666
4667 if (comparison_dominates_p (code1, code2))
4668 new_label = JUMP_LABEL (b2);
4669 else
4670 new_label = get_label_after (b2);
4671
aa38b201
TG
4672 if (JUMP_LABEL (b1) != new_label)
4673 {
4674 rtx prev = PREV_INSN (new_label);
4675
4676 if (flag_before_loop
c71407f9 4677 && GET_CODE (prev) == NOTE
aa38b201
TG
4678 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4679 {
4680 /* Don't thread to the loop label. If a loop
4681 label is reused, loop optimization will
4682 be disabled for that loop. */
4683 new_label = gen_label_rtx ();
4684 emit_label_after (new_label, PREV_INSN (prev));
4685 }
4686 changed |= redirect_jump (b1, new_label);
4687 }
15a63be1
RK
4688 break;
4689 }
4690
4691 /* If either of these is not a normal insn (it might be
4692 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4693 have already been skipped above.) Similarly, fail
4694 if the insns are different. */
4695 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4696 || recog_memoized (t1) != recog_memoized (t2)
4697 || ! rtx_equal_for_thread_p (PATTERN (t1),
4698 PATTERN (t2), t2))
4699 break;
4700
4701 t1 = prev_nonnote_insn (t1);
4702 t2 = prev_nonnote_insn (t2);
4703 }
4704 }
4705 }
4706 }
4707}
4708\f
4709/* This is like RTX_EQUAL_P except that it knows about our handling of
4710 possibly equivalent registers and knows to consider volatile and
4711 modified objects as not equal.
4712
4713 YINSN is the insn containing Y. */
4714
4715int
4716rtx_equal_for_thread_p (x, y, yinsn)
4717 rtx x, y;
4718 rtx yinsn;
4719{
4720 register int i;
4721 register int j;
4722 register enum rtx_code code;
4723 register char *fmt;
4724
4725 code = GET_CODE (x);
4726 /* Rtx's of different codes cannot be equal. */
4727 if (code != GET_CODE (y))
4728 return 0;
4729
4730 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4731 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4732
4733 if (GET_MODE (x) != GET_MODE (y))
4734 return 0;
4735
35d9eabb
RK
4736 /* For floating-point, consider everything unequal. This is a bit
4737 pessimistic, but this pass would only rarely do anything for FP
4738 anyway. */
4739 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4740 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4741 return 0;
4742
413c72c2
RK
4743 /* For commutative operations, the RTX match if the operand match in any
4744 order. Also handle the simple binary and unary cases without a loop. */
4745 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
c5ea5f3b
RK
4746 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4747 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4748 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4749 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
413c72c2 4750 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
c5ea5f3b
RK
4751 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4752 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
413c72c2 4753 else if (GET_RTX_CLASS (code) == '1')
c5ea5f3b 4754 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
413c72c2 4755
15a63be1
RK
4756 /* Handle special-cases first. */
4757 switch (code)
4758 {
4759 case REG:
4760 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4761 return 1;
4762
4763 /* If neither is user variable or hard register, check for possible
4764 equivalence. */
4765 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4766 || REGNO (x) < FIRST_PSEUDO_REGISTER
4767 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4768 return 0;
4769
4770 if (same_regs[REGNO (x)] == -1)
4771 {
4772 same_regs[REGNO (x)] = REGNO (y);
4773 num_same_regs++;
4774
4775 /* If this is the first time we are seeing a register on the `Y'
4776 side, see if it is the last use. If not, we can't thread the
4777 jump, so mark it as not equivalent. */
b1f21e0a 4778 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
15a63be1
RK
4779 return 0;
4780
4781 return 1;
4782 }
4783 else
4784 return (same_regs[REGNO (x)] == REGNO (y));
4785
4786 break;
4787
4788 case MEM:
6dc42e49 4789 /* If memory modified or either volatile, not equivalent.
0f41302f 4790 Else, check address. */
15a63be1
RK
4791 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4792 return 0;
4793
4794 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4795
4796 case ASM_INPUT:
4797 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4798 return 0;
4799
4800 break;
4801
4802 case SET:
4803 /* Cancel a pending `same_regs' if setting equivalenced registers.
4804 Then process source. */
4805 if (GET_CODE (SET_DEST (x)) == REG
4806 && GET_CODE (SET_DEST (y)) == REG)
4807 {
4808 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4809 {
4810 same_regs[REGNO (SET_DEST (x))] = -1;
4811 num_same_regs--;
4812 }
4813 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4814 return 0;
4815 }
4816 else
4817 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4818 return 0;
4819
4820 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4821
4822 case LABEL_REF:
4823 return XEXP (x, 0) == XEXP (y, 0);
4824
4825 case SYMBOL_REF:
4826 return XSTR (x, 0) == XSTR (y, 0);
e9a25f70
JL
4827
4828 default:
4829 break;
15a63be1
RK
4830 }
4831
4832 if (x == y)
4833 return 1;
4834
4835 fmt = GET_RTX_FORMAT (code);
4836 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4837 {
4838 switch (fmt[i])
4839 {
5f4f0e22
CH
4840 case 'w':
4841 if (XWINT (x, i) != XWINT (y, i))
4842 return 0;
4843 break;
4844
15a63be1
RK
4845 case 'n':
4846 case 'i':
4847 if (XINT (x, i) != XINT (y, i))
4848 return 0;
4849 break;
4850
4851 case 'V':
4852 case 'E':
4853 /* Two vectors must have the same length. */
4854 if (XVECLEN (x, i) != XVECLEN (y, i))
4855 return 0;
4856
4857 /* And the corresponding elements must match. */
4858 for (j = 0; j < XVECLEN (x, i); j++)
4859 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4860 XVECEXP (y, i, j), yinsn) == 0)
4861 return 0;
4862 break;
4863
4864 case 'e':
4865 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4866 return 0;
4867 break;
4868
4869 case 'S':
4870 case 's':
4871 if (strcmp (XSTR (x, i), XSTR (y, i)))
4872 return 0;
4873 break;
4874
4875 case 'u':
4876 /* These are just backpointers, so they don't matter. */
4877 break;
4878
4879 case '0':
4880 break;
4881
4882 /* It is believed that rtx's at this level will never
4883 contain anything but integers and other rtx's,
4884 except for within LABEL_REFs and SYMBOL_REFs. */
4885 default:
4886 abort ();
4887 }
4888 }
4889 return 1;
4890}
956d6950
JL
4891\f
4892
7a87758d 4893#ifndef HAVE_cc0
956d6950
JL
4894/* Return the insn that NEW can be safely inserted in front of starting at
4895 the jump insn INSN. Return 0 if it is not safe to do this jump
4896 optimization. Note that NEW must contain a single set. */
4897
4898static rtx
4899find_insert_position (insn, new)
4900 rtx insn;
4901 rtx new;
4902{
4903 int i;
4904 rtx prev;
4905
4906 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4907 if (GET_CODE (PATTERN (new)) != PARALLEL)
4908 return insn;
4909
4910 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4911 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4912 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4913 insn))
4914 break;
4915
4916 if (i < 0)
4917 return insn;
4918
4919 /* There is a good chance that the previous insn PREV sets the thing
4920 being clobbered (often the CC in a hard reg). If PREV does not
4921 use what NEW sets, we can insert NEW before PREV. */
4922
4923 prev = prev_active_insn (insn);
4924 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4925 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4926 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4927 insn)
4928 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4929 prev))
4930 return 0;
4931
4932 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4933}
06abe5a4 4934#endif /* !HAVE_cc0 */
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