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175160e7 1/* Procedure integration for GNU CC.
15e13f2c 2 Copyright (C) 1988, 91, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
175160e7
MT
3 Contributed by Michael Tiemann (tiemann@cygnus.com)
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
a35311b0
RK
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
175160e7
MT
21
22
175160e7 23#include "config.h"
e9a25f70 24#include <stdio.h>
ccd043a9
RL
25
26#ifdef HAVE_STDLIB_H
27#include <stdlib.h>
28#endif
29
175160e7
MT
30#include "rtl.h"
31#include "tree.h"
12307ca2 32#include "regs.h"
175160e7
MT
33#include "flags.h"
34#include "insn-config.h"
35#include "insn-flags.h"
36#include "expr.h"
37#include "output.h"
e9a25f70 38#include "recog.h"
175160e7
MT
39#include "integrate.h"
40#include "real.h"
6adb4e3a 41#include "except.h"
175160e7
MT
42#include "function.h"
43
44#include "obstack.h"
45#define obstack_chunk_alloc xmalloc
46#define obstack_chunk_free free
175160e7
MT
47
48extern struct obstack *function_maybepermanent_obstack;
49
50extern tree pushdecl ();
51extern tree poplevel ();
52
53/* Similar, but round to the next highest integer that meets the
54 alignment. */
55#define CEIL_ROUND(VALUE,ALIGN) (((VALUE) + (ALIGN) - 1) & ~((ALIGN)- 1))
56
57/* Default max number of insns a function can have and still be inline.
58 This is overridden on RISC machines. */
59#ifndef INTEGRATE_THRESHOLD
aec98e42
ML
60/* Inlining small functions might save more space then not inlining at
61 all. Assume 1 instruction for the call and 1.5 insns per argument. */
175160e7 62#define INTEGRATE_THRESHOLD(DECL) \
aec98e42
ML
63 (optimize_size \
64 ? (1 + (3 * list_length (DECL_ARGUMENTS (DECL)) / 2)) \
65 : (8 * (8 + list_length (DECL_ARGUMENTS (DECL)))))
175160e7
MT
66#endif
67\f
81fbaa41
RK
68static rtx initialize_for_inline PROTO((tree, int, int, int, int));
69static void finish_inline PROTO((tree, rtx));
70static void adjust_copied_decl_tree PROTO((tree));
71static tree copy_decl_list PROTO((tree));
72static tree copy_decl_tree PROTO((tree));
73static void copy_decl_rtls PROTO((tree));
74static void save_constants PROTO((rtx *));
75static void note_modified_parmregs PROTO((rtx, rtx));
76static rtx copy_for_inline PROTO((rtx));
77static void integrate_parm_decls PROTO((tree, struct inline_remap *, rtvec));
78static void integrate_decl_tree PROTO((tree, int, struct inline_remap *));
f6135b20 79static void save_constants_in_decl_trees PROTO ((tree));
81fbaa41
RK
80static void subst_constants PROTO((rtx *, rtx, struct inline_remap *));
81static void restore_constants PROTO((rtx *));
82static void set_block_origin_self PROTO((tree));
83static void set_decl_origin_self PROTO((tree));
84static void set_block_abstract_flags PROTO((tree, int));
85
86void set_decl_abstract_flags PROTO((tree, int));
175160e7 87\f
1f3d3a31
JL
88/* Returns the Ith entry in the label_map contained in MAP. If the
89 Ith entry has not yet been set, it is assumed to be a fresh label.
90 Essentially, we use this function to perform a lazy initialization
91 of label_map, thereby avoiding huge memory explosions when the
92 label_map gets very large. */
93rtx
94get_label_from_map (map, i)
95 struct inline_remap* map;
96 int i;
97{
98 rtx x = map->label_map[i];
99
100 if (x == NULL_RTX)
101 x = map->label_map[i] = gen_label_rtx();
102
103 return x;
104}
105
106
175160e7
MT
107/* Zero if the current function (whose FUNCTION_DECL is FNDECL)
108 is safe and reasonable to integrate into other functions.
109 Nonzero means value is a warning message with a single %s
110 for the function's name. */
111
112char *
113function_cannot_inline_p (fndecl)
114 register tree fndecl;
115{
116 register rtx insn;
117 tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
118 int max_insns = INTEGRATE_THRESHOLD (fndecl);
119 register int ninsns = 0;
120 register tree parms;
64ed0f40 121 rtx result;
175160e7
MT
122
123 /* No inlines with varargs. `grokdeclarator' gives a warning
124 message about that if `inline' is specified. This code
125 it put in to catch the volunteers. */
126 if ((last && TREE_VALUE (last) != void_type_node)
5d3fe1fe 127 || current_function_varargs)
175160e7
MT
128 return "varargs function cannot be inline";
129
130 if (current_function_calls_alloca)
131 return "function using alloca cannot be inline";
132
133 if (current_function_contains_functions)
134 return "function with nested functions cannot be inline";
135
175160e7 136 /* If its not even close, don't even look. */
216d5cdd 137 if (!DECL_INLINE (fndecl) && get_max_uid () > 3 * max_insns)
175160e7
MT
138 return "function too large to be inline";
139
175160e7
MT
140#if 0
141 /* Don't inline functions which do not specify a function prototype and
142 have BLKmode argument or take the address of a parameter. */
143 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
144 {
145 if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
146 TREE_ADDRESSABLE (parms) = 1;
147 if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
148 return "no prototype, and parameter address used; cannot be inline";
149 }
150#endif
151
152 /* We can't inline functions that return structures
153 the old-fashioned PCC way, copying into a static block. */
154 if (current_function_returns_pcc_struct)
155 return "inline functions not supported for this return value type";
156
203436d9
JL
157 /* We can't inline functions that return BLKmode structures in registers. */
158 if (TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl))) == BLKmode
159 && ! aggregate_value_p (TREE_TYPE (TREE_TYPE (fndecl))))
160 return "inline functions not supported for this return value type";
161
175160e7
MT
162 /* We can't inline functions that return structures of varying size. */
163 if (int_size_in_bytes (TREE_TYPE (TREE_TYPE (fndecl))) < 0)
164 return "function with varying-size return value cannot be inline";
165
c8ad69c1
RK
166 /* Cannot inline a function with a varying size argument or one that
167 receives a transparent union. */
175160e7 168 for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
c8ad69c1
RK
169 {
170 if (int_size_in_bytes (TREE_TYPE (parms)) < 0)
171 return "function with varying-size parameter cannot be inline";
172 else if (TYPE_TRANSPARENT_UNION (TREE_TYPE (parms)))
173 return "function with transparent unit parameter cannot be inline";
174 }
175160e7 175
216d5cdd 176 if (!DECL_INLINE (fndecl) && get_max_uid () > max_insns)
175160e7 177 {
12307ca2
RK
178 for (ninsns = 0, insn = get_first_nonparm_insn ();
179 insn && ninsns < max_insns;
175160e7 180 insn = NEXT_INSN (insn))
12307ca2
RK
181 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
182 ninsns++;
175160e7
MT
183
184 if (ninsns >= max_insns)
185 return "function too large to be inline";
186 }
187
ead02915
JW
188 /* We cannot inline this function if forced_labels is non-zero. This
189 implies that a label in this function was used as an initializer.
190 Because labels can not be duplicated, all labels in the function
191 will be renamed when it is inlined. However, there is no way to find
192 and fix all variables initialized with addresses of labels in this
193 function, hence inlining is impossible. */
194
195 if (forced_labels)
196 return "function with label addresses used in initializers cannot inline";
197
2edc3b33
JW
198 /* We cannot inline a nested function that jumps to a nonlocal label. */
199 if (current_function_has_nonlocal_goto)
200 return "function with nonlocal goto cannot be inline";
201
6adb4e3a
MS
202 /* This is a hack, until the inliner is taught about eh regions at
203 the start of the function. */
204 for (insn = get_insns ();
db3cf6fb
MS
205 insn
206 && ! (GET_CODE (insn) == NOTE
207 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG);
6adb4e3a
MS
208 insn = NEXT_INSN (insn))
209 {
210 if (insn && GET_CODE (insn) == NOTE
211 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EH_REGION_BEG)
212 return "function with complex parameters cannot be inline";
213 }
214
64ed0f40
JW
215 /* We can't inline functions that return a PARALLEL rtx. */
216 result = DECL_RTL (DECL_RESULT (fndecl));
217 if (result && GET_CODE (result) == PARALLEL)
218 return "inline functions not supported for this return value type";
219
175160e7
MT
220 return 0;
221}
222\f
223/* Variables used within save_for_inline. */
224
225/* Mapping from old pseudo-register to new pseudo-registers.
226 The first element of this map is reg_map[FIRST_PSEUDO_REGISTER].
227 It is allocated in `save_for_inline' and `expand_inline_function',
228 and deallocated on exit from each of those routines. */
229static rtx *reg_map;
230
231/* Mapping from old code-labels to new code-labels.
232 The first element of this map is label_map[min_labelno].
233 It is allocated in `save_for_inline' and `expand_inline_function',
234 and deallocated on exit from each of those routines. */
235static rtx *label_map;
236
237/* Mapping from old insn uid's to copied insns.
238 It is allocated in `save_for_inline' and `expand_inline_function',
239 and deallocated on exit from each of those routines. */
240static rtx *insn_map;
241
242/* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
243 Zero for a reg that isn't a parm's home.
244 Only reg numbers less than max_parm_reg are mapped here. */
245static tree *parmdecl_map;
246
247/* Keep track of first pseudo-register beyond those that are parms. */
e9a25f70
JL
248extern int max_parm_reg;
249extern rtx *parm_reg_stack_loc;
175160e7
MT
250
251/* When an insn is being copied by copy_for_inline,
252 this is nonzero if we have copied an ASM_OPERANDS.
253 In that case, it is the original input-operand vector. */
254static rtvec orig_asm_operands_vector;
255
256/* When an insn is being copied by copy_for_inline,
257 this is nonzero if we have copied an ASM_OPERANDS.
258 In that case, it is the copied input-operand vector. */
259static rtvec copy_asm_operands_vector;
260
261/* Likewise, this is the copied constraints vector. */
262static rtvec copy_asm_constraints_vector;
263
264/* In save_for_inline, nonzero if past the parm-initialization insns. */
265static int in_nonparm_insns;
266\f
267/* Subroutine for `save_for_inline{copying,nocopy}'. Performs initialization
268 needed to save FNDECL's insns and info for future inline expansion. */
269
270static rtx
271initialize_for_inline (fndecl, min_labelno, max_labelno, max_reg, copy)
272 tree fndecl;
273 int min_labelno;
274 int max_labelno;
275 int max_reg;
276 int copy;
277{
278 int function_flags, i;
279 rtvec arg_vector;
280 tree parms;
281
282 /* Compute the values of any flags we must restore when inlining this. */
283
284 function_flags
285 = (current_function_calls_alloca * FUNCTION_FLAGS_CALLS_ALLOCA
286 + current_function_calls_setjmp * FUNCTION_FLAGS_CALLS_SETJMP
287 + current_function_calls_longjmp * FUNCTION_FLAGS_CALLS_LONGJMP
288 + current_function_returns_struct * FUNCTION_FLAGS_RETURNS_STRUCT
289 + current_function_returns_pcc_struct * FUNCTION_FLAGS_RETURNS_PCC_STRUCT
290 + current_function_needs_context * FUNCTION_FLAGS_NEEDS_CONTEXT
291 + current_function_has_nonlocal_label * FUNCTION_FLAGS_HAS_NONLOCAL_LABEL
292 + current_function_returns_pointer * FUNCTION_FLAGS_RETURNS_POINTER
293 + current_function_uses_const_pool * FUNCTION_FLAGS_USES_CONST_POOL
294 + current_function_uses_pic_offset_table * FUNCTION_FLAGS_USES_PIC_OFFSET_TABLE);
295
296 /* Clear out PARMDECL_MAP. It was allocated in the caller's frame. */
4c9a05bc 297 bzero ((char *) parmdecl_map, max_parm_reg * sizeof (tree));
175160e7
MT
298 arg_vector = rtvec_alloc (list_length (DECL_ARGUMENTS (fndecl)));
299
300 for (parms = DECL_ARGUMENTS (fndecl), i = 0;
301 parms;
302 parms = TREE_CHAIN (parms), i++)
303 {
304 rtx p = DECL_RTL (parms);
305
8a173c73
RK
306 /* If we have (mem (addressof (mem ...))), use the inner MEM since
307 otherwise the copy_rtx call below will not unshare the MEM since
308 it shares ADDRESSOF. */
309 if (GET_CODE (p) == MEM && GET_CODE (XEXP (p, 0)) == ADDRESSOF
310 && GET_CODE (XEXP (XEXP (p, 0), 0)) == MEM)
311 p = XEXP (XEXP (p, 0), 0);
312
175160e7 313 if (GET_CODE (p) == MEM && copy)
9e0a5ab0
RS
314 {
315 /* Copy the rtl so that modifications of the addresses
316 later in compilation won't affect this arg_vector.
317 Virtual register instantiation can screw the address
318 of the rtl. */
319 rtx new = copy_rtx (p);
320
321 /* Don't leave the old copy anywhere in this decl. */
5c8bab4a
RK
322 if (DECL_RTL (parms) == DECL_INCOMING_RTL (parms)
323 || (GET_CODE (DECL_RTL (parms)) == MEM
324 && GET_CODE (DECL_INCOMING_RTL (parms)) == MEM
325 && (XEXP (DECL_RTL (parms), 0)
326 == XEXP (DECL_INCOMING_RTL (parms), 0))))
9e0a5ab0
RS
327 DECL_INCOMING_RTL (parms) = new;
328 DECL_RTL (parms) = new;
329 }
175160e7
MT
330
331 RTVEC_ELT (arg_vector, i) = p;
332
333 if (GET_CODE (p) == REG)
334 parmdecl_map[REGNO (p)] = parms;
f231e307
RK
335 else if (GET_CODE (p) == CONCAT)
336 {
337 rtx preal = gen_realpart (GET_MODE (XEXP (p, 0)), p);
338 rtx pimag = gen_imagpart (GET_MODE (preal), p);
339
340 if (GET_CODE (preal) == REG)
341 parmdecl_map[REGNO (preal)] = parms;
342 if (GET_CODE (pimag) == REG)
343 parmdecl_map[REGNO (pimag)] = parms;
344 }
345
048dfa64
RS
346 /* This flag is cleared later
347 if the function ever modifies the value of the parm. */
175160e7
MT
348 TREE_READONLY (parms) = 1;
349 }
350
351 /* Assume we start out in the insns that set up the parameters. */
352 in_nonparm_insns = 0;
353
354 /* The list of DECL_SAVED_INSNS, starts off with a header which
355 contains the following information:
356
357 the first insn of the function (not including the insns that copy
358 parameters into registers).
359 the first parameter insn of the function,
360 the first label used by that function,
361 the last label used by that function,
362 the highest register number used for parameters,
363 the total number of registers used,
364 the size of the incoming stack area for parameters,
365 the number of bytes popped on return,
366 the stack slot list,
6adb4e3a 367 the labels that are forced to exist,
175160e7
MT
368 some flags that are used to restore compiler globals,
369 the value of current_function_outgoing_args_size,
370 the original argument vector,
12307ca2 371 the original DECL_INITIAL,
956d6950 372 and pointers to the table of pseudo regs, pointer flags, and alignment. */
175160e7 373
02bea8a8 374 return gen_inline_header_rtx (NULL_RTX, NULL_RTX, min_labelno, max_labelno,
175160e7
MT
375 max_parm_reg, max_reg,
376 current_function_args_size,
377 current_function_pops_args,
5b0e2c7d 378 stack_slot_list, forced_labels, function_flags,
175160e7 379 current_function_outgoing_args_size,
12307ca2
RK
380 arg_vector, (rtx) DECL_INITIAL (fndecl),
381 (rtvec) regno_reg_rtx, regno_pointer_flag,
e9a25f70
JL
382 regno_pointer_align,
383 (rtvec) parm_reg_stack_loc);
175160e7
MT
384}
385
386/* Subroutine for `save_for_inline{copying,nocopy}'. Finishes up the
387 things that must be done to make FNDECL expandable as an inline function.
388 HEAD contains the chain of insns to which FNDECL will expand. */
389
390static void
391finish_inline (fndecl, head)
392 tree fndecl;
393 rtx head;
394{
6adb4e3a 395 FIRST_FUNCTION_INSN (head) = get_first_nonparm_insn ();
175160e7
MT
396 FIRST_PARM_INSN (head) = get_insns ();
397 DECL_SAVED_INSNS (fndecl) = head;
398 DECL_FRAME_SIZE (fndecl) = get_frame_size ();
175160e7
MT
399}
400
c75ac904
RS
401/* Adjust the BLOCK_END_NOTE pointers in a given copied DECL tree so that
402 they all point to the new (copied) rtxs. */
403
404static void
405adjust_copied_decl_tree (block)
406 register tree block;
407{
408 register tree subblock;
409 register rtx original_end;
410
411 original_end = BLOCK_END_NOTE (block);
412 if (original_end)
413 {
414 BLOCK_END_NOTE (block) = (rtx) NOTE_SOURCE_FILE (original_end);
415 NOTE_SOURCE_FILE (original_end) = 0;
416 }
417
418 /* Process all subblocks. */
419 for (subblock = BLOCK_SUBBLOCKS (block);
420 subblock;
421 subblock = TREE_CHAIN (subblock))
422 adjust_copied_decl_tree (subblock);
423}
424
175160e7
MT
425/* Make the insns and PARM_DECLs of the current function permanent
426 and record other information in DECL_SAVED_INSNS to allow inlining
427 of this function in subsequent calls.
428
429 This function is called when we are going to immediately compile
430 the insns for FNDECL. The insns in maybepermanent_obstack cannot be
431 modified by the compilation process, so we copy all of them to
432 new storage and consider the new insns to be the insn chain to be
ff2da9fc
RS
433 compiled. Our caller (rest_of_compilation) saves the original
434 DECL_INITIAL and DECL_ARGUMENTS; here we copy them. */
175160e7 435
fb854c63
JW
436/* ??? The nonlocal_label list should be adjusted also. However, since
437 a function that contains a nested function never gets inlined currently,
438 the nonlocal_label list will always be empty, so we don't worry about
439 it for now. */
440
175160e7
MT
441void
442save_for_inline_copying (fndecl)
443 tree fndecl;
444{
445 rtx first_insn, last_insn, insn;
446 rtx head, copy;
447 int max_labelno, min_labelno, i, len;
448 int max_reg;
449 int max_uid;
450 rtx first_nonparm_insn;
12307ca2 451 char *new, *new1;
c1132c27 452 rtx *new_parm_reg_stack_loc;
474eff88 453 rtx *new2;
175160e7
MT
454
455 /* Make and emit a return-label if we have not already done so.
0f41302f 456 Do this before recording the bounds on label numbers. */
175160e7
MT
457
458 if (return_label == 0)
459 {
460 return_label = gen_label_rtx ();
461 emit_label (return_label);
462 }
463
464 /* Get some bounds on the labels and registers used. */
465
466 max_labelno = max_label_num ();
467 min_labelno = get_first_label_num ();
468 max_reg = max_reg_num ();
469
470 /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
471 Later we set TREE_READONLY to 0 if the parm is modified inside the fn.
472 Also set up ARG_VECTOR, which holds the unmodified DECL_RTX values
473 for the parms, prior to elimination of virtual registers.
474 These values are needed for substituting parms properly. */
475
175160e7
MT
476 parmdecl_map = (tree *) alloca (max_parm_reg * sizeof (tree));
477
478 head = initialize_for_inline (fndecl, min_labelno, max_labelno, max_reg, 1);
479
480 if (current_function_uses_const_pool)
481 {
482 /* Replace any constant pool references with the actual constant. We
483 will put the constants back in the copy made below. */
484 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
485 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
486 {
487 save_constants (&PATTERN (insn));
488 if (REG_NOTES (insn))
489 save_constants (&REG_NOTES (insn));
490 }
491
f6135b20
JW
492 /* Also scan all decls, and replace any constant pool references with the
493 actual constant. */
494 save_constants_in_decl_trees (DECL_INITIAL (fndecl));
495
175160e7
MT
496 /* Clear out the constant pool so that we can recreate it with the
497 copied constants below. */
498 init_const_rtx_hash_table ();
499 clear_const_double_mem ();
500 }
501
502 max_uid = INSN_UID (head);
503
504 /* We have now allocated all that needs to be allocated permanently
505 on the rtx obstack. Set our high-water mark, so that we
506 can free the rest of this when the time comes. */
507
508 preserve_data ();
509
510 /* Copy the chain insns of this function.
511 Install the copied chain as the insns of this function,
512 for continued compilation;
513 the original chain is recorded as the DECL_SAVED_INSNS
514 for inlining future calls. */
515
516 /* If there are insns that copy parms from the stack into pseudo registers,
517 those insns are not copied. `expand_inline_function' must
518 emit the correct code to handle such things. */
519
520 insn = get_insns ();
521 if (GET_CODE (insn) != NOTE)
522 abort ();
523 first_insn = rtx_alloc (NOTE);
524 NOTE_SOURCE_FILE (first_insn) = NOTE_SOURCE_FILE (insn);
525 NOTE_LINE_NUMBER (first_insn) = NOTE_LINE_NUMBER (insn);
526 INSN_UID (first_insn) = INSN_UID (insn);
527 PREV_INSN (first_insn) = NULL;
528 NEXT_INSN (first_insn) = NULL;
529 last_insn = first_insn;
530
531 /* Each pseudo-reg in the old insn chain must have a unique rtx in the copy.
532 Make these new rtx's now, and install them in regno_reg_rtx, so they
533 will be the official pseudo-reg rtx's for the rest of compilation. */
534
10568ad0 535 reg_map = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
175160e7
MT
536
537 len = sizeof (struct rtx_def) + (GET_RTX_LENGTH (REG) - 1) * sizeof (rtunion);
538 for (i = max_reg - 1; i > LAST_VIRTUAL_REGISTER; i--)
539 reg_map[i] = (rtx)obstack_copy (function_maybepermanent_obstack,
540 regno_reg_rtx[i], len);
541
155d7723 542 regno_reg_rtx = reg_map;
175160e7 543
25e48d20
RK
544 /* Put copies of all the virtual register rtx into the new regno_reg_rtx. */
545 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
546 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
547 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
548 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
549
175160e7
MT
550 /* Likewise each label rtx must have a unique rtx as its copy. */
551
60bf2004
BK
552 /* We used to use alloca here, but the size of what it would try to
553 allocate would occasionally cause it to exceed the stack limit and
554 cause unpredictable core dumps. Some examples were > 2Mb in size. */
f644bd14 555 label_map = (rtx *) xmalloc ((max_labelno) * sizeof (rtx));
175160e7
MT
556
557 for (i = min_labelno; i < max_labelno; i++)
558 label_map[i] = gen_label_rtx ();
559
c1132c27
RK
560 /* Likewise for parm_reg_stack_slot. */
561 new_parm_reg_stack_loc = (rtx *) savealloc (max_parm_reg * sizeof (rtx));
562 for (i = 0; i < max_parm_reg; i++)
563 new_parm_reg_stack_loc[i] = copy_for_inline (parm_reg_stack_loc[i]);
564
565 parm_reg_stack_loc = new_parm_reg_stack_loc;
566
175160e7
MT
567 /* Record the mapping of old insns to copied insns. */
568
569 insn_map = (rtx *) alloca (max_uid * sizeof (rtx));
4c9a05bc 570 bzero ((char *) insn_map, max_uid * sizeof (rtx));
175160e7
MT
571
572 /* Get the insn which signals the end of parameter setup code. */
573 first_nonparm_insn = get_first_nonparm_insn ();
574
575 /* Copy any entries in regno_reg_rtx or DECL_RTLs that reference MEM
576 (the former occurs when a variable has its address taken)
577 since these may be shared and can be changed by virtual
578 register instantiation. DECL_RTL values for our arguments
579 have already been copied by initialize_for_inline. */
580 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_reg; i++)
581 if (GET_CODE (regno_reg_rtx[i]) == MEM)
582 XEXP (regno_reg_rtx[i], 0)
583 = copy_for_inline (XEXP (regno_reg_rtx[i], 0));
584
474eff88
JW
585 /* Copy the parm_reg_stack_loc array, and substitute for all of the rtx
586 contained in it. */
daa4b717 587 new2 = (rtx *) savealloc (max_parm_reg * sizeof (rtx));
474eff88
JW
588 bcopy ((char *) parm_reg_stack_loc, (char *) new2,
589 max_parm_reg * sizeof (rtx));
590 parm_reg_stack_loc = new2;
591 for (i = LAST_VIRTUAL_REGISTER + 1; i < max_parm_reg; ++i)
592 if (parm_reg_stack_loc[i])
593 parm_reg_stack_loc[i] = copy_for_inline (parm_reg_stack_loc[i]);
594
175160e7
MT
595 /* Copy the tree of subblocks of the function, and the decls in them.
596 We will use the copy for compiling this function, then restore the original
597 subblocks and decls for use when inlining this function.
598
599 Several parts of the compiler modify BLOCK trees. In particular,
600 instantiate_virtual_regs will instantiate any virtual regs
601 mentioned in the DECL_RTLs of the decls, and loop
602 unrolling will replicate any BLOCK trees inside an unrolled loop.
603
604 The modified subblocks or DECL_RTLs would be incorrect for the original rtl
605 which we will use for inlining. The rtl might even contain pseudoregs
606 whose space has been freed. */
607
608 DECL_INITIAL (fndecl) = copy_decl_tree (DECL_INITIAL (fndecl));
c5caa350 609 DECL_ARGUMENTS (fndecl) = copy_decl_list (DECL_ARGUMENTS (fndecl));
175160e7
MT
610
611 /* Now copy each DECL_RTL which is a MEM,
612 so it is safe to modify their addresses. */
613 copy_decl_rtls (DECL_INITIAL (fndecl));
614
c5caa350
CH
615 /* The fndecl node acts as its own progenitor, so mark it as such. */
616 DECL_ABSTRACT_ORIGIN (fndecl) = fndecl;
617
175160e7
MT
618 /* Now copy the chain of insns. Do this twice. The first copy the insn
619 itself and its body. The second time copy of REG_NOTES. This is because
620 a REG_NOTE may have a forward pointer to another insn. */
621
622 for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
623 {
624 orig_asm_operands_vector = 0;
625
626 if (insn == first_nonparm_insn)
627 in_nonparm_insns = 1;
628
629 switch (GET_CODE (insn))
630 {
631 case NOTE:
632 /* No need to keep these. */
633 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
634 continue;
635
636 copy = rtx_alloc (NOTE);
175160e7 637 NOTE_LINE_NUMBER (copy) = NOTE_LINE_NUMBER (insn);
c75ac904
RS
638 if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_BLOCK_END)
639 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
640 else
641 {
642 NOTE_SOURCE_FILE (insn) = (char *) copy;
643 NOTE_SOURCE_FILE (copy) = 0;
644 }
6adb4e3a
MS
645 if (NOTE_LINE_NUMBER (copy) == NOTE_INSN_EH_REGION_BEG
646 || NOTE_LINE_NUMBER (copy) == NOTE_INSN_EH_REGION_END)
647 {
648 /* We have to forward these both to match the new exception
649 region. */
650 NOTE_BLOCK_NUMBER (copy)
651 = CODE_LABEL_NUMBER (label_map[NOTE_BLOCK_NUMBER (copy)]);
652
653 }
1c3f2e00 654 RTX_INTEGRATED_P (copy) = RTX_INTEGRATED_P (insn);
175160e7
MT
655 break;
656
657 case INSN:
175160e7 658 case JUMP_INSN:
d7e09326 659 case CALL_INSN:
175160e7 660 copy = rtx_alloc (GET_CODE (insn));
d7e09326
RK
661
662 if (GET_CODE (insn) == CALL_INSN)
db3cf6fb
MS
663 CALL_INSN_FUNCTION_USAGE (copy)
664 = copy_for_inline (CALL_INSN_FUNCTION_USAGE (insn));
d7e09326 665
175160e7
MT
666 PATTERN (copy) = copy_for_inline (PATTERN (insn));
667 INSN_CODE (copy) = -1;
d7e09326 668 LOG_LINKS (copy) = NULL_RTX;
175160e7
MT
669 RTX_INTEGRATED_P (copy) = RTX_INTEGRATED_P (insn);
670 break;
671
672 case CODE_LABEL:
673 copy = label_map[CODE_LABEL_NUMBER (insn)];
d45cf215 674 LABEL_NAME (copy) = LABEL_NAME (insn);
175160e7
MT
675 break;
676
677 case BARRIER:
678 copy = rtx_alloc (BARRIER);
679 break;
680
681 default:
682 abort ();
683 }
684 INSN_UID (copy) = INSN_UID (insn);
685 insn_map[INSN_UID (insn)] = copy;
686 NEXT_INSN (last_insn) = copy;
687 PREV_INSN (copy) = last_insn;
688 last_insn = copy;
689 }
690
c75ac904
RS
691 adjust_copied_decl_tree (DECL_INITIAL (fndecl));
692
175160e7
MT
693 /* Now copy the REG_NOTES. */
694 for (insn = NEXT_INSN (get_insns ()); insn; insn = NEXT_INSN (insn))
695 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
696 && insn_map[INSN_UID(insn)])
697 REG_NOTES (insn_map[INSN_UID (insn)])
698 = copy_for_inline (REG_NOTES (insn));
699
700 NEXT_INSN (last_insn) = NULL;
701
702 finish_inline (fndecl, head);
703
12307ca2
RK
704 /* Make new versions of the register tables. */
705 new = (char *) savealloc (regno_pointer_flag_length);
706 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
707 new1 = (char *) savealloc (regno_pointer_flag_length);
708 bcopy (regno_pointer_align, new1, regno_pointer_flag_length);
12307ca2
RK
709
710 regno_pointer_flag = new;
711 regno_pointer_align = new1;
12307ca2 712
175160e7 713 set_new_first_and_last_insn (first_insn, last_insn);
60bf2004 714
f644bd14
JL
715 if (label_map)
716 free (label_map);
175160e7
MT
717}
718
c5caa350
CH
719/* Return a copy of a chain of nodes, chained through the TREE_CHAIN field.
720 For example, this can copy a list made of TREE_LIST nodes. While copying,
721 for each node copied which doesn't already have is DECL_ABSTRACT_ORIGIN
722 set to some non-zero value, set the DECL_ABSTRACT_ORIGIN of the copy to
723 point to the corresponding (abstract) original node. */
724
725static tree
726copy_decl_list (list)
727 tree list;
728{
729 tree head;
730 register tree prev, next;
731
732 if (list == 0)
733 return 0;
734
735 head = prev = copy_node (list);
736 if (DECL_ABSTRACT_ORIGIN (head) == NULL_TREE)
737 DECL_ABSTRACT_ORIGIN (head) = list;
738 next = TREE_CHAIN (list);
739 while (next)
740 {
741 register tree copy;
742
743 copy = copy_node (next);
744 if (DECL_ABSTRACT_ORIGIN (copy) == NULL_TREE)
745 DECL_ABSTRACT_ORIGIN (copy) = next;
746 TREE_CHAIN (prev) = copy;
747 prev = copy;
748 next = TREE_CHAIN (next);
749 }
750 return head;
751}
752
175160e7
MT
753/* Make a copy of the entire tree of blocks BLOCK, and return it. */
754
755static tree
756copy_decl_tree (block)
757 tree block;
758{
759 tree t, vars, subblocks;
760
c5caa350 761 vars = copy_decl_list (BLOCK_VARS (block));
175160e7
MT
762 subblocks = 0;
763
764 /* Process all subblocks. */
765 for (t = BLOCK_SUBBLOCKS (block); t; t = TREE_CHAIN (t))
766 {
767 tree copy = copy_decl_tree (t);
768 TREE_CHAIN (copy) = subblocks;
769 subblocks = copy;
770 }
771
772 t = copy_node (block);
773 BLOCK_VARS (t) = vars;
774 BLOCK_SUBBLOCKS (t) = nreverse (subblocks);
81578142 775 /* If the BLOCK being cloned is already marked as having been instantiated
abc95ed3 776 from something else, then leave that `origin' marking alone. Otherwise,
81578142
RS
777 mark the clone as having originated from the BLOCK we are cloning. */
778 if (BLOCK_ABSTRACT_ORIGIN (t) == NULL_TREE)
779 BLOCK_ABSTRACT_ORIGIN (t) = block;
175160e7
MT
780 return t;
781}
782
783/* Copy DECL_RTLs in all decls in the given BLOCK node. */
784
785static void
786copy_decl_rtls (block)
787 tree block;
788{
789 tree t;
790
791 for (t = BLOCK_VARS (block); t; t = TREE_CHAIN (t))
792 if (DECL_RTL (t) && GET_CODE (DECL_RTL (t)) == MEM)
793 DECL_RTL (t) = copy_for_inline (DECL_RTL (t));
794
795 /* Process all subblocks. */
796 for (t = BLOCK_SUBBLOCKS (block); t; t = TREE_CHAIN (t))
797 copy_decl_rtls (t);
798}
799
800/* Make the insns and PARM_DECLs of the current function permanent
801 and record other information in DECL_SAVED_INSNS to allow inlining
802 of this function in subsequent calls.
803
804 This routine need not copy any insns because we are not going
805 to immediately compile the insns in the insn chain. There
806 are two cases when we would compile the insns for FNDECL:
807 (1) when FNDECL is expanded inline, and (2) when FNDECL needs to
808 be output at the end of other compilation, because somebody took
809 its address. In the first case, the insns of FNDECL are copied
810 as it is expanded inline, so FNDECL's saved insns are not
811 modified. In the second case, FNDECL is used for the last time,
812 so modifying the rtl is not a problem.
813
09578c27
RK
814 We don't have to worry about FNDECL being inline expanded by
815 other functions which are written at the end of compilation
816 because flag_no_inline is turned on when we begin writing
817 functions at the end of compilation. */
175160e7
MT
818
819void
820save_for_inline_nocopy (fndecl)
821 tree fndecl;
822{
823 rtx insn;
29ff1514 824 rtx head;
175160e7 825 rtx first_nonparm_insn;
175160e7
MT
826
827 /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
828 Later we set TREE_READONLY to 0 if the parm is modified inside the fn.
829 Also set up ARG_VECTOR, which holds the unmodified DECL_RTX values
830 for the parms, prior to elimination of virtual registers.
831 These values are needed for substituting parms properly. */
832
175160e7
MT
833 parmdecl_map = (tree *) alloca (max_parm_reg * sizeof (tree));
834
835 /* Make and emit a return-label if we have not already done so. */
836
837 if (return_label == 0)
838 {
839 return_label = gen_label_rtx ();
840 emit_label (return_label);
841 }
842
843 head = initialize_for_inline (fndecl, get_first_label_num (),
844 max_label_num (), max_reg_num (), 0);
845
846 /* If there are insns that copy parms from the stack into pseudo registers,
847 those insns are not copied. `expand_inline_function' must
848 emit the correct code to handle such things. */
849
850 insn = get_insns ();
851 if (GET_CODE (insn) != NOTE)
852 abort ();
853
854 /* Get the insn which signals the end of parameter setup code. */
855 first_nonparm_insn = get_first_nonparm_insn ();
856
857 /* Now just scan the chain of insns to see what happens to our
858 PARM_DECLs. If a PARM_DECL is used but never modified, we
859 can substitute its rtl directly when expanding inline (and
860 perform constant folding when its incoming value is constant).
861 Otherwise, we have to copy its value into a new register and track
862 the new register's life. */
863
864 for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
865 {
866 if (insn == first_nonparm_insn)
867 in_nonparm_insns = 1;
868
869 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
870 {
871 if (current_function_uses_const_pool)
872 {
873 /* Replace any constant pool references with the actual constant.
874 We will put the constant back if we need to write the
875 function out after all. */
876 save_constants (&PATTERN (insn));
877 if (REG_NOTES (insn))
878 save_constants (&REG_NOTES (insn));
879 }
880
881 /* Record what interesting things happen to our parameters. */
882 note_stores (PATTERN (insn), note_modified_parmregs);
883 }
884 }
885
f6135b20
JW
886 /* Also scan all decls, and replace any constant pool references with the
887 actual constant. */
888 save_constants_in_decl_trees (DECL_INITIAL (fndecl));
889
175160e7
MT
890 /* We have now allocated all that needs to be allocated permanently
891 on the rtx obstack. Set our high-water mark, so that we
892 can free the rest of this when the time comes. */
893
894 preserve_data ();
895
896 finish_inline (fndecl, head);
897}
898\f
899/* Given PX, a pointer into an insn, search for references to the constant
900 pool. Replace each with a CONST that has the mode of the original
901 constant, contains the constant, and has RTX_INTEGRATED_P set.
902 Similarly, constant pool addresses not enclosed in a MEM are replaced
15e13f2c
RK
903 with an ADDRESS and CONST rtx which also gives the constant, its
904 mode, the mode of the address, and has RTX_INTEGRATED_P set. */
175160e7
MT
905
906static void
907save_constants (px)
908 rtx *px;
909{
910 rtx x;
911 int i, j;
912
913 again:
914 x = *px;
915
916 /* If this is a CONST_DOUBLE, don't try to fix things up in
917 CONST_DOUBLE_MEM, because this is an infinite recursion. */
918 if (GET_CODE (x) == CONST_DOUBLE)
919 return;
920 else if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == SYMBOL_REF
921 && CONSTANT_POOL_ADDRESS_P (XEXP (x,0)))
922 {
923 enum machine_mode const_mode = get_pool_mode (XEXP (x, 0));
38a448ca 924 rtx new = gen_rtx_CONST (const_mode, get_pool_constant (XEXP (x, 0)));
175160e7
MT
925 RTX_INTEGRATED_P (new) = 1;
926
927 /* If the MEM was in a different mode than the constant (perhaps we
928 were only looking at the low-order part), surround it with a
929 SUBREG so we can save both modes. */
930
931 if (GET_MODE (x) != const_mode)
932 {
38a448ca 933 new = gen_rtx_SUBREG (GET_MODE (x), new, 0);
175160e7
MT
934 RTX_INTEGRATED_P (new) = 1;
935 }
936
937 *px = new;
938 save_constants (&XEXP (*px, 0));
939 }
940 else if (GET_CODE (x) == SYMBOL_REF
941 && CONSTANT_POOL_ADDRESS_P (x))
942 {
38a448ca
RH
943 *px = gen_rtx_ADDRESS (GET_MODE (x),
944 gen_rtx_CONST (get_pool_mode (x),
945 get_pool_constant (x)));
175160e7
MT
946 save_constants (&XEXP (*px, 0));
947 RTX_INTEGRATED_P (*px) = 1;
948 }
949
950 else
951 {
952 char *fmt = GET_RTX_FORMAT (GET_CODE (x));
953 int len = GET_RTX_LENGTH (GET_CODE (x));
954
955 for (i = len-1; i >= 0; i--)
956 {
957 switch (fmt[i])
958 {
959 case 'E':
960 for (j = 0; j < XVECLEN (x, i); j++)
961 save_constants (&XVECEXP (x, i, j));
962 break;
963
964 case 'e':
965 if (XEXP (x, i) == 0)
966 continue;
967 if (i == 0)
968 {
969 /* Hack tail-recursion here. */
970 px = &XEXP (x, 0);
971 goto again;
972 }
973 save_constants (&XEXP (x, i));
974 break;
975 }
976 }
977 }
978}
979\f
980/* Note whether a parameter is modified or not. */
981
982static void
983note_modified_parmregs (reg, x)
984 rtx reg;
985 rtx x;
986{
987 if (GET_CODE (reg) == REG && in_nonparm_insns
988 && REGNO (reg) < max_parm_reg
989 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
990 && parmdecl_map[REGNO (reg)] != 0)
991 TREE_READONLY (parmdecl_map[REGNO (reg)]) = 0;
992}
993
994/* Copy the rtx ORIG recursively, replacing pseudo-regs and labels
995 according to `reg_map' and `label_map'. The original rtl insns
996 will be saved for inlining; this is used to make a copy
997 which is used to finish compiling the inline function itself.
998
999 If we find a "saved" constant pool entry, one which was replaced with
1000 the value of the constant, convert it back to a constant pool entry.
1001 Since the pool wasn't touched, this should simply restore the old
1002 address.
1003
1004 All other kinds of rtx are copied except those that can never be
1005 changed during compilation. */
1006
1007static rtx
1008copy_for_inline (orig)
1009 rtx orig;
1010{
1011 register rtx x = orig;
15e13f2c 1012 register rtx new;
175160e7
MT
1013 register int i;
1014 register enum rtx_code code;
1015 register char *format_ptr;
1016
1017 if (x == 0)
1018 return x;
1019
1020 code = GET_CODE (x);
1021
1022 /* These types may be freely shared. */
1023
1024 switch (code)
1025 {
1026 case QUEUED:
1027 case CONST_INT:
1028 case SYMBOL_REF:
1029 case PC:
1030 case CC0:
1031 return x;
1032
1033 case CONST_DOUBLE:
1034 /* We have to make a new CONST_DOUBLE to ensure that we account for
1035 it correctly. Using the old CONST_DOUBLE_MEM data is wrong. */
1036 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1037 {
1038 REAL_VALUE_TYPE d;
1039
1040 REAL_VALUE_FROM_CONST_DOUBLE (d, x);
81fbaa41 1041 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
175160e7
MT
1042 }
1043 else
1044 return immed_double_const (CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x),
1045 VOIDmode);
1046
1047 case CONST:
1048 /* Get constant pool entry for constant in the pool. */
1049 if (RTX_INTEGRATED_P (x))
1050 return validize_mem (force_const_mem (GET_MODE (x),
1051 copy_for_inline (XEXP (x, 0))));
1052 break;
1053
1054 case SUBREG:
1055 /* Get constant pool entry, but access in different mode. */
1056 if (RTX_INTEGRATED_P (x))
1057 {
15e13f2c
RK
1058 new = force_const_mem (GET_MODE (SUBREG_REG (x)),
1059 copy_for_inline (XEXP (SUBREG_REG (x), 0)));
175160e7
MT
1060
1061 PUT_MODE (new, GET_MODE (x));
1062 return validize_mem (new);
1063 }
1064 break;
1065
1066 case ADDRESS:
1067 /* If not special for constant pool error. Else get constant pool
1068 address. */
1069 if (! RTX_INTEGRATED_P (x))
1070 abort ();
1071
15e13f2c
RK
1072 new = force_const_mem (GET_MODE (XEXP (x, 0)),
1073 copy_for_inline (XEXP (XEXP (x, 0), 0)));
1074 new = XEXP (new, 0);
1075
1076#ifdef POINTERS_EXTEND_UNSIGNED
1077 if (GET_MODE (new) != GET_MODE (x))
1078 new = convert_memory_address (GET_MODE (x), new);
1079#endif
1080
1081 return new;
175160e7
MT
1082
1083 case ASM_OPERANDS:
1084 /* If a single asm insn contains multiple output operands
1085 then it contains multiple ASM_OPERANDS rtx's that share operand 3.
1086 We must make sure that the copied insn continues to share it. */
1087 if (orig_asm_operands_vector == XVEC (orig, 3))
1088 {
1089 x = rtx_alloc (ASM_OPERANDS);
81d82304 1090 x->volatil = orig->volatil;
175160e7
MT
1091 XSTR (x, 0) = XSTR (orig, 0);
1092 XSTR (x, 1) = XSTR (orig, 1);
1093 XINT (x, 2) = XINT (orig, 2);
1094 XVEC (x, 3) = copy_asm_operands_vector;
1095 XVEC (x, 4) = copy_asm_constraints_vector;
1096 XSTR (x, 5) = XSTR (orig, 5);
1097 XINT (x, 6) = XINT (orig, 6);
1098 return x;
1099 }
1100 break;
1101
1102 case MEM:
1103 /* A MEM is usually allowed to be shared if its address is constant
1104 or is a constant plus one of the special registers.
1105
1106 We do not allow sharing of addresses that are either a special
1107 register or the sum of a constant and a special register because
1108 it is possible for unshare_all_rtl to copy the address, into memory
1109 that won't be saved. Although the MEM can safely be shared, and
1110 won't be copied there, the address itself cannot be shared, and may
1111 need to be copied.
1112
1113 There are also two exceptions with constants: The first is if the
1114 constant is a LABEL_REF or the sum of the LABEL_REF
1115 and an integer. This case can happen if we have an inline
1116 function that supplies a constant operand to the call of another
1117 inline function that uses it in a switch statement. In this case,
1118 we will be replacing the LABEL_REF, so we have to replace this MEM
1119 as well.
1120
1121 The second case is if we have a (const (plus (address ..) ...)).
1122 In that case we need to put back the address of the constant pool
1123 entry. */
1124
1125 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1126 && GET_CODE (XEXP (x, 0)) != LABEL_REF
1127 && ! (GET_CODE (XEXP (x, 0)) == CONST
1128 && (GET_CODE (XEXP (XEXP (x, 0), 0)) == PLUS
1129 && ((GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 0))
1130 == LABEL_REF)
1131 || (GET_CODE (XEXP (XEXP (XEXP (x, 0), 0), 0))
1132 == ADDRESS)))))
1133 return x;
1134 break;
1135
1136 case LABEL_REF:
c1ceaaa6
RK
1137 /* If this is a non-local label, just make a new LABEL_REF.
1138 Otherwise, use the new label as well. */
38a448ca
RH
1139 x = gen_rtx_LABEL_REF (GET_MODE (orig),
1140 LABEL_REF_NONLOCAL_P (orig) ? XEXP (orig, 0)
1141 : label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))]);
c1ceaaa6
RK
1142 LABEL_REF_NONLOCAL_P (x) = LABEL_REF_NONLOCAL_P (orig);
1143 LABEL_OUTSIDE_LOOP_P (x) = LABEL_OUTSIDE_LOOP_P (orig);
1144 return x;
175160e7
MT
1145
1146 case REG:
1147 if (REGNO (x) > LAST_VIRTUAL_REGISTER)
1148 return reg_map [REGNO (x)];
1149 else
1150 return x;
1151
1152 case SET:
1153 /* If a parm that gets modified lives in a pseudo-reg,
1154 clear its TREE_READONLY to prevent certain optimizations. */
1155 {
1156 rtx dest = SET_DEST (x);
1157
1158 while (GET_CODE (dest) == STRICT_LOW_PART
1159 || GET_CODE (dest) == ZERO_EXTRACT
1160 || GET_CODE (dest) == SUBREG)
1161 dest = XEXP (dest, 0);
1162
1163 if (GET_CODE (dest) == REG
1164 && REGNO (dest) < max_parm_reg
1165 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
1166 && parmdecl_map[REGNO (dest)] != 0
1167 /* The insn to load an arg pseudo from a stack slot
1168 does not count as modifying it. */
1169 && in_nonparm_insns)
1170 TREE_READONLY (parmdecl_map[REGNO (dest)]) = 0;
1171 }
1172 break;
1173
1174#if 0 /* This is a good idea, but here is the wrong place for it. */
1175 /* Arrange that CONST_INTs always appear as the second operand
1176 if they appear, and that `frame_pointer_rtx' or `arg_pointer_rtx'
1177 always appear as the first. */
1178 case PLUS:
1179 if (GET_CODE (XEXP (x, 0)) == CONST_INT
1180 || (XEXP (x, 1) == frame_pointer_rtx
1181 || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1182 && XEXP (x, 1) == arg_pointer_rtx)))
1183 {
1184 rtx t = XEXP (x, 0);
1185 XEXP (x, 0) = XEXP (x, 1);
1186 XEXP (x, 1) = t;
1187 }
1188 break;
1189#endif
e9a25f70
JL
1190 default:
1191 break;
175160e7
MT
1192 }
1193
1194 /* Replace this rtx with a copy of itself. */
1195
1196 x = rtx_alloc (code);
4c9a05bc
RK
1197 bcopy ((char *) orig, (char *) x,
1198 (sizeof (*x) - sizeof (x->fld)
1199 + sizeof (x->fld[0]) * GET_RTX_LENGTH (code)));
175160e7
MT
1200
1201 /* Now scan the subexpressions recursively.
1202 We can store any replaced subexpressions directly into X
1203 since we know X is not shared! Any vectors in X
1204 must be copied if X was copied. */
1205
1206 format_ptr = GET_RTX_FORMAT (code);
1207
1208 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1209 {
1210 switch (*format_ptr++)
1211 {
1212 case 'e':
1213 XEXP (x, i) = copy_for_inline (XEXP (x, i));
1214 break;
1215
1216 case 'u':
1217 /* Change any references to old-insns to point to the
1218 corresponding copied insns. */
1219 XEXP (x, i) = insn_map[INSN_UID (XEXP (x, i))];
1220 break;
1221
1222 case 'E':
1223 if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
1224 {
1225 register int j;
1226
27108369 1227 XVEC (x, i) = gen_rtvec_vv (XVECLEN (x, i), XVEC (x, i)->elem);
175160e7
MT
1228 for (j = 0; j < XVECLEN (x, i); j++)
1229 XVECEXP (x, i, j)
1230 = copy_for_inline (XVECEXP (x, i, j));
1231 }
1232 break;
1233 }
1234 }
1235
1236 if (code == ASM_OPERANDS && orig_asm_operands_vector == 0)
1237 {
1238 orig_asm_operands_vector = XVEC (orig, 3);
1239 copy_asm_operands_vector = XVEC (x, 3);
1240 copy_asm_constraints_vector = XVEC (x, 4);
1241 }
1242
1243 return x;
1244}
1245
1246/* Unfortunately, we need a global copy of const_equiv map for communication
1247 with a function called from note_stores. Be *very* careful that this
1248 is used properly in the presence of recursion. */
1249
1250rtx *global_const_equiv_map;
2b145ea8 1251int global_const_equiv_map_size;
175160e7
MT
1252\f
1253#define FIXED_BASE_PLUS_P(X) \
1254 (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
1255 && GET_CODE (XEXP (X, 0)) == REG \
1256 && REGNO (XEXP (X, 0)) >= FIRST_VIRTUAL_REGISTER \
f9b06ea4 1257 && REGNO (XEXP (X, 0)) <= LAST_VIRTUAL_REGISTER)
175160e7
MT
1258
1259/* Integrate the procedure defined by FNDECL. Note that this function
1260 may wind up calling itself. Since the static variables are not
1261 reentrant, we do not assign them until after the possibility
bfa30b22 1262 of recursion is eliminated.
175160e7
MT
1263
1264 If IGNORE is nonzero, do not produce a value.
1265 Otherwise store the value in TARGET if it is nonzero and that is convenient.
1266
1267 Value is:
1268 (rtx)-1 if we could not substitute the function
1269 0 if we substituted it and it does not produce a value
1270 else an rtx for where the value is stored. */
1271
1272rtx
12307ca2
RK
1273expand_inline_function (fndecl, parms, target, ignore, type,
1274 structure_value_addr)
175160e7
MT
1275 tree fndecl, parms;
1276 rtx target;
1277 int ignore;
1278 tree type;
1279 rtx structure_value_addr;
1280{
81578142 1281 tree formal, actual, block;
175160e7
MT
1282 rtx header = DECL_SAVED_INSNS (fndecl);
1283 rtx insns = FIRST_FUNCTION_INSN (header);
1284 rtx parm_insns = FIRST_PARM_INSN (header);
1285 tree *arg_trees;
1286 rtx *arg_vals;
1287 rtx insn;
1288 int max_regno;
175160e7
MT
1289 register int i;
1290 int min_labelno = FIRST_LABELNO (header);
1291 int max_labelno = LAST_LABELNO (header);
1292 int nargs;
1293 rtx local_return_label = 0;
1294 rtx loc;
2132517d 1295 rtx stack_save = 0;
175160e7
MT
1296 rtx temp;
1297 struct inline_remap *map;
1298 rtx cc0_insn = 0;
1299 rtvec arg_vector = ORIGINAL_ARG_VECTOR (header);
a6dd1cb6 1300 rtx static_chain_value = 0;
175160e7 1301
253a01b4
JL
1302 /* The pointer used to track the true location of the memory used
1303 for MAP->LABEL_MAP. */
1304 rtx *real_label_map = 0;
1305
175160e7
MT
1306 /* Allow for equivalences of the pseudos we make for virtual fp and ap. */
1307 max_regno = MAX_REGNUM (header) + 3;
1308 if (max_regno < FIRST_PSEUDO_REGISTER)
1309 abort ();
1310
1311 nargs = list_length (DECL_ARGUMENTS (fndecl));
1312
2d8d0db8
RK
1313 /* Check that the parms type match and that sufficient arguments were
1314 passed. Since the appropriate conversions or default promotions have
1315 already been applied, the machine modes should match exactly. */
1316
12307ca2 1317 for (formal = DECL_ARGUMENTS (fndecl), actual = parms;
175160e7 1318 formal;
12307ca2 1319 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual))
175160e7 1320 {
2d8d0db8
RK
1321 tree arg;
1322 enum machine_mode mode;
1323
1324 if (actual == 0)
ab176425 1325 return (rtx) (HOST_WIDE_INT) -1;
2d8d0db8
RK
1326
1327 arg = TREE_VALUE (actual);
12307ca2 1328 mode = TYPE_MODE (DECL_ARG_TYPE (formal));
2d8d0db8
RK
1329
1330 if (mode != TYPE_MODE (TREE_TYPE (arg))
1331 /* If they are block mode, the types should match exactly.
1332 They don't match exactly if TREE_TYPE (FORMAL) == ERROR_MARK_NODE,
1333 which could happen if the parameter has incomplete type. */
d80db03d
RK
1334 || (mode == BLKmode
1335 && (TYPE_MAIN_VARIANT (TREE_TYPE (arg))
1336 != TYPE_MAIN_VARIANT (TREE_TYPE (formal)))))
ab176425 1337 return (rtx) (HOST_WIDE_INT) -1;
175160e7
MT
1338 }
1339
2d8d0db8
RK
1340 /* Extra arguments are valid, but will be ignored below, so we must
1341 evaluate them here for side-effects. */
1342 for (; actual; actual = TREE_CHAIN (actual))
1343 expand_expr (TREE_VALUE (actual), const0_rtx,
1344 TYPE_MODE (TREE_TYPE (TREE_VALUE (actual))), 0);
1345
175160e7
MT
1346 /* Make a binding contour to keep inline cleanups called at
1347 outer function-scope level from looking like they are shadowing
1348 parameter declarations. */
1349 pushlevel (0);
1350
175160e7
MT
1351 /* Expand the function arguments. Do this first so that any
1352 new registers get created before we allocate the maps. */
1353
1354 arg_vals = (rtx *) alloca (nargs * sizeof (rtx));
1355 arg_trees = (tree *) alloca (nargs * sizeof (tree));
1356
1357 for (formal = DECL_ARGUMENTS (fndecl), actual = parms, i = 0;
1358 formal;
1359 formal = TREE_CHAIN (formal), actual = TREE_CHAIN (actual), i++)
1360 {
1361 /* Actual parameter, converted to the type of the argument within the
1362 function. */
1363 tree arg = convert (TREE_TYPE (formal), TREE_VALUE (actual));
1364 /* Mode of the variable used within the function. */
1365 enum machine_mode mode = TYPE_MODE (TREE_TYPE (formal));
9175051c 1366 int invisiref = 0;
175160e7 1367
175160e7
MT
1368 arg_trees[i] = arg;
1369 loc = RTVEC_ELT (arg_vector, i);
1370
1371 /* If this is an object passed by invisible reference, we copy the
1372 object into a stack slot and save its address. If this will go
1373 into memory, we do nothing now. Otherwise, we just expand the
1374 argument. */
1375 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
1376 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
1377 {
4b7cb39e
RK
1378 rtx stack_slot
1379 = assign_stack_temp (TYPE_MODE (TREE_TYPE (arg)),
1380 int_size_in_bytes (TREE_TYPE (arg)), 1);
3668e76e 1381 MEM_IN_STRUCT_P (stack_slot) = AGGREGATE_TYPE_P (TREE_TYPE (arg));
175160e7
MT
1382
1383 store_expr (arg, stack_slot, 0);
1384
1385 arg_vals[i] = XEXP (stack_slot, 0);
9175051c 1386 invisiref = 1;
175160e7
MT
1387 }
1388 else if (GET_CODE (loc) != MEM)
36aa0bf5
RK
1389 {
1390 if (GET_MODE (loc) != TYPE_MODE (TREE_TYPE (arg)))
1391 /* The mode if LOC and ARG can differ if LOC was a variable
1392 that had its mode promoted via PROMOTED_MODE. */
5be957a2
RS
1393 arg_vals[i] = convert_modes (GET_MODE (loc),
1394 TYPE_MODE (TREE_TYPE (arg)),
1395 expand_expr (arg, NULL_RTX, mode,
1396 EXPAND_SUM),
1397 TREE_UNSIGNED (TREE_TYPE (formal)));
36aa0bf5
RK
1398 else
1399 arg_vals[i] = expand_expr (arg, NULL_RTX, mode, EXPAND_SUM);
1400 }
175160e7
MT
1401 else
1402 arg_vals[i] = 0;
1403
1404 if (arg_vals[i] != 0
1405 && (! TREE_READONLY (formal)
1406 /* If the parameter is not read-only, copy our argument through
1407 a register. Also, we cannot use ARG_VALS[I] if it overlaps
1408 TARGET in any way. In the inline function, they will likely
1409 be two different pseudos, and `safe_from_p' will make all
1410 sorts of smart assumptions about their not conflicting.
1411 But if ARG_VALS[I] overlaps TARGET, these assumptions are
9175051c
JM
1412 wrong, so put ARG_VALS[I] into a fresh register.
1413 Don't worry about invisible references, since their stack
1414 temps will never overlap the target. */
175160e7 1415 || (target != 0
9175051c 1416 && ! invisiref
3eda169f
RK
1417 && (GET_CODE (arg_vals[i]) == REG
1418 || GET_CODE (arg_vals[i]) == SUBREG
1419 || GET_CODE (arg_vals[i]) == MEM)
30caed6d
RS
1420 && reg_overlap_mentioned_p (arg_vals[i], target))
1421 /* ??? We must always copy a SUBREG into a REG, because it might
1422 get substituted into an address, and not all ports correctly
1423 handle SUBREGs in addresses. */
1424 || (GET_CODE (arg_vals[i]) == SUBREG)))
4b7cb39e 1425 arg_vals[i] = copy_to_mode_reg (GET_MODE (loc), arg_vals[i]);
12307ca2
RK
1426
1427 if (arg_vals[i] != 0 && GET_CODE (arg_vals[i]) == REG
1428 && TREE_CODE (TREE_TYPE (formal)) == POINTER_TYPE)
1429 mark_reg_pointer (arg_vals[i],
1430 (TYPE_ALIGN (TREE_TYPE (TREE_TYPE (formal)))
1431 / BITS_PER_UNIT));
175160e7
MT
1432 }
1433
1434 /* Allocate the structures we use to remap things. */
1435
1436 map = (struct inline_remap *) alloca (sizeof (struct inline_remap));
1437 map->fndecl = fndecl;
1438
1439 map->reg_map = (rtx *) alloca (max_regno * sizeof (rtx));
4c9a05bc 1440 bzero ((char *) map->reg_map, max_regno * sizeof (rtx));
175160e7 1441
3bb1329e
BK
1442 /* We used to use alloca here, but the size of what it would try to
1443 allocate would occasionally cause it to exceed the stack limit and
1444 cause unpredictable core dumps. */
253a01b4
JL
1445 real_label_map
1446 = (rtx *) xmalloc ((max_labelno) * sizeof (rtx));
1447 map->label_map = real_label_map;
175160e7
MT
1448
1449 map->insn_map = (rtx *) alloca (INSN_UID (header) * sizeof (rtx));
4c9a05bc 1450 bzero ((char *) map->insn_map, INSN_UID (header) * sizeof (rtx));
175160e7
MT
1451 map->min_insnno = 0;
1452 map->max_insnno = INSN_UID (header);
1453
a70f7bb2
JW
1454 map->integrating = 1;
1455
175160e7
MT
1456 /* const_equiv_map maps pseudos in our routine to constants, so it needs to
1457 be large enough for all our pseudos. This is the number we are currently
c66e0741
RK
1458 using plus the number in the called routine, plus 15 for each arg,
1459 five to compute the virtual frame pointer, and five for the return value.
1460 This should be enough for most cases. We do not reference entries
1461 outside the range of the map.
1462
1463 ??? These numbers are quite arbitrary and were obtained by
1464 experimentation. At some point, we should try to allocate the
1465 table after all the parameters are set up so we an more accurately
1466 estimate the number of pseudos we will need. */
1467
1468 map->const_equiv_map_size
1469 = max_reg_num () + (max_regno - FIRST_PSEUDO_REGISTER) + 15 * nargs + 10;
1470
1471 map->const_equiv_map
1472 = (rtx *)alloca (map->const_equiv_map_size * sizeof (rtx));
4c9a05bc
RK
1473 bzero ((char *) map->const_equiv_map,
1474 map->const_equiv_map_size * sizeof (rtx));
c66e0741
RK
1475
1476 map->const_age_map
1477 = (unsigned *)alloca (map->const_equiv_map_size * sizeof (unsigned));
4c9a05bc
RK
1478 bzero ((char *) map->const_age_map,
1479 map->const_equiv_map_size * sizeof (unsigned));
175160e7
MT
1480 map->const_age = 0;
1481
1482 /* Record the current insn in case we have to set up pointers to frame
3ba10494
AS
1483 and argument memory blocks. If there are no insns yet, add a dummy
1484 insn that can be used as an insertion point. */
175160e7 1485 map->insns_at_start = get_last_insn ();
e9a25f70 1486 if (map->insns_at_start == 0)
3ba10494 1487 map->insns_at_start = emit_note (NULL_PTR, NOTE_INSN_DELETED);
175160e7 1488
12307ca2
RK
1489 map->regno_pointer_flag = INLINE_REGNO_POINTER_FLAG (header);
1490 map->regno_pointer_align = INLINE_REGNO_POINTER_ALIGN (header);
1491
175160e7
MT
1492 /* Update the outgoing argument size to allow for those in the inlined
1493 function. */
1494 if (OUTGOING_ARGS_SIZE (header) > current_function_outgoing_args_size)
1495 current_function_outgoing_args_size = OUTGOING_ARGS_SIZE (header);
1496
1497 /* If the inline function needs to make PIC references, that means
1498 that this function's PIC offset table must be used. */
1499 if (FUNCTION_FLAGS (header) & FUNCTION_FLAGS_USES_PIC_OFFSET_TABLE)
1500 current_function_uses_pic_offset_table = 1;
1501
a6dd1cb6
RK
1502 /* If this function needs a context, set it up. */
1503 if (FUNCTION_FLAGS (header) & FUNCTION_FLAGS_NEEDS_CONTEXT)
1504 static_chain_value = lookup_static_chain (fndecl);
1505
1c1f2d29
JM
1506 if (GET_CODE (parm_insns) == NOTE
1507 && NOTE_LINE_NUMBER (parm_insns) > 0)
1508 {
1509 rtx note = emit_note (NOTE_SOURCE_FILE (parm_insns),
1510 NOTE_LINE_NUMBER (parm_insns));
1511 if (note)
1512 RTX_INTEGRATED_P (note) = 1;
1513 }
1514
175160e7
MT
1515 /* Process each argument. For each, set up things so that the function's
1516 reference to the argument will refer to the argument being passed.
1517 We only replace REG with REG here. Any simplifications are done
1518 via const_equiv_map.
1519
1520 We make two passes: In the first, we deal with parameters that will
1521 be placed into registers, since we need to ensure that the allocated
1522 register number fits in const_equiv_map. Then we store all non-register
1523 parameters into their memory location. */
1524
fd28789a
RS
1525 /* Don't try to free temp stack slots here, because we may put one of the
1526 parameters into a temp stack slot. */
1527
175160e7
MT
1528 for (i = 0; i < nargs; i++)
1529 {
1530 rtx copy = arg_vals[i];
1531
1532 loc = RTVEC_ELT (arg_vector, i);
1533
1534 /* There are three cases, each handled separately. */
1535 if (GET_CODE (loc) == MEM && GET_CODE (XEXP (loc, 0)) == REG
1536 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER)
1537 {
1538 /* This must be an object passed by invisible reference (it could
1539 also be a variable-sized object, but we forbid inlining functions
1540 with variable-sized arguments). COPY is the address of the
1541 actual value (this computation will cause it to be copied). We
1542 map that address for the register, noting the actual address as
1543 an equivalent in case it can be substituted into the insns. */
1544
1545 if (GET_CODE (copy) != REG)
1546 {
1547 temp = copy_addr_to_reg (copy);
2b145ea8
RK
1548 if ((CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
1549 && REGNO (temp) < map->const_equiv_map_size)
175160e7
MT
1550 {
1551 map->const_equiv_map[REGNO (temp)] = copy;
1552 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
1553 }
1554 copy = temp;
1555 }
1556 map->reg_map[REGNO (XEXP (loc, 0))] = copy;
1557 }
1558 else if (GET_CODE (loc) == MEM)
1559 {
1560 /* This is the case of a parameter that lives in memory.
1561 It will live in the block we allocate in the called routine's
1562 frame that simulates the incoming argument area. Do nothing
1563 now; we will call store_expr later. */
1564 ;
1565 }
1566 else if (GET_CODE (loc) == REG)
1567 {
1568 /* This is the good case where the parameter is in a register.
1569 If it is read-only and our argument is a constant, set up the
2ad701ba
RS
1570 constant equivalence.
1571
1572 If LOC is REG_USERVAR_P, the usual case, COPY must also have
23d5d23d
RK
1573 that flag set if it is a register.
1574
1575 Also, don't allow hard registers here; they might not be valid
0f41302f 1576 when substituted into insns. */
2ad701ba
RS
1577
1578 if ((GET_CODE (copy) != REG && GET_CODE (copy) != SUBREG)
1579 || (GET_CODE (copy) == REG && REG_USERVAR_P (loc)
23d5d23d
RK
1580 && ! REG_USERVAR_P (copy))
1581 || (GET_CODE (copy) == REG
1582 && REGNO (copy) < FIRST_PSEUDO_REGISTER))
175160e7
MT
1583 {
1584 temp = copy_to_mode_reg (GET_MODE (loc), copy);
2ad701ba 1585 REG_USERVAR_P (temp) = REG_USERVAR_P (loc);
2b145ea8
RK
1586 if ((CONSTANT_P (copy) || FIXED_BASE_PLUS_P (copy))
1587 && REGNO (temp) < map->const_equiv_map_size)
175160e7
MT
1588 {
1589 map->const_equiv_map[REGNO (temp)] = copy;
1590 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
1591 }
1592 copy = temp;
1593 }
1594 map->reg_map[REGNO (loc)] = copy;
1595 }
bc2eeab2
RS
1596 else if (GET_CODE (loc) == CONCAT)
1597 {
1598 /* This is the good case where the parameter is in a
1599 pair of separate pseudos.
1600 If it is read-only and our argument is a constant, set up the
1601 constant equivalence.
1602
1603 If LOC is REG_USERVAR_P, the usual case, COPY must also have
1604 that flag set if it is a register.
1605
1606 Also, don't allow hard registers here; they might not be valid
0f41302f 1607 when substituted into insns. */
bc2eeab2
RS
1608 rtx locreal = gen_realpart (GET_MODE (XEXP (loc, 0)), loc);
1609 rtx locimag = gen_imagpart (GET_MODE (XEXP (loc, 0)), loc);
1610 rtx copyreal = gen_realpart (GET_MODE (locreal), copy);
1611 rtx copyimag = gen_imagpart (GET_MODE (locimag), copy);
1612
1613 if ((GET_CODE (copyreal) != REG && GET_CODE (copyreal) != SUBREG)
1614 || (GET_CODE (copyreal) == REG && REG_USERVAR_P (locreal)
1615 && ! REG_USERVAR_P (copyreal))
1616 || (GET_CODE (copyreal) == REG
1617 && REGNO (copyreal) < FIRST_PSEUDO_REGISTER))
1618 {
1619 temp = copy_to_mode_reg (GET_MODE (locreal), copyreal);
1620 REG_USERVAR_P (temp) = REG_USERVAR_P (locreal);
2b145ea8
RK
1621 if ((CONSTANT_P (copyreal) || FIXED_BASE_PLUS_P (copyreal))
1622 && REGNO (temp) < map->const_equiv_map_size)
bc2eeab2
RS
1623 {
1624 map->const_equiv_map[REGNO (temp)] = copyreal;
1625 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
1626 }
1627 copyreal = temp;
1628 }
1629 map->reg_map[REGNO (locreal)] = copyreal;
1630
1631 if ((GET_CODE (copyimag) != REG && GET_CODE (copyimag) != SUBREG)
1632 || (GET_CODE (copyimag) == REG && REG_USERVAR_P (locimag)
1633 && ! REG_USERVAR_P (copyimag))
1634 || (GET_CODE (copyimag) == REG
1635 && REGNO (copyimag) < FIRST_PSEUDO_REGISTER))
1636 {
1637 temp = copy_to_mode_reg (GET_MODE (locimag), copyimag);
1638 REG_USERVAR_P (temp) = REG_USERVAR_P (locimag);
2b145ea8
RK
1639 if ((CONSTANT_P (copyimag) || FIXED_BASE_PLUS_P (copyimag))
1640 && REGNO (temp) < map->const_equiv_map_size)
bc2eeab2
RS
1641 {
1642 map->const_equiv_map[REGNO (temp)] = copyimag;
1643 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
1644 }
1645 copyimag = temp;
1646 }
1647 map->reg_map[REGNO (locimag)] = copyimag;
1648 }
175160e7
MT
1649 else
1650 abort ();
175160e7
MT
1651 }
1652
1653 /* Now do the parameters that will be placed in memory. */
1654
1655 for (formal = DECL_ARGUMENTS (fndecl), i = 0;
1656 formal; formal = TREE_CHAIN (formal), i++)
1657 {
175160e7
MT
1658 loc = RTVEC_ELT (arg_vector, i);
1659
1660 if (GET_CODE (loc) == MEM
1661 /* Exclude case handled above. */
1662 && ! (GET_CODE (XEXP (loc, 0)) == REG
1663 && REGNO (XEXP (loc, 0)) > LAST_VIRTUAL_REGISTER))
1664 {
cdd6e2db
TW
1665 rtx note = emit_note (DECL_SOURCE_FILE (formal),
1666 DECL_SOURCE_LINE (formal));
1667 if (note)
1668 RTX_INTEGRATED_P (note) = 1;
175160e7
MT
1669
1670 /* Compute the address in the area we reserved and store the
1671 value there. */
1672 temp = copy_rtx_and_substitute (loc, map);
02bea8a8 1673 subst_constants (&temp, NULL_RTX, map);
175160e7
MT
1674 apply_change_group ();
1675 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
1676 temp = change_address (temp, VOIDmode, XEXP (temp, 0));
1677 store_expr (arg_trees[i], temp, 0);
175160e7
MT
1678 }
1679 }
1680
1681 /* Deal with the places that the function puts its result.
1682 We are driven by what is placed into DECL_RESULT.
1683
1684 Initially, we assume that we don't have anything special handling for
1685 REG_FUNCTION_RETURN_VALUE_P. */
1686
1687 map->inline_target = 0;
1688 loc = DECL_RTL (DECL_RESULT (fndecl));
1689 if (TYPE_MODE (type) == VOIDmode)
1690 /* There is no return value to worry about. */
1691 ;
1692 else if (GET_CODE (loc) == MEM)
1693 {
1694 if (! structure_value_addr || ! aggregate_value_p (DECL_RESULT (fndecl)))
1695 abort ();
1696
1697 /* Pass the function the address in which to return a structure value.
1698 Note that a constructor can cause someone to call us with
1699 STRUCTURE_VALUE_ADDR, but the initialization takes place
1700 via the first parameter, rather than the struct return address.
1701
1702 We have two cases: If the address is a simple register indirect,
1703 use the mapping mechanism to point that register to our structure
1704 return address. Otherwise, store the structure return value into
1705 the place that it will be referenced from. */
1706
1707 if (GET_CODE (XEXP (loc, 0)) == REG)
1708 {
f72a8759
RK
1709 temp = force_reg (Pmode,
1710 force_operand (structure_value_addr, NULL_RTX));
175160e7 1711 map->reg_map[REGNO (XEXP (loc, 0))] = temp;
2b145ea8 1712 if ((CONSTANT_P (structure_value_addr)
e9a25f70 1713 || GET_CODE (structure_value_addr) == ADDRESSOF
2b145ea8
RK
1714 || (GET_CODE (structure_value_addr) == PLUS
1715 && XEXP (structure_value_addr, 0) == virtual_stack_vars_rtx
1716 && GET_CODE (XEXP (structure_value_addr, 1)) == CONST_INT))
1717 && REGNO (temp) < map->const_equiv_map_size)
175160e7
MT
1718 {
1719 map->const_equiv_map[REGNO (temp)] = structure_value_addr;
1720 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
1721 }
1722 }
1723 else
1724 {
1725 temp = copy_rtx_and_substitute (loc, map);
02bea8a8 1726 subst_constants (&temp, NULL_RTX, map);
175160e7
MT
1727 apply_change_group ();
1728 emit_move_insn (temp, structure_value_addr);
1729 }
1730 }
1731 else if (ignore)
1732 /* We will ignore the result value, so don't look at its structure.
1733 Note that preparations for an aggregate return value
1734 do need to be made (above) even if it will be ignored. */
1735 ;
1736 else if (GET_CODE (loc) == REG)
1737 {
1738 /* The function returns an object in a register and we use the return
1739 value. Set up our target for remapping. */
1740
1741 /* Machine mode function was declared to return. */
1742 enum machine_mode departing_mode = TYPE_MODE (type);
1743 /* (Possibly wider) machine mode it actually computes
3ff2293f
BK
1744 (for the sake of callers that fail to declare it right).
1745 We have to use the mode of the result's RTL, rather than
1746 its type, since expand_function_start may have promoted it. */
175160e7 1747 enum machine_mode arriving_mode
3ff2293f 1748 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
175160e7
MT
1749 rtx reg_to_map;
1750
1751 /* Don't use MEMs as direct targets because on some machines
1752 substituting a MEM for a REG makes invalid insns.
1753 Let the combiner substitute the MEM if that is valid. */
1754 if (target == 0 || GET_CODE (target) != REG
1755 || GET_MODE (target) != departing_mode)
1756 target = gen_reg_rtx (departing_mode);
1757
1758 /* If function's value was promoted before return,
1759 avoid machine mode mismatch when we substitute INLINE_TARGET.
1760 But TARGET is what we will return to the caller. */
1761 if (arriving_mode != departing_mode)
2d0bd5fd
RK
1762 {
1763 /* Avoid creating a paradoxical subreg wider than
1764 BITS_PER_WORD, since that is illegal. */
1765 if (GET_MODE_BITSIZE (arriving_mode) > BITS_PER_WORD)
1766 {
1767 if (!TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (departing_mode),
1768 GET_MODE_BITSIZE (arriving_mode)))
1769 /* Maybe could be handled by using convert_move () ? */
1770 abort ();
1771 reg_to_map = gen_reg_rtx (arriving_mode);
1772 target = gen_lowpart (departing_mode, reg_to_map);
1773 }
1774 else
38a448ca 1775 reg_to_map = gen_rtx_SUBREG (arriving_mode, target, 0);
2d0bd5fd 1776 }
175160e7
MT
1777 else
1778 reg_to_map = target;
1779
1780 /* Usually, the result value is the machine's return register.
1781 Sometimes it may be a pseudo. Handle both cases. */
1782 if (REG_FUNCTION_VALUE_P (loc))
1783 map->inline_target = reg_to_map;
1784 else
1785 map->reg_map[REGNO (loc)] = reg_to_map;
1786 }
64ed0f40
JW
1787 else
1788 abort ();
175160e7 1789
255fe733
JM
1790 /* Make a fresh binding contour that we can easily remove. Do this after
1791 expanding our arguments so cleanups are properly scoped. */
1792 pushlevel (0);
1793 expand_start_bindings (0);
1794
175160e7
MT
1795 /* Make new label equivalences for the labels in the called function. */
1796 for (i = min_labelno; i < max_labelno; i++)
1f3d3a31 1797 map->label_map[i] = NULL_RTX;
175160e7
MT
1798
1799 /* Perform postincrements before actually calling the function. */
1800 emit_queue ();
1801
1802 /* Clean up stack so that variables might have smaller offsets. */
1803 do_pending_stack_adjust ();
1804
1805 /* Save a copy of the location of const_equiv_map for mark_stores, called
1806 via note_stores. */
1807 global_const_equiv_map = map->const_equiv_map;
2b145ea8 1808 global_const_equiv_map_size = map->const_equiv_map_size;
175160e7 1809
136cf361
RK
1810 /* If the called function does an alloca, save and restore the
1811 stack pointer around the call. This saves stack space, but
2132517d
RK
1812 also is required if this inline is being done between two
1813 pushes. */
1814 if (FUNCTION_FLAGS (header) & FUNCTION_FLAGS_CALLS_ALLOCA)
1815 emit_stack_save (SAVE_BLOCK, &stack_save, NULL_RTX);
1816
175160e7
MT
1817 /* Now copy the insns one by one. Do this in two passes, first the insns and
1818 then their REG_NOTES, just like save_for_inline. */
1819
1820 /* This loop is very similar to the loop in copy_loop_body in unroll.c. */
1821
1822 for (insn = insns; insn; insn = NEXT_INSN (insn))
1823 {
c9734bb9 1824 rtx copy, pattern, set;
175160e7
MT
1825
1826 map->orig_asm_operands_vector = 0;
1827
1828 switch (GET_CODE (insn))
1829 {
1830 case INSN:
1831 pattern = PATTERN (insn);
c9734bb9 1832 set = single_set (insn);
175160e7
MT
1833 copy = 0;
1834 if (GET_CODE (pattern) == USE
1835 && GET_CODE (XEXP (pattern, 0)) == REG
1836 && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1837 /* The (USE (REG n)) at return from the function should
1838 be ignored since we are changing (REG n) into
1839 inline_target. */
1840 break;
1841
154bba13
TT
1842 /* If the inline fn needs eh context, make sure that
1843 the current fn has one. */
1844 if (GET_CODE (pattern) == USE
1845 && find_reg_note (insn, REG_EH_CONTEXT, 0) != 0)
01eb7f9a 1846 get_eh_context ();
154bba13 1847
175160e7
MT
1848 /* Ignore setting a function value that we don't want to use. */
1849 if (map->inline_target == 0
c9734bb9
RK
1850 && set != 0
1851 && GET_CODE (SET_DEST (set)) == REG
1852 && REG_FUNCTION_VALUE_P (SET_DEST (set)))
5cd76fcd 1853 {
c9734bb9 1854 if (volatile_refs_p (SET_SRC (set)))
5cd76fcd 1855 {
c9734bb9
RK
1856 rtx new_set;
1857
5cd76fcd
RS
1858 /* If we must not delete the source,
1859 load it into a new temporary. */
1860 copy = emit_insn (copy_rtx_and_substitute (pattern, map));
c9734bb9
RK
1861
1862 new_set = single_set (copy);
1863 if (new_set == 0)
1864 abort ();
1865
1866 SET_DEST (new_set)
1867 = gen_reg_rtx (GET_MODE (SET_DEST (new_set)));
5cd76fcd 1868 }
d8090d46
RK
1869 /* If the source and destination are the same and it
1870 has a note on it, keep the insn. */
1871 else if (rtx_equal_p (SET_DEST (set), SET_SRC (set))
1872 && REG_NOTES (insn) != 0)
1873 copy = emit_insn (copy_rtx_and_substitute (pattern, map));
5cd76fcd
RS
1874 else
1875 break;
1876 }
c9734bb9
RK
1877
1878 /* If this is setting the static chain rtx, omit it. */
1879 else if (static_chain_value != 0
1880 && set != 0
1881 && GET_CODE (SET_DEST (set)) == REG
1882 && rtx_equal_p (SET_DEST (set),
1883 static_chain_incoming_rtx))
1884 break;
1885
a6dd1cb6
RK
1886 /* If this is setting the static chain pseudo, set it from
1887 the value we want to give it instead. */
1888 else if (static_chain_value != 0
c9734bb9
RK
1889 && set != 0
1890 && rtx_equal_p (SET_SRC (set),
a6dd1cb6
RK
1891 static_chain_incoming_rtx))
1892 {
c9734bb9 1893 rtx newdest = copy_rtx_and_substitute (SET_DEST (set), map);
a6dd1cb6 1894
c9734bb9 1895 copy = emit_move_insn (newdest, static_chain_value);
a6dd1cb6
RK
1896 static_chain_value = 0;
1897 }
5cd76fcd
RS
1898 else
1899 copy = emit_insn (copy_rtx_and_substitute (pattern, map));
175160e7
MT
1900 /* REG_NOTES will be copied later. */
1901
1902#ifdef HAVE_cc0
1903 /* If this insn is setting CC0, it may need to look at
1904 the insn that uses CC0 to see what type of insn it is.
1905 In that case, the call to recog via validate_change will
1906 fail. So don't substitute constants here. Instead,
1907 do it when we emit the following insn.
1908
1909 For example, see the pyr.md file. That machine has signed and
1910 unsigned compares. The compare patterns must check the
1911 following branch insn to see which what kind of compare to
1912 emit.
1913
1914 If the previous insn set CC0, substitute constants on it as
1915 well. */
1916 if (sets_cc0_p (PATTERN (copy)) != 0)
1917 cc0_insn = copy;
1918 else
1919 {
1920 if (cc0_insn)
1921 try_constants (cc0_insn, map);
1922 cc0_insn = 0;
1923 try_constants (copy, map);
1924 }
1925#else
1926 try_constants (copy, map);
1927#endif
1928 break;
1929
1930 case JUMP_INSN:
299b54ba
RK
1931 if (GET_CODE (PATTERN (insn)) == RETURN
1932 || (GET_CODE (PATTERN (insn)) == PARALLEL
1933 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == RETURN))
175160e7
MT
1934 {
1935 if (local_return_label == 0)
1936 local_return_label = gen_label_rtx ();
1937 pattern = gen_jump (local_return_label);
1938 }
1939 else
1940 pattern = copy_rtx_and_substitute (PATTERN (insn), map);
1941
1942 copy = emit_jump_insn (pattern);
1943
1944#ifdef HAVE_cc0
1945 if (cc0_insn)
1946 try_constants (cc0_insn, map);
1947 cc0_insn = 0;
1948#endif
1949 try_constants (copy, map);
1950
1951 /* If this used to be a conditional jump insn but whose branch
1952 direction is now know, we must do something special. */
1953 if (condjump_p (insn) && ! simplejump_p (insn) && map->last_pc_value)
1954 {
1955#ifdef HAVE_cc0
1956 /* The previous insn set cc0 for us. So delete it. */
1957 delete_insn (PREV_INSN (copy));
1958#endif
1959
1960 /* If this is now a no-op, delete it. */
1961 if (map->last_pc_value == pc_rtx)
1962 {
1963 delete_insn (copy);
1964 copy = 0;
1965 }
1966 else
1967 /* Otherwise, this is unconditional jump so we must put a
1968 BARRIER after it. We could do some dead code elimination
1969 here, but jump.c will do it just as well. */
1970 emit_barrier ();
1971 }
1972 break;
1973
1974 case CALL_INSN:
1975 pattern = copy_rtx_and_substitute (PATTERN (insn), map);
1976 copy = emit_call_insn (pattern);
1977
d7e09326
RK
1978 /* Because the USAGE information potentially contains objects other
1979 than hard registers, we need to copy it. */
db3cf6fb
MS
1980 CALL_INSN_FUNCTION_USAGE (copy)
1981 = copy_rtx_and_substitute (CALL_INSN_FUNCTION_USAGE (insn), map);
d7e09326 1982
175160e7
MT
1983#ifdef HAVE_cc0
1984 if (cc0_insn)
1985 try_constants (cc0_insn, map);
1986 cc0_insn = 0;
1987#endif
1988 try_constants (copy, map);
1989
1990 /* Be lazy and assume CALL_INSNs clobber all hard registers. */
1991 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1992 map->const_equiv_map[i] = 0;
1993 break;
1994
1995 case CODE_LABEL:
1f3d3a31
JL
1996 copy =
1997 emit_label (get_label_from_map(map,
1998 CODE_LABEL_NUMBER (insn)));
bfa30b22 1999 LABEL_NAME (copy) = LABEL_NAME (insn);
175160e7
MT
2000 map->const_age++;
2001 break;
2002
2003 case BARRIER:
2004 copy = emit_barrier ();
2005 break;
2006
2007 case NOTE:
2008 /* It is important to discard function-end and function-beg notes,
2009 so we have only one of each in the current function.
2010 Also, NOTE_INSN_DELETED notes aren't useful (save_for_inline
2011 deleted these in the copy used for continuing compilation,
2012 not the copy used for inlining). */
2013 if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END
2014 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_BEG
2015 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED)
6adb4e3a
MS
2016 {
2017 copy = emit_note (NOTE_SOURCE_FILE (insn), NOTE_LINE_NUMBER (insn));
2018 if (copy && (NOTE_LINE_NUMBER (copy) == NOTE_INSN_EH_REGION_BEG
2019 || NOTE_LINE_NUMBER (copy) == NOTE_INSN_EH_REGION_END))
2020 {
1f3d3a31
JL
2021 rtx label =
2022 get_label_from_map (map, NOTE_BLOCK_NUMBER (copy));
6adb4e3a
MS
2023
2024 /* We have to forward these both to match the new exception
2025 region. */
2026 NOTE_BLOCK_NUMBER (copy) = CODE_LABEL_NUMBER (label);
2027 }
2028 }
175160e7
MT
2029 else
2030 copy = 0;
2031 break;
2032
2033 default:
2034 abort ();
2035 break;
2036 }
2037
2038 if (copy)
2039 RTX_INTEGRATED_P (copy) = 1;
2040
2041 map->insn_map[INSN_UID (insn)] = copy;
2042 }
2043
e62d14be
RS
2044 /* Now copy the REG_NOTES. Increment const_age, so that only constants
2045 from parameters can be substituted in. These are the only ones that
2046 are valid across the entire function. */
2047 map->const_age++;
175160e7
MT
2048 for (insn = insns; insn; insn = NEXT_INSN (insn))
2049 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
db25e492
RS
2050 && map->insn_map[INSN_UID (insn)]
2051 && REG_NOTES (insn))
2052 {
2053 rtx tem = copy_rtx_and_substitute (REG_NOTES (insn), map);
2054 /* We must also do subst_constants, in case one of our parameters
2055 has const type and constant value. */
2056 subst_constants (&tem, NULL_RTX, map);
2057 apply_change_group ();
2058 REG_NOTES (map->insn_map[INSN_UID (insn)]) = tem;
2059 }
175160e7
MT
2060
2061 if (local_return_label)
2062 emit_label (local_return_label);
2063
2132517d
RK
2064 /* Restore the stack pointer if we saved it above. */
2065 if (FUNCTION_FLAGS (header) & FUNCTION_FLAGS_CALLS_ALLOCA)
2066 emit_stack_restore (SAVE_BLOCK, stack_save, NULL_RTX);
2067
175160e7
MT
2068 /* Make copies of the decls of the symbols in the inline function, so that
2069 the copies of the variables get declared in the current function. Set
2070 up things so that lookup_static_chain knows that to interpret registers
2071 in SAVE_EXPRs for TYPE_SIZEs as local. */
2072
2073 inline_function_decl = fndecl;
175160e7 2074 integrate_parm_decls (DECL_ARGUMENTS (fndecl), map, arg_vector);
8ef63e62 2075 integrate_decl_tree ((tree) ORIGINAL_DECL_INITIAL (header), 0, map);
175160e7
MT
2076 inline_function_decl = 0;
2077
8ef63e62
RS
2078 /* End the scope containing the copied formal parameter variables
2079 and copied LABEL_DECLs. */
175160e7
MT
2080
2081 expand_end_bindings (getdecls (), 1, 1);
81578142 2082 block = poplevel (1, 1, 0);
637c5064
RS
2083 BLOCK_ABSTRACT_ORIGIN (block) = (DECL_ABSTRACT_ORIGIN (fndecl) == NULL
2084 ? fndecl : DECL_ABSTRACT_ORIGIN (fndecl));
175160e7 2085 poplevel (0, 0, 0);
9b53bc83
DE
2086
2087 /* Must mark the line number note after inlined functions as a repeat, so
2088 that the test coverage code can avoid counting the call twice. This
2089 just tells the code to ignore the immediately following line note, since
2090 there already exists a copy of this note before the expanded inline call.
2091 This line number note is still needed for debugging though, so we can't
2092 delete it. */
2093 if (flag_test_coverage)
2094 emit_note (0, NOTE_REPEATED_LINE_NUMBER);
2095
175160e7
MT
2096 emit_line_note (input_filename, lineno);
2097
2098 if (structure_value_addr)
1b6d951b 2099 {
38a448ca
RH
2100 target = gen_rtx_MEM (TYPE_MODE (type),
2101 memory_address (TYPE_MODE (type),
2102 structure_value_addr));
1b6d951b
RS
2103 MEM_IN_STRUCT_P (target) = 1;
2104 }
3bb1329e
BK
2105
2106 /* Make sure we free the things we explicitly allocated with xmalloc. */
51cbea76
JL
2107 if (real_label_map)
2108 free (real_label_map);
3bb1329e 2109
175160e7
MT
2110 return target;
2111}
2112\f
2113/* Given a chain of PARM_DECLs, ARGS, copy each decl into a VAR_DECL,
2114 push all of those decls and give each one the corresponding home. */
2115
2116static void
2117integrate_parm_decls (args, map, arg_vector)
2118 tree args;
2119 struct inline_remap *map;
2120 rtvec arg_vector;
2121{
2122 register tree tail;
2123 register int i;
2124
2125 for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
2126 {
2127 register tree decl = build_decl (VAR_DECL, DECL_NAME (tail),
2128 TREE_TYPE (tail));
2129 rtx new_decl_rtl
2130 = copy_rtx_and_substitute (RTVEC_ELT (arg_vector, i), map);
2131
a76386d8
RK
2132 DECL_ARG_TYPE (decl) = DECL_ARG_TYPE (tail);
2133 /* We really should be setting DECL_INCOMING_RTL to something reasonable
2134 here, but that's going to require some more work. */
2135 /* DECL_INCOMING_RTL (decl) = ?; */
175160e7
MT
2136 /* These args would always appear unused, if not for this. */
2137 TREE_USED (decl) = 1;
2138 /* Prevent warning for shadowing with these. */
c5caa350 2139 DECL_ABSTRACT_ORIGIN (decl) = tail;
175160e7
MT
2140 pushdecl (decl);
2141 /* Fully instantiate the address with the equivalent form so that the
2142 debugging information contains the actual register, instead of the
2143 virtual register. Do this by not passing an insn to
2144 subst_constants. */
02bea8a8 2145 subst_constants (&new_decl_rtl, NULL_RTX, map);
175160e7
MT
2146 apply_change_group ();
2147 DECL_RTL (decl) = new_decl_rtl;
2148 }
2149}
2150
2151/* Given a BLOCK node LET, push decls and levels so as to construct in the
2152 current function a tree of contexts isomorphic to the one that is given.
2153
2154 LEVEL indicates how far down into the BLOCK tree is the node we are
8ef63e62 2155 currently traversing. It is always zero except for recursive calls.
175160e7 2156
858a47b1 2157 MAP, if nonzero, is a pointer to an inline_remap map which indicates how
175160e7 2158 registers used in the DECL_RTL field should be remapped. If it is zero,
8ef63e62 2159 no mapping is necessary. */
175160e7
MT
2160
2161static void
8ef63e62 2162integrate_decl_tree (let, level, map)
175160e7
MT
2163 tree let;
2164 int level;
2165 struct inline_remap *map;
175160e7
MT
2166{
2167 tree t, node;
2168
8ef63e62
RS
2169 if (level > 0)
2170 pushlevel (0);
175160e7
MT
2171
2172 for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t))
2173 {
f6bad6ff
JM
2174 tree d;
2175
2176 push_obstacks_nochange ();
2177 saveable_allocation ();
2178 d = copy_node (t);
2179 pop_obstacks ();
2180
8ef63e62 2181 if (DECL_RTL (t) != 0)
175160e7
MT
2182 {
2183 DECL_RTL (d) = copy_rtx_and_substitute (DECL_RTL (t), map);
2184 /* Fully instantiate the address with the equivalent form so that the
2185 debugging information contains the actual register, instead of the
2186 virtual register. Do this by not passing an insn to
2187 subst_constants. */
02bea8a8 2188 subst_constants (&DECL_RTL (d), NULL_RTX, map);
175160e7
MT
2189 apply_change_group ();
2190 }
175160e7
MT
2191 /* These args would always appear unused, if not for this. */
2192 TREE_USED (d) = 1;
bd95070a
JW
2193 /* Prevent warning for shadowing with these. */
2194 DECL_ABSTRACT_ORIGIN (d) = t;
f6bad6ff
JM
2195
2196 if (DECL_LANG_SPECIFIC (d))
2197 copy_lang_decl (d);
2198
bd95070a 2199 pushdecl (d);
175160e7
MT
2200 }
2201
2202 for (t = BLOCK_SUBBLOCKS (let); t; t = TREE_CHAIN (t))
8ef63e62 2203 integrate_decl_tree (t, level + 1, map);
175160e7 2204
8ef63e62
RS
2205 if (level > 0)
2206 {
2207 node = poplevel (1, 0, 0);
2208 if (node)
81578142
RS
2209 {
2210 TREE_USED (node) = TREE_USED (let);
2211 BLOCK_ABSTRACT_ORIGIN (node) = let;
2212 }
8ef63e62 2213 }
175160e7 2214}
f6135b20
JW
2215
2216/* Given a BLOCK node LET, search for all DECL_RTL fields, and pass them
2217 through save_constants. */
2218
2219static void
2220save_constants_in_decl_trees (let)
2221 tree let;
2222{
2223 tree t;
2224
2225 for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t))
2226 if (DECL_RTL (t) != 0)
2227 save_constants (&DECL_RTL (t));
2228
2229 for (t = BLOCK_SUBBLOCKS (let); t; t = TREE_CHAIN (t))
2230 save_constants_in_decl_trees (t);
2231}
175160e7
MT
2232\f
2233/* Create a new copy of an rtx.
2234 Recursively copies the operands of the rtx,
2235 except for those few rtx codes that are sharable.
2236
2237 We always return an rtx that is similar to that incoming rtx, with the
2238 exception of possibly changing a REG to a SUBREG or vice versa. No
2239 rtl is ever emitted.
2240
2241 Handle constants that need to be placed in the constant pool by
2242 calling `force_const_mem'. */
2243
2244rtx
2245copy_rtx_and_substitute (orig, map)
2246 register rtx orig;
2247 struct inline_remap *map;
2248{
2249 register rtx copy, temp;
2250 register int i, j;
2251 register RTX_CODE code;
2252 register enum machine_mode mode;
2253 register char *format_ptr;
2254 int regno;
2255
2256 if (orig == 0)
2257 return 0;
2258
2259 code = GET_CODE (orig);
2260 mode = GET_MODE (orig);
2261
2262 switch (code)
2263 {
2264 case REG:
2265 /* If the stack pointer register shows up, it must be part of
2266 stack-adjustments (*not* because we eliminated the frame pointer!).
2267 Small hard registers are returned as-is. Pseudo-registers
2268 go through their `reg_map'. */
2269 regno = REGNO (orig);
2270 if (regno <= LAST_VIRTUAL_REGISTER)
2271 {
2272 /* Some hard registers are also mapped,
2273 but others are not translated. */
2274 if (map->reg_map[regno] != 0)
2275 return map->reg_map[regno];
2276
2277 /* If this is the virtual frame pointer, make space in current
2278 function's stack frame for the stack frame of the inline function.
2279
2280 Copy the address of this area into a pseudo. Map
2281 virtual_stack_vars_rtx to this pseudo and set up a constant
2282 equivalence for it to be the address. This will substitute the
2283 address into insns where it can be substituted and use the new
2284 pseudo where it can't. */
2285 if (regno == VIRTUAL_STACK_VARS_REGNUM)
2286 {
2287 rtx loc, seq;
2288 int size = DECL_FRAME_SIZE (map->fndecl);
175160e7 2289
3e42d56b
DE
2290#ifdef FRAME_GROWS_DOWNWARD
2291 /* In this case, virtual_stack_vars_rtx points to one byte
2292 higher than the top of the frame area. So make sure we
2293 allocate a big enough chunk to keep the frame pointer
2294 aligned like a real one. */
2295 size = CEIL_ROUND (size, BIGGEST_ALIGNMENT / BITS_PER_UNIT);
2296#endif
175160e7
MT
2297 start_sequence ();
2298 loc = assign_stack_temp (BLKmode, size, 1);
2299 loc = XEXP (loc, 0);
2300#ifdef FRAME_GROWS_DOWNWARD
2301 /* In this case, virtual_stack_vars_rtx points to one byte
2302 higher than the top of the frame area. So compute the offset
3e42d56b
DE
2303 to one byte higher than our substitute frame. */
2304 loc = plus_constant (loc, size);
175160e7 2305#endif
59b2d722
RK
2306 map->reg_map[regno] = temp
2307 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 2308
12307ca2
RK
2309#ifdef STACK_BOUNDARY
2310 mark_reg_pointer (map->reg_map[regno],
2311 STACK_BOUNDARY / BITS_PER_UNIT);
2312#endif
2313
2b145ea8
RK
2314 if (REGNO (temp) < map->const_equiv_map_size)
2315 {
2316 map->const_equiv_map[REGNO (temp)] = loc;
2317 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
2318 }
175160e7
MT
2319
2320 seq = gen_sequence ();
2321 end_sequence ();
2322 emit_insn_after (seq, map->insns_at_start);
5c23c401 2323 return temp;
175160e7
MT
2324 }
2325 else if (regno == VIRTUAL_INCOMING_ARGS_REGNUM)
2326 {
2327 /* Do the same for a block to contain any arguments referenced
0f41302f 2328 in memory. */
175160e7
MT
2329 rtx loc, seq;
2330 int size = FUNCTION_ARGS_SIZE (DECL_SAVED_INSNS (map->fndecl));
2331
2332 start_sequence ();
2333 loc = assign_stack_temp (BLKmode, size, 1);
2334 loc = XEXP (loc, 0);
931553d8
RS
2335 /* When arguments grow downward, the virtual incoming
2336 args pointer points to the top of the argument block,
0f41302f 2337 so the remapped location better do the same. */
931553d8
RS
2338#ifdef ARGS_GROW_DOWNWARD
2339 loc = plus_constant (loc, size);
2340#endif
59b2d722
RK
2341 map->reg_map[regno] = temp
2342 = force_reg (Pmode, force_operand (loc, NULL_RTX));
2b145ea8 2343
12307ca2
RK
2344#ifdef STACK_BOUNDARY
2345 mark_reg_pointer (map->reg_map[regno],
2346 STACK_BOUNDARY / BITS_PER_UNIT);
2347#endif
2348
2b145ea8
RK
2349 if (REGNO (temp) < map->const_equiv_map_size)
2350 {
2351 map->const_equiv_map[REGNO (temp)] = loc;
2352 map->const_age_map[REGNO (temp)] = CONST_AGE_PARM;
2353 }
175160e7
MT
2354
2355 seq = gen_sequence ();
2356 end_sequence ();
2357 emit_insn_after (seq, map->insns_at_start);
5c23c401 2358 return temp;
175160e7
MT
2359 }
2360 else if (REG_FUNCTION_VALUE_P (orig))
2361 {
2362 /* This is a reference to the function return value. If
2363 the function doesn't have a return value, error. If the
2364 mode doesn't agree, make a SUBREG. */
2365 if (map->inline_target == 0)
2366 /* Must be unrolling loops or replicating code if we
2367 reach here, so return the register unchanged. */
2368 return orig;
2369 else if (mode != GET_MODE (map->inline_target))
293e1467 2370 return gen_lowpart (mode, map->inline_target);
175160e7
MT
2371 else
2372 return map->inline_target;
2373 }
2374 return orig;
2375 }
2376 if (map->reg_map[regno] == NULL)
2377 {
2378 map->reg_map[regno] = gen_reg_rtx (mode);
2379 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (orig);
2380 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (orig);
2381 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (orig);
2382 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
12307ca2
RK
2383
2384 if (map->regno_pointer_flag[regno])
2385 mark_reg_pointer (map->reg_map[regno],
2386 map->regno_pointer_align[regno]);
175160e7
MT
2387 }
2388 return map->reg_map[regno];
2389
2390 case SUBREG:
2391 copy = copy_rtx_and_substitute (SUBREG_REG (orig), map);
2392 /* SUBREG is ordinary, but don't make nested SUBREGs. */
2393 if (GET_CODE (copy) == SUBREG)
38a448ca
RH
2394 return gen_rtx_SUBREG (GET_MODE (orig), SUBREG_REG (copy),
2395 SUBREG_WORD (orig) + SUBREG_WORD (copy));
bc2eeab2 2396 else if (GET_CODE (copy) == CONCAT)
340aa7f6 2397 return (subreg_realpart_p (orig) ? XEXP (copy, 0) : XEXP (copy, 1));
175160e7 2398 else
38a448ca
RH
2399 return gen_rtx_SUBREG (GET_MODE (orig), copy,
2400 SUBREG_WORD (orig));
175160e7 2401
e9a25f70 2402 case ADDRESSOF:
38a448ca
RH
2403 copy = gen_rtx_ADDRESSOF (mode,
2404 copy_rtx_and_substitute (XEXP (orig, 0), map), 0);
e9a25f70
JL
2405 SET_ADDRESSOF_DECL (copy, ADDRESSOF_DECL (orig));
2406 regno = ADDRESSOF_REGNO (orig);
2407 if (map->reg_map[regno])
2408 regno = REGNO (map->reg_map[regno]);
2409 else if (regno > LAST_VIRTUAL_REGISTER)
2410 {
2411 temp = XEXP (orig, 0);
2412 map->reg_map[regno] = gen_reg_rtx (GET_MODE (temp));
2413 REG_USERVAR_P (map->reg_map[regno]) = REG_USERVAR_P (temp);
2414 REG_LOOP_TEST_P (map->reg_map[regno]) = REG_LOOP_TEST_P (temp);
2415 RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (temp);
2416 /* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
2417
2418 if (map->regno_pointer_flag[regno])
2419 mark_reg_pointer (map->reg_map[regno],
2420 map->regno_pointer_align[regno]);
2421 regno = REGNO (map->reg_map[regno]);
2422 }
2423 ADDRESSOF_REGNO (copy) = regno;
2424 return copy;
2425
175160e7
MT
2426 case USE:
2427 case CLOBBER:
2428 /* USE and CLOBBER are ordinary, but we convert (use (subreg foo))
d632e927
RS
2429 to (use foo) if the original insn didn't have a subreg.
2430 Removing the subreg distorts the VAX movstrhi pattern
2431 by changing the mode of an operand. */
175160e7 2432 copy = copy_rtx_and_substitute (XEXP (orig, 0), map);
d632e927 2433 if (GET_CODE (copy) == SUBREG && GET_CODE (XEXP (orig, 0)) != SUBREG)
175160e7 2434 copy = SUBREG_REG (copy);
38a448ca 2435 return gen_rtx_fmt_e (code, VOIDmode, copy);
175160e7
MT
2436
2437 case CODE_LABEL:
1f3d3a31 2438 LABEL_PRESERVE_P (get_label_from_map (map, CODE_LABEL_NUMBER (orig)))
175160e7 2439 = LABEL_PRESERVE_P (orig);
1f3d3a31 2440 return get_label_from_map (map, CODE_LABEL_NUMBER (orig));
175160e7
MT
2441
2442 case LABEL_REF:
38a448ca
RH
2443 copy = gen_rtx_LABEL_REF (mode,
2444 LABEL_REF_NONLOCAL_P (orig) ? XEXP (orig, 0)
2445 : get_label_from_map (map,
2446 CODE_LABEL_NUMBER (XEXP (orig, 0))));
175160e7 2447 LABEL_OUTSIDE_LOOP_P (copy) = LABEL_OUTSIDE_LOOP_P (orig);
c1ceaaa6
RK
2448
2449 /* The fact that this label was previously nonlocal does not mean
2450 it still is, so we must check if it is within the range of
2451 this function's labels. */
2452 LABEL_REF_NONLOCAL_P (copy)
2453 = (LABEL_REF_NONLOCAL_P (orig)
2454 && ! (CODE_LABEL_NUMBER (XEXP (copy, 0)) >= get_first_label_num ()
2455 && CODE_LABEL_NUMBER (XEXP (copy, 0)) < max_label_num ()));
81d57b8e
RK
2456
2457 /* If we have made a nonlocal label local, it means that this
9faa82d8 2458 inlined call will be referring to our nonlocal goto handler.
81d57b8e
RK
2459 So make sure we create one for this block; we normally would
2460 not since this is not otherwise considered a "call". */
2461 if (LABEL_REF_NONLOCAL_P (orig) && ! LABEL_REF_NONLOCAL_P (copy))
2462 function_call_count++;
2463
175160e7
MT
2464 return copy;
2465
2466 case PC:
2467 case CC0:
2468 case CONST_INT:
f543676f
JW
2469 return orig;
2470
175160e7 2471 case SYMBOL_REF:
f543676f
JW
2472 /* Symbols which represent the address of a label stored in the constant
2473 pool must be modified to point to a constant pool entry for the
2474 remapped label. Otherwise, symbols are returned unchanged. */
2475 if (CONSTANT_POOL_ADDRESS_P (orig))
2476 {
2477 rtx constant = get_pool_constant (orig);
2478 if (GET_CODE (constant) == LABEL_REF)
15e13f2c 2479 return XEXP (force_const_mem (GET_MODE (orig),
c1ceaaa6
RK
2480 copy_rtx_and_substitute (constant,
2481 map)),
2482 0);
f543676f 2483 }
c1ceaaa6 2484
175160e7
MT
2485 return orig;
2486
2487 case CONST_DOUBLE:
2488 /* We have to make a new copy of this CONST_DOUBLE because don't want
2489 to use the old value of CONST_DOUBLE_MEM. Also, this may be a
2490 duplicate of a CONST_DOUBLE we have already seen. */
2491 if (GET_MODE_CLASS (GET_MODE (orig)) == MODE_FLOAT)
2492 {
2493 REAL_VALUE_TYPE d;
2494
2495 REAL_VALUE_FROM_CONST_DOUBLE (d, orig);
81fbaa41 2496 return CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (orig));
175160e7
MT
2497 }
2498 else
2499 return immed_double_const (CONST_DOUBLE_LOW (orig),
2500 CONST_DOUBLE_HIGH (orig), VOIDmode);
2501
2502 case CONST:
2503 /* Make new constant pool entry for a constant
2504 that was in the pool of the inline function. */
2505 if (RTX_INTEGRATED_P (orig))
2506 {
2507 /* If this was an address of a constant pool entry that itself
2508 had to be placed in the constant pool, it might not be a
2509 valid address. So the recursive call below might turn it
2510 into a register. In that case, it isn't a constant any
2511 more, so return it. This has the potential of changing a
2512 MEM into a REG, but we'll assume that it safe. */
2513 temp = copy_rtx_and_substitute (XEXP (orig, 0), map);
2514 if (! CONSTANT_P (temp))
2515 return temp;
2516 return validize_mem (force_const_mem (GET_MODE (orig), temp));
2517 }
2518 break;
2519
2520 case ADDRESS:
2521 /* If from constant pool address, make new constant pool entry and
2522 return its address. */
2523 if (! RTX_INTEGRATED_P (orig))
2524 abort ();
2525
15e13f2c
RK
2526 temp
2527 = force_const_mem (GET_MODE (XEXP (orig, 0)),
2528 copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0),
2529 map));
175160e7
MT
2530
2531#if 0
2532 /* Legitimizing the address here is incorrect.
2533
2534 The only ADDRESS rtx's that can reach here are ones created by
d7084298 2535 save_constants. Hence the operand of the ADDRESS is always valid
175160e7 2536 in this position of the instruction, since the original rtx without
d7084298 2537 the ADDRESS was valid.
175160e7
MT
2538
2539 The reason we don't legitimize the address here is that on the
2540 Sparc, the caller may have a (high ...) surrounding this ADDRESS.
2541 This code forces the operand of the address to a register, which
2542 fails because we can not take the HIGH part of a register.
2543
2544 Also, change_address may create new registers. These registers
2545 will not have valid reg_map entries. This can cause try_constants()
2546 to fail because assumes that all registers in the rtx have valid
2547 reg_map entries, and it may end up replacing one of these new
0f41302f 2548 registers with junk. */
175160e7
MT
2549
2550 if (! memory_address_p (GET_MODE (temp), XEXP (temp, 0)))
2551 temp = change_address (temp, GET_MODE (temp), XEXP (temp, 0));
2552#endif
2553
15e13f2c
RK
2554 temp = XEXP (temp, 0);
2555
2556#ifdef POINTERS_EXTEND_UNSIGNED
2557 if (GET_MODE (temp) != GET_MODE (orig))
2558 temp = convert_memory_address (GET_MODE (orig), temp);
2559#endif
2560
2561 return temp;
175160e7
MT
2562
2563 case ASM_OPERANDS:
2564 /* If a single asm insn contains multiple output operands
2565 then it contains multiple ASM_OPERANDS rtx's that share operand 3.
2566 We must make sure that the copied insn continues to share it. */
2567 if (map->orig_asm_operands_vector == XVEC (orig, 3))
2568 {
2569 copy = rtx_alloc (ASM_OPERANDS);
81d82304 2570 copy->volatil = orig->volatil;
175160e7
MT
2571 XSTR (copy, 0) = XSTR (orig, 0);
2572 XSTR (copy, 1) = XSTR (orig, 1);
2573 XINT (copy, 2) = XINT (orig, 2);
2574 XVEC (copy, 3) = map->copy_asm_operands_vector;
2575 XVEC (copy, 4) = map->copy_asm_constraints_vector;
2576 XSTR (copy, 5) = XSTR (orig, 5);
2577 XINT (copy, 6) = XINT (orig, 6);
2578 return copy;
2579 }
2580 break;
2581
2582 case CALL:
2583 /* This is given special treatment because the first
2584 operand of a CALL is a (MEM ...) which may get
2585 forced into a register for cse. This is undesirable
2586 if function-address cse isn't wanted or if we won't do cse. */
2587#ifndef NO_FUNCTION_CSE
2588 if (! (optimize && ! flag_no_function_cse))
2589#endif
38a448ca
RH
2590 return gen_rtx_CALL (GET_MODE (orig),
2591 gen_rtx_MEM (GET_MODE (XEXP (orig, 0)),
2592 copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0), map)),
175160e7
MT
2593 copy_rtx_and_substitute (XEXP (orig, 1), map));
2594 break;
2595
2596#if 0
2597 /* Must be ifdefed out for loop unrolling to work. */
2598 case RETURN:
2599 abort ();
2600#endif
2601
2602 case SET:
2603 /* If this is setting fp or ap, it means that we have a nonlocal goto.
e9a25f70 2604 Adjust the setting by the offset of the area we made.
175160e7
MT
2605 If the nonlocal goto is into the current function,
2606 this will result in unnecessarily bad code, but should work. */
2607 if (SET_DEST (orig) == virtual_stack_vars_rtx
2608 || SET_DEST (orig) == virtual_incoming_args_rtx)
e9a25f70
JL
2609 {
2610 /* In case a translation hasn't occurred already, make one now. */
2611 rtx junk = copy_rtx_and_substitute (SET_DEST (orig), map);
2612 rtx equiv_reg = map->reg_map[REGNO (SET_DEST (orig))];
2613 rtx equiv_loc = map->const_equiv_map[REGNO (equiv_reg)];
2614 HOST_WIDE_INT loc_offset
2615 = GET_CODE (equiv_loc) == REG ? 0 : INTVAL (XEXP (equiv_loc, 1));
2616
38a448ca
RH
2617 return gen_rtx_SET (VOIDmode, SET_DEST (orig),
2618 force_operand
2619 (plus_constant
2620 (copy_rtx_and_substitute (SET_SRC (orig), map),
2621 - loc_offset),
2622 NULL_RTX));
e9a25f70 2623 }
175160e7
MT
2624 break;
2625
2626 case MEM:
2627 copy = rtx_alloc (MEM);
2628 PUT_MODE (copy, mode);
2629 XEXP (copy, 0) = copy_rtx_and_substitute (XEXP (orig, 0), map);
2630 MEM_IN_STRUCT_P (copy) = MEM_IN_STRUCT_P (orig);
2631 MEM_VOLATILE_P (copy) = MEM_VOLATILE_P (orig);
a70f7bb2
JW
2632
2633 /* If doing function inlining, this MEM might not be const in the
2634 function that it is being inlined into, and thus may not be
2635 unchanging after function inlining. Constant pool references are
2636 handled elsewhere, so this doesn't lose RTX_UNCHANGING_P bits
2637 for them. */
2638 if (! map->integrating)
2639 RTX_UNCHANGING_P (copy) = RTX_UNCHANGING_P (orig);
2640
175160e7 2641 return copy;
e9a25f70
JL
2642
2643 default:
2644 break;
175160e7
MT
2645 }
2646
2647 copy = rtx_alloc (code);
2648 PUT_MODE (copy, mode);
2649 copy->in_struct = orig->in_struct;
2650 copy->volatil = orig->volatil;
2651 copy->unchanging = orig->unchanging;
2652
2653 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2654
2655 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2656 {
2657 switch (*format_ptr++)
2658 {
2659 case '0':
e9a25f70 2660 XEXP (copy, i) = XEXP (orig, i);
175160e7
MT
2661 break;
2662
2663 case 'e':
2664 XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i), map);
2665 break;
2666
2667 case 'u':
2668 /* Change any references to old-insns to point to the
2669 corresponding copied insns. */
2670 XEXP (copy, i) = map->insn_map[INSN_UID (XEXP (orig, i))];
2671 break;
2672
2673 case 'E':
2674 XVEC (copy, i) = XVEC (orig, i);
2675 if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
2676 {
2677 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2678 for (j = 0; j < XVECLEN (copy, i); j++)
2679 XVECEXP (copy, i, j)
2680 = copy_rtx_and_substitute (XVECEXP (orig, i, j), map);
2681 }
2682 break;
2683
02bea8a8
RK
2684 case 'w':
2685 XWINT (copy, i) = XWINT (orig, i);
2686 break;
2687
175160e7
MT
2688 case 'i':
2689 XINT (copy, i) = XINT (orig, i);
2690 break;
2691
2692 case 's':
2693 XSTR (copy, i) = XSTR (orig, i);
2694 break;
2695
2696 default:
2697 abort ();
2698 }
2699 }
2700
2701 if (code == ASM_OPERANDS && map->orig_asm_operands_vector == 0)
2702 {
2703 map->orig_asm_operands_vector = XVEC (orig, 3);
2704 map->copy_asm_operands_vector = XVEC (copy, 3);
2705 map->copy_asm_constraints_vector = XVEC (copy, 4);
2706 }
2707
2708 return copy;
2709}
2710\f
2711/* Substitute known constant values into INSN, if that is valid. */
2712
2713void
2714try_constants (insn, map)
2715 rtx insn;
2716 struct inline_remap *map;
2717{
2718 int i;
2719
2720 map->num_sets = 0;
2721 subst_constants (&PATTERN (insn), insn, map);
2722
2723 /* Apply the changes if they are valid; otherwise discard them. */
2724 apply_change_group ();
2725
2726 /* Show we don't know the value of anything stored or clobbered. */
2727 note_stores (PATTERN (insn), mark_stores);
2728 map->last_pc_value = 0;
2729#ifdef HAVE_cc0
2730 map->last_cc0_value = 0;
2731#endif
2732
2733 /* Set up any constant equivalences made in this insn. */
2734 for (i = 0; i < map->num_sets; i++)
2735 {
2736 if (GET_CODE (map->equiv_sets[i].dest) == REG)
2737 {
2738 int regno = REGNO (map->equiv_sets[i].dest);
2739
2b145ea8
RK
2740 if (regno < map->const_equiv_map_size
2741 && (map->const_equiv_map[regno] == 0
2742 /* Following clause is a hack to make case work where GNU C++
2743 reassigns a variable to make cse work right. */
2744 || ! rtx_equal_p (map->const_equiv_map[regno],
2745 map->equiv_sets[i].equiv)))
175160e7
MT
2746 {
2747 map->const_equiv_map[regno] = map->equiv_sets[i].equiv;
2748 map->const_age_map[regno] = map->const_age;
2749 }
2750 }
2751 else if (map->equiv_sets[i].dest == pc_rtx)
2752 map->last_pc_value = map->equiv_sets[i].equiv;
2753#ifdef HAVE_cc0
2754 else if (map->equiv_sets[i].dest == cc0_rtx)
2755 map->last_cc0_value = map->equiv_sets[i].equiv;
2756#endif
2757 }
2758}
2759\f
2760/* Substitute known constants for pseudo regs in the contents of LOC,
2761 which are part of INSN.
d45cf215 2762 If INSN is zero, the substitution should always be done (this is used to
175160e7
MT
2763 update DECL_RTL).
2764 These changes are taken out by try_constants if the result is not valid.
2765
2766 Note that we are more concerned with determining when the result of a SET
2767 is a constant, for further propagation, than actually inserting constants
2768 into insns; cse will do the latter task better.
2769
2770 This function is also used to adjust address of items previously addressed
2771 via the virtual stack variable or virtual incoming arguments registers. */
2772
2773static void
2774subst_constants (loc, insn, map)
2775 rtx *loc;
2776 rtx insn;
2777 struct inline_remap *map;
2778{
2779 rtx x = *loc;
2780 register int i;
2781 register enum rtx_code code;
2782 register char *format_ptr;
2783 int num_changes = num_validated_changes ();
2784 rtx new = 0;
2785 enum machine_mode op0_mode;
2786
2787 code = GET_CODE (x);
2788
2789 switch (code)
2790 {
2791 case PC:
2792 case CONST_INT:
2793 case CONST_DOUBLE:
2794 case SYMBOL_REF:
2795 case CONST:
2796 case LABEL_REF:
2797 case ADDRESS:
2798 return;
2799
2800#ifdef HAVE_cc0
2801 case CC0:
2802 validate_change (insn, loc, map->last_cc0_value, 1);
2803 return;
2804#endif
2805
2806 case USE:
2807 case CLOBBER:
2808 /* The only thing we can do with a USE or CLOBBER is possibly do
2809 some substitutions in a MEM within it. */
2810 if (GET_CODE (XEXP (x, 0)) == MEM)
2811 subst_constants (&XEXP (XEXP (x, 0), 0), insn, map);
2812 return;
2813
2814 case REG:
2815 /* Substitute for parms and known constants. Don't replace
2816 hard regs used as user variables with constants. */
2817 {
2818 int regno = REGNO (x);
c66e0741 2819
175160e7 2820 if (! (regno < FIRST_PSEUDO_REGISTER && REG_USERVAR_P (x))
c66e0741 2821 && regno < map->const_equiv_map_size
175160e7
MT
2822 && map->const_equiv_map[regno] != 0
2823 && map->const_age_map[regno] >= map->const_age)
2824 validate_change (insn, loc, map->const_equiv_map[regno], 1);
2825 return;
2826 }
2827
2828 case SUBREG:
637c5064
RS
2829 /* SUBREG applied to something other than a reg
2830 should be treated as ordinary, since that must
2831 be a special hack and we don't know how to treat it specially.
2832 Consider for example mulsidi3 in m68k.md.
2833 Ordinary SUBREG of a REG needs this special treatment. */
2834 if (GET_CODE (SUBREG_REG (x)) == REG)
2835 {
2836 rtx inner = SUBREG_REG (x);
2837 rtx new = 0;
175160e7 2838
637c5064
RS
2839 /* We can't call subst_constants on &SUBREG_REG (x) because any
2840 constant or SUBREG wouldn't be valid inside our SUBEG. Instead,
2841 see what is inside, try to form the new SUBREG and see if that is
2842 valid. We handle two cases: extracting a full word in an
2843 integral mode and extracting the low part. */
2844 subst_constants (&inner, NULL_RTX, map);
175160e7 2845
637c5064
RS
2846 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
2847 && GET_MODE_SIZE (GET_MODE (x)) == UNITS_PER_WORD
2848 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
2849 new = operand_subword (inner, SUBREG_WORD (x), 0,
2850 GET_MODE (SUBREG_REG (x)));
175160e7 2851
26986265 2852 cancel_changes (num_changes);
637c5064
RS
2853 if (new == 0 && subreg_lowpart_p (x))
2854 new = gen_lowpart_common (GET_MODE (x), inner);
175160e7 2855
637c5064
RS
2856 if (new)
2857 validate_change (insn, loc, new, 1);
175160e7 2858
637c5064
RS
2859 return;
2860 }
2861 break;
175160e7
MT
2862
2863 case MEM:
2864 subst_constants (&XEXP (x, 0), insn, map);
2865
2866 /* If a memory address got spoiled, change it back. */
2867 if (insn != 0 && num_validated_changes () != num_changes
2868 && !memory_address_p (GET_MODE (x), XEXP (x, 0)))
2869 cancel_changes (num_changes);
2870 return;
2871
2872 case SET:
2873 {
2874 /* Substitute constants in our source, and in any arguments to a
2875 complex (e..g, ZERO_EXTRACT) destination, but not in the destination
2876 itself. */
2877 rtx *dest_loc = &SET_DEST (x);
2878 rtx dest = *dest_loc;
2879 rtx src, tem;
2880
2881 subst_constants (&SET_SRC (x), insn, map);
2882 src = SET_SRC (x);
2883
2884 while (GET_CODE (*dest_loc) == ZERO_EXTRACT
175160e7
MT
2885 || GET_CODE (*dest_loc) == SUBREG
2886 || GET_CODE (*dest_loc) == STRICT_LOW_PART)
2887 {
2888 if (GET_CODE (*dest_loc) == ZERO_EXTRACT)
2889 {
2890 subst_constants (&XEXP (*dest_loc, 1), insn, map);
2891 subst_constants (&XEXP (*dest_loc, 2), insn, map);
2892 }
2893 dest_loc = &XEXP (*dest_loc, 0);
2894 }
2895
91594e43
RS
2896 /* Do substitute in the address of a destination in memory. */
2897 if (GET_CODE (*dest_loc) == MEM)
2898 subst_constants (&XEXP (*dest_loc, 0), insn, map);
2899
175160e7
MT
2900 /* Check for the case of DEST a SUBREG, both it and the underlying
2901 register are less than one word, and the SUBREG has the wider mode.
2902 In the case, we are really setting the underlying register to the
2903 source converted to the mode of DEST. So indicate that. */
2904 if (GET_CODE (dest) == SUBREG
2905 && GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD
2906 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) <= UNITS_PER_WORD
2907 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))
2908 <= GET_MODE_SIZE (GET_MODE (dest)))
e2eb57b7
RK
2909 && (tem = gen_lowpart_if_possible (GET_MODE (SUBREG_REG (dest)),
2910 src)))
175160e7
MT
2911 src = tem, dest = SUBREG_REG (dest);
2912
2913 /* If storing a recognizable value save it for later recording. */
2914 if ((map->num_sets < MAX_RECOG_OPERANDS)
2915 && (CONSTANT_P (src)
c9734bb9 2916 || (GET_CODE (src) == REG
83b93f40
RK
2917 && (REGNO (src) == VIRTUAL_INCOMING_ARGS_REGNUM
2918 || REGNO (src) == VIRTUAL_STACK_VARS_REGNUM))
175160e7
MT
2919 || (GET_CODE (src) == PLUS
2920 && GET_CODE (XEXP (src, 0)) == REG
83b93f40
RK
2921 && (REGNO (XEXP (src, 0)) == VIRTUAL_INCOMING_ARGS_REGNUM
2922 || REGNO (XEXP (src, 0)) == VIRTUAL_STACK_VARS_REGNUM)
175160e7
MT
2923 && CONSTANT_P (XEXP (src, 1)))
2924 || GET_CODE (src) == COMPARE
2925#ifdef HAVE_cc0
2926 || dest == cc0_rtx
2927#endif
2928 || (dest == pc_rtx
2929 && (src == pc_rtx || GET_CODE (src) == RETURN
2930 || GET_CODE (src) == LABEL_REF))))
2931 {
2932 /* Normally, this copy won't do anything. But, if SRC is a COMPARE
2933 it will cause us to save the COMPARE with any constants
2934 substituted, which is what we want for later. */
2935 map->equiv_sets[map->num_sets].equiv = copy_rtx (src);
2936 map->equiv_sets[map->num_sets++].dest = dest;
2937 }
175160e7 2938 }
e9a25f70
JL
2939 return;
2940
2941 default:
2942 break;
175160e7
MT
2943 }
2944
2945 format_ptr = GET_RTX_FORMAT (code);
2946
2947 /* If the first operand is an expression, save its mode for later. */
2948 if (*format_ptr == 'e')
2949 op0_mode = GET_MODE (XEXP (x, 0));
2950
2951 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2952 {
2953 switch (*format_ptr++)
2954 {
2955 case '0':
2956 break;
2957
2958 case 'e':
2959 if (XEXP (x, i))
2960 subst_constants (&XEXP (x, i), insn, map);
2961 break;
2962
2963 case 'u':
2964 case 'i':
2965 case 's':
02bea8a8 2966 case 'w':
175160e7
MT
2967 break;
2968
2969 case 'E':
2970 if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
2971 {
2972 int j;
2973 for (j = 0; j < XVECLEN (x, i); j++)
2974 subst_constants (&XVECEXP (x, i, j), insn, map);
2975 }
2976 break;
2977
2978 default:
2979 abort ();
2980 }
2981 }
2982
2983 /* If this is a commutative operation, move a constant to the second
2984 operand unless the second operand is already a CONST_INT. */
2985 if ((GET_RTX_CLASS (code) == 'c' || code == NE || code == EQ)
2986 && CONSTANT_P (XEXP (x, 0)) && GET_CODE (XEXP (x, 1)) != CONST_INT)
2987 {
2988 rtx tem = XEXP (x, 0);
2989 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
2990 validate_change (insn, &XEXP (x, 1), tem, 1);
2991 }
2992
2993 /* Simplify the expression in case we put in some constants. */
2994 switch (GET_RTX_CLASS (code))
2995 {
2996 case '1':
2997 new = simplify_unary_operation (code, GET_MODE (x),
2998 XEXP (x, 0), op0_mode);
2999 break;
3000
3001 case '<':
3002 {
3003 enum machine_mode op_mode = GET_MODE (XEXP (x, 0));
3004 if (op_mode == VOIDmode)
3005 op_mode = GET_MODE (XEXP (x, 1));
3006 new = simplify_relational_operation (code, op_mode,
3007 XEXP (x, 0), XEXP (x, 1));
b565a316
RK
3008#ifdef FLOAT_STORE_FLAG_VALUE
3009 if (new != 0 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
3010 new = ((new == const0_rtx) ? CONST0_RTX (GET_MODE (x))
81fbaa41
RK
3011 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3012 GET_MODE (x)));
b565a316 3013#endif
175160e7
MT
3014 break;
3015 }
3016
3017 case '2':
3018 case 'c':
3019 new = simplify_binary_operation (code, GET_MODE (x),
3020 XEXP (x, 0), XEXP (x, 1));
3021 break;
3022
3023 case 'b':
3024 case '3':
3025 new = simplify_ternary_operation (code, GET_MODE (x), op0_mode,
3026 XEXP (x, 0), XEXP (x, 1), XEXP (x, 2));
3027 break;
3028 }
3029
3030 if (new)
3031 validate_change (insn, loc, new, 1);
3032}
3033
3034/* Show that register modified no longer contain known constants. We are
3035 called from note_stores with parts of the new insn. */
3036
3037void
3038mark_stores (dest, x)
3039 rtx dest;
3040 rtx x;
3041{
e2eb57b7
RK
3042 int regno = -1;
3043 enum machine_mode mode;
3044
3045 /* DEST is always the innermost thing set, except in the case of
3046 SUBREGs of hard registers. */
175160e7
MT
3047
3048 if (GET_CODE (dest) == REG)
e2eb57b7
RK
3049 regno = REGNO (dest), mode = GET_MODE (dest);
3050 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
3051 {
3052 regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
3053 mode = GET_MODE (SUBREG_REG (dest));
3054 }
3055
3056 if (regno >= 0)
3057 {
3058 int last_reg = (regno >= FIRST_PSEUDO_REGISTER ? regno
3059 : regno + HARD_REGNO_NREGS (regno, mode) - 1);
3060 int i;
3061
e9a25f70
JL
3062 /* Ignore virtual stack var or virtual arg register since those
3063 are handled separately. */
3064 if (regno != VIRTUAL_INCOMING_ARGS_REGNUM
3065 && regno != VIRTUAL_STACK_VARS_REGNUM)
3066 for (i = regno; i <= last_reg; i++)
3067 if (i < global_const_equiv_map_size)
3068 global_const_equiv_map[i] = 0;
e2eb57b7 3069 }
175160e7
MT
3070}
3071\f
3072/* If any CONST expressions with RTX_INTEGRATED_P are present in the rtx
3073 pointed to by PX, they represent constants in the constant pool.
3074 Replace these with a new memory reference obtained from force_const_mem.
3075 Similarly, ADDRESS expressions with RTX_INTEGRATED_P represent the
3076 address of a constant pool entry. Replace them with the address of
3077 a new constant pool entry obtained from force_const_mem. */
3078
3079static void
3080restore_constants (px)
3081 rtx *px;
3082{
3083 rtx x = *px;
3084 int i, j;
3085 char *fmt;
3086
3087 if (x == 0)
3088 return;
3089
3090 if (GET_CODE (x) == CONST_DOUBLE)
3091 {
3092 /* We have to make a new CONST_DOUBLE to ensure that we account for
3093 it correctly. Using the old CONST_DOUBLE_MEM data is wrong. */
3094 if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
3095 {
3096 REAL_VALUE_TYPE d;
3097
3098 REAL_VALUE_FROM_CONST_DOUBLE (d, x);
81fbaa41 3099 *px = CONST_DOUBLE_FROM_REAL_VALUE (d, GET_MODE (x));
175160e7
MT
3100 }
3101 else
3102 *px = immed_double_const (CONST_DOUBLE_LOW (x), CONST_DOUBLE_HIGH (x),
3103 VOIDmode);
3104 }
3105
3106 else if (RTX_INTEGRATED_P (x) && GET_CODE (x) == CONST)
3107 {
3108 restore_constants (&XEXP (x, 0));
3109 *px = validize_mem (force_const_mem (GET_MODE (x), XEXP (x, 0)));
3110 }
3111 else if (RTX_INTEGRATED_P (x) && GET_CODE (x) == SUBREG)
3112 {
3113 /* This must be (subreg/i:M1 (const/i:M2 ...) 0). */
3114 rtx new = XEXP (SUBREG_REG (x), 0);
3115
3116 restore_constants (&new);
3117 new = force_const_mem (GET_MODE (SUBREG_REG (x)), new);
3118 PUT_MODE (new, GET_MODE (x));
3119 *px = validize_mem (new);
3120 }
3121 else if (RTX_INTEGRATED_P (x) && GET_CODE (x) == ADDRESS)
3122 {
15e13f2c
RK
3123 rtx new = XEXP (force_const_mem (GET_MODE (XEXP (x, 0)),
3124 XEXP (XEXP (x, 0), 0)),
3125 0);
3126
3127#ifdef POINTERS_EXTEND_UNSIGNED
3128 if (GET_MODE (new) != GET_MODE (x))
3129 new = convert_memory_address (GET_MODE (x), new);
3130#endif
3131
3132 *px = new;
175160e7
MT
3133 }
3134 else
3135 {
3136 fmt = GET_RTX_FORMAT (GET_CODE (x));
3137 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (x)); i++)
3138 {
3139 switch (*fmt++)
3140 {
3141 case 'E':
3142 for (j = 0; j < XVECLEN (x, i); j++)
3143 restore_constants (&XVECEXP (x, i, j));
3144 break;
3145
3146 case 'e':
3147 restore_constants (&XEXP (x, i));
3148 break;
3149 }
3150 }
3151 }
3152}
3153\f
81578142
RS
3154/* Given a pointer to some BLOCK node, if the BLOCK_ABSTRACT_ORIGIN for the
3155 given BLOCK node is NULL, set the BLOCK_ABSTRACT_ORIGIN for the node so
3156 that it points to the node itself, thus indicating that the node is its
3157 own (abstract) origin. Additionally, if the BLOCK_ABSTRACT_ORIGIN for
3158 the given node is NULL, recursively descend the decl/block tree which
3159 it is the root of, and for each other ..._DECL or BLOCK node contained
3160 therein whose DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also
3161 still NULL, set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN
3162 values to point to themselves. */
3163
81578142
RS
3164static void
3165set_block_origin_self (stmt)
3166 register tree stmt;
3167{
3168 if (BLOCK_ABSTRACT_ORIGIN (stmt) == NULL_TREE)
3169 {
3170 BLOCK_ABSTRACT_ORIGIN (stmt) = stmt;
3171
3172 {
3173 register tree local_decl;
3174
3175 for (local_decl = BLOCK_VARS (stmt);
3176 local_decl != NULL_TREE;
3177 local_decl = TREE_CHAIN (local_decl))
3178 set_decl_origin_self (local_decl); /* Potential recursion. */
3179 }
3180
3181 {
3182 register tree subblock;
3183
3184 for (subblock = BLOCK_SUBBLOCKS (stmt);
3185 subblock != NULL_TREE;
3186 subblock = BLOCK_CHAIN (subblock))
3187 set_block_origin_self (subblock); /* Recurse. */
3188 }
3189 }
3190}
3191
3192/* Given a pointer to some ..._DECL node, if the DECL_ABSTRACT_ORIGIN for
3193 the given ..._DECL node is NULL, set the DECL_ABSTRACT_ORIGIN for the
3194 node to so that it points to the node itself, thus indicating that the
3195 node represents its own (abstract) origin. Additionally, if the
3196 DECL_ABSTRACT_ORIGIN for the given node is NULL, recursively descend
3197 the decl/block tree of which the given node is the root of, and for
3198 each other ..._DECL or BLOCK node contained therein whose
3199 DECL_ABSTRACT_ORIGINs or BLOCK_ABSTRACT_ORIGINs are also still NULL,
3200 set *their* DECL_ABSTRACT_ORIGIN or BLOCK_ABSTRACT_ORIGIN values to
3201 point to themselves. */
3202
3203static void
3204set_decl_origin_self (decl)
3205 register tree decl;
3206{
3207 if (DECL_ABSTRACT_ORIGIN (decl) == NULL_TREE)
3208 {
3209 DECL_ABSTRACT_ORIGIN (decl) = decl;
3210 if (TREE_CODE (decl) == FUNCTION_DECL)
3211 {
3212 register tree arg;
3213
3214 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
3215 DECL_ABSTRACT_ORIGIN (arg) = arg;
29d356fb
RK
3216 if (DECL_INITIAL (decl) != NULL_TREE
3217 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
3218 set_block_origin_self (DECL_INITIAL (decl));
3219 }
3220 }
3221}
3222\f
3223/* Given a pointer to some BLOCK node, and a boolean value to set the
3224 "abstract" flags to, set that value into the BLOCK_ABSTRACT flag for
3225 the given block, and for all local decls and all local sub-blocks
3226 (recursively) which are contained therein. */
3227
81578142
RS
3228static void
3229set_block_abstract_flags (stmt, setting)
3230 register tree stmt;
3231 register int setting;
3232{
12307ca2
RK
3233 register tree local_decl;
3234 register tree subblock;
81578142 3235
12307ca2 3236 BLOCK_ABSTRACT (stmt) = setting;
81578142 3237
12307ca2
RK
3238 for (local_decl = BLOCK_VARS (stmt);
3239 local_decl != NULL_TREE;
3240 local_decl = TREE_CHAIN (local_decl))
3241 set_decl_abstract_flags (local_decl, setting);
81578142 3242
12307ca2
RK
3243 for (subblock = BLOCK_SUBBLOCKS (stmt);
3244 subblock != NULL_TREE;
3245 subblock = BLOCK_CHAIN (subblock))
3246 set_block_abstract_flags (subblock, setting);
81578142
RS
3247}
3248
3249/* Given a pointer to some ..._DECL node, and a boolean value to set the
3250 "abstract" flags to, set that value into the DECL_ABSTRACT flag for the
3251 given decl, and (in the case where the decl is a FUNCTION_DECL) also
3252 set the abstract flags for all of the parameters, local vars, local
3253 blocks and sub-blocks (recursively) to the same setting. */
3254
3255void
3256set_decl_abstract_flags (decl, setting)
3257 register tree decl;
3258 register int setting;
3259{
3260 DECL_ABSTRACT (decl) = setting;
3261 if (TREE_CODE (decl) == FUNCTION_DECL)
3262 {
3263 register tree arg;
3264
3265 for (arg = DECL_ARGUMENTS (decl); arg; arg = TREE_CHAIN (arg))
3266 DECL_ABSTRACT (arg) = setting;
29d356fb
RK
3267 if (DECL_INITIAL (decl) != NULL_TREE
3268 && DECL_INITIAL (decl) != error_mark_node)
81578142
RS
3269 set_block_abstract_flags (DECL_INITIAL (decl), setting);
3270 }
3271}
3272\f
175160e7
MT
3273/* Output the assembly language code for the function FNDECL
3274 from its DECL_SAVED_INSNS. Used for inline functions that are output
3275 at end of compilation instead of where they came in the source. */
3276
3277void
3278output_inline_function (fndecl)
3279 tree fndecl;
3280{
ca695ac9 3281 rtx head;
175160e7
MT
3282 rtx last;
3283
27ed242c
RK
3284 /* Things we allocate from here on are part of this function, not
3285 permanent. */
3286 temporary_allocation ();
3287
ca695ac9 3288 head = DECL_SAVED_INSNS (fndecl);
175160e7
MT
3289 current_function_decl = fndecl;
3290
3291 /* This call is only used to initialize global variables. */
3292 init_function_start (fndecl, "lossage", 1);
3293
3294 /* Redo parameter determinations in case the FUNCTION_...
3295 macros took machine-specific actions that need to be redone. */
3296 assign_parms (fndecl, 1);
3297
3298 /* Set stack frame size. */
3299 assign_stack_local (BLKmode, DECL_FRAME_SIZE (fndecl), 0);
3300
12307ca2
RK
3301 /* The first is a bit of a lie (the array may be larger), but doesn't
3302 matter too much and it isn't worth saving the actual bound. */
3303 reg_rtx_no = regno_pointer_flag_length = MAX_REGNUM (head);
3304 regno_reg_rtx = (rtx *) INLINE_REGNO_REG_RTX (head);
3305 regno_pointer_flag = INLINE_REGNO_POINTER_FLAG (head);
3306 regno_pointer_align = INLINE_REGNO_POINTER_ALIGN (head);
e9a25f70
JL
3307 max_parm_reg = MAX_PARMREG (head);
3308 parm_reg_stack_loc = (rtx *) PARMREG_STACK_LOC (head);
12307ca2 3309
175160e7 3310 stack_slot_list = STACK_SLOT_LIST (head);
5b0e2c7d 3311 forced_labels = FORCED_LABELS (head);
175160e7
MT
3312
3313 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_CALLS_ALLOCA)
3314 current_function_calls_alloca = 1;
3315
3316 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_CALLS_SETJMP)
3317 current_function_calls_setjmp = 1;
3318
3319 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_CALLS_LONGJMP)
3320 current_function_calls_longjmp = 1;
3321
3322 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_RETURNS_STRUCT)
3323 current_function_returns_struct = 1;
3324
3325 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_RETURNS_PCC_STRUCT)
3326 current_function_returns_pcc_struct = 1;
3327
3328 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_NEEDS_CONTEXT)
3329 current_function_needs_context = 1;
3330
3331 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_HAS_NONLOCAL_LABEL)
3332 current_function_has_nonlocal_label = 1;
3333
3334 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_RETURNS_POINTER)
3335 current_function_returns_pointer = 1;
3336
3337 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_USES_CONST_POOL)
3338 current_function_uses_const_pool = 1;
3339
3340 if (FUNCTION_FLAGS (head) & FUNCTION_FLAGS_USES_PIC_OFFSET_TABLE)
3341 current_function_uses_pic_offset_table = 1;
3342
3343 current_function_outgoing_args_size = OUTGOING_ARGS_SIZE (head);
3344 current_function_pops_args = POPS_ARGS (head);
3345
354d687f
RK
3346 /* This is the only thing the expand_function_end call that uses to be here
3347 actually does and that call can cause problems. */
3348 immediate_size_expand--;
175160e7
MT
3349
3350 /* Find last insn and rebuild the constant pool. */
3351 for (last = FIRST_PARM_INSN (head);
3352 NEXT_INSN (last); last = NEXT_INSN (last))
3353 {
3354 if (GET_RTX_CLASS (GET_CODE (last)) == 'i')
3355 {
3356 restore_constants (&PATTERN (last));
3357 restore_constants (&REG_NOTES (last));
3358 }
3359 }
3360
3361 set_new_first_and_last_insn (FIRST_PARM_INSN (head), last);
3362 set_new_first_and_last_label_num (FIRST_LABELNO (head), LAST_LABELNO (head));
3363
81578142
RS
3364 /* We must have already output DWARF debugging information for the
3365 original (abstract) inline function declaration/definition, so
3366 we want to make sure that the debugging information we generate
3367 for this special instance of the inline function refers back to
3368 the information we already generated. To make sure that happens,
3369 we simply have to set the DECL_ABSTRACT_ORIGIN for the function
3370 node (and for all of the local ..._DECL nodes which are its children)
3371 so that they all point to themselves. */
3372
3373 set_decl_origin_self (fndecl);
3374
51783c14
JM
3375 /* We're not deferring this any longer. */
3376 DECL_DEFER_OUTPUT (fndecl) = 0;
3377
f4744807
JM
3378 /* We can't inline this anymore. */
3379 DECL_INLINE (fndecl) = 0;
09578c27 3380
175160e7
MT
3381 /* Compile this function all the way down to assembly code. */
3382 rest_of_compilation (fndecl);
3383
3384 current_function_decl = 0;
175160e7 3385}
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