]> gcc.gnu.org Git - gcc.git/blame - gcc/hard-reg-set.h
2003-10-13 Michael Koch <konqueror@gmx.de>
[gcc.git] / gcc / hard-reg-set.h
CommitLineData
3245eea0 1/* Sets (bit vectors) of hard registers, and operations on them.
61f71b34 2 Copyright (C) 1987, 1992, 1994, 2000, 2003 Free Software Foundation, Inc.
3245eea0 3
1322177d 4This file is part of GCC
3245eea0 5
1322177d
LB
6GCC is free software; you can redistribute it and/or modify it under
7the terms of the GNU General Public License as published by the Free
8Software Foundation; either version 2, or (at your option) any later
9version.
3245eea0 10
1322177d
LB
11GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12WARRANTY; without even the implied warranty of MERCHANTABILITY or
13FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14for more details.
3245eea0
CH
15
16You should have received a copy of the GNU General Public License
1322177d
LB
17along with GCC; see the file COPYING. If not, write to the Free
18Software Foundation, 59 Temple Place - Suite 330, Boston, MA
1902111-1307, USA. */
3245eea0 20
88657302
RH
21#ifndef GCC_HARD_REG_SET_H
22#define GCC_HARD_REG_SET_H
3245eea0
CH
23
24/* Define the type of a set of hard registers. */
25
328d0797
RS
26/* HARD_REG_ELT_TYPE is a typedef of the unsigned integral type which
27 will be used for hard reg sets, either alone or in an array.
28
29 If HARD_REG_SET is a macro, its definition is HARD_REG_ELT_TYPE,
30 and it has enough bits to represent all the target machine's hard
31 registers. Otherwise, it is a typedef for a suitably sized array
32 of HARD_REG_ELT_TYPEs. HARD_REG_SET_LONGS is defined as how many.
3245eea0
CH
33
34 Note that lots of code assumes that the first part of a regset is
35 the same format as a HARD_REG_SET. To help make sure this is true,
36 we only try the widest integer mode (HOST_WIDE_INT) instead of all the
328d0797
RS
37 smaller types. This approach loses only if there are a very few
38 registers and then only in the few cases where we have an array of
39 HARD_REG_SETs, so it needn't be as complex as it used to be. */
40
41typedef unsigned HOST_WIDE_INT HARD_REG_ELT_TYPE;
3245eea0
CH
42
43#if FIRST_PSEUDO_REGISTER <= HOST_BITS_PER_WIDE_INT
328d0797
RS
44
45#define HARD_REG_SET HARD_REG_ELT_TYPE
3245eea0
CH
46
47#else
48
49#define HARD_REG_SET_LONGS \
50 ((FIRST_PSEUDO_REGISTER + HOST_BITS_PER_WIDE_INT - 1) \
51 / HOST_BITS_PER_WIDE_INT)
328d0797 52typedef HARD_REG_ELT_TYPE HARD_REG_SET[HARD_REG_SET_LONGS];
3245eea0
CH
53
54#endif
55
328d0797
RS
56/* HARD_CONST is used to cast a constant to the appropriate type
57 for use with a HARD_REG_SET. */
3245eea0 58
328d0797 59#define HARD_CONST(X) ((HARD_REG_ELT_TYPE) (X))
3245eea0
CH
60
61/* Define macros SET_HARD_REG_BIT, CLEAR_HARD_REG_BIT and TEST_HARD_REG_BIT
62 to set, clear or test one bit in a hard reg set of type HARD_REG_SET.
63 All three take two arguments: the set and the register number.
64
65 In the case where sets are arrays of longs, the first argument
66 is actually a pointer to a long.
67
68 Define two macros for initializing a set:
69 CLEAR_HARD_REG_SET and SET_HARD_REG_SET.
70 These take just one argument.
71
72 Also define macros for copying hard reg sets:
73 COPY_HARD_REG_SET and COMPL_HARD_REG_SET.
74 These take two arguments TO and FROM; they read from FROM
75 and store into TO. COMPL_HARD_REG_SET complements each bit.
76
77 Also define macros for combining hard reg sets:
78 IOR_HARD_REG_SET and AND_HARD_REG_SET.
79 These take two arguments TO and FROM; they read from FROM
80 and combine bitwise into TO. Define also two variants
81 IOR_COMPL_HARD_REG_SET and AND_COMPL_HARD_REG_SET
82 which use the complement of the set FROM.
83
84 Also define GO_IF_HARD_REG_SUBSET (X, Y, TO):
85 if X is a subset of Y, go to TO.
86*/
87
88#ifdef HARD_REG_SET
89
90#define SET_HARD_REG_BIT(SET, BIT) \
91 ((SET) |= HARD_CONST (1) << (BIT))
92#define CLEAR_HARD_REG_BIT(SET, BIT) \
93 ((SET) &= ~(HARD_CONST (1) << (BIT)))
94#define TEST_HARD_REG_BIT(SET, BIT) \
ae32926b 95 (!!((SET) & (HARD_CONST (1) << (BIT))))
3245eea0
CH
96
97#define CLEAR_HARD_REG_SET(TO) ((TO) = HARD_CONST (0))
328d0797 98#define SET_HARD_REG_SET(TO) ((TO) = ~ HARD_CONST (0))
3245eea0
CH
99
100#define COPY_HARD_REG_SET(TO, FROM) ((TO) = (FROM))
101#define COMPL_HARD_REG_SET(TO, FROM) ((TO) = ~(FROM))
102
103#define IOR_HARD_REG_SET(TO, FROM) ((TO) |= (FROM))
104#define IOR_COMPL_HARD_REG_SET(TO, FROM) ((TO) |= ~ (FROM))
105#define AND_HARD_REG_SET(TO, FROM) ((TO) &= (FROM))
106#define AND_COMPL_HARD_REG_SET(TO, FROM) ((TO) &= ~ (FROM))
107
108#define GO_IF_HARD_REG_SUBSET(X,Y,TO) if (HARD_CONST (0) == ((X) & ~(Y))) goto TO
109
110#define GO_IF_HARD_REG_EQUAL(X,Y,TO) if ((X) == (Y)) goto TO
328d0797 111
3245eea0
CH
112#else
113
114#define UHOST_BITS_PER_WIDE_INT ((unsigned) HOST_BITS_PER_WIDE_INT)
115
116#define SET_HARD_REG_BIT(SET, BIT) \
117 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
328d0797 118 |= HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))
3245eea0
CH
119
120#define CLEAR_HARD_REG_BIT(SET, BIT) \
121 ((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
328d0797 122 &= ~(HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT)))
3245eea0
CH
123
124#define TEST_HARD_REG_BIT(SET, BIT) \
ae32926b
MM
125 (!!((SET)[(BIT) / UHOST_BITS_PER_WIDE_INT] \
126 & (HARD_CONST (1) << ((BIT) % UHOST_BITS_PER_WIDE_INT))))
3245eea0 127
ea78578f
MM
128#if FIRST_PSEUDO_REGISTER <= 2*HOST_BITS_PER_WIDE_INT
129#define CLEAR_HARD_REG_SET(TO) \
b3694847 130do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
131 scan_tp_[0] = 0; \
132 scan_tp_[1] = 0; } while (0)
133
134#define SET_HARD_REG_SET(TO) \
b3694847 135do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
136 scan_tp_[0] = -1; \
137 scan_tp_[1] = -1; } while (0)
138
139#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 140do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
141 scan_tp_[0] = scan_fp_[0]; \
142 scan_tp_[1] = scan_fp_[1]; } while (0)
143
144#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 145do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
146 scan_tp_[0] = ~ scan_fp_[0]; \
147 scan_tp_[1] = ~ scan_fp_[1]; } while (0)
148
149#define AND_HARD_REG_SET(TO, FROM) \
b3694847
SS
150do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
151 scan_tp_[0] &= scan_fp_[0]; \
ea78578f
MM
152 scan_tp_[1] &= scan_fp_[1]; } while (0)
153
154#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 155do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
156 scan_tp_[0] &= ~ scan_fp_[0]; \
157 scan_tp_[1] &= ~ scan_fp_[1]; } while (0)
158
159#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 160do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
161 scan_tp_[0] |= scan_fp_[0]; \
162 scan_tp_[1] |= scan_fp_[1]; } while (0)
163
164#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 165do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
166 scan_tp_[0] |= ~ scan_fp_[0]; \
167 scan_tp_[1] |= ~ scan_fp_[1]; } while (0)
168
169#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
b3694847 170do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f
MM
171 if ((0 == (scan_xp_[0] & ~ scan_yp_[0])) \
172 && (0 == (scan_xp_[1] & ~ scan_yp_[1]))) \
173 goto TO; } while (0)
174
175#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
b3694847 176do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f 177 if ((scan_xp_[0] == scan_yp_[0]) \
a8526922 178 && (scan_xp_[1] == scan_yp_[1])) \
ea78578f
MM
179 goto TO; } while (0)
180
181#else
182#if FIRST_PSEUDO_REGISTER <= 3*HOST_BITS_PER_WIDE_INT
183#define CLEAR_HARD_REG_SET(TO) \
b3694847 184do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
185 scan_tp_[0] = 0; \
186 scan_tp_[1] = 0; \
187 scan_tp_[2] = 0; } while (0)
188
189#define SET_HARD_REG_SET(TO) \
b3694847 190do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
191 scan_tp_[0] = -1; \
192 scan_tp_[1] = -1; \
193 scan_tp_[2] = -1; } while (0)
194
195#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 196do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
197 scan_tp_[0] = scan_fp_[0]; \
198 scan_tp_[1] = scan_fp_[1]; \
199 scan_tp_[2] = scan_fp_[2]; } while (0)
200
201#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 202do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
203 scan_tp_[0] = ~ scan_fp_[0]; \
204 scan_tp_[1] = ~ scan_fp_[1]; \
205 scan_tp_[2] = ~ scan_fp_[2]; } while (0)
206
207#define AND_HARD_REG_SET(TO, FROM) \
b3694847
SS
208do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
209 scan_tp_[0] &= scan_fp_[0]; \
210 scan_tp_[1] &= scan_fp_[1]; \
ea78578f
MM
211 scan_tp_[2] &= scan_fp_[2]; } while (0)
212
213#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 214do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
215 scan_tp_[0] &= ~ scan_fp_[0]; \
216 scan_tp_[1] &= ~ scan_fp_[1]; \
217 scan_tp_[2] &= ~ scan_fp_[2]; } while (0)
218
219#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 220do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
221 scan_tp_[0] |= scan_fp_[0]; \
222 scan_tp_[1] |= scan_fp_[1]; \
223 scan_tp_[2] |= scan_fp_[2]; } while (0)
224
225#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 226do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
227 scan_tp_[0] |= ~ scan_fp_[0]; \
228 scan_tp_[1] |= ~ scan_fp_[1]; \
229 scan_tp_[2] |= ~ scan_fp_[2]; } while (0)
230
231#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
b3694847 232do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f
MM
233 if ((0 == (scan_xp_[0] & ~ scan_yp_[0])) \
234 && (0 == (scan_xp_[1] & ~ scan_yp_[1])) \
235 && (0 == (scan_xp_[2] & ~ scan_yp_[2]))) \
236 goto TO; } while (0)
237
238#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
b3694847 239do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f
MM
240 if ((scan_xp_[0] == scan_yp_[0]) \
241 && (scan_xp_[1] == scan_yp_[1]) \
242 && (scan_xp_[2] == scan_yp_[2])) \
243 goto TO; } while (0)
244
245#else
246#if FIRST_PSEUDO_REGISTER <= 4*HOST_BITS_PER_WIDE_INT
247#define CLEAR_HARD_REG_SET(TO) \
b3694847 248do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
249 scan_tp_[0] = 0; \
250 scan_tp_[1] = 0; \
251 scan_tp_[2] = 0; \
252 scan_tp_[3] = 0; } while (0)
253
254#define SET_HARD_REG_SET(TO) \
b3694847 255do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
ea78578f
MM
256 scan_tp_[0] = -1; \
257 scan_tp_[1] = -1; \
258 scan_tp_[2] = -1; \
259 scan_tp_[3] = -1; } while (0)
260
261#define COPY_HARD_REG_SET(TO, FROM) \
b3694847 262do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
263 scan_tp_[0] = scan_fp_[0]; \
264 scan_tp_[1] = scan_fp_[1]; \
265 scan_tp_[2] = scan_fp_[2]; \
266 scan_tp_[3] = scan_fp_[3]; } while (0)
267
268#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847 269do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
270 scan_tp_[0] = ~ scan_fp_[0]; \
271 scan_tp_[1] = ~ scan_fp_[1]; \
272 scan_tp_[2] = ~ scan_fp_[2]; \
273 scan_tp_[3] = ~ scan_fp_[3]; } while (0)
274
275#define AND_HARD_REG_SET(TO, FROM) \
b3694847
SS
276do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
277 scan_tp_[0] &= scan_fp_[0]; \
278 scan_tp_[1] &= scan_fp_[1]; \
279 scan_tp_[2] &= scan_fp_[2]; \
ea78578f
MM
280 scan_tp_[3] &= scan_fp_[3]; } while (0)
281
282#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 283do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
284 scan_tp_[0] &= ~ scan_fp_[0]; \
285 scan_tp_[1] &= ~ scan_fp_[1]; \
286 scan_tp_[2] &= ~ scan_fp_[2]; \
287 scan_tp_[3] &= ~ scan_fp_[3]; } while (0)
288
289#define IOR_HARD_REG_SET(TO, FROM) \
b3694847 290do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
291 scan_tp_[0] |= scan_fp_[0]; \
292 scan_tp_[1] |= scan_fp_[1]; \
293 scan_tp_[2] |= scan_fp_[2]; \
294 scan_tp_[3] |= scan_fp_[3]; } while (0)
295
296#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847 297do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
ea78578f
MM
298 scan_tp_[0] |= ~ scan_fp_[0]; \
299 scan_tp_[1] |= ~ scan_fp_[1]; \
300 scan_tp_[2] |= ~ scan_fp_[2]; \
301 scan_tp_[3] |= ~ scan_fp_[3]; } while (0)
302
303#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
b3694847 304do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f
MM
305 if ((0 == (scan_xp_[0] & ~ scan_yp_[0])) \
306 && (0 == (scan_xp_[1] & ~ scan_yp_[1])) \
307 && (0 == (scan_xp_[2] & ~ scan_yp_[2])) \
308 && (0 == (scan_xp_[3] & ~ scan_yp_[3]))) \
309 goto TO; } while (0)
310
311#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
b3694847 312do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
ea78578f
MM
313 if ((scan_xp_[0] == scan_yp_[0]) \
314 && (scan_xp_[1] == scan_yp_[1]) \
315 && (scan_xp_[2] == scan_yp_[2]) \
316 && (scan_xp_[3] == scan_yp_[3])) \
317 goto TO; } while (0)
318
319#else /* FIRST_PSEUDO_REGISTER > 3*HOST_BITS_PER_WIDE_INT */
320
3245eea0 321#define CLEAR_HARD_REG_SET(TO) \
b3694847
SS
322do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
323 int i; \
3245eea0
CH
324 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
325 *scan_tp_++ = 0; } while (0)
326
327#define SET_HARD_REG_SET(TO) \
b3694847
SS
328do { HARD_REG_ELT_TYPE *scan_tp_ = (TO); \
329 int i; \
3245eea0
CH
330 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
331 *scan_tp_++ = -1; } while (0)
332
333#define COPY_HARD_REG_SET(TO, FROM) \
b3694847
SS
334do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
335 int i; \
3245eea0
CH
336 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
337 *scan_tp_++ = *scan_fp_++; } while (0)
338
339#define COMPL_HARD_REG_SET(TO, FROM) \
b3694847
SS
340do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
341 int i; \
3245eea0
CH
342 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
343 *scan_tp_++ = ~ *scan_fp_++; } while (0)
344
345#define AND_HARD_REG_SET(TO, FROM) \
b3694847
SS
346do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
347 int i; \
3245eea0
CH
348 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
349 *scan_tp_++ &= *scan_fp_++; } while (0)
350
351#define AND_COMPL_HARD_REG_SET(TO, FROM) \
b3694847
SS
352do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
353 int i; \
3245eea0
CH
354 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
355 *scan_tp_++ &= ~ *scan_fp_++; } while (0)
356
357#define IOR_HARD_REG_SET(TO, FROM) \
b3694847
SS
358do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
359 int i; \
3245eea0
CH
360 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
361 *scan_tp_++ |= *scan_fp_++; } while (0)
362
363#define IOR_COMPL_HARD_REG_SET(TO, FROM) \
b3694847
SS
364do { HARD_REG_ELT_TYPE *scan_tp_ = (TO), *scan_fp_ = (FROM); \
365 int i; \
3245eea0
CH
366 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
367 *scan_tp_++ |= ~ *scan_fp_++; } while (0)
368
369#define GO_IF_HARD_REG_SUBSET(X,Y,TO) \
b3694847
SS
370do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
371 int i; \
3245eea0 372 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
328d0797 373 if (0 != (*scan_xp_++ & ~ *scan_yp_++)) break; \
3245eea0
CH
374 if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
375
376#define GO_IF_HARD_REG_EQUAL(X,Y,TO) \
b3694847
SS
377do { HARD_REG_ELT_TYPE *scan_xp_ = (X), *scan_yp_ = (Y); \
378 int i; \
3245eea0 379 for (i = 0; i < HARD_REG_SET_LONGS; i++) \
5384893b 380 if (*scan_xp_++ != *scan_yp_++) break; \
3245eea0
CH
381 if (i == HARD_REG_SET_LONGS) goto TO; } while (0)
382
383#endif
ea78578f
MM
384#endif
385#endif
386#endif
3245eea0
CH
387
388/* Define some standard sets of registers. */
389
390/* Indexed by hard register number, contains 1 for registers
391 that are fixed use (stack pointer, pc, frame pointer, etc.).
392 These are the registers that cannot be used to allocate
393 a pseudo reg whose life does not cross calls. */
394
395extern char fixed_regs[FIRST_PSEUDO_REGISTER];
396
397/* The same info as a HARD_REG_SET. */
398
399extern HARD_REG_SET fixed_reg_set;
400
401/* Indexed by hard register number, contains 1 for registers
402 that are fixed use or are clobbered by function calls.
403 These are the registers that cannot be used to allocate
404 a pseudo reg whose life crosses calls. */
405
406extern char call_used_regs[FIRST_PSEUDO_REGISTER];
407
ac8ab9fe
RS
408#ifdef CALL_REALLY_USED_REGISTERS
409extern char call_really_used_regs[];
410#endif
411
3245eea0
CH
412/* The same info as a HARD_REG_SET. */
413
414extern HARD_REG_SET call_used_reg_set;
415
6cad67d2
JL
416/* Registers that we don't want to caller save. */
417extern HARD_REG_SET losing_caller_save_reg_set;
418
3245eea0
CH
419/* Indexed by hard register number, contains 1 for registers that are
420 fixed use -- i.e. in fixed_regs -- or a function value return register
61f71b34 421 or TARGET_STRUCT_VALUE_RTX or STATIC_CHAIN_REGNUM. These are the
3245eea0
CH
422 registers that cannot hold quantities across calls even if we are
423 willing to save and restore them. */
424
425extern char call_fixed_regs[FIRST_PSEUDO_REGISTER];
426
427/* The same info as a HARD_REG_SET. */
428
429extern HARD_REG_SET call_fixed_reg_set;
430
431/* Indexed by hard register number, contains 1 for registers
432 that are being used for global register decls.
433 These must be exempt from ordinary flow analysis
434 and are also considered fixed. */
435
436extern char global_regs[FIRST_PSEUDO_REGISTER];
437
4e2db584
RH
438/* Contains 1 for registers that are set or clobbered by calls. */
439/* ??? Ideally, this would be just call_used_regs plus global_regs, but
440 for someone's bright idea to have call_used_regs strictly include
441 fixed_regs. Which leaves us guessing as to the set of fixed_regs
442 that are actually preserved. We know for sure that those associated
443 with the local stack frame are safe, but scant others. */
444
445extern HARD_REG_SET regs_invalidated_by_call;
446
f5d8c9f4 447#ifdef REG_ALLOC_ORDER
3245eea0
CH
448/* Table of register numbers in the order in which to try to use them. */
449
3245eea0 450extern int reg_alloc_order[FIRST_PSEUDO_REGISTER];
f5d8c9f4
BS
451
452/* The inverse of reg_alloc_order. */
453
454extern int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
3245eea0
CH
455#endif
456
457/* For each reg class, a HARD_REG_SET saying which registers are in it. */
458
f540a7d3 459extern HARD_REG_SET reg_class_contents[N_REG_CLASSES];
3245eea0
CH
460
461/* For each reg class, number of regs it contains. */
462
770ae6cc 463extern unsigned int reg_class_size[N_REG_CLASSES];
3245eea0
CH
464
465/* For each reg class, table listing all the containing classes. */
466
467extern enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES];
468
469/* For each reg class, table listing all the classes contained in it. */
470
471extern enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
472
473/* For each pair of reg classes,
474 a largest reg class contained in their union. */
475
476extern enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
477
478/* For each pair of reg classes,
479 the smallest reg class that contains their union. */
480
481extern enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
482
483/* Number of non-fixed registers. */
484
485extern int n_non_fixed_regs;
486
487/* Vector indexed by hardware reg giving its name. */
488
e087aeb2 489extern const char * reg_names[FIRST_PSEUDO_REGISTER];
96a45535 490
476c5eb6 491/* Given a hard REGN a FROM mode and a TO mode, return nonzero if
cff9f8d5
AH
492 REGN cannot change modes between the specified modes. */
493#define REG_CANNOT_CHANGE_MODE_P(REGN, FROM, TO) \
b0c42aed 494 CANNOT_CHANGE_MODE_CLASS (FROM, TO, REGNO_REG_CLASS (REGN))
cff9f8d5 495
88657302 496#endif /* ! GCC_HARD_REG_SET_H */
This page took 1.793088 seconds and 5 git commands to generate.