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8c660648 | 1 | /* Instruction scheduling pass. |
d050d723 | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, |
14052b68 | 3 | 1999, 2000, 2001 Free Software Foundation, Inc. |
8c660648 JL |
4 | Contributed by Michael Tiemann (tiemann@cygnus.com) Enhanced by, |
5 | and currently maintained by, Jim Wilson (wilson@cygnus.com) | |
6 | ||
5d14e356 RK |
7 | This file is part of GNU CC. |
8 | ||
9 | GNU CC is free software; you can redistribute it and/or modify it | |
10 | under the terms of the GNU General Public License as published by the | |
11 | Free Software Foundation; either version 2, or (at your option) any | |
12 | later version. | |
13 | ||
14 | GNU CC is distributed in the hope that it will be useful, but WITHOUT | |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
17 | for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with GNU CC; see the file COPYING. If not, write to the Free | |
21 | the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
22 | 02111-1307, USA. */ | |
8c660648 | 23 | |
b4ead7d4 BS |
24 | /* Instruction scheduling pass. This file, along with sched-deps.c, |
25 | contains the generic parts. The actual entry point is found for | |
26 | the normal instruction scheduling pass is found in sched-rgn.c. | |
8c660648 JL |
27 | |
28 | We compute insn priorities based on data dependencies. Flow | |
29 | analysis only creates a fraction of the data-dependencies we must | |
30 | observe: namely, only those dependencies which the combiner can be | |
31 | expected to use. For this pass, we must therefore create the | |
32 | remaining dependencies we need to observe: register dependencies, | |
33 | memory dependencies, dependencies to keep function calls in order, | |
34 | and the dependence between a conditional branch and the setting of | |
35 | condition codes are all dealt with here. | |
36 | ||
37 | The scheduler first traverses the data flow graph, starting with | |
38 | the last instruction, and proceeding to the first, assigning values | |
39 | to insn_priority as it goes. This sorts the instructions | |
40 | topologically by data dependence. | |
41 | ||
42 | Once priorities have been established, we order the insns using | |
43 | list scheduling. This works as follows: starting with a list of | |
44 | all the ready insns, and sorted according to priority number, we | |
45 | schedule the insn from the end of the list by placing its | |
46 | predecessors in the list according to their priority order. We | |
47 | consider this insn scheduled by setting the pointer to the "end" of | |
48 | the list to point to the previous insn. When an insn has no | |
49 | predecessors, we either queue it until sufficient time has elapsed | |
50 | or add it to the ready list. As the instructions are scheduled or | |
51 | when stalls are introduced, the queue advances and dumps insns into | |
52 | the ready list. When all insns down to the lowest priority have | |
53 | been scheduled, the critical path of the basic block has been made | |
54 | as short as possible. The remaining insns are then scheduled in | |
55 | remaining slots. | |
56 | ||
57 | Function unit conflicts are resolved during forward list scheduling | |
58 | by tracking the time when each insn is committed to the schedule | |
59 | and from that, the time the function units it uses must be free. | |
60 | As insns on the ready list are considered for scheduling, those | |
61 | that would result in a blockage of the already committed insns are | |
62 | queued until no blockage will result. | |
63 | ||
64 | The following list shows the order in which we want to break ties | |
65 | among insns in the ready list: | |
66 | ||
67 | 1. choose insn with the longest path to end of bb, ties | |
68 | broken by | |
69 | 2. choose insn with least contribution to register pressure, | |
70 | ties broken by | |
71 | 3. prefer in-block upon interblock motion, ties broken by | |
72 | 4. prefer useful upon speculative motion, ties broken by | |
73 | 5. choose insn with largest control flow probability, ties | |
74 | broken by | |
75 | 6. choose insn with the least dependences upon the previously | |
76 | scheduled insn, or finally | |
2db45993 JL |
77 | 7 choose the insn which has the most insns dependent on it. |
78 | 8. choose insn with lowest UID. | |
8c660648 JL |
79 | |
80 | Memory references complicate matters. Only if we can be certain | |
81 | that memory references are not part of the data dependency graph | |
82 | (via true, anti, or output dependence), can we move operations past | |
83 | memory references. To first approximation, reads can be done | |
84 | independently, while writes introduce dependencies. Better | |
85 | approximations will yield fewer dependencies. | |
86 | ||
87 | Before reload, an extended analysis of interblock data dependences | |
88 | is required for interblock scheduling. This is performed in | |
89 | compute_block_backward_dependences (). | |
90 | ||
91 | Dependencies set up by memory references are treated in exactly the | |
92 | same way as other dependencies, by using LOG_LINKS backward | |
93 | dependences. LOG_LINKS are translated into INSN_DEPEND forward | |
94 | dependences for the purpose of forward list scheduling. | |
95 | ||
96 | Having optimized the critical path, we may have also unduly | |
97 | extended the lifetimes of some registers. If an operation requires | |
98 | that constants be loaded into registers, it is certainly desirable | |
99 | to load those constants as early as necessary, but no earlier. | |
100 | I.e., it will not do to load up a bunch of registers at the | |
101 | beginning of a basic block only to use them at the end, if they | |
102 | could be loaded later, since this may result in excessive register | |
103 | utilization. | |
104 | ||
105 | Note that since branches are never in basic blocks, but only end | |
106 | basic blocks, this pass will not move branches. But that is ok, | |
107 | since we can use GNU's delayed branch scheduling pass to take care | |
108 | of this case. | |
109 | ||
110 | Also note that no further optimizations based on algebraic | |
111 | identities are performed, so this pass would be a good one to | |
112 | perform instruction splitting, such as breaking up a multiply | |
113 | instruction into shifts and adds where that is profitable. | |
114 | ||
115 | Given the memory aliasing analysis that this pass should perform, | |
116 | it should be possible to remove redundant stores to memory, and to | |
117 | load values from registers instead of hitting memory. | |
118 | ||
119 | Before reload, speculative insns are moved only if a 'proof' exists | |
120 | that no exception will be caused by this, and if no live registers | |
121 | exist that inhibit the motion (live registers constraints are not | |
122 | represented by data dependence edges). | |
123 | ||
124 | This pass must update information that subsequent passes expect to | |
125 | be correct. Namely: reg_n_refs, reg_n_sets, reg_n_deaths, | |
3b413743 RH |
126 | reg_n_calls_crossed, and reg_live_length. Also, BLOCK_HEAD, |
127 | BLOCK_END. | |
8c660648 JL |
128 | |
129 | The information in the line number notes is carefully retained by | |
130 | this pass. Notes that refer to the starting and ending of | |
131 | exception regions are also carefully retained by this pass. All | |
132 | other NOTE insns are grouped in their same relative order at the | |
b4ead7d4 | 133 | beginning of basic blocks and regions that have been scheduled. */ |
8c660648 | 134 | \f |
8c660648 | 135 | #include "config.h" |
5835e573 | 136 | #include "system.h" |
01198c2f | 137 | #include "toplev.h" |
8c660648 | 138 | #include "rtl.h" |
6baf1cc8 | 139 | #include "tm_p.h" |
efc9bd41 | 140 | #include "hard-reg-set.h" |
8c660648 JL |
141 | #include "basic-block.h" |
142 | #include "regs.h" | |
49ad7cfa | 143 | #include "function.h" |
8c660648 JL |
144 | #include "flags.h" |
145 | #include "insn-config.h" | |
146 | #include "insn-attr.h" | |
147 | #include "except.h" | |
487a6e06 | 148 | #include "toplev.h" |
79c9824e | 149 | #include "recog.h" |
1708fd40 | 150 | #include "sched-int.h" |
8c660648 | 151 | |
8c660648 JL |
152 | #ifdef INSN_SCHEDULING |
153 | ||
8c660648 JL |
154 | /* issue_rate is the number of insns that can be scheduled in the same |
155 | machine cycle. It can be defined in the config/mach/mach.h file, | |
156 | otherwise we set it to 1. */ | |
157 | ||
158 | static int issue_rate; | |
159 | ||
62d65906 JL |
160 | #ifndef ISSUE_RATE |
161 | #define ISSUE_RATE 1 | |
8c660648 JL |
162 | #endif |
163 | ||
cc132865 | 164 | /* sched-verbose controls the amount of debugging output the |
409f8483 | 165 | scheduler prints. It is controlled by -fsched-verbose=N: |
8c660648 JL |
166 | N>0 and no -DSR : the output is directed to stderr. |
167 | N>=10 will direct the printouts to stderr (regardless of -dSR). | |
168 | N=1: same as -dSR. | |
169 | N=2: bb's probabilities, detailed ready list info, unit/insn info. | |
170 | N=3: rtl at abort point, control-flow, regions info. | |
cc132865 | 171 | N=5: dependences info. */ |
8c660648 | 172 | |
8c660648 | 173 | static int sched_verbose_param = 0; |
b4ead7d4 | 174 | int sched_verbose = 0; |
8c660648 | 175 | |
63de6c74 | 176 | /* Debugging file. All printouts are sent to dump, which is always set, |
8c660648 | 177 | either to stderr, or to the dump listing file (-dRS). */ |
c62c2659 | 178 | FILE *sched_dump = 0; |
a88f02e7 BS |
179 | |
180 | /* Highest uid before scheduling. */ | |
181 | static int old_max_uid; | |
8c660648 JL |
182 | |
183 | /* fix_sched_param() is called from toplev.c upon detection | |
409f8483 | 184 | of the -fsched-verbose=N option. */ |
8c660648 JL |
185 | |
186 | void | |
187 | fix_sched_param (param, val) | |
5f06c983 | 188 | const char *param, *val; |
8c660648 | 189 | { |
cc132865 | 190 | if (!strcmp (param, "verbose")) |
8c660648 | 191 | sched_verbose_param = atoi (val); |
8c660648 JL |
192 | else |
193 | warning ("fix_sched_param: unknown param: %s", param); | |
194 | } | |
195 | ||
16f6ece6 | 196 | struct haifa_insn_data *h_i_d; |
f66d83e1 | 197 | |
8c660648 JL |
198 | #define DONE_PRIORITY -1 |
199 | #define MAX_PRIORITY 0x7fffffff | |
200 | #define TAIL_PRIORITY 0x7ffffffe | |
201 | #define LAUNCH_PRIORITY 0x7f000001 | |
202 | #define DONE_PRIORITY_P(INSN) (INSN_PRIORITY (INSN) < 0) | |
203 | #define LOW_PRIORITY_P(INSN) ((INSN_PRIORITY (INSN) & 0x7f000000) == 0) | |
204 | ||
f66d83e1 RH |
205 | #define LINE_NOTE(INSN) (h_i_d[INSN_UID (INSN)].line_note) |
206 | #define INSN_TICK(INSN) (h_i_d[INSN_UID (INSN)].tick) | |
8c660648 JL |
207 | |
208 | /* Vector indexed by basic block number giving the starting line-number | |
209 | for each basic block. */ | |
210 | static rtx *line_note_head; | |
211 | ||
212 | /* List of important notes we must keep around. This is a pointer to the | |
213 | last element in the list. */ | |
214 | static rtx note_list; | |
215 | ||
8c660648 JL |
216 | /* Queues, etc. */ |
217 | ||
218 | /* An instruction is ready to be scheduled when all insns preceding it | |
219 | have already been scheduled. It is important to ensure that all | |
220 | insns which use its result will not be executed until its result | |
221 | has been computed. An insn is maintained in one of four structures: | |
222 | ||
223 | (P) the "Pending" set of insns which cannot be scheduled until | |
224 | their dependencies have been satisfied. | |
225 | (Q) the "Queued" set of insns that can be scheduled when sufficient | |
226 | time has passed. | |
227 | (R) the "Ready" list of unscheduled, uncommitted insns. | |
228 | (S) the "Scheduled" list of insns. | |
229 | ||
230 | Initially, all insns are either "Pending" or "Ready" depending on | |
231 | whether their dependencies are satisfied. | |
232 | ||
233 | Insns move from the "Ready" list to the "Scheduled" list as they | |
234 | are committed to the schedule. As this occurs, the insns in the | |
235 | "Pending" list have their dependencies satisfied and move to either | |
236 | the "Ready" list or the "Queued" set depending on whether | |
237 | sufficient time has passed to make them ready. As time passes, | |
238 | insns move from the "Queued" set to the "Ready" list. Insns may | |
239 | move from the "Ready" list to the "Queued" set if they are blocked | |
240 | due to a function unit conflict. | |
241 | ||
242 | The "Pending" list (P) are the insns in the INSN_DEPEND of the unscheduled | |
243 | insns, i.e., those that are ready, queued, and pending. | |
244 | The "Queued" set (Q) is implemented by the variable `insn_queue'. | |
245 | The "Ready" list (R) is implemented by the variables `ready' and | |
246 | `n_ready'. | |
247 | The "Scheduled" list (S) is the new insn chain built by this pass. | |
248 | ||
249 | The transition (R->S) is implemented in the scheduling loop in | |
250 | `schedule_block' when the best insn to schedule is chosen. | |
251 | The transition (R->Q) is implemented in `queue_insn' when an | |
38e01259 | 252 | insn is found to have a function unit conflict with the already |
8c660648 JL |
253 | committed insns. |
254 | The transitions (P->R and P->Q) are implemented in `schedule_insn' as | |
255 | insns move from the ready list to the scheduled list. | |
256 | The transition (Q->R) is implemented in 'queue_to_insn' as time | |
257 | passes or stalls are introduced. */ | |
258 | ||
259 | /* Implement a circular buffer to delay instructions until sufficient | |
260 | time has passed. INSN_QUEUE_SIZE is a power of two larger than | |
261 | MAX_BLOCKAGE and MAX_READY_COST computed by genattr.c. This is the | |
262 | longest time an isnsn may be queued. */ | |
263 | static rtx insn_queue[INSN_QUEUE_SIZE]; | |
264 | static int q_ptr = 0; | |
265 | static int q_size = 0; | |
266 | #define NEXT_Q(X) (((X)+1) & (INSN_QUEUE_SIZE-1)) | |
267 | #define NEXT_Q_AFTER(X, C) (((X)+C) & (INSN_QUEUE_SIZE-1)) | |
268 | ||
176f9a7b BS |
269 | /* Describe the ready list of the scheduler. |
270 | VEC holds space enough for all insns in the current region. VECLEN | |
271 | says how many exactly. | |
272 | FIRST is the index of the element with the highest priority; i.e. the | |
273 | last one in the ready list, since elements are ordered by ascending | |
274 | priority. | |
275 | N_READY determines how many insns are on the ready list. */ | |
276 | ||
277 | struct ready_list | |
278 | { | |
279 | rtx *vec; | |
280 | int veclen; | |
281 | int first; | |
282 | int n_ready; | |
283 | }; | |
284 | ||
8c660648 | 285 | /* Forward declarations. */ |
3fe41456 KG |
286 | static unsigned int blockage_range PARAMS ((int, rtx)); |
287 | static void clear_units PARAMS ((void)); | |
3fe41456 KG |
288 | static void schedule_unit PARAMS ((int, rtx, int)); |
289 | static int actual_hazard PARAMS ((int, rtx, int, int)); | |
290 | static int potential_hazard PARAMS ((int, rtx, int)); | |
3fe41456 | 291 | static int priority PARAMS ((rtx)); |
3fe41456 KG |
292 | static int rank_for_schedule PARAMS ((const PTR, const PTR)); |
293 | static void swap_sort PARAMS ((rtx *, int)); | |
294 | static void queue_insn PARAMS ((rtx, int)); | |
176f9a7b | 295 | static void schedule_insn PARAMS ((rtx, struct ready_list *, int)); |
3fe41456 | 296 | static void find_insn_reg_weight PARAMS ((int)); |
3fe41456 | 297 | static void adjust_priority PARAMS ((rtx)); |
8c660648 | 298 | |
8c660648 JL |
299 | /* Notes handling mechanism: |
300 | ========================= | |
301 | Generally, NOTES are saved before scheduling and restored after scheduling. | |
302 | The scheduler distinguishes between three types of notes: | |
303 | ||
304 | (1) LINE_NUMBER notes, generated and used for debugging. Here, | |
305 | before scheduling a region, a pointer to the LINE_NUMBER note is | |
306 | added to the insn following it (in save_line_notes()), and the note | |
307 | is removed (in rm_line_notes() and unlink_line_notes()). After | |
308 | scheduling the region, this pointer is used for regeneration of | |
309 | the LINE_NUMBER note (in restore_line_notes()). | |
310 | ||
311 | (2) LOOP_BEGIN, LOOP_END, SETJMP, EHREGION_BEG, EHREGION_END notes: | |
312 | Before scheduling a region, a pointer to the note is added to the insn | |
313 | that follows or precedes it. (This happens as part of the data dependence | |
314 | computation). After scheduling an insn, the pointer contained in it is | |
315 | used for regenerating the corresponding note (in reemit_notes). | |
316 | ||
317 | (3) All other notes (e.g. INSN_DELETED): Before scheduling a block, | |
318 | these notes are put in a list (in rm_other_notes() and | |
319 | unlink_other_notes ()). After scheduling the block, these notes are | |
320 | inserted at the beginning of the block (in schedule_block()). */ | |
321 | ||
3fe41456 KG |
322 | static rtx unlink_other_notes PARAMS ((rtx, rtx)); |
323 | static rtx unlink_line_notes PARAMS ((rtx, rtx)); | |
3fe41456 KG |
324 | static rtx reemit_notes PARAMS ((rtx, rtx)); |
325 | ||
176f9a7b BS |
326 | static rtx *ready_lastpos PARAMS ((struct ready_list *)); |
327 | static void ready_sort PARAMS ((struct ready_list *)); | |
328 | static rtx ready_remove_first PARAMS ((struct ready_list *)); | |
3fe41456 | 329 | |
176f9a7b BS |
330 | static void queue_to_ready PARAMS ((struct ready_list *)); |
331 | ||
332 | static void debug_ready_list PARAMS ((struct ready_list *)); | |
3fe41456 KG |
333 | |
334 | static rtx move_insn1 PARAMS ((rtx, rtx)); | |
335 | static rtx move_insn PARAMS ((rtx, rtx)); | |
8c660648 JL |
336 | |
337 | #endif /* INSN_SCHEDULING */ | |
338 | \f | |
1708fd40 BS |
339 | /* Point to state used for the current scheduling pass. */ |
340 | struct sched_info *current_sched_info; | |
8c660648 JL |
341 | \f |
342 | #ifndef INSN_SCHEDULING | |
343 | void | |
344 | schedule_insns (dump_file) | |
7bdb32b9 | 345 | FILE *dump_file ATTRIBUTE_UNUSED; |
8c660648 JL |
346 | { |
347 | } | |
348 | #else | |
cbb13457 | 349 | |
8c660648 JL |
350 | /* Pointer to the last instruction scheduled. Used by rank_for_schedule, |
351 | so that insns independent of the last scheduled insn will be preferred | |
352 | over dependent instructions. */ | |
353 | ||
354 | static rtx last_scheduled_insn; | |
355 | ||
b4ead7d4 BS |
356 | /* Compute the function units used by INSN. This caches the value |
357 | returned by function_units_used. A function unit is encoded as the | |
358 | unit number if the value is non-negative and the compliment of a | |
359 | mask if the value is negative. A function unit index is the | |
360 | non-negative encoding. */ | |
168cbdf9 | 361 | |
b4ead7d4 BS |
362 | HAIFA_INLINE int |
363 | insn_unit (insn) | |
364 | rtx insn; | |
8c660648 | 365 | { |
b4ead7d4 | 366 | register int unit = INSN_UNIT (insn); |
168cbdf9 | 367 | |
b4ead7d4 | 368 | if (unit == 0) |
6b8cf0c5 | 369 | { |
b4ead7d4 | 370 | recog_memoized (insn); |
8c660648 | 371 | |
b4ead7d4 BS |
372 | /* A USE insn, or something else we don't need to understand. |
373 | We can't pass these directly to function_units_used because it will | |
374 | trigger a fatal error for unrecognizable insns. */ | |
375 | if (INSN_CODE (insn) < 0) | |
376 | unit = -1; | |
377 | else | |
8c660648 | 378 | { |
b4ead7d4 BS |
379 | unit = function_units_used (insn); |
380 | /* Increment non-negative values so we can cache zero. */ | |
381 | if (unit >= 0) | |
382 | unit++; | |
8c660648 | 383 | } |
b4ead7d4 BS |
384 | /* We only cache 16 bits of the result, so if the value is out of |
385 | range, don't cache it. */ | |
386 | if (FUNCTION_UNITS_SIZE < HOST_BITS_PER_SHORT | |
387 | || unit >= 0 | |
388 | || (unit & ~((1 << (HOST_BITS_PER_SHORT - 1)) - 1)) == 0) | |
389 | INSN_UNIT (insn) = unit; | |
8c660648 | 390 | } |
b4ead7d4 BS |
391 | return (unit > 0 ? unit - 1 : unit); |
392 | } | |
8c660648 | 393 | |
b4ead7d4 BS |
394 | /* Compute the blockage range for executing INSN on UNIT. This caches |
395 | the value returned by the blockage_range_function for the unit. | |
396 | These values are encoded in an int where the upper half gives the | |
397 | minimum value and the lower half gives the maximum value. */ | |
8c660648 | 398 | |
b4ead7d4 BS |
399 | HAIFA_INLINE static unsigned int |
400 | blockage_range (unit, insn) | |
401 | int unit; | |
402 | rtx insn; | |
403 | { | |
404 | unsigned int blockage = INSN_BLOCKAGE (insn); | |
405 | unsigned int range; | |
8c660648 | 406 | |
b4ead7d4 | 407 | if ((int) UNIT_BLOCKED (blockage) != unit + 1) |
8c660648 | 408 | { |
b4ead7d4 BS |
409 | range = function_units[unit].blockage_range_function (insn); |
410 | /* We only cache the blockage range for one unit and then only if | |
411 | the values fit. */ | |
412 | if (HOST_BITS_PER_INT >= UNIT_BITS + 2 * BLOCKAGE_BITS) | |
413 | INSN_BLOCKAGE (insn) = ENCODE_BLOCKAGE (unit + 1, range); | |
8c660648 JL |
414 | } |
415 | else | |
b4ead7d4 | 416 | range = BLOCKAGE_RANGE (blockage); |
8c660648 | 417 | |
b4ead7d4 | 418 | return range; |
8c660648 JL |
419 | } |
420 | ||
b4ead7d4 BS |
421 | /* A vector indexed by function unit instance giving the last insn to use |
422 | the unit. The value of the function unit instance index for unit U | |
423 | instance I is (U + I * FUNCTION_UNITS_SIZE). */ | |
424 | static rtx unit_last_insn[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY]; | |
8c660648 | 425 | |
b4ead7d4 BS |
426 | /* A vector indexed by function unit instance giving the minimum time when |
427 | the unit will unblock based on the maximum blockage cost. */ | |
428 | static int unit_tick[FUNCTION_UNITS_SIZE * MAX_MULTIPLICITY]; | |
429 | ||
430 | /* A vector indexed by function unit number giving the number of insns | |
431 | that remain to use the unit. */ | |
432 | static int unit_n_insns[FUNCTION_UNITS_SIZE]; | |
8c660648 | 433 | |
b4ead7d4 | 434 | /* Access the unit_last_insn array. Used by the visualization code. */ |
8c660648 | 435 | |
b4ead7d4 BS |
436 | rtx |
437 | get_unit_last_insn (instance) | |
438 | int instance; | |
8c660648 | 439 | { |
b4ead7d4 | 440 | return unit_last_insn[instance]; |
8c660648 JL |
441 | } |
442 | ||
b4ead7d4 | 443 | /* Reset the function unit state to the null state. */ |
8c660648 JL |
444 | |
445 | static void | |
b4ead7d4 | 446 | clear_units () |
8c660648 | 447 | { |
b4ead7d4 BS |
448 | memset ((char *) unit_last_insn, 0, sizeof (unit_last_insn)); |
449 | memset ((char *) unit_tick, 0, sizeof (unit_tick)); | |
450 | memset ((char *) unit_n_insns, 0, sizeof (unit_n_insns)); | |
451 | } | |
8c660648 | 452 | |
b4ead7d4 | 453 | /* Return the issue-delay of an insn. */ |
8c660648 | 454 | |
b4ead7d4 BS |
455 | HAIFA_INLINE int |
456 | insn_issue_delay (insn) | |
457 | rtx insn; | |
458 | { | |
459 | int i, delay = 0; | |
460 | int unit = insn_unit (insn); | |
8c660648 | 461 | |
b4ead7d4 BS |
462 | /* Efficiency note: in fact, we are working 'hard' to compute a |
463 | value that was available in md file, and is not available in | |
464 | function_units[] structure. It would be nice to have this | |
465 | value there, too. */ | |
466 | if (unit >= 0) | |
8c660648 | 467 | { |
b4ead7d4 BS |
468 | if (function_units[unit].blockage_range_function && |
469 | function_units[unit].blockage_function) | |
470 | delay = function_units[unit].blockage_function (insn, insn); | |
8c660648 | 471 | } |
b4ead7d4 BS |
472 | else |
473 | for (i = 0, unit = ~unit; unit; i++, unit >>= 1) | |
474 | if ((unit & 1) != 0 && function_units[i].blockage_range_function | |
475 | && function_units[i].blockage_function) | |
476 | delay = MAX (delay, function_units[i].blockage_function (insn, insn)); | |
8c660648 | 477 | |
b4ead7d4 | 478 | return delay; |
8c660648 JL |
479 | } |
480 | ||
b4ead7d4 BS |
481 | /* Return the actual hazard cost of executing INSN on the unit UNIT, |
482 | instance INSTANCE at time CLOCK if the previous actual hazard cost | |
483 | was COST. */ | |
8c660648 | 484 | |
b4ead7d4 BS |
485 | HAIFA_INLINE int |
486 | actual_hazard_this_instance (unit, instance, insn, clock, cost) | |
487 | int unit, instance, clock, cost; | |
488 | rtx insn; | |
8c660648 | 489 | { |
b4ead7d4 | 490 | int tick = unit_tick[instance]; /* Issue time of the last issued insn. */ |
8c660648 | 491 | |
b4ead7d4 | 492 | if (tick - clock > cost) |
8c660648 | 493 | { |
b4ead7d4 BS |
494 | /* The scheduler is operating forward, so unit's last insn is the |
495 | executing insn and INSN is the candidate insn. We want a | |
496 | more exact measure of the blockage if we execute INSN at CLOCK | |
497 | given when we committed the execution of the unit's last insn. | |
8c660648 | 498 | |
b4ead7d4 BS |
499 | The blockage value is given by either the unit's max blockage |
500 | constant, blockage range function, or blockage function. Use | |
501 | the most exact form for the given unit. */ | |
8c660648 | 502 | |
b4ead7d4 BS |
503 | if (function_units[unit].blockage_range_function) |
504 | { | |
505 | if (function_units[unit].blockage_function) | |
506 | tick += (function_units[unit].blockage_function | |
507 | (unit_last_insn[instance], insn) | |
508 | - function_units[unit].max_blockage); | |
509 | else | |
510 | tick += ((int) MAX_BLOCKAGE_COST (blockage_range (unit, insn)) | |
511 | - function_units[unit].max_blockage); | |
8c660648 | 512 | } |
b4ead7d4 BS |
513 | if (tick - clock > cost) |
514 | cost = tick - clock; | |
8c660648 | 515 | } |
b4ead7d4 | 516 | return cost; |
8c660648 JL |
517 | } |
518 | ||
b4ead7d4 BS |
519 | /* Record INSN as having begun execution on the units encoded by UNIT at |
520 | time CLOCK. */ | |
8c660648 | 521 | |
cbb13457 | 522 | HAIFA_INLINE static void |
8c660648 JL |
523 | schedule_unit (unit, insn, clock) |
524 | int unit, clock; | |
525 | rtx insn; | |
526 | { | |
527 | int i; | |
528 | ||
529 | if (unit >= 0) | |
530 | { | |
531 | int instance = unit; | |
532 | #if MAX_MULTIPLICITY > 1 | |
533 | /* Find the first free instance of the function unit and use that | |
534 | one. We assume that one is free. */ | |
535 | for (i = function_units[unit].multiplicity - 1; i > 0; i--) | |
536 | { | |
537 | if (!actual_hazard_this_instance (unit, instance, insn, clock, 0)) | |
538 | break; | |
539 | instance += FUNCTION_UNITS_SIZE; | |
540 | } | |
541 | #endif | |
542 | unit_last_insn[instance] = insn; | |
543 | unit_tick[instance] = (clock + function_units[unit].max_blockage); | |
544 | } | |
545 | else | |
546 | for (i = 0, unit = ~unit; unit; i++, unit >>= 1) | |
547 | if ((unit & 1) != 0) | |
548 | schedule_unit (i, insn, clock); | |
549 | } | |
550 | ||
551 | /* Return the actual hazard cost of executing INSN on the units encoded by | |
552 | UNIT at time CLOCK if the previous actual hazard cost was COST. */ | |
553 | ||
cbb13457 | 554 | HAIFA_INLINE static int |
8c660648 JL |
555 | actual_hazard (unit, insn, clock, cost) |
556 | int unit, clock, cost; | |
557 | rtx insn; | |
558 | { | |
559 | int i; | |
560 | ||
561 | if (unit >= 0) | |
562 | { | |
563 | /* Find the instance of the function unit with the minimum hazard. */ | |
564 | int instance = unit; | |
565 | int best_cost = actual_hazard_this_instance (unit, instance, insn, | |
566 | clock, cost); | |
1eda7a81 | 567 | #if MAX_MULTIPLICITY > 1 |
8c660648 JL |
568 | int this_cost; |
569 | ||
8c660648 JL |
570 | if (best_cost > cost) |
571 | { | |
572 | for (i = function_units[unit].multiplicity - 1; i > 0; i--) | |
573 | { | |
574 | instance += FUNCTION_UNITS_SIZE; | |
575 | this_cost = actual_hazard_this_instance (unit, instance, insn, | |
576 | clock, cost); | |
577 | if (this_cost < best_cost) | |
578 | { | |
579 | best_cost = this_cost; | |
580 | if (this_cost <= cost) | |
581 | break; | |
582 | } | |
583 | } | |
584 | } | |
585 | #endif | |
586 | cost = MAX (cost, best_cost); | |
587 | } | |
588 | else | |
589 | for (i = 0, unit = ~unit; unit; i++, unit >>= 1) | |
590 | if ((unit & 1) != 0) | |
591 | cost = actual_hazard (i, insn, clock, cost); | |
592 | ||
593 | return cost; | |
594 | } | |
595 | ||
596 | /* Return the potential hazard cost of executing an instruction on the | |
597 | units encoded by UNIT if the previous potential hazard cost was COST. | |
598 | An insn with a large blockage time is chosen in preference to one | |
599 | with a smaller time; an insn that uses a unit that is more likely | |
600 | to be used is chosen in preference to one with a unit that is less | |
601 | used. We are trying to minimize a subsequent actual hazard. */ | |
602 | ||
cbb13457 | 603 | HAIFA_INLINE static int |
8c660648 JL |
604 | potential_hazard (unit, insn, cost) |
605 | int unit, cost; | |
606 | rtx insn; | |
607 | { | |
608 | int i, ncost; | |
609 | unsigned int minb, maxb; | |
610 | ||
611 | if (unit >= 0) | |
612 | { | |
613 | minb = maxb = function_units[unit].max_blockage; | |
614 | if (maxb > 1) | |
615 | { | |
616 | if (function_units[unit].blockage_range_function) | |
617 | { | |
618 | maxb = minb = blockage_range (unit, insn); | |
619 | maxb = MAX_BLOCKAGE_COST (maxb); | |
620 | minb = MIN_BLOCKAGE_COST (minb); | |
621 | } | |
622 | ||
623 | if (maxb > 1) | |
624 | { | |
625 | /* Make the number of instructions left dominate. Make the | |
626 | minimum delay dominate the maximum delay. If all these | |
627 | are the same, use the unit number to add an arbitrary | |
628 | ordering. Other terms can be added. */ | |
629 | ncost = minb * 0x40 + maxb; | |
630 | ncost *= (unit_n_insns[unit] - 1) * 0x1000 + unit; | |
631 | if (ncost > cost) | |
632 | cost = ncost; | |
633 | } | |
634 | } | |
635 | } | |
636 | else | |
637 | for (i = 0, unit = ~unit; unit; i++, unit >>= 1) | |
638 | if ((unit & 1) != 0) | |
639 | cost = potential_hazard (i, insn, cost); | |
640 | ||
641 | return cost; | |
642 | } | |
643 | ||
644 | /* Compute cost of executing INSN given the dependence LINK on the insn USED. | |
645 | This is the number of cycles between instruction issue and | |
646 | instruction results. */ | |
647 | ||
b4ead7d4 | 648 | HAIFA_INLINE int |
8c660648 JL |
649 | insn_cost (insn, link, used) |
650 | rtx insn, link, used; | |
651 | { | |
652 | register int cost = INSN_COST (insn); | |
653 | ||
654 | if (cost == 0) | |
655 | { | |
656 | recog_memoized (insn); | |
657 | ||
658 | /* A USE insn, or something else we don't need to understand. | |
659 | We can't pass these directly to result_ready_cost because it will | |
660 | trigger a fatal error for unrecognizable insns. */ | |
661 | if (INSN_CODE (insn) < 0) | |
662 | { | |
663 | INSN_COST (insn) = 1; | |
664 | return 1; | |
665 | } | |
666 | else | |
667 | { | |
668 | cost = result_ready_cost (insn); | |
669 | ||
670 | if (cost < 1) | |
671 | cost = 1; | |
672 | ||
673 | INSN_COST (insn) = cost; | |
674 | } | |
675 | } | |
676 | ||
63de6c74 | 677 | /* In this case estimate cost without caring how insn is used. */ |
8c660648 JL |
678 | if (link == 0 && used == 0) |
679 | return cost; | |
680 | ||
681 | /* A USE insn should never require the value used to be computed. This | |
682 | allows the computation of a function's result and parameter values to | |
683 | overlap the return and call. */ | |
684 | recog_memoized (used); | |
685 | if (INSN_CODE (used) < 0) | |
686 | LINK_COST_FREE (link) = 1; | |
687 | ||
688 | /* If some dependencies vary the cost, compute the adjustment. Most | |
689 | commonly, the adjustment is complete: either the cost is ignored | |
690 | (in the case of an output- or anti-dependence), or the cost is | |
691 | unchanged. These values are cached in the link as LINK_COST_FREE | |
692 | and LINK_COST_ZERO. */ | |
693 | ||
694 | if (LINK_COST_FREE (link)) | |
197043f5 | 695 | cost = 0; |
8c660648 JL |
696 | #ifdef ADJUST_COST |
697 | else if (!LINK_COST_ZERO (link)) | |
698 | { | |
699 | int ncost = cost; | |
700 | ||
701 | ADJUST_COST (used, link, insn, ncost); | |
197043f5 RH |
702 | if (ncost < 1) |
703 | { | |
704 | LINK_COST_FREE (link) = 1; | |
705 | ncost = 0; | |
706 | } | |
8c660648 JL |
707 | if (cost == ncost) |
708 | LINK_COST_ZERO (link) = 1; | |
709 | cost = ncost; | |
710 | } | |
711 | #endif | |
712 | return cost; | |
713 | } | |
714 | ||
715 | /* Compute the priority number for INSN. */ | |
716 | ||
717 | static int | |
718 | priority (insn) | |
719 | rtx insn; | |
720 | { | |
8c660648 JL |
721 | rtx link; |
722 | ||
2c3c49de | 723 | if (! INSN_P (insn)) |
8c660648 JL |
724 | return 0; |
725 | ||
21e4c9a8 | 726 | if (! INSN_PRIORITY_KNOWN (insn)) |
8c660648 | 727 | { |
21e4c9a8 BS |
728 | int this_priority = 0; |
729 | ||
8c660648 JL |
730 | if (INSN_DEPEND (insn) == 0) |
731 | this_priority = insn_cost (insn, 0, 0); | |
732 | else | |
21e4c9a8 BS |
733 | { |
734 | for (link = INSN_DEPEND (insn); link; link = XEXP (link, 1)) | |
735 | { | |
736 | rtx next; | |
737 | int next_priority; | |
8c660648 | 738 | |
21e4c9a8 BS |
739 | if (RTX_INTEGRATED_P (link)) |
740 | continue; | |
6d8ccdbb | 741 | |
21e4c9a8 | 742 | next = XEXP (link, 0); |
8c660648 | 743 | |
21e4c9a8 BS |
744 | /* Critical path is meaningful in block boundaries only. */ |
745 | if (! (*current_sched_info->contributes_to_priority) (next, insn)) | |
746 | continue; | |
8c660648 | 747 | |
21e4c9a8 BS |
748 | next_priority = insn_cost (insn, link, next) + priority (next); |
749 | if (next_priority > this_priority) | |
750 | this_priority = next_priority; | |
751 | } | |
752 | } | |
8c660648 | 753 | INSN_PRIORITY (insn) = this_priority; |
21e4c9a8 | 754 | INSN_PRIORITY_KNOWN (insn) = 1; |
8c660648 | 755 | } |
21e4c9a8 BS |
756 | |
757 | return INSN_PRIORITY (insn); | |
8c660648 JL |
758 | } |
759 | \f | |
8c660648 JL |
760 | /* Macros and functions for keeping the priority queue sorted, and |
761 | dealing with queueing and dequeueing of instructions. */ | |
762 | ||
763 | #define SCHED_SORT(READY, N_READY) \ | |
764 | do { if ((N_READY) == 2) \ | |
765 | swap_sort (READY, N_READY); \ | |
766 | else if ((N_READY) > 2) \ | |
767 | qsort (READY, N_READY, sizeof (rtx), rank_for_schedule); } \ | |
768 | while (0) | |
769 | ||
770 | /* Returns a positive value if x is preferred; returns a negative value if | |
771 | y is preferred. Should never return 0, since that will make the sort | |
772 | unstable. */ | |
773 | ||
774 | static int | |
775 | rank_for_schedule (x, y) | |
e1b6684c KG |
776 | const PTR x; |
777 | const PTR y; | |
8c660648 | 778 | { |
7a403706 KH |
779 | rtx tmp = *(const rtx *) y; |
780 | rtx tmp2 = *(const rtx *) x; | |
8c660648 | 781 | rtx link; |
2db45993 | 782 | int tmp_class, tmp2_class, depend_count1, depend_count2; |
1708fd40 | 783 | int val, priority_val, weight_val, info_val; |
8c660648 | 784 | |
63de6c74 | 785 | /* Prefer insn with higher priority. */ |
8c660648 JL |
786 | priority_val = INSN_PRIORITY (tmp2) - INSN_PRIORITY (tmp); |
787 | if (priority_val) | |
788 | return priority_val; | |
789 | ||
63de6c74 | 790 | /* Prefer an insn with smaller contribution to registers-pressure. */ |
8c660648 JL |
791 | if (!reload_completed && |
792 | (weight_val = INSN_REG_WEIGHT (tmp) - INSN_REG_WEIGHT (tmp2))) | |
793 | return (weight_val); | |
794 | ||
1708fd40 BS |
795 | info_val = (*current_sched_info->rank) (tmp, tmp2); |
796 | if (info_val) | |
797 | return info_val; | |
8c660648 | 798 | |
63de6c74 | 799 | /* Compare insns based on their relation to the last-scheduled-insn. */ |
8c660648 JL |
800 | if (last_scheduled_insn) |
801 | { | |
802 | /* Classify the instructions into three classes: | |
803 | 1) Data dependent on last schedule insn. | |
804 | 2) Anti/Output dependent on last scheduled insn. | |
805 | 3) Independent of last scheduled insn, or has latency of one. | |
806 | Choose the insn from the highest numbered class if different. */ | |
807 | link = find_insn_list (tmp, INSN_DEPEND (last_scheduled_insn)); | |
808 | if (link == 0 || insn_cost (last_scheduled_insn, link, tmp) == 1) | |
809 | tmp_class = 3; | |
810 | else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */ | |
811 | tmp_class = 1; | |
812 | else | |
813 | tmp_class = 2; | |
814 | ||
815 | link = find_insn_list (tmp2, INSN_DEPEND (last_scheduled_insn)); | |
816 | if (link == 0 || insn_cost (last_scheduled_insn, link, tmp2) == 1) | |
817 | tmp2_class = 3; | |
818 | else if (REG_NOTE_KIND (link) == 0) /* Data dependence. */ | |
819 | tmp2_class = 1; | |
820 | else | |
821 | tmp2_class = 2; | |
822 | ||
823 | if ((val = tmp2_class - tmp_class)) | |
824 | return val; | |
825 | } | |
826 | ||
7a403706 | 827 | /* Prefer the insn which has more later insns that depend on it. |
2db45993 JL |
828 | This gives the scheduler more freedom when scheduling later |
829 | instructions at the expense of added register pressure. */ | |
830 | depend_count1 = 0; | |
831 | for (link = INSN_DEPEND (tmp); link; link = XEXP (link, 1)) | |
832 | depend_count1++; | |
833 | ||
834 | depend_count2 = 0; | |
835 | for (link = INSN_DEPEND (tmp2); link; link = XEXP (link, 1)) | |
836 | depend_count2++; | |
837 | ||
838 | val = depend_count2 - depend_count1; | |
839 | if (val) | |
840 | return val; | |
7a403706 | 841 | |
8c660648 JL |
842 | /* If insns are equally good, sort by INSN_LUID (original insn order), |
843 | so that we make the sort stable. This minimizes instruction movement, | |
844 | thus minimizing sched's effect on debugging and cross-jumping. */ | |
845 | return INSN_LUID (tmp) - INSN_LUID (tmp2); | |
846 | } | |
847 | ||
848 | /* Resort the array A in which only element at index N may be out of order. */ | |
849 | ||
cbb13457 | 850 | HAIFA_INLINE static void |
8c660648 JL |
851 | swap_sort (a, n) |
852 | rtx *a; | |
853 | int n; | |
854 | { | |
855 | rtx insn = a[n - 1]; | |
856 | int i = n - 2; | |
857 | ||
858 | while (i >= 0 && rank_for_schedule (a + i, &insn) >= 0) | |
859 | { | |
860 | a[i + 1] = a[i]; | |
861 | i -= 1; | |
862 | } | |
863 | a[i + 1] = insn; | |
864 | } | |
865 | ||
8c660648 JL |
866 | /* Add INSN to the insn queue so that it can be executed at least |
867 | N_CYCLES after the currently executing insn. Preserve insns | |
868 | chain for debugging purposes. */ | |
869 | ||
cbb13457 | 870 | HAIFA_INLINE static void |
8c660648 JL |
871 | queue_insn (insn, n_cycles) |
872 | rtx insn; | |
873 | int n_cycles; | |
874 | { | |
875 | int next_q = NEXT_Q_AFTER (q_ptr, n_cycles); | |
ebb7b10b | 876 | rtx link = alloc_INSN_LIST (insn, insn_queue[next_q]); |
8c660648 JL |
877 | insn_queue[next_q] = link; |
878 | q_size += 1; | |
879 | ||
880 | if (sched_verbose >= 2) | |
881 | { | |
1708fd40 BS |
882 | fprintf (sched_dump, ";;\t\tReady-->Q: insn %s: ", |
883 | (*current_sched_info->print_insn) (insn, 0)); | |
8c660648 | 884 | |
a88f02e7 | 885 | fprintf (sched_dump, "queued for %d cycles.\n", n_cycles); |
8c660648 | 886 | } |
176f9a7b BS |
887 | } |
888 | ||
889 | /* Return a pointer to the bottom of the ready list, i.e. the insn | |
890 | with the lowest priority. */ | |
891 | ||
892 | HAIFA_INLINE static rtx * | |
893 | ready_lastpos (ready) | |
894 | struct ready_list *ready; | |
895 | { | |
896 | if (ready->n_ready == 0) | |
897 | abort (); | |
898 | return ready->vec + ready->first - ready->n_ready + 1; | |
899 | } | |
900 | ||
901 | /* Add an element INSN to the ready list so that it ends up with the lowest | |
902 | priority. */ | |
903 | ||
b4ead7d4 | 904 | HAIFA_INLINE void |
176f9a7b BS |
905 | ready_add (ready, insn) |
906 | struct ready_list *ready; | |
907 | rtx insn; | |
908 | { | |
909 | if (ready->first == ready->n_ready) | |
910 | { | |
911 | memmove (ready->vec + ready->veclen - ready->n_ready, | |
912 | ready_lastpos (ready), | |
913 | ready->n_ready * sizeof (rtx)); | |
914 | ready->first = ready->veclen - 1; | |
915 | } | |
916 | ready->vec[ready->first - ready->n_ready] = insn; | |
917 | ready->n_ready++; | |
918 | } | |
8c660648 | 919 | |
176f9a7b BS |
920 | /* Remove the element with the highest priority from the ready list and |
921 | return it. */ | |
922 | ||
923 | HAIFA_INLINE static rtx | |
924 | ready_remove_first (ready) | |
925 | struct ready_list *ready; | |
926 | { | |
927 | rtx t; | |
928 | if (ready->n_ready == 0) | |
929 | abort (); | |
930 | t = ready->vec[ready->first--]; | |
931 | ready->n_ready--; | |
932 | /* If the queue becomes empty, reset it. */ | |
933 | if (ready->n_ready == 0) | |
934 | ready->first = ready->veclen - 1; | |
935 | return t; | |
936 | } | |
937 | ||
938 | /* Sort the ready list READY by ascending priority, using the SCHED_SORT | |
939 | macro. */ | |
940 | ||
941 | HAIFA_INLINE static void | |
942 | ready_sort (ready) | |
943 | struct ready_list *ready; | |
944 | { | |
945 | rtx *first = ready_lastpos (ready); | |
946 | SCHED_SORT (first, ready->n_ready); | |
8c660648 JL |
947 | } |
948 | ||
8c660648 | 949 | /* PREV is an insn that is ready to execute. Adjust its priority if that |
c46a37c4 RH |
950 | will help shorten or lengthen register lifetimes as appropriate. Also |
951 | provide a hook for the target to tweek itself. */ | |
8c660648 | 952 | |
cbb13457 | 953 | HAIFA_INLINE static void |
8c660648 | 954 | adjust_priority (prev) |
c46a37c4 | 955 | rtx prev ATTRIBUTE_UNUSED; |
8c660648 | 956 | { |
c46a37c4 RH |
957 | /* ??? There used to be code here to try and estimate how an insn |
958 | affected register lifetimes, but it did it by looking at REG_DEAD | |
7a403706 | 959 | notes, which we removed in schedule_region. Nor did it try to |
c46a37c4 | 960 | take into account register pressure or anything useful like that. |
8c660648 | 961 | |
c46a37c4 | 962 | Revisit when we have a machine model to work with and not before. */ |
197043f5 | 963 | |
8c660648 | 964 | #ifdef ADJUST_PRIORITY |
197043f5 | 965 | ADJUST_PRIORITY (prev); |
8c660648 | 966 | #endif |
8c660648 JL |
967 | } |
968 | ||
4bdc8810 RH |
969 | /* Clock at which the previous instruction was issued. */ |
970 | static int last_clock_var; | |
971 | ||
8c660648 | 972 | /* INSN is the "currently executing insn". Launch each insn which was |
176f9a7b BS |
973 | waiting on INSN. READY is the ready list which contains the insns |
974 | that are ready to fire. CLOCK is the current cycle. | |
975 | */ | |
8c660648 | 976 | |
176f9a7b BS |
977 | static void |
978 | schedule_insn (insn, ready, clock) | |
8c660648 | 979 | rtx insn; |
176f9a7b | 980 | struct ready_list *ready; |
8c660648 JL |
981 | int clock; |
982 | { | |
983 | rtx link; | |
984 | int unit; | |
985 | ||
986 | unit = insn_unit (insn); | |
987 | ||
988 | if (sched_verbose >= 2) | |
989 | { | |
a88f02e7 | 990 | fprintf (sched_dump, ";;\t\t--> scheduling insn <<<%d>>> on unit ", |
63de6c74 | 991 | INSN_UID (insn)); |
8c660648 | 992 | insn_print_units (insn); |
a88f02e7 | 993 | fprintf (sched_dump, "\n"); |
8c660648 JL |
994 | } |
995 | ||
996 | if (sched_verbose && unit == -1) | |
997 | visualize_no_unit (insn); | |
998 | ||
999 | if (MAX_BLOCKAGE > 1 || issue_rate > 1 || sched_verbose) | |
1000 | schedule_unit (unit, insn, clock); | |
1001 | ||
1002 | if (INSN_DEPEND (insn) == 0) | |
176f9a7b | 1003 | return; |
8c660648 JL |
1004 | |
1005 | for (link = INSN_DEPEND (insn); link != 0; link = XEXP (link, 1)) | |
1006 | { | |
1007 | rtx next = XEXP (link, 0); | |
1008 | int cost = insn_cost (insn, link, next); | |
1009 | ||
1010 | INSN_TICK (next) = MAX (INSN_TICK (next), clock + cost); | |
1011 | ||
1012 | if ((INSN_DEP_COUNT (next) -= 1) == 0) | |
1013 | { | |
1014 | int effective_cost = INSN_TICK (next) - clock; | |
1015 | ||
1708fd40 | 1016 | if (! (*current_sched_info->new_ready) (next)) |
8c660648 JL |
1017 | continue; |
1018 | ||
1019 | if (sched_verbose >= 2) | |
1020 | { | |
1708fd40 BS |
1021 | fprintf (sched_dump, ";;\t\tdependences resolved: insn %s ", |
1022 | (*current_sched_info->print_insn) (next, 0)); | |
8c660648 | 1023 | |
197043f5 | 1024 | if (effective_cost < 1) |
a88f02e7 | 1025 | fprintf (sched_dump, "into ready\n"); |
8c660648 | 1026 | else |
a88f02e7 | 1027 | fprintf (sched_dump, "into queue with cost=%d\n", effective_cost); |
8c660648 JL |
1028 | } |
1029 | ||
1030 | /* Adjust the priority of NEXT and either put it on the ready | |
1031 | list or queue it. */ | |
1032 | adjust_priority (next); | |
197043f5 | 1033 | if (effective_cost < 1) |
176f9a7b | 1034 | ready_add (ready, next); |
8c660648 JL |
1035 | else |
1036 | queue_insn (next, effective_cost); | |
1037 | } | |
1038 | } | |
1039 | ||
7a403706 | 1040 | /* Annotate the instruction with issue information -- TImode |
4bdc8810 RH |
1041 | indicates that the instruction is expected not to be able |
1042 | to issue on the same cycle as the previous insn. A machine | |
1043 | may use this information to decide how the instruction should | |
1044 | be aligned. */ | |
1045 | if (reload_completed && issue_rate > 1) | |
1046 | { | |
1047 | PUT_MODE (insn, clock > last_clock_var ? TImode : VOIDmode); | |
1048 | last_clock_var = clock; | |
1049 | } | |
8c660648 JL |
1050 | } |
1051 | ||
63de6c74 | 1052 | /* Functions for handling of notes. */ |
8c660648 JL |
1053 | |
1054 | /* Delete notes beginning with INSN and put them in the chain | |
1055 | of notes ended by NOTE_LIST. | |
1056 | Returns the insn following the notes. */ | |
1057 | ||
1058 | static rtx | |
1059 | unlink_other_notes (insn, tail) | |
1060 | rtx insn, tail; | |
1061 | { | |
1062 | rtx prev = PREV_INSN (insn); | |
1063 | ||
1064 | while (insn != tail && GET_CODE (insn) == NOTE) | |
1065 | { | |
1066 | rtx next = NEXT_INSN (insn); | |
1067 | /* Delete the note from its current position. */ | |
1068 | if (prev) | |
1069 | NEXT_INSN (prev) = next; | |
1070 | if (next) | |
1071 | PREV_INSN (next) = prev; | |
1072 | ||
c46a37c4 | 1073 | /* See sched_analyze to see how these are handled. */ |
8c660648 JL |
1074 | if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_SETJMP |
1075 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG | |
1076 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_END | |
b3b42a4d | 1077 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_RANGE_BEG |
0dfa1860 | 1078 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_RANGE_END |
8c660648 JL |
1079 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_BEG |
1080 | && NOTE_LINE_NUMBER (insn) != NOTE_INSN_EH_REGION_END) | |
1081 | { | |
1082 | /* Insert the note at the end of the notes list. */ | |
1083 | PREV_INSN (insn) = note_list; | |
1084 | if (note_list) | |
1085 | NEXT_INSN (note_list) = insn; | |
1086 | note_list = insn; | |
1087 | } | |
1088 | ||
1089 | insn = next; | |
1090 | } | |
1091 | return insn; | |
1092 | } | |
1093 | ||
1094 | /* Delete line notes beginning with INSN. Record line-number notes so | |
1095 | they can be reused. Returns the insn following the notes. */ | |
1096 | ||
1097 | static rtx | |
1098 | unlink_line_notes (insn, tail) | |
1099 | rtx insn, tail; | |
1100 | { | |
1101 | rtx prev = PREV_INSN (insn); | |
1102 | ||
1103 | while (insn != tail && GET_CODE (insn) == NOTE) | |
1104 | { | |
1105 | rtx next = NEXT_INSN (insn); | |
1106 | ||
1107 | if (write_symbols != NO_DEBUG && NOTE_LINE_NUMBER (insn) > 0) | |
1108 | { | |
1109 | /* Delete the note from its current position. */ | |
1110 | if (prev) | |
1111 | NEXT_INSN (prev) = next; | |
1112 | if (next) | |
1113 | PREV_INSN (next) = prev; | |
1114 | ||
1115 | /* Record line-number notes so they can be reused. */ | |
1116 | LINE_NOTE (insn) = insn; | |
1117 | } | |
1118 | else | |
1119 | prev = insn; | |
1120 | ||
1121 | insn = next; | |
1122 | } | |
1123 | return insn; | |
1124 | } | |
1125 | ||
1126 | /* Return the head and tail pointers of BB. */ | |
1127 | ||
b4ead7d4 | 1128 | void |
49c3bb12 RH |
1129 | get_block_head_tail (b, headp, tailp) |
1130 | int b; | |
8c660648 JL |
1131 | rtx *headp; |
1132 | rtx *tailp; | |
1133 | { | |
8c660648 | 1134 | /* HEAD and TAIL delimit the basic block being scheduled. */ |
1708fd40 BS |
1135 | rtx head = BLOCK_HEAD (b); |
1136 | rtx tail = BLOCK_END (b); | |
8c660648 JL |
1137 | |
1138 | /* Don't include any notes or labels at the beginning of the | |
1139 | basic block, or notes at the ends of basic blocks. */ | |
1140 | while (head != tail) | |
1141 | { | |
1142 | if (GET_CODE (head) == NOTE) | |
1143 | head = NEXT_INSN (head); | |
1144 | else if (GET_CODE (tail) == NOTE) | |
1145 | tail = PREV_INSN (tail); | |
1146 | else if (GET_CODE (head) == CODE_LABEL) | |
1147 | head = NEXT_INSN (head); | |
1148 | else | |
1149 | break; | |
1150 | } | |
1151 | ||
1152 | *headp = head; | |
1153 | *tailp = tail; | |
1154 | } | |
1155 | ||
1708fd40 BS |
1156 | /* Return nonzero if there are no real insns in the range [ HEAD, TAIL ]. */ |
1157 | ||
b4ead7d4 | 1158 | int |
1708fd40 BS |
1159 | no_real_insns_p (head, tail) |
1160 | rtx head, tail; | |
1161 | { | |
1162 | while (head != NEXT_INSN (tail)) | |
1163 | { | |
1164 | if (GET_CODE (head) != NOTE && GET_CODE (head) != CODE_LABEL) | |
1165 | return 0; | |
1166 | head = NEXT_INSN (head); | |
1167 | } | |
1168 | return 1; | |
1169 | } | |
1170 | ||
79c2ffde BS |
1171 | /* Delete line notes from one block. Save them so they can be later restored |
1172 | (in restore_line_notes). HEAD and TAIL are the boundaries of the | |
1173 | block in which notes should be processed. */ | |
8c660648 | 1174 | |
b4ead7d4 | 1175 | void |
79c2ffde BS |
1176 | rm_line_notes (head, tail) |
1177 | rtx head, tail; | |
8c660648 JL |
1178 | { |
1179 | rtx next_tail; | |
8c660648 JL |
1180 | rtx insn; |
1181 | ||
8c660648 JL |
1182 | next_tail = NEXT_INSN (tail); |
1183 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) | |
1184 | { | |
1185 | rtx prev; | |
1186 | ||
1187 | /* Farm out notes, and maybe save them in NOTE_LIST. | |
1188 | This is needed to keep the debugger from | |
1189 | getting completely deranged. */ | |
1190 | if (GET_CODE (insn) == NOTE) | |
1191 | { | |
1192 | prev = insn; | |
1193 | insn = unlink_line_notes (insn, next_tail); | |
1194 | ||
1195 | if (prev == tail) | |
1196 | abort (); | |
1197 | if (prev == head) | |
1198 | abort (); | |
1199 | if (insn == next_tail) | |
1200 | abort (); | |
1201 | } | |
1202 | } | |
1203 | } | |
1204 | ||
79c2ffde BS |
1205 | /* Save line number notes for each insn in block B. HEAD and TAIL are |
1206 | the boundaries of the block in which notes should be processed.*/ | |
8c660648 | 1207 | |
b4ead7d4 | 1208 | void |
79c2ffde | 1209 | save_line_notes (b, head, tail) |
b4ead7d4 | 1210 | int b; |
79c2ffde | 1211 | rtx head, tail; |
8c660648 | 1212 | { |
8c660648 JL |
1213 | rtx next_tail; |
1214 | ||
1215 | /* We must use the true line number for the first insn in the block | |
1216 | that was computed and saved at the start of this pass. We can't | |
1217 | use the current line number, because scheduling of the previous | |
1218 | block may have changed the current line number. */ | |
1219 | ||
b4ead7d4 | 1220 | rtx line = line_note_head[b]; |
8c660648 JL |
1221 | rtx insn; |
1222 | ||
8c660648 JL |
1223 | next_tail = NEXT_INSN (tail); |
1224 | ||
79c2ffde | 1225 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) |
8c660648 JL |
1226 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) |
1227 | line = insn; | |
1228 | else | |
1229 | LINE_NOTE (insn) = line; | |
1230 | } | |
1231 | ||
14052b68 | 1232 | /* After a block was scheduled, insert line notes into the insns list. |
79c2ffde BS |
1233 | HEAD and TAIL are the boundaries of the block in which notes should |
1234 | be processed.*/ | |
8c660648 | 1235 | |
b4ead7d4 | 1236 | void |
14052b68 | 1237 | restore_line_notes (head, tail) |
79c2ffde | 1238 | rtx head, tail; |
8c660648 JL |
1239 | { |
1240 | rtx line, note, prev, new; | |
1241 | int added_notes = 0; | |
79c2ffde | 1242 | rtx next_tail, insn; |
8c660648 | 1243 | |
79c2ffde BS |
1244 | head = head; |
1245 | next_tail = NEXT_INSN (tail); | |
8c660648 JL |
1246 | |
1247 | /* Determine the current line-number. We want to know the current | |
1248 | line number of the first insn of the block here, in case it is | |
1249 | different from the true line number that was saved earlier. If | |
1250 | different, then we need a line number note before the first insn | |
1251 | of this block. If it happens to be the same, then we don't want to | |
1252 | emit another line number note here. */ | |
1253 | for (line = head; line; line = PREV_INSN (line)) | |
1254 | if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0) | |
1255 | break; | |
1256 | ||
1257 | /* Walk the insns keeping track of the current line-number and inserting | |
1258 | the line-number notes as needed. */ | |
1259 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) | |
1260 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1261 | line = insn; | |
1262 | /* This used to emit line number notes before every non-deleted note. | |
1263 | However, this confuses a debugger, because line notes not separated | |
1264 | by real instructions all end up at the same address. I can find no | |
1265 | use for line number notes before other notes, so none are emitted. */ | |
1266 | else if (GET_CODE (insn) != NOTE | |
79c2ffde | 1267 | && INSN_UID (insn) < old_max_uid |
8c660648 JL |
1268 | && (note = LINE_NOTE (insn)) != 0 |
1269 | && note != line | |
1270 | && (line == 0 | |
1271 | || NOTE_LINE_NUMBER (note) != NOTE_LINE_NUMBER (line) | |
1272 | || NOTE_SOURCE_FILE (note) != NOTE_SOURCE_FILE (line))) | |
1273 | { | |
1274 | line = note; | |
1275 | prev = PREV_INSN (insn); | |
1276 | if (LINE_NOTE (note)) | |
1277 | { | |
1278 | /* Re-use the original line-number note. */ | |
1279 | LINE_NOTE (note) = 0; | |
1280 | PREV_INSN (note) = prev; | |
1281 | NEXT_INSN (prev) = note; | |
1282 | PREV_INSN (insn) = note; | |
1283 | NEXT_INSN (note) = insn; | |
1284 | } | |
1285 | else | |
1286 | { | |
1287 | added_notes++; | |
1288 | new = emit_note_after (NOTE_LINE_NUMBER (note), prev); | |
1289 | NOTE_SOURCE_FILE (new) = NOTE_SOURCE_FILE (note); | |
1290 | RTX_INTEGRATED_P (new) = RTX_INTEGRATED_P (note); | |
1291 | } | |
1292 | } | |
1293 | if (sched_verbose && added_notes) | |
a88f02e7 | 1294 | fprintf (sched_dump, ";; added %d line-number notes\n", added_notes); |
8c660648 JL |
1295 | } |
1296 | ||
1297 | /* After scheduling the function, delete redundant line notes from the | |
1298 | insns list. */ | |
1299 | ||
b4ead7d4 | 1300 | void |
8c660648 JL |
1301 | rm_redundant_line_notes () |
1302 | { | |
1303 | rtx line = 0; | |
1304 | rtx insn = get_insns (); | |
1305 | int active_insn = 0; | |
1306 | int notes = 0; | |
1307 | ||
1308 | /* Walk the insns deleting redundant line-number notes. Many of these | |
1309 | are already present. The remainder tend to occur at basic | |
1310 | block boundaries. */ | |
1311 | for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) | |
1312 | if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) > 0) | |
1313 | { | |
1314 | /* If there are no active insns following, INSN is redundant. */ | |
1315 | if (active_insn == 0) | |
1316 | { | |
1317 | notes++; | |
1318 | NOTE_SOURCE_FILE (insn) = 0; | |
1319 | NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; | |
1320 | } | |
1321 | /* If the line number is unchanged, LINE is redundant. */ | |
1322 | else if (line | |
1323 | && NOTE_LINE_NUMBER (line) == NOTE_LINE_NUMBER (insn) | |
1324 | && NOTE_SOURCE_FILE (line) == NOTE_SOURCE_FILE (insn)) | |
1325 | { | |
1326 | notes++; | |
1327 | NOTE_SOURCE_FILE (line) = 0; | |
1328 | NOTE_LINE_NUMBER (line) = NOTE_INSN_DELETED; | |
1329 | line = insn; | |
1330 | } | |
1331 | else | |
1332 | line = insn; | |
1333 | active_insn = 0; | |
1334 | } | |
1335 | else if (!((GET_CODE (insn) == NOTE | |
1336 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED) | |
1337 | || (GET_CODE (insn) == INSN | |
1338 | && (GET_CODE (PATTERN (insn)) == USE | |
1339 | || GET_CODE (PATTERN (insn)) == CLOBBER)))) | |
1340 | active_insn++; | |
1341 | ||
1342 | if (sched_verbose && notes) | |
a88f02e7 | 1343 | fprintf (sched_dump, ";; deleted %d line-number notes\n", notes); |
8c660648 JL |
1344 | } |
1345 | ||
79c2ffde | 1346 | /* Delete notes between HEAD and TAIL and put them in the chain |
8c660648 JL |
1347 | of notes ended by NOTE_LIST. */ |
1348 | ||
b4ead7d4 | 1349 | void |
8c660648 JL |
1350 | rm_other_notes (head, tail) |
1351 | rtx head; | |
1352 | rtx tail; | |
1353 | { | |
1354 | rtx next_tail; | |
1355 | rtx insn; | |
1356 | ||
b4ead7d4 | 1357 | note_list = 0; |
2c3c49de | 1358 | if (head == tail && (! INSN_P (head))) |
8c660648 JL |
1359 | return; |
1360 | ||
1361 | next_tail = NEXT_INSN (tail); | |
1362 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) | |
1363 | { | |
1364 | rtx prev; | |
1365 | ||
1366 | /* Farm out notes, and maybe save them in NOTE_LIST. | |
1367 | This is needed to keep the debugger from | |
1368 | getting completely deranged. */ | |
1369 | if (GET_CODE (insn) == NOTE) | |
1370 | { | |
1371 | prev = insn; | |
1372 | ||
1373 | insn = unlink_other_notes (insn, next_tail); | |
1374 | ||
1375 | if (prev == tail) | |
1376 | abort (); | |
1377 | if (prev == head) | |
1378 | abort (); | |
1379 | if (insn == next_tail) | |
1380 | abort (); | |
1381 | } | |
1382 | } | |
1383 | } | |
1384 | ||
63de6c74 | 1385 | /* Functions for computation of registers live/usage info. */ |
8c660648 | 1386 | |
c46a37c4 | 1387 | /* Calculate INSN_REG_WEIGHT for all insns of a block. */ |
8c660648 JL |
1388 | |
1389 | static void | |
49c3bb12 | 1390 | find_insn_reg_weight (b) |
7a403706 | 1391 | int b; |
8c660648 JL |
1392 | { |
1393 | rtx insn, next_tail, head, tail; | |
8c660648 | 1394 | |
49c3bb12 | 1395 | get_block_head_tail (b, &head, &tail); |
8c660648 JL |
1396 | next_tail = NEXT_INSN (tail); |
1397 | ||
1398 | for (insn = head; insn != next_tail; insn = NEXT_INSN (insn)) | |
1399 | { | |
8c660648 | 1400 | int reg_weight = 0; |
c46a37c4 | 1401 | rtx x; |
8c660648 JL |
1402 | |
1403 | /* Handle register life information. */ | |
2c3c49de | 1404 | if (! INSN_P (insn)) |
8c660648 JL |
1405 | continue; |
1406 | ||
c46a37c4 RH |
1407 | /* Increment weight for each register born here. */ |
1408 | x = PATTERN (insn); | |
1409 | if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) | |
1410 | && register_operand (SET_DEST (x), VOIDmode)) | |
1411 | reg_weight++; | |
1412 | else if (GET_CODE (x) == PARALLEL) | |
8c660648 | 1413 | { |
c46a37c4 RH |
1414 | int j; |
1415 | for (j = XVECLEN (x, 0) - 1; j >= 0; j--) | |
1416 | { | |
1417 | x = XVECEXP (PATTERN (insn), 0, j); | |
1418 | if ((GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) | |
1419 | && register_operand (SET_DEST (x), VOIDmode)) | |
1420 | reg_weight++; | |
1421 | } | |
8c660648 JL |
1422 | } |
1423 | ||
c46a37c4 RH |
1424 | /* Decrement weight for each register that dies here. */ |
1425 | for (x = REG_NOTES (insn); x; x = XEXP (x, 1)) | |
8c660648 | 1426 | { |
c46a37c4 RH |
1427 | if (REG_NOTE_KIND (x) == REG_DEAD |
1428 | || REG_NOTE_KIND (x) == REG_UNUSED) | |
1429 | reg_weight--; | |
8c660648 JL |
1430 | } |
1431 | ||
c46a37c4 | 1432 | INSN_REG_WEIGHT (insn) = reg_weight; |
8c660648 | 1433 | } |
8c660648 JL |
1434 | } |
1435 | ||
63de6c74 | 1436 | /* Scheduling clock, modified in schedule_block() and queue_to_ready (). */ |
8c660648 JL |
1437 | static int clock_var; |
1438 | ||
1439 | /* Move insns that became ready to fire from queue to ready list. */ | |
1440 | ||
176f9a7b BS |
1441 | static void |
1442 | queue_to_ready (ready) | |
1443 | struct ready_list *ready; | |
8c660648 JL |
1444 | { |
1445 | rtx insn; | |
1446 | rtx link; | |
1447 | ||
1448 | q_ptr = NEXT_Q (q_ptr); | |
1449 | ||
1450 | /* Add all pending insns that can be scheduled without stalls to the | |
b4ead7d4 BS |
1451 | ready list. */ |
1452 | for (link = insn_queue[q_ptr]; link; link = XEXP (link, 1)) | |
1453 | { | |
1454 | insn = XEXP (link, 0); | |
1455 | q_size -= 1; | |
1708fd40 | 1456 | |
b4ead7d4 BS |
1457 | if (sched_verbose >= 2) |
1458 | fprintf (sched_dump, ";;\t\tQ-->Ready: insn %s: ", | |
1459 | (*current_sched_info->print_insn) (insn, 0)); | |
1708fd40 | 1460 | |
b4ead7d4 BS |
1461 | ready_add (ready, insn); |
1462 | if (sched_verbose >= 2) | |
1463 | fprintf (sched_dump, "moving to ready without stalls\n"); | |
1708fd40 | 1464 | } |
b4ead7d4 BS |
1465 | insn_queue[q_ptr] = 0; |
1466 | ||
1467 | /* If there are no ready insns, stall until one is ready and add all | |
1468 | of the pending insns at that point to the ready list. */ | |
1469 | if (ready->n_ready == 0) | |
1708fd40 | 1470 | { |
b4ead7d4 | 1471 | register int stalls; |
1708fd40 | 1472 | |
b4ead7d4 BS |
1473 | for (stalls = 1; stalls < INSN_QUEUE_SIZE; stalls++) |
1474 | { | |
1475 | if ((link = insn_queue[NEXT_Q_AFTER (q_ptr, stalls)])) | |
1476 | { | |
1477 | for (; link; link = XEXP (link, 1)) | |
1478 | { | |
1479 | insn = XEXP (link, 0); | |
1480 | q_size -= 1; | |
1708fd40 | 1481 | |
b4ead7d4 BS |
1482 | if (sched_verbose >= 2) |
1483 | fprintf (sched_dump, ";;\t\tQ-->Ready: insn %s: ", | |
1484 | (*current_sched_info->print_insn) (insn, 0)); | |
1708fd40 | 1485 | |
b4ead7d4 BS |
1486 | ready_add (ready, insn); |
1487 | if (sched_verbose >= 2) | |
1488 | fprintf (sched_dump, "moving to ready with %d stalls\n", stalls); | |
1489 | } | |
1490 | insn_queue[NEXT_Q_AFTER (q_ptr, stalls)] = 0; | |
1708fd40 | 1491 | |
b4ead7d4 BS |
1492 | if (ready->n_ready) |
1493 | break; | |
1494 | } | |
1495 | } | |
1708fd40 | 1496 | |
b4ead7d4 BS |
1497 | if (sched_verbose && stalls) |
1498 | visualize_stall_cycles (stalls); | |
1499 | q_ptr = NEXT_Q_AFTER (q_ptr, stalls); | |
1500 | clock_var += stalls; | |
1708fd40 | 1501 | } |
1708fd40 BS |
1502 | } |
1503 | ||
b4ead7d4 | 1504 | /* Print the ready list for debugging purposes. Callable from debugger. */ |
1708fd40 | 1505 | |
b4ead7d4 BS |
1506 | static void |
1507 | debug_ready_list (ready) | |
1508 | struct ready_list *ready; | |
1708fd40 | 1509 | { |
b4ead7d4 BS |
1510 | rtx *p; |
1511 | int i; | |
1708fd40 | 1512 | |
b4ead7d4 BS |
1513 | if (ready->n_ready == 0) |
1514 | return; | |
1708fd40 | 1515 | |
b4ead7d4 BS |
1516 | p = ready_lastpos (ready); |
1517 | for (i = 0; i < ready->n_ready; i++) | |
1518 | fprintf (sched_dump, " %s", (*current_sched_info->print_insn) (p[i], 0)); | |
1519 | fprintf (sched_dump, "\n"); | |
1520 | } | |
1708fd40 | 1521 | |
63de6c74 | 1522 | /* move_insn1: Remove INSN from insn chain, and link it after LAST insn. */ |
8c660648 JL |
1523 | |
1524 | static rtx | |
1525 | move_insn1 (insn, last) | |
1526 | rtx insn, last; | |
1527 | { | |
1528 | NEXT_INSN (PREV_INSN (insn)) = NEXT_INSN (insn); | |
1529 | PREV_INSN (NEXT_INSN (insn)) = PREV_INSN (insn); | |
1530 | ||
1531 | NEXT_INSN (insn) = NEXT_INSN (last); | |
1532 | PREV_INSN (NEXT_INSN (last)) = insn; | |
1533 | ||
1534 | NEXT_INSN (last) = insn; | |
1535 | PREV_INSN (insn) = last; | |
1536 | ||
1537 | return insn; | |
1538 | } | |
1539 | ||
c46a37c4 | 1540 | /* Search INSN for REG_SAVE_NOTE note pairs for NOTE_INSN_SETJMP, |
8c660648 | 1541 | NOTE_INSN_{LOOP,EHREGION}_{BEG,END}; and convert them back into |
c46a37c4 RH |
1542 | NOTEs. The REG_SAVE_NOTE note following first one is contains the |
1543 | saved value for NOTE_BLOCK_NUMBER which is useful for | |
8c660648 JL |
1544 | NOTE_INSN_EH_REGION_{BEG,END} NOTEs. LAST is the last instruction |
1545 | output by the instruction scheduler. Return the new value of LAST. */ | |
1546 | ||
1547 | static rtx | |
1548 | reemit_notes (insn, last) | |
1549 | rtx insn; | |
1550 | rtx last; | |
1551 | { | |
1552 | rtx note, retval; | |
1553 | ||
1554 | retval = last; | |
1555 | for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) | |
1556 | { | |
c46a37c4 | 1557 | if (REG_NOTE_KIND (note) == REG_SAVE_NOTE) |
8c660648 | 1558 | { |
b3b42a4d RK |
1559 | enum insn_note note_type = INTVAL (XEXP (note, 0)); |
1560 | ||
6dfdecdb | 1561 | if (note_type == NOTE_INSN_SETJMP) |
8c660648 | 1562 | { |
6dfdecdb | 1563 | retval = emit_note_after (NOTE_INSN_SETJMP, insn); |
8c660648 | 1564 | CONST_CALL_P (retval) = CONST_CALL_P (note); |
7bd41ea6 MM |
1565 | remove_note (insn, note); |
1566 | note = XEXP (note, 1); | |
8c660648 | 1567 | } |
b3b42a4d | 1568 | else if (note_type == NOTE_INSN_RANGE_BEG |
6dfdecdb RH |
1569 | || note_type == NOTE_INSN_RANGE_END) |
1570 | { | |
1571 | last = emit_note_before (note_type, last); | |
1572 | remove_note (insn, note); | |
1573 | note = XEXP (note, 1); | |
1574 | NOTE_RANGE_INFO (last) = XEXP (note, 0); | |
1575 | } | |
8c660648 JL |
1576 | else |
1577 | { | |
19699da4 | 1578 | last = emit_note_before (note_type, last); |
7bd41ea6 MM |
1579 | remove_note (insn, note); |
1580 | note = XEXP (note, 1); | |
1a4450c7 MM |
1581 | if (note_type == NOTE_INSN_EH_REGION_BEG |
1582 | || note_type == NOTE_INSN_EH_REGION_END) | |
7bd41ea6 | 1583 | NOTE_EH_HANDLER (last) = INTVAL (XEXP (note, 0)); |
8c660648 JL |
1584 | } |
1585 | remove_note (insn, note); | |
1586 | } | |
1587 | } | |
1588 | return retval; | |
1589 | } | |
1590 | ||
1591 | /* Move INSN, and all insns which should be issued before it, | |
c9e03727 JL |
1592 | due to SCHED_GROUP_P flag. Reemit notes if needed. |
1593 | ||
1594 | Return the last insn emitted by the scheduler, which is the | |
1595 | return value from the first call to reemit_notes. */ | |
8c660648 JL |
1596 | |
1597 | static rtx | |
1598 | move_insn (insn, last) | |
1599 | rtx insn, last; | |
1600 | { | |
c9e03727 | 1601 | rtx retval = NULL; |
8c660648 | 1602 | |
c9e03727 JL |
1603 | /* If INSN has SCHED_GROUP_P set, then issue it and any other |
1604 | insns with SCHED_GROUP_P set first. */ | |
8c660648 JL |
1605 | while (SCHED_GROUP_P (insn)) |
1606 | { | |
1607 | rtx prev = PREV_INSN (insn); | |
c9e03727 JL |
1608 | |
1609 | /* Move a SCHED_GROUP_P insn. */ | |
8c660648 | 1610 | move_insn1 (insn, last); |
c9e03727 JL |
1611 | /* If this is the first call to reemit_notes, then record |
1612 | its return value. */ | |
1613 | if (retval == NULL_RTX) | |
1614 | retval = reemit_notes (insn, insn); | |
1615 | else | |
1616 | reemit_notes (insn, insn); | |
8c660648 JL |
1617 | insn = prev; |
1618 | } | |
1619 | ||
c9e03727 | 1620 | /* Now move the first non SCHED_GROUP_P insn. */ |
8c660648 | 1621 | move_insn1 (insn, last); |
c9e03727 JL |
1622 | |
1623 | /* If this is the first call to reemit_notes, then record | |
1624 | its return value. */ | |
1625 | if (retval == NULL_RTX) | |
1626 | retval = reemit_notes (insn, insn); | |
1627 | else | |
1628 | reemit_notes (insn, insn); | |
1629 | ||
1630 | return retval; | |
8c660648 JL |
1631 | } |
1632 | ||
b4ead7d4 | 1633 | /* Use forward list scheduling to rearrange insns of block B in region RGN, |
1708fd40 | 1634 | possibly bringing insns from subsequent blocks in the same region. */ |
8c660648 | 1635 | |
b4ead7d4 BS |
1636 | void |
1637 | schedule_block (b, rgn_n_insns) | |
1638 | int b; | |
8c660648 JL |
1639 | int rgn_n_insns; |
1640 | { | |
1708fd40 | 1641 | rtx last; |
176f9a7b | 1642 | struct ready_list ready; |
8c660648 JL |
1643 | int can_issue_more; |
1644 | ||
63de6c74 | 1645 | /* Head/tail info for this block. */ |
1708fd40 BS |
1646 | rtx prev_head = current_sched_info->prev_head; |
1647 | rtx next_tail = current_sched_info->next_tail; | |
1648 | rtx head = NEXT_INSN (prev_head); | |
1649 | rtx tail = PREV_INSN (next_tail); | |
8c660648 | 1650 | |
484df988 JL |
1651 | /* We used to have code to avoid getting parameters moved from hard |
1652 | argument registers into pseudos. | |
8c660648 | 1653 | |
484df988 JL |
1654 | However, it was removed when it proved to be of marginal benefit |
1655 | and caused problems because schedule_block and compute_forward_dependences | |
1656 | had different notions of what the "head" insn was. */ | |
8c660648 | 1657 | |
2c3c49de | 1658 | if (head == tail && (! INSN_P (head))) |
1708fd40 | 1659 | abort (); |
8c660648 | 1660 | |
63de6c74 | 1661 | /* Debug info. */ |
8c660648 JL |
1662 | if (sched_verbose) |
1663 | { | |
a88f02e7 BS |
1664 | fprintf (sched_dump, ";; ======================================================\n"); |
1665 | fprintf (sched_dump, | |
8c660648 | 1666 | ";; -- basic block %d from %d to %d -- %s reload\n", |
79c2ffde | 1667 | b, INSN_UID (head), INSN_UID (tail), |
8c660648 | 1668 | (reload_completed ? "after" : "before")); |
a88f02e7 BS |
1669 | fprintf (sched_dump, ";; ======================================================\n"); |
1670 | fprintf (sched_dump, "\n"); | |
8c660648 | 1671 | |
c62c2659 | 1672 | visualize_alloc (); |
8c660648 JL |
1673 | init_block_visualization (); |
1674 | } | |
1675 | ||
8c660648 JL |
1676 | clear_units (); |
1677 | ||
63de6c74 | 1678 | /* Allocate the ready list. */ |
176f9a7b BS |
1679 | ready.veclen = rgn_n_insns + 1 + ISSUE_RATE; |
1680 | ready.first = ready.veclen - 1; | |
1681 | ready.vec = (rtx *) xmalloc (ready.veclen * sizeof (rtx)); | |
1682 | ready.n_ready = 0; | |
8c660648 | 1683 | |
1708fd40 | 1684 | (*current_sched_info->init_ready_list) (&ready); |
8c660648 | 1685 | |
e4da5f6d | 1686 | #ifdef MD_SCHED_INIT |
79c2ffde | 1687 | MD_SCHED_INIT (sched_dump, sched_verbose, ready.veclen); |
e4da5f6d MM |
1688 | #endif |
1689 | ||
63de6c74 | 1690 | /* No insns scheduled in this block yet. */ |
8c660648 JL |
1691 | last_scheduled_insn = 0; |
1692 | ||
1708fd40 BS |
1693 | /* Initialize INSN_QUEUE. Q_SIZE is the total number of insns in the |
1694 | queue. */ | |
8c660648 JL |
1695 | q_ptr = 0; |
1696 | q_size = 0; | |
4bdc8810 | 1697 | last_clock_var = 0; |
961192e1 | 1698 | memset ((char *) insn_queue, 0, sizeof (insn_queue)); |
8c660648 | 1699 | |
197043f5 RH |
1700 | /* Start just before the beginning of time. */ |
1701 | clock_var = -1; | |
1702 | ||
8c660648 JL |
1703 | /* We start inserting insns after PREV_HEAD. */ |
1704 | last = prev_head; | |
1705 | ||
63de6c74 | 1706 | /* Loop until all the insns in BB are scheduled. */ |
1708fd40 | 1707 | while ((*current_sched_info->schedule_more_p) ()) |
8c660648 | 1708 | { |
8c660648 JL |
1709 | clock_var++; |
1710 | ||
1711 | /* Add to the ready list all pending insns that can be issued now. | |
1712 | If there are no ready insns, increment clock until one | |
1713 | is ready and add all pending insns at that point to the ready | |
1714 | list. */ | |
176f9a7b | 1715 | queue_to_ready (&ready); |
8c660648 | 1716 | |
79c2ffde BS |
1717 | #ifdef HAVE_cycle_display |
1718 | if (HAVE_cycle_display) | |
1719 | last = emit_insn_after (gen_cycle_display (GEN_INT (clock_var)), last); | |
1720 | #endif | |
1721 | ||
176f9a7b | 1722 | if (ready.n_ready == 0) |
8c660648 JL |
1723 | abort (); |
1724 | ||
1725 | if (sched_verbose >= 2) | |
1726 | { | |
a88f02e7 | 1727 | fprintf (sched_dump, ";;\t\tReady list after queue_to_ready: "); |
176f9a7b | 1728 | debug_ready_list (&ready); |
8c660648 JL |
1729 | } |
1730 | ||
197043f5 | 1731 | /* Sort the ready list based on priority. */ |
176f9a7b | 1732 | ready_sort (&ready); |
197043f5 | 1733 | |
b4ead7d4 BS |
1734 | /* Allow the target to reorder the list, typically for |
1735 | better instruction bundling. */ | |
1736 | #ifdef MD_SCHED_REORDER | |
1737 | MD_SCHED_REORDER (sched_dump, sched_verbose, ready_lastpos (&ready), | |
1738 | ready.n_ready, clock_var, can_issue_more); | |
1739 | #else | |
1740 | can_issue_more = issue_rate; | |
1741 | #endif | |
e1306f49 | 1742 | |
b4ead7d4 | 1743 | if (sched_verbose) |
e1306f49 | 1744 | { |
b4ead7d4 BS |
1745 | fprintf (sched_dump, "\n;;\tReady list (t =%3d): ", clock_var); |
1746 | debug_ready_list (&ready); | |
e1306f49 BS |
1747 | } |
1748 | ||
b4ead7d4 | 1749 | /* Issue insns from ready list. */ |
79c2ffde BS |
1750 | while (ready.n_ready != 0 |
1751 | && can_issue_more | |
1752 | && (*current_sched_info->schedule_more_p) ()) | |
b4ead7d4 BS |
1753 | { |
1754 | /* Select and remove the insn from the ready list. */ | |
1755 | rtx insn = ready_remove_first (&ready); | |
1756 | int cost = actual_hazard (insn_unit (insn), insn, clock_var, 0); | |
e1306f49 | 1757 | |
b4ead7d4 BS |
1758 | if (cost >= 1) |
1759 | { | |
1760 | queue_insn (insn, cost); | |
1761 | continue; | |
1762 | } | |
e1306f49 | 1763 | |
b4ead7d4 BS |
1764 | if (! (*current_sched_info->can_schedule_ready_p) (insn)) |
1765 | goto next; | |
8c660648 | 1766 | |
b4ead7d4 BS |
1767 | last_scheduled_insn = insn; |
1768 | last = move_insn (insn, last); | |
8c660648 | 1769 | |
b4ead7d4 BS |
1770 | #ifdef MD_SCHED_VARIABLE_ISSUE |
1771 | MD_SCHED_VARIABLE_ISSUE (sched_dump, sched_verbose, insn, | |
1772 | can_issue_more); | |
1773 | #else | |
1774 | can_issue_more--; | |
1775 | #endif | |
8c660648 | 1776 | |
b4ead7d4 | 1777 | schedule_insn (insn, &ready, clock_var); |
8c660648 | 1778 | |
b4ead7d4 | 1779 | next: |
01c70ab0 | 1780 | ; |
79c2ffde BS |
1781 | #ifdef MD_SCHED_REORDER2 |
1782 | /* Sort the ready list based on priority. */ | |
1783 | if (ready.n_ready > 0) | |
1784 | ready_sort (&ready); | |
1785 | MD_SCHED_REORDER2 (sched_dump, sched_verbose, | |
1786 | ready.n_ready ? ready_lastpos (&ready) : NULL, | |
1787 | ready.n_ready, clock_var, can_issue_more); | |
1788 | #endif | |
b4ead7d4 | 1789 | } |
8c660648 | 1790 | |
b4ead7d4 BS |
1791 | /* Debug info. */ |
1792 | if (sched_verbose) | |
1793 | visualize_scheduled_insns (clock_var); | |
1794 | } | |
8c660648 | 1795 | |
79c2ffde BS |
1796 | #ifdef MD_SCHED_FINISH |
1797 | MD_SCHED_FINISH (sched_dump, sched_verbose); | |
1798 | #endif | |
1799 | ||
b4ead7d4 BS |
1800 | /* Debug info. */ |
1801 | if (sched_verbose) | |
1802 | { | |
1803 | fprintf (sched_dump, ";;\tReady list (final): "); | |
1804 | debug_ready_list (&ready); | |
1805 | print_block_visualization (""); | |
1806 | } | |
8c660648 | 1807 | |
b4ead7d4 BS |
1808 | /* Sanity check -- queue must be empty now. Meaningless if region has |
1809 | multiple bbs. */ | |
1810 | if (current_sched_info->queue_must_finish_empty && q_size != 0) | |
1811 | abort (); | |
ebb7b10b | 1812 | |
b4ead7d4 BS |
1813 | /* Update head/tail boundaries. */ |
1814 | head = NEXT_INSN (prev_head); | |
1815 | tail = last; | |
ebb7b10b | 1816 | |
b4ead7d4 BS |
1817 | /* Restore-other-notes: NOTE_LIST is the end of a chain of notes |
1818 | previously found among the insns. Insert them at the beginning | |
1819 | of the insns. */ | |
1820 | if (note_list != 0) | |
1821 | { | |
1822 | rtx note_head = note_list; | |
8c660648 | 1823 | |
b4ead7d4 BS |
1824 | while (PREV_INSN (note_head)) |
1825 | { | |
1826 | note_head = PREV_INSN (note_head); | |
1827 | } | |
8c660648 | 1828 | |
b4ead7d4 BS |
1829 | PREV_INSN (note_head) = PREV_INSN (head); |
1830 | NEXT_INSN (PREV_INSN (head)) = note_head; | |
1831 | PREV_INSN (head) = note_list; | |
1832 | NEXT_INSN (note_list) = head; | |
1833 | head = note_head; | |
1834 | } | |
8c660648 | 1835 | |
b4ead7d4 BS |
1836 | /* Debugging. */ |
1837 | if (sched_verbose) | |
8c660648 | 1838 | { |
b4ead7d4 BS |
1839 | fprintf (sched_dump, ";; total time = %d\n;; new head = %d\n", |
1840 | clock_var, INSN_UID (head)); | |
1841 | fprintf (sched_dump, ";; new tail = %d\n\n", | |
1842 | INSN_UID (tail)); | |
1843 | visualize_free (); | |
1844 | } | |
8c660648 | 1845 | |
b4ead7d4 BS |
1846 | current_sched_info->head = head; |
1847 | current_sched_info->tail = tail; | |
8c660648 | 1848 | |
b4ead7d4 | 1849 | free (ready.vec); |
8c660648 | 1850 | } |
b4ead7d4 | 1851 | \f |
63de6c74 | 1852 | /* Set_priorities: compute priority of each insn in the block. */ |
8c660648 | 1853 | |
b4ead7d4 | 1854 | int |
79c2ffde BS |
1855 | set_priorities (head, tail) |
1856 | rtx head, tail; | |
8c660648 JL |
1857 | { |
1858 | rtx insn; | |
1859 | int n_insn; | |
1860 | ||
8c660648 | 1861 | rtx prev_head; |
8c660648 | 1862 | |
8c660648 JL |
1863 | prev_head = PREV_INSN (head); |
1864 | ||
2c3c49de | 1865 | if (head == tail && (! INSN_P (head))) |
8c660648 JL |
1866 | return 0; |
1867 | ||
1868 | n_insn = 0; | |
1869 | for (insn = tail; insn != prev_head; insn = PREV_INSN (insn)) | |
1870 | { | |
8c660648 JL |
1871 | if (GET_CODE (insn) == NOTE) |
1872 | continue; | |
1873 | ||
1874 | if (!(SCHED_GROUP_P (insn))) | |
1875 | n_insn++; | |
1876 | (void) priority (insn); | |
1877 | } | |
1878 | ||
1879 | return n_insn; | |
1880 | } | |
1881 | ||
a88f02e7 BS |
1882 | /* Initialize some global state for the scheduler. DUMP_FILE is to be used |
1883 | for debugging output. */ | |
8c660648 | 1884 | |
b4ead7d4 | 1885 | void |
a88f02e7 | 1886 | sched_init (dump_file) |
8c660648 JL |
1887 | FILE *dump_file; |
1888 | { | |
a88f02e7 | 1889 | int luid, b; |
8c660648 | 1890 | rtx insn; |
8c660648 | 1891 | |
63de6c74 | 1892 | /* Disable speculative loads in their presence if cc0 defined. */ |
8c660648 JL |
1893 | #ifdef HAVE_cc0 |
1894 | flag_schedule_speculative_load = 0; | |
1895 | #endif | |
1896 | ||
63de6c74 | 1897 | /* Set dump and sched_verbose for the desired debugging output. If no |
409f8483 DE |
1898 | dump-file was specified, but -fsched-verbose=N (any N), print to stderr. |
1899 | For -fsched-verbose=N, N>=10, print everything to stderr. */ | |
8c660648 JL |
1900 | sched_verbose = sched_verbose_param; |
1901 | if (sched_verbose_param == 0 && dump_file) | |
1902 | sched_verbose = 1; | |
a88f02e7 BS |
1903 | sched_dump = ((sched_verbose_param >= 10 || !dump_file) |
1904 | ? stderr : dump_file); | |
8c660648 | 1905 | |
63de6c74 | 1906 | /* Initialize issue_rate. */ |
62d65906 | 1907 | issue_rate = ISSUE_RATE; |
8c660648 | 1908 | |
d3a923ee | 1909 | split_all_insns (1); |
8c660648 | 1910 | |
c88e8206 RH |
1911 | /* We use LUID 0 for the fake insn (UID 0) which holds dependencies for |
1912 | pseudos which do not cross calls. */ | |
a88f02e7 | 1913 | old_max_uid = get_max_uid () + 1; |
8c660648 | 1914 | |
a88f02e7 | 1915 | h_i_d = (struct haifa_insn_data *) xcalloc (old_max_uid, sizeof (*h_i_d)); |
8c660648 | 1916 | |
f66d83e1 | 1917 | h_i_d[0].luid = 0; |
356edbd7 | 1918 | luid = 1; |
8c660648 | 1919 | for (b = 0; b < n_basic_blocks; b++) |
3b413743 | 1920 | for (insn = BLOCK_HEAD (b);; insn = NEXT_INSN (insn)) |
8c660648 | 1921 | { |
f77e39fc MM |
1922 | INSN_LUID (insn) = luid; |
1923 | ||
1924 | /* Increment the next luid, unless this is a note. We don't | |
1925 | really need separate IDs for notes and we don't want to | |
1926 | schedule differently depending on whether or not there are | |
1927 | line-number notes, i.e., depending on whether or not we're | |
1928 | generating debugging information. */ | |
1929 | if (GET_CODE (insn) != NOTE) | |
1930 | ++luid; | |
1931 | ||
3b413743 | 1932 | if (insn == BLOCK_END (b)) |
8c660648 JL |
1933 | break; |
1934 | } | |
7a403706 | 1935 | |
a88f02e7 BS |
1936 | init_dependency_caches (luid); |
1937 | ||
1938 | compute_bb_for_insn (old_max_uid); | |
1939 | ||
1940 | init_alias_analysis (); | |
1941 | ||
1942 | if (write_symbols != NO_DEBUG) | |
aae0390e | 1943 | { |
a88f02e7 BS |
1944 | rtx line; |
1945 | ||
1946 | line_note_head = (rtx *) xcalloc (n_basic_blocks, sizeof (rtx)); | |
1947 | ||
1948 | /* Save-line-note-head: | |
1949 | Determine the line-number at the start of each basic block. | |
1950 | This must be computed and saved now, because after a basic block's | |
1951 | predecessor has been scheduled, it is impossible to accurately | |
1952 | determine the correct line number for the first insn of the block. */ | |
1953 | ||
1954 | for (b = 0; b < n_basic_blocks; b++) | |
79c2ffde BS |
1955 | { |
1956 | for (line = BLOCK_HEAD (b); line; line = PREV_INSN (line)) | |
1957 | if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0) | |
1958 | { | |
1959 | line_note_head[b] = line; | |
1960 | break; | |
1961 | } | |
1962 | /* Do a forward search as well, since we won't get to see the first | |
1963 | notes in a basic block. */ | |
1964 | for (line = BLOCK_HEAD (b); line; line = NEXT_INSN (line)) | |
a88f02e7 | 1965 | { |
79c2ffde BS |
1966 | if (INSN_P (line)) |
1967 | break; | |
1968 | if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0) | |
1969 | line_note_head[b] = line; | |
a88f02e7 | 1970 | } |
79c2ffde | 1971 | } |
aae0390e | 1972 | } |
8c660648 | 1973 | |
a88f02e7 BS |
1974 | /* Find units used in this fuction, for visualization. */ |
1975 | if (sched_verbose) | |
1976 | init_target_units (); | |
1977 | ||
1978 | /* ??? Add a NOTE after the last insn of the last basic block. It is not | |
1979 | known why this is done. */ | |
1980 | ||
1981 | insn = BLOCK_END (n_basic_blocks - 1); | |
1982 | if (NEXT_INSN (insn) == 0 | |
1983 | || (GET_CODE (insn) != NOTE | |
1984 | && GET_CODE (insn) != CODE_LABEL | |
4cf37b4a R |
1985 | /* Don't emit a NOTE if it would end up before a BARRIER. */ |
1986 | && GET_CODE (NEXT_INSN (insn)) != BARRIER)) | |
a88f02e7 BS |
1987 | emit_note_after (NOTE_INSN_DELETED, BLOCK_END (n_basic_blocks - 1)); |
1988 | ||
1989 | /* Compute INSN_REG_WEIGHT for all blocks. We must do this before | |
1990 | removing death notes. */ | |
1991 | for (b = n_basic_blocks - 1; b >= 0; b--) | |
1992 | find_insn_reg_weight (b); | |
1993 | } | |
1994 | ||
b4ead7d4 | 1995 | /* Free global data used during insn scheduling. */ |
8c660648 | 1996 | |
a88f02e7 | 1997 | void |
b4ead7d4 | 1998 | sched_finish () |
a88f02e7 | 1999 | { |
f66d83e1 | 2000 | free (h_i_d); |
b4ead7d4 BS |
2001 | free_dependency_caches (); |
2002 | end_alias_analysis (); | |
7c74b010 | 2003 | if (write_symbols != NO_DEBUG) |
f66d83e1 | 2004 | free (line_note_head); |
8c660648 JL |
2005 | } |
2006 | #endif /* INSN_SCHEDULING */ |