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38398762 | 1 | /* Allocate registers for pseudo-registers that span basic blocks. |
35b2eb05 | 2 | Copyright (C) 1987, 1988, 1991, 1994 Free Software Foundation, Inc. |
38398762 RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
a35311b0 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
38398762 RK |
20 | |
21 | ||
22 | #include <stdio.h> | |
23 | #include "config.h" | |
24 | #include "rtl.h" | |
25 | #include "flags.h" | |
26 | #include "basic-block.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "regs.h" | |
29 | #include "insn-config.h" | |
30 | #include "output.h" | |
31 | ||
32 | /* This pass of the compiler performs global register allocation. | |
33 | It assigns hard register numbers to all the pseudo registers | |
34 | that were not handled in local_alloc. Assignments are recorded | |
35 | in the vector reg_renumber, not by changing the rtl code. | |
36 | (Such changes are made by final). The entry point is | |
37 | the function global_alloc. | |
38 | ||
39 | After allocation is complete, the reload pass is run as a subroutine | |
40 | of this pass, so that when a pseudo reg loses its hard reg due to | |
41 | spilling it is possible to make a second attempt to find a hard | |
42 | reg for it. The reload pass is independent in other respects | |
43 | and it is run even when stupid register allocation is in use. | |
44 | ||
45 | 1. count the pseudo-registers still needing allocation | |
46 | and assign allocation-numbers (allocnos) to them. | |
47 | Set up tables reg_allocno and allocno_reg to map | |
48 | reg numbers to allocnos and vice versa. | |
49 | max_allocno gets the number of allocnos in use. | |
50 | ||
51 | 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it. | |
52 | Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix | |
53 | for conflicts between allocnos and explicit hard register use | |
54 | (which includes use of pseudo-registers allocated by local_alloc). | |
55 | ||
56 | 3. for each basic block | |
57 | walk forward through the block, recording which | |
58 | unallocated registers and which hardware registers are live. | |
59 | Build the conflict matrix between the unallocated registers | |
60 | and another of unallocated registers versus hardware registers. | |
61 | Also record the preferred hardware registers | |
62 | for each unallocated one. | |
63 | ||
64 | 4. Sort a table of the allocnos into order of | |
65 | desirability of the variables. | |
66 | ||
67 | 5. Allocate the variables in that order; each if possible into | |
68 | a preferred register, else into another register. */ | |
69 | \f | |
70 | /* Number of pseudo-registers still requiring allocation | |
71 | (not allocated by local_allocate). */ | |
72 | ||
73 | static int max_allocno; | |
74 | ||
75 | /* Indexed by (pseudo) reg number, gives the allocno, or -1 | |
76 | for pseudo registers already allocated by local_allocate. */ | |
77 | ||
78 | static int *reg_allocno; | |
79 | ||
80 | /* Indexed by allocno, gives the reg number. */ | |
81 | ||
82 | static int *allocno_reg; | |
83 | ||
84 | /* A vector of the integers from 0 to max_allocno-1, | |
85 | sorted in the order of first-to-be-allocated first. */ | |
86 | ||
87 | static int *allocno_order; | |
88 | ||
89 | /* Indexed by an allocno, gives the number of consecutive | |
90 | hard registers needed by that pseudo reg. */ | |
91 | ||
92 | static int *allocno_size; | |
93 | ||
94 | /* Indexed by (pseudo) reg number, gives the number of another | |
6dc42e49 | 95 | lower-numbered pseudo reg which can share a hard reg with this pseudo |
38398762 RK |
96 | *even if the two pseudos would otherwise appear to conflict*. */ |
97 | ||
98 | static int *reg_may_share; | |
99 | ||
b1ec3c92 CH |
100 | /* Define the number of bits in each element of `conflicts' and what |
101 | type that element has. We use the largest integer format on the | |
102 | host machine. */ | |
103 | ||
104 | #define INT_BITS HOST_BITS_PER_WIDE_INT | |
105 | #define INT_TYPE HOST_WIDE_INT | |
106 | ||
38398762 RK |
107 | /* max_allocno by max_allocno array of bits, |
108 | recording whether two allocno's conflict (can't go in the same | |
109 | hardware register). | |
110 | ||
111 | `conflicts' is not symmetric; a conflict between allocno's i and j | |
112 | is recorded either in element i,j or in element j,i. */ | |
113 | ||
b1ec3c92 | 114 | static INT_TYPE *conflicts; |
38398762 RK |
115 | |
116 | /* Number of ints require to hold max_allocno bits. | |
117 | This is the length of a row in `conflicts'. */ | |
118 | ||
119 | static int allocno_row_words; | |
120 | ||
121 | /* Two macros to test or store 1 in an element of `conflicts'. */ | |
122 | ||
123 | #define CONFLICTP(I, J) \ | |
124 | (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \ | |
b1ec3c92 | 125 | & ((INT_TYPE) 1 << ((J) % INT_BITS))) |
38398762 RK |
126 | |
127 | #define SET_CONFLICT(I, J) \ | |
128 | (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \ | |
b1ec3c92 | 129 | |= ((INT_TYPE) 1 << ((J) % INT_BITS))) |
38398762 RK |
130 | |
131 | /* Set of hard regs currently live (during scan of all insns). */ | |
132 | ||
133 | static HARD_REG_SET hard_regs_live; | |
134 | ||
135 | /* Indexed by N, set of hard regs conflicting with allocno N. */ | |
136 | ||
137 | static HARD_REG_SET *hard_reg_conflicts; | |
138 | ||
139 | /* Indexed by N, set of hard regs preferred by allocno N. | |
140 | This is used to make allocnos go into regs that are copied to or from them, | |
141 | when possible, to reduce register shuffling. */ | |
142 | ||
143 | static HARD_REG_SET *hard_reg_preferences; | |
144 | ||
145 | /* Similar, but just counts register preferences made in simple copy | |
146 | operations, rather than arithmetic. These are given priority because | |
147 | we can always eliminate an insn by using these, but using a register | |
148 | in the above list won't always eliminate an insn. */ | |
149 | ||
150 | static HARD_REG_SET *hard_reg_copy_preferences; | |
151 | ||
152 | /* Similar to hard_reg_preferences, but includes bits for subsequent | |
153 | registers when an allocno is multi-word. The above variable is used for | |
154 | allocation while this is used to build reg_someone_prefers, below. */ | |
155 | ||
156 | static HARD_REG_SET *hard_reg_full_preferences; | |
157 | ||
158 | /* Indexed by N, set of hard registers that some later allocno has a | |
159 | preference for. */ | |
160 | ||
161 | static HARD_REG_SET *regs_someone_prefers; | |
162 | ||
163 | /* Set of registers that global-alloc isn't supposed to use. */ | |
164 | ||
165 | static HARD_REG_SET no_global_alloc_regs; | |
166 | ||
167 | /* Set of registers used so far. */ | |
168 | ||
169 | static HARD_REG_SET regs_used_so_far; | |
170 | ||
171 | /* Number of calls crossed by each allocno. */ | |
172 | ||
173 | static int *allocno_calls_crossed; | |
174 | ||
175 | /* Number of refs (weighted) to each allocno. */ | |
176 | ||
177 | static int *allocno_n_refs; | |
178 | ||
179 | /* Guess at live length of each allocno. | |
180 | This is actually the max of the live lengths of the regs. */ | |
181 | ||
182 | static int *allocno_live_length; | |
183 | ||
1d56e983 RS |
184 | /* Number of refs (weighted) to each hard reg, as used by local alloc. |
185 | It is zero for a reg that contains global pseudos or is explicitly used. */ | |
186 | ||
187 | static int local_reg_n_refs[FIRST_PSEUDO_REGISTER]; | |
188 | ||
189 | /* Guess at live length of each hard reg, as used by local alloc. | |
190 | This is actually the sum of the live lengths of the specific regs. */ | |
191 | ||
192 | static int local_reg_live_length[FIRST_PSEUDO_REGISTER]; | |
193 | ||
38398762 RK |
194 | /* Test a bit in TABLE, a vector of HARD_REG_SETs, |
195 | for vector element I, and hard register number J. */ | |
196 | ||
197 | #define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (TABLE[I], J) | |
198 | ||
199 | /* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */ | |
200 | ||
201 | #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (TABLE[I], J) | |
202 | ||
203 | /* Bit mask for allocnos live at current point in the scan. */ | |
204 | ||
b1ec3c92 | 205 | static INT_TYPE *allocnos_live; |
38398762 RK |
206 | |
207 | /* Test, set or clear bit number I in allocnos_live, | |
208 | a bit vector indexed by allocno. */ | |
209 | ||
210 | #define ALLOCNO_LIVE_P(I) \ | |
b1ec3c92 | 211 | (allocnos_live[(I) / INT_BITS] & ((INT_TYPE) 1 << ((I) % INT_BITS))) |
38398762 RK |
212 | |
213 | #define SET_ALLOCNO_LIVE(I) \ | |
b1ec3c92 | 214 | (allocnos_live[(I) / INT_BITS] |= ((INT_TYPE) 1 << ((I) % INT_BITS))) |
38398762 RK |
215 | |
216 | #define CLEAR_ALLOCNO_LIVE(I) \ | |
b1ec3c92 | 217 | (allocnos_live[(I) / INT_BITS] &= ~((INT_TYPE) 1 << ((I) % INT_BITS))) |
38398762 RK |
218 | |
219 | /* This is turned off because it doesn't work right for DImode. | |
220 | (And it is only used for DImode, so the other cases are worthless.) | |
221 | The problem is that it isn't true that there is NO possibility of conflict; | |
222 | only that there is no conflict if the two pseudos get the exact same regs. | |
223 | If they were allocated with a partial overlap, there would be a conflict. | |
224 | We can't safely turn off the conflict unless we have another way to | |
225 | prevent the partial overlap. | |
226 | ||
227 | Idea: change hard_reg_conflicts so that instead of recording which | |
228 | hard regs the allocno may not overlap, it records where the allocno | |
229 | may not start. Change both where it is used and where it is updated. | |
230 | Then there is a way to record that (reg:DI 108) may start at 10 | |
231 | but not at 9 or 11. There is still the question of how to record | |
232 | this semi-conflict between two pseudos. */ | |
233 | #if 0 | |
234 | /* Reg pairs for which conflict after the current insn | |
235 | is inhibited by a REG_NO_CONFLICT note. | |
236 | If the table gets full, we ignore any other notes--that is conservative. */ | |
237 | #define NUM_NO_CONFLICT_PAIRS 4 | |
238 | /* Number of pairs in use in this insn. */ | |
239 | int n_no_conflict_pairs; | |
240 | static struct { int allocno1, allocno2;} | |
241 | no_conflict_pairs[NUM_NO_CONFLICT_PAIRS]; | |
242 | #endif /* 0 */ | |
243 | ||
244 | /* Record all regs that are set in any one insn. | |
245 | Communication from mark_reg_{store,clobber} and global_conflicts. */ | |
246 | ||
247 | static rtx *regs_set; | |
248 | static int n_regs_set; | |
249 | ||
daf55ac6 | 250 | /* All registers that can be eliminated. */ |
38398762 RK |
251 | |
252 | static HARD_REG_SET eliminable_regset; | |
253 | ||
82c68a78 RK |
254 | static int allocno_compare PROTO((int *, int *)); |
255 | static void global_conflicts PROTO((void)); | |
256 | static void expand_preferences PROTO((void)); | |
257 | static void prune_preferences PROTO((void)); | |
258 | static void find_reg PROTO((int, HARD_REG_SET, int, int, int)); | |
259 | static void record_one_conflict PROTO((int)); | |
260 | static void record_conflicts PROTO((short *, int)); | |
261 | static void mark_reg_store PROTO((rtx, rtx)); | |
262 | static void mark_reg_clobber PROTO((rtx, rtx)); | |
263 | static void mark_reg_conflicts PROTO((rtx)); | |
264 | static void mark_reg_death PROTO((rtx)); | |
265 | static void mark_reg_live_nc PROTO((int, enum machine_mode)); | |
266 | static void set_preference PROTO((rtx, rtx)); | |
267 | static void dump_conflicts PROTO((FILE *)); | |
38398762 RK |
268 | \f |
269 | /* Perform allocation of pseudo-registers not allocated by local_alloc. | |
270 | FILE is a file to output debugging information on, | |
ab40ad2b | 271 | or zero if such output is not desired. |
38398762 | 272 | |
ab40ad2b RS |
273 | Return value is nonzero if reload failed |
274 | and we must not do any more for this function. */ | |
275 | ||
276 | int | |
38398762 RK |
277 | global_alloc (file) |
278 | FILE *file; | |
279 | { | |
280 | #ifdef ELIMINABLE_REGS | |
281 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; | |
282 | #endif | |
daf55ac6 RK |
283 | int need_fp |
284 | = (! flag_omit_frame_pointer | |
285 | #ifdef EXIT_IGNORE_STACK | |
286 | || (current_function_calls_alloca && EXIT_IGNORE_STACK) | |
287 | #endif | |
288 | || FRAME_POINTER_REQUIRED); | |
289 | ||
38398762 RK |
290 | register int i; |
291 | rtx x; | |
292 | ||
293 | max_allocno = 0; | |
294 | ||
295 | /* A machine may have certain hard registers that | |
296 | are safe to use only within a basic block. */ | |
297 | ||
298 | CLEAR_HARD_REG_SET (no_global_alloc_regs); | |
299 | #ifdef OVERLAPPING_REGNO_P | |
300 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
301 | if (OVERLAPPING_REGNO_P (i)) | |
302 | SET_HARD_REG_BIT (no_global_alloc_regs, i); | |
303 | #endif | |
304 | ||
305 | /* Build the regset of all eliminable registers and show we can't use those | |
306 | that we already know won't be eliminated. */ | |
307 | #ifdef ELIMINABLE_REGS | |
308 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) | |
309 | { | |
310 | SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from); | |
311 | ||
312 | if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to) | |
daf55ac6 | 313 | || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp)) |
38398762 RK |
314 | SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from); |
315 | } | |
7b0957a7 | 316 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
daf55ac6 RK |
317 | SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM); |
318 | if (need_fp) | |
7b0957a7 DE |
319 | SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM); |
320 | #endif | |
daf55ac6 | 321 | |
38398762 RK |
322 | #else |
323 | SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM); | |
daf55ac6 | 324 | if (need_fp) |
38398762 RK |
325 | SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM); |
326 | #endif | |
327 | ||
328 | /* Track which registers have already been used. Start with registers | |
329 | explicitly in the rtl, then registers allocated by local register | |
b4b4db94 | 330 | allocation. */ |
38398762 RK |
331 | |
332 | CLEAR_HARD_REG_SET (regs_used_so_far); | |
b4b4db94 RS |
333 | #ifdef LEAF_REGISTERS |
334 | /* If we are doing the leaf function optimization, and this is a leaf | |
335 | function, it means that the registers that take work to save are those | |
336 | that need a register window. So prefer the ones that can be used in | |
337 | a leaf function. */ | |
338 | { | |
339 | char *cheap_regs; | |
340 | static char leaf_regs[] = LEAF_REGISTERS; | |
341 | ||
342 | if (only_leaf_regs_used () && leaf_function_p ()) | |
343 | cheap_regs = leaf_regs; | |
344 | else | |
345 | cheap_regs = call_used_regs; | |
346 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
347 | if (regs_ever_live[i] || cheap_regs[i]) | |
348 | SET_HARD_REG_BIT (regs_used_so_far, i); | |
349 | } | |
350 | #else | |
351 | /* We consider registers that do not have to be saved over calls as if | |
352 | they were already used since there is no cost in using them. */ | |
38398762 RK |
353 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
354 | if (regs_ever_live[i] || call_used_regs[i]) | |
355 | SET_HARD_REG_BIT (regs_used_so_far, i); | |
b4b4db94 | 356 | #endif |
38398762 RK |
357 | |
358 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
359 | if (reg_renumber[i] >= 0) | |
360 | SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]); | |
361 | ||
362 | /* Establish mappings from register number to allocation number | |
363 | and vice versa. In the process, count the allocnos. */ | |
364 | ||
365 | reg_allocno = (int *) alloca (max_regno * sizeof (int)); | |
366 | ||
367 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
368 | reg_allocno[i] = -1; | |
369 | ||
370 | /* Initialize the shared-hard-reg mapping | |
371 | from the list of pairs that may share. */ | |
372 | reg_may_share = (int *) alloca (max_regno * sizeof (int)); | |
4c9a05bc | 373 | bzero ((char *) reg_may_share, max_regno * sizeof (int)); |
38398762 RK |
374 | for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1)) |
375 | { | |
376 | int r1 = REGNO (XEXP (x, 0)); | |
377 | int r2 = REGNO (XEXP (XEXP (x, 1), 0)); | |
378 | if (r1 > r2) | |
379 | reg_may_share[r1] = r2; | |
380 | else | |
381 | reg_may_share[r2] = r1; | |
382 | } | |
383 | ||
384 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
385 | /* Note that reg_live_length[i] < 0 indicates a "constant" reg | |
386 | that we are supposed to refrain from putting in a hard reg. | |
387 | -2 means do make an allocno but don't allocate it. */ | |
388 | if (reg_n_refs[i] != 0 && reg_renumber[i] < 0 && reg_live_length[i] != -1 | |
389 | /* Don't allocate pseudos that cross calls, | |
390 | if this function receives a nonlocal goto. */ | |
391 | && (! current_function_has_nonlocal_label | |
392 | || reg_n_calls_crossed[i] == 0)) | |
393 | { | |
394 | if (reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0) | |
395 | reg_allocno[i] = reg_allocno[reg_may_share[i]]; | |
396 | else | |
397 | reg_allocno[i] = max_allocno++; | |
398 | if (reg_live_length[i] == 0) | |
399 | abort (); | |
400 | } | |
401 | else | |
402 | reg_allocno[i] = -1; | |
403 | ||
404 | allocno_reg = (int *) alloca (max_allocno * sizeof (int)); | |
405 | allocno_size = (int *) alloca (max_allocno * sizeof (int)); | |
406 | allocno_calls_crossed = (int *) alloca (max_allocno * sizeof (int)); | |
407 | allocno_n_refs = (int *) alloca (max_allocno * sizeof (int)); | |
408 | allocno_live_length = (int *) alloca (max_allocno * sizeof (int)); | |
4c9a05bc RK |
409 | bzero ((char *) allocno_size, max_allocno * sizeof (int)); |
410 | bzero ((char *) allocno_calls_crossed, max_allocno * sizeof (int)); | |
411 | bzero ((char *) allocno_n_refs, max_allocno * sizeof (int)); | |
412 | bzero ((char *) allocno_live_length, max_allocno * sizeof (int)); | |
38398762 RK |
413 | |
414 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) | |
415 | if (reg_allocno[i] >= 0) | |
416 | { | |
417 | int allocno = reg_allocno[i]; | |
418 | allocno_reg[allocno] = i; | |
419 | allocno_size[allocno] = PSEUDO_REGNO_SIZE (i); | |
420 | allocno_calls_crossed[allocno] += reg_n_calls_crossed[i]; | |
421 | allocno_n_refs[allocno] += reg_n_refs[i]; | |
422 | if (allocno_live_length[allocno] < reg_live_length[i]) | |
423 | allocno_live_length[allocno] = reg_live_length[i]; | |
424 | } | |
425 | ||
1d56e983 RS |
426 | /* Calculate amount of usage of each hard reg by pseudos |
427 | allocated by local-alloc. This is to see if we want to | |
428 | override it. */ | |
4c9a05bc RK |
429 | bzero ((char *) local_reg_live_length, sizeof local_reg_live_length); |
430 | bzero ((char *) local_reg_n_refs, sizeof local_reg_n_refs); | |
1d56e983 RS |
431 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
432 | if (reg_allocno[i] < 0 && reg_renumber[i] >= 0) | |
433 | { | |
34e56753 RS |
434 | int regno = reg_renumber[i]; |
435 | int endregno = regno + HARD_REGNO_NREGS (regno, PSEUDO_REGNO_MODE (i)); | |
436 | int j; | |
437 | ||
438 | for (j = regno; j < endregno; j++) | |
439 | { | |
440 | local_reg_n_refs[j] += reg_n_refs[i]; | |
441 | local_reg_live_length[j] += reg_live_length[i]; | |
442 | } | |
1d56e983 | 443 | } |
34e56753 | 444 | |
1d56e983 RS |
445 | /* We can't override local-alloc for a reg used not just by local-alloc. */ |
446 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
447 | if (regs_ever_live[i]) | |
448 | local_reg_n_refs[i] = 0; | |
449 | ||
0dfa4517 RK |
450 | /* Likewise for regs used in a SCRATCH. */ |
451 | for (i = 0; i < scratch_list_length; i++) | |
452 | if (scratch_list[i]) | |
453 | { | |
454 | int regno = REGNO (scratch_list[i]); | |
455 | int lim = regno + HARD_REGNO_NREGS (regno, GET_MODE (scratch_list[i])); | |
456 | int j; | |
457 | ||
458 | for (j = regno; j < lim; j++) | |
459 | local_reg_n_refs[j] = 0; | |
460 | } | |
461 | ||
38398762 RK |
462 | /* Allocate the space for the conflict and preference tables and |
463 | initialize them. */ | |
464 | ||
465 | hard_reg_conflicts | |
466 | = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); | |
4c9a05bc | 467 | bzero ((char *) hard_reg_conflicts, max_allocno * sizeof (HARD_REG_SET)); |
38398762 RK |
468 | |
469 | hard_reg_preferences | |
470 | = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); | |
4c9a05bc | 471 | bzero ((char *) hard_reg_preferences, max_allocno * sizeof (HARD_REG_SET)); |
38398762 RK |
472 | |
473 | hard_reg_copy_preferences | |
474 | = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); | |
4c9a05bc RK |
475 | bzero ((char *) hard_reg_copy_preferences, |
476 | max_allocno * sizeof (HARD_REG_SET)); | |
38398762 RK |
477 | |
478 | hard_reg_full_preferences | |
479 | = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); | |
4c9a05bc RK |
480 | bzero ((char *) hard_reg_full_preferences, |
481 | max_allocno * sizeof (HARD_REG_SET)); | |
38398762 RK |
482 | |
483 | regs_someone_prefers | |
484 | = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); | |
4c9a05bc | 485 | bzero ((char *) regs_someone_prefers, max_allocno * sizeof (HARD_REG_SET)); |
38398762 RK |
486 | |
487 | allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS; | |
488 | ||
b1ec3c92 CH |
489 | conflicts = (INT_TYPE *) alloca (max_allocno * allocno_row_words |
490 | * sizeof (INT_TYPE)); | |
4c9a05bc RK |
491 | bzero ((char *) conflicts, |
492 | max_allocno * allocno_row_words * sizeof (INT_TYPE)); | |
38398762 | 493 | |
b1ec3c92 | 494 | allocnos_live = (INT_TYPE *) alloca (allocno_row_words * sizeof (INT_TYPE)); |
38398762 RK |
495 | |
496 | /* If there is work to be done (at least one reg to allocate), | |
497 | perform global conflict analysis and allocate the regs. */ | |
498 | ||
499 | if (max_allocno > 0) | |
500 | { | |
501 | /* Scan all the insns and compute the conflicts among allocnos | |
502 | and between allocnos and hard regs. */ | |
503 | ||
504 | global_conflicts (); | |
505 | ||
506 | /* Eliminate conflicts between pseudos and eliminable registers. If | |
507 | the register is not eliminated, the pseudo won't really be able to | |
508 | live in the eliminable register, so the conflict doesn't matter. | |
509 | If we do eliminate the register, the conflict will no longer exist. | |
1d56e983 RS |
510 | So in either case, we can ignore the conflict. Likewise for |
511 | preferences. */ | |
38398762 RK |
512 | |
513 | for (i = 0; i < max_allocno; i++) | |
1d56e983 RS |
514 | { |
515 | AND_COMPL_HARD_REG_SET (hard_reg_conflicts[i], eliminable_regset); | |
516 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[i], | |
517 | eliminable_regset); | |
518 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[i], eliminable_regset); | |
519 | } | |
38398762 RK |
520 | |
521 | /* Try to expand the preferences by merging them between allocnos. */ | |
522 | ||
523 | expand_preferences (); | |
524 | ||
525 | /* Determine the order to allocate the remaining pseudo registers. */ | |
526 | ||
527 | allocno_order = (int *) alloca (max_allocno * sizeof (int)); | |
528 | for (i = 0; i < max_allocno; i++) | |
529 | allocno_order[i] = i; | |
530 | ||
531 | /* Default the size to 1, since allocno_compare uses it to divide by. | |
532 | Also convert allocno_live_length of zero to -1. A length of zero | |
533 | can occur when all the registers for that allocno have reg_live_length | |
534 | equal to -2. In this case, we want to make an allocno, but not | |
535 | allocate it. So avoid the divide-by-zero and set it to a low | |
536 | priority. */ | |
537 | ||
538 | for (i = 0; i < max_allocno; i++) | |
539 | { | |
540 | if (allocno_size[i] == 0) | |
541 | allocno_size[i] = 1; | |
542 | if (allocno_live_length[i] == 0) | |
543 | allocno_live_length[i] = -1; | |
544 | } | |
545 | ||
546 | qsort (allocno_order, max_allocno, sizeof (int), allocno_compare); | |
547 | ||
548 | prune_preferences (); | |
549 | ||
550 | if (file) | |
551 | dump_conflicts (file); | |
552 | ||
553 | /* Try allocating them, one by one, in that order, | |
554 | except for parameters marked with reg_live_length[regno] == -2. */ | |
555 | ||
556 | for (i = 0; i < max_allocno; i++) | |
557 | if (reg_live_length[allocno_reg[allocno_order[i]]] >= 0) | |
558 | { | |
559 | /* If we have more than one register class, | |
560 | first try allocating in the class that is cheapest | |
561 | for this pseudo-reg. If that fails, try any reg. */ | |
562 | if (N_REG_CLASSES > 1) | |
563 | { | |
1d56e983 | 564 | find_reg (allocno_order[i], HARD_CONST (0), 0, 0, 0); |
38398762 RK |
565 | if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0) |
566 | continue; | |
567 | } | |
b1ec3c92 | 568 | if (reg_alternate_class (allocno_reg[allocno_order[i]]) != NO_REGS) |
1d56e983 | 569 | find_reg (allocno_order[i], HARD_CONST (0), 1, 0, 0); |
38398762 RK |
570 | } |
571 | } | |
572 | ||
573 | /* Do the reloads now while the allocno data still exist, so that we can | |
574 | try to assign new hard regs to any pseudo regs that are spilled. */ | |
575 | ||
7e860cf7 RS |
576 | #if 0 /* We need to eliminate regs even if there is no rtl code, |
577 | for the sake of debugging information. */ | |
38398762 | 578 | if (n_basic_blocks > 0) |
7e860cf7 | 579 | #endif |
ab40ad2b | 580 | return reload (get_insns (), 1, file); |
38398762 RK |
581 | } |
582 | ||
583 | /* Sort predicate for ordering the allocnos. | |
584 | Returns -1 (1) if *v1 should be allocated before (after) *v2. */ | |
585 | ||
586 | static int | |
587 | allocno_compare (v1, v2) | |
588 | int *v1, *v2; | |
589 | { | |
590 | /* Note that the quotient will never be bigger than | |
591 | the value of floor_log2 times the maximum number of | |
592 | times a register can occur in one insn (surely less than 100). | |
593 | Multiplying this by 10000 can't overflow. */ | |
594 | register int pri1 | |
595 | = (((double) (floor_log2 (allocno_n_refs[*v1]) * allocno_n_refs[*v1]) | |
35b2eb05 RK |
596 | / allocno_live_length[*v1]) |
597 | * 10000 * allocno_size[*v1]); | |
38398762 RK |
598 | register int pri2 |
599 | = (((double) (floor_log2 (allocno_n_refs[*v2]) * allocno_n_refs[*v2]) | |
35b2eb05 RK |
600 | / allocno_live_length[*v2]) |
601 | * 10000 * allocno_size[*v2]); | |
38398762 RK |
602 | if (pri2 - pri1) |
603 | return pri2 - pri1; | |
604 | ||
605 | /* If regs are equally good, sort by allocno, | |
606 | so that the results of qsort leave nothing to chance. */ | |
607 | return *v1 - *v2; | |
608 | } | |
609 | \f | |
610 | /* Scan the rtl code and record all conflicts and register preferences in the | |
611 | conflict matrices and preference tables. */ | |
612 | ||
613 | static void | |
614 | global_conflicts () | |
615 | { | |
616 | register int b, i; | |
617 | register rtx insn; | |
618 | short *block_start_allocnos; | |
619 | ||
620 | /* Make a vector that mark_reg_{store,clobber} will store in. */ | |
621 | regs_set = (rtx *) alloca (max_parallel * sizeof (rtx) * 2); | |
622 | ||
623 | block_start_allocnos = (short *) alloca (max_allocno * sizeof (short)); | |
624 | ||
625 | for (b = 0; b < n_basic_blocks; b++) | |
626 | { | |
4c9a05bc | 627 | bzero ((char *) allocnos_live, allocno_row_words * sizeof (INT_TYPE)); |
38398762 RK |
628 | |
629 | /* Initialize table of registers currently live | |
630 | to the state at the beginning of this basic block. | |
631 | This also marks the conflicts among them. | |
632 | ||
633 | For pseudo-regs, there is only one bit for each one | |
634 | no matter how many hard regs it occupies. | |
635 | This is ok; we know the size from PSEUDO_REGNO_SIZE. | |
636 | For explicit hard regs, we cannot know the size that way | |
637 | since one hard reg can be used with various sizes. | |
638 | Therefore, we must require that all the hard regs | |
639 | implicitly live as part of a multi-word hard reg | |
640 | are explicitly marked in basic_block_live_at_start. */ | |
641 | ||
642 | { | |
b1ec3c92 CH |
643 | register int offset; |
644 | REGSET_ELT_TYPE bit; | |
38398762 RK |
645 | register regset old = basic_block_live_at_start[b]; |
646 | int ax = 0; | |
647 | ||
69887ad9 RK |
648 | #ifdef HARD_REG_SET |
649 | hard_regs_live = old[0]; | |
650 | #else | |
651 | COPY_HARD_REG_SET (hard_regs_live, old); | |
652 | #endif | |
38398762 RK |
653 | for (offset = 0, i = 0; offset < regset_size; offset++) |
654 | if (old[offset] == 0) | |
b1ec3c92 | 655 | i += REGSET_ELT_BITS; |
38398762 RK |
656 | else |
657 | for (bit = 1; bit; bit <<= 1, i++) | |
658 | { | |
659 | if (i >= max_regno) | |
660 | break; | |
661 | if (old[offset] & bit) | |
662 | { | |
663 | register int a = reg_allocno[i]; | |
664 | if (a >= 0) | |
665 | { | |
666 | SET_ALLOCNO_LIVE (a); | |
667 | block_start_allocnos[ax++] = a; | |
668 | } | |
669 | else if ((a = reg_renumber[i]) >= 0) | |
670 | mark_reg_live_nc (a, PSEUDO_REGNO_MODE (i)); | |
671 | } | |
672 | } | |
673 | ||
674 | /* Record that each allocno now live conflicts with each other | |
675 | allocno now live, and with each hard reg now live. */ | |
676 | ||
677 | record_conflicts (block_start_allocnos, ax); | |
678 | } | |
679 | ||
680 | insn = basic_block_head[b]; | |
681 | ||
682 | /* Scan the code of this basic block, noting which allocnos | |
683 | and hard regs are born or die. When one is born, | |
684 | record a conflict with all others currently live. */ | |
685 | ||
686 | while (1) | |
687 | { | |
688 | register RTX_CODE code = GET_CODE (insn); | |
689 | register rtx link; | |
690 | ||
691 | /* Make regs_set an empty set. */ | |
692 | ||
693 | n_regs_set = 0; | |
694 | ||
695 | if (code == INSN || code == CALL_INSN || code == JUMP_INSN) | |
696 | { | |
38398762 RK |
697 | |
698 | #if 0 | |
2049526b | 699 | int i = 0; |
38398762 RK |
700 | for (link = REG_NOTES (insn); |
701 | link && i < NUM_NO_CONFLICT_PAIRS; | |
702 | link = XEXP (link, 1)) | |
703 | if (REG_NOTE_KIND (link) == REG_NO_CONFLICT) | |
704 | { | |
705 | no_conflict_pairs[i].allocno1 | |
706 | = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))]; | |
707 | no_conflict_pairs[i].allocno2 | |
708 | = reg_allocno[REGNO (XEXP (link, 0))]; | |
709 | i++; | |
710 | } | |
711 | #endif /* 0 */ | |
712 | ||
713 | /* Mark any registers clobbered by INSN as live, | |
714 | so they conflict with the inputs. */ | |
715 | ||
716 | note_stores (PATTERN (insn), mark_reg_clobber); | |
717 | ||
718 | /* Mark any registers dead after INSN as dead now. */ | |
719 | ||
720 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
721 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
722 | mark_reg_death (XEXP (link, 0)); | |
723 | ||
724 | /* Mark any registers set in INSN as live, | |
725 | and mark them as conflicting with all other live regs. | |
726 | Clobbers are processed again, so they conflict with | |
727 | the registers that are set. */ | |
728 | ||
729 | note_stores (PATTERN (insn), mark_reg_store); | |
730 | ||
731 | #ifdef AUTO_INC_DEC | |
732 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
733 | if (REG_NOTE_KIND (link) == REG_INC) | |
b1ec3c92 | 734 | mark_reg_store (XEXP (link, 0), NULL_RTX); |
38398762 RK |
735 | #endif |
736 | ||
333e0f7d RS |
737 | /* If INSN has multiple outputs, then any reg that dies here |
738 | and is used inside of an output | |
739 | must conflict with the other outputs. */ | |
740 | ||
741 | if (GET_CODE (PATTERN (insn)) == PARALLEL && !single_set (insn)) | |
742 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
743 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
744 | { | |
745 | int used_in_output = 0; | |
746 | int i; | |
747 | rtx reg = XEXP (link, 0); | |
748 | ||
749 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
750 | { | |
751 | rtx set = XVECEXP (PATTERN (insn), 0, i); | |
752 | if (GET_CODE (set) == SET | |
753 | && GET_CODE (SET_DEST (set)) != REG | |
754 | && !rtx_equal_p (reg, SET_DEST (set)) | |
755 | && reg_overlap_mentioned_p (reg, SET_DEST (set))) | |
756 | used_in_output = 1; | |
757 | } | |
758 | if (used_in_output) | |
759 | mark_reg_conflicts (reg); | |
760 | } | |
761 | ||
38398762 RK |
762 | /* Mark any registers set in INSN and then never used. */ |
763 | ||
764 | while (n_regs_set > 0) | |
765 | if (find_regno_note (insn, REG_UNUSED, | |
766 | REGNO (regs_set[--n_regs_set]))) | |
767 | mark_reg_death (regs_set[n_regs_set]); | |
768 | } | |
769 | ||
770 | if (insn == basic_block_end[b]) | |
771 | break; | |
772 | insn = NEXT_INSN (insn); | |
773 | } | |
774 | } | |
775 | } | |
776 | /* Expand the preference information by looking for cases where one allocno | |
777 | dies in an insn that sets an allocno. If those two allocnos don't conflict, | |
778 | merge any preferences between those allocnos. */ | |
779 | ||
780 | static void | |
781 | expand_preferences () | |
782 | { | |
783 | rtx insn; | |
784 | rtx link; | |
785 | rtx set; | |
786 | ||
787 | /* We only try to handle the most common cases here. Most of the cases | |
788 | where this wins are reg-reg copies. */ | |
789 | ||
790 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
791 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
792 | && (set = single_set (insn)) != 0 | |
793 | && GET_CODE (SET_DEST (set)) == REG | |
794 | && reg_allocno[REGNO (SET_DEST (set))] >= 0) | |
795 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
796 | if (REG_NOTE_KIND (link) == REG_DEAD | |
797 | && GET_CODE (XEXP (link, 0)) == REG | |
798 | && reg_allocno[REGNO (XEXP (link, 0))] >= 0 | |
799 | && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))], | |
800 | reg_allocno[REGNO (XEXP (link, 0))]) | |
801 | && ! CONFLICTP (reg_allocno[REGNO (XEXP (link, 0))], | |
802 | reg_allocno[REGNO (SET_DEST (set))])) | |
803 | { | |
804 | int a1 = reg_allocno[REGNO (SET_DEST (set))]; | |
805 | int a2 = reg_allocno[REGNO (XEXP (link, 0))]; | |
806 | ||
807 | if (XEXP (link, 0) == SET_SRC (set)) | |
808 | { | |
809 | IOR_HARD_REG_SET (hard_reg_copy_preferences[a1], | |
810 | hard_reg_copy_preferences[a2]); | |
811 | IOR_HARD_REG_SET (hard_reg_copy_preferences[a2], | |
812 | hard_reg_copy_preferences[a1]); | |
813 | } | |
814 | ||
815 | IOR_HARD_REG_SET (hard_reg_preferences[a1], | |
816 | hard_reg_preferences[a2]); | |
817 | IOR_HARD_REG_SET (hard_reg_preferences[a2], | |
818 | hard_reg_preferences[a1]); | |
819 | IOR_HARD_REG_SET (hard_reg_full_preferences[a1], | |
820 | hard_reg_full_preferences[a2]); | |
821 | IOR_HARD_REG_SET (hard_reg_full_preferences[a2], | |
822 | hard_reg_full_preferences[a1]); | |
823 | } | |
824 | } | |
825 | \f | |
826 | /* Prune the preferences for global registers to exclude registers that cannot | |
827 | be used. | |
828 | ||
829 | Compute `regs_someone_prefers', which is a bitmask of the hard registers | |
830 | that are preferred by conflicting registers of lower priority. If possible, | |
831 | we will avoid using these registers. */ | |
832 | ||
833 | static void | |
834 | prune_preferences () | |
835 | { | |
836 | int i, j; | |
837 | int allocno; | |
838 | ||
839 | /* Scan least most important to most important. | |
840 | For each allocno, remove from preferences registers that cannot be used, | |
841 | either because of conflicts or register type. Then compute all registers | |
d45cf215 | 842 | preferred by each lower-priority register that conflicts. */ |
38398762 RK |
843 | |
844 | for (i = max_allocno - 1; i >= 0; i--) | |
845 | { | |
846 | HARD_REG_SET temp; | |
847 | ||
848 | allocno = allocno_order[i]; | |
849 | COPY_HARD_REG_SET (temp, hard_reg_conflicts[allocno]); | |
850 | ||
851 | if (allocno_calls_crossed[allocno] == 0) | |
852 | IOR_HARD_REG_SET (temp, fixed_reg_set); | |
853 | else | |
854 | IOR_HARD_REG_SET (temp, call_used_reg_set); | |
855 | ||
856 | IOR_COMPL_HARD_REG_SET | |
857 | (temp, | |
858 | reg_class_contents[(int) reg_preferred_class (allocno_reg[allocno])]); | |
859 | ||
860 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], temp); | |
861 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], temp); | |
862 | AND_COMPL_HARD_REG_SET (hard_reg_full_preferences[allocno], temp); | |
863 | ||
864 | CLEAR_HARD_REG_SET (regs_someone_prefers[allocno]); | |
865 | ||
866 | /* Merge in the preferences of lower-priority registers (they have | |
867 | already been pruned). If we also prefer some of those registers, | |
868 | don't exclude them unless we are of a smaller size (in which case | |
869 | we want to give the lower-priority allocno the first chance for | |
870 | these registers). */ | |
871 | for (j = i + 1; j < max_allocno; j++) | |
872 | if (CONFLICTP (allocno, allocno_order[j])) | |
873 | { | |
874 | COPY_HARD_REG_SET (temp, | |
875 | hard_reg_full_preferences[allocno_order[j]]); | |
876 | if (allocno_size[allocno_order[j]] <= allocno_size[allocno]) | |
877 | AND_COMPL_HARD_REG_SET (temp, | |
878 | hard_reg_full_preferences[allocno]); | |
879 | ||
880 | IOR_HARD_REG_SET (regs_someone_prefers[allocno], temp); | |
881 | } | |
882 | } | |
883 | } | |
884 | \f | |
885 | /* Assign a hard register to ALLOCNO; look for one that is the beginning | |
886 | of a long enough stretch of hard regs none of which conflicts with ALLOCNO. | |
887 | The registers marked in PREFREGS are tried first. | |
888 | ||
889 | LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot | |
890 | be used for this allocation. | |
891 | ||
b1ec3c92 CH |
892 | If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg. |
893 | Otherwise ignore that preferred class and use the alternate class. | |
38398762 RK |
894 | |
895 | If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that | |
896 | will have to be saved and restored at calls. | |
897 | ||
1d56e983 RS |
898 | RETRYING is nonzero if this is called from retry_global_alloc. |
899 | ||
38398762 RK |
900 | If we find one, record it in reg_renumber. |
901 | If not, do nothing. */ | |
902 | ||
903 | static void | |
b1ec3c92 | 904 | find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) |
38398762 RK |
905 | int allocno; |
906 | HARD_REG_SET losers; | |
b1ec3c92 | 907 | int alt_regs_p; |
38398762 | 908 | int accept_call_clobbered; |
1d56e983 | 909 | int retrying; |
38398762 RK |
910 | { |
911 | register int i, best_reg, pass; | |
912 | #ifdef HARD_REG_SET | |
913 | register /* Declare it register if it's a scalar. */ | |
914 | #endif | |
1d56e983 | 915 | HARD_REG_SET used, used1, used2; |
38398762 | 916 | |
b1ec3c92 CH |
917 | enum reg_class class = (alt_regs_p |
918 | ? reg_alternate_class (allocno_reg[allocno]) | |
919 | : reg_preferred_class (allocno_reg[allocno])); | |
38398762 RK |
920 | enum machine_mode mode = PSEUDO_REGNO_MODE (allocno_reg[allocno]); |
921 | ||
922 | if (accept_call_clobbered) | |
923 | COPY_HARD_REG_SET (used1, call_fixed_reg_set); | |
924 | else if (allocno_calls_crossed[allocno] == 0) | |
925 | COPY_HARD_REG_SET (used1, fixed_reg_set); | |
926 | else | |
927 | COPY_HARD_REG_SET (used1, call_used_reg_set); | |
928 | ||
929 | /* Some registers should not be allocated in global-alloc. */ | |
930 | IOR_HARD_REG_SET (used1, no_global_alloc_regs); | |
931 | if (losers) | |
932 | IOR_HARD_REG_SET (used1, losers); | |
933 | ||
934 | IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]); | |
1d56e983 RS |
935 | COPY_HARD_REG_SET (used2, used1); |
936 | ||
38398762 RK |
937 | IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]); |
938 | ||
d546b10a RK |
939 | #ifdef CLASS_CANNOT_CHANGE_SIZE |
940 | if (reg_changes_size[allocno_reg[allocno]]) | |
941 | IOR_HARD_REG_SET (used1, | |
942 | reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]); | |
943 | #endif | |
944 | ||
38398762 | 945 | /* Try each hard reg to see if it fits. Do this in two passes. |
d45cf215 | 946 | In the first pass, skip registers that are preferred by some other pseudo |
38398762 RK |
947 | to give it a better chance of getting one of those registers. Only if |
948 | we can't get a register when excluding those do we take one of them. | |
949 | However, we never allocate a register for the first time in pass 0. */ | |
950 | ||
951 | COPY_HARD_REG_SET (used, used1); | |
952 | IOR_COMPL_HARD_REG_SET (used, regs_used_so_far); | |
953 | IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]); | |
954 | ||
955 | best_reg = -1; | |
956 | for (i = FIRST_PSEUDO_REGISTER, pass = 0; | |
957 | pass <= 1 && i >= FIRST_PSEUDO_REGISTER; | |
958 | pass++) | |
959 | { | |
960 | if (pass == 1) | |
961 | COPY_HARD_REG_SET (used, used1); | |
962 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
963 | { | |
964 | #ifdef REG_ALLOC_ORDER | |
965 | int regno = reg_alloc_order[i]; | |
966 | #else | |
967 | int regno = i; | |
968 | #endif | |
969 | if (! TEST_HARD_REG_BIT (used, regno) | |
970 | && HARD_REGNO_MODE_OK (regno, mode)) | |
971 | { | |
972 | register int j; | |
973 | register int lim = regno + HARD_REGNO_NREGS (regno, mode); | |
974 | for (j = regno + 1; | |
975 | (j < lim | |
976 | && ! TEST_HARD_REG_BIT (used, j)); | |
977 | j++); | |
978 | if (j == lim) | |
979 | { | |
980 | best_reg = regno; | |
981 | break; | |
982 | } | |
983 | #ifndef REG_ALLOC_ORDER | |
984 | i = j; /* Skip starting points we know will lose */ | |
985 | #endif | |
986 | } | |
987 | } | |
988 | } | |
989 | ||
990 | /* See if there is a preferred register with the same class as the register | |
991 | we allocated above. Making this restriction prevents register | |
992 | preferencing from creating worse register allocation. | |
993 | ||
994 | Remove from the preferred registers and conflicting registers. Note that | |
995 | additional conflicts may have been added after `prune_preferences' was | |
996 | called. | |
997 | ||
998 | First do this for those register with copy preferences, then all | |
999 | preferred registers. */ | |
1000 | ||
1001 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], used); | |
1002 | GO_IF_HARD_REG_SUBSET (hard_reg_copy_preferences[allocno], | |
1003 | reg_class_contents[(int) NO_REGS], no_copy_prefs); | |
1004 | ||
1005 | if (best_reg >= 0) | |
1006 | { | |
1007 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1008 | if (TEST_HARD_REG_BIT (hard_reg_copy_preferences[allocno], i) | |
1009 | && HARD_REGNO_MODE_OK (i, mode) | |
1010 | && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg) | |
1011 | || reg_class_subset_p (REGNO_REG_CLASS (i), | |
1012 | REGNO_REG_CLASS (best_reg)) | |
1013 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg), | |
1014 | REGNO_REG_CLASS (i)))) | |
1015 | { | |
1016 | register int j; | |
1017 | register int lim = i + HARD_REGNO_NREGS (i, mode); | |
1018 | for (j = i + 1; | |
1019 | (j < lim | |
1020 | && ! TEST_HARD_REG_BIT (used, j) | |
1021 | && (REGNO_REG_CLASS (j) | |
1022 | == REGNO_REG_CLASS (best_reg + (j - i)) | |
1023 | || reg_class_subset_p (REGNO_REG_CLASS (j), | |
1024 | REGNO_REG_CLASS (best_reg + (j - i))) | |
1025 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)), | |
1026 | REGNO_REG_CLASS (j)))); | |
1027 | j++); | |
1028 | if (j == lim) | |
1029 | { | |
1030 | best_reg = i; | |
1031 | goto no_prefs; | |
1032 | } | |
1033 | } | |
1034 | } | |
1035 | no_copy_prefs: | |
1036 | ||
1037 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], used); | |
1038 | GO_IF_HARD_REG_SUBSET (hard_reg_preferences[allocno], | |
1039 | reg_class_contents[(int) NO_REGS], no_prefs); | |
1040 | ||
1041 | if (best_reg >= 0) | |
1042 | { | |
1043 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1044 | if (TEST_HARD_REG_BIT (hard_reg_preferences[allocno], i) | |
1045 | && HARD_REGNO_MODE_OK (i, mode) | |
1046 | && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg) | |
1047 | || reg_class_subset_p (REGNO_REG_CLASS (i), | |
1048 | REGNO_REG_CLASS (best_reg)) | |
1049 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg), | |
1050 | REGNO_REG_CLASS (i)))) | |
1051 | { | |
1052 | register int j; | |
1053 | register int lim = i + HARD_REGNO_NREGS (i, mode); | |
1054 | for (j = i + 1; | |
1055 | (j < lim | |
1056 | && ! TEST_HARD_REG_BIT (used, j) | |
1057 | && (REGNO_REG_CLASS (j) | |
1058 | == REGNO_REG_CLASS (best_reg + (j - i)) | |
1059 | || reg_class_subset_p (REGNO_REG_CLASS (j), | |
1060 | REGNO_REG_CLASS (best_reg + (j - i))) | |
1061 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)), | |
1062 | REGNO_REG_CLASS (j)))); | |
1063 | j++); | |
1064 | if (j == lim) | |
1065 | { | |
1066 | best_reg = i; | |
1067 | break; | |
1068 | } | |
1069 | } | |
1070 | } | |
1071 | no_prefs: | |
1072 | ||
cfcf04a6 RK |
1073 | /* If we haven't succeeded yet, try with caller-saves. |
1074 | We need not check to see if the current function has nonlocal | |
1075 | labels because we don't put any pseudos that are live over calls in | |
1076 | registers in that case. */ | |
1077 | ||
1d56e983 RS |
1078 | if (flag_caller_saves && best_reg < 0) |
1079 | { | |
1080 | /* Did not find a register. If it would be profitable to | |
1081 | allocate a call-clobbered register and save and restore it | |
1082 | around calls, do that. */ | |
1083 | if (! accept_call_clobbered | |
1084 | && allocno_calls_crossed[allocno] != 0 | |
1085 | && CALLER_SAVE_PROFITABLE (allocno_n_refs[allocno], | |
1086 | allocno_calls_crossed[allocno])) | |
1087 | { | |
6cad67d2 JL |
1088 | HARD_REG_SET new_losers; |
1089 | if (! losers) | |
1090 | CLEAR_HARD_REG_SET (new_losers); | |
1091 | else | |
1092 | COPY_HARD_REG_SET (new_losers, losers); | |
1093 | ||
1094 | IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set); | |
1095 | find_reg (allocno, new_losers, alt_regs_p, 1, retrying); | |
1d56e983 RS |
1096 | if (reg_renumber[allocno_reg[allocno]] >= 0) |
1097 | { | |
1098 | caller_save_needed = 1; | |
1099 | return; | |
1100 | } | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | /* If we haven't succeeded yet, | |
1105 | see if some hard reg that conflicts with us | |
1106 | was utilized poorly by local-alloc. | |
1107 | If so, kick out the regs that were put there by local-alloc | |
1108 | so we can use it instead. */ | |
1109 | if (best_reg < 0 && !retrying | |
1110 | /* Let's not bother with multi-reg allocnos. */ | |
1111 | && allocno_size[allocno] == 1) | |
1112 | { | |
1113 | /* Count from the end, to find the least-used ones first. */ | |
1114 | for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--) | |
17a0a76d RK |
1115 | { |
1116 | #ifdef REG_ALLOC_ORDER | |
1117 | int regno = reg_alloc_order[i]; | |
1118 | #else | |
1119 | int regno = i; | |
1120 | #endif | |
34e56753 | 1121 | |
17a0a76d RK |
1122 | if (local_reg_n_refs[regno] != 0 |
1123 | /* Don't use a reg no good for this pseudo. */ | |
1124 | && ! TEST_HARD_REG_BIT (used2, regno) | |
d546b10a RK |
1125 | && HARD_REGNO_MODE_OK (regno, mode) |
1126 | #ifdef CLASS_CANNOT_CHANGE_SIZE | |
1127 | && ! (reg_changes_size[allocno_reg[allocno]] | |
1128 | && (TEST_HARD_REG_BIT | |
1129 | (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], | |
1130 | regno))) | |
1131 | #endif | |
1132 | ) | |
17a0a76d | 1133 | { |
7a17c588 JW |
1134 | /* We explicitly evaluate the divide results into temporary |
1135 | variables so as to avoid excess precision problems that occur | |
1136 | on a i386-unknown-sysv4.2 (unixware) host. */ | |
1137 | ||
1138 | double tmp1 = ((double) local_reg_n_refs[regno] | |
1139 | / local_reg_live_length[regno]); | |
1140 | double tmp2 = ((double) allocno_n_refs[allocno] | |
1141 | / allocno_live_length[allocno]); | |
1142 | ||
1143 | if (tmp1 < tmp2) | |
1144 | { | |
1145 | /* Hard reg REGNO was used less in total by local regs | |
1146 | than it would be used by this one allocno! */ | |
1147 | int k; | |
1148 | for (k = 0; k < max_regno; k++) | |
1149 | if (reg_renumber[k] >= 0) | |
1150 | { | |
1151 | int r = reg_renumber[k]; | |
1152 | int endregno | |
1153 | = r + HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (k)); | |
34e56753 | 1154 | |
7a17c588 JW |
1155 | if (regno >= r && regno < endregno) |
1156 | reg_renumber[k] = -1; | |
1157 | } | |
17a0a76d | 1158 | |
7a17c588 JW |
1159 | best_reg = regno; |
1160 | break; | |
1161 | } | |
17a0a76d RK |
1162 | } |
1163 | } | |
1d56e983 RS |
1164 | } |
1165 | ||
38398762 RK |
1166 | /* Did we find a register? */ |
1167 | ||
1168 | if (best_reg >= 0) | |
1169 | { | |
1170 | register int lim, j; | |
1171 | HARD_REG_SET this_reg; | |
1172 | ||
1173 | /* Yes. Record it as the hard register of this pseudo-reg. */ | |
1174 | reg_renumber[allocno_reg[allocno]] = best_reg; | |
1175 | /* Also of any pseudo-regs that share with it. */ | |
1176 | if (reg_may_share[allocno_reg[allocno]]) | |
1177 | for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++) | |
1178 | if (reg_allocno[j] == allocno) | |
1179 | reg_renumber[j] = best_reg; | |
1180 | ||
1181 | /* Make a set of the hard regs being allocated. */ | |
1182 | CLEAR_HARD_REG_SET (this_reg); | |
1183 | lim = best_reg + HARD_REGNO_NREGS (best_reg, mode); | |
1184 | for (j = best_reg; j < lim; j++) | |
1185 | { | |
1186 | SET_HARD_REG_BIT (this_reg, j); | |
1187 | SET_HARD_REG_BIT (regs_used_so_far, j); | |
1d56e983 RS |
1188 | /* This is no longer a reg used just by local regs. */ |
1189 | local_reg_n_refs[j] = 0; | |
38398762 RK |
1190 | } |
1191 | /* For each other pseudo-reg conflicting with this one, | |
1192 | mark it as conflicting with the hard regs this one occupies. */ | |
1193 | lim = allocno; | |
1194 | for (j = 0; j < max_allocno; j++) | |
1195 | if (CONFLICTP (lim, j) || CONFLICTP (j, lim)) | |
1196 | { | |
1197 | IOR_HARD_REG_SET (hard_reg_conflicts[j], this_reg); | |
1198 | } | |
1199 | } | |
38398762 RK |
1200 | } |
1201 | \f | |
1202 | /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in. | |
1203 | Perhaps it had previously seemed not worth a hard reg, | |
1204 | or perhaps its old hard reg has been commandeered for reloads. | |
1205 | FORBIDDEN_REGS indicates certain hard regs that may not be used, even if | |
1206 | they do not appear to be allocated. | |
1207 | If FORBIDDEN_REGS is zero, no regs are forbidden. */ | |
1208 | ||
1209 | void | |
1210 | retry_global_alloc (regno, forbidden_regs) | |
1211 | int regno; | |
1212 | HARD_REG_SET forbidden_regs; | |
1213 | { | |
1214 | int allocno = reg_allocno[regno]; | |
1215 | if (allocno >= 0) | |
1216 | { | |
1217 | /* If we have more than one register class, | |
1218 | first try allocating in the class that is cheapest | |
1219 | for this pseudo-reg. If that fails, try any reg. */ | |
1220 | if (N_REG_CLASSES > 1) | |
1d56e983 | 1221 | find_reg (allocno, forbidden_regs, 0, 0, 1); |
38398762 | 1222 | if (reg_renumber[regno] < 0 |
b1ec3c92 | 1223 | && reg_alternate_class (regno) != NO_REGS) |
1d56e983 | 1224 | find_reg (allocno, forbidden_regs, 1, 0, 1); |
38398762 RK |
1225 | |
1226 | /* If we found a register, modify the RTL for the register to | |
1227 | show the hard register, and mark that register live. */ | |
1228 | if (reg_renumber[regno] >= 0) | |
1229 | { | |
1230 | REGNO (regno_reg_rtx[regno]) = reg_renumber[regno]; | |
1231 | mark_home_live (regno); | |
1232 | } | |
1233 | } | |
1234 | } | |
1235 | \f | |
1236 | /* Record a conflict between register REGNO | |
1237 | and everything currently live. | |
1238 | REGNO must not be a pseudo reg that was allocated | |
1239 | by local_alloc; such numbers must be translated through | |
1240 | reg_renumber before calling here. */ | |
1241 | ||
1242 | static void | |
1243 | record_one_conflict (regno) | |
1244 | int regno; | |
1245 | { | |
1246 | register int j; | |
1247 | ||
1248 | if (regno < FIRST_PSEUDO_REGISTER) | |
1249 | /* When a hard register becomes live, | |
1250 | record conflicts with live pseudo regs. */ | |
1251 | for (j = 0; j < max_allocno; j++) | |
1252 | { | |
1253 | if (ALLOCNO_LIVE_P (j)) | |
1254 | SET_HARD_REG_BIT (hard_reg_conflicts[j], regno); | |
1255 | } | |
1256 | else | |
1257 | /* When a pseudo-register becomes live, | |
1258 | record conflicts first with hard regs, | |
1259 | then with other pseudo regs. */ | |
1260 | { | |
1261 | register int ialloc = reg_allocno[regno]; | |
1262 | register int ialloc_prod = ialloc * allocno_row_words; | |
1263 | IOR_HARD_REG_SET (hard_reg_conflicts[ialloc], hard_regs_live); | |
1264 | for (j = allocno_row_words - 1; j >= 0; j--) | |
1265 | { | |
1266 | #if 0 | |
1267 | int k; | |
1268 | for (k = 0; k < n_no_conflict_pairs; k++) | |
1269 | if (! ((j == no_conflict_pairs[k].allocno1 | |
1270 | && ialloc == no_conflict_pairs[k].allocno2) | |
1271 | || | |
1272 | (j == no_conflict_pairs[k].allocno2 | |
1273 | && ialloc == no_conflict_pairs[k].allocno1))) | |
1274 | #endif /* 0 */ | |
1275 | conflicts[ialloc_prod + j] |= allocnos_live[j]; | |
1276 | } | |
1277 | } | |
1278 | } | |
1279 | ||
1280 | /* Record all allocnos currently live as conflicting | |
1281 | with each other and with all hard regs currently live. | |
1282 | ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that | |
1283 | are currently live. Their bits are also flagged in allocnos_live. */ | |
1284 | ||
1285 | static void | |
1286 | record_conflicts (allocno_vec, len) | |
1287 | register short *allocno_vec; | |
1288 | register int len; | |
1289 | { | |
1290 | register int allocno; | |
1291 | register int j; | |
1292 | register int ialloc_prod; | |
1293 | ||
1294 | while (--len >= 0) | |
1295 | { | |
1296 | allocno = allocno_vec[len]; | |
1297 | ialloc_prod = allocno * allocno_row_words; | |
1298 | IOR_HARD_REG_SET (hard_reg_conflicts[allocno], hard_regs_live); | |
1299 | for (j = allocno_row_words - 1; j >= 0; j--) | |
1300 | conflicts[ialloc_prod + j] |= allocnos_live[j]; | |
1301 | } | |
1302 | } | |
1303 | \f | |
1304 | /* Handle the case where REG is set by the insn being scanned, | |
1305 | during the forward scan to accumulate conflicts. | |
1306 | Store a 1 in regs_live or allocnos_live for this register, record how many | |
1307 | consecutive hardware registers it actually needs, | |
1308 | and record a conflict with all other registers already live. | |
1309 | ||
1310 | Note that even if REG does not remain alive after this insn, | |
1311 | we must mark it here as live, to ensure a conflict between | |
1312 | REG and any other regs set in this insn that really do live. | |
1313 | This is because those other regs could be considered after this. | |
1314 | ||
1315 | REG might actually be something other than a register; | |
1316 | if so, we do nothing. | |
1317 | ||
1318 | SETTER is 0 if this register was modified by an auto-increment (i.e., | |
1319 | a REG_INC note was found for it). | |
1320 | ||
1321 | CLOBBERs are processed here by calling mark_reg_clobber. */ | |
1322 | ||
1323 | static void | |
1324 | mark_reg_store (orig_reg, setter) | |
1325 | rtx orig_reg, setter; | |
1326 | { | |
1327 | register int regno; | |
1328 | register rtx reg = orig_reg; | |
1329 | ||
1330 | /* WORD is which word of a multi-register group is being stored. | |
1331 | For the case where the store is actually into a SUBREG of REG. | |
1332 | Except we don't use it; I believe the entire REG needs to be | |
1333 | made live. */ | |
1334 | int word = 0; | |
1335 | ||
1336 | if (GET_CODE (reg) == SUBREG) | |
1337 | { | |
1338 | word = SUBREG_WORD (reg); | |
1339 | reg = SUBREG_REG (reg); | |
1340 | } | |
1341 | ||
1342 | if (GET_CODE (reg) != REG) | |
1343 | return; | |
1344 | ||
1345 | if (setter && GET_CODE (setter) == CLOBBER) | |
1346 | { | |
1347 | /* A clobber of a register should be processed here too. */ | |
1348 | mark_reg_clobber (orig_reg, setter); | |
1349 | return; | |
1350 | } | |
1351 | ||
1352 | regs_set[n_regs_set++] = reg; | |
1353 | ||
1354 | if (setter) | |
1355 | set_preference (reg, SET_SRC (setter)); | |
1356 | ||
1357 | regno = REGNO (reg); | |
1358 | ||
1359 | if (reg_renumber[regno] >= 0) | |
1360 | regno = reg_renumber[regno] /* + word */; | |
1361 | ||
1362 | /* Either this is one of the max_allocno pseudo regs not allocated, | |
1363 | or it is or has a hardware reg. First handle the pseudo-regs. */ | |
1364 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1365 | { | |
1366 | if (reg_allocno[regno] >= 0) | |
1367 | { | |
1368 | SET_ALLOCNO_LIVE (reg_allocno[regno]); | |
1369 | record_one_conflict (regno); | |
1370 | } | |
1371 | } | |
1372 | /* Handle hardware regs (and pseudos allocated to hard regs). */ | |
1373 | else if (! fixed_regs[regno]) | |
1374 | { | |
1375 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1376 | while (regno < last) | |
1377 | { | |
1378 | record_one_conflict (regno); | |
1379 | SET_HARD_REG_BIT (hard_regs_live, regno); | |
1380 | regno++; | |
1381 | } | |
1382 | } | |
1383 | } | |
1384 | \f | |
1385 | /* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */ | |
1386 | ||
1387 | static void | |
1388 | mark_reg_clobber (reg, setter) | |
1389 | rtx reg, setter; | |
1390 | { | |
1391 | register int regno; | |
1392 | ||
1393 | /* WORD is which word of a multi-register group is being stored. | |
1394 | For the case where the store is actually into a SUBREG of REG. | |
1395 | Except we don't use it; I believe the entire REG needs to be | |
1396 | made live. */ | |
1397 | int word = 0; | |
1398 | ||
1399 | if (GET_CODE (setter) != CLOBBER) | |
1400 | return; | |
1401 | ||
1402 | if (GET_CODE (reg) == SUBREG) | |
1403 | { | |
1404 | word = SUBREG_WORD (reg); | |
1405 | reg = SUBREG_REG (reg); | |
1406 | } | |
1407 | ||
1408 | if (GET_CODE (reg) != REG) | |
1409 | return; | |
1410 | ||
1411 | regs_set[n_regs_set++] = reg; | |
1412 | ||
1413 | regno = REGNO (reg); | |
1414 | ||
1415 | if (reg_renumber[regno] >= 0) | |
1416 | regno = reg_renumber[regno] /* + word */; | |
1417 | ||
1418 | /* Either this is one of the max_allocno pseudo regs not allocated, | |
1419 | or it is or has a hardware reg. First handle the pseudo-regs. */ | |
1420 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1421 | { | |
1422 | if (reg_allocno[regno] >= 0) | |
1423 | { | |
1424 | SET_ALLOCNO_LIVE (reg_allocno[regno]); | |
1425 | record_one_conflict (regno); | |
1426 | } | |
1427 | } | |
1428 | /* Handle hardware regs (and pseudos allocated to hard regs). */ | |
1429 | else if (! fixed_regs[regno]) | |
1430 | { | |
1431 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1432 | while (regno < last) | |
1433 | { | |
1434 | record_one_conflict (regno); | |
1435 | SET_HARD_REG_BIT (hard_regs_live, regno); | |
1436 | regno++; | |
1437 | } | |
1438 | } | |
333e0f7d RS |
1439 | } |
1440 | ||
1441 | /* Record that REG has conflicts with all the regs currently live. | |
1442 | Do not mark REG itself as live. */ | |
1443 | ||
1444 | static void | |
1445 | mark_reg_conflicts (reg) | |
1446 | rtx reg; | |
1447 | { | |
1448 | register int regno; | |
1449 | ||
1450 | if (GET_CODE (reg) == SUBREG) | |
1451 | reg = SUBREG_REG (reg); | |
1452 | ||
1453 | if (GET_CODE (reg) != REG) | |
1454 | return; | |
1455 | ||
1456 | regno = REGNO (reg); | |
1457 | ||
1458 | if (reg_renumber[regno] >= 0) | |
1459 | regno = reg_renumber[regno]; | |
1460 | ||
1461 | /* Either this is one of the max_allocno pseudo regs not allocated, | |
1462 | or it is or has a hardware reg. First handle the pseudo-regs. */ | |
1463 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1464 | { | |
1465 | if (reg_allocno[regno] >= 0) | |
1466 | record_one_conflict (regno); | |
1467 | } | |
1468 | /* Handle hardware regs (and pseudos allocated to hard regs). */ | |
1469 | else if (! fixed_regs[regno]) | |
1470 | { | |
1471 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1472 | while (regno < last) | |
1473 | { | |
1474 | record_one_conflict (regno); | |
1475 | regno++; | |
1476 | } | |
1477 | } | |
38398762 RK |
1478 | } |
1479 | \f | |
1480 | /* Mark REG as being dead (following the insn being scanned now). | |
1481 | Store a 0 in regs_live or allocnos_live for this register. */ | |
1482 | ||
1483 | static void | |
1484 | mark_reg_death (reg) | |
1485 | rtx reg; | |
1486 | { | |
1487 | register int regno = REGNO (reg); | |
1488 | ||
1489 | /* For pseudo reg, see if it has been assigned a hardware reg. */ | |
1490 | if (reg_renumber[regno] >= 0) | |
1491 | regno = reg_renumber[regno]; | |
1492 | ||
1493 | /* Either this is one of the max_allocno pseudo regs not allocated, | |
1494 | or it is a hardware reg. First handle the pseudo-regs. */ | |
1495 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1496 | { | |
1497 | if (reg_allocno[regno] >= 0) | |
1498 | CLEAR_ALLOCNO_LIVE (reg_allocno[regno]); | |
1499 | } | |
1500 | /* Handle hardware regs (and pseudos allocated to hard regs). */ | |
1501 | else if (! fixed_regs[regno]) | |
1502 | { | |
1503 | /* Pseudo regs already assigned hardware regs are treated | |
1504 | almost the same as explicit hardware regs. */ | |
1505 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1506 | while (regno < last) | |
1507 | { | |
1508 | CLEAR_HARD_REG_BIT (hard_regs_live, regno); | |
1509 | regno++; | |
1510 | } | |
1511 | } | |
1512 | } | |
1513 | ||
1514 | /* Mark hard reg REGNO as currently live, assuming machine mode MODE | |
1515 | for the value stored in it. MODE determines how many consecutive | |
1516 | registers are actually in use. Do not record conflicts; | |
1517 | it is assumed that the caller will do that. */ | |
1518 | ||
1519 | static void | |
1520 | mark_reg_live_nc (regno, mode) | |
1521 | register int regno; | |
1522 | enum machine_mode mode; | |
1523 | { | |
1524 | register int last = regno + HARD_REGNO_NREGS (regno, mode); | |
1525 | while (regno < last) | |
1526 | { | |
1527 | SET_HARD_REG_BIT (hard_regs_live, regno); | |
1528 | regno++; | |
1529 | } | |
1530 | } | |
1531 | \f | |
1532 | /* Try to set a preference for an allocno to a hard register. | |
1533 | We are passed DEST and SRC which are the operands of a SET. It is known | |
1534 | that SRC is a register. If SRC or the first operand of SRC is a register, | |
1535 | try to set a preference. If one of the two is a hard register and the other | |
1536 | is a pseudo-register, mark the preference. | |
1537 | ||
6dc42e49 | 1538 | Note that we are not as aggressive as local-alloc in trying to tie a |
38398762 RK |
1539 | pseudo-register to a hard register. */ |
1540 | ||
1541 | static void | |
1542 | set_preference (dest, src) | |
1543 | rtx dest, src; | |
1544 | { | |
1545 | int src_regno, dest_regno; | |
1546 | /* Amount to add to the hard regno for SRC, or subtract from that for DEST, | |
1547 | to compensate for subregs in SRC or DEST. */ | |
1548 | int offset = 0; | |
1549 | int i; | |
1550 | int copy = 1; | |
1551 | ||
1552 | if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e') | |
1553 | src = XEXP (src, 0), copy = 0; | |
1554 | ||
1555 | /* Get the reg number for both SRC and DEST. | |
1556 | If neither is a reg, give up. */ | |
1557 | ||
1558 | if (GET_CODE (src) == REG) | |
1559 | src_regno = REGNO (src); | |
1560 | else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG) | |
1561 | { | |
1562 | src_regno = REGNO (SUBREG_REG (src)); | |
1563 | offset += SUBREG_WORD (src); | |
1564 | } | |
1565 | else | |
1566 | return; | |
1567 | ||
1568 | if (GET_CODE (dest) == REG) | |
1569 | dest_regno = REGNO (dest); | |
1570 | else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG) | |
1571 | { | |
1572 | dest_regno = REGNO (SUBREG_REG (dest)); | |
1573 | offset -= SUBREG_WORD (dest); | |
1574 | } | |
1575 | else | |
1576 | return; | |
1577 | ||
1578 | /* Convert either or both to hard reg numbers. */ | |
1579 | ||
1580 | if (reg_renumber[src_regno] >= 0) | |
1581 | src_regno = reg_renumber[src_regno]; | |
1582 | ||
1583 | if (reg_renumber[dest_regno] >= 0) | |
1584 | dest_regno = reg_renumber[dest_regno]; | |
1585 | ||
1586 | /* Now if one is a hard reg and the other is a global pseudo | |
1587 | then give the other a preference. */ | |
1588 | ||
1589 | if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER | |
1590 | && reg_allocno[src_regno] >= 0) | |
1591 | { | |
1592 | dest_regno -= offset; | |
1593 | if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER) | |
1594 | { | |
1595 | if (copy) | |
1596 | SET_REGBIT (hard_reg_copy_preferences, | |
1597 | reg_allocno[src_regno], dest_regno); | |
1598 | ||
1599 | SET_REGBIT (hard_reg_preferences, | |
1600 | reg_allocno[src_regno], dest_regno); | |
1601 | for (i = dest_regno; | |
1602 | i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest)); | |
1603 | i++) | |
1604 | SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i); | |
1605 | } | |
1606 | } | |
1607 | ||
1608 | if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER | |
1609 | && reg_allocno[dest_regno] >= 0) | |
1610 | { | |
1611 | src_regno += offset; | |
1612 | if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER) | |
1613 | { | |
1614 | if (copy) | |
1615 | SET_REGBIT (hard_reg_copy_preferences, | |
1616 | reg_allocno[dest_regno], src_regno); | |
1617 | ||
1618 | SET_REGBIT (hard_reg_preferences, | |
1619 | reg_allocno[dest_regno], src_regno); | |
1620 | for (i = src_regno; | |
1621 | i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src)); | |
1622 | i++) | |
1623 | SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i); | |
1624 | } | |
1625 | } | |
1626 | } | |
1627 | \f | |
1628 | /* Indicate that hard register number FROM was eliminated and replaced with | |
1629 | an offset from hard register number TO. The status of hard registers live | |
1630 | at the start of a basic block is updated by replacing a use of FROM with | |
1631 | a use of TO. */ | |
1632 | ||
1633 | void | |
1634 | mark_elimination (from, to) | |
1635 | int from, to; | |
1636 | { | |
1637 | int i; | |
1638 | ||
1639 | for (i = 0; i < n_basic_blocks; i++) | |
b1ec3c92 CH |
1640 | if ((basic_block_live_at_start[i][from / REGSET_ELT_BITS] |
1641 | & ((REGSET_ELT_TYPE) 1 << (from % REGSET_ELT_BITS))) != 0) | |
38398762 | 1642 | { |
b1ec3c92 CH |
1643 | basic_block_live_at_start[i][from / REGSET_ELT_BITS] |
1644 | &= ~ ((REGSET_ELT_TYPE) 1 << (from % REGSET_ELT_BITS)); | |
1645 | basic_block_live_at_start[i][to / REGSET_ELT_BITS] | |
1646 | |= ((REGSET_ELT_TYPE) 1 << (to % REGSET_ELT_BITS)); | |
38398762 RK |
1647 | } |
1648 | } | |
1649 | \f | |
1650 | /* Print debugging trace information if -greg switch is given, | |
1651 | showing the information on which the allocation decisions are based. */ | |
1652 | ||
1653 | static void | |
1654 | dump_conflicts (file) | |
1655 | FILE *file; | |
1656 | { | |
1657 | register int i; | |
1658 | register int has_preferences; | |
1659 | fprintf (file, ";; %d regs to allocate:", max_allocno); | |
1660 | for (i = 0; i < max_allocno; i++) | |
1661 | { | |
1662 | int j; | |
1663 | fprintf (file, " %d", allocno_reg[allocno_order[i]]); | |
1664 | for (j = 0; j < max_regno; j++) | |
1665 | if (reg_allocno[j] == allocno_order[i] | |
1666 | && j != allocno_reg[allocno_order[i]]) | |
1667 | fprintf (file, "+%d", j); | |
1668 | if (allocno_size[allocno_order[i]] != 1) | |
1669 | fprintf (file, " (%d)", allocno_size[allocno_order[i]]); | |
1670 | } | |
1671 | fprintf (file, "\n"); | |
1672 | ||
1673 | for (i = 0; i < max_allocno; i++) | |
1674 | { | |
1675 | register int j; | |
1676 | fprintf (file, ";; %d conflicts:", allocno_reg[i]); | |
1677 | for (j = 0; j < max_allocno; j++) | |
1678 | if (CONFLICTP (i, j) || CONFLICTP (j, i)) | |
1679 | fprintf (file, " %d", allocno_reg[j]); | |
1680 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1681 | if (TEST_HARD_REG_BIT (hard_reg_conflicts[i], j)) | |
1682 | fprintf (file, " %d", j); | |
1683 | fprintf (file, "\n"); | |
1684 | ||
1685 | has_preferences = 0; | |
1686 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1687 | if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j)) | |
1688 | has_preferences = 1; | |
1689 | ||
1690 | if (! has_preferences) | |
1691 | continue; | |
1692 | fprintf (file, ";; %d preferences:", allocno_reg[i]); | |
1693 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1694 | if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j)) | |
1695 | fprintf (file, " %d", j); | |
1696 | fprintf (file, "\n"); | |
1697 | } | |
1698 | fprintf (file, "\n"); | |
1699 | } | |
1700 | ||
1701 | void | |
1702 | dump_global_regs (file) | |
1703 | FILE *file; | |
1704 | { | |
1705 | register int i, j; | |
1706 | ||
1707 | fprintf (file, ";; Register dispositions:\n"); | |
1708 | for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++) | |
1709 | if (reg_renumber[i] >= 0) | |
1710 | { | |
1711 | fprintf (file, "%d in %d ", i, reg_renumber[i]); | |
1712 | if (++j % 6 == 0) | |
1713 | fprintf (file, "\n"); | |
1714 | } | |
1715 | ||
1716 | fprintf (file, "\n\n;; Hard regs used: "); | |
1717 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1718 | if (regs_ever_live[i]) | |
1719 | fprintf (file, " %d", i); | |
1720 | fprintf (file, "\n\n"); | |
1721 | } |