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38398762 1/* Allocate registers for pseudo-registers that span basic blocks.
d050d723
JL
2 Copyright (C) 1987, 1988, 1991, 1994, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
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4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
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19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
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21
22
38398762 23#include "config.h"
670ee920 24#include "system.h"
ccd043a9 25
f6781658
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26#include "machmode.h"
27#include "hard-reg-set.h"
38398762 28#include "rtl.h"
6baf1cc8 29#include "tm_p.h"
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30#include "flags.h"
31#include "basic-block.h"
38398762 32#include "regs.h"
49ad7cfa 33#include "function.h"
38398762 34#include "insn-config.h"
cad6f7d0 35#include "reload.h"
38398762 36#include "output.h"
2e107e9e 37#include "toplev.h"
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38
39/* This pass of the compiler performs global register allocation.
40 It assigns hard register numbers to all the pseudo registers
41 that were not handled in local_alloc. Assignments are recorded
42 in the vector reg_renumber, not by changing the rtl code.
43 (Such changes are made by final). The entry point is
44 the function global_alloc.
45
46 After allocation is complete, the reload pass is run as a subroutine
47 of this pass, so that when a pseudo reg loses its hard reg due to
48 spilling it is possible to make a second attempt to find a hard
49 reg for it. The reload pass is independent in other respects
50 and it is run even when stupid register allocation is in use.
51
a300b8d9
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52 1. Assign allocation-numbers (allocnos) to the pseudo-registers
53 still needing allocations and to the pseudo-registers currently
54 allocated by local-alloc which may be spilled by reload.
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55 Set up tables reg_allocno and allocno_reg to map
56 reg numbers to allocnos and vice versa.
57 max_allocno gets the number of allocnos in use.
58
59 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
60 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
61 for conflicts between allocnos and explicit hard register use
62 (which includes use of pseudo-registers allocated by local_alloc).
63
a300b8d9 64 3. For each basic block
38398762 65 walk forward through the block, recording which
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66 pseudo-registers and which hardware registers are live.
67 Build the conflict matrix between the pseudo-registers
68 and another of pseudo-registers versus hardware registers.
38398762 69 Also record the preferred hardware registers
a300b8d9 70 for each pseudo-register.
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71
72 4. Sort a table of the allocnos into order of
73 desirability of the variables.
74
75 5. Allocate the variables in that order; each if possible into
76 a preferred register, else into another register. */
77\f
a300b8d9 78/* Number of pseudo-registers which are candidates for allocation. */
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79
80static int max_allocno;
81
82/* Indexed by (pseudo) reg number, gives the allocno, or -1
a300b8d9 83 for pseudo registers which are not to be allocated. */
38398762 84
f15ebf65 85static int *reg_allocno;
38398762 86
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87struct allocno
88{
89 int reg;
90 /* Gives the number of consecutive hard registers needed by that
91 pseudo reg. */
92 int size;
93
94 /* Number of calls crossed by each allocno. */
95 int calls_crossed;
96
97 /* Number of refs (weighted) to each allocno. */
98 int n_refs;
99
100 /* Guess at live length of each allocno.
101 This is actually the max of the live lengths of the regs. */
102 int live_length;
103
104 /* Set of hard regs conflicting with allocno N. */
105
106 HARD_REG_SET hard_reg_conflicts;
107
108 /* Set of hard regs preferred by allocno N.
109 This is used to make allocnos go into regs that are copied to or from them,
110 when possible, to reduce register shuffling. */
111
112 HARD_REG_SET hard_reg_preferences;
113
114 /* Similar, but just counts register preferences made in simple copy
115 operations, rather than arithmetic. These are given priority because
116 we can always eliminate an insn by using these, but using a register
117 in the above list won't always eliminate an insn. */
38398762 118
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119 HARD_REG_SET hard_reg_copy_preferences;
120
121 /* Similar to hard_reg_preferences, but includes bits for subsequent
122 registers when an allocno is multi-word. The above variable is used for
123 allocation while this is used to build reg_someone_prefers, below. */
124
125 HARD_REG_SET hard_reg_full_preferences;
126
127 /* Set of hard registers that some later allocno has a preference for. */
128
129 HARD_REG_SET regs_someone_prefers;
130};
131
132static struct allocno *allocno;
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133
134/* A vector of the integers from 0 to max_allocno-1,
135 sorted in the order of first-to-be-allocated first. */
136
137static int *allocno_order;
138
38398762 139/* Indexed by (pseudo) reg number, gives the number of another
6dc42e49 140 lower-numbered pseudo reg which can share a hard reg with this pseudo
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141 *even if the two pseudos would otherwise appear to conflict*. */
142
143static int *reg_may_share;
144
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145/* Define the number of bits in each element of `conflicts' and what
146 type that element has. We use the largest integer format on the
147 host machine. */
148
149#define INT_BITS HOST_BITS_PER_WIDE_INT
150#define INT_TYPE HOST_WIDE_INT
151
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152/* max_allocno by max_allocno array of bits,
153 recording whether two allocno's conflict (can't go in the same
154 hardware register).
155
267cf808 156 `conflicts' is symmetric after the call to mirror_conflicts. */
38398762 157
b1ec3c92 158static INT_TYPE *conflicts;
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159
160/* Number of ints require to hold max_allocno bits.
161 This is the length of a row in `conflicts'. */
162
163static int allocno_row_words;
164
165/* Two macros to test or store 1 in an element of `conflicts'. */
166
167#define CONFLICTP(I, J) \
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168 (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \
169 & ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS)))
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170
171#define SET_CONFLICT(I, J) \
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172 (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \
173 |= ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS)))
174
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175/* For any allocno set in ALLOCNO_SET, set ALLOCNO to that allocno,
176 and execute CODE. */
177#define EXECUTE_IF_SET_IN_ALLOCNO_SET(ALLOCNO_SET, ALLOCNO, CODE) \
178do { \
179 int i_; \
180 int allocno_; \
5c0ecffe 181 INT_TYPE *p_ = (ALLOCNO_SET); \
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182 \
183 for (i_ = allocno_row_words - 1, allocno_ = 0; i_ >= 0; \
184 i_--, allocno_ += INT_BITS) \
185 { \
186 unsigned INT_TYPE word_ = (unsigned INT_TYPE) *p_++; \
187 \
188 for ((ALLOCNO) = allocno_; word_; word_ >>= 1, (ALLOCNO)++) \
189 { \
190 if (word_ & 1) \
36013ffc 191 {CODE;} \
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192 } \
193 } \
194} while (0)
195
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196/* This doesn't work for non-GNU C due to the way CODE is macro expanded. */
197#if 0
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198/* For any allocno that conflicts with IN_ALLOCNO, set OUT_ALLOCNO to
199 the conflicting allocno, and execute CODE. This macro assumes that
200 mirror_conflicts has been run. */
201#define EXECUTE_IF_CONFLICT(IN_ALLOCNO, OUT_ALLOCNO, CODE)\
202 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + (IN_ALLOCNO) * allocno_row_words,\
36013ffc 203 OUT_ALLOCNO, (CODE))
312618c7 204#endif
32c8d1bc 205
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206/* Set of hard regs currently live (during scan of all insns). */
207
208static HARD_REG_SET hard_regs_live;
209
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210/* Set of registers that global-alloc isn't supposed to use. */
211
212static HARD_REG_SET no_global_alloc_regs;
213
214/* Set of registers used so far. */
215
216static HARD_REG_SET regs_used_so_far;
217
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218/* Number of refs (weighted) to each hard reg, as used by local alloc.
219 It is zero for a reg that contains global pseudos or is explicitly used. */
220
221static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
222
223/* Guess at live length of each hard reg, as used by local alloc.
224 This is actually the sum of the live lengths of the specific regs. */
225
226static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
227
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228/* Test a bit in TABLE, a vector of HARD_REG_SETs,
229 for vector element I, and hard register number J. */
230
5c0ecffe 231#define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (allocno[I].TABLE, J)
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232
233/* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */
234
5c0ecffe 235#define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (allocno[I].TABLE, J)
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236
237/* Bit mask for allocnos live at current point in the scan. */
238
b1ec3c92 239static INT_TYPE *allocnos_live;
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240
241/* Test, set or clear bit number I in allocnos_live,
242 a bit vector indexed by allocno. */
243
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244#define ALLOCNO_LIVE_P(I) \
245 (allocnos_live[(unsigned)(I) / INT_BITS] \
246 & ((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS)))
38398762 247
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248#define SET_ALLOCNO_LIVE(I) \
249 (allocnos_live[(unsigned)(I) / INT_BITS] \
250 |= ((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS)))
38398762 251
32c8d1bc
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252#define CLEAR_ALLOCNO_LIVE(I) \
253 (allocnos_live[(unsigned)(I) / INT_BITS] \
254 &= ~((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS)))
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255
256/* This is turned off because it doesn't work right for DImode.
257 (And it is only used for DImode, so the other cases are worthless.)
258 The problem is that it isn't true that there is NO possibility of conflict;
259 only that there is no conflict if the two pseudos get the exact same regs.
260 If they were allocated with a partial overlap, there would be a conflict.
261 We can't safely turn off the conflict unless we have another way to
262 prevent the partial overlap.
263
264 Idea: change hard_reg_conflicts so that instead of recording which
265 hard regs the allocno may not overlap, it records where the allocno
266 may not start. Change both where it is used and where it is updated.
267 Then there is a way to record that (reg:DI 108) may start at 10
268 but not at 9 or 11. There is still the question of how to record
269 this semi-conflict between two pseudos. */
270#if 0
271/* Reg pairs for which conflict after the current insn
272 is inhibited by a REG_NO_CONFLICT note.
273 If the table gets full, we ignore any other notes--that is conservative. */
274#define NUM_NO_CONFLICT_PAIRS 4
275/* Number of pairs in use in this insn. */
276int n_no_conflict_pairs;
277static struct { int allocno1, allocno2;}
278 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
279#endif /* 0 */
280
281/* Record all regs that are set in any one insn.
282 Communication from mark_reg_{store,clobber} and global_conflicts. */
283
284static rtx *regs_set;
285static int n_regs_set;
286
daf55ac6 287/* All registers that can be eliminated. */
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288
289static HARD_REG_SET eliminable_regset;
290
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291static int allocno_compare PARAMS ((const PTR, const PTR));
292static void global_conflicts PARAMS ((void));
293static void mirror_conflicts PARAMS ((void));
294static void expand_preferences PARAMS ((void));
295static void prune_preferences PARAMS ((void));
296static void find_reg PARAMS ((int, HARD_REG_SET, int, int, int));
297static void record_one_conflict PARAMS ((int));
298static void record_conflicts PARAMS ((int *, int));
299static void mark_reg_store PARAMS ((rtx, rtx, void *));
300static void mark_reg_clobber PARAMS ((rtx, rtx, void *));
301static void mark_reg_conflicts PARAMS ((rtx));
302static void mark_reg_death PARAMS ((rtx));
303static void mark_reg_live_nc PARAMS ((int, enum machine_mode));
304static void set_preference PARAMS ((rtx, rtx));
305static void dump_conflicts PARAMS ((FILE *));
306static void reg_becomes_live PARAMS ((rtx, rtx, void *));
307static void reg_dies PARAMS ((int, enum machine_mode,
285f3cf0 308 struct insn_chain *));
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309\f
310/* Perform allocation of pseudo-registers not allocated by local_alloc.
311 FILE is a file to output debugging information on,
ab40ad2b 312 or zero if such output is not desired.
38398762 313
ab40ad2b
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314 Return value is nonzero if reload failed
315 and we must not do any more for this function. */
316
317int
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318global_alloc (file)
319 FILE *file;
320{
8c316ae2 321 int retval;
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322#ifdef ELIMINABLE_REGS
323 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
324#endif
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325 int need_fp
326 = (! flag_omit_frame_pointer
327#ifdef EXIT_IGNORE_STACK
328 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
329#endif
330 || FRAME_POINTER_REQUIRED);
331
f8344bea 332 register size_t i;
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333 rtx x;
334
335 max_allocno = 0;
336
337 /* A machine may have certain hard registers that
338 are safe to use only within a basic block. */
339
340 CLEAR_HARD_REG_SET (no_global_alloc_regs);
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341
342 /* Build the regset of all eliminable registers and show we can't use those
343 that we already know won't be eliminated. */
344#ifdef ELIMINABLE_REGS
345 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
346 {
347 SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
348
349 if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
daf55ac6 350 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp))
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351 SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from);
352 }
7b0957a7 353#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
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354 SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
355 if (need_fp)
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356 SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM);
357#endif
daf55ac6 358
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359#else
360 SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
daf55ac6 361 if (need_fp)
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362 SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM);
363#endif
364
365 /* Track which registers have already been used. Start with registers
366 explicitly in the rtl, then registers allocated by local register
b4b4db94 367 allocation. */
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368
369 CLEAR_HARD_REG_SET (regs_used_so_far);
b4b4db94
RS
370#ifdef LEAF_REGISTERS
371 /* If we are doing the leaf function optimization, and this is a leaf
372 function, it means that the registers that take work to save are those
373 that need a register window. So prefer the ones that can be used in
374 a leaf function. */
375 {
376 char *cheap_regs;
7d167afd 377 char *leaf_regs = LEAF_REGISTERS;
b4b4db94
RS
378
379 if (only_leaf_regs_used () && leaf_function_p ())
380 cheap_regs = leaf_regs;
381 else
382 cheap_regs = call_used_regs;
383 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
384 if (regs_ever_live[i] || cheap_regs[i])
385 SET_HARD_REG_BIT (regs_used_so_far, i);
386 }
387#else
388 /* We consider registers that do not have to be saved over calls as if
389 they were already used since there is no cost in using them. */
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390 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
391 if (regs_ever_live[i] || call_used_regs[i])
392 SET_HARD_REG_BIT (regs_used_so_far, i);
b4b4db94 393#endif
38398762 394
e51712db 395 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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396 if (reg_renumber[i] >= 0)
397 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
398
399 /* Establish mappings from register number to allocation number
400 and vice versa. In the process, count the allocnos. */
401
67289ea6 402 reg_allocno = (int *) xmalloc (max_regno * sizeof (int));
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403
404 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
405 reg_allocno[i] = -1;
406
407 /* Initialize the shared-hard-reg mapping
408 from the list of pairs that may share. */
67289ea6 409 reg_may_share = (int *) xcalloc (max_regno, sizeof (int));
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410 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
411 {
412 int r1 = REGNO (XEXP (x, 0));
413 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
414 if (r1 > r2)
415 reg_may_share[r1] = r2;
416 else
417 reg_may_share[r2] = r1;
418 }
419
e51712db 420 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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421 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
422 that we are supposed to refrain from putting in a hard reg.
423 -2 means do make an allocno but don't allocate it. */
a300b8d9 424 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
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425 /* Don't allocate pseudos that cross calls,
426 if this function receives a nonlocal goto. */
427 && (! current_function_has_nonlocal_label
b1f21e0a 428 || REG_N_CALLS_CROSSED (i) == 0))
38398762 429 {
a300b8d9 430 if (reg_renumber[i] < 0 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
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431 reg_allocno[i] = reg_allocno[reg_may_share[i]];
432 else
433 reg_allocno[i] = max_allocno++;
b1f21e0a 434 if (REG_LIVE_LENGTH (i) == 0)
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435 abort ();
436 }
437 else
438 reg_allocno[i] = -1;
439
5c0ecffe 440 allocno = (struct allocno *) xcalloc (max_allocno, sizeof (struct allocno));
38398762 441
e51712db 442 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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443 if (reg_allocno[i] >= 0)
444 {
5c0ecffe
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445 int num = reg_allocno[i];
446 allocno[num].reg = i;
447 allocno[num].size = PSEUDO_REGNO_SIZE (i);
448 allocno[num].calls_crossed += REG_N_CALLS_CROSSED (i);
449 allocno[num].n_refs += REG_N_REFS (i);
450 if (allocno[num].live_length < REG_LIVE_LENGTH (i))
451 allocno[num].live_length = REG_LIVE_LENGTH (i);
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452 }
453
1d56e983
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454 /* Calculate amount of usage of each hard reg by pseudos
455 allocated by local-alloc. This is to see if we want to
456 override it. */
4c9a05bc
RK
457 bzero ((char *) local_reg_live_length, sizeof local_reg_live_length);
458 bzero ((char *) local_reg_n_refs, sizeof local_reg_n_refs);
e51712db 459 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
a300b8d9 460 if (reg_renumber[i] >= 0)
1d56e983 461 {
34e56753
RS
462 int regno = reg_renumber[i];
463 int endregno = regno + HARD_REGNO_NREGS (regno, PSEUDO_REGNO_MODE (i));
464 int j;
465
466 for (j = regno; j < endregno; j++)
467 {
b1f21e0a
MM
468 local_reg_n_refs[j] += REG_N_REFS (i);
469 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
34e56753 470 }
1d56e983 471 }
34e56753 472
1d56e983
RS
473 /* We can't override local-alloc for a reg used not just by local-alloc. */
474 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
475 if (regs_ever_live[i])
476 local_reg_n_refs[i] = 0;
0dfa4517 477
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478 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
479
ba3b3878
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480 /* We used to use alloca here, but the size of what it would try to
481 allocate would occasionally cause it to exceed the stack limit and
482 cause unpredictable core dumps. Some examples were > 2Mb in size. */
3de90026
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483 conflicts = (INT_TYPE *) xcalloc (max_allocno * allocno_row_words,
484 sizeof (INT_TYPE));
38398762 485
67289ea6 486 allocnos_live = (INT_TYPE *) xmalloc (allocno_row_words * sizeof (INT_TYPE));
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487
488 /* If there is work to be done (at least one reg to allocate),
489 perform global conflict analysis and allocate the regs. */
490
491 if (max_allocno > 0)
492 {
493 /* Scan all the insns and compute the conflicts among allocnos
494 and between allocnos and hard regs. */
495
496 global_conflicts ();
497
267cf808
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498 mirror_conflicts ();
499
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500 /* Eliminate conflicts between pseudos and eliminable registers. If
501 the register is not eliminated, the pseudo won't really be able to
502 live in the eliminable register, so the conflict doesn't matter.
503 If we do eliminate the register, the conflict will no longer exist.
1d56e983
RS
504 So in either case, we can ignore the conflict. Likewise for
505 preferences. */
38398762 506
e51712db 507 for (i = 0; i < (size_t) max_allocno; i++)
1d56e983 508 {
5c0ecffe
JH
509 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_conflicts,
510 eliminable_regset);
511 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_copy_preferences,
512 eliminable_regset);
513 AND_COMPL_HARD_REG_SET (allocno[i].hard_reg_preferences,
1d56e983 514 eliminable_regset);
1d56e983 515 }
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516
517 /* Try to expand the preferences by merging them between allocnos. */
518
519 expand_preferences ();
520
521 /* Determine the order to allocate the remaining pseudo registers. */
522
67289ea6 523 allocno_order = (int *) xmalloc (max_allocno * sizeof (int));
e51712db 524 for (i = 0; i < (size_t) max_allocno; i++)
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525 allocno_order[i] = i;
526
527 /* Default the size to 1, since allocno_compare uses it to divide by.
528 Also convert allocno_live_length of zero to -1. A length of zero
529 can occur when all the registers for that allocno have reg_live_length
530 equal to -2. In this case, we want to make an allocno, but not
531 allocate it. So avoid the divide-by-zero and set it to a low
532 priority. */
533
e51712db 534 for (i = 0; i < (size_t) max_allocno; i++)
38398762 535 {
5c0ecffe
JH
536 if (allocno[i].size == 0)
537 allocno[i].size = 1;
538 if (allocno[i].live_length == 0)
539 allocno[i].live_length = -1;
38398762
RK
540 }
541
542 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
543
544 prune_preferences ();
545
546 if (file)
547 dump_conflicts (file);
548
549 /* Try allocating them, one by one, in that order,
550 except for parameters marked with reg_live_length[regno] == -2. */
551
e51712db 552 for (i = 0; i < (size_t) max_allocno; i++)
5c0ecffe
JH
553 if (reg_renumber[allocno[allocno_order[i]].reg] < 0
554 && REG_LIVE_LENGTH (allocno[allocno_order[i]].reg) >= 0)
38398762
RK
555 {
556 /* If we have more than one register class,
557 first try allocating in the class that is cheapest
558 for this pseudo-reg. If that fails, try any reg. */
559 if (N_REG_CLASSES > 1)
560 {
ea8693a4 561 find_reg (allocno_order[i], 0, 0, 0, 0);
5c0ecffe 562 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
38398762
RK
563 continue;
564 }
5c0ecffe 565 if (reg_alternate_class (allocno[allocno_order[i]].reg) != NO_REGS)
ea8693a4 566 find_reg (allocno_order[i], 0, 1, 0, 0);
38398762 567 }
67289ea6
MM
568
569 free (allocno_order);
38398762
RK
570 }
571
572 /* Do the reloads now while the allocno data still exist, so that we can
573 try to assign new hard regs to any pseudo regs that are spilled. */
574
7e860cf7
RS
575#if 0 /* We need to eliminate regs even if there is no rtl code,
576 for the sake of debugging information. */
38398762 577 if (n_basic_blocks > 0)
7e860cf7 578#endif
cad6f7d0 579 {
108c535a 580 build_insn_chain (get_insns ());
cad6f7d0
BS
581 retval = reload (get_insns (), 1, file);
582 }
8c316ae2 583
67289ea6
MM
584 /* Clean up. */
585 free (reg_allocno);
586 free (reg_may_share);
5c0ecffe 587 free (allocno);
8c316ae2 588 free (conflicts);
67289ea6
MM
589 free (allocnos_live);
590
8c316ae2 591 return retval;
38398762
RK
592}
593
594/* Sort predicate for ordering the allocnos.
595 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
596
597static int
daa6f17d 598allocno_compare (v1p, v2p)
e1b6684c
KG
599 const PTR v1p;
600 const PTR v2p;
38398762 601{
ec0ce6e2 602 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
38398762
RK
603 /* Note that the quotient will never be bigger than
604 the value of floor_log2 times the maximum number of
605 times a register can occur in one insn (surely less than 100).
606 Multiplying this by 10000 can't overflow. */
607 register int pri1
5c0ecffe
JH
608 = (((double) (floor_log2 (allocno[v1].n_refs) * allocno[v1].n_refs)
609 / allocno[v1].live_length)
610 * 10000 * allocno[v1].size);
38398762 611 register int pri2
5c0ecffe
JH
612 = (((double) (floor_log2 (allocno[v2].n_refs) * allocno[v2].n_refs)
613 / allocno[v2].live_length)
614 * 10000 * allocno[v2].size);
38398762
RK
615 if (pri2 - pri1)
616 return pri2 - pri1;
617
618 /* If regs are equally good, sort by allocno,
619 so that the results of qsort leave nothing to chance. */
daa6f17d 620 return v1 - v2;
38398762
RK
621}
622\f
623/* Scan the rtl code and record all conflicts and register preferences in the
624 conflict matrices and preference tables. */
625
626static void
627global_conflicts ()
628{
629 register int b, i;
630 register rtx insn;
8d4c79be 631 int *block_start_allocnos;
38398762
RK
632
633 /* Make a vector that mark_reg_{store,clobber} will store in. */
67289ea6 634 regs_set = (rtx *) xmalloc (max_parallel * sizeof (rtx) * 2);
38398762 635
67289ea6 636 block_start_allocnos = (int *) xmalloc (max_allocno * sizeof (int));
38398762
RK
637
638 for (b = 0; b < n_basic_blocks; b++)
639 {
4c9a05bc 640 bzero ((char *) allocnos_live, allocno_row_words * sizeof (INT_TYPE));
38398762
RK
641
642 /* Initialize table of registers currently live
643 to the state at the beginning of this basic block.
bdc24974
JL
644 This also marks the conflicts among hard registers
645 and any allocnos that are live.
38398762
RK
646
647 For pseudo-regs, there is only one bit for each one
648 no matter how many hard regs it occupies.
649 This is ok; we know the size from PSEUDO_REGNO_SIZE.
650 For explicit hard regs, we cannot know the size that way
651 since one hard reg can be used with various sizes.
652 Therefore, we must require that all the hard regs
653 implicitly live as part of a multi-word hard reg
654 are explicitly marked in basic_block_live_at_start. */
655
656 {
e881bb1b 657 register regset old = BASIC_BLOCK (b)->global_live_at_start;
38398762
RK
658 int ax = 0;
659
916b1701 660 REG_SET_TO_HARD_REG_SET (hard_regs_live, old);
1313ec9d 661 EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i,
916b1701
MM
662 {
663 register int a = reg_allocno[i];
664 if (a >= 0)
665 {
666 SET_ALLOCNO_LIVE (a);
667 block_start_allocnos[ax++] = a;
668 }
669 else if ((a = reg_renumber[i]) >= 0)
1313ec9d
RK
670 mark_reg_live_nc
671 (a, PSEUDO_REGNO_MODE (i));
916b1701 672 });
38398762 673
bdc24974
JL
674 /* Record that each allocno now live conflicts with each hard reg
675 now live.
38398762 676
bdc24974
JL
677 It is not necessary to mark any conflicts between pseudos as
678 this point, even for pseudos which are live at the start of
679 the basic block.
680
681 Given two pseudos X and Y and any point in the CFG P.
682
683 On any path to point P where X and Y are live one of the
684 following conditions must be true:
685
686 1. X is live at some instruction on the path that
687 evaluates Y.
688
689 2. Y is live at some instruction on the path that
690 evaluates X.
691
692 3. Either X or Y is not evaluted on the path to P
693 (ie it is used uninitialized) and thus the
694 conflict can be ignored.
695
696 In cases #1 and #2 the conflict will be recorded when we
697 scan the instruction that makes either X or Y become live. */
38398762 698 record_conflicts (block_start_allocnos, ax);
4d1d8045
BS
699
700#ifdef STACK_REGS
e881bb1b
RH
701 {
702 /* Pseudos can't go in stack regs at the start of a basic block
a05924f9 703 that is reached by an abnormal edge. */
e881bb1b
RH
704
705 edge e;
706 for (e = BASIC_BLOCK (b)->pred; e ; e = e->pred_next)
707 if (e->flags & EDGE_ABNORMAL)
708 break;
e881bb1b
RH
709 if (e != NULL)
710 for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++)
711 record_one_conflict (ax);
712 }
4d1d8045 713#endif
38398762
RK
714 }
715
3b413743 716 insn = BLOCK_HEAD (b);
38398762
RK
717
718 /* Scan the code of this basic block, noting which allocnos
719 and hard regs are born or die. When one is born,
720 record a conflict with all others currently live. */
721
722 while (1)
723 {
724 register RTX_CODE code = GET_CODE (insn);
725 register rtx link;
726
727 /* Make regs_set an empty set. */
728
729 n_regs_set = 0;
730
731 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
732 {
38398762
RK
733
734#if 0
2049526b 735 int i = 0;
38398762
RK
736 for (link = REG_NOTES (insn);
737 link && i < NUM_NO_CONFLICT_PAIRS;
738 link = XEXP (link, 1))
739 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
740 {
741 no_conflict_pairs[i].allocno1
742 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
743 no_conflict_pairs[i].allocno2
744 = reg_allocno[REGNO (XEXP (link, 0))];
745 i++;
746 }
747#endif /* 0 */
748
749 /* Mark any registers clobbered by INSN as live,
750 so they conflict with the inputs. */
751
84832317 752 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
38398762
RK
753
754 /* Mark any registers dead after INSN as dead now. */
755
756 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
757 if (REG_NOTE_KIND (link) == REG_DEAD)
758 mark_reg_death (XEXP (link, 0));
759
760 /* Mark any registers set in INSN as live,
761 and mark them as conflicting with all other live regs.
762 Clobbers are processed again, so they conflict with
763 the registers that are set. */
764
84832317 765 note_stores (PATTERN (insn), mark_reg_store, NULL);
38398762
RK
766
767#ifdef AUTO_INC_DEC
768 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
769 if (REG_NOTE_KIND (link) == REG_INC)
84832317 770 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
38398762
RK
771#endif
772
333e0f7d
RS
773 /* If INSN has multiple outputs, then any reg that dies here
774 and is used inside of an output
941c63ac
JL
775 must conflict with the other outputs.
776
777 It is unsafe to use !single_set here since it will ignore an
778 unused output. Just because an output is unused does not mean
779 the compiler can assume the side effect will not occur.
780 Consider if REG appears in the address of an output and we
781 reload the output. If we allocate REG to the same hard
782 register as an unused output we could set the hard register
783 before the output reload insn. */
784 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
333e0f7d
RS
785 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
786 if (REG_NOTE_KIND (link) == REG_DEAD)
787 {
788 int used_in_output = 0;
789 int i;
790 rtx reg = XEXP (link, 0);
791
792 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
793 {
794 rtx set = XVECEXP (PATTERN (insn), 0, i);
795 if (GET_CODE (set) == SET
796 && GET_CODE (SET_DEST (set)) != REG
797 && !rtx_equal_p (reg, SET_DEST (set))
798 && reg_overlap_mentioned_p (reg, SET_DEST (set)))
799 used_in_output = 1;
800 }
801 if (used_in_output)
802 mark_reg_conflicts (reg);
803 }
804
38398762
RK
805 /* Mark any registers set in INSN and then never used. */
806
807 while (n_regs_set > 0)
808 if (find_regno_note (insn, REG_UNUSED,
809 REGNO (regs_set[--n_regs_set])))
810 mark_reg_death (regs_set[n_regs_set]);
811 }
812
3b413743 813 if (insn == BLOCK_END (b))
38398762
RK
814 break;
815 insn = NEXT_INSN (insn);
816 }
817 }
67289ea6
MM
818
819 /* Clean up. */
820 free (block_start_allocnos);
821 free (regs_set);
38398762
RK
822}
823/* Expand the preference information by looking for cases where one allocno
824 dies in an insn that sets an allocno. If those two allocnos don't conflict,
825 merge any preferences between those allocnos. */
826
827static void
828expand_preferences ()
829{
830 rtx insn;
831 rtx link;
832 rtx set;
833
834 /* We only try to handle the most common cases here. Most of the cases
835 where this wins are reg-reg copies. */
836
837 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
838 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
839 && (set = single_set (insn)) != 0
840 && GET_CODE (SET_DEST (set)) == REG
841 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
842 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
843 if (REG_NOTE_KIND (link) == REG_DEAD
844 && GET_CODE (XEXP (link, 0)) == REG
845 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
846 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
267cf808 847 reg_allocno[REGNO (XEXP (link, 0))]))
38398762
RK
848 {
849 int a1 = reg_allocno[REGNO (SET_DEST (set))];
850 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
851
852 if (XEXP (link, 0) == SET_SRC (set))
853 {
5c0ecffe
JH
854 IOR_HARD_REG_SET (allocno[a1].hard_reg_copy_preferences,
855 allocno[a2].hard_reg_copy_preferences);
856 IOR_HARD_REG_SET (allocno[a2].hard_reg_copy_preferences,
857 allocno[a1].hard_reg_copy_preferences);
38398762
RK
858 }
859
5c0ecffe
JH
860 IOR_HARD_REG_SET (allocno[a1].hard_reg_preferences,
861 allocno[a2].hard_reg_preferences);
862 IOR_HARD_REG_SET (allocno[a2].hard_reg_preferences,
863 allocno[a1].hard_reg_preferences);
864 IOR_HARD_REG_SET (allocno[a1].hard_reg_full_preferences,
865 allocno[a2].hard_reg_full_preferences);
866 IOR_HARD_REG_SET (allocno[a2].hard_reg_full_preferences,
867 allocno[a1].hard_reg_full_preferences);
38398762
RK
868 }
869}
870\f
871/* Prune the preferences for global registers to exclude registers that cannot
872 be used.
873
874 Compute `regs_someone_prefers', which is a bitmask of the hard registers
875 that are preferred by conflicting registers of lower priority. If possible,
876 we will avoid using these registers. */
877
878static void
879prune_preferences ()
880{
32c8d1bc 881 int i;
5c0ecffe 882 int num;
267cf808 883 int *allocno_to_order = (int *) xmalloc (max_allocno * sizeof (int));
38398762
RK
884
885 /* Scan least most important to most important.
886 For each allocno, remove from preferences registers that cannot be used,
887 either because of conflicts or register type. Then compute all registers
d45cf215 888 preferred by each lower-priority register that conflicts. */
38398762
RK
889
890 for (i = max_allocno - 1; i >= 0; i--)
891 {
267cf808 892 HARD_REG_SET temp;
38398762 893
5c0ecffe
JH
894 num = allocno_order[i];
895 allocno_to_order[num] = i;
896 COPY_HARD_REG_SET (temp, allocno[num].hard_reg_conflicts);
38398762 897
5c0ecffe 898 if (allocno[num].calls_crossed == 0)
38398762
RK
899 IOR_HARD_REG_SET (temp, fixed_reg_set);
900 else
901 IOR_HARD_REG_SET (temp, call_used_reg_set);
902
903 IOR_COMPL_HARD_REG_SET
904 (temp,
5c0ecffe 905 reg_class_contents[(int) reg_preferred_class (allocno[num].reg)]);
38398762 906
5c0ecffe
JH
907 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, temp);
908 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, temp);
909 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_full_preferences, temp);
267cf808 910 }
38398762 911
267cf808
JL
912 for (i = max_allocno - 1; i >= 0; i--)
913 {
38398762
RK
914 /* Merge in the preferences of lower-priority registers (they have
915 already been pruned). If we also prefer some of those registers,
916 don't exclude them unless we are of a smaller size (in which case
917 we want to give the lower-priority allocno the first chance for
918 these registers). */
267cf808 919 HARD_REG_SET temp, temp2;
32c8d1bc 920 int allocno2;
267cf808 921
5c0ecffe 922 num = allocno_order[i];
267cf808 923
ea1637e9
R
924 CLEAR_HARD_REG_SET (temp);
925 CLEAR_HARD_REG_SET (temp2);
267cf808 926
5c0ecffe 927 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + num * allocno_row_words,
312618c7 928 allocno2,
267cf808 929 {
32c8d1bc 930 if (allocno_to_order[allocno2] > i)
267cf808 931 {
5c0ecffe
JH
932 if (allocno[allocno2].size <= allocno[num].size)
933 IOR_HARD_REG_SET (temp,
934 allocno[allocno2].hard_reg_full_preferences);
32c8d1bc 935 else
5c0ecffe
JH
936 IOR_HARD_REG_SET (temp2,
937 allocno[allocno2].hard_reg_full_preferences);
267cf808 938 }
32c8d1bc 939 });
267cf808 940
5c0ecffe 941 AND_COMPL_HARD_REG_SET (temp, allocno[num].hard_reg_full_preferences);
ea1637e9 942 IOR_HARD_REG_SET (temp, temp2);
5c0ecffe 943 COPY_HARD_REG_SET (allocno[num].regs_someone_prefers, temp);
38398762 944 }
267cf808 945 free (allocno_to_order);
38398762
RK
946}
947\f
5c0ecffe 948/* Assign a hard register to allocno NUM; look for one that is the beginning
38398762
RK
949 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
950 The registers marked in PREFREGS are tried first.
951
952 LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot
953 be used for this allocation.
954
b1ec3c92
CH
955 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
956 Otherwise ignore that preferred class and use the alternate class.
38398762
RK
957
958 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
959 will have to be saved and restored at calls.
960
1d56e983
RS
961 RETRYING is nonzero if this is called from retry_global_alloc.
962
38398762
RK
963 If we find one, record it in reg_renumber.
964 If not, do nothing. */
965
966static void
5c0ecffe
JH
967find_reg (num, losers, alt_regs_p, accept_call_clobbered, retrying)
968 int num;
38398762 969 HARD_REG_SET losers;
b1ec3c92 970 int alt_regs_p;
38398762 971 int accept_call_clobbered;
1d56e983 972 int retrying;
38398762
RK
973{
974 register int i, best_reg, pass;
975#ifdef HARD_REG_SET
976 register /* Declare it register if it's a scalar. */
977#endif
1d56e983 978 HARD_REG_SET used, used1, used2;
38398762 979
b1ec3c92 980 enum reg_class class = (alt_regs_p
5c0ecffe
JH
981 ? reg_alternate_class (allocno[num].reg)
982 : reg_preferred_class (allocno[num].reg));
983 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno[num].reg);
38398762
RK
984
985 if (accept_call_clobbered)
986 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
5c0ecffe 987 else if (allocno[num].calls_crossed == 0)
38398762
RK
988 COPY_HARD_REG_SET (used1, fixed_reg_set);
989 else
990 COPY_HARD_REG_SET (used1, call_used_reg_set);
991
992 /* Some registers should not be allocated in global-alloc. */
993 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
994 if (losers)
995 IOR_HARD_REG_SET (used1, losers);
996
997 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1d56e983
RS
998 COPY_HARD_REG_SET (used2, used1);
999
5c0ecffe 1000 IOR_HARD_REG_SET (used1, allocno[num].hard_reg_conflicts);
38398762 1001
d546b10a 1002#ifdef CLASS_CANNOT_CHANGE_SIZE
5c0ecffe 1003 if (REG_CHANGES_SIZE (allocno[num].reg))
d546b10a
RK
1004 IOR_HARD_REG_SET (used1,
1005 reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
1006#endif
1007
38398762 1008 /* Try each hard reg to see if it fits. Do this in two passes.
d45cf215 1009 In the first pass, skip registers that are preferred by some other pseudo
38398762
RK
1010 to give it a better chance of getting one of those registers. Only if
1011 we can't get a register when excluding those do we take one of them.
1012 However, we never allocate a register for the first time in pass 0. */
1013
1014 COPY_HARD_REG_SET (used, used1);
1015 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
5c0ecffe 1016 IOR_HARD_REG_SET (used, allocno[num].regs_someone_prefers);
38398762
RK
1017
1018 best_reg = -1;
1019 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1020 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1021 pass++)
1022 {
1023 if (pass == 1)
1024 COPY_HARD_REG_SET (used, used1);
1025 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1026 {
1027#ifdef REG_ALLOC_ORDER
1028 int regno = reg_alloc_order[i];
1029#else
1030 int regno = i;
1031#endif
1032 if (! TEST_HARD_REG_BIT (used, regno)
1e326708 1033 && HARD_REGNO_MODE_OK (regno, mode)
5c0ecffe 1034 && (allocno[num].calls_crossed == 0
1e326708
MH
1035 || accept_call_clobbered
1036 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
38398762
RK
1037 {
1038 register int j;
1039 register int lim = regno + HARD_REGNO_NREGS (regno, mode);
1040 for (j = regno + 1;
1041 (j < lim
1042 && ! TEST_HARD_REG_BIT (used, j));
1043 j++);
1044 if (j == lim)
1045 {
1046 best_reg = regno;
1047 break;
1048 }
1049#ifndef REG_ALLOC_ORDER
1050 i = j; /* Skip starting points we know will lose */
1051#endif
1052 }
1053 }
1054 }
1055
1056 /* See if there is a preferred register with the same class as the register
1057 we allocated above. Making this restriction prevents register
1058 preferencing from creating worse register allocation.
1059
1060 Remove from the preferred registers and conflicting registers. Note that
1061 additional conflicts may have been added after `prune_preferences' was
1062 called.
1063
1064 First do this for those register with copy preferences, then all
1065 preferred registers. */
1066
5c0ecffe
JH
1067 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_copy_preferences, used);
1068 GO_IF_HARD_REG_SUBSET (allocno[num].hard_reg_copy_preferences,
38398762
RK
1069 reg_class_contents[(int) NO_REGS], no_copy_prefs);
1070
1071 if (best_reg >= 0)
1072 {
1073 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5c0ecffe 1074 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_copy_preferences, i)
38398762
RK
1075 && HARD_REGNO_MODE_OK (i, mode)
1076 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1077 || reg_class_subset_p (REGNO_REG_CLASS (i),
1078 REGNO_REG_CLASS (best_reg))
1079 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1080 REGNO_REG_CLASS (i))))
1081 {
1082 register int j;
1083 register int lim = i + HARD_REGNO_NREGS (i, mode);
1084 for (j = i + 1;
1085 (j < lim
1086 && ! TEST_HARD_REG_BIT (used, j)
1087 && (REGNO_REG_CLASS (j)
1088 == REGNO_REG_CLASS (best_reg + (j - i))
1089 || reg_class_subset_p (REGNO_REG_CLASS (j),
1090 REGNO_REG_CLASS (best_reg + (j - i)))
1091 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1092 REGNO_REG_CLASS (j))));
1093 j++);
1094 if (j == lim)
1095 {
1096 best_reg = i;
1097 goto no_prefs;
1098 }
1099 }
1100 }
1101 no_copy_prefs:
1102
5c0ecffe
JH
1103 AND_COMPL_HARD_REG_SET (allocno[num].hard_reg_preferences, used);
1104 GO_IF_HARD_REG_SUBSET (allocno[num].hard_reg_preferences,
38398762
RK
1105 reg_class_contents[(int) NO_REGS], no_prefs);
1106
1107 if (best_reg >= 0)
1108 {
1109 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5c0ecffe 1110 if (TEST_HARD_REG_BIT (allocno[num].hard_reg_preferences, i)
38398762
RK
1111 && HARD_REGNO_MODE_OK (i, mode)
1112 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1113 || reg_class_subset_p (REGNO_REG_CLASS (i),
1114 REGNO_REG_CLASS (best_reg))
1115 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1116 REGNO_REG_CLASS (i))))
1117 {
1118 register int j;
1119 register int lim = i + HARD_REGNO_NREGS (i, mode);
1120 for (j = i + 1;
1121 (j < lim
1122 && ! TEST_HARD_REG_BIT (used, j)
1123 && (REGNO_REG_CLASS (j)
1124 == REGNO_REG_CLASS (best_reg + (j - i))
1125 || reg_class_subset_p (REGNO_REG_CLASS (j),
1126 REGNO_REG_CLASS (best_reg + (j - i)))
1127 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1128 REGNO_REG_CLASS (j))));
1129 j++);
1130 if (j == lim)
1131 {
1132 best_reg = i;
1133 break;
1134 }
1135 }
1136 }
1137 no_prefs:
1138
cfcf04a6
RK
1139 /* If we haven't succeeded yet, try with caller-saves.
1140 We need not check to see if the current function has nonlocal
1141 labels because we don't put any pseudos that are live over calls in
1142 registers in that case. */
1143
1d56e983
RS
1144 if (flag_caller_saves && best_reg < 0)
1145 {
1146 /* Did not find a register. If it would be profitable to
1147 allocate a call-clobbered register and save and restore it
1148 around calls, do that. */
1149 if (! accept_call_clobbered
5c0ecffe
JH
1150 && allocno[num].calls_crossed != 0
1151 && CALLER_SAVE_PROFITABLE (allocno[num].n_refs,
1152 allocno[num].calls_crossed))
1d56e983 1153 {
6cad67d2
JL
1154 HARD_REG_SET new_losers;
1155 if (! losers)
1156 CLEAR_HARD_REG_SET (new_losers);
1157 else
1158 COPY_HARD_REG_SET (new_losers, losers);
1159
1160 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
5c0ecffe
JH
1161 find_reg (num, new_losers, alt_regs_p, 1, retrying);
1162 if (reg_renumber[allocno[num].reg] >= 0)
1d56e983
RS
1163 {
1164 caller_save_needed = 1;
1165 return;
1166 }
1167 }
1168 }
1169
1170 /* If we haven't succeeded yet,
1171 see if some hard reg that conflicts with us
1172 was utilized poorly by local-alloc.
1173 If so, kick out the regs that were put there by local-alloc
1174 so we can use it instead. */
1175 if (best_reg < 0 && !retrying
1176 /* Let's not bother with multi-reg allocnos. */
5c0ecffe 1177 && allocno[num].size == 1)
1d56e983
RS
1178 {
1179 /* Count from the end, to find the least-used ones first. */
1180 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
17a0a76d
RK
1181 {
1182#ifdef REG_ALLOC_ORDER
1183 int regno = reg_alloc_order[i];
1184#else
1185 int regno = i;
1186#endif
34e56753 1187
17a0a76d
RK
1188 if (local_reg_n_refs[regno] != 0
1189 /* Don't use a reg no good for this pseudo. */
1190 && ! TEST_HARD_REG_BIT (used2, regno)
d546b10a
RK
1191 && HARD_REGNO_MODE_OK (regno, mode)
1192#ifdef CLASS_CANNOT_CHANGE_SIZE
5c0ecffe 1193 && ! (REG_CHANGES_SIZE (allocno[num].reg)
d546b10a
RK
1194 && (TEST_HARD_REG_BIT
1195 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1196 regno)))
1197#endif
1198 )
17a0a76d 1199 {
7a17c588
JW
1200 /* We explicitly evaluate the divide results into temporary
1201 variables so as to avoid excess precision problems that occur
1202 on a i386-unknown-sysv4.2 (unixware) host. */
1203
1204 double tmp1 = ((double) local_reg_n_refs[regno]
1205 / local_reg_live_length[regno]);
5c0ecffe
JH
1206 double tmp2 = ((double) allocno[num].n_refs
1207 / allocno[num].live_length);
7a17c588
JW
1208
1209 if (tmp1 < tmp2)
1210 {
1211 /* Hard reg REGNO was used less in total by local regs
1212 than it would be used by this one allocno! */
1213 int k;
1214 for (k = 0; k < max_regno; k++)
1215 if (reg_renumber[k] >= 0)
1216 {
1217 int r = reg_renumber[k];
1218 int endregno
1219 = r + HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (k));
34e56753 1220
7a17c588
JW
1221 if (regno >= r && regno < endregno)
1222 reg_renumber[k] = -1;
1223 }
17a0a76d 1224
7a17c588
JW
1225 best_reg = regno;
1226 break;
1227 }
17a0a76d
RK
1228 }
1229 }
1d56e983
RS
1230 }
1231
38398762
RK
1232 /* Did we find a register? */
1233
1234 if (best_reg >= 0)
1235 {
1236 register int lim, j;
1237 HARD_REG_SET this_reg;
1238
1239 /* Yes. Record it as the hard register of this pseudo-reg. */
5c0ecffe 1240 reg_renumber[allocno[num].reg] = best_reg;
38398762 1241 /* Also of any pseudo-regs that share with it. */
5c0ecffe 1242 if (reg_may_share[allocno[num].reg])
38398762 1243 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
5c0ecffe 1244 if (reg_allocno[j] == num)
38398762
RK
1245 reg_renumber[j] = best_reg;
1246
1247 /* Make a set of the hard regs being allocated. */
1248 CLEAR_HARD_REG_SET (this_reg);
1249 lim = best_reg + HARD_REGNO_NREGS (best_reg, mode);
1250 for (j = best_reg; j < lim; j++)
1251 {
1252 SET_HARD_REG_BIT (this_reg, j);
1253 SET_HARD_REG_BIT (regs_used_so_far, j);
1d56e983
RS
1254 /* This is no longer a reg used just by local regs. */
1255 local_reg_n_refs[j] = 0;
38398762
RK
1256 }
1257 /* For each other pseudo-reg conflicting with this one,
1258 mark it as conflicting with the hard regs this one occupies. */
5c0ecffe 1259 lim = num;
312618c7 1260 EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + lim * allocno_row_words, j,
32c8d1bc 1261 {
5c0ecffe 1262 IOR_HARD_REG_SET (allocno[j].hard_reg_conflicts, this_reg);
32c8d1bc 1263 });
38398762 1264 }
38398762
RK
1265}
1266\f
1267/* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1268 Perhaps it had previously seemed not worth a hard reg,
1269 or perhaps its old hard reg has been commandeered for reloads.
1270 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1271 they do not appear to be allocated.
1272 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1273
1274void
1275retry_global_alloc (regno, forbidden_regs)
1276 int regno;
1277 HARD_REG_SET forbidden_regs;
1278{
1279 int allocno = reg_allocno[regno];
1280 if (allocno >= 0)
1281 {
1282 /* If we have more than one register class,
1283 first try allocating in the class that is cheapest
1284 for this pseudo-reg. If that fails, try any reg. */
1285 if (N_REG_CLASSES > 1)
1d56e983 1286 find_reg (allocno, forbidden_regs, 0, 0, 1);
38398762 1287 if (reg_renumber[regno] < 0
b1ec3c92 1288 && reg_alternate_class (regno) != NO_REGS)
1d56e983 1289 find_reg (allocno, forbidden_regs, 1, 0, 1);
38398762
RK
1290
1291 /* If we found a register, modify the RTL for the register to
1292 show the hard register, and mark that register live. */
1293 if (reg_renumber[regno] >= 0)
1294 {
1295 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1296 mark_home_live (regno);
1297 }
1298 }
1299}
1300\f
1301/* Record a conflict between register REGNO
1302 and everything currently live.
1303 REGNO must not be a pseudo reg that was allocated
1304 by local_alloc; such numbers must be translated through
1305 reg_renumber before calling here. */
1306
1307static void
1308record_one_conflict (regno)
1309 int regno;
1310{
1311 register int j;
1312
1313 if (regno < FIRST_PSEUDO_REGISTER)
1314 /* When a hard register becomes live,
1315 record conflicts with live pseudo regs. */
32c8d1bc 1316 EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, j,
38398762 1317 {
5c0ecffe 1318 SET_HARD_REG_BIT (allocno[j].hard_reg_conflicts, regno);
32c8d1bc 1319 });
38398762
RK
1320 else
1321 /* When a pseudo-register becomes live,
1322 record conflicts first with hard regs,
1323 then with other pseudo regs. */
1324 {
1325 register int ialloc = reg_allocno[regno];
1326 register int ialloc_prod = ialloc * allocno_row_words;
5c0ecffe 1327 IOR_HARD_REG_SET (allocno[ialloc].hard_reg_conflicts, hard_regs_live);
38398762
RK
1328 for (j = allocno_row_words - 1; j >= 0; j--)
1329 {
1330#if 0
1331 int k;
1332 for (k = 0; k < n_no_conflict_pairs; k++)
1333 if (! ((j == no_conflict_pairs[k].allocno1
1334 && ialloc == no_conflict_pairs[k].allocno2)
1335 ||
1336 (j == no_conflict_pairs[k].allocno2
1337 && ialloc == no_conflict_pairs[k].allocno1)))
1338#endif /* 0 */
1339 conflicts[ialloc_prod + j] |= allocnos_live[j];
1340 }
1341 }
1342}
1343
1344/* Record all allocnos currently live as conflicting
bdc24974
JL
1345 with all hard regs currently live.
1346
38398762
RK
1347 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1348 are currently live. Their bits are also flagged in allocnos_live. */
1349
1350static void
1351record_conflicts (allocno_vec, len)
8d4c79be 1352 register int *allocno_vec;
38398762
RK
1353 register int len;
1354{
5c0ecffe 1355 register int num;
38398762
RK
1356 register int ialloc_prod;
1357
1358 while (--len >= 0)
1359 {
5c0ecffe
JH
1360 num = allocno_vec[len];
1361 ialloc_prod = num * allocno_row_words;
1362 IOR_HARD_REG_SET (allocno[num].hard_reg_conflicts, hard_regs_live);
38398762
RK
1363 }
1364}
267cf808
JL
1365
1366/* If CONFLICTP (i, j) is true, make sure CONFLICTP (j, i) is also true. */
1367static void
1368mirror_conflicts ()
1369{
1370 register int i, j;
1371 int rw = allocno_row_words;
1372 int rwb = rw * INT_BITS;
1373 INT_TYPE *p = conflicts;
1374 INT_TYPE *q0 = conflicts, *q1, *q2;
1375 unsigned INT_TYPE mask;
1376
1377 for (i = max_allocno - 1, mask = 1; i >= 0; i--, mask <<= 1)
1378 {
1379 if (! mask)
1380 {
1381 mask = 1;
1382 q0++;
1383 }
1384 for (j = allocno_row_words - 1, q1 = q0; j >= 0; j--, q1 += rwb)
1385 {
1386 unsigned INT_TYPE word;
1387
1388 for (word = (unsigned INT_TYPE) *p++, q2 = q1; word;
1389 word >>= 1, q2 += rw)
1390 {
1391 if (word & 1)
1392 *q2 |= mask;
1393 }
1394 }
1395 }
1396}
38398762
RK
1397\f
1398/* Handle the case where REG is set by the insn being scanned,
1399 during the forward scan to accumulate conflicts.
1400 Store a 1 in regs_live or allocnos_live for this register, record how many
1401 consecutive hardware registers it actually needs,
1402 and record a conflict with all other registers already live.
1403
1404 Note that even if REG does not remain alive after this insn,
1405 we must mark it here as live, to ensure a conflict between
1406 REG and any other regs set in this insn that really do live.
1407 This is because those other regs could be considered after this.
1408
1409 REG might actually be something other than a register;
1410 if so, we do nothing.
1411
1412 SETTER is 0 if this register was modified by an auto-increment (i.e.,
a4c3ddd8 1413 a REG_INC note was found for it). */
38398762
RK
1414
1415static void
84832317 1416mark_reg_store (reg, setter, data)
a4c3ddd8 1417 rtx reg, setter;
84832317 1418 void *data ATTRIBUTE_UNUSED;
38398762
RK
1419{
1420 register int regno;
38398762
RK
1421
1422 /* WORD is which word of a multi-register group is being stored.
1423 For the case where the store is actually into a SUBREG of REG.
1424 Except we don't use it; I believe the entire REG needs to be
1425 made live. */
1426 int word = 0;
1427
1428 if (GET_CODE (reg) == SUBREG)
1429 {
1430 word = SUBREG_WORD (reg);
1431 reg = SUBREG_REG (reg);
1432 }
1433
1434 if (GET_CODE (reg) != REG)
1435 return;
1436
38398762
RK
1437 regs_set[n_regs_set++] = reg;
1438
a4c3ddd8 1439 if (setter && GET_CODE (setter) != CLOBBER)
38398762
RK
1440 set_preference (reg, SET_SRC (setter));
1441
1442 regno = REGNO (reg);
1443
38398762
RK
1444 /* Either this is one of the max_allocno pseudo regs not allocated,
1445 or it is or has a hardware reg. First handle the pseudo-regs. */
1446 if (regno >= FIRST_PSEUDO_REGISTER)
1447 {
1448 if (reg_allocno[regno] >= 0)
1449 {
1450 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1451 record_one_conflict (regno);
1452 }
1453 }
a300b8d9
JW
1454
1455 if (reg_renumber[regno] >= 0)
1456 regno = reg_renumber[regno] /* + word */;
1457
38398762 1458 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1459 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1460 {
1461 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1462 while (regno < last)
1463 {
1464 record_one_conflict (regno);
1465 SET_HARD_REG_BIT (hard_regs_live, regno);
1466 regno++;
1467 }
1468 }
1469}
1470\f
1471/* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */
1472
1473static void
84832317 1474mark_reg_clobber (reg, setter, data)
38398762 1475 rtx reg, setter;
84832317 1476 void *data ATTRIBUTE_UNUSED;
38398762 1477{
a4c3ddd8 1478 if (GET_CODE (setter) == CLOBBER)
84832317 1479 mark_reg_store (reg, setter, data);
333e0f7d
RS
1480}
1481
1482/* Record that REG has conflicts with all the regs currently live.
1483 Do not mark REG itself as live. */
1484
1485static void
1486mark_reg_conflicts (reg)
1487 rtx reg;
1488{
1489 register int regno;
1490
1491 if (GET_CODE (reg) == SUBREG)
1492 reg = SUBREG_REG (reg);
1493
1494 if (GET_CODE (reg) != REG)
1495 return;
1496
1497 regno = REGNO (reg);
1498
333e0f7d
RS
1499 /* Either this is one of the max_allocno pseudo regs not allocated,
1500 or it is or has a hardware reg. First handle the pseudo-regs. */
1501 if (regno >= FIRST_PSEUDO_REGISTER)
1502 {
1503 if (reg_allocno[regno] >= 0)
1504 record_one_conflict (regno);
1505 }
a300b8d9
JW
1506
1507 if (reg_renumber[regno] >= 0)
1508 regno = reg_renumber[regno];
1509
333e0f7d 1510 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1511 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
333e0f7d
RS
1512 {
1513 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1514 while (regno < last)
1515 {
1516 record_one_conflict (regno);
1517 regno++;
1518 }
1519 }
38398762
RK
1520}
1521\f
1522/* Mark REG as being dead (following the insn being scanned now).
1523 Store a 0 in regs_live or allocnos_live for this register. */
1524
1525static void
1526mark_reg_death (reg)
1527 rtx reg;
1528{
1529 register int regno = REGNO (reg);
1530
38398762
RK
1531 /* Either this is one of the max_allocno pseudo regs not allocated,
1532 or it is a hardware reg. First handle the pseudo-regs. */
1533 if (regno >= FIRST_PSEUDO_REGISTER)
1534 {
1535 if (reg_allocno[regno] >= 0)
1536 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1537 }
a300b8d9
JW
1538
1539 /* For pseudo reg, see if it has been assigned a hardware reg. */
1540 if (reg_renumber[regno] >= 0)
1541 regno = reg_renumber[regno];
1542
38398762 1543 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1544 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1545 {
1546 /* Pseudo regs already assigned hardware regs are treated
1547 almost the same as explicit hardware regs. */
1548 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1549 while (regno < last)
1550 {
1551 CLEAR_HARD_REG_BIT (hard_regs_live, regno);
1552 regno++;
1553 }
1554 }
1555}
1556
1557/* Mark hard reg REGNO as currently live, assuming machine mode MODE
1558 for the value stored in it. MODE determines how many consecutive
1559 registers are actually in use. Do not record conflicts;
1560 it is assumed that the caller will do that. */
1561
1562static void
1563mark_reg_live_nc (regno, mode)
1564 register int regno;
1565 enum machine_mode mode;
1566{
1567 register int last = regno + HARD_REGNO_NREGS (regno, mode);
1568 while (regno < last)
1569 {
1570 SET_HARD_REG_BIT (hard_regs_live, regno);
1571 regno++;
1572 }
1573}
1574\f
1575/* Try to set a preference for an allocno to a hard register.
1576 We are passed DEST and SRC which are the operands of a SET. It is known
1577 that SRC is a register. If SRC or the first operand of SRC is a register,
1578 try to set a preference. If one of the two is a hard register and the other
1579 is a pseudo-register, mark the preference.
1580
6dc42e49 1581 Note that we are not as aggressive as local-alloc in trying to tie a
38398762
RK
1582 pseudo-register to a hard register. */
1583
1584static void
1585set_preference (dest, src)
1586 rtx dest, src;
1587{
1588 int src_regno, dest_regno;
1589 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1590 to compensate for subregs in SRC or DEST. */
1591 int offset = 0;
1592 int i;
1593 int copy = 1;
1594
1595 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1596 src = XEXP (src, 0), copy = 0;
1597
1598 /* Get the reg number for both SRC and DEST.
1599 If neither is a reg, give up. */
1600
1601 if (GET_CODE (src) == REG)
1602 src_regno = REGNO (src);
1603 else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG)
1604 {
1605 src_regno = REGNO (SUBREG_REG (src));
1606 offset += SUBREG_WORD (src);
1607 }
1608 else
1609 return;
1610
1611 if (GET_CODE (dest) == REG)
1612 dest_regno = REGNO (dest);
1613 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
1614 {
1615 dest_regno = REGNO (SUBREG_REG (dest));
1616 offset -= SUBREG_WORD (dest);
1617 }
1618 else
1619 return;
1620
1621 /* Convert either or both to hard reg numbers. */
1622
1623 if (reg_renumber[src_regno] >= 0)
1624 src_regno = reg_renumber[src_regno];
1625
1626 if (reg_renumber[dest_regno] >= 0)
1627 dest_regno = reg_renumber[dest_regno];
1628
1629 /* Now if one is a hard reg and the other is a global pseudo
1630 then give the other a preference. */
1631
1632 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1633 && reg_allocno[src_regno] >= 0)
1634 {
1635 dest_regno -= offset;
1636 if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER)
1637 {
1638 if (copy)
1639 SET_REGBIT (hard_reg_copy_preferences,
1640 reg_allocno[src_regno], dest_regno);
1641
1642 SET_REGBIT (hard_reg_preferences,
1643 reg_allocno[src_regno], dest_regno);
1644 for (i = dest_regno;
1645 i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest));
1646 i++)
1647 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1648 }
1649 }
1650
1651 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1652 && reg_allocno[dest_regno] >= 0)
1653 {
1654 src_regno += offset;
1655 if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER)
1656 {
1657 if (copy)
1658 SET_REGBIT (hard_reg_copy_preferences,
1659 reg_allocno[dest_regno], src_regno);
1660
1661 SET_REGBIT (hard_reg_preferences,
1662 reg_allocno[dest_regno], src_regno);
1663 for (i = src_regno;
1664 i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src));
1665 i++)
1666 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1667 }
1668 }
1669}
1670\f
1671/* Indicate that hard register number FROM was eliminated and replaced with
1672 an offset from hard register number TO. The status of hard registers live
1673 at the start of a basic block is updated by replacing a use of FROM with
1674 a use of TO. */
1675
1676void
1677mark_elimination (from, to)
1678 int from, to;
1679{
1680 int i;
1681
1682 for (i = 0; i < n_basic_blocks; i++)
e881bb1b
RH
1683 {
1684 register regset r = BASIC_BLOCK (i)->global_live_at_start;
1685 if (REGNO_REG_SET_P (r, from))
1686 {
1687 CLEAR_REGNO_REG_SET (r, from);
1688 SET_REGNO_REG_SET (r, to);
1689 }
1690 }
38398762
RK
1691}
1692\f
cad6f7d0
BS
1693/* Used for communication between the following functions. Holds the
1694 current life information. */
1695static regset live_relevant_regs;
1696
285f3cf0
R
1697/* Record in live_relevant_regs and REGS_SET that register REG became live.
1698 This is called via note_stores. */
cad6f7d0 1699static void
285f3cf0 1700reg_becomes_live (reg, setter, regs_set)
cad6f7d0
BS
1701 rtx reg;
1702 rtx setter ATTRIBUTE_UNUSED;
285f3cf0 1703 void *regs_set;
cad6f7d0
BS
1704{
1705 int regno;
1706
1707 if (GET_CODE (reg) == SUBREG)
1708 reg = SUBREG_REG (reg);
1709
1710 if (GET_CODE (reg) != REG)
1711 return;
1712
1713 regno = REGNO (reg);
1714 if (regno < FIRST_PSEUDO_REGISTER)
1715 {
1716 int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1717 while (nregs-- > 0)
285f3cf0
R
1718 {
1719 SET_REGNO_REG_SET (live_relevant_regs, regno);
1720 if (! fixed_regs[regno])
1721 SET_REGNO_REG_SET ((regset) regs_set, regno);
1722 regno++;
1723 }
cad6f7d0
BS
1724 }
1725 else if (reg_renumber[regno] >= 0)
285f3cf0
R
1726 {
1727 SET_REGNO_REG_SET (live_relevant_regs, regno);
1728 SET_REGNO_REG_SET ((regset) regs_set, regno);
1729 }
cad6f7d0
BS
1730}
1731
1732/* Record in live_relevant_regs that register REGNO died. */
1733static void
285f3cf0 1734reg_dies (regno, mode, chain)
cad6f7d0
BS
1735 int regno;
1736 enum machine_mode mode;
285f3cf0 1737 struct insn_chain *chain;
cad6f7d0
BS
1738{
1739 if (regno < FIRST_PSEUDO_REGISTER)
1740 {
1741 int nregs = HARD_REGNO_NREGS (regno, mode);
1742 while (nregs-- > 0)
285f3cf0
R
1743 {
1744 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1745 if (! fixed_regs[regno])
239a0f5b 1746 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
285f3cf0
R
1747 regno++;
1748 }
cad6f7d0
BS
1749 }
1750 else
285f3cf0
R
1751 {
1752 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1753 if (reg_renumber[regno] >= 0)
239a0f5b 1754 SET_REGNO_REG_SET (&chain->dead_or_set, regno);
285f3cf0 1755 }
cad6f7d0
BS
1756}
1757
1758/* Walk the insns of the current function and build reload_insn_chain,
1759 and record register life information. */
d29c259b 1760void
108c535a
RH
1761build_insn_chain (first)
1762 rtx first;
cad6f7d0
BS
1763{
1764 struct insn_chain **p = &reload_insn_chain;
1765 struct insn_chain *prev = 0;
108c535a 1766 int b = 0;
ee25a7a5 1767 regset_head live_relevant_regs_head;
cad6f7d0 1768
ee25a7a5 1769 live_relevant_regs = INITIALIZE_REG_SET (live_relevant_regs_head);
cad6f7d0 1770
108c535a 1771 for (; first; first = NEXT_INSN (first))
cad6f7d0 1772 {
108c535a 1773 struct insn_chain *c;
cad6f7d0 1774
108c535a 1775 if (first == BLOCK_HEAD (b))
cad6f7d0 1776 {
108c535a 1777 int i;
267cf808 1778
108c535a 1779 CLEAR_REG_SET (live_relevant_regs);
267cf808
JL
1780
1781 EXECUTE_IF_SET_IN_BITMAP
1782 (BASIC_BLOCK (b)->global_live_at_start, 0, i,
1783 {
1784 if (i < FIRST_PSEUDO_REGISTER
1785 ? ! TEST_HARD_REG_BIT (eliminable_regset, i)
1786 : reg_renumber[i] >= 0)
1787 SET_REGNO_REG_SET (live_relevant_regs, i);
1788 });
1789 }
108c535a
RH
1790
1791 if (GET_CODE (first) != NOTE && GET_CODE (first) != BARRIER)
021d1677 1792 {
108c535a
RH
1793 c = new_insn_chain ();
1794 c->prev = prev;
1795 prev = c;
1796 *p = c;
1797 p = &c->next;
1798 c->insn = first;
1799 c->block = b;
1800
108c535a 1801 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
cad6f7d0 1802 {
108c535a 1803 rtx link;
cad6f7d0 1804
108c535a 1805 /* Mark the death of everything that dies in this instruction. */
cad6f7d0 1806
108c535a
RH
1807 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1808 if (REG_NOTE_KIND (link) == REG_DEAD
1809 && GET_CODE (XEXP (link, 0)) == REG)
285f3cf0
R
1810 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1811 c);
1812
239a0f5b 1813 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
cad6f7d0 1814
108c535a 1815 /* Mark everything born in this instruction as live. */
cad6f7d0 1816
285f3cf0 1817 note_stores (PATTERN (first), reg_becomes_live,
239a0f5b 1818 &c->dead_or_set);
cad6f7d0 1819 }
285f3cf0 1820 else
239a0f5b 1821 COPY_REG_SET (&c->live_throughout, live_relevant_regs);
108c535a
RH
1822
1823 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
1824 {
1825 rtx link;
1826
1827 /* Mark anything that is set in this insn and then unused as dying. */
1828
1829 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1830 if (REG_NOTE_KIND (link) == REG_UNUSED
1831 && GET_CODE (XEXP (link, 0)) == REG)
285f3cf0
R
1832 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)),
1833 c);
108c535a 1834 }
3663a304 1835 }
021d1677 1836
108c535a
RH
1837 if (first == BLOCK_END (b))
1838 b++;
1839
1840 /* Stop after we pass the end of the last basic block. Verify that
1841 no real insns are after the end of the last basic block.
1842
1843 We may want to reorganize the loop somewhat since this test should
1844 always be the right exit test. */
1845 if (b == n_basic_blocks)
1846 {
1847 for (first = NEXT_INSN (first) ; first; first = NEXT_INSN (first))
1848 if (GET_RTX_CLASS (GET_CODE (first)) == 'i'
1849 && GET_CODE (PATTERN (first)) != USE)
1850 abort ();
1851 break;
1852 }
1853 }
cad6f7d0
BS
1854 FREE_REG_SET (live_relevant_regs);
1855 *p = 0;
1856}
1857\f
318e4b56 1858/* Print debugging trace information if -dg switch is given,
38398762
RK
1859 showing the information on which the allocation decisions are based. */
1860
1861static void
1862dump_conflicts (file)
1863 FILE *file;
1864{
1865 register int i;
1866 register int has_preferences;
a300b8d9
JW
1867 register int nregs;
1868 nregs = 0;
1869 for (i = 0; i < max_allocno; i++)
1870 {
5c0ecffe 1871 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
a300b8d9
JW
1872 continue;
1873 nregs++;
1874 }
1875 fprintf (file, ";; %d regs to allocate:", nregs);
38398762
RK
1876 for (i = 0; i < max_allocno; i++)
1877 {
1878 int j;
5c0ecffe 1879 if (reg_renumber[allocno[allocno_order[i]].reg] >= 0)
a300b8d9 1880 continue;
5c0ecffe 1881 fprintf (file, " %d", allocno[allocno_order[i]].reg);
38398762
RK
1882 for (j = 0; j < max_regno; j++)
1883 if (reg_allocno[j] == allocno_order[i]
5c0ecffe 1884 && j != allocno[allocno_order[i]].reg)
38398762 1885 fprintf (file, "+%d", j);
5c0ecffe
JH
1886 if (allocno[allocno_order[i]].size != 1)
1887 fprintf (file, " (%d)", allocno[allocno_order[i]].size);
38398762
RK
1888 }
1889 fprintf (file, "\n");
1890
1891 for (i = 0; i < max_allocno; i++)
1892 {
1893 register int j;
5c0ecffe 1894 fprintf (file, ";; %d conflicts:", allocno[i].reg);
38398762 1895 for (j = 0; j < max_allocno; j++)
267cf808 1896 if (CONFLICTP (j, i))
5c0ecffe 1897 fprintf (file, " %d", allocno[j].reg);
38398762 1898 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
5c0ecffe 1899 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_conflicts, j))
38398762
RK
1900 fprintf (file, " %d", j);
1901 fprintf (file, "\n");
1902
1903 has_preferences = 0;
1904 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
5c0ecffe 1905 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
38398762
RK
1906 has_preferences = 1;
1907
1908 if (! has_preferences)
1909 continue;
5c0ecffe 1910 fprintf (file, ";; %d preferences:", allocno[i].reg);
38398762 1911 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
5c0ecffe 1912 if (TEST_HARD_REG_BIT (allocno[i].hard_reg_preferences, j))
38398762
RK
1913 fprintf (file, " %d", j);
1914 fprintf (file, "\n");
1915 }
1916 fprintf (file, "\n");
1917}
1918
1919void
1920dump_global_regs (file)
1921 FILE *file;
1922{
1923 register int i, j;
1924
1925 fprintf (file, ";; Register dispositions:\n");
1926 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1927 if (reg_renumber[i] >= 0)
1928 {
1929 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1930 if (++j % 6 == 0)
1931 fprintf (file, "\n");
1932 }
1933
1934 fprintf (file, "\n\n;; Hard regs used: ");
1935 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1936 if (regs_ever_live[i])
1937 fprintf (file, " %d", i);
1938 fprintf (file, "\n\n");
1939}
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