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38398762 1/* Allocate registers for pseudo-registers that span basic blocks.
a5cad800 2 Copyright (C) 1987, 88, 91, 94, 96-98, 1999 Free Software Foundation, Inc.
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
a35311b0
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
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20
21
38398762 22#include "config.h"
670ee920 23#include "system.h"
ccd043a9 24
f6781658
L
25#include "machmode.h"
26#include "hard-reg-set.h"
38398762 27#include "rtl.h"
6baf1cc8 28#include "tm_p.h"
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29#include "flags.h"
30#include "basic-block.h"
38398762 31#include "regs.h"
49ad7cfa 32#include "function.h"
38398762 33#include "insn-config.h"
cad6f7d0 34#include "reload.h"
38398762 35#include "output.h"
2e107e9e 36#include "toplev.h"
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37
38/* This pass of the compiler performs global register allocation.
39 It assigns hard register numbers to all the pseudo registers
40 that were not handled in local_alloc. Assignments are recorded
41 in the vector reg_renumber, not by changing the rtl code.
42 (Such changes are made by final). The entry point is
43 the function global_alloc.
44
45 After allocation is complete, the reload pass is run as a subroutine
46 of this pass, so that when a pseudo reg loses its hard reg due to
47 spilling it is possible to make a second attempt to find a hard
48 reg for it. The reload pass is independent in other respects
49 and it is run even when stupid register allocation is in use.
50
a300b8d9
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51 1. Assign allocation-numbers (allocnos) to the pseudo-registers
52 still needing allocations and to the pseudo-registers currently
53 allocated by local-alloc which may be spilled by reload.
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54 Set up tables reg_allocno and allocno_reg to map
55 reg numbers to allocnos and vice versa.
56 max_allocno gets the number of allocnos in use.
57
58 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
59 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
60 for conflicts between allocnos and explicit hard register use
61 (which includes use of pseudo-registers allocated by local_alloc).
62
a300b8d9 63 3. For each basic block
38398762 64 walk forward through the block, recording which
a300b8d9
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65 pseudo-registers and which hardware registers are live.
66 Build the conflict matrix between the pseudo-registers
67 and another of pseudo-registers versus hardware registers.
38398762 68 Also record the preferred hardware registers
a300b8d9 69 for each pseudo-register.
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70
71 4. Sort a table of the allocnos into order of
72 desirability of the variables.
73
74 5. Allocate the variables in that order; each if possible into
75 a preferred register, else into another register. */
76\f
a300b8d9 77/* Number of pseudo-registers which are candidates for allocation. */
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78
79static int max_allocno;
80
81/* Indexed by (pseudo) reg number, gives the allocno, or -1
a300b8d9 82 for pseudo registers which are not to be allocated. */
38398762 83
f15ebf65 84static int *reg_allocno;
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85
86/* Indexed by allocno, gives the reg number. */
87
88static int *allocno_reg;
89
90/* A vector of the integers from 0 to max_allocno-1,
91 sorted in the order of first-to-be-allocated first. */
92
93static int *allocno_order;
94
95/* Indexed by an allocno, gives the number of consecutive
96 hard registers needed by that pseudo reg. */
97
98static int *allocno_size;
99
100/* Indexed by (pseudo) reg number, gives the number of another
6dc42e49 101 lower-numbered pseudo reg which can share a hard reg with this pseudo
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102 *even if the two pseudos would otherwise appear to conflict*. */
103
104static int *reg_may_share;
105
b1ec3c92
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106/* Define the number of bits in each element of `conflicts' and what
107 type that element has. We use the largest integer format on the
108 host machine. */
109
110#define INT_BITS HOST_BITS_PER_WIDE_INT
111#define INT_TYPE HOST_WIDE_INT
112
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113/* max_allocno by max_allocno array of bits,
114 recording whether two allocno's conflict (can't go in the same
115 hardware register).
116
267cf808 117 `conflicts' is symmetric after the call to mirror_conflicts. */
38398762 118
b1ec3c92 119static INT_TYPE *conflicts;
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120
121/* Number of ints require to hold max_allocno bits.
122 This is the length of a row in `conflicts'. */
123
124static int allocno_row_words;
125
126/* Two macros to test or store 1 in an element of `conflicts'. */
127
128#define CONFLICTP(I, J) \
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129 (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \
130 & ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS)))
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131
132#define SET_CONFLICT(I, J) \
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133 (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \
134 |= ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS)))
135
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136/* Set of hard regs currently live (during scan of all insns). */
137
138static HARD_REG_SET hard_regs_live;
139
140/* Indexed by N, set of hard regs conflicting with allocno N. */
141
142static HARD_REG_SET *hard_reg_conflicts;
143
144/* Indexed by N, set of hard regs preferred by allocno N.
145 This is used to make allocnos go into regs that are copied to or from them,
146 when possible, to reduce register shuffling. */
147
148static HARD_REG_SET *hard_reg_preferences;
149
150/* Similar, but just counts register preferences made in simple copy
151 operations, rather than arithmetic. These are given priority because
152 we can always eliminate an insn by using these, but using a register
153 in the above list won't always eliminate an insn. */
154
155static HARD_REG_SET *hard_reg_copy_preferences;
156
157/* Similar to hard_reg_preferences, but includes bits for subsequent
158 registers when an allocno is multi-word. The above variable is used for
159 allocation while this is used to build reg_someone_prefers, below. */
160
161static HARD_REG_SET *hard_reg_full_preferences;
162
163/* Indexed by N, set of hard registers that some later allocno has a
164 preference for. */
165
166static HARD_REG_SET *regs_someone_prefers;
167
168/* Set of registers that global-alloc isn't supposed to use. */
169
170static HARD_REG_SET no_global_alloc_regs;
171
172/* Set of registers used so far. */
173
174static HARD_REG_SET regs_used_so_far;
175
176/* Number of calls crossed by each allocno. */
177
178static int *allocno_calls_crossed;
179
180/* Number of refs (weighted) to each allocno. */
181
182static int *allocno_n_refs;
183
184/* Guess at live length of each allocno.
185 This is actually the max of the live lengths of the regs. */
186
187static int *allocno_live_length;
188
1d56e983
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189/* Number of refs (weighted) to each hard reg, as used by local alloc.
190 It is zero for a reg that contains global pseudos or is explicitly used. */
191
192static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
193
194/* Guess at live length of each hard reg, as used by local alloc.
195 This is actually the sum of the live lengths of the specific regs. */
196
197static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
198
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199/* Test a bit in TABLE, a vector of HARD_REG_SETs,
200 for vector element I, and hard register number J. */
201
202#define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (TABLE[I], J)
203
204/* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */
205
206#define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (TABLE[I], J)
207
208/* Bit mask for allocnos live at current point in the scan. */
209
b1ec3c92 210static INT_TYPE *allocnos_live;
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211
212/* Test, set or clear bit number I in allocnos_live,
213 a bit vector indexed by allocno. */
214
215#define ALLOCNO_LIVE_P(I) \
b1ec3c92 216 (allocnos_live[(I) / INT_BITS] & ((INT_TYPE) 1 << ((I) % INT_BITS)))
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217
218#define SET_ALLOCNO_LIVE(I) \
b1ec3c92 219 (allocnos_live[(I) / INT_BITS] |= ((INT_TYPE) 1 << ((I) % INT_BITS)))
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220
221#define CLEAR_ALLOCNO_LIVE(I) \
b1ec3c92 222 (allocnos_live[(I) / INT_BITS] &= ~((INT_TYPE) 1 << ((I) % INT_BITS)))
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223
224/* This is turned off because it doesn't work right for DImode.
225 (And it is only used for DImode, so the other cases are worthless.)
226 The problem is that it isn't true that there is NO possibility of conflict;
227 only that there is no conflict if the two pseudos get the exact same regs.
228 If they were allocated with a partial overlap, there would be a conflict.
229 We can't safely turn off the conflict unless we have another way to
230 prevent the partial overlap.
231
232 Idea: change hard_reg_conflicts so that instead of recording which
233 hard regs the allocno may not overlap, it records where the allocno
234 may not start. Change both where it is used and where it is updated.
235 Then there is a way to record that (reg:DI 108) may start at 10
236 but not at 9 or 11. There is still the question of how to record
237 this semi-conflict between two pseudos. */
238#if 0
239/* Reg pairs for which conflict after the current insn
240 is inhibited by a REG_NO_CONFLICT note.
241 If the table gets full, we ignore any other notes--that is conservative. */
242#define NUM_NO_CONFLICT_PAIRS 4
243/* Number of pairs in use in this insn. */
244int n_no_conflict_pairs;
245static struct { int allocno1, allocno2;}
246 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
247#endif /* 0 */
248
249/* Record all regs that are set in any one insn.
250 Communication from mark_reg_{store,clobber} and global_conflicts. */
251
252static rtx *regs_set;
253static int n_regs_set;
254
daf55ac6 255/* All registers that can be eliminated. */
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256
257static HARD_REG_SET eliminable_regset;
258
e1b6684c 259static int allocno_compare PROTO((const PTR, const PTR));
82c68a78 260static void global_conflicts PROTO((void));
267cf808 261static void mirror_conflicts PROTO((void));
82c68a78
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262static void expand_preferences PROTO((void));
263static void prune_preferences PROTO((void));
264static void find_reg PROTO((int, HARD_REG_SET, int, int, int));
265static void record_one_conflict PROTO((int));
8d4c79be 266static void record_conflicts PROTO((int *, int));
84832317
MM
267static void mark_reg_store PROTO((rtx, rtx, void *));
268static void mark_reg_clobber PROTO((rtx, rtx, void *));
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269static void mark_reg_conflicts PROTO((rtx));
270static void mark_reg_death PROTO((rtx));
271static void mark_reg_live_nc PROTO((int, enum machine_mode));
272static void set_preference PROTO((rtx, rtx));
273static void dump_conflicts PROTO((FILE *));
84832317 274static void reg_becomes_live PROTO((rtx, rtx, void *));
cad6f7d0 275static void reg_dies PROTO((int, enum machine_mode));
108c535a 276static void build_insn_chain PROTO((rtx));
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277\f
278/* Perform allocation of pseudo-registers not allocated by local_alloc.
279 FILE is a file to output debugging information on,
ab40ad2b 280 or zero if such output is not desired.
38398762 281
ab40ad2b
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282 Return value is nonzero if reload failed
283 and we must not do any more for this function. */
284
285int
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286global_alloc (file)
287 FILE *file;
288{
8c316ae2 289 int retval;
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290#ifdef ELIMINABLE_REGS
291 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
292#endif
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293 int need_fp
294 = (! flag_omit_frame_pointer
295#ifdef EXIT_IGNORE_STACK
296 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
297#endif
298 || FRAME_POINTER_REQUIRED);
299
f8344bea 300 register size_t i;
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301 rtx x;
302
303 max_allocno = 0;
304
305 /* A machine may have certain hard registers that
306 are safe to use only within a basic block. */
307
308 CLEAR_HARD_REG_SET (no_global_alloc_regs);
309#ifdef OVERLAPPING_REGNO_P
310 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
311 if (OVERLAPPING_REGNO_P (i))
312 SET_HARD_REG_BIT (no_global_alloc_regs, i);
313#endif
314
315 /* Build the regset of all eliminable registers and show we can't use those
316 that we already know won't be eliminated. */
317#ifdef ELIMINABLE_REGS
318 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
319 {
320 SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
321
322 if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
daf55ac6 323 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp))
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324 SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from);
325 }
7b0957a7 326#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
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327 SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
328 if (need_fp)
7b0957a7
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329 SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM);
330#endif
daf55ac6 331
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332#else
333 SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
daf55ac6 334 if (need_fp)
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335 SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM);
336#endif
337
338 /* Track which registers have already been used. Start with registers
339 explicitly in the rtl, then registers allocated by local register
b4b4db94 340 allocation. */
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341
342 CLEAR_HARD_REG_SET (regs_used_so_far);
b4b4db94
RS
343#ifdef LEAF_REGISTERS
344 /* If we are doing the leaf function optimization, and this is a leaf
345 function, it means that the registers that take work to save are those
346 that need a register window. So prefer the ones that can be used in
347 a leaf function. */
348 {
349 char *cheap_regs;
350 static char leaf_regs[] = LEAF_REGISTERS;
351
352 if (only_leaf_regs_used () && leaf_function_p ())
353 cheap_regs = leaf_regs;
354 else
355 cheap_regs = call_used_regs;
356 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
357 if (regs_ever_live[i] || cheap_regs[i])
358 SET_HARD_REG_BIT (regs_used_so_far, i);
359 }
360#else
361 /* We consider registers that do not have to be saved over calls as if
362 they were already used since there is no cost in using them. */
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363 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
364 if (regs_ever_live[i] || call_used_regs[i])
365 SET_HARD_REG_BIT (regs_used_so_far, i);
b4b4db94 366#endif
38398762 367
e51712db 368 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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369 if (reg_renumber[i] >= 0)
370 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
371
372 /* Establish mappings from register number to allocation number
373 and vice versa. In the process, count the allocnos. */
374
67289ea6 375 reg_allocno = (int *) xmalloc (max_regno * sizeof (int));
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376
377 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
378 reg_allocno[i] = -1;
379
380 /* Initialize the shared-hard-reg mapping
381 from the list of pairs that may share. */
67289ea6 382 reg_may_share = (int *) xcalloc (max_regno, sizeof (int));
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383 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
384 {
385 int r1 = REGNO (XEXP (x, 0));
386 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
387 if (r1 > r2)
388 reg_may_share[r1] = r2;
389 else
390 reg_may_share[r2] = r1;
391 }
392
e51712db 393 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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394 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
395 that we are supposed to refrain from putting in a hard reg.
396 -2 means do make an allocno but don't allocate it. */
a300b8d9 397 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
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398 /* Don't allocate pseudos that cross calls,
399 if this function receives a nonlocal goto. */
400 && (! current_function_has_nonlocal_label
b1f21e0a 401 || REG_N_CALLS_CROSSED (i) == 0))
38398762 402 {
a300b8d9 403 if (reg_renumber[i] < 0 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
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404 reg_allocno[i] = reg_allocno[reg_may_share[i]];
405 else
406 reg_allocno[i] = max_allocno++;
b1f21e0a 407 if (REG_LIVE_LENGTH (i) == 0)
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408 abort ();
409 }
410 else
411 reg_allocno[i] = -1;
412
67289ea6
MM
413 allocno_reg = (int *) xmalloc (max_allocno * sizeof (int));
414 allocno_size = (int *) xcalloc (max_allocno, sizeof (int));
415 allocno_calls_crossed = (int *) xcalloc (max_allocno, sizeof (int));
416 allocno_n_refs = (int *) xcalloc (max_allocno, sizeof (int));
417 allocno_live_length = (int *) xcalloc (max_allocno, sizeof (int));
38398762 418
e51712db 419 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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420 if (reg_allocno[i] >= 0)
421 {
422 int allocno = reg_allocno[i];
423 allocno_reg[allocno] = i;
424 allocno_size[allocno] = PSEUDO_REGNO_SIZE (i);
b1f21e0a
MM
425 allocno_calls_crossed[allocno] += REG_N_CALLS_CROSSED (i);
426 allocno_n_refs[allocno] += REG_N_REFS (i);
427 if (allocno_live_length[allocno] < REG_LIVE_LENGTH (i))
428 allocno_live_length[allocno] = REG_LIVE_LENGTH (i);
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429 }
430
1d56e983
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431 /* Calculate amount of usage of each hard reg by pseudos
432 allocated by local-alloc. This is to see if we want to
433 override it. */
4c9a05bc
RK
434 bzero ((char *) local_reg_live_length, sizeof local_reg_live_length);
435 bzero ((char *) local_reg_n_refs, sizeof local_reg_n_refs);
e51712db 436 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
a300b8d9 437 if (reg_renumber[i] >= 0)
1d56e983 438 {
34e56753
RS
439 int regno = reg_renumber[i];
440 int endregno = regno + HARD_REGNO_NREGS (regno, PSEUDO_REGNO_MODE (i));
441 int j;
442
443 for (j = regno; j < endregno; j++)
444 {
b1f21e0a
MM
445 local_reg_n_refs[j] += REG_N_REFS (i);
446 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
34e56753 447 }
1d56e983 448 }
34e56753 449
1d56e983
RS
450 /* We can't override local-alloc for a reg used not just by local-alloc. */
451 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
452 if (regs_ever_live[i])
453 local_reg_n_refs[i] = 0;
0dfa4517 454
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455 /* Allocate the space for the conflict and preference tables and
456 initialize them. */
457
458 hard_reg_conflicts
67289ea6 459 = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET));
38398762 460 hard_reg_preferences
67289ea6 461 = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET));
38398762 462 hard_reg_copy_preferences
67289ea6 463 = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET));
38398762 464 hard_reg_full_preferences
67289ea6 465 = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET));
38398762 466 regs_someone_prefers
67289ea6 467 = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET));
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468
469 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
470
ba3b3878
BK
471 /* We used to use alloca here, but the size of what it would try to
472 allocate would occasionally cause it to exceed the stack limit and
473 cause unpredictable core dumps. Some examples were > 2Mb in size. */
3de90026
RH
474 conflicts = (INT_TYPE *) xcalloc (max_allocno * allocno_row_words,
475 sizeof (INT_TYPE));
38398762 476
67289ea6 477 allocnos_live = (INT_TYPE *) xmalloc (allocno_row_words * sizeof (INT_TYPE));
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478
479 /* If there is work to be done (at least one reg to allocate),
480 perform global conflict analysis and allocate the regs. */
481
482 if (max_allocno > 0)
483 {
484 /* Scan all the insns and compute the conflicts among allocnos
485 and between allocnos and hard regs. */
486
487 global_conflicts ();
488
267cf808
JL
489 mirror_conflicts ();
490
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491 /* Eliminate conflicts between pseudos and eliminable registers. If
492 the register is not eliminated, the pseudo won't really be able to
493 live in the eliminable register, so the conflict doesn't matter.
494 If we do eliminate the register, the conflict will no longer exist.
1d56e983
RS
495 So in either case, we can ignore the conflict. Likewise for
496 preferences. */
38398762 497
e51712db 498 for (i = 0; i < (size_t) max_allocno; i++)
1d56e983
RS
499 {
500 AND_COMPL_HARD_REG_SET (hard_reg_conflicts[i], eliminable_regset);
501 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[i],
502 eliminable_regset);
503 AND_COMPL_HARD_REG_SET (hard_reg_preferences[i], eliminable_regset);
504 }
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505
506 /* Try to expand the preferences by merging them between allocnos. */
507
508 expand_preferences ();
509
510 /* Determine the order to allocate the remaining pseudo registers. */
511
67289ea6 512 allocno_order = (int *) xmalloc (max_allocno * sizeof (int));
e51712db 513 for (i = 0; i < (size_t) max_allocno; i++)
38398762
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514 allocno_order[i] = i;
515
516 /* Default the size to 1, since allocno_compare uses it to divide by.
517 Also convert allocno_live_length of zero to -1. A length of zero
518 can occur when all the registers for that allocno have reg_live_length
519 equal to -2. In this case, we want to make an allocno, but not
520 allocate it. So avoid the divide-by-zero and set it to a low
521 priority. */
522
e51712db 523 for (i = 0; i < (size_t) max_allocno; i++)
38398762
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524 {
525 if (allocno_size[i] == 0)
526 allocno_size[i] = 1;
527 if (allocno_live_length[i] == 0)
528 allocno_live_length[i] = -1;
529 }
530
531 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
532
533 prune_preferences ();
534
535 if (file)
536 dump_conflicts (file);
537
538 /* Try allocating them, one by one, in that order,
539 except for parameters marked with reg_live_length[regno] == -2. */
540
e51712db 541 for (i = 0; i < (size_t) max_allocno; i++)
a300b8d9
JW
542 if (reg_renumber[allocno_reg[allocno_order[i]]] < 0
543 && REG_LIVE_LENGTH (allocno_reg[allocno_order[i]]) >= 0)
38398762
RK
544 {
545 /* If we have more than one register class,
546 first try allocating in the class that is cheapest
547 for this pseudo-reg. If that fails, try any reg. */
548 if (N_REG_CLASSES > 1)
549 {
ea8693a4 550 find_reg (allocno_order[i], 0, 0, 0, 0);
38398762
RK
551 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
552 continue;
553 }
b1ec3c92 554 if (reg_alternate_class (allocno_reg[allocno_order[i]]) != NO_REGS)
ea8693a4 555 find_reg (allocno_order[i], 0, 1, 0, 0);
38398762 556 }
67289ea6
MM
557
558 free (allocno_order);
38398762
RK
559 }
560
561 /* Do the reloads now while the allocno data still exist, so that we can
562 try to assign new hard regs to any pseudo regs that are spilled. */
563
7e860cf7
RS
564#if 0 /* We need to eliminate regs even if there is no rtl code,
565 for the sake of debugging information. */
38398762 566 if (n_basic_blocks > 0)
7e860cf7 567#endif
cad6f7d0 568 {
108c535a 569 build_insn_chain (get_insns ());
cad6f7d0
BS
570 retval = reload (get_insns (), 1, file);
571 }
8c316ae2 572
67289ea6
MM
573 /* Clean up. */
574 free (reg_allocno);
575 free (reg_may_share);
576 free (allocno_reg);
577 free (allocno_size);
578 free (allocno_calls_crossed);
579 free (allocno_n_refs);
580 free (allocno_live_length);
581 free (hard_reg_conflicts);
582 free (hard_reg_preferences);
583 free (hard_reg_copy_preferences);
584 free (hard_reg_full_preferences);
585 free (regs_someone_prefers);
8c316ae2 586 free (conflicts);
67289ea6
MM
587 free (allocnos_live);
588
8c316ae2 589 return retval;
38398762
RK
590}
591
592/* Sort predicate for ordering the allocnos.
593 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
594
595static int
daa6f17d 596allocno_compare (v1p, v2p)
e1b6684c
KG
597 const PTR v1p;
598 const PTR v2p;
38398762 599{
ec0ce6e2 600 int v1 = *(const int *)v1p, v2 = *(const int *)v2p;
38398762
RK
601 /* Note that the quotient will never be bigger than
602 the value of floor_log2 times the maximum number of
603 times a register can occur in one insn (surely less than 100).
604 Multiplying this by 10000 can't overflow. */
605 register int pri1
daa6f17d
RK
606 = (((double) (floor_log2 (allocno_n_refs[v1]) * allocno_n_refs[v1])
607 / allocno_live_length[v1])
608 * 10000 * allocno_size[v1]);
38398762 609 register int pri2
daa6f17d
RK
610 = (((double) (floor_log2 (allocno_n_refs[v2]) * allocno_n_refs[v2])
611 / allocno_live_length[v2])
612 * 10000 * allocno_size[v2]);
38398762
RK
613 if (pri2 - pri1)
614 return pri2 - pri1;
615
616 /* If regs are equally good, sort by allocno,
617 so that the results of qsort leave nothing to chance. */
daa6f17d 618 return v1 - v2;
38398762
RK
619}
620\f
621/* Scan the rtl code and record all conflicts and register preferences in the
622 conflict matrices and preference tables. */
623
624static void
625global_conflicts ()
626{
627 register int b, i;
628 register rtx insn;
8d4c79be 629 int *block_start_allocnos;
38398762
RK
630
631 /* Make a vector that mark_reg_{store,clobber} will store in. */
67289ea6 632 regs_set = (rtx *) xmalloc (max_parallel * sizeof (rtx) * 2);
38398762 633
67289ea6 634 block_start_allocnos = (int *) xmalloc (max_allocno * sizeof (int));
38398762
RK
635
636 for (b = 0; b < n_basic_blocks; b++)
637 {
4c9a05bc 638 bzero ((char *) allocnos_live, allocno_row_words * sizeof (INT_TYPE));
38398762
RK
639
640 /* Initialize table of registers currently live
641 to the state at the beginning of this basic block.
642 This also marks the conflicts among them.
643
644 For pseudo-regs, there is only one bit for each one
645 no matter how many hard regs it occupies.
646 This is ok; we know the size from PSEUDO_REGNO_SIZE.
647 For explicit hard regs, we cannot know the size that way
648 since one hard reg can be used with various sizes.
649 Therefore, we must require that all the hard regs
650 implicitly live as part of a multi-word hard reg
651 are explicitly marked in basic_block_live_at_start. */
652
653 {
e881bb1b 654 register regset old = BASIC_BLOCK (b)->global_live_at_start;
38398762
RK
655 int ax = 0;
656
916b1701 657 REG_SET_TO_HARD_REG_SET (hard_regs_live, old);
1313ec9d 658 EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i,
916b1701
MM
659 {
660 register int a = reg_allocno[i];
661 if (a >= 0)
662 {
663 SET_ALLOCNO_LIVE (a);
664 block_start_allocnos[ax++] = a;
665 }
666 else if ((a = reg_renumber[i]) >= 0)
1313ec9d
RK
667 mark_reg_live_nc
668 (a, PSEUDO_REGNO_MODE (i));
916b1701 669 });
38398762
RK
670
671 /* Record that each allocno now live conflicts with each other
672 allocno now live, and with each hard reg now live. */
673
674 record_conflicts (block_start_allocnos, ax);
4d1d8045
BS
675
676#ifdef STACK_REGS
e881bb1b
RH
677 {
678 /* Pseudos can't go in stack regs at the start of a basic block
a05924f9 679 that is reached by an abnormal edge. */
e881bb1b
RH
680
681 edge e;
682 for (e = BASIC_BLOCK (b)->pred; e ; e = e->pred_next)
683 if (e->flags & EDGE_ABNORMAL)
684 break;
e881bb1b
RH
685 if (e != NULL)
686 for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++)
687 record_one_conflict (ax);
688 }
4d1d8045 689#endif
38398762
RK
690 }
691
3b413743 692 insn = BLOCK_HEAD (b);
38398762
RK
693
694 /* Scan the code of this basic block, noting which allocnos
695 and hard regs are born or die. When one is born,
696 record a conflict with all others currently live. */
697
698 while (1)
699 {
700 register RTX_CODE code = GET_CODE (insn);
701 register rtx link;
702
703 /* Make regs_set an empty set. */
704
705 n_regs_set = 0;
706
707 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
708 {
38398762
RK
709
710#if 0
2049526b 711 int i = 0;
38398762
RK
712 for (link = REG_NOTES (insn);
713 link && i < NUM_NO_CONFLICT_PAIRS;
714 link = XEXP (link, 1))
715 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
716 {
717 no_conflict_pairs[i].allocno1
718 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
719 no_conflict_pairs[i].allocno2
720 = reg_allocno[REGNO (XEXP (link, 0))];
721 i++;
722 }
723#endif /* 0 */
724
725 /* Mark any registers clobbered by INSN as live,
726 so they conflict with the inputs. */
727
84832317 728 note_stores (PATTERN (insn), mark_reg_clobber, NULL);
38398762
RK
729
730 /* Mark any registers dead after INSN as dead now. */
731
732 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
733 if (REG_NOTE_KIND (link) == REG_DEAD)
734 mark_reg_death (XEXP (link, 0));
735
736 /* Mark any registers set in INSN as live,
737 and mark them as conflicting with all other live regs.
738 Clobbers are processed again, so they conflict with
739 the registers that are set. */
740
84832317 741 note_stores (PATTERN (insn), mark_reg_store, NULL);
38398762
RK
742
743#ifdef AUTO_INC_DEC
744 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
745 if (REG_NOTE_KIND (link) == REG_INC)
84832317 746 mark_reg_store (XEXP (link, 0), NULL_RTX, NULL);
38398762
RK
747#endif
748
333e0f7d
RS
749 /* If INSN has multiple outputs, then any reg that dies here
750 and is used inside of an output
941c63ac
JL
751 must conflict with the other outputs.
752
753 It is unsafe to use !single_set here since it will ignore an
754 unused output. Just because an output is unused does not mean
755 the compiler can assume the side effect will not occur.
756 Consider if REG appears in the address of an output and we
757 reload the output. If we allocate REG to the same hard
758 register as an unused output we could set the hard register
759 before the output reload insn. */
760 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
333e0f7d
RS
761 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
762 if (REG_NOTE_KIND (link) == REG_DEAD)
763 {
764 int used_in_output = 0;
765 int i;
766 rtx reg = XEXP (link, 0);
767
768 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
769 {
770 rtx set = XVECEXP (PATTERN (insn), 0, i);
771 if (GET_CODE (set) == SET
772 && GET_CODE (SET_DEST (set)) != REG
773 && !rtx_equal_p (reg, SET_DEST (set))
774 && reg_overlap_mentioned_p (reg, SET_DEST (set)))
775 used_in_output = 1;
776 }
777 if (used_in_output)
778 mark_reg_conflicts (reg);
779 }
780
38398762
RK
781 /* Mark any registers set in INSN and then never used. */
782
783 while (n_regs_set > 0)
784 if (find_regno_note (insn, REG_UNUSED,
785 REGNO (regs_set[--n_regs_set])))
786 mark_reg_death (regs_set[n_regs_set]);
787 }
788
3b413743 789 if (insn == BLOCK_END (b))
38398762
RK
790 break;
791 insn = NEXT_INSN (insn);
792 }
793 }
67289ea6
MM
794
795 /* Clean up. */
796 free (block_start_allocnos);
797 free (regs_set);
38398762
RK
798}
799/* Expand the preference information by looking for cases where one allocno
800 dies in an insn that sets an allocno. If those two allocnos don't conflict,
801 merge any preferences between those allocnos. */
802
803static void
804expand_preferences ()
805{
806 rtx insn;
807 rtx link;
808 rtx set;
809
810 /* We only try to handle the most common cases here. Most of the cases
811 where this wins are reg-reg copies. */
812
813 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
814 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
815 && (set = single_set (insn)) != 0
816 && GET_CODE (SET_DEST (set)) == REG
817 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
818 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
819 if (REG_NOTE_KIND (link) == REG_DEAD
820 && GET_CODE (XEXP (link, 0)) == REG
821 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
822 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
267cf808 823 reg_allocno[REGNO (XEXP (link, 0))]))
38398762
RK
824 {
825 int a1 = reg_allocno[REGNO (SET_DEST (set))];
826 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
827
828 if (XEXP (link, 0) == SET_SRC (set))
829 {
830 IOR_HARD_REG_SET (hard_reg_copy_preferences[a1],
831 hard_reg_copy_preferences[a2]);
832 IOR_HARD_REG_SET (hard_reg_copy_preferences[a2],
833 hard_reg_copy_preferences[a1]);
834 }
835
836 IOR_HARD_REG_SET (hard_reg_preferences[a1],
837 hard_reg_preferences[a2]);
838 IOR_HARD_REG_SET (hard_reg_preferences[a2],
839 hard_reg_preferences[a1]);
840 IOR_HARD_REG_SET (hard_reg_full_preferences[a1],
841 hard_reg_full_preferences[a2]);
842 IOR_HARD_REG_SET (hard_reg_full_preferences[a2],
843 hard_reg_full_preferences[a1]);
844 }
845}
846\f
847/* Prune the preferences for global registers to exclude registers that cannot
848 be used.
849
850 Compute `regs_someone_prefers', which is a bitmask of the hard registers
851 that are preferred by conflicting registers of lower priority. If possible,
852 we will avoid using these registers. */
853
854static void
855prune_preferences ()
856{
857 int i, j;
858 int allocno;
267cf808 859 int *allocno_to_order = (int *) xmalloc (max_allocno * sizeof (int));
38398762
RK
860
861 /* Scan least most important to most important.
862 For each allocno, remove from preferences registers that cannot be used,
863 either because of conflicts or register type. Then compute all registers
d45cf215 864 preferred by each lower-priority register that conflicts. */
38398762
RK
865
866 for (i = max_allocno - 1; i >= 0; i--)
867 {
267cf808 868 HARD_REG_SET temp;
38398762
RK
869
870 allocno = allocno_order[i];
267cf808 871 allocno_to_order[allocno] = i;
38398762
RK
872 COPY_HARD_REG_SET (temp, hard_reg_conflicts[allocno]);
873
874 if (allocno_calls_crossed[allocno] == 0)
875 IOR_HARD_REG_SET (temp, fixed_reg_set);
876 else
877 IOR_HARD_REG_SET (temp, call_used_reg_set);
878
879 IOR_COMPL_HARD_REG_SET
880 (temp,
881 reg_class_contents[(int) reg_preferred_class (allocno_reg[allocno])]);
882
883 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], temp);
884 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], temp);
885 AND_COMPL_HARD_REG_SET (hard_reg_full_preferences[allocno], temp);
267cf808 886 }
38398762 887
267cf808
JL
888 for (i = max_allocno - 1; i >= 0; i--)
889 {
38398762
RK
890 /* Merge in the preferences of lower-priority registers (they have
891 already been pruned). If we also prefer some of those registers,
892 don't exclude them unless we are of a smaller size (in which case
893 we want to give the lower-priority allocno the first chance for
894 these registers). */
267cf808
JL
895 HARD_REG_SET temp, temp2;
896 INT_TYPE *p;
897 int allocno2, allocno3;
898
899 allocno = allocno_order[i];
900 p = conflicts + allocno * allocno_row_words;
901
ea1637e9
R
902 CLEAR_HARD_REG_SET (temp);
903 CLEAR_HARD_REG_SET (temp2);
267cf808
JL
904
905 for (j = allocno_row_words - 1, allocno2 = 0; j >= 0;
906 j--, allocno2 += INT_BITS)
907 {
908 unsigned INT_TYPE word = (unsigned INT_TYPE) *p++;
909
910 for (allocno3 = allocno2; word; word >>= 1, allocno3++)
911 {
912 if ((word & 1) && allocno_to_order[allocno3] > i)
913 {
914 if (allocno_size[allocno3] <= allocno_size[allocno])
915 IOR_HARD_REG_SET (temp,
916 hard_reg_full_preferences[allocno3]);
917 else
918 IOR_HARD_REG_SET (temp2,
919 hard_reg_full_preferences[allocno3]);
920 }
921 }
922 }
923
ea1637e9
R
924 AND_COMPL_HARD_REG_SET (temp, hard_reg_full_preferences[allocno]);
925 IOR_HARD_REG_SET (temp, temp2);
926 COPY_HARD_REG_SET (regs_someone_prefers[allocno], temp);
38398762 927 }
267cf808 928 free (allocno_to_order);
38398762
RK
929}
930\f
931/* Assign a hard register to ALLOCNO; look for one that is the beginning
932 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
933 The registers marked in PREFREGS are tried first.
934
935 LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot
936 be used for this allocation.
937
b1ec3c92
CH
938 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
939 Otherwise ignore that preferred class and use the alternate class.
38398762
RK
940
941 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
942 will have to be saved and restored at calls.
943
1d56e983
RS
944 RETRYING is nonzero if this is called from retry_global_alloc.
945
38398762
RK
946 If we find one, record it in reg_renumber.
947 If not, do nothing. */
948
949static void
b1ec3c92 950find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying)
38398762
RK
951 int allocno;
952 HARD_REG_SET losers;
b1ec3c92 953 int alt_regs_p;
38398762 954 int accept_call_clobbered;
1d56e983 955 int retrying;
38398762
RK
956{
957 register int i, best_reg, pass;
958#ifdef HARD_REG_SET
959 register /* Declare it register if it's a scalar. */
960#endif
1d56e983 961 HARD_REG_SET used, used1, used2;
38398762 962
b1ec3c92
CH
963 enum reg_class class = (alt_regs_p
964 ? reg_alternate_class (allocno_reg[allocno])
965 : reg_preferred_class (allocno_reg[allocno]));
38398762
RK
966 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno_reg[allocno]);
967
968 if (accept_call_clobbered)
969 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
970 else if (allocno_calls_crossed[allocno] == 0)
971 COPY_HARD_REG_SET (used1, fixed_reg_set);
972 else
973 COPY_HARD_REG_SET (used1, call_used_reg_set);
974
975 /* Some registers should not be allocated in global-alloc. */
976 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
977 if (losers)
978 IOR_HARD_REG_SET (used1, losers);
979
980 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1d56e983
RS
981 COPY_HARD_REG_SET (used2, used1);
982
38398762
RK
983 IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]);
984
d546b10a 985#ifdef CLASS_CANNOT_CHANGE_SIZE
b1f21e0a 986 if (REG_CHANGES_SIZE (allocno_reg[allocno]))
d546b10a
RK
987 IOR_HARD_REG_SET (used1,
988 reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
989#endif
990
38398762 991 /* Try each hard reg to see if it fits. Do this in two passes.
d45cf215 992 In the first pass, skip registers that are preferred by some other pseudo
38398762
RK
993 to give it a better chance of getting one of those registers. Only if
994 we can't get a register when excluding those do we take one of them.
995 However, we never allocate a register for the first time in pass 0. */
996
997 COPY_HARD_REG_SET (used, used1);
998 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
999 IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]);
1000
1001 best_reg = -1;
1002 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
1003 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
1004 pass++)
1005 {
1006 if (pass == 1)
1007 COPY_HARD_REG_SET (used, used1);
1008 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1009 {
1010#ifdef REG_ALLOC_ORDER
1011 int regno = reg_alloc_order[i];
1012#else
1013 int regno = i;
1014#endif
1015 if (! TEST_HARD_REG_BIT (used, regno)
1e326708
MH
1016 && HARD_REGNO_MODE_OK (regno, mode)
1017 && (allocno_calls_crossed[allocno] == 0
1018 || accept_call_clobbered
1019 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
38398762
RK
1020 {
1021 register int j;
1022 register int lim = regno + HARD_REGNO_NREGS (regno, mode);
1023 for (j = regno + 1;
1024 (j < lim
1025 && ! TEST_HARD_REG_BIT (used, j));
1026 j++);
1027 if (j == lim)
1028 {
1029 best_reg = regno;
1030 break;
1031 }
1032#ifndef REG_ALLOC_ORDER
1033 i = j; /* Skip starting points we know will lose */
1034#endif
1035 }
1036 }
1037 }
1038
1039 /* See if there is a preferred register with the same class as the register
1040 we allocated above. Making this restriction prevents register
1041 preferencing from creating worse register allocation.
1042
1043 Remove from the preferred registers and conflicting registers. Note that
1044 additional conflicts may have been added after `prune_preferences' was
1045 called.
1046
1047 First do this for those register with copy preferences, then all
1048 preferred registers. */
1049
1050 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], used);
1051 GO_IF_HARD_REG_SUBSET (hard_reg_copy_preferences[allocno],
1052 reg_class_contents[(int) NO_REGS], no_copy_prefs);
1053
1054 if (best_reg >= 0)
1055 {
1056 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1057 if (TEST_HARD_REG_BIT (hard_reg_copy_preferences[allocno], i)
1058 && HARD_REGNO_MODE_OK (i, mode)
1059 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1060 || reg_class_subset_p (REGNO_REG_CLASS (i),
1061 REGNO_REG_CLASS (best_reg))
1062 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1063 REGNO_REG_CLASS (i))))
1064 {
1065 register int j;
1066 register int lim = i + HARD_REGNO_NREGS (i, mode);
1067 for (j = i + 1;
1068 (j < lim
1069 && ! TEST_HARD_REG_BIT (used, j)
1070 && (REGNO_REG_CLASS (j)
1071 == REGNO_REG_CLASS (best_reg + (j - i))
1072 || reg_class_subset_p (REGNO_REG_CLASS (j),
1073 REGNO_REG_CLASS (best_reg + (j - i)))
1074 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1075 REGNO_REG_CLASS (j))));
1076 j++);
1077 if (j == lim)
1078 {
1079 best_reg = i;
1080 goto no_prefs;
1081 }
1082 }
1083 }
1084 no_copy_prefs:
1085
1086 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], used);
1087 GO_IF_HARD_REG_SUBSET (hard_reg_preferences[allocno],
1088 reg_class_contents[(int) NO_REGS], no_prefs);
1089
1090 if (best_reg >= 0)
1091 {
1092 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1093 if (TEST_HARD_REG_BIT (hard_reg_preferences[allocno], i)
1094 && HARD_REGNO_MODE_OK (i, mode)
1095 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1096 || reg_class_subset_p (REGNO_REG_CLASS (i),
1097 REGNO_REG_CLASS (best_reg))
1098 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1099 REGNO_REG_CLASS (i))))
1100 {
1101 register int j;
1102 register int lim = i + HARD_REGNO_NREGS (i, mode);
1103 for (j = i + 1;
1104 (j < lim
1105 && ! TEST_HARD_REG_BIT (used, j)
1106 && (REGNO_REG_CLASS (j)
1107 == REGNO_REG_CLASS (best_reg + (j - i))
1108 || reg_class_subset_p (REGNO_REG_CLASS (j),
1109 REGNO_REG_CLASS (best_reg + (j - i)))
1110 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1111 REGNO_REG_CLASS (j))));
1112 j++);
1113 if (j == lim)
1114 {
1115 best_reg = i;
1116 break;
1117 }
1118 }
1119 }
1120 no_prefs:
1121
cfcf04a6
RK
1122 /* If we haven't succeeded yet, try with caller-saves.
1123 We need not check to see if the current function has nonlocal
1124 labels because we don't put any pseudos that are live over calls in
1125 registers in that case. */
1126
1d56e983
RS
1127 if (flag_caller_saves && best_reg < 0)
1128 {
1129 /* Did not find a register. If it would be profitable to
1130 allocate a call-clobbered register and save and restore it
1131 around calls, do that. */
1132 if (! accept_call_clobbered
1133 && allocno_calls_crossed[allocno] != 0
1134 && CALLER_SAVE_PROFITABLE (allocno_n_refs[allocno],
1135 allocno_calls_crossed[allocno]))
1136 {
6cad67d2
JL
1137 HARD_REG_SET new_losers;
1138 if (! losers)
1139 CLEAR_HARD_REG_SET (new_losers);
1140 else
1141 COPY_HARD_REG_SET (new_losers, losers);
1142
1143 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1144 find_reg (allocno, new_losers, alt_regs_p, 1, retrying);
1d56e983
RS
1145 if (reg_renumber[allocno_reg[allocno]] >= 0)
1146 {
1147 caller_save_needed = 1;
1148 return;
1149 }
1150 }
1151 }
1152
1153 /* If we haven't succeeded yet,
1154 see if some hard reg that conflicts with us
1155 was utilized poorly by local-alloc.
1156 If so, kick out the regs that were put there by local-alloc
1157 so we can use it instead. */
1158 if (best_reg < 0 && !retrying
1159 /* Let's not bother with multi-reg allocnos. */
1160 && allocno_size[allocno] == 1)
1161 {
1162 /* Count from the end, to find the least-used ones first. */
1163 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
17a0a76d
RK
1164 {
1165#ifdef REG_ALLOC_ORDER
1166 int regno = reg_alloc_order[i];
1167#else
1168 int regno = i;
1169#endif
34e56753 1170
17a0a76d
RK
1171 if (local_reg_n_refs[regno] != 0
1172 /* Don't use a reg no good for this pseudo. */
1173 && ! TEST_HARD_REG_BIT (used2, regno)
d546b10a
RK
1174 && HARD_REGNO_MODE_OK (regno, mode)
1175#ifdef CLASS_CANNOT_CHANGE_SIZE
b1f21e0a 1176 && ! (REG_CHANGES_SIZE (allocno_reg[allocno])
d546b10a
RK
1177 && (TEST_HARD_REG_BIT
1178 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1179 regno)))
1180#endif
1181 )
17a0a76d 1182 {
7a17c588
JW
1183 /* We explicitly evaluate the divide results into temporary
1184 variables so as to avoid excess precision problems that occur
1185 on a i386-unknown-sysv4.2 (unixware) host. */
1186
1187 double tmp1 = ((double) local_reg_n_refs[regno]
1188 / local_reg_live_length[regno]);
1189 double tmp2 = ((double) allocno_n_refs[allocno]
1190 / allocno_live_length[allocno]);
1191
1192 if (tmp1 < tmp2)
1193 {
1194 /* Hard reg REGNO was used less in total by local regs
1195 than it would be used by this one allocno! */
1196 int k;
1197 for (k = 0; k < max_regno; k++)
1198 if (reg_renumber[k] >= 0)
1199 {
1200 int r = reg_renumber[k];
1201 int endregno
1202 = r + HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (k));
34e56753 1203
7a17c588
JW
1204 if (regno >= r && regno < endregno)
1205 reg_renumber[k] = -1;
1206 }
17a0a76d 1207
7a17c588
JW
1208 best_reg = regno;
1209 break;
1210 }
17a0a76d
RK
1211 }
1212 }
1d56e983
RS
1213 }
1214
38398762
RK
1215 /* Did we find a register? */
1216
1217 if (best_reg >= 0)
1218 {
1219 register int lim, j;
1220 HARD_REG_SET this_reg;
1221
1222 /* Yes. Record it as the hard register of this pseudo-reg. */
1223 reg_renumber[allocno_reg[allocno]] = best_reg;
1224 /* Also of any pseudo-regs that share with it. */
1225 if (reg_may_share[allocno_reg[allocno]])
1226 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
1227 if (reg_allocno[j] == allocno)
1228 reg_renumber[j] = best_reg;
1229
1230 /* Make a set of the hard regs being allocated. */
1231 CLEAR_HARD_REG_SET (this_reg);
1232 lim = best_reg + HARD_REGNO_NREGS (best_reg, mode);
1233 for (j = best_reg; j < lim; j++)
1234 {
1235 SET_HARD_REG_BIT (this_reg, j);
1236 SET_HARD_REG_BIT (regs_used_so_far, j);
1d56e983
RS
1237 /* This is no longer a reg used just by local regs. */
1238 local_reg_n_refs[j] = 0;
38398762
RK
1239 }
1240 /* For each other pseudo-reg conflicting with this one,
1241 mark it as conflicting with the hard regs this one occupies. */
1242 lim = allocno;
1243 for (j = 0; j < max_allocno; j++)
267cf808 1244 if (CONFLICTP (j, lim))
38398762
RK
1245 {
1246 IOR_HARD_REG_SET (hard_reg_conflicts[j], this_reg);
1247 }
1248 }
38398762
RK
1249}
1250\f
1251/* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1252 Perhaps it had previously seemed not worth a hard reg,
1253 or perhaps its old hard reg has been commandeered for reloads.
1254 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1255 they do not appear to be allocated.
1256 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1257
1258void
1259retry_global_alloc (regno, forbidden_regs)
1260 int regno;
1261 HARD_REG_SET forbidden_regs;
1262{
1263 int allocno = reg_allocno[regno];
1264 if (allocno >= 0)
1265 {
1266 /* If we have more than one register class,
1267 first try allocating in the class that is cheapest
1268 for this pseudo-reg. If that fails, try any reg. */
1269 if (N_REG_CLASSES > 1)
1d56e983 1270 find_reg (allocno, forbidden_regs, 0, 0, 1);
38398762 1271 if (reg_renumber[regno] < 0
b1ec3c92 1272 && reg_alternate_class (regno) != NO_REGS)
1d56e983 1273 find_reg (allocno, forbidden_regs, 1, 0, 1);
38398762
RK
1274
1275 /* If we found a register, modify the RTL for the register to
1276 show the hard register, and mark that register live. */
1277 if (reg_renumber[regno] >= 0)
1278 {
1279 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1280 mark_home_live (regno);
1281 }
1282 }
1283}
1284\f
1285/* Record a conflict between register REGNO
1286 and everything currently live.
1287 REGNO must not be a pseudo reg that was allocated
1288 by local_alloc; such numbers must be translated through
1289 reg_renumber before calling here. */
1290
1291static void
1292record_one_conflict (regno)
1293 int regno;
1294{
1295 register int j;
1296
1297 if (regno < FIRST_PSEUDO_REGISTER)
1298 /* When a hard register becomes live,
1299 record conflicts with live pseudo regs. */
1300 for (j = 0; j < max_allocno; j++)
1301 {
1302 if (ALLOCNO_LIVE_P (j))
1303 SET_HARD_REG_BIT (hard_reg_conflicts[j], regno);
1304 }
1305 else
1306 /* When a pseudo-register becomes live,
1307 record conflicts first with hard regs,
1308 then with other pseudo regs. */
1309 {
1310 register int ialloc = reg_allocno[regno];
1311 register int ialloc_prod = ialloc * allocno_row_words;
1312 IOR_HARD_REG_SET (hard_reg_conflicts[ialloc], hard_regs_live);
1313 for (j = allocno_row_words - 1; j >= 0; j--)
1314 {
1315#if 0
1316 int k;
1317 for (k = 0; k < n_no_conflict_pairs; k++)
1318 if (! ((j == no_conflict_pairs[k].allocno1
1319 && ialloc == no_conflict_pairs[k].allocno2)
1320 ||
1321 (j == no_conflict_pairs[k].allocno2
1322 && ialloc == no_conflict_pairs[k].allocno1)))
1323#endif /* 0 */
1324 conflicts[ialloc_prod + j] |= allocnos_live[j];
1325 }
1326 }
1327}
1328
1329/* Record all allocnos currently live as conflicting
1330 with each other and with all hard regs currently live.
1331 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1332 are currently live. Their bits are also flagged in allocnos_live. */
1333
1334static void
1335record_conflicts (allocno_vec, len)
8d4c79be 1336 register int *allocno_vec;
38398762
RK
1337 register int len;
1338{
1339 register int allocno;
1340 register int j;
1341 register int ialloc_prod;
1342
1343 while (--len >= 0)
1344 {
1345 allocno = allocno_vec[len];
1346 ialloc_prod = allocno * allocno_row_words;
1347 IOR_HARD_REG_SET (hard_reg_conflicts[allocno], hard_regs_live);
1348 for (j = allocno_row_words - 1; j >= 0; j--)
1349 conflicts[ialloc_prod + j] |= allocnos_live[j];
1350 }
1351}
267cf808
JL
1352
1353/* If CONFLICTP (i, j) is true, make sure CONFLICTP (j, i) is also true. */
1354static void
1355mirror_conflicts ()
1356{
1357 register int i, j;
1358 int rw = allocno_row_words;
1359 int rwb = rw * INT_BITS;
1360 INT_TYPE *p = conflicts;
1361 INT_TYPE *q0 = conflicts, *q1, *q2;
1362 unsigned INT_TYPE mask;
1363
1364 for (i = max_allocno - 1, mask = 1; i >= 0; i--, mask <<= 1)
1365 {
1366 if (! mask)
1367 {
1368 mask = 1;
1369 q0++;
1370 }
1371 for (j = allocno_row_words - 1, q1 = q0; j >= 0; j--, q1 += rwb)
1372 {
1373 unsigned INT_TYPE word;
1374
1375 for (word = (unsigned INT_TYPE) *p++, q2 = q1; word;
1376 word >>= 1, q2 += rw)
1377 {
1378 if (word & 1)
1379 *q2 |= mask;
1380 }
1381 }
1382 }
1383}
38398762
RK
1384\f
1385/* Handle the case where REG is set by the insn being scanned,
1386 during the forward scan to accumulate conflicts.
1387 Store a 1 in regs_live or allocnos_live for this register, record how many
1388 consecutive hardware registers it actually needs,
1389 and record a conflict with all other registers already live.
1390
1391 Note that even if REG does not remain alive after this insn,
1392 we must mark it here as live, to ensure a conflict between
1393 REG and any other regs set in this insn that really do live.
1394 This is because those other regs could be considered after this.
1395
1396 REG might actually be something other than a register;
1397 if so, we do nothing.
1398
1399 SETTER is 0 if this register was modified by an auto-increment (i.e.,
a4c3ddd8 1400 a REG_INC note was found for it). */
38398762
RK
1401
1402static void
84832317 1403mark_reg_store (reg, setter, data)
a4c3ddd8 1404 rtx reg, setter;
84832317 1405 void *data ATTRIBUTE_UNUSED;
38398762
RK
1406{
1407 register int regno;
38398762
RK
1408
1409 /* WORD is which word of a multi-register group is being stored.
1410 For the case where the store is actually into a SUBREG of REG.
1411 Except we don't use it; I believe the entire REG needs to be
1412 made live. */
1413 int word = 0;
1414
1415 if (GET_CODE (reg) == SUBREG)
1416 {
1417 word = SUBREG_WORD (reg);
1418 reg = SUBREG_REG (reg);
1419 }
1420
1421 if (GET_CODE (reg) != REG)
1422 return;
1423
38398762
RK
1424 regs_set[n_regs_set++] = reg;
1425
a4c3ddd8 1426 if (setter && GET_CODE (setter) != CLOBBER)
38398762
RK
1427 set_preference (reg, SET_SRC (setter));
1428
1429 regno = REGNO (reg);
1430
38398762
RK
1431 /* Either this is one of the max_allocno pseudo regs not allocated,
1432 or it is or has a hardware reg. First handle the pseudo-regs. */
1433 if (regno >= FIRST_PSEUDO_REGISTER)
1434 {
1435 if (reg_allocno[regno] >= 0)
1436 {
1437 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1438 record_one_conflict (regno);
1439 }
1440 }
a300b8d9
JW
1441
1442 if (reg_renumber[regno] >= 0)
1443 regno = reg_renumber[regno] /* + word */;
1444
38398762 1445 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1446 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1447 {
1448 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1449 while (regno < last)
1450 {
1451 record_one_conflict (regno);
1452 SET_HARD_REG_BIT (hard_regs_live, regno);
1453 regno++;
1454 }
1455 }
1456}
1457\f
1458/* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */
1459
1460static void
84832317 1461mark_reg_clobber (reg, setter, data)
38398762 1462 rtx reg, setter;
84832317 1463 void *data ATTRIBUTE_UNUSED;
38398762 1464{
a4c3ddd8 1465 if (GET_CODE (setter) == CLOBBER)
84832317 1466 mark_reg_store (reg, setter, data);
333e0f7d
RS
1467}
1468
1469/* Record that REG has conflicts with all the regs currently live.
1470 Do not mark REG itself as live. */
1471
1472static void
1473mark_reg_conflicts (reg)
1474 rtx reg;
1475{
1476 register int regno;
1477
1478 if (GET_CODE (reg) == SUBREG)
1479 reg = SUBREG_REG (reg);
1480
1481 if (GET_CODE (reg) != REG)
1482 return;
1483
1484 regno = REGNO (reg);
1485
333e0f7d
RS
1486 /* Either this is one of the max_allocno pseudo regs not allocated,
1487 or it is or has a hardware reg. First handle the pseudo-regs. */
1488 if (regno >= FIRST_PSEUDO_REGISTER)
1489 {
1490 if (reg_allocno[regno] >= 0)
1491 record_one_conflict (regno);
1492 }
a300b8d9
JW
1493
1494 if (reg_renumber[regno] >= 0)
1495 regno = reg_renumber[regno];
1496
333e0f7d 1497 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1498 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
333e0f7d
RS
1499 {
1500 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1501 while (regno < last)
1502 {
1503 record_one_conflict (regno);
1504 regno++;
1505 }
1506 }
38398762
RK
1507}
1508\f
1509/* Mark REG as being dead (following the insn being scanned now).
1510 Store a 0 in regs_live or allocnos_live for this register. */
1511
1512static void
1513mark_reg_death (reg)
1514 rtx reg;
1515{
1516 register int regno = REGNO (reg);
1517
38398762
RK
1518 /* Either this is one of the max_allocno pseudo regs not allocated,
1519 or it is a hardware reg. First handle the pseudo-regs. */
1520 if (regno >= FIRST_PSEUDO_REGISTER)
1521 {
1522 if (reg_allocno[regno] >= 0)
1523 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1524 }
a300b8d9
JW
1525
1526 /* For pseudo reg, see if it has been assigned a hardware reg. */
1527 if (reg_renumber[regno] >= 0)
1528 regno = reg_renumber[regno];
1529
38398762 1530 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1531 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1532 {
1533 /* Pseudo regs already assigned hardware regs are treated
1534 almost the same as explicit hardware regs. */
1535 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1536 while (regno < last)
1537 {
1538 CLEAR_HARD_REG_BIT (hard_regs_live, regno);
1539 regno++;
1540 }
1541 }
1542}
1543
1544/* Mark hard reg REGNO as currently live, assuming machine mode MODE
1545 for the value stored in it. MODE determines how many consecutive
1546 registers are actually in use. Do not record conflicts;
1547 it is assumed that the caller will do that. */
1548
1549static void
1550mark_reg_live_nc (regno, mode)
1551 register int regno;
1552 enum machine_mode mode;
1553{
1554 register int last = regno + HARD_REGNO_NREGS (regno, mode);
1555 while (regno < last)
1556 {
1557 SET_HARD_REG_BIT (hard_regs_live, regno);
1558 regno++;
1559 }
1560}
1561\f
1562/* Try to set a preference for an allocno to a hard register.
1563 We are passed DEST and SRC which are the operands of a SET. It is known
1564 that SRC is a register. If SRC or the first operand of SRC is a register,
1565 try to set a preference. If one of the two is a hard register and the other
1566 is a pseudo-register, mark the preference.
1567
6dc42e49 1568 Note that we are not as aggressive as local-alloc in trying to tie a
38398762
RK
1569 pseudo-register to a hard register. */
1570
1571static void
1572set_preference (dest, src)
1573 rtx dest, src;
1574{
1575 int src_regno, dest_regno;
1576 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1577 to compensate for subregs in SRC or DEST. */
1578 int offset = 0;
1579 int i;
1580 int copy = 1;
1581
1582 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1583 src = XEXP (src, 0), copy = 0;
1584
1585 /* Get the reg number for both SRC and DEST.
1586 If neither is a reg, give up. */
1587
1588 if (GET_CODE (src) == REG)
1589 src_regno = REGNO (src);
1590 else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG)
1591 {
1592 src_regno = REGNO (SUBREG_REG (src));
1593 offset += SUBREG_WORD (src);
1594 }
1595 else
1596 return;
1597
1598 if (GET_CODE (dest) == REG)
1599 dest_regno = REGNO (dest);
1600 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
1601 {
1602 dest_regno = REGNO (SUBREG_REG (dest));
1603 offset -= SUBREG_WORD (dest);
1604 }
1605 else
1606 return;
1607
1608 /* Convert either or both to hard reg numbers. */
1609
1610 if (reg_renumber[src_regno] >= 0)
1611 src_regno = reg_renumber[src_regno];
1612
1613 if (reg_renumber[dest_regno] >= 0)
1614 dest_regno = reg_renumber[dest_regno];
1615
1616 /* Now if one is a hard reg and the other is a global pseudo
1617 then give the other a preference. */
1618
1619 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1620 && reg_allocno[src_regno] >= 0)
1621 {
1622 dest_regno -= offset;
1623 if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER)
1624 {
1625 if (copy)
1626 SET_REGBIT (hard_reg_copy_preferences,
1627 reg_allocno[src_regno], dest_regno);
1628
1629 SET_REGBIT (hard_reg_preferences,
1630 reg_allocno[src_regno], dest_regno);
1631 for (i = dest_regno;
1632 i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest));
1633 i++)
1634 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1635 }
1636 }
1637
1638 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1639 && reg_allocno[dest_regno] >= 0)
1640 {
1641 src_regno += offset;
1642 if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER)
1643 {
1644 if (copy)
1645 SET_REGBIT (hard_reg_copy_preferences,
1646 reg_allocno[dest_regno], src_regno);
1647
1648 SET_REGBIT (hard_reg_preferences,
1649 reg_allocno[dest_regno], src_regno);
1650 for (i = src_regno;
1651 i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src));
1652 i++)
1653 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1654 }
1655 }
1656}
1657\f
1658/* Indicate that hard register number FROM was eliminated and replaced with
1659 an offset from hard register number TO. The status of hard registers live
1660 at the start of a basic block is updated by replacing a use of FROM with
1661 a use of TO. */
1662
1663void
1664mark_elimination (from, to)
1665 int from, to;
1666{
1667 int i;
1668
1669 for (i = 0; i < n_basic_blocks; i++)
e881bb1b
RH
1670 {
1671 register regset r = BASIC_BLOCK (i)->global_live_at_start;
1672 if (REGNO_REG_SET_P (r, from))
1673 {
1674 CLEAR_REGNO_REG_SET (r, from);
1675 SET_REGNO_REG_SET (r, to);
1676 }
1677 }
38398762
RK
1678}
1679\f
cad6f7d0
BS
1680/* Used for communication between the following functions. Holds the
1681 current life information. */
1682static regset live_relevant_regs;
1683
1684/* Record in live_relevant_regs that register REG became live. This
1685 is called via note_stores. */
1686static void
84832317 1687reg_becomes_live (reg, setter, data)
cad6f7d0
BS
1688 rtx reg;
1689 rtx setter ATTRIBUTE_UNUSED;
84832317 1690 void *data ATTRIBUTE_UNUSED;
cad6f7d0
BS
1691{
1692 int regno;
1693
1694 if (GET_CODE (reg) == SUBREG)
1695 reg = SUBREG_REG (reg);
1696
1697 if (GET_CODE (reg) != REG)
1698 return;
1699
1700 regno = REGNO (reg);
1701 if (regno < FIRST_PSEUDO_REGISTER)
1702 {
1703 int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1704 while (nregs-- > 0)
1705 SET_REGNO_REG_SET (live_relevant_regs, regno++);
1706 }
1707 else if (reg_renumber[regno] >= 0)
1708 SET_REGNO_REG_SET (live_relevant_regs, regno);
1709}
1710
1711/* Record in live_relevant_regs that register REGNO died. */
1712static void
1713reg_dies (regno, mode)
1714 int regno;
1715 enum machine_mode mode;
1716{
1717 if (regno < FIRST_PSEUDO_REGISTER)
1718 {
1719 int nregs = HARD_REGNO_NREGS (regno, mode);
1720 while (nregs-- > 0)
1721 CLEAR_REGNO_REG_SET (live_relevant_regs, regno++);
1722 }
1723 else
1724 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1725}
1726
1727/* Walk the insns of the current function and build reload_insn_chain,
1728 and record register life information. */
1729static void
108c535a
RH
1730build_insn_chain (first)
1731 rtx first;
cad6f7d0
BS
1732{
1733 struct insn_chain **p = &reload_insn_chain;
1734 struct insn_chain *prev = 0;
108c535a 1735 int b = 0;
cad6f7d0
BS
1736
1737 live_relevant_regs = ALLOCA_REG_SET ();
1738
108c535a 1739 for (; first; first = NEXT_INSN (first))
cad6f7d0 1740 {
108c535a 1741 struct insn_chain *c;
cad6f7d0 1742
108c535a 1743 if (first == BLOCK_HEAD (b))
cad6f7d0 1744 {
108c535a 1745 int i;
267cf808 1746
108c535a 1747 CLEAR_REG_SET (live_relevant_regs);
267cf808
JL
1748
1749 EXECUTE_IF_SET_IN_BITMAP
1750 (BASIC_BLOCK (b)->global_live_at_start, 0, i,
1751 {
1752 if (i < FIRST_PSEUDO_REGISTER
1753 ? ! TEST_HARD_REG_BIT (eliminable_regset, i)
1754 : reg_renumber[i] >= 0)
1755 SET_REGNO_REG_SET (live_relevant_regs, i);
1756 });
1757 }
108c535a
RH
1758
1759 if (GET_CODE (first) != NOTE && GET_CODE (first) != BARRIER)
021d1677 1760 {
108c535a
RH
1761 c = new_insn_chain ();
1762 c->prev = prev;
1763 prev = c;
1764 *p = c;
1765 p = &c->next;
1766 c->insn = first;
1767 c->block = b;
1768
1769 COPY_REG_SET (c->live_before, live_relevant_regs);
cad6f7d0 1770
108c535a 1771 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
cad6f7d0 1772 {
108c535a 1773 rtx link;
cad6f7d0 1774
108c535a 1775 /* Mark the death of everything that dies in this instruction. */
cad6f7d0 1776
108c535a
RH
1777 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1778 if (REG_NOTE_KIND (link) == REG_DEAD
1779 && GET_CODE (XEXP (link, 0)) == REG)
1780 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)));
cad6f7d0 1781
108c535a 1782 /* Mark everything born in this instruction as live. */
cad6f7d0 1783
84832317 1784 note_stores (PATTERN (first), reg_becomes_live, NULL);
cad6f7d0 1785 }
3663a304 1786
108c535a
RH
1787 /* Remember which registers are live at the end of the insn, before
1788 killing those with REG_UNUSED notes. */
1789 COPY_REG_SET (c->live_after, live_relevant_regs);
1790
1791 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
1792 {
1793 rtx link;
1794
1795 /* Mark anything that is set in this insn and then unused as dying. */
1796
1797 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1798 if (REG_NOTE_KIND (link) == REG_UNUSED
1799 && GET_CODE (XEXP (link, 0)) == REG)
1800 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)));
1801 }
3663a304 1802 }
021d1677 1803
108c535a
RH
1804 if (first == BLOCK_END (b))
1805 b++;
1806
1807 /* Stop after we pass the end of the last basic block. Verify that
1808 no real insns are after the end of the last basic block.
1809
1810 We may want to reorganize the loop somewhat since this test should
1811 always be the right exit test. */
1812 if (b == n_basic_blocks)
1813 {
1814 for (first = NEXT_INSN (first) ; first; first = NEXT_INSN (first))
1815 if (GET_RTX_CLASS (GET_CODE (first)) == 'i'
1816 && GET_CODE (PATTERN (first)) != USE)
1817 abort ();
1818 break;
1819 }
1820 }
cad6f7d0
BS
1821 FREE_REG_SET (live_relevant_regs);
1822 *p = 0;
1823}
1824\f
318e4b56 1825/* Print debugging trace information if -dg switch is given,
38398762
RK
1826 showing the information on which the allocation decisions are based. */
1827
1828static void
1829dump_conflicts (file)
1830 FILE *file;
1831{
1832 register int i;
1833 register int has_preferences;
a300b8d9
JW
1834 register int nregs;
1835 nregs = 0;
1836 for (i = 0; i < max_allocno; i++)
1837 {
1838 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
1839 continue;
1840 nregs++;
1841 }
1842 fprintf (file, ";; %d regs to allocate:", nregs);
38398762
RK
1843 for (i = 0; i < max_allocno; i++)
1844 {
1845 int j;
a300b8d9
JW
1846 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
1847 continue;
38398762
RK
1848 fprintf (file, " %d", allocno_reg[allocno_order[i]]);
1849 for (j = 0; j < max_regno; j++)
1850 if (reg_allocno[j] == allocno_order[i]
1851 && j != allocno_reg[allocno_order[i]])
1852 fprintf (file, "+%d", j);
1853 if (allocno_size[allocno_order[i]] != 1)
1854 fprintf (file, " (%d)", allocno_size[allocno_order[i]]);
1855 }
1856 fprintf (file, "\n");
1857
1858 for (i = 0; i < max_allocno; i++)
1859 {
1860 register int j;
1861 fprintf (file, ";; %d conflicts:", allocno_reg[i]);
1862 for (j = 0; j < max_allocno; j++)
267cf808 1863 if (CONFLICTP (j, i))
38398762
RK
1864 fprintf (file, " %d", allocno_reg[j]);
1865 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1866 if (TEST_HARD_REG_BIT (hard_reg_conflicts[i], j))
1867 fprintf (file, " %d", j);
1868 fprintf (file, "\n");
1869
1870 has_preferences = 0;
1871 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1872 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1873 has_preferences = 1;
1874
1875 if (! has_preferences)
1876 continue;
1877 fprintf (file, ";; %d preferences:", allocno_reg[i]);
1878 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1879 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1880 fprintf (file, " %d", j);
1881 fprintf (file, "\n");
1882 }
1883 fprintf (file, "\n");
1884}
1885
1886void
1887dump_global_regs (file)
1888 FILE *file;
1889{
1890 register int i, j;
1891
1892 fprintf (file, ";; Register dispositions:\n");
1893 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1894 if (reg_renumber[i] >= 0)
1895 {
1896 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1897 if (++j % 6 == 0)
1898 fprintf (file, "\n");
1899 }
1900
1901 fprintf (file, "\n\n;; Hard regs used: ");
1902 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1903 if (regs_ever_live[i])
1904 fprintf (file, " %d", i);
1905 fprintf (file, "\n\n");
1906}
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