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38398762 1/* Allocate registers for pseudo-registers that span basic blocks.
a5cad800 2 Copyright (C) 1987, 88, 91, 94, 96-98, 1999 Free Software Foundation, Inc.
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3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
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18the Free Software Foundation, 59 Temple Place - Suite 330,
19Boston, MA 02111-1307, USA. */
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20
21
38398762 22#include "config.h"
670ee920 23#include "system.h"
ccd043a9 24
f6781658
L
25#include "machmode.h"
26#include "hard-reg-set.h"
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27#include "rtl.h"
28#include "flags.h"
29#include "basic-block.h"
38398762 30#include "regs.h"
49ad7cfa 31#include "function.h"
38398762 32#include "insn-config.h"
cad6f7d0 33#include "reload.h"
38398762 34#include "output.h"
2e107e9e 35#include "toplev.h"
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36
37/* This pass of the compiler performs global register allocation.
38 It assigns hard register numbers to all the pseudo registers
39 that were not handled in local_alloc. Assignments are recorded
40 in the vector reg_renumber, not by changing the rtl code.
41 (Such changes are made by final). The entry point is
42 the function global_alloc.
43
44 After allocation is complete, the reload pass is run as a subroutine
45 of this pass, so that when a pseudo reg loses its hard reg due to
46 spilling it is possible to make a second attempt to find a hard
47 reg for it. The reload pass is independent in other respects
48 and it is run even when stupid register allocation is in use.
49
a300b8d9
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50 1. Assign allocation-numbers (allocnos) to the pseudo-registers
51 still needing allocations and to the pseudo-registers currently
52 allocated by local-alloc which may be spilled by reload.
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53 Set up tables reg_allocno and allocno_reg to map
54 reg numbers to allocnos and vice versa.
55 max_allocno gets the number of allocnos in use.
56
57 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it.
58 Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix
59 for conflicts between allocnos and explicit hard register use
60 (which includes use of pseudo-registers allocated by local_alloc).
61
a300b8d9 62 3. For each basic block
38398762 63 walk forward through the block, recording which
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64 pseudo-registers and which hardware registers are live.
65 Build the conflict matrix between the pseudo-registers
66 and another of pseudo-registers versus hardware registers.
38398762 67 Also record the preferred hardware registers
a300b8d9 68 for each pseudo-register.
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69
70 4. Sort a table of the allocnos into order of
71 desirability of the variables.
72
73 5. Allocate the variables in that order; each if possible into
74 a preferred register, else into another register. */
75\f
a300b8d9 76/* Number of pseudo-registers which are candidates for allocation. */
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77
78static int max_allocno;
79
80/* Indexed by (pseudo) reg number, gives the allocno, or -1
a300b8d9 81 for pseudo registers which are not to be allocated. */
38398762 82
f15ebf65 83static int *reg_allocno;
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84
85/* Indexed by allocno, gives the reg number. */
86
87static int *allocno_reg;
88
89/* A vector of the integers from 0 to max_allocno-1,
90 sorted in the order of first-to-be-allocated first. */
91
92static int *allocno_order;
93
94/* Indexed by an allocno, gives the number of consecutive
95 hard registers needed by that pseudo reg. */
96
97static int *allocno_size;
98
99/* Indexed by (pseudo) reg number, gives the number of another
6dc42e49 100 lower-numbered pseudo reg which can share a hard reg with this pseudo
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101 *even if the two pseudos would otherwise appear to conflict*. */
102
103static int *reg_may_share;
104
b1ec3c92
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105/* Define the number of bits in each element of `conflicts' and what
106 type that element has. We use the largest integer format on the
107 host machine. */
108
109#define INT_BITS HOST_BITS_PER_WIDE_INT
110#define INT_TYPE HOST_WIDE_INT
111
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112/* max_allocno by max_allocno array of bits,
113 recording whether two allocno's conflict (can't go in the same
114 hardware register).
115
116 `conflicts' is not symmetric; a conflict between allocno's i and j
117 is recorded either in element i,j or in element j,i. */
118
b1ec3c92 119static INT_TYPE *conflicts;
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120
121/* Number of ints require to hold max_allocno bits.
122 This is the length of a row in `conflicts'. */
123
124static int allocno_row_words;
125
126/* Two macros to test or store 1 in an element of `conflicts'. */
127
128#define CONFLICTP(I, J) \
129 (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \
b1ec3c92 130 & ((INT_TYPE) 1 << ((J) % INT_BITS)))
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131
132#define SET_CONFLICT(I, J) \
133 (conflicts[(I) * allocno_row_words + (J) / INT_BITS] \
b1ec3c92 134 |= ((INT_TYPE) 1 << ((J) % INT_BITS)))
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135
136/* Set of hard regs currently live (during scan of all insns). */
137
138static HARD_REG_SET hard_regs_live;
139
140/* Indexed by N, set of hard regs conflicting with allocno N. */
141
142static HARD_REG_SET *hard_reg_conflicts;
143
144/* Indexed by N, set of hard regs preferred by allocno N.
145 This is used to make allocnos go into regs that are copied to or from them,
146 when possible, to reduce register shuffling. */
147
148static HARD_REG_SET *hard_reg_preferences;
149
150/* Similar, but just counts register preferences made in simple copy
151 operations, rather than arithmetic. These are given priority because
152 we can always eliminate an insn by using these, but using a register
153 in the above list won't always eliminate an insn. */
154
155static HARD_REG_SET *hard_reg_copy_preferences;
156
157/* Similar to hard_reg_preferences, but includes bits for subsequent
158 registers when an allocno is multi-word. The above variable is used for
159 allocation while this is used to build reg_someone_prefers, below. */
160
161static HARD_REG_SET *hard_reg_full_preferences;
162
163/* Indexed by N, set of hard registers that some later allocno has a
164 preference for. */
165
166static HARD_REG_SET *regs_someone_prefers;
167
168/* Set of registers that global-alloc isn't supposed to use. */
169
170static HARD_REG_SET no_global_alloc_regs;
171
172/* Set of registers used so far. */
173
174static HARD_REG_SET regs_used_so_far;
175
176/* Number of calls crossed by each allocno. */
177
178static int *allocno_calls_crossed;
179
180/* Number of refs (weighted) to each allocno. */
181
182static int *allocno_n_refs;
183
184/* Guess at live length of each allocno.
185 This is actually the max of the live lengths of the regs. */
186
187static int *allocno_live_length;
188
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189/* Number of refs (weighted) to each hard reg, as used by local alloc.
190 It is zero for a reg that contains global pseudos or is explicitly used. */
191
192static int local_reg_n_refs[FIRST_PSEUDO_REGISTER];
193
194/* Guess at live length of each hard reg, as used by local alloc.
195 This is actually the sum of the live lengths of the specific regs. */
196
197static int local_reg_live_length[FIRST_PSEUDO_REGISTER];
198
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199/* Test a bit in TABLE, a vector of HARD_REG_SETs,
200 for vector element I, and hard register number J. */
201
202#define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (TABLE[I], J)
203
204/* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */
205
206#define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (TABLE[I], J)
207
208/* Bit mask for allocnos live at current point in the scan. */
209
b1ec3c92 210static INT_TYPE *allocnos_live;
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211
212/* Test, set or clear bit number I in allocnos_live,
213 a bit vector indexed by allocno. */
214
215#define ALLOCNO_LIVE_P(I) \
b1ec3c92 216 (allocnos_live[(I) / INT_BITS] & ((INT_TYPE) 1 << ((I) % INT_BITS)))
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217
218#define SET_ALLOCNO_LIVE(I) \
b1ec3c92 219 (allocnos_live[(I) / INT_BITS] |= ((INT_TYPE) 1 << ((I) % INT_BITS)))
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220
221#define CLEAR_ALLOCNO_LIVE(I) \
b1ec3c92 222 (allocnos_live[(I) / INT_BITS] &= ~((INT_TYPE) 1 << ((I) % INT_BITS)))
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223
224/* This is turned off because it doesn't work right for DImode.
225 (And it is only used for DImode, so the other cases are worthless.)
226 The problem is that it isn't true that there is NO possibility of conflict;
227 only that there is no conflict if the two pseudos get the exact same regs.
228 If they were allocated with a partial overlap, there would be a conflict.
229 We can't safely turn off the conflict unless we have another way to
230 prevent the partial overlap.
231
232 Idea: change hard_reg_conflicts so that instead of recording which
233 hard regs the allocno may not overlap, it records where the allocno
234 may not start. Change both where it is used and where it is updated.
235 Then there is a way to record that (reg:DI 108) may start at 10
236 but not at 9 or 11. There is still the question of how to record
237 this semi-conflict between two pseudos. */
238#if 0
239/* Reg pairs for which conflict after the current insn
240 is inhibited by a REG_NO_CONFLICT note.
241 If the table gets full, we ignore any other notes--that is conservative. */
242#define NUM_NO_CONFLICT_PAIRS 4
243/* Number of pairs in use in this insn. */
244int n_no_conflict_pairs;
245static struct { int allocno1, allocno2;}
246 no_conflict_pairs[NUM_NO_CONFLICT_PAIRS];
247#endif /* 0 */
248
249/* Record all regs that are set in any one insn.
250 Communication from mark_reg_{store,clobber} and global_conflicts. */
251
252static rtx *regs_set;
253static int n_regs_set;
254
daf55ac6 255/* All registers that can be eliminated. */
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256
257static HARD_REG_SET eliminable_regset;
258
e1b6684c 259static int allocno_compare PROTO((const PTR, const PTR));
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260static void global_conflicts PROTO((void));
261static void expand_preferences PROTO((void));
262static void prune_preferences PROTO((void));
263static void find_reg PROTO((int, HARD_REG_SET, int, int, int));
264static void record_one_conflict PROTO((int));
8d4c79be 265static void record_conflicts PROTO((int *, int));
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266static void mark_reg_store PROTO((rtx, rtx));
267static void mark_reg_clobber PROTO((rtx, rtx));
268static void mark_reg_conflicts PROTO((rtx));
269static void mark_reg_death PROTO((rtx));
270static void mark_reg_live_nc PROTO((int, enum machine_mode));
271static void set_preference PROTO((rtx, rtx));
272static void dump_conflicts PROTO((FILE *));
cad6f7d0
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273static void reg_becomes_live PROTO((rtx, rtx));
274static void reg_dies PROTO((int, enum machine_mode));
108c535a 275static void build_insn_chain PROTO((rtx));
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276\f
277/* Perform allocation of pseudo-registers not allocated by local_alloc.
278 FILE is a file to output debugging information on,
ab40ad2b 279 or zero if such output is not desired.
38398762 280
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281 Return value is nonzero if reload failed
282 and we must not do any more for this function. */
283
284int
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285global_alloc (file)
286 FILE *file;
287{
8c316ae2 288 int retval;
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289#ifdef ELIMINABLE_REGS
290 static struct {int from, to; } eliminables[] = ELIMINABLE_REGS;
291#endif
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292 int need_fp
293 = (! flag_omit_frame_pointer
294#ifdef EXIT_IGNORE_STACK
295 || (current_function_calls_alloca && EXIT_IGNORE_STACK)
296#endif
297 || FRAME_POINTER_REQUIRED);
298
f8344bea 299 register size_t i;
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300 rtx x;
301
302 max_allocno = 0;
303
304 /* A machine may have certain hard registers that
305 are safe to use only within a basic block. */
306
307 CLEAR_HARD_REG_SET (no_global_alloc_regs);
308#ifdef OVERLAPPING_REGNO_P
309 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
310 if (OVERLAPPING_REGNO_P (i))
311 SET_HARD_REG_BIT (no_global_alloc_regs, i);
312#endif
313
314 /* Build the regset of all eliminable registers and show we can't use those
315 that we already know won't be eliminated. */
316#ifdef ELIMINABLE_REGS
317 for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++)
318 {
319 SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
320
321 if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to)
daf55ac6 322 || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp))
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323 SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from);
324 }
7b0957a7 325#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
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326 SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
327 if (need_fp)
7b0957a7
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328 SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM);
329#endif
daf55ac6 330
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331#else
332 SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
daf55ac6 333 if (need_fp)
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334 SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM);
335#endif
336
337 /* Track which registers have already been used. Start with registers
338 explicitly in the rtl, then registers allocated by local register
b4b4db94 339 allocation. */
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340
341 CLEAR_HARD_REG_SET (regs_used_so_far);
b4b4db94
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342#ifdef LEAF_REGISTERS
343 /* If we are doing the leaf function optimization, and this is a leaf
344 function, it means that the registers that take work to save are those
345 that need a register window. So prefer the ones that can be used in
346 a leaf function. */
347 {
348 char *cheap_regs;
349 static char leaf_regs[] = LEAF_REGISTERS;
350
351 if (only_leaf_regs_used () && leaf_function_p ())
352 cheap_regs = leaf_regs;
353 else
354 cheap_regs = call_used_regs;
355 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
356 if (regs_ever_live[i] || cheap_regs[i])
357 SET_HARD_REG_BIT (regs_used_so_far, i);
358 }
359#else
360 /* We consider registers that do not have to be saved over calls as if
361 they were already used since there is no cost in using them. */
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362 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
363 if (regs_ever_live[i] || call_used_regs[i])
364 SET_HARD_REG_BIT (regs_used_so_far, i);
b4b4db94 365#endif
38398762 366
e51712db 367 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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368 if (reg_renumber[i] >= 0)
369 SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]);
370
371 /* Establish mappings from register number to allocation number
372 and vice versa. In the process, count the allocnos. */
373
374 reg_allocno = (int *) alloca (max_regno * sizeof (int));
375
376 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
377 reg_allocno[i] = -1;
378
379 /* Initialize the shared-hard-reg mapping
380 from the list of pairs that may share. */
381 reg_may_share = (int *) alloca (max_regno * sizeof (int));
4c9a05bc 382 bzero ((char *) reg_may_share, max_regno * sizeof (int));
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383 for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1))
384 {
385 int r1 = REGNO (XEXP (x, 0));
386 int r2 = REGNO (XEXP (XEXP (x, 1), 0));
387 if (r1 > r2)
388 reg_may_share[r1] = r2;
389 else
390 reg_may_share[r2] = r1;
391 }
392
e51712db 393 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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394 /* Note that reg_live_length[i] < 0 indicates a "constant" reg
395 that we are supposed to refrain from putting in a hard reg.
396 -2 means do make an allocno but don't allocate it. */
a300b8d9 397 if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1
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398 /* Don't allocate pseudos that cross calls,
399 if this function receives a nonlocal goto. */
400 && (! current_function_has_nonlocal_label
b1f21e0a 401 || REG_N_CALLS_CROSSED (i) == 0))
38398762 402 {
a300b8d9 403 if (reg_renumber[i] < 0 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0)
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404 reg_allocno[i] = reg_allocno[reg_may_share[i]];
405 else
406 reg_allocno[i] = max_allocno++;
b1f21e0a 407 if (REG_LIVE_LENGTH (i) == 0)
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408 abort ();
409 }
410 else
411 reg_allocno[i] = -1;
412
413 allocno_reg = (int *) alloca (max_allocno * sizeof (int));
414 allocno_size = (int *) alloca (max_allocno * sizeof (int));
415 allocno_calls_crossed = (int *) alloca (max_allocno * sizeof (int));
416 allocno_n_refs = (int *) alloca (max_allocno * sizeof (int));
417 allocno_live_length = (int *) alloca (max_allocno * sizeof (int));
4c9a05bc
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418 bzero ((char *) allocno_size, max_allocno * sizeof (int));
419 bzero ((char *) allocno_calls_crossed, max_allocno * sizeof (int));
420 bzero ((char *) allocno_n_refs, max_allocno * sizeof (int));
421 bzero ((char *) allocno_live_length, max_allocno * sizeof (int));
38398762 422
e51712db 423 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
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424 if (reg_allocno[i] >= 0)
425 {
426 int allocno = reg_allocno[i];
427 allocno_reg[allocno] = i;
428 allocno_size[allocno] = PSEUDO_REGNO_SIZE (i);
b1f21e0a
MM
429 allocno_calls_crossed[allocno] += REG_N_CALLS_CROSSED (i);
430 allocno_n_refs[allocno] += REG_N_REFS (i);
431 if (allocno_live_length[allocno] < REG_LIVE_LENGTH (i))
432 allocno_live_length[allocno] = REG_LIVE_LENGTH (i);
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433 }
434
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435 /* Calculate amount of usage of each hard reg by pseudos
436 allocated by local-alloc. This is to see if we want to
437 override it. */
4c9a05bc
RK
438 bzero ((char *) local_reg_live_length, sizeof local_reg_live_length);
439 bzero ((char *) local_reg_n_refs, sizeof local_reg_n_refs);
e51712db 440 for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++)
a300b8d9 441 if (reg_renumber[i] >= 0)
1d56e983 442 {
34e56753
RS
443 int regno = reg_renumber[i];
444 int endregno = regno + HARD_REGNO_NREGS (regno, PSEUDO_REGNO_MODE (i));
445 int j;
446
447 for (j = regno; j < endregno; j++)
448 {
b1f21e0a
MM
449 local_reg_n_refs[j] += REG_N_REFS (i);
450 local_reg_live_length[j] += REG_LIVE_LENGTH (i);
34e56753 451 }
1d56e983 452 }
34e56753 453
1d56e983
RS
454 /* We can't override local-alloc for a reg used not just by local-alloc. */
455 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
456 if (regs_ever_live[i])
457 local_reg_n_refs[i] = 0;
0dfa4517 458
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459 /* Allocate the space for the conflict and preference tables and
460 initialize them. */
461
462 hard_reg_conflicts
463 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
4c9a05bc 464 bzero ((char *) hard_reg_conflicts, max_allocno * sizeof (HARD_REG_SET));
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465
466 hard_reg_preferences
467 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
4c9a05bc 468 bzero ((char *) hard_reg_preferences, max_allocno * sizeof (HARD_REG_SET));
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469
470 hard_reg_copy_preferences
471 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
4c9a05bc
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472 bzero ((char *) hard_reg_copy_preferences,
473 max_allocno * sizeof (HARD_REG_SET));
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474
475 hard_reg_full_preferences
476 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
4c9a05bc
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477 bzero ((char *) hard_reg_full_preferences,
478 max_allocno * sizeof (HARD_REG_SET));
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479
480 regs_someone_prefers
481 = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET));
4c9a05bc 482 bzero ((char *) regs_someone_prefers, max_allocno * sizeof (HARD_REG_SET));
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483
484 allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS;
485
ba3b3878
BK
486 /* We used to use alloca here, but the size of what it would try to
487 allocate would occasionally cause it to exceed the stack limit and
488 cause unpredictable core dumps. Some examples were > 2Mb in size. */
3de90026
RH
489 conflicts = (INT_TYPE *) xcalloc (max_allocno * allocno_row_words,
490 sizeof (INT_TYPE));
38398762 491
b1ec3c92 492 allocnos_live = (INT_TYPE *) alloca (allocno_row_words * sizeof (INT_TYPE));
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493
494 /* If there is work to be done (at least one reg to allocate),
495 perform global conflict analysis and allocate the regs. */
496
497 if (max_allocno > 0)
498 {
499 /* Scan all the insns and compute the conflicts among allocnos
500 and between allocnos and hard regs. */
501
502 global_conflicts ();
503
504 /* Eliminate conflicts between pseudos and eliminable registers. If
505 the register is not eliminated, the pseudo won't really be able to
506 live in the eliminable register, so the conflict doesn't matter.
507 If we do eliminate the register, the conflict will no longer exist.
1d56e983
RS
508 So in either case, we can ignore the conflict. Likewise for
509 preferences. */
38398762 510
e51712db 511 for (i = 0; i < (size_t) max_allocno; i++)
1d56e983
RS
512 {
513 AND_COMPL_HARD_REG_SET (hard_reg_conflicts[i], eliminable_regset);
514 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[i],
515 eliminable_regset);
516 AND_COMPL_HARD_REG_SET (hard_reg_preferences[i], eliminable_regset);
517 }
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518
519 /* Try to expand the preferences by merging them between allocnos. */
520
521 expand_preferences ();
522
523 /* Determine the order to allocate the remaining pseudo registers. */
524
525 allocno_order = (int *) alloca (max_allocno * sizeof (int));
e51712db 526 for (i = 0; i < (size_t) max_allocno; i++)
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527 allocno_order[i] = i;
528
529 /* Default the size to 1, since allocno_compare uses it to divide by.
530 Also convert allocno_live_length of zero to -1. A length of zero
531 can occur when all the registers for that allocno have reg_live_length
532 equal to -2. In this case, we want to make an allocno, but not
533 allocate it. So avoid the divide-by-zero and set it to a low
534 priority. */
535
e51712db 536 for (i = 0; i < (size_t) max_allocno; i++)
38398762
RK
537 {
538 if (allocno_size[i] == 0)
539 allocno_size[i] = 1;
540 if (allocno_live_length[i] == 0)
541 allocno_live_length[i] = -1;
542 }
543
544 qsort (allocno_order, max_allocno, sizeof (int), allocno_compare);
545
546 prune_preferences ();
547
548 if (file)
549 dump_conflicts (file);
550
551 /* Try allocating them, one by one, in that order,
552 except for parameters marked with reg_live_length[regno] == -2. */
553
e51712db 554 for (i = 0; i < (size_t) max_allocno; i++)
a300b8d9
JW
555 if (reg_renumber[allocno_reg[allocno_order[i]]] < 0
556 && REG_LIVE_LENGTH (allocno_reg[allocno_order[i]]) >= 0)
38398762
RK
557 {
558 /* If we have more than one register class,
559 first try allocating in the class that is cheapest
560 for this pseudo-reg. If that fails, try any reg. */
561 if (N_REG_CLASSES > 1)
562 {
ea8693a4 563 find_reg (allocno_order[i], 0, 0, 0, 0);
38398762
RK
564 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
565 continue;
566 }
b1ec3c92 567 if (reg_alternate_class (allocno_reg[allocno_order[i]]) != NO_REGS)
ea8693a4 568 find_reg (allocno_order[i], 0, 1, 0, 0);
38398762
RK
569 }
570 }
571
572 /* Do the reloads now while the allocno data still exist, so that we can
573 try to assign new hard regs to any pseudo regs that are spilled. */
574
7e860cf7
RS
575#if 0 /* We need to eliminate regs even if there is no rtl code,
576 for the sake of debugging information. */
38398762 577 if (n_basic_blocks > 0)
7e860cf7 578#endif
cad6f7d0 579 {
108c535a 580 build_insn_chain (get_insns ());
cad6f7d0
BS
581 retval = reload (get_insns (), 1, file);
582 }
8c316ae2
JL
583
584 free (conflicts);
585 return retval;
38398762
RK
586}
587
588/* Sort predicate for ordering the allocnos.
589 Returns -1 (1) if *v1 should be allocated before (after) *v2. */
590
591static int
daa6f17d 592allocno_compare (v1p, v2p)
e1b6684c
KG
593 const PTR v1p;
594 const PTR v2p;
38398762 595{
daa6f17d 596 int v1 = *(int *)v1p, v2 = *(int *)v2p;
38398762
RK
597 /* Note that the quotient will never be bigger than
598 the value of floor_log2 times the maximum number of
599 times a register can occur in one insn (surely less than 100).
600 Multiplying this by 10000 can't overflow. */
601 register int pri1
daa6f17d
RK
602 = (((double) (floor_log2 (allocno_n_refs[v1]) * allocno_n_refs[v1])
603 / allocno_live_length[v1])
604 * 10000 * allocno_size[v1]);
38398762 605 register int pri2
daa6f17d
RK
606 = (((double) (floor_log2 (allocno_n_refs[v2]) * allocno_n_refs[v2])
607 / allocno_live_length[v2])
608 * 10000 * allocno_size[v2]);
38398762
RK
609 if (pri2 - pri1)
610 return pri2 - pri1;
611
612 /* If regs are equally good, sort by allocno,
613 so that the results of qsort leave nothing to chance. */
daa6f17d 614 return v1 - v2;
38398762
RK
615}
616\f
617/* Scan the rtl code and record all conflicts and register preferences in the
618 conflict matrices and preference tables. */
619
620static void
621global_conflicts ()
622{
623 register int b, i;
624 register rtx insn;
8d4c79be 625 int *block_start_allocnos;
38398762
RK
626
627 /* Make a vector that mark_reg_{store,clobber} will store in. */
628 regs_set = (rtx *) alloca (max_parallel * sizeof (rtx) * 2);
629
8d4c79be 630 block_start_allocnos = (int *) alloca (max_allocno * sizeof (int));
38398762
RK
631
632 for (b = 0; b < n_basic_blocks; b++)
633 {
4c9a05bc 634 bzero ((char *) allocnos_live, allocno_row_words * sizeof (INT_TYPE));
38398762
RK
635
636 /* Initialize table of registers currently live
637 to the state at the beginning of this basic block.
638 This also marks the conflicts among them.
639
640 For pseudo-regs, there is only one bit for each one
641 no matter how many hard regs it occupies.
642 This is ok; we know the size from PSEUDO_REGNO_SIZE.
643 For explicit hard regs, we cannot know the size that way
644 since one hard reg can be used with various sizes.
645 Therefore, we must require that all the hard regs
646 implicitly live as part of a multi-word hard reg
647 are explicitly marked in basic_block_live_at_start. */
648
649 {
e881bb1b 650 register regset old = BASIC_BLOCK (b)->global_live_at_start;
38398762
RK
651 int ax = 0;
652
916b1701 653 REG_SET_TO_HARD_REG_SET (hard_regs_live, old);
1313ec9d 654 EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i,
916b1701
MM
655 {
656 register int a = reg_allocno[i];
657 if (a >= 0)
658 {
659 SET_ALLOCNO_LIVE (a);
660 block_start_allocnos[ax++] = a;
661 }
662 else if ((a = reg_renumber[i]) >= 0)
1313ec9d
RK
663 mark_reg_live_nc
664 (a, PSEUDO_REGNO_MODE (i));
916b1701 665 });
38398762
RK
666
667 /* Record that each allocno now live conflicts with each other
668 allocno now live, and with each hard reg now live. */
669
670 record_conflicts (block_start_allocnos, ax);
4d1d8045
BS
671
672#ifdef STACK_REGS
e881bb1b
RH
673 {
674 /* Pseudos can't go in stack regs at the start of a basic block
675 that can be reached through a computed goto, since reg-stack
676 can't handle computed gotos. */
677 /* ??? Seems more likely that reg-stack can't handle any abnormal
678 edges, critical or not, computed goto or otherwise. */
679
680 edge e;
681 for (e = BASIC_BLOCK (b)->pred; e ; e = e->pred_next)
682 if (e->flags & EDGE_ABNORMAL)
683 break;
684
685 if (e != NULL)
686 for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++)
687 record_one_conflict (ax);
688 }
4d1d8045 689#endif
38398762
RK
690 }
691
3b413743 692 insn = BLOCK_HEAD (b);
38398762
RK
693
694 /* Scan the code of this basic block, noting which allocnos
695 and hard regs are born or die. When one is born,
696 record a conflict with all others currently live. */
697
698 while (1)
699 {
700 register RTX_CODE code = GET_CODE (insn);
701 register rtx link;
702
703 /* Make regs_set an empty set. */
704
705 n_regs_set = 0;
706
707 if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
708 {
38398762
RK
709
710#if 0
2049526b 711 int i = 0;
38398762
RK
712 for (link = REG_NOTES (insn);
713 link && i < NUM_NO_CONFLICT_PAIRS;
714 link = XEXP (link, 1))
715 if (REG_NOTE_KIND (link) == REG_NO_CONFLICT)
716 {
717 no_conflict_pairs[i].allocno1
718 = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))];
719 no_conflict_pairs[i].allocno2
720 = reg_allocno[REGNO (XEXP (link, 0))];
721 i++;
722 }
723#endif /* 0 */
724
725 /* Mark any registers clobbered by INSN as live,
726 so they conflict with the inputs. */
727
728 note_stores (PATTERN (insn), mark_reg_clobber);
729
730 /* Mark any registers dead after INSN as dead now. */
731
732 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
733 if (REG_NOTE_KIND (link) == REG_DEAD)
734 mark_reg_death (XEXP (link, 0));
735
736 /* Mark any registers set in INSN as live,
737 and mark them as conflicting with all other live regs.
738 Clobbers are processed again, so they conflict with
739 the registers that are set. */
740
741 note_stores (PATTERN (insn), mark_reg_store);
742
743#ifdef AUTO_INC_DEC
744 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
745 if (REG_NOTE_KIND (link) == REG_INC)
b1ec3c92 746 mark_reg_store (XEXP (link, 0), NULL_RTX);
38398762
RK
747#endif
748
333e0f7d
RS
749 /* If INSN has multiple outputs, then any reg that dies here
750 and is used inside of an output
941c63ac
JL
751 must conflict with the other outputs.
752
753 It is unsafe to use !single_set here since it will ignore an
754 unused output. Just because an output is unused does not mean
755 the compiler can assume the side effect will not occur.
756 Consider if REG appears in the address of an output and we
757 reload the output. If we allocate REG to the same hard
758 register as an unused output we could set the hard register
759 before the output reload insn. */
760 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
333e0f7d
RS
761 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
762 if (REG_NOTE_KIND (link) == REG_DEAD)
763 {
764 int used_in_output = 0;
765 int i;
766 rtx reg = XEXP (link, 0);
767
768 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
769 {
770 rtx set = XVECEXP (PATTERN (insn), 0, i);
771 if (GET_CODE (set) == SET
772 && GET_CODE (SET_DEST (set)) != REG
773 && !rtx_equal_p (reg, SET_DEST (set))
774 && reg_overlap_mentioned_p (reg, SET_DEST (set)))
775 used_in_output = 1;
776 }
777 if (used_in_output)
778 mark_reg_conflicts (reg);
779 }
780
38398762
RK
781 /* Mark any registers set in INSN and then never used. */
782
783 while (n_regs_set > 0)
784 if (find_regno_note (insn, REG_UNUSED,
785 REGNO (regs_set[--n_regs_set])))
786 mark_reg_death (regs_set[n_regs_set]);
787 }
788
3b413743 789 if (insn == BLOCK_END (b))
38398762
RK
790 break;
791 insn = NEXT_INSN (insn);
792 }
793 }
794}
795/* Expand the preference information by looking for cases where one allocno
796 dies in an insn that sets an allocno. If those two allocnos don't conflict,
797 merge any preferences between those allocnos. */
798
799static void
800expand_preferences ()
801{
802 rtx insn;
803 rtx link;
804 rtx set;
805
806 /* We only try to handle the most common cases here. Most of the cases
807 where this wins are reg-reg copies. */
808
809 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
810 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
811 && (set = single_set (insn)) != 0
812 && GET_CODE (SET_DEST (set)) == REG
813 && reg_allocno[REGNO (SET_DEST (set))] >= 0)
814 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
815 if (REG_NOTE_KIND (link) == REG_DEAD
816 && GET_CODE (XEXP (link, 0)) == REG
817 && reg_allocno[REGNO (XEXP (link, 0))] >= 0
818 && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))],
819 reg_allocno[REGNO (XEXP (link, 0))])
820 && ! CONFLICTP (reg_allocno[REGNO (XEXP (link, 0))],
821 reg_allocno[REGNO (SET_DEST (set))]))
822 {
823 int a1 = reg_allocno[REGNO (SET_DEST (set))];
824 int a2 = reg_allocno[REGNO (XEXP (link, 0))];
825
826 if (XEXP (link, 0) == SET_SRC (set))
827 {
828 IOR_HARD_REG_SET (hard_reg_copy_preferences[a1],
829 hard_reg_copy_preferences[a2]);
830 IOR_HARD_REG_SET (hard_reg_copy_preferences[a2],
831 hard_reg_copy_preferences[a1]);
832 }
833
834 IOR_HARD_REG_SET (hard_reg_preferences[a1],
835 hard_reg_preferences[a2]);
836 IOR_HARD_REG_SET (hard_reg_preferences[a2],
837 hard_reg_preferences[a1]);
838 IOR_HARD_REG_SET (hard_reg_full_preferences[a1],
839 hard_reg_full_preferences[a2]);
840 IOR_HARD_REG_SET (hard_reg_full_preferences[a2],
841 hard_reg_full_preferences[a1]);
842 }
843}
844\f
845/* Prune the preferences for global registers to exclude registers that cannot
846 be used.
847
848 Compute `regs_someone_prefers', which is a bitmask of the hard registers
849 that are preferred by conflicting registers of lower priority. If possible,
850 we will avoid using these registers. */
851
852static void
853prune_preferences ()
854{
855 int i, j;
856 int allocno;
857
858 /* Scan least most important to most important.
859 For each allocno, remove from preferences registers that cannot be used,
860 either because of conflicts or register type. Then compute all registers
d45cf215 861 preferred by each lower-priority register that conflicts. */
38398762
RK
862
863 for (i = max_allocno - 1; i >= 0; i--)
864 {
ea1637e9 865 HARD_REG_SET temp, temp2;
38398762
RK
866
867 allocno = allocno_order[i];
868 COPY_HARD_REG_SET (temp, hard_reg_conflicts[allocno]);
869
870 if (allocno_calls_crossed[allocno] == 0)
871 IOR_HARD_REG_SET (temp, fixed_reg_set);
872 else
873 IOR_HARD_REG_SET (temp, call_used_reg_set);
874
875 IOR_COMPL_HARD_REG_SET
876 (temp,
877 reg_class_contents[(int) reg_preferred_class (allocno_reg[allocno])]);
878
879 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], temp);
880 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], temp);
881 AND_COMPL_HARD_REG_SET (hard_reg_full_preferences[allocno], temp);
882
38398762
RK
883 /* Merge in the preferences of lower-priority registers (they have
884 already been pruned). If we also prefer some of those registers,
885 don't exclude them unless we are of a smaller size (in which case
886 we want to give the lower-priority allocno the first chance for
887 these registers). */
ea1637e9
R
888 CLEAR_HARD_REG_SET (temp);
889 CLEAR_HARD_REG_SET (temp2);
38398762 890 for (j = i + 1; j < max_allocno; j++)
99fd4012
RK
891 if (CONFLICTP (allocno, allocno_order[j])
892 || CONFLICTP (allocno_order[j], allocno))
38398762 893 {
38398762 894 if (allocno_size[allocno_order[j]] <= allocno_size[allocno])
ea1637e9
R
895 IOR_HARD_REG_SET (temp,
896 hard_reg_full_preferences[allocno_order[j]]);
897 else
898 IOR_HARD_REG_SET (temp2,
899 hard_reg_full_preferences[allocno_order[j]]);
38398762 900 }
ea1637e9
R
901 AND_COMPL_HARD_REG_SET (temp, hard_reg_full_preferences[allocno]);
902 IOR_HARD_REG_SET (temp, temp2);
903 COPY_HARD_REG_SET (regs_someone_prefers[allocno], temp);
38398762
RK
904 }
905}
906\f
907/* Assign a hard register to ALLOCNO; look for one that is the beginning
908 of a long enough stretch of hard regs none of which conflicts with ALLOCNO.
909 The registers marked in PREFREGS are tried first.
910
911 LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot
912 be used for this allocation.
913
b1ec3c92
CH
914 If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg.
915 Otherwise ignore that preferred class and use the alternate class.
38398762
RK
916
917 If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that
918 will have to be saved and restored at calls.
919
1d56e983
RS
920 RETRYING is nonzero if this is called from retry_global_alloc.
921
38398762
RK
922 If we find one, record it in reg_renumber.
923 If not, do nothing. */
924
925static void
b1ec3c92 926find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying)
38398762
RK
927 int allocno;
928 HARD_REG_SET losers;
b1ec3c92 929 int alt_regs_p;
38398762 930 int accept_call_clobbered;
1d56e983 931 int retrying;
38398762
RK
932{
933 register int i, best_reg, pass;
934#ifdef HARD_REG_SET
935 register /* Declare it register if it's a scalar. */
936#endif
1d56e983 937 HARD_REG_SET used, used1, used2;
38398762 938
b1ec3c92
CH
939 enum reg_class class = (alt_regs_p
940 ? reg_alternate_class (allocno_reg[allocno])
941 : reg_preferred_class (allocno_reg[allocno]));
38398762
RK
942 enum machine_mode mode = PSEUDO_REGNO_MODE (allocno_reg[allocno]);
943
944 if (accept_call_clobbered)
945 COPY_HARD_REG_SET (used1, call_fixed_reg_set);
946 else if (allocno_calls_crossed[allocno] == 0)
947 COPY_HARD_REG_SET (used1, fixed_reg_set);
948 else
949 COPY_HARD_REG_SET (used1, call_used_reg_set);
950
951 /* Some registers should not be allocated in global-alloc. */
952 IOR_HARD_REG_SET (used1, no_global_alloc_regs);
953 if (losers)
954 IOR_HARD_REG_SET (used1, losers);
955
956 IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]);
1d56e983
RS
957 COPY_HARD_REG_SET (used2, used1);
958
38398762
RK
959 IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]);
960
d546b10a 961#ifdef CLASS_CANNOT_CHANGE_SIZE
b1f21e0a 962 if (REG_CHANGES_SIZE (allocno_reg[allocno]))
d546b10a
RK
963 IOR_HARD_REG_SET (used1,
964 reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]);
965#endif
966
38398762 967 /* Try each hard reg to see if it fits. Do this in two passes.
d45cf215 968 In the first pass, skip registers that are preferred by some other pseudo
38398762
RK
969 to give it a better chance of getting one of those registers. Only if
970 we can't get a register when excluding those do we take one of them.
971 However, we never allocate a register for the first time in pass 0. */
972
973 COPY_HARD_REG_SET (used, used1);
974 IOR_COMPL_HARD_REG_SET (used, regs_used_so_far);
975 IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]);
976
977 best_reg = -1;
978 for (i = FIRST_PSEUDO_REGISTER, pass = 0;
979 pass <= 1 && i >= FIRST_PSEUDO_REGISTER;
980 pass++)
981 {
982 if (pass == 1)
983 COPY_HARD_REG_SET (used, used1);
984 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
985 {
986#ifdef REG_ALLOC_ORDER
987 int regno = reg_alloc_order[i];
988#else
989 int regno = i;
990#endif
991 if (! TEST_HARD_REG_BIT (used, regno)
1e326708
MH
992 && HARD_REGNO_MODE_OK (regno, mode)
993 && (allocno_calls_crossed[allocno] == 0
994 || accept_call_clobbered
995 || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
38398762
RK
996 {
997 register int j;
998 register int lim = regno + HARD_REGNO_NREGS (regno, mode);
999 for (j = regno + 1;
1000 (j < lim
1001 && ! TEST_HARD_REG_BIT (used, j));
1002 j++);
1003 if (j == lim)
1004 {
1005 best_reg = regno;
1006 break;
1007 }
1008#ifndef REG_ALLOC_ORDER
1009 i = j; /* Skip starting points we know will lose */
1010#endif
1011 }
1012 }
1013 }
1014
1015 /* See if there is a preferred register with the same class as the register
1016 we allocated above. Making this restriction prevents register
1017 preferencing from creating worse register allocation.
1018
1019 Remove from the preferred registers and conflicting registers. Note that
1020 additional conflicts may have been added after `prune_preferences' was
1021 called.
1022
1023 First do this for those register with copy preferences, then all
1024 preferred registers. */
1025
1026 AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], used);
1027 GO_IF_HARD_REG_SUBSET (hard_reg_copy_preferences[allocno],
1028 reg_class_contents[(int) NO_REGS], no_copy_prefs);
1029
1030 if (best_reg >= 0)
1031 {
1032 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1033 if (TEST_HARD_REG_BIT (hard_reg_copy_preferences[allocno], i)
1034 && HARD_REGNO_MODE_OK (i, mode)
1035 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1036 || reg_class_subset_p (REGNO_REG_CLASS (i),
1037 REGNO_REG_CLASS (best_reg))
1038 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1039 REGNO_REG_CLASS (i))))
1040 {
1041 register int j;
1042 register int lim = i + HARD_REGNO_NREGS (i, mode);
1043 for (j = i + 1;
1044 (j < lim
1045 && ! TEST_HARD_REG_BIT (used, j)
1046 && (REGNO_REG_CLASS (j)
1047 == REGNO_REG_CLASS (best_reg + (j - i))
1048 || reg_class_subset_p (REGNO_REG_CLASS (j),
1049 REGNO_REG_CLASS (best_reg + (j - i)))
1050 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1051 REGNO_REG_CLASS (j))));
1052 j++);
1053 if (j == lim)
1054 {
1055 best_reg = i;
1056 goto no_prefs;
1057 }
1058 }
1059 }
1060 no_copy_prefs:
1061
1062 AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], used);
1063 GO_IF_HARD_REG_SUBSET (hard_reg_preferences[allocno],
1064 reg_class_contents[(int) NO_REGS], no_prefs);
1065
1066 if (best_reg >= 0)
1067 {
1068 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1069 if (TEST_HARD_REG_BIT (hard_reg_preferences[allocno], i)
1070 && HARD_REGNO_MODE_OK (i, mode)
1071 && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg)
1072 || reg_class_subset_p (REGNO_REG_CLASS (i),
1073 REGNO_REG_CLASS (best_reg))
1074 || reg_class_subset_p (REGNO_REG_CLASS (best_reg),
1075 REGNO_REG_CLASS (i))))
1076 {
1077 register int j;
1078 register int lim = i + HARD_REGNO_NREGS (i, mode);
1079 for (j = i + 1;
1080 (j < lim
1081 && ! TEST_HARD_REG_BIT (used, j)
1082 && (REGNO_REG_CLASS (j)
1083 == REGNO_REG_CLASS (best_reg + (j - i))
1084 || reg_class_subset_p (REGNO_REG_CLASS (j),
1085 REGNO_REG_CLASS (best_reg + (j - i)))
1086 || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)),
1087 REGNO_REG_CLASS (j))));
1088 j++);
1089 if (j == lim)
1090 {
1091 best_reg = i;
1092 break;
1093 }
1094 }
1095 }
1096 no_prefs:
1097
cfcf04a6
RK
1098 /* If we haven't succeeded yet, try with caller-saves.
1099 We need not check to see if the current function has nonlocal
1100 labels because we don't put any pseudos that are live over calls in
1101 registers in that case. */
1102
1d56e983
RS
1103 if (flag_caller_saves && best_reg < 0)
1104 {
1105 /* Did not find a register. If it would be profitable to
1106 allocate a call-clobbered register and save and restore it
1107 around calls, do that. */
1108 if (! accept_call_clobbered
1109 && allocno_calls_crossed[allocno] != 0
1110 && CALLER_SAVE_PROFITABLE (allocno_n_refs[allocno],
1111 allocno_calls_crossed[allocno]))
1112 {
6cad67d2
JL
1113 HARD_REG_SET new_losers;
1114 if (! losers)
1115 CLEAR_HARD_REG_SET (new_losers);
1116 else
1117 COPY_HARD_REG_SET (new_losers, losers);
1118
1119 IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set);
1120 find_reg (allocno, new_losers, alt_regs_p, 1, retrying);
1d56e983
RS
1121 if (reg_renumber[allocno_reg[allocno]] >= 0)
1122 {
1123 caller_save_needed = 1;
1124 return;
1125 }
1126 }
1127 }
1128
1129 /* If we haven't succeeded yet,
1130 see if some hard reg that conflicts with us
1131 was utilized poorly by local-alloc.
1132 If so, kick out the regs that were put there by local-alloc
1133 so we can use it instead. */
1134 if (best_reg < 0 && !retrying
1135 /* Let's not bother with multi-reg allocnos. */
1136 && allocno_size[allocno] == 1)
1137 {
1138 /* Count from the end, to find the least-used ones first. */
1139 for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
17a0a76d
RK
1140 {
1141#ifdef REG_ALLOC_ORDER
1142 int regno = reg_alloc_order[i];
1143#else
1144 int regno = i;
1145#endif
34e56753 1146
17a0a76d
RK
1147 if (local_reg_n_refs[regno] != 0
1148 /* Don't use a reg no good for this pseudo. */
1149 && ! TEST_HARD_REG_BIT (used2, regno)
d546b10a
RK
1150 && HARD_REGNO_MODE_OK (regno, mode)
1151#ifdef CLASS_CANNOT_CHANGE_SIZE
b1f21e0a 1152 && ! (REG_CHANGES_SIZE (allocno_reg[allocno])
d546b10a
RK
1153 && (TEST_HARD_REG_BIT
1154 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
1155 regno)))
1156#endif
1157 )
17a0a76d 1158 {
7a17c588
JW
1159 /* We explicitly evaluate the divide results into temporary
1160 variables so as to avoid excess precision problems that occur
1161 on a i386-unknown-sysv4.2 (unixware) host. */
1162
1163 double tmp1 = ((double) local_reg_n_refs[regno]
1164 / local_reg_live_length[regno]);
1165 double tmp2 = ((double) allocno_n_refs[allocno]
1166 / allocno_live_length[allocno]);
1167
1168 if (tmp1 < tmp2)
1169 {
1170 /* Hard reg REGNO was used less in total by local regs
1171 than it would be used by this one allocno! */
1172 int k;
1173 for (k = 0; k < max_regno; k++)
1174 if (reg_renumber[k] >= 0)
1175 {
1176 int r = reg_renumber[k];
1177 int endregno
1178 = r + HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (k));
34e56753 1179
7a17c588
JW
1180 if (regno >= r && regno < endregno)
1181 reg_renumber[k] = -1;
1182 }
17a0a76d 1183
7a17c588
JW
1184 best_reg = regno;
1185 break;
1186 }
17a0a76d
RK
1187 }
1188 }
1d56e983
RS
1189 }
1190
38398762
RK
1191 /* Did we find a register? */
1192
1193 if (best_reg >= 0)
1194 {
1195 register int lim, j;
1196 HARD_REG_SET this_reg;
1197
1198 /* Yes. Record it as the hard register of this pseudo-reg. */
1199 reg_renumber[allocno_reg[allocno]] = best_reg;
1200 /* Also of any pseudo-regs that share with it. */
1201 if (reg_may_share[allocno_reg[allocno]])
1202 for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++)
1203 if (reg_allocno[j] == allocno)
1204 reg_renumber[j] = best_reg;
1205
1206 /* Make a set of the hard regs being allocated. */
1207 CLEAR_HARD_REG_SET (this_reg);
1208 lim = best_reg + HARD_REGNO_NREGS (best_reg, mode);
1209 for (j = best_reg; j < lim; j++)
1210 {
1211 SET_HARD_REG_BIT (this_reg, j);
1212 SET_HARD_REG_BIT (regs_used_so_far, j);
1d56e983
RS
1213 /* This is no longer a reg used just by local regs. */
1214 local_reg_n_refs[j] = 0;
38398762
RK
1215 }
1216 /* For each other pseudo-reg conflicting with this one,
1217 mark it as conflicting with the hard regs this one occupies. */
1218 lim = allocno;
1219 for (j = 0; j < max_allocno; j++)
1220 if (CONFLICTP (lim, j) || CONFLICTP (j, lim))
1221 {
1222 IOR_HARD_REG_SET (hard_reg_conflicts[j], this_reg);
1223 }
1224 }
38398762
RK
1225}
1226\f
1227/* Called from `reload' to look for a hard reg to put pseudo reg REGNO in.
1228 Perhaps it had previously seemed not worth a hard reg,
1229 or perhaps its old hard reg has been commandeered for reloads.
1230 FORBIDDEN_REGS indicates certain hard regs that may not be used, even if
1231 they do not appear to be allocated.
1232 If FORBIDDEN_REGS is zero, no regs are forbidden. */
1233
1234void
1235retry_global_alloc (regno, forbidden_regs)
1236 int regno;
1237 HARD_REG_SET forbidden_regs;
1238{
1239 int allocno = reg_allocno[regno];
1240 if (allocno >= 0)
1241 {
1242 /* If we have more than one register class,
1243 first try allocating in the class that is cheapest
1244 for this pseudo-reg. If that fails, try any reg. */
1245 if (N_REG_CLASSES > 1)
1d56e983 1246 find_reg (allocno, forbidden_regs, 0, 0, 1);
38398762 1247 if (reg_renumber[regno] < 0
b1ec3c92 1248 && reg_alternate_class (regno) != NO_REGS)
1d56e983 1249 find_reg (allocno, forbidden_regs, 1, 0, 1);
38398762
RK
1250
1251 /* If we found a register, modify the RTL for the register to
1252 show the hard register, and mark that register live. */
1253 if (reg_renumber[regno] >= 0)
1254 {
1255 REGNO (regno_reg_rtx[regno]) = reg_renumber[regno];
1256 mark_home_live (regno);
1257 }
1258 }
1259}
1260\f
1261/* Record a conflict between register REGNO
1262 and everything currently live.
1263 REGNO must not be a pseudo reg that was allocated
1264 by local_alloc; such numbers must be translated through
1265 reg_renumber before calling here. */
1266
1267static void
1268record_one_conflict (regno)
1269 int regno;
1270{
1271 register int j;
1272
1273 if (regno < FIRST_PSEUDO_REGISTER)
1274 /* When a hard register becomes live,
1275 record conflicts with live pseudo regs. */
1276 for (j = 0; j < max_allocno; j++)
1277 {
1278 if (ALLOCNO_LIVE_P (j))
1279 SET_HARD_REG_BIT (hard_reg_conflicts[j], regno);
1280 }
1281 else
1282 /* When a pseudo-register becomes live,
1283 record conflicts first with hard regs,
1284 then with other pseudo regs. */
1285 {
1286 register int ialloc = reg_allocno[regno];
1287 register int ialloc_prod = ialloc * allocno_row_words;
1288 IOR_HARD_REG_SET (hard_reg_conflicts[ialloc], hard_regs_live);
1289 for (j = allocno_row_words - 1; j >= 0; j--)
1290 {
1291#if 0
1292 int k;
1293 for (k = 0; k < n_no_conflict_pairs; k++)
1294 if (! ((j == no_conflict_pairs[k].allocno1
1295 && ialloc == no_conflict_pairs[k].allocno2)
1296 ||
1297 (j == no_conflict_pairs[k].allocno2
1298 && ialloc == no_conflict_pairs[k].allocno1)))
1299#endif /* 0 */
1300 conflicts[ialloc_prod + j] |= allocnos_live[j];
1301 }
1302 }
1303}
1304
1305/* Record all allocnos currently live as conflicting
1306 with each other and with all hard regs currently live.
1307 ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that
1308 are currently live. Their bits are also flagged in allocnos_live. */
1309
1310static void
1311record_conflicts (allocno_vec, len)
8d4c79be 1312 register int *allocno_vec;
38398762
RK
1313 register int len;
1314{
1315 register int allocno;
1316 register int j;
1317 register int ialloc_prod;
1318
1319 while (--len >= 0)
1320 {
1321 allocno = allocno_vec[len];
1322 ialloc_prod = allocno * allocno_row_words;
1323 IOR_HARD_REG_SET (hard_reg_conflicts[allocno], hard_regs_live);
1324 for (j = allocno_row_words - 1; j >= 0; j--)
1325 conflicts[ialloc_prod + j] |= allocnos_live[j];
1326 }
1327}
1328\f
1329/* Handle the case where REG is set by the insn being scanned,
1330 during the forward scan to accumulate conflicts.
1331 Store a 1 in regs_live or allocnos_live for this register, record how many
1332 consecutive hardware registers it actually needs,
1333 and record a conflict with all other registers already live.
1334
1335 Note that even if REG does not remain alive after this insn,
1336 we must mark it here as live, to ensure a conflict between
1337 REG and any other regs set in this insn that really do live.
1338 This is because those other regs could be considered after this.
1339
1340 REG might actually be something other than a register;
1341 if so, we do nothing.
1342
1343 SETTER is 0 if this register was modified by an auto-increment (i.e.,
a4c3ddd8 1344 a REG_INC note was found for it). */
38398762
RK
1345
1346static void
a4c3ddd8
BS
1347mark_reg_store (reg, setter)
1348 rtx reg, setter;
38398762
RK
1349{
1350 register int regno;
38398762
RK
1351
1352 /* WORD is which word of a multi-register group is being stored.
1353 For the case where the store is actually into a SUBREG of REG.
1354 Except we don't use it; I believe the entire REG needs to be
1355 made live. */
1356 int word = 0;
1357
1358 if (GET_CODE (reg) == SUBREG)
1359 {
1360 word = SUBREG_WORD (reg);
1361 reg = SUBREG_REG (reg);
1362 }
1363
1364 if (GET_CODE (reg) != REG)
1365 return;
1366
38398762
RK
1367 regs_set[n_regs_set++] = reg;
1368
a4c3ddd8 1369 if (setter && GET_CODE (setter) != CLOBBER)
38398762
RK
1370 set_preference (reg, SET_SRC (setter));
1371
1372 regno = REGNO (reg);
1373
38398762
RK
1374 /* Either this is one of the max_allocno pseudo regs not allocated,
1375 or it is or has a hardware reg. First handle the pseudo-regs. */
1376 if (regno >= FIRST_PSEUDO_REGISTER)
1377 {
1378 if (reg_allocno[regno] >= 0)
1379 {
1380 SET_ALLOCNO_LIVE (reg_allocno[regno]);
1381 record_one_conflict (regno);
1382 }
1383 }
a300b8d9
JW
1384
1385 if (reg_renumber[regno] >= 0)
1386 regno = reg_renumber[regno] /* + word */;
1387
38398762 1388 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1389 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1390 {
1391 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1392 while (regno < last)
1393 {
1394 record_one_conflict (regno);
1395 SET_HARD_REG_BIT (hard_regs_live, regno);
1396 regno++;
1397 }
1398 }
1399}
1400\f
1401/* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */
1402
1403static void
1404mark_reg_clobber (reg, setter)
1405 rtx reg, setter;
1406{
a4c3ddd8
BS
1407 if (GET_CODE (setter) == CLOBBER)
1408 mark_reg_store (reg, setter);
333e0f7d
RS
1409}
1410
1411/* Record that REG has conflicts with all the regs currently live.
1412 Do not mark REG itself as live. */
1413
1414static void
1415mark_reg_conflicts (reg)
1416 rtx reg;
1417{
1418 register int regno;
1419
1420 if (GET_CODE (reg) == SUBREG)
1421 reg = SUBREG_REG (reg);
1422
1423 if (GET_CODE (reg) != REG)
1424 return;
1425
1426 regno = REGNO (reg);
1427
333e0f7d
RS
1428 /* Either this is one of the max_allocno pseudo regs not allocated,
1429 or it is or has a hardware reg. First handle the pseudo-regs. */
1430 if (regno >= FIRST_PSEUDO_REGISTER)
1431 {
1432 if (reg_allocno[regno] >= 0)
1433 record_one_conflict (regno);
1434 }
a300b8d9
JW
1435
1436 if (reg_renumber[regno] >= 0)
1437 regno = reg_renumber[regno];
1438
333e0f7d 1439 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1440 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
333e0f7d
RS
1441 {
1442 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1443 while (regno < last)
1444 {
1445 record_one_conflict (regno);
1446 regno++;
1447 }
1448 }
38398762
RK
1449}
1450\f
1451/* Mark REG as being dead (following the insn being scanned now).
1452 Store a 0 in regs_live or allocnos_live for this register. */
1453
1454static void
1455mark_reg_death (reg)
1456 rtx reg;
1457{
1458 register int regno = REGNO (reg);
1459
38398762
RK
1460 /* Either this is one of the max_allocno pseudo regs not allocated,
1461 or it is a hardware reg. First handle the pseudo-regs. */
1462 if (regno >= FIRST_PSEUDO_REGISTER)
1463 {
1464 if (reg_allocno[regno] >= 0)
1465 CLEAR_ALLOCNO_LIVE (reg_allocno[regno]);
1466 }
a300b8d9
JW
1467
1468 /* For pseudo reg, see if it has been assigned a hardware reg. */
1469 if (reg_renumber[regno] >= 0)
1470 regno = reg_renumber[regno];
1471
38398762 1472 /* Handle hardware regs (and pseudos allocated to hard regs). */
a300b8d9 1473 if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno])
38398762
RK
1474 {
1475 /* Pseudo regs already assigned hardware regs are treated
1476 almost the same as explicit hardware regs. */
1477 register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
1478 while (regno < last)
1479 {
1480 CLEAR_HARD_REG_BIT (hard_regs_live, regno);
1481 regno++;
1482 }
1483 }
1484}
1485
1486/* Mark hard reg REGNO as currently live, assuming machine mode MODE
1487 for the value stored in it. MODE determines how many consecutive
1488 registers are actually in use. Do not record conflicts;
1489 it is assumed that the caller will do that. */
1490
1491static void
1492mark_reg_live_nc (regno, mode)
1493 register int regno;
1494 enum machine_mode mode;
1495{
1496 register int last = regno + HARD_REGNO_NREGS (regno, mode);
1497 while (regno < last)
1498 {
1499 SET_HARD_REG_BIT (hard_regs_live, regno);
1500 regno++;
1501 }
1502}
1503\f
1504/* Try to set a preference for an allocno to a hard register.
1505 We are passed DEST and SRC which are the operands of a SET. It is known
1506 that SRC is a register. If SRC or the first operand of SRC is a register,
1507 try to set a preference. If one of the two is a hard register and the other
1508 is a pseudo-register, mark the preference.
1509
6dc42e49 1510 Note that we are not as aggressive as local-alloc in trying to tie a
38398762
RK
1511 pseudo-register to a hard register. */
1512
1513static void
1514set_preference (dest, src)
1515 rtx dest, src;
1516{
1517 int src_regno, dest_regno;
1518 /* Amount to add to the hard regno for SRC, or subtract from that for DEST,
1519 to compensate for subregs in SRC or DEST. */
1520 int offset = 0;
1521 int i;
1522 int copy = 1;
1523
1524 if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e')
1525 src = XEXP (src, 0), copy = 0;
1526
1527 /* Get the reg number for both SRC and DEST.
1528 If neither is a reg, give up. */
1529
1530 if (GET_CODE (src) == REG)
1531 src_regno = REGNO (src);
1532 else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG)
1533 {
1534 src_regno = REGNO (SUBREG_REG (src));
1535 offset += SUBREG_WORD (src);
1536 }
1537 else
1538 return;
1539
1540 if (GET_CODE (dest) == REG)
1541 dest_regno = REGNO (dest);
1542 else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG)
1543 {
1544 dest_regno = REGNO (SUBREG_REG (dest));
1545 offset -= SUBREG_WORD (dest);
1546 }
1547 else
1548 return;
1549
1550 /* Convert either or both to hard reg numbers. */
1551
1552 if (reg_renumber[src_regno] >= 0)
1553 src_regno = reg_renumber[src_regno];
1554
1555 if (reg_renumber[dest_regno] >= 0)
1556 dest_regno = reg_renumber[dest_regno];
1557
1558 /* Now if one is a hard reg and the other is a global pseudo
1559 then give the other a preference. */
1560
1561 if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER
1562 && reg_allocno[src_regno] >= 0)
1563 {
1564 dest_regno -= offset;
1565 if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER)
1566 {
1567 if (copy)
1568 SET_REGBIT (hard_reg_copy_preferences,
1569 reg_allocno[src_regno], dest_regno);
1570
1571 SET_REGBIT (hard_reg_preferences,
1572 reg_allocno[src_regno], dest_regno);
1573 for (i = dest_regno;
1574 i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest));
1575 i++)
1576 SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i);
1577 }
1578 }
1579
1580 if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER
1581 && reg_allocno[dest_regno] >= 0)
1582 {
1583 src_regno += offset;
1584 if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER)
1585 {
1586 if (copy)
1587 SET_REGBIT (hard_reg_copy_preferences,
1588 reg_allocno[dest_regno], src_regno);
1589
1590 SET_REGBIT (hard_reg_preferences,
1591 reg_allocno[dest_regno], src_regno);
1592 for (i = src_regno;
1593 i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src));
1594 i++)
1595 SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i);
1596 }
1597 }
1598}
1599\f
1600/* Indicate that hard register number FROM was eliminated and replaced with
1601 an offset from hard register number TO. The status of hard registers live
1602 at the start of a basic block is updated by replacing a use of FROM with
1603 a use of TO. */
1604
1605void
1606mark_elimination (from, to)
1607 int from, to;
1608{
1609 int i;
1610
1611 for (i = 0; i < n_basic_blocks; i++)
e881bb1b
RH
1612 {
1613 register regset r = BASIC_BLOCK (i)->global_live_at_start;
1614 if (REGNO_REG_SET_P (r, from))
1615 {
1616 CLEAR_REGNO_REG_SET (r, from);
1617 SET_REGNO_REG_SET (r, to);
1618 }
1619 }
38398762
RK
1620}
1621\f
cad6f7d0
BS
1622/* Used for communication between the following functions. Holds the
1623 current life information. */
1624static regset live_relevant_regs;
1625
1626/* Record in live_relevant_regs that register REG became live. This
1627 is called via note_stores. */
1628static void
1629reg_becomes_live (reg, setter)
1630 rtx reg;
1631 rtx setter ATTRIBUTE_UNUSED;
1632{
1633 int regno;
1634
1635 if (GET_CODE (reg) == SUBREG)
1636 reg = SUBREG_REG (reg);
1637
1638 if (GET_CODE (reg) != REG)
1639 return;
1640
1641 regno = REGNO (reg);
1642 if (regno < FIRST_PSEUDO_REGISTER)
1643 {
1644 int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1645 while (nregs-- > 0)
1646 SET_REGNO_REG_SET (live_relevant_regs, regno++);
1647 }
1648 else if (reg_renumber[regno] >= 0)
1649 SET_REGNO_REG_SET (live_relevant_regs, regno);
1650}
1651
1652/* Record in live_relevant_regs that register REGNO died. */
1653static void
1654reg_dies (regno, mode)
1655 int regno;
1656 enum machine_mode mode;
1657{
1658 if (regno < FIRST_PSEUDO_REGISTER)
1659 {
1660 int nregs = HARD_REGNO_NREGS (regno, mode);
1661 while (nregs-- > 0)
1662 CLEAR_REGNO_REG_SET (live_relevant_regs, regno++);
1663 }
1664 else
1665 CLEAR_REGNO_REG_SET (live_relevant_regs, regno);
1666}
1667
1668/* Walk the insns of the current function and build reload_insn_chain,
1669 and record register life information. */
1670static void
108c535a
RH
1671build_insn_chain (first)
1672 rtx first;
cad6f7d0
BS
1673{
1674 struct insn_chain **p = &reload_insn_chain;
1675 struct insn_chain *prev = 0;
108c535a 1676 int b = 0;
cad6f7d0
BS
1677
1678 live_relevant_regs = ALLOCA_REG_SET ();
1679
108c535a 1680 for (; first; first = NEXT_INSN (first))
cad6f7d0 1681 {
108c535a 1682 struct insn_chain *c;
cad6f7d0 1683
108c535a 1684 if (first == BLOCK_HEAD (b))
cad6f7d0 1685 {
108c535a
RH
1686 int i;
1687 CLEAR_REG_SET (live_relevant_regs);
1688 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1689 if (REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, i)
1690 && ! TEST_HARD_REG_BIT (eliminable_regset, i))
1691 SET_REGNO_REG_SET (live_relevant_regs, i);
1692
1693 for (; i < max_regno; i++)
1694 if (reg_renumber[i] >= 0
1695 && REGNO_REG_SET_P (BASIC_BLOCK (b)->global_live_at_start, i))
1696 SET_REGNO_REG_SET (live_relevant_regs, i);
1697 }
1698
1699 if (GET_CODE (first) != NOTE && GET_CODE (first) != BARRIER)
021d1677 1700 {
108c535a
RH
1701 c = new_insn_chain ();
1702 c->prev = prev;
1703 prev = c;
1704 *p = c;
1705 p = &c->next;
1706 c->insn = first;
1707 c->block = b;
1708
1709 COPY_REG_SET (c->live_before, live_relevant_regs);
cad6f7d0 1710
108c535a 1711 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
cad6f7d0 1712 {
108c535a 1713 rtx link;
cad6f7d0 1714
108c535a 1715 /* Mark the death of everything that dies in this instruction. */
cad6f7d0 1716
108c535a
RH
1717 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1718 if (REG_NOTE_KIND (link) == REG_DEAD
1719 && GET_CODE (XEXP (link, 0)) == REG)
1720 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)));
cad6f7d0 1721
108c535a 1722 /* Mark everything born in this instruction as live. */
cad6f7d0 1723
108c535a 1724 note_stores (PATTERN (first), reg_becomes_live);
cad6f7d0 1725 }
3663a304 1726
108c535a
RH
1727 /* Remember which registers are live at the end of the insn, before
1728 killing those with REG_UNUSED notes. */
1729 COPY_REG_SET (c->live_after, live_relevant_regs);
1730
1731 if (GET_RTX_CLASS (GET_CODE (first)) == 'i')
1732 {
1733 rtx link;
1734
1735 /* Mark anything that is set in this insn and then unused as dying. */
1736
1737 for (link = REG_NOTES (first); link; link = XEXP (link, 1))
1738 if (REG_NOTE_KIND (link) == REG_UNUSED
1739 && GET_CODE (XEXP (link, 0)) == REG)
1740 reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0)));
1741 }
3663a304 1742 }
021d1677 1743
108c535a
RH
1744 if (first == BLOCK_END (b))
1745 b++;
1746
1747 /* Stop after we pass the end of the last basic block. Verify that
1748 no real insns are after the end of the last basic block.
1749
1750 We may want to reorganize the loop somewhat since this test should
1751 always be the right exit test. */
1752 if (b == n_basic_blocks)
1753 {
1754 for (first = NEXT_INSN (first) ; first; first = NEXT_INSN (first))
1755 if (GET_RTX_CLASS (GET_CODE (first)) == 'i'
1756 && GET_CODE (PATTERN (first)) != USE)
1757 abort ();
1758 break;
1759 }
1760 }
cad6f7d0
BS
1761 FREE_REG_SET (live_relevant_regs);
1762 *p = 0;
1763}
1764\f
318e4b56 1765/* Print debugging trace information if -dg switch is given,
38398762
RK
1766 showing the information on which the allocation decisions are based. */
1767
1768static void
1769dump_conflicts (file)
1770 FILE *file;
1771{
1772 register int i;
1773 register int has_preferences;
a300b8d9
JW
1774 register int nregs;
1775 nregs = 0;
1776 for (i = 0; i < max_allocno; i++)
1777 {
1778 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
1779 continue;
1780 nregs++;
1781 }
1782 fprintf (file, ";; %d regs to allocate:", nregs);
38398762
RK
1783 for (i = 0; i < max_allocno; i++)
1784 {
1785 int j;
a300b8d9
JW
1786 if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0)
1787 continue;
38398762
RK
1788 fprintf (file, " %d", allocno_reg[allocno_order[i]]);
1789 for (j = 0; j < max_regno; j++)
1790 if (reg_allocno[j] == allocno_order[i]
1791 && j != allocno_reg[allocno_order[i]])
1792 fprintf (file, "+%d", j);
1793 if (allocno_size[allocno_order[i]] != 1)
1794 fprintf (file, " (%d)", allocno_size[allocno_order[i]]);
1795 }
1796 fprintf (file, "\n");
1797
1798 for (i = 0; i < max_allocno; i++)
1799 {
1800 register int j;
1801 fprintf (file, ";; %d conflicts:", allocno_reg[i]);
1802 for (j = 0; j < max_allocno; j++)
1803 if (CONFLICTP (i, j) || CONFLICTP (j, i))
1804 fprintf (file, " %d", allocno_reg[j]);
1805 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1806 if (TEST_HARD_REG_BIT (hard_reg_conflicts[i], j))
1807 fprintf (file, " %d", j);
1808 fprintf (file, "\n");
1809
1810 has_preferences = 0;
1811 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1812 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1813 has_preferences = 1;
1814
1815 if (! has_preferences)
1816 continue;
1817 fprintf (file, ";; %d preferences:", allocno_reg[i]);
1818 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
1819 if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j))
1820 fprintf (file, " %d", j);
1821 fprintf (file, "\n");
1822 }
1823 fprintf (file, "\n");
1824}
1825
1826void
1827dump_global_regs (file)
1828 FILE *file;
1829{
1830 register int i, j;
1831
1832 fprintf (file, ";; Register dispositions:\n");
1833 for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++)
1834 if (reg_renumber[i] >= 0)
1835 {
1836 fprintf (file, "%d in %d ", i, reg_renumber[i]);
1837 if (++j % 6 == 0)
1838 fprintf (file, "\n");
1839 }
1840
1841 fprintf (file, "\n\n;; Hard regs used: ");
1842 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1843 if (regs_ever_live[i])
1844 fprintf (file, " %d", i);
1845 fprintf (file, "\n\n");
1846}
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