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38398762 | 1 | /* Allocate registers for pseudo-registers that span basic blocks. |
a5cad800 | 2 | Copyright (C) 1987, 88, 91, 94, 96-98, 1999 Free Software Foundation, Inc. |
38398762 RK |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
a35311b0 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
38398762 RK |
20 | |
21 | ||
38398762 | 22 | #include "config.h" |
670ee920 | 23 | #include "system.h" |
ccd043a9 | 24 | |
f6781658 L |
25 | #include "machmode.h" |
26 | #include "hard-reg-set.h" | |
38398762 | 27 | #include "rtl.h" |
6baf1cc8 | 28 | #include "tm_p.h" |
38398762 RK |
29 | #include "flags.h" |
30 | #include "basic-block.h" | |
38398762 | 31 | #include "regs.h" |
49ad7cfa | 32 | #include "function.h" |
38398762 | 33 | #include "insn-config.h" |
cad6f7d0 | 34 | #include "reload.h" |
38398762 | 35 | #include "output.h" |
2e107e9e | 36 | #include "toplev.h" |
38398762 RK |
37 | |
38 | /* This pass of the compiler performs global register allocation. | |
39 | It assigns hard register numbers to all the pseudo registers | |
40 | that were not handled in local_alloc. Assignments are recorded | |
41 | in the vector reg_renumber, not by changing the rtl code. | |
42 | (Such changes are made by final). The entry point is | |
43 | the function global_alloc. | |
44 | ||
45 | After allocation is complete, the reload pass is run as a subroutine | |
46 | of this pass, so that when a pseudo reg loses its hard reg due to | |
47 | spilling it is possible to make a second attempt to find a hard | |
48 | reg for it. The reload pass is independent in other respects | |
49 | and it is run even when stupid register allocation is in use. | |
50 | ||
a300b8d9 JW |
51 | 1. Assign allocation-numbers (allocnos) to the pseudo-registers |
52 | still needing allocations and to the pseudo-registers currently | |
53 | allocated by local-alloc which may be spilled by reload. | |
38398762 RK |
54 | Set up tables reg_allocno and allocno_reg to map |
55 | reg numbers to allocnos and vice versa. | |
56 | max_allocno gets the number of allocnos in use. | |
57 | ||
58 | 2. Allocate a max_allocno by max_allocno conflict bit matrix and clear it. | |
59 | Allocate a max_allocno by FIRST_PSEUDO_REGISTER conflict matrix | |
60 | for conflicts between allocnos and explicit hard register use | |
61 | (which includes use of pseudo-registers allocated by local_alloc). | |
62 | ||
a300b8d9 | 63 | 3. For each basic block |
38398762 | 64 | walk forward through the block, recording which |
a300b8d9 JW |
65 | pseudo-registers and which hardware registers are live. |
66 | Build the conflict matrix between the pseudo-registers | |
67 | and another of pseudo-registers versus hardware registers. | |
38398762 | 68 | Also record the preferred hardware registers |
a300b8d9 | 69 | for each pseudo-register. |
38398762 RK |
70 | |
71 | 4. Sort a table of the allocnos into order of | |
72 | desirability of the variables. | |
73 | ||
74 | 5. Allocate the variables in that order; each if possible into | |
75 | a preferred register, else into another register. */ | |
76 | \f | |
a300b8d9 | 77 | /* Number of pseudo-registers which are candidates for allocation. */ |
38398762 RK |
78 | |
79 | static int max_allocno; | |
80 | ||
81 | /* Indexed by (pseudo) reg number, gives the allocno, or -1 | |
a300b8d9 | 82 | for pseudo registers which are not to be allocated. */ |
38398762 | 83 | |
f15ebf65 | 84 | static int *reg_allocno; |
38398762 RK |
85 | |
86 | /* Indexed by allocno, gives the reg number. */ | |
87 | ||
88 | static int *allocno_reg; | |
89 | ||
90 | /* A vector of the integers from 0 to max_allocno-1, | |
91 | sorted in the order of first-to-be-allocated first. */ | |
92 | ||
93 | static int *allocno_order; | |
94 | ||
95 | /* Indexed by an allocno, gives the number of consecutive | |
96 | hard registers needed by that pseudo reg. */ | |
97 | ||
98 | static int *allocno_size; | |
99 | ||
100 | /* Indexed by (pseudo) reg number, gives the number of another | |
6dc42e49 | 101 | lower-numbered pseudo reg which can share a hard reg with this pseudo |
38398762 RK |
102 | *even if the two pseudos would otherwise appear to conflict*. */ |
103 | ||
104 | static int *reg_may_share; | |
105 | ||
b1ec3c92 CH |
106 | /* Define the number of bits in each element of `conflicts' and what |
107 | type that element has. We use the largest integer format on the | |
108 | host machine. */ | |
109 | ||
110 | #define INT_BITS HOST_BITS_PER_WIDE_INT | |
111 | #define INT_TYPE HOST_WIDE_INT | |
112 | ||
38398762 RK |
113 | /* max_allocno by max_allocno array of bits, |
114 | recording whether two allocno's conflict (can't go in the same | |
115 | hardware register). | |
116 | ||
267cf808 | 117 | `conflicts' is symmetric after the call to mirror_conflicts. */ |
38398762 | 118 | |
b1ec3c92 | 119 | static INT_TYPE *conflicts; |
38398762 RK |
120 | |
121 | /* Number of ints require to hold max_allocno bits. | |
122 | This is the length of a row in `conflicts'. */ | |
123 | ||
124 | static int allocno_row_words; | |
125 | ||
126 | /* Two macros to test or store 1 in an element of `conflicts'. */ | |
127 | ||
128 | #define CONFLICTP(I, J) \ | |
267cf808 JL |
129 | (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \ |
130 | & ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS))) | |
38398762 RK |
131 | |
132 | #define SET_CONFLICT(I, J) \ | |
267cf808 JL |
133 | (conflicts[(I) * allocno_row_words + (unsigned)(J) / INT_BITS] \ |
134 | |= ((INT_TYPE) 1 << ((unsigned)(J) % INT_BITS))) | |
135 | ||
32c8d1bc R |
136 | /* For any allocno set in ALLOCNO_SET, set ALLOCNO to that allocno, |
137 | and execute CODE. */ | |
138 | #define EXECUTE_IF_SET_IN_ALLOCNO_SET(ALLOCNO_SET, ALLOCNO, CODE) \ | |
139 | do { \ | |
140 | int i_; \ | |
141 | int allocno_; \ | |
142 | INT_TYPE *p_ = (ALLOCNO_SET); \ | |
143 | \ | |
144 | for (i_ = allocno_row_words - 1, allocno_ = 0; i_ >= 0; \ | |
145 | i_--, allocno_ += INT_BITS) \ | |
146 | { \ | |
147 | unsigned INT_TYPE word_ = (unsigned INT_TYPE) *p_++; \ | |
148 | \ | |
149 | for ((ALLOCNO) = allocno_; word_; word_ >>= 1, (ALLOCNO)++) \ | |
150 | { \ | |
151 | if (word_ & 1) \ | |
36013ffc | 152 | {CODE;} \ |
32c8d1bc R |
153 | } \ |
154 | } \ | |
155 | } while (0) | |
156 | ||
157 | /* For any allocno that conflicts with IN_ALLOCNO, set OUT_ALLOCNO to | |
158 | the conflicting allocno, and execute CODE. This macro assumes that | |
159 | mirror_conflicts has been run. */ | |
160 | #define EXECUTE_IF_CONFLICT(IN_ALLOCNO, OUT_ALLOCNO, CODE)\ | |
161 | EXECUTE_IF_SET_IN_ALLOCNO_SET (conflicts + (IN_ALLOCNO) * allocno_row_words,\ | |
36013ffc | 162 | OUT_ALLOCNO, (CODE)) |
32c8d1bc | 163 | |
38398762 RK |
164 | /* Set of hard regs currently live (during scan of all insns). */ |
165 | ||
166 | static HARD_REG_SET hard_regs_live; | |
167 | ||
168 | /* Indexed by N, set of hard regs conflicting with allocno N. */ | |
169 | ||
170 | static HARD_REG_SET *hard_reg_conflicts; | |
171 | ||
172 | /* Indexed by N, set of hard regs preferred by allocno N. | |
173 | This is used to make allocnos go into regs that are copied to or from them, | |
174 | when possible, to reduce register shuffling. */ | |
175 | ||
176 | static HARD_REG_SET *hard_reg_preferences; | |
177 | ||
178 | /* Similar, but just counts register preferences made in simple copy | |
179 | operations, rather than arithmetic. These are given priority because | |
180 | we can always eliminate an insn by using these, but using a register | |
181 | in the above list won't always eliminate an insn. */ | |
182 | ||
183 | static HARD_REG_SET *hard_reg_copy_preferences; | |
184 | ||
185 | /* Similar to hard_reg_preferences, but includes bits for subsequent | |
186 | registers when an allocno is multi-word. The above variable is used for | |
187 | allocation while this is used to build reg_someone_prefers, below. */ | |
188 | ||
189 | static HARD_REG_SET *hard_reg_full_preferences; | |
190 | ||
191 | /* Indexed by N, set of hard registers that some later allocno has a | |
192 | preference for. */ | |
193 | ||
194 | static HARD_REG_SET *regs_someone_prefers; | |
195 | ||
196 | /* Set of registers that global-alloc isn't supposed to use. */ | |
197 | ||
198 | static HARD_REG_SET no_global_alloc_regs; | |
199 | ||
200 | /* Set of registers used so far. */ | |
201 | ||
202 | static HARD_REG_SET regs_used_so_far; | |
203 | ||
204 | /* Number of calls crossed by each allocno. */ | |
205 | ||
206 | static int *allocno_calls_crossed; | |
207 | ||
208 | /* Number of refs (weighted) to each allocno. */ | |
209 | ||
210 | static int *allocno_n_refs; | |
211 | ||
212 | /* Guess at live length of each allocno. | |
213 | This is actually the max of the live lengths of the regs. */ | |
214 | ||
215 | static int *allocno_live_length; | |
216 | ||
1d56e983 RS |
217 | /* Number of refs (weighted) to each hard reg, as used by local alloc. |
218 | It is zero for a reg that contains global pseudos or is explicitly used. */ | |
219 | ||
220 | static int local_reg_n_refs[FIRST_PSEUDO_REGISTER]; | |
221 | ||
222 | /* Guess at live length of each hard reg, as used by local alloc. | |
223 | This is actually the sum of the live lengths of the specific regs. */ | |
224 | ||
225 | static int local_reg_live_length[FIRST_PSEUDO_REGISTER]; | |
226 | ||
38398762 RK |
227 | /* Test a bit in TABLE, a vector of HARD_REG_SETs, |
228 | for vector element I, and hard register number J. */ | |
229 | ||
230 | #define REGBITP(TABLE, I, J) TEST_HARD_REG_BIT (TABLE[I], J) | |
231 | ||
232 | /* Set to 1 a bit in a vector of HARD_REG_SETs. Works like REGBITP. */ | |
233 | ||
234 | #define SET_REGBIT(TABLE, I, J) SET_HARD_REG_BIT (TABLE[I], J) | |
235 | ||
236 | /* Bit mask for allocnos live at current point in the scan. */ | |
237 | ||
b1ec3c92 | 238 | static INT_TYPE *allocnos_live; |
38398762 RK |
239 | |
240 | /* Test, set or clear bit number I in allocnos_live, | |
241 | a bit vector indexed by allocno. */ | |
242 | ||
32c8d1bc R |
243 | #define ALLOCNO_LIVE_P(I) \ |
244 | (allocnos_live[(unsigned)(I) / INT_BITS] \ | |
245 | & ((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS))) | |
38398762 | 246 | |
32c8d1bc R |
247 | #define SET_ALLOCNO_LIVE(I) \ |
248 | (allocnos_live[(unsigned)(I) / INT_BITS] \ | |
249 | |= ((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS))) | |
38398762 | 250 | |
32c8d1bc R |
251 | #define CLEAR_ALLOCNO_LIVE(I) \ |
252 | (allocnos_live[(unsigned)(I) / INT_BITS] \ | |
253 | &= ~((INT_TYPE) 1 << ((unsigned)(I) % INT_BITS))) | |
38398762 RK |
254 | |
255 | /* This is turned off because it doesn't work right for DImode. | |
256 | (And it is only used for DImode, so the other cases are worthless.) | |
257 | The problem is that it isn't true that there is NO possibility of conflict; | |
258 | only that there is no conflict if the two pseudos get the exact same regs. | |
259 | If they were allocated with a partial overlap, there would be a conflict. | |
260 | We can't safely turn off the conflict unless we have another way to | |
261 | prevent the partial overlap. | |
262 | ||
263 | Idea: change hard_reg_conflicts so that instead of recording which | |
264 | hard regs the allocno may not overlap, it records where the allocno | |
265 | may not start. Change both where it is used and where it is updated. | |
266 | Then there is a way to record that (reg:DI 108) may start at 10 | |
267 | but not at 9 or 11. There is still the question of how to record | |
268 | this semi-conflict between two pseudos. */ | |
269 | #if 0 | |
270 | /* Reg pairs for which conflict after the current insn | |
271 | is inhibited by a REG_NO_CONFLICT note. | |
272 | If the table gets full, we ignore any other notes--that is conservative. */ | |
273 | #define NUM_NO_CONFLICT_PAIRS 4 | |
274 | /* Number of pairs in use in this insn. */ | |
275 | int n_no_conflict_pairs; | |
276 | static struct { int allocno1, allocno2;} | |
277 | no_conflict_pairs[NUM_NO_CONFLICT_PAIRS]; | |
278 | #endif /* 0 */ | |
279 | ||
280 | /* Record all regs that are set in any one insn. | |
281 | Communication from mark_reg_{store,clobber} and global_conflicts. */ | |
282 | ||
283 | static rtx *regs_set; | |
284 | static int n_regs_set; | |
285 | ||
daf55ac6 | 286 | /* All registers that can be eliminated. */ |
38398762 RK |
287 | |
288 | static HARD_REG_SET eliminable_regset; | |
289 | ||
e1b6684c | 290 | static int allocno_compare PROTO((const PTR, const PTR)); |
82c68a78 | 291 | static void global_conflicts PROTO((void)); |
267cf808 | 292 | static void mirror_conflicts PROTO((void)); |
82c68a78 RK |
293 | static void expand_preferences PROTO((void)); |
294 | static void prune_preferences PROTO((void)); | |
295 | static void find_reg PROTO((int, HARD_REG_SET, int, int, int)); | |
296 | static void record_one_conflict PROTO((int)); | |
8d4c79be | 297 | static void record_conflicts PROTO((int *, int)); |
84832317 MM |
298 | static void mark_reg_store PROTO((rtx, rtx, void *)); |
299 | static void mark_reg_clobber PROTO((rtx, rtx, void *)); | |
82c68a78 RK |
300 | static void mark_reg_conflicts PROTO((rtx)); |
301 | static void mark_reg_death PROTO((rtx)); | |
302 | static void mark_reg_live_nc PROTO((int, enum machine_mode)); | |
303 | static void set_preference PROTO((rtx, rtx)); | |
304 | static void dump_conflicts PROTO((FILE *)); | |
84832317 | 305 | static void reg_becomes_live PROTO((rtx, rtx, void *)); |
cad6f7d0 | 306 | static void reg_dies PROTO((int, enum machine_mode)); |
108c535a | 307 | static void build_insn_chain PROTO((rtx)); |
38398762 RK |
308 | \f |
309 | /* Perform allocation of pseudo-registers not allocated by local_alloc. | |
310 | FILE is a file to output debugging information on, | |
ab40ad2b | 311 | or zero if such output is not desired. |
38398762 | 312 | |
ab40ad2b RS |
313 | Return value is nonzero if reload failed |
314 | and we must not do any more for this function. */ | |
315 | ||
316 | int | |
38398762 RK |
317 | global_alloc (file) |
318 | FILE *file; | |
319 | { | |
8c316ae2 | 320 | int retval; |
38398762 RK |
321 | #ifdef ELIMINABLE_REGS |
322 | static struct {int from, to; } eliminables[] = ELIMINABLE_REGS; | |
323 | #endif | |
daf55ac6 RK |
324 | int need_fp |
325 | = (! flag_omit_frame_pointer | |
326 | #ifdef EXIT_IGNORE_STACK | |
327 | || (current_function_calls_alloca && EXIT_IGNORE_STACK) | |
328 | #endif | |
329 | || FRAME_POINTER_REQUIRED); | |
330 | ||
f8344bea | 331 | register size_t i; |
38398762 RK |
332 | rtx x; |
333 | ||
334 | max_allocno = 0; | |
335 | ||
336 | /* A machine may have certain hard registers that | |
337 | are safe to use only within a basic block. */ | |
338 | ||
339 | CLEAR_HARD_REG_SET (no_global_alloc_regs); | |
340 | #ifdef OVERLAPPING_REGNO_P | |
341 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
342 | if (OVERLAPPING_REGNO_P (i)) | |
343 | SET_HARD_REG_BIT (no_global_alloc_regs, i); | |
344 | #endif | |
345 | ||
346 | /* Build the regset of all eliminable registers and show we can't use those | |
347 | that we already know won't be eliminated. */ | |
348 | #ifdef ELIMINABLE_REGS | |
349 | for (i = 0; i < sizeof eliminables / sizeof eliminables[0]; i++) | |
350 | { | |
351 | SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from); | |
352 | ||
353 | if (! CAN_ELIMINATE (eliminables[i].from, eliminables[i].to) | |
daf55ac6 | 354 | || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp)) |
38398762 RK |
355 | SET_HARD_REG_BIT (no_global_alloc_regs, eliminables[i].from); |
356 | } | |
7b0957a7 | 357 | #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM |
daf55ac6 RK |
358 | SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM); |
359 | if (need_fp) | |
7b0957a7 DE |
360 | SET_HARD_REG_BIT (no_global_alloc_regs, HARD_FRAME_POINTER_REGNUM); |
361 | #endif | |
daf55ac6 | 362 | |
38398762 RK |
363 | #else |
364 | SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM); | |
daf55ac6 | 365 | if (need_fp) |
38398762 RK |
366 | SET_HARD_REG_BIT (no_global_alloc_regs, FRAME_POINTER_REGNUM); |
367 | #endif | |
368 | ||
369 | /* Track which registers have already been used. Start with registers | |
370 | explicitly in the rtl, then registers allocated by local register | |
b4b4db94 | 371 | allocation. */ |
38398762 RK |
372 | |
373 | CLEAR_HARD_REG_SET (regs_used_so_far); | |
b4b4db94 RS |
374 | #ifdef LEAF_REGISTERS |
375 | /* If we are doing the leaf function optimization, and this is a leaf | |
376 | function, it means that the registers that take work to save are those | |
377 | that need a register window. So prefer the ones that can be used in | |
378 | a leaf function. */ | |
379 | { | |
380 | char *cheap_regs; | |
381 | static char leaf_regs[] = LEAF_REGISTERS; | |
382 | ||
383 | if (only_leaf_regs_used () && leaf_function_p ()) | |
384 | cheap_regs = leaf_regs; | |
385 | else | |
386 | cheap_regs = call_used_regs; | |
387 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
388 | if (regs_ever_live[i] || cheap_regs[i]) | |
389 | SET_HARD_REG_BIT (regs_used_so_far, i); | |
390 | } | |
391 | #else | |
392 | /* We consider registers that do not have to be saved over calls as if | |
393 | they were already used since there is no cost in using them. */ | |
38398762 RK |
394 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) |
395 | if (regs_ever_live[i] || call_used_regs[i]) | |
396 | SET_HARD_REG_BIT (regs_used_so_far, i); | |
b4b4db94 | 397 | #endif |
38398762 | 398 | |
e51712db | 399 | for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++) |
38398762 RK |
400 | if (reg_renumber[i] >= 0) |
401 | SET_HARD_REG_BIT (regs_used_so_far, reg_renumber[i]); | |
402 | ||
403 | /* Establish mappings from register number to allocation number | |
404 | and vice versa. In the process, count the allocnos. */ | |
405 | ||
67289ea6 | 406 | reg_allocno = (int *) xmalloc (max_regno * sizeof (int)); |
38398762 RK |
407 | |
408 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
409 | reg_allocno[i] = -1; | |
410 | ||
411 | /* Initialize the shared-hard-reg mapping | |
412 | from the list of pairs that may share. */ | |
67289ea6 | 413 | reg_may_share = (int *) xcalloc (max_regno, sizeof (int)); |
38398762 RK |
414 | for (x = regs_may_share; x; x = XEXP (XEXP (x, 1), 1)) |
415 | { | |
416 | int r1 = REGNO (XEXP (x, 0)); | |
417 | int r2 = REGNO (XEXP (XEXP (x, 1), 0)); | |
418 | if (r1 > r2) | |
419 | reg_may_share[r1] = r2; | |
420 | else | |
421 | reg_may_share[r2] = r1; | |
422 | } | |
423 | ||
e51712db | 424 | for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++) |
38398762 RK |
425 | /* Note that reg_live_length[i] < 0 indicates a "constant" reg |
426 | that we are supposed to refrain from putting in a hard reg. | |
427 | -2 means do make an allocno but don't allocate it. */ | |
a300b8d9 | 428 | if (REG_N_REFS (i) != 0 && REG_LIVE_LENGTH (i) != -1 |
38398762 RK |
429 | /* Don't allocate pseudos that cross calls, |
430 | if this function receives a nonlocal goto. */ | |
431 | && (! current_function_has_nonlocal_label | |
b1f21e0a | 432 | || REG_N_CALLS_CROSSED (i) == 0)) |
38398762 | 433 | { |
a300b8d9 | 434 | if (reg_renumber[i] < 0 && reg_may_share[i] && reg_allocno[reg_may_share[i]] >= 0) |
38398762 RK |
435 | reg_allocno[i] = reg_allocno[reg_may_share[i]]; |
436 | else | |
437 | reg_allocno[i] = max_allocno++; | |
b1f21e0a | 438 | if (REG_LIVE_LENGTH (i) == 0) |
38398762 RK |
439 | abort (); |
440 | } | |
441 | else | |
442 | reg_allocno[i] = -1; | |
443 | ||
67289ea6 MM |
444 | allocno_reg = (int *) xmalloc (max_allocno * sizeof (int)); |
445 | allocno_size = (int *) xcalloc (max_allocno, sizeof (int)); | |
446 | allocno_calls_crossed = (int *) xcalloc (max_allocno, sizeof (int)); | |
447 | allocno_n_refs = (int *) xcalloc (max_allocno, sizeof (int)); | |
448 | allocno_live_length = (int *) xcalloc (max_allocno, sizeof (int)); | |
38398762 | 449 | |
e51712db | 450 | for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++) |
38398762 RK |
451 | if (reg_allocno[i] >= 0) |
452 | { | |
453 | int allocno = reg_allocno[i]; | |
454 | allocno_reg[allocno] = i; | |
455 | allocno_size[allocno] = PSEUDO_REGNO_SIZE (i); | |
b1f21e0a MM |
456 | allocno_calls_crossed[allocno] += REG_N_CALLS_CROSSED (i); |
457 | allocno_n_refs[allocno] += REG_N_REFS (i); | |
458 | if (allocno_live_length[allocno] < REG_LIVE_LENGTH (i)) | |
459 | allocno_live_length[allocno] = REG_LIVE_LENGTH (i); | |
38398762 RK |
460 | } |
461 | ||
1d56e983 RS |
462 | /* Calculate amount of usage of each hard reg by pseudos |
463 | allocated by local-alloc. This is to see if we want to | |
464 | override it. */ | |
4c9a05bc RK |
465 | bzero ((char *) local_reg_live_length, sizeof local_reg_live_length); |
466 | bzero ((char *) local_reg_n_refs, sizeof local_reg_n_refs); | |
e51712db | 467 | for (i = FIRST_PSEUDO_REGISTER; i < (size_t) max_regno; i++) |
a300b8d9 | 468 | if (reg_renumber[i] >= 0) |
1d56e983 | 469 | { |
34e56753 RS |
470 | int regno = reg_renumber[i]; |
471 | int endregno = regno + HARD_REGNO_NREGS (regno, PSEUDO_REGNO_MODE (i)); | |
472 | int j; | |
473 | ||
474 | for (j = regno; j < endregno; j++) | |
475 | { | |
b1f21e0a MM |
476 | local_reg_n_refs[j] += REG_N_REFS (i); |
477 | local_reg_live_length[j] += REG_LIVE_LENGTH (i); | |
34e56753 | 478 | } |
1d56e983 | 479 | } |
34e56753 | 480 | |
1d56e983 RS |
481 | /* We can't override local-alloc for a reg used not just by local-alloc. */ |
482 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
483 | if (regs_ever_live[i]) | |
484 | local_reg_n_refs[i] = 0; | |
0dfa4517 | 485 | |
38398762 RK |
486 | /* Allocate the space for the conflict and preference tables and |
487 | initialize them. */ | |
488 | ||
489 | hard_reg_conflicts | |
67289ea6 | 490 | = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET)); |
38398762 | 491 | hard_reg_preferences |
67289ea6 | 492 | = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET)); |
38398762 | 493 | hard_reg_copy_preferences |
67289ea6 | 494 | = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET)); |
38398762 | 495 | hard_reg_full_preferences |
67289ea6 | 496 | = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET)); |
38398762 | 497 | regs_someone_prefers |
67289ea6 | 498 | = (HARD_REG_SET *) xcalloc (max_allocno, sizeof (HARD_REG_SET)); |
38398762 RK |
499 | |
500 | allocno_row_words = (max_allocno + INT_BITS - 1) / INT_BITS; | |
501 | ||
ba3b3878 BK |
502 | /* We used to use alloca here, but the size of what it would try to |
503 | allocate would occasionally cause it to exceed the stack limit and | |
504 | cause unpredictable core dumps. Some examples were > 2Mb in size. */ | |
3de90026 RH |
505 | conflicts = (INT_TYPE *) xcalloc (max_allocno * allocno_row_words, |
506 | sizeof (INT_TYPE)); | |
38398762 | 507 | |
67289ea6 | 508 | allocnos_live = (INT_TYPE *) xmalloc (allocno_row_words * sizeof (INT_TYPE)); |
38398762 RK |
509 | |
510 | /* If there is work to be done (at least one reg to allocate), | |
511 | perform global conflict analysis and allocate the regs. */ | |
512 | ||
513 | if (max_allocno > 0) | |
514 | { | |
515 | /* Scan all the insns and compute the conflicts among allocnos | |
516 | and between allocnos and hard regs. */ | |
517 | ||
518 | global_conflicts (); | |
519 | ||
267cf808 JL |
520 | mirror_conflicts (); |
521 | ||
38398762 RK |
522 | /* Eliminate conflicts between pseudos and eliminable registers. If |
523 | the register is not eliminated, the pseudo won't really be able to | |
524 | live in the eliminable register, so the conflict doesn't matter. | |
525 | If we do eliminate the register, the conflict will no longer exist. | |
1d56e983 RS |
526 | So in either case, we can ignore the conflict. Likewise for |
527 | preferences. */ | |
38398762 | 528 | |
e51712db | 529 | for (i = 0; i < (size_t) max_allocno; i++) |
1d56e983 RS |
530 | { |
531 | AND_COMPL_HARD_REG_SET (hard_reg_conflicts[i], eliminable_regset); | |
532 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[i], | |
533 | eliminable_regset); | |
534 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[i], eliminable_regset); | |
535 | } | |
38398762 RK |
536 | |
537 | /* Try to expand the preferences by merging them between allocnos. */ | |
538 | ||
539 | expand_preferences (); | |
540 | ||
541 | /* Determine the order to allocate the remaining pseudo registers. */ | |
542 | ||
67289ea6 | 543 | allocno_order = (int *) xmalloc (max_allocno * sizeof (int)); |
e51712db | 544 | for (i = 0; i < (size_t) max_allocno; i++) |
38398762 RK |
545 | allocno_order[i] = i; |
546 | ||
547 | /* Default the size to 1, since allocno_compare uses it to divide by. | |
548 | Also convert allocno_live_length of zero to -1. A length of zero | |
549 | can occur when all the registers for that allocno have reg_live_length | |
550 | equal to -2. In this case, we want to make an allocno, but not | |
551 | allocate it. So avoid the divide-by-zero and set it to a low | |
552 | priority. */ | |
553 | ||
e51712db | 554 | for (i = 0; i < (size_t) max_allocno; i++) |
38398762 RK |
555 | { |
556 | if (allocno_size[i] == 0) | |
557 | allocno_size[i] = 1; | |
558 | if (allocno_live_length[i] == 0) | |
559 | allocno_live_length[i] = -1; | |
560 | } | |
561 | ||
562 | qsort (allocno_order, max_allocno, sizeof (int), allocno_compare); | |
563 | ||
564 | prune_preferences (); | |
565 | ||
566 | if (file) | |
567 | dump_conflicts (file); | |
568 | ||
569 | /* Try allocating them, one by one, in that order, | |
570 | except for parameters marked with reg_live_length[regno] == -2. */ | |
571 | ||
e51712db | 572 | for (i = 0; i < (size_t) max_allocno; i++) |
a300b8d9 JW |
573 | if (reg_renumber[allocno_reg[allocno_order[i]]] < 0 |
574 | && REG_LIVE_LENGTH (allocno_reg[allocno_order[i]]) >= 0) | |
38398762 RK |
575 | { |
576 | /* If we have more than one register class, | |
577 | first try allocating in the class that is cheapest | |
578 | for this pseudo-reg. If that fails, try any reg. */ | |
579 | if (N_REG_CLASSES > 1) | |
580 | { | |
ea8693a4 | 581 | find_reg (allocno_order[i], 0, 0, 0, 0); |
38398762 RK |
582 | if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0) |
583 | continue; | |
584 | } | |
b1ec3c92 | 585 | if (reg_alternate_class (allocno_reg[allocno_order[i]]) != NO_REGS) |
ea8693a4 | 586 | find_reg (allocno_order[i], 0, 1, 0, 0); |
38398762 | 587 | } |
67289ea6 MM |
588 | |
589 | free (allocno_order); | |
38398762 RK |
590 | } |
591 | ||
592 | /* Do the reloads now while the allocno data still exist, so that we can | |
593 | try to assign new hard regs to any pseudo regs that are spilled. */ | |
594 | ||
7e860cf7 RS |
595 | #if 0 /* We need to eliminate regs even if there is no rtl code, |
596 | for the sake of debugging information. */ | |
38398762 | 597 | if (n_basic_blocks > 0) |
7e860cf7 | 598 | #endif |
cad6f7d0 | 599 | { |
108c535a | 600 | build_insn_chain (get_insns ()); |
cad6f7d0 BS |
601 | retval = reload (get_insns (), 1, file); |
602 | } | |
8c316ae2 | 603 | |
67289ea6 MM |
604 | /* Clean up. */ |
605 | free (reg_allocno); | |
606 | free (reg_may_share); | |
607 | free (allocno_reg); | |
608 | free (allocno_size); | |
609 | free (allocno_calls_crossed); | |
610 | free (allocno_n_refs); | |
611 | free (allocno_live_length); | |
612 | free (hard_reg_conflicts); | |
613 | free (hard_reg_preferences); | |
614 | free (hard_reg_copy_preferences); | |
615 | free (hard_reg_full_preferences); | |
616 | free (regs_someone_prefers); | |
8c316ae2 | 617 | free (conflicts); |
67289ea6 MM |
618 | free (allocnos_live); |
619 | ||
8c316ae2 | 620 | return retval; |
38398762 RK |
621 | } |
622 | ||
623 | /* Sort predicate for ordering the allocnos. | |
624 | Returns -1 (1) if *v1 should be allocated before (after) *v2. */ | |
625 | ||
626 | static int | |
daa6f17d | 627 | allocno_compare (v1p, v2p) |
e1b6684c KG |
628 | const PTR v1p; |
629 | const PTR v2p; | |
38398762 | 630 | { |
ec0ce6e2 | 631 | int v1 = *(const int *)v1p, v2 = *(const int *)v2p; |
38398762 RK |
632 | /* Note that the quotient will never be bigger than |
633 | the value of floor_log2 times the maximum number of | |
634 | times a register can occur in one insn (surely less than 100). | |
635 | Multiplying this by 10000 can't overflow. */ | |
636 | register int pri1 | |
daa6f17d RK |
637 | = (((double) (floor_log2 (allocno_n_refs[v1]) * allocno_n_refs[v1]) |
638 | / allocno_live_length[v1]) | |
639 | * 10000 * allocno_size[v1]); | |
38398762 | 640 | register int pri2 |
daa6f17d RK |
641 | = (((double) (floor_log2 (allocno_n_refs[v2]) * allocno_n_refs[v2]) |
642 | / allocno_live_length[v2]) | |
643 | * 10000 * allocno_size[v2]); | |
38398762 RK |
644 | if (pri2 - pri1) |
645 | return pri2 - pri1; | |
646 | ||
647 | /* If regs are equally good, sort by allocno, | |
648 | so that the results of qsort leave nothing to chance. */ | |
daa6f17d | 649 | return v1 - v2; |
38398762 RK |
650 | } |
651 | \f | |
652 | /* Scan the rtl code and record all conflicts and register preferences in the | |
653 | conflict matrices and preference tables. */ | |
654 | ||
655 | static void | |
656 | global_conflicts () | |
657 | { | |
658 | register int b, i; | |
659 | register rtx insn; | |
8d4c79be | 660 | int *block_start_allocnos; |
38398762 RK |
661 | |
662 | /* Make a vector that mark_reg_{store,clobber} will store in. */ | |
67289ea6 | 663 | regs_set = (rtx *) xmalloc (max_parallel * sizeof (rtx) * 2); |
38398762 | 664 | |
67289ea6 | 665 | block_start_allocnos = (int *) xmalloc (max_allocno * sizeof (int)); |
38398762 RK |
666 | |
667 | for (b = 0; b < n_basic_blocks; b++) | |
668 | { | |
4c9a05bc | 669 | bzero ((char *) allocnos_live, allocno_row_words * sizeof (INT_TYPE)); |
38398762 RK |
670 | |
671 | /* Initialize table of registers currently live | |
672 | to the state at the beginning of this basic block. | |
673 | This also marks the conflicts among them. | |
674 | ||
675 | For pseudo-regs, there is only one bit for each one | |
676 | no matter how many hard regs it occupies. | |
677 | This is ok; we know the size from PSEUDO_REGNO_SIZE. | |
678 | For explicit hard regs, we cannot know the size that way | |
679 | since one hard reg can be used with various sizes. | |
680 | Therefore, we must require that all the hard regs | |
681 | implicitly live as part of a multi-word hard reg | |
682 | are explicitly marked in basic_block_live_at_start. */ | |
683 | ||
684 | { | |
e881bb1b | 685 | register regset old = BASIC_BLOCK (b)->global_live_at_start; |
38398762 RK |
686 | int ax = 0; |
687 | ||
916b1701 | 688 | REG_SET_TO_HARD_REG_SET (hard_regs_live, old); |
1313ec9d | 689 | EXECUTE_IF_SET_IN_REG_SET (old, FIRST_PSEUDO_REGISTER, i, |
916b1701 MM |
690 | { |
691 | register int a = reg_allocno[i]; | |
692 | if (a >= 0) | |
693 | { | |
694 | SET_ALLOCNO_LIVE (a); | |
695 | block_start_allocnos[ax++] = a; | |
696 | } | |
697 | else if ((a = reg_renumber[i]) >= 0) | |
1313ec9d RK |
698 | mark_reg_live_nc |
699 | (a, PSEUDO_REGNO_MODE (i)); | |
916b1701 | 700 | }); |
38398762 RK |
701 | |
702 | /* Record that each allocno now live conflicts with each other | |
703 | allocno now live, and with each hard reg now live. */ | |
704 | ||
705 | record_conflicts (block_start_allocnos, ax); | |
4d1d8045 BS |
706 | |
707 | #ifdef STACK_REGS | |
e881bb1b RH |
708 | { |
709 | /* Pseudos can't go in stack regs at the start of a basic block | |
a05924f9 | 710 | that is reached by an abnormal edge. */ |
e881bb1b RH |
711 | |
712 | edge e; | |
713 | for (e = BASIC_BLOCK (b)->pred; e ; e = e->pred_next) | |
714 | if (e->flags & EDGE_ABNORMAL) | |
715 | break; | |
e881bb1b RH |
716 | if (e != NULL) |
717 | for (ax = FIRST_STACK_REG; ax <= LAST_STACK_REG; ax++) | |
718 | record_one_conflict (ax); | |
719 | } | |
4d1d8045 | 720 | #endif |
38398762 RK |
721 | } |
722 | ||
3b413743 | 723 | insn = BLOCK_HEAD (b); |
38398762 RK |
724 | |
725 | /* Scan the code of this basic block, noting which allocnos | |
726 | and hard regs are born or die. When one is born, | |
727 | record a conflict with all others currently live. */ | |
728 | ||
729 | while (1) | |
730 | { | |
731 | register RTX_CODE code = GET_CODE (insn); | |
732 | register rtx link; | |
733 | ||
734 | /* Make regs_set an empty set. */ | |
735 | ||
736 | n_regs_set = 0; | |
737 | ||
738 | if (code == INSN || code == CALL_INSN || code == JUMP_INSN) | |
739 | { | |
38398762 RK |
740 | |
741 | #if 0 | |
2049526b | 742 | int i = 0; |
38398762 RK |
743 | for (link = REG_NOTES (insn); |
744 | link && i < NUM_NO_CONFLICT_PAIRS; | |
745 | link = XEXP (link, 1)) | |
746 | if (REG_NOTE_KIND (link) == REG_NO_CONFLICT) | |
747 | { | |
748 | no_conflict_pairs[i].allocno1 | |
749 | = reg_allocno[REGNO (SET_DEST (PATTERN (insn)))]; | |
750 | no_conflict_pairs[i].allocno2 | |
751 | = reg_allocno[REGNO (XEXP (link, 0))]; | |
752 | i++; | |
753 | } | |
754 | #endif /* 0 */ | |
755 | ||
756 | /* Mark any registers clobbered by INSN as live, | |
757 | so they conflict with the inputs. */ | |
758 | ||
84832317 | 759 | note_stores (PATTERN (insn), mark_reg_clobber, NULL); |
38398762 RK |
760 | |
761 | /* Mark any registers dead after INSN as dead now. */ | |
762 | ||
763 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
764 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
765 | mark_reg_death (XEXP (link, 0)); | |
766 | ||
767 | /* Mark any registers set in INSN as live, | |
768 | and mark them as conflicting with all other live regs. | |
769 | Clobbers are processed again, so they conflict with | |
770 | the registers that are set. */ | |
771 | ||
84832317 | 772 | note_stores (PATTERN (insn), mark_reg_store, NULL); |
38398762 RK |
773 | |
774 | #ifdef AUTO_INC_DEC | |
775 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
776 | if (REG_NOTE_KIND (link) == REG_INC) | |
84832317 | 777 | mark_reg_store (XEXP (link, 0), NULL_RTX, NULL); |
38398762 RK |
778 | #endif |
779 | ||
333e0f7d RS |
780 | /* If INSN has multiple outputs, then any reg that dies here |
781 | and is used inside of an output | |
941c63ac JL |
782 | must conflict with the other outputs. |
783 | ||
784 | It is unsafe to use !single_set here since it will ignore an | |
785 | unused output. Just because an output is unused does not mean | |
786 | the compiler can assume the side effect will not occur. | |
787 | Consider if REG appears in the address of an output and we | |
788 | reload the output. If we allocate REG to the same hard | |
789 | register as an unused output we could set the hard register | |
790 | before the output reload insn. */ | |
791 | if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn)) | |
333e0f7d RS |
792 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) |
793 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
794 | { | |
795 | int used_in_output = 0; | |
796 | int i; | |
797 | rtx reg = XEXP (link, 0); | |
798 | ||
799 | for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) | |
800 | { | |
801 | rtx set = XVECEXP (PATTERN (insn), 0, i); | |
802 | if (GET_CODE (set) == SET | |
803 | && GET_CODE (SET_DEST (set)) != REG | |
804 | && !rtx_equal_p (reg, SET_DEST (set)) | |
805 | && reg_overlap_mentioned_p (reg, SET_DEST (set))) | |
806 | used_in_output = 1; | |
807 | } | |
808 | if (used_in_output) | |
809 | mark_reg_conflicts (reg); | |
810 | } | |
811 | ||
38398762 RK |
812 | /* Mark any registers set in INSN and then never used. */ |
813 | ||
814 | while (n_regs_set > 0) | |
815 | if (find_regno_note (insn, REG_UNUSED, | |
816 | REGNO (regs_set[--n_regs_set]))) | |
817 | mark_reg_death (regs_set[n_regs_set]); | |
818 | } | |
819 | ||
3b413743 | 820 | if (insn == BLOCK_END (b)) |
38398762 RK |
821 | break; |
822 | insn = NEXT_INSN (insn); | |
823 | } | |
824 | } | |
67289ea6 MM |
825 | |
826 | /* Clean up. */ | |
827 | free (block_start_allocnos); | |
828 | free (regs_set); | |
38398762 RK |
829 | } |
830 | /* Expand the preference information by looking for cases where one allocno | |
831 | dies in an insn that sets an allocno. If those two allocnos don't conflict, | |
832 | merge any preferences between those allocnos. */ | |
833 | ||
834 | static void | |
835 | expand_preferences () | |
836 | { | |
837 | rtx insn; | |
838 | rtx link; | |
839 | rtx set; | |
840 | ||
841 | /* We only try to handle the most common cases here. Most of the cases | |
842 | where this wins are reg-reg copies. */ | |
843 | ||
844 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
845 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
846 | && (set = single_set (insn)) != 0 | |
847 | && GET_CODE (SET_DEST (set)) == REG | |
848 | && reg_allocno[REGNO (SET_DEST (set))] >= 0) | |
849 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
850 | if (REG_NOTE_KIND (link) == REG_DEAD | |
851 | && GET_CODE (XEXP (link, 0)) == REG | |
852 | && reg_allocno[REGNO (XEXP (link, 0))] >= 0 | |
853 | && ! CONFLICTP (reg_allocno[REGNO (SET_DEST (set))], | |
267cf808 | 854 | reg_allocno[REGNO (XEXP (link, 0))])) |
38398762 RK |
855 | { |
856 | int a1 = reg_allocno[REGNO (SET_DEST (set))]; | |
857 | int a2 = reg_allocno[REGNO (XEXP (link, 0))]; | |
858 | ||
859 | if (XEXP (link, 0) == SET_SRC (set)) | |
860 | { | |
861 | IOR_HARD_REG_SET (hard_reg_copy_preferences[a1], | |
862 | hard_reg_copy_preferences[a2]); | |
863 | IOR_HARD_REG_SET (hard_reg_copy_preferences[a2], | |
864 | hard_reg_copy_preferences[a1]); | |
865 | } | |
866 | ||
867 | IOR_HARD_REG_SET (hard_reg_preferences[a1], | |
868 | hard_reg_preferences[a2]); | |
869 | IOR_HARD_REG_SET (hard_reg_preferences[a2], | |
870 | hard_reg_preferences[a1]); | |
871 | IOR_HARD_REG_SET (hard_reg_full_preferences[a1], | |
872 | hard_reg_full_preferences[a2]); | |
873 | IOR_HARD_REG_SET (hard_reg_full_preferences[a2], | |
874 | hard_reg_full_preferences[a1]); | |
875 | } | |
876 | } | |
877 | \f | |
878 | /* Prune the preferences for global registers to exclude registers that cannot | |
879 | be used. | |
880 | ||
881 | Compute `regs_someone_prefers', which is a bitmask of the hard registers | |
882 | that are preferred by conflicting registers of lower priority. If possible, | |
883 | we will avoid using these registers. */ | |
884 | ||
885 | static void | |
886 | prune_preferences () | |
887 | { | |
32c8d1bc | 888 | int i; |
38398762 | 889 | int allocno; |
267cf808 | 890 | int *allocno_to_order = (int *) xmalloc (max_allocno * sizeof (int)); |
38398762 RK |
891 | |
892 | /* Scan least most important to most important. | |
893 | For each allocno, remove from preferences registers that cannot be used, | |
894 | either because of conflicts or register type. Then compute all registers | |
d45cf215 | 895 | preferred by each lower-priority register that conflicts. */ |
38398762 RK |
896 | |
897 | for (i = max_allocno - 1; i >= 0; i--) | |
898 | { | |
267cf808 | 899 | HARD_REG_SET temp; |
38398762 RK |
900 | |
901 | allocno = allocno_order[i]; | |
267cf808 | 902 | allocno_to_order[allocno] = i; |
38398762 RK |
903 | COPY_HARD_REG_SET (temp, hard_reg_conflicts[allocno]); |
904 | ||
905 | if (allocno_calls_crossed[allocno] == 0) | |
906 | IOR_HARD_REG_SET (temp, fixed_reg_set); | |
907 | else | |
908 | IOR_HARD_REG_SET (temp, call_used_reg_set); | |
909 | ||
910 | IOR_COMPL_HARD_REG_SET | |
911 | (temp, | |
912 | reg_class_contents[(int) reg_preferred_class (allocno_reg[allocno])]); | |
913 | ||
914 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], temp); | |
915 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], temp); | |
916 | AND_COMPL_HARD_REG_SET (hard_reg_full_preferences[allocno], temp); | |
267cf808 | 917 | } |
38398762 | 918 | |
267cf808 JL |
919 | for (i = max_allocno - 1; i >= 0; i--) |
920 | { | |
38398762 RK |
921 | /* Merge in the preferences of lower-priority registers (they have |
922 | already been pruned). If we also prefer some of those registers, | |
923 | don't exclude them unless we are of a smaller size (in which case | |
924 | we want to give the lower-priority allocno the first chance for | |
925 | these registers). */ | |
267cf808 | 926 | HARD_REG_SET temp, temp2; |
32c8d1bc | 927 | int allocno2; |
267cf808 JL |
928 | |
929 | allocno = allocno_order[i]; | |
267cf808 | 930 | |
ea1637e9 R |
931 | CLEAR_HARD_REG_SET (temp); |
932 | CLEAR_HARD_REG_SET (temp2); | |
267cf808 | 933 | |
32c8d1bc | 934 | EXECUTE_IF_CONFLICT (allocno, allocno2, |
267cf808 | 935 | { |
32c8d1bc | 936 | if (allocno_to_order[allocno2] > i) |
267cf808 | 937 | { |
32c8d1bc R |
938 | if (allocno_size[allocno2] <= allocno_size[allocno]) |
939 | IOR_HARD_REG_SET (temp, hard_reg_full_preferences[allocno2]); | |
940 | else | |
941 | IOR_HARD_REG_SET (temp2, hard_reg_full_preferences[allocno2]); | |
267cf808 | 942 | } |
32c8d1bc | 943 | }); |
267cf808 | 944 | |
ea1637e9 R |
945 | AND_COMPL_HARD_REG_SET (temp, hard_reg_full_preferences[allocno]); |
946 | IOR_HARD_REG_SET (temp, temp2); | |
947 | COPY_HARD_REG_SET (regs_someone_prefers[allocno], temp); | |
38398762 | 948 | } |
267cf808 | 949 | free (allocno_to_order); |
38398762 RK |
950 | } |
951 | \f | |
952 | /* Assign a hard register to ALLOCNO; look for one that is the beginning | |
953 | of a long enough stretch of hard regs none of which conflicts with ALLOCNO. | |
954 | The registers marked in PREFREGS are tried first. | |
955 | ||
956 | LOSERS, if non-zero, is a HARD_REG_SET indicating registers that cannot | |
957 | be used for this allocation. | |
958 | ||
b1ec3c92 CH |
959 | If ALT_REGS_P is zero, consider only the preferred class of ALLOCNO's reg. |
960 | Otherwise ignore that preferred class and use the alternate class. | |
38398762 RK |
961 | |
962 | If ACCEPT_CALL_CLOBBERED is nonzero, accept a call-clobbered hard reg that | |
963 | will have to be saved and restored at calls. | |
964 | ||
1d56e983 RS |
965 | RETRYING is nonzero if this is called from retry_global_alloc. |
966 | ||
38398762 RK |
967 | If we find one, record it in reg_renumber. |
968 | If not, do nothing. */ | |
969 | ||
970 | static void | |
b1ec3c92 | 971 | find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) |
38398762 RK |
972 | int allocno; |
973 | HARD_REG_SET losers; | |
b1ec3c92 | 974 | int alt_regs_p; |
38398762 | 975 | int accept_call_clobbered; |
1d56e983 | 976 | int retrying; |
38398762 RK |
977 | { |
978 | register int i, best_reg, pass; | |
979 | #ifdef HARD_REG_SET | |
980 | register /* Declare it register if it's a scalar. */ | |
981 | #endif | |
1d56e983 | 982 | HARD_REG_SET used, used1, used2; |
38398762 | 983 | |
b1ec3c92 CH |
984 | enum reg_class class = (alt_regs_p |
985 | ? reg_alternate_class (allocno_reg[allocno]) | |
986 | : reg_preferred_class (allocno_reg[allocno])); | |
38398762 RK |
987 | enum machine_mode mode = PSEUDO_REGNO_MODE (allocno_reg[allocno]); |
988 | ||
989 | if (accept_call_clobbered) | |
990 | COPY_HARD_REG_SET (used1, call_fixed_reg_set); | |
991 | else if (allocno_calls_crossed[allocno] == 0) | |
992 | COPY_HARD_REG_SET (used1, fixed_reg_set); | |
993 | else | |
994 | COPY_HARD_REG_SET (used1, call_used_reg_set); | |
995 | ||
996 | /* Some registers should not be allocated in global-alloc. */ | |
997 | IOR_HARD_REG_SET (used1, no_global_alloc_regs); | |
998 | if (losers) | |
999 | IOR_HARD_REG_SET (used1, losers); | |
1000 | ||
1001 | IOR_COMPL_HARD_REG_SET (used1, reg_class_contents[(int) class]); | |
1d56e983 RS |
1002 | COPY_HARD_REG_SET (used2, used1); |
1003 | ||
38398762 RK |
1004 | IOR_HARD_REG_SET (used1, hard_reg_conflicts[allocno]); |
1005 | ||
d546b10a | 1006 | #ifdef CLASS_CANNOT_CHANGE_SIZE |
b1f21e0a | 1007 | if (REG_CHANGES_SIZE (allocno_reg[allocno])) |
d546b10a RK |
1008 | IOR_HARD_REG_SET (used1, |
1009 | reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE]); | |
1010 | #endif | |
1011 | ||
38398762 | 1012 | /* Try each hard reg to see if it fits. Do this in two passes. |
d45cf215 | 1013 | In the first pass, skip registers that are preferred by some other pseudo |
38398762 RK |
1014 | to give it a better chance of getting one of those registers. Only if |
1015 | we can't get a register when excluding those do we take one of them. | |
1016 | However, we never allocate a register for the first time in pass 0. */ | |
1017 | ||
1018 | COPY_HARD_REG_SET (used, used1); | |
1019 | IOR_COMPL_HARD_REG_SET (used, regs_used_so_far); | |
1020 | IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]); | |
1021 | ||
1022 | best_reg = -1; | |
1023 | for (i = FIRST_PSEUDO_REGISTER, pass = 0; | |
1024 | pass <= 1 && i >= FIRST_PSEUDO_REGISTER; | |
1025 | pass++) | |
1026 | { | |
1027 | if (pass == 1) | |
1028 | COPY_HARD_REG_SET (used, used1); | |
1029 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1030 | { | |
1031 | #ifdef REG_ALLOC_ORDER | |
1032 | int regno = reg_alloc_order[i]; | |
1033 | #else | |
1034 | int regno = i; | |
1035 | #endif | |
1036 | if (! TEST_HARD_REG_BIT (used, regno) | |
1e326708 MH |
1037 | && HARD_REGNO_MODE_OK (regno, mode) |
1038 | && (allocno_calls_crossed[allocno] == 0 | |
1039 | || accept_call_clobbered | |
1040 | || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) | |
38398762 RK |
1041 | { |
1042 | register int j; | |
1043 | register int lim = regno + HARD_REGNO_NREGS (regno, mode); | |
1044 | for (j = regno + 1; | |
1045 | (j < lim | |
1046 | && ! TEST_HARD_REG_BIT (used, j)); | |
1047 | j++); | |
1048 | if (j == lim) | |
1049 | { | |
1050 | best_reg = regno; | |
1051 | break; | |
1052 | } | |
1053 | #ifndef REG_ALLOC_ORDER | |
1054 | i = j; /* Skip starting points we know will lose */ | |
1055 | #endif | |
1056 | } | |
1057 | } | |
1058 | } | |
1059 | ||
1060 | /* See if there is a preferred register with the same class as the register | |
1061 | we allocated above. Making this restriction prevents register | |
1062 | preferencing from creating worse register allocation. | |
1063 | ||
1064 | Remove from the preferred registers and conflicting registers. Note that | |
1065 | additional conflicts may have been added after `prune_preferences' was | |
1066 | called. | |
1067 | ||
1068 | First do this for those register with copy preferences, then all | |
1069 | preferred registers. */ | |
1070 | ||
1071 | AND_COMPL_HARD_REG_SET (hard_reg_copy_preferences[allocno], used); | |
1072 | GO_IF_HARD_REG_SUBSET (hard_reg_copy_preferences[allocno], | |
1073 | reg_class_contents[(int) NO_REGS], no_copy_prefs); | |
1074 | ||
1075 | if (best_reg >= 0) | |
1076 | { | |
1077 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1078 | if (TEST_HARD_REG_BIT (hard_reg_copy_preferences[allocno], i) | |
1079 | && HARD_REGNO_MODE_OK (i, mode) | |
1080 | && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg) | |
1081 | || reg_class_subset_p (REGNO_REG_CLASS (i), | |
1082 | REGNO_REG_CLASS (best_reg)) | |
1083 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg), | |
1084 | REGNO_REG_CLASS (i)))) | |
1085 | { | |
1086 | register int j; | |
1087 | register int lim = i + HARD_REGNO_NREGS (i, mode); | |
1088 | for (j = i + 1; | |
1089 | (j < lim | |
1090 | && ! TEST_HARD_REG_BIT (used, j) | |
1091 | && (REGNO_REG_CLASS (j) | |
1092 | == REGNO_REG_CLASS (best_reg + (j - i)) | |
1093 | || reg_class_subset_p (REGNO_REG_CLASS (j), | |
1094 | REGNO_REG_CLASS (best_reg + (j - i))) | |
1095 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)), | |
1096 | REGNO_REG_CLASS (j)))); | |
1097 | j++); | |
1098 | if (j == lim) | |
1099 | { | |
1100 | best_reg = i; | |
1101 | goto no_prefs; | |
1102 | } | |
1103 | } | |
1104 | } | |
1105 | no_copy_prefs: | |
1106 | ||
1107 | AND_COMPL_HARD_REG_SET (hard_reg_preferences[allocno], used); | |
1108 | GO_IF_HARD_REG_SUBSET (hard_reg_preferences[allocno], | |
1109 | reg_class_contents[(int) NO_REGS], no_prefs); | |
1110 | ||
1111 | if (best_reg >= 0) | |
1112 | { | |
1113 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1114 | if (TEST_HARD_REG_BIT (hard_reg_preferences[allocno], i) | |
1115 | && HARD_REGNO_MODE_OK (i, mode) | |
1116 | && (REGNO_REG_CLASS (i) == REGNO_REG_CLASS (best_reg) | |
1117 | || reg_class_subset_p (REGNO_REG_CLASS (i), | |
1118 | REGNO_REG_CLASS (best_reg)) | |
1119 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg), | |
1120 | REGNO_REG_CLASS (i)))) | |
1121 | { | |
1122 | register int j; | |
1123 | register int lim = i + HARD_REGNO_NREGS (i, mode); | |
1124 | for (j = i + 1; | |
1125 | (j < lim | |
1126 | && ! TEST_HARD_REG_BIT (used, j) | |
1127 | && (REGNO_REG_CLASS (j) | |
1128 | == REGNO_REG_CLASS (best_reg + (j - i)) | |
1129 | || reg_class_subset_p (REGNO_REG_CLASS (j), | |
1130 | REGNO_REG_CLASS (best_reg + (j - i))) | |
1131 | || reg_class_subset_p (REGNO_REG_CLASS (best_reg + (j - i)), | |
1132 | REGNO_REG_CLASS (j)))); | |
1133 | j++); | |
1134 | if (j == lim) | |
1135 | { | |
1136 | best_reg = i; | |
1137 | break; | |
1138 | } | |
1139 | } | |
1140 | } | |
1141 | no_prefs: | |
1142 | ||
cfcf04a6 RK |
1143 | /* If we haven't succeeded yet, try with caller-saves. |
1144 | We need not check to see if the current function has nonlocal | |
1145 | labels because we don't put any pseudos that are live over calls in | |
1146 | registers in that case. */ | |
1147 | ||
1d56e983 RS |
1148 | if (flag_caller_saves && best_reg < 0) |
1149 | { | |
1150 | /* Did not find a register. If it would be profitable to | |
1151 | allocate a call-clobbered register and save and restore it | |
1152 | around calls, do that. */ | |
1153 | if (! accept_call_clobbered | |
1154 | && allocno_calls_crossed[allocno] != 0 | |
1155 | && CALLER_SAVE_PROFITABLE (allocno_n_refs[allocno], | |
1156 | allocno_calls_crossed[allocno])) | |
1157 | { | |
6cad67d2 JL |
1158 | HARD_REG_SET new_losers; |
1159 | if (! losers) | |
1160 | CLEAR_HARD_REG_SET (new_losers); | |
1161 | else | |
1162 | COPY_HARD_REG_SET (new_losers, losers); | |
1163 | ||
1164 | IOR_HARD_REG_SET(new_losers, losing_caller_save_reg_set); | |
1165 | find_reg (allocno, new_losers, alt_regs_p, 1, retrying); | |
1d56e983 RS |
1166 | if (reg_renumber[allocno_reg[allocno]] >= 0) |
1167 | { | |
1168 | caller_save_needed = 1; | |
1169 | return; | |
1170 | } | |
1171 | } | |
1172 | } | |
1173 | ||
1174 | /* If we haven't succeeded yet, | |
1175 | see if some hard reg that conflicts with us | |
1176 | was utilized poorly by local-alloc. | |
1177 | If so, kick out the regs that were put there by local-alloc | |
1178 | so we can use it instead. */ | |
1179 | if (best_reg < 0 && !retrying | |
1180 | /* Let's not bother with multi-reg allocnos. */ | |
1181 | && allocno_size[allocno] == 1) | |
1182 | { | |
1183 | /* Count from the end, to find the least-used ones first. */ | |
1184 | for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--) | |
17a0a76d RK |
1185 | { |
1186 | #ifdef REG_ALLOC_ORDER | |
1187 | int regno = reg_alloc_order[i]; | |
1188 | #else | |
1189 | int regno = i; | |
1190 | #endif | |
34e56753 | 1191 | |
17a0a76d RK |
1192 | if (local_reg_n_refs[regno] != 0 |
1193 | /* Don't use a reg no good for this pseudo. */ | |
1194 | && ! TEST_HARD_REG_BIT (used2, regno) | |
d546b10a RK |
1195 | && HARD_REGNO_MODE_OK (regno, mode) |
1196 | #ifdef CLASS_CANNOT_CHANGE_SIZE | |
b1f21e0a | 1197 | && ! (REG_CHANGES_SIZE (allocno_reg[allocno]) |
d546b10a RK |
1198 | && (TEST_HARD_REG_BIT |
1199 | (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], | |
1200 | regno))) | |
1201 | #endif | |
1202 | ) | |
17a0a76d | 1203 | { |
7a17c588 JW |
1204 | /* We explicitly evaluate the divide results into temporary |
1205 | variables so as to avoid excess precision problems that occur | |
1206 | on a i386-unknown-sysv4.2 (unixware) host. */ | |
1207 | ||
1208 | double tmp1 = ((double) local_reg_n_refs[regno] | |
1209 | / local_reg_live_length[regno]); | |
1210 | double tmp2 = ((double) allocno_n_refs[allocno] | |
1211 | / allocno_live_length[allocno]); | |
1212 | ||
1213 | if (tmp1 < tmp2) | |
1214 | { | |
1215 | /* Hard reg REGNO was used less in total by local regs | |
1216 | than it would be used by this one allocno! */ | |
1217 | int k; | |
1218 | for (k = 0; k < max_regno; k++) | |
1219 | if (reg_renumber[k] >= 0) | |
1220 | { | |
1221 | int r = reg_renumber[k]; | |
1222 | int endregno | |
1223 | = r + HARD_REGNO_NREGS (r, PSEUDO_REGNO_MODE (k)); | |
34e56753 | 1224 | |
7a17c588 JW |
1225 | if (regno >= r && regno < endregno) |
1226 | reg_renumber[k] = -1; | |
1227 | } | |
17a0a76d | 1228 | |
7a17c588 JW |
1229 | best_reg = regno; |
1230 | break; | |
1231 | } | |
17a0a76d RK |
1232 | } |
1233 | } | |
1d56e983 RS |
1234 | } |
1235 | ||
38398762 RK |
1236 | /* Did we find a register? */ |
1237 | ||
1238 | if (best_reg >= 0) | |
1239 | { | |
1240 | register int lim, j; | |
1241 | HARD_REG_SET this_reg; | |
1242 | ||
1243 | /* Yes. Record it as the hard register of this pseudo-reg. */ | |
1244 | reg_renumber[allocno_reg[allocno]] = best_reg; | |
1245 | /* Also of any pseudo-regs that share with it. */ | |
1246 | if (reg_may_share[allocno_reg[allocno]]) | |
1247 | for (j = FIRST_PSEUDO_REGISTER; j < max_regno; j++) | |
1248 | if (reg_allocno[j] == allocno) | |
1249 | reg_renumber[j] = best_reg; | |
1250 | ||
1251 | /* Make a set of the hard regs being allocated. */ | |
1252 | CLEAR_HARD_REG_SET (this_reg); | |
1253 | lim = best_reg + HARD_REGNO_NREGS (best_reg, mode); | |
1254 | for (j = best_reg; j < lim; j++) | |
1255 | { | |
1256 | SET_HARD_REG_BIT (this_reg, j); | |
1257 | SET_HARD_REG_BIT (regs_used_so_far, j); | |
1d56e983 RS |
1258 | /* This is no longer a reg used just by local regs. */ |
1259 | local_reg_n_refs[j] = 0; | |
38398762 RK |
1260 | } |
1261 | /* For each other pseudo-reg conflicting with this one, | |
1262 | mark it as conflicting with the hard regs this one occupies. */ | |
1263 | lim = allocno; | |
32c8d1bc R |
1264 | EXECUTE_IF_CONFLICT (lim, j, |
1265 | { | |
1266 | IOR_HARD_REG_SET (hard_reg_conflicts[j], this_reg); | |
1267 | }); | |
38398762 | 1268 | } |
38398762 RK |
1269 | } |
1270 | \f | |
1271 | /* Called from `reload' to look for a hard reg to put pseudo reg REGNO in. | |
1272 | Perhaps it had previously seemed not worth a hard reg, | |
1273 | or perhaps its old hard reg has been commandeered for reloads. | |
1274 | FORBIDDEN_REGS indicates certain hard regs that may not be used, even if | |
1275 | they do not appear to be allocated. | |
1276 | If FORBIDDEN_REGS is zero, no regs are forbidden. */ | |
1277 | ||
1278 | void | |
1279 | retry_global_alloc (regno, forbidden_regs) | |
1280 | int regno; | |
1281 | HARD_REG_SET forbidden_regs; | |
1282 | { | |
1283 | int allocno = reg_allocno[regno]; | |
1284 | if (allocno >= 0) | |
1285 | { | |
1286 | /* If we have more than one register class, | |
1287 | first try allocating in the class that is cheapest | |
1288 | for this pseudo-reg. If that fails, try any reg. */ | |
1289 | if (N_REG_CLASSES > 1) | |
1d56e983 | 1290 | find_reg (allocno, forbidden_regs, 0, 0, 1); |
38398762 | 1291 | if (reg_renumber[regno] < 0 |
b1ec3c92 | 1292 | && reg_alternate_class (regno) != NO_REGS) |
1d56e983 | 1293 | find_reg (allocno, forbidden_regs, 1, 0, 1); |
38398762 RK |
1294 | |
1295 | /* If we found a register, modify the RTL for the register to | |
1296 | show the hard register, and mark that register live. */ | |
1297 | if (reg_renumber[regno] >= 0) | |
1298 | { | |
1299 | REGNO (regno_reg_rtx[regno]) = reg_renumber[regno]; | |
1300 | mark_home_live (regno); | |
1301 | } | |
1302 | } | |
1303 | } | |
1304 | \f | |
1305 | /* Record a conflict between register REGNO | |
1306 | and everything currently live. | |
1307 | REGNO must not be a pseudo reg that was allocated | |
1308 | by local_alloc; such numbers must be translated through | |
1309 | reg_renumber before calling here. */ | |
1310 | ||
1311 | static void | |
1312 | record_one_conflict (regno) | |
1313 | int regno; | |
1314 | { | |
1315 | register int j; | |
1316 | ||
1317 | if (regno < FIRST_PSEUDO_REGISTER) | |
1318 | /* When a hard register becomes live, | |
1319 | record conflicts with live pseudo regs. */ | |
32c8d1bc | 1320 | EXECUTE_IF_SET_IN_ALLOCNO_SET (allocnos_live, j, |
38398762 | 1321 | { |
32c8d1bc R |
1322 | SET_HARD_REG_BIT (hard_reg_conflicts[j], regno); |
1323 | }); | |
38398762 RK |
1324 | else |
1325 | /* When a pseudo-register becomes live, | |
1326 | record conflicts first with hard regs, | |
1327 | then with other pseudo regs. */ | |
1328 | { | |
1329 | register int ialloc = reg_allocno[regno]; | |
1330 | register int ialloc_prod = ialloc * allocno_row_words; | |
1331 | IOR_HARD_REG_SET (hard_reg_conflicts[ialloc], hard_regs_live); | |
1332 | for (j = allocno_row_words - 1; j >= 0; j--) | |
1333 | { | |
1334 | #if 0 | |
1335 | int k; | |
1336 | for (k = 0; k < n_no_conflict_pairs; k++) | |
1337 | if (! ((j == no_conflict_pairs[k].allocno1 | |
1338 | && ialloc == no_conflict_pairs[k].allocno2) | |
1339 | || | |
1340 | (j == no_conflict_pairs[k].allocno2 | |
1341 | && ialloc == no_conflict_pairs[k].allocno1))) | |
1342 | #endif /* 0 */ | |
1343 | conflicts[ialloc_prod + j] |= allocnos_live[j]; | |
1344 | } | |
1345 | } | |
1346 | } | |
1347 | ||
1348 | /* Record all allocnos currently live as conflicting | |
1349 | with each other and with all hard regs currently live. | |
1350 | ALLOCNO_VEC is a vector of LEN allocnos, all allocnos that | |
1351 | are currently live. Their bits are also flagged in allocnos_live. */ | |
1352 | ||
1353 | static void | |
1354 | record_conflicts (allocno_vec, len) | |
8d4c79be | 1355 | register int *allocno_vec; |
38398762 RK |
1356 | register int len; |
1357 | { | |
1358 | register int allocno; | |
1359 | register int j; | |
1360 | register int ialloc_prod; | |
1361 | ||
1362 | while (--len >= 0) | |
1363 | { | |
1364 | allocno = allocno_vec[len]; | |
1365 | ialloc_prod = allocno * allocno_row_words; | |
1366 | IOR_HARD_REG_SET (hard_reg_conflicts[allocno], hard_regs_live); | |
1367 | for (j = allocno_row_words - 1; j >= 0; j--) | |
1368 | conflicts[ialloc_prod + j] |= allocnos_live[j]; | |
1369 | } | |
1370 | } | |
267cf808 JL |
1371 | |
1372 | /* If CONFLICTP (i, j) is true, make sure CONFLICTP (j, i) is also true. */ | |
1373 | static void | |
1374 | mirror_conflicts () | |
1375 | { | |
1376 | register int i, j; | |
1377 | int rw = allocno_row_words; | |
1378 | int rwb = rw * INT_BITS; | |
1379 | INT_TYPE *p = conflicts; | |
1380 | INT_TYPE *q0 = conflicts, *q1, *q2; | |
1381 | unsigned INT_TYPE mask; | |
1382 | ||
1383 | for (i = max_allocno - 1, mask = 1; i >= 0; i--, mask <<= 1) | |
1384 | { | |
1385 | if (! mask) | |
1386 | { | |
1387 | mask = 1; | |
1388 | q0++; | |
1389 | } | |
1390 | for (j = allocno_row_words - 1, q1 = q0; j >= 0; j--, q1 += rwb) | |
1391 | { | |
1392 | unsigned INT_TYPE word; | |
1393 | ||
1394 | for (word = (unsigned INT_TYPE) *p++, q2 = q1; word; | |
1395 | word >>= 1, q2 += rw) | |
1396 | { | |
1397 | if (word & 1) | |
1398 | *q2 |= mask; | |
1399 | } | |
1400 | } | |
1401 | } | |
1402 | } | |
38398762 RK |
1403 | \f |
1404 | /* Handle the case where REG is set by the insn being scanned, | |
1405 | during the forward scan to accumulate conflicts. | |
1406 | Store a 1 in regs_live or allocnos_live for this register, record how many | |
1407 | consecutive hardware registers it actually needs, | |
1408 | and record a conflict with all other registers already live. | |
1409 | ||
1410 | Note that even if REG does not remain alive after this insn, | |
1411 | we must mark it here as live, to ensure a conflict between | |
1412 | REG and any other regs set in this insn that really do live. | |
1413 | This is because those other regs could be considered after this. | |
1414 | ||
1415 | REG might actually be something other than a register; | |
1416 | if so, we do nothing. | |
1417 | ||
1418 | SETTER is 0 if this register was modified by an auto-increment (i.e., | |
a4c3ddd8 | 1419 | a REG_INC note was found for it). */ |
38398762 RK |
1420 | |
1421 | static void | |
84832317 | 1422 | mark_reg_store (reg, setter, data) |
a4c3ddd8 | 1423 | rtx reg, setter; |
84832317 | 1424 | void *data ATTRIBUTE_UNUSED; |
38398762 RK |
1425 | { |
1426 | register int regno; | |
38398762 RK |
1427 | |
1428 | /* WORD is which word of a multi-register group is being stored. | |
1429 | For the case where the store is actually into a SUBREG of REG. | |
1430 | Except we don't use it; I believe the entire REG needs to be | |
1431 | made live. */ | |
1432 | int word = 0; | |
1433 | ||
1434 | if (GET_CODE (reg) == SUBREG) | |
1435 | { | |
1436 | word = SUBREG_WORD (reg); | |
1437 | reg = SUBREG_REG (reg); | |
1438 | } | |
1439 | ||
1440 | if (GET_CODE (reg) != REG) | |
1441 | return; | |
1442 | ||
38398762 RK |
1443 | regs_set[n_regs_set++] = reg; |
1444 | ||
a4c3ddd8 | 1445 | if (setter && GET_CODE (setter) != CLOBBER) |
38398762 RK |
1446 | set_preference (reg, SET_SRC (setter)); |
1447 | ||
1448 | regno = REGNO (reg); | |
1449 | ||
38398762 RK |
1450 | /* Either this is one of the max_allocno pseudo regs not allocated, |
1451 | or it is or has a hardware reg. First handle the pseudo-regs. */ | |
1452 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1453 | { | |
1454 | if (reg_allocno[regno] >= 0) | |
1455 | { | |
1456 | SET_ALLOCNO_LIVE (reg_allocno[regno]); | |
1457 | record_one_conflict (regno); | |
1458 | } | |
1459 | } | |
a300b8d9 JW |
1460 | |
1461 | if (reg_renumber[regno] >= 0) | |
1462 | regno = reg_renumber[regno] /* + word */; | |
1463 | ||
38398762 | 1464 | /* Handle hardware regs (and pseudos allocated to hard regs). */ |
a300b8d9 | 1465 | if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno]) |
38398762 RK |
1466 | { |
1467 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1468 | while (regno < last) | |
1469 | { | |
1470 | record_one_conflict (regno); | |
1471 | SET_HARD_REG_BIT (hard_regs_live, regno); | |
1472 | regno++; | |
1473 | } | |
1474 | } | |
1475 | } | |
1476 | \f | |
1477 | /* Like mark_reg_set except notice just CLOBBERs; ignore SETs. */ | |
1478 | ||
1479 | static void | |
84832317 | 1480 | mark_reg_clobber (reg, setter, data) |
38398762 | 1481 | rtx reg, setter; |
84832317 | 1482 | void *data ATTRIBUTE_UNUSED; |
38398762 | 1483 | { |
a4c3ddd8 | 1484 | if (GET_CODE (setter) == CLOBBER) |
84832317 | 1485 | mark_reg_store (reg, setter, data); |
333e0f7d RS |
1486 | } |
1487 | ||
1488 | /* Record that REG has conflicts with all the regs currently live. | |
1489 | Do not mark REG itself as live. */ | |
1490 | ||
1491 | static void | |
1492 | mark_reg_conflicts (reg) | |
1493 | rtx reg; | |
1494 | { | |
1495 | register int regno; | |
1496 | ||
1497 | if (GET_CODE (reg) == SUBREG) | |
1498 | reg = SUBREG_REG (reg); | |
1499 | ||
1500 | if (GET_CODE (reg) != REG) | |
1501 | return; | |
1502 | ||
1503 | regno = REGNO (reg); | |
1504 | ||
333e0f7d RS |
1505 | /* Either this is one of the max_allocno pseudo regs not allocated, |
1506 | or it is or has a hardware reg. First handle the pseudo-regs. */ | |
1507 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1508 | { | |
1509 | if (reg_allocno[regno] >= 0) | |
1510 | record_one_conflict (regno); | |
1511 | } | |
a300b8d9 JW |
1512 | |
1513 | if (reg_renumber[regno] >= 0) | |
1514 | regno = reg_renumber[regno]; | |
1515 | ||
333e0f7d | 1516 | /* Handle hardware regs (and pseudos allocated to hard regs). */ |
a300b8d9 | 1517 | if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno]) |
333e0f7d RS |
1518 | { |
1519 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1520 | while (regno < last) | |
1521 | { | |
1522 | record_one_conflict (regno); | |
1523 | regno++; | |
1524 | } | |
1525 | } | |
38398762 RK |
1526 | } |
1527 | \f | |
1528 | /* Mark REG as being dead (following the insn being scanned now). | |
1529 | Store a 0 in regs_live or allocnos_live for this register. */ | |
1530 | ||
1531 | static void | |
1532 | mark_reg_death (reg) | |
1533 | rtx reg; | |
1534 | { | |
1535 | register int regno = REGNO (reg); | |
1536 | ||
38398762 RK |
1537 | /* Either this is one of the max_allocno pseudo regs not allocated, |
1538 | or it is a hardware reg. First handle the pseudo-regs. */ | |
1539 | if (regno >= FIRST_PSEUDO_REGISTER) | |
1540 | { | |
1541 | if (reg_allocno[regno] >= 0) | |
1542 | CLEAR_ALLOCNO_LIVE (reg_allocno[regno]); | |
1543 | } | |
a300b8d9 JW |
1544 | |
1545 | /* For pseudo reg, see if it has been assigned a hardware reg. */ | |
1546 | if (reg_renumber[regno] >= 0) | |
1547 | regno = reg_renumber[regno]; | |
1548 | ||
38398762 | 1549 | /* Handle hardware regs (and pseudos allocated to hard regs). */ |
a300b8d9 | 1550 | if (regno < FIRST_PSEUDO_REGISTER && ! fixed_regs[regno]) |
38398762 RK |
1551 | { |
1552 | /* Pseudo regs already assigned hardware regs are treated | |
1553 | almost the same as explicit hardware regs. */ | |
1554 | register int last = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1555 | while (regno < last) | |
1556 | { | |
1557 | CLEAR_HARD_REG_BIT (hard_regs_live, regno); | |
1558 | regno++; | |
1559 | } | |
1560 | } | |
1561 | } | |
1562 | ||
1563 | /* Mark hard reg REGNO as currently live, assuming machine mode MODE | |
1564 | for the value stored in it. MODE determines how many consecutive | |
1565 | registers are actually in use. Do not record conflicts; | |
1566 | it is assumed that the caller will do that. */ | |
1567 | ||
1568 | static void | |
1569 | mark_reg_live_nc (regno, mode) | |
1570 | register int regno; | |
1571 | enum machine_mode mode; | |
1572 | { | |
1573 | register int last = regno + HARD_REGNO_NREGS (regno, mode); | |
1574 | while (regno < last) | |
1575 | { | |
1576 | SET_HARD_REG_BIT (hard_regs_live, regno); | |
1577 | regno++; | |
1578 | } | |
1579 | } | |
1580 | \f | |
1581 | /* Try to set a preference for an allocno to a hard register. | |
1582 | We are passed DEST and SRC which are the operands of a SET. It is known | |
1583 | that SRC is a register. If SRC or the first operand of SRC is a register, | |
1584 | try to set a preference. If one of the two is a hard register and the other | |
1585 | is a pseudo-register, mark the preference. | |
1586 | ||
6dc42e49 | 1587 | Note that we are not as aggressive as local-alloc in trying to tie a |
38398762 RK |
1588 | pseudo-register to a hard register. */ |
1589 | ||
1590 | static void | |
1591 | set_preference (dest, src) | |
1592 | rtx dest, src; | |
1593 | { | |
1594 | int src_regno, dest_regno; | |
1595 | /* Amount to add to the hard regno for SRC, or subtract from that for DEST, | |
1596 | to compensate for subregs in SRC or DEST. */ | |
1597 | int offset = 0; | |
1598 | int i; | |
1599 | int copy = 1; | |
1600 | ||
1601 | if (GET_RTX_FORMAT (GET_CODE (src))[0] == 'e') | |
1602 | src = XEXP (src, 0), copy = 0; | |
1603 | ||
1604 | /* Get the reg number for both SRC and DEST. | |
1605 | If neither is a reg, give up. */ | |
1606 | ||
1607 | if (GET_CODE (src) == REG) | |
1608 | src_regno = REGNO (src); | |
1609 | else if (GET_CODE (src) == SUBREG && GET_CODE (SUBREG_REG (src)) == REG) | |
1610 | { | |
1611 | src_regno = REGNO (SUBREG_REG (src)); | |
1612 | offset += SUBREG_WORD (src); | |
1613 | } | |
1614 | else | |
1615 | return; | |
1616 | ||
1617 | if (GET_CODE (dest) == REG) | |
1618 | dest_regno = REGNO (dest); | |
1619 | else if (GET_CODE (dest) == SUBREG && GET_CODE (SUBREG_REG (dest)) == REG) | |
1620 | { | |
1621 | dest_regno = REGNO (SUBREG_REG (dest)); | |
1622 | offset -= SUBREG_WORD (dest); | |
1623 | } | |
1624 | else | |
1625 | return; | |
1626 | ||
1627 | /* Convert either or both to hard reg numbers. */ | |
1628 | ||
1629 | if (reg_renumber[src_regno] >= 0) | |
1630 | src_regno = reg_renumber[src_regno]; | |
1631 | ||
1632 | if (reg_renumber[dest_regno] >= 0) | |
1633 | dest_regno = reg_renumber[dest_regno]; | |
1634 | ||
1635 | /* Now if one is a hard reg and the other is a global pseudo | |
1636 | then give the other a preference. */ | |
1637 | ||
1638 | if (dest_regno < FIRST_PSEUDO_REGISTER && src_regno >= FIRST_PSEUDO_REGISTER | |
1639 | && reg_allocno[src_regno] >= 0) | |
1640 | { | |
1641 | dest_regno -= offset; | |
1642 | if (dest_regno >= 0 && dest_regno < FIRST_PSEUDO_REGISTER) | |
1643 | { | |
1644 | if (copy) | |
1645 | SET_REGBIT (hard_reg_copy_preferences, | |
1646 | reg_allocno[src_regno], dest_regno); | |
1647 | ||
1648 | SET_REGBIT (hard_reg_preferences, | |
1649 | reg_allocno[src_regno], dest_regno); | |
1650 | for (i = dest_regno; | |
1651 | i < dest_regno + HARD_REGNO_NREGS (dest_regno, GET_MODE (dest)); | |
1652 | i++) | |
1653 | SET_REGBIT (hard_reg_full_preferences, reg_allocno[src_regno], i); | |
1654 | } | |
1655 | } | |
1656 | ||
1657 | if (src_regno < FIRST_PSEUDO_REGISTER && dest_regno >= FIRST_PSEUDO_REGISTER | |
1658 | && reg_allocno[dest_regno] >= 0) | |
1659 | { | |
1660 | src_regno += offset; | |
1661 | if (src_regno >= 0 && src_regno < FIRST_PSEUDO_REGISTER) | |
1662 | { | |
1663 | if (copy) | |
1664 | SET_REGBIT (hard_reg_copy_preferences, | |
1665 | reg_allocno[dest_regno], src_regno); | |
1666 | ||
1667 | SET_REGBIT (hard_reg_preferences, | |
1668 | reg_allocno[dest_regno], src_regno); | |
1669 | for (i = src_regno; | |
1670 | i < src_regno + HARD_REGNO_NREGS (src_regno, GET_MODE (src)); | |
1671 | i++) | |
1672 | SET_REGBIT (hard_reg_full_preferences, reg_allocno[dest_regno], i); | |
1673 | } | |
1674 | } | |
1675 | } | |
1676 | \f | |
1677 | /* Indicate that hard register number FROM was eliminated and replaced with | |
1678 | an offset from hard register number TO. The status of hard registers live | |
1679 | at the start of a basic block is updated by replacing a use of FROM with | |
1680 | a use of TO. */ | |
1681 | ||
1682 | void | |
1683 | mark_elimination (from, to) | |
1684 | int from, to; | |
1685 | { | |
1686 | int i; | |
1687 | ||
1688 | for (i = 0; i < n_basic_blocks; i++) | |
e881bb1b RH |
1689 | { |
1690 | register regset r = BASIC_BLOCK (i)->global_live_at_start; | |
1691 | if (REGNO_REG_SET_P (r, from)) | |
1692 | { | |
1693 | CLEAR_REGNO_REG_SET (r, from); | |
1694 | SET_REGNO_REG_SET (r, to); | |
1695 | } | |
1696 | } | |
38398762 RK |
1697 | } |
1698 | \f | |
cad6f7d0 BS |
1699 | /* Used for communication between the following functions. Holds the |
1700 | current life information. */ | |
1701 | static regset live_relevant_regs; | |
1702 | ||
1703 | /* Record in live_relevant_regs that register REG became live. This | |
1704 | is called via note_stores. */ | |
1705 | static void | |
84832317 | 1706 | reg_becomes_live (reg, setter, data) |
cad6f7d0 BS |
1707 | rtx reg; |
1708 | rtx setter ATTRIBUTE_UNUSED; | |
84832317 | 1709 | void *data ATTRIBUTE_UNUSED; |
cad6f7d0 BS |
1710 | { |
1711 | int regno; | |
1712 | ||
1713 | if (GET_CODE (reg) == SUBREG) | |
1714 | reg = SUBREG_REG (reg); | |
1715 | ||
1716 | if (GET_CODE (reg) != REG) | |
1717 | return; | |
1718 | ||
1719 | regno = REGNO (reg); | |
1720 | if (regno < FIRST_PSEUDO_REGISTER) | |
1721 | { | |
1722 | int nregs = HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
1723 | while (nregs-- > 0) | |
1724 | SET_REGNO_REG_SET (live_relevant_regs, regno++); | |
1725 | } | |
1726 | else if (reg_renumber[regno] >= 0) | |
1727 | SET_REGNO_REG_SET (live_relevant_regs, regno); | |
1728 | } | |
1729 | ||
1730 | /* Record in live_relevant_regs that register REGNO died. */ | |
1731 | static void | |
1732 | reg_dies (regno, mode) | |
1733 | int regno; | |
1734 | enum machine_mode mode; | |
1735 | { | |
1736 | if (regno < FIRST_PSEUDO_REGISTER) | |
1737 | { | |
1738 | int nregs = HARD_REGNO_NREGS (regno, mode); | |
1739 | while (nregs-- > 0) | |
1740 | CLEAR_REGNO_REG_SET (live_relevant_regs, regno++); | |
1741 | } | |
1742 | else | |
1743 | CLEAR_REGNO_REG_SET (live_relevant_regs, regno); | |
1744 | } | |
1745 | ||
1746 | /* Walk the insns of the current function and build reload_insn_chain, | |
1747 | and record register life information. */ | |
1748 | static void | |
108c535a RH |
1749 | build_insn_chain (first) |
1750 | rtx first; | |
cad6f7d0 BS |
1751 | { |
1752 | struct insn_chain **p = &reload_insn_chain; | |
1753 | struct insn_chain *prev = 0; | |
108c535a | 1754 | int b = 0; |
cad6f7d0 BS |
1755 | |
1756 | live_relevant_regs = ALLOCA_REG_SET (); | |
1757 | ||
108c535a | 1758 | for (; first; first = NEXT_INSN (first)) |
cad6f7d0 | 1759 | { |
108c535a | 1760 | struct insn_chain *c; |
cad6f7d0 | 1761 | |
108c535a | 1762 | if (first == BLOCK_HEAD (b)) |
cad6f7d0 | 1763 | { |
108c535a | 1764 | int i; |
267cf808 | 1765 | |
108c535a | 1766 | CLEAR_REG_SET (live_relevant_regs); |
267cf808 JL |
1767 | |
1768 | EXECUTE_IF_SET_IN_BITMAP | |
1769 | (BASIC_BLOCK (b)->global_live_at_start, 0, i, | |
1770 | { | |
1771 | if (i < FIRST_PSEUDO_REGISTER | |
1772 | ? ! TEST_HARD_REG_BIT (eliminable_regset, i) | |
1773 | : reg_renumber[i] >= 0) | |
1774 | SET_REGNO_REG_SET (live_relevant_regs, i); | |
1775 | }); | |
1776 | } | |
108c535a RH |
1777 | |
1778 | if (GET_CODE (first) != NOTE && GET_CODE (first) != BARRIER) | |
021d1677 | 1779 | { |
108c535a RH |
1780 | c = new_insn_chain (); |
1781 | c->prev = prev; | |
1782 | prev = c; | |
1783 | *p = c; | |
1784 | p = &c->next; | |
1785 | c->insn = first; | |
1786 | c->block = b; | |
1787 | ||
1788 | COPY_REG_SET (c->live_before, live_relevant_regs); | |
cad6f7d0 | 1789 | |
108c535a | 1790 | if (GET_RTX_CLASS (GET_CODE (first)) == 'i') |
cad6f7d0 | 1791 | { |
108c535a | 1792 | rtx link; |
cad6f7d0 | 1793 | |
108c535a | 1794 | /* Mark the death of everything that dies in this instruction. */ |
cad6f7d0 | 1795 | |
108c535a RH |
1796 | for (link = REG_NOTES (first); link; link = XEXP (link, 1)) |
1797 | if (REG_NOTE_KIND (link) == REG_DEAD | |
1798 | && GET_CODE (XEXP (link, 0)) == REG) | |
1799 | reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0))); | |
cad6f7d0 | 1800 | |
108c535a | 1801 | /* Mark everything born in this instruction as live. */ |
cad6f7d0 | 1802 | |
84832317 | 1803 | note_stores (PATTERN (first), reg_becomes_live, NULL); |
cad6f7d0 | 1804 | } |
3663a304 | 1805 | |
108c535a RH |
1806 | /* Remember which registers are live at the end of the insn, before |
1807 | killing those with REG_UNUSED notes. */ | |
1808 | COPY_REG_SET (c->live_after, live_relevant_regs); | |
1809 | ||
1810 | if (GET_RTX_CLASS (GET_CODE (first)) == 'i') | |
1811 | { | |
1812 | rtx link; | |
1813 | ||
1814 | /* Mark anything that is set in this insn and then unused as dying. */ | |
1815 | ||
1816 | for (link = REG_NOTES (first); link; link = XEXP (link, 1)) | |
1817 | if (REG_NOTE_KIND (link) == REG_UNUSED | |
1818 | && GET_CODE (XEXP (link, 0)) == REG) | |
1819 | reg_dies (REGNO (XEXP (link, 0)), GET_MODE (XEXP (link, 0))); | |
1820 | } | |
3663a304 | 1821 | } |
021d1677 | 1822 | |
108c535a RH |
1823 | if (first == BLOCK_END (b)) |
1824 | b++; | |
1825 | ||
1826 | /* Stop after we pass the end of the last basic block. Verify that | |
1827 | no real insns are after the end of the last basic block. | |
1828 | ||
1829 | We may want to reorganize the loop somewhat since this test should | |
1830 | always be the right exit test. */ | |
1831 | if (b == n_basic_blocks) | |
1832 | { | |
1833 | for (first = NEXT_INSN (first) ; first; first = NEXT_INSN (first)) | |
1834 | if (GET_RTX_CLASS (GET_CODE (first)) == 'i' | |
1835 | && GET_CODE (PATTERN (first)) != USE) | |
1836 | abort (); | |
1837 | break; | |
1838 | } | |
1839 | } | |
cad6f7d0 BS |
1840 | FREE_REG_SET (live_relevant_regs); |
1841 | *p = 0; | |
1842 | } | |
1843 | \f | |
318e4b56 | 1844 | /* Print debugging trace information if -dg switch is given, |
38398762 RK |
1845 | showing the information on which the allocation decisions are based. */ |
1846 | ||
1847 | static void | |
1848 | dump_conflicts (file) | |
1849 | FILE *file; | |
1850 | { | |
1851 | register int i; | |
1852 | register int has_preferences; | |
a300b8d9 JW |
1853 | register int nregs; |
1854 | nregs = 0; | |
1855 | for (i = 0; i < max_allocno; i++) | |
1856 | { | |
1857 | if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0) | |
1858 | continue; | |
1859 | nregs++; | |
1860 | } | |
1861 | fprintf (file, ";; %d regs to allocate:", nregs); | |
38398762 RK |
1862 | for (i = 0; i < max_allocno; i++) |
1863 | { | |
1864 | int j; | |
a300b8d9 JW |
1865 | if (reg_renumber[allocno_reg[allocno_order[i]]] >= 0) |
1866 | continue; | |
38398762 RK |
1867 | fprintf (file, " %d", allocno_reg[allocno_order[i]]); |
1868 | for (j = 0; j < max_regno; j++) | |
1869 | if (reg_allocno[j] == allocno_order[i] | |
1870 | && j != allocno_reg[allocno_order[i]]) | |
1871 | fprintf (file, "+%d", j); | |
1872 | if (allocno_size[allocno_order[i]] != 1) | |
1873 | fprintf (file, " (%d)", allocno_size[allocno_order[i]]); | |
1874 | } | |
1875 | fprintf (file, "\n"); | |
1876 | ||
1877 | for (i = 0; i < max_allocno; i++) | |
1878 | { | |
1879 | register int j; | |
1880 | fprintf (file, ";; %d conflicts:", allocno_reg[i]); | |
1881 | for (j = 0; j < max_allocno; j++) | |
267cf808 | 1882 | if (CONFLICTP (j, i)) |
38398762 RK |
1883 | fprintf (file, " %d", allocno_reg[j]); |
1884 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1885 | if (TEST_HARD_REG_BIT (hard_reg_conflicts[i], j)) | |
1886 | fprintf (file, " %d", j); | |
1887 | fprintf (file, "\n"); | |
1888 | ||
1889 | has_preferences = 0; | |
1890 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1891 | if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j)) | |
1892 | has_preferences = 1; | |
1893 | ||
1894 | if (! has_preferences) | |
1895 | continue; | |
1896 | fprintf (file, ";; %d preferences:", allocno_reg[i]); | |
1897 | for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) | |
1898 | if (TEST_HARD_REG_BIT (hard_reg_preferences[i], j)) | |
1899 | fprintf (file, " %d", j); | |
1900 | fprintf (file, "\n"); | |
1901 | } | |
1902 | fprintf (file, "\n"); | |
1903 | } | |
1904 | ||
1905 | void | |
1906 | dump_global_regs (file) | |
1907 | FILE *file; | |
1908 | { | |
1909 | register int i, j; | |
1910 | ||
1911 | fprintf (file, ";; Register dispositions:\n"); | |
1912 | for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++) | |
1913 | if (reg_renumber[i] >= 0) | |
1914 | { | |
1915 | fprintf (file, "%d in %d ", i, reg_renumber[i]); | |
1916 | if (++j % 6 == 0) | |
1917 | fprintf (file, "\n"); | |
1918 | } | |
1919 | ||
1920 | fprintf (file, "\n\n;; Hard regs used: "); | |
1921 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1922 | if (regs_ever_live[i]) | |
1923 | fprintf (file, " %d", i); | |
1924 | fprintf (file, "\n\n"); | |
1925 | } |